; LLVM IR from HarshCasper/NeoAlgo :: C/sort (Iterative_Merge_Sort)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @Merge(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @IMergeSort(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 2, ptr %5, align 4, !tbaa !9
  br label %10

10:                                               ; preds = %41, %2
  %11 = load i32, ptr %5, align 4, !tbaa !9
  %12 = load i32, ptr %4, align 4, !tbaa !9
  %13 = icmp sle i32 %11, %12
  br i1 %13, label %14, label %44

14:                                               ; preds = %10
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %36, %14
  %16 = load i32, ptr %9, align 4, !tbaa !9
  %17 = load i32, ptr %5, align 4, !tbaa !9
  %18 = add nsw i32 %16, %17
  %19 = sub nsw i32 %18, 1
  %20 = load i32, ptr %4, align 4, !tbaa !9
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %40

22:                                               ; preds = %15
  %23 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %23, ptr %6, align 4, !tbaa !9
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = add nsw i32 %24, %25
  %27 = sub nsw i32 %26, 1
  store i32 %27, ptr %7, align 4, !tbaa !9
  %28 = load i32, ptr %6, align 4, !tbaa !9
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = add nsw i32 %28, %29
  %31 = sdiv i32 %30, 2
  store i32 %31, ptr %8, align 4, !tbaa !9
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = load i32, ptr %8, align 4, !tbaa !9
  %35 = load i32, ptr %7, align 4, !tbaa !9
  call void @Merge(ptr noundef %32, i32 noundef %33, i32 noundef %34, i32 noundef %35)
  br label %36

36:                                               ; preds = %22
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = load i32, ptr %5, align 4, !tbaa !9
  %39 = add nsw i32 %37, %38
  store i32 %39, ptr %9, align 4, !tbaa !9
  br label %15, !llvm.loop !11

40:                                               ; preds = %15
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %5, align 4, !tbaa !9
  %43 = mul nsw i32 %42, 2
  store i32 %43, ptr %5, align 4, !tbaa !9
  br label %10, !llvm.loop !13

44:                                               ; preds = %10
  %45 = load i32, ptr %5, align 4, !tbaa !9
  %46 = sdiv i32 %45, 2
  %47 = load i32, ptr %4, align 4, !tbaa !9
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %49, label %55

49:                                               ; preds = %44
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = sdiv i32 %51, 2
  %53 = sub nsw i32 %52, 1
  %54 = load i32, ptr %4, align 4, !tbaa !9
  call void @Merge(ptr noundef %50, i32 noundef 0, i32 noundef %53, i32 noundef %54)
  br label %55

55:                                               ; preds = %49, %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @Merge(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @IMergeSort(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not28 = icmp slt i32 %1, 2
  br i1 %.not28, label %._crit_edge30, label %.preheader

.preheader:                                       ; preds = %2, %._crit_edge
  %.02129 = phi i32 [ %10, %._crit_edge ], [ 2, %2 ]
  %3 = add nsw i32 %.02129, -1
  %.not2526 = icmp sgt i32 %3, %1
  br i1 %.not2526, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %4 = phi i32 [ %9, %.lr.ph ], [ %3, %.preheader ]
  %5 = phi i32 [ %8, %.lr.ph ], [ %.02129, %.preheader ]
  %.027 = phi i32 [ %5, %.lr.ph ], [ 0, %.preheader ]
  %6 = add nsw i32 %4, %.027
  %7 = sdiv i32 %6, 2
  tail call void @Merge(ptr noundef %0, i32 noundef %.027, i32 noundef %7, i32 noundef %4)
  %8 = add nuw nsw i32 %5, %.02129
  %9 = add nsw i32 %8, -1
  %.not25 = icmp sgt i32 %9, %1
  br i1 %.not25, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %10 = shl nsw i32 %.02129, 1
  %.not = icmp sgt i32 %10, %1
  br i1 %.not, label %._crit_edge30.loopexit, label %.preheader, !llvm.loop !7

._crit_edge30.loopexit:                           ; preds = %._crit_edge
  %11 = and i32 %.02129, 2147483646
  br label %._crit_edge30

._crit_edge30:                                    ; preds = %._crit_edge30.loopexit, %2
  %.021.lcssa = phi i32 [ 1, %2 ], [ %11, %._crit_edge30.loopexit ]
  %12 = icmp slt i32 %.021.lcssa, %1
  br i1 %12, label %13, label %15

13:                                               ; preds = %._crit_edge30
  %14 = add nsw i32 %.021.lcssa, -1
  tail call void @Merge(ptr noundef %0, i32 noundef 0, i32 noundef %14, i32 noundef %1)
  br label %15

15:                                               ; preds = %13, %._crit_edge30
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass