; LLVM IR from xirc/cp-algorithm :: atcoder/abc050/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }

@N = external dso_local global i32, align 4
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solvev() #0 {
  %1 = alloca i64, align 8
  %2 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %3 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) @A) #4
  %10 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %2, i32 0, i32 0
  store ptr %9, ptr %10, align 8
  %11 = call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) @A) #4
  %12 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %3, i32 0, i32 0
  store ptr %11, ptr %12, align 8
  %13 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %2, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8
  %15 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %3, i32 0, i32 0
  %16 = load ptr, ptr %15, align 8
  call void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr %14, ptr %16)
  %17 = load i32, ptr @N, align 4, !tbaa !5
  %18 = srem i32 %17, 2
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %25

20:                                               ; preds = %0
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #4
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %20
  store i64 0, ptr %1, align 8
  br label %92

25:                                               ; preds = %20, %0
  %26 = load i32, ptr @N, align 4, !tbaa !5
  %27 = srem i32 %26, 2
  %28 = icmp eq i32 %27, 1
  br i1 %28, label %29, label %34

29:                                               ; preds = %25
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #4
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %29
  store i64 0, ptr %1, align 8
  br label %92

34:                                               ; preds = %29, %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %35 = load i32, ptr @N, align 4, !tbaa !5
  %36 = srem i32 %35, 2
  store i32 %36, ptr %4, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %70, %34
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = load i32, ptr @N, align 4, !tbaa !5
  %40 = icmp slt i32 %38, %39
  br i1 %40, label %42, label %41

41:                                               ; preds = %37
  store i32 2, ptr %5, align 4
  br label %73

42:                                               ; preds = %37
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = icmp sgt i32 %43, 0
  br i1 %44, label %45, label %57

45:                                               ; preds = %42
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %47) #4
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = sub nsw i32 %50, 1
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %52) #4
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = icmp eq i32 %49, %54
  br i1 %55, label %56, label %57

56:                                               ; preds = %45
  store i64 0, ptr %1, align 8
  store i32 1, ptr %5, align 4
  br label %73

57:                                               ; preds = %45, %42
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %59) #4
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = load i32, ptr %4, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %64) #4
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = icmp ne i32 %61, %66
  br i1 %67, label %68, label %69

68:                                               ; preds = %57
  store i64 0, ptr %1, align 8
  store i32 1, ptr %5, align 4
  br label %73

69:                                               ; preds = %57
  br label %70

70:                                               ; preds = %69
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = add nsw i32 %71, 2
  store i32 %72, ptr %4, align 4, !tbaa !5
  br label %37, !llvm.loop !9

73:                                               ; preds = %68, %56, %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %74 = load i32, ptr %5, align 4
  switch i32 %74, label %94 [
    i32 2, label %75
    i32 1, label %92
  ]

75:                                               ; preds = %73
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %76 = load i32, ptr @N, align 4, !tbaa !5
  %77 = sdiv i32 %76, 2
  store i32 %77, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 1, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %87, %75
  %79 = load i32, ptr %8, align 4, !tbaa !5
  %80 = load i32, ptr %6, align 4, !tbaa !5
  %81 = icmp slt i32 %79, %80
  br i1 %81, label %83, label %82

82:                                               ; preds = %78
  store i32 5, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %90

83:                                               ; preds = %78
  %84 = load i64, ptr %7, align 8, !tbaa !11
  %85 = mul nsw i64 %84, 2
  %86 = srem i64 %85, 1000000007
  store i64 %86, ptr %7, align 8, !tbaa !11
  br label %87

87:                                               ; preds = %83
  %88 = load i32, ptr %8, align 4, !tbaa !5
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %8, align 4, !tbaa !5
  br label %78, !llvm.loop !13

90:                                               ; preds = %82
  %91 = load i64, ptr %7, align 8, !tbaa !11
  store i64 %91, ptr %1, align 8
  store i32 1, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %92

92:                                               ; preds = %90, %73, %33, %24
  %93 = load i64, ptr %1, align 8
  ret i64 %93

94:                                               ; preds = %73
  unreachable
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr, ptr) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solvev() local_unnamed_addr #0 {
  %1 = tail call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) @A) #3
  %2 = tail call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) @A) #3
  tail call void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr %1, ptr %2)
  %3 = load i32, ptr @N, align 4, !tbaa !5
  %4 = and i32 %3, 1
  %5 = icmp eq i32 %4, 0
  br i1 %5, label %6, label %10

6:                                                ; preds = %0
  %7 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #3
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %.thread, label %._crit_edge31

._crit_edge31:                                    ; preds = %6
  %.pre = load i32, ptr @N, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %._crit_edge31, %0
  %11 = phi i32 [ %.pre, %._crit_edge31 ], [ %3, %0 ]
  %12 = and i32 %11, -2147483647
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %14, label %17

14:                                               ; preds = %10
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #3
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %.not = icmp eq i32 %16, 0
  br i1 %.not, label %._crit_edge32, label %.thread

._crit_edge32:                                    ; preds = %14
  %.pre33 = load i32, ptr @N, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %._crit_edge32, %10
  %18 = phi i32 [ %.pre33, %._crit_edge32 ], [ %11, %10 ]
  %19 = srem i32 %18, 2
  %20 = icmp slt i32 %19, %18
  br i1 %20, label %.lr.ph.preheader, label %.thread

.lr.ph.preheader:                                 ; preds = %17
  %21 = sext i32 %19 to i64
  br label %.lr.ph

22:                                               ; preds = %34
  %indvars.iv.next = add nsw i64 %indvars.iv, 2
  %23 = load i32, ptr @N, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = icmp slt i64 %indvars.iv.next, %24
  br i1 %25, label %.lr.ph, label %._crit_edge, !llvm.loop !9

.lr.ph:                                           ; preds = %.lr.ph.preheader, %22
  %indvars.iv = phi i64 [ %21, %.lr.ph.preheader ], [ %indvars.iv.next, %22 ]
  %26 = icmp sgt i64 %indvars.iv, 0
  br i1 %26, label %27, label %34

27:                                               ; preds = %.lr.ph
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv) #3
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = add nsw i64 %indvars.iv, -1
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %30) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp eq i32 %29, %32
  br i1 %33, label %.thread, label %34

34:                                               ; preds = %27, %.lr.ph
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv) #3
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = add nsw i64 %indvars.iv, 1
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %37) #3
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %.not19 = icmp eq i32 %36, %39
  br i1 %.not19, label %22, label %.thread

._crit_edge:                                      ; preds = %22
  %40 = sdiv i32 %23, 2
  %41 = icmp sgt i32 %23, 1
  br i1 %41, label %.lr.ph28.preheader, label %.thread

.lr.ph28.preheader:                               ; preds = %._crit_edge
  %42 = add nsw i32 %40, -1
  %xtraiter = and i32 %40, 3
  %43 = icmp ult i32 %42, 3
  br i1 %43, label %.thread.loopexit.unr-lcssa, label %.lr.ph28.preheader.new

.lr.ph28.preheader.new:                           ; preds = %.lr.ph28.preheader
  %unroll_iter = and i32 %40, 1073741820
  br label %.lr.ph28

.lr.ph28:                                         ; preds = %.lr.ph28, %.lr.ph28.preheader.new
  %.01525 = phi i64 [ 1, %.lr.ph28.preheader.new ], [ %51, %.lr.ph28 ]
  %niter = phi i32 [ 0, %.lr.ph28.preheader.new ], [ %niter.next.3, %.lr.ph28 ]
  %44 = shl nsw i64 %.01525, 1
  %45 = srem i64 %44, 1000000007
  %46 = shl nsw i64 %45, 1
  %47 = srem i64 %46, 1000000007
  %48 = shl nsw i64 %47, 1
  %49 = srem i64 %48, 1000000007
  %50 = shl nsw i64 %49, 1
  %51 = srem i64 %50, 1000000007
  %niter.next.3 = add i32 %niter, 4
  %niter.ncmp.3 = icmp eq i32 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %.thread.loopexit.unr-lcssa, label %.lr.ph28, !llvm.loop !11

.thread.loopexit.unr-lcssa:                       ; preds = %.lr.ph28, %.lr.ph28.preheader
  %.lcssa.ph = phi i64 [ poison, %.lr.ph28.preheader ], [ %51, %.lr.ph28 ]
  %.01525.unr = phi i64 [ 1, %.lr.ph28.preheader ], [ %51, %.lr.ph28 ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.thread, label %.lr.ph28.epil

.lr.ph28.epil:                                    ; preds = %.thread.loopexit.unr-lcssa, %.lr.ph28.epil
  %.01525.epil = phi i64 [ %53, %.lr.ph28.epil ], [ %.01525.unr, %.thread.loopexit.unr-lcssa ]
  %epil.iter = phi i32 [ %epil.iter.next, %.lr.ph28.epil ], [ 0, %.thread.loopexit.unr-lcssa ]
  %52 = shl nsw i64 %.01525.epil, 1
  %53 = srem i64 %52, 1000000007
  %epil.iter.next = add i32 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i32 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %.thread, label %.lr.ph28.epil, !llvm.loop !12

.thread:                                          ; preds = %34, %27, %.thread.loopexit.unr-lcssa, %.lr.ph28.epil, %17, %._crit_edge, %14, %6
  %.1 = phi i64 [ 0, %6 ], [ 0, %14 ], [ 1, %._crit_edge ], [ 1, %17 ], [ %.lcssa.ph, %.thread.loopexit.unr-lcssa ], [ %53, %.lr.ph28.epil ], [ 0, %27 ], [ 0, %34 ]
  ret i64 %.1
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr, ptr) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass