; LLVM IR from HarshCasper/NeoAlgo :: C-Plus-Plus/graphs (Connecting_Dots-Graphs_using_cpp)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@move1 = external dso_local global [4 x [2 x i32]], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isvalidiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z7connectRSt6vectorIS_IcSaIcEESaIS1_EEiiPPbiiiici(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i8 noundef signext %8, i32 noundef %9) #1 {
  %11 = alloca i1, align 1
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i8, align 1
  %21 = alloca i32, align 4
  %22 = alloca i8, align 1
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  store ptr %0, ptr %12, align 8, !tbaa !5
  store i32 %1, ptr %13, align 4, !tbaa !9
  store i32 %2, ptr %14, align 4, !tbaa !9
  store ptr %3, ptr %15, align 8, !tbaa !5
  store i32 %4, ptr %16, align 4, !tbaa !9
  store i32 %5, ptr %17, align 4, !tbaa !9
  store i32 %6, ptr %18, align 4, !tbaa !9
  store i32 %7, ptr %19, align 4, !tbaa !9
  store i8 %8, ptr %20, align 1, !tbaa !11
  store i32 %9, ptr %21, align 4, !tbaa !9
  %26 = load i32, ptr %21, align 4, !tbaa !9
  %27 = icmp sge i32 %26, 4
  br i1 %27, label %28, label %37

28:                                               ; preds = %10
  %29 = load i32, ptr %16, align 4, !tbaa !9
  %30 = load i32, ptr %18, align 4, !tbaa !9
  %31 = icmp eq i32 %29, %30
  br i1 %31, label %32, label %37

32:                                               ; preds = %28
  %33 = load i32, ptr %17, align 4, !tbaa !9
  %34 = load i32, ptr %19, align 4, !tbaa !9
  %35 = icmp eq i32 %33, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %32
  store i1 true, ptr %11, align 1
  br label %130

37:                                               ; preds = %32, %28, %10
  %38 = load i32, ptr %16, align 4, !tbaa !9
  %39 = load i32, ptr %17, align 4, !tbaa !9
  %40 = load i32, ptr %13, align 4, !tbaa !9
  %41 = load i32, ptr %14, align 4, !tbaa !9
  %42 = call noundef zeroext i1 @_Z7isvalidiiii(i32 noundef %38, i32 noundef %39, i32 noundef %40, i32 noundef %41)
  br i1 %42, label %43, label %69

43:                                               ; preds = %37
  %44 = load ptr, ptr %12, align 8, !tbaa !5
  %45 = load i32, ptr %16, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %46) #3
  %48 = load i32, ptr %17, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %49) #3
  %51 = load i8, ptr %50, align 1, !tbaa !11
  %52 = sext i8 %51 to i32
  %53 = load i8, ptr %20, align 1, !tbaa !11
  %54 = sext i8 %53 to i32
  %55 = icmp ne i32 %52, %54
  br i1 %55, label %69, label %56

56:                                               ; preds = %43
  %57 = load ptr, ptr %15, align 8, !tbaa !5
  %58 = load i32, ptr %16, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds ptr, ptr %57, i64 %59
  %61 = load ptr, ptr %60, align 8, !tbaa !5
  %62 = load i32, ptr %17, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds i8, ptr %61, i64 %63
  %65 = load i8, ptr %64, align 1, !tbaa !12, !range !14, !noundef !15
  %66 = trunc i8 %65 to i1
  %67 = zext i1 %66 to i32
  %68 = icmp eq i32 %67, 1
  br i1 %68, label %69, label %70

69:                                               ; preds = %56, %43, %37
  store i1 false, ptr %11, align 1
  br label %130

70:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 1, ptr %22) #3
  store i8 0, ptr %22, align 1, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  store i32 0, ptr %23, align 4, !tbaa !9
  br label %71

71:                                               ; preds = %124, %70
  %72 = load i32, ptr %23, align 4, !tbaa !9
  %73 = icmp slt i32 %72, 4
  br i1 %73, label %75, label %74

74:                                               ; preds = %71
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  br label %127

75:                                               ; preds = %71
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  %76 = load i32, ptr %16, align 4, !tbaa !9
  %77 = load i32, ptr %23, align 4, !tbaa !9
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [4 x [2 x i32]], ptr @move1, i64 0, i64 %78
  %80 = getelementptr inbounds [2 x i32], ptr %79, i64 0, i64 0
  %81 = load i32, ptr %80, align 8, !tbaa !9
  %82 = add nsw i32 %76, %81
  store i32 %82, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  %83 = load i32, ptr %17, align 4, !tbaa !9
  %84 = load i32, ptr %23, align 4, !tbaa !9
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [4 x [2 x i32]], ptr @move1, i64 0, i64 %85
  %87 = getelementptr inbounds [2 x i32], ptr %86, i64 0, i64 1
  %88 = load i32, ptr %87, align 4, !tbaa !9
  %89 = add nsw i32 %83, %88
  store i32 %89, ptr %25, align 4, !tbaa !9
  %90 = load ptr, ptr %15, align 8, !tbaa !5
  %91 = load i32, ptr %16, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds ptr, ptr %90, i64 %92
  %94 = load ptr, ptr %93, align 8, !tbaa !5
  %95 = load i32, ptr %17, align 4, !tbaa !9
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds i8, ptr %94, i64 %96
  store i8 1, ptr %97, align 1, !tbaa !12
  %98 = load i8, ptr %22, align 1, !tbaa !12, !range !14, !noundef !15
  %99 = trunc i8 %98 to i1
  br i1 %99, label %113, label %100

100:                                              ; preds = %75
  %101 = load ptr, ptr %12, align 8, !tbaa !5
  %102 = load i32, ptr %13, align 4, !tbaa !9
  %103 = load i32, ptr %14, align 4, !tbaa !9
  %104 = load ptr, ptr %15, align 8, !tbaa !5
  %105 = load i32, ptr %24, align 4, !tbaa !9
  %106 = load i32, ptr %25, align 4, !tbaa !9
  %107 = load i32, ptr %18, align 4, !tbaa !9
  %108 = load i32, ptr %19, align 4, !tbaa !9
  %109 = load i8, ptr %20, align 1, !tbaa !11
  %110 = load i32, ptr %21, align 4, !tbaa !9
  %111 = add nsw i32 %110, 1
  %112 = call noundef zeroext i1 @_Z7connectRSt6vectorIS_IcSaIcEESaIS1_EEiiPPbiiiici(ptr noundef nonnull align 8 dereferenceable(24) %101, i32 noundef %102, i32 noundef %103, ptr noundef %104, i32 noundef %105, i32 noundef %106, i32 noundef %107, i32 noundef %108, i8 noundef signext %109, i32 noundef %111)
  br label %113

113:                                              ; preds = %100, %75
  %114 = phi i1 [ true, %75 ], [ %112, %100 ]
  %115 = zext i1 %114 to i8
  store i8 %115, ptr %22, align 1, !tbaa !12
  %116 = load ptr, ptr %15, align 8, !tbaa !5
  %117 = load i32, ptr %16, align 4, !tbaa !9
  %118 = sext i32 %117 to i64
  %119 = getelementptr inbounds ptr, ptr %116, i64 %118
  %120 = load ptr, ptr %119, align 8, !tbaa !5
  %121 = load i32, ptr %17, align 4, !tbaa !9
  %122 = sext i32 %121 to i64
  %123 = getelementptr inbounds i8, ptr %120, i64 %122
  store i8 0, ptr %123, align 1, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  br label %124

124:                                              ; preds = %113
  %125 = load i32, ptr %23, align 4, !tbaa !9
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %23, align 4, !tbaa !9
  br label %71, !llvm.loop !16

127:                                              ; preds = %74
  %128 = load i8, ptr %22, align 1, !tbaa !12, !range !14, !noundef !15
  %129 = trunc i8 %128 to i1
  store i1 %129, ptr %11, align 1
  call void @llvm.lifetime.end.p0(i64 1, ptr %22) #3
  br label %130

130:                                              ; preds = %127, %69, %36
  %131 = load i1, ptr %11, align 1
  ret i1 %131
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{i8 0, i8 2}
!15 = !{}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@move1 = external dso_local local_unnamed_addr global [4 x [2 x i32]], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z7isvalidiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z7connectRSt6vectorIS_IcSaIcEESaIS1_EEiiPPbiiiici(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i8 noundef signext %8, i32 noundef %9) local_unnamed_addr #0 {
  %11 = icmp sgt i32 %9, 3
  %12 = icmp eq i32 %4, %6
  %or.cond = and i1 %12, %11
  %13 = icmp eq i32 %5, %7
  %or.cond42 = and i1 %13, %or.cond
  br i1 %or.cond42, label %.loopexit, label %14

14:                                               ; preds = %10
  %15 = tail call noundef zeroext i1 @_Z7isvalidiiii(i32 noundef %4, i32 noundef %5, i32 noundef %1, i32 noundef %2)
  br i1 %15, label %16, label %.loopexit

16:                                               ; preds = %14
  %17 = sext i32 %4 to i64
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %17) #1
  %19 = sext i32 %5 to i64
  %20 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %19) #1
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %.not = icmp eq i8 %21, %8
  br i1 %.not, label %22, label %.loopexit

22:                                               ; preds = %16
  %23 = getelementptr inbounds ptr, ptr %3, i64 %17
  %24 = load ptr, ptr %23, align 8, !tbaa !8
  %25 = getelementptr inbounds i8, ptr %24, i64 %19
  %26 = load i8, ptr %25, align 1, !tbaa !10, !range !12, !noundef !13
  %27 = trunc nuw i8 %26 to i1
  br i1 %27, label %.loopexit, label %28

28:                                               ; preds = %22
  %29 = add nsw i32 %9, 1
  %30 = load i32, ptr @move1, align 16, !tbaa !14
  %31 = load i32, ptr getelementptr inbounds (i8, ptr @move1, i64 4), align 4, !tbaa !14
  store i8 1, ptr %25, align 1, !tbaa !10
  %32 = add nsw i32 %31, %5
  %33 = add nsw i32 %30, %4
  %34 = tail call noundef zeroext i1 @_Z7connectRSt6vectorIS_IcSaIcEESaIS1_EEiiPPbiiiici(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3, i32 noundef %33, i32 noundef %32, i32 noundef %6, i32 noundef %7, i8 noundef signext %8, i32 noundef %29)
  %.pre = load ptr, ptr %23, align 8, !tbaa !8
  %35 = getelementptr inbounds i8, ptr %.pre, i64 %19
  %36 = load i32, ptr getelementptr inbounds (i8, ptr @move1, i64 8), align 8, !tbaa !14
  %37 = load i32, ptr getelementptr inbounds (i8, ptr @move1, i64 12), align 4, !tbaa !14
  store i8 1, ptr %35, align 1, !tbaa !10
  br i1 %34, label %.thread, label %39

.thread:                                          ; preds = %28
  %38 = getelementptr inbounds i8, ptr %.pre, i64 %19
  store i8 1, ptr %38, align 1, !tbaa !10
  br label %.thread48

39:                                               ; preds = %28
  %40 = add nsw i32 %37, %5
  %41 = add nsw i32 %36, %4
  %42 = tail call noundef zeroext i1 @_Z7connectRSt6vectorIS_IcSaIcEESaIS1_EEiiPPbiiiici(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3, i32 noundef %41, i32 noundef %40, i32 noundef %6, i32 noundef %7, i8 noundef signext %8, i32 noundef %29)
  %.pre45 = load ptr, ptr %23, align 8, !tbaa !8
  %43 = getelementptr inbounds i8, ptr %.pre45, i64 %19
  %44 = load i32, ptr getelementptr inbounds (i8, ptr @move1, i64 16), align 16, !tbaa !14
  %45 = load i32, ptr getelementptr inbounds (i8, ptr @move1, i64 20), align 4, !tbaa !14
  store i8 1, ptr %43, align 1, !tbaa !10
  br i1 %42, label %.thread48, label %47

.thread48:                                        ; preds = %39, %.thread
  %.ph = phi ptr [ %.pre, %.thread ], [ %.pre45, %39 ]
  %46 = getelementptr inbounds i8, ptr %.ph, i64 %19
  store i8 1, ptr %46, align 1, !tbaa !10
  br label %.loopexit.loopexit

47:                                               ; preds = %39
  %48 = add nsw i32 %45, %5
  %49 = add nsw i32 %44, %4
  %50 = tail call noundef zeroext i1 @_Z7connectRSt6vectorIS_IcSaIcEESaIS1_EEiiPPbiiiici(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3, i32 noundef %49, i32 noundef %48, i32 noundef %6, i32 noundef %7, i8 noundef signext %8, i32 noundef %29)
  %.pre46 = load ptr, ptr %23, align 8, !tbaa !8
  %51 = getelementptr inbounds i8, ptr %.pre46, i64 %19
  %52 = load i32, ptr getelementptr inbounds (i8, ptr @move1, i64 24), align 8, !tbaa !14
  %53 = load i32, ptr getelementptr inbounds (i8, ptr @move1, i64 28), align 4, !tbaa !14
  store i8 1, ptr %51, align 1, !tbaa !10
  br i1 %50, label %.loopexit.loopexit, label %54

54:                                               ; preds = %47
  %55 = add nsw i32 %53, %5
  %56 = add nsw i32 %52, %4
  %57 = tail call noundef zeroext i1 @_Z7connectRSt6vectorIS_IcSaIcEESaIS1_EEiiPPbiiiici(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull %3, i32 noundef %56, i32 noundef %55, i32 noundef %6, i32 noundef %7, i8 noundef signext %8, i32 noundef %29)
  %.pre47 = load ptr, ptr %23, align 8, !tbaa !8
  br label %.loopexit.loopexit

.loopexit.loopexit:                               ; preds = %.thread48, %54, %47
  %58 = phi ptr [ %.pre46, %47 ], [ %.pre47, %54 ], [ %.ph, %.thread48 ]
  %59 = phi i1 [ true, %47 ], [ %57, %54 ], [ true, %.thread48 ]
  %60 = getelementptr inbounds i8, ptr %58, i64 %19
  store i8 0, ptr %60, align 1, !tbaa !10
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %14, %16, %22, %10
  %.0 = phi i1 [ true, %10 ], [ false, %22 ], [ false, %16 ], [ false, %14 ], [ %59, %.loopexit.loopexit ]
  ret i1 %.0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !6, i64 0}
!12 = !{i8 0, i8 2}
!13 = !{}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !6, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass