; LLVM IR from Stephane-D/SGDK :: src (tools)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TileMap = type { i16, i16, i16, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @MEM_alloc(i16 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @allocateTileMapEx(i16 noundef zeroext %0, i16 noundef zeroext %1) #2 {
  %3 = alloca i16, align 2
  %4 = alloca i16, align 2
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store i16 %0, ptr %3, align 2, !tbaa !5
  store i16 %1, ptr %4, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %7 = load i16, ptr %3, align 2, !tbaa !5
  %8 = zext i16 %7 to i32
  %9 = load i16, ptr %4, align 2, !tbaa !5
  %10 = zext i16 %9 to i32
  %11 = mul nsw i32 %8, %10
  %12 = mul nsw i32 %11, 2
  %13 = sext i32 %12 to i64
  %14 = add i64 %13, 16
  %15 = trunc i64 %14 to i16
  %16 = call ptr @MEM_alloc(i16 noundef zeroext %15)
  store ptr %16, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %17 = load ptr, ptr %5, align 8, !tbaa !9
  store ptr %17, ptr %6, align 8, !tbaa !9
  %18 = load ptr, ptr %6, align 8, !tbaa !9
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %33

20:                                               ; preds = %2
  %21 = load ptr, ptr %6, align 8, !tbaa !9
  %22 = getelementptr inbounds %struct.TileMap, ptr %21, i32 0, i32 0
  store i16 0, ptr %22, align 8, !tbaa !11
  %23 = load ptr, ptr %5, align 8, !tbaa !9
  %24 = getelementptr inbounds i8, ptr %23, i64 16
  %25 = load ptr, ptr %6, align 8, !tbaa !9
  %26 = getelementptr inbounds %struct.TileMap, ptr %25, i32 0, i32 3
  store ptr %24, ptr %26, align 8, !tbaa !13
  %27 = load i16, ptr %3, align 2, !tbaa !5
  %28 = load ptr, ptr %6, align 8, !tbaa !9
  %29 = getelementptr inbounds %struct.TileMap, ptr %28, i32 0, i32 1
  store i16 %27, ptr %29, align 2, !tbaa !14
  %30 = load i16, ptr %4, align 2, !tbaa !5
  %31 = load ptr, ptr %6, align 8, !tbaa !9
  %32 = getelementptr inbounds %struct.TileMap, ptr %31, i32 0, i32 2
  store i16 %30, ptr %32, align 4, !tbaa !15
  br label %33

33:                                               ; preds = %20, %2
  %34 = load ptr, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret ptr %34
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !6, i64 2, !6, i64 4, !10, i64 8}
!13 = !{!12, !10, i64 8}
!14 = !{!12, !6, i64 2}
!15 = !{!12, !6, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare ptr @MEM_alloc(i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local ptr @allocateTileMapEx(i16 noundef zeroext %0, i16 noundef zeroext %1) local_unnamed_addr #1 {
  %3 = shl i16 %0, 1
  %4 = mul i16 %3, %1
  %5 = add i16 %4, 16
  %6 = tail call ptr @MEM_alloc(i16 noundef zeroext %5) #2
  %.not = icmp eq ptr %6, null
  br i1 %.not, label %12, label %7

7:                                                ; preds = %2
  store i16 0, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %6, i64 16
  %9 = getelementptr inbounds i8, ptr %6, i64 8
  store ptr %8, ptr %9, align 8, !tbaa !11
  %10 = getelementptr inbounds i8, ptr %6, i64 2
  store i16 %0, ptr %10, align 2, !tbaa !12
  %11 = getelementptr inbounds i8, ptr %6, i64 4
  store i16 %1, ptr %11, align 4, !tbaa !13
  br label %12

12:                                               ; preds = %7, %2
  ret ptr %6
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 2, !7, i64 4, !10, i64 8}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 2}
!13 = !{!6, !7, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,TailCallElimPass