; LLVM IR from HarshCasper/NeoAlgo :: C-Plus-Plus/cp/Peak_element.ll (Z14find_peak_iterSt6vectorIiSaIiEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z14find_peak_iterSt6vectorIiSaIiEE(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %9 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %10 = trunc i64 %9 to i32
  store i32 %10, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %11 = load i32, ptr %5, align 4, !tbaa !9
  %12 = sub nsw i32 %11, 1
  store i32 %12, ptr %6, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %127, %1
  %14 = load i32, ptr %4, align 4, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = icmp sle i32 %14, %15
  br i1 %16, label %17, label %128

17:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %18 = load i32, ptr %4, align 4, !tbaa !9
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = load i32, ptr %4, align 4, !tbaa !9
  %21 = sub nsw i32 %19, %20
  %22 = sdiv i32 %21, 2
  %23 = add nsw i32 %18, %22
  store i32 %23, ptr %7, align 4, !tbaa !9
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = sub nsw i32 %24, 1
  %26 = icmp sge i32 %25, 0
  br i1 %26, label %27, label %78

27:                                               ; preds = %17
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = add nsw i32 %28, 1
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = icmp slt i32 %29, %30
  br i1 %31, label %32, label %78

32:                                               ; preds = %27
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %34) #2
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = sub nsw i32 %37, 1
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %39) #2
  %41 = load i32, ptr %40, align 4, !tbaa !9
  %42 = icmp sgt i32 %36, %41
  br i1 %42, label %43, label %59

43:                                               ; preds = %32
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !9
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = add nsw i32 %48, 1
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %50) #2
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = icmp sgt i32 %47, %52
  br i1 %53, label %54, label %59

54:                                               ; preds = %43
  %55 = load i32, ptr %7, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %56) #2
  %58 = load i32, ptr %57, align 4, !tbaa !9
  store i32 %58, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %125

59:                                               ; preds = %43, %32
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %61) #2
  %63 = load i32, ptr %62, align 4, !tbaa !9
  %64 = load i32, ptr %7, align 4, !tbaa !9
  %65 = sub nsw i32 %64, 1
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %66) #2
  %68 = load i32, ptr %67, align 4, !tbaa !9
  %69 = icmp slt i32 %63, %68
  br i1 %69, label %70, label %73

70:                                               ; preds = %59
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = sub nsw i32 %71, 1
  store i32 %72, ptr %6, align 4, !tbaa !9
  br label %76

73:                                               ; preds = %59
  %74 = load i32, ptr %7, align 4, !tbaa !9
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %4, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %73, %70
  br label %77

77:                                               ; preds = %76
  br label %124

78:                                               ; preds = %27, %17
  %79 = load i32, ptr %7, align 4, !tbaa !9
  %80 = icmp eq i32 %79, 0
  br i1 %80, label %81, label %93

81:                                               ; preds = %78
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #2
  %83 = load i32, ptr %82, align 4, !tbaa !9
  %84 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #2
  %85 = load i32, ptr %84, align 4, !tbaa !9
  %86 = icmp sgt i32 %83, %85
  br i1 %86, label %87, label %90

87:                                               ; preds = %81
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #2
  %89 = load i32, ptr %88, align 4, !tbaa !9
  store i32 %89, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %125

90:                                               ; preds = %81
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #2
  %92 = load i32, ptr %91, align 4, !tbaa !9
  store i32 %92, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %125

93:                                               ; preds = %78
  %94 = load i32, ptr %7, align 4, !tbaa !9
  %95 = load i32, ptr %5, align 4, !tbaa !9
  %96 = sub nsw i32 %95, 1
  %97 = icmp eq i32 %94, %96
  br i1 %97, label %98, label %122

98:                                               ; preds = %93
  %99 = load i32, ptr %5, align 4, !tbaa !9
  %100 = sub nsw i32 %99, 1
  %101 = sext i32 %100 to i64
  %102 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %101) #2
  %103 = load i32, ptr %102, align 4, !tbaa !9
  %104 = load i32, ptr %5, align 4, !tbaa !9
  %105 = sub nsw i32 %104, 2
  %106 = sext i32 %105 to i64
  %107 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %106) #2
  %108 = load i32, ptr %107, align 4, !tbaa !9
  %109 = icmp sgt i32 %103, %108
  br i1 %109, label %110, label %116

110:                                              ; preds = %98
  %111 = load i32, ptr %5, align 4, !tbaa !9
  %112 = sub nsw i32 %111, 1
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %113) #2
  %115 = load i32, ptr %114, align 4, !tbaa !9
  store i32 %115, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %125

116:                                              ; preds = %98
  %117 = load i32, ptr %5, align 4, !tbaa !9
  %118 = sub nsw i32 %117, 2
  %119 = sext i32 %118 to i64
  %120 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %119) #2
  %121 = load i32, ptr %120, align 4, !tbaa !9
  store i32 %121, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %125

122:                                              ; preds = %93
  br label %123

123:                                              ; preds = %122
  br label %124

124:                                              ; preds = %123, %77
  store i32 0, ptr %8, align 4
  br label %125

125:                                              ; preds = %124, %116, %110, %90, %87, %54
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  %126 = load i32, ptr %8, align 4
  switch i32 %126, label %129 [
    i32 0, label %127
  ]

127:                                              ; preds = %125
  br label %13, !llvm.loop !11

128:                                              ; preds = %13
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %129

129:                                              ; preds = %128, %125
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %130 = load i32, ptr %2, align 4
  ret i32 %130
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z14find_peak_iterSt6vectorIiSaIiEE(ptr noundef nonnull %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %3 = trunc i64 %2 to i32
  %4 = add nsw i32 %3, -1
  %.not43 = icmp slt i32 %3, 1
  br i1 %.not43, label %.thread38, label %.lr.ph

.lr.ph:                                           ; preds = %1, %52
  %.02845 = phi i32 [ %.230, %52 ], [ %4, %1 ]
  %.03144 = phi i32 [ %.233, %52 ], [ 0, %1 ]
  %5 = sub nsw i32 %.02845, %.03144
  %6 = sdiv i32 %5, 2
  %7 = add nsw i32 %6, %.03144
  %8 = add nsw i32 %7, -1
  %9 = icmp sgt i32 %7, 0
  br i1 %9, label %10, label %34

10:                                               ; preds = %.lr.ph
  %11 = add nuw nsw i32 %7, 1
  %12 = icmp slt i32 %11, %3
  br i1 %12, label %13, label %.thread

13:                                               ; preds = %10
  %14 = zext nneg i32 %7 to i64
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #1
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = zext nneg i32 %8 to i64
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %17) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = icmp sgt i32 %16, %19
  br i1 %20, label %21, label %28

21:                                               ; preds = %13
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = zext nneg i32 %11 to i64
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %24) #1
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = icmp sgt i32 %23, %26
  br i1 %27, label %.thread38.sink.split, label %28

28:                                               ; preds = %21, %13
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #1
  %30 = load i32, ptr %29, align 4, !tbaa !5
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %17) #1
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp slt i32 %30, %32
  %.031. = select i1 %33, i32 %.03144, i32 %11
  %..028 = select i1 %33, i32 %8, i32 %.02845
  br label %52

34:                                               ; preds = %.lr.ph
  %35 = icmp eq i32 %7, 0
  br i1 %35, label %36, label %.thread

36:                                               ; preds = %34
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #1
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = icmp sle i32 %38, %40
  %. = zext i1 %41 to i64
  br label %.thread38.sink.split

.thread:                                          ; preds = %10, %34
  %42 = icmp eq i32 %7, %4
  br i1 %42, label %43, label %52

43:                                               ; preds = %.thread
  %44 = sext i32 %4 to i64
  %45 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %44) #1
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = shl i64 %2, 32
  %sext = add nsw i64 %47, -8589934592
  %48 = ashr exact i64 %sext, 32
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %48) #1
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = icmp sgt i32 %46, %50
  %.47 = select i1 %51, i64 %44, i64 %48
  br label %.thread38.sink.split

52:                                               ; preds = %.thread, %28
  %.233 = phi i32 [ %.03144, %.thread ], [ %.031., %28 ]
  %.230 = phi i32 [ %.02845, %.thread ], [ %..028, %28 ]
  %.not = icmp sgt i32 %.233, %.230
  br i1 %.not, label %.thread38, label %.lr.ph, !llvm.loop !9

.thread38.sink.split:                             ; preds = %21, %43, %36
  %.sink46 = phi i64 [ %., %36 ], [ %.47, %43 ], [ %14, %21 ]
  %53 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.sink46) #1
  %54 = load i32, ptr %53, align 4, !tbaa !5
  br label %.thread38

.thread38:                                        ; preds = %52, %.thread38.sink.split, %1
  %.2 = phi i32 [ -1, %1 ], [ %54, %.thread38.sink.split ], [ -1, %52 ]
  ret i32 %.2
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass