; LLVM IR from afrozchakure/Competitive-Programming-Solutions :: Codewars/MultiplesOf3Or5.ll (Z8solutioni)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8solutioni(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %42, %1
  %6 = load i32, ptr %4, align 4, !tbaa !5
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = sdiv i32 %7, 3
  %9 = icmp sle i32 %6, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %45

11:                                               ; preds = %5
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = mul nsw i32 3, %12
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %16, label %21

16:                                               ; preds = %11
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = mul nsw i32 3, %17
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = add nsw i32 %19, %18
  store i32 %20, ptr %3, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %16, %11
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = mul nsw i32 5, %22
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %26, label %31

26:                                               ; preds = %21
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = mul nsw i32 5, %27
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = add nsw i32 %29, %28
  store i32 %30, ptr %3, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %26, %21
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = mul nsw i32 15, %32
  %34 = load i32, ptr %2, align 4, !tbaa !5
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %36, label %41

36:                                               ; preds = %31
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = mul nsw i32 15, %37
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = sub nsw i32 %39, %38
  store i32 %40, ptr %3, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %36, %31
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %4, align 4, !tbaa !5
  br label %5, !llvm.loop !9

45:                                               ; preds = %10
  %46 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %46
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @_Z8solutioni(i32 noundef %0) local_unnamed_addr #0 {
  %.not20 = icmp slt i32 %0, 3
  br i1 %.not20, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %1
  %2 = udiv i32 %0, 3
  %min.iters.check = icmp ult i32 %0, 24
  br i1 %min.iters.check, label %.lr.ph.preheader25, label %vector.ph

.lr.ph.preheader25:                               ; preds = %middle.block, %.lr.ph.preheader
  %.022.ph = phi i32 [ 1, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  %.01621.ph = phi i32 [ 0, %.lr.ph.preheader ], [ %28, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i32 %2, 1073741816
  %ind.end = or disjoint i32 %n.vec, 1
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.ind = phi <4 x i32> [ <i32 1, i32 2, i32 3, i32 4>, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %25, %vector.body ]
  %vec.phi24 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %26, %vector.body ]
  %step.add = add <4 x i32> %vec.ind, <i32 4, i32 4, i32 4, i32 4>
  %3 = mul nuw nsw <4 x i32> %vec.ind, <i32 3, i32 3, i32 3, i32 3>
  %4 = mul nuw nsw <4 x i32> %step.add, <i32 3, i32 3, i32 3, i32 3>
  %5 = icmp slt <4 x i32> %3, %broadcast.splat
  %6 = icmp slt <4 x i32> %4, %broadcast.splat
  %7 = select <4 x i1> %5, <4 x i32> %3, <4 x i32> zeroinitializer
  %8 = select <4 x i1> %6, <4 x i32> %4, <4 x i32> zeroinitializer
  %9 = add <4 x i32> %7, %vec.phi
  %10 = add <4 x i32> %8, %vec.phi24
  %11 = mul nuw nsw <4 x i32> %vec.ind, <i32 5, i32 5, i32 5, i32 5>
  %12 = mul nuw nsw <4 x i32> %step.add, <i32 5, i32 5, i32 5, i32 5>
  %13 = icmp slt <4 x i32> %11, %broadcast.splat
  %14 = icmp slt <4 x i32> %12, %broadcast.splat
  %15 = select <4 x i1> %13, <4 x i32> %11, <4 x i32> zeroinitializer
  %16 = select <4 x i1> %14, <4 x i32> %12, <4 x i32> zeroinitializer
  %17 = add <4 x i32> %9, %15
  %18 = add <4 x i32> %10, %16
  %19 = mul nuw nsw <4 x i32> %vec.ind, <i32 15, i32 15, i32 15, i32 15>
  %20 = mul nuw nsw <4 x i32> %step.add, <i32 15, i32 15, i32 15, i32 15>
  %21 = icmp slt <4 x i32> %19, %broadcast.splat
  %22 = icmp slt <4 x i32> %20, %broadcast.splat
  %23 = select <4 x i1> %21, <4 x i32> %19, <4 x i32> zeroinitializer
  %24 = select <4 x i1> %22, <4 x i32> %20, <4 x i32> zeroinitializer
  %25 = sub <4 x i32> %17, %23
  %26 = sub <4 x i32> %18, %24
  %index.next = add nuw i32 %index, 8
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 8, i32 8, i32 8, i32 8>
  %27 = icmp eq i32 %index.next, %n.vec
  br i1 %27, label %middle.block, label %vector.body, !llvm.loop !5

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %26, %25
  %28 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %2, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader25

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %1
  %.016.lcssa = phi i32 [ 0, %1 ], [ %28, %middle.block ], [ %.3, %.lr.ph ]
  ret i32 %.016.lcssa

.lr.ph:                                           ; preds = %.lr.ph.preheader25, %.lr.ph
  %.022 = phi i32 [ %38, %.lr.ph ], [ %.022.ph, %.lr.ph.preheader25 ]
  %.01621 = phi i32 [ %.3, %.lr.ph ], [ %.01621.ph, %.lr.ph.preheader25 ]
  %29 = mul nuw nsw i32 %.022, 3
  %30 = icmp slt i32 %29, %0
  %31 = select i1 %30, i32 %29, i32 0
  %spec.select = add nsw i32 %31, %.01621
  %32 = mul nuw nsw i32 %.022, 5
  %33 = icmp slt i32 %32, %0
  %34 = select i1 %33, i32 %32, i32 0
  %.2 = add nsw i32 %spec.select, %34
  %35 = mul nuw nsw i32 %.022, 15
  %36 = icmp slt i32 %35, %0
  %37 = select i1 %36, i32 %35, i32 0
  %.3 = sub i32 %.2, %37
  %38 = add nuw nsw i32 %.022, 1
  %exitcond.not = icmp eq i32 %.022, %2
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7, !8}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!"llvm.loop.isvectorized", i32 1}
!8 = !{!"llvm.loop.unroll.runtime.disable"}
!9 = distinct !{!9, !6, !8, !7}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass