; LLVM IR from xirc/cp-algorithm :: atcoder/abc089/D/main.ll (Z5buildv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@H = external dso_local global i32, align 4
@W = external dso_local global i32, align 4
@D = external dso_local global i32, align 4
@A = external dso_local global %"class.std::vector", align 8
@xs = external dso_local global %"class.std::vector.0", align 8
@ys = external dso_local global %"class.std::vector.0", align 8
@DP = external dso_local global %"class.std::vector.5", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = load i32, ptr @H, align 4, !tbaa !5
  %15 = load i32, ptr @W, align 4, !tbaa !5
  %16 = mul nsw i32 %14, %15
  %17 = sext i32 %16 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %17, ptr noundef nonnull align 4 dereferenceable(4) %1)
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  %18 = load i32, ptr @H, align 4, !tbaa !5
  %19 = load i32, ptr @W, align 4, !tbaa !5
  %20 = mul nsw i32 %18, %19
  %21 = sext i32 %20 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %21, ptr noundef nonnull align 4 dereferenceable(4) %2)
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  %22 = load i32, ptr @H, align 4, !tbaa !5
  %23 = load i32, ptr @W, align 4, !tbaa !5
  %24 = mul nsw i32 %22, %23
  %25 = sext i32 %24 to i64
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  store i64 0, ptr %3, align 8, !tbaa !9
  call void @_ZNSt6vectorIxSaIxEE6assignEmRKx(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %25, ptr noundef nonnull align 8 dereferenceable(8) %3)
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %57, %0
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = load i32, ptr @H, align 4, !tbaa !5
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 2, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %60

31:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %53, %31
  %33 = load i32, ptr %6, align 4, !tbaa !5
  %34 = load i32, ptr @W, align 4, !tbaa !5
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  store i32 5, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %56

37:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %39) #4
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #4
  %44 = load i32, ptr %43, align 4, !tbaa !5
  store i32 %44, ptr %7, align 4, !tbaa !5
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %47) #4
  store i32 %45, ptr %48, align 4, !tbaa !5
  %49 = load i32, ptr %4, align 4, !tbaa !5
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %51) #4
  store i32 %49, ptr %52, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %53

53:                                               ; preds = %37
  %54 = load i32, ptr %6, align 4, !tbaa !5
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %6, align 4, !tbaa !5
  br label %32, !llvm.loop !11

56:                                               ; preds = %36
  br label %57

57:                                               ; preds = %56
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %4, align 4, !tbaa !5
  br label %26, !llvm.loop !13

60:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %117, %60
  %62 = load i32, ptr %8, align 4, !tbaa !5
  %63 = load i32, ptr @H, align 4, !tbaa !5
  %64 = load i32, ptr @W, align 4, !tbaa !5
  %65 = mul nsw i32 %63, %64
  %66 = icmp slt i32 %62, %65
  br i1 %66, label %68, label %67

67:                                               ; preds = %61
  store i32 8, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %120

68:                                               ; preds = %61
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %70) #4
  %72 = load i32, ptr %71, align 4, !tbaa !5
  store i32 %72, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %73 = load i32, ptr %8, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %74) #4
  %76 = load i32, ptr %75, align 4, !tbaa !5
  store i32 %76, ptr %10, align 4, !tbaa !5
  %77 = load i32, ptr %8, align 4, !tbaa !5
  %78 = load i32, ptr @D, align 4, !tbaa !5
  %79 = sub nsw i32 %77, %78
  %80 = icmp slt i32 %79, 0
  br i1 %80, label %81, label %85

81:                                               ; preds = %68
  %82 = load i32, ptr %8, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %83) #4
  store i64 0, ptr %84, align 8, !tbaa !9
  br label %116

85:                                               ; preds = %68
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %86 = load i32, ptr %8, align 4, !tbaa !5
  %87 = load i32, ptr @D, align 4, !tbaa !5
  %88 = sub nsw i32 %86, %87
  store i32 %88, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %89 = load i32, ptr %11, align 4, !tbaa !5
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %90) #4
  %92 = load i32, ptr %91, align 4, !tbaa !5
  store i32 %92, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %93 = load i32, ptr %11, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %94) #4
  %96 = load i32, ptr %95, align 4, !tbaa !5
  store i32 %96, ptr %13, align 4, !tbaa !5
  %97 = load i32, ptr %11, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %98) #4
  %100 = load i64, ptr %99, align 8, !tbaa !9
  %101 = load i32, ptr %10, align 4, !tbaa !5
  %102 = load i32, ptr %13, align 4, !tbaa !5
  %103 = sub nsw i32 %101, %102
  %104 = call i32 @llvm.abs.i32(i32 %103, i1 true)
  %105 = sext i32 %104 to i64
  %106 = add nsw i64 %100, %105
  %107 = load i32, ptr %9, align 4, !tbaa !5
  %108 = load i32, ptr %12, align 4, !tbaa !5
  %109 = sub nsw i32 %107, %108
  %110 = call i32 @llvm.abs.i32(i32 %109, i1 true)
  %111 = sext i32 %110 to i64
  %112 = add nsw i64 %106, %111
  %113 = load i32, ptr %8, align 4, !tbaa !5
  %114 = sext i32 %113 to i64
  %115 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %114) #4
  store i64 %112, ptr %115, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %116

116:                                              ; preds = %85, %81
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %117

117:                                              ; preds = %116
  %118 = load i32, ptr %8, align 4, !tbaa !5
  %119 = add nsw i32 %118, 1
  store i32 %119, ptr %8, align 4, !tbaa !5
  br label %61, !llvm.loop !14

120:                                              ; preds = %67
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE6assignEmRKx(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@H = external dso_local local_unnamed_addr global i32, align 4
@W = external dso_local local_unnamed_addr global i32, align 4
@D = external dso_local local_unnamed_addr global i32, align 4
@A = external dso_local global %"class.std::vector", align 8
@xs = external dso_local global %"class.std::vector.0", align 8
@ys = external dso_local global %"class.std::vector.0", align 8
@DP = external dso_local global %"class.std::vector.5", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildv() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = load i32, ptr @H, align 4, !tbaa !5
  %5 = load i32, ptr @W, align 4, !tbaa !5
  %6 = mul nsw i32 %5, %4
  %7 = sext i32 %6 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %7, ptr noundef nonnull align 4 dereferenceable(4) %1)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  %8 = load i32, ptr @H, align 4, !tbaa !5
  %9 = load i32, ptr @W, align 4, !tbaa !5
  %10 = mul nsw i32 %9, %8
  %11 = sext i32 %10 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %11, ptr noundef nonnull align 4 dereferenceable(4) %2)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  %12 = load i32, ptr @H, align 4, !tbaa !5
  %13 = load i32, ptr @W, align 4, !tbaa !5
  %14 = mul nsw i32 %13, %12
  %15 = sext i32 %14 to i64
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  store i64 0, ptr %3, align 8, !tbaa !9
  call void @_ZNSt6vectorIxSaIxEE6assignEmRKx(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %15, ptr noundef nonnull align 8 dereferenceable(8) %3)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  %16 = load i32, ptr @H, align 4, !tbaa !5
  %17 = icmp sgt i32 %16, 0
  %.pre42 = load i32, ptr @W, align 4, !tbaa !5
  %18 = icmp sgt i32 %.pre42, 0
  %or.cond = select i1 %17, i1 %18, i1 false
  br i1 %or.cond, label %.preheader28, label %.preheader

.preheader28:                                     ; preds = %0, %._crit_edge
  %19 = phi i32 [ %27, %._crit_edge ], [ %16, %0 ]
  %20 = phi i32 [ %28, %._crit_edge ], [ %.pre42, %0 ]
  %indvars.iv36 = phi i64 [ %indvars.iv.next37, %._crit_edge ], [ 0, %0 ]
  %21 = icmp sgt i32 %20, 0
  br i1 %21, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader28
  %22 = trunc nuw nsw i64 %indvars.iv36 to i32
  br label %31

.preheader:                                       ; preds = %._crit_edge, %0
  %23 = phi i32 [ %.pre42, %0 ], [ %28, %._crit_edge ]
  %24 = phi i32 [ %16, %0 ], [ %27, %._crit_edge ]
  %25 = mul nsw i32 %23, %24
  %26 = icmp sgt i32 %25, 0
  br i1 %26, label %.lr.ph32, label %._crit_edge33

._crit_edge.loopexit:                             ; preds = %31
  %.pre = load i32, ptr @H, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader28
  %27 = phi i32 [ %.pre, %._crit_edge.loopexit ], [ %19, %.preheader28 ]
  %28 = phi i32 [ %39, %._crit_edge.loopexit ], [ %20, %.preheader28 ]
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  %29 = sext i32 %27 to i64
  %30 = icmp slt i64 %indvars.iv.next37, %29
  br i1 %30, label %.preheader28, label %.preheader, !llvm.loop !11

31:                                               ; preds = %.lr.ph, %31
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %31 ]
  %32 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv36) #4
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %indvars.iv) #4
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %35) #4
  %37 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %37, ptr %36, align 4, !tbaa !5
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %35) #4
  store i32 %22, ptr %38, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %39 = load i32, ptr @W, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = icmp slt i64 %indvars.iv.next, %40
  br i1 %41, label %31, label %._crit_edge.loopexit, !llvm.loop !14

._crit_edge33:                                    ; preds = %66, %.preheader
  ret void

.lr.ph32:                                         ; preds = %.preheader, %66
  %indvars.iv39 = phi i64 [ %indvars.iv.next40, %66 ], [ 0, %.preheader ]
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %indvars.iv39) #4
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %indvars.iv39) #4
  %45 = load i32, ptr @D, align 4, !tbaa !5
  %46 = trunc nuw nsw i64 %indvars.iv39 to i32
  %47 = sub nsw i32 %46, %45
  %48 = icmp slt i32 %47, 0
  br i1 %48, label %66, label %49

49:                                               ; preds = %.lr.ph32
  %50 = load i32, ptr %44, align 4, !tbaa !5
  %51 = zext nneg i32 %47 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %51) #4
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %51) #4
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %51) #4
  %57 = load i64, ptr %56, align 8, !tbaa !9
  %58 = sub nsw i32 %50, %55
  %59 = call i32 @llvm.abs.i32(i32 %58, i1 true)
  %60 = zext nneg i32 %59 to i64
  %61 = sub nsw i32 %43, %53
  %62 = call i32 @llvm.abs.i32(i32 %61, i1 true)
  %63 = zext nneg i32 %62 to i64
  %64 = add i64 %57, %63
  %65 = add i64 %64, %60
  br label %66

66:                                               ; preds = %.lr.ph32, %49
  %.sink = phi i64 [ %65, %49 ], [ 0, %.lr.ph32 ]
  %67 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %indvars.iv39) #4
  store i64 %.sink, ptr %67, align 8, !tbaa !9
  %indvars.iv.next40 = add nuw nsw i64 %indvars.iv39, 1
  %68 = load i32, ptr @H, align 4, !tbaa !5
  %69 = load i32, ptr @W, align 4, !tbaa !5
  %70 = mul nsw i32 %69, %68
  %71 = sext i32 %70 to i64
  %72 = icmp slt i64 %indvars.iv.next40, %71
  br i1 %72, label %.lr.ph32, label %._crit_edge33, !llvm.loop !15
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEE6assignEmRKx(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12, !13}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!"llvm.loop.unswitch.partial.disable"}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass