; LLVM IR from xirc/cp-algorithm :: atcoder/abc027/C/main.ll (Z5solvel)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4bitsl(i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvel(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %6 = load i64, ptr %2, align 8, !tbaa !5
  %7 = call noundef i32 @_Z4bitsl(i64 noundef %6)
  store i32 %7, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %37, %1
  %9 = load i64, ptr %4, align 8, !tbaa !5
  %10 = load i64, ptr %2, align 8, !tbaa !5
  %11 = icmp sle i64 %9, %10
  br i1 %11, label %12, label %40

12:                                               ; preds = %8
  %13 = load i64, ptr %4, align 8, !tbaa !5
  %14 = shl i64 %13, 1
  store i64 %14, ptr %4, align 8, !tbaa !5
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = srem i32 %15, 2
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %25

18:                                               ; preds = %12
  %19 = load i32, ptr %3, align 4, !tbaa !9
  %20 = srem i32 %19, 2
  %21 = icmp eq i32 %20, 1
  br i1 %21, label %22, label %25

22:                                               ; preds = %18
  %23 = load i64, ptr %4, align 8, !tbaa !5
  %24 = add nsw i64 %23, 1
  store i64 %24, ptr %4, align 8, !tbaa !5
  br label %25

25:                                               ; preds = %22, %18, %12
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = srem i32 %26, 2
  %28 = icmp eq i32 %27, 1
  br i1 %28, label %29, label %36

29:                                               ; preds = %25
  %30 = load i32, ptr %3, align 4, !tbaa !9
  %31 = srem i32 %30, 2
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %36

33:                                               ; preds = %29
  %34 = load i64, ptr %4, align 8, !tbaa !5
  %35 = add nsw i64 %34, 1
  store i64 %35, ptr %4, align 8, !tbaa !5
  br label %36

36:                                               ; preds = %33, %29, %25
  br label %37

37:                                               ; preds = %36
  %38 = load i32, ptr %5, align 4, !tbaa !9
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %5, align 4, !tbaa !9
  br label %8, !llvm.loop !11

40:                                               ; preds = %8
  %41 = load i32, ptr %5, align 4, !tbaa !9
  %42 = srem i32 %41, 2
  %43 = icmp eq i32 %42, 0
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i1 %43
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4bitsl(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvel(i64 noundef %0) local_unnamed_addr #0 {
  %2 = tail call noundef i32 @_Z4bitsl(i64 noundef %0)
  %.not17 = icmp slt i64 %0, 1
  br i1 %.not17, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %3 = and i32 %2, -2147483647
  %4 = icmp eq i32 %3, 1
  %5 = and i32 %2, 1
  %6 = icmp eq i32 %5, 0
  br label %7

7:                                                ; preds = %.lr.ph, %7
  %.019 = phi i32 [ 0, %.lr.ph ], [ %13, %7 ]
  %.01218 = phi i64 [ 1, %.lr.ph ], [ %.2, %7 ]
  %8 = shl i64 %.01218, 1
  %9 = and i32 %.019, 1
  %10 = icmp eq i32 %9, 0
  %or.cond = and i1 %4, %10
  %11 = zext i1 %or.cond to i64
  %.1 = or disjoint i64 %8, %11
  %.not13 = icmp ne i32 %9, 0
  %or.cond16 = and i1 %6, %.not13
  %12 = zext i1 %or.cond16 to i64
  %.2 = add nsw i64 %.1, %12
  %13 = add nuw nsw i32 %.019, 1
  %.not = icmp sgt i64 %.2, %0
  br i1 %.not, label %._crit_edge.loopexit, label %7, !llvm.loop !5

._crit_edge.loopexit:                             ; preds = %7
  %14 = and i32 %.019, 1
  %15 = icmp ne i32 %14, 0
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %1
  %.0.lcssa = phi i1 [ true, %1 ], [ %15, %._crit_edge.loopexit ]
  ret i1 %.0.lcssa
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass