; LLVM IR from eyangch/competitive-programming :: USACOcontests/silver/2017.01/cowdance.ll (Z5danceiiPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5danceiiPii(i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 {
  %5 = alloca i1, align 1
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca [10000 x i32], align 16
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 40000, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %32, %4
  %19 = load i32, ptr %11, align 4, !tbaa !5
  %20 = load i32, ptr %9, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  br label %35

23:                                               ; preds = %18
  %24 = load ptr, ptr %8, align 8, !tbaa !9
  %25 = load i32, ptr %11, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds i32, ptr %24, i64 %26
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = load i32, ptr %11, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [10000 x i32], ptr %10, i64 0, i64 %30
  store i32 %28, ptr %31, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %23
  %33 = load i32, ptr %11, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %11, align 4, !tbaa !5
  br label %18, !llvm.loop !11

35:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %36 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %36, ptr %12, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %76, %35
  %38 = load i32, ptr %12, align 4, !tbaa !5
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = icmp slt i32 %38, %39
  br i1 %40, label %42, label %41

41:                                               ; preds = %37
  store i32 5, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %79

42:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  store i32 2147483647, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  store i32 0, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %62, %42
  %44 = load i32, ptr %16, align 4, !tbaa !5
  %45 = load i32, ptr %9, align 4, !tbaa !5
  %46 = icmp slt i32 %44, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %43
  store i32 8, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  br label %65

48:                                               ; preds = %43
  %49 = load i32, ptr %16, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [10000 x i32], ptr %10, i64 0, i64 %50
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = load i32, ptr %14, align 4, !tbaa !5
  %54 = icmp slt i32 %52, %53
  br i1 %54, label %55, label %61

55:                                               ; preds = %48
  %56 = load i32, ptr %16, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [10000 x i32], ptr %10, i64 0, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !5
  store i32 %59, ptr %14, align 4, !tbaa !5
  %60 = load i32, ptr %16, align 4, !tbaa !5
  store i32 %60, ptr %15, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %55, %48
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %16, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %16, align 4, !tbaa !5
  br label %43, !llvm.loop !13

65:                                               ; preds = %47
  %66 = load ptr, ptr %8, align 8, !tbaa !9
  %67 = load i32, ptr %12, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds i32, ptr %66, i64 %68
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = load i32, ptr %14, align 4, !tbaa !5
  %72 = add nsw i32 %70, %71
  %73 = load i32, ptr %15, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [10000 x i32], ptr %10, i64 0, i64 %74
  store i32 %72, ptr %75, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %76

76:                                               ; preds = %65
  %77 = load i32, ptr %12, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %12, align 4, !tbaa !5
  br label %37, !llvm.loop !14

79:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #2
  store i32 0, ptr %17, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %94, %79
  %81 = load i32, ptr %17, align 4, !tbaa !5
  %82 = load i32, ptr %9, align 4, !tbaa !5
  %83 = icmp slt i32 %81, %82
  br i1 %83, label %85, label %84

84:                                               ; preds = %80
  store i32 11, ptr %13, align 4
  br label %97

85:                                               ; preds = %80
  %86 = load i32, ptr %17, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds [10000 x i32], ptr %10, i64 0, i64 %87
  %89 = load i32, ptr %88, align 4, !tbaa !5
  %90 = load i32, ptr %7, align 4, !tbaa !5
  %91 = icmp sgt i32 %89, %90
  br i1 %91, label %92, label %93

92:                                               ; preds = %85
  store i1 false, ptr %5, align 1
  store i32 1, ptr %13, align 4
  br label %97

93:                                               ; preds = %85
  br label %94

94:                                               ; preds = %93
  %95 = load i32, ptr %17, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %17, align 4, !tbaa !5
  br label %80, !llvm.loop !15

97:                                               ; preds = %92, %84
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #2
  %98 = load i32, ptr %13, align 4
  switch i32 %98, label %100 [
    i32 11, label %99
  ]

99:                                               ; preds = %97
  store i1 true, ptr %5, align 1
  store i32 1, ptr %13, align 4
  br label %100

100:                                              ; preds = %99, %97
  call void @llvm.lifetime.end.p0(i64 40000, ptr %10) #2
  %101 = load i1, ptr %5, align 1
  ret i1 %101
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local noundef zeroext i1 @_Z5danceiiPii(i32 noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca [10000 x i32], align 16
  call void @llvm.lifetime.start.p0(i64 40000, ptr nonnull %5) #4
  %6 = icmp sgt i32 %3, 0
  br i1 %6, label %.preheader40, label %.critedge

.preheader40:                                     ; preds = %4
  %7 = zext nneg i32 %3 to i64
  %8 = shl nuw nsw i64 %7, 2
  call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 16 %5, ptr align 4 %2, i64 %8, i1 false), !tbaa !5
  %9 = icmp slt i32 %3, %0
  br i1 %9, label %.preheader39.us.preheader, label %.lr.ph53.preheader

.preheader39.us.preheader:                        ; preds = %.preheader40
  %10 = zext nneg i32 %3 to i64
  %wide.trip.count61 = sext i32 %0 to i64
  %wide.trip.count = zext nneg i32 %3 to i64
  %xtraiter = and i64 %wide.trip.count, 3
  %11 = icmp ult i32 %3, 4
  %unroll_iter = and i64 %wide.trip.count, 2147483644
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br label %.preheader39.us

.preheader39.us:                                  ; preds = %.preheader39.us.preheader, %._crit_edge.us
  %indvars.iv58 = phi i64 [ %10, %.preheader39.us.preheader ], [ %indvars.iv.next59, %._crit_edge.us ]
  br i1 %11, label %._crit_edge.us.unr-lcssa, label %.preheader39.us.new

.preheader39.us.new:                              ; preds = %.preheader39.us, %.preheader39.us.new
  %indvars.iv = phi i64 [ %indvars.iv.next.3, %.preheader39.us.new ], [ 0, %.preheader39.us ]
  %.02843.us = phi i32 [ %spec.select38.us.3, %.preheader39.us.new ], [ 0, %.preheader39.us ]
  %.02942.us = phi i32 [ %spec.select.us.3, %.preheader39.us.new ], [ 2147483647, %.preheader39.us ]
  %niter = phi i64 [ %niter.next.3, %.preheader39.us.new ], [ 0, %.preheader39.us ]
  %12 = getelementptr inbounds [10000 x i32], ptr %5, i64 0, i64 %indvars.iv
  %13 = load i32, ptr %12, align 16, !tbaa !5
  %14 = icmp slt i32 %13, %.02942.us
  %spec.select.us = tail call i32 @llvm.smin.i32(i32 %13, i32 %.02942.us)
  %15 = trunc nuw nsw i64 %indvars.iv to i32
  %spec.select38.us = select i1 %14, i32 %15, i32 %.02843.us
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %16 = getelementptr inbounds [10000 x i32], ptr %5, i64 0, i64 %indvars.iv.next
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp slt i32 %17, %spec.select.us
  %spec.select.us.1 = tail call i32 @llvm.smin.i32(i32 %17, i32 %spec.select.us)
  %19 = trunc nuw nsw i64 %indvars.iv.next to i32
  %spec.select38.us.1 = select i1 %18, i32 %19, i32 %spec.select38.us
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %20 = getelementptr inbounds [10000 x i32], ptr %5, i64 0, i64 %indvars.iv.next.1
  %21 = load i32, ptr %20, align 8, !tbaa !5
  %22 = icmp slt i32 %21, %spec.select.us.1
  %spec.select.us.2 = tail call i32 @llvm.smin.i32(i32 %21, i32 %spec.select.us.1)
  %23 = trunc nuw nsw i64 %indvars.iv.next.1 to i32
  %spec.select38.us.2 = select i1 %22, i32 %23, i32 %spec.select38.us.1
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %24 = getelementptr inbounds [10000 x i32], ptr %5, i64 0, i64 %indvars.iv.next.2
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = icmp slt i32 %25, %spec.select.us.2
  %spec.select.us.3 = tail call i32 @llvm.smin.i32(i32 %25, i32 %spec.select.us.2)
  %27 = trunc nuw nsw i64 %indvars.iv.next.2 to i32
  %spec.select38.us.3 = select i1 %26, i32 %27, i32 %spec.select38.us.2
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.us.unr-lcssa, label %.preheader39.us.new, !llvm.loop !9

._crit_edge.us.unr-lcssa:                         ; preds = %.preheader39.us.new, %.preheader39.us
  %spec.select.us.lcssa.ph = phi i32 [ poison, %.preheader39.us ], [ %spec.select.us.3, %.preheader39.us.new ]
  %spec.select38.us.lcssa.ph = phi i32 [ poison, %.preheader39.us ], [ %spec.select38.us.3, %.preheader39.us.new ]
  %indvars.iv.unr = phi i64 [ 0, %.preheader39.us ], [ %indvars.iv.next.3, %.preheader39.us.new ]
  %.02843.us.unr = phi i32 [ 0, %.preheader39.us ], [ %spec.select38.us.3, %.preheader39.us.new ]
  %.02942.us.unr = phi i32 [ 2147483647, %.preheader39.us ], [ %spec.select.us.3, %.preheader39.us.new ]
  br i1 %lcmp.mod.not, label %._crit_edge.us, label %.epil.preheader

.epil.preheader:                                  ; preds = %._crit_edge.us.unr-lcssa, %.epil.preheader
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.epil.preheader ], [ %indvars.iv.unr, %._crit_edge.us.unr-lcssa ]
  %.02843.us.epil = phi i32 [ %spec.select38.us.epil, %.epil.preheader ], [ %.02843.us.unr, %._crit_edge.us.unr-lcssa ]
  %.02942.us.epil = phi i32 [ %spec.select.us.epil, %.epil.preheader ], [ %.02942.us.unr, %._crit_edge.us.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.epil.preheader ], [ 0, %._crit_edge.us.unr-lcssa ]
  %28 = getelementptr inbounds [10000 x i32], ptr %5, i64 0, i64 %indvars.iv.epil
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = icmp slt i32 %29, %.02942.us.epil
  %spec.select.us.epil = tail call i32 @llvm.smin.i32(i32 %29, i32 %.02942.us.epil)
  %31 = trunc nuw nsw i64 %indvars.iv.epil to i32
  %spec.select38.us.epil = select i1 %30, i32 %31, i32 %.02843.us.epil
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge.us, label %.epil.preheader, !llvm.loop !11

._crit_edge.us:                                   ; preds = %.epil.preheader, %._crit_edge.us.unr-lcssa
  %spec.select.us.lcssa = phi i32 [ %spec.select.us.lcssa.ph, %._crit_edge.us.unr-lcssa ], [ %spec.select.us.epil, %.epil.preheader ]
  %spec.select38.us.lcssa = phi i32 [ %spec.select38.us.lcssa.ph, %._crit_edge.us.unr-lcssa ], [ %spec.select38.us.epil, %.epil.preheader ]
  %32 = getelementptr inbounds i32, ptr %2, i64 %indvars.iv58
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = add nsw i32 %33, %spec.select.us.lcssa
  %35 = sext i32 %spec.select38.us.lcssa to i64
  %36 = getelementptr inbounds [10000 x i32], ptr %5, i64 0, i64 %35
  store i32 %34, ptr %36, align 4, !tbaa !5
  %indvars.iv.next59 = add nuw nsw i64 %indvars.iv58, 1
  %exitcond62.not = icmp eq i64 %indvars.iv.next59, %wide.trip.count61
  br i1 %exitcond62.not, label %.lr.ph53.preheader, label %.preheader39.us, !llvm.loop !13

.lr.ph53.preheader:                               ; preds = %._crit_edge.us, %.preheader40
  %37 = zext nneg i32 %3 to i64
  %wide.trip.count65 = zext nneg i32 %3 to i64
  %38 = load i32, ptr %5, align 16, !tbaa !5
  %39 = icmp sgt i32 %38, %1
  br i1 %39, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph53.preheader, %.lr.ph53
  %indvars.iv6368 = phi i64 [ %indvars.iv.next64, %.lr.ph53 ], [ 0, %.lr.ph53.preheader ]
  %indvars.iv.next64 = add nuw nsw i64 %indvars.iv6368, 1
  %exitcond66 = icmp eq i64 %indvars.iv.next64, %wide.trip.count65
  br i1 %exitcond66, label %.critedge.loopexit, label %.lr.ph53, !llvm.loop !14

.lr.ph53:                                         ; preds = %.lr.ph
  %40 = getelementptr inbounds [10000 x i32], ptr %5, i64 0, i64 %indvars.iv.next64
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = icmp sgt i32 %41, %1
  br i1 %42, label %.critedge.loopexit, label %.lr.ph, !llvm.loop !14

.critedge.loopexit:                               ; preds = %.lr.ph53, %.lr.ph
  %.not.le = icmp uge i64 %indvars.iv.next64, %37
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.lr.ph53.preheader, %4
  %.not.lcssa = phi i1 [ true, %4 ], [ false, %.lr.ph53.preheader ], [ %.not.le, %.critedge.loopexit ]
  call void @llvm.lifetime.end.p0(i64 40000, ptr nonnull %5) #4
  ret i1 %.not.lcssa
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.unroll.disable"}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass