; LLVM IR from HarshCasper/NeoAlgo :: C-Plus-Plus/sort/circle_sort.ll (Z8rec_sortPiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z8rec_sortPiii(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i8, align 1
  %14 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  store i8 0, ptr %8, align 1, !tbaa !11
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp eq i32 %15, %16
  br i1 %17, label %18, label %19

18:                                               ; preds = %3
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %111

19:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %20 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %20, ptr %10, align 4, !tbaa !9
  %21 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %21, ptr %11, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %48, %19
  %23 = load i32, ptr %10, align 4, !tbaa !9
  %24 = load i32, ptr %11, align 4, !tbaa !9
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %26, label %53

26:                                               ; preds = %22
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds i32, ptr %27, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i32, ptr %32, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = icmp sgt i32 %31, %36
  br i1 %37, label %38, label %47

38:                                               ; preds = %26
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = load i32, ptr %10, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds i32, ptr %39, i64 %41
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = load i32, ptr %11, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i32, ptr %43, i64 %45
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %42, ptr noundef nonnull align 4 dereferenceable(4) %46) #3
  store i8 1, ptr %8, align 1, !tbaa !11
  br label %47

47:                                               ; preds = %38, %26
  br label %48

48:                                               ; preds = %47
  %49 = load i32, ptr %10, align 4, !tbaa !9
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %10, align 4, !tbaa !9
  %51 = load i32, ptr %11, align 4, !tbaa !9
  %52 = add nsw i32 %51, -1
  store i32 %52, ptr %11, align 4, !tbaa !9
  br label %22, !llvm.loop !13

53:                                               ; preds = %22
  %54 = load i32, ptr %10, align 4, !tbaa !9
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = icmp eq i32 %54, %55
  br i1 %56, label %57, label %81

57:                                               ; preds = %53
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = load i32, ptr %10, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds i32, ptr %58, i64 %60
  %62 = load i32, ptr %61, align 4, !tbaa !9
  %63 = load ptr, ptr %5, align 8, !tbaa !5
  %64 = load i32, ptr %11, align 4, !tbaa !9
  %65 = add nsw i32 %64, 1
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds i32, ptr %63, i64 %66
  %68 = load i32, ptr %67, align 4, !tbaa !9
  %69 = icmp sgt i32 %62, %68
  br i1 %69, label %70, label %80

70:                                               ; preds = %57
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = load i32, ptr %6, align 4, !tbaa !9
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds i32, ptr %71, i64 %73
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = load i32, ptr %11, align 4, !tbaa !9
  %77 = add nsw i32 %76, 1
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds i32, ptr %75, i64 %78
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %74, ptr noundef nonnull align 4 dereferenceable(4) %79) #3
  store i8 1, ptr %8, align 1, !tbaa !11
  br label %80

80:                                               ; preds = %70, %57
  br label %81

81:                                               ; preds = %80, %53
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %82 = load i32, ptr %7, align 4, !tbaa !9
  %83 = load i32, ptr %6, align 4, !tbaa !9
  %84 = sub nsw i32 %82, %83
  %85 = sdiv i32 %84, 2
  store i32 %85, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #3
  %86 = load ptr, ptr %5, align 8, !tbaa !5
  %87 = load i32, ptr %6, align 4, !tbaa !9
  %88 = load i32, ptr %6, align 4, !tbaa !9
  %89 = load i32, ptr %12, align 4, !tbaa !9
  %90 = add nsw i32 %88, %89
  %91 = call noundef zeroext i1 @_Z8rec_sortPiii(ptr noundef %86, i32 noundef %87, i32 noundef %90)
  %92 = zext i1 %91 to i8
  store i8 %92, ptr %13, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #3
  %93 = load ptr, ptr %5, align 8, !tbaa !5
  %94 = load i32, ptr %6, align 4, !tbaa !9
  %95 = load i32, ptr %12, align 4, !tbaa !9
  %96 = add nsw i32 %94, %95
  %97 = add nsw i32 %96, 1
  %98 = load i32, ptr %7, align 4, !tbaa !9
  %99 = call noundef zeroext i1 @_Z8rec_sortPiii(ptr noundef %93, i32 noundef %97, i32 noundef %98)
  %100 = zext i1 %99 to i8
  store i8 %100, ptr %14, align 1, !tbaa !11
  %101 = load i8, ptr %8, align 1, !tbaa !11, !range !15, !noundef !16
  %102 = trunc i8 %101 to i1
  br i1 %102, label %109, label %103

103:                                              ; preds = %81
  %104 = load i8, ptr %13, align 1, !tbaa !11, !range !15, !noundef !16
  %105 = trunc i8 %104 to i1
  br i1 %105, label %109, label %106

106:                                              ; preds = %103
  %107 = load i8, ptr %14, align 1, !tbaa !11, !range !15, !noundef !16
  %108 = trunc i8 %107 to i1
  br label %109

109:                                              ; preds = %106, %103, %81
  %110 = phi i1 [ true, %103 ], [ true, %81 ], [ %108, %106 ]
  store i1 %110, ptr %4, align 1
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %111

111:                                              ; preds = %109, %18
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %112 = load i1, ptr %4, align 1
  ret i1 %112
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{i8 0, i8 2}
!16 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z8rec_sortPiii(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %1, %2
  br i1 %4, label %common.ret53, label %.preheader

.preheader:                                       ; preds = %3
  %5 = icmp slt i32 %1, %2
  br i1 %5, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %.preheader
  %6 = sext i32 %2 to i64
  %7 = sext i32 %1 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %14
  %indvars.iv51 = phi i64 [ %7, %.lr.ph.preheader ], [ %indvars.iv.next52, %14 ]
  %indvars.iv = phi i64 [ %6, %.lr.ph.preheader ], [ %indvars.iv.next, %14 ]
  %.03947 = phi i1 [ false, %.lr.ph.preheader ], [ %.1, %14 ]
  %8 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv51
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = icmp sgt i32 %9, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %.lr.ph
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %10) #2
  br label %14

14:                                               ; preds = %.lr.ph, %13
  %.1 = phi i1 [ true, %13 ], [ %.03947, %.lr.ph ]
  %indvars.iv.next52 = add nsw i64 %indvars.iv51, 1
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %15 = icmp slt i64 %indvars.iv.next52, %indvars.iv.next
  br i1 %15, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %14
  %16 = trunc nsw i64 %indvars.iv.next52 to i32
  %17 = trunc nsw i64 %indvars.iv.next to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %.041.lcssa = phi i32 [ %1, %.preheader ], [ %16, %._crit_edge.loopexit ]
  %.040.lcssa = phi i32 [ %2, %.preheader ], [ %17, %._crit_edge.loopexit ]
  %.039.lcssa = phi i1 [ false, %.preheader ], [ %.1, %._crit_edge.loopexit ]
  %18 = icmp eq i32 %.041.lcssa, %.040.lcssa
  br i1 %18, label %19, label %29

19:                                               ; preds = %._crit_edge
  %20 = sext i32 %.041.lcssa to i64
  %21 = getelementptr i32, ptr %0, i64 %20
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = getelementptr i8, ptr %21, i64 4
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp sgt i32 %22, %24
  br i1 %25, label %26, label %29

26:                                               ; preds = %19
  %27 = sext i32 %1 to i64
  %28 = getelementptr inbounds i32, ptr %0, i64 %27
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %28, ptr noundef nonnull align 4 dereferenceable(4) %23) #2
  br label %29

common.ret53:                                     ; preds = %3, %29
  %common.ret53.op = phi i1 [ %spec.select44, %29 ], [ false, %3 ]
  ret i1 %common.ret53.op

29:                                               ; preds = %19, %26, %._crit_edge
  %.2 = phi i1 [ true, %26 ], [ %.039.lcssa, %19 ], [ %.039.lcssa, %._crit_edge ]
  %30 = sub nsw i32 %2, %1
  %31 = sdiv i32 %30, 2
  %32 = add nsw i32 %31, %1
  %33 = tail call noundef zeroext i1 @_Z8rec_sortPiii(ptr noundef %0, i32 noundef %1, i32 noundef %32)
  %34 = add nsw i32 %32, 1
  %35 = tail call noundef zeroext i1 @_Z8rec_sortPiii(ptr noundef %0, i32 noundef %34, i32 noundef %2)
  %spec.select = or i1 %33, %35
  %spec.select44 = or i1 %.2, %spec.select
  br label %common.ret53
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass