; LLVM IR from xirc/cp-algorithm :: spoj/arbitrag/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@R = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvev() #0 {
  %1 = alloca i1, align 1
  %2 = alloca double, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #2
  store double 1.000000e-08, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %81, %0
  %9 = load i32, ptr %3, align 4, !tbaa !9
  %10 = load i32, ptr @N, align 4, !tbaa !9
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %84

13:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %77, %13
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = load i32, ptr @N, align 4, !tbaa !9
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %80

19:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %73, %19
  %21 = load i32, ptr %6, align 4, !tbaa !9
  %22 = load i32, ptr @N, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %76

25:                                               ; preds = %20
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %27) #2
  %29 = load i32, ptr %3, align 4, !tbaa !9
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30) #2
  %32 = load double, ptr %31, align 8, !tbaa !5
  %33 = load i32, ptr %3, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %34) #2
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %37) #2
  %39 = load double, ptr %38, align 8, !tbaa !5
  %40 = fmul double %32, %39
  %41 = load i32, ptr %5, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %42) #2
  %44 = load i32, ptr %6, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #2
  %47 = load double, ptr %46, align 8, !tbaa !5
  %48 = fadd double %47, 1.000000e-08
  %49 = fcmp ogt double %40, %48
  br i1 %49, label %50, label %72

50:                                               ; preds = %25
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %52) #2
  %54 = load i32, ptr %3, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55) #2
  %57 = load double, ptr %56, align 8, !tbaa !5
  %58 = load i32, ptr %3, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %59) #2
  %61 = load i32, ptr %6, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #2
  %64 = load double, ptr %63, align 8, !tbaa !5
  %65 = fmul double %57, %64
  %66 = load i32, ptr %5, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %67) #2
  %69 = load i32, ptr %6, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %70) #2
  store double %65, ptr %71, align 8, !tbaa !5
  br label %72

72:                                               ; preds = %50, %25
  br label %73

73:                                               ; preds = %72
  %74 = load i32, ptr %6, align 4, !tbaa !9
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %6, align 4, !tbaa !9
  br label %20, !llvm.loop !11

76:                                               ; preds = %24
  br label %77

77:                                               ; preds = %76
  %78 = load i32, ptr %5, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %5, align 4, !tbaa !9
  br label %14, !llvm.loop !13

80:                                               ; preds = %18
  br label %81

81:                                               ; preds = %80
  %82 = load i32, ptr %3, align 4, !tbaa !9
  %83 = add nsw i32 %82, 1
  store i32 %83, ptr %3, align 4, !tbaa !9
  br label %8, !llvm.loop !14

84:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %85

85:                                               ; preds = %101, %84
  %86 = load i32, ptr %7, align 4, !tbaa !9
  %87 = load i32, ptr @N, align 4, !tbaa !9
  %88 = icmp slt i32 %86, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %85
  store i32 11, ptr %4, align 4
  br label %104

90:                                               ; preds = %85
  %91 = load i32, ptr %7, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %92) #2
  %94 = load i32, ptr %7, align 4, !tbaa !9
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %95) #2
  %97 = load double, ptr %96, align 8, !tbaa !5
  %98 = fcmp ogt double %97, 0x3FF0000002AF31DC
  br i1 %98, label %99, label %100

99:                                               ; preds = %90
  store i1 true, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %104

100:                                              ; preds = %90
  br label %101

101:                                              ; preds = %100
  %102 = load i32, ptr %7, align 4, !tbaa !9
  %103 = add nsw i32 %102, 1
  store i32 %103, ptr %7, align 4, !tbaa !9
  br label %85, !llvm.loop !15

104:                                              ; preds = %99, %89
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  %105 = load i32, ptr %4, align 4
  switch i32 %105, label %107 [
    i32 11, label %106
  ]

106:                                              ; preds = %104
  store i1 false, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %107

107:                                              ; preds = %106, %104
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #2
  %108 = load i1, ptr %1, align 1
  ret i1 %108
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@R = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 0
  br i1 %2, label %.preheader29, label %.critedge

.preheader29:                                     ; preds = %0, %._crit_edge32
  %3 = phi i32 [ %9, %._crit_edge32 ], [ %1, %0 ]
  %indvars.iv46 = phi i64 [ %indvars.iv.next47, %._crit_edge32 ], [ 0, %0 ]
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.preheader28, label %._crit_edge32

.preheader:                                       ; preds = %._crit_edge32
  %5 = icmp sgt i32 %9, 0
  br i1 %5, label %.lr.ph37, label %.critedge

.preheader28:                                     ; preds = %.preheader29, %._crit_edge
  %6 = phi i32 [ %12, %._crit_edge ], [ %3, %.preheader29 ]
  %7 = phi i32 [ %13, %._crit_edge ], [ %3, %.preheader29 ]
  %indvars.iv43 = phi i64 [ %indvars.iv.next44, %._crit_edge ], [ 0, %.preheader29 ]
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.lr.ph, label %.preheader28.._crit_edge_crit_edge

.preheader28.._crit_edge_crit_edge:               ; preds = %.preheader28
  %.pre = sext i32 %7 to i64
  br label %._crit_edge

._crit_edge32:                                    ; preds = %._crit_edge, %.preheader29
  %9 = phi i32 [ %3, %.preheader29 ], [ %12, %._crit_edge ]
  %indvars.iv.next47 = add nuw nsw i64 %indvars.iv46, 1
  %10 = sext i32 %9 to i64
  %11 = icmp slt i64 %indvars.iv.next47, %10
  br i1 %11, label %.preheader29, label %.preheader, !llvm.loop !9

._crit_edge:                                      ; preds = %37, %.preheader28.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.preheader28.._crit_edge_crit_edge ], [ %39, %37 ]
  %12 = phi i32 [ %6, %.preheader28.._crit_edge_crit_edge ], [ %38, %37 ]
  %13 = phi i32 [ %7, %.preheader28.._crit_edge_crit_edge ], [ %38, %37 ]
  %indvars.iv.next44 = add nuw nsw i64 %indvars.iv43, 1
  %14 = icmp slt i64 %indvars.iv.next44, %.pre-phi
  br i1 %14, label %.preheader28, label %._crit_edge32, !llvm.loop !12

.lr.ph:                                           ; preds = %.preheader28, %37
  %indvars.iv = phi i64 [ %indvars.iv.next, %37 ], [ 0, %.preheader28 ]
  %15 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %indvars.iv43) #1
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %indvars.iv46) #1
  %17 = load double, ptr %16, align 8, !tbaa !13
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %indvars.iv46) #1
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %indvars.iv) #1
  %20 = load double, ptr %19, align 8, !tbaa !13
  %21 = fmul double %17, %20
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %indvars.iv43) #1
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %indvars.iv) #1
  %24 = load double, ptr %23, align 8, !tbaa !13
  %25 = fadd double %24, 1.000000e-08
  %26 = fcmp ogt double %21, %25
  br i1 %26, label %27, label %37

27:                                               ; preds = %.lr.ph
  %28 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %indvars.iv43) #1
  %29 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %indvars.iv46) #1
  %30 = load double, ptr %29, align 8, !tbaa !13
  %31 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %indvars.iv46) #1
  %32 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %indvars.iv) #1
  %33 = load double, ptr %32, align 8, !tbaa !13
  %34 = fmul double %30, %33
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %indvars.iv43) #1
  %36 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %indvars.iv) #1
  store double %34, ptr %36, align 8, !tbaa !13
  br label %37

37:                                               ; preds = %.lr.ph, %27
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %38 = load i32, ptr @N, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = icmp slt i64 %indvars.iv.next, %39
  br i1 %40, label %.lr.ph, label %._crit_edge, !llvm.loop !15

41:                                               ; preds = %.lr.ph37
  %indvars.iv.next50 = add nuw nsw i64 %indvars.iv49, 1
  %42 = load i32, ptr @N, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %.not = icmp slt i64 %indvars.iv.next50, %43
  br i1 %.not, label %.lr.ph37, label %.critedge, !llvm.loop !16

.lr.ph37:                                         ; preds = %.preheader, %41
  %indvars.iv49 = phi i64 [ %indvars.iv.next50, %41 ], [ 0, %.preheader ]
  %44 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @R, i64 noundef %indvars.iv49) #1
  %45 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %indvars.iv49) #1
  %46 = load double, ptr %45, align 8, !tbaa !13
  %47 = fcmp ogt double %46, 0x3FF0000002AF31DC
  br i1 %47, label %.critedge, label %41

.critedge:                                        ; preds = %.lr.ph37, %41, %0, %.preheader
  %.not.lcssa = phi i1 [ false, %.preheader ], [ false, %0 ], [ %47, %41 ], [ %47, %.lr.ph37 ]
  ret i1 %.not.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10, !11}
!13 = !{!14, !14, i64 0}
!14 = !{!"double", !7, i64 0}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass