; LLVM IR from eyangch/competitive-programming :: USACOcontests/platinum/2020.02/deleg.ll (Z2okRSt6vectorIxSaIxEExx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z2okRSt6vectorIxSaIxEExx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store i64 %2, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  store i64 0, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #2
  %13 = sub i64 %12, 1
  store i64 %13, ptr %9, align 8, !tbaa !9
  %14 = load i64, ptr %7, align 8, !tbaa !9
  %15 = load i64, ptr %8, align 8, !tbaa !9
  %16 = icmp eq i64 %14, %15
  br i1 %16, label %17, label %20

17:                                               ; preds = %3
  %18 = load i64, ptr %8, align 8, !tbaa !9
  %19 = add nsw i64 %18, 1
  store i64 %19, ptr %8, align 8, !tbaa !9
  br label %20

20:                                               ; preds = %17, %3
  %21 = load i64, ptr %7, align 8, !tbaa !9
  %22 = load i64, ptr %9, align 8, !tbaa !9
  %23 = icmp eq i64 %21, %22
  br i1 %23, label %24, label %27

24:                                               ; preds = %20
  %25 = load i64, ptr %9, align 8, !tbaa !9
  %26 = add nsw i64 %25, -1
  store i64 %26, ptr %9, align 8, !tbaa !9
  br label %27

27:                                               ; preds = %24, %20
  br label %28

28:                                               ; preds = %63, %27
  %29 = load i64, ptr %8, align 8, !tbaa !9
  %30 = load i64, ptr %9, align 8, !tbaa !9
  %31 = icmp slt i64 %29, %30
  br i1 %31, label %32, label %64

32:                                               ; preds = %28
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = load i64, ptr %8, align 8, !tbaa !9
  %35 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %34) #2
  %36 = load i64, ptr %35, align 8, !tbaa !9
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load i64, ptr %9, align 8, !tbaa !9
  %39 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %38) #2
  %40 = load i64, ptr %39, align 8, !tbaa !9
  %41 = add nsw i64 %36, %40
  %42 = load i64, ptr %6, align 8, !tbaa !9
  %43 = icmp slt i64 %41, %42
  br i1 %43, label %44, label %45

44:                                               ; preds = %32
  store i1 false, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %65

45:                                               ; preds = %32
  %46 = load i64, ptr %8, align 8, !tbaa !9
  %47 = add nsw i64 %46, 1
  store i64 %47, ptr %8, align 8, !tbaa !9
  %48 = load i64, ptr %9, align 8, !tbaa !9
  %49 = add nsw i64 %48, -1
  store i64 %49, ptr %9, align 8, !tbaa !9
  %50 = load i64, ptr %8, align 8, !tbaa !9
  %51 = load i64, ptr %7, align 8, !tbaa !9
  %52 = icmp eq i64 %50, %51
  br i1 %52, label %53, label %56

53:                                               ; preds = %45
  %54 = load i64, ptr %8, align 8, !tbaa !9
  %55 = add nsw i64 %54, 1
  store i64 %55, ptr %8, align 8, !tbaa !9
  br label %56

56:                                               ; preds = %53, %45
  %57 = load i64, ptr %9, align 8, !tbaa !9
  %58 = load i64, ptr %7, align 8, !tbaa !9
  %59 = icmp eq i64 %57, %58
  br i1 %59, label %60, label %63

60:                                               ; preds = %56
  %61 = load i64, ptr %9, align 8, !tbaa !9
  %62 = add nsw i64 %61, -1
  store i64 %62, ptr %9, align 8, !tbaa !9
  br label %63

63:                                               ; preds = %60, %56
  br label %28, !llvm.loop !11

64:                                               ; preds = %28
  store i1 true, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %65

65:                                               ; preds = %64, %44
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %66 = load i1, ptr %4, align 1
  ret i1 %66
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z2okRSt6vectorIxSaIxEExx(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = tail call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %5 = add i64 %4, -1
  %6 = icmp eq i64 %2, 0
  %spec.select = zext i1 %6 to i64
  %7 = icmp eq i64 %5, %2
  %8 = add i64 %4, -2
  %.0 = select i1 %7, i64 %8, i64 %5
  %.not = icmp sgt i64 %.0, %spec.select
  br i1 %.not, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %3, %14
  %.134 = phi i64 [ %.2, %14 ], [ %.0, %3 ]
  %.12333 = phi i64 [ %spec.select32, %14 ], [ %spec.select, %3 ]
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.12333) #1
  %10 = load i64, ptr %9, align 8, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.134) #1
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = add nsw i64 %12, %10
  %.not38 = icmp sge i64 %13, %1
  br i1 %.not38, label %14, label %._crit_edge

14:                                               ; preds = %.lr.ph
  %15 = add nsw i64 %.12333, 1
  %16 = add nsw i64 %.134, -1
  %17 = icmp eq i64 %15, %2
  %18 = add nsw i64 %.12333, 2
  %spec.select32 = select i1 %17, i64 %18, i64 %15
  %19 = icmp eq i64 %16, %2
  %20 = add nsw i64 %.134, -2
  %.2 = select i1 %19, i64 %20, i64 %16
  %.not37 = icmp slt i64 %spec.select32, %.2
  br i1 %.not37, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %14, %3
  %.lcssa = phi i1 [ true, %3 ], [ %.not38, %14 ], [ %.not38, %.lr.ph ]
  ret i1 %.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass