; LLVM IR from wmcnamara/crynn :: lib/thirdparty/assimp/contrib/Open3DGC (o3dgcArithmeticCodec)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.o3dgc::Adaptive_Bit_Model" = type { i32, i32, i32, i32, i32 }
%"class.o3dgc::Arithmetic_Codec" = type <{ ptr, ptr, ptr, i32, i32, i32, i32, i32, [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5o3dgc16Arithmetic_Codec19renorm_dec_intervalEv(ptr noundef nonnull align 8 dereferenceable(44)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5o3dgc18Adaptive_Bit_Model6updateEv(ptr noundef nonnull align 4 dereferenceable(20)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5o3dgc16Arithmetic_Codec6decodeERNS_18Adaptive_Bit_ModelE(ptr noundef nonnull align 8 dereferenceable(44) %0, ptr noundef nonnull align 4 dereferenceable(20) %1) #3 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %8 = load ptr, ptr %4, align 8, !tbaa !5
  %9 = getelementptr inbounds %"class.o3dgc::Adaptive_Bit_Model", ptr %8, i32 0, i32 2
  %10 = load i32, ptr %9, align 4, !tbaa !9
  %11 = getelementptr inbounds %"class.o3dgc::Arithmetic_Codec", ptr %7, i32 0, i32 5
  %12 = load i32, ptr %11, align 8, !tbaa !12
  %13 = lshr i32 %12, 13
  %14 = mul i32 %10, %13
  store i32 %14, ptr %5, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %15 = getelementptr inbounds %"class.o3dgc::Arithmetic_Codec", ptr %7, i32 0, i32 4
  %16 = load i32, ptr %15, align 4, !tbaa !15
  %17 = load i32, ptr %5, align 4, !tbaa !14
  %18 = icmp uge i32 %16, %17
  %19 = zext i1 %18 to i32
  store i32 %19, ptr %6, align 4, !tbaa !14
  %20 = load i32, ptr %6, align 4, !tbaa !14
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %29

22:                                               ; preds = %2
  %23 = load i32, ptr %5, align 4, !tbaa !14
  %24 = getelementptr inbounds %"class.o3dgc::Arithmetic_Codec", ptr %7, i32 0, i32 5
  store i32 %23, ptr %24, align 8, !tbaa !12
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %"class.o3dgc::Adaptive_Bit_Model", ptr %25, i32 0, i32 3
  %27 = load i32, ptr %26, align 4, !tbaa !16
  %28 = add i32 %27, 1
  store i32 %28, ptr %26, align 4, !tbaa !16
  br label %38

29:                                               ; preds = %2
  %30 = load i32, ptr %5, align 4, !tbaa !14
  %31 = getelementptr inbounds %"class.o3dgc::Arithmetic_Codec", ptr %7, i32 0, i32 4
  %32 = load i32, ptr %31, align 4, !tbaa !15
  %33 = sub i32 %32, %30
  store i32 %33, ptr %31, align 4, !tbaa !15
  %34 = load i32, ptr %5, align 4, !tbaa !14
  %35 = getelementptr inbounds %"class.o3dgc::Arithmetic_Codec", ptr %7, i32 0, i32 5
  %36 = load i32, ptr %35, align 8, !tbaa !12
  %37 = sub i32 %36, %34
  store i32 %37, ptr %35, align 8, !tbaa !12
  br label %38

38:                                               ; preds = %29, %22
  %39 = getelementptr inbounds %"class.o3dgc::Arithmetic_Codec", ptr %7, i32 0, i32 5
  %40 = load i32, ptr %39, align 8, !tbaa !12
  %41 = icmp ult i32 %40, 16777216
  br i1 %41, label %42, label %43

42:                                               ; preds = %38
  call void @_ZN5o3dgc16Arithmetic_Codec19renorm_dec_intervalEv(ptr noundef nonnull align 8 dereferenceable(44) %7)
  br label %43

43:                                               ; preds = %42, %38
  %44 = load ptr, ptr %4, align 8, !tbaa !5
  %45 = getelementptr inbounds %"class.o3dgc::Adaptive_Bit_Model", ptr %44, i32 0, i32 1
  %46 = load i32, ptr %45, align 4, !tbaa !17
  %47 = add i32 %46, -1
  store i32 %47, ptr %45, align 4, !tbaa !17
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %51

49:                                               ; preds = %43
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN5o3dgc18Adaptive_Bit_Model6updateEv(ptr noundef nonnull align 4 dereferenceable(20) %50)
  br label %51

51:                                               ; preds = %49, %43
  %52 = load i32, ptr %6, align 4, !tbaa !14
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret i32 %52
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"_ZTSN5o3dgc18Adaptive_Bit_ModelE", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 32}
!13 = !{!"_ZTSN5o3dgc16Arithmetic_CodecE", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!14 = !{!11, !11, i64 0}
!15 = !{!13, !11, i64 28}
!16 = !{!10, !11, i64 12}
!17 = !{!10, !11, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5o3dgc16Arithmetic_Codec19renorm_dec_intervalEv(ptr noundef nonnull align 8 dereferenceable(44)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5o3dgc18Adaptive_Bit_Model6updateEv(ptr noundef nonnull align 4 dereferenceable(20)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i32 0, 2) i32 @_ZN5o3dgc16Arithmetic_Codec6decodeERNS_18Adaptive_Bit_ModelE(ptr noundef nonnull align 8 dereferenceable(44) %0, ptr noundef nonnull align 4 dereferenceable(20) %1) local_unnamed_addr #1 align 2 {
  %3 = getelementptr inbounds i8, ptr %1, i64 8
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 32
  %6 = load i32, ptr %5, align 8, !tbaa !10
  %7 = lshr i32 %6, 13
  %8 = mul i32 %7, %4
  %9 = getelementptr inbounds i8, ptr %0, i64 28
  %10 = load i32, ptr %9, align 4, !tbaa !13
  %11 = icmp uge i32 %10, %8
  br i1 %11, label %16, label %12

12:                                               ; preds = %2
  %13 = getelementptr inbounds i8, ptr %1, i64 12
  %14 = load i32, ptr %13, align 4, !tbaa !14
  %15 = add i32 %14, 1
  store i32 %15, ptr %13, align 4, !tbaa !14
  br label %19

16:                                               ; preds = %2
  %17 = sub i32 %10, %8
  store i32 %17, ptr %9, align 4, !tbaa !13
  %18 = sub i32 %6, %8
  br label %19

19:                                               ; preds = %16, %12
  %.sink = phi i32 [ %18, %16 ], [ %8, %12 ]
  store i32 %.sink, ptr %5, align 8
  %20 = icmp ult i32 %.sink, 16777216
  br i1 %20, label %21, label %22

21:                                               ; preds = %19
  tail call void @_ZN5o3dgc16Arithmetic_Codec19renorm_dec_intervalEv(ptr noundef nonnull align 8 dereferenceable(44) %0)
  br label %22

22:                                               ; preds = %21, %19
  %23 = getelementptr inbounds i8, ptr %1, i64 4
  %24 = load i32, ptr %23, align 4, !tbaa !15
  %25 = add i32 %24, -1
  store i32 %25, ptr %23, align 4, !tbaa !15
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %22
  tail call void @_ZN5o3dgc18Adaptive_Bit_Model6updateEv(ptr noundef nonnull align 4 dereferenceable(20) %1)
  br label %28

28:                                               ; preds = %27, %22
  %29 = zext i1 %11 to i32
  ret i32 %29
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTSN5o3dgc18Adaptive_Bit_ModelE", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !7, i64 32}
!11 = !{!"_ZTSN5o3dgc16Arithmetic_CodecE", !12, i64 0, !12, i64 8, !12, i64 16, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 28}
!14 = !{!6, !7, i64 12}
!15 = !{!6, !7, i64 4}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass