; LLVM IR from xirc/cp-algorithm :: atcoder/abc004/D/main.ll (Z5solveiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@AR = external dso_local global %"class.std::vector", align 8
@AG = external dso_local global %"class.std::vector", align 8
@AB = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solveiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %84, %3
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = icmp slt i32 %19, 2000
  br i1 %20, label %22, label %21

21:                                               ; preds = %18
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %87

22:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = sub nsw i32 %23, 1000
  store i32 %24, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %41, %22
  %26 = load i32, ptr %10, align 4, !tbaa !5
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %25
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %44

30:                                               ; preds = %25
  %31 = load i32, ptr %9, align 4, !tbaa !5
  %32 = load i32, ptr %10, align 4, !tbaa !5
  %33 = add nsw i32 %31, %32
  %34 = sub nsw i32 -100, %33
  %35 = call i32 @llvm.abs.i32(i32 %34, i1 true)
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %37) #5
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = add nsw i32 %39, %35
  store i32 %40, ptr %38, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %30
  %42 = load i32, ptr %10, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %10, align 4, !tbaa !5
  br label %25, !llvm.loop !9

44:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %60, %44
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = load i32, ptr %5, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %63

50:                                               ; preds = %45
  %51 = load i32, ptr %9, align 4, !tbaa !5
  %52 = load i32, ptr %11, align 4, !tbaa !5
  %53 = add nsw i32 %51, %52
  %54 = call i32 @llvm.abs.i32(i32 %53, i1 true)
  %55 = load i32, ptr %7, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AG, i64 noundef %56) #5
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = add nsw i32 %58, %54
  store i32 %59, ptr %57, align 4, !tbaa !5
  br label %60

60:                                               ; preds = %50
  %61 = load i32, ptr %11, align 4, !tbaa !5
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %11, align 4, !tbaa !5
  br label %45, !llvm.loop !11

63:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %64

64:                                               ; preds = %80, %63
  %65 = load i32, ptr %12, align 4, !tbaa !5
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = icmp slt i32 %65, %66
  br i1 %67, label %69, label %68

68:                                               ; preds = %64
  store i32 11, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %83

69:                                               ; preds = %64
  %70 = load i32, ptr %9, align 4, !tbaa !5
  %71 = load i32, ptr %12, align 4, !tbaa !5
  %72 = add nsw i32 %70, %71
  %73 = sub nsw i32 100, %72
  %74 = call i32 @llvm.abs.i32(i32 %73, i1 true)
  %75 = load i32, ptr %7, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %76) #5
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %79 = add nsw i32 %78, %74
  store i32 %79, ptr %77, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %69
  %81 = load i32, ptr %12, align 4, !tbaa !5
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %12, align 4, !tbaa !5
  br label %64, !llvm.loop !12

83:                                               ; preds = %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %84

84:                                               ; preds = %83
  %85 = load i32, ptr %7, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %7, align 4, !tbaa !5
  br label %18, !llvm.loop !13

87:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 1, ptr %13, align 4, !tbaa !5
  br label %88

88:                                               ; preds = %105, %87
  %89 = load i32, ptr %13, align 4, !tbaa !5
  %90 = icmp slt i32 %89, 2000
  br i1 %90, label %92, label %91

91:                                               ; preds = %88
  store i32 14, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %108

92:                                               ; preds = %88
  %93 = load i32, ptr %13, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %94) #5
  %96 = load i32, ptr %13, align 4, !tbaa !5
  %97 = sub nsw i32 %96, 1
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %98) #5
  %100 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %95, ptr noundef nonnull align 4 dereferenceable(4) %99)
  %101 = load i32, ptr %100, align 4, !tbaa !5
  %102 = load i32, ptr %13, align 4, !tbaa !5
  %103 = sext i32 %102 to i64
  %104 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %103) #5
  store i32 %101, ptr %104, align 4, !tbaa !5
  br label %105

105:                                              ; preds = %92
  %106 = load i32, ptr %13, align 4, !tbaa !5
  %107 = add nsw i32 %106, 1
  store i32 %107, ptr %13, align 4, !tbaa !5
  br label %88, !llvm.loop !14

108:                                              ; preds = %91
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 1998, ptr %14, align 4, !tbaa !5
  br label %109

109:                                              ; preds = %126, %108
  %110 = load i32, ptr %14, align 4, !tbaa !5
  %111 = icmp sge i32 %110, 0
  br i1 %111, label %113, label %112

112:                                              ; preds = %109
  store i32 17, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %129

113:                                              ; preds = %109
  %114 = load i32, ptr %14, align 4, !tbaa !5
  %115 = sext i32 %114 to i64
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %115) #5
  %117 = load i32, ptr %14, align 4, !tbaa !5
  %118 = add nsw i32 %117, 1
  %119 = sext i32 %118 to i64
  %120 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %119) #5
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %116, ptr noundef nonnull align 4 dereferenceable(4) %120)
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %123 = load i32, ptr %14, align 4, !tbaa !5
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %124) #5
  store i32 %122, ptr %125, align 4, !tbaa !5
  br label %126

126:                                              ; preds = %113
  %127 = load i32, ptr %14, align 4, !tbaa !5
  %128 = add nsw i32 %127, -1
  store i32 %128, ptr %14, align 4, !tbaa !5
  br label %109, !llvm.loop !15

129:                                              ; preds = %112
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  store i32 100000000, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  %130 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %130, ptr %16, align 4, !tbaa !5
  br label %131

131:                                              ; preds = %158, %129
  %132 = load i32, ptr %16, align 4, !tbaa !5
  %133 = load i32, ptr %5, align 4, !tbaa !5
  %134 = add nsw i32 %132, %133
  %135 = icmp slt i32 %134, 2000
  br i1 %135, label %137, label %136

136:                                              ; preds = %131
  store i32 20, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  br label %161

137:                                              ; preds = %131
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  %138 = load i32, ptr %16, align 4, !tbaa !5
  %139 = load i32, ptr %4, align 4, !tbaa !5
  %140 = sub nsw i32 %138, %139
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %141) #5
  %143 = load i32, ptr %142, align 4, !tbaa !5
  %144 = load i32, ptr %16, align 4, !tbaa !5
  %145 = sext i32 %144 to i64
  %146 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AG, i64 noundef %145) #5
  %147 = load i32, ptr %146, align 4, !tbaa !5
  %148 = add nsw i32 %143, %147
  %149 = load i32, ptr %16, align 4, !tbaa !5
  %150 = load i32, ptr %5, align 4, !tbaa !5
  %151 = add nsw i32 %149, %150
  %152 = sext i32 %151 to i64
  %153 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %152) #5
  %154 = load i32, ptr %153, align 4, !tbaa !5
  %155 = add nsw i32 %148, %154
  store i32 %155, ptr %17, align 4, !tbaa !5
  %156 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %17)
  %157 = load i32, ptr %156, align 4, !tbaa !5
  store i32 %157, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  br label %158

158:                                              ; preds = %137
  %159 = load i32, ptr %16, align 4, !tbaa !5
  %160 = add nsw i32 %159, 1
  store i32 %160, ptr %16, align 4, !tbaa !5
  br label %131, !llvm.loop !16

161:                                              ; preds = %136
  %162 = load i32, ptr %15, align 4, !tbaa !5
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  ret i32 %162
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@AR = external dso_local global %"class.std::vector", align 8
@AG = external dso_local global %"class.std::vector", align 8
@AB = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solveiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = icmp sgt i32 %0, 0
  %7 = icmp sgt i32 %1, 0
  %8 = icmp sgt i32 %2, 0
  br label %9

9:                                                ; preds = %3, %._crit_edge
  %indvars.iv = phi i64 [ 0, %3 ], [ %indvars.iv.next, %._crit_edge ]
  br i1 %6, label %.lr.ph, label %.preheader51

.lr.ph:                                           ; preds = %9
  %10 = trunc nuw nsw i64 %indvars.iv to i32
  br label %13

.preheader51:                                     ; preds = %13, %9
  br i1 %7, label %.lr.ph54, label %.preheader50

.lr.ph54:                                         ; preds = %.preheader51
  %11 = trunc i64 %indvars.iv to i32
  %12 = add i32 %11, -1000
  br label %22

13:                                               ; preds = %.lr.ph, %13
  %.04452 = phi i32 [ 0, %.lr.ph ], [ %20, %13 ]
  %14 = add nuw i32 %.04452, %10
  %15 = sub i32 900, %14
  %16 = tail call i32 @llvm.abs.i32(i32 %15, i1 true)
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %indvars.iv) #4
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = add nsw i32 %18, %16
  store i32 %19, ptr %17, align 4, !tbaa !5
  %20 = add nuw nsw i32 %.04452, 1
  %exitcond.not = icmp eq i32 %20, %0
  br i1 %exitcond.not, label %.preheader51, label %13, !llvm.loop !9

.preheader50:                                     ; preds = %22, %.preheader51
  br i1 %8, label %.lr.ph56, label %._crit_edge

.lr.ph56:                                         ; preds = %.preheader50
  %21 = trunc nuw nsw i64 %indvars.iv to i32
  br label %29

22:                                               ; preds = %.lr.ph54, %22
  %.04353 = phi i32 [ 0, %.lr.ph54 ], [ %28, %22 ]
  %23 = add nsw i32 %.04353, %12
  %24 = tail call i32 @llvm.abs.i32(i32 %23, i1 true)
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AG, i64 noundef %indvars.iv) #4
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = add nsw i32 %26, %24
  store i32 %27, ptr %25, align 4, !tbaa !5
  %28 = add nuw nsw i32 %.04353, 1
  %exitcond64.not = icmp eq i32 %28, %1
  br i1 %exitcond64.not, label %.preheader50, label %22, !llvm.loop !11

._crit_edge:                                      ; preds = %29, %.preheader50
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond67.not = icmp eq i64 %indvars.iv.next, 2000
  br i1 %exitcond67.not, label %.preheader49, label %9, !llvm.loop !12

29:                                               ; preds = %.lr.ph56, %29
  %.04255 = phi i32 [ 0, %.lr.ph56 ], [ %36, %29 ]
  %30 = add nuw i32 %.04255, %21
  %31 = sub i32 1100, %30
  %32 = tail call i32 @llvm.abs.i32(i32 %31, i1 true)
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %indvars.iv) #4
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = add nsw i32 %34, %32
  store i32 %35, ptr %33, align 4, !tbaa !5
  %36 = add nuw nsw i32 %.04255, 1
  %exitcond65.not = icmp eq i32 %36, %2
  br i1 %exitcond65.not, label %._crit_edge, label %29, !llvm.loop !13

.preheader49:                                     ; preds = %._crit_edge, %.preheader49
  %indvars.iv68 = phi i64 [ %indvars.iv.next69, %.preheader49 ], [ 1, %._crit_edge ]
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %indvars.iv68) #4
  %38 = add nsw i64 %indvars.iv68, -1
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %38) #4
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %37, ptr noundef nonnull align 4 dereferenceable(4) %39)
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %indvars.iv68) #4
  store i32 %41, ptr %42, align 4, !tbaa !5
  %indvars.iv.next69 = add nuw nsw i64 %indvars.iv68, 1
  %exitcond71.not = icmp eq i64 %indvars.iv.next69, 2000
  br i1 %exitcond71.not, label %.preheader, label %.preheader49, !llvm.loop !14

43:                                               ; preds = %.preheader
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  store i32 100000000, ptr %4, align 4, !tbaa !5
  %44 = add nsw i32 %0, %1
  %45 = icmp slt i32 %44, 2000
  br i1 %45, label %.lr.ph62.preheader, label %._crit_edge63

.lr.ph62.preheader:                               ; preds = %43
  %46 = sext i32 %44 to i64
  %47 = sext i32 %0 to i64
  %48 = sext i32 %1 to i64
  %invariant.op = sub nsw i64 2000, %48
  br label %.lr.ph62

.preheader:                                       ; preds = %.preheader49, %.preheader
  %indvars.iv72 = phi i64 [ %indvars.iv.next73, %.preheader ], [ 1998, %.preheader49 ]
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %indvars.iv72) #4
  %50 = add nuw nsw i64 %indvars.iv72, 1
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %50) #4
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %49, ptr noundef nonnull align 4 dereferenceable(4) %51)
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %indvars.iv72) #4
  store i32 %53, ptr %54, align 4, !tbaa !5
  %indvars.iv.next73 = add nsw i64 %indvars.iv72, -1
  %.not = icmp eq i64 %indvars.iv72, 0
  br i1 %.not, label %43, label %.preheader, !llvm.loop !15

._crit_edge63:                                    ; preds = %.lr.ph62, %43
  %55 = phi i32 [ 100000000, %43 ], [ %66, %.lr.ph62 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  ret i32 %55

.lr.ph62:                                         ; preds = %.lr.ph62.preheader, %.lr.ph62
  %indvars.iv77 = phi i64 [ %47, %.lr.ph62.preheader ], [ %indvars.iv.next78, %.lr.ph62 ]
  %indvars.iv75 = phi i64 [ %46, %.lr.ph62.preheader ], [ %indvars.iv.next76, %.lr.ph62 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  %56 = sub nsw i64 %indvars.iv77, %47
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AR, i64 noundef %56) #4
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AG, i64 noundef %indvars.iv77) #4
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = add nsw i32 %60, %58
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @AB, i64 noundef %indvars.iv75) #4
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = add nsw i32 %61, %63
  store i32 %64, ptr %5, align 4, !tbaa !5
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %66 = load i32, ptr %65, align 4, !tbaa !5
  store i32 %66, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  %indvars.iv.next78 = add nsw i64 %indvars.iv77, 1
  %67 = icmp slt i64 %indvars.iv.next78, %invariant.op
  %indvars.iv.next76 = add nsw i64 %indvars.iv75, 1
  br i1 %67, label %.lr.ph62, label %._crit_edge63, !llvm.loop !16
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass