; LLVM IR from eyangch/competitive-programming :: CSES/Additional_Problems/network_breakdown.ll (Z2unii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@par = external dso_local global [100000 x i32], align 16
@sz = external dso_local global [100000 x i32], align 16
@components = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z4findi(i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z2unii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = call noundef i32 @_Z4findi(i32 noundef %5)
  store i32 %6, ptr %3, align 4, !tbaa !5
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = call noundef i32 @_Z4findi(i32 noundef %7)
  store i32 %8, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = icmp eq i32 %9, %10
  br i1 %11, label %12, label %13

12:                                               ; preds = %2
  br label %40

13:                                               ; preds = %2
  %14 = load i32, ptr @components, align 4, !tbaa !5
  %15 = add nsw i32 %14, -1
  store i32 %15, ptr @components, align 4, !tbaa !5
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %17
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp slt i32 %19, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %13
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4) #2
  br label %26

26:                                               ; preds = %25, %13
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [100000 x i32], ptr @par, i64 0, i64 %29
  store i32 %27, ptr %30, align 4, !tbaa !5
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = add nsw i32 %38, %34
  store i32 %39, ptr %37, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %26, %12
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@par = external dso_local local_unnamed_addr global [100000 x i32], align 16
@sz = external dso_local local_unnamed_addr global [100000 x i32], align 16
@components = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z4findi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z2unii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = tail call noundef i32 @_Z4findi(i32 noundef %0)
  store i32 %5, ptr %3, align 4, !tbaa !5
  %6 = tail call noundef i32 @_Z4findi(i32 noundef %1)
  store i32 %6, ptr %4, align 4, !tbaa !5
  %7 = icmp eq i32 %5, %6
  br i1 %7, label %26, label %8

8:                                                ; preds = %2
  %9 = load i32, ptr @components, align 4, !tbaa !5
  %10 = add nsw i32 %9, -1
  store i32 %10, ptr @components, align 4, !tbaa !5
  %11 = sext i32 %5 to i64
  %12 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %11
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = sext i32 %6 to i64
  %15 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = icmp slt i32 %13, %16
  br i1 %17, label %18, label %19

18:                                               ; preds = %8
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4) #2
  %.pre = load i32, ptr %3, align 4, !tbaa !5
  %.pre1 = load i32, ptr %4, align 4, !tbaa !5
  %.phi.trans.insert = sext i32 %.pre1 to i64
  %.phi.trans.insert2 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %.phi.trans.insert
  %.pre3 = load i32, ptr %.phi.trans.insert2, align 4, !tbaa !5
  %.phi.trans.insert4 = sext i32 %.pre to i64
  %.phi.trans.insert5 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %.phi.trans.insert4
  %.pre6 = load i32, ptr %.phi.trans.insert5, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %18, %8
  %.pre-phi7 = phi i64 [ %.phi.trans.insert4, %18 ], [ %11, %8 ]
  %.pre-phi = phi i64 [ %.phi.trans.insert, %18 ], [ %14, %8 ]
  %20 = phi i32 [ %.pre6, %18 ], [ %13, %8 ]
  %21 = phi i32 [ %.pre3, %18 ], [ %16, %8 ]
  %22 = phi i32 [ %.pre, %18 ], [ %5, %8 ]
  %23 = getelementptr inbounds [100000 x i32], ptr @par, i64 0, i64 %.pre-phi
  store i32 %22, ptr %23, align 4, !tbaa !5
  %24 = getelementptr inbounds [100000 x i32], ptr @sz, i64 0, i64 %.pre-phi7
  %25 = add nsw i32 %20, %21
  store i32 %25, ptr %24, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %2, %19
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: BDCEPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,SimplifyCFGPass,TailCallElimPass