; LLVM IR from xirc/cp-algorithm :: atcoder/abc092/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@N = external dso_local global i32, align 4
@A = external dso_local global %"class.std::vector", align 8
@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__._Z5solvev = external hidden unnamed_addr constant [13 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #0 {
  %1 = alloca i64, align 8
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = load i32, ptr @N, align 4, !tbaa !5
  %8 = icmp sge i32 %7, 2
  br i1 %8, label %9, label %10

9:                                                ; preds = %0
  br label %12

10:                                               ; preds = %0
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.2, i32 noundef 10, ptr noundef @__PRETTY_FUNCTION__._Z5solvev) #6
  unreachable

11:                                               ; No predecessors!
  br label %12

12:                                               ; preds = %11, %9
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #7
  %13 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #7
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = call i32 @llvm.abs.i32(i32 %14, i1 true)
  %16 = sext i32 %15 to i64
  store i64 %16, ptr %1, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #7
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %37, %12
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = load i32, ptr @N, align 4, !tbaa !5
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #7
  br label %40

22:                                               ; preds = %17
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %24) #7
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = load i32, ptr %2, align 4, !tbaa !5
  %28 = sub nsw i32 %27, 1
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %29) #7
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = sub nsw i32 %26, %31
  %33 = call i32 @llvm.abs.i32(i32 %32, i1 true)
  %34 = sext i32 %33 to i64
  %35 = load i64, ptr %1, align 8, !tbaa !9
  %36 = add nsw i64 %35, %34
  store i64 %36, ptr %1, align 8, !tbaa !9
  br label %37

37:                                               ; preds = %22
  %38 = load i32, ptr %2, align 4, !tbaa !5
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %2, align 4, !tbaa !5
  br label %17, !llvm.loop !11

40:                                               ; preds = %21
  %41 = load i32, ptr @N, align 4, !tbaa !5
  %42 = sub nsw i32 %41, 1
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %43) #7
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = call i32 @llvm.abs.i32(i32 %45, i1 true)
  %47 = sext i32 %46 to i64
  %48 = load i64, ptr %1, align 8, !tbaa !9
  %49 = add nsw i64 %48, %47
  store i64 %49, ptr %1, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #7
  %50 = load i64, ptr %1, align 8, !tbaa !9
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #7
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = call i32 @llvm.abs.i32(i32 %52, i1 true)
  %54 = sext i32 %53 to i64
  %55 = sub nsw i64 %50, %54
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 1) #7
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #7
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = sub nsw i32 %57, %59
  %61 = call i32 @llvm.abs.i32(i32 %60, i1 true)
  %62 = sext i32 %61 to i64
  %63 = sub nsw i64 %55, %62
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 1) #7
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = call i32 @llvm.abs.i32(i32 %65, i1 true)
  %67 = sext i32 %66 to i64
  %68 = add nsw i64 %63, %67
  store i64 %68, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #7
  %69 = load i64, ptr %1, align 8, !tbaa !9
  %70 = load i32, ptr @N, align 4, !tbaa !5
  %71 = sub nsw i32 %70, 1
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %72) #7
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = call i32 @llvm.abs.i32(i32 %74, i1 true)
  %76 = sext i32 %75 to i64
  %77 = sub nsw i64 %69, %76
  %78 = load i32, ptr @N, align 4, !tbaa !5
  %79 = sub nsw i32 %78, 1
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %80) #7
  %82 = load i32, ptr %81, align 4, !tbaa !5
  %83 = load i32, ptr @N, align 4, !tbaa !5
  %84 = sub nsw i32 %83, 2
  %85 = sext i32 %84 to i64
  %86 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %85) #7
  %87 = load i32, ptr %86, align 4, !tbaa !5
  %88 = sub nsw i32 %82, %87
  %89 = call i32 @llvm.abs.i32(i32 %88, i1 true)
  %90 = sext i32 %89 to i64
  %91 = sub nsw i64 %77, %90
  %92 = load i32, ptr @N, align 4, !tbaa !5
  %93 = sub nsw i32 %92, 2
  %94 = sext i32 %93 to i64
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %94) #7
  %96 = load i32, ptr %95, align 4, !tbaa !5
  %97 = call i32 @llvm.abs.i32(i32 %96, i1 true)
  %98 = sext i32 %97 to i64
  %99 = add nsw i64 %91, %98
  store i64 %99, ptr %4, align 8, !tbaa !9
  %100 = load i64, ptr %3, align 8, !tbaa !9
  %101 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %100)
  %102 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %101, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #7
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %103

103:                                              ; preds = %154, %40
  %104 = load i32, ptr %5, align 4, !tbaa !5
  %105 = load i32, ptr @N, align 4, !tbaa !5
  %106 = sub nsw i32 %105, 1
  %107 = icmp slt i32 %104, %106
  br i1 %107, label %109, label %108

108:                                              ; preds = %103
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #7
  br label %157

109:                                              ; preds = %103
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #7
  %110 = load i64, ptr %1, align 8, !tbaa !9
  %111 = load i32, ptr %5, align 4, !tbaa !5
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %112) #7
  %114 = load i32, ptr %113, align 4, !tbaa !5
  %115 = load i32, ptr %5, align 4, !tbaa !5
  %116 = sub nsw i32 %115, 1
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %117) #7
  %119 = load i32, ptr %118, align 4, !tbaa !5
  %120 = sub nsw i32 %114, %119
  %121 = call i32 @llvm.abs.i32(i32 %120, i1 true)
  %122 = sext i32 %121 to i64
  %123 = sub nsw i64 %110, %122
  %124 = load i32, ptr %5, align 4, !tbaa !5
  %125 = sext i32 %124 to i64
  %126 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %125) #7
  %127 = load i32, ptr %126, align 4, !tbaa !5
  %128 = load i32, ptr %5, align 4, !tbaa !5
  %129 = add nsw i32 %128, 1
  %130 = sext i32 %129 to i64
  %131 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %130) #7
  %132 = load i32, ptr %131, align 4, !tbaa !5
  %133 = sub nsw i32 %127, %132
  %134 = call i32 @llvm.abs.i32(i32 %133, i1 true)
  %135 = sext i32 %134 to i64
  %136 = sub nsw i64 %123, %135
  %137 = load i32, ptr %5, align 4, !tbaa !5
  %138 = sub nsw i32 %137, 1
  %139 = sext i32 %138 to i64
  %140 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %139) #7
  %141 = load i32, ptr %140, align 4, !tbaa !5
  %142 = load i32, ptr %5, align 4, !tbaa !5
  %143 = add nsw i32 %142, 1
  %144 = sext i32 %143 to i64
  %145 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %144) #7
  %146 = load i32, ptr %145, align 4, !tbaa !5
  %147 = sub nsw i32 %141, %146
  %148 = call i32 @llvm.abs.i32(i32 %147, i1 true)
  %149 = sext i32 %148 to i64
  %150 = add nsw i64 %136, %149
  store i64 %150, ptr %6, align 8, !tbaa !9
  %151 = load i64, ptr %6, align 8, !tbaa !9
  %152 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %151)
  %153 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %152, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #7
  br label %154

154:                                              ; preds = %109
  %155 = load i32, ptr %5, align 4, !tbaa !5
  %156 = add nsw i32 %155, 1
  store i32 %156, ptr %5, align 4, !tbaa !5
  br label %103, !llvm.loop !13

157:                                              ; preds = %108
  %158 = load i64, ptr %4, align 8, !tbaa !9
  %159 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %158)
  %160 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %159, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #7
  ret void
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #5

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn nounwind }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@A = external dso_local global %"class.std::vector", align 8
@.str = external hidden unnamed_addr constant [7 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [77 x i8], align 1
@__PRETTY_FUNCTION__._Z5solvev = external hidden unnamed_addr constant [13 x i8], align 1
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 1
  br i1 %2, label %4, label %3

3:                                                ; preds = %0
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.2, i32 noundef 10, ptr noundef nonnull @__PRETTY_FUNCTION__._Z5solvev) #5
  unreachable

4:                                                ; preds = %0
  %5 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #6
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = tail call i32 @llvm.abs.i32(i32 %6, i1 true)
  %8 = zext nneg i32 %7 to i64
  %9 = load i32, ptr @N, align 4, !tbaa !5
  %10 = icmp sgt i32 %9, 1
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %4
  %.0.lcssa = phi i64 [ %8, %4 ], [ %66, %.lr.ph ]
  %.lcssa = phi i32 [ %9, %4 ], [ %67, %.lr.ph ]
  %11 = add nsw i32 %.lcssa, -1
  %12 = sext i32 %11 to i64
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %12) #6
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = tail call i32 @llvm.abs.i32(i32 %14, i1 true)
  %16 = zext nneg i32 %15 to i64
  %17 = add nuw nsw i64 %.0.lcssa, %16
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #6
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = tail call i32 @llvm.abs.i32(i32 %19, i1 true)
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 1) #6
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 0) #6
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = sub nsw i32 %22, %24
  %26 = tail call i32 @llvm.abs.i32(i32 %25, i1 true)
  %narrow = add nuw i32 %26, %20
  %27 = zext i32 %narrow to i64
  %28 = sub i64 %17, %27
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef 1) #6
  %30 = load i32, ptr %29, align 4, !tbaa !5
  %31 = tail call i32 @llvm.abs.i32(i32 %30, i1 true)
  %32 = zext nneg i32 %31 to i64
  %33 = add nsw i64 %28, %32
  %34 = load i32, ptr @N, align 4, !tbaa !5
  %35 = add nsw i32 %34, -1
  %36 = sext i32 %35 to i64
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %36) #6
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = load i32, ptr @N, align 4, !tbaa !5
  %40 = add nsw i32 %39, -1
  %41 = sext i32 %40 to i64
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %41) #6
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = load i32, ptr @N, align 4, !tbaa !5
  %45 = add nsw i32 %44, -2
  %46 = sext i32 %45 to i64
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %46) #6
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = load i32, ptr @N, align 4, !tbaa !5
  %50 = add nsw i32 %49, -2
  %51 = sext i32 %50 to i64
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %51) #6
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %33)
  %55 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %54, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %56 = load i32, ptr @N, align 4, !tbaa !5
  %57 = icmp sgt i32 %56, 2
  br i1 %57, label %.lr.ph32, label %._crit_edge33

.lr.ph:                                           ; preds = %4, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 1, %4 ]
  %.028 = phi i64 [ %66, %.lr.ph ], [ %8, %4 ]
  %58 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv) #6
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = add nsw i64 %indvars.iv, -1
  %61 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %60) #6
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %63 = sub nsw i32 %59, %62
  %64 = tail call i32 @llvm.abs.i32(i32 %63, i1 true)
  %65 = zext nneg i32 %64 to i64
  %66 = add nuw nsw i64 %.028, %65
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %67 = load i32, ptr @N, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = icmp slt i64 %indvars.iv.next, %68
  br i1 %69, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge33:                                    ; preds = %.lr.ph32, %._crit_edge
  %70 = tail call i32 @llvm.abs.i32(i32 %38, i1 true)
  %71 = sub nsw i32 %43, %48
  %72 = tail call i32 @llvm.abs.i32(i32 %71, i1 true)
  %narrow23 = add nuw i32 %72, %70
  %73 = zext i32 %narrow23 to i64
  %74 = sub i64 %17, %73
  %75 = tail call i32 @llvm.abs.i32(i32 %53, i1 true)
  %76 = zext nneg i32 %75 to i64
  %77 = add nsw i64 %74, %76
  %78 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %77)
  %79 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %78, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  ret void

.lr.ph32:                                         ; preds = %._crit_edge, %.lr.ph32
  %indvars.iv37 = phi i64 [ %indvars.iv.next38, %.lr.ph32 ], [ 1, %._crit_edge ]
  %80 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv37) #6
  %81 = load i32, ptr %80, align 4, !tbaa !5
  %82 = add nsw i64 %indvars.iv37, -1
  %83 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %82) #6
  %84 = load i32, ptr %83, align 4, !tbaa !5
  %85 = sub nsw i32 %81, %84
  %86 = tail call i32 @llvm.abs.i32(i32 %85, i1 true)
  %87 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv37) #6
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %indvars.iv.next38 = add nuw nsw i64 %indvars.iv37, 1
  %89 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv.next38) #6
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = sub nsw i32 %88, %90
  %92 = tail call i32 @llvm.abs.i32(i32 %91, i1 true)
  %narrow24 = add nuw i32 %92, %86
  %93 = zext i32 %narrow24 to i64
  %94 = sub i64 %17, %93
  %95 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %82) #6
  %96 = load i32, ptr %95, align 4, !tbaa !5
  %97 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv.next38) #6
  %98 = load i32, ptr %97, align 4, !tbaa !5
  %99 = sub nsw i32 %96, %98
  %100 = tail call i32 @llvm.abs.i32(i32 %99, i1 true)
  %101 = zext nneg i32 %100 to i64
  %102 = add nsw i64 %94, %101
  %103 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %102)
  %104 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %103, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %105 = load i32, ptr @N, align 4, !tbaa !5
  %106 = add nsw i32 %105, -1
  %107 = sext i32 %106 to i64
  %108 = icmp slt i64 %indvars.iv.next38, %107
  br i1 %108, label %.lr.ph32, label %._crit_edge33, !llvm.loop !11
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass