; LLVM IR from eyangch/competitive-programming :: Codeforces/gym_103034_ZSAprilFools2021/e.ll (Z3dfsi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unordered_set" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::pair" = type <{ %"struct.std::__detail::_Node_iterator", i8, [7 x i8] }>
%"struct.std::__detail::_Node_iterator" = type { %"struct.std::__detail::_Node_iterator_base" }
%"struct.std::__detail::_Node_iterator_base" = type { ptr }

@N = external dso_local global i32, align 4
@rt = external dso_local global i64, align 8
@sum = external dso_local global i64, align 8
@ans = external dso_local global %"class.std::unordered_set", align 8
@cur = external dso_local global %"class.std::vector", align 8
@targ = external dso_local global i64, align 8
@ops = external dso_local global i32, align 4
@maxops = external dso_local global i32, align 4
@tamt = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsi(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca %"struct.std::pair", align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  %6 = load i64, ptr @rt, align 8, !tbaa !9
  %7 = load i64, ptr @targ, align 8, !tbaa !9
  %8 = icmp sle i64 %6, %7
  br i1 %8, label %9, label %20

9:                                                ; preds = %1
  %10 = load i64, ptr @rt, align 8, !tbaa !9
  %11 = load i64, ptr @targ, align 8, !tbaa !9
  %12 = icmp eq i64 %10, %11
  br i1 %12, label %13, label %19

13:                                               ; preds = %9
  %14 = call { ptr, i8 } @_ZNSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE6insertERKS2_(ptr noundef nonnull align 8 dereferenceable(56) @ans, ptr noundef nonnull align 8 dereferenceable(24) @cur)
  %15 = getelementptr inbounds { ptr, i8 }, ptr %3, i32 0, i32 0
  %16 = extractvalue { ptr, i8 } %14, 0
  store ptr %16, ptr %15, align 8
  %17 = getelementptr inbounds { ptr, i8 }, ptr %3, i32 0, i32 1
  %18 = extractvalue { ptr, i8 } %14, 1
  store i8 %18, ptr %17, align 8
  br label %19

19:                                               ; preds = %13, %9
  br label %110

20:                                               ; preds = %1
  %21 = load i32, ptr @ops, align 4, !tbaa !5
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr @ops, align 4, !tbaa !5
  %23 = load i32, ptr @ops, align 4, !tbaa !5
  %24 = load i32, ptr @maxops, align 4, !tbaa !5
  %25 = icmp sgt i32 %23, %24
  br i1 %25, label %31, label %26

26:                                               ; preds = %20
  %27 = call noundef i64 @_ZNKSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(56) @ans) #3
  %28 = trunc i64 %27 to i32
  %29 = load i32, ptr @tamt, align 4, !tbaa !5
  %30 = icmp eq i32 %28, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %26, %20
  br label %110

32:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %33 = load i32, ptr %2, align 4, !tbaa !5
  store i32 %33, ptr %4, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %105, %32
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = load i32, ptr @N, align 4, !tbaa !5
  %37 = icmp slt i32 %35, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %34
  store i32 2, ptr %5, align 4
  br label %108

39:                                               ; preds = %34
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %41) #3
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = icmp eq i32 %43, 1
  br i1 %44, label %60, label %45

45:                                               ; preds = %39
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = icmp sgt i32 %46, 0
  br i1 %47, label %48, label %61

48:                                               ; preds = %45
  %49 = load i32, ptr %4, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %50) #3
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = sub nsw i32 %52, 1
  %54 = load i32, ptr %4, align 4, !tbaa !5
  %55 = sub nsw i32 %54, 1
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %56) #3
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = icmp slt i32 %53, %58
  br i1 %59, label %60, label %61

60:                                               ; preds = %48, %39
  br label %105

61:                                               ; preds = %48, %45
  %62 = load i64, ptr @sum, align 8, !tbaa !9
  %63 = load i32, ptr %4, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %64) #3
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = sub nsw i64 %62, %67
  %69 = load i64, ptr @rt, align 8, !tbaa !9
  %70 = sub nsw i64 %69, %68
  store i64 %70, ptr @rt, align 8, !tbaa !9
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %72) #3
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = add nsw i32 %74, -1
  store i32 %75, ptr %73, align 4, !tbaa !5
  %76 = load i64, ptr @sum, align 8, !tbaa !9
  %77 = add nsw i64 %76, -1
  store i64 %77, ptr @sum, align 8, !tbaa !9
  %78 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsi(i32 noundef %78)
  %79 = load i32, ptr @ops, align 4, !tbaa !5
  %80 = load i32, ptr @maxops, align 4, !tbaa !5
  %81 = icmp sgt i32 %79, %80
  br i1 %81, label %87, label %82

82:                                               ; preds = %61
  %83 = call noundef i64 @_ZNKSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(56) @ans) #3
  %84 = trunc i64 %83 to i32
  %85 = load i32, ptr @tamt, align 4, !tbaa !5
  %86 = icmp eq i32 %84, %85
  br i1 %86, label %87, label %88

87:                                               ; preds = %82, %61
  store i32 1, ptr %5, align 4
  br label %108

88:                                               ; preds = %82
  %89 = load i64, ptr @sum, align 8, !tbaa !9
  %90 = add nsw i64 %89, 1
  store i64 %90, ptr @sum, align 8, !tbaa !9
  %91 = load i32, ptr %4, align 4, !tbaa !5
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %92) #3
  %94 = load i32, ptr %93, align 4, !tbaa !5
  %95 = add nsw i32 %94, 1
  store i32 %95, ptr %93, align 4, !tbaa !5
  %96 = load i64, ptr @sum, align 8, !tbaa !9
  %97 = load i32, ptr %4, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %98) #3
  %100 = load i32, ptr %99, align 4, !tbaa !5
  %101 = sext i32 %100 to i64
  %102 = sub nsw i64 %96, %101
  %103 = load i64, ptr @rt, align 8, !tbaa !9
  %104 = add nsw i64 %103, %102
  store i64 %104, ptr @rt, align 8, !tbaa !9
  br label %105

105:                                              ; preds = %88, %60
  %106 = load i32, ptr %4, align 4, !tbaa !5
  %107 = add nsw i32 %106, 1
  store i32 %107, ptr %4, align 4, !tbaa !5
  br label %34, !llvm.loop !11

108:                                              ; preds = %87, %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %109 = load i32, ptr %5, align 4
  switch i32 %109, label %111 [
    i32 2, label %110
    i32 1, label %110
  ]

110:                                              ; preds = %108, %108, %31, %19
  ret void

111:                                              ; preds = %108
  unreachable
}

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i8 } @_ZNSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE6insertERKS2_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(56)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unordered_set" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@rt = external dso_local local_unnamed_addr global i64, align 8
@sum = external dso_local local_unnamed_addr global i64, align 8
@ans = external dso_local global %"class.std::unordered_set", align 8
@cur = external dso_local global %"class.std::vector", align 8
@targ = external dso_local local_unnamed_addr global i64, align 8
@ops = external dso_local local_unnamed_addr global i32, align 4
@maxops = external dso_local local_unnamed_addr global i32, align 4
@tamt = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = load i64, ptr @rt, align 8, !tbaa !5
  %3 = load i64, ptr @targ, align 8, !tbaa !5
  %.not = icmp sgt i64 %2, %3
  br i1 %.not, label %8, label %4

4:                                                ; preds = %1
  %5 = icmp eq i64 %2, %3
  br i1 %5, label %6, label %.loopexit

6:                                                ; preds = %4
  %7 = tail call { ptr, i8 } @_ZNSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE6insertERKS2_(ptr noundef nonnull align 8 dereferenceable(56) @ans, ptr noundef nonnull align 8 dereferenceable(24) @cur)
  br label %.loopexit

8:                                                ; preds = %1
  %9 = load i32, ptr @ops, align 4, !tbaa !9
  %10 = add nsw i32 %9, 1
  store i32 %10, ptr @ops, align 4, !tbaa !9
  %11 = load i32, ptr @maxops, align 4, !tbaa !9
  %.not14 = icmp slt i32 %9, %11
  br i1 %.not14, label %12, label %.loopexit

12:                                               ; preds = %8
  %13 = tail call noundef i64 @_ZNKSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(56) @ans) #2
  %14 = trunc i64 %13 to i32
  %15 = load i32, ptr @tamt, align 4, !tbaa !9
  %16 = icmp ne i32 %15, %14
  %17 = load i32, ptr @N, align 4
  %18 = icmp sgt i32 %17, %0
  %or.cond = select i1 %16, i1 %18, i1 false
  br i1 %or.cond, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %12
  %19 = sext i32 %0 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %65
  %indvars.iv = phi i64 [ %19, %.lr.ph.preheader ], [ %indvars.iv.next, %65 ]
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %indvars.iv) #2
  %21 = load i32, ptr %20, align 4, !tbaa !9
  %22 = icmp eq i32 %21, 1
  br i1 %22, label %65, label %23

23:                                               ; preds = %.lr.ph
  %24 = icmp sgt i64 %indvars.iv, 0
  br i1 %24, label %25, label %31

25:                                               ; preds = %23
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %indvars.iv) #2
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = add nsw i64 %indvars.iv, -1
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %28) #2
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %.not15 = icmp sgt i32 %27, %30
  br i1 %.not15, label %31, label %65

31:                                               ; preds = %25, %23
  %32 = load i64, ptr @sum, align 8, !tbaa !5
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %indvars.iv) #2
  %34 = load i32, ptr %33, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %.neg = sub i64 %35, %32
  %36 = load i64, ptr @rt, align 8, !tbaa !5
  %37 = add i64 %.neg, %36
  store i64 %37, ptr @rt, align 8, !tbaa !5
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %indvars.iv) #2
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = add nsw i32 %39, -1
  store i32 %40, ptr %38, align 4, !tbaa !9
  %41 = load i64, ptr @sum, align 8, !tbaa !5
  %42 = add nsw i64 %41, -1
  store i64 %42, ptr @sum, align 8, !tbaa !5
  %43 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsi(i32 noundef %43)
  %44 = load i32, ptr @ops, align 4, !tbaa !9
  %45 = load i32, ptr @maxops, align 4, !tbaa !9
  %46 = icmp sgt i32 %44, %45
  br i1 %46, label %.loopexit, label %47

47:                                               ; preds = %31
  %48 = tail call noundef i64 @_ZNKSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(56) @ans) #2
  %49 = trunc i64 %48 to i32
  %50 = load i32, ptr @tamt, align 4, !tbaa !9
  %51 = icmp eq i32 %50, %49
  br i1 %51, label %.loopexit, label %52

52:                                               ; preds = %47
  %53 = load i64, ptr @sum, align 8, !tbaa !5
  %54 = add nsw i64 %53, 1
  store i64 %54, ptr @sum, align 8, !tbaa !5
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %indvars.iv) #2
  %56 = load i32, ptr %55, align 4, !tbaa !9
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %55, align 4, !tbaa !9
  %58 = load i64, ptr @sum, align 8, !tbaa !5
  %59 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cur, i64 noundef %indvars.iv) #2
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = sext i32 %60 to i64
  %62 = sub i64 %58, %61
  %63 = load i64, ptr @rt, align 8, !tbaa !5
  %64 = add nsw i64 %62, %63
  store i64 %64, ptr @rt, align 8, !tbaa !5
  br label %65

65:                                               ; preds = %.lr.ph, %25, %52
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %66 = load i32, ptr @N, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = icmp slt i64 %indvars.iv.next, %67
  br i1 %68, label %.lr.ph, label %.loopexit, !llvm.loop !11

.loopexit:                                        ; preds = %31, %47, %65, %8, %12, %4, %6
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i8 } @_ZNSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE6insertERKS2_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt13unordered_setISt6vectorIiSaIiEE8vec_hashSt8equal_toIS2_ESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass