; LLVM IR from HarshCasper/NeoAlgo :: C/math (Kaprekar_no)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @kaprekar(i32 noundef %0) #1 {
  %2 = alloca i1, align 1
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = icmp eq i32 %12, 1
  br i1 %13, label %14, label %15

14:                                               ; preds = %1
  store i1 true, ptr %2, align 1
  br label %70

15:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = mul nsw i32 %16, %17
  store i32 %18, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %22, %15
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %27

22:                                               ; preds = %19
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %5, align 4, !tbaa !5
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sdiv i32 %25, 10
  store i32 %26, ptr %4, align 4, !tbaa !5
  br label %19, !llvm.loop !9

27:                                               ; preds = %19
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = mul nsw i32 %28, %29
  store i32 %30, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %63, %27
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = load i32, ptr %5, align 4, !tbaa !5
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %31
  store i32 4, ptr %7, align 4
  br label %66

36:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = sitofp i32 %37 to double
  %39 = call double @pow(double noundef 1.000000e+01, double noundef %38) #3
  %40 = fptosi double %39 to i32
  store i32 %40, ptr %8, align 4, !tbaa !5
  %41 = load i32, ptr %8, align 4, !tbaa !5
  %42 = load i32, ptr %3, align 4, !tbaa !5
  %43 = icmp eq i32 %41, %42
  br i1 %43, label %44, label %45

44:                                               ; preds = %36
  store i32 6, ptr %7, align 4
  br label %60

45:                                               ; preds = %36
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = sdiv i32 %46, %47
  store i32 %48, ptr %9, align 4, !tbaa !5
  %49 = load i32, ptr %4, align 4, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = srem i32 %49, %50
  store i32 %51, ptr %10, align 4, !tbaa !5
  %52 = load i32, ptr %9, align 4, !tbaa !5
  %53 = load i32, ptr %10, align 4, !tbaa !5
  %54 = add nsw i32 %52, %53
  store i32 %54, ptr %11, align 4, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !5
  %56 = load i32, ptr %3, align 4, !tbaa !5
  %57 = icmp eq i32 %55, %56
  br i1 %57, label %58, label %59

58:                                               ; preds = %45
  store i1 true, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %60

59:                                               ; preds = %45
  store i32 0, ptr %7, align 4
  br label %60

60:                                               ; preds = %59, %58, %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %61 = load i32, ptr %7, align 4
  switch i32 %61, label %66 [
    i32 0, label %62
    i32 6, label %63
  ]

62:                                               ; preds = %60
  br label %63

63:                                               ; preds = %62, %60
  %64 = load i32, ptr %6, align 4, !tbaa !5
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %6, align 4, !tbaa !5
  br label %31, !llvm.loop !11

66:                                               ; preds = %60, %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %67 = load i32, ptr %7, align 4
  switch i32 %67, label %69 [
    i32 4, label %68
  ]

68:                                               ; preds = %66
  store i1 false, ptr %2, align 1
  store i32 1, ptr %7, align 4
  br label %69

69:                                               ; preds = %68, %66
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %70

70:                                               ; preds = %69, %14
  %71 = load i1, ptr %2, align 1
  ret i1 %71
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare double @pow(double noundef, double noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree nounwind memory(write) uwtable
define dso_local noundef zeroext i1 @kaprekar(i32 noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq i32 %0, 1
  br i1 %2, label %.critedge, label %3

3:                                                ; preds = %1
  %4 = mul nsw i32 %0, %0
  %.not33 = icmp eq i32 %0, 0
  br i1 %.not33, label %.critedge, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph
  %.not3136.not = icmp eq i32 %.02534, 0
  br i1 %.not3136.not, label %.critedge, label %.lr.ph38

.lr.ph:                                           ; preds = %3, %.lr.ph
  %.02435 = phi i32 [ %6, %.lr.ph ], [ %4, %3 ]
  %.02534 = phi i32 [ %5, %.lr.ph ], [ 0, %3 ]
  %5 = add nuw nsw i32 %.02534, 1
  %6 = sdiv i32 %.02435, 10
  %.02435.off = add i32 %.02435, 9
  %.not = icmp ult i32 %.02435.off, 19
  br i1 %.not, label %.preheader, label %.lr.ph, !llvm.loop !5

.lr.ph38:                                         ; preds = %.preheader, %16
  %.02637 = phi i32 [ %17, %16 ], [ 1, %.preheader ]
  %7 = uitofp nneg i32 %.02637 to double
  %8 = tail call double @pow(double noundef 1.000000e+01, double noundef %7) #2
  %9 = fptosi double %8 to i32
  %10 = icmp eq i32 %9, %0
  br i1 %10, label %16, label %11

11:                                               ; preds = %.lr.ph38
  %12 = sdiv i32 %4, %9
  %13 = srem i32 %4, %9
  %14 = add nsw i32 %13, %12
  %15 = icmp eq i32 %14, %0
  br i1 %15, label %.critedge, label %16

16:                                               ; preds = %.lr.ph38, %11
  %17 = add nuw i32 %.02637, 1
  %exitcond.not = icmp eq i32 %.02637, %.02534
  br i1 %exitcond.not, label %.critedge, label %.lr.ph38, !llvm.loop !7

.critedge:                                        ; preds = %16, %11, %3, %.preheader, %1
  %.4 = phi i1 [ true, %1 ], [ false, %.preheader ], [ false, %3 ], [ false, %16 ], [ true, %11 ]
  ret i1 %.4
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @pow(double noundef, double noundef) local_unnamed_addr #1

attributes #0 = { nofree nounwind memory(write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass