; LLVM IR from xirc/cp-algorithm :: atcoder/abc007/D/main.ll (Z5buildv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@DP = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5pow10i(i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5buildv() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #2
  %6 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef 4) #2
  store i64 1, ptr %6, align 8, !tbaa !5
  %7 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #2
  %8 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef 9) #2
  store i64 1, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 1, ptr %1, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %26, %0
  %10 = load i32, ptr %1, align 4, !tbaa !9
  %11 = icmp slt i32 %10, 10
  br i1 %11, label %13, label %12

12:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %29

13:                                               ; preds = %9
  %14 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #2
  %15 = load i32, ptr %1, align 4, !tbaa !9
  %16 = sub nsw i32 %15, 1
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %17) #2
  %19 = load i64, ptr %18, align 8, !tbaa !5
  %20 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #2
  %21 = load i32, ptr %1, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %22) #2
  %24 = load i64, ptr %23, align 8, !tbaa !5
  %25 = add nsw i64 %24, %19
  store i64 %25, ptr %23, align 8, !tbaa !5
  br label %26

26:                                               ; preds = %13
  %27 = load i32, ptr %1, align 4, !tbaa !9
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %1, align 4, !tbaa !9
  br label %9, !llvm.loop !11

29:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 1, ptr %2, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %104, %29
  %31 = load i32, ptr %2, align 4, !tbaa !9
  %32 = icmp slt i32 %31, 18
  br i1 %32, label %34, label %33

33:                                               ; preds = %30
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  br label %107

34:                                               ; preds = %30
  %35 = load i32, ptr %2, align 4, !tbaa !9
  %36 = sub nsw i32 %35, 1
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %37) #2
  %39 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef 9) #2
  %40 = load i64, ptr %39, align 8, !tbaa !5
  %41 = load i32, ptr %2, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %42) #2
  %44 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef 0) #2
  %45 = load i64, ptr %44, align 8, !tbaa !5
  %46 = add nsw i64 %45, %40
  store i64 %46, ptr %44, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %100, %34
  %48 = load i32, ptr %4, align 4, !tbaa !9
  %49 = icmp slt i32 %48, 10
  br i1 %49, label %51, label %50

50:                                               ; preds = %47
  store i32 8, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %103

51:                                               ; preds = %47
  %52 = load i32, ptr %2, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %53) #2
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = sub nsw i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %57) #2
  %59 = load i64, ptr %58, align 8, !tbaa !5
  %60 = load i32, ptr %2, align 4, !tbaa !9
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %61) #2
  %63 = load i32, ptr %4, align 4, !tbaa !9
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %64) #2
  %66 = load i64, ptr %65, align 8, !tbaa !5
  %67 = add nsw i64 %66, %59
  store i64 %67, ptr %65, align 8, !tbaa !5
  %68 = load i32, ptr %4, align 4, !tbaa !9
  %69 = icmp eq i32 %68, 4
  br i1 %69, label %73, label %70

70:                                               ; preds = %51
  %71 = load i32, ptr %4, align 4, !tbaa !9
  %72 = icmp eq i32 %71, 9
  br i1 %72, label %73, label %84

73:                                               ; preds = %70, %51
  %74 = load i32, ptr %2, align 4, !tbaa !9
  %75 = call noundef i64 @_Z5pow10i(i32 noundef %74)
  %76 = load i32, ptr %2, align 4, !tbaa !9
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %77) #2
  %79 = load i32, ptr %4, align 4, !tbaa !9
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %80) #2
  %82 = load i64, ptr %81, align 8, !tbaa !5
  %83 = add nsw i64 %82, %75
  store i64 %83, ptr %81, align 8, !tbaa !5
  br label %99

84:                                               ; preds = %70
  %85 = load i32, ptr %2, align 4, !tbaa !9
  %86 = sub nsw i32 %85, 1
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %87) #2
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef 9) #2
  %90 = load i64, ptr %89, align 8, !tbaa !5
  %91 = load i32, ptr %2, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %92) #2
  %94 = load i32, ptr %4, align 4, !tbaa !9
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %95) #2
  %97 = load i64, ptr %96, align 8, !tbaa !5
  %98 = add nsw i64 %97, %90
  store i64 %98, ptr %96, align 8, !tbaa !5
  br label %99

99:                                               ; preds = %84, %73
  br label %100

100:                                              ; preds = %99
  %101 = load i32, ptr %4, align 4, !tbaa !9
  %102 = add nsw i32 %101, 1
  store i32 %102, ptr %4, align 4, !tbaa !9
  br label %47, !llvm.loop !13

103:                                              ; preds = %50
  br label %104

104:                                              ; preds = %103
  %105 = load i32, ptr %2, align 4, !tbaa !9
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %2, align 4, !tbaa !9
  br label %30, !llvm.loop !14

107:                                              ; preds = %33
  %108 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 17) #2
  %109 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %108, i64 noundef 9) #2
  %110 = load i64, ptr %109, align 8, !tbaa !5
  %111 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 18) #2
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %111, i64 noundef 0) #2
  store i64 %110, ptr %112, align 8, !tbaa !5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@DP = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5pow10i(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5buildv() local_unnamed_addr #0 {
.preheader.preheader:
  %0 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %1 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 4) #1
  store i64 1, ptr %1, align 8, !tbaa !5
  %2 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %3 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 9) #1
  store i64 1, ptr %3, align 8, !tbaa !5
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef 0) #1
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef 1) #1
  %9 = load i64, ptr %8, align 8, !tbaa !5
  %10 = add nsw i64 %9, %6
  store i64 %10, ptr %8, align 8, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef 1) #1
  %13 = load i64, ptr %12, align 8, !tbaa !5
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef 2) #1
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = add nsw i64 %16, %13
  store i64 %17, ptr %15, align 8, !tbaa !5
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef 2) #1
  %20 = load i64, ptr %19, align 8, !tbaa !5
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %22 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef 3) #1
  %23 = load i64, ptr %22, align 8, !tbaa !5
  %24 = add nsw i64 %23, %20
  store i64 %24, ptr %22, align 8, !tbaa !5
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %26 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef 3) #1
  %27 = load i64, ptr %26, align 8, !tbaa !5
  %28 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %29 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef 4) #1
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = add nsw i64 %30, %27
  store i64 %31, ptr %29, align 8, !tbaa !5
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %33 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef 4) #1
  %34 = load i64, ptr %33, align 8, !tbaa !5
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %36 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef 5) #1
  %37 = load i64, ptr %36, align 8, !tbaa !5
  %38 = add nsw i64 %37, %34
  store i64 %38, ptr %36, align 8, !tbaa !5
  %39 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %40 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef 5) #1
  %41 = load i64, ptr %40, align 8, !tbaa !5
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %43 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef 6) #1
  %44 = load i64, ptr %43, align 8, !tbaa !5
  %45 = add nsw i64 %44, %41
  store i64 %45, ptr %43, align 8, !tbaa !5
  %46 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %47 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef 6) #1
  %48 = load i64, ptr %47, align 8, !tbaa !5
  %49 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %50 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef 7) #1
  %51 = load i64, ptr %50, align 8, !tbaa !5
  %52 = add nsw i64 %51, %48
  store i64 %52, ptr %50, align 8, !tbaa !5
  %53 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %54 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef 7) #1
  %55 = load i64, ptr %54, align 8, !tbaa !5
  %56 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %57 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef 8) #1
  %58 = load i64, ptr %57, align 8, !tbaa !5
  %59 = add nsw i64 %58, %55
  store i64 %59, ptr %57, align 8, !tbaa !5
  %60 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %61 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef 8) #1
  %62 = load i64, ptr %61, align 8, !tbaa !5
  %63 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 0) #1
  %64 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef 9) #1
  %65 = load i64, ptr %64, align 8, !tbaa !5
  %66 = add nsw i64 %65, %62
  store i64 %66, ptr %64, align 8, !tbaa !5
  br label %.preheader

67:                                               ; preds = %82
  %68 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 17) #1
  %69 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef 9) #1
  %70 = load i64, ptr %69, align 8, !tbaa !5
  %71 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef 18) #1
  %72 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef 0) #1
  store i64 %70, ptr %72, align 8, !tbaa !5
  ret void

.preheader:                                       ; preds = %.preheader.preheader, %82
  %indvars.iv30 = phi i64 [ 1, %.preheader.preheader ], [ %indvars.iv.next31, %82 ]
  %73 = add nsw i64 %indvars.iv30, -1
  %74 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %73) #1
  %75 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef 9) #1
  %76 = load i64, ptr %75, align 8, !tbaa !5
  %77 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %indvars.iv30) #1
  %78 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef 0) #1
  %79 = load i64, ptr %78, align 8, !tbaa !5
  %80 = add nsw i64 %79, %76
  store i64 %80, ptr %78, align 8, !tbaa !5
  %81 = trunc nuw nsw i64 %indvars.iv30 to i32
  br label %83

82:                                               ; preds = %99
  %indvars.iv.next31 = add nuw nsw i64 %indvars.iv30, 1
  %exitcond33.not = icmp eq i64 %indvars.iv.next31, 18
  br i1 %exitcond33.not, label %67, label %.preheader, !llvm.loop !9

83:                                               ; preds = %.preheader, %99
  %indvars.iv = phi i64 [ 1, %.preheader ], [ %indvars.iv.next, %99 ]
  %84 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %indvars.iv30) #1
  %85 = add nsw i64 %indvars.iv, -1
  %86 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %85) #1
  %87 = load i64, ptr %86, align 8, !tbaa !5
  %88 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %indvars.iv30) #1
  %89 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %indvars.iv) #1
  %90 = load i64, ptr %89, align 8, !tbaa !5
  %91 = add nsw i64 %90, %87
  store i64 %91, ptr %89, align 8, !tbaa !5
  %92 = trunc nuw nsw i64 %indvars.iv to i32
  switch i32 %92, label %95 [
    i32 9, label %93
    i32 4, label %93
  ]

93:                                               ; preds = %83, %83
  %94 = tail call noundef i64 @_Z5pow10i(i32 noundef %81)
  br label %99

95:                                               ; preds = %83
  %96 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %73) #1
  %97 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef 9) #1
  %98 = load i64, ptr %97, align 8, !tbaa !5
  br label %99

99:                                               ; preds = %93, %95
  %.sink36 = phi i64 [ %94, %93 ], [ %98, %95 ]
  %100 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @DP, i64 noundef %indvars.iv30) #1
  %101 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %indvars.iv) #1
  %102 = load i64, ptr %101, align 8, !tbaa !5
  %103 = add nsw i64 %102, %.sink36
  store i64 %103, ptr %101, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 10
  br i1 %exitcond.not, label %82, label %83, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass