; LLVM IR from USDA-ARS-ACSL/MAIZSIM :: Crop source/nodalunit.ll (ZN10CNodalUnit10initializeEiP12CDevelopment)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.CNodalUnit = type { i32, i8, i8, i8, i8, i8, i8, ptr, ptr, double }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10CNodalUnit10initializeEiP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(40) %0, i32 noundef %1, ptr noundef %2) #0 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %9 = load ptr, ptr %4, align 8
  %10 = load i32, ptr %5, align 4, !tbaa !9
  %11 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 0
  store i32 %10, ptr %11, align 8, !tbaa !11
  %12 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 1256) #5
  %13 = load i32, ptr %5, align 4, !tbaa !9
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  invoke void @_ZN5CLeafC1EiP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256) %12, i32 noundef %13, ptr noundef %14)
          to label %15 unwind label %38

15:                                               ; preds = %3
  %16 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 7
  store ptr %12, ptr %16, align 8, !tbaa !15
  %17 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 888) #5
  %18 = load i32, ptr %5, align 4, !tbaa !9
  invoke void @_ZN5CStemC1Ei(ptr noundef nonnull align 8 dereferenceable(888) %17, i32 noundef %18)
          to label %19 unwind label %42

19:                                               ; preds = %15
  %20 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 8
  store ptr %17, ptr %20, align 8, !tbaa !16
  %21 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 7
  %22 = load ptr, ptr %21, align 8, !tbaa !15
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_ZN5CLeaf10initializeEP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256) %22, ptr noundef %23)
  %24 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 8
  %25 = load ptr, ptr %24, align 8, !tbaa !16
  %26 = load ptr, ptr %25, align 8, !tbaa !17
  %27 = getelementptr inbounds ptr, ptr %26, i64 14
  %28 = load ptr, ptr %27, align 8
  call void %28(ptr noundef nonnull align 8 dereferenceable(864) %25)
  %29 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 7
  %30 = load ptr, ptr %29, align 8, !tbaa !15
  %31 = call noundef double @_ZN6COrgan8get_massEv(ptr noundef nonnull align 8 dereferenceable(864) %30)
  %32 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 8
  %33 = load ptr, ptr %32, align 8, !tbaa !16
  %34 = call noundef double @_ZN6COrgan8get_massEv(ptr noundef nonnull align 8 dereferenceable(864) %33)
  %35 = fadd double %31, %34
  %36 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 9
  store double %35, ptr %36, align 8, !tbaa !19
  %37 = getelementptr inbounds %class.CNodalUnit, ptr %9, i32 0, i32 1
  store i8 1, ptr %37, align 4, !tbaa !20
  ret void

38:                                               ; preds = %3
  %39 = landingpad { ptr, i32 }
          cleanup
  %40 = extractvalue { ptr, i32 } %39, 0
  store ptr %40, ptr %7, align 8
  %41 = extractvalue { ptr, i32 } %39, 1
  store i32 %41, ptr %8, align 4
  call void @_ZdlPvm(ptr noundef %12, i64 noundef 1256) #6
  br label %46

42:                                               ; preds = %15
  %43 = landingpad { ptr, i32 }
          cleanup
  %44 = extractvalue { ptr, i32 } %43, 0
  store ptr %44, ptr %7, align 8
  %45 = extractvalue { ptr, i32 } %43, 1
  store i32 %45, ptr %8, align 4
  call void @_ZdlPvm(ptr noundef %17, i64 noundef 888) #6
  br label %46

46:                                               ; preds = %42, %38
  %47 = load ptr, ptr %7, align 8
  %48 = load i32, ptr %8, align 4
  %49 = insertvalue { ptr, i32 } poison, ptr %47, 0
  %50 = insertvalue { ptr, i32 } %49, i32 %48, 1
  resume { ptr, i32 } %50
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #1

declare void @_ZN5CLeafC1EiP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256), i32 noundef, ptr noundef) unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #3

declare void @_ZN5CStemC1Ei(ptr noundef nonnull align 8 dereferenceable(888), i32 noundef) unnamed_addr #2

declare void @_ZN5CLeaf10initializeEP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256), ptr noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZN6COrgan8get_massEv(ptr noundef nonnull align 8 dereferenceable(864)) #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTS10CNodalUnit", !10, i64 0, !13, i64 4, !13, i64 5, !13, i64 6, !13, i64 7, !13, i64 8, !13, i64 9, !6, i64 16, !6, i64 24, !14, i64 32}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"double", !7, i64 0}
!15 = !{!12, !6, i64 16}
!16 = !{!12, !6, i64 24}
!17 = !{!18, !18, i64 0}
!18 = !{!"vtable pointer", !8, i64 0}
!19 = !{!12, !14, i64 32}
!20 = !{!12, !13, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10CNodalUnit10initializeEiP12CDevelopment(ptr nocapture noundef nonnull align 8 dereferenceable(40) %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  store i32 %1, ptr %0, align 8, !tbaa !5
  %4 = tail call noalias noundef nonnull dereferenceable(1256) ptr @_Znwm(i64 noundef 1256) #5
  invoke void @_ZN5CLeafC1EiP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256) %4, i32 noundef %1, ptr noundef %2)
          to label %5 unwind label %22

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 16
  store ptr %4, ptr %6, align 8, !tbaa !13
  %7 = tail call noalias noundef nonnull dereferenceable(888) ptr @_Znwm(i64 noundef 888) #5
  invoke void @_ZN5CStemC1Ei(ptr noundef nonnull align 8 dereferenceable(888) %7, i32 noundef %1)
          to label %8 unwind label %24

8:                                                ; preds = %5
  %9 = getelementptr inbounds i8, ptr %0, i64 24
  store ptr %7, ptr %9, align 8, !tbaa !14
  %10 = load ptr, ptr %6, align 8, !tbaa !13
  tail call void @_ZN5CLeaf10initializeEP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256) %10, ptr noundef %2)
  %11 = load ptr, ptr %9, align 8, !tbaa !14
  %12 = load ptr, ptr %11, align 8, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %12, i64 112
  %14 = load ptr, ptr %13, align 8
  tail call void %14(ptr noundef nonnull align 8 dereferenceable(864) %11)
  %15 = load ptr, ptr %6, align 8, !tbaa !13
  %16 = tail call noundef double @_ZN6COrgan8get_massEv(ptr noundef nonnull align 8 dereferenceable(864) %15)
  %17 = load ptr, ptr %9, align 8, !tbaa !14
  %18 = tail call noundef double @_ZN6COrgan8get_massEv(ptr noundef nonnull align 8 dereferenceable(864) %17)
  %19 = fadd double %16, %18
  %20 = getelementptr inbounds i8, ptr %0, i64 32
  store double %19, ptr %20, align 8, !tbaa !17
  %21 = getelementptr inbounds i8, ptr %0, i64 4
  store i8 1, ptr %21, align 4, !tbaa !18
  ret void

22:                                               ; preds = %3
  %23 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %4, i64 noundef 1256) #6
  br label %26

24:                                               ; preds = %5
  %25 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %7, i64 noundef 888) #6
  br label %26

26:                                               ; preds = %24, %22
  %.pn = phi { ptr, i32 } [ %25, %24 ], [ %23, %22 ]
  resume { ptr, i32 } %.pn
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #1

declare void @_ZN5CLeafC1EiP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256), i32 noundef, ptr noundef) unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #3

declare void @_ZN5CStemC1Ei(ptr noundef nonnull align 8 dereferenceable(888), i32 noundef) unnamed_addr #2

declare void @_ZN5CLeaf10initializeEP12CDevelopment(ptr noundef nonnull align 8 dereferenceable(1256), ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZN6COrgan8get_massEv(ptr noundef nonnull align 8 dereferenceable(864)) local_unnamed_addr #4 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS10CNodalUnit", !7, i64 0, !10, i64 4, !10, i64 5, !10, i64 6, !10, i64 7, !10, i64 8, !10, i64 9, !11, i64 16, !11, i64 24, !12, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"double", !8, i64 0}
!13 = !{!6, !11, i64 16}
!14 = !{!6, !11, i64 24}
!15 = !{!16, !16, i64 0}
!16 = !{!"vtable pointer", !9, i64 0}
!17 = !{!6, !12, i64 32}
!18 = !{!6, !10, i64 4}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass