; LLVM IR from xirc/cp-algorithm :: codeforces/1409/1409C/main.ll (Z8try_filliiiiRSt6vectorIiSaIiEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [82 x i8], align 1
@__PRETTY_FUNCTION__._Z8try_filliiiiRSt6vectorIiSaIiEE = external hidden unnamed_addr constant [49 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z8try_filliiiiRSt6vectorIiSaIiEE(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4) #0 {
  %6 = alloca i1, align 1
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %19 = load ptr, ptr %11, align 8, !tbaa !9
  %20 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %19) #3
  %21 = trunc i64 %20 to i32
  store i32 %21, ptr %12, align 4, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = load i32, ptr %8, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %29

25:                                               ; preds = %5
  %26 = load i32, ptr %9, align 4, !tbaa !5
  %27 = load i32, ptr %10, align 4, !tbaa !5
  %28 = icmp slt i32 %26, %27
  br label %29

29:                                               ; preds = %25, %5
  %30 = phi i1 [ false, %5 ], [ %28, %25 ]
  br i1 %30, label %31, label %32

31:                                               ; preds = %29
  br label %34

32:                                               ; preds = %29
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 8, ptr noundef @__PRETTY_FUNCTION__._Z8try_filliiiiRSt6vectorIiSaIiEE) #4
  unreachable

33:                                               ; No predecessors!
  br label %34

34:                                               ; preds = %33, %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %35 = load i32, ptr %10, align 4, !tbaa !5
  %36 = load i32, ptr %9, align 4, !tbaa !5
  %37 = sub nsw i32 %35, %36
  store i32 %37, ptr %13, align 4, !tbaa !5
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = sub nsw i32 %38, %39
  %41 = load i32, ptr %13, align 4, !tbaa !5
  %42 = srem i32 %40, %41
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %45

44:                                               ; preds = %34
  store i1 false, ptr %6, align 1
  store i32 1, ptr %14, align 4
  br label %143

45:                                               ; preds = %34
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = load ptr, ptr %11, align 8, !tbaa !9
  %48 = load i32, ptr %9, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %49) #3
  store i32 %46, ptr %50, align 4, !tbaa !5
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = load ptr, ptr %11, align 8, !tbaa !9
  %53 = load i32, ptr %10, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %54) #3
  store i32 %51, ptr %55, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %56 = load i32, ptr %8, align 4, !tbaa !5
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = sub nsw i32 %56, %57
  %59 = load i32, ptr %13, align 4, !tbaa !5
  %60 = sdiv i32 %58, %59
  store i32 %60, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %61 = load i32, ptr %9, align 4, !tbaa !5
  %62 = sub nsw i32 %61, 1
  store i32 %62, ptr %16, align 4, !tbaa !5
  br label %63

63:                                               ; preds = %88, %45
  %64 = load i32, ptr %16, align 4, !tbaa !5
  %65 = icmp sge i32 %64, 0
  br i1 %65, label %67, label %66

66:                                               ; preds = %63
  store i32 2, ptr %14, align 4
  br label %91

67:                                               ; preds = %63
  %68 = load ptr, ptr %11, align 8, !tbaa !9
  %69 = load i32, ptr %16, align 4, !tbaa !5
  %70 = add nsw i32 %69, 1
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %71) #3
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = load i32, ptr %15, align 4, !tbaa !5
  %75 = sub nsw i32 %73, %74
  %76 = load ptr, ptr %11, align 8, !tbaa !9
  %77 = load i32, ptr %16, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %78) #3
  store i32 %75, ptr %79, align 4, !tbaa !5
  %80 = load ptr, ptr %11, align 8, !tbaa !9
  %81 = load i32, ptr %16, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %82) #3
  %84 = load i32, ptr %83, align 4, !tbaa !5
  %85 = icmp sle i32 %84, 0
  br i1 %85, label %86, label %87

86:                                               ; preds = %67
  store i1 false, ptr %6, align 1
  store i32 1, ptr %14, align 4
  br label %91

87:                                               ; preds = %67
  br label %88

88:                                               ; preds = %87
  %89 = load i32, ptr %16, align 4, !tbaa !5
  %90 = add nsw i32 %89, -1
  store i32 %90, ptr %16, align 4, !tbaa !5
  br label %63, !llvm.loop !11

91:                                               ; preds = %86, %66
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  %92 = load i32, ptr %14, align 4
  switch i32 %92, label %142 [
    i32 2, label %93
  ]

93:                                               ; preds = %91
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %94 = load i32, ptr %9, align 4, !tbaa !5
  %95 = add nsw i32 %94, 1
  store i32 %95, ptr %17, align 4, !tbaa !5
  br label %96

96:                                               ; preds = %114, %93
  %97 = load i32, ptr %17, align 4, !tbaa !5
  %98 = load i32, ptr %10, align 4, !tbaa !5
  %99 = icmp slt i32 %97, %98
  br i1 %99, label %101, label %100

100:                                              ; preds = %96
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %117

101:                                              ; preds = %96
  %102 = load ptr, ptr %11, align 8, !tbaa !9
  %103 = load i32, ptr %17, align 4, !tbaa !5
  %104 = sub nsw i32 %103, 1
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %102, i64 noundef %105) #3
  %107 = load i32, ptr %106, align 4, !tbaa !5
  %108 = load i32, ptr %15, align 4, !tbaa !5
  %109 = add nsw i32 %107, %108
  %110 = load ptr, ptr %11, align 8, !tbaa !9
  %111 = load i32, ptr %17, align 4, !tbaa !5
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %112) #3
  store i32 %109, ptr %113, align 4, !tbaa !5
  br label %114

114:                                              ; preds = %101
  %115 = load i32, ptr %17, align 4, !tbaa !5
  %116 = add nsw i32 %115, 1
  store i32 %116, ptr %17, align 4, !tbaa !5
  br label %96, !llvm.loop !13

117:                                              ; preds = %100
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %118 = load i32, ptr %10, align 4, !tbaa !5
  %119 = add nsw i32 %118, 1
  store i32 %119, ptr %18, align 4, !tbaa !5
  br label %120

120:                                              ; preds = %138, %117
  %121 = load i32, ptr %18, align 4, !tbaa !5
  %122 = load i32, ptr %12, align 4, !tbaa !5
  %123 = icmp slt i32 %121, %122
  br i1 %123, label %125, label %124

124:                                              ; preds = %120
  store i32 8, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  br label %141

125:                                              ; preds = %120
  %126 = load ptr, ptr %11, align 8, !tbaa !9
  %127 = load i32, ptr %18, align 4, !tbaa !5
  %128 = sub nsw i32 %127, 1
  %129 = sext i32 %128 to i64
  %130 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %126, i64 noundef %129) #3
  %131 = load i32, ptr %130, align 4, !tbaa !5
  %132 = load i32, ptr %15, align 4, !tbaa !5
  %133 = add nsw i32 %131, %132
  %134 = load ptr, ptr %11, align 8, !tbaa !9
  %135 = load i32, ptr %18, align 4, !tbaa !5
  %136 = sext i32 %135 to i64
  %137 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %134, i64 noundef %136) #3
  store i32 %133, ptr %137, align 4, !tbaa !5
  br label %138

138:                                              ; preds = %125
  %139 = load i32, ptr %18, align 4, !tbaa !5
  %140 = add nsw i32 %139, 1
  store i32 %140, ptr %18, align 4, !tbaa !5
  br label %120, !llvm.loop !14

141:                                              ; preds = %124
  store i1 true, ptr %6, align 1
  store i32 1, ptr %14, align 4
  br label %142

142:                                              ; preds = %141, %91
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %143

143:                                              ; preds = %142, %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  %144 = load i1, ptr %6, align 1
  ret i1 %144
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [82 x i8], align 1
@__PRETTY_FUNCTION__._Z8try_filliiiiRSt6vectorIiSaIiEE = external hidden unnamed_addr constant [49 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z8try_filliiiiRSt6vectorIiSaIiEE(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4) local_unnamed_addr #0 {
  %6 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #2
  %7 = trunc i64 %6 to i32
  %8 = icmp slt i32 %0, %1
  %9 = icmp slt i32 %2, %3
  %10 = and i1 %8, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 8, ptr noundef nonnull @__PRETTY_FUNCTION__._Z8try_filliiiiRSt6vectorIiSaIiEE) #3
  unreachable

12:                                               ; preds = %5
  %13 = sub nsw i32 %3, %2
  %14 = sub nsw i32 %1, %0
  %15 = srem i32 %14, %13
  %16 = sdiv i32 %14, %13
  %.not = icmp eq i32 %15, 0
  br i1 %.not, label %17, label %.loopexit

17:                                               ; preds = %12
  %18 = sext i32 %2 to i64
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %18) #2
  store i32 %0, ptr %19, align 4, !tbaa !5
  %20 = sext i32 %3 to i64
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %20) #2
  store i32 %1, ptr %21, align 4, !tbaa !5
  %22 = zext i32 %2 to i64
  br label %23

23:                                               ; preds = %28, %17
  %indvars.iv = phi i64 [ %29, %28 ], [ %22, %17 ]
  %24 = trunc nuw i64 %indvars.iv to i32
  %25 = icmp slt i32 %24, 1
  br i1 %25, label %.critedge.preheader, label %28

.critedge.preheader:                              ; preds = %23
  %.04857 = add nsw i32 %2, 1
  %26 = icmp slt i32 %.04857, %3
  br i1 %26, label %.critedge.preheader64, label %.preheader

.critedge.preheader64:                            ; preds = %.critedge.preheader
  %27 = add nsw i64 %18, 1
  br label %.critedge

28:                                               ; preds = %23
  %29 = add nsw i64 %indvars.iv, -1
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv) #2
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = sub nsw i32 %31, %16
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %29) #2
  store i32 %32, ptr %33, align 4, !tbaa !5
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %29) #2
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp slt i32 %35, 1
  br i1 %36, label %.loopexit, label %23, !llvm.loop !9

.preheader:                                       ; preds = %.critedge, %.critedge.preheader
  %.060 = add nsw i32 %3, 1
  %37 = icmp slt i32 %.060, %7
  br i1 %37, label %.lr.ph63.preheader, label %.loopexit

.lr.ph63.preheader:                               ; preds = %.preheader
  %38 = sext i32 %.060 to i64
  br label %.lr.ph63

.critedge:                                        ; preds = %.critedge.preheader64, %.critedge
  %indvars.iv68 = phi i64 [ %27, %.critedge.preheader64 ], [ %indvars.iv.next69, %.critedge ]
  %.048.in58 = phi i32 [ %2, %.critedge.preheader64 ], [ %44, %.critedge ]
  %39 = sext i32 %.048.in58 to i64
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %39) #2
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = add nsw i32 %41, %16
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv68) #2
  store i32 %42, ptr %43, align 4, !tbaa !5
  %indvars.iv.next69 = add nsw i64 %indvars.iv68, 1
  %44 = trunc nsw i64 %indvars.iv68 to i32
  %lftr.wideiv = trunc i64 %indvars.iv.next69 to i32
  %exitcond.not = icmp eq i32 %lftr.wideiv, %3
  br i1 %exitcond.not, label %.preheader, label %.critedge, !llvm.loop !11

.lr.ph63:                                         ; preds = %.lr.ph63.preheader, %.lr.ph63
  %indvars.iv71 = phi i64 [ %38, %.lr.ph63.preheader ], [ %indvars.iv.next72, %.lr.ph63 ]
  %.0.in61 = phi i32 [ %3, %.lr.ph63.preheader ], [ %50, %.lr.ph63 ]
  %45 = sext i32 %.0.in61 to i64
  %46 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = add nsw i32 %47, %16
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv71) #2
  store i32 %48, ptr %49, align 4, !tbaa !5
  %indvars.iv.next72 = add nsw i64 %indvars.iv71, 1
  %50 = trunc nsw i64 %indvars.iv71 to i32
  %lftr.wideiv74 = trunc i64 %indvars.iv.next72 to i32
  %exitcond75.not = icmp eq i32 %lftr.wideiv74, %7
  br i1 %exitcond75.not, label %.loopexit, label %.lr.ph63, !llvm.loop !12

.loopexit:                                        ; preds = %28, %.lr.ph63, %.preheader, %12
  %.2 = phi i1 [ false, %12 ], [ true, %.preheader ], [ true, %.lr.ph63 ], [ false, %28 ]
  ret i1 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: ConstraintEliminationPass,DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass