; LLVM IR from xirc/cp-algorithm :: atcoder/abc113/D/main.ll (Z8count_dxii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z16is_valid_patternii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8count_dxii(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8 %0, i32 noundef %1, i32 noundef %2) #2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i1, align 1
  %8 = alloca i32, align 4
  %9 = alloca %"class.std::allocator", align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i8, align 1
  %15 = alloca i8, align 1
  store ptr %0, ptr %4, align 8
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  store i1 false, ptr %7, align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 3, ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 1 dereferenceable(1) %9)
          to label %16 unwind label %25

16:                                               ; preds = %3
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %17 = load i32, ptr %6, align 4, !tbaa !5
  %18 = sub nsw i32 %17, 1
  %19 = shl i32 1, %18
  store i32 %19, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %101, %16
  %21 = load i32, ptr %13, align 4, !tbaa !5
  %22 = load i32, ptr %12, align 4, !tbaa !5
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %29, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %104

25:                                               ; preds = %3
  %26 = landingpad { ptr, i32 }
          cleanup
  %27 = extractvalue { ptr, i32 } %26, 0
  store ptr %27, ptr %10, align 8
  %28 = extractvalue { ptr, i32 } %26, 1
  store i32 %28, ptr %11, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %108

29:                                               ; preds = %20
  %30 = load i32, ptr %13, align 4, !tbaa !5
  %31 = load i32, ptr %6, align 4, !tbaa !5
  %32 = call noundef zeroext i1 @_Z16is_valid_patternii(i32 noundef %30, i32 noundef %31)
  br i1 %32, label %34, label %33

33:                                               ; preds = %29
  br label %101

34:                                               ; preds = %29
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = sub nsw i32 %35, 1
  %37 = icmp sge i32 %36, 0
  br i1 %37, label %38, label %49

38:                                               ; preds = %34
  %39 = load i32, ptr %13, align 4, !tbaa !5
  %40 = load i32, ptr %5, align 4, !tbaa !5
  %41 = sub nsw i32 %40, 1
  %42 = ashr i32 %39, %41
  %43 = and i32 %42, 1
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %49

45:                                               ; preds = %38
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #3
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  store i32 %48, ptr %46, align 4, !tbaa !5
  br label %49

49:                                               ; preds = %45, %38, %34
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #3
  %50 = load i32, ptr %5, align 4, !tbaa !5
  %51 = sub nsw i32 %50, 1
  %52 = icmp slt i32 %51, 0
  br i1 %52, label %60, label %53

53:                                               ; preds = %49
  %54 = load i32, ptr %13, align 4, !tbaa !5
  %55 = load i32, ptr %5, align 4, !tbaa !5
  %56 = sub nsw i32 %55, 1
  %57 = ashr i32 %54, %56
  %58 = and i32 %57, 1
  %59 = icmp eq i32 %58, 0
  br label %60

60:                                               ; preds = %53, %49
  %61 = phi i1 [ true, %49 ], [ %59, %53 ]
  %62 = zext i1 %61 to i8
  store i8 %62, ptr %14, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #3
  %63 = load i32, ptr %5, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  %65 = load i32, ptr %6, align 4, !tbaa !5
  %66 = icmp sge i32 %64, %65
  br i1 %66, label %73, label %67

67:                                               ; preds = %60
  %68 = load i32, ptr %13, align 4, !tbaa !5
  %69 = load i32, ptr %5, align 4, !tbaa !5
  %70 = ashr i32 %68, %69
  %71 = and i32 %70, 1
  %72 = icmp eq i32 %71, 0
  br label %73

73:                                               ; preds = %67, %60
  %74 = phi i1 [ true, %60 ], [ %72, %67 ]
  %75 = zext i1 %74 to i8
  store i8 %75, ptr %15, align 1, !tbaa !9
  %76 = load i8, ptr %14, align 1, !tbaa !9, !range !11, !noundef !12
  %77 = trunc i8 %76 to i1
  br i1 %77, label %78, label %85

78:                                               ; preds = %73
  %79 = load i8, ptr %15, align 1, !tbaa !9, !range !11, !noundef !12
  %80 = trunc i8 %79 to i1
  br i1 %80, label %81, label %85

81:                                               ; preds = %78
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #3
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %82, align 4, !tbaa !5
  br label %85

85:                                               ; preds = %81, %78, %73
  %86 = load i32, ptr %5, align 4, !tbaa !5
  %87 = add nsw i32 %86, 1
  %88 = load i32, ptr %6, align 4, !tbaa !5
  %89 = icmp slt i32 %87, %88
  br i1 %89, label %90, label %100

90:                                               ; preds = %85
  %91 = load i32, ptr %13, align 4, !tbaa !5
  %92 = load i32, ptr %5, align 4, !tbaa !5
  %93 = ashr i32 %91, %92
  %94 = and i32 %93, 1
  %95 = icmp ne i32 %94, 0
  br i1 %95, label %96, label %100

96:                                               ; preds = %90
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 2) #3
  %98 = load i32, ptr %97, align 4, !tbaa !5
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %97, align 4, !tbaa !5
  br label %100

100:                                              ; preds = %96, %90, %85
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #3
  br label %101

101:                                              ; preds = %100, %33
  %102 = load i32, ptr %13, align 4, !tbaa !5
  %103 = add nsw i32 %102, 1
  store i32 %103, ptr %13, align 4, !tbaa !5
  br label %20, !llvm.loop !13

104:                                              ; preds = %24
  store i1 true, ptr %7, align 1
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  %105 = load i1, ptr %7, align 1
  br i1 %105, label %107, label %106

106:                                              ; preds = %104
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  br label %107

107:                                              ; preds = %106, %104
  ret void

108:                                              ; preds = %25
  %109 = load ptr, ptr %10, align 8
  %110 = load i32, ptr %11, align 4
  %111 = insertvalue { ptr, i32 } poison, ptr %109, 0
  %112 = insertvalue { ptr, i32 } %111, i32 %110, 1
  resume { ptr, i32 } %112
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z16is_valid_patternii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8count_dxii(ptr dead_on_unwind noalias writable sret(%"class.std::vector") align 8 %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %4 = alloca i32, align 4
  %5 = alloca %"class.std::allocator", align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #4
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #4
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 3, ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 1 dereferenceable(1) %5)
          to label %6 unwind label %44

6:                                                ; preds = %3
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  %7 = add nsw i32 %2, -1
  %.not = icmp eq i32 %7, 31
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %6
  %8 = shl nuw i32 1, %7
  %9 = add nsw i32 %1, -1
  %10 = icmp sgt i32 %1, 0
  %11 = shl nuw i32 1, %9
  %12 = icmp slt i32 %1, 1
  %13 = add i32 %1, 1
  %.not25 = icmp sge i32 %13, %2
  %14 = shl nuw i32 1, %1
  %smax49 = call i32 @llvm.smax.i32(i32 %8, i32 1)
  br i1 %10, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %35
  %.036.us = phi i32 [ %36, %35 ], [ 0, %.lr.ph ]
  %15 = call noundef zeroext i1 @_Z16is_valid_patternii(i32 noundef %.036.us, i32 noundef %2)
  br i1 %15, label %16, label %35

16:                                               ; preds = %.lr.ph.split.us
  %17 = and i32 %.036.us, %11
  %.not.us = icmp eq i32 %17, 0
  br i1 %.not.us, label %22, label %18

18:                                               ; preds = %16
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #4
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr %19, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %18, %16
  %.not32.not35.us = or i1 %12, %.not.us
  %23 = and i32 %.036.us, %14
  %24 = icmp eq i32 %23, 0
  %25 = select i1 %.not25, i1 true, i1 %24
  %brmerge.not.us = select i1 %.not32.not35.us, i1 %25, i1 false
  br i1 %brmerge.not.us, label %26, label %30

26:                                               ; preds = %22
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #4
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %27, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %26, %22
  br i1 %25, label %35, label %31

31:                                               ; preds = %30
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 2) #4
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %32, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %31, %30, %.lr.ph.split.us
  %36 = add nuw nsw i32 %.036.us, 1
  %exitcond50.not = icmp eq i32 %36, %smax49
  br i1 %exitcond50.not, label %._crit_edge, label %.lr.ph.split.us, !llvm.loop !9

.lr.ph.split:                                     ; preds = %.lr.ph
  br i1 %.not25, label %.lr.ph.split.split.us.split.us, label %.lr.ph.split.split

.lr.ph.split.split.us.split.us:                   ; preds = %.lr.ph.split, %42
  %.036.us37.us = phi i32 [ %43, %42 ], [ 0, %.lr.ph.split ]
  %37 = call noundef zeroext i1 @_Z16is_valid_patternii(i32 noundef %.036.us37.us, i32 noundef %2)
  br i1 %37, label %38, label %42

38:                                               ; preds = %.lr.ph.split.split.us.split.us
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 1) #4
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %39, align 4, !tbaa !5
  br label %42

42:                                               ; preds = %38, %.lr.ph.split.split.us.split.us
  %43 = add nuw nsw i32 %.036.us37.us, 1
  %exitcond48.not = icmp eq i32 %43, %smax49
  br i1 %exitcond48.not, label %._crit_edge, label %.lr.ph.split.split.us.split.us, !llvm.loop !9

44:                                               ; preds = %3
  %45 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
  resume { ptr, i32 } %45

.lr.ph.split.split:                               ; preds = %.lr.ph.split, %55
  %.036 = phi i32 [ %56, %55 ], [ 0, %.lr.ph.split ]
  %46 = call noundef zeroext i1 @_Z16is_valid_patternii(i32 noundef %.036, i32 noundef %2)
  br i1 %46, label %47, label %55

47:                                               ; preds = %.lr.ph.split.split
  %48 = and i32 %.036, %11
  %49 = icmp eq i32 %48, 0
  %.not32.not35 = select i1 %12, i1 true, i1 %49
  %50 = and i32 %.036, %14
  %51 = icmp eq i32 %50, 0
  %.not56 = xor i1 %51, true
  %brmerge = select i1 %.not32.not35, i1 true, i1 %.not56
  br i1 %brmerge, label %.sink.split, label %55

.sink.split:                                      ; preds = %47
  %brmerge.not = select i1 %.not32.not35, i1 %51, i1 false
  %.mux = select i1 %brmerge.not, i64 1, i64 2
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.mux) #4
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %52, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %47, %.sink.split, %.lr.ph.split.split
  %56 = add nuw nsw i32 %.036, 1
  %exitcond.not = icmp eq i32 %56, %smax49
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.split.split, !llvm.loop !9

._crit_edge:                                      ; preds = %55, %42, %35, %6
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass