; LLVM IR from xirc/cp-algorithm :: codeforces/1420/1420D/main.ll (Z9build_nCkv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@fact = external dso_local global %"class.std::vector", align 8
@fact_inv = external dso_local global %"class.std::vector", align 8
@inv = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z9build_nCkv() #1 {
  %1 = alloca i32, align 4
  %2 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef 1) #2
  store i64 1, ptr %2, align 8, !tbaa !5
  %3 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef 0) #2
  store i64 1, ptr %3, align 8, !tbaa !5
  %4 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef 1) #2
  store i64 1, ptr %4, align 8, !tbaa !5
  %5 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef 0) #2
  store i64 1, ptr %5, align 8, !tbaa !5
  %6 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef 1) #2
  store i64 1, ptr %6, align 8, !tbaa !5
  %7 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef 0) #2
  store i64 1, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 2, ptr %1, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %53, %0
  %9 = load i32, ptr %1, align 4, !tbaa !9
  %10 = icmp slt i32 %9, 1000000
  br i1 %10, label %12, label %11

11:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %56

12:                                               ; preds = %8
  %13 = load i32, ptr %1, align 4, !tbaa !9
  %14 = sub nsw i32 %13, 1
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef %15) #2
  %17 = load i64, ptr %16, align 8, !tbaa !5
  %18 = load i32, ptr %1, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = mul nsw i64 %17, %19
  %21 = srem i64 %20, 998244353
  %22 = load i32, ptr %1, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef %23) #2
  store i64 %21, ptr %24, align 8, !tbaa !5
  %25 = load i32, ptr %1, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = srem i64 998244353, %26
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef %27) #2
  %29 = load i64, ptr %28, align 8, !tbaa !5
  %30 = load i32, ptr %1, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = sdiv i64 998244353, %31
  %33 = mul nsw i64 %29, %32
  %34 = srem i64 %33, 998244353
  %35 = sub nsw i64 998244353, %34
  %36 = load i32, ptr %1, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef %37) #2
  store i64 %35, ptr %38, align 8, !tbaa !5
  %39 = load i32, ptr %1, align 4, !tbaa !9
  %40 = sub nsw i32 %39, 1
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef %41) #2
  %43 = load i64, ptr %42, align 8, !tbaa !5
  %44 = load i32, ptr %1, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef %45) #2
  %47 = load i64, ptr %46, align 8, !tbaa !5
  %48 = mul nsw i64 %43, %47
  %49 = srem i64 %48, 998244353
  %50 = load i32, ptr %1, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef %51) #2
  store i64 %49, ptr %52, align 8, !tbaa !5
  br label %53

53:                                               ; preds = %12
  %54 = load i32, ptr %1, align 4, !tbaa !9
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %1, align 4, !tbaa !9
  br label %8, !llvm.loop !11

56:                                               ; preds = %11
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@fact = external dso_local global %"class.std::vector", align 8
@fact_inv = external dso_local global %"class.std::vector", align 8
@inv = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z9build_nCkv() local_unnamed_addr #0 {
  %1 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef 1) #1
  store i64 1, ptr %1, align 8, !tbaa !5
  %2 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef 0) #1
  store i64 1, ptr %2, align 8, !tbaa !5
  %3 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef 1) #1
  store i64 1, ptr %3, align 8, !tbaa !5
  %4 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef 0) #1
  store i64 1, ptr %4, align 8, !tbaa !5
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef 1) #1
  store i64 1, ptr %5, align 8, !tbaa !5
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef 0) #1
  store i64 1, ptr %6, align 8, !tbaa !5
  br label %8

7:                                                ; preds = %8
  ret void

8:                                                ; preds = %0, %8
  %indvars.iv = phi i64 [ 2, %0 ], [ %indvars.iv.next, %8 ]
  %9 = add nsw i64 %indvars.iv, -1
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef %9) #1
  %11 = load i64, ptr %10, align 8, !tbaa !5
  %12 = mul nsw i64 %11, %indvars.iv
  %13 = srem i64 %12, 998244353
  %14 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact, i64 noundef %indvars.iv) #1
  store i64 %13, ptr %14, align 8, !tbaa !5
  %15 = trunc nuw nsw i64 %indvars.iv to i32
  %16 = urem i32 998244353, %15
  %.zext = zext nneg i32 %16 to i64
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef %.zext) #1
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = udiv i32 998244353, %15
  %.zext12 = zext nneg i32 %19 to i64
  %20 = mul nsw i64 %18, %.zext12
  %21 = srem i64 %20, 998244353
  %22 = sub nsw i64 998244353, %21
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef %indvars.iv) #1
  store i64 %22, ptr %23, align 8, !tbaa !5
  %24 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef %9) #1
  %25 = load i64, ptr %24, align 8, !tbaa !5
  %26 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @inv, i64 noundef %indvars.iv) #1
  %27 = load i64, ptr %26, align 8, !tbaa !5
  %28 = mul nsw i64 %27, %25
  %29 = srem i64 %28, 998244353
  %30 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fact_inv, i64 noundef %indvars.iv) #1
  store i64 %29, ptr %30, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 1000000
  br i1 %exitcond.not, label %7, label %8, !llvm.loop !9
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass