; LLVM IR from HarshCasper/NeoAlgo :: C-Plus-Plus/other/big_mod_algorithm.ll (Z24get_new_number_by_bigmodxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z24get_new_number_by_bigmodxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  store i64 %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  %11 = load i64, ptr %6, align 8, !tbaa !5
  %12 = icmp eq i64 %11, 0
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  store i64 1, ptr %4, align 8
  store i32 1, ptr %9, align 4
  br label %42

14:                                               ; preds = %3
  %15 = load i64, ptr %6, align 8, !tbaa !5
  %16 = srem i64 %15, 2
  %17 = icmp eq i64 %16, 0
  br i1 %17, label %18, label %29

18:                                               ; preds = %14
  %19 = load i64, ptr %5, align 8, !tbaa !5
  %20 = load i64, ptr %6, align 8, !tbaa !5
  %21 = sdiv i64 %20, 2
  %22 = load i64, ptr %7, align 8, !tbaa !5
  %23 = call noundef i64 @_Z24get_new_number_by_bigmodxxx(i64 noundef %19, i64 noundef %21, i64 noundef %22)
  store i64 %23, ptr %8, align 8, !tbaa !5
  %24 = load i64, ptr %8, align 8, !tbaa !5
  %25 = load i64, ptr %8, align 8, !tbaa !5
  %26 = mul nsw i64 %24, %25
  %27 = load i64, ptr %7, align 8, !tbaa !5
  %28 = srem i64 %26, %27
  store i64 %28, ptr %4, align 8
  store i32 1, ptr %9, align 4
  br label %42

29:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %30 = load i64, ptr %5, align 8, !tbaa !5
  %31 = load i64, ptr %6, align 8, !tbaa !5
  %32 = sub nsw i64 %31, 1
  %33 = load i64, ptr %7, align 8, !tbaa !5
  %34 = call noundef i64 @_Z24get_new_number_by_bigmodxxx(i64 noundef %30, i64 noundef %32, i64 noundef %33)
  store i64 %34, ptr %10, align 8, !tbaa !5
  %35 = load i64, ptr %5, align 8, !tbaa !5
  %36 = load i64, ptr %7, align 8, !tbaa !5
  %37 = srem i64 %35, %36
  %38 = load i64, ptr %10, align 8, !tbaa !5
  %39 = mul nsw i64 %37, %38
  %40 = load i64, ptr %7, align 8, !tbaa !5
  %41 = srem i64 %39, %40
  store i64 %41, ptr %4, align 8
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  br label %42

42:                                               ; preds = %29, %18, %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %43 = load i64, ptr %4, align 8
  ret i64 %43
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i64 @_Z24get_new_number_by_bigmodxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i64 %1, 0
  br i1 %4, label %common.ret, label %5

5:                                                ; preds = %3
  %6 = and i64 %1, 1
  %7 = icmp eq i64 %6, 0
  br i1 %7, label %9, label %13

common.ret.sink.split:                            ; preds = %9, %13
  %.sink = phi i64 [ %17, %13 ], [ %12, %9 ]
  %8 = srem i64 %.sink, %2
  br label %common.ret

common.ret:                                       ; preds = %common.ret.sink.split, %3
  %common.ret.op = phi i64 [ 1, %3 ], [ %8, %common.ret.sink.split ]
  ret i64 %common.ret.op

9:                                                ; preds = %5
  %10 = ashr exact i64 %1, 1
  %11 = tail call noundef i64 @_Z24get_new_number_by_bigmodxxx(i64 noundef %0, i64 noundef %10, i64 noundef %2)
  %12 = mul nsw i64 %11, %11
  br label %common.ret.sink.split

13:                                               ; preds = %5
  %14 = add nsw i64 %1, -1
  %15 = tail call noundef i64 @_Z24get_new_number_by_bigmodxxx(i64 noundef %0, i64 noundef %14, i64 noundef %2)
  %16 = srem i64 %0, %2
  %17 = mul nsw i64 %16, %15
  br label %common.ret.sink.split
}

attributes #0 = { mustprogress nofree nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass