; LLVM IR from xirc/cp-algorithm :: atcoder/abc167/c.ll (Z8solvereciiRSt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@X = external dso_local global i32, align 4
@C = external dso_local global %"class.std::vector", align 8
@A = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z8solvereciiRSt6vectorIiSaIiEEi(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i8, align 1
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %18 = call noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #4
  store i32 %18, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %19 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %19, ptr %10, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %124, %4
  %21 = load i32, ptr %10, align 4, !tbaa !5
  %22 = load i32, ptr @N, align 4, !tbaa !5
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %127

25:                                               ; preds = %20
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = load i32, ptr %10, align 4, !tbaa !5
  %28 = ashr i32 %26, %27
  %29 = and i32 %28, 1
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %32

31:                                               ; preds = %25
  br label %124

32:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #4
  store i8 1, ptr %12, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %61, %32
  %34 = load i32, ptr %13, align 4, !tbaa !5
  %35 = load i32, ptr @M, align 4, !tbaa !5
  %36 = icmp slt i32 %34, %35
  br i1 %36, label %38, label %37

37:                                               ; preds = %33
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %64

38:                                               ; preds = %33
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %40) #4
  %42 = load i32, ptr %13, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #4
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = load ptr, ptr %7, align 8, !tbaa !9
  %47 = load i32, ptr %13, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #4
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = add nsw i32 %50, %45
  store i32 %51, ptr %49, align 4, !tbaa !5
  %52 = load ptr, ptr %7, align 8, !tbaa !9
  %53 = load i32, ptr %13, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %54) #4
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = load i32, ptr @X, align 4, !tbaa !5
  %58 = icmp slt i32 %56, %57
  br i1 %58, label %59, label %60

59:                                               ; preds = %38
  store i8 0, ptr %12, align 1, !tbaa !11
  br label %60

60:                                               ; preds = %59, %38
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %13, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %13, align 4, !tbaa !5
  br label %33, !llvm.loop !13

64:                                               ; preds = %37
  %65 = load i8, ptr %12, align 1, !tbaa !11, !range !15, !noundef !16
  %66 = trunc i8 %65 to i1
  br i1 %66, label %67, label %76

67:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %68 = load i32, ptr %8, align 4, !tbaa !5
  %69 = load i32, ptr %10, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %70) #4
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = add nsw i32 %68, %72
  store i32 %73, ptr %14, align 4, !tbaa !5
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %14)
  %75 = load i32, ptr %74, align 4, !tbaa !5
  store i32 %75, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %76

76:                                               ; preds = %67, %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %77 = load i32, ptr %10, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  %79 = load i32, ptr %6, align 4, !tbaa !5
  %80 = load i32, ptr %10, align 4, !tbaa !5
  %81 = shl i32 1, %80
  %82 = or i32 %79, %81
  %83 = load ptr, ptr %7, align 8, !tbaa !9
  %84 = load i32, ptr %8, align 4, !tbaa !5
  %85 = load i32, ptr %10, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %86) #4
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = add nsw i32 %84, %88
  %90 = call noundef i32 @_Z8solvereciiRSt6vectorIiSaIiEEi(i32 noundef %78, i32 noundef %82, ptr noundef nonnull align 8 dereferenceable(24) %83, i32 noundef %89)
  store i32 %90, ptr %15, align 4, !tbaa !5
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %15)
  %92 = load i32, ptr %91, align 4, !tbaa !5
  store i32 %92, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !5
  br label %93

93:                                               ; preds = %112, %76
  %94 = load i32, ptr %16, align 4, !tbaa !5
  %95 = load i32, ptr @M, align 4, !tbaa !5
  %96 = icmp slt i32 %94, %95
  br i1 %96, label %98, label %97

97:                                               ; preds = %93
  store i32 8, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  br label %115

98:                                               ; preds = %93
  %99 = load i32, ptr %10, align 4, !tbaa !5
  %100 = sext i32 %99 to i64
  %101 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %100) #4
  %102 = load i32, ptr %16, align 4, !tbaa !5
  %103 = sext i32 %102 to i64
  %104 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %101, i64 noundef %103) #4
  %105 = load i32, ptr %104, align 4, !tbaa !5
  %106 = load ptr, ptr %7, align 8, !tbaa !9
  %107 = load i32, ptr %16, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %109 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %108) #4
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %111 = sub nsw i32 %110, %105
  store i32 %111, ptr %109, align 4, !tbaa !5
  br label %112

112:                                              ; preds = %98
  %113 = load i32, ptr %16, align 4, !tbaa !5
  %114 = add nsw i32 %113, 1
  store i32 %114, ptr %16, align 4, !tbaa !5
  br label %93, !llvm.loop !17

115:                                              ; preds = %97
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %116 = load i32, ptr %10, align 4, !tbaa !5
  %117 = add nsw i32 %116, 1
  %118 = load i32, ptr %6, align 4, !tbaa !5
  %119 = load ptr, ptr %7, align 8, !tbaa !9
  %120 = load i32, ptr %8, align 4, !tbaa !5
  %121 = call noundef i32 @_Z8solvereciiRSt6vectorIiSaIiEEi(i32 noundef %117, i32 noundef %118, ptr noundef nonnull align 8 dereferenceable(24) %119, i32 noundef %120)
  store i32 %121, ptr %17, align 4, !tbaa !5
  %122 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %17)
  %123 = load i32, ptr %122, align 4, !tbaa !5
  store i32 %123, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #4
  br label %124

124:                                              ; preds = %115, %31
  %125 = load i32, ptr %10, align 4, !tbaa !5
  %126 = add nsw i32 %125, 1
  store i32 %126, ptr %10, align 4, !tbaa !5
  br label %20, !llvm.loop !18

127:                                              ; preds = %24
  %128 = load i32, ptr %9, align 4, !tbaa !5
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret i32 %128
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@X = external dso_local local_unnamed_addr global i32, align 4
@C = external dso_local global %"class.std::vector", align 8
@A = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z8solvereciiRSt6vectorIiSaIiEEi(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %9 = tail call noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() #3
  store i32 %9, ptr %5, align 4, !tbaa !5
  %10 = load i32, ptr @N, align 4, !tbaa !5
  %11 = icmp sgt i32 %10, %0
  br i1 %11, label %.lr.ph42.preheader, label %._crit_edge43

.lr.ph42.preheader:                               ; preds = %4
  %12 = sext i32 %0 to i64
  br label %.lr.ph42

._crit_edge43:                                    ; preds = %63, %4
  %13 = phi i32 [ %9, %4 ], [ %64, %63 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  ret i32 %13

.lr.ph42:                                         ; preds = %.lr.ph42.preheader, %63
  %14 = phi i32 [ %9, %.lr.ph42.preheader ], [ %64, %63 ]
  %15 = phi i32 [ %10, %.lr.ph42.preheader ], [ %65, %63 ]
  %indvars.iv47 = phi i64 [ %12, %.lr.ph42.preheader ], [ %indvars.iv.next48.pre-phi, %63 ]
  %16 = trunc nsw i64 %indvars.iv47 to i32
  %17 = shl nuw i32 1, %16
  %18 = and i32 %17, %1
  %.not = icmp eq i32 %18, 0
  br i1 %.not, label %.preheader, label %.lr.ph42._crit_edge

.lr.ph42._crit_edge:                              ; preds = %.lr.ph42
  %.pre50 = add nsw i64 %indvars.iv47, 1
  br label %63

.preheader:                                       ; preds = %.lr.ph42
  %19 = load i32, ptr @M, align 4, !tbaa !5
  %20 = icmp sgt i32 %19, 0
  br i1 %20, label %.lr.ph, label %.critedge

._crit_edge:                                      ; preds = %.lr.ph
  br i1 %spec.select, label %.critedge, label %39

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.preheader ]
  %.03234 = phi i1 [ %spec.select, %.lr.ph ], [ true, %.preheader ]
  %21 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv47) #3
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv) #3
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #3
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = add nsw i32 %25, %23
  store i32 %26, ptr %24, align 4, !tbaa !5
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #3
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = load i32, ptr @X, align 4, !tbaa !5
  %30 = icmp sge i32 %28, %29
  %spec.select = select i1 %30, i1 %.03234, i1 false
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %31 = load i32, ptr @M, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = icmp slt i64 %indvars.iv.next, %32
  br i1 %33, label %.lr.ph, label %._crit_edge, !llvm.loop !9

.critedge:                                        ; preds = %.preheader, %._crit_edge
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv47) #3
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %35, %3
  store i32 %36, ptr %6, align 4, !tbaa !5
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %38 = load i32, ptr %37, align 4, !tbaa !5
  store i32 %38, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  br label %39

39:                                               ; preds = %.critedge, %._crit_edge
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
  %40 = add nsw i64 %indvars.iv47, 1
  %41 = or i32 %17, %1
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv47) #3
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = add nsw i32 %43, %3
  %45 = trunc nsw i64 %40 to i32
  %46 = call noundef i32 @_Z8solvereciiRSt6vectorIiSaIiEEi(i32 noundef %45, i32 noundef %41, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %44)
  store i32 %46, ptr %7, align 4, !tbaa !5
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %48 = load i32, ptr %47, align 4, !tbaa !5
  store i32 %48, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
  %49 = load i32, ptr @M, align 4, !tbaa !5
  %50 = icmp sgt i32 %49, 0
  br i1 %50, label %.lr.ph38, label %._crit_edge39

._crit_edge39:                                    ; preds = %.lr.ph38, %39
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
  %51 = call noundef i32 @_Z8solvereciiRSt6vectorIiSaIiEEi(i32 noundef %45, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3)
  store i32 %51, ptr %8, align 4, !tbaa !5
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %8)
  %53 = load i32, ptr %52, align 4, !tbaa !5
  store i32 %53, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
  %.pre = load i32, ptr @N, align 4, !tbaa !5
  br label %63

.lr.ph38:                                         ; preds = %39, %.lr.ph38
  %indvars.iv44 = phi i64 [ %indvars.iv.next45, %.lr.ph38 ], [ 0, %39 ]
  %54 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv47) #3
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %indvars.iv44) #3
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv44) #3
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = sub nsw i32 %58, %56
  store i32 %59, ptr %57, align 4, !tbaa !5
  %indvars.iv.next45 = add nuw nsw i64 %indvars.iv44, 1
  %60 = load i32, ptr @M, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = icmp slt i64 %indvars.iv.next45, %61
  br i1 %62, label %.lr.ph38, label %._crit_edge39, !llvm.loop !11

63:                                               ; preds = %.lr.ph42._crit_edge, %._crit_edge39
  %indvars.iv.next48.pre-phi = phi i64 [ %.pre50, %.lr.ph42._crit_edge ], [ %40, %._crit_edge39 ]
  %64 = phi i32 [ %14, %.lr.ph42._crit_edge ], [ %53, %._crit_edge39 ]
  %65 = phi i32 [ %15, %.lr.ph42._crit_edge ], [ %.pre, %._crit_edge39 ]
  %66 = sext i32 %65 to i64
  %67 = icmp slt i64 %indvars.iv.next48.pre-phi, %66
  br i1 %67, label %.lr.ph42, label %._crit_edge43, !llvm.loop !12
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt14numeric_limitsIiE3maxEv() local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass