; LLVM IR from eyangch/competitive-programming :: Codeforces/1288/d.ll (Z5worksi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@a = external dso_local global [300000 x [8 x i32]], align 16

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z5worksi(i32 noundef %0) #0 {
  %2 = alloca %"struct.std::pair", align 4
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  %15 = load i32, ptr @M, align 4, !tbaa !5
  %16 = shl i32 1, %15
  %17 = zext i32 %16 to i64
  %18 = call ptr @llvm.stacksave.p0()
  store ptr %18, ptr %4, align 8
  %19 = alloca i32, i64 %17, align 16
  store i64 %17, ptr %5, align 8
  %20 = load i32, ptr @M, align 4, !tbaa !5
  %21 = shl i32 1, %20
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds i32, ptr %19, i64 %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 -1, ptr %6, align 4, !tbaa !5
  call void @_ZSt4fillIPiiEvT_S1_RKT0_(ptr noundef %19, ptr noundef %23, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %59, %1
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = load i32, ptr @N, align 4, !tbaa !5
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %24
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %62

29:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %51, %29
  %31 = load i32, ptr %10, align 4, !tbaa !5
  %32 = load i32, ptr @M, align 4, !tbaa !5
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %54

35:                                               ; preds = %30
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds [300000 x [8 x i32]], ptr @a, i64 0, i64 %37
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [8 x i32], ptr %38, i64 0, i64 %40
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = icmp sge i32 %42, %43
  br i1 %44, label %45, label %50

45:                                               ; preds = %35
  %46 = load i32, ptr %10, align 4, !tbaa !5
  %47 = shl i32 1, %46
  %48 = load i32, ptr %9, align 4, !tbaa !5
  %49 = or i32 %48, %47
  store i32 %49, ptr %9, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %45, %35
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %10, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %10, align 4, !tbaa !5
  br label %30, !llvm.loop !9

54:                                               ; preds = %34
  %55 = load i32, ptr %7, align 4, !tbaa !5
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds i32, ptr %19, i64 %57
  store i32 %55, ptr %58, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %59

59:                                               ; preds = %54
  %60 = load i32, ptr %7, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %7, align 4, !tbaa !5
  br label %24, !llvm.loop !11

62:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %63

63:                                               ; preds = %113, %62
  %64 = load i32, ptr %11, align 4, !tbaa !5
  %65 = load i32, ptr @M, align 4, !tbaa !5
  %66 = shl i32 1, %65
  %67 = icmp slt i32 %64, %66
  br i1 %67, label %69, label %68

68:                                               ; preds = %63
  store i32 8, ptr %8, align 4
  br label %116

69:                                               ; preds = %63
  %70 = load i32, ptr %11, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds i32, ptr %19, i64 %71
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = icmp eq i32 %73, -1
  br i1 %74, label %75, label %76

75:                                               ; preds = %69
  br label %113

76:                                               ; preds = %69
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %77 = load i32, ptr %11, align 4, !tbaa !5
  store i32 %77, ptr %12, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %107, %76
  %79 = load i32, ptr %12, align 4, !tbaa !5
  %80 = load i32, ptr @M, align 4, !tbaa !5
  %81 = shl i32 1, %80
  %82 = icmp slt i32 %79, %81
  br i1 %82, label %84, label %83

83:                                               ; preds = %78
  store i32 11, ptr %8, align 4
  br label %110

84:                                               ; preds = %78
  %85 = load i32, ptr %12, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds i32, ptr %19, i64 %86
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = icmp eq i32 %88, -1
  br i1 %89, label %90, label %91

90:                                               ; preds = %84
  br label %107

91:                                               ; preds = %84
  %92 = load i32, ptr %11, align 4, !tbaa !5
  %93 = load i32, ptr %12, align 4, !tbaa !5
  %94 = or i32 %92, %93
  %95 = load i32, ptr @M, align 4, !tbaa !5
  %96 = shl i32 1, %95
  %97 = sub nsw i32 %96, 1
  %98 = icmp eq i32 %94, %97
  br i1 %98, label %99, label %106

99:                                               ; preds = %91
  %100 = load i32, ptr %11, align 4, !tbaa !5
  %101 = sext i32 %100 to i64
  %102 = getelementptr inbounds i32, ptr %19, i64 %101
  %103 = load i32, ptr %12, align 4, !tbaa !5
  %104 = sext i32 %103 to i64
  %105 = getelementptr inbounds i32, ptr %19, i64 %104
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %2, ptr noundef nonnull align 4 dereferenceable(4) %102, ptr noundef nonnull align 4 dereferenceable(4) %105)
  store i32 1, ptr %8, align 4
  br label %110

106:                                              ; preds = %91
  br label %107

107:                                              ; preds = %106, %90
  %108 = load i32, ptr %12, align 4, !tbaa !5
  %109 = add nsw i32 %108, 1
  store i32 %109, ptr %12, align 4, !tbaa !5
  br label %78, !llvm.loop !12

110:                                              ; preds = %99, %83
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  %111 = load i32, ptr %8, align 4
  switch i32 %111, label %116 [
    i32 11, label %112
  ]

112:                                              ; preds = %110
  br label %113

113:                                              ; preds = %112, %75
  %114 = load i32, ptr %11, align 4, !tbaa !5
  %115 = add nsw i32 %114, 1
  store i32 %115, ptr %11, align 4, !tbaa !5
  br label %63, !llvm.loop !13

116:                                              ; preds = %110, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  %117 = load i32, ptr %8, align 4
  switch i32 %117, label %119 [
    i32 8, label %118
  ]

118:                                              ; preds = %116
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 -1, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 -1, ptr %14, align 4, !tbaa !5
  call void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8) %2, ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull align 4 dereferenceable(4) %14)
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  store i32 1, ptr %8, align 4
  br label %119

119:                                              ; preds = %118, %116
  %120 = load ptr, ptr %4, align 8
  call void @llvm.stackrestore.p0(ptr %120)
  %121 = load i64, ptr %2, align 4
  ret i64 %121
}

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4fillIPiiEvT_S1_RKT0_(ptr noundef, ptr noundef, ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@a = external dso_local local_unnamed_addr global [300000 x [8 x i32]], align 16

; Function Attrs: mustprogress uwtable
define dso_local i64 @_Z5worksi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca %"struct.std::pair", align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = load i32, ptr @M, align 4, !tbaa !5
  %7 = shl nuw i32 1, %6
  %8 = zext i32 %7 to i64
  %9 = alloca i32, i64 %8, align 16
  %10 = sext i32 %7 to i64
  %11 = getelementptr inbounds i32, ptr %9, i64 %10
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  store i32 -1, ptr %3, align 4, !tbaa !5
  call void @_ZSt4fillIPiiEvT_S1_RKT0_(ptr noundef nonnull %9, ptr noundef nonnull %11, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  %12 = load i32, ptr @N, align 4, !tbaa !5
  %13 = icmp sgt i32 %12, 0
  %.pre = load i32, ptr @M, align 4, !tbaa !5
  br i1 %13, label %.preheader37.lr.ph, label %.preheader36

.preheader37.lr.ph:                               ; preds = %1
  %14 = icmp sgt i32 %.pre, 0
  br i1 %14, label %.preheader37.us.preheader, label %.preheader36.thread

.preheader36.thread:                              ; preds = %.preheader37.lr.ph
  %15 = add nsw i32 %12, -1
  store i32 %15, ptr %9, align 16, !tbaa !5
  br label %.lr.ph48

.preheader37.us.preheader:                        ; preds = %.preheader37.lr.ph
  %wide.trip.count58 = zext nneg i32 %12 to i64
  %wide.trip.count = zext nneg i32 %.pre to i64
  %min.iters.check = icmp ult i32 %.pre, 8
  %n.vec = and i64 %wide.trip.count, 2147483640
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br label %.preheader37.us

.preheader37.us:                                  ; preds = %.preheader37.us.preheader, %._crit_edge.us
  %indvars.iv55 = phi i64 [ 0, %.preheader37.us.preheader ], [ %indvars.iv.next56, %._crit_edge.us ]
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.body

vector.body:                                      ; preds = %.preheader37.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader37.us ]
  %vec.phi = phi <4 x i32> [ %24, %vector.body ], [ zeroinitializer, %.preheader37.us ]
  %vec.phi76 = phi <4 x i32> [ %25, %vector.body ], [ zeroinitializer, %.preheader37.us ]
  %vec.ind = phi <4 x i32> [ %vec.ind.next, %vector.body ], [ <i32 0, i32 1, i32 2, i32 3>, %.preheader37.us ]
  %step.add = add <4 x i32> %vec.ind, <i32 4, i32 4, i32 4, i32 4>
  %16 = getelementptr inbounds [300000 x [8 x i32]], ptr @a, i64 0, i64 %indvars.iv55, i64 %index
  %17 = getelementptr inbounds i8, ptr %16, i64 16
  %wide.load = load <4 x i32>, ptr %16, align 16, !tbaa !5
  %wide.load78 = load <4 x i32>, ptr %17, align 16, !tbaa !5
  %18 = icmp slt <4 x i32> %wide.load, %broadcast.splat
  %19 = icmp slt <4 x i32> %wide.load78, %broadcast.splat
  %20 = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %vec.ind
  %21 = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %step.add
  %22 = select <4 x i1> %18, <4 x i32> zeroinitializer, <4 x i32> %20
  %23 = select <4 x i1> %19, <4 x i32> zeroinitializer, <4 x i32> %21
  %24 = or <4 x i32> %22, %vec.phi
  %25 = or <4 x i32> %23, %vec.phi76
  %index.next = add nuw i64 %index, 8
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 8, i32 8, i32 8, i32 8>
  %26 = icmp eq i64 %index.next, %n.vec
  br i1 %26, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = or <4 x i32> %25, %24
  %27 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %._crit_edge.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader37.us
  %indvars.iv.ph = phi i64 [ 0, %.preheader37.us ], [ %n.vec, %middle.block ]
  %.02739.us.ph = phi i32 [ 0, %.preheader37.us ], [ %27, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %.02739.us = phi i32 [ %.1.us, %scalar.ph ], [ %.02739.us.ph, %scalar.ph.preheader ]
  %28 = getelementptr inbounds [300000 x [8 x i32]], ptr @a, i64 0, i64 %indvars.iv55, i64 %indvars.iv
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %.not33.us = icmp slt i32 %29, %0
  %30 = trunc nuw nsw i64 %indvars.iv to i32
  %31 = shl nuw i32 1, %30
  %32 = select i1 %.not33.us, i32 0, i32 %31
  %.1.us = or i32 %32, %.02739.us
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.us, label %scalar.ph, !llvm.loop !13

._crit_edge.us:                                   ; preds = %scalar.ph, %middle.block
  %.1.us.lcssa = phi i32 [ %27, %middle.block ], [ %.1.us, %scalar.ph ]
  %33 = sext i32 %.1.us.lcssa to i64
  %34 = getelementptr inbounds i32, ptr %9, i64 %33
  %35 = trunc nuw nsw i64 %indvars.iv55 to i32
  store i32 %35, ptr %34, align 4, !tbaa !5
  %indvars.iv.next56 = add nuw nsw i64 %indvars.iv55, 1
  %exitcond59.not = icmp eq i64 %indvars.iv.next56, %wide.trip.count58
  br i1 %exitcond59.not, label %.preheader36, label %.preheader37.us, !llvm.loop !14

.preheader36:                                     ; preds = %._crit_edge.us, %1
  %.not3245.not = icmp eq i32 %.pre, 31
  br i1 %.not3245.not, label %.critedge35, label %.lr.ph48

.lr.ph48:                                         ; preds = %.preheader36.thread, %.preheader36
  %36 = shl nuw nsw i32 1, %.pre
  %37 = add nsw i32 %36, -1
  %38 = zext nneg i32 %36 to i64
  %wide.trip.count68 = zext nneg i32 %36 to i64
  %wide.trip.count65 = zext nneg i32 %36 to i64
  br label %39

39:                                               ; preds = %.lr.ph48, %.critedge
  %indvars.iv60 = phi i64 [ 0, %.lr.ph48 ], [ %indvars.iv.next61, %.critedge ]
  %40 = getelementptr inbounds i32, ptr %9, i64 %indvars.iv60
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = icmp ne i32 %41, -1
  %.not43 = icmp ult i64 %indvars.iv60, %38
  %or.cond50 = and i1 %42, %.not43
  br i1 %or.cond50, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %39, %49
  %indvars.iv62 = phi i64 [ %indvars.iv.next63, %49 ], [ %indvars.iv60, %39 ]
  %43 = getelementptr inbounds i32, ptr %9, i64 %indvars.iv62
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = icmp ne i32 %44, -1
  %46 = or i64 %indvars.iv62, %indvars.iv60
  %47 = trunc i64 %46 to i32
  %48 = icmp eq i32 %37, %47
  %or.cond = select i1 %45, i1 %48, i1 false
  br i1 %or.cond, label %50, label %49

49:                                               ; preds = %.lr.ph
  %indvars.iv.next63 = add nuw nsw i64 %indvars.iv62, 1
  %exitcond66.not = icmp eq i64 %indvars.iv.next63, %wide.trip.count65
  br i1 %exitcond66.not, label %.critedge, label %.lr.ph, !llvm.loop !15

.critedge:                                        ; preds = %49, %39
  %indvars.iv.next61 = add nuw nsw i64 %indvars.iv60, 1
  %exitcond69.not = icmp eq i64 %indvars.iv.next61, %wide.trip.count68
  br i1 %exitcond69.not, label %.critedge35, label %39, !llvm.loop !16

50:                                               ; preds = %.lr.ph
  %51 = getelementptr inbounds i32, ptr %9, i64 %indvars.iv60
  %52 = getelementptr inbounds i32, ptr %9, i64 %indvars.iv62
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %2, ptr noundef nonnull align 4 dereferenceable(4) %51, ptr noundef nonnull align 4 dereferenceable(4) %52)
  br label %53

.critedge35:                                      ; preds = %.critedge, %.preheader36
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
  store i32 -1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #5
  store i32 -1, ptr %5, align 4, !tbaa !5
  call void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8) %2, ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  br label %53

53:                                               ; preds = %50, %.critedge35
  %54 = load i64, ptr %2, align 8
  ret i64 %54
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4fillIPiiEvT_S1_RKT0_(ptr noundef, ptr noundef, ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IiiTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS3_S4_EEEbE4typeELb1EEEOS3_OS4_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass