; LLVM IR from HarshCasper/NeoAlgo :: C-Plus-Plus/cp (Search_target_element_in_Rotated_Sorted_Array)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z6searchRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 -1, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #2
  %13 = sub i64 %12, 1
  %14 = trunc i64 %13 to i32
  store i32 %14, ptr %8, align 4, !tbaa !9
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %17) #2
  %19 = load i32, ptr %18, align 4, !tbaa !9
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = icmp eq i32 %19, %20
  br i1 %21, label %22, label %24

22:                                               ; preds = %2
  %23 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %23, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %128

24:                                               ; preds = %2
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27) #2
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = icmp eq i32 %29, %30
  br i1 %31, label %32, label %34

32:                                               ; preds = %24
  %33 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %33, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %128

34:                                               ; preds = %24
  br label %35

35:                                               ; preds = %125, %34
  %36 = load i32, ptr %7, align 4, !tbaa !9
  %37 = load i32, ptr %8, align 4, !tbaa !9
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %39, label %126

39:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = sub nsw i32 %41, %42
  %44 = sdiv i32 %43, 2
  %45 = add nsw i32 %40, %44
  store i32 %45, ptr %10, align 4, !tbaa !9
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #2
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = icmp eq i32 %50, %51
  br i1 %52, label %53, label %55

53:                                               ; preds = %39
  %54 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %54, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %123

55:                                               ; preds = %39
  %56 = load ptr, ptr %4, align 8, !tbaa !5
  %57 = load i32, ptr %7, align 4, !tbaa !9
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58) #2
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = load i32, ptr %5, align 4, !tbaa !9
  %62 = icmp eq i32 %60, %61
  br i1 %62, label %63, label %65

63:                                               ; preds = %55
  %64 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %64, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %123

65:                                               ; preds = %55
  %66 = load ptr, ptr %4, align 8, !tbaa !5
  %67 = load i32, ptr %8, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %68) #2
  %70 = load i32, ptr %69, align 4, !tbaa !9
  %71 = load i32, ptr %5, align 4, !tbaa !9
  %72 = icmp eq i32 %70, %71
  br i1 %72, label %73, label %75

73:                                               ; preds = %65
  %74 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %74, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %123

75:                                               ; preds = %65
  %76 = load ptr, ptr %4, align 8, !tbaa !5
  %77 = load i32, ptr %10, align 4, !tbaa !9
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %78) #2
  %80 = load i32, ptr %79, align 4, !tbaa !9
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = load i32, ptr %10, align 4, !tbaa !9
  %83 = add nsw i32 %82, 1
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %84) #2
  %86 = load i32, ptr %85, align 4, !tbaa !9
  %87 = icmp sgt i32 %80, %86
  br i1 %87, label %88, label %117

88:                                               ; preds = %75
  %89 = load i32, ptr %10, align 4, !tbaa !9
  %90 = add nsw i32 %89, 1
  %91 = sext i32 %90 to i64
  %92 = load ptr, ptr %4, align 8, !tbaa !5
  %93 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %92) #2
  %94 = icmp ult i64 %91, %93
  br i1 %94, label %95, label %117

95:                                               ; preds = %88
  %96 = load i32, ptr %5, align 4, !tbaa !9
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = load i32, ptr %7, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %97, i64 noundef %99) #2
  %101 = load i32, ptr %100, align 4, !tbaa !9
  %102 = icmp sge i32 %96, %101
  br i1 %102, label %103, label %113

103:                                              ; preds = %95
  %104 = load i32, ptr %5, align 4, !tbaa !9
  %105 = load ptr, ptr %4, align 8, !tbaa !5
  %106 = load i32, ptr %10, align 4, !tbaa !9
  %107 = sext i32 %106 to i64
  %108 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %107) #2
  %109 = load i32, ptr %108, align 4, !tbaa !9
  %110 = icmp sle i32 %104, %109
  br i1 %110, label %111, label %113

111:                                              ; preds = %103
  %112 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %112, ptr %8, align 4, !tbaa !9
  br label %116

113:                                              ; preds = %103, %95
  %114 = load i32, ptr %10, align 4, !tbaa !9
  %115 = add nsw i32 %114, 1
  store i32 %115, ptr %7, align 4, !tbaa !9
  br label %116

116:                                              ; preds = %113, %111
  br label %122

117:                                              ; preds = %88, %75
  %118 = load i32, ptr %7, align 4, !tbaa !9
  %119 = add nsw i32 %118, 1
  store i32 %119, ptr %7, align 4, !tbaa !9
  %120 = load i32, ptr %8, align 4, !tbaa !9
  %121 = add nsw i32 %120, -1
  store i32 %121, ptr %8, align 4, !tbaa !9
  br label %122

122:                                              ; preds = %117, %116
  store i32 0, ptr %9, align 4
  br label %123

123:                                              ; preds = %122, %73, %63, %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %124 = load i32, ptr %9, align 4
  switch i32 %124, label %128 [
    i32 0, label %125
  ]

125:                                              ; preds = %123
  br label %35, !llvm.loop !11

126:                                              ; preds = %35
  %127 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %127, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %128

128:                                              ; preds = %126, %123, %32, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %129 = load i32, ptr %3, align 4
  ret i32 %129
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z6searchRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %4 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = icmp eq i32 %5, %1
  br i1 %6, label %.thread, label %7

7:                                                ; preds = %2
  %8 = trunc i64 %3 to i32
  %9 = add i32 %8, -1
  %10 = sext i32 %9 to i64
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = icmp eq i32 %12, %1
  br i1 %13, label %.thread, label %.preheader

.preheader:                                       ; preds = %7
  %14 = icmp sgt i32 %9, 0
  br i1 %14, label %.lr.ph, label %.thread

.lr.ph:                                           ; preds = %.preheader, %53
  %.04558 = phi i32 [ %.247, %53 ], [ %9, %.preheader ]
  %.04857 = phi i32 [ %.250, %53 ], [ 0, %.preheader ]
  %15 = sub nsw i32 %.04558, %.04857
  %16 = sdiv i32 %15, 2
  %17 = add nsw i32 %16, %.04857
  %18 = sext i32 %17 to i64
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp eq i32 %20, %1
  br i1 %21, label %.thread, label %22

22:                                               ; preds = %.lr.ph
  %23 = sext i32 %.04857 to i64
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = icmp eq i32 %25, %1
  br i1 %26, label %.thread, label %27

27:                                               ; preds = %22
  %28 = sext i32 %.04558 to i64
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %28) #1
  %30 = load i32, ptr %29, align 4, !tbaa !5
  %31 = icmp eq i32 %30, %1
  br i1 %31, label %.thread, label %32

32:                                               ; preds = %27
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #1
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = add nsw i32 %17, 1
  %36 = sext i32 %35 to i64
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %36) #1
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = icmp sgt i32 %34, %38
  br i1 %39, label %40, label %50

40:                                               ; preds = %32
  %41 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %42 = icmp ugt i64 %41, %36
  br i1 %42, label %43, label %50

43:                                               ; preds = %40
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #1
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %.not = icmp sgt i32 %45, %1
  br i1 %.not, label %49, label %46

46:                                               ; preds = %43
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #1
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %.not52 = icmp slt i32 %48, %1
  br i1 %.not52, label %49, label %53

49:                                               ; preds = %46, %43
  br label %53

50:                                               ; preds = %40, %32
  %51 = add nsw i32 %.04857, 1
  %52 = add nsw i32 %.04558, -1
  br label %53

53:                                               ; preds = %50, %49, %46
  %.250 = phi i32 [ %35, %49 ], [ %51, %50 ], [ %.04857, %46 ]
  %.247 = phi i32 [ %.04558, %49 ], [ %52, %50 ], [ %17, %46 ]
  %54 = icmp slt i32 %.250, %.247
  br i1 %54, label %.lr.ph, label %.thread, !llvm.loop !9

.thread:                                          ; preds = %53, %.lr.ph, %22, %27, %.preheader, %7, %2
  %.2 = phi i32 [ 0, %2 ], [ %9, %7 ], [ -1, %.preheader ], [ -1, %53 ], [ %17, %.lr.ph ], [ %.04857, %22 ], [ %.04558, %27 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass