; LLVM IR from xirc/cp-algorithm :: atcoder/abc187/B/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@X = external dso_local global %"class.std::vector", align 8
@Y = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %52, %0
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = load i32, ptr @N, align 4, !tbaa !5
  %10 = icmp slt i32 %8, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %7
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %55

12:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = add nsw i32 %13, 1
  store i32 %14, ptr %4, align 4, !tbaa !5
  br label %15

15:                                               ; preds = %48, %12
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr @N, align 4, !tbaa !5
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %51

20:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @X, i64 noundef %22) #3
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @X, i64 noundef %26) #3
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = sub nsw i32 %24, %28
  store i32 %29, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @Y, i64 noundef %31) #3
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = load i32, ptr %2, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @Y, i64 noundef %35) #3
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = sub nsw i32 %33, %37
  store i32 %38, ptr %6, align 4, !tbaa !5
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = call i32 @llvm.abs.i32(i32 %39, i1 true)
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = call i32 @llvm.abs.i32(i32 %41, i1 true)
  %43 = icmp sle i32 %40, %42
  br i1 %43, label %44, label %47

44:                                               ; preds = %20
  %45 = load i32, ptr %1, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %1, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %44, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %48

48:                                               ; preds = %47
  %49 = load i32, ptr %4, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %4, align 4, !tbaa !5
  br label %15, !llvm.loop !9

51:                                               ; preds = %19
  br label %52

52:                                               ; preds = %51
  %53 = load i32, ptr %2, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %2, align 4, !tbaa !5
  br label %7, !llvm.loop !11

55:                                               ; preds = %11
  %56 = load i32, ptr %1, align 4, !tbaa !5
  store i32 1, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret i32 %56
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@X = external dso_local global %"class.std::vector", align 8
@Y = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 0
  br i1 %2, label %.lr.ph19, label %._crit_edge

.loopexit.loopexit:                               ; preds = %.lr.ph
  %.pre = sext i32 %21 to i64
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %.lr.ph19
  %.pre-phi = phi i64 [ %.pre, %.loopexit.loopexit ], [ %6, %.lr.ph19 ]
  %3 = phi i32 [ %21, %.loopexit.loopexit ], [ %5, %.lr.ph19 ]
  %.1.lcssa = phi i32 [ %spec.select, %.loopexit.loopexit ], [ %.018, %.lr.ph19 ]
  %4 = icmp slt i64 %indvars.iv.next25, %.pre-phi
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  br i1 %4, label %.lr.ph19, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.loopexit, %0
  %.0.lcssa = phi i32 [ 0, %0 ], [ %.1.lcssa, %.loopexit ]
  ret i32 %.0.lcssa

.lr.ph19:                                         ; preds = %0, %.loopexit
  %5 = phi i32 [ %3, %.loopexit ], [ %1, %0 ]
  %indvars.iv24 = phi i64 [ %indvars.iv.next25, %.loopexit ], [ 0, %0 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %.loopexit ], [ 1, %0 ]
  %.018 = phi i32 [ %.1.lcssa, %.loopexit ], [ 0, %0 ]
  %indvars.iv.next25 = add nuw nsw i64 %indvars.iv24, 1
  %6 = sext i32 %5 to i64
  %7 = icmp slt i64 %indvars.iv.next25, %6
  br i1 %7, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.lr.ph19, %.lr.ph
  %indvars.iv21 = phi i64 [ %indvars.iv.next22, %.lr.ph ], [ %indvars.iv, %.lr.ph19 ]
  %.116 = phi i32 [ %spec.select, %.lr.ph ], [ %.018, %.lr.ph19 ]
  %8 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @X, i64 noundef %indvars.iv21) #2
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @X, i64 noundef %indvars.iv24) #2
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = sub nsw i32 %9, %11
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @Y, i64 noundef %indvars.iv21) #2
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @Y, i64 noundef %indvars.iv24) #2
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = sub nsw i32 %14, %16
  %18 = tail call i32 @llvm.abs.i32(i32 %17, i1 true)
  %19 = tail call i32 @llvm.abs.i32(i32 %12, i1 true)
  %.not = icmp ule i32 %18, %19
  %20 = zext i1 %.not to i32
  %spec.select = add nsw i32 %.116, %20
  %indvars.iv.next22 = add nuw nsw i64 %indvars.iv21, 1
  %21 = load i32, ptr @N, align 4, !tbaa !5
  %22 = trunc nuw i64 %indvars.iv.next22 to i32
  %23 = icmp sgt i32 %21, %22
  br i1 %23, label %.lr.ph, label %.loopexit.loopexit, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass