; LLVM IR from gstonge/spreading_CR :: src/QSSpreadingProcess.ll (ZN3net18QSSpreadingProcess25initialize_history_vectorEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.50" = type { %"struct.std::_Vector_base.51" }
%"struct.std::_Vector_base.51" = type { %"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl" }
%"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl" = type { %"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl_data" }
%"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.net::Configuration" = type { %"class.std::vector.10" }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.52" = type { i8 }
%"class.net::QSSpreadingProcess" = type <{ %"class.net::SpreadingProcess.base", [7 x i8], %"class.std::vector.50", double, i32, %"class.std::uniform_int_distribution", [4 x i8] }>
%"class.net::SpreadingProcess.base" = type <{ %"class.net::StaticNetworkSIR", %"class.pcg_detail::engine", %"class.std::uniform_real_distribution", [100000 x double], %"class.std::vector", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.45", i8 }>
%"class.net::StaticNetworkSIR" = type { %"class.net::Network", double, double, double, double, i8, i8, i8, i8, [4 x i8], %"class.net::HashPropensity", i64, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.10", %"class.std::vector.5", %"class.net::BinaryTree", %"class.std::unordered_map.25", i64, i64 }
%"class.net::Network" = type { %"class.std::shared_ptr" }
%"class.std::shared_ptr" = type { %"class.std::__shared_ptr" }
%"class.std::__shared_ptr" = type { ptr, %"class.std::__shared_count" }
%"class.std::__shared_count" = type { ptr }
%"class.net::HashPropensity" = type <{ double, double, double, i8, [7 x i8] }>
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.net::BinaryTree" = type { ptr, ptr, %"class.std::vector.15", %"class.std::unordered_map" }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<net::BinaryTreeNode *, std::allocator<net::BinaryTreeNode *>>::_Vector_impl" }
%"struct.std::_Vector_base<net::BinaryTreeNode *, std::allocator<net::BinaryTreeNode *>>::_Vector_impl" = type { %"struct.std::_Vector_base<net::BinaryTreeNode *, std::allocator<net::BinaryTreeNode *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<net::BinaryTreeNode *, std::allocator<net::BinaryTreeNode *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.std::unordered_map.25" = type { %"class.std::_Hashtable.26" }
%"class.std::_Hashtable.26" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"class.pcg_detail::engine" = type { %"class.pcg_detail::specific_stream", i64 }
%"class.pcg_detail::specific_stream" = type { i64 }
%"class.std::uniform_real_distribution" = type { %"struct.std::uniform_real_distribution<>::param_type" }
%"struct.std::uniform_real_distribution<>::param_type" = type { double, double }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.45" = type { %"struct.std::_Vector_base.46" }
%"struct.std::_Vector_base.46" = type { %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::uniform_int_distribution" = type { %"struct.std::uniform_int_distribution<>::param_type" }
%"struct.std::uniform_int_distribution<>::param_type" = type { i32, i32 }
%"class.net::SpreadingProcess" = type <{ %"class.net::StaticNetworkSIR", %"class.pcg_detail::engine", %"class.std::uniform_real_distribution", [100000 x double], %"class.std::vector", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.45", i8, [7 x i8] }>

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3net18QSSpreadingProcess25initialize_history_vectorEv(ptr noundef nonnull align 8 dereferenceable(800564) %0) #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca %"class.std::vector.50", align 8
  %4 = alloca %"struct.net::Configuration", align 8
  %5 = alloca %"class.std::allocator.52", align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr %3) #6
  %10 = getelementptr inbounds %"class.net::QSSpreadingProcess", ptr %9, i32 0, i32 4
  %11 = load i32, ptr %10, align 8, !tbaa !9
  %12 = zext i32 %11 to i64
  call void @llvm.lifetime.start.p0(i64 24, ptr %4) #6
  call void @llvm.memset.p0.i64(ptr align 8 %4, i8 0, i64 24, i1 false)
  call void @_ZN3net13ConfigurationC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #6
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #6
  call void @_ZNSaIN3net13ConfigurationEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #6
  invoke void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %12, ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 1 dereferenceable(1) %5)
          to label %13 unwind label %22

13:                                               ; preds = %1
  %14 = getelementptr inbounds %"class.net::QSSpreadingProcess", ptr %9, i32 0, i32 2
  %15 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEaSEOS3_(ptr noundef nonnull align 8 dereferenceable(24) %14, ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @_ZNSt15__new_allocatorIN3net13ConfigurationEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #6
  call void @_ZN3net13ConfigurationD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  store i32 0, ptr %8, align 4, !tbaa !64
  br label %16

16:                                               ; preds = %32, %13
  %17 = load i32, ptr %8, align 4, !tbaa !64
  %18 = getelementptr inbounds %"class.net::QSSpreadingProcess", ptr %9, i32 0, i32 4
  %19 = load i32, ptr %18, align 8, !tbaa !9
  %20 = icmp ult i32 %17, %19
  br i1 %20, label %26, label %21

21:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  br label %35

22:                                               ; preds = %1
  %23 = landingpad { ptr, i32 }
          cleanup
  %24 = extractvalue { ptr, i32 } %23, 0
  store ptr %24, ptr %6, align 8
  %25 = extractvalue { ptr, i32 } %23, 1
  store i32 %25, ptr %7, align 4
  call void @_ZNSt15__new_allocatorIN3net13ConfigurationEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #6
  call void @_ZN3net13ConfigurationD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #6
  br label %36

26:                                               ; preds = %16
  %27 = getelementptr inbounds %"class.net::SpreadingProcess", ptr %9, i32 0, i32 0
  %28 = getelementptr inbounds %"class.net::QSSpreadingProcess", ptr %9, i32 0, i32 2
  %29 = load i32, ptr %8, align 4, !tbaa !64
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30) #6
  call void @_ZNK3net16StaticNetworkSIR22get_configuration_copyERNS_13ConfigurationE(ptr noundef nonnull align 8 dereferenceable(384) %27, ptr noundef nonnull align 8 dereferenceable(24) %31)
  br label %32

32:                                               ; preds = %26
  %33 = load i32, ptr %8, align 4, !tbaa !64
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %8, align 4, !tbaa !64
  br label %16, !llvm.loop !65

35:                                               ; preds = %21
  ret void

36:                                               ; preds = %22
  %37 = load ptr, ptr %6, align 8
  %38 = load i32, ptr %7, align 4
  %39 = insertvalue { ptr, i32 } poison, ptr %37, 0
  %40 = insertvalue { ptr, i32 } %39, i32 %38, 1
  resume { ptr, i32 } %40
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3net13ConfigurationC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIN3net13ConfigurationEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEaSEOS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3net13ConfigurationD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

declare void @_ZNK3net16StaticNetworkSIR22get_configuration_copyERNS_13ConfigurationE(ptr noundef nonnull align 8 dereferenceable(384), ptr noundef nonnull align 8 dereferenceable(24)) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIN3net13ConfigurationEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !61, i64 800552}
!10 = !{!"_ZTSN3net18QSSpreadingProcessE", !11, i64 0, !57, i64 800520, !17, i64 800544, !61, i64 800552, !62, i64 800556}
!11 = !{!"_ZTSN3net16SpreadingProcessE", !12, i64 0, !49, i64 384, !51, i64 400, !7, i64 416, !21, i64 800416, !29, i64 800440, !29, i64 800464, !53, i64 800488, !18, i64 800512}
!12 = !{!"_ZTSN3net16StaticNetworkSIRE", !13, i64 0, !17, i64 16, !17, i64 24, !17, i64 32, !17, i64 40, !18, i64 48, !18, i64 49, !18, i64 50, !18, i64 51, !19, i64 56, !20, i64 88, !21, i64 96, !25, i64 120, !29, i64 144, !33, i64 168, !29, i64 192, !37, i64 216, !47, i64 312, !20, i64 368, !20, i64 376}
!13 = !{!"_ZTSN3net7NetworkE", !14, i64 0}
!14 = !{!"_ZTSSt10shared_ptrISt6vectorIS0_IjSaIjEESaIS2_EEE", !15, i64 0}
!15 = !{!"_ZTSSt12__shared_ptrISt6vectorIS0_IjSaIjEESaIS2_EELN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0, !16, i64 8}
!16 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !6, i64 0}
!17 = !{!"double", !7, i64 0}
!18 = !{!"bool", !7, i64 0}
!19 = !{!"_ZTSN3net14HashPropensityE", !17, i64 0, !17, i64 8, !17, i64 16, !18, i64 24}
!20 = !{!"long", !7, i64 0}
!21 = !{!"_ZTSSt6vectorIdSaIdEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"_ZTSSt6vectorImSaImEE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseImSaImEE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!"_ZTSSt6vectorIjSaIjEE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSN3net10BinaryTreeE", !6, i64 0, !6, i64 8, !38, i64 16, !42, i64 40}
!38 = !{!"_ZTSSt6vectorIPN3net14BinaryTreeNodeESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIPN3net14BinaryTreeNodeESaIS2_EE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN3net14BinaryTreeNodeESaIS2_EE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIPN3net14BinaryTreeNodeESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!42 = !{!"_ZTSSt13unordered_mapIPN3net14BinaryTreeNodeEjSt4hashIS2_ESt8equal_toIS2_ESaISt4pairIKS2_jEEE", !43, i64 0}
!43 = !{!"_ZTSSt10_HashtableIPN3net14BinaryTreeNodeESt4pairIKS2_jESaIS5_ENSt8__detail10_Select1stESt8equal_toIS2_ESt4hashIS2_ENS7_18_Mod_range_hashingENS7_20_Default_ranged_hashENS7_20_Prime_rehash_policyENS7_17_Hashtable_traitsILb0ELb0ELb1EEEE", !6, i64 0, !20, i64 8, !44, i64 16, !20, i64 24, !45, i64 32, !6, i64 48}
!44 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!45 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !46, i64 0, !20, i64 8}
!46 = !{!"float", !7, i64 0}
!47 = !{!"_ZTSSt13unordered_mapImSt6vectorISt4pairIjdESaIS2_EESt4hashImESt8equal_toImESaIS1_IKmS4_EEE", !48, i64 0}
!48 = !{!"_ZTSSt10_HashtableImSt4pairIKmSt6vectorIS0_IjdESaIS3_EEESaIS6_ENSt8__detail10_Select1stESt8equal_toImESt4hashImENS8_18_Mod_range_hashingENS8_20_Default_ranged_hashENS8_20_Prime_rehash_policyENS8_17_Hashtable_traitsILb0ELb0ELb1EEEE", !6, i64 0, !20, i64 8, !44, i64 16, !20, i64 24, !45, i64 32, !6, i64 48}
!49 = !{!"_ZTSN10pcg_detail6engineIjmNS_12xsh_rr_mixinIjmEELb1ENS_15specific_streamImEENS_18default_multiplierImEEEE", !50, i64 0, !20, i64 8}
!50 = !{!"_ZTSN10pcg_detail15specific_streamImEE", !20, i64 0}
!51 = !{!"_ZTSSt25uniform_real_distributionIdE", !52, i64 0}
!52 = !{!"_ZTSNSt25uniform_real_distributionIdE10param_typeE", !17, i64 0, !17, i64 8}
!53 = !{!"_ZTSSt6vectorISt4pairIjjESaIS1_EE", !54, i64 0}
!54 = !{!"_ZTSSt12_Vector_baseISt4pairIjjESaIS1_EE", !55, i64 0}
!55 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE12_Vector_implE", !56, i64 0}
!56 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!57 = !{!"_ZTSSt6vectorIN3net13ConfigurationESaIS1_EE", !58, i64 0}
!58 = !{!"_ZTSSt12_Vector_baseIN3net13ConfigurationESaIS1_EE", !59, i64 0}
!59 = !{!"_ZTSNSt12_Vector_baseIN3net13ConfigurationESaIS1_EE12_Vector_implE", !60, i64 0}
!60 = !{!"_ZTSNSt12_Vector_baseIN3net13ConfigurationESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!61 = !{!"int", !7, i64 0}
!62 = !{!"_ZTSSt24uniform_int_distributionIiE", !63, i64 0}
!63 = !{!"_ZTSNSt24uniform_int_distributionIiE10param_typeE", !61, i64 0, !61, i64 4}
!64 = !{!61, !61, i64 0}
!65 = distinct !{!65, !66}
!66 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.50" = type { %"struct.std::_Vector_base.51" }
%"struct.std::_Vector_base.51" = type { %"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl" }
%"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl" = type { %"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl_data" }
%"struct.std::_Vector_base<net::Configuration, std::allocator<net::Configuration>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.net::Configuration" = type { %"class.std::vector.10" }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::unordered_set<unsigned int>, std::allocator<std::unordered_set<unsigned int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.52" = type { i8 }

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3net18QSSpreadingProcess25initialize_history_vectorEv(ptr noundef nonnull align 8 dereferenceable(800564) %0) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.std::vector.50", align 8
  %3 = alloca %"struct.net::Configuration", align 8
  %4 = alloca %"class.std::allocator.52", align 1
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #6
  %5 = getelementptr inbounds i8, ptr %0, i64 800552
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = zext i32 %6 to i64
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #6
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %3, i8 0, i64 24, i1 false)
  call void @_ZN3net13ConfigurationC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #6
  call void @_ZNSaIN3net13ConfigurationEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #6
  invoke void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %7, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %8 unwind label %12

8:                                                ; preds = %1
  %9 = getelementptr inbounds i8, ptr %0, i64 800520
  %10 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEaSEOS3_(ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  call void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #6
  call void @_ZNSt15__new_allocatorIN3net13ConfigurationEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #6
  call void @_ZN3net13ConfigurationD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #6
  %11 = load i32, ptr %5, align 8, !tbaa !5
  %.not = icmp eq i32 %11, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %8
  ret void

12:                                               ; preds = %1
  %13 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIN3net13ConfigurationEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #6
  call void @_ZN3net13ConfigurationD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #6
  resume { ptr, i32 } %13

.lr.ph:                                           ; preds = %8, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %8 ]
  %14 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #6
  call void @_ZNK3net16StaticNetworkSIR22get_configuration_copyERNS_13ConfigurationE(ptr noundef nonnull align 8 dereferenceable(384) %0, ptr noundef nonnull align 8 dereferenceable(24) %14)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %15 = load i32, ptr %5, align 8, !tbaa !5
  %16 = zext i32 %15 to i64
  %17 = icmp ult i64 %indvars.iv.next, %16
  br i1 %17, label %.lr.ph, label %._crit_edge, !llvm.loop !63
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3net13ConfigurationC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIN3net13ConfigurationEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEaSEOS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3net13ConfigurationD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #4 align 2

declare void @_ZNK3net16StaticNetworkSIR22get_configuration_copyERNS_13ConfigurationE(ptr noundef nonnull align 8 dereferenceable(384), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIN3net13ConfigurationESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIN3net13ConfigurationEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !60, i64 800552}
!6 = !{!"_ZTSN3net18QSSpreadingProcessE", !7, i64 0, !56, i64 800520, !16, i64 800544, !60, i64 800552, !61, i64 800556}
!7 = !{!"_ZTSN3net16SpreadingProcessE", !8, i64 0, !48, i64 384, !50, i64 400, !13, i64 416, !20, i64 800416, !28, i64 800440, !28, i64 800464, !52, i64 800488, !17, i64 800512}
!8 = !{!"_ZTSN3net16StaticNetworkSIRE", !9, i64 0, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !17, i64 48, !17, i64 49, !17, i64 50, !17, i64 51, !18, i64 56, !19, i64 88, !20, i64 96, !24, i64 120, !28, i64 144, !32, i64 168, !28, i64 192, !36, i64 216, !46, i64 312, !19, i64 368, !19, i64 376}
!9 = !{!"_ZTSN3net7NetworkE", !10, i64 0}
!10 = !{!"_ZTSSt10shared_ptrISt6vectorIS0_IjSaIjEESaIS2_EEE", !11, i64 0}
!11 = !{!"_ZTSSt12__shared_ptrISt6vectorIS0_IjSaIjEESaIS2_EELN9__gnu_cxx12_Lock_policyE2EE", !12, i64 0, !15, i64 8}
!12 = !{!"any pointer", !13, i64 0}
!13 = !{!"omnipotent char", !14, i64 0}
!14 = !{!"Simple C++ TBAA"}
!15 = !{!"_ZTSSt14__shared_countILN9__gnu_cxx12_Lock_policyE2EE", !12, i64 0}
!16 = !{!"double", !13, i64 0}
!17 = !{!"bool", !13, i64 0}
!18 = !{!"_ZTSN3net14HashPropensityE", !16, i64 0, !16, i64 8, !16, i64 16, !17, i64 24}
!19 = !{!"long", !13, i64 0}
!20 = !{!"_ZTSSt6vectorIdSaIdEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!24 = !{!"_ZTSSt6vectorImSaImEE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseImSaImEE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!28 = !{!"_ZTSSt6vectorIjSaIjEE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!32 = !{!"_ZTSSt6vectorISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseISt13unordered_setIjSt4hashIjESt8equal_toIjESaIjEESaIS6_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!36 = !{!"_ZTSN3net10BinaryTreeE", !12, i64 0, !12, i64 8, !37, i64 16, !41, i64 40}
!37 = !{!"_ZTSSt6vectorIPN3net14BinaryTreeNodeESaIS2_EE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIPN3net14BinaryTreeNodeESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIPN3net14BinaryTreeNodeESaIS2_EE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN3net14BinaryTreeNodeESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!41 = !{!"_ZTSSt13unordered_mapIPN3net14BinaryTreeNodeEjSt4hashIS2_ESt8equal_toIS2_ESaISt4pairIKS2_jEEE", !42, i64 0}
!42 = !{!"_ZTSSt10_HashtableIPN3net14BinaryTreeNodeESt4pairIKS2_jESaIS5_ENSt8__detail10_Select1stESt8equal_toIS2_ESt4hashIS2_ENS7_18_Mod_range_hashingENS7_20_Default_ranged_hashENS7_20_Prime_rehash_policyENS7_17_Hashtable_traitsILb0ELb0ELb1EEEE", !12, i64 0, !19, i64 8, !43, i64 16, !19, i64 24, !44, i64 32, !12, i64 48}
!43 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !12, i64 0}
!44 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !45, i64 0, !19, i64 8}
!45 = !{!"float", !13, i64 0}
!46 = !{!"_ZTSSt13unordered_mapImSt6vectorISt4pairIjdESaIS2_EESt4hashImESt8equal_toImESaIS1_IKmS4_EEE", !47, i64 0}
!47 = !{!"_ZTSSt10_HashtableImSt4pairIKmSt6vectorIS0_IjdESaIS3_EEESaIS6_ENSt8__detail10_Select1stESt8equal_toImESt4hashImENS8_18_Mod_range_hashingENS8_20_Default_ranged_hashENS8_20_Prime_rehash_policyENS8_17_Hashtable_traitsILb0ELb0ELb1EEEE", !12, i64 0, !19, i64 8, !43, i64 16, !19, i64 24, !44, i64 32, !12, i64 48}
!48 = !{!"_ZTSN10pcg_detail6engineIjmNS_12xsh_rr_mixinIjmEELb1ENS_15specific_streamImEENS_18default_multiplierImEEEE", !49, i64 0, !19, i64 8}
!49 = !{!"_ZTSN10pcg_detail15specific_streamImEE", !19, i64 0}
!50 = !{!"_ZTSSt25uniform_real_distributionIdE", !51, i64 0}
!51 = !{!"_ZTSNSt25uniform_real_distributionIdE10param_typeE", !16, i64 0, !16, i64 8}
!52 = !{!"_ZTSSt6vectorISt4pairIjjESaIS1_EE", !53, i64 0}
!53 = !{!"_ZTSSt12_Vector_baseISt4pairIjjESaIS1_EE", !54, i64 0}
!54 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE12_Vector_implE", !55, i64 0}
!55 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!56 = !{!"_ZTSSt6vectorIN3net13ConfigurationESaIS1_EE", !57, i64 0}
!57 = !{!"_ZTSSt12_Vector_baseIN3net13ConfigurationESaIS1_EE", !58, i64 0}
!58 = !{!"_ZTSNSt12_Vector_baseIN3net13ConfigurationESaIS1_EE12_Vector_implE", !59, i64 0}
!59 = !{!"_ZTSNSt12_Vector_baseIN3net13ConfigurationESaIS1_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!60 = !{!"int", !13, i64 0}
!61 = !{!"_ZTSSt24uniform_int_distributionIiE", !62, i64 0}
!62 = !{!"_ZTSNSt24uniform_int_distributionIiE10param_typeE", !60, i64 0, !60, i64 4}
!63 = distinct !{!63, !64}
!64 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass