; LLVM IR from xirc/cp-algorithm :: atcoder/abc078/B/main.ll (Z5solveiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solveiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %11 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %11, ptr %8, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %39, %3
  %13 = load i32, ptr %8, align 4, !tbaa !5
  %14 = icmp sge i32 %13, 2
  br i1 %14, label %16, label %15

15:                                               ; preds = %12
  store i32 2, ptr %9, align 4
  br label %42

16:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = load i32, ptr %6, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = mul nsw i64 %18, %20
  %22 = load i32, ptr %8, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  %24 = sext i32 %23 to i64
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = mul nsw i64 %24, %26
  %28 = add nsw i64 %21, %27
  store i64 %28, ptr %10, align 8, !tbaa !9
  %29 = load i64, ptr %10, align 8, !tbaa !9
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = icmp sle i64 %29, %31
  br i1 %32, label %33, label %35

33:                                               ; preds = %16
  %34 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %34, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %36

35:                                               ; preds = %16
  store i32 0, ptr %9, align 4
  br label %36

36:                                               ; preds = %35, %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %37 = load i32, ptr %9, align 4
  switch i32 %37, label %42 [
    i32 0, label %38
  ]

38:                                               ; preds = %36
  br label %39

39:                                               ; preds = %38
  %40 = load i32, ptr %8, align 4, !tbaa !5
  %41 = add nsw i32 %40, -1
  store i32 %41, ptr %8, align 4, !tbaa !5
  br label %12, !llvm.loop !11

42:                                               ; preds = %36, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %43 = load i32, ptr %9, align 4
  switch i32 %43, label %47 [
    i32 2, label %44
    i32 1, label %45
  ]

44:                                               ; preds = %42
  store i32 1, ptr %4, align 4
  br label %45

45:                                               ; preds = %44, %42
  %46 = load i32, ptr %4, align 4
  ret i32 %46

47:                                               ; preds = %42
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @_Z5solveiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp slt i32 %0, 2
  br i1 %4, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %5 = sext i32 %1 to i64
  %6 = sext i32 %2 to i64
  %7 = zext nneg i32 %0 to i64
  br label %8

8:                                                ; preds = %.lr.ph, %15
  %.01516 = phi i32 [ %0, %.lr.ph ], [ %16, %15 ]
  %9 = zext nneg i32 %.01516 to i64
  %10 = mul nsw i64 %9, %5
  %11 = add nuw nsw i32 %.01516, 1
  %12 = zext nneg i32 %11 to i64
  %13 = mul nsw i64 %12, %6
  %14 = add nsw i64 %13, %10
  %.not = icmp sgt i64 %14, %7
  br i1 %.not, label %15, label %._crit_edge

15:                                               ; preds = %8
  %16 = add nsw i32 %.01516, -1
  %17 = icmp slt i32 %.01516, 3
  br i1 %17, label %._crit_edge, label %8, !llvm.loop !5

._crit_edge:                                      ; preds = %8, %15, %3
  %spec.select = phi i32 [ 1, %3 ], [ 1, %15 ], [ %.01516, %8 ]
  ret i32 %spec.select
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass