; LLVM IR from eyangch/competitive-programming :: USACOtraining/2.1/castle.ll (Z5recuriiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [50 x %"struct.std::array.0"] }
%"struct.std::array.0" = type { [50 x %"struct.std::array.1"] }
%"struct.std::array.1" = type { [4 x i8] }
%"struct.std::array.2" = type { [50 x %"struct.std::array.3"] }
%"struct.std::array.3" = type { [50 x i8] }

@walls = external dso_local global %"struct.std::array", align 1
@visited = external dso_local global %"struct.std::array.2", align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5recuriiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500) @visited, i64 noundef %15) #3
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50) %16, i64 noundef %18) #3
  %20 = load i8, ptr %19, align 1, !tbaa !9, !range !11, !noundef !12
  %21 = trunc i8 %20 to i1
  br i1 %21, label %36, label %22

22:                                               ; preds = %4
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = icmp slt i32 %23, 0
  br i1 %24, label %36, label %25

25:                                               ; preds = %22
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = icmp slt i32 %26, 0
  br i1 %27, label %36, label %28

28:                                               ; preds = %25
  %29 = load i32, ptr %6, align 4, !tbaa !5
  %30 = load i32, ptr %8, align 4, !tbaa !5
  %31 = icmp sge i32 %29, %30
  br i1 %31, label %36, label %32

32:                                               ; preds = %28
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = load i32, ptr %9, align 4, !tbaa !5
  %35 = icmp sge i32 %33, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %32, %28, %25, %22, %4
  store i32 0, ptr %5, align 4
  br label %94

37:                                               ; preds = %32
  %38 = load i32, ptr %6, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500) @visited, i64 noundef %39) #3
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50) %40, i64 noundef %42) #3
  store i8 1, ptr %43, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 1, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %89, %37
  %45 = load i32, ptr %11, align 4, !tbaa !5
  %46 = icmp slt i32 %45, 4
  br i1 %46, label %48, label %47

47:                                               ; preds = %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %92

48:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !5
  %49 = load i32, ptr %11, align 4, !tbaa !5
  %50 = icmp eq i32 %49, 0
  br i1 %50, label %51, label %52

51:                                               ; preds = %48
  store i32 -1, ptr %12, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %51, %48
  %53 = load i32, ptr %11, align 4, !tbaa !5
  %54 = icmp eq i32 %53, 1
  br i1 %54, label %55, label %56

55:                                               ; preds = %52
  store i32 -1, ptr %13, align 4, !tbaa !5
  br label %56

56:                                               ; preds = %55, %52
  %57 = load i32, ptr %11, align 4, !tbaa !5
  %58 = icmp eq i32 %57, 2
  br i1 %58, label %59, label %60

59:                                               ; preds = %56
  store i32 1, ptr %12, align 4, !tbaa !5
  br label %60

60:                                               ; preds = %59, %56
  %61 = load i32, ptr %11, align 4, !tbaa !5
  %62 = icmp eq i32 %61, 3
  br i1 %62, label %63, label %64

63:                                               ; preds = %60
  store i32 1, ptr %13, align 4, !tbaa !5
  br label %64

64:                                               ; preds = %63, %60
  %65 = load i32, ptr %6, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %66) #3
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %67, i64 noundef %69) #3
  %71 = load i32, ptr %11, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %70, i64 noundef %72) #3
  %74 = load i8, ptr %73, align 1, !tbaa !9, !range !11, !noundef !12
  %75 = trunc i8 %74 to i1
  br i1 %75, label %88, label %76

76:                                               ; preds = %64
  %77 = load i32, ptr %6, align 4, !tbaa !5
  %78 = load i32, ptr %12, align 4, !tbaa !5
  %79 = add nsw i32 %77, %78
  %80 = load i32, ptr %7, align 4, !tbaa !5
  %81 = load i32, ptr %13, align 4, !tbaa !5
  %82 = add nsw i32 %80, %81
  %83 = load i32, ptr %8, align 4, !tbaa !5
  %84 = load i32, ptr %9, align 4, !tbaa !5
  %85 = call noundef i32 @_Z5recuriiii(i32 noundef %79, i32 noundef %82, i32 noundef %83, i32 noundef %84)
  %86 = load i32, ptr %10, align 4, !tbaa !5
  %87 = add nsw i32 %86, %85
  store i32 %87, ptr %10, align 4, !tbaa !5
  br label %88

88:                                               ; preds = %76, %64
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %89

89:                                               ; preds = %88
  %90 = load i32, ptr %11, align 4, !tbaa !5
  %91 = add nsw i32 %90, 1
  store i32 %91, ptr %11, align 4, !tbaa !5
  br label %44, !llvm.loop !13

92:                                               ; preds = %47
  %93 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %93, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %94

94:                                               ; preds = %92, %36
  %95 = load i32, ptr %5, align 4
  ret i32 %95
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [50 x %"struct.std::array.0"] }
%"struct.std::array.0" = type { [50 x %"struct.std::array.1"] }
%"struct.std::array.1" = type { [4 x i8] }
%"struct.std::array.2" = type { [50 x %"struct.std::array.3"] }
%"struct.std::array.3" = type { [50 x i8] }

@walls = external dso_local global %"struct.std::array", align 1
@visited = external dso_local global %"struct.std::array.2", align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5recuriiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  br label %tailrecurse

tailrecurse:                                      ; preds = %51, %4
  %accumulator.tr = phi i32 [ 0, %4 ], [ %53, %51 ]
  %.tr46 = phi i32 [ %1, %4 ], [ %52, %51 ]
  %5 = sext i32 %0 to i64
  %6 = tail call noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500) @visited, i64 noundef %5) #1
  %7 = sext i32 %.tr46 to i64
  %8 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50) %6, i64 noundef %7) #1
  %9 = load i8, ptr %8, align 1, !tbaa !5, !range !9, !noundef !10
  %10 = trunc nuw i8 %9 to i1
  %11 = or i32 %.tr46, %0
  %12 = icmp slt i32 %11, 0
  %or.cond3 = or i1 %12, %10
  %or.cond3.not = xor i1 %or.cond3, true
  %.not = icmp slt i32 %0, %2
  %or.cond = and i1 %.not, %or.cond3.not
  %.not41 = icmp slt i32 %.tr46, %3
  %or.cond42 = and i1 %.not41, %or.cond
  br i1 %or.cond42, label %13, label %.loopexit

13:                                               ; preds = %tailrecurse
  %14 = tail call noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500) @visited, i64 noundef %5) #1
  %15 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50) %14, i64 noundef %7) #1
  store i8 1, ptr %15, align 1, !tbaa !5
  %16 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %17 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %16, i64 noundef %7) #1
  %18 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %17, i64 noundef 0) #1
  %19 = load i8, ptr %18, align 1, !tbaa !5, !range !9, !noundef !10
  %20 = trunc nuw i8 %19 to i1
  br i1 %20, label %25, label %21

21:                                               ; preds = %13
  %22 = add nsw i32 %0, -1
  %23 = tail call noundef i32 @_Z5recuriiii(i32 noundef %22, i32 noundef %.tr46, i32 noundef %2, i32 noundef %3)
  %24 = add nsw i32 %23, 1
  br label %25

25:                                               ; preds = %21, %13
  %.135 = phi i32 [ 1, %13 ], [ %24, %21 ]
  %26 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %27 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %26, i64 noundef %7) #1
  %28 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %27, i64 noundef 1) #1
  %29 = load i8, ptr %28, align 1, !tbaa !5, !range !9, !noundef !10
  %30 = trunc nuw i8 %29 to i1
  br i1 %30, label %35, label %31

31:                                               ; preds = %25
  %32 = add nsw i32 %.tr46, -1
  %33 = tail call noundef i32 @_Z5recuriiii(i32 noundef %0, i32 noundef %32, i32 noundef %2, i32 noundef %3)
  %34 = add nsw i32 %33, %.135
  br label %35

35:                                               ; preds = %31, %25
  %.135.1 = phi i32 [ %.135, %25 ], [ %34, %31 ]
  %36 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %37 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %36, i64 noundef %7) #1
  %38 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %37, i64 noundef 2) #1
  %39 = load i8, ptr %38, align 1, !tbaa !5, !range !9, !noundef !10
  %40 = trunc nuw i8 %39 to i1
  br i1 %40, label %45, label %41

41:                                               ; preds = %35
  %42 = add nsw i32 %0, 1
  %43 = tail call noundef i32 @_Z5recuriiii(i32 noundef %42, i32 noundef %.tr46, i32 noundef %2, i32 noundef %3)
  %44 = add nsw i32 %43, %.135.1
  br label %45

45:                                               ; preds = %41, %35
  %.135.2 = phi i32 [ %.135.1, %35 ], [ %44, %41 ]
  %46 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %47 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %46, i64 noundef %7) #1
  %48 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %47, i64 noundef 3) #1
  %49 = load i8, ptr %48, align 1, !tbaa !5, !range !9, !noundef !10
  %50 = trunc nuw i8 %49 to i1
  br i1 %50, label %.loopexit, label %51

51:                                               ; preds = %45
  %52 = add nsw i32 %.tr46, 1
  %53 = add nsw i32 %accumulator.tr, %.135.2
  br label %tailrecurse

.loopexit:                                        ; preds = %45, %tailrecurse
  %.036 = phi i32 [ 0, %tailrecurse ], [ %.135.2, %45 ]
  %accumulator.ret.tr = add nsw i32 %accumulator.tr, %.036
  ret i32 %accumulator.ret.tr
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass