; LLVM IR from VAR-solutions/Algorithms :: Mathematics/Pollard-Rho/cpp/prime.ll (Z10PollardRhox)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z11modular_powxix(i64 noundef, i32 noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z10PollardRhox(i64 noundef %0) #2 {
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  store i64 %0, ptr %3, align 8, !tbaa !5
  %9 = call i64 @time(ptr noundef null) #5
  %10 = trunc i64 %9 to i32
  call void @srand(i32 noundef %10) #5
  %11 = load i64, ptr %3, align 8, !tbaa !5
  %12 = icmp eq i64 %11, 1
  br i1 %12, label %13, label %15

13:                                               ; preds = %1
  %14 = load i64, ptr %3, align 8, !tbaa !5
  store i64 %14, ptr %2, align 8
  br label %81

15:                                               ; preds = %1
  %16 = load i64, ptr %3, align 8, !tbaa !5
  %17 = srem i64 %16, 2
  %18 = icmp eq i64 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %15
  store i64 2, ptr %2, align 8
  br label %81

20:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  %21 = call i32 @rand() #5
  %22 = sext i32 %21 to i64
  %23 = load i64, ptr %3, align 8, !tbaa !5
  %24 = sub nsw i64 %23, 2
  %25 = srem i64 %22, %24
  %26 = add nsw i64 %25, 2
  store i64 %26, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %27 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %27, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %28 = call i32 @rand() #5
  %29 = sext i32 %28 to i64
  %30 = load i64, ptr %3, align 8, !tbaa !5
  %31 = sub nsw i64 %30, 1
  %32 = srem i64 %29, %31
  %33 = add nsw i64 %32, 1
  store i64 %33, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store i64 1, ptr %7, align 8, !tbaa !5
  br label %34

34:                                               ; preds = %77, %20
  %35 = load i64, ptr %7, align 8, !tbaa !5
  %36 = icmp eq i64 %35, 1
  br i1 %36, label %37, label %78

37:                                               ; preds = %34
  %38 = load i64, ptr %4, align 8, !tbaa !5
  %39 = load i64, ptr %3, align 8, !tbaa !5
  %40 = call noundef i64 @_Z11modular_powxix(i64 noundef %38, i32 noundef 2, i64 noundef %39)
  %41 = load i64, ptr %6, align 8, !tbaa !5
  %42 = add nsw i64 %40, %41
  %43 = load i64, ptr %3, align 8, !tbaa !5
  %44 = add nsw i64 %42, %43
  %45 = load i64, ptr %3, align 8, !tbaa !5
  %46 = srem i64 %44, %45
  store i64 %46, ptr %4, align 8, !tbaa !5
  %47 = load i64, ptr %5, align 8, !tbaa !5
  %48 = load i64, ptr %3, align 8, !tbaa !5
  %49 = call noundef i64 @_Z11modular_powxix(i64 noundef %47, i32 noundef 2, i64 noundef %48)
  %50 = load i64, ptr %6, align 8, !tbaa !5
  %51 = add nsw i64 %49, %50
  %52 = load i64, ptr %3, align 8, !tbaa !5
  %53 = add nsw i64 %51, %52
  %54 = load i64, ptr %3, align 8, !tbaa !5
  %55 = srem i64 %53, %54
  store i64 %55, ptr %5, align 8, !tbaa !5
  %56 = load i64, ptr %5, align 8, !tbaa !5
  %57 = load i64, ptr %3, align 8, !tbaa !5
  %58 = call noundef i64 @_Z11modular_powxix(i64 noundef %56, i32 noundef 2, i64 noundef %57)
  %59 = load i64, ptr %6, align 8, !tbaa !5
  %60 = add nsw i64 %58, %59
  %61 = load i64, ptr %3, align 8, !tbaa !5
  %62 = add nsw i64 %60, %61
  %63 = load i64, ptr %3, align 8, !tbaa !5
  %64 = srem i64 %62, %63
  store i64 %64, ptr %5, align 8, !tbaa !5
  %65 = load i64, ptr %4, align 8, !tbaa !5
  %66 = load i64, ptr %5, align 8, !tbaa !5
  %67 = sub nsw i64 %65, %66
  %68 = call noundef i64 @_ZSt3absx(i64 noundef %67)
  %69 = load i64, ptr %3, align 8, !tbaa !5
  %70 = call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %68, i64 noundef %69)
  store i64 %70, ptr %7, align 8, !tbaa !5
  %71 = load i64, ptr %7, align 8, !tbaa !5
  %72 = load i64, ptr %3, align 8, !tbaa !5
  %73 = icmp eq i64 %71, %72
  br i1 %73, label %74, label %77

74:                                               ; preds = %37
  %75 = load i64, ptr %3, align 8, !tbaa !5
  %76 = call noundef i64 @_Z10PollardRhox(i64 noundef %75)
  store i64 %76, ptr %2, align 8
  store i32 1, ptr %8, align 4
  br label %80

77:                                               ; preds = %37
  br label %34, !llvm.loop !9

78:                                               ; preds = %34
  %79 = load i64, ptr %7, align 8, !tbaa !5
  store i64 %79, ptr %2, align 8
  store i32 1, ptr %8, align 4
  br label %80

80:                                               ; preds = %78, %74
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  br label %81

81:                                               ; preds = %80, %19, %13
  %82 = load i64, ptr %2, align 8
  ret i64 %82
}

; Function Attrs: nounwind
declare void @srand(i32 noundef) #3

; Function Attrs: nounwind
declare i64 @time(ptr noundef) #3

; Function Attrs: nounwind
declare i32 @rand() #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef, i64 noundef) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z11modular_powxix(i64 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z10PollardRhox(i64 noundef %0) local_unnamed_addr #0 {
  %2 = tail call i64 @time(ptr noundef null) #3
  %3 = trunc i64 %2 to i32
  tail call void @srand(i32 noundef %3) #3
  %4 = icmp eq i64 %0, 1
  br i1 %4, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %5 = and i64 %0, 1
  %6 = icmp eq i64 %5, 0
  %7 = add nsw i64 %0, -2
  %8 = add nsw i64 %0, -1
  br i1 %6, label %.loopexit, label %.lr.ph.split

tailrecurse.loopexit:                             ; preds = %22
  %9 = tail call i64 @time(ptr noundef null) #3
  %10 = trunc i64 %9 to i32
  tail call void @srand(i32 noundef %10) #3
  br label %.lr.ph.split

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse.loopexit
  %11 = tail call i32 @rand() #3
  %12 = sext i32 %11 to i64
  %13 = srem i64 %12, %7
  %14 = add nsw i64 %13, 2
  %15 = tail call i32 @rand() #3
  %16 = sext i32 %15 to i64
  %17 = srem i64 %16, %8
  %18 = add nsw i64 %17, 1
  %19 = add i64 %18, %0
  br label %20

20:                                               ; preds = %22, %.lr.ph.split
  %.032 = phi i64 [ %14, %.lr.ph.split ], [ %25, %22 ]
  %.031 = phi i64 [ %14, %.lr.ph.split ], [ %31, %22 ]
  %.0 = phi i64 [ 1, %.lr.ph.split ], [ %34, %22 ]
  %21 = icmp eq i64 %.0, 1
  br i1 %21, label %22, label %.loopexit

22:                                               ; preds = %20
  %23 = tail call noundef i64 @_Z11modular_powxix(i64 noundef %.032, i32 noundef 2, i64 noundef %0)
  %24 = add i64 %19, %23
  %25 = srem i64 %24, %0
  %26 = tail call noundef i64 @_Z11modular_powxix(i64 noundef %.031, i32 noundef 2, i64 noundef %0)
  %27 = add i64 %19, %26
  %28 = srem i64 %27, %0
  %29 = tail call noundef i64 @_Z11modular_powxix(i64 noundef %28, i32 noundef 2, i64 noundef %0)
  %30 = add i64 %19, %29
  %31 = srem i64 %30, %0
  %32 = sub nsw i64 %25, %31
  %33 = tail call noundef i64 @_ZSt3absx(i64 noundef %32)
  %34 = tail call noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef %33, i64 noundef %0)
  %35 = icmp eq i64 %34, %0
  br i1 %35, label %tailrecurse.loopexit, label %20, !llvm.loop !5

.loopexit:                                        ; preds = %20, %1, %.lr.ph
  %.1 = phi i64 [ 1, %1 ], [ 2, %.lr.ph ], [ %.0, %20 ]
  ret i64 %.1
}

; Function Attrs: nounwind
declare void @srand(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i64 @time(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt5__gcdIxET_S0_S0_(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZSt3absx(i64 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass