; LLVM IR from xirc/cp-algorithm :: aoj/ALDS1/ALDS2C/main.ll (Z9is_stableRKSt6vectorI4CardSaIS0_EES4_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [36 x i32] }

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6encodeRKSt6vectorI4CardSaIS0_EE(ptr dead_on_unwind noalias writable sret(%"struct.std::array") align 4, ptr noundef nonnull align 8 dereferenceable(24)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z9is_stableRKSt6vectorI4CardSaIS0_EES4_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"struct.std::array", align 4
  %7 = alloca %"struct.std::array", align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 144, ptr %6) #4
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_Z6encodeRKSt6vectorI4CardSaIS0_EE(ptr dead_on_unwind writable sret(%"struct.std::array") align 4 %6, ptr noundef nonnull align 8 dereferenceable(24) %10)
  call void @llvm.lifetime.start.p0(i64 144, ptr %7) #4
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_Z6encodeRKSt6vectorI4CardSaIS0_EE(ptr dead_on_unwind writable sret(%"struct.std::array") align 4 %7, ptr noundef nonnull align 8 dereferenceable(24) %11)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %30, %2
  %13 = load i32, ptr %8, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = call noundef i64 @_ZNKSt5arrayIiLm36EE4sizeEv(ptr noundef nonnull align 4 dereferenceable(144) %6) #5
  %16 = icmp ult i64 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %12
  store i32 2, ptr %9, align 4
  br label %33

18:                                               ; preds = %12
  %19 = load i32, ptr %8, align 4, !tbaa !9
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144) %6, i64 noundef %20) #4
  %22 = load i32, ptr %21, align 4, !tbaa !9
  %23 = load i32, ptr %8, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144) %7, i64 noundef %24) #4
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = icmp ne i32 %22, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %18
  store i1 false, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %33

29:                                               ; preds = %18
  br label %30

30:                                               ; preds = %29
  %31 = load i32, ptr %8, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %8, align 4, !tbaa !9
  br label %12, !llvm.loop !11

33:                                               ; preds = %28, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %34 = load i32, ptr %9, align 4
  switch i32 %34, label %36 [
    i32 2, label %35
  ]

35:                                               ; preds = %33
  store i1 true, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %36

36:                                               ; preds = %35, %33
  call void @llvm.lifetime.end.p0(i64 144, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 144, ptr %6) #4
  %37 = load i1, ptr %3, align 1
  ret i1 %37
}

; Function Attrs: mustprogress nounwind willreturn memory(none) uwtable
declare dso_local noundef i64 @_ZNKSt5arrayIiLm36EE4sizeEv(ptr noundef nonnull align 4 dereferenceable(144)) #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [36 x i32] }

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6encodeRKSt6vectorI4CardSaIS0_EE(ptr dead_on_unwind noalias writable sret(%"struct.std::array") align 4, ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z9is_stableRKSt6vectorI4CardSaIS0_EES4_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) local_unnamed_addr #0 {
  %3 = alloca %"struct.std::array", align 4
  %4 = alloca %"struct.std::array", align 4
  call void @llvm.lifetime.start.p0(i64 144, ptr nonnull %3) #4
  call void @_Z6encodeRKSt6vectorI4CardSaIS0_EE(ptr dead_on_unwind nonnull writable sret(%"struct.std::array") align 4 %3, ptr noundef nonnull align 8 dereferenceable(24) %0)
  call void @llvm.lifetime.start.p0(i64 144, ptr nonnull %4) #4
  call void @_Z6encodeRKSt6vectorI4CardSaIS0_EE(ptr dead_on_unwind nonnull writable sret(%"struct.std::array") align 4 %4, ptr noundef nonnull align 8 dereferenceable(24) %1)
  %5 = call noundef i64 @_ZNKSt5arrayIiLm36EE4sizeEv(ptr noundef nonnull align 4 dereferenceable(144) %3) #5
  %.not1011 = icmp eq i64 %5, 0
  br i1 %.not1011, label %.critedge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %6 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144) %3, i64 noundef 0) #4
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144) %4, i64 noundef 0) #4
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %.not16 = icmp eq i32 %7, %9
  br i1 %.not16, label %.lr.ph18, label %.critedge

.lr.ph18:                                         ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv17 = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
  %indvars.iv.next = add nuw i64 %indvars.iv17, 1
  %exitcond = icmp eq i64 %indvars.iv.next, %5
  br i1 %exitcond, label %.critedge.loopexit, label %.lr.ph, !llvm.loop !9

.lr.ph:                                           ; preds = %.lr.ph18
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144) %3, i64 noundef %indvars.iv.next) #4
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm36EEixEm(ptr noundef nonnull align 4 dereferenceable(144) %4, i64 noundef %indvars.iv.next) #4
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %.not = icmp eq i32 %11, %13
  br i1 %.not, label %.lr.ph18, label %.critedge.loopexit, !llvm.loop !9

.critedge.loopexit:                               ; preds = %.lr.ph, %.lr.ph18
  %.not10.le = icmp ule i64 %5, %indvars.iv.next
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.lr.ph.preheader, %2
  %.not10.lcssa = phi i1 [ true, %2 ], [ false, %.lr.ph.preheader ], [ %.not10.le, %.critedge.loopexit ]
  call void @llvm.lifetime.end.p0(i64 144, ptr nonnull %4) #4
  call void @llvm.lifetime.end.p0(i64 144, ptr nonnull %3) #4
  ret i1 %.not10.lcssa
}

; Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) uwtable
declare dso_local noundef i64 @_ZNKSt5arrayIiLm36EE4sizeEv(ptr noundef nonnull align 4 dereferenceable(144)) local_unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass