; LLVM IR from xirc/cp-algorithm :: atcoder/abc065/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@factorial = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvev() #1 {
  %1 = alloca i64, align 8
  %2 = alloca i32, align 4
  %3 = load i32, ptr @N, align 4, !tbaa !5
  %4 = load i32, ptr @M, align 4, !tbaa !5
  %5 = sub nsw i32 %3, %4
  %6 = call i32 @llvm.abs.i32(i32 %5, i1 true)
  %7 = icmp sgt i32 %6, 1
  br i1 %7, label %8, label %9

8:                                                ; preds = %0
  store i64 0, ptr %1, align 8
  br label %58

9:                                                ; preds = %0
  %10 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef 0) #3
  store i64 1, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %28, %9
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = icmp slt i32 %12, 100001
  br i1 %13, label %15, label %14

14:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %31

15:                                               ; preds = %11
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = sub nsw i32 %16, 1
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %18) #3
  %20 = load i64, ptr %19, align 8, !tbaa !9
  %21 = load i32, ptr %2, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = mul nsw i64 %20, %22
  %24 = srem i64 %23, 1000000007
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %26) #3
  store i64 %24, ptr %27, align 8, !tbaa !9
  br label %28

28:                                               ; preds = %15
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %2, align 4, !tbaa !5
  br label %11, !llvm.loop !11

31:                                               ; preds = %14
  %32 = load i32, ptr @N, align 4, !tbaa !5
  %33 = load i32, ptr @M, align 4, !tbaa !5
  %34 = icmp ne i32 %32, %33
  br i1 %34, label %35, label %46

35:                                               ; preds = %31
  %36 = load i32, ptr @N, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %37) #3
  %39 = load i64, ptr %38, align 8, !tbaa !9
  %40 = load i32, ptr @M, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %41) #3
  %43 = load i64, ptr %42, align 8, !tbaa !9
  %44 = mul nsw i64 %39, %43
  %45 = srem i64 %44, 1000000007
  store i64 %45, ptr %1, align 8
  br label %58

46:                                               ; preds = %31
  %47 = load i32, ptr @N, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %48) #3
  %50 = load i64, ptr %49, align 8, !tbaa !9
  %51 = load i32, ptr @M, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %52) #3
  %54 = load i64, ptr %53, align 8, !tbaa !9
  %55 = mul nsw i64 %50, %54
  %56 = mul nsw i64 %55, 2
  %57 = srem i64 %56, 1000000007
  store i64 %57, ptr %1, align 8
  br label %58

58:                                               ; preds = %46, %35, %8
  %59 = load i64, ptr %1, align 8
  ret i64 %59
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@factorial = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i64 -1000000006, 1000000007) i64 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4, !tbaa !5
  %2 = load i32, ptr @M, align 4, !tbaa !5
  %3 = sub nsw i32 %1, %2
  %4 = tail call i32 @llvm.abs.i32(i32 %3, i1 true)
  %5 = icmp ugt i32 %4, 1
  br i1 %5, label %32, label %6

6:                                                ; preds = %0
  %7 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef 0) #2
  store i64 1, ptr %7, align 8, !tbaa !9
  br label %18

8:                                                ; preds = %18
  %9 = load i32, ptr @N, align 4, !tbaa !5
  %10 = load i32, ptr @M, align 4, !tbaa !5
  %.not = icmp eq i32 %9, %10
  %11 = sext i32 %9 to i64
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %11) #2
  %13 = load i64, ptr %12, align 8, !tbaa !9
  %14 = load i32, ptr @M, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %15) #2
  %17 = load i64, ptr %16, align 8, !tbaa !9
  br i1 %.not, label %28, label %25

18:                                               ; preds = %6, %18
  %indvars.iv = phi i64 [ 1, %6 ], [ %indvars.iv.next, %18 ]
  %19 = add nsw i64 %indvars.iv, -1
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %19) #2
  %21 = load i64, ptr %20, align 8, !tbaa !9
  %22 = mul nsw i64 %21, %indvars.iv
  %23 = srem i64 %22, 1000000007
  %24 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @factorial, i64 noundef %indvars.iv) #2
  store i64 %23, ptr %24, align 8, !tbaa !9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 100001
  br i1 %exitcond.not, label %8, label %18, !llvm.loop !11

25:                                               ; preds = %8
  %26 = mul nsw i64 %17, %13
  %27 = srem i64 %26, 1000000007
  br label %32

28:                                               ; preds = %8
  %29 = shl i64 %13, 1
  %30 = mul i64 %29, %17
  %31 = srem i64 %30, 1000000007
  br label %32

32:                                               ; preds = %0, %28, %25
  %.06 = phi i64 [ %27, %25 ], [ %31, %28 ], [ 0, %0 ]
  ret i64 %.06
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass