; LLVM IR from xirc/cp-algorithm :: atcoder/abc115/D/main.ll (Z5solvexx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@M = external dso_local global %"class.std::vector", align 8
@B = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solvexx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  %6 = load i64, ptr %4, align 8, !tbaa !5
  %7 = load i64, ptr %5, align 8, !tbaa !5
  %8 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %7) #2
  %9 = load i64, ptr %8, align 8, !tbaa !5
  %10 = icmp sge i64 %6, %9
  br i1 %10, label %11, label %15

11:                                               ; preds = %2
  %12 = load i64, ptr %5, align 8, !tbaa !5
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %12) #2
  %14 = load i64, ptr %13, align 8, !tbaa !5
  store i64 %14, ptr %3, align 8
  br label %56

15:                                               ; preds = %2
  %16 = load i64, ptr %4, align 8, !tbaa !5
  %17 = icmp eq i64 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %15
  store i64 0, ptr %3, align 8
  br label %56

19:                                               ; preds = %15
  %20 = load i64, ptr %5, align 8, !tbaa !5
  %21 = icmp eq i64 %20, 0
  br i1 %21, label %22, label %25

22:                                               ; preds = %19
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef 0) #2
  %24 = load i64, ptr %23, align 8, !tbaa !5
  store i64 %24, ptr %3, align 8
  br label %56

25:                                               ; preds = %19
  %26 = load i64, ptr %4, align 8, !tbaa !5
  %27 = load i64, ptr %5, align 8, !tbaa !5
  %28 = sub nsw i64 %27, 1
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %28) #2
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = add nsw i64 %30, 2
  %32 = icmp slt i64 %26, %31
  br i1 %32, label %33, label %39

33:                                               ; preds = %25
  %34 = load i64, ptr %4, align 8, !tbaa !5
  %35 = sub nsw i64 %34, 1
  %36 = load i64, ptr %5, align 8, !tbaa !5
  %37 = sub nsw i64 %36, 1
  %38 = call noundef i64 @_Z5solvexx(i64 noundef %35, i64 noundef %37)
  store i64 %38, ptr %3, align 8
  br label %56

39:                                               ; preds = %25
  %40 = load i64, ptr %5, align 8, !tbaa !5
  %41 = sub nsw i64 %40, 1
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %41) #2
  %43 = load i64, ptr %42, align 8, !tbaa !5
  %44 = add nsw i64 %43, 1
  %45 = load i64, ptr %4, align 8, !tbaa !5
  %46 = sub nsw i64 %45, 2
  %47 = load i64, ptr %5, align 8, !tbaa !5
  %48 = sub nsw i64 %47, 1
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %48) #2
  %50 = load i64, ptr %49, align 8, !tbaa !5
  %51 = sub nsw i64 %46, %50
  %52 = load i64, ptr %5, align 8, !tbaa !5
  %53 = sub nsw i64 %52, 1
  %54 = call noundef i64 @_Z5solvexx(i64 noundef %51, i64 noundef %53)
  %55 = add nsw i64 %44, %54
  store i64 %55, ptr %3, align 8
  br label %56

56:                                               ; preds = %39, %33, %22, %18, %11
  %57 = load i64, ptr %3, align 8
  ret i64 %57
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@M = external dso_local global %"class.std::vector", align 8
@B = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvexx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %1) #1
  %4 = load i64, ptr %3, align 8, !tbaa !5
  %.not2632 = icmp sgt i64 %4, %0
  br i1 %.not2632, label %.lr.ph, label %tailrecurse.outer._crit_edge

.lr.ph:                                           ; preds = %2, %tailrecurse.outer
  %.tr16.ph35 = phi i64 [ %15, %tailrecurse.outer ], [ %1, %2 ]
  %.tr.ph34 = phi i64 [ %28, %tailrecurse.outer ], [ %0, %2 ]
  %accumulator.tr.ph33 = phi i64 [ %30, %tailrecurse.outer ], [ 0, %2 ]
  br label %7

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer, %tailrecurse, %2
  %accumulator.tr.ph.lcssa24 = phi i64 [ 0, %2 ], [ %accumulator.tr.ph33, %tailrecurse ], [ %30, %tailrecurse.outer ]
  %.tr16.lcssa = phi i64 [ %1, %2 ], [ %15, %tailrecurse ], [ %15, %tailrecurse.outer ]
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %.tr16.lcssa) #1
  %6 = load i64, ptr %5, align 8, !tbaa !5
  br label %.loopexit

7:                                                ; preds = %.lr.ph, %tailrecurse
  %.tr1628 = phi i64 [ %.tr16.ph35, %.lr.ph ], [ %15, %tailrecurse ]
  %.tr27 = phi i64 [ %.tr.ph34, %.lr.ph ], [ %20, %tailrecurse ]
  %8 = icmp eq i64 %.tr27, 0
  br i1 %8, label %.loopexit, label %9

9:                                                ; preds = %7
  %10 = icmp eq i64 %.tr1628, 0
  br i1 %10, label %11, label %14

11:                                               ; preds = %9
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef 0) #1
  %13 = load i64, ptr %12, align 8, !tbaa !5
  br label %.loopexit

14:                                               ; preds = %9
  %15 = add nsw i64 %.tr1628, -1
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %15) #1
  %17 = load i64, ptr %16, align 8, !tbaa !5
  %18 = add nsw i64 %17, 2
  %19 = icmp sgt i64 %18, %.tr27
  br i1 %19, label %tailrecurse, label %tailrecurse.outer

tailrecurse:                                      ; preds = %14
  %20 = add nsw i64 %.tr27, -1
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %15) #1
  %22 = load i64, ptr %21, align 8, !tbaa !5
  %.not.not = icmp slt i64 %22, %.tr27
  br i1 %.not.not, label %tailrecurse.outer._crit_edge, label %7

tailrecurse.outer:                                ; preds = %14
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %15) #1
  %24 = load i64, ptr %23, align 8, !tbaa !5
  %25 = add nsw i64 %.tr27, -2
  %26 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %15) #1
  %27 = load i64, ptr %26, align 8, !tbaa !5
  %28 = sub i64 %25, %27
  %29 = add i64 %accumulator.tr.ph33, 1
  %30 = add i64 %29, %24
  %31 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @M, i64 noundef %15) #1
  %32 = load i64, ptr %31, align 8, !tbaa !5
  %.not26 = icmp sgt i64 %32, %28
  br i1 %.not26, label %.lr.ph, label %tailrecurse.outer._crit_edge

.loopexit:                                        ; preds = %7, %11, %tailrecurse.outer._crit_edge
  %accumulator.tr.ph25 = phi i64 [ %accumulator.tr.ph.lcssa24, %tailrecurse.outer._crit_edge ], [ %accumulator.tr.ph33, %11 ], [ %accumulator.tr.ph33, %7 ]
  %.0 = phi i64 [ %6, %tailrecurse.outer._crit_edge ], [ %13, %11 ], [ 0, %7 ]
  %accumulator.ret.tr = add nsw i64 %.0, %accumulator.tr.ph25
  ret i64 %accumulator.ret.tr
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass