; LLVM IR from xirc/cp-algorithm :: atcoder/abc051/D/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@G = external dso_local global %"class.std::vector", align 8
@O = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEaSERKS3_(ptr noundef nonnull align 8 dereferenceable(24) @O, ptr noundef nonnull align 8 dereferenceable(24) @G)
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %102, %0
  %12 = load i32, ptr %1, align 4, !tbaa !5
  %13 = load i32, ptr @N, align 4, !tbaa !5
  %14 = icmp slt i32 %12, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %105

16:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %98, %16
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = load i32, ptr @N, align 4, !tbaa !5
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %17
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %101

22:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %94, %22
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = load i32, ptr @N, align 4, !tbaa !5
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %23
  store i32 8, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %97

28:                                               ; preds = %23
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %30) #3
  %32 = load i32, ptr %1, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %33) #3
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp eq i32 %35, 10000000
  br i1 %36, label %46, label %37

37:                                               ; preds = %28
  %38 = load i32, ptr %1, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %39) #3
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #3
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = icmp eq i32 %44, 10000000
  br i1 %45, label %46, label %47

46:                                               ; preds = %37, %28
  br label %94

47:                                               ; preds = %37
  %48 = load i32, ptr %3, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %49) #3
  %51 = load i32, ptr %1, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %52) #3
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = load i32, ptr %1, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %56) #3
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #3
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = add nsw i32 %54, %61
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %64) #3
  %66 = load i32, ptr %4, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %67) #3
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = icmp slt i32 %62, %69
  br i1 %70, label %71, label %93

71:                                               ; preds = %47
  %72 = load i32, ptr %3, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %73) #3
  %75 = load i32, ptr %1, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #3
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %79 = load i32, ptr %1, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %80) #3
  %82 = load i32, ptr %4, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %83) #3
  %85 = load i32, ptr %84, align 4, !tbaa !5
  %86 = add nsw i32 %78, %85
  %87 = load i32, ptr %3, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %88) #3
  %90 = load i32, ptr %4, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %91) #3
  store i32 %86, ptr %92, align 4, !tbaa !5
  br label %93

93:                                               ; preds = %71, %47
  br label %94

94:                                               ; preds = %93, %46
  %95 = load i32, ptr %4, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %4, align 4, !tbaa !5
  br label %23, !llvm.loop !9

97:                                               ; preds = %27
  br label %98

98:                                               ; preds = %97
  %99 = load i32, ptr %3, align 4, !tbaa !5
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %3, align 4, !tbaa !5
  br label %17, !llvm.loop !11

101:                                              ; preds = %21
  br label %102

102:                                              ; preds = %101
  %103 = load i32, ptr %1, align 4, !tbaa !5
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %1, align 4, !tbaa !5
  br label %11, !llvm.loop !12

105:                                              ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %106

106:                                              ; preds = %179, %105
  %107 = load i32, ptr %6, align 4, !tbaa !5
  %108 = load i32, ptr @N, align 4, !tbaa !5
  %109 = icmp slt i32 %107, %108
  br i1 %109, label %111, label %110

110:                                              ; preds = %106
  store i32 11, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %182

111:                                              ; preds = %106
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %112 = load i32, ptr %6, align 4, !tbaa !5
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %7, align 4, !tbaa !5
  br label %114

114:                                              ; preds = %175, %111
  %115 = load i32, ptr %7, align 4, !tbaa !5
  %116 = load i32, ptr @N, align 4, !tbaa !5
  %117 = icmp slt i32 %115, %116
  br i1 %117, label %119, label %118

118:                                              ; preds = %114
  store i32 14, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %178

119:                                              ; preds = %114
  %120 = load i32, ptr %6, align 4, !tbaa !5
  %121 = load i32, ptr %7, align 4, !tbaa !5
  %122 = icmp eq i32 %120, %121
  br i1 %122, label %132, label %123

123:                                              ; preds = %119
  %124 = load i32, ptr %6, align 4, !tbaa !5
  %125 = sext i32 %124 to i64
  %126 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @O, i64 noundef %125) #3
  %127 = load i32, ptr %7, align 4, !tbaa !5
  %128 = sext i32 %127 to i64
  %129 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %126, i64 noundef %128) #3
  %130 = load i32, ptr %129, align 4, !tbaa !5
  %131 = icmp eq i32 %130, 10000000
  br i1 %131, label %132, label %133

132:                                              ; preds = %123, %119
  br label %175

133:                                              ; preds = %123
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  store i8 0, ptr %8, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %134

134:                                              ; preds = %165, %133
  %135 = load i32, ptr %9, align 4, !tbaa !5
  %136 = load i32, ptr @N, align 4, !tbaa !5
  %137 = icmp slt i32 %135, %136
  br i1 %137, label %139, label %138

138:                                              ; preds = %134
  store i32 17, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %168

139:                                              ; preds = %134
  %140 = load i32, ptr %9, align 4, !tbaa !5
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %141) #3
  %143 = load i32, ptr %6, align 4, !tbaa !5
  %144 = sext i32 %143 to i64
  %145 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %142, i64 noundef %144) #3
  %146 = load i32, ptr %145, align 4, !tbaa !5
  %147 = load i32, ptr %6, align 4, !tbaa !5
  %148 = sext i32 %147 to i64
  %149 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @O, i64 noundef %148) #3
  %150 = load i32, ptr %7, align 4, !tbaa !5
  %151 = sext i32 %150 to i64
  %152 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %149, i64 noundef %151) #3
  %153 = load i32, ptr %152, align 4, !tbaa !5
  %154 = add nsw i32 %146, %153
  %155 = load i32, ptr %9, align 4, !tbaa !5
  %156 = sext i32 %155 to i64
  %157 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %156) #3
  %158 = load i32, ptr %7, align 4, !tbaa !5
  %159 = sext i32 %158 to i64
  %160 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %157, i64 noundef %159) #3
  %161 = load i32, ptr %160, align 4, !tbaa !5
  %162 = icmp eq i32 %154, %161
  br i1 %162, label %163, label %164

163:                                              ; preds = %139
  store i8 1, ptr %8, align 1, !tbaa !13
  br label %164

164:                                              ; preds = %163, %139
  br label %165

165:                                              ; preds = %164
  %166 = load i32, ptr %9, align 4, !tbaa !5
  %167 = add nsw i32 %166, 1
  store i32 %167, ptr %9, align 4, !tbaa !5
  br label %134, !llvm.loop !15

168:                                              ; preds = %138
  %169 = load i8, ptr %8, align 1, !tbaa !13, !range !16, !noundef !17
  %170 = trunc i8 %169 to i1
  br i1 %170, label %174, label %171

171:                                              ; preds = %168
  %172 = load i32, ptr %5, align 4, !tbaa !5
  %173 = add nsw i32 %172, 1
  store i32 %173, ptr %5, align 4, !tbaa !5
  br label %174

174:                                              ; preds = %171, %168
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  br label %175

175:                                              ; preds = %174, %132
  %176 = load i32, ptr %7, align 4, !tbaa !5
  %177 = add nsw i32 %176, 1
  store i32 %177, ptr %7, align 4, !tbaa !5
  br label %114, !llvm.loop !18

178:                                              ; preds = %118
  br label %179

179:                                              ; preds = %178
  %180 = load i32, ptr %6, align 4, !tbaa !5
  %181 = add nsw i32 %180, 1
  store i32 %181, ptr %6, align 4, !tbaa !5
  br label %106, !llvm.loop !19

182:                                              ; preds = %110
  %183 = load i32, ptr %5, align 4, !tbaa !5
  store i32 1, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %183
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEaSERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = distinct !{!15, !10}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@G = external dso_local global %"class.std::vector", align 8
@O = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #0 {
  %1 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEaSERKS3_(ptr noundef nonnull align 8 dereferenceable(24) @O, ptr noundef nonnull align 8 dereferenceable(24) @G)
  %2 = load i32, ptr @N, align 4, !tbaa !5
  %3 = icmp sgt i32 %2, 0
  br i1 %3, label %.preheader53, label %._crit_edge70

.preheader53:                                     ; preds = %0, %._crit_edge56
  %4 = phi i32 [ %10, %._crit_edge56 ], [ %2, %0 ]
  %indvars.iv78 = phi i64 [ %indvars.iv.next79, %._crit_edge56 ], [ 0, %0 ]
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %.preheader52, label %._crit_edge56

.preheader51:                                     ; preds = %._crit_edge56
  %6 = icmp sgt i32 %10, 0
  br i1 %6, label %.lr.ph69, label %._crit_edge70

.preheader52:                                     ; preds = %.preheader53, %._crit_edge
  %7 = phi i32 [ %13, %._crit_edge ], [ %4, %.preheader53 ]
  %8 = phi i32 [ %14, %._crit_edge ], [ %4, %.preheader53 ]
  %indvars.iv75 = phi i64 [ %indvars.iv.next76, %._crit_edge ], [ 0, %.preheader53 ]
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph, label %.preheader52.._crit_edge_crit_edge

.preheader52.._crit_edge_crit_edge:               ; preds = %.preheader52
  %.pre93 = sext i32 %8 to i64
  br label %._crit_edge

._crit_edge56:                                    ; preds = %._crit_edge, %.preheader53
  %10 = phi i32 [ %4, %.preheader53 ], [ %13, %._crit_edge ]
  %indvars.iv.next79 = add nuw nsw i64 %indvars.iv78, 1
  %11 = sext i32 %10 to i64
  %12 = icmp slt i64 %indvars.iv.next79, %11
  br i1 %12, label %.preheader53, label %.preheader51, !llvm.loop !9

._crit_edge:                                      ; preds = %47, %.preheader52.._crit_edge_crit_edge
  %.pre-phi94 = phi i64 [ %.pre93, %.preheader52.._crit_edge_crit_edge ], [ %49, %47 ]
  %13 = phi i32 [ %7, %.preheader52.._crit_edge_crit_edge ], [ %48, %47 ]
  %14 = phi i32 [ %8, %.preheader52.._crit_edge_crit_edge ], [ %48, %47 ]
  %indvars.iv.next76 = add nuw nsw i64 %indvars.iv75, 1
  %15 = icmp slt i64 %indvars.iv.next76, %.pre-phi94
  br i1 %15, label %.preheader52, label %._crit_edge56, !llvm.loop !12

.lr.ph:                                           ; preds = %.preheader52, %47
  %indvars.iv = phi i64 [ %indvars.iv.next, %47 ], [ 0, %.preheader52 ]
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv75) #2
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv78) #2
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = icmp eq i32 %18, 10000000
  br i1 %19, label %47, label %20

20:                                               ; preds = %.lr.ph
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv78) #2
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv) #2
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp eq i32 %23, 10000000
  br i1 %24, label %47, label %25

25:                                               ; preds = %20
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv75) #2
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %indvars.iv78) #2
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv78) #2
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %indvars.iv) #2
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = add nsw i32 %31, %28
  %33 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv75) #2
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %indvars.iv) #2
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp slt i32 %32, %35
  br i1 %36, label %37, label %47

37:                                               ; preds = %25
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv75) #2
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %indvars.iv78) #2
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv78) #2
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %indvars.iv) #2
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = add nsw i32 %43, %40
  %45 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv75) #2
  %46 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %indvars.iv) #2
  store i32 %44, ptr %46, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %25, %37, %.lr.ph, %20
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %48 = load i32, ptr @N, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = icmp slt i64 %indvars.iv.next, %49
  br i1 %50, label %.lr.ph, label %._crit_edge, !llvm.loop !13

.loopexit.loopexit:                               ; preds = %79
  %.pre92 = sext i32 %80 to i64
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %.lr.ph69
  %.pre-phi = phi i64 [ %.pre92, %.loopexit.loopexit ], [ %54, %.lr.ph69 ]
  %51 = phi i32 [ %80, %.loopexit.loopexit ], [ %53, %.lr.ph69 ]
  %.146.lcssa = phi i32 [ %.3, %.loopexit.loopexit ], [ %.04567, %.lr.ph69 ]
  %52 = icmp slt i64 %indvars.iv.next89, %.pre-phi
  %indvars.iv.next84 = add nuw nsw i64 %indvars.iv83, 1
  br i1 %52, label %.lr.ph69, label %._crit_edge70, !llvm.loop !14

._crit_edge70:                                    ; preds = %.loopexit, %0, %.preheader51
  %.045.lcssa = phi i32 [ 0, %.preheader51 ], [ 0, %0 ], [ %.146.lcssa, %.loopexit ]
  ret i32 %.045.lcssa

.lr.ph69:                                         ; preds = %.preheader51, %.loopexit
  %53 = phi i32 [ %51, %.loopexit ], [ %10, %.preheader51 ]
  %indvars.iv88 = phi i64 [ %indvars.iv.next89, %.loopexit ], [ 0, %.preheader51 ]
  %indvars.iv83 = phi i64 [ %indvars.iv.next84, %.loopexit ], [ 1, %.preheader51 ]
  %.04567 = phi i32 [ %.146.lcssa, %.loopexit ], [ 0, %.preheader51 ]
  %indvars.iv.next89 = add nuw nsw i64 %indvars.iv88, 1
  %54 = sext i32 %53 to i64
  %55 = icmp slt i64 %indvars.iv.next89, %54
  br i1 %55, label %.lr.ph65, label %.loopexit

.lr.ph65:                                         ; preds = %.lr.ph69, %79
  %indvars.iv85 = phi i64 [ %indvars.iv.next86, %79 ], [ %indvars.iv83, %.lr.ph69 ]
  %.14662 = phi i32 [ %.3, %79 ], [ %.04567, %.lr.ph69 ]
  %56 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @O, i64 noundef %indvars.iv88) #2
  %57 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %indvars.iv85) #2
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = icmp eq i32 %58, 10000000
  %.pre = load i32, ptr @N, align 4, !tbaa !5
  br i1 %59, label %79, label %.preheader

.preheader:                                       ; preds = %.lr.ph65
  %60 = icmp sgt i32 %.pre, 0
  br i1 %60, label %.lr.ph60, label %._crit_edge61

._crit_edge61:                                    ; preds = %.lr.ph60, %.preheader
  %61 = phi i32 [ %.pre, %.preheader ], [ %76, %.lr.ph60 ]
  %.042.lcssa = phi i8 [ 0, %.preheader ], [ %spec.select50, %.lr.ph60 ]
  %62 = and i8 %.042.lcssa, 1
  %63 = xor i8 %62, 1
  %64 = zext nneg i8 %63 to i32
  %spec.select = add nsw i32 %.14662, %64
  br label %79

.lr.ph60:                                         ; preds = %.preheader, %.lr.ph60
  %indvars.iv81 = phi i64 [ %indvars.iv.next82, %.lr.ph60 ], [ 0, %.preheader ]
  %.04258 = phi i8 [ %spec.select50, %.lr.ph60 ], [ 0, %.preheader ]
  %65 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv81) #2
  %66 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %indvars.iv88) #2
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %68 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @O, i64 noundef %indvars.iv88) #2
  %69 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %indvars.iv85) #2
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = add nsw i32 %70, %67
  %72 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %indvars.iv81) #2
  %73 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %indvars.iv85) #2
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = icmp eq i32 %71, %74
  %spec.select50 = select i1 %75, i8 1, i8 %.04258
  %indvars.iv.next82 = add nuw nsw i64 %indvars.iv81, 1
  %76 = load i32, ptr @N, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = icmp slt i64 %indvars.iv.next82, %77
  br i1 %78, label %.lr.ph60, label %._crit_edge61, !llvm.loop !15

79:                                               ; preds = %.lr.ph65, %._crit_edge61
  %80 = phi i32 [ %.pre, %.lr.ph65 ], [ %61, %._crit_edge61 ]
  %.3 = phi i32 [ %.14662, %.lr.ph65 ], [ %spec.select, %._crit_edge61 ]
  %indvars.iv.next86 = add nuw nsw i64 %indvars.iv85, 1
  %81 = trunc nuw i64 %indvars.iv.next86 to i32
  %82 = icmp sgt i32 %80, %81
  br i1 %82, label %.lr.ph65, label %.loopexit.loopexit, !llvm.loop !16
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEaSERKS3_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10, !11}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass