; LLVM IR from sachuverma/DataStructures-Algorithms :: DSA Crack Sheet/solutions/Count Inversions.ll (Z10_mergeSortPxS_ii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5mergePxS_iii(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z10_mergeSortPxS_ii(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store i64 0, ptr %10, align 8, !tbaa !11
  %11 = load i32, ptr %8, align 4, !tbaa !9
  %12 = load i32, ptr %7, align 4, !tbaa !9
  %13 = icmp sgt i32 %11, %12
  br i1 %13, label %14, label %47

14:                                               ; preds = %4
  %15 = load i32, ptr %8, align 4, !tbaa !9
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = add nsw i32 %15, %16
  %18 = sdiv i32 %17, 2
  %19 = sext i32 %18 to i64
  store i64 %19, ptr %9, align 8, !tbaa !11
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = load i64, ptr %9, align 8, !tbaa !11
  %24 = trunc i64 %23 to i32
  %25 = call noundef i64 @_Z10_mergeSortPxS_ii(ptr noundef %20, ptr noundef %21, i32 noundef %22, i32 noundef %24)
  %26 = load i64, ptr %10, align 8, !tbaa !11
  %27 = add nsw i64 %26, %25
  store i64 %27, ptr %10, align 8, !tbaa !11
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load i64, ptr %9, align 8, !tbaa !11
  %31 = add nsw i64 %30, 1
  %32 = trunc i64 %31 to i32
  %33 = load i32, ptr %8, align 4, !tbaa !9
  %34 = call noundef i64 @_Z10_mergeSortPxS_ii(ptr noundef %28, ptr noundef %29, i32 noundef %32, i32 noundef %33)
  %35 = load i64, ptr %10, align 8, !tbaa !11
  %36 = add nsw i64 %35, %34
  store i64 %36, ptr %10, align 8, !tbaa !11
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = load i64, ptr %9, align 8, !tbaa !11
  %41 = add nsw i64 %40, 1
  %42 = trunc i64 %41 to i32
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = call noundef i64 @_Z5mergePxS_iii(ptr noundef %37, ptr noundef %38, i32 noundef %39, i32 noundef %42, i32 noundef %43)
  %45 = load i64, ptr %10, align 8, !tbaa !11
  %46 = add nsw i64 %45, %44
  store i64 %46, ptr %10, align 8, !tbaa !11
  br label %47

47:                                               ; preds = %14, %4
  %48 = load i64, ptr %10, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret i64 %48
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z5mergePxS_iii(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z10_mergeSortPxS_ii(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %3, %2
  br i1 %5, label %6, label %common.ret22

common.ret22:                                     ; preds = %4, %6
  %common.ret22.op = phi i64 [ %13, %6 ], [ 0, %4 ]
  ret i64 %common.ret22.op

6:                                                ; preds = %4
  %7 = add nsw i32 %3, %2
  %8 = sdiv i32 %7, 2
  %9 = tail call noundef i64 @_Z10_mergeSortPxS_ii(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %8)
  %narrow = add nsw i32 %8, 1
  %10 = tail call noundef i64 @_Z10_mergeSortPxS_ii(ptr noundef %0, ptr noundef %1, i32 noundef %narrow, i32 noundef %3)
  %11 = add nsw i64 %10, %9
  %12 = tail call noundef i64 @_Z5mergePxS_iii(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %narrow, i32 noundef %3)
  %13 = add nsw i64 %11, %12
  br label %common.ret22
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass