; LLVM IR from xirc/cp-algorithm :: atcoder/abc079/D/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@H = external dso_local global i32, align 4
@W = external dso_local global i32, align 4
@C = external dso_local global %"class.std::vector", align 8
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %61, %0
  %10 = load i32, ptr %1, align 4, !tbaa !5
  %11 = icmp slt i32 %10, 10
  br i1 %11, label %13, label %12

12:                                               ; preds = %9
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %64

13:                                               ; preds = %9
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %57, %13
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = icmp slt i32 %15, 10
  br i1 %16, label %18, label %17

17:                                               ; preds = %14
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %60

18:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %53, %18
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = icmp slt i32 %20, 10
  br i1 %21, label %23, label %22

22:                                               ; preds = %19
  store i32 8, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %56

23:                                               ; preds = %19
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %25) #4
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %31) #4
  %33 = load i32, ptr %1, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %34) #4
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = load i32, ptr %1, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %38) #4
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #4
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = add nsw i32 %36, %43
  store i32 %44, ptr %5, align 4, !tbaa !5
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %29, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %48) #4
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #4
  store i32 %46, ptr %52, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %53

53:                                               ; preds = %23
  %54 = load i32, ptr %4, align 4, !tbaa !5
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %4, align 4, !tbaa !5
  br label %19, !llvm.loop !9

56:                                               ; preds = %22
  br label %57

57:                                               ; preds = %56
  %58 = load i32, ptr %3, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %3, align 4, !tbaa !5
  br label %14, !llvm.loop !11

60:                                               ; preds = %17
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %1, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %1, align 4, !tbaa !5
  br label %9, !llvm.loop !12

64:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %65

65:                                               ; preds = %104, %64
  %66 = load i32, ptr %7, align 4, !tbaa !5
  %67 = load i32, ptr @H, align 4, !tbaa !5
  %68 = icmp slt i32 %66, %67
  br i1 %68, label %70, label %69

69:                                               ; preds = %65
  store i32 11, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %107

70:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %71

71:                                               ; preds = %100, %70
  %72 = load i32, ptr %8, align 4, !tbaa !5
  %73 = load i32, ptr @W, align 4, !tbaa !5
  %74 = icmp slt i32 %72, %73
  br i1 %74, label %76, label %75

75:                                               ; preds = %71
  store i32 14, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %103

76:                                               ; preds = %71
  %77 = load i32, ptr %7, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %78) #4
  %80 = load i32, ptr %8, align 4, !tbaa !5
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %81) #4
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = icmp eq i32 %83, -1
  br i1 %84, label %85, label %86

85:                                               ; preds = %76
  br label %100

86:                                               ; preds = %76
  %87 = load i32, ptr %7, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %88) #4
  %90 = load i32, ptr %8, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %91) #4
  %93 = load i32, ptr %92, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %94) #4
  %96 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %95, i64 noundef 1) #4
  %97 = load i32, ptr %96, align 4, !tbaa !5
  %98 = load i32, ptr %6, align 4, !tbaa !5
  %99 = add nsw i32 %98, %97
  store i32 %99, ptr %6, align 4, !tbaa !5
  br label %100

100:                                              ; preds = %86, %85
  %101 = load i32, ptr %8, align 4, !tbaa !5
  %102 = add nsw i32 %101, 1
  store i32 %102, ptr %8, align 4, !tbaa !5
  br label %71, !llvm.loop !13

103:                                              ; preds = %75
  br label %104

104:                                              ; preds = %103
  %105 = load i32, ptr %7, align 4, !tbaa !5
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %7, align 4, !tbaa !5
  br label %65, !llvm.loop !14

107:                                              ; preds = %69
  %108 = load i32, ptr %6, align 4, !tbaa !5
  store i32 1, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  ret i32 %108
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@H = external dso_local local_unnamed_addr global i32, align 4
@W = external dso_local local_unnamed_addr global i32, align 4
@C = external dso_local global %"class.std::vector", align 8
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #1 {
  %1 = alloca i32, align 4
  br label %.preheader31

.preheader31:                                     ; preds = %0, %6
  %indvars.iv47 = phi i64 [ 0, %0 ], [ %indvars.iv.next48, %6 ]
  br label %.preheader30

.preheader29:                                     ; preds = %6
  %2 = load i32, ptr @H, align 4, !tbaa !5
  %3 = icmp sgt i32 %2, 0
  %4 = load i32, ptr @W, align 4
  %5 = icmp sgt i32 %4, 0
  %or.cond = select i1 %3, i1 %5, i1 false
  br i1 %or.cond, label %.preheader, label %._crit_edge39

.preheader30:                                     ; preds = %.preheader31, %7
  %indvars.iv43 = phi i64 [ 0, %.preheader31 ], [ %indvars.iv.next44, %7 ]
  br label %8

6:                                                ; preds = %7
  %indvars.iv.next48 = add nuw nsw i64 %indvars.iv47, 1
  %exitcond50.not = icmp eq i64 %indvars.iv.next48, 10
  br i1 %exitcond50.not, label %.preheader29, label %.preheader31, !llvm.loop !9

7:                                                ; preds = %8
  %indvars.iv.next44 = add nuw nsw i64 %indvars.iv43, 1
  %exitcond46.not = icmp eq i64 %indvars.iv.next44, 10
  br i1 %exitcond46.not, label %6, label %.preheader30, !llvm.loop !11

8:                                                ; preds = %.preheader30, %8
  %indvars.iv = phi i64 [ 0, %.preheader30 ], [ %indvars.iv.next, %8 ]
  %9 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv43) #3
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
  %11 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv43) #3
  %12 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %indvars.iv47) #3
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv47) #3
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv) #3
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = add nsw i32 %16, %13
  store i32 %17, ptr %1, align 4, !tbaa !5
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv43) #3
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv) #3
  store i32 %19, ptr %21, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 10
  br i1 %exitcond.not, label %7, label %8, !llvm.loop !12

.preheader:                                       ; preds = %.preheader29, %._crit_edge
  %22 = phi i32 [ %25, %._crit_edge ], [ %2, %.preheader29 ]
  %23 = phi i32 [ %26, %._crit_edge ], [ %4, %.preheader29 ]
  %indvars.iv54 = phi i64 [ %indvars.iv.next55, %._crit_edge ], [ 0, %.preheader29 ]
  %.02537 = phi i32 [ %.1.lcssa, %._crit_edge ], [ 0, %.preheader29 ]
  %24 = icmp sgt i32 %23, 0
  br i1 %24, label %.lr.ph, label %._crit_edge

._crit_edge39:                                    ; preds = %._crit_edge, %.preheader29
  %.025.lcssa = phi i32 [ 0, %.preheader29 ], [ %.1.lcssa, %._crit_edge ]
  ret i32 %.025.lcssa

._crit_edge.loopexit:                             ; preds = %42
  %.pre = load i32, ptr @H, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %25 = phi i32 [ %22, %.preheader ], [ %.pre, %._crit_edge.loopexit ]
  %26 = phi i32 [ %23, %.preheader ], [ %43, %._crit_edge.loopexit ]
  %.1.lcssa = phi i32 [ %.02537, %.preheader ], [ %.2, %._crit_edge.loopexit ]
  %indvars.iv.next55 = add nuw nsw i64 %indvars.iv54, 1
  %27 = sext i32 %25 to i64
  %28 = icmp slt i64 %indvars.iv.next55, %27
  br i1 %28, label %.preheader, label %._crit_edge39, !llvm.loop !13

.lr.ph:                                           ; preds = %.preheader, %42
  %indvars.iv51 = phi i64 [ %indvars.iv.next52, %42 ], [ 0, %.preheader ]
  %.135 = phi i32 [ %.2, %42 ], [ %.02537, %.preheader ]
  %29 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv54) #3
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %indvars.iv51) #3
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = icmp eq i32 %31, -1
  br i1 %32, label %42, label %33

33:                                               ; preds = %.lr.ph
  %34 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv54) #3
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %indvars.iv51) #3
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %37) #3
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef 1) #3
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = add nsw i32 %40, %.135
  br label %42

42:                                               ; preds = %.lr.ph, %33
  %.2 = phi i32 [ %.135, %.lr.ph ], [ %41, %33 ]
  %indvars.iv.next52 = add nuw nsw i64 %indvars.iv51, 1
  %43 = load i32, ptr @W, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = icmp slt i64 %indvars.iv.next52, %44
  br i1 %45, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !15
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10, !14}
!14 = !{!"llvm.loop.unswitch.partial.disable"}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass