; LLVM IR from xirc/cp-algorithm :: atcoder/abc112/D/main.ll (Z5solveii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solveii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %43, %2
  %9 = load i32, ptr %6, align 4, !tbaa !5
  %10 = load i32, ptr %6, align 4, !tbaa !5
  %11 = mul nsw i32 %9, %10
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = icmp sle i32 %11, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %46

15:                                               ; preds = %8
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr %6, align 4, !tbaa !5
  %18 = srem i32 %16, %17
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %15
  br label %43

21:                                               ; preds = %15
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = sdiv i32 %22, %23
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = icmp sge i32 %24, %25
  br i1 %26, label %27, label %30

27:                                               ; preds = %21
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %29 = load i32, ptr %28, align 4, !tbaa !5
  store i32 %29, ptr %5, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %27, %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = sdiv i32 %31, %32
  store i32 %33, ptr %7, align 4, !tbaa !5
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = sdiv i32 %34, %35
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = icmp sge i32 %36, %37
  br i1 %38, label %39, label %42

39:                                               ; preds = %30
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %41 = load i32, ptr %40, align 4, !tbaa !5
  store i32 %41, ptr %5, align 4, !tbaa !5
  br label %42

42:                                               ; preds = %39, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %43

43:                                               ; preds = %42, %20
  %44 = load i32, ptr %6, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %6, align 4, !tbaa !5
  br label %8, !llvm.loop !9

46:                                               ; preds = %14
  %47 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %47
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solveii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i32 1, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  store i32 1, ptr %4, align 4, !tbaa !5
  %.not10 = icmp slt i32 %1, 1
  br i1 %.not10, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %23, %2
  %6 = phi i32 [ 1, %2 ], [ %24, %23 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  ret i32 %6

.lr.ph:                                           ; preds = %2, %23
  %7 = phi i32 [ %24, %23 ], [ 1, %2 ]
  %storemerge11 = phi i32 [ %26, %23 ], [ 1, %2 ]
  %8 = srem i32 %1, %storemerge11
  %9 = sdiv i32 %1, %storemerge11
  %.not7 = icmp eq i32 %8, 0
  br i1 %.not7, label %10, label %23

10:                                               ; preds = %.lr.ph
  %.not8 = icmp slt i32 %9, %0
  br i1 %.not8, label %14, label %11

11:                                               ; preds = %10
  %12 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %13 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %13, ptr %3, align 4, !tbaa !5
  %.pre = load i32, ptr %4, align 4, !tbaa !5
  %.pre14 = sdiv i32 %1, %.pre
  br label %14

14:                                               ; preds = %11, %10
  %.pre-phi = phi i32 [ %.pre14, %11 ], [ %9, %10 ]
  %15 = phi i32 [ %13, %11 ], [ %7, %10 ]
  %16 = phi i32 [ %.pre, %11 ], [ %storemerge11, %10 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  store i32 %.pre-phi, ptr %5, align 4, !tbaa !5
  %17 = sdiv i32 %1, %.pre-phi
  %.not9 = icmp slt i32 %17, %0
  br i1 %.not9, label %21, label %18

18:                                               ; preds = %14
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %20 = load i32, ptr %19, align 4, !tbaa !5
  store i32 %20, ptr %3, align 4, !tbaa !5
  %.pre12.pre = load i32, ptr %4, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %18, %14
  %.pre12 = phi i32 [ %.pre12.pre, %18 ], [ %16, %14 ]
  %22 = phi i32 [ %20, %18 ], [ %15, %14 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %23

23:                                               ; preds = %.lr.ph, %21
  %24 = phi i32 [ %7, %.lr.ph ], [ %22, %21 ]
  %25 = phi i32 [ %storemerge11, %.lr.ph ], [ %.pre12, %21 ]
  %26 = add nsw i32 %25, 1
  store i32 %26, ptr %4, align 4, !tbaa !5
  %27 = mul nsw i32 %26, %26
  %.not = icmp sgt i32 %27, %1
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass