; LLVM IR from xirc/cp-algorithm :: codeforces/1457/B/main.ll (Z5countSt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@N = external dso_local global i32, align 4
@K = external dso_local global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5countSt6vectorIiSaIiEEi(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %48, %19, %2
  %9 = load i32, ptr %6, align 4, !tbaa !9
  %10 = load i32, ptr @N, align 4, !tbaa !9
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %12, label %52

12:                                               ; preds = %8
  %13 = load i32, ptr %6, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #2
  %16 = load i32, ptr %15, align 4, !tbaa !9
  %17 = load i32, ptr %4, align 4, !tbaa !9
  %18 = icmp eq i32 %16, %17
  br i1 %18, label %19, label %22

19:                                               ; preds = %12
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr %6, align 4, !tbaa !9
  br label %8, !llvm.loop !11

22:                                               ; preds = %12
  %23 = load i32, ptr %5, align 4, !tbaa !9
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %25

25:                                               ; preds = %45, %22
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = load i32, ptr @K, align 4, !tbaa !9
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %29, label %35

29:                                               ; preds = %25
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = add nsw i32 %30, %31
  %33 = load i32, ptr @N, align 4, !tbaa !9
  %34 = icmp slt i32 %32, %33
  br label %35

35:                                               ; preds = %29, %25
  %36 = phi i1 [ false, %25 ], [ %34, %29 ]
  br i1 %36, label %38, label %37

37:                                               ; preds = %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %48

38:                                               ; preds = %35
  %39 = load i32, ptr %4, align 4, !tbaa !9
  %40 = load i32, ptr %6, align 4, !tbaa !9
  %41 = load i32, ptr %7, align 4, !tbaa !9
  %42 = add nsw i32 %40, %41
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %43) #2
  store i32 %39, ptr %44, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %38
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %7, align 4, !tbaa !9
  br label %25, !llvm.loop !13

48:                                               ; preds = %37
  %49 = load i32, ptr @K, align 4, !tbaa !9
  %50 = load i32, ptr %6, align 4, !tbaa !9
  %51 = add nsw i32 %50, %49
  store i32 %51, ptr %6, align 4, !tbaa !9
  br label %8, !llvm.loop !11

52:                                               ; preds = %8
  %53 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %53
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@N = external dso_local local_unnamed_addr global i32, align 4
@K = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5countSt6vectorIiSaIiEEi(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = load i32, ptr @N, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %.outer._crit_edge

.lr.ph:                                           ; preds = %2, %.critedge
  %.014.ph28 = phi i32 [ %27, %.critedge ], [ 0, %2 ]
  %.015.ph27 = phi i32 [ %16, %.critedge ], [ 0, %2 ]
  %5 = sext i32 %.014.ph28 to i64
  br label %6

6:                                                ; preds = %.lr.ph, %10
  %indvars.iv = phi i64 [ %5, %.lr.ph ], [ %indvars.iv.next, %10 ]
  %7 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = icmp eq i32 %8, %1
  br i1 %9, label %10, label %14

10:                                               ; preds = %6
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %11 = load i32, ptr @N, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = icmp slt i64 %indvars.iv.next, %12
  br i1 %13, label %6, label %.outer._crit_edge, !llvm.loop !9

14:                                               ; preds = %6
  %15 = trunc nsw i64 %indvars.iv to i32
  %16 = add nuw nsw i32 %.015.ph27, 1
  %17 = load i32, ptr @K, align 4, !tbaa !5
  %18 = icmp sgt i32 %17, 0
  br i1 %18, label %.lr.ph23.preheader, label %.critedge

.lr.ph23.preheader:                               ; preds = %14
  %sext = shl i64 %indvars.iv, 32
  %19 = ashr exact i64 %sext, 32
  %20 = load i32, ptr @N, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = icmp slt i64 %19, %21
  br i1 %22, label %.lr.ph48, label %.critedge

.lr.ph23:                                         ; preds = %.lr.ph48
  %23 = add nsw i64 %indvars.iv.next37, %19
  %24 = load i32, ptr @N, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = icmp slt i64 %23, %25
  br i1 %26, label %.lr.ph48, label %.critedge, !llvm.loop !11

.critedge:                                        ; preds = %.lr.ph48, %.lr.ph23, %.lr.ph23.preheader, %14
  %.lcssa = phi i32 [ %17, %14 ], [ %17, %.lr.ph23.preheader ], [ %32, %.lr.ph23 ], [ %32, %.lr.ph48 ]
  %27 = add nsw i32 %.lcssa, %15
  %28 = load i32, ptr @N, align 4, !tbaa !5
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %.lr.ph, label %.outer._crit_edge, !llvm.loop !9

.lr.ph48:                                         ; preds = %.lr.ph23.preheader, %.lr.ph23
  %indvars.iv3647 = phi i64 [ %indvars.iv.next37, %.lr.ph23 ], [ 0, %.lr.ph23.preheader ]
  %30 = add nsw i64 %indvars.iv3647, %19
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %30) #1
  store i32 %1, ptr %31, align 4, !tbaa !5
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv3647, 1
  %32 = load i32, ptr @K, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = icmp slt i64 %indvars.iv.next37, %33
  br i1 %34, label %.lr.ph23, label %.critedge, !llvm.loop !11

.outer._crit_edge:                                ; preds = %.critedge, %10, %2
  %.015.ph.lcssa = phi i32 [ 0, %2 ], [ %.015.ph27, %10 ], [ %16, %.critedge ]
  ret i32 %.015.ph.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass