; LLVM IR from xirc/cp-algorithm :: atcoder/abc029/D/main.ll (Z5solvei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@ds = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z4powii(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvei(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  store i64 0, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 9, ptr %4, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %63, %1
  %9 = load i32, ptr %4, align 4, !tbaa !5
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %12, label %11

11:                                               ; preds = %8
  store i32 2, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %66

12:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = call noundef i64 @_Z4powii(i32 noundef %13)
  store i64 %14, ptr %6, align 8, !tbaa !9
  %15 = load i64, ptr %6, align 8, !tbaa !9
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = icmp sgt i64 %15, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %12
  store i32 4, ptr %5, align 4
  br label %60

20:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %21 = load i32, ptr %2, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = load i64, ptr %6, align 8, !tbaa !9
  %24 = sdiv i64 %22, %23
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %7, align 4, !tbaa !5
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ds, i64 noundef %27) #2
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = sub nsw i32 %29, 1
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %31) #2
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = load i64, ptr %3, align 8, !tbaa !9
  %35 = add nsw i64 %34, %33
  store i64 %35, ptr %3, align 8, !tbaa !9
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = icmp eq i32 %36, 1
  br i1 %37, label %38, label %54

38:                                               ; preds = %20
  %39 = load i32, ptr %2, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = load i64, ptr %6, align 8, !tbaa !9
  %42 = srem i64 %40, %41
  %43 = add nsw i64 %42, 1
  %44 = load i64, ptr %3, align 8, !tbaa !9
  %45 = add nsw i64 %44, %43
  store i64 %45, ptr %3, align 8, !tbaa !9
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = sub nsw i32 %46, 1
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ds, i64 noundef %48) #2
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef 9) #2
  %51 = load i64, ptr %50, align 8, !tbaa !9
  %52 = load i64, ptr %3, align 8, !tbaa !9
  %53 = add nsw i64 %52, %51
  store i64 %53, ptr %3, align 8, !tbaa !9
  br label %54

54:                                               ; preds = %38, %20
  %55 = load i64, ptr %6, align 8, !tbaa !9
  %56 = load i32, ptr %2, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = srem i64 %57, %55
  %59 = trunc i64 %58 to i32
  store i32 %59, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  store i32 0, ptr %5, align 4
  br label %60

60:                                               ; preds = %54, %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %61 = load i32, ptr %5, align 4
  switch i32 %61, label %76 [
    i32 0, label %62
    i32 4, label %63
  ]

62:                                               ; preds = %60
  br label %63

63:                                               ; preds = %62, %60
  %64 = load i32, ptr %4, align 4, !tbaa !5
  %65 = add nsw i32 %64, -1
  store i32 %65, ptr %4, align 4, !tbaa !5
  br label %8, !llvm.loop !11

66:                                               ; preds = %11
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ds, i64 noundef 0) #2
  %68 = load i32, ptr %2, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #2
  %71 = load i64, ptr %70, align 8, !tbaa !9
  %72 = load i64, ptr %3, align 8, !tbaa !9
  %73 = add nsw i64 %72, %71
  store i64 %73, ptr %3, align 8, !tbaa !9
  %74 = load i64, ptr %3, align 8, !tbaa !9
  %75 = trunc i64 %74 to i32
  store i32 1, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret i32 %75

76:                                               ; preds = %60
  unreachable
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@ds = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z4powii(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvei(i32 noundef %0) local_unnamed_addr #0 {
  br label %9

2:                                                ; preds = %34
  %3 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ds, i64 noundef 0) #1
  %4 = sext i32 %.1 to i64
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %4) #1
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = add nsw i64 %6, %.2
  %8 = trunc i64 %7 to i32
  ret i32 %8

9:                                                ; preds = %1, %34
  %indvars.iv = phi i64 [ 9, %1 ], [ %indvars.iv.next, %34 ]
  %.029 = phi i32 [ %0, %1 ], [ %.1, %34 ]
  %.02128 = phi i64 [ 0, %1 ], [ %.2, %34 ]
  %10 = trunc nuw nsw i64 %indvars.iv to i32
  %11 = tail call noundef i64 @_Z4powii(i32 noundef %10)
  %12 = sext i32 %.029 to i64
  %13 = icmp sgt i64 %11, %12
  br i1 %13, label %34, label %14

14:                                               ; preds = %9
  %15 = sdiv i64 %12, %11
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ds, i64 noundef %indvars.iv) #1
  %17 = shl i64 %15, 32
  %sext = add i64 %17, -4294967296
  %18 = ashr exact i64 %sext, 32
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %18) #1
  %20 = load i64, ptr %19, align 8, !tbaa !5
  %21 = add nsw i64 %20, %.02128
  %22 = and i64 %15, 4294967295
  %23 = icmp eq i64 %22, 1
  %24 = srem i64 %12, %11
  br i1 %23, label %25, label %._crit_edge

25:                                               ; preds = %14
  %26 = add nsw i64 %indvars.iv, -1
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ds, i64 noundef %26) #1
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef 9) #1
  %29 = load i64, ptr %28, align 8, !tbaa !5
  %30 = add i64 %21, 1
  %31 = add i64 %30, %24
  %32 = add nsw i64 %31, %29
  br label %._crit_edge

._crit_edge:                                      ; preds = %14, %25
  %.122 = phi i64 [ %32, %25 ], [ %21, %14 ]
  %33 = trunc nsw i64 %24 to i32
  br label %34

34:                                               ; preds = %9, %._crit_edge
  %.2 = phi i64 [ %.122, %._crit_edge ], [ %.02128, %9 ]
  %.1 = phi i32 [ %33, %._crit_edge ], [ %.029, %9 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %35 = icmp ugt i64 %indvars.iv, 1
  br i1 %35, label %9, label %2, !llvm.loop !9
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass