; LLVM IR from imteekay/algorithms :: competitive-programming/uri (alarm_clock)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !5
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %8 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %9 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %8, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %9, ptr noundef nonnull align 4 dereferenceable(4) %5)
  br label %11

11:                                               ; preds = %122, %0
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = add nsw i32 %12, %13
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = add nsw i32 %14, %15
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = add nsw i32 %16, %17
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %130

20:                                               ; preds = %11
  %21 = load i32, ptr %2, align 4, !tbaa !5
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = icmp eq i32 %21, %22
  br i1 %23, label %24, label %29

24:                                               ; preds = %20
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = icmp eq i32 %25, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %24
  store i32 1440, ptr %6, align 4, !tbaa !5
  br label %122

29:                                               ; preds = %24, %20
  %30 = load i32, ptr %2, align 4, !tbaa !5
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = icmp sgt i32 %30, %31
  br i1 %32, label %33, label %69

33:                                               ; preds = %29
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = icmp sgt i32 %34, %35
  br i1 %36, label %37, label %47

37:                                               ; preds = %33
  %38 = load i32, ptr %2, align 4, !tbaa !5
  %39 = load i32, ptr %4, align 4, !tbaa !5
  %40 = sub nsw i32 %38, %39
  %41 = mul nsw i32 %40, 60
  %42 = sub nsw i32 1440, %41
  %43 = load i32, ptr %5, align 4, !tbaa !5
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = sub nsw i32 %43, %44
  %46 = add nsw i32 %42, %45
  store i32 %46, ptr %6, align 4, !tbaa !5
  br label %68

47:                                               ; preds = %33
  %48 = load i32, ptr %3, align 4, !tbaa !5
  %49 = load i32, ptr %5, align 4, !tbaa !5
  %50 = icmp sgt i32 %48, %49
  br i1 %50, label %51, label %61

51:                                               ; preds = %47
  %52 = load i32, ptr %2, align 4, !tbaa !5
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = sub nsw i32 %52, %53
  %55 = mul nsw i32 %54, 60
  %56 = sub nsw i32 1440, %55
  %57 = load i32, ptr %5, align 4, !tbaa !5
  %58 = load i32, ptr %3, align 4, !tbaa !5
  %59 = sub nsw i32 %57, %58
  %60 = add nsw i32 %56, %59
  store i32 %60, ptr %6, align 4, !tbaa !5
  br label %67

61:                                               ; preds = %47
  %62 = load i32, ptr %2, align 4, !tbaa !5
  %63 = load i32, ptr %4, align 4, !tbaa !5
  %64 = sub nsw i32 %62, %63
  %65 = mul nsw i32 %64, 60
  %66 = sub nsw i32 1440, %65
  store i32 %66, ptr %6, align 4, !tbaa !5
  br label %67

67:                                               ; preds = %61, %51
  br label %68

68:                                               ; preds = %67, %37
  br label %121

69:                                               ; preds = %29
  %70 = load i32, ptr %4, align 4, !tbaa !5
  %71 = load i32, ptr %2, align 4, !tbaa !5
  %72 = icmp sgt i32 %70, %71
  br i1 %72, label %73, label %106

73:                                               ; preds = %69
  %74 = load i32, ptr %3, align 4, !tbaa !5
  %75 = load i32, ptr %5, align 4, !tbaa !5
  %76 = icmp sgt i32 %74, %75
  br i1 %76, label %77, label %86

77:                                               ; preds = %73
  %78 = load i32, ptr %4, align 4, !tbaa !5
  %79 = load i32, ptr %2, align 4, !tbaa !5
  %80 = sub nsw i32 %78, %79
  %81 = mul nsw i32 %80, 60
  %82 = load i32, ptr %5, align 4, !tbaa !5
  %83 = add nsw i32 %81, %82
  %84 = load i32, ptr %3, align 4, !tbaa !5
  %85 = sub nsw i32 %83, %84
  store i32 %85, ptr %6, align 4, !tbaa !5
  br label %105

86:                                               ; preds = %73
  %87 = load i32, ptr %5, align 4, !tbaa !5
  %88 = load i32, ptr %3, align 4, !tbaa !5
  %89 = icmp sgt i32 %87, %88
  br i1 %89, label %90, label %99

90:                                               ; preds = %86
  %91 = load i32, ptr %4, align 4, !tbaa !5
  %92 = load i32, ptr %2, align 4, !tbaa !5
  %93 = sub nsw i32 %91, %92
  %94 = mul nsw i32 %93, 60
  %95 = load i32, ptr %5, align 4, !tbaa !5
  %96 = add nsw i32 %94, %95
  %97 = load i32, ptr %3, align 4, !tbaa !5
  %98 = sub nsw i32 %96, %97
  store i32 %98, ptr %6, align 4, !tbaa !5
  br label %104

99:                                               ; preds = %86
  %100 = load i32, ptr %4, align 4, !tbaa !5
  %101 = load i32, ptr %2, align 4, !tbaa !5
  %102 = sub nsw i32 %100, %101
  %103 = mul nsw i32 %102, 60
  store i32 %103, ptr %6, align 4, !tbaa !5
  br label %104

104:                                              ; preds = %99, %90
  br label %105

105:                                              ; preds = %104, %77
  br label %120

106:                                              ; preds = %69
  %107 = load i32, ptr %5, align 4, !tbaa !5
  %108 = load i32, ptr %3, align 4, !tbaa !5
  %109 = icmp sgt i32 %107, %108
  br i1 %109, label %110, label %114

110:                                              ; preds = %106
  %111 = load i32, ptr %5, align 4, !tbaa !5
  %112 = load i32, ptr %3, align 4, !tbaa !5
  %113 = sub nsw i32 %111, %112
  store i32 %113, ptr %6, align 4, !tbaa !5
  br label %119

114:                                              ; preds = %106
  %115 = load i32, ptr %5, align 4, !tbaa !5
  %116 = add nsw i32 1440, %115
  %117 = load i32, ptr %3, align 4, !tbaa !5
  %118 = sub nsw i32 %116, %117
  store i32 %118, ptr %6, align 4, !tbaa !5
  br label %119

119:                                              ; preds = %114, %110
  br label %120

120:                                              ; preds = %119, %105
  br label %121

121:                                              ; preds = %120, %68
  br label %122

122:                                              ; preds = %121, %28
  %123 = load i32, ptr %6, align 4, !tbaa !5
  %124 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %123)
  %125 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %124, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %126 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %127 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %126, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %128 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %127, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %129 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %128, ptr noundef nonnull align 4 dereferenceable(4) %5)
  br label %11, !llvm.loop !9

130:                                              ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
  %5 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %5, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %6, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %8 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = load i32, ptr %2, align 4, !tbaa !5
  %11 = add nsw i32 %10, %9
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = add nsw i32 %11, %12
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = sub i32 0, %14
  %.not20 = icmp eq i32 %13, %15
  br i1 %.not20, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %58
  %16 = phi i32 [ %70, %58 ], [ %14, %0 ]
  %17 = phi i32 [ %68, %58 ], [ %12, %0 ]
  %18 = phi i32 [ %66, %58 ], [ %10, %0 ]
  %19 = phi i32 [ %65, %58 ], [ %9, %0 ]
  %20 = icmp eq i32 %19, %17
  %21 = icmp eq i32 %18, %16
  %or.cond = and i1 %20, %21
  br i1 %or.cond, label %58, label %22

22:                                               ; preds = %.lr.ph
  %23 = icmp sgt i32 %19, %17
  br i1 %23, label %24, label %38

24:                                               ; preds = %22
  %25 = icmp sgt i32 %16, %18
  br i1 %25, label %26, label %30

26:                                               ; preds = %24
  %27 = sub nsw i32 %19, %17
  %.neg17 = mul i32 %27, -60
  %reass.sub23 = sub i32 %16, %18
  %28 = add i32 %reass.sub23, 1440
  %29 = add i32 %28, %.neg17
  br label %58

30:                                               ; preds = %24
  %31 = icmp sgt i32 %18, %16
  %32 = sub nsw i32 %19, %17
  %.neg16 = mul i32 %32, -60
  br i1 %31, label %33, label %36

33:                                               ; preds = %30
  %reass.sub22 = sub i32 %16, %18
  %34 = add i32 %reass.sub22, 1440
  %35 = add i32 %34, %.neg16
  br label %58

36:                                               ; preds = %30
  %37 = add i32 %.neg16, 1440
  br label %58

38:                                               ; preds = %22
  %39 = icmp sgt i32 %17, %19
  br i1 %39, label %40, label %54

40:                                               ; preds = %38
  %41 = icmp sgt i32 %18, %16
  br i1 %41, label %42, label %47

42:                                               ; preds = %40
  %43 = sub nsw i32 %17, %19
  %44 = mul nsw i32 %43, 60
  %45 = sub i32 %16, %18
  %46 = add i32 %45, %44
  br label %58

47:                                               ; preds = %40
  %48 = icmp sgt i32 %16, %18
  %49 = sub nsw i32 %17, %19
  %50 = mul nsw i32 %49, 60
  br i1 %48, label %51, label %58

51:                                               ; preds = %47
  %52 = sub i32 %16, %18
  %53 = add i32 %52, %50
  br label %58

54:                                               ; preds = %38
  %55 = icmp sgt i32 %16, %18
  %56 = sub i32 %16, %18
  %57 = add i32 %56, 1440
  %spec.select = select i1 %55, i32 %56, i32 %57
  br label %58

58:                                               ; preds = %54, %47, %.lr.ph, %33, %36, %26, %42, %51
  %.0 = phi i32 [ %29, %26 ], [ %35, %33 ], [ %37, %36 ], [ %46, %42 ], [ %53, %51 ], [ 1440, %.lr.ph ], [ %50, %47 ], [ %spec.select, %54 ]
  %59 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %.0)
  %60 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %59, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  %61 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %62 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %61, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %63 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %62, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %64 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) %63, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %65 = load i32, ptr %1, align 4, !tbaa !5
  %66 = load i32, ptr %2, align 4, !tbaa !5
  %67 = add nsw i32 %66, %65
  %68 = load i32, ptr %3, align 4, !tbaa !5
  %69 = add nsw i32 %67, %68
  %70 = load i32, ptr %4, align 4, !tbaa !5
  %71 = sub i32 0, %70
  %.not = icmp eq i32 %69, %71
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %58, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #5
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass