; LLVM IR from xirc/cp-algorithm :: atcoder/abc080/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::bitset" = type { %"struct.std::_Base_bitset" }
%"struct.std::_Base_bitset" = type { i64 }
%"class.std::bitset<10>::reference" = type { ptr, i64 }

@N = external dso_local global i32, align 4
@F = external dso_local global %"class.std::vector", align 8
@P = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca %"class.std::bitset", align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %"class.std::bitset<10>::reference", align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 1024, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  %11 = call noundef i32 @_ZNSt14numeric_limitsIiE6lowestEv() #4
  store i32 %11, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %67, %0
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = icmp slt i32 %13, 1024
  br i1 %14, label %16, label %15

15:                                               ; preds = %12
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %70

16:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  call void @_ZNSt6bitsetILm10EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8) %5, i64 noundef %18) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %61, %16
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = load i32, ptr @N, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %19
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %64

24:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %48, %24
  %26 = load i32, ptr %9, align 4, !tbaa !5
  %27 = icmp slt i32 %26, 10
  br i1 %27, label %29, label %28

28:                                               ; preds = %25
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %51

29:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 16, ptr %10) #4
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind writable sret(%"class.std::bitset<10>::reference") align 8 %10, ptr noundef nonnull align 8 dereferenceable(8) %5, i64 noundef %31)
  %32 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %10) #4
  br i1 %32, label %33, label %42

33:                                               ; preds = %29
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %35) #4
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %38) #4
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = icmp eq i32 %40, 1
  br label %42

42:                                               ; preds = %33, %29
  %43 = phi i1 [ false, %29 ], [ %41, %33 ]
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %10) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %10) #4
  br i1 %43, label %44, label %47

44:                                               ; preds = %42
  %45 = load i32, ptr %8, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %8, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %44, %42
  br label %48

48:                                               ; preds = %47
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %9, align 4, !tbaa !5
  br label %25, !llvm.loop !9

51:                                               ; preds = %28
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @P, i64 noundef %53) #4
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %56) #4
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = load i32, ptr %6, align 4, !tbaa !5
  %60 = add nsw i32 %59, %58
  store i32 %60, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %61

61:                                               ; preds = %51
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %7, align 4, !tbaa !5
  br label %19, !llvm.loop !11

64:                                               ; preds = %23
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %2, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %66 = load i32, ptr %65, align 4, !tbaa !5
  store i32 %66, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  br label %67

67:                                               ; preds = %64
  %68 = load i32, ptr %3, align 4, !tbaa !5
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %3, align 4, !tbaa !5
  br label %12, !llvm.loop !12

70:                                               ; preds = %15
  %71 = load i32, ptr %2, align 4, !tbaa !5
  store i32 1, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i32 %71
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt14numeric_limitsIiE6lowestEv() #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<10>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::bitset" = type { %"struct.std::_Base_bitset" }
%"struct.std::_Base_bitset" = type { i64 }
%"class.std::bitset<10>::reference" = type { ptr, i64 }

@N = external dso_local local_unnamed_addr global i32, align 4
@F = external dso_local global %"class.std::vector", align 8
@P = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca %"class.std::bitset", align 8
  %3 = alloca i32, align 4
  %4 = alloca %"class.std::bitset<10>::reference", align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
  %5 = tail call noundef i32 @_ZNSt14numeric_limitsIiE6lowestEv() #3
  store i32 %5, ptr %1, align 4, !tbaa !5
  br label %7

6:                                                ; preds = %._crit_edge
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
  ret i32 %12

7:                                                ; preds = %0, %._crit_edge
  %indvars.iv22 = phi i64 [ 1, %0 ], [ %indvars.iv.next23, %._crit_edge ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
  call void @_ZNSt6bitsetILm10EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef %indvars.iv22) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  %8 = load i32, ptr @N, align 4, !tbaa !5
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.preheader, label %._crit_edge

.preheader:                                       ; preds = %7, %91
  %indvars.iv = phi i64 [ %indvars.iv.next, %91 ], [ 0, %7 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 0)
  %10 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %10, label %13, label %.critedge

._crit_edge:                                      ; preds = %91, %7
  %11 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %12 = load i32, ptr %11, align 4, !tbaa !5
  store i32 %12, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
  %indvars.iv.next23 = add nuw nsw i64 %indvars.iv22, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next23, 1024
  br i1 %exitcond.not, label %6, label %7, !llvm.loop !9

13:                                               ; preds = %.preheader
  %14 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef 0) #3
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = icmp eq i32 %16, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %18 = zext i1 %17 to i32
  br label %19

.critedge:                                        ; preds = %.preheader
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %19

19:                                               ; preds = %13, %.critedge
  %.1 = phi i32 [ 0, %.critedge ], [ %18, %13 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 1)
  %20 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %20, label %21, label %.critedge.1

.critedge.1:                                      ; preds = %19
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %27

21:                                               ; preds = %19
  %22 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef 1) #3
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp eq i32 %24, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %26 = zext i1 %25 to i32
  %spec.select.1 = add nuw nsw i32 %.1, %26
  br label %27

27:                                               ; preds = %21, %.critedge.1
  %.1.1 = phi i32 [ %.1, %.critedge.1 ], [ %spec.select.1, %21 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 2)
  %28 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %28, label %29, label %.critedge.2

.critedge.2:                                      ; preds = %27
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %35

29:                                               ; preds = %27
  %30 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef 2) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp eq i32 %32, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %34 = zext i1 %33 to i32
  %spec.select.2 = add nuw nsw i32 %.1.1, %34
  br label %35

35:                                               ; preds = %29, %.critedge.2
  %.1.2 = phi i32 [ %.1.1, %.critedge.2 ], [ %spec.select.2, %29 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 3)
  %36 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %36, label %37, label %.critedge.3

.critedge.3:                                      ; preds = %35
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %43

37:                                               ; preds = %35
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef 3) #3
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = icmp eq i32 %40, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %42 = zext i1 %41 to i32
  %spec.select.3 = add nuw nsw i32 %.1.2, %42
  br label %43

43:                                               ; preds = %37, %.critedge.3
  %.1.3 = phi i32 [ %.1.2, %.critedge.3 ], [ %spec.select.3, %37 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 4)
  %44 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %44, label %45, label %.critedge.4

.critedge.4:                                      ; preds = %43
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %51

45:                                               ; preds = %43
  %46 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef 4) #3
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = icmp eq i32 %48, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %50 = zext i1 %49 to i32
  %spec.select.4 = add nuw nsw i32 %.1.3, %50
  br label %51

51:                                               ; preds = %45, %.critedge.4
  %.1.4 = phi i32 [ %.1.3, %.critedge.4 ], [ %spec.select.4, %45 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 5)
  %52 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %52, label %53, label %.critedge.5

.critedge.5:                                      ; preds = %51
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %59

53:                                               ; preds = %51
  %54 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef 5) #3
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = icmp eq i32 %56, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %58 = zext i1 %57 to i32
  %spec.select.5 = add nuw nsw i32 %.1.4, %58
  br label %59

59:                                               ; preds = %53, %.critedge.5
  %.1.5 = phi i32 [ %.1.4, %.critedge.5 ], [ %spec.select.5, %53 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 6)
  %60 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %60, label %61, label %.critedge.6

.critedge.6:                                      ; preds = %59
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %67

61:                                               ; preds = %59
  %62 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef 6) #3
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = icmp eq i32 %64, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %66 = zext i1 %65 to i32
  %spec.select.6 = add nuw nsw i32 %.1.5, %66
  br label %67

67:                                               ; preds = %61, %.critedge.6
  %.1.6 = phi i32 [ %.1.5, %.critedge.6 ], [ %spec.select.6, %61 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 7)
  %68 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %68, label %69, label %.critedge.7

.critedge.7:                                      ; preds = %67
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %75

69:                                               ; preds = %67
  %70 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef 7) #3
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = icmp eq i32 %72, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %74 = zext i1 %73 to i32
  %spec.select.7 = add nuw nsw i32 %.1.6, %74
  br label %75

75:                                               ; preds = %69, %.critedge.7
  %.1.7 = phi i32 [ %.1.6, %.critedge.7 ], [ %spec.select.7, %69 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 8)
  %76 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %76, label %77, label %.critedge.8

.critedge.8:                                      ; preds = %75
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %83

77:                                               ; preds = %75
  %78 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef 8) #3
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %81 = icmp eq i32 %80, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %82 = zext i1 %81 to i32
  %spec.select.8 = add nuw nsw i32 %.1.7, %82
  br label %83

83:                                               ; preds = %77, %.critedge.8
  %.1.8 = phi i32 [ %.1.7, %.critedge.8 ], [ %spec.select.8, %77 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  call void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<10>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef 9)
  %84 = call noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  br i1 %84, label %85, label %.critedge.9

.critedge.9:                                      ; preds = %83
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  br label %91

85:                                               ; preds = %83
  %86 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @F, i64 noundef %indvars.iv) #3
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef 9) #3
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = icmp eq i32 %88, 1
  call void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %90 = zext i1 %89 to i32
  %spec.select.9 = add nuw nsw i32 %.1.8, %90
  br label %91

91:                                               ; preds = %85, %.critedge.9
  %.1.9 = phi i32 [ %.1.8, %.critedge.9 ], [ %spec.select.9, %85 ]
  %92 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @P, i64 noundef %indvars.iv) #3
  %93 = zext nneg i32 %.1.9 to i64
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %93) #3
  %95 = load i32, ptr %94, align 4, !tbaa !5
  %96 = load i32, ptr %3, align 4, !tbaa !5
  %97 = add nsw i32 %96, %95
  store i32 %97, ptr %3, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %98 = load i32, ptr @N, align 4, !tbaa !5
  %99 = sext i32 %98 to i64
  %100 = icmp slt i64 %indvars.iv.next, %99
  br i1 %100, label %.preheader, label %._crit_edge, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNSt14numeric_limitsIiE6lowestEv() local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<10>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm10EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm10EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass