; LLVM IR from VAR-solutions/Algorithms :: Dynamic Programming/coin change/cpp/coin change.ll (Z7getWayslSt6vectorIlSaIlEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z7getWayslSt6vectorIlSaIlEE(i64 noundef %0, ptr noundef %1) #1 {
  %3 = alloca i64, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  %13 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %14 = load i64, ptr %3, align 8, !tbaa !5
  %15 = add nsw i64 %14, 1
  %16 = call ptr @llvm.stacksave.p0()
  store ptr %16, ptr %5, align 8
  %17 = mul nuw i64 %13, %15
  %18 = alloca i64, i64 %17, align 16
  store i64 %13, ptr %6, align 8
  store i64 %15, ptr %7, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !11
  br label %19

19:                                               ; preds = %100, %2
  %20 = load i32, ptr %8, align 4, !tbaa !11
  %21 = sext i32 %20 to i64
  %22 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %23 = icmp ult i64 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %19
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %103

25:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !11
  br label %26

26:                                               ; preds = %96, %25
  %27 = load i32, ptr %10, align 4, !tbaa !11
  %28 = sext i32 %27 to i64
  %29 = load i64, ptr %3, align 8, !tbaa !5
  %30 = add nsw i64 %29, 1
  %31 = icmp slt i64 %28, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %26
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %99

33:                                               ; preds = %26
  %34 = load i32, ptr %10, align 4, !tbaa !11
  %35 = icmp eq i32 %34, 0
  br i1 %35, label %36, label %44

36:                                               ; preds = %33
  %37 = load i32, ptr %8, align 4, !tbaa !11
  %38 = sext i32 %37 to i64
  %39 = mul nsw i64 %38, %15
  %40 = getelementptr inbounds i64, ptr %18, i64 %39
  %41 = load i32, ptr %10, align 4, !tbaa !11
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds i64, ptr %40, i64 %42
  store i64 1, ptr %43, align 8, !tbaa !5
  br label %95

44:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %45 = load i32, ptr %10, align 4, !tbaa !11
  %46 = sext i32 %45 to i64
  %47 = load i32, ptr %8, align 4, !tbaa !11
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %48) #3
  %50 = load i64, ptr %49, align 8, !tbaa !5
  %51 = sub nsw i64 %46, %50
  %52 = icmp sge i64 %51, 0
  br i1 %52, label %53, label %67

53:                                               ; preds = %44
  %54 = load i32, ptr %8, align 4, !tbaa !11
  %55 = sext i32 %54 to i64
  %56 = mul nsw i64 %55, %15
  %57 = getelementptr inbounds i64, ptr %18, i64 %56
  %58 = load i32, ptr %10, align 4, !tbaa !11
  %59 = sext i32 %58 to i64
  %60 = load i32, ptr %8, align 4, !tbaa !11
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %61) #3
  %63 = load i64, ptr %62, align 8, !tbaa !5
  %64 = sub nsw i64 %59, %63
  %65 = getelementptr inbounds i64, ptr %57, i64 %64
  %66 = load i64, ptr %65, align 8, !tbaa !5
  br label %68

67:                                               ; preds = %44
  br label %68

68:                                               ; preds = %67, %53
  %69 = phi i64 [ %66, %53 ], [ 0, %67 ]
  store i64 %69, ptr %11, align 8, !tbaa !5
  %70 = load i32, ptr %8, align 4, !tbaa !11
  %71 = icmp sgt i32 %70, 0
  br i1 %71, label %72, label %82

72:                                               ; preds = %68
  %73 = load i32, ptr %8, align 4, !tbaa !11
  %74 = sub nsw i32 %73, 1
  %75 = sext i32 %74 to i64
  %76 = mul nsw i64 %75, %15
  %77 = getelementptr inbounds i64, ptr %18, i64 %76
  %78 = load i32, ptr %10, align 4, !tbaa !11
  %79 = sext i32 %78 to i64
  %80 = getelementptr inbounds i64, ptr %77, i64 %79
  %81 = load i64, ptr %80, align 8, !tbaa !5
  br label %83

82:                                               ; preds = %68
  br label %83

83:                                               ; preds = %82, %72
  %84 = phi i64 [ %81, %72 ], [ 0, %82 ]
  store i64 %84, ptr %12, align 8, !tbaa !5
  %85 = load i64, ptr %11, align 8, !tbaa !5
  %86 = load i64, ptr %12, align 8, !tbaa !5
  %87 = add nsw i64 %85, %86
  %88 = load i32, ptr %8, align 4, !tbaa !11
  %89 = sext i32 %88 to i64
  %90 = mul nsw i64 %89, %15
  %91 = getelementptr inbounds i64, ptr %18, i64 %90
  %92 = load i32, ptr %10, align 4, !tbaa !11
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds i64, ptr %91, i64 %93
  store i64 %87, ptr %94, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  br label %95

95:                                               ; preds = %83, %36
  br label %96

96:                                               ; preds = %95
  %97 = load i32, ptr %10, align 4, !tbaa !11
  %98 = add nsw i32 %97, 1
  store i32 %98, ptr %10, align 4, !tbaa !11
  br label %26, !llvm.loop !13

99:                                               ; preds = %32
  br label %100

100:                                              ; preds = %99
  %101 = load i32, ptr %8, align 4, !tbaa !11
  %102 = add nsw i32 %101, 1
  store i32 %102, ptr %8, align 4, !tbaa !11
  br label %19, !llvm.loop !15

103:                                              ; preds = %24
  %104 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %105 = sub i64 %104, 1
  %106 = mul nsw i64 %105, %15
  %107 = getelementptr inbounds i64, ptr %18, i64 %106
  %108 = load i64, ptr %3, align 8, !tbaa !5
  %109 = getelementptr inbounds i64, ptr %107, i64 %108
  %110 = load i64, ptr %109, align 8, !tbaa !5
  store i32 1, ptr %9, align 4
  %111 = load ptr, ptr %5, align 8
  call void @llvm.stackrestore.p0(ptr %111)
  ret i64 %110
}

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z7getWayslSt6vectorIlSaIlEE(i64 noundef %0, ptr noundef nonnull %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %4 = add nsw i64 %0, 1
  %5 = mul nuw i64 %3, %4
  %6 = alloca i64, i64 %5, align 16
  %7 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %.not32 = icmp eq i64 %7, 0
  br i1 %.not32, label %._crit_edge31, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %2
  %.not28 = icmp slt i64 %0, 0
  br i1 %.not28, label %.preheader.us, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.preheader.lr.ph
  %.not.peel = icmp eq i64 %0, 0
  %.not.us.peel = icmp eq i64 %0, 0
  br label %.preheader

.preheader.us:                                    ; preds = %.preheader.lr.ph, %.preheader.us
  %indvars.iv41 = phi i64 [ %indvars.iv.next42, %.preheader.us ], [ 0, %.preheader.lr.ph ]
  %indvars.iv.next42 = add nuw nsw i64 %indvars.iv41, 1
  %8 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %9 = icmp ugt i64 %8, %indvars.iv.next42
  br i1 %9, label %.preheader.us, label %._crit_edge31, !llvm.loop !5

.preheader:                                       ; preds = %.preheader.preheader, %._crit_edge
  %10 = phi i64 [ %37, %._crit_edge ], [ 0, %.preheader.preheader ]
  %.030 = phi i32 [ %36, %._crit_edge ], [ 0, %.preheader.preheader ]
  %11 = mul nuw nsw i64 %10, %4
  %12 = getelementptr inbounds i64, ptr %6, i64 %11
  %.not27 = icmp eq i32 %.030, 0
  %13 = add nsw i32 %.030, -1
  %14 = zext nneg i32 %13 to i64
  %15 = mul nuw nsw i64 %4, %14
  %16 = getelementptr inbounds i64, ptr %6, i64 %15
  store i64 1, ptr %12, align 8, !tbaa !7
  br i1 %.not27, label %18, label %17

17:                                               ; preds = %.preheader
  br i1 %.not.peel, label %._crit_edge, label %.lr.ph.split.peel.next

18:                                               ; preds = %.preheader
  br i1 %.not.us.peel, label %._crit_edge, label %.lr.ph.split.us.peel.next

.lr.ph.split.us.peel.next:                        ; preds = %18, %27
  %indvars.iv37 = phi i64 [ %indvars.iv.next38, %27 ], [ 1, %18 ]
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #1
  %20 = load i64, ptr %19, align 8, !tbaa !7
  %.not26.us = icmp sgt i64 %20, %indvars.iv37
  br i1 %.not26.us, label %27, label %21

21:                                               ; preds = %.lr.ph.split.us.peel.next
  %22 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #1
  %23 = load i64, ptr %22, align 8, !tbaa !7
  %24 = sub nsw i64 %indvars.iv37, %23
  %25 = getelementptr inbounds i64, ptr %12, i64 %24
  %26 = load i64, ptr %25, align 8, !tbaa !7
  br label %27

27:                                               ; preds = %.lr.ph.split.us.peel.next, %21
  %28 = phi i64 [ %26, %21 ], [ 0, %.lr.ph.split.us.peel.next ]
  %29 = getelementptr inbounds i64, ptr %12, i64 %indvars.iv37
  store i64 %28, ptr %29, align 8, !tbaa !7
  %indvars.iv.next38 = add nuw nsw i64 %indvars.iv37, 1
  %.not.us.not = icmp slt i64 %indvars.iv37, %0
  br i1 %.not.us.not, label %.lr.ph.split.us.peel.next, label %._crit_edge, !llvm.loop !11

._crit_edge31:                                    ; preds = %._crit_edge, %.preheader.us, %2
  %30 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %31 = add i64 %30, -1
  %32 = mul nsw i64 %31, %4
  %33 = getelementptr inbounds i64, ptr %6, i64 %32
  %34 = getelementptr inbounds i64, ptr %33, i64 %0
  %35 = load i64, ptr %34, align 8, !tbaa !7
  ret i64 %35

._crit_edge:                                      ; preds = %48, %27, %17, %18
  %36 = add i32 %.030, 1
  %37 = zext nneg i32 %36 to i64
  %38 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %39 = icmp ugt i64 %38, %37
  br i1 %39, label %.preheader, label %._crit_edge31, !llvm.loop !5

.lr.ph.split.peel.next:                           ; preds = %17, %48
  %indvars.iv = phi i64 [ %indvars.iv.next, %48 ], [ 1, %17 ]
  %40 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #1
  %41 = load i64, ptr %40, align 8, !tbaa !7
  %.not26 = icmp sgt i64 %41, %indvars.iv
  br i1 %.not26, label %48, label %42

42:                                               ; preds = %.lr.ph.split.peel.next
  %43 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #1
  %44 = load i64, ptr %43, align 8, !tbaa !7
  %45 = sub nsw i64 %indvars.iv, %44
  %46 = getelementptr inbounds i64, ptr %12, i64 %45
  %47 = load i64, ptr %46, align 8, !tbaa !7
  br label %48

48:                                               ; preds = %42, %.lr.ph.split.peel.next
  %49 = phi i64 [ %47, %42 ], [ 0, %.lr.ph.split.peel.next ]
  %50 = getelementptr inbounds i64, ptr %16, i64 %indvars.iv
  %51 = load i64, ptr %50, align 8, !tbaa !7
  %52 = add nsw i64 %51, %49
  %53 = getelementptr inbounds i64, ptr %12, i64 %indvars.iv
  store i64 %52, ptr %53, align 8, !tbaa !7
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not.not = icmp slt i64 %indvars.iv, %0
  br i1 %.not.not, label %.lr.ph.split.peel.next, label %._crit_edge, !llvm.loop !13
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6, !12}
!12 = !{!"llvm.loop.peeled.count", i32 1}
!13 = distinct !{!13, !6, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopFullUnrollPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass