; LLVM IR from VAR-solutions/Algorithms :: Greedy Algorithms/Fractional Knapsack/cpp (fractional_knapsack)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_Z17get_optimal_valueiSt6vectorIiSaIiEES1_(i32 noundef %0, ptr noundef %1, ptr noundef %2) #0 {
  %4 = alloca double, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca double, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca double, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store double 0.000000e+00, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  %18 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #5
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 1, ptr %10, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %90, %3
  %21 = load i32, ptr %10, align 4, !tbaa !5
  %22 = load i32, ptr %9, align 4, !tbaa !5
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %93

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %26 = load i32, ptr %10, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %27) #5
  %29 = load i32, ptr %28, align 4, !tbaa !5
  store i32 %29, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %30 = load i32, ptr %10, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %31) #5
  %33 = load i32, ptr %32, align 4, !tbaa !5
  store i32 %33, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  %34 = load i32, ptr %12, align 4, !tbaa !5
  %35 = sitofp i32 %34 to double
  %36 = load i32, ptr %11, align 4, !tbaa !5
  %37 = sitofp i32 %36 to double
  %38 = fdiv double %35, %37
  store double %38, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = sub nsw i32 %39, 1
  store i32 %40, ptr %14, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %60, %25
  %42 = load i32, ptr %14, align 4, !tbaa !5
  %43 = icmp sge i32 %42, 0
  br i1 %43, label %44, label %58

44:                                               ; preds = %41
  %45 = load i32, ptr %14, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %46) #5
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = sitofp i32 %48 to double
  %50 = load i32, ptr %14, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %51) #5
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = sitofp i32 %53 to double
  %55 = fdiv double %49, %54
  %56 = load double, ptr %13, align 8, !tbaa !11
  %57 = fcmp olt double %55, %56
  br label %58

58:                                               ; preds = %44, %41
  %59 = phi i1 [ false, %41 ], [ %57, %44 ]
  br i1 %59, label %60, label %79

60:                                               ; preds = %58
  %61 = load i32, ptr %14, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %62) #5
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = load i32, ptr %14, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %67) #5
  store i32 %64, ptr %68, align 4, !tbaa !5
  %69 = load i32, ptr %14, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %70) #5
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = load i32, ptr %14, align 4, !tbaa !5
  %74 = add nsw i32 %73, 1
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %75) #5
  store i32 %72, ptr %76, align 4, !tbaa !5
  %77 = load i32, ptr %14, align 4, !tbaa !5
  %78 = add nsw i32 %77, -1
  store i32 %78, ptr %14, align 4, !tbaa !5
  br label %41, !llvm.loop !13

79:                                               ; preds = %58
  %80 = load i32, ptr %11, align 4, !tbaa !5
  %81 = load i32, ptr %14, align 4, !tbaa !5
  %82 = add nsw i32 %81, 1
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %83) #5
  store i32 %80, ptr %84, align 4, !tbaa !5
  %85 = load i32, ptr %12, align 4, !tbaa !5
  %86 = load i32, ptr %14, align 4, !tbaa !5
  %87 = add nsw i32 %86, 1
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %88) #5
  store i32 %85, ptr %89, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %90

90:                                               ; preds = %79
  %91 = load i32, ptr %10, align 4, !tbaa !5
  %92 = add nsw i32 %91, 1
  store i32 %92, ptr %10, align 4, !tbaa !5
  br label %20, !llvm.loop !15

93:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  store i32 0, ptr %15, align 4, !tbaa !5
  br label %94

94:                                               ; preds = %134, %93
  %95 = load i32, ptr %15, align 4, !tbaa !5
  %96 = load i32, ptr %9, align 4, !tbaa !5
  %97 = icmp slt i32 %95, %96
  br i1 %97, label %99, label %98

98:                                               ; preds = %94
  store i32 7, ptr %16, align 4
  br label %137

99:                                               ; preds = %94
  %100 = load i32, ptr %5, align 4, !tbaa !5
  %101 = icmp eq i32 %100, 0
  br i1 %101, label %102, label %104

102:                                              ; preds = %99
  %103 = load double, ptr %8, align 8, !tbaa !11
  store double %103, ptr %4, align 8
  store i32 1, ptr %16, align 4
  br label %137

104:                                              ; preds = %99
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  %105 = load i32, ptr %15, align 4, !tbaa !5
  %106 = sext i32 %105 to i64
  %107 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %106) #5
  %108 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %107, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %109 = load i32, ptr %108, align 4, !tbaa !5
  store i32 %109, ptr %17, align 4, !tbaa !5
  %110 = load i32, ptr %17, align 4, !tbaa !5
  %111 = sitofp i32 %110 to double
  %112 = load i32, ptr %15, align 4, !tbaa !5
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %113) #5
  %115 = load i32, ptr %114, align 4, !tbaa !5
  %116 = sitofp i32 %115 to double
  %117 = load i32, ptr %15, align 4, !tbaa !5
  %118 = sext i32 %117 to i64
  %119 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %118) #5
  %120 = load i32, ptr %119, align 4, !tbaa !5
  %121 = sitofp i32 %120 to double
  %122 = fdiv double %116, %121
  %123 = load double, ptr %8, align 8, !tbaa !11
  %124 = call double @llvm.fmuladd.f64(double %111, double %122, double %123)
  store double %124, ptr %8, align 8, !tbaa !11
  %125 = load i32, ptr %17, align 4, !tbaa !5
  %126 = load i32, ptr %15, align 4, !tbaa !5
  %127 = sext i32 %126 to i64
  %128 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %127) #5
  %129 = load i32, ptr %128, align 4, !tbaa !5
  %130 = sub nsw i32 %129, %125
  store i32 %130, ptr %128, align 4, !tbaa !5
  %131 = load i32, ptr %17, align 4, !tbaa !5
  %132 = load i32, ptr %5, align 4, !tbaa !5
  %133 = sub nsw i32 %132, %131
  store i32 %133, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  br label %134

134:                                              ; preds = %104
  %135 = load i32, ptr %15, align 4, !tbaa !5
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %15, align 4, !tbaa !5
  br label %94, !llvm.loop !16

137:                                              ; preds = %102, %98
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  %138 = load i32, ptr %16, align 4
  switch i32 %138, label %141 [
    i32 7, label %139
  ]

139:                                              ; preds = %137
  %140 = load double, ptr %8, align 8, !tbaa !11
  store double %140, ptr %4, align 8
  store i32 1, ptr %16, align 4
  br label %141

141:                                              ; preds = %139, %137
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  %142 = load double, ptr %4, align 8
  ret double %142
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_Z17get_optimal_valueiSt6vectorIiSaIiEES1_(i32 noundef %0, ptr noundef nonnull %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #3
  %6 = trunc i64 %5 to i32
  %7 = icmp sgt i32 %6, 1
  br i1 %7, label %.lr.ph.preheader, label %.preheader

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = and i64 %5, 2147483647
  br label %.lr.ph

.preheader:                                       ; preds = %.critedge, %3
  %.not47 = icmp slt i32 %6, 1
  %8 = icmp eq i32 %0, 0
  %or.cond48 = or i1 %.not47, %8
  br i1 %or.cond48, label %.critedge41, label %.lr.ph51.preheader

.lr.ph51.preheader:                               ; preds = %.preheader
  %9 = and i64 %5, 2147483647
  br label %.lr.ph51

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.critedge
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next, %.critedge ]
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #3
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #3
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = sitofp i32 %13 to double
  %15 = sitofp i32 %11 to double
  %16 = fdiv double %14, %15
  br label %17

17:                                               ; preds = %.lr.ph, %27
  %indvars.iv52 = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv.next53, %27 ]
  %indvars.iv.next53 = add nsw i64 %indvars.iv52, -1
  %18 = and i64 %indvars.iv.next53, 4294967295
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %18) #3
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = sitofp i32 %20 to double
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %18) #3
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = sitofp i32 %23 to double
  %25 = fdiv double %21, %24
  %26 = fcmp olt double %25, %16
  br i1 %26, label %27, label %.critedge

27:                                               ; preds = %17
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %18) #3
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv52) #3
  store i32 %29, ptr %30, align 4, !tbaa !5
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %18) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv52) #3
  store i32 %32, ptr %33, align 4, !tbaa !5
  %34 = icmp sgt i64 %indvars.iv52, 1
  br i1 %34, label %17, label %.critedge, !llvm.loop !9

.critedge:                                        ; preds = %27, %17
  %.037.in.lcssa = phi i64 [ 0, %27 ], [ %indvars.iv52, %17 ]
  %sext = shl i64 %.037.in.lcssa, 32
  %35 = ashr exact i64 %sext, 32
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %35) #3
  store i32 %11, ptr %36, align 4, !tbaa !5
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %35) #3
  store i32 %13, ptr %37, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader, label %.lr.ph, !llvm.loop !11

.lr.ph51:                                         ; preds = %.lr.ph51.preheader, %.lr.ph51
  %indvars.iv57 = phi i64 [ 0, %.lr.ph51.preheader ], [ %indvars.iv.next58, %.lr.ph51 ]
  %.03849 = phi double [ 0.000000e+00, %.lr.ph51.preheader ], [ %49, %.lr.ph51 ]
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv57) #3
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %38, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = sitofp i32 %40 to double
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv57) #3
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = sitofp i32 %43 to double
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv57) #3
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = sitofp i32 %46 to double
  %48 = fdiv double %44, %47
  %49 = call double @llvm.fmuladd.f64(double %41, double %48, double %.03849)
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv57) #3
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = sub nsw i32 %51, %40
  store i32 %52, ptr %50, align 4, !tbaa !5
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = sub nsw i32 %53, %40
  store i32 %54, ptr %4, align 4, !tbaa !5
  %indvars.iv.next58 = add nuw nsw i64 %indvars.iv57, 1
  %.not = icmp uge i64 %indvars.iv.next58, %9
  %55 = icmp eq i32 %53, %40
  %or.cond = select i1 %.not, i1 true, i1 %55
  br i1 %or.cond, label %.critedge41, label %.lr.ph51, !llvm.loop !12

.critedge41:                                      ; preds = %.lr.ph51, %.preheader
  %.038.lcssa = phi double [ 0.000000e+00, %.preheader ], [ %49, %.lr.ph51 ]
  ret double %.038.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass