; LLVM IR from Stephane-D/SGDK :: src (vdp_tile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @VDP_getPlaneAddress(i32 noundef, i16 noundef zeroext, i16 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local void @VDP_setTileMapXY(i32 noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i16 noundef zeroext %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i16, align 2
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i16 %1, ptr %6, align 2, !tbaa !9
  store i16 %2, ptr %7, align 2, !tbaa !9
  store i16 %3, ptr %8, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #2
  store ptr inttoptr (i64 12582916 to ptr), ptr %9, align 8, !tbaa !11
  store ptr inttoptr (i64 12582912 to ptr), ptr %10, align 8, !tbaa !11
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = load i16, ptr %7, align 2, !tbaa !9
  %14 = load i16, ptr %8, align 2, !tbaa !9
  %15 = call zeroext i16 @VDP_getPlaneAddress(i32 noundef %12, i16 noundef zeroext %13, i16 noundef zeroext %14)
  store i16 %15, ptr %11, align 2, !tbaa !9
  %16 = load i16, ptr %11, align 2, !tbaa !9
  %17 = zext i16 %16 to i64
  %18 = and i64 %17, 16383
  %19 = add i64 16384, %18
  %20 = shl i64 %19, 16
  %21 = load i16, ptr %11, align 2, !tbaa !9
  %22 = zext i16 %21 to i64
  %23 = lshr i64 %22, 14
  %24 = or i64 %23, 0
  %25 = add i64 %20, %24
  %26 = load ptr, ptr %9, align 8, !tbaa !11
  store volatile i64 %25, ptr %26, align 8, !tbaa !13
  %27 = load i16, ptr %6, align 2, !tbaa !9
  %28 = load ptr, ptr %10, align 8, !tbaa !11
  store volatile i16 %27, ptr %28, align 2, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @VDP_getPlaneAddress(i32 noundef, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @VDP_setTileMapXY(i32 noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i16 noundef zeroext %3) local_unnamed_addr #0 {
  %5 = tail call zeroext i16 @VDP_getPlaneAddress(i32 noundef %0, i16 noundef zeroext %2, i16 noundef zeroext %3)
  %6 = zext i16 %5 to i64
  %7 = shl nuw nsw i64 %6, 16
  %8 = and i64 %7, 1073676288
  %9 = lshr i64 %6, 14
  %10 = or disjoint i64 %9, %8
  %11 = or disjoint i64 %10, 1073741824
  store volatile i64 %11, ptr inttoptr (i64 12582916 to ptr), align 8, !tbaa !5
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !9
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,TailCallElimPass