; LLVM IR from xirc/cp-algorithm :: atcoder/abc005/D/main.ll (Z5buildv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@D = external dso_local global %"class.std::vector", align 8
@L = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %47, %0
  %15 = load i32, ptr %1, align 4, !tbaa !5
  %16 = load i32, ptr @N, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  %18 = icmp slt i32 %15, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %14
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %50

20:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %43, %20
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = load i32, ptr @N, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %46

26:                                               ; preds = %21
  %27 = load i32, ptr %1, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %28) #4
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #4
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = load i32, ptr %1, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %35) #4
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %39) #4
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = add nsw i32 %41, %33
  store i32 %42, ptr %40, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %26
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %3, align 4, !tbaa !5
  br label %21, !llvm.loop !9

46:                                               ; preds = %25
  br label %47

47:                                               ; preds = %46
  %48 = load i32, ptr %1, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %1, align 4, !tbaa !5
  br label %14, !llvm.loop !11

50:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %51

51:                                               ; preds = %84, %50
  %52 = load i32, ptr %4, align 4, !tbaa !5
  %53 = load i32, ptr @N, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  %55 = icmp slt i32 %52, %54
  br i1 %55, label %57, label %56

56:                                               ; preds = %51
  store i32 8, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %87

57:                                               ; preds = %51
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %58

58:                                               ; preds = %80, %57
  %59 = load i32, ptr %5, align 4, !tbaa !5
  %60 = load i32, ptr @N, align 4, !tbaa !5
  %61 = icmp slt i32 %59, %60
  br i1 %61, label %63, label %62

62:                                               ; preds = %58
  store i32 11, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %83

63:                                               ; preds = %58
  %64 = load i32, ptr %5, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %65) #4
  %67 = load i32, ptr %4, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %68) #4
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = load i32, ptr %5, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %73) #4
  %75 = load i32, ptr %4, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #4
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %79 = add nsw i32 %78, %70
  store i32 %79, ptr %77, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %63
  %81 = load i32, ptr %5, align 4, !tbaa !5
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %5, align 4, !tbaa !5
  br label %58, !llvm.loop !12

83:                                               ; preds = %62
  br label %84

84:                                               ; preds = %83
  %85 = load i32, ptr %4, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %4, align 4, !tbaa !5
  br label %51, !llvm.loop !13

87:                                               ; preds = %56
  %88 = load i32, ptr @N, align 4, !tbaa !5
  %89 = load i32, ptr @N, align 4, !tbaa !5
  %90 = mul nsw i32 %88, %89
  %91 = add nsw i32 %90, 1
  %92 = sext i32 %91 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %92, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %93

93:                                               ; preds = %183, %87
  %94 = load i32, ptr %7, align 4, !tbaa !5
  %95 = load i32, ptr @N, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  %97 = icmp slt i32 %94, %96
  br i1 %97, label %99, label %98

98:                                               ; preds = %93
  store i32 14, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %186

99:                                               ; preds = %93
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %100 = load i32, ptr %7, align 4, !tbaa !5
  %101 = add nsw i32 %100, 1
  store i32 %101, ptr %8, align 4, !tbaa !5
  br label %102

102:                                              ; preds = %179, %99
  %103 = load i32, ptr %8, align 4, !tbaa !5
  %104 = load i32, ptr @N, align 4, !tbaa !5
  %105 = add nsw i32 %104, 1
  %106 = icmp slt i32 %103, %105
  br i1 %106, label %108, label %107

107:                                              ; preds = %102
  store i32 17, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %182

108:                                              ; preds = %102
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %109

109:                                              ; preds = %175, %108
  %110 = load i32, ptr %9, align 4, !tbaa !5
  %111 = load i32, ptr @N, align 4, !tbaa !5
  %112 = add nsw i32 %111, 1
  %113 = icmp slt i32 %110, %112
  br i1 %113, label %115, label %114

114:                                              ; preds = %109
  store i32 20, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %178

115:                                              ; preds = %109
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %116 = load i32, ptr %9, align 4, !tbaa !5
  %117 = add nsw i32 %116, 1
  store i32 %117, ptr %10, align 4, !tbaa !5
  br label %118

118:                                              ; preds = %171, %115
  %119 = load i32, ptr %10, align 4, !tbaa !5
  %120 = load i32, ptr @N, align 4, !tbaa !5
  %121 = add nsw i32 %120, 1
  %122 = icmp slt i32 %119, %121
  br i1 %122, label %124, label %123

123:                                              ; preds = %118
  store i32 23, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %174

124:                                              ; preds = %118
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %125 = load i32, ptr %10, align 4, !tbaa !5
  %126 = load i32, ptr %9, align 4, !tbaa !5
  %127 = sub nsw i32 %125, %126
  %128 = load i32, ptr %8, align 4, !tbaa !5
  %129 = load i32, ptr %7, align 4, !tbaa !5
  %130 = sub nsw i32 %128, %129
  %131 = mul nsw i32 %127, %130
  store i32 %131, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %132 = load i32, ptr %10, align 4, !tbaa !5
  %133 = sext i32 %132 to i64
  %134 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %133) #4
  %135 = load i32, ptr %8, align 4, !tbaa !5
  %136 = sext i32 %135 to i64
  %137 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %134, i64 noundef %136) #4
  %138 = load i32, ptr %137, align 4, !tbaa !5
  %139 = load i32, ptr %10, align 4, !tbaa !5
  %140 = sext i32 %139 to i64
  %141 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %140) #4
  %142 = load i32, ptr %7, align 4, !tbaa !5
  %143 = sext i32 %142 to i64
  %144 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %141, i64 noundef %143) #4
  %145 = load i32, ptr %144, align 4, !tbaa !5
  %146 = sub nsw i32 %138, %145
  %147 = load i32, ptr %9, align 4, !tbaa !5
  %148 = sext i32 %147 to i64
  %149 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %148) #4
  %150 = load i32, ptr %8, align 4, !tbaa !5
  %151 = sext i32 %150 to i64
  %152 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %149, i64 noundef %151) #4
  %153 = load i32, ptr %152, align 4, !tbaa !5
  %154 = sub nsw i32 %146, %153
  %155 = load i32, ptr %9, align 4, !tbaa !5
  %156 = sext i32 %155 to i64
  %157 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %156) #4
  %158 = load i32, ptr %7, align 4, !tbaa !5
  %159 = sext i32 %158 to i64
  %160 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %157, i64 noundef %159) #4
  %161 = load i32, ptr %160, align 4, !tbaa !5
  %162 = add nsw i32 %154, %161
  store i32 %162, ptr %12, align 4, !tbaa !5
  %163 = load i32, ptr %11, align 4, !tbaa !5
  %164 = sext i32 %163 to i64
  %165 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %164) #4
  %166 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %165, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %167 = load i32, ptr %166, align 4, !tbaa !5
  %168 = load i32, ptr %11, align 4, !tbaa !5
  %169 = sext i32 %168 to i64
  %170 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %169) #4
  store i32 %167, ptr %170, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %171

171:                                              ; preds = %124
  %172 = load i32, ptr %10, align 4, !tbaa !5
  %173 = add nsw i32 %172, 1
  store i32 %173, ptr %10, align 4, !tbaa !5
  br label %118, !llvm.loop !14

174:                                              ; preds = %123
  br label %175

175:                                              ; preds = %174
  %176 = load i32, ptr %9, align 4, !tbaa !5
  %177 = add nsw i32 %176, 1
  store i32 %177, ptr %9, align 4, !tbaa !5
  br label %109, !llvm.loop !15

178:                                              ; preds = %114
  br label %179

179:                                              ; preds = %178
  %180 = load i32, ptr %8, align 4, !tbaa !5
  %181 = add nsw i32 %180, 1
  store i32 %181, ptr %8, align 4, !tbaa !5
  br label %102, !llvm.loop !16

182:                                              ; preds = %107
  br label %183

183:                                              ; preds = %182
  %184 = load i32, ptr %7, align 4, !tbaa !5
  %185 = add nsw i32 %184, 1
  store i32 %185, ptr %7, align 4, !tbaa !5
  br label %93, !llvm.loop !17

186:                                              ; preds = %98
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 1, ptr %13, align 4, !tbaa !5
  br label %187

187:                                              ; preds = %208, %186
  %188 = load i32, ptr %13, align 4, !tbaa !5
  %189 = load i32, ptr @N, align 4, !tbaa !5
  %190 = load i32, ptr @N, align 4, !tbaa !5
  %191 = mul nsw i32 %189, %190
  %192 = add nsw i32 %191, 1
  %193 = icmp slt i32 %188, %192
  br i1 %193, label %195, label %194

194:                                              ; preds = %187
  store i32 26, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %211

195:                                              ; preds = %187
  %196 = load i32, ptr %13, align 4, !tbaa !5
  %197 = sext i32 %196 to i64
  %198 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %197) #4
  %199 = load i32, ptr %13, align 4, !tbaa !5
  %200 = sub nsw i32 %199, 1
  %201 = sext i32 %200 to i64
  %202 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %201) #4
  %203 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %198, ptr noundef nonnull align 4 dereferenceable(4) %202)
  %204 = load i32, ptr %203, align 4, !tbaa !5
  %205 = load i32, ptr %13, align 4, !tbaa !5
  %206 = sext i32 %205 to i64
  %207 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %206) #4
  store i32 %204, ptr %207, align 4, !tbaa !5
  br label %208

208:                                              ; preds = %195
  %209 = load i32, ptr %13, align 4, !tbaa !5
  %210 = add nsw i32 %209, 1
  store i32 %210, ptr %13, align 4, !tbaa !5
  br label %187, !llvm.loop !18

211:                                              ; preds = %194
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@D = external dso_local global %"class.std::vector", align 8
@L = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildv() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = load i32, ptr @N, align 4, !tbaa !5
  %.not67 = icmp slt i32 %3, 0
  br i1 %.not67, label %._crit_edge74, label %.preheader65.lr.ph

.preheader65.lr.ph:                               ; preds = %0
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %._crit_edge74, label %.preheader65

.preheader65:                                     ; preds = %.preheader65.lr.ph, %._crit_edge
  %4 = phi i32 [ %6, %._crit_edge ], [ %3, %.preheader65.lr.ph ]
  %indvars.iv98 = phi i64 [ %indvars.iv.next99, %._crit_edge ], [ 0, %.preheader65.lr.ph ]
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %.lr.ph, label %.preheader65.._crit_edge_crit_edge

.preheader65.._crit_edge_crit_edge:               ; preds = %.preheader65
  %.pre129 = sext i32 %4 to i64
  br label %._crit_edge

.preheader64:                                     ; preds = %._crit_edge
  %.not5372 = icmp slt i32 %6, 0
  br i1 %.not5372, label %._crit_edge74, label %.preheader63.lr.ph

.preheader63.lr.ph:                               ; preds = %.preheader64
  %.not131 = icmp eq i32 %6, 0
  br i1 %.not131, label %._crit_edge74, label %.preheader63

._crit_edge:                                      ; preds = %.lr.ph, %.preheader65.._crit_edge_crit_edge
  %.pre-phi130 = phi i64 [ %.pre129, %.preheader65.._crit_edge_crit_edge ], [ %15, %.lr.ph ]
  %6 = phi i32 [ %4, %.preheader65.._crit_edge_crit_edge ], [ %14, %.lr.ph ]
  %indvars.iv.next99 = add nuw nsw i64 %indvars.iv98, 1
  %.not.not = icmp slt i64 %indvars.iv98, %.pre-phi130
  br i1 %.not.not, label %.preheader65, label %.preheader64, !llvm.loop !9

.lr.ph:                                           ; preds = %.preheader65, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.preheader65 ]
  %7 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv98) #4
  %8 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv) #4
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv98) #4
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %indvars.iv.next) #4
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = add nsw i32 %12, %9
  store i32 %13, ptr %11, align 4, !tbaa !5
  %14 = load i32, ptr @N, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = icmp slt i64 %indvars.iv.next, %15
  br i1 %16, label %.lr.ph, label %._crit_edge, !llvm.loop !12

.preheader63:                                     ; preds = %.preheader63.lr.ph, %._crit_edge71
  %17 = phi i32 [ %23, %._crit_edge71 ], [ %6, %.preheader63.lr.ph ]
  %indvars.iv104 = phi i64 [ %indvars.iv.next105, %._crit_edge71 ], [ 0, %.preheader63.lr.ph ]
  %18 = icmp sgt i32 %17, 0
  br i1 %18, label %.lr.ph70, label %.preheader63.._crit_edge71_crit_edge

.preheader63.._crit_edge71_crit_edge:             ; preds = %.preheader63
  %.pre127 = sext i32 %17 to i64
  br label %._crit_edge71

._crit_edge74:                                    ; preds = %._crit_edge71, %.preheader65.lr.ph, %0, %.preheader63.lr.ph, %.preheader64
  %.lcssa = phi i32 [ %6, %.preheader64 ], [ 0, %.preheader63.lr.ph ], [ %3, %0 ], [ 0, %.preheader65.lr.ph ], [ %23, %._crit_edge71 ]
  %19 = mul nsw i32 %.lcssa, %.lcssa
  %20 = add nuw nsw i32 %19, 1
  %21 = zext nneg i32 %20 to i64
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %21, ptr noundef nonnull align 4 dereferenceable(4) %1)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #4
  %22 = load i32, ptr @N, align 4, !tbaa !5
  %.not5485 = icmp slt i32 %22, 0
  br i1 %.not5485, label %.lr.ph91.preheader, label %.lr.ph88

._crit_edge71:                                    ; preds = %.lr.ph70, %.preheader63.._crit_edge71_crit_edge
  %.pre-phi128 = phi i64 [ %.pre127, %.preheader63.._crit_edge71_crit_edge ], [ %32, %.lr.ph70 ]
  %23 = phi i32 [ %17, %.preheader63.._crit_edge71_crit_edge ], [ %31, %.lr.ph70 ]
  %indvars.iv.next105 = add nuw nsw i64 %indvars.iv104, 1
  %.not53.not = icmp slt i64 %indvars.iv104, %.pre-phi128
  br i1 %.not53.not, label %.preheader63, label %._crit_edge74, !llvm.loop !13

.lr.ph70:                                         ; preds = %.preheader63, %.lr.ph70
  %indvars.iv101 = phi i64 [ %indvars.iv.next102, %.lr.ph70 ], [ 0, %.preheader63 ]
  %24 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv101) #4
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %indvars.iv104) #4
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %indvars.iv.next102 = add nuw nsw i64 %indvars.iv101, 1
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv.next102) #4
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv104) #4
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = add nsw i32 %29, %26
  store i32 %30, ptr %28, align 4, !tbaa !5
  %31 = load i32, ptr @N, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = icmp slt i64 %indvars.iv.next102, %32
  br i1 %33, label %.lr.ph70, label %._crit_edge71, !llvm.loop !14

.loopexit62.loopexit93:                           ; preds = %._crit_edge82
  %.pre = sext i32 %46 to i64
  br label %.loopexit62

.loopexit62:                                      ; preds = %.loopexit62.loopexit93, %.lr.ph88
  %.pre-phi = phi i64 [ %.pre, %.loopexit62.loopexit93 ], [ %37, %.lr.ph88 ]
  %34 = phi i32 [ %46, %.loopexit62.loopexit93 ], [ %36, %.lr.ph88 ]
  %.not54.not = icmp slt i64 %indvars.iv120, %.pre-phi
  %indvars.iv.next116 = add nuw i32 %indvars.iv115, 1
  br i1 %.not54.not, label %.lr.ph88, label %.preheader, !llvm.loop !15

.preheader:                                       ; preds = %.loopexit62
  %35 = icmp eq i32 %34, 0
  br i1 %35, label %._crit_edge92, label %.lr.ph91.preheader

.lr.ph91.preheader:                               ; preds = %._crit_edge74, %.preheader
  br label %.lr.ph91

.lr.ph88:                                         ; preds = %._crit_edge74, %.loopexit62
  %36 = phi i32 [ %34, %.loopexit62 ], [ %22, %._crit_edge74 ]
  %indvars.iv120 = phi i64 [ %indvars.iv.next121, %.loopexit62 ], [ 0, %._crit_edge74 ]
  %indvars.iv115 = phi i32 [ %indvars.iv.next116, %.loopexit62 ], [ 1, %._crit_edge74 ]
  %indvars.iv.next121 = add nuw nsw i64 %indvars.iv120, 1
  %37 = sext i32 %36 to i64
  %.not5683.not = icmp sge i64 %indvars.iv120, %37
  %38 = icmp slt i32 %36, 0
  %or.cond = or i1 %.not5683.not, %38
  br i1 %or.cond, label %.loopexit62, label %.preheader61.preheader

.preheader61.preheader:                           ; preds = %.lr.ph88
  %39 = sext i32 %indvars.iv115 to i64
  br label %.preheader61

.preheader61:                                     ; preds = %.preheader61.preheader, %._crit_edge82
  %40 = phi i32 [ %46, %._crit_edge82 ], [ %36, %.preheader61.preheader ]
  %41 = phi i32 [ %47, %._crit_edge82 ], [ %36, %.preheader61.preheader ]
  %indvars.iv117 = phi i64 [ %indvars.iv.next118, %._crit_edge82 ], [ %39, %.preheader61.preheader ]
  %.not5779 = icmp slt i32 %41, 0
  br i1 %.not5779, label %._crit_edge82, label %.lr.ph81

.lr.ph81:                                         ; preds = %.preheader61
  %42 = sub nsw i64 %indvars.iv117, %indvars.iv120
  br label %49

.loopexit:                                        ; preds = %55, %49
  %.pre-phi126 = phi i64 [ %53, %49 ], [ %78, %55 ]
  %43 = phi i32 [ %50, %49 ], [ %77, %55 ]
  %44 = phi i32 [ %51, %49 ], [ %77, %55 ]
  %45 = phi i32 [ %52, %49 ], [ %77, %55 ]
  %.not57.not = icmp slt i64 %indvars.iv112, %.pre-phi126
  %indvars.iv.next108 = add nuw i32 %indvars.iv107, 1
  br i1 %.not57.not, label %49, label %._crit_edge82, !llvm.loop !16

._crit_edge82:                                    ; preds = %.loopexit, %.preheader61
  %46 = phi i32 [ %40, %.preheader61 ], [ %43, %.loopexit ]
  %47 = phi i32 [ %41, %.preheader61 ], [ %44, %.loopexit ]
  %indvars.iv.next118 = add nuw nsw i64 %indvars.iv117, 1
  %48 = sext i32 %47 to i64
  %.not56.not = icmp slt i64 %indvars.iv117, %48
  br i1 %.not56.not, label %.preheader61, label %.loopexit62.loopexit93, !llvm.loop !17

49:                                               ; preds = %.lr.ph81, %.loopexit
  %50 = phi i32 [ %40, %.lr.ph81 ], [ %43, %.loopexit ]
  %51 = phi i32 [ %41, %.lr.ph81 ], [ %44, %.loopexit ]
  %52 = phi i32 [ %41, %.lr.ph81 ], [ %45, %.loopexit ]
  %indvars.iv112 = phi i64 [ 0, %.lr.ph81 ], [ %indvars.iv.next113, %.loopexit ]
  %indvars.iv107 = phi i32 [ 1, %.lr.ph81 ], [ %indvars.iv.next108, %.loopexit ]
  %indvars.iv.next113 = add nuw nsw i64 %indvars.iv112, 1
  %53 = sext i32 %52 to i64
  %.not5875.not = icmp slt i64 %indvars.iv112, %53
  br i1 %.not5875.not, label %.lr.ph78, label %.loopexit

.lr.ph78:                                         ; preds = %49
  %54 = sext i32 %indvars.iv107 to i64
  br label %55

55:                                               ; preds = %.lr.ph78, %55
  %indvars.iv109 = phi i64 [ %54, %.lr.ph78 ], [ %indvars.iv.next110, %55 ]
  %56 = sub nsw i64 %indvars.iv109, %indvars.iv112
  %57 = mul nsw i64 %56, %42
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  %58 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv109) #4
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %indvars.iv117) #4
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv109) #4
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %indvars.iv120) #4
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv112) #4
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %indvars.iv117) #4
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @D, i64 noundef %indvars.iv112) #4
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %indvars.iv120) #4
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = add i32 %63, %66
  %71 = sub i32 %60, %70
  %72 = add nsw i32 %71, %69
  store i32 %72, ptr %2, align 4, !tbaa !5
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %57) #4
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %73, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %57) #4
  store i32 %75, ptr %76, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  %indvars.iv.next110 = add nuw nsw i64 %indvars.iv109, 1
  %77 = load i32, ptr @N, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %.not58.not = icmp slt i64 %indvars.iv109, %78
  br i1 %.not58.not, label %55, label %.loopexit, !llvm.loop !18

._crit_edge92:                                    ; preds = %.lr.ph91, %.preheader
  ret void

.lr.ph91:                                         ; preds = %.lr.ph91.preheader, %.lr.ph91
  %indvars.iv123 = phi i64 [ %indvars.iv.next124, %.lr.ph91 ], [ 1, %.lr.ph91.preheader ]
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %indvars.iv123) #4
  %80 = add nsw i64 %indvars.iv123, -1
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %80) #4
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %79, ptr noundef nonnull align 4 dereferenceable(4) %81)
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @L, i64 noundef %indvars.iv123) #4
  store i32 %83, ptr %84, align 4, !tbaa !5
  %indvars.iv.next124 = add nuw nsw i64 %indvars.iv123, 1
  %85 = load i32, ptr @N, align 4, !tbaa !5
  %86 = mul nsw i32 %85, %85
  %87 = zext nneg i32 %86 to i64
  %.not55.not = icmp ult i64 %indvars.iv123, %87
  br i1 %.not55.not, label %.lr.ph91, label %._crit_edge92, !llvm.loop !19
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6assignEmRKi(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10, !11}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass