; LLVM IR from VAR-solutions/Algorithms :: Mathematics/prime factors/cpp/prime_factors.ll (Z5sievei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>
%"class.std::vector.0" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::_Bit_reference" = type { ptr, i64 }

@isprime = external dso_local global %"class.std::vector", align 8
@allprimes = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5sievei(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca %"struct.std::_Bit_reference", align 8
  %4 = alloca %"struct.std::_Bit_reference", align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %"struct.std::_Bit_reference", align 8
  %8 = alloca i32, align 4
  %9 = alloca %"struct.std::_Bit_reference", align 8
  %10 = alloca i32, align 4
  %11 = alloca %"struct.std::_Bit_reference", align 8
  store i32 %0, ptr %2, align 4, !tbaa !5
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %13 = add nsw i32 %12, 1
  %14 = sext i32 %13 to i64
  call void @_ZNSt6vectorIbSaIbEE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %14, i1 noundef zeroext true)
  call void @llvm.lifetime.start.p0(i64 16, ptr %3) #3
  %15 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef 0)
  %16 = getelementptr inbounds { ptr, i64 }, ptr %3, i32 0, i32 0
  %17 = extractvalue { ptr, i64 } %15, 0
  store ptr %17, ptr %16, align 8
  %18 = getelementptr inbounds { ptr, i64 }, ptr %3, i32 0, i32 1
  %19 = extractvalue { ptr, i64 } %15, 1
  store i64 %19, ptr %18, align 8
  %20 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %3, i1 noundef zeroext false) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %4) #3
  %21 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef 1)
  %22 = getelementptr inbounds { ptr, i64 }, ptr %4, i32 0, i32 0
  %23 = extractvalue { ptr, i64 } %21, 0
  store ptr %23, ptr %22, align 8
  %24 = getelementptr inbounds { ptr, i64 }, ptr %4, i32 0, i32 1
  %25 = extractvalue { ptr, i64 } %21, 1
  store i64 %25, ptr %24, align 8
  %26 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSERKS_(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(16) %20) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 2, ptr %5, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %68, %1
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = load i32, ptr %5, align 4, !tbaa !5
  %30 = mul nsw i32 %28, %29
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = icmp sle i32 %30, %31
  br i1 %32, label %34, label %33

33:                                               ; preds = %27
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %71

34:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #3
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %36)
  %38 = getelementptr inbounds { ptr, i64 }, ptr %7, i32 0, i32 0
  %39 = extractvalue { ptr, i64 } %37, 0
  store ptr %39, ptr %38, align 8
  %40 = getelementptr inbounds { ptr, i64 }, ptr %7, i32 0, i32 1
  %41 = extractvalue { ptr, i64 } %37, 1
  store i64 %41, ptr %40, align 8
  %42 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #3
  %43 = zext i1 %42 to i32
  %44 = icmp eq i32 %43, 1
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #3
  br i1 %44, label %45, label %67

45:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = mul nsw i32 %46, 2
  store i32 %47, ptr %8, align 4, !tbaa !5
  br label %48

48:                                               ; preds = %62, %45
  %49 = load i32, ptr %8, align 4, !tbaa !5
  %50 = load i32, ptr %2, align 4, !tbaa !5
  %51 = icmp sle i32 %49, %50
  br i1 %51, label %53, label %52

52:                                               ; preds = %48
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %66

53:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 16, ptr %9) #3
  %54 = load i32, ptr %8, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %55)
  %57 = getelementptr inbounds { ptr, i64 }, ptr %9, i32 0, i32 0
  %58 = extractvalue { ptr, i64 } %56, 0
  store ptr %58, ptr %57, align 8
  %59 = getelementptr inbounds { ptr, i64 }, ptr %9, i32 0, i32 1
  %60 = extractvalue { ptr, i64 } %56, 1
  store i64 %60, ptr %59, align 8
  %61 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %9, i1 noundef zeroext false) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %9) #3
  br label %62

62:                                               ; preds = %53
  %63 = load i32, ptr %5, align 4, !tbaa !5
  %64 = load i32, ptr %8, align 4, !tbaa !5
  %65 = add nsw i32 %64, %63
  store i32 %65, ptr %8, align 4, !tbaa !5
  br label %48, !llvm.loop !9

66:                                               ; preds = %52
  br label %67

67:                                               ; preds = %66, %34
  br label %68

68:                                               ; preds = %67
  %69 = load i32, ptr %5, align 4, !tbaa !5
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %5, align 4, !tbaa !5
  br label %27, !llvm.loop !11

71:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 2, ptr %10, align 4, !tbaa !5
  br label %72

72:                                               ; preds = %89, %71
  %73 = load i32, ptr %10, align 4, !tbaa !5
  %74 = load i32, ptr %2, align 4, !tbaa !5
  %75 = add nsw i32 %74, 1
  %76 = icmp slt i32 %73, %75
  br i1 %76, label %78, label %77

77:                                               ; preds = %72
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %92

78:                                               ; preds = %72
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #3
  %79 = load i32, ptr %10, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %80)
  %82 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 0
  %83 = extractvalue { ptr, i64 } %81, 0
  store ptr %83, ptr %82, align 8
  %84 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 1
  %85 = extractvalue { ptr, i64 } %81, 1
  store i64 %85, ptr %84, align 8
  %86 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %11) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #3
  br i1 %86, label %87, label %88

87:                                               ; preds = %78
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @allprimes, ptr noundef nonnull align 4 dereferenceable(4) %10)
  br label %88

88:                                               ; preds = %87, %78
  br label %89

89:                                               ; preds = %88
  %90 = load i32, ptr %10, align 4, !tbaa !5
  %91 = add nsw i32 %90, 1
  store i32 %91, ptr %10, align 4, !tbaa !5
  br label %72, !llvm.loop !12

92:                                               ; preds = %77
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIbSaIbEE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef, i1 noundef zeroext) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSERKS_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>
%"class.std::vector.0" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::_Bit_reference" = type { ptr, i64 }

@isprime = external dso_local global %"class.std::vector", align 8
@allprimes = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5sievei(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca %"struct.std::_Bit_reference", align 8
  %3 = alloca %"struct.std::_Bit_reference", align 8
  %4 = alloca %"struct.std::_Bit_reference", align 8
  %5 = alloca %"struct.std::_Bit_reference", align 8
  %6 = alloca i32, align 4
  %7 = alloca %"struct.std::_Bit_reference", align 8
  %8 = add nsw i32 %0, 1
  %9 = sext i32 %8 to i64
  tail call void @_ZNSt6vectorIbSaIbEE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %9, i1 noundef zeroext true)
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
  %10 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef 0)
  %11 = extractvalue { ptr, i64 } %10, 0
  store ptr %11, ptr %2, align 8
  %12 = getelementptr inbounds i8, ptr %2, i64 8
  %13 = extractvalue { ptr, i64 } %10, 1
  store i64 %13, ptr %12, align 8
  %14 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %2, i1 noundef zeroext false) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
  %15 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef 1)
  %16 = extractvalue { ptr, i64 } %15, 0
  store ptr %16, ptr %3, align 8
  %17 = getelementptr inbounds i8, ptr %3, i64 8
  %18 = extractvalue { ptr, i64 } %15, 1
  store i64 %18, ptr %17, align 8
  %19 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSERKS_(ptr noundef nonnull align 8 dereferenceable(16) %3, ptr noundef nonnull align 8 dereferenceable(16) %14) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3
  %.not19 = icmp slt i32 %0, 4
  br i1 %.not19, label %._crit_edge, label %.lr.ph21

.lr.ph21:                                         ; preds = %1
  %20 = getelementptr inbounds i8, ptr %4, i64 8
  %21 = getelementptr inbounds i8, ptr %5, i64 8
  br label %23

._crit_edge:                                      ; preds = %.loopexit, %1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  store i32 2, ptr %6, align 4, !tbaa !5
  %.not1522 = icmp slt i32 %0, 2
  br i1 %.not1522, label %._crit_edge26, label %.lr.ph25

.lr.ph25:                                         ; preds = %._crit_edge
  %22 = getelementptr inbounds i8, ptr %7, i64 8
  br label %36

23:                                               ; preds = %.lr.ph21, %.loopexit
  %indvars.iv28 = phi i64 [ 2, %.lr.ph21 ], [ %indvars.iv.next29, %.loopexit ]
  %indvars.iv = phi i64 [ 4, %.lr.ph21 ], [ %indvars.iv.next, %.loopexit ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  %24 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %indvars.iv28)
  %25 = extractvalue { ptr, i64 } %24, 0
  store ptr %25, ptr %4, align 8
  %26 = extractvalue { ptr, i64 } %24, 1
  store i64 %26, ptr %20, align 8
  %27 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %indvars.iv28.tr = trunc i64 %indvars.iv28 to i32
  %28 = shl i32 %indvars.iv28.tr, 1
  %.not1617 = icmp sle i32 %28, %0
  %or.cond.not = and i1 %27, %.not1617
  br i1 %or.cond.not, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %23, %.lr.ph
  %indvars.iv30 = phi i64 [ %indvars.iv.next31, %.lr.ph ], [ %indvars.iv, %23 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #3
  %29 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %indvars.iv30)
  %30 = extractvalue { ptr, i64 } %29, 0
  store ptr %30, ptr %5, align 8
  %31 = extractvalue { ptr, i64 } %29, 1
  store i64 %31, ptr %21, align 8
  %32 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %5, i1 noundef zeroext false) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #3
  %indvars.iv.next31 = add nuw nsw i64 %indvars.iv30, %indvars.iv28
  %33 = trunc nuw i64 %indvars.iv.next31 to i32
  %.not16 = icmp sgt i32 %33, %0
  br i1 %.not16, label %.loopexit, label %.lr.ph, !llvm.loop !9

.loopexit:                                        ; preds = %.lr.ph, %23
  %indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
  %34 = mul nuw nsw i64 %indvars.iv.next29, %indvars.iv.next29
  %35 = trunc nuw i64 %34 to i32
  %.not = icmp sgt i32 %35, %0
  %indvars.iv.next = add i64 %indvars.iv, 2
  br i1 %.not, label %._crit_edge, label %23, !llvm.loop !11

._crit_edge26:                                    ; preds = %43, %._crit_edge
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  ret void

36:                                               ; preds = %.lr.ph25, %43
  %storemerge23 = phi i32 [ 2, %.lr.ph25 ], [ %45, %43 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %37 = sext i32 %storemerge23 to i64
  %38 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @isprime, i64 noundef %37)
  %39 = extractvalue { ptr, i64 } %38, 0
  store ptr %39, ptr %7, align 8
  %40 = extractvalue { ptr, i64 } %38, 1
  store i64 %40, ptr %22, align 8
  %41 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br i1 %41, label %42, label %43

42:                                               ; preds = %36
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @allprimes, ptr noundef nonnull align 4 dereferenceable(4) %6)
  br label %43

43:                                               ; preds = %36, %42
  %44 = load i32, ptr %6, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %6, align 4, !tbaa !5
  %.not15.not = icmp slt i32 %44, %0
  br i1 %.not15.not, label %36, label %._crit_edge26, !llvm.loop !12
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIbSaIbEE6resizeEmb(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef, i1 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSERKS_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass