; LLVM IR from xirc/cp-algorithm :: spoj/abcpath/main.ll (Z3dfsiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@H = external dso_local global i32, align 4
@W = external dso_local global i32, align 4
@G = external dso_local global %"class.std::vector", align 8
@cache_count = external dso_local global %"class.std::vector.0", align 8
@_ZZ3dfsiiiE2dx = external hidden global [8 x i32], align 16
@_ZZ3dfsiiiE2dy = external hidden global [8 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z3dfsiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i8, align 1
  %15 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache_count, i64 noundef %17) #4
  %19 = load i32, ptr %5, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %20) #4
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = icmp sge i32 %22, 0
  br i1 %23, label %24, label %34

24:                                               ; preds = %3
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache_count, i64 noundef %27) #4
  %29 = load i32, ptr %5, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30) #4
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = add nsw i32 %25, %32
  store i32 %33, ptr %4, align 4
  br label %115

34:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %35 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %35, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %37) #4
  %39 = load i32, ptr %5, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40) #4
  %42 = load i8, ptr %41, align 1, !tbaa !9
  store i8 %42, ptr %9, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %101, %34
  %44 = load i32, ptr %10, align 4, !tbaa !5
  %45 = icmp slt i32 %44, 8
  br i1 %45, label %47, label %46

46:                                               ; preds = %43
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %104

47:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %48 = load i32, ptr %5, align 4, !tbaa !5
  %49 = load i32, ptr %10, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [8 x i32], ptr @_ZZ3dfsiiiE2dx, i64 0, i64 %50
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = add nsw i32 %48, %52
  store i32 %53, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %54 = load i32, ptr %6, align 4, !tbaa !5
  %55 = load i32, ptr %10, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [8 x i32], ptr @_ZZ3dfsiiiE2dy, i64 0, i64 %56
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = add nsw i32 %54, %58
  store i32 %59, ptr %13, align 4, !tbaa !5
  %60 = load i32, ptr %12, align 4, !tbaa !5
  %61 = icmp slt i32 %60, 0
  br i1 %61, label %73, label %62

62:                                               ; preds = %47
  %63 = load i32, ptr %12, align 4, !tbaa !5
  %64 = load i32, ptr @W, align 4, !tbaa !5
  %65 = icmp sge i32 %63, %64
  br i1 %65, label %73, label %66

66:                                               ; preds = %62
  %67 = load i32, ptr %13, align 4, !tbaa !5
  %68 = icmp slt i32 %67, 0
  br i1 %68, label %73, label %69

69:                                               ; preds = %66
  %70 = load i32, ptr %13, align 4, !tbaa !5
  %71 = load i32, ptr @H, align 4, !tbaa !5
  %72 = icmp sge i32 %70, %71
  br i1 %72, label %73, label %74

73:                                               ; preds = %69, %66, %62, %47
  store i32 4, ptr %11, align 4
  br label %98

74:                                               ; preds = %69
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #4
  %75 = load i32, ptr %13, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %76) #4
  %78 = load i32, ptr %12, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #4
  %81 = load i8, ptr %80, align 1, !tbaa !9
  store i8 %81, ptr %14, align 1, !tbaa !9
  %82 = load i8, ptr %14, align 1, !tbaa !9
  %83 = sext i8 %82 to i32
  %84 = load i8, ptr %9, align 1, !tbaa !9
  %85 = sext i8 %84 to i32
  %86 = sub nsw i32 %83, %85
  %87 = icmp ne i32 %86, 1
  br i1 %87, label %88, label %89

88:                                               ; preds = %74
  store i32 4, ptr %11, align 4
  br label %97

89:                                               ; preds = %74
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %90 = load i32, ptr %12, align 4, !tbaa !5
  %91 = load i32, ptr %13, align 4, !tbaa !5
  %92 = load i32, ptr %7, align 4, !tbaa !5
  %93 = add nsw i32 %92, 1
  %94 = call noundef i32 @_Z3dfsiii(i32 noundef %90, i32 noundef %91, i32 noundef %93)
  store i32 %94, ptr %15, align 4, !tbaa !5
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %15)
  %96 = load i32, ptr %95, align 4, !tbaa !5
  store i32 %96, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  store i32 0, ptr %11, align 4
  br label %97

97:                                               ; preds = %89, %88
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #4
  br label %98

98:                                               ; preds = %97, %73
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  %99 = load i32, ptr %11, align 4
  switch i32 %99, label %117 [
    i32 0, label %100
    i32 4, label %101
  ]

100:                                              ; preds = %98
  br label %101

101:                                              ; preds = %100, %98
  %102 = load i32, ptr %10, align 4, !tbaa !5
  %103 = add nsw i32 %102, 1
  store i32 %103, ptr %10, align 4, !tbaa !5
  br label %43, !llvm.loop !10

104:                                              ; preds = %46
  %105 = load i32, ptr %8, align 4, !tbaa !5
  %106 = load i32, ptr %7, align 4, !tbaa !5
  %107 = sub nsw i32 %105, %106
  %108 = load i32, ptr %6, align 4, !tbaa !5
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache_count, i64 noundef %109) #4
  %111 = load i32, ptr %5, align 4, !tbaa !5
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %112) #4
  store i32 %107, ptr %113, align 4, !tbaa !5
  %114 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %114, ptr %4, align 4
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %115

115:                                              ; preds = %104, %24
  %116 = load i32, ptr %4, align 4
  ret i32 %116

117:                                              ; preds = %98
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@H = external dso_local local_unnamed_addr global i32, align 4
@W = external dso_local local_unnamed_addr global i32, align 4
@G = external dso_local global %"class.std::vector", align 8
@cache_count = external dso_local global %"class.std::vector.0", align 8
@_ZZ3dfsiiiE2dx = external hidden local_unnamed_addr global [8 x i32], align 16
@_ZZ3dfsiiiE2dy = external hidden local_unnamed_addr global [8 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z3dfsiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = sext i32 %1 to i64
  %7 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache_count, i64 noundef %6) #3
  %8 = sext i32 %0 to i64
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %8) #3
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp sgt i32 %10, -1
  br i1 %11, label %12, label %17

12:                                               ; preds = %3
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache_count, i64 noundef %6) #3
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %8) #3
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = add nsw i32 %15, %2
  br label %212

17:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  store i32 %2, ptr %4, align 4, !tbaa !5
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %6) #3
  %19 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %8) #3
  %20 = load i8, ptr %19, align 1, !tbaa !9
  %21 = sext i8 %20 to i32
  %22 = add nsw i32 %2, 1
  %23 = load i32, ptr @_ZZ3dfsiiiE2dx, align 16, !tbaa !5
  %24 = add nsw i32 %23, %0
  %25 = load i32, ptr @_ZZ3dfsiiiE2dy, align 16, !tbaa !5
  %26 = add nsw i32 %25, %1
  %27 = icmp slt i32 %24, 0
  br i1 %27, label %45, label %28

28:                                               ; preds = %17
  %29 = load i32, ptr @W, align 4, !tbaa !5
  %30 = icmp slt i32 %24, %29
  %31 = icmp sgt i32 %26, -1
  %or.cond.not37 = select i1 %30, i1 %31, i1 false
  %32 = load i32, ptr @H, align 4
  %.not = icmp slt i32 %26, %32
  %or.cond34 = select i1 %or.cond.not37, i1 %.not, i1 false
  br i1 %or.cond34, label %33, label %45

33:                                               ; preds = %28
  %34 = zext nneg i32 %26 to i64
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %34) #3
  %36 = zext nneg i32 %24 to i64
  %37 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %36) #3
  %38 = load i8, ptr %37, align 1, !tbaa !9
  %39 = sext i8 %38 to i32
  %40 = sub nsw i32 %39, %21
  %.not33 = icmp eq i32 %40, 1
  br i1 %.not33, label %41, label %45

41:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %42 = tail call noundef i32 @_Z3dfsiii(i32 noundef %24, i32 noundef %26, i32 noundef %22)
  store i32 %42, ptr %5, align 4, !tbaa !5
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %44 = load i32, ptr %43, align 4, !tbaa !5
  store i32 %44, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %45

45:                                               ; preds = %41, %33, %17, %28
  %46 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dx, i64 4), align 4, !tbaa !5
  %47 = add nsw i32 %46, %0
  %48 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dy, i64 4), align 4, !tbaa !5
  %49 = add nsw i32 %48, %1
  %50 = icmp slt i32 %47, 0
  br i1 %50, label %68, label %51

51:                                               ; preds = %45
  %52 = load i32, ptr @W, align 4, !tbaa !5
  %53 = icmp slt i32 %47, %52
  %54 = icmp sgt i32 %49, -1
  %or.cond.not37.1 = select i1 %53, i1 %54, i1 false
  %55 = load i32, ptr @H, align 4
  %.not.1 = icmp slt i32 %49, %55
  %or.cond34.1 = select i1 %or.cond.not37.1, i1 %.not.1, i1 false
  br i1 %or.cond34.1, label %56, label %68

56:                                               ; preds = %51
  %57 = zext nneg i32 %49 to i64
  %58 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %57) #3
  %59 = zext nneg i32 %47 to i64
  %60 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %59) #3
  %61 = load i8, ptr %60, align 1, !tbaa !9
  %62 = sext i8 %61 to i32
  %63 = sub nsw i32 %62, %21
  %.not33.1 = icmp eq i32 %63, 1
  br i1 %.not33.1, label %64, label %68

64:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %65 = call noundef i32 @_Z3dfsiii(i32 noundef %47, i32 noundef %49, i32 noundef %22)
  store i32 %65, ptr %5, align 4, !tbaa !5
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %67 = load i32, ptr %66, align 4, !tbaa !5
  store i32 %67, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %68

68:                                               ; preds = %64, %56, %51, %45
  %69 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dx, i64 8), align 8, !tbaa !5
  %70 = add nsw i32 %69, %0
  %71 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dy, i64 8), align 8, !tbaa !5
  %72 = add nsw i32 %71, %1
  %73 = icmp slt i32 %70, 0
  br i1 %73, label %91, label %74

74:                                               ; preds = %68
  %75 = load i32, ptr @W, align 4, !tbaa !5
  %76 = icmp slt i32 %70, %75
  %77 = icmp sgt i32 %72, -1
  %or.cond.not37.2 = select i1 %76, i1 %77, i1 false
  %78 = load i32, ptr @H, align 4
  %.not.2 = icmp slt i32 %72, %78
  %or.cond34.2 = select i1 %or.cond.not37.2, i1 %.not.2, i1 false
  br i1 %or.cond34.2, label %79, label %91

79:                                               ; preds = %74
  %80 = zext nneg i32 %72 to i64
  %81 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %80) #3
  %82 = zext nneg i32 %70 to i64
  %83 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %82) #3
  %84 = load i8, ptr %83, align 1, !tbaa !9
  %85 = sext i8 %84 to i32
  %86 = sub nsw i32 %85, %21
  %.not33.2 = icmp eq i32 %86, 1
  br i1 %.not33.2, label %87, label %91

87:                                               ; preds = %79
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %88 = call noundef i32 @_Z3dfsiii(i32 noundef %70, i32 noundef %72, i32 noundef %22)
  store i32 %88, ptr %5, align 4, !tbaa !5
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %90 = load i32, ptr %89, align 4, !tbaa !5
  store i32 %90, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %91

91:                                               ; preds = %87, %79, %74, %68
  %92 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dx, i64 12), align 4, !tbaa !5
  %93 = add nsw i32 %92, %0
  %94 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dy, i64 12), align 4, !tbaa !5
  %95 = add nsw i32 %94, %1
  %96 = icmp slt i32 %93, 0
  br i1 %96, label %114, label %97

97:                                               ; preds = %91
  %98 = load i32, ptr @W, align 4, !tbaa !5
  %99 = icmp slt i32 %93, %98
  %100 = icmp sgt i32 %95, -1
  %or.cond.not37.3 = select i1 %99, i1 %100, i1 false
  %101 = load i32, ptr @H, align 4
  %.not.3 = icmp slt i32 %95, %101
  %or.cond34.3 = select i1 %or.cond.not37.3, i1 %.not.3, i1 false
  br i1 %or.cond34.3, label %102, label %114

102:                                              ; preds = %97
  %103 = zext nneg i32 %95 to i64
  %104 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %103) #3
  %105 = zext nneg i32 %93 to i64
  %106 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %104, i64 noundef %105) #3
  %107 = load i8, ptr %106, align 1, !tbaa !9
  %108 = sext i8 %107 to i32
  %109 = sub nsw i32 %108, %21
  %.not33.3 = icmp eq i32 %109, 1
  br i1 %.not33.3, label %110, label %114

110:                                              ; preds = %102
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %111 = call noundef i32 @_Z3dfsiii(i32 noundef %93, i32 noundef %95, i32 noundef %22)
  store i32 %111, ptr %5, align 4, !tbaa !5
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %113 = load i32, ptr %112, align 4, !tbaa !5
  store i32 %113, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %114

114:                                              ; preds = %110, %102, %97, %91
  %115 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dx, i64 16), align 16, !tbaa !5
  %116 = add nsw i32 %115, %0
  %117 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dy, i64 16), align 16, !tbaa !5
  %118 = add nsw i32 %117, %1
  %119 = icmp slt i32 %116, 0
  br i1 %119, label %137, label %120

120:                                              ; preds = %114
  %121 = load i32, ptr @W, align 4, !tbaa !5
  %122 = icmp slt i32 %116, %121
  %123 = icmp sgt i32 %118, -1
  %or.cond.not37.4 = select i1 %122, i1 %123, i1 false
  %124 = load i32, ptr @H, align 4
  %.not.4 = icmp slt i32 %118, %124
  %or.cond34.4 = select i1 %or.cond.not37.4, i1 %.not.4, i1 false
  br i1 %or.cond34.4, label %125, label %137

125:                                              ; preds = %120
  %126 = zext nneg i32 %118 to i64
  %127 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %126) #3
  %128 = zext nneg i32 %116 to i64
  %129 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %127, i64 noundef %128) #3
  %130 = load i8, ptr %129, align 1, !tbaa !9
  %131 = sext i8 %130 to i32
  %132 = sub nsw i32 %131, %21
  %.not33.4 = icmp eq i32 %132, 1
  br i1 %.not33.4, label %133, label %137

133:                                              ; preds = %125
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %134 = call noundef i32 @_Z3dfsiii(i32 noundef %116, i32 noundef %118, i32 noundef %22)
  store i32 %134, ptr %5, align 4, !tbaa !5
  %135 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %136 = load i32, ptr %135, align 4, !tbaa !5
  store i32 %136, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %137

137:                                              ; preds = %133, %125, %120, %114
  %138 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dx, i64 20), align 4, !tbaa !5
  %139 = add nsw i32 %138, %0
  %140 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dy, i64 20), align 4, !tbaa !5
  %141 = add nsw i32 %140, %1
  %142 = icmp slt i32 %139, 0
  br i1 %142, label %160, label %143

143:                                              ; preds = %137
  %144 = load i32, ptr @W, align 4, !tbaa !5
  %145 = icmp slt i32 %139, %144
  %146 = icmp sgt i32 %141, -1
  %or.cond.not37.5 = select i1 %145, i1 %146, i1 false
  %147 = load i32, ptr @H, align 4
  %.not.5 = icmp slt i32 %141, %147
  %or.cond34.5 = select i1 %or.cond.not37.5, i1 %.not.5, i1 false
  br i1 %or.cond34.5, label %148, label %160

148:                                              ; preds = %143
  %149 = zext nneg i32 %141 to i64
  %150 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %149) #3
  %151 = zext nneg i32 %139 to i64
  %152 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %150, i64 noundef %151) #3
  %153 = load i8, ptr %152, align 1, !tbaa !9
  %154 = sext i8 %153 to i32
  %155 = sub nsw i32 %154, %21
  %.not33.5 = icmp eq i32 %155, 1
  br i1 %.not33.5, label %156, label %160

156:                                              ; preds = %148
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %157 = call noundef i32 @_Z3dfsiii(i32 noundef %139, i32 noundef %141, i32 noundef %22)
  store i32 %157, ptr %5, align 4, !tbaa !5
  %158 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %159 = load i32, ptr %158, align 4, !tbaa !5
  store i32 %159, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %160

160:                                              ; preds = %156, %148, %143, %137
  %161 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dx, i64 24), align 8, !tbaa !5
  %162 = add nsw i32 %161, %0
  %163 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dy, i64 24), align 8, !tbaa !5
  %164 = add nsw i32 %163, %1
  %165 = icmp slt i32 %162, 0
  br i1 %165, label %183, label %166

166:                                              ; preds = %160
  %167 = load i32, ptr @W, align 4, !tbaa !5
  %168 = icmp slt i32 %162, %167
  %169 = icmp sgt i32 %164, -1
  %or.cond.not37.6 = select i1 %168, i1 %169, i1 false
  %170 = load i32, ptr @H, align 4
  %.not.6 = icmp slt i32 %164, %170
  %or.cond34.6 = select i1 %or.cond.not37.6, i1 %.not.6, i1 false
  br i1 %or.cond34.6, label %171, label %183

171:                                              ; preds = %166
  %172 = zext nneg i32 %164 to i64
  %173 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %172) #3
  %174 = zext nneg i32 %162 to i64
  %175 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %173, i64 noundef %174) #3
  %176 = load i8, ptr %175, align 1, !tbaa !9
  %177 = sext i8 %176 to i32
  %178 = sub nsw i32 %177, %21
  %.not33.6 = icmp eq i32 %178, 1
  br i1 %.not33.6, label %179, label %183

179:                                              ; preds = %171
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %180 = call noundef i32 @_Z3dfsiii(i32 noundef %162, i32 noundef %164, i32 noundef %22)
  store i32 %180, ptr %5, align 4, !tbaa !5
  %181 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %182 = load i32, ptr %181, align 4, !tbaa !5
  store i32 %182, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %183

183:                                              ; preds = %179, %171, %166, %160
  %184 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dx, i64 28), align 4, !tbaa !5
  %185 = add nsw i32 %184, %0
  %186 = load i32, ptr getelementptr inbounds (i8, ptr @_ZZ3dfsiiiE2dy, i64 28), align 4, !tbaa !5
  %187 = add nsw i32 %186, %1
  %188 = icmp slt i32 %185, 0
  br i1 %188, label %206, label %189

189:                                              ; preds = %183
  %190 = load i32, ptr @W, align 4, !tbaa !5
  %191 = icmp slt i32 %185, %190
  %192 = icmp sgt i32 %187, -1
  %or.cond.not37.7 = select i1 %191, i1 %192, i1 false
  %193 = load i32, ptr @H, align 4
  %.not.7 = icmp slt i32 %187, %193
  %or.cond34.7 = select i1 %or.cond.not37.7, i1 %.not.7, i1 false
  br i1 %or.cond34.7, label %194, label %206

194:                                              ; preds = %189
  %195 = zext nneg i32 %187 to i64
  %196 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @G, i64 noundef %195) #3
  %197 = zext nneg i32 %185 to i64
  %198 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %196, i64 noundef %197) #3
  %199 = load i8, ptr %198, align 1, !tbaa !9
  %200 = sext i8 %199 to i32
  %201 = sub nsw i32 %200, %21
  %.not33.7 = icmp eq i32 %201, 1
  br i1 %.not33.7, label %202, label %206

202:                                              ; preds = %194
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %203 = call noundef i32 @_Z3dfsiii(i32 noundef %185, i32 noundef %187, i32 noundef %22)
  store i32 %203, ptr %5, align 4, !tbaa !5
  %204 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %205 = load i32, ptr %204, align 4, !tbaa !5
  store i32 %205, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %206

206:                                              ; preds = %202, %194, %189, %183
  %207 = load i32, ptr %4, align 4, !tbaa !5
  %208 = sub nsw i32 %207, %2
  %209 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cache_count, i64 noundef %6) #3
  %210 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %209, i64 noundef %8) #3
  store i32 %208, ptr %210, align 4, !tbaa !5
  %211 = load i32, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  br label %212

212:                                              ; preds = %206, %12
  %.0 = phi i32 [ %16, %12 ], [ %211, %206 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass