; LLVM IR from xirc/cp-algorithm :: atcoder/abc039/B/main.ll (Z5solvei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvei(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 200, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %29, %1
  %8 = load i32, ptr %5, align 4, !tbaa !5
  %9 = icmp slt i32 %8, 200
  br i1 %9, label %11, label %10

10:                                               ; preds = %7
  store i32 2, ptr %6, align 4
  br label %32

11:                                               ; preds = %7
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = mul nsw i64 %13, %15
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = mul nsw i64 %16, %18
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = mul nsw i64 %19, %21
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = icmp eq i64 %22, %24
  br i1 %25, label %26, label %28

26:                                               ; preds = %11
  %27 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %27, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %32

28:                                               ; preds = %11
  br label %29

29:                                               ; preds = %28
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  store i32 %31, ptr %5, align 4, !tbaa !5
  br label %7, !llvm.loop !9

32:                                               ; preds = %26, %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  %33 = load i32, ptr %6, align 4
  switch i32 %33, label %35 [
    i32 2, label %34
  ]

34:                                               ; preds = %32
  call void @__cxa_rethrow() #3
  unreachable

35:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %36 = load i32, ptr %2, align 4
  ret i32 %36
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare void @__cxa_rethrow()

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }
attributes #3 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvei(i32 noundef %0) local_unnamed_addr #0 {
  %2 = sext i32 %0 to i64
  br label %3

3:                                                ; preds = %20, %1
  %indvars.iv = phi i64 [ 1, %1 ], [ %indvars.iv.next.3, %20 ]
  %4 = mul nuw nsw i64 %indvars.iv, %indvars.iv
  %5 = mul i64 %4, %4
  %6 = icmp eq i64 %5, %2
  br i1 %6, label %21, label %7

7:                                                ; preds = %3
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %8 = mul nuw nsw i64 %indvars.iv.next, %indvars.iv.next
  %9 = mul i64 %8, %8
  %10 = icmp eq i64 %9, %2
  br i1 %10, label %21, label %11

11:                                               ; preds = %7
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %12 = mul nuw nsw i64 %indvars.iv.next.1, %indvars.iv.next.1
  %13 = mul i64 %12, %12
  %14 = icmp eq i64 %13, %2
  br i1 %14, label %21, label %15

15:                                               ; preds = %11
  %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
  %exitcond.2 = icmp eq i64 %indvars.iv.next.2, 200
  br i1 %exitcond.2, label %.critedge, label %16, !llvm.loop !5

16:                                               ; preds = %15
  %17 = mul nuw nsw i64 %indvars.iv.next.2, %indvars.iv.next.2
  %18 = mul i64 %17, %17
  %19 = icmp eq i64 %18, %2
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  br label %3

.critedge:                                        ; preds = %15
  tail call void @__cxa_rethrow() #1
  unreachable

21:                                               ; preds = %16, %11, %7, %3
  %indvars.iv.lcssa = phi i64 [ %indvars.iv, %3 ], [ %indvars.iv.next, %7 ], [ %indvars.iv.next.1, %11 ], [ %indvars.iv.next.2, %16 ]
  %22 = trunc nuw nsw i64 %indvars.iv.lcssa to i32
  ret i32 %22
}

declare void @__cxa_rethrow() local_unnamed_addr

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass