; LLVM IR from Stephane-D/SGDK :: src (ym2612)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @YM2612_writeReg(i16 noundef zeroext %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #1 {
  %4 = alloca i16, align 2
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i16, align 2
  store i16 %0, ptr %4, align 2, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store i8 %2, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  store ptr inttoptr (i64 10502144 to ptr), ptr %7, align 8, !tbaa !10
  %9 = load i16, ptr %4, align 2, !tbaa !5
  %10 = zext i16 %9 to i32
  %11 = shl i32 %10, 1
  %12 = and i32 %11, 2
  %13 = trunc i32 %12 to i16
  store i16 %13, ptr %8, align 2, !tbaa !5
  br label %14

14:                                               ; preds = %19, %3
  %15 = load ptr, ptr %7, align 8, !tbaa !10
  %16 = load volatile i8, ptr %15, align 1, !tbaa !9
  %17 = sext i8 %16 to i32
  %18 = icmp slt i32 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  br label %14, !llvm.loop !12

20:                                               ; preds = %14
  %21 = load i8, ptr %5, align 1, !tbaa !9
  %22 = load ptr, ptr %7, align 8, !tbaa !10
  %23 = load i16, ptr %8, align 2, !tbaa !5
  %24 = zext i16 %23 to i32
  %25 = add nsw i32 %24, 0
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds i8, ptr %22, i64 %26
  store volatile i8 %21, ptr %27, align 1, !tbaa !9
  call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !14
  %28 = load i8, ptr %6, align 1, !tbaa !9
  %29 = load ptr, ptr %7, align 8, !tbaa !10
  %30 = load i16, ptr %8, align 2, !tbaa !5
  %31 = zext i16 %30 to i32
  %32 = add nsw i32 %31, 1
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds i8, ptr %29, i64 %33
  store volatile i8 %28, ptr %34, align 1, !tbaa !9
  call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !15
  call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !16
  call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !17
  call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !18
  call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !19
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{i64 3485}
!15 = !{i64 3631}
!16 = !{i64 3658}
!17 = !{i64 3685}
!18 = !{i64 3712}
!19 = !{i64 3739}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @YM2612_writeReg(i16 noundef zeroext %0, i8 noundef zeroext %1, i8 noundef zeroext %2) local_unnamed_addr #0 {
  br label %4

4:                                                ; preds = %4, %3
  %5 = load volatile i8, ptr inttoptr (i64 10502144 to ptr), align 16384, !tbaa !5
  %6 = icmp slt i8 %5, 0
  br i1 %6, label %4, label %7, !llvm.loop !8

7:                                                ; preds = %4
  %8 = shl i16 %0, 1
  %9 = and i16 %8, 2
  %10 = zext nneg i16 %9 to i64
  %11 = getelementptr inbounds i8, ptr inttoptr (i64 10502144 to ptr), i64 %10
  store volatile i8 %1, ptr %11, align 2, !tbaa !5
  tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !10
  %12 = or disjoint i16 %9, 1
  %13 = zext nneg i16 %12 to i64
  %14 = getelementptr inbounds i8, ptr inttoptr (i64 10502144 to ptr), i64 %13
  store volatile i8 %2, ptr %14, align 1, !tbaa !5
  tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !11
  tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !12
  tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !13
  tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !14
  tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !15
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{i64 3485}
!11 = !{i64 3631}
!12 = !{i64 3658}
!13 = !{i64 3685}
!14 = !{i64 3712}
!15 = !{i64 3739}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass