; LLVM IR from Stephane-D/SGDK :: src (sprite_eng)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.VRAMRegion = type { i16, i16, ptr, ptr }
%struct.Sprite = type { i16, i16, ptr, ptr, ptr, ptr, i16, i16, i16, i16, i16, i16, i16, i64, ptr, ptr }
%struct.SpriteDefinition = type { i16, i16, ptr, i16, ptr, i16, i16 }

@vram = external hidden global %struct.VRAMRegion, align 8
@.str.15 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare signext i16 @VRAM_alloc(ptr noundef, i16 noundef zeroext) #1

declare void @VRAM_free(ptr noundef, i16 noundef zeroext) #1

; Function Attrs: nounwind uwtable
declare hidden void @checkSpriteValid(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @SPR_setVRAMTileIndex(ptr noundef %0, i16 noundef signext %1) #2 {
  %3 = alloca i8, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i16 %1, ptr %5, align 2, !tbaa !9
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  call void @checkSpriteValid(ptr noundef %10, ptr noundef @.str.15)
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.Sprite, ptr %11, i32 0, i32 0
  %13 = load i16, ptr %12, align 8, !tbaa !11
  store i16 %13, ptr %7, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #3
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.Sprite, ptr %14, i32 0, i32 12
  %16 = load i16, ptr %15, align 4, !tbaa !14
  store i16 %16, ptr %8, align 2, !tbaa !9
  %17 = load i16, ptr %7, align 2, !tbaa !9
  %18 = zext i16 %17 to i32
  %19 = and i32 %18, 2048
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %37

21:                                               ; preds = %2
  %22 = load i16, ptr %5, align 2, !tbaa !9
  %23 = sext i16 %22 to i32
  %24 = icmp ne i32 %23, -1
  br i1 %24, label %25, label %35

25:                                               ; preds = %21
  %26 = load i16, ptr %7, align 2, !tbaa !9
  %27 = zext i16 %26 to i32
  %28 = and i32 %27, -2049
  %29 = trunc i32 %28 to i16
  store i16 %29, ptr %7, align 2, !tbaa !9
  %30 = load i16, ptr %8, align 2, !tbaa !9
  %31 = zext i16 %30 to i32
  %32 = and i32 %31, 2047
  %33 = trunc i32 %32 to i16
  call void @VRAM_free(ptr noundef @vram, i16 noundef zeroext %33)
  %34 = load i16, ptr %5, align 2, !tbaa !9
  store i16 %34, ptr %6, align 2, !tbaa !9
  br label %36

35:                                               ; preds = %21
  store i8 1, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %94

36:                                               ; preds = %25
  br label %63

37:                                               ; preds = %2
  %38 = load i16, ptr %5, align 2, !tbaa !9
  %39 = sext i16 %38 to i32
  %40 = icmp eq i32 %39, -1
  br i1 %40, label %41, label %60

41:                                               ; preds = %37
  %42 = load i16, ptr %7, align 2, !tbaa !9
  %43 = zext i16 %42 to i32
  %44 = or i32 %43, 2048
  %45 = trunc i32 %44 to i16
  store i16 %45, ptr %7, align 2, !tbaa !9
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.Sprite, ptr %46, i32 0, i32 2
  %48 = load ptr, ptr %47, align 8, !tbaa !15
  %49 = getelementptr inbounds %struct.SpriteDefinition, ptr %48, i32 0, i32 5
  %50 = load i16, ptr %49, align 8, !tbaa !16
  %51 = call signext i16 @VRAM_alloc(ptr noundef @vram, i16 noundef zeroext %50)
  store i16 %51, ptr %6, align 2, !tbaa !9
  %52 = load i16, ptr %6, align 2, !tbaa !9
  %53 = sext i16 %52 to i32
  %54 = icmp slt i32 %53, 0
  br i1 %54, label %55, label %59

55:                                               ; preds = %41
  %56 = load i16, ptr %7, align 2, !tbaa !9
  %57 = load ptr, ptr %4, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.Sprite, ptr %57, i32 0, i32 0
  store i16 %56, ptr %58, align 8, !tbaa !11
  store i8 0, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %94

59:                                               ; preds = %41
  br label %62

60:                                               ; preds = %37
  %61 = load i16, ptr %5, align 2, !tbaa !9
  store i16 %61, ptr %6, align 2, !tbaa !9
  br label %62

62:                                               ; preds = %60, %59
  br label %63

63:                                               ; preds = %62, %36
  %64 = load i16, ptr %8, align 2, !tbaa !9
  %65 = zext i16 %64 to i32
  %66 = and i32 %65, 2047
  %67 = load i16, ptr %6, align 2, !tbaa !9
  %68 = zext i16 %67 to i32
  %69 = icmp ne i32 %66, %68
  br i1 %69, label %70, label %90

70:                                               ; preds = %63
  %71 = load i16, ptr %8, align 2, !tbaa !9
  %72 = zext i16 %71 to i32
  %73 = and i32 %72, 63488
  %74 = load i16, ptr %6, align 2, !tbaa !9
  %75 = sext i16 %74 to i32
  %76 = or i32 %73, %75
  %77 = trunc i32 %76 to i16
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.Sprite, ptr %78, i32 0, i32 12
  store i16 %77, ptr %79, align 4, !tbaa !14
  %80 = load i16, ptr %7, align 2, !tbaa !9
  %81 = zext i16 %80 to i32
  %82 = and i32 %81, 1024
  %83 = icmp ne i32 %82, 0
  br i1 %83, label %84, label %89

84:                                               ; preds = %70
  %85 = load i16, ptr %7, align 2, !tbaa !9
  %86 = zext i16 %85 to i32
  %87 = or i32 %86, 4
  %88 = trunc i32 %87 to i16
  store i16 %88, ptr %7, align 2, !tbaa !9
  br label %89

89:                                               ; preds = %84, %70
  br label %90

90:                                               ; preds = %89, %63
  %91 = load i16, ptr %7, align 2, !tbaa !9
  %92 = load ptr, ptr %4, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.Sprite, ptr %92, i32 0, i32 0
  store i16 %91, ptr %93, align 8, !tbaa !11
  store i8 1, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %94

94:                                               ; preds = %90, %55, %35
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  %95 = load i8, ptr %3, align 1
  ret i8 %95
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"Sprite", !10, i64 0, !10, i64 2, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 42, !10, i64 44, !10, i64 46, !10, i64 48, !10, i64 50, !10, i64 52, !13, i64 56, !6, i64 64, !6, i64 72}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !10, i64 52}
!15 = !{!12, !6, i64 8}
!16 = !{!17, !10, i64 32}
!17 = !{!"", !10, i64 0, !10, i64 2, !6, i64 8, !10, i64 16, !6, i64 24, !10, i64 32, !10, i64 34}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.VRAMRegion = type { i16, i16, ptr, ptr }

@vram = external hidden global %struct.VRAMRegion, align 8
@.str.15 = external hidden unnamed_addr constant [21 x i8], align 1

declare signext i16 @VRAM_alloc(ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

declare void @VRAM_free(ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @checkSpriteValid(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @SPR_setVRAMTileIndex(ptr noundef %0, i16 noundef signext %1) local_unnamed_addr #1 {
  tail call void @checkSpriteValid(ptr noundef %0, ptr noundef nonnull @.str.15)
  %3 = load i16, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 52
  %5 = load i16, ptr %4, align 4, !tbaa !12
  %6 = and i16 %3, 2048
  %.not = icmp eq i16 %6, 0
  %7 = icmp eq i16 %1, -1
  br i1 %.not, label %12, label %8

8:                                                ; preds = %2
  br i1 %7, label %28, label %9

9:                                                ; preds = %8
  %10 = and i16 %3, -2049
  %11 = and i16 %5, 2047
  tail call void @VRAM_free(ptr noundef nonnull @vram, i16 noundef zeroext %11) #2
  br label %21

12:                                               ; preds = %2
  br i1 %7, label %13, label %21

13:                                               ; preds = %12
  %14 = or disjoint i16 %3, 2048
  %15 = getelementptr inbounds i8, ptr %0, i64 8
  %16 = load ptr, ptr %15, align 8, !tbaa !13
  %17 = getelementptr inbounds i8, ptr %16, i64 32
  %18 = load i16, ptr %17, align 8, !tbaa !14
  %19 = tail call signext i16 @VRAM_alloc(ptr noundef nonnull @vram, i16 noundef zeroext %18) #2
  %20 = icmp slt i16 %19, 0
  br i1 %20, label %.sink.split, label %21

21:                                               ; preds = %12, %13, %9
  %.025 = phi i16 [ %1, %9 ], [ %19, %13 ], [ %1, %12 ]
  %.024 = phi i16 [ %10, %9 ], [ %14, %13 ], [ %3, %12 ]
  %22 = and i16 %5, 2047
  %.not27 = icmp eq i16 %22, %.025
  br i1 %.not27, label %.sink.split, label %23

23:                                               ; preds = %21
  %24 = and i16 %5, -2048
  %25 = or i16 %.025, %24
  store i16 %25, ptr %4, align 4, !tbaa !12
  %26 = lshr i16 %.024, 8
  %27 = and i16 %26, 4
  %spec.select = or i16 %27, %.024
  br label %.sink.split

.sink.split:                                      ; preds = %21, %23, %13
  %.1.sink = phi i16 [ %14, %13 ], [ %.024, %21 ], [ %spec.select, %23 ]
  %.0.ph = phi i8 [ 0, %13 ], [ 1, %21 ], [ 1, %23 ]
  store i16 %.1.sink, ptr %0, align 8, !tbaa !5
  br label %28

28:                                               ; preds = %.sink.split, %8
  %.0 = phi i8 [ 1, %8 ], [ %.0.ph, %.sink.split ]
  ret i8 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"Sprite", !7, i64 0, !7, i64 2, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !7, i64 40, !7, i64 42, !7, i64 44, !7, i64 46, !7, i64 48, !7, i64 50, !7, i64 52, !11, i64 56, !10, i64 64, !10, i64 72}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !7, i64 52}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !7, i64 32}
!15 = !{!"", !7, i64 0, !7, i64 2, !10, i64 8, !7, i64 16, !10, i64 24, !7, i64 32, !7, i64 34}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass