; LLVM IR from Stephane-D/SGDK :: src/ext/flash-save (saveman)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.save_manager = type { i8, [2 x %struct.sector_metadata], i64, [0 x i64] }
%struct.sector_metadata = type { %union.anon, i64 }
%union.anon = type { ptr }

@sm = external hidden global ptr, align 8

declare void @SYS_disableInts() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare zeroext i8 @Z80_getAndRequestBus(i8 noundef zeroext) #0

declare void @Z80_releaseBus() #0

declare void @SYS_enableInts() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local signext i16 @sm_init(i8 noundef zeroext %0, i64 noundef %1) #2 {
  %3 = alloca i16, align 2
  %4 = alloca i8, align 1
  %5 = alloca i64, align 8
  %6 = alloca i8, align 1
  %7 = alloca i16, align 2
  %8 = alloca i32, align 4
  %9 = alloca i16, align 2
  store i8 %0, ptr %4, align 1, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !8
  %10 = load i8, ptr %4, align 1, !tbaa !5
  %11 = zext i8 %10 to i32
  %12 = icmp eq i32 0, %11
  br i1 %12, label %17, label %13

13:                                               ; preds = %2
  %14 = load i8, ptr %4, align 1, !tbaa !5
  %15 = zext i8 %14 to i32
  %16 = icmp eq i32 255, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %13, %2
  store i16 -3, ptr %3, align 2
  br label %75

18:                                               ; preds = %13
  %19 = load ptr, ptr @sm, align 8, !tbaa !10
  %20 = icmp ne ptr %19, null
  br i1 %20, label %32, label %21

21:                                               ; preds = %18
  %22 = load i8, ptr %4, align 1, !tbaa !5
  %23 = zext i8 %22 to i64
  %24 = mul i64 %23, 8
  %25 = add i64 48, %24
  %26 = trunc i64 %25 to i16
  %27 = call ptr @MEM_alloc(i16 noundef zeroext %26)
  store ptr %27, ptr @sm, align 8, !tbaa !10
  %28 = load ptr, ptr @sm, align 8, !tbaa !10
  %29 = icmp ne ptr %28, null
  br i1 %29, label %31, label %30

30:                                               ; preds = %21
  store i16 -2, ptr %3, align 2
  br label %75

31:                                               ; preds = %21
  br label %32

32:                                               ; preds = %31, %18
  call void @SYS_disableInts()
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  %33 = call zeroext i8 @Z80_getAndRequestBus(i8 noundef zeroext 1)
  store i8 %33, ptr %6, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  %34 = call signext i16 @flash_init()
  store i16 %34, ptr %7, align 2, !tbaa !12
  %35 = load i8, ptr %6, align 1, !tbaa !5
  %36 = icmp ne i8 %35, 0
  br i1 %36, label %38, label %37

37:                                               ; preds = %32
  call void @Z80_releaseBus()
  br label %38

38:                                               ; preds = %37, %32
  call void @SYS_enableInts()
  %39 = load i16, ptr %7, align 2, !tbaa !12
  %40 = icmp ne i16 %39, 0
  br i1 %40, label %41, label %42

41:                                               ; preds = %38
  call void @sm_deinit()
  store i16 -2, ptr %3, align 2
  store i32 1, ptr %8, align 4
  br label %74

42:                                               ; preds = %38
  %43 = load i64, ptr %5, align 8, !tbaa !8
  %44 = call signext i16 @sector_addrs_set(i64 noundef %43)
  store i16 %44, ptr %7, align 2, !tbaa !12
  %45 = load i16, ptr %7, align 2, !tbaa !12
  %46 = icmp ne i16 %45, 0
  br i1 %46, label %47, label %49

47:                                               ; preds = %42
  %48 = load i16, ptr %7, align 2, !tbaa !12
  store i16 %48, ptr %3, align 2
  store i32 1, ptr %8, align 4
  br label %74

49:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #3
  store i16 0, ptr %9, align 2, !tbaa !12
  br label %50

50:                                               ; preds = %63, %49
  %51 = load i16, ptr %9, align 2, !tbaa !12
  %52 = zext i16 %51 to i32
  %53 = load i8, ptr %4, align 1, !tbaa !5
  %54 = zext i8 %53 to i32
  %55 = icmp slt i32 %52, %54
  br i1 %55, label %57, label %56

56:                                               ; preds = %50
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #3
  br label %66

57:                                               ; preds = %50
  %58 = load ptr, ptr @sm, align 8, !tbaa !10
  %59 = getelementptr inbounds %struct.save_manager, ptr %58, i32 0, i32 3
  %60 = load i16, ptr %9, align 2, !tbaa !12
  %61 = zext i16 %60 to i64
  %62 = getelementptr inbounds [0 x i64], ptr %59, i64 0, i64 %61
  store i64 0, ptr %62, align 8, !tbaa !8
  br label %63

63:                                               ; preds = %57
  %64 = load i16, ptr %9, align 2, !tbaa !12
  %65 = add i16 %64, 1
  store i16 %65, ptr %9, align 2, !tbaa !12
  br label %50, !llvm.loop !14

66:                                               ; preds = %56
  %67 = load i8, ptr %4, align 1, !tbaa !5
  %68 = call signext i16 @savedata_probe(i8 noundef zeroext %67)
  store i16 %68, ptr %7, align 2, !tbaa !12
  %69 = load i16, ptr %7, align 2, !tbaa !12
  %70 = icmp ne i16 %69, 0
  br i1 %70, label %71, label %73

71:                                               ; preds = %66
  %72 = load i16, ptr %7, align 2, !tbaa !12
  store i16 %72, ptr %3, align 2
  store i32 1, ptr %8, align 4
  br label %74

73:                                               ; preds = %66
  store i16 0, ptr %3, align 2
  store i32 1, ptr %8, align 4
  br label %74

74:                                               ; preds = %73, %71, %47, %41
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  br label %75

75:                                               ; preds = %74, %30, %17
  %76 = load i16, ptr %3, align 2
  ret i16 %76
}

declare ptr @MEM_alloc(i16 noundef zeroext) #0

declare signext i16 @flash_init() #0

; Function Attrs: nounwind uwtable
declare dso_local void @sm_deinit() #2

; Function Attrs: nounwind uwtable
declare hidden signext i16 @sector_addrs_set(i64 noundef) #2

; Function Attrs: nounwind uwtable
declare hidden signext i16 @savedata_probe(i8 noundef zeroext) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"long", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !6, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sm = external hidden local_unnamed_addr global ptr, align 8

declare void @SYS_disableInts() local_unnamed_addr #0

declare zeroext i8 @Z80_getAndRequestBus(i8 noundef zeroext) local_unnamed_addr #0

declare void @Z80_releaseBus() local_unnamed_addr #0

declare void @SYS_enableInts() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local signext i16 @sm_init(i8 noundef zeroext %0, i64 noundef %1) local_unnamed_addr #1 {
  %3 = add i8 %0, 1
  %or.cond = icmp ult i8 %3, 2
  br i1 %or.cond, label %24, label %4

4:                                                ; preds = %2
  %5 = load ptr, ptr @sm, align 8, !tbaa !5
  %.not = icmp eq ptr %5, null
  br i1 %.not, label %6, label %11

6:                                                ; preds = %4
  %7 = zext i8 %0 to i16
  %8 = shl nuw nsw i16 %7, 3
  %9 = add nuw nsw i16 %8, 48
  %10 = tail call ptr @MEM_alloc(i16 noundef zeroext %9) #3
  store ptr %10, ptr @sm, align 8, !tbaa !5
  %.not22 = icmp eq ptr %10, null
  br i1 %.not22, label %24, label %11

11:                                               ; preds = %6, %4
  tail call void @SYS_disableInts() #3
  %12 = tail call zeroext i8 @Z80_getAndRequestBus(i8 noundef zeroext 1) #3
  %13 = tail call signext i16 @flash_init() #3
  %.not23 = icmp eq i8 %12, 0
  br i1 %.not23, label %14, label %15

14:                                               ; preds = %11
  tail call void @Z80_releaseBus() #3
  br label %15

15:                                               ; preds = %14, %11
  tail call void @SYS_enableInts() #3
  %.not24 = icmp eq i16 %13, 0
  br i1 %.not24, label %17, label %16

16:                                               ; preds = %15
  tail call void @sm_deinit()
  br label %24

17:                                               ; preds = %15
  %18 = tail call signext i16 @sector_addrs_set(i64 noundef %1)
  %.not25 = icmp eq i16 %18, 0
  br i1 %.not25, label %._crit_edge, label %24

._crit_edge:                                      ; preds = %17
  %19 = load ptr, ptr @sm, align 8, !tbaa !5
  %20 = getelementptr inbounds i8, ptr %19, i64 48
  %21 = zext i8 %0 to i64
  %22 = shl nuw nsw i64 %21, 3
  tail call void @llvm.memset.p0.i64(ptr nonnull align 8 %20, i8 0, i64 %22, i1 false), !tbaa !9
  %23 = tail call signext i16 @savedata_probe(i8 noundef zeroext %0)
  br label %24

24:                                               ; preds = %16, %17, %._crit_edge, %6, %2
  %.1 = phi i16 [ -3, %2 ], [ -2, %6 ], [ -2, %16 ], [ %18, %17 ], [ %23, %._crit_edge ]
  ret i16 %.1
}

declare ptr @MEM_alloc(i16 noundef zeroext) local_unnamed_addr #0

declare signext i16 @flash_init() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @sm_deinit() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden signext i16 @sector_addrs_set(i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden signext i16 @savedata_probe(i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass