; LLVM IR from thepowersgang/mrustc :: src/mir/mir.ll (ZNK3MIR12SwitchValueseqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [39 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [70 x i8], align 1
@__PRETTY_FUNCTION__._ZNK3MIR12SwitchValueseqERKS0_ = external hidden unnamed_addr constant [63 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues11as_UnsignedEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_SignedEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_StringB5cxx11Ev(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues13as_ByteStringEv(ptr noundef nonnull align 8 dereferenceable(32)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3MIR12SwitchValueseqERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) #3 align 2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %15 = load ptr, ptr %4, align 8
  %16 = call noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32) %15)
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = call noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32) %17)
  %19 = icmp ne i32 %16, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %2
  store i1 false, ptr %3, align 1
  br label %81

21:                                               ; preds = %2
  %22 = call noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32) %15)
  switch i32 %22, label %80 [
    i32 0, label %23
    i32 1, label %24
    i32 2, label %38
    i32 3, label %52
    i32 4, label %66
  ]

23:                                               ; preds = %21
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 854, ptr noundef @__PRETTY_FUNCTION__._ZNK3MIR12SwitchValueseqERKS0_) #5
  unreachable

24:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  %25 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues11as_UnsignedEv(ptr noundef nonnull align 8 dereferenceable(32) %15)
  store ptr %25, ptr %6, align 8, !tbaa !5
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues11as_UnsignedEv(ptr noundef nonnull align 8 dereferenceable(32) %27)
  store ptr %28, ptr %7, align 8, !tbaa !5
  %29 = load ptr, ptr %7, align 8, !tbaa !5
  %30 = load ptr, ptr %6, align 8, !tbaa !5
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  %32 = call noundef zeroext i1 @_ZStneImSaImEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24) %30, ptr noundef nonnull align 8 dereferenceable(24) %31)
  br i1 %32, label %33, label %34

33:                                               ; preds = %24
  store i1 false, ptr %3, align 1
  store i32 1, ptr %8, align 4
  br label %35

34:                                               ; preds = %24
  store i32 0, ptr %8, align 4
  br label %35

35:                                               ; preds = %34, %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  %36 = load i32, ptr %8, align 4
  switch i32 %36, label %83 [
    i32 0, label %37
    i32 1, label %81
  ]

37:                                               ; preds = %35
  br label %80

38:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #6
  %39 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_SignedEv(ptr noundef nonnull align 8 dereferenceable(32) %15)
  store ptr %39, ptr %9, align 8, !tbaa !5
  %40 = load ptr, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #6
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_SignedEv(ptr noundef nonnull align 8 dereferenceable(32) %41)
  store ptr %42, ptr %10, align 8, !tbaa !5
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = load ptr, ptr %10, align 8, !tbaa !5
  %46 = call noundef zeroext i1 @_ZStneIlSaIlEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24) %44, ptr noundef nonnull align 8 dereferenceable(24) %45)
  br i1 %46, label %47, label %48

47:                                               ; preds = %38
  store i1 false, ptr %3, align 1
  store i32 1, ptr %8, align 4
  br label %49

48:                                               ; preds = %38
  store i32 0, ptr %8, align 4
  br label %49

49:                                               ; preds = %48, %47
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  %50 = load i32, ptr %8, align 4
  switch i32 %50, label %83 [
    i32 0, label %51
    i32 1, label %81
  ]

51:                                               ; preds = %49
  br label %80

52:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  %53 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_StringB5cxx11Ev(ptr noundef nonnull align 8 dereferenceable(32) %15)
  store ptr %53, ptr %11, align 8, !tbaa !5
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_StringB5cxx11Ev(ptr noundef nonnull align 8 dereferenceable(32) %55)
  store ptr %56, ptr %12, align 8, !tbaa !5
  %57 = load ptr, ptr %12, align 8, !tbaa !5
  %58 = load ptr, ptr %11, align 8, !tbaa !5
  %59 = load ptr, ptr %12, align 8, !tbaa !5
  %60 = call noundef zeroext i1 @_ZStneINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEbRKSt6vectorIT_T0_ESC_(ptr noundef nonnull align 8 dereferenceable(24) %58, ptr noundef nonnull align 8 dereferenceable(24) %59)
  br i1 %60, label %61, label %62

61:                                               ; preds = %52
  store i1 false, ptr %3, align 1
  store i32 1, ptr %8, align 4
  br label %63

62:                                               ; preds = %52
  store i32 0, ptr %8, align 4
  br label %63

63:                                               ; preds = %62, %61
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  %64 = load i32, ptr %8, align 4
  switch i32 %64, label %83 [
    i32 0, label %65
    i32 1, label %81
  ]

65:                                               ; preds = %63
  br label %80

66:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues13as_ByteStringEv(ptr noundef nonnull align 8 dereferenceable(32) %15)
  store ptr %67, ptr %13, align 8, !tbaa !5
  %68 = load ptr, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  %69 = load ptr, ptr %5, align 8, !tbaa !5
  %70 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues13as_ByteStringEv(ptr noundef nonnull align 8 dereferenceable(32) %69)
  store ptr %70, ptr %14, align 8, !tbaa !5
  %71 = load ptr, ptr %14, align 8, !tbaa !5
  %72 = load ptr, ptr %13, align 8, !tbaa !5
  %73 = load ptr, ptr %14, align 8, !tbaa !5
  %74 = call noundef zeroext i1 @_ZStneISt6vectorIhSaIhEESaIS2_EEbRKS0_IT_T0_ES8_(ptr noundef nonnull align 8 dereferenceable(24) %72, ptr noundef nonnull align 8 dereferenceable(24) %73)
  br i1 %74, label %75, label %76

75:                                               ; preds = %66
  store i1 false, ptr %3, align 1
  store i32 1, ptr %8, align 4
  br label %77

76:                                               ; preds = %66
  store i32 0, ptr %8, align 4
  br label %77

77:                                               ; preds = %76, %75
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  %78 = load i32, ptr %8, align 4
  switch i32 %78, label %83 [
    i32 0, label %79
    i32 1, label %81
  ]

79:                                               ; preds = %77
  br label %80

80:                                               ; preds = %79, %65, %51, %37, %21
  store i1 true, ptr %3, align 1
  br label %81

81:                                               ; preds = %80, %77, %63, %49, %35, %20
  %82 = load i1, ptr %3, align 1
  ret i1 %82

83:                                               ; preds = %77, %63, %49, %35
  unreachable
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneImSaImEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneIlSaIlEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEbRKSt6vectorIT_T0_ESC_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneISt6vectorIhSaIhEESaIS2_EEbRKS0_IT_T0_ES8_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #4

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [39 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [70 x i8], align 1
@__PRETTY_FUNCTION__._ZNK3MIR12SwitchValueseqERKS0_ = external hidden unnamed_addr constant [63 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues11as_UnsignedEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_SignedEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_StringB5cxx11Ev(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues13as_ByteStringEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK3MIR12SwitchValueseqERKS0_(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) local_unnamed_addr #2 align 2 {
  %3 = tail call noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %4 = tail call noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  %.not = icmp eq i32 %3, %4
  br i1 %.not, label %5, label %25

5:                                                ; preds = %2
  %6 = tail call noundef i32 @_ZNK3MIR12SwitchValues3tagEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  switch i32 %6, label %24 [
    i32 0, label %7
    i32 1, label %8
    i32 2, label %12
    i32 3, label %16
    i32 4, label %20
  ]

7:                                                ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 854, ptr noundef nonnull @__PRETTY_FUNCTION__._ZNK3MIR12SwitchValueseqERKS0_) #4
  unreachable

8:                                                ; preds = %5
  %9 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues11as_UnsignedEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues11as_UnsignedEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  %11 = tail call noundef zeroext i1 @_ZStneImSaImEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef nonnull align 8 dereferenceable(24) %10)
  br i1 %11, label %25, label %24

12:                                               ; preds = %5
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_SignedEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_SignedEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  %15 = tail call noundef zeroext i1 @_ZStneIlSaIlEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef nonnull align 8 dereferenceable(24) %14)
  br i1 %15, label %25, label %24

16:                                               ; preds = %5
  %17 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_StringB5cxx11Ev(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues9as_StringB5cxx11Ev(ptr noundef nonnull align 8 dereferenceable(32) %1)
  %19 = tail call noundef zeroext i1 @_ZStneINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEbRKSt6vectorIT_T0_ESC_(ptr noundef nonnull align 8 dereferenceable(24) %17, ptr noundef nonnull align 8 dereferenceable(24) %18)
  br i1 %19, label %25, label %24

20:                                               ; preds = %5
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues13as_ByteStringEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNK3MIR12SwitchValues13as_ByteStringEv(ptr noundef nonnull align 8 dereferenceable(32) %1)
  %23 = tail call noundef zeroext i1 @_ZStneISt6vectorIhSaIhEESaIS2_EEbRKS0_IT_T0_ES8_(ptr noundef nonnull align 8 dereferenceable(24) %21, ptr noundef nonnull align 8 dereferenceable(24) %22)
  br i1 %23, label %25, label %24

24:                                               ; preds = %20, %16, %12, %8, %5
  br label %25

25:                                               ; preds = %20, %16, %12, %8, %2, %24
  %.4 = phi i1 [ true, %24 ], [ false, %20 ], [ false, %16 ], [ false, %12 ], [ false, %8 ], [ false, %2 ]
  ret i1 %.4
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneImSaImEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneIlSaIlEEbRKSt6vectorIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EEbRKSt6vectorIT_T0_ESC_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZStneISt6vectorIhSaIhEESaIS2_EEbRKS0_IT_T0_ES8_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass