; LLVM IR from xirc/cp-algorithm :: atcoder/abc136/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@H = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvev() #0 {
  %1 = alloca i1, align 1
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %28, %0
  %6 = load i32, ptr %2, align 4, !tbaa !5
  %7 = load i32, ptr @N, align 4, !tbaa !5
  %8 = icmp slt i32 %6, %7
  br i1 %8, label %10, label %9

9:                                                ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  br label %31

10:                                               ; preds = %5
  %11 = load i32, ptr %2, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %12) #2
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = sub nsw i32 %15, 1
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %17) #2
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = icmp sgt i32 %14, %19
  br i1 %20, label %21, label %27

21:                                               ; preds = %10
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %23) #2
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = add nsw i32 %25, -1
  store i32 %26, ptr %24, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %21, %10
  br label %28

28:                                               ; preds = %27
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %2, align 4, !tbaa !5
  br label %5, !llvm.loop !9

31:                                               ; preds = %9
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %51, %31
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  %35 = load i32, ptr @N, align 4, !tbaa !5
  %36 = icmp slt i32 %34, %35
  br i1 %36, label %38, label %37

37:                                               ; preds = %32
  store i32 5, ptr %4, align 4
  br label %54

38:                                               ; preds = %32
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %40) #2
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = icmp sgt i32 %42, %47
  br i1 %48, label %49, label %50

49:                                               ; preds = %38
  store i1 false, ptr %1, align 1
  store i32 1, ptr %4, align 4
  br label %54

50:                                               ; preds = %38
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %3, align 4, !tbaa !5
  br label %32, !llvm.loop !11

54:                                               ; preds = %49, %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  %55 = load i32, ptr %4, align 4
  switch i32 %55, label %59 [
    i32 5, label %56
    i32 1, label %57
  ]

56:                                               ; preds = %54
  store i1 true, ptr %1, align 1
  br label %57

57:                                               ; preds = %56, %54
  %58 = load i1, ptr %1, align 1
  ret i1 %58

59:                                               ; preds = %54
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@H = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 1
  br i1 %2, label %.lr.ph, label %.preheader.preheader

.lr.ph:                                           ; preds = %0, %13
  %indvars.iv = phi i64 [ %indvars.iv.next, %13 ], [ 1, %0 ]
  %3 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %indvars.iv) #1
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = add nsw i64 %indvars.iv, -1
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %5) #1
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = icmp sgt i32 %4, %7
  br i1 %8, label %9, label %13

9:                                                ; preds = %.lr.ph
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %indvars.iv) #1
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = add nsw i32 %11, -1
  store i32 %12, ptr %10, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %.lr.ph, %9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %14 = load i32, ptr @N, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = icmp slt i64 %indvars.iv.next, %15
  br i1 %16, label %.lr.ph, label %.preheader.preheader, !llvm.loop !9

.preheader.preheader:                             ; preds = %13, %0
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %19
  %indvars.iv16 = phi i64 [ %indvars.iv.next17, %19 ], [ 0, %.preheader.preheader ]
  %indvars.iv.next17 = add nuw nsw i64 %indvars.iv16, 1
  %17 = load i32, ptr @N, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %.not = icmp sge i64 %indvars.iv.next17, %18
  br i1 %.not, label %25, label %19

19:                                               ; preds = %.preheader
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %indvars.iv16) #1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @H, i64 noundef %indvars.iv.next17) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp sgt i32 %21, %23
  br i1 %24, label %25, label %.preheader, !llvm.loop !11

25:                                               ; preds = %19, %.preheader
  ret i1 %.not
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass