; LLVM IR from xirc/cp-algorithm :: atcoder/abc086/D/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.2" = type { i8 }
%"class.std::allocator" = type { i8 }

@K = external dso_local global i32, align 4
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() #1 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca %"class.std::vector", align 8
  %3 = alloca %"class.std::vector.0", align 8
  %4 = alloca %"class.std::allocator.2", align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::allocator", align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  %23 = load i32, ptr @K, align 4, !tbaa !5
  %24 = mul nsw i32 %23, 2
  store i32 %24, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 24, ptr %2) #4
  %25 = load i32, ptr %1, align 4, !tbaa !5
  %26 = mul nsw i32 2, %25
  %27 = sext i32 %26 to i64
  call void @llvm.lifetime.start.p0(i64 24, ptr %3) #4
  %28 = load i32, ptr %1, align 4, !tbaa !5
  %29 = mul nsw i32 2, %28
  %30 = sext i32 %29 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #4
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #4
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %30, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %31 unwind label %38

31:                                               ; preds = %0
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  call void @_ZNSaISt6vectorIiSaIiEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %7) #4
  invoke void @_ZNSt6vectorIS_IiSaIiEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %27, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 1 dereferenceable(1) %7)
          to label %32 unwind label %42

32:                                               ; preds = %31
  call void @_ZNSt15__new_allocatorISt6vectorIiSaIiEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %134, %32
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = load i32, ptr %1, align 4, !tbaa !5
  %36 = icmp slt i32 %34, %35
  br i1 %36, label %47, label %37

37:                                               ; preds = %33
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %137

38:                                               ; preds = %0
  %39 = landingpad { ptr, i32 }
          cleanup
  %40 = extractvalue { ptr, i32 } %39, 0
  store ptr %40, ptr %5, align 8
  %41 = extractvalue { ptr, i32 } %39, 1
  store i32 %41, ptr %6, align 4
  br label %46

42:                                               ; preds = %31
  %43 = landingpad { ptr, i32 }
          cleanup
  %44 = extractvalue { ptr, i32 } %43, 0
  store ptr %44, ptr %5, align 8
  %45 = extractvalue { ptr, i32 } %43, 1
  store i32 %45, ptr %6, align 4
  call void @_ZNSt15__new_allocatorISt6vectorIiSaIiEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #4
  br label %46

46:                                               ; preds = %42, %38
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #4
  br label %316

47:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %48

48:                                               ; preds = %130, %47
  %49 = load i32, ptr %10, align 4, !tbaa !5
  %50 = load i32, ptr %1, align 4, !tbaa !5
  %51 = icmp slt i32 %49, %50
  br i1 %51, label %53, label %52

52:                                               ; preds = %48
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %133

53:                                               ; preds = %48
  %54 = load i32, ptr %8, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %55) #4
  %57 = load i32, ptr %10, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58) #4
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = load i32, ptr %8, align 4, !tbaa !5
  %62 = load i32, ptr @K, align 4, !tbaa !5
  %63 = add nsw i32 %61, %62
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %64) #4
  %66 = load i32, ptr %10, align 4, !tbaa !5
  %67 = load i32, ptr @K, align 4, !tbaa !5
  %68 = add nsw i32 %66, %67
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %69) #4
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %72 = add nsw i32 %71, %60
  store i32 %72, ptr %70, align 4, !tbaa !5
  %73 = load i32, ptr %8, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %74) #4
  %76 = load i32, ptr %10, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %77) #4
  %79 = load i32, ptr %78, align 4, !tbaa !5
  %80 = load i32, ptr %8, align 4, !tbaa !5
  %81 = load i32, ptr %1, align 4, !tbaa !5
  %82 = add nsw i32 %80, %81
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %83) #4
  %85 = load i32, ptr %10, align 4, !tbaa !5
  %86 = load i32, ptr @K, align 4, !tbaa !5
  %87 = add nsw i32 %85, %86
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %88) #4
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = sub nsw i32 %90, %79
  store i32 %91, ptr %89, align 4, !tbaa !5
  %92 = load i32, ptr %8, align 4, !tbaa !5
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %93) #4
  %95 = load i32, ptr %10, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %94, i64 noundef %96) #4
  %98 = load i32, ptr %97, align 4, !tbaa !5
  %99 = load i32, ptr %8, align 4, !tbaa !5
  %100 = load i32, ptr @K, align 4, !tbaa !5
  %101 = add nsw i32 %99, %100
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %102) #4
  %104 = load i32, ptr %10, align 4, !tbaa !5
  %105 = load i32, ptr %1, align 4, !tbaa !5
  %106 = add nsw i32 %104, %105
  %107 = sext i32 %106 to i64
  %108 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %103, i64 noundef %107) #4
  %109 = load i32, ptr %108, align 4, !tbaa !5
  %110 = sub nsw i32 %109, %98
  store i32 %110, ptr %108, align 4, !tbaa !5
  %111 = load i32, ptr %8, align 4, !tbaa !5
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %112) #4
  %114 = load i32, ptr %10, align 4, !tbaa !5
  %115 = sext i32 %114 to i64
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %115) #4
  %117 = load i32, ptr %116, align 4, !tbaa !5
  %118 = load i32, ptr %8, align 4, !tbaa !5
  %119 = load i32, ptr %1, align 4, !tbaa !5
  %120 = add nsw i32 %118, %119
  %121 = sext i32 %120 to i64
  %122 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %121) #4
  %123 = load i32, ptr %10, align 4, !tbaa !5
  %124 = load i32, ptr %1, align 4, !tbaa !5
  %125 = add nsw i32 %123, %124
  %126 = sext i32 %125 to i64
  %127 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %122, i64 noundef %126) #4
  %128 = load i32, ptr %127, align 4, !tbaa !5
  %129 = add nsw i32 %128, %117
  store i32 %129, ptr %127, align 4, !tbaa !5
  br label %130

130:                                              ; preds = %53
  %131 = load i32, ptr %10, align 4, !tbaa !5
  %132 = add nsw i32 %131, 1
  store i32 %132, ptr %10, align 4, !tbaa !5
  br label %48, !llvm.loop !9

133:                                              ; preds = %52
  br label %134

134:                                              ; preds = %133
  %135 = load i32, ptr %8, align 4, !tbaa !5
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %8, align 4, !tbaa !5
  br label %33, !llvm.loop !11

137:                                              ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %138

138:                                              ; preds = %172, %137
  %139 = load i32, ptr %11, align 4, !tbaa !5
  %140 = load i32, ptr %1, align 4, !tbaa !5
  %141 = mul nsw i32 2, %140
  %142 = icmp slt i32 %139, %141
  br i1 %142, label %144, label %143

143:                                              ; preds = %138
  store i32 8, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %175

144:                                              ; preds = %138
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 1, ptr %12, align 4, !tbaa !5
  br label %145

145:                                              ; preds = %168, %144
  %146 = load i32, ptr %12, align 4, !tbaa !5
  %147 = load i32, ptr %1, align 4, !tbaa !5
  %148 = mul nsw i32 2, %147
  %149 = icmp slt i32 %146, %148
  br i1 %149, label %151, label %150

150:                                              ; preds = %145
  store i32 11, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %171

151:                                              ; preds = %145
  %152 = load i32, ptr %11, align 4, !tbaa !5
  %153 = sext i32 %152 to i64
  %154 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %153) #4
  %155 = load i32, ptr %12, align 4, !tbaa !5
  %156 = sub nsw i32 %155, 1
  %157 = sext i32 %156 to i64
  %158 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %154, i64 noundef %157) #4
  %159 = load i32, ptr %158, align 4, !tbaa !5
  %160 = load i32, ptr %11, align 4, !tbaa !5
  %161 = sext i32 %160 to i64
  %162 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %161) #4
  %163 = load i32, ptr %12, align 4, !tbaa !5
  %164 = sext i32 %163 to i64
  %165 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %162, i64 noundef %164) #4
  %166 = load i32, ptr %165, align 4, !tbaa !5
  %167 = add nsw i32 %166, %159
  store i32 %167, ptr %165, align 4, !tbaa !5
  br label %168

168:                                              ; preds = %151
  %169 = load i32, ptr %12, align 4, !tbaa !5
  %170 = add nsw i32 %169, 1
  store i32 %170, ptr %12, align 4, !tbaa !5
  br label %145, !llvm.loop !12

171:                                              ; preds = %150
  br label %172

172:                                              ; preds = %171
  %173 = load i32, ptr %11, align 4, !tbaa !5
  %174 = add nsw i32 %173, 1
  store i32 %174, ptr %11, align 4, !tbaa !5
  br label %138, !llvm.loop !13

175:                                              ; preds = %143
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %176

176:                                              ; preds = %210, %175
  %177 = load i32, ptr %13, align 4, !tbaa !5
  %178 = load i32, ptr %1, align 4, !tbaa !5
  %179 = mul nsw i32 2, %178
  %180 = icmp slt i32 %177, %179
  br i1 %180, label %182, label %181

181:                                              ; preds = %176
  store i32 14, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %213

182:                                              ; preds = %176
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  store i32 1, ptr %14, align 4, !tbaa !5
  br label %183

183:                                              ; preds = %206, %182
  %184 = load i32, ptr %14, align 4, !tbaa !5
  %185 = load i32, ptr %1, align 4, !tbaa !5
  %186 = mul nsw i32 2, %185
  %187 = icmp slt i32 %184, %186
  br i1 %187, label %189, label %188

188:                                              ; preds = %183
  store i32 17, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %209

189:                                              ; preds = %183
  %190 = load i32, ptr %14, align 4, !tbaa !5
  %191 = sub nsw i32 %190, 1
  %192 = sext i32 %191 to i64
  %193 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %192) #4
  %194 = load i32, ptr %13, align 4, !tbaa !5
  %195 = sext i32 %194 to i64
  %196 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %193, i64 noundef %195) #4
  %197 = load i32, ptr %196, align 4, !tbaa !5
  %198 = load i32, ptr %14, align 4, !tbaa !5
  %199 = sext i32 %198 to i64
  %200 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %199) #4
  %201 = load i32, ptr %13, align 4, !tbaa !5
  %202 = sext i32 %201 to i64
  %203 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %200, i64 noundef %202) #4
  %204 = load i32, ptr %203, align 4, !tbaa !5
  %205 = add nsw i32 %204, %197
  store i32 %205, ptr %203, align 4, !tbaa !5
  br label %206

206:                                              ; preds = %189
  %207 = load i32, ptr %14, align 4, !tbaa !5
  %208 = add nsw i32 %207, 1
  store i32 %208, ptr %14, align 4, !tbaa !5
  br label %183, !llvm.loop !14

209:                                              ; preds = %188
  br label %210

210:                                              ; preds = %209
  %211 = load i32, ptr %13, align 4, !tbaa !5
  %212 = add nsw i32 %211, 1
  store i32 %212, ptr %13, align 4, !tbaa !5
  br label %176, !llvm.loop !15

213:                                              ; preds = %181
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  store i32 0, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %214 = load i32, ptr @K, align 4, !tbaa !5
  store i32 %214, ptr %16, align 4, !tbaa !5
  br label %215

215:                                              ; preds = %311, %213
  %216 = load i32, ptr %16, align 4, !tbaa !5
  %217 = load i32, ptr @K, align 4, !tbaa !5
  %218 = load i32, ptr %1, align 4, !tbaa !5
  %219 = add nsw i32 %217, %218
  %220 = icmp slt i32 %216, %219
  br i1 %220, label %222, label %221

221:                                              ; preds = %215
  store i32 20, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  br label %314

222:                                              ; preds = %215
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %223 = load i32, ptr @K, align 4, !tbaa !5
  store i32 %223, ptr %17, align 4, !tbaa !5
  br label %224

224:                                              ; preds = %303, %222
  %225 = load i32, ptr %17, align 4, !tbaa !5
  %226 = load i32, ptr @K, align 4, !tbaa !5
  %227 = load i32, ptr %1, align 4, !tbaa !5
  %228 = add nsw i32 %226, %227
  %229 = icmp slt i32 %225, %228
  br i1 %229, label %231, label %230

230:                                              ; preds = %224
  store i32 23, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %310

231:                                              ; preds = %224
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 0, ptr %18, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 -4, ptr %19, align 4, !tbaa !5
  br label %232

232:                                              ; preds = %296, %231
  %233 = load i32, ptr %19, align 4, !tbaa !5
  %234 = icmp sle i32 %233, 4
  br i1 %234, label %236, label %235

235:                                              ; preds = %232
  store i32 26, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  br label %299

236:                                              ; preds = %232
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %237 = load i32, ptr %16, align 4, !tbaa !5
  %238 = load i32, ptr %19, align 4, !tbaa !5
  %239 = load i32, ptr @K, align 4, !tbaa !5
  %240 = mul nsw i32 %238, %239
  %241 = add nsw i32 %237, %240
  store i32 %241, ptr %20, align 4, !tbaa !5
  %242 = load i32, ptr %20, align 4, !tbaa !5
  %243 = icmp slt i32 %242, 0
  br i1 %243, label %249, label %244

244:                                              ; preds = %236
  %245 = load i32, ptr %20, align 4, !tbaa !5
  %246 = load i32, ptr %1, align 4, !tbaa !5
  %247 = mul nsw i32 2, %246
  %248 = icmp sge i32 %245, %247
  br i1 %248, label %249, label %250

249:                                              ; preds = %244, %236
  store i32 28, ptr %9, align 4
  br label %293

250:                                              ; preds = %244
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 -4, ptr %21, align 4, !tbaa !5
  br label %251

251:                                              ; preds = %289, %250
  %252 = load i32, ptr %21, align 4, !tbaa !5
  %253 = icmp sle i32 %252, 4
  br i1 %253, label %255, label %254

254:                                              ; preds = %251
  store i32 29, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  br label %292

255:                                              ; preds = %251
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  %256 = load i32, ptr %17, align 4, !tbaa !5
  %257 = load i32, ptr %21, align 4, !tbaa !5
  %258 = load i32, ptr @K, align 4, !tbaa !5
  %259 = mul nsw i32 %257, %258
  %260 = add nsw i32 %256, %259
  store i32 %260, ptr %22, align 4, !tbaa !5
  %261 = load i32, ptr %22, align 4, !tbaa !5
  %262 = icmp slt i32 %261, 0
  br i1 %262, label %268, label %263

263:                                              ; preds = %255
  %264 = load i32, ptr %22, align 4, !tbaa !5
  %265 = load i32, ptr %1, align 4, !tbaa !5
  %266 = mul nsw i32 2, %265
  %267 = icmp sge i32 %264, %266
  br i1 %267, label %268, label %269

268:                                              ; preds = %263, %255
  store i32 31, ptr %9, align 4
  br label %286

269:                                              ; preds = %263
  %270 = load i32, ptr %19, align 4, !tbaa !5
  %271 = load i32, ptr %21, align 4, !tbaa !5
  %272 = add nsw i32 %270, %271
  %273 = srem i32 %272, 2
  %274 = icmp eq i32 %273, 0
  br i1 %274, label %275, label %285

275:                                              ; preds = %269
  %276 = load i32, ptr %20, align 4, !tbaa !5
  %277 = sext i32 %276 to i64
  %278 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %277) #4
  %279 = load i32, ptr %22, align 4, !tbaa !5
  %280 = sext i32 %279 to i64
  %281 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %278, i64 noundef %280) #4
  %282 = load i32, ptr %281, align 4, !tbaa !5
  %283 = load i32, ptr %18, align 4, !tbaa !5
  %284 = add nsw i32 %283, %282
  store i32 %284, ptr %18, align 4, !tbaa !5
  br label %285

285:                                              ; preds = %275, %269
  store i32 0, ptr %9, align 4
  br label %286

286:                                              ; preds = %285, %268
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  %287 = load i32, ptr %9, align 4
  switch i32 %287, label %322 [
    i32 0, label %288
    i32 31, label %289
  ]

288:                                              ; preds = %286
  br label %289

289:                                              ; preds = %288, %286
  %290 = load i32, ptr %21, align 4, !tbaa !5
  %291 = add nsw i32 %290, 1
  store i32 %291, ptr %21, align 4, !tbaa !5
  br label %251, !llvm.loop !16

292:                                              ; preds = %254
  store i32 0, ptr %9, align 4
  br label %293

293:                                              ; preds = %292, %249
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  %294 = load i32, ptr %9, align 4
  switch i32 %294, label %322 [
    i32 0, label %295
    i32 28, label %296
  ]

295:                                              ; preds = %293
  br label %296

296:                                              ; preds = %295, %293
  %297 = load i32, ptr %19, align 4, !tbaa !5
  %298 = add nsw i32 %297, 1
  store i32 %298, ptr %19, align 4, !tbaa !5
  br label %232, !llvm.loop !17

299:                                              ; preds = %235
  %300 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %18)
          to label %301 unwind label %306

301:                                              ; preds = %299
  %302 = load i32, ptr %300, align 4, !tbaa !5
  store i32 %302, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  br label %303

303:                                              ; preds = %301
  %304 = load i32, ptr %17, align 4, !tbaa !5
  %305 = add nsw i32 %304, 1
  store i32 %305, ptr %17, align 4, !tbaa !5
  br label %224, !llvm.loop !18

306:                                              ; preds = %299
  %307 = landingpad { ptr, i32 }
          cleanup
  %308 = extractvalue { ptr, i32 } %307, 0
  store ptr %308, ptr %5, align 8
  %309 = extractvalue { ptr, i32 } %307, 1
  store i32 %309, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  br label %316

310:                                              ; preds = %230
  br label %311

311:                                              ; preds = %310
  %312 = load i32, ptr %16, align 4, !tbaa !5
  %313 = add nsw i32 %312, 1
  store i32 %313, ptr %16, align 4, !tbaa !5
  br label %215, !llvm.loop !19

314:                                              ; preds = %221
  %315 = load i32, ptr %15, align 4, !tbaa !5
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i32 %315

316:                                              ; preds = %306, %46
  call void @llvm.lifetime.end.p0(i64 24, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %317

317:                                              ; preds = %316
  %318 = load ptr, ptr %5, align 8
  %319 = load i32, ptr %6, align 4
  %320 = insertvalue { ptr, i32 } poison, ptr %318, 0
  %321 = insertvalue { ptr, i32 } %320, i32 %319, 1
  resume { ptr, i32 } %321

322:                                              ; preds = %293, %286
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaISt6vectorIiSaIiEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IiSaIiEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorISt6vectorIiSaIiEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.2" = type { i8 }
%"class.std::allocator" = type { i8 }

@K = external dso_local local_unnamed_addr global i32, align 4
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %1 = alloca %"class.std::vector", align 8
  %2 = alloca %"class.std::vector.0", align 8
  %3 = alloca %"class.std::allocator.2", align 1
  %4 = alloca %"class.std::allocator", align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = load i32, ptr @K, align 4, !tbaa !5
  %8 = shl i32 %7, 1
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %1) #5
  %9 = shl i32 %7, 2
  %10 = sext i32 %9 to i64
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #5
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #5
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %10, ptr noundef nonnull align 1 dereferenceable(1) %3)
          to label %11 unwind label %69

11:                                               ; preds = %0
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #5
  call void @_ZNSaISt6vectorIiSaIiEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  invoke void @_ZNSt6vectorIS_IiSaIiEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %12 unwind label %71

12:                                               ; preds = %11
  call void @_ZNSt15__new_allocatorISt6vectorIiSaIiEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  %13 = icmp sgt i32 %7, 0
  br i1 %13, label %.preheader96.us.preheader, label %._crit_edge104.thread

.preheader96.us.preheader:                        ; preds = %12
  %14 = zext i32 %8 to i64
  %smax = call i32 @llvm.smax.i32(i32 %8, i32 1)
  %wide.trip.count117 = zext nneg i32 %smax to i64
  br label %.preheader96.us

.preheader96.us:                                  ; preds = %.preheader96.us.preheader, %._crit_edge.us
  %indvars.iv114 = phi i64 [ 0, %.preheader96.us.preheader ], [ %indvars.iv.next115, %._crit_edge.us ]
  %15 = add nuw nsw i64 %indvars.iv114, %14
  %16 = trunc nuw nsw i64 %indvars.iv114 to i32
  br label %17

17:                                               ; preds = %.preheader96.us, %17
  %indvars.iv = phi i64 [ 0, %.preheader96.us ], [ %indvars.iv.next, %17 ]
  %18 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv114) #5
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %indvars.iv) #5
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = load i32, ptr @K, align 4, !tbaa !5
  %22 = add nsw i32 %21, %16
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %23) #5
  %25 = load i32, ptr @K, align 4, !tbaa !5
  %26 = trunc nuw nsw i64 %indvars.iv to i32
  %27 = add nsw i32 %25, %26
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %28) #5
  %30 = load i32, ptr %29, align 4, !tbaa !5
  %31 = add nsw i32 %30, %20
  store i32 %31, ptr %29, align 4, !tbaa !5
  %32 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv114) #5
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %indvars.iv) #5
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %15) #5
  %36 = load i32, ptr @K, align 4, !tbaa !5
  %37 = add nsw i32 %36, %26
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %38) #5
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = sub nsw i32 %40, %34
  store i32 %41, ptr %39, align 4, !tbaa !5
  %42 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv114) #5
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %indvars.iv) #5
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = load i32, ptr @K, align 4, !tbaa !5
  %46 = add nsw i32 %45, %16
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %47) #5
  %49 = add nuw nsw i64 %indvars.iv, %14
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %49) #5
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = sub nsw i32 %51, %44
  store i32 %52, ptr %50, align 4, !tbaa !5
  %53 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv114) #5
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %indvars.iv) #5
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %15) #5
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %49) #5
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %59 = add nsw i32 %58, %55
  store i32 %59, ptr %57, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count117
  br i1 %exitcond.not, label %._crit_edge.us, label %17, !llvm.loop !9

._crit_edge.us:                                   ; preds = %17
  %indvars.iv.next115 = add nuw nsw i64 %indvars.iv114, 1
  %exitcond118.not = icmp eq i64 %indvars.iv.next115, %wide.trip.count117
  br i1 %exitcond118.not, label %.preheader95, label %.preheader96.us, !llvm.loop !11

.preheader95:                                     ; preds = %._crit_edge.us
  br i1 %13, label %.preheader94.us.preheader, label %._crit_edge104.thread

.preheader94.us.preheader:                        ; preds = %.preheader95
  %smax122 = call i32 @llvm.smax.i32(i32 %9, i32 2)
  %smax128 = call i32 @llvm.smax.i32(i32 %9, i32 1)
  %wide.trip.count129 = zext nneg i32 %smax128 to i64
  %wide.trip.count123 = zext nneg i32 %smax122 to i64
  br label %.preheader94.us

.preheader94.us:                                  ; preds = %.preheader94.us.preheader, %._crit_edge.us101
  %indvars.iv125 = phi i64 [ 0, %.preheader94.us.preheader ], [ %indvars.iv.next126, %._crit_edge.us101 ]
  br label %60

60:                                               ; preds = %.preheader94.us, %60
  %indvars.iv119 = phi i64 [ 1, %.preheader94.us ], [ %indvars.iv.next120, %60 ]
  %61 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv125) #5
  %62 = add nsw i64 %indvars.iv119, -1
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %62) #5
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv125) #5
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %indvars.iv119) #5
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %68 = add nsw i32 %67, %64
  store i32 %68, ptr %66, align 4, !tbaa !5
  %indvars.iv.next120 = add nuw nsw i64 %indvars.iv119, 1
  %exitcond124.not = icmp eq i64 %indvars.iv.next120, %wide.trip.count123
  br i1 %exitcond124.not, label %._crit_edge.us101, label %60, !llvm.loop !12

._crit_edge.us101:                                ; preds = %60
  %indvars.iv.next126 = add nuw nsw i64 %indvars.iv125, 1
  %exitcond130.not = icmp eq i64 %indvars.iv.next126, %wide.trip.count129
  br i1 %exitcond130.not, label %.preheader93, label %.preheader94.us, !llvm.loop !13

69:                                               ; preds = %0
  %70 = landingpad { ptr, i32 }
          cleanup
  br label %73

71:                                               ; preds = %11
  %72 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorISt6vectorIiSaIiEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  br label %73

73:                                               ; preds = %71, %69
  %.pn = phi { ptr, i32 } [ %72, %71 ], [ %70, %69 ]
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #5
  resume { ptr, i32 } %.pn

.preheader93:                                     ; preds = %._crit_edge.us101
  br i1 %13, label %.preheader92.us.preheader, label %._crit_edge104.thread

.preheader92.us.preheader:                        ; preds = %.preheader93
  %smax134 = call i32 @llvm.smax.i32(i32 %9, i32 2)
  %smax140 = call i32 @llvm.smax.i32(i32 %9, i32 1)
  %wide.trip.count141 = zext nneg i32 %smax140 to i64
  %wide.trip.count135 = zext nneg i32 %smax134 to i64
  br label %.preheader92.us

.preheader92.us:                                  ; preds = %.preheader92.us.preheader, %._crit_edge.us105
  %indvars.iv137 = phi i64 [ 0, %.preheader92.us.preheader ], [ %indvars.iv.next138, %._crit_edge.us105 ]
  br label %74

74:                                               ; preds = %.preheader92.us, %74
  %indvars.iv131 = phi i64 [ 1, %.preheader92.us ], [ %indvars.iv.next132, %74 ]
  %75 = add nsw i64 %indvars.iv131, -1
  %76 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %75) #5
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %indvars.iv137) #5
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %79 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv131) #5
  %80 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %indvars.iv137) #5
  %81 = load i32, ptr %80, align 4, !tbaa !5
  %82 = add nsw i32 %81, %78
  store i32 %82, ptr %80, align 4, !tbaa !5
  %indvars.iv.next132 = add nuw nsw i64 %indvars.iv131, 1
  %exitcond136.not = icmp eq i64 %indvars.iv.next132, %wide.trip.count135
  br i1 %exitcond136.not, label %._crit_edge.us105, label %74, !llvm.loop !14

._crit_edge.us105:                                ; preds = %74
  %indvars.iv.next138 = add nuw nsw i64 %indvars.iv137, 1
  %exitcond142.not = icmp eq i64 %indvars.iv.next138, %wide.trip.count141
  br i1 %exitcond142.not, label %._crit_edge104, label %.preheader92.us, !llvm.loop !15

._crit_edge104.thread:                            ; preds = %.preheader93, %.preheader95, %12
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #5
  br label %._crit_edge110

._crit_edge104:                                   ; preds = %._crit_edge.us105
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #5
  store i32 0, ptr %5, align 4, !tbaa !5
  br i1 %13, label %.preheader91.preheader, label %._crit_edge110

.preheader91.preheader:                           ; preds = %._crit_edge104
  %83 = load i32, ptr @K, align 4, !tbaa !5
  %84 = icmp sgt i32 %8, 0
  br label %.preheader91

.preheader91:                                     ; preds = %.preheader91.preheader, %._crit_edge
  %85 = phi i32 [ %89, %._crit_edge ], [ 0, %.preheader91.preheader ]
  %86 = phi i32 [ %90, %._crit_edge ], [ %83, %.preheader91.preheader ]
  %.077109 = phi i32 [ %91, %._crit_edge ], [ %83, %.preheader91.preheader ]
  %87 = add nsw i32 %86, %8
  br i1 %84, label %.lr.ph, label %._crit_edge

._crit_edge110:                                   ; preds = %._crit_edge, %._crit_edge104.thread, %._crit_edge104
  %88 = phi i32 [ 0, %._crit_edge104 ], [ 0, %._crit_edge104.thread ], [ %89, %._crit_edge ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #5
  call void @_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %1) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #5
  ret i32 %88

._crit_edge:                                      ; preds = %95, %.preheader91
  %.pre-phi = phi i32 [ %87, %.preheader91 ], [ %100, %95 ]
  %89 = phi i32 [ %85, %.preheader91 ], [ %97, %95 ]
  %90 = phi i32 [ %86, %.preheader91 ], [ %99, %95 ]
  %91 = add nsw i32 %.077109, 1
  %92 = icmp slt i32 %91, %.pre-phi
  br i1 %92, label %.preheader91, label %._crit_edge110, !llvm.loop !16

.lr.ph:                                           ; preds = %.preheader91, %95
  %.pre145 = phi i32 [ %99, %95 ], [ %86, %.preheader91 ]
  %.076108 = phi i32 [ %98, %95 ], [ %86, %.preheader91 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #5
  store i32 0, ptr %6, align 4, !tbaa !5
  %93 = icmp sgt i32 %.076108, -1
  %.not89.4 = icmp slt i32 %.076108, %9
  %or.cond90.4 = select i1 %93, i1 %.not89.4, i1 false
  %94 = zext nneg i32 %.076108 to i64
  br label %102

95:                                               ; preds = %.loopexit
  %96 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %97 = load i32, ptr %96, align 4, !tbaa !5
  store i32 %97, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #5
  %98 = add nsw i32 %.076108, 1
  %99 = load i32, ptr @K, align 4, !tbaa !5
  %100 = add nsw i32 %99, %8
  %101 = icmp slt i32 %98, %100
  br i1 %101, label %.lr.ph, label %._crit_edge, !llvm.loop !17

102:                                              ; preds = %.lr.ph, %.loopexit
  %103 = phi i32 [ %.pre145, %.lr.ph ], [ %221, %.loopexit ]
  %.075107 = phi i32 [ -4, %.lr.ph ], [ %222, %.loopexit ]
  %104 = mul nsw i32 %103, %.075107
  %105 = add nsw i32 %104, %.077109
  %106 = icmp sgt i32 %105, -1
  %.not = icmp slt i32 %105, %9
  %or.cond = select i1 %106, i1 %.not, i1 false
  br i1 %or.cond, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %102
  %107 = zext nneg i32 %105 to i64
  %108 = shl i32 %103, 2
  %109 = sub i32 %.076108, %108
  %110 = icmp sgt i32 %109, -1
  %.not89 = icmp slt i32 %109, %9
  %or.cond90 = select i1 %110, i1 %.not89, i1 false
  %111 = and i32 %.075107, 1
  %112 = icmp eq i32 %111, 0
  %or.cond161 = and i1 %or.cond90, %112
  br i1 %or.cond161, label %113, label %120

113:                                              ; preds = %.preheader
  %114 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %115 = zext nneg i32 %109 to i64
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %114, i64 noundef %115) #5
  %117 = load i32, ptr %116, align 4, !tbaa !5
  %118 = load i32, ptr %6, align 4, !tbaa !5
  %119 = add nsw i32 %118, %117
  store i32 %119, ptr %6, align 4, !tbaa !5
  %.pre146 = load i32, ptr @K, align 4, !tbaa !5
  br label %120

120:                                              ; preds = %113, %.preheader
  %121 = phi i32 [ %.pre146, %113 ], [ %103, %.preheader ]
  %122 = mul nsw i32 %121, -3
  %123 = add nsw i32 %122, %.076108
  %124 = icmp slt i32 %123, 0
  %.not89.1 = icmp sge i32 %123, %9
  %or.cond90.1.not175 = select i1 %124, i1 true, i1 %.not89.1
  %125 = and i32 %.075107, 1
  %.not153 = icmp eq i32 %125, 0
  %or.cond162 = or i1 %or.cond90.1.not175, %.not153
  br i1 %or.cond162, label %133, label %126

126:                                              ; preds = %120
  %127 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %128 = zext nneg i32 %123 to i64
  %129 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %127, i64 noundef %128) #5
  %130 = load i32, ptr %129, align 4, !tbaa !5
  %131 = load i32, ptr %6, align 4, !tbaa !5
  %132 = add nsw i32 %131, %130
  store i32 %132, ptr %6, align 4, !tbaa !5
  %.pre147 = load i32, ptr @K, align 4, !tbaa !5
  br label %133

133:                                              ; preds = %126, %120
  %134 = phi i32 [ %.pre147, %126 ], [ %121, %120 ]
  %135 = shl i32 %134, 1
  %136 = sub i32 %.076108, %135
  %137 = icmp sgt i32 %136, -1
  %.not89.2 = icmp slt i32 %136, %9
  %or.cond90.2 = select i1 %137, i1 %.not89.2, i1 false
  %138 = and i32 %.075107, 1
  %139 = icmp eq i32 %138, 0
  %or.cond164 = and i1 %or.cond90.2, %139
  br i1 %or.cond164, label %140, label %147

140:                                              ; preds = %133
  %141 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %142 = zext nneg i32 %136 to i64
  %143 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %141, i64 noundef %142) #5
  %144 = load i32, ptr %143, align 4, !tbaa !5
  %145 = load i32, ptr %6, align 4, !tbaa !5
  %146 = add nsw i32 %145, %144
  store i32 %146, ptr %6, align 4, !tbaa !5
  %.pre148 = load i32, ptr @K, align 4, !tbaa !5
  br label %147

147:                                              ; preds = %140, %133
  %148 = phi i32 [ %.pre148, %140 ], [ %134, %133 ]
  %149 = sub i32 %.076108, %148
  %150 = icmp slt i32 %149, 0
  %.not89.3 = icmp sge i32 %149, %9
  %or.cond90.3.not177 = select i1 %150, i1 true, i1 %.not89.3
  %151 = and i32 %.075107, 1
  %.not154 = icmp eq i32 %151, 0
  %or.cond165 = or i1 %or.cond90.3.not177, %.not154
  br i1 %or.cond165, label %159, label %152

152:                                              ; preds = %147
  %153 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %154 = zext nneg i32 %149 to i64
  %155 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %153, i64 noundef %154) #5
  %156 = load i32, ptr %155, align 4, !tbaa !5
  %157 = load i32, ptr %6, align 4, !tbaa !5
  %158 = add nsw i32 %157, %156
  store i32 %158, ptr %6, align 4, !tbaa !5
  br label %159

159:                                              ; preds = %152, %147
  %160 = and i32 %.075107, 1
  %161 = icmp eq i32 %160, 0
  %or.cond167 = and i1 %or.cond90.4, %161
  br i1 %or.cond167, label %162, label %168

162:                                              ; preds = %159
  %163 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %164 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %163, i64 noundef %94) #5
  %165 = load i32, ptr %164, align 4, !tbaa !5
  %166 = load i32, ptr %6, align 4, !tbaa !5
  %167 = add nsw i32 %166, %165
  store i32 %167, ptr %6, align 4, !tbaa !5
  br label %168

168:                                              ; preds = %162, %159
  %169 = load i32, ptr @K, align 4, !tbaa !5
  %170 = add nsw i32 %169, %.076108
  %171 = icmp slt i32 %170, 0
  %.not89.5 = icmp sge i32 %170, %9
  %or.cond90.5.not179 = select i1 %171, i1 true, i1 %.not89.5
  %172 = and i32 %.075107, 1
  %.not155 = icmp eq i32 %172, 0
  %or.cond168 = or i1 %or.cond90.5.not179, %.not155
  br i1 %or.cond168, label %180, label %173

173:                                              ; preds = %168
  %174 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %175 = zext nneg i32 %170 to i64
  %176 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %174, i64 noundef %175) #5
  %177 = load i32, ptr %176, align 4, !tbaa !5
  %178 = load i32, ptr %6, align 4, !tbaa !5
  %179 = add nsw i32 %178, %177
  store i32 %179, ptr %6, align 4, !tbaa !5
  %.pre149 = load i32, ptr @K, align 4, !tbaa !5
  br label %180

180:                                              ; preds = %173, %168
  %181 = phi i32 [ %.pre149, %173 ], [ %169, %168 ]
  %182 = shl nsw i32 %181, 1
  %183 = add nsw i32 %182, %.076108
  %184 = icmp sgt i32 %183, -1
  %.not89.6 = icmp slt i32 %183, %9
  %or.cond90.6 = select i1 %184, i1 %.not89.6, i1 false
  %185 = and i32 %.075107, 1
  %186 = icmp eq i32 %185, 0
  %or.cond170 = and i1 %or.cond90.6, %186
  br i1 %or.cond170, label %187, label %194

187:                                              ; preds = %180
  %188 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %189 = zext nneg i32 %183 to i64
  %190 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %188, i64 noundef %189) #5
  %191 = load i32, ptr %190, align 4, !tbaa !5
  %192 = load i32, ptr %6, align 4, !tbaa !5
  %193 = add nsw i32 %192, %191
  store i32 %193, ptr %6, align 4, !tbaa !5
  %.pre150 = load i32, ptr @K, align 4, !tbaa !5
  br label %194

194:                                              ; preds = %187, %180
  %195 = phi i32 [ %.pre150, %187 ], [ %181, %180 ]
  %196 = mul nsw i32 %195, 3
  %197 = add nsw i32 %196, %.076108
  %198 = icmp slt i32 %197, 0
  %.not89.7 = icmp sge i32 %197, %9
  %or.cond90.7.not181 = select i1 %198, i1 true, i1 %.not89.7
  %199 = and i32 %.075107, 1
  %.not156 = icmp eq i32 %199, 0
  %or.cond171 = or i1 %or.cond90.7.not181, %.not156
  br i1 %or.cond171, label %207, label %200

200:                                              ; preds = %194
  %201 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %202 = zext nneg i32 %197 to i64
  %203 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %201, i64 noundef %202) #5
  %204 = load i32, ptr %203, align 4, !tbaa !5
  %205 = load i32, ptr %6, align 4, !tbaa !5
  %206 = add nsw i32 %205, %204
  store i32 %206, ptr %6, align 4, !tbaa !5
  %.pre151 = load i32, ptr @K, align 4, !tbaa !5
  br label %207

207:                                              ; preds = %200, %194
  %208 = phi i32 [ %.pre151, %200 ], [ %195, %194 ]
  %209 = shl nsw i32 %208, 2
  %210 = add nsw i32 %209, %.076108
  %211 = icmp sgt i32 %210, -1
  %.not89.8 = icmp slt i32 %210, %9
  %or.cond90.8 = select i1 %211, i1 %.not89.8, i1 false
  %212 = and i32 %.075107, 1
  %213 = icmp eq i32 %212, 0
  %or.cond173 = and i1 %or.cond90.8, %213
  br i1 %or.cond173, label %214, label %.loopexit

214:                                              ; preds = %207
  %215 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %107) #5
  %216 = zext nneg i32 %210 to i64
  %217 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %215, i64 noundef %216) #5
  %218 = load i32, ptr %217, align 4, !tbaa !5
  %219 = load i32, ptr %6, align 4, !tbaa !5
  %220 = add nsw i32 %219, %218
  store i32 %220, ptr %6, align 4, !tbaa !5
  %.pre = load i32, ptr @K, align 4, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %207, %214, %102
  %221 = phi i32 [ %103, %102 ], [ %.pre, %214 ], [ %208, %207 ]
  %222 = add nsw i32 %.075107, 1
  %exitcond144.not = icmp eq i32 %222, 5
  br i1 %exitcond144.not, label %95, label %102, !llvm.loop !18
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaISt6vectorIiSaIiEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IiSaIiEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorISt6vectorIiSaIiEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass