; LLVM IR from VAR-solutions/Algorithms :: Dynamic Programming/Cutting Rod/cpp (cutting_rod)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z23extended_bottom_cut_rodSt6vectorIiSaIiEEiRS1_S2_(ptr noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 1, ptr %9, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %71, %4
  %14 = load i32, ptr %9, align 4, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = add nsw i32 %15, 1
  %17 = icmp slt i32 %14, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %13
  store i32 2, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %74

19:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 -1000000, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 1, ptr %12, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %62, %19
  %21 = load i32, ptr %12, align 4, !tbaa !9
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = add nsw i32 %22, 1
  %24 = icmp slt i32 %21, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %20
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %65

26:                                               ; preds = %20
  %27 = load i32, ptr %11, align 4, !tbaa !9
  %28 = load i32, ptr %12, align 4, !tbaa !9
  %29 = sub nsw i32 %28, 1
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %30) #2
  %32 = load i32, ptr %31, align 4, !tbaa !9
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = load i32, ptr %12, align 4, !tbaa !9
  %36 = sub nsw i32 %34, %35
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %37) #2
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = add nsw i32 %32, %39
  %41 = icmp slt i32 %27, %40
  br i1 %41, label %42, label %61

42:                                               ; preds = %26
  %43 = load i32, ptr %12, align 4, !tbaa !9
  %44 = sub nsw i32 %43, 1
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !9
  %48 = load ptr, ptr %7, align 8, !tbaa !5
  %49 = load i32, ptr %9, align 4, !tbaa !9
  %50 = load i32, ptr %12, align 4, !tbaa !9
  %51 = sub nsw i32 %49, %50
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %52) #2
  %54 = load i32, ptr %53, align 4, !tbaa !9
  %55 = add nsw i32 %47, %54
  store i32 %55, ptr %11, align 4, !tbaa !9
  %56 = load i32, ptr %12, align 4, !tbaa !9
  %57 = load ptr, ptr %8, align 8, !tbaa !5
  %58 = load i32, ptr %9, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #2
  store i32 %56, ptr %60, align 4, !tbaa !9
  br label %61

61:                                               ; preds = %42, %26
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %12, align 4, !tbaa !9
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %12, align 4, !tbaa !9
  br label %20, !llvm.loop !11

65:                                               ; preds = %25
  %66 = load i32, ptr %11, align 4, !tbaa !9
  %67 = load ptr, ptr %7, align 8, !tbaa !5
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #2
  store i32 %66, ptr %70, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  br label %71

71:                                               ; preds = %65
  %72 = load i32, ptr %9, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %9, align 4, !tbaa !9
  br label %13, !llvm.loop !13

74:                                               ; preds = %18
  %75 = load ptr, ptr %7, align 8, !tbaa !5
  %76 = load i32, ptr %6, align 4, !tbaa !9
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %77) #2
  %79 = load i32, ptr %78, align 4, !tbaa !9
  ret i32 %79
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z23extended_bottom_cut_rodSt6vectorIiSaIiEEiRS1_S2_(ptr noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3) local_unnamed_addr #0 {
  %.not28 = icmp slt i32 %1, 1
  br i1 %.not28, label %._crit_edge, label %.preheader.preheader

.preheader.preheader:                             ; preds = %4
  %5 = add nuw i32 %1, 1
  %wide.trip.count40 = zext i32 %5 to i64
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %9
  %indvars.iv35 = phi i64 [ 1, %.preheader.preheader ], [ %indvars.iv.next36, %9 ]
  %indvars.iv33 = phi i64 [ 2, %.preheader.preheader ], [ %indvars.iv.next34, %9 ]
  br label %11

._crit_edge:                                      ; preds = %9, %4
  %6 = sext i32 %1 to i64
  %7 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %6) #1
  %8 = load i32, ptr %7, align 4, !tbaa !5
  ret i32 %8

9:                                                ; preds = %28
  %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv35) #1
  store i32 %.1, ptr %10, align 4, !tbaa !5
  %indvars.iv.next34 = add nuw nsw i64 %indvars.iv33, 1
  %exitcond41.not = icmp eq i64 %indvars.iv.next36, %wide.trip.count40
  br i1 %exitcond41.not, label %._crit_edge, label %.preheader, !llvm.loop !9

11:                                               ; preds = %.preheader, %28
  %indvars.iv = phi i64 [ 1, %.preheader ], [ %indvars.iv.next, %28 ]
  %.02226 = phi i32 [ -1000000, %.preheader ], [ %.1, %28 ]
  %12 = add nsw i64 %indvars.iv, -1
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = sub nsw i64 %indvars.iv35, %indvars.iv
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %15) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = add nsw i32 %17, %14
  %19 = icmp slt i32 %.02226, %18
  br i1 %19, label %20, label %28

20:                                               ; preds = %11
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %12) #1
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %15) #1
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = add nsw i32 %24, %22
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv35) #1
  %27 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %27, ptr %26, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %11, %20
  %.1 = phi i32 [ %25, %20 ], [ %.02226, %11 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %indvars.iv33
  br i1 %exitcond.not, label %9, label %11, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass