; LLVM IR from afrozchakure/Competitive-Programming-Solutions :: CodeForces/CandiesAndTwoSisters.ll (Z4factii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z4factii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %6 = load i32, ptr %4, align 4, !tbaa !5
  %7 = load i32, ptr %5, align 4, !tbaa !5
  %8 = icmp eq i32 %6, %7
  br i1 %8, label %9, label %10

9:                                                ; preds = %2
  store i64 1, ptr %3, align 8
  br label %22

10:                                               ; preds = %2
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = icmp sle i32 %11, 1
  br i1 %12, label %13, label %14

13:                                               ; preds = %10
  store i64 1, ptr %3, align 8
  br label %22

14:                                               ; preds = %10
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = sub nsw i32 %17, 1
  %19 = load i32, ptr %5, align 4, !tbaa !5
  %20 = call noundef i64 @_Z4factii(i32 noundef %18, i32 noundef %19)
  %21 = mul i64 %16, %20
  store i64 %21, ptr %3, align 8
  br label %22

22:                                               ; preds = %14, %13, %9
  %23 = load i64, ptr %3, align 8
  ret i64 %23
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i64 @_Z4factii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq i32 %0, %1
  %4 = icmp slt i32 %0, 2
  %or.cond10 = or i1 %3, %4
  br i1 %or.cond10, label %tailrecurse._crit_edge, label %tailrecurse.preheader

tailrecurse.preheader:                            ; preds = %2
  %5 = zext nneg i32 %0 to i64
  %6 = zext i32 %1 to i64
  %7 = xor i64 %6, -1
  %8 = add nsw i64 %7, %5
  %9 = add nsw i64 %5, -2
  %umin14 = tail call i64 @llvm.umin.i64(i64 %8, i64 %9)
  %10 = add nsw i64 %umin14, 1
  %min.iters.check = icmp ult i64 %10, 4
  br i1 %min.iters.check, label %tailrecurse.preheader17, label %vector.ph

vector.ph:                                        ; preds = %tailrecurse.preheader
  %n.vec = and i64 %10, -4
  %ind.end = sub i64 %5, %n.vec
  %.splatinsert = insertelement <2 x i64> poison, i64 %5, i64 0
  %.splat = shufflevector <2 x i64> %.splatinsert, <2 x i64> poison, <2 x i32> zeroinitializer
  %induction = add nsw <2 x i64> %.splat, <i64 0, i64 -1>
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.ind = phi <2 x i64> [ %induction, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %vec.phi = phi <2 x i64> [ <i64 1, i64 1>, %vector.ph ], [ %11, %vector.body ]
  %vec.phi16 = phi <2 x i64> [ <i64 1, i64 1>, %vector.ph ], [ %12, %vector.body ]
  %step.add = add <2 x i64> %vec.ind, <i64 -2, i64 -2>
  %11 = mul <2 x i64> %vec.phi, %vec.ind
  %12 = mul <2 x i64> %vec.phi16, %step.add
  %index.next = add nuw i64 %index, 4
  %vec.ind.next = add <2 x i64> %vec.ind, <i64 -4, i64 -4>
  %13 = icmp eq i64 %index.next, %n.vec
  br i1 %13, label %middle.block, label %vector.body, !llvm.loop !5

middle.block:                                     ; preds = %vector.body
  %bin.rdx = mul <2 x i64> %12, %11
  %14 = tail call i64 @llvm.vector.reduce.mul.v2i64(<2 x i64> %bin.rdx)
  %cmp.n = icmp eq i64 %10, %n.vec
  br i1 %cmp.n, label %tailrecurse._crit_edge, label %tailrecurse.preheader17

tailrecurse.preheader17:                          ; preds = %middle.block, %tailrecurse.preheader
  %indvars.iv.ph = phi i64 [ %5, %tailrecurse.preheader ], [ %ind.end, %middle.block ]
  %accumulator.tr11.ph = phi i64 [ 1, %tailrecurse.preheader ], [ %14, %middle.block ]
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.preheader17, %tailrecurse
  %indvars.iv = phi i64 [ %indvars.iv.next, %tailrecurse ], [ %indvars.iv.ph, %tailrecurse.preheader17 ]
  %accumulator.tr11 = phi i64 [ %15, %tailrecurse ], [ %accumulator.tr11.ph, %tailrecurse.preheader17 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %15 = mul i64 %accumulator.tr11, %indvars.iv
  %16 = icmp eq i64 %indvars.iv.next, %6
  %17 = icmp ult i64 %indvars.iv, 3
  %or.cond = or i1 %16, %17
  br i1 %or.cond, label %tailrecurse._crit_edge, label %tailrecurse, !llvm.loop !8

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %middle.block, %2
  %accumulator.tr.lcssa = phi i64 [ 1, %2 ], [ %14, %middle.block ], [ %15, %tailrecurse ]
  ret i64 %accumulator.tr.lcssa
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.vector.reduce.mul.v2i64(<2 x i64>) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7}
!6 = !{!"llvm.loop.isvectorized", i32 1}
!7 = !{!"llvm.loop.unroll.runtime.disable"}
!8 = distinct !{!8, !7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass