; LLVM IR from xirc/cp-algorithm :: atcoder/abc008/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@C = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef x86_fp80 @_Z5solvev() #0 {
  %1 = alloca x86_fp80, align 16
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca x86_fp80, align 16
  call void @llvm.lifetime.start.p0(i64 16, ptr %1) #2
  store x86_fp80 0xK00000000000000000000, ptr %1, align 16, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 0, ptr %2, align 4, !tbaa !9
  br label %7

7:                                                ; preds = %53, %0
  %8 = load i32, ptr %2, align 4, !tbaa !9
  %9 = load i32, ptr @N, align 4, !tbaa !9
  %10 = icmp slt i32 %8, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %7
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  br label %56

12:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %38, %12
  %14 = load i32, ptr %5, align 4, !tbaa !9
  %15 = load i32, ptr @N, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %41

18:                                               ; preds = %13
  %19 = load i32, ptr %2, align 4, !tbaa !9
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = icmp eq i32 %19, %20
  br i1 %21, label %22, label %23

22:                                               ; preds = %18
  br label %38

23:                                               ; preds = %18
  %24 = load i32, ptr %2, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = load i32, ptr %5, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %29) #2
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = srem i32 %27, %31
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %37

34:                                               ; preds = %23
  %35 = load i32, ptr %4, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %4, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %34, %23
  br label %38

38:                                               ; preds = %37, %22
  %39 = load i32, ptr %5, align 4, !tbaa !9
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %5, align 4, !tbaa !9
  br label %13, !llvm.loop !11

41:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 16, ptr %6) #2
  %42 = load i32, ptr %4, align 4, !tbaa !9
  %43 = sdiv i32 %42, 2
  %44 = add nsw i32 %43, 1
  %45 = sitofp i32 %44 to x86_fp80
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  %48 = sitofp i32 %47 to x86_fp80
  %49 = fdiv x86_fp80 %45, %48
  store x86_fp80 %49, ptr %6, align 16, !tbaa !5
  %50 = load x86_fp80, ptr %6, align 16, !tbaa !5
  %51 = load x86_fp80, ptr %1, align 16, !tbaa !5
  %52 = fadd x86_fp80 %51, %50
  store x86_fp80 %52, ptr %1, align 16, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 16, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %53

53:                                               ; preds = %41
  %54 = load i32, ptr %2, align 4, !tbaa !9
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %2, align 4, !tbaa !9
  br label %7, !llvm.loop !13

56:                                               ; preds = %11
  %57 = load x86_fp80, ptr %1, align 16, !tbaa !5
  store i32 1, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 16, ptr %1) #2
  ret x86_fp80 %57
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@C = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef x86_fp80 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 0
  br i1 %2, label %.preheader, label %._crit_edge20

.preheader:                                       ; preds = %0, %._crit_edge
  %3 = phi i32 [ %5, %._crit_edge ], [ %1, %0 ]
  %indvars.iv25 = phi i64 [ %indvars.iv.next26, %._crit_edge ], [ 0, %0 ]
  %.019 = phi x86_fp80 [ %12, %._crit_edge ], [ 0xK00000000000000000000, %0 ]
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

._crit_edge20:                                    ; preds = %._crit_edge, %0
  %.0.lcssa = phi x86_fp80 [ 0xK00000000000000000000, %0 ], [ %12, %._crit_edge ]
  ret x86_fp80 %.0.lcssa

._crit_edge:                                      ; preds = %26, %.preheader
  %5 = phi i32 [ %3, %.preheader ], [ %27, %26 ]
  %.015.lcssa = phi i32 [ 0, %.preheader ], [ %.1, %26 ]
  %6 = sdiv i32 %.015.lcssa, 2
  %7 = add nsw i32 %6, 1
  %8 = sitofp i32 %7 to x86_fp80
  %9 = add nsw i32 %.015.lcssa, 1
  %10 = sitofp i32 %9 to x86_fp80
  %11 = fdiv x86_fp80 %8, %10
  %12 = fadd x86_fp80 %.019, %11
  %indvars.iv.next26 = add nuw nsw i64 %indvars.iv25, 1
  %13 = sext i32 %5 to i64
  %14 = icmp slt i64 %indvars.iv.next26, %13
  br i1 %14, label %.preheader, label %._crit_edge20, !llvm.loop !9

.lr.ph:                                           ; preds = %.preheader, %26
  %15 = phi i32 [ %27, %26 ], [ %3, %.preheader ]
  %16 = phi i32 [ %28, %26 ], [ %3, %.preheader ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %26 ], [ 0, %.preheader ]
  %.01516 = phi i32 [ %.1, %26 ], [ 0, %.preheader ]
  %17 = icmp eq i64 %indvars.iv25, %indvars.iv
  br i1 %17, label %26, label %18

18:                                               ; preds = %.lr.ph
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv25) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @C, i64 noundef %indvars.iv) #1
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = srem i32 %20, %22
  %24 = icmp eq i32 %23, 0
  %25 = zext i1 %24 to i32
  %spec.select = add nsw i32 %.01516, %25
  %.pre = load i32, ptr @N, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %18, %.lr.ph
  %27 = phi i32 [ %15, %.lr.ph ], [ %.pre, %18 ]
  %28 = phi i32 [ %16, %.lr.ph ], [ %.pre, %18 ]
  %.1 = phi i32 [ %.01516, %.lr.ph ], [ %spec.select, %18 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %29 = sext i32 %28 to i64
  %30 = icmp slt i64 %indvars.iv.next, %29
  br i1 %30, label %.lr.ph, label %._crit_edge, !llvm.loop !12
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass