; LLVM IR from xirc/cp-algorithm :: aoj/ITP1/ITP11D/main.ll (Z14any_equivalentRKSt6vectorI4DiceIiESaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z13is_equivalentRK4DiceIiES2_(ptr noundef nonnull align 4 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(48)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z14any_equivalentRKSt6vectorI4DiceIiESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) #0 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %7

7:                                                ; preds = %42, %1
  %8 = load i32, ptr %4, align 4, !tbaa !9
  %9 = sext i32 %8 to i64
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = call noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #3
  %12 = icmp ult i64 %9, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %7
  store i32 2, ptr %5, align 4
  br label %45

14:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %15 = load i32, ptr %4, align 4, !tbaa !9
  %16 = add nsw i32 %15, 1
  store i32 %16, ptr %6, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %36, %14
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = call noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #3
  %22 = icmp ult i64 %19, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %17
  store i32 5, ptr %5, align 4
  br label %39

24:                                               ; preds = %17
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load i32, ptr %4, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 4 dereferenceable(48) ptr @_ZNKSt6vectorI4DiceIiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27) #3
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 4 dereferenceable(48) ptr @_ZNKSt6vectorI4DiceIiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #3
  %33 = call noundef zeroext i1 @_Z13is_equivalentRK4DiceIiES2_(ptr noundef nonnull align 4 dereferenceable(48) %28, ptr noundef nonnull align 4 dereferenceable(48) %32)
  br i1 %33, label %34, label %35

34:                                               ; preds = %24
  store i1 true, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %39

35:                                               ; preds = %24
  br label %36

36:                                               ; preds = %35
  %37 = load i32, ptr %6, align 4, !tbaa !9
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr %6, align 4, !tbaa !9
  br label %17, !llvm.loop !11

39:                                               ; preds = %34, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %40 = load i32, ptr %5, align 4
  switch i32 %40, label %45 [
    i32 5, label %41
  ]

41:                                               ; preds = %39
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %4, align 4, !tbaa !9
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %4, align 4, !tbaa !9
  br label %7, !llvm.loop !13

45:                                               ; preds = %39, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %46 = load i32, ptr %5, align 4
  switch i32 %46, label %50 [
    i32 2, label %47
    i32 1, label %48
  ]

47:                                               ; preds = %45
  store i1 false, ptr %2, align 1
  br label %48

48:                                               ; preds = %47, %45
  %49 = load i1, ptr %2, align 1
  ret i1 %49

50:                                               ; preds = %45
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(48) ptr @_ZNKSt6vectorI4DiceIiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z13is_equivalentRK4DiceIiES2_(ptr noundef nonnull align 4 dereferenceable(48), ptr noundef nonnull align 4 dereferenceable(48)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z14any_equivalentRKSt6vectorI4DiceIiESaIS1_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %.not2026.not = icmp eq i64 %2, 0
  br i1 %.not2026.not, label %.thread, label %.lr.ph29

.loopexit:                                        ; preds = %5, %.lr.ph29
  %3 = tail call noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %.not20 = icmp ugt i64 %3, %indvars.iv.next36
  %indvars.iv.next = add i64 %indvars.iv, 1
  br i1 %.not20, label %.lr.ph29, label %.thread

.lr.ph29:                                         ; preds = %1, %.loopexit
  %indvars.iv35 = phi i64 [ %indvars.iv.next36, %.loopexit ], [ 0, %1 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %.loopexit ], [ 1, %1 ]
  %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1
  %4 = tail call noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %.not24 = icmp ugt i64 %4, %indvars.iv.next36
  br i1 %.not24, label %.lr.ph, label %.loopexit

5:                                                ; preds = %.lr.ph
  %indvars.iv.next33 = add nuw nsw i64 %indvars.iv32, 1
  %6 = tail call noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %.not = icmp ugt i64 %6, %indvars.iv.next33
  br i1 %.not, label %.lr.ph, label %.loopexit, !llvm.loop !5

.lr.ph:                                           ; preds = %.lr.ph29, %5
  %indvars.iv32 = phi i64 [ %indvars.iv.next33, %5 ], [ %indvars.iv, %.lr.ph29 ]
  %7 = tail call noundef nonnull align 4 dereferenceable(48) ptr @_ZNKSt6vectorI4DiceIiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv35) #2
  %8 = tail call noundef nonnull align 4 dereferenceable(48) ptr @_ZNKSt6vectorI4DiceIiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv32) #2
  %9 = tail call noundef zeroext i1 @_Z13is_equivalentRK4DiceIiES2_(ptr noundef nonnull align 4 dereferenceable(48) %7, ptr noundef nonnull align 4 dereferenceable(48) %8)
  br i1 %9, label %.thread, label %5

.thread:                                          ; preds = %.loopexit, %.lr.ph, %1
  %.not2023 = phi i1 [ false, %1 ], [ true, %.lr.ph ], [ false, %.loopexit ]
  ret i1 %.not2023
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI4DiceIiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(48) ptr @_ZNKSt6vectorI4DiceIiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass