; LLVM IR from xirc/cp-algorithm :: atcoder/abc190/F/main.ll (Z5mergeRKSt6vectorIiSaIiEES3_RS1_Rl)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5mergeRKSt6vectorIiSaIiEES3_RS1_Rl(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %70, %4
  %13 = load i32, ptr %10, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15) #2
  %17 = icmp ult i64 %14, %16
  br i1 %17, label %18, label %24

18:                                               ; preds = %12
  %19 = load i32, ptr %11, align 4, !tbaa !9
  %20 = sext i32 %19 to i64
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #2
  %23 = icmp ult i64 %20, %22
  br label %24

24:                                               ; preds = %18, %12
  %25 = phi i1 [ false, %12 ], [ %23, %18 ]
  br i1 %25, label %26, label %71

26:                                               ; preds = %24
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %29) #2
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %34) #2
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = icmp sle i32 %31, %36
  br i1 %37, label %38, label %50

38:                                               ; preds = %26
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = load i32, ptr %10, align 4, !tbaa !9
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %10, align 4, !tbaa !9
  %42 = sext i32 %40 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %42) #2
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = load ptr, ptr %7, align 8, !tbaa !5
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %9, align 4, !tbaa !9
  %48 = sext i32 %46 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %48) #2
  store i32 %44, ptr %49, align 4, !tbaa !9
  br label %70

50:                                               ; preds = %26
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %51) #2
  %53 = load i32, ptr %10, align 4, !tbaa !9
  %54 = sext i32 %53 to i64
  %55 = sub i64 %52, %54
  %56 = load ptr, ptr %8, align 8, !tbaa !5
  %57 = load i64, ptr %56, align 8, !tbaa !11
  %58 = add i64 %57, %55
  store i64 %58, ptr %56, align 8, !tbaa !11
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = load i32, ptr %11, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %11, align 4, !tbaa !9
  %62 = sext i32 %60 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %62) #2
  %64 = load i32, ptr %63, align 4, !tbaa !9
  %65 = load ptr, ptr %7, align 8, !tbaa !5
  %66 = load i32, ptr %9, align 4, !tbaa !9
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %9, align 4, !tbaa !9
  %68 = sext i32 %66 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %68) #2
  store i32 %64, ptr %69, align 4, !tbaa !9
  br label %70

70:                                               ; preds = %50, %38
  br label %12, !llvm.loop !13

71:                                               ; preds = %24
  br label %72

72:                                               ; preds = %78, %71
  %73 = load i32, ptr %10, align 4, !tbaa !9
  %74 = sext i32 %73 to i64
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %75) #2
  %77 = icmp ult i64 %74, %76
  br i1 %77, label %78, label %90

78:                                               ; preds = %72
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = load i32, ptr %10, align 4, !tbaa !9
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %10, align 4, !tbaa !9
  %82 = sext i32 %80 to i64
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %82) #2
  %84 = load i32, ptr %83, align 4, !tbaa !9
  %85 = load ptr, ptr %7, align 8, !tbaa !5
  %86 = load i32, ptr %9, align 4, !tbaa !9
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %9, align 4, !tbaa !9
  %88 = sext i32 %86 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %88) #2
  store i32 %84, ptr %89, align 4, !tbaa !9
  br label %72, !llvm.loop !15

90:                                               ; preds = %72
  br label %91

91:                                               ; preds = %97, %90
  %92 = load i32, ptr %11, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = load ptr, ptr %6, align 8, !tbaa !5
  %95 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %94) #2
  %96 = icmp ult i64 %93, %95
  br i1 %96, label %97, label %109

97:                                               ; preds = %91
  %98 = load ptr, ptr %6, align 8, !tbaa !5
  %99 = load i32, ptr %11, align 4, !tbaa !9
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %11, align 4, !tbaa !9
  %101 = sext i32 %99 to i64
  %102 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %101) #2
  %103 = load i32, ptr %102, align 4, !tbaa !9
  %104 = load ptr, ptr %7, align 8, !tbaa !5
  %105 = load i32, ptr %9, align 4, !tbaa !9
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %9, align 4, !tbaa !9
  %107 = sext i32 %105 to i64
  %108 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %104, i64 noundef %107) #2
  store i32 %103, ptr %108, align 4, !tbaa !9
  br label %91, !llvm.loop !16

109:                                              ; preds = %91
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5mergeRKSt6vectorIiSaIiEES3_RS1_Rl(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr nocapture noundef nonnull align 8 dereferenceable(8) %3) local_unnamed_addr #0 {
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not56 = icmp eq i64 %5, 0
  br i1 %.not56, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %4, %25
  %indvars.iv = phi i64 [ %indvars.iv.next, %25 ], [ 0, %4 ]
  %6 = phi i64 [ %28, %25 ], [ 0, %4 ]
  %.042 = phi i32 [ %.1, %25 ], [ 0, %4 ]
  %.03041 = phi i32 [ %.131, %25 ], [ 0, %4 ]
  %7 = sext i32 %.042 to i64
  %8 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %9 = icmp ugt i64 %8, %7
  br i1 %9, label %10, label %.critedge.loopexit

10:                                               ; preds = %.lr.ph
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %6) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %7) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %.not = icmp sgt i32 %12, %14
  br i1 %.not, label %18, label %15

15:                                               ; preds = %10
  %16 = add nsw i32 %.03041, 1
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %6) #1
  br label %25

18:                                               ; preds = %10
  %19 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %20 = sub i64 %19, %6
  %21 = load i64, ptr %3, align 8, !tbaa !9
  %22 = add i64 %20, %21
  store i64 %22, ptr %3, align 8, !tbaa !9
  %23 = add nsw i32 %.042, 1
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %7) #1
  br label %25

25:                                               ; preds = %18, %15
  %.sink75 = phi ptr [ %24, %18 ], [ %17, %15 ]
  %.131 = phi i32 [ %.03041, %18 ], [ %16, %15 ]
  %.1 = phi i32 [ %23, %18 ], [ %.042, %15 ]
  %26 = load i32, ptr %.sink75, align 4, !tbaa !5
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #1
  store i32 %26, ptr %27, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %28 = sext i32 %.131 to i64
  %29 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %30 = icmp ugt i64 %29, %28
  br i1 %30, label %.lr.ph, label %.critedge.loopexit, !llvm.loop !11

.critedge.loopexit:                               ; preds = %25, %.lr.ph
  %.033.lcssa.ph.in = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv.next, %25 ]
  %.030.lcssa.ph = phi i32 [ %.03041, %.lr.ph ], [ %.131, %25 ]
  %.0.lcssa.ph = phi i32 [ %.042, %.lr.ph ], [ %.1, %25 ]
  %.033.lcssa.ph = trunc i64 %.033.lcssa.ph.in to i32
  %31 = sext i32 %.030.lcssa.ph to i64
  %32 = sext i32 %.0.lcssa.ph to i64
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %4
  %.033.lcssa = phi i32 [ 0, %4 ], [ %.033.lcssa.ph, %.critedge.loopexit ]
  %.030.lcssa = phi i64 [ 0, %4 ], [ %31, %.critedge.loopexit ]
  %.0.lcssa = phi i64 [ 0, %4 ], [ %32, %.critedge.loopexit ]
  %33 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %34 = icmp ugt i64 %33, %.030.lcssa
  br i1 %34, label %.lr.ph51.preheader, label %.preheader

.lr.ph51.preheader:                               ; preds = %.critedge
  %35 = zext i32 %.033.lcssa to i64
  br label %.lr.ph51

.preheader.loopexit:                              ; preds = %.lr.ph51
  %36 = trunc nuw i64 %indvars.iv.next61 to i32
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %.critedge
  %.235.lcssa = phi i32 [ %.033.lcssa, %.critedge ], [ %36, %.preheader.loopexit ]
  %37 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %38 = icmp ugt i64 %37, %.0.lcssa
  br i1 %38, label %.lr.ph55.preheader, label %._crit_edge

.lr.ph55.preheader:                               ; preds = %.preheader
  %39 = zext i32 %.235.lcssa to i64
  br label %.lr.ph55

.lr.ph51:                                         ; preds = %.lr.ph51.preheader, %.lr.ph51
  %indvars.iv60 = phi i64 [ %35, %.lr.ph51.preheader ], [ %indvars.iv.next61, %.lr.ph51 ]
  %indvars.iv58 = phi i64 [ %.030.lcssa, %.lr.ph51.preheader ], [ %indvars.iv.next59, %.lr.ph51 ]
  %indvars.iv.next59 = add nuw nsw i64 %indvars.iv58, 1
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv58) #1
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %indvars.iv.next61 = add nuw nsw i64 %indvars.iv60, 1
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv60) #1
  store i32 %41, ptr %42, align 4, !tbaa !5
  %43 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %44 = icmp ugt i64 %43, %indvars.iv.next59
  br i1 %44, label %.lr.ph51, label %.preheader.loopexit, !llvm.loop !13

.lr.ph55:                                         ; preds = %.lr.ph55.preheader, %.lr.ph55
  %indvars.iv68 = phi i64 [ %39, %.lr.ph55.preheader ], [ %indvars.iv.next69, %.lr.ph55 ]
  %indvars.iv66 = phi i64 [ %.0.lcssa, %.lr.ph55.preheader ], [ %indvars.iv.next67, %.lr.ph55 ]
  %indvars.iv.next67 = add nuw nsw i64 %indvars.iv66, 1
  %45 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv66) #1
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %indvars.iv.next69 = add nuw nsw i64 %indvars.iv68, 1
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv68) #1
  store i32 %46, ptr %47, align 4, !tbaa !5
  %48 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %49 = icmp ugt i64 %48, %indvars.iv.next67
  br i1 %49, label %.lr.ph55, label %._crit_edge, !llvm.loop !14

._crit_edge:                                      ; preds = %.lr.ph55, %.preheader
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass