; LLVM IR from HarshCasper/NeoAlgo :: C/cp (maximum_size_of_balanced_bracket_sequence)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @balanced_bracket_sequence(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %43, %2
  %9 = load i32, ptr %7, align 4, !tbaa !9
  %10 = load i32, ptr %4, align 4, !tbaa !9
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %46

13:                                               ; preds = %8
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds i8, ptr %14, i64 %16
  %18 = load i8, ptr %17, align 1, !tbaa !11
  %19 = sext i8 %18 to i32
  %20 = icmp eq i32 %19, 40
  br i1 %20, label %21, label %24

21:                                               ; preds = %13
  %22 = load i32, ptr %6, align 4, !tbaa !9
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %6, align 4, !tbaa !9
  br label %42

24:                                               ; preds = %13
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds i8, ptr %25, i64 %27
  %29 = load i8, ptr %28, align 1, !tbaa !11
  %30 = sext i8 %29 to i32
  %31 = icmp eq i32 %30, 41
  br i1 %31, label %32, label %41

32:                                               ; preds = %24
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %40

35:                                               ; preds = %32
  %36 = load i32, ptr %5, align 4, !tbaa !9
  %37 = add nsw i32 %36, 2
  store i32 %37, ptr %5, align 4, !tbaa !9
  %38 = load i32, ptr %6, align 4, !tbaa !9
  %39 = add nsw i32 %38, -1
  store i32 %39, ptr %6, align 4, !tbaa !9
  br label %40

40:                                               ; preds = %35, %32
  br label %41

41:                                               ; preds = %40, %24
  br label %42

42:                                               ; preds = %41, %21
  br label %43

43:                                               ; preds = %42
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %7, align 4, !tbaa !9
  br label %8, !llvm.loop !12

46:                                               ; preds = %12
  %47 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %47
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define dso_local i32 @balanced_bracket_sequence(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 0
  br i1 %3, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %2
  %wide.trip.count = zext nneg i32 %1 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %4 = icmp eq i32 %1, 1
  br i1 %4, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa.loopexit:          ; preds = %34
  %5 = icmp ne i32 %.1.1, 0
  br label %._crit_edge.loopexit.unr-lcssa

._crit_edge.loopexit.unr-lcssa:                   ; preds = %._crit_edge.loopexit.unr-lcssa.loopexit, %.lr.ph.preheader
  %.114.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %.114.1, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.1, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %.01217.unr = phi i1 [ false, %.lr.ph.preheader ], [ %5, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %.01316.unr = phi i32 [ 0, %.lr.ph.preheader ], [ %.114.1, %._crit_edge.loopexit.unr-lcssa.loopexit ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %6 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.unr
  %7 = load i8, ptr %6, align 1, !tbaa !5
  %8 = icmp eq i8 %7, 40
  br i1 %8, label %._crit_edge, label %9

9:                                                ; preds = %.lr.ph.epil
  %10 = icmp eq i8 %7, 41
  %or.cond.epil = select i1 %10, i1 %.01217.unr, i1 false
  %11 = add nsw i32 %.01316.unr, 2
  %spec.select = select i1 %or.cond.epil, i32 %11, i32 %.01316.unr
  br label %._crit_edge

._crit_edge:                                      ; preds = %9, %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %2
  %.013.lcssa = phi i32 [ 0, %2 ], [ %.114.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select, %9 ], [ %.01316.unr, %.lr.ph.epil ]
  ret i32 %.013.lcssa

.lr.ph:                                           ; preds = %34, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %34 ]
  %.01217 = phi i32 [ 0, %.lr.ph.preheader.new ], [ %.1.1, %34 ]
  %.01316 = phi i32 [ 0, %.lr.ph.preheader.new ], [ %.114.1, %34 ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %34 ]
  %12 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv
  %13 = load i8, ptr %12, align 1, !tbaa !5
  %14 = icmp eq i8 %13, 40
  br i1 %14, label %15, label %17

15:                                               ; preds = %.lr.ph
  %16 = add nsw i32 %.01217, 1
  br label %.lr.ph.1

17:                                               ; preds = %.lr.ph
  %18 = icmp eq i8 %13, 41
  %19 = icmp ne i32 %.01217, 0
  %or.cond = select i1 %18, i1 %19, i1 false
  br i1 %or.cond, label %20, label %.lr.ph.1

20:                                               ; preds = %17
  %21 = add nsw i32 %.01316, 2
  %22 = add nsw i32 %.01217, -1
  br label %.lr.ph.1

.lr.ph.1:                                         ; preds = %15, %20, %17
  %.114 = phi i32 [ %.01316, %15 ], [ %21, %20 ], [ %.01316, %17 ]
  %.1 = phi i32 [ %16, %15 ], [ %22, %20 ], [ %.01217, %17 ]
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %23 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next
  %24 = load i8, ptr %23, align 1, !tbaa !5
  %25 = icmp eq i8 %24, 40
  br i1 %25, label %32, label %26

26:                                               ; preds = %.lr.ph.1
  %27 = icmp eq i8 %24, 41
  %28 = icmp ne i32 %.1, 0
  %or.cond.1 = select i1 %27, i1 %28, i1 false
  br i1 %or.cond.1, label %29, label %34

29:                                               ; preds = %26
  %30 = add nsw i32 %.114, 2
  %31 = add nsw i32 %.1, -1
  br label %34

32:                                               ; preds = %.lr.ph.1
  %33 = add nsw i32 %.1, 1
  br label %34

34:                                               ; preds = %32, %29, %26
  %.114.1 = phi i32 [ %.114, %32 ], [ %30, %29 ], [ %.114, %26 ]
  %.1.1 = phi i32 [ %33, %32 ], [ %31, %29 ], [ %.1, %26 ]
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa.loopexit, label %.lr.ph, !llvm.loop !8
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass