; LLVM IR from xirc/cp-algorithm :: atcoder/abc143/D/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@N = external dso_local global i32, align 4
@ls = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solvev() #1 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca %"class.std::vector", align 8
  %3 = alloca i32, align 4
  %4 = alloca %"class.std::allocator", align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 2000, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 24, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #4
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #4
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 2001, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %18 unwind label %24

18:                                               ; preds = %0
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %37, %18
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = load i32, ptr @N, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %28, label %23

23:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %40

24:                                               ; preds = %0
  %25 = landingpad { ptr, i32 }
          cleanup
  %26 = extractvalue { ptr, i32 } %25, 0
  store ptr %26, ptr %5, align 8
  %27 = extractvalue { ptr, i32 } %25, 1
  store i32 %27, ptr %6, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %141

28:                                               ; preds = %19
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ls, i64 noundef %30) #4
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %33) #4
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %34, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %28
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %7, align 4, !tbaa !5
  br label %19, !llvm.loop !9

40:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 1, ptr %8, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %56, %40
  %42 = load i32, ptr %8, align 4, !tbaa !5
  %43 = icmp slt i32 %42, 2001
  br i1 %43, label %45, label %44

44:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %59

45:                                               ; preds = %41
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = sub nsw i32 %46, 1
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %48) #4
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %52) #4
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = add nsw i32 %54, %50
  store i32 %55, ptr %53, align 4, !tbaa !5
  br label %56

56:                                               ; preds = %45
  %57 = load i32, ptr %8, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %8, align 4, !tbaa !5
  br label %41, !llvm.loop !11

59:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  store i64 0, ptr %9, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %60

60:                                               ; preds = %135, %59
  %61 = load i32, ptr %10, align 4, !tbaa !5
  %62 = load i32, ptr @N, align 4, !tbaa !5
  %63 = icmp slt i32 %61, %62
  br i1 %63, label %65, label %64

64:                                               ; preds = %60
  store i32 8, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %138

65:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %66

66:                                               ; preds = %131, %65
  %67 = load i32, ptr %12, align 4, !tbaa !5
  %68 = load i32, ptr @N, align 4, !tbaa !5
  %69 = icmp slt i32 %67, %68
  br i1 %69, label %71, label %70

70:                                               ; preds = %66
  store i32 11, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %134

71:                                               ; preds = %66
  %72 = load i32, ptr %10, align 4, !tbaa !5
  %73 = load i32, ptr %12, align 4, !tbaa !5
  %74 = icmp eq i32 %72, %73
  br i1 %74, label %75, label %76

75:                                               ; preds = %71
  br label %131

76:                                               ; preds = %71
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %77 = load i32, ptr %10, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ls, i64 noundef %78) #4
  %80 = load i32, ptr %79, align 4, !tbaa !5
  store i32 %80, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %81 = load i32, ptr %12, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ls, i64 noundef %82) #4
  %84 = load i32, ptr %83, align 4, !tbaa !5
  store i32 %84, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %85 = load i32, ptr %13, align 4, !tbaa !5
  %86 = load i32, ptr %14, align 4, !tbaa !5
  %87 = sub nsw i32 %85, %86
  %88 = call i32 @llvm.abs.i32(i32 %87, i1 true)
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %90 = load i32, ptr %13, align 4, !tbaa !5
  %91 = load i32, ptr %14, align 4, !tbaa !5
  %92 = add nsw i32 %90, %91
  %93 = sub nsw i32 %92, 1
  store i32 %93, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %94 = load i32, ptr %16, align 4, !tbaa !5
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %95) #4
  %97 = load i32, ptr %96, align 4, !tbaa !5
  store i32 %97, ptr %17, align 4, !tbaa !5
  %98 = load i32, ptr %15, align 4, !tbaa !5
  %99 = sub nsw i32 %98, 1
  %100 = sext i32 %99 to i64
  %101 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %100) #4
  %102 = load i32, ptr %101, align 4, !tbaa !5
  %103 = load i32, ptr %17, align 4, !tbaa !5
  %104 = sub nsw i32 %103, %102
  store i32 %104, ptr %17, align 4, !tbaa !5
  %105 = load i32, ptr %13, align 4, !tbaa !5
  %106 = load i32, ptr %15, align 4, !tbaa !5
  %107 = icmp sge i32 %105, %106
  br i1 %107, label %108, label %115

108:                                              ; preds = %76
  %109 = load i32, ptr %13, align 4, !tbaa !5
  %110 = load i32, ptr %16, align 4, !tbaa !5
  %111 = icmp sle i32 %109, %110
  br i1 %111, label %112, label %115

112:                                              ; preds = %108
  %113 = load i32, ptr %17, align 4, !tbaa !5
  %114 = add nsw i32 %113, -1
  store i32 %114, ptr %17, align 4, !tbaa !5
  br label %115

115:                                              ; preds = %112, %108, %76
  %116 = load i32, ptr %14, align 4, !tbaa !5
  %117 = load i32, ptr %15, align 4, !tbaa !5
  %118 = icmp sge i32 %116, %117
  br i1 %118, label %119, label %126

119:                                              ; preds = %115
  %120 = load i32, ptr %14, align 4, !tbaa !5
  %121 = load i32, ptr %16, align 4, !tbaa !5
  %122 = icmp sle i32 %120, %121
  br i1 %122, label %123, label %126

123:                                              ; preds = %119
  %124 = load i32, ptr %17, align 4, !tbaa !5
  %125 = add nsw i32 %124, -1
  store i32 %125, ptr %17, align 4, !tbaa !5
  br label %126

126:                                              ; preds = %123, %119, %115
  %127 = load i32, ptr %17, align 4, !tbaa !5
  %128 = sext i32 %127 to i64
  %129 = load i64, ptr %9, align 8, !tbaa !12
  %130 = add nsw i64 %129, %128
  store i64 %130, ptr %9, align 8, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %131

131:                                              ; preds = %126, %75
  %132 = load i32, ptr %12, align 4, !tbaa !5
  %133 = add nsw i32 %132, 1
  store i32 %133, ptr %12, align 4, !tbaa !5
  br label %66, !llvm.loop !14

134:                                              ; preds = %70
  br label %135

135:                                              ; preds = %134
  %136 = load i32, ptr %10, align 4, !tbaa !5
  %137 = add nsw i32 %136, 1
  store i32 %137, ptr %10, align 4, !tbaa !5
  br label %60, !llvm.loop !15

138:                                              ; preds = %64
  %139 = load i64, ptr %9, align 8, !tbaa !12
  %140 = sdiv i64 %139, 6
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i64 %140

141:                                              ; preds = %24
  %142 = load ptr, ptr %5, align 8
  %143 = load i32, ptr %6, align 4
  %144 = insertvalue { ptr, i32 } poison, ptr %142, 0
  %145 = insertvalue { ptr, i32 } %144, i32 %143, 1
  resume { ptr, i32 } %145
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@N = external dso_local local_unnamed_addr global i32, align 4
@ls = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i64 -1537228672809129301, 1537228672809129302) i64 @_Z5solvev() local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %1 = alloca %"class.std::vector", align 8
  %2 = alloca i32, align 4
  %3 = alloca %"class.std::allocator", align 1
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #4
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #4
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 2001, ptr noundef nonnull align 4 dereferenceable(4) %2, ptr noundef nonnull align 1 dereferenceable(1) %3)
          to label %4 unwind label %7

4:                                                ; preds = %0
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  %5 = load i32, ptr @N, align 4, !tbaa !5
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph, label %.preheader49.preheader

.preheader49.preheader:                           ; preds = %.lr.ph, %4
  br label %.preheader49

7:                                                ; preds = %0
  %8 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #4
  resume { ptr, i32 } %8

.lr.ph:                                           ; preds = %4, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %4 ]
  %9 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ls, i64 noundef %indvars.iv) #4
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %11) #4
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = add nsw i32 %13, 1
  store i32 %14, ptr %12, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %15 = load i32, ptr @N, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = icmp slt i64 %indvars.iv.next, %16
  br i1 %17, label %.lr.ph, label %.preheader49.preheader, !llvm.loop !9

.preheader48:                                     ; preds = %.preheader49
  %18 = load i32, ptr @N, align 4, !tbaa !5
  %19 = icmp sgt i32 %18, 0
  br i1 %19, label %.preheader, label %._crit_edge57

.preheader49:                                     ; preds = %.preheader49.preheader, %.preheader49
  %indvars.iv61 = phi i64 [ %indvars.iv.next62, %.preheader49 ], [ 1, %.preheader49.preheader ]
  %20 = add nsw i64 %indvars.iv61, -1
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %20) #4
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv61) #4
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = add nsw i32 %24, %22
  store i32 %25, ptr %23, align 4, !tbaa !5
  %indvars.iv.next62 = add nuw nsw i64 %indvars.iv61, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next62, 2001
  br i1 %exitcond.not, label %.preheader48, label %.preheader49, !llvm.loop !11

.preheader:                                       ; preds = %.preheader48, %._crit_edge
  %26 = phi i32 [ %29, %._crit_edge ], [ %18, %.preheader48 ]
  %indvars.iv67 = phi i64 [ %indvars.iv.next68, %._crit_edge ], [ 0, %.preheader48 ]
  %.03856 = phi i64 [ %.139.lcssa, %._crit_edge ], [ 0, %.preheader48 ]
  %27 = icmp sgt i32 %26, 0
  br i1 %27, label %.lr.ph54, label %._crit_edge

._crit_edge57.loopexit:                           ; preds = %._crit_edge
  %28 = sdiv i64 %.139.lcssa, 6
  br label %._crit_edge57

._crit_edge57:                                    ; preds = %._crit_edge57.loopexit, %.preheader48
  %.038.lcssa = phi i64 [ 0, %.preheader48 ], [ %28, %._crit_edge57.loopexit ]
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %1) #4
  ret i64 %.038.lcssa

._crit_edge:                                      ; preds = %55, %.preheader
  %29 = phi i32 [ %26, %.preheader ], [ %56, %55 ]
  %.139.lcssa = phi i64 [ %.03856, %.preheader ], [ %.2, %55 ]
  %indvars.iv.next68 = add nuw nsw i64 %indvars.iv67, 1
  %30 = sext i32 %29 to i64
  %31 = icmp slt i64 %indvars.iv.next68, %30
  br i1 %31, label %.preheader, label %._crit_edge57.loopexit, !llvm.loop !12

.lr.ph54:                                         ; preds = %.preheader, %55
  %32 = phi i32 [ %56, %55 ], [ %26, %.preheader ]
  %33 = phi i32 [ %57, %55 ], [ %26, %.preheader ]
  %indvars.iv64 = phi i64 [ %indvars.iv.next65, %55 ], [ 0, %.preheader ]
  %.13953 = phi i64 [ %.2, %55 ], [ %.03856, %.preheader ]
  %34 = icmp eq i64 %indvars.iv67, %indvars.iv64
  br i1 %34, label %55, label %35

35:                                               ; preds = %.lr.ph54
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ls, i64 noundef %indvars.iv67) #4
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ls, i64 noundef %indvars.iv64) #4
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = sub nsw i32 %37, %39
  %41 = call i32 @llvm.abs.i32(i32 %40, i1 true)
  %42 = add i32 %37, -1
  %43 = add i32 %42, %39
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %44) #4
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = zext nneg i32 %41 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %47) #4
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = sub i32 %46, %49
  %.not.not = icmp sgt i32 %37, %41
  %.not.not44 = icmp sgt i32 %39, 0
  %or.cond = and i1 %.not.not44, %.not.not
  %51 = sext i1 %or.cond to i32
  %.0 = add nsw i32 %50, %51
  %.not.not45 = icmp sgt i32 %39, %41
  %.not.not46 = icmp sgt i32 %37, 0
  %or.cond47 = select i1 %.not.not45, i1 %.not.not46, i1 false
  %52 = sext i1 %or.cond47 to i32
  %.1 = add nsw i32 %.0, %52
  %53 = sext i32 %.1 to i64
  %54 = add nsw i64 %.13953, %53
  %.pre = load i32, ptr @N, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %.lr.ph54, %35
  %56 = phi i32 [ %32, %.lr.ph54 ], [ %.pre, %35 ]
  %57 = phi i32 [ %33, %.lr.ph54 ], [ %.pre, %35 ]
  %.2 = phi i64 [ %.13953, %.lr.ph54 ], [ %54, %35 ]
  %indvars.iv.next65 = add nuw nsw i64 %indvars.iv64, 1
  %58 = sext i32 %57 to i64
  %59 = icmp slt i64 %indvars.iv.next65, %58
  br i1 %59, label %.lr.ph54, label %._crit_edge, !llvm.loop !14
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10, !13}
!13 = !{!"llvm.loop.unswitch.partial.disable"}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass