; LLVM IR from xirc/cp-algorithm :: atcoder/abc147/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::bitset" = type { %"struct.std::_Base_bitset" }
%"struct.std::_Base_bitset" = type { i64 }
%"class.std::bitset<15>::reference" = type { ptr, i64 }

@N = external dso_local global i32, align 4
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca %"class.std::bitset", align 8
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca %"class.std::bitset<15>::reference", align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %"class.std::bitset<15>::reference", align 8
  %13 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  %14 = load i32, ptr @N, align 4, !tbaa !5
  %15 = shl i32 1, %14
  store i32 %15, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %96, %0
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %99

21:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  call void @_ZNSt6bitsetILm15EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8) %5, i64 noundef %23) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  store i8 1, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %84, %21
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = load i32, ptr @N, align 4, !tbaa !5
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %28, label %31

28:                                               ; preds = %24
  %29 = load i8, ptr %6, align 1, !tbaa !9, !range !11, !noundef !12
  %30 = trunc i8 %29 to i1
  br label %31

31:                                               ; preds = %28, %24
  %32 = phi i1 [ false, %24 ], [ %30, %28 ]
  br i1 %32, label %34, label %33

33:                                               ; preds = %31
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %87

34:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 16, ptr %8) #4
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  call void @_ZNSt6bitsetILm15EEixEm(ptr dead_on_unwind writable sret(%"class.std::bitset<15>::reference") align 8 %8, ptr noundef nonnull align 8 dereferenceable(8) %5, i64 noundef %36)
  %37 = call noundef zeroext i1 @_ZNKSt6bitsetILm15EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %8) #4
  %38 = xor i1 %37, true
  call void @_ZNSt6bitsetILm15EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %8) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %8) #4
  br i1 %38, label %39, label %40

39:                                               ; preds = %34
  br label %84

40:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %80, %40
  %42 = load i32, ptr %9, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %45) #4
  %47 = call noundef i64 @_ZNKSt6vectorISt5arrayIiLm2EESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %46) #4
  %48 = icmp ult i64 %43, %47
  br i1 %48, label %49, label %52

49:                                               ; preds = %41
  %50 = load i8, ptr %6, align 1, !tbaa !9, !range !11, !noundef !12
  %51 = trunc i8 %50 to i1
  br label %52

52:                                               ; preds = %49, %41
  %53 = phi i1 [ false, %41 ], [ %51, %49 ]
  br i1 %53, label %55, label %54

54:                                               ; preds = %52
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %83

55:                                               ; preds = %52
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %56 = load i32, ptr %7, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %57) #4
  %59 = load i32, ptr %9, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt5arrayIiLm2EESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %60) #4
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm2EEixEm(ptr noundef nonnull align 4 dereferenceable(8) %61, i64 noundef 0) #4
  %63 = load i32, ptr %62, align 4, !tbaa !5
  store i32 %63, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %64 = load i32, ptr %7, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %65) #4
  %67 = load i32, ptr %9, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt5arrayIiLm2EESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %68) #4
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm2EEixEm(ptr noundef nonnull align 4 dereferenceable(8) %69, i64 noundef 1) #4
  %71 = load i32, ptr %70, align 4, !tbaa !5
  store i32 %71, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #4
  %72 = load i32, ptr %10, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  call void @_ZNSt6bitsetILm15EEixEm(ptr dead_on_unwind writable sret(%"class.std::bitset<15>::reference") align 8 %12, ptr noundef nonnull align 8 dereferenceable(8) %5, i64 noundef %73)
  %74 = call noundef zeroext i1 @_ZNKSt6bitsetILm15EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %12) #4
  %75 = zext i1 %74 to i32
  %76 = load i32, ptr %11, align 4, !tbaa !5
  %77 = icmp ne i32 %75, %76
  call void @_ZNSt6bitsetILm15EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %12) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #4
  br i1 %77, label %78, label %79

78:                                               ; preds = %55
  store i8 0, ptr %6, align 1, !tbaa !9
  br label %79

79:                                               ; preds = %78, %55
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %80

80:                                               ; preds = %79
  %81 = load i32, ptr %9, align 4, !tbaa !5
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %9, align 4, !tbaa !5
  br label %41, !llvm.loop !13

83:                                               ; preds = %54
  br label %84

84:                                               ; preds = %83, %39
  %85 = load i32, ptr %7, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %7, align 4, !tbaa !5
  br label %24, !llvm.loop !15

87:                                               ; preds = %33
  %88 = load i8, ptr %6, align 1, !tbaa !9, !range !11, !noundef !12
  %89 = trunc i8 %88 to i1
  br i1 %89, label %90, label %95

90:                                               ; preds = %87
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %91 = call noundef i64 @_ZNKSt6bitsetILm15EE5countEv(ptr noundef nonnull align 8 dereferenceable(8) %5) #4
  %92 = trunc i64 %91 to i32
  store i32 %92, ptr %13, align 4, !tbaa !5
  %93 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %13)
  %94 = load i32, ptr %93, align 4, !tbaa !5
  store i32 %94, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %95

95:                                               ; preds = %90, %87
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  br label %96

96:                                               ; preds = %95
  %97 = load i32, ptr %3, align 4, !tbaa !5
  %98 = add nsw i32 %97, 1
  store i32 %98, ptr %3, align 4, !tbaa !5
  br label %16, !llvm.loop !16

99:                                               ; preds = %20
  %100 = load i32, ptr %1, align 4, !tbaa !5
  store i32 1, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i32 %100
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm15EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm15EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<15>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm15EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm15EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt5arrayIiLm2EESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt5arrayIiLm2EESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm2EEixEm(ptr noundef nonnull align 4 dereferenceable(8), i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6bitsetILm15EE5countEv(ptr noundef nonnull align 8 dereferenceable(8)) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<std::array<int, 2>>, std::allocator<std::vector<std::array<int, 2>>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::bitset" = type { %"struct.std::_Base_bitset" }
%"struct.std::_Base_bitset" = type { i64 }
%"class.std::bitset<15>::reference" = type { ptr, i64 }

@N = external dso_local local_unnamed_addr global i32, align 4
@A = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5solvev() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca %"class.std::bitset", align 8
  %3 = alloca %"class.std::bitset<15>::reference", align 8
  %4 = alloca %"class.std::bitset<15>::reference", align 8
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  %6 = load i32, ptr @N, align 4, !tbaa !5
  %.not33 = icmp eq i32 %6, 31
  br i1 %.not33, label %._crit_edge32, label %.lr.ph31.preheader

.lr.ph31.preheader:                               ; preds = %0
  %7 = shl nuw nsw i32 1, %6
  %wide.trip.count = zext nneg i32 %7 to i64
  br label %.lr.ph31

._crit_edge32.loopexit:                           ; preds = %41
  %.pre = load i32, ptr %1, align 4, !tbaa !5
  br label %._crit_edge32

._crit_edge32:                                    ; preds = %._crit_edge32.loopexit, %0
  %8 = phi i32 [ %.pre, %._crit_edge32.loopexit ], [ 0, %0 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
  ret i32 %8

.lr.ph31:                                         ; preds = %.lr.ph31.preheader, %41
  %indvars.iv36 = phi i64 [ 0, %.lr.ph31.preheader ], [ %indvars.iv.next37, %41 ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
  call void @_ZNSt6bitsetILm15EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef %indvars.iv36) #3
  %9 = load i32, ptr @N, align 4, !tbaa !5
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %.lr.ph27, label %.critedge

._crit_edge:                                      ; preds = %.loopexit
  br i1 %.pre-phi, label %.critedge, label %41

.lr.ph27:                                         ; preds = %.lr.ph31, %.loopexit
  %indvars.iv34 = phi i64 [ %indvars.iv.next35, %.loopexit ], [ 0, %.lr.ph31 ]
  %.02125 = phi i8 [ %.3, %.loopexit ], [ 1, %.lr.ph31 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
  call void @_ZNSt6bitsetILm15EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<15>::reference") align 8 %3, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef %indvars.iv34)
  %11 = call noundef zeroext i1 @_ZNKSt6bitsetILm15EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %3) #3
  call void @_ZNSt6bitsetILm15EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %3) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
  br i1 %11, label %.preheader, label %.lr.ph27..loopexit_crit_edge

.lr.ph27..loopexit_crit_edge:                     ; preds = %.lr.ph27
  %.pre39 = trunc nuw i8 %.02125 to i1
  br label %.loopexit

.preheader:                                       ; preds = %.lr.ph27
  %12 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv34) #3
  %13 = call noundef i64 @_ZNKSt6vectorISt5arrayIiLm2EESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  %14 = icmp ne i64 %13, 0
  %15 = trunc nuw i8 %.02125 to i1
  %16 = select i1 %14, i1 %15, i1 false
  br i1 %16, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.preheader ]
  %.123 = phi i8 [ %spec.select, %.lr.ph ], [ %.02125, %.preheader ]
  %17 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv34) #3
  %18 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt5arrayIiLm2EESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %indvars.iv) #3
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm2EEixEm(ptr noundef nonnull align 4 dereferenceable(8) %18, i64 noundef 0) #3
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv34) #3
  %22 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt5arrayIiLm2EESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv) #3
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm2EEixEm(ptr noundef nonnull align 4 dereferenceable(8) %22, i64 noundef 1) #3
  %24 = load i32, ptr %23, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
  %25 = sext i32 %20 to i64
  call void @_ZNSt6bitsetILm15EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<15>::reference") align 8 %4, ptr noundef nonnull align 8 dereferenceable(8) %2, i64 noundef %25)
  %26 = call noundef zeroext i1 @_ZNKSt6bitsetILm15EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  %27 = zext i1 %26 to i32
  %.not = icmp eq i32 %24, %27
  call void @_ZNSt6bitsetILm15EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
  %spec.select = select i1 %.not, i8 %.123, i8 0
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv34) #3
  %29 = call noundef i64 @_ZNKSt6vectorISt5arrayIiLm2EESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %28) #3
  %30 = icmp ugt i64 %29, %indvars.iv.next
  %31 = trunc nuw i8 %spec.select to i1
  %32 = select i1 %30, i1 %31, i1 false
  br i1 %32, label %.lr.ph, label %.loopexit, !llvm.loop !9

.loopexit:                                        ; preds = %.lr.ph, %.lr.ph27..loopexit_crit_edge, %.preheader
  %.pre-phi = phi i1 [ %.pre39, %.lr.ph27..loopexit_crit_edge ], [ %15, %.preheader ], [ %31, %.lr.ph ]
  %.3 = phi i8 [ %.02125, %.lr.ph27..loopexit_crit_edge ], [ %.02125, %.preheader ], [ %spec.select, %.lr.ph ]
  %indvars.iv.next35 = add nuw nsw i64 %indvars.iv34, 1
  %33 = load i32, ptr @N, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = icmp slt i64 %indvars.iv.next35, %34
  %36 = select i1 %35, i1 %.pre-phi, i1 false
  br i1 %36, label %.lr.ph27, label %._crit_edge, !llvm.loop !11

.critedge:                                        ; preds = %.lr.ph31, %._crit_edge
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %37 = call noundef i64 @_ZNKSt6bitsetILm15EE5countEv(ptr noundef nonnull align 8 dereferenceable(8) %2) #3
  %38 = trunc i64 %37 to i32
  store i32 %38, ptr %5, align 4, !tbaa !5
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %40 = load i32, ptr %39, align 4, !tbaa !5
  store i32 %40, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %41

41:                                               ; preds = %.critedge, %._crit_edge
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next37, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge32.loopexit, label %.lr.ph31, !llvm.loop !12
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm15EEC2Ey(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm15EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<15>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm15EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm15EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_ISt5arrayIiLm2EESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt5arrayIiLm2EESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt5arrayIiLm2EESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt5arrayIiLm2EEixEm(ptr noundef nonnull align 4 dereferenceable(8), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6bitsetILm15EE5countEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass