; LLVM IR from xirc/cp-algorithm :: atcoder/abc058/D/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@M = external dso_local global i32, align 4
@xs = external dso_local global %"class.std::vector", align 8
@ys = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5solvev() #0 {
  %1 = alloca i64, align 8
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #2
  store i64 0, ptr %1, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 0, ptr %2, align 4, !tbaa !9
  br label %5

5:                                                ; preds = %35, %0
  %6 = load i32, ptr %2, align 4, !tbaa !9
  %7 = load i32, ptr @N, align 4, !tbaa !9
  %8 = icmp slt i32 %6, %7
  br i1 %8, label %10, label %9

9:                                                ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  br label %38

10:                                               ; preds = %5
  %11 = load i32, ptr %2, align 4, !tbaa !9
  %12 = sext i32 %11 to i64
  %13 = load i32, ptr %2, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %14) #2
  %16 = load i32, ptr %15, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = mul nsw i64 %12, %17
  %19 = load i32, ptr @N, align 4, !tbaa !9
  %20 = sub nsw i32 %19, 1
  %21 = load i32, ptr %2, align 4, !tbaa !9
  %22 = sub nsw i32 %20, %21
  %23 = sext i32 %22 to i64
  %24 = load i32, ptr %2, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = mul nsw i64 %23, %28
  %30 = sub nsw i64 %18, %29
  %31 = load i64, ptr %1, align 8, !tbaa !5
  %32 = add nsw i64 %31, %30
  store i64 %32, ptr %1, align 8, !tbaa !5
  %33 = load i64, ptr %1, align 8, !tbaa !5
  %34 = srem i64 %33, 1000000007
  store i64 %34, ptr %1, align 8, !tbaa !5
  br label %35

35:                                               ; preds = %10
  %36 = load i32, ptr %2, align 4, !tbaa !9
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %2, align 4, !tbaa !9
  br label %5, !llvm.loop !11

38:                                               ; preds = %9
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  store i64 0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %69, %38
  %40 = load i32, ptr %4, align 4, !tbaa !9
  %41 = load i32, ptr @M, align 4, !tbaa !9
  %42 = icmp slt i32 %40, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %72

44:                                               ; preds = %39
  %45 = load i32, ptr %4, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = load i32, ptr %4, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %48) #2
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = mul nsw i64 %46, %51
  %53 = load i32, ptr @M, align 4, !tbaa !9
  %54 = sub nsw i32 %53, 1
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = sub nsw i32 %54, %55
  %57 = sext i32 %56 to i64
  %58 = load i32, ptr %4, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %59) #2
  %61 = load i32, ptr %60, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = mul nsw i64 %57, %62
  %64 = sub nsw i64 %52, %63
  %65 = load i64, ptr %3, align 8, !tbaa !5
  %66 = add nsw i64 %65, %64
  store i64 %66, ptr %3, align 8, !tbaa !5
  %67 = load i64, ptr %3, align 8, !tbaa !5
  %68 = srem i64 %67, 1000000007
  store i64 %68, ptr %3, align 8, !tbaa !5
  br label %69

69:                                               ; preds = %44
  %70 = load i32, ptr %4, align 4, !tbaa !9
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %4, align 4, !tbaa !9
  br label %39, !llvm.loop !13

72:                                               ; preds = %43
  %73 = load i64, ptr %1, align 8, !tbaa !5
  %74 = load i64, ptr %3, align 8, !tbaa !5
  %75 = mul nsw i64 %73, %74
  %76 = srem i64 %75, 1000000007
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #2
  ret i64 %76
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@M = external dso_local local_unnamed_addr global i32, align 4
@xs = external dso_local global %"class.std::vector", align 8
@ys = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i64 -1000000006, 1000000007) i64 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4, !tbaa !5
  %2 = icmp sgt i32 %1, 0
  br i1 %2, label %.lr.ph, label %.preheader

.preheader:                                       ; preds = %.lr.ph, %0
  %.020.lcssa = phi i64 [ 0, %0 ], [ %20, %.lr.ph ]
  %3 = load i32, ptr @M, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph26, label %._crit_edge

.lr.ph:                                           ; preds = %0, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
  %.02022 = phi i64 [ %20, %.lr.ph ], [ 0, %0 ]
  %5 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %indvars.iv) #1
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = sext i32 %6 to i64
  %8 = mul nsw i64 %indvars.iv, %7
  %9 = load i32, ptr @N, align 4, !tbaa !5
  %10 = trunc nuw nsw i64 %indvars.iv to i32
  %11 = xor i32 %10, -1
  %12 = add i32 %9, %11
  %13 = sext i32 %12 to i64
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %indvars.iv) #1
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = mul nsw i64 %16, %13
  %18 = add i64 %8, %.02022
  %19 = sub i64 %18, %17
  %20 = srem i64 %19, 1000000007
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %21 = load i32, ptr @N, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = icmp slt i64 %indvars.iv.next, %22
  br i1 %23, label %.lr.ph, label %.preheader, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph26, %.preheader
  %.018.lcssa = phi i64 [ 0, %.preheader ], [ %41, %.lr.ph26 ]
  %24 = mul nsw i64 %.018.lcssa, %.020.lcssa
  %25 = srem i64 %24, 1000000007
  ret i64 %25

.lr.ph26:                                         ; preds = %.preheader, %.lr.ph26
  %indvars.iv30 = phi i64 [ %indvars.iv.next31, %.lr.ph26 ], [ 0, %.preheader ]
  %.01824 = phi i64 [ %41, %.lr.ph26 ], [ 0, %.preheader ]
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %indvars.iv30) #1
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = mul nsw i64 %indvars.iv30, %28
  %30 = load i32, ptr @M, align 4, !tbaa !5
  %31 = trunc nuw nsw i64 %indvars.iv30 to i32
  %32 = xor i32 %31, -1
  %33 = add i32 %30, %32
  %34 = sext i32 %33 to i64
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %indvars.iv30) #1
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = mul nsw i64 %37, %34
  %39 = add i64 %29, %.01824
  %40 = sub i64 %39, %38
  %41 = srem i64 %40, 1000000007
  %indvars.iv.next31 = add nuw nsw i64 %indvars.iv30, 1
  %42 = load i32, ptr @M, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = icmp slt i64 %indvars.iv.next31, %43
  br i1 %44, label %.lr.ph26, label %._crit_edge, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass