; LLVM IR from Stephane-D/SGDK :: src (timer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @getSubTick() #1

; Function Attrs: nounwind uwtable
define dso_local void @waitSubTick(i64 noundef %0) #1 {
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  %9 = load i64, ptr %2, align 8, !tbaa !5
  %10 = icmp ult i64 %9, 150
  br i1 %10, label %19, label %11

11:                                               ; preds = %1
  %12 = call zeroext i16 @SYS_getInterruptMaskLevel()
  %13 = zext i16 %12 to i32
  %14 = icmp sge i32 %13, 6
  br i1 %14, label %19, label %15

15:                                               ; preds = %11
  %16 = call zeroext i8 @VDP_getHVLatching()
  %17 = zext i8 %16 to i32
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %28

19:                                               ; preds = %15, %11, %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %20 = load i64, ptr %2, align 8, !tbaa !5
  store i64 %20, ptr %3, align 8, !tbaa !5
  br label %21

21:                                               ; preds = %25, %19
  %22 = load i64, ptr %3, align 8, !tbaa !5
  %23 = add i64 %22, -1
  store i64 %23, ptr %3, align 8, !tbaa !5
  %24 = icmp ne i64 %22, 0
  br i1 %24, label %25, label %27

25:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %26 = call i64 asm sideeffect "moveq #7,$0\0A1:\0A\09dbra $0,1b\0A\09", "={dx},~{cc},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !9
  store i64 %26, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  br label %21, !llvm.loop !10

27:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  br label %59

28:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %29 = call i64 @getSubTick()
  store i64 %29, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %30 = load i64, ptr %5, align 8, !tbaa !5
  %31 = load i64, ptr %2, align 8, !tbaa !5
  %32 = add i64 %30, %31
  store i64 %32, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %33 = load i64, ptr %6, align 8, !tbaa !5
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = icmp ult i64 %33, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %28
  store i64 4294967295, ptr %6, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %36, %28
  br label %38

38:                                               ; preds = %54, %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %39 = call i64 @getSubTick()
  store i64 %39, ptr %7, align 8, !tbaa !5
  %40 = load i64, ptr %7, align 8, !tbaa !5
  %41 = load i64, ptr %5, align 8, !tbaa !5
  %42 = icmp ult i64 %40, %41
  br i1 %42, label %43, label %45

43:                                               ; preds = %38
  %44 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %44, ptr %7, align 8, !tbaa !5
  br label %45

45:                                               ; preds = %43, %38
  %46 = load i64, ptr %6, align 8, !tbaa !5
  %47 = load i64, ptr %7, align 8, !tbaa !5
  %48 = sub i64 %46, %47
  store i64 %48, ptr %8, align 8, !tbaa !5
  %49 = load i64, ptr %8, align 8, !tbaa !5
  %50 = icmp sge i64 %49, 1280
  br i1 %50, label %51, label %53

51:                                               ; preds = %45
  %52 = call zeroext i8 @SYS_doVBlankProcess()
  br label %53

53:                                               ; preds = %51, %45
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %54

54:                                               ; preds = %53
  %55 = load i64, ptr %7, align 8, !tbaa !5
  %56 = load i64, ptr %6, align 8, !tbaa !5
  %57 = icmp ult i64 %55, %56
  br i1 %57, label %38, label %58, !llvm.loop !12

58:                                               ; preds = %54
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  br label %59

59:                                               ; preds = %58, %27
  ret void
}

declare zeroext i16 @SYS_getInterruptMaskLevel() #2

declare zeroext i8 @VDP_getHVLatching() #2

declare zeroext i8 @SYS_doVBlankProcess() #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 3432, i64 3466, i64 3470, i64 3504}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i64 @getSubTick() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @waitSubTick(i64 noundef %0) local_unnamed_addr #0 {
  %2 = icmp ult i64 %0, 150
  br i1 %2, label %8, label %3

3:                                                ; preds = %1
  %4 = tail call zeroext i16 @SYS_getInterruptMaskLevel() #3
  %5 = icmp ugt i16 %4, 5
  br i1 %5, label %.lr.ph.preheader, label %6

6:                                                ; preds = %3
  %7 = tail call zeroext i8 @VDP_getHVLatching() #3
  %.not = icmp eq i8 %7, 0
  br i1 %.not, label %11, label %.lr.ph.preheader

8:                                                ; preds = %1
  %.not1921 = icmp eq i64 %0, 0
  br i1 %.not1921, label %.loopexit, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %3, %6, %8
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.022 = phi i64 [ %9, %.lr.ph ], [ %0, %.lr.ph.preheader ]
  %9 = add i64 %.022, -1
  %10 = tail call i64 asm sideeffect "moveq #7,$0\0A1:\0A\09dbra $0,1b\0A\09", "={dx},~{cc},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !5
  %.not19 = icmp eq i64 %9, 0
  br i1 %.not19, label %.loopexit, label %.lr.ph, !llvm.loop !6

11:                                               ; preds = %6
  %12 = tail call i64 @getSubTick()
  %13 = add i64 %12, %0
  %14 = icmp ult i64 %13, %12
  %spec.store.select = select i1 %14, i64 4294967295, i64 %13
  br label %15

15:                                               ; preds = %21, %11
  %16 = tail call i64 @getSubTick()
  %spec.select = tail call i64 @llvm.umax.i64(i64 %16, i64 %12)
  %17 = sub i64 %spec.store.select, %spec.select
  %18 = icmp sgt i64 %17, 1279
  br i1 %18, label %19, label %21

19:                                               ; preds = %15
  %20 = tail call zeroext i8 @SYS_doVBlankProcess() #3
  br label %21

21:                                               ; preds = %19, %15
  %22 = icmp ult i64 %spec.select, %spec.store.select
  br i1 %22, label %15, label %.loopexit, !llvm.loop !8

.loopexit:                                        ; preds = %21, %.lr.ph, %8
  ret void
}

declare zeroext i16 @SYS_getInterruptMaskLevel() local_unnamed_addr #1

declare zeroext i8 @VDP_getHVLatching() local_unnamed_addr #1

declare zeroext i8 @SYS_doVBlankProcess() local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 3432, i64 3466, i64 3470, i64 3504}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = distinct !{!8, !7}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass