; LLVM IR from Stephane-D/SGDK :: src (vdp_tile)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @VDP_fillTileMap(i16 noundef zeroext %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i16 noundef zeroext %3) #1 {
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i16, align 2
  %14 = alloca i64, align 8
  store i16 %0, ptr %5, align 2, !tbaa !5
  store i16 %1, ptr %6, align 2, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !5
  store i16 %3, ptr %8, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #3
  call void @VDP_setAutoInc(i8 noundef zeroext 2)
  store ptr inttoptr (i64 12582916 to ptr), ptr %9, align 8, !tbaa !9
  store ptr inttoptr (i64 12582912 to ptr), ptr %11, align 8, !tbaa !9
  %15 = load i16, ptr %5, align 2, !tbaa !5
  %16 = zext i16 %15 to i32
  %17 = load i16, ptr %7, align 2, !tbaa !5
  %18 = zext i16 %17 to i32
  %19 = mul nsw i32 %18, 2
  %20 = add nsw i32 %16, %19
  %21 = sext i32 %20 to i64
  store i64 %21, ptr %12, align 8, !tbaa !11
  %22 = load i64, ptr %12, align 8, !tbaa !11
  %23 = and i64 %22, 16383
  %24 = add i64 16384, %23
  %25 = shl i64 %24, 16
  %26 = load i64, ptr %12, align 8, !tbaa !11
  %27 = lshr i64 %26, 14
  %28 = or i64 %27, 0
  %29 = add i64 %25, %28
  %30 = load ptr, ptr %9, align 8, !tbaa !9
  store volatile i64 %29, ptr %30, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %31 = load i16, ptr %6, align 2, !tbaa !5
  %32 = zext i16 %31 to i64
  %33 = shl i64 %32, 16
  %34 = load i16, ptr %6, align 2, !tbaa !5
  %35 = zext i16 %34 to i64
  %36 = or i64 %33, %35
  store i64 %36, ptr %14, align 8, !tbaa !11
  %37 = load i16, ptr %8, align 2, !tbaa !5
  %38 = zext i16 %37 to i32
  %39 = ashr i32 %38, 3
  %40 = trunc i32 %39 to i16
  store i16 %40, ptr %13, align 2, !tbaa !5
  br label %41

41:                                               ; preds = %45, %4
  %42 = load i16, ptr %13, align 2, !tbaa !5
  %43 = add i16 %42, -1
  store i16 %43, ptr %13, align 2, !tbaa !5
  %44 = icmp ne i16 %42, 0
  br i1 %44, label %45, label %54

45:                                               ; preds = %41
  %46 = load i64, ptr %14, align 8, !tbaa !11
  %47 = load ptr, ptr %11, align 8, !tbaa !9
  store volatile i64 %46, ptr %47, align 8, !tbaa !11
  %48 = load i64, ptr %14, align 8, !tbaa !11
  %49 = load ptr, ptr %11, align 8, !tbaa !9
  store volatile i64 %48, ptr %49, align 8, !tbaa !11
  %50 = load i64, ptr %14, align 8, !tbaa !11
  %51 = load ptr, ptr %11, align 8, !tbaa !9
  store volatile i64 %50, ptr %51, align 8, !tbaa !11
  %52 = load i64, ptr %14, align 8, !tbaa !11
  %53 = load ptr, ptr %11, align 8, !tbaa !9
  store volatile i64 %52, ptr %53, align 8, !tbaa !11
  br label %41, !llvm.loop !13

54:                                               ; preds = %41
  store ptr inttoptr (i64 12582912 to ptr), ptr %10, align 8, !tbaa !9
  %55 = load i16, ptr %8, align 2, !tbaa !5
  %56 = zext i16 %55 to i32
  %57 = and i32 %56, 7
  %58 = trunc i32 %57 to i16
  store i16 %58, ptr %13, align 2, !tbaa !5
  br label %59

59:                                               ; preds = %63, %54
  %60 = load i16, ptr %13, align 2, !tbaa !5
  %61 = add i16 %60, -1
  store i16 %61, ptr %13, align 2, !tbaa !5
  %62 = icmp ne i16 %60, 0
  br i1 %62, label %63, label %66

63:                                               ; preds = %59
  %64 = load i16, ptr %6, align 2, !tbaa !5
  %65 = load ptr, ptr %10, align 8, !tbaa !9
  store volatile i16 %64, ptr %65, align 2, !tbaa !5
  br label %59, !llvm.loop !15

66:                                               ; preds = %59
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret void
}

declare void @VDP_setAutoInc(i8 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @VDP_fillTileMap(i16 noundef zeroext %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i16 noundef zeroext %3) local_unnamed_addr #0 {
  tail call void @VDP_setAutoInc(i8 noundef zeroext 2) #2
  %5 = zext i16 %0 to i64
  %6 = zext i16 %2 to i64
  %7 = shl nuw nsw i64 %6, 1
  %8 = add nuw nsw i64 %7, %5
  %9 = shl nuw nsw i64 %8, 16
  %10 = and i64 %9, 1073676288
  %11 = lshr i64 %8, 14
  %12 = or disjoint i64 %11, %10
  %13 = or disjoint i64 %12, 1073741824
  store volatile i64 %13, ptr inttoptr (i64 12582916 to ptr), align 8, !tbaa !5
  %14 = zext i16 %1 to i64
  %15 = mul nuw nsw i64 %14, 65537
  %.not21 = icmp ult i16 %3, 8
  br i1 %.not21, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %16 = lshr i16 %3, 3
  %17 = add nsw i16 %16, -1
  %xtraiter = and i16 %16, 3
  %lcmp.mod.not = icmp eq i16 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader, %.lr.ph.prol
  %.022.prol = phi i16 [ %18, %.lr.ph.prol ], [ %16, %.lr.ph.preheader ]
  %prol.iter = phi i16 [ %prol.iter.next, %.lr.ph.prol ], [ 0, %.lr.ph.preheader ]
  %18 = add nsw i16 %.022.prol, -1
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  %prol.iter.next = add i16 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i16 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol, !llvm.loop !9

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader
  %.022.unr = phi i16 [ %16, %.lr.ph.preheader ], [ %18, %.lr.ph.prol ]
  %19 = icmp ult i16 %17, 3
  br i1 %19, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.022 = phi i16 [ %20, %.lr.ph ], [ %.022.unr, %.lr.ph.prol.loopexit ]
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  %20 = add nsw i16 %.022, -4
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  store volatile i64 %15, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !5
  %.not.3 = icmp eq i16 %20, 0
  br i1 %.not.3, label %._crit_edge, label %.lr.ph, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %4
  %21 = and i16 %3, 7
  %.not2023 = icmp eq i16 %21, 0
  br i1 %.not2023, label %._crit_edge27, label %.lr.ph26

.lr.ph26:                                         ; preds = %._crit_edge
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !13
  %.not20 = icmp eq i16 %21, 1
  br i1 %.not20, label %._crit_edge27, label %.lr.ph26.1, !llvm.loop !15

.lr.ph26.1:                                       ; preds = %.lr.ph26
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !13
  %.not20.1 = icmp eq i16 %21, 2
  br i1 %.not20.1, label %._crit_edge27, label %.lr.ph26.2, !llvm.loop !15

.lr.ph26.2:                                       ; preds = %.lr.ph26.1
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !13
  %.not20.2 = icmp eq i16 %21, 3
  br i1 %.not20.2, label %._crit_edge27, label %.lr.ph26.3, !llvm.loop !15

.lr.ph26.3:                                       ; preds = %.lr.ph26.2
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !13
  %.not20.3 = icmp eq i16 %21, 4
  br i1 %.not20.3, label %._crit_edge27, label %.lr.ph26.4, !llvm.loop !15

.lr.ph26.4:                                       ; preds = %.lr.ph26.3
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !13
  %.not20.4 = icmp eq i16 %21, 5
  br i1 %.not20.4, label %._crit_edge27, label %.lr.ph26.5, !llvm.loop !15

.lr.ph26.5:                                       ; preds = %.lr.ph26.4
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !13
  %.not20.5 = icmp eq i16 %21, 6
  br i1 %.not20.5, label %._crit_edge27, label %.lr.ph26.6, !llvm.loop !15

.lr.ph26.6:                                       ; preds = %.lr.ph26.5
  store volatile i16 %1, ptr inttoptr (i64 12582912 to ptr), align 4194304, !tbaa !13
  br label %._crit_edge27

._crit_edge27:                                    ; preds = %.lr.ph26, %.lr.ph26.1, %.lr.ph26.2, %.lr.ph26.3, %.lr.ph26.4, %.lr.ph26.5, %.lr.ph26.6, %._crit_edge
  ret void
}

declare void @VDP_setAutoInc(i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.unroll.disable"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass