; LLVM IR from ROCm/aomp :: test/smoke/nativetests/nativetests.ll_ (nv_ffsll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @__nv_ffsll(i64 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i64 %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %17, %1
  %7 = load i32, ptr %4, align 4, !tbaa !9
  %8 = icmp slt i32 %7, 64
  br i1 %8, label %9, label %20

9:                                                ; preds = %6
  %10 = load i64, ptr %3, align 8, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !9
  %12 = zext i32 %11 to i64
  %13 = shl i64 1, %12
  %14 = and i64 %10, %13
  %15 = icmp ne i64 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %9
  br label %20

17:                                               ; preds = %9
  %18 = load i32, ptr %4, align 4, !tbaa !9
  %19 = add nsw i32 %18, 1
  store i32 %19, ptr %4, align 4, !tbaa !9
  br label %6, !llvm.loop !11

20:                                               ; preds = %16, %6
  %21 = load i32, ptr %4, align 4, !tbaa !9
  %22 = icmp eq i32 %21, 64
  br i1 %22, label %23, label %24

23:                                               ; preds = %20
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %27

24:                                               ; preds = %20
  %25 = load i32, ptr %4, align 4, !tbaa !9
  %26 = add nsw i32 %25, 1
  store i32 %26, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %27

27:                                               ; preds = %24, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %28 = load i32, ptr %2, align 4
  ret i32 %28
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local i32 @__nv_ffsll(i64 noundef %0) local_unnamed_addr #0 {
  br label %2

2:                                                ; preds = %14, %1
  %indvars.iv = phi i64 [ 0, %1 ], [ %indvars.iv.next.3, %14 ]
  %3 = shl nuw i64 1, %indvars.iv
  %4 = and i64 %3, %0
  %.not = icmp eq i64 %4, 0
  br i1 %.not, label %5, label %.split.loop.exit19

5:                                                ; preds = %2
  %6 = shl nuw i64 2, %indvars.iv
  %7 = and i64 %6, %0
  %.not.1 = icmp eq i64 %7, 0
  br i1 %.not.1, label %8, label %.split.loop.exit17

8:                                                ; preds = %5
  %9 = shl nuw i64 4, %indvars.iv
  %10 = and i64 %9, %0
  %.not.2 = icmp eq i64 %10, 0
  br i1 %.not.2, label %11, label %.split.loop.exit15

11:                                               ; preds = %8
  %12 = shl nuw i64 8, %indvars.iv
  %13 = and i64 %12, %0
  %.not.3 = icmp eq i64 %13, 0
  br i1 %.not.3, label %14, label %.split.loop.exit

14:                                               ; preds = %11
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %exitcond.not.3 = icmp eq i64 %indvars.iv.next.3, 64
  br i1 %exitcond.not.3, label %.thread, label %2, !llvm.loop !5

.split.loop.exit:                                 ; preds = %11
  %indvars.iv.next.2.le = or disjoint i64 %indvars.iv, 3
  br label %.split.loop.exit19

.split.loop.exit15:                               ; preds = %8
  %indvars.iv.next.1.le = or disjoint i64 %indvars.iv, 2
  br label %.split.loop.exit19

.split.loop.exit17:                               ; preds = %5
  %indvars.iv.next.le = or disjoint i64 %indvars.iv, 1
  br label %.split.loop.exit19

.split.loop.exit19:                               ; preds = %2, %.split.loop.exit17, %.split.loop.exit15, %.split.loop.exit
  %indvars.iv.lcssa = phi i64 [ %indvars.iv.next.2.le, %.split.loop.exit ], [ %indvars.iv.next.1.le, %.split.loop.exit15 ], [ %indvars.iv.next.le, %.split.loop.exit17 ], [ %indvars.iv, %2 ]
  %15 = trunc nuw nsw i64 %indvars.iv.lcssa to i32
  %16 = icmp eq i64 %indvars.iv.lcssa, 64
  %17 = add nuw nsw i32 %15, 1
  br i1 %16, label %.thread, label %18

.thread:                                          ; preds = %14, %.split.loop.exit19
  br label %18

18:                                               ; preds = %.split.loop.exit19, %.thread
  %19 = phi i32 [ 0, %.thread ], [ %17, %.split.loop.exit19 ]
  ret i32 %19
}

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass