; LLVM IR from xirc/cp-algorithm :: atcoder/abc185/F/main.ll (Z5queryii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@A = external dso_local global %"class.std::vector", align 8
@B = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = add nsw i32 %14, 1000
  %16 = sub nsw i32 %15, 1
  %17 = sdiv i32 %16, 1000
  store i32 %17, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = sdiv i32 %18, 1000
  store i32 %19, ptr %8, align 4, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = icmp sgt i32 %20, %21
  br i1 %22, label %23, label %42

23:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %24 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %24, ptr %9, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %37, %23
  %26 = load i32, ptr %9, align 4, !tbaa !5
  %27 = load i32, ptr %5, align 4, !tbaa !5
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %40

30:                                               ; preds = %25
  %31 = load i32, ptr %9, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %32) #2
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = load i32, ptr %6, align 4, !tbaa !5
  %36 = xor i32 %35, %34
  store i32 %36, ptr %6, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %30
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %9, align 4, !tbaa !5
  br label %25, !llvm.loop !9

40:                                               ; preds = %29
  %41 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %41, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %97

42:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %43 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %43, ptr %11, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %57, %42
  %45 = load i32, ptr %11, align 4, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = mul nsw i32 %46, 1000
  %48 = icmp slt i32 %45, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %44
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  br label %60

50:                                               ; preds = %44
  %51 = load i32, ptr %11, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %52) #2
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = load i32, ptr %6, align 4, !tbaa !5
  %56 = xor i32 %55, %54
  store i32 %56, ptr %6, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %50
  %58 = load i32, ptr %11, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %11, align 4, !tbaa !5
  br label %44, !llvm.loop !11

60:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %61 = load i32, ptr %8, align 4, !tbaa !5
  %62 = mul nsw i32 %61, 1000
  store i32 %62, ptr %12, align 4, !tbaa !5
  br label %63

63:                                               ; preds = %75, %60
  %64 = load i32, ptr %12, align 4, !tbaa !5
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = icmp slt i32 %64, %65
  br i1 %66, label %68, label %67

67:                                               ; preds = %63
  store i32 8, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %78

68:                                               ; preds = %63
  %69 = load i32, ptr %12, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %70) #2
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = load i32, ptr %6, align 4, !tbaa !5
  %74 = xor i32 %73, %72
  store i32 %74, ptr %6, align 4, !tbaa !5
  br label %75

75:                                               ; preds = %68
  %76 = load i32, ptr %12, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %12, align 4, !tbaa !5
  br label %63, !llvm.loop !12

78:                                               ; preds = %67
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %79 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %79, ptr %13, align 4, !tbaa !5
  br label %80

80:                                               ; preds = %92, %78
  %81 = load i32, ptr %13, align 4, !tbaa !5
  %82 = load i32, ptr %8, align 4, !tbaa !5
  %83 = icmp slt i32 %81, %82
  br i1 %83, label %85, label %84

84:                                               ; preds = %80
  store i32 11, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %95

85:                                               ; preds = %80
  %86 = load i32, ptr %13, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %87) #2
  %89 = load i32, ptr %88, align 4, !tbaa !5
  %90 = load i32, ptr %6, align 4, !tbaa !5
  %91 = xor i32 %90, %89
  store i32 %91, ptr %6, align 4, !tbaa !5
  br label %92

92:                                               ; preds = %85
  %93 = load i32, ptr %13, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %13, align 4, !tbaa !5
  br label %80, !llvm.loop !13

95:                                               ; preds = %84
  %96 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %96, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %97

97:                                               ; preds = %95, %40
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %98 = load i32, ptr %3, align 4
  ret i32 %98
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@A = external dso_local global %"class.std::vector", align 8
@B = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = add nsw i32 %0, 999
  %4 = sdiv i32 %3, 1000
  %5 = sdiv i32 %1, 1000
  %6 = icmp sgt i32 %4, %5
  br i1 %6, label %.preheader, label %.preheader40

.preheader40:                                     ; preds = %2
  %7 = mul nsw i32 %4, 1000
  %8 = icmp sgt i32 %7, %0
  br i1 %8, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %.preheader40
  %9 = sext i32 %0 to i64
  br label %.lr.ph

.preheader:                                       ; preds = %2
  %10 = icmp slt i32 %0, %1
  br i1 %10, label %.lr.ph54.preheader, label %.loopexit

.lr.ph54.preheader:                               ; preds = %.preheader
  %11 = sext i32 %0 to i64
  br label %.lr.ph54

.lr.ph54:                                         ; preds = %.lr.ph54.preheader, %.lr.ph54
  %indvars.iv70 = phi i64 [ %11, %.lr.ph54.preheader ], [ %indvars.iv.next71, %.lr.ph54 ]
  %.03552 = phi i32 [ 0, %.lr.ph54.preheader ], [ %14, %.lr.ph54 ]
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv70) #1
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = xor i32 %13, %.03552
  %indvars.iv.next71 = add nsw i64 %indvars.iv70, 1
  %lftr.wideiv73 = trunc i64 %indvars.iv.next71 to i32
  %exitcond74.not = icmp eq i32 %lftr.wideiv73, %1
  br i1 %exitcond74.not, label %.loopexit, label %.lr.ph54, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %.preheader40
  %.1.lcssa = phi i32 [ 0, %.preheader40 ], [ %20, %.lr.ph ]
  %15 = mul nsw i32 %5, 1000
  %16 = icmp slt i32 %15, %1
  br i1 %16, label %.lr.ph46.preheader, label %.preheader38

.lr.ph46.preheader:                               ; preds = %._crit_edge
  %17 = sext i32 %15 to i64
  br label %.lr.ph46

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %9, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.141 = phi i32 [ 0, %.lr.ph.preheader ], [ %20, %.lr.ph ]
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = xor i32 %19, %.141
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %7, %lftr.wideiv
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

.preheader38:                                     ; preds = %.lr.ph46, %._crit_edge
  %.2.lcssa = phi i32 [ %.1.lcssa, %._crit_edge ], [ %25, %.lr.ph46 ]
  %21 = icmp slt i32 %4, %5
  br i1 %21, label %.lr.ph50.preheader, label %.loopexit

.lr.ph50.preheader:                               ; preds = %.preheader38
  %22 = sext i32 %4 to i64
  %wide.trip.count = sext i32 %5 to i64
  br label %.lr.ph50

.lr.ph46:                                         ; preds = %.lr.ph46.preheader, %.lr.ph46
  %indvars.iv61 = phi i64 [ %17, %.lr.ph46.preheader ], [ %indvars.iv.next62, %.lr.ph46 ]
  %.243 = phi i32 [ %.1.lcssa, %.lr.ph46.preheader ], [ %25, %.lr.ph46 ]
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @A, i64 noundef %indvars.iv61) #1
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = xor i32 %24, %.243
  %indvars.iv.next62 = add nsw i64 %indvars.iv61, 1
  %lftr.wideiv64 = trunc i64 %indvars.iv.next62 to i32
  %exitcond65.not = icmp eq i32 %lftr.wideiv64, %1
  br i1 %exitcond65.not, label %.preheader38, label %.lr.ph46, !llvm.loop !12

.lr.ph50:                                         ; preds = %.lr.ph50.preheader, %.lr.ph50
  %indvars.iv66 = phi i64 [ %22, %.lr.ph50.preheader ], [ %indvars.iv.next67, %.lr.ph50 ]
  %.348 = phi i32 [ %.2.lcssa, %.lr.ph50.preheader ], [ %28, %.lr.ph50 ]
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @B, i64 noundef %indvars.iv66) #1
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = xor i32 %27, %.348
  %indvars.iv.next67 = add nsw i64 %indvars.iv66, 1
  %exitcond69.not = icmp eq i64 %indvars.iv.next67, %wide.trip.count
  br i1 %exitcond69.not, label %.loopexit, label %.lr.ph50, !llvm.loop !13

.loopexit:                                        ; preds = %.lr.ph50, %.lr.ph54, %.preheader38, %.preheader
  %.034 = phi i32 [ 0, %.preheader ], [ %.2.lcssa, %.preheader38 ], [ %14, %.lr.ph54 ], [ %28, %.lr.ph50 ]
  ret i32 %.034
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass