; LLVM IR from xirc/cp-algorithm :: spoj/tdprimes/main.ll (Z5buildv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>
%"struct.std::_Bit_reference" = type { ptr, i64 }

@prime_table = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildv() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca %"struct.std::_Bit_reference", align 8
  %4 = alloca i32, align 4
  %5 = alloca %"struct.std::_Bit_reference", align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 3, ptr %1, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %50, %0
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = load i32, ptr %1, align 4, !tbaa !5
  %9 = mul nsw i32 %7, %8
  %10 = icmp slt i32 %9, 100000001
  br i1 %10, label %12, label %11

11:                                               ; preds = %6
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %53

12:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 16, ptr %3) #3
  %13 = load i32, ptr %1, align 4, !tbaa !5
  %14 = sdiv i32 %13, 2
  %15 = sub nsw i32 %14, 1
  %16 = sext i32 %15 to i64
  %17 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @prime_table, i64 noundef %16)
  %18 = getelementptr inbounds { ptr, i64 }, ptr %3, i32 0, i32 0
  %19 = extractvalue { ptr, i64 } %17, 0
  store ptr %19, ptr %18, align 8
  %20 = getelementptr inbounds { ptr, i64 }, ptr %3, i32 0, i32 1
  %21 = extractvalue { ptr, i64 } %17, 1
  store i64 %21, ptr %20, align 8
  %22 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %3) #3
  %23 = xor i1 %22, true
  call void @llvm.lifetime.end.p0(i64 16, ptr %3) #3
  br i1 %23, label %24, label %25

24:                                               ; preds = %12
  br label %50

25:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %26 = load i32, ptr %1, align 4, !tbaa !5
  %27 = load i32, ptr %1, align 4, !tbaa !5
  %28 = mul nsw i32 %26, %27
  store i32 %28, ptr %4, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %44, %25
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = icmp slt i32 %30, 100000001
  br i1 %31, label %33, label %32

32:                                               ; preds = %29
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %49

33:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 16, ptr %5) #3
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = sdiv i32 %34, 2
  %36 = sub nsw i32 %35, 1
  %37 = sext i32 %36 to i64
  %38 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @prime_table, i64 noundef %37)
  %39 = getelementptr inbounds { ptr, i64 }, ptr %5, i32 0, i32 0
  %40 = extractvalue { ptr, i64 } %38, 0
  store ptr %40, ptr %39, align 8
  %41 = getelementptr inbounds { ptr, i64 }, ptr %5, i32 0, i32 1
  %42 = extractvalue { ptr, i64 } %38, 1
  store i64 %42, ptr %41, align 8
  %43 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %5, i1 noundef zeroext false) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %5) #3
  br label %44

44:                                               ; preds = %33
  %45 = load i32, ptr %1, align 4, !tbaa !5
  %46 = mul nsw i32 2, %45
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = add nsw i32 %47, %46
  store i32 %48, ptr %4, align 4, !tbaa !5
  br label %29, !llvm.loop !9

49:                                               ; preds = %32
  br label %50

50:                                               ; preds = %49, %24
  %51 = load i32, ptr %1, align 4, !tbaa !5
  %52 = add nsw i32 %51, 2
  store i32 %52, ptr %1, align 4, !tbaa !5
  br label %6, !llvm.loop !11

53:                                               ; preds = %11
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>
%"struct.std::_Bit_reference" = type { ptr, i64 }

@prime_table = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildv() local_unnamed_addr #1 {
  %1 = alloca %"struct.std::_Bit_reference", align 8
  %2 = alloca %"struct.std::_Bit_reference", align 8
  %3 = getelementptr inbounds i8, ptr %1, i64 8
  %4 = getelementptr inbounds i8, ptr %2, i64 8
  br label %6

5:                                                ; preds = %.loopexit
  ret void

6:                                                ; preds = %0, %.loopexit
  %indvars.iv = phi i64 [ 3, %0 ], [ %indvars.iv.next, %.loopexit ]
  %7 = phi i32 [ 9, %0 ], [ %28, %.loopexit ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #3
  %8 = lshr i64 %indvars.iv, 1
  %9 = add nsw i64 %8, -1
  %10 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @prime_table, i64 noundef %9)
  %11 = extractvalue { ptr, i64 } %10, 0
  store ptr %11, ptr %1, align 8
  %12 = extractvalue { ptr, i64 } %10, 1
  store i64 %12, ptr %3, align 8
  %13 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %1) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #3
  %14 = icmp ult i32 %7, 100000001
  %or.cond = and i1 %13, %14
  br i1 %or.cond, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %6
  %indvars.iv.tr = trunc i64 %indvars.iv to i32
  %15 = shl i32 %indvars.iv.tr, 1
  br label %16

16:                                               ; preds = %.lr.ph, %16
  %.012 = phi i32 [ %7, %.lr.ph ], [ %24, %16 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
  %17 = lshr i32 %.012, 1
  %18 = add nsw i32 %17, -1
  %19 = sext i32 %18 to i64
  %20 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) @prime_table, i64 noundef %19)
  %21 = extractvalue { ptr, i64 } %20, 0
  store ptr %21, ptr %2, align 8
  %22 = extractvalue { ptr, i64 } %20, 1
  store i64 %22, ptr %4, align 8
  %23 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %2, i1 noundef zeroext false) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3
  %24 = add nuw nsw i32 %.012, %15
  %25 = icmp ult i32 %24, 100000001
  br i1 %25, label %16, label %.loopexit, !llvm.loop !5

.loopexit:                                        ; preds = %16, %6
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
  %26 = mul nuw nsw i64 %indvars.iv.next, %indvars.iv.next
  %27 = icmp ult i64 %26, 100000001
  %28 = trunc nuw i64 %26 to i32
  br i1 %27, label %6, label %5, !llvm.loop !7
}

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass