; LLVM IR from eyangch/competitive-programming :: USACOtraining/2.1/castle.ll (Z3cvtiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [50 x %"struct.std::array.0"] }
%"struct.std::array.0" = type { [50 x %"struct.std::array.1"] }
%"struct.std::array.1" = type { [4 x i8] }
%"struct.std::array.2" = type { [50 x %"struct.std::array.3"] }
%"struct.std::array.3" = type { [50 x i8] }

@walls = external dso_local global %"struct.std::array", align 1
@visited = external dso_local global %"struct.std::array.2", align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z10decodewalliiRiii(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3cvtiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %8 = load i32, ptr %5, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = call noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500) @visited, i64 noundef %9) #2
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50) %10, i64 noundef %12) #2
  store i8 0, ptr %13, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %28, %3
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = icmp slt i32 %15, 4
  br i1 %16, label %18, label %17

17:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %31

18:                                               ; preds = %14
  %19 = load i32, ptr %5, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %20) #2
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %21, i64 noundef %23) #2
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %24, i64 noundef %26) #2
  store i8 0, ptr %27, align 1, !tbaa !9
  br label %28

28:                                               ; preds = %18
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %7, align 4, !tbaa !5
  br label %14, !llvm.loop !11

31:                                               ; preds = %17
  %32 = load i32, ptr %5, align 4, !tbaa !5
  %33 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z10decodewalliiRiii(i32 noundef %32, i32 noundef %33, ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef 8, i32 noundef 3)
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z10decodewalliiRiii(i32 noundef %34, i32 noundef %35, ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef 4, i32 noundef 2)
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z10decodewalliiRiii(i32 noundef %36, i32 noundef %37, ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef 2, i32 noundef 1)
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z10decodewalliiRiii(i32 noundef %38, i32 noundef %39, ptr noundef nonnull align 4 dereferenceable(4) %6, i32 noundef 1, i32 noundef 0)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array" = type { [50 x %"struct.std::array.0"] }
%"struct.std::array.0" = type { [50 x %"struct.std::array.1"] }
%"struct.std::array.1" = type { [4 x i8] }
%"struct.std::array.2" = type { [50 x %"struct.std::array.3"] }
%"struct.std::array.3" = type { [50 x i8] }

@walls = external dso_local global %"struct.std::array", align 1
@visited = external dso_local global %"struct.std::array.2", align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z10decodewalliiRiii(i32 noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4), i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3cvtiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  store i32 %2, ptr %4, align 4, !tbaa !5
  %5 = sext i32 %1 to i64
  %6 = tail call noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500) @visited, i64 noundef %5) #1
  %7 = sext i32 %0 to i64
  %8 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50) %6, i64 noundef %7) #1
  store i8 0, ptr %8, align 1, !tbaa !9
  %9 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %10 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %9, i64 noundef %7) #1
  %11 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %10, i64 noundef 0) #1
  store i8 0, ptr %11, align 1, !tbaa !9
  %12 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %13 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %12, i64 noundef %7) #1
  %14 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %13, i64 noundef 1) #1
  store i8 0, ptr %14, align 1, !tbaa !9
  %15 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %16 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %15, i64 noundef %7) #1
  %17 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %16, i64 noundef 2) #1
  store i8 0, ptr %17, align 1, !tbaa !9
  %18 = tail call noundef nonnull align 1 dereferenceable(200) ptr @_ZNSt5arrayIS_IS_IbLm4EELm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(10000) @walls, i64 noundef %5) #1
  %19 = tail call noundef nonnull align 1 dereferenceable(4) ptr @_ZNSt5arrayIS_IbLm4EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(200) %18, i64 noundef %7) #1
  %20 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm4EEixEm(ptr noundef nonnull align 1 dereferenceable(4) %19, i64 noundef 3) #1
  store i8 0, ptr %20, align 1, !tbaa !9
  call void @_Z10decodewalliiRiii(i32 noundef %1, i32 noundef %0, ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef 8, i32 noundef 3)
  call void @_Z10decodewalliiRiii(i32 noundef %1, i32 noundef %0, ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef 4, i32 noundef 2)
  call void @_Z10decodewalliiRiii(i32 noundef %1, i32 noundef %0, ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef 2, i32 noundef 1)
  call void @_Z10decodewalliiRiii(i32 noundef %1, i32 noundef %0, ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef 1, i32 noundef 0)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(50) ptr @_ZNSt5arrayIS_IbLm50EELm50EEixEm(ptr noundef nonnull align 1 dereferenceable(2500), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt5arrayIbLm50EEixEm(ptr noundef nonnull align 1 dereferenceable(50), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass