; LLVM IR from HarshCasper/NeoAlgo :: C-Plus-Plus/dp/Staircase.ll (Z9staircasei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z9staircasei(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = add nsw i32 %9, 1
  %11 = sext i32 %10 to i64
  %12 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %11, i64 8)
  %13 = extractvalue { i64, i1 } %12, 1
  %14 = extractvalue { i64, i1 } %12, 0
  %15 = select i1 %13, i64 -1, i64 %14
  %16 = call noalias noundef nonnull ptr @_Znam(i64 noundef %15) #6
  store ptr %16, ptr %3, align 8, !tbaa !9
  %17 = load ptr, ptr %3, align 8, !tbaa !9
  %18 = getelementptr inbounds i64, ptr %17, i64 0
  store i64 1, ptr %18, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %67, %1
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = load i32, ptr %2, align 4, !tbaa !5
  %22 = icmp sle i32 %20, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %70

24:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  store i64 0, ptr %5, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  store i64 0, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store i64 0, ptr %7, align 8, !tbaa !11
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sub nsw i32 %25, 1
  %27 = icmp sge i32 %26, 0
  br i1 %27, label %28, label %35

28:                                               ; preds = %24
  %29 = load ptr, ptr %3, align 8, !tbaa !9
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = sub nsw i32 %30, 1
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds i64, ptr %29, i64 %32
  %34 = load i64, ptr %33, align 8, !tbaa !11
  store i64 %34, ptr %5, align 8, !tbaa !11
  br label %35

35:                                               ; preds = %28, %24
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = sub nsw i32 %36, 2
  %38 = icmp sge i32 %37, 0
  br i1 %38, label %39, label %46

39:                                               ; preds = %35
  %40 = load ptr, ptr %3, align 8, !tbaa !9
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = sub nsw i32 %41, 2
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds i64, ptr %40, i64 %43
  %45 = load i64, ptr %44, align 8, !tbaa !11
  store i64 %45, ptr %6, align 8, !tbaa !11
  br label %46

46:                                               ; preds = %39, %35
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = sub nsw i32 %47, 3
  %49 = icmp sge i32 %48, 0
  br i1 %49, label %50, label %57

50:                                               ; preds = %46
  %51 = load ptr, ptr %3, align 8, !tbaa !9
  %52 = load i32, ptr %4, align 4, !tbaa !5
  %53 = sub nsw i32 %52, 3
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds i64, ptr %51, i64 %54
  %56 = load i64, ptr %55, align 8, !tbaa !11
  store i64 %56, ptr %7, align 8, !tbaa !11
  br label %57

57:                                               ; preds = %50, %46
  %58 = load i64, ptr %5, align 8, !tbaa !11
  %59 = load i64, ptr %6, align 8, !tbaa !11
  %60 = add nsw i64 %58, %59
  %61 = load i64, ptr %7, align 8, !tbaa !11
  %62 = add nsw i64 %60, %61
  %63 = load ptr, ptr %3, align 8, !tbaa !9
  %64 = load i32, ptr %4, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds i64, ptr %63, i64 %65
  store i64 %62, ptr %66, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  br label %67

67:                                               ; preds = %57
  %68 = load i32, ptr %4, align 4, !tbaa !5
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %4, align 4, !tbaa !5
  br label %19, !llvm.loop !13

70:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %71 = load ptr, ptr %3, align 8, !tbaa !9
  %72 = load i32, ptr %2, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds i64, ptr %71, i64 %73
  %75 = load i64, ptr %74, align 8, !tbaa !11
  store i64 %75, ptr %8, align 8, !tbaa !11
  %76 = load ptr, ptr %3, align 8, !tbaa !9
  %77 = icmp eq ptr %76, null
  br i1 %77, label %79, label %78

78:                                               ; preds = %70
  call void @_ZdaPv(ptr noundef %76) #7
  br label %79

79:                                               ; preds = %78, %70
  %80 = load i64, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  ret i64 %80
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z9staircasei(i32 noundef %0) local_unnamed_addr #0 {
  %2 = add i32 %0, 1
  %3 = zext i32 %2 to i64
  %4 = icmp slt i32 %0, -1
  %5 = shl nuw nsw i64 %3, 3
  %6 = select i1 %4, i64 -1, i64 %5
  %7 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %6) #3
  store i64 1, ptr %7, align 8, !tbaa !5
  %.not32 = icmp slt i32 %0, 1
  br i1 %.not32, label %._crit_edge, label %.thread.peel

.thread.peel:                                     ; preds = %1
  %8 = getelementptr i8, ptr %7, i64 8
  store i64 1, ptr %8, align 8, !tbaa !5
  %exitcond.peel.not = icmp eq i32 %2, 2
  br i1 %exitcond.peel.not, label %._crit_edge, label %.thread.peel38

.thread.peel38:                                   ; preds = %.thread.peel
  %9 = getelementptr i8, ptr %7, i64 16
  store i64 2, ptr %9, align 8, !tbaa !5
  %exitcond.peel42.not = icmp eq i32 %2, 3
  br i1 %exitcond.peel42.not, label %._crit_edge, label %.thread.preheader

.thread.preheader:                                ; preds = %.thread.peel38
  %scevgep = getelementptr i8, ptr %7, i64 16
  %load_initial = load i64, ptr %scevgep, align 8
  %10 = add nsw i64 %3, -3
  %xtraiter = and i64 %10, 1
  %11 = icmp eq i32 %2, 4
  br i1 %11, label %._crit_edge.loopexit.unr-lcssa, label %.thread.preheader.new

.thread.preheader.new:                            ; preds = %.thread.preheader
  %unroll_iter = and i64 %10, -2
  br label %.thread

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.thread, %.thread.preheader
  %store_forwarded.unr = phi i64 [ %load_initial, %.thread.preheader ], [ %34, %.thread ]
  %indvars.iv.unr = phi i64 [ 3, %.thread.preheader ], [ %indvars.iv.next.1, %.thread ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.thread.epil

.thread.epil:                                     ; preds = %._crit_edge.loopexit.unr-lcssa
  %12 = getelementptr i64, ptr %7, i64 %indvars.iv.unr
  %13 = getelementptr i8, ptr %12, i64 -16
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %15 = getelementptr i8, ptr %12, i64 -24
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = add nsw i64 %14, %store_forwarded.unr
  %18 = add nsw i64 %17, %16
  store i64 %18, ptr %12, align 8, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %.thread.epil, %._crit_edge.loopexit.unr-lcssa, %.thread.peel, %.thread.peel38, %1
  %19 = sext i32 %0 to i64
  %20 = getelementptr inbounds i64, ptr %7, i64 %19
  %21 = load i64, ptr %20, align 8, !tbaa !5
  tail call void @_ZdaPv(ptr noundef nonnull %7) #4
  ret i64 %21

.thread:                                          ; preds = %.thread, %.thread.preheader.new
  %store_forwarded = phi i64 [ %load_initial, %.thread.preheader.new ], [ %34, %.thread ]
  %indvars.iv = phi i64 [ 3, %.thread.preheader.new ], [ %indvars.iv.next.1, %.thread ]
  %niter = phi i64 [ 0, %.thread.preheader.new ], [ %niter.next.1, %.thread ]
  %22 = getelementptr i64, ptr %7, i64 %indvars.iv
  %23 = getelementptr i8, ptr %22, i64 -16
  %24 = load i64, ptr %23, align 8, !tbaa !5
  %25 = getelementptr i8, ptr %22, i64 -24
  %26 = load i64, ptr %25, align 8, !tbaa !5
  %27 = add nsw i64 %24, %store_forwarded
  %28 = add nsw i64 %27, %26
  store i64 %28, ptr %22, align 8, !tbaa !5
  %29 = getelementptr i64, ptr %7, i64 %indvars.iv
  %30 = getelementptr i8, ptr %29, i64 8
  %31 = getelementptr i8, ptr %29, i64 -8
  %32 = load i64, ptr %31, align 8, !tbaa !5
  %33 = add nsw i64 %32, %28
  %34 = add nsw i64 %33, %24
  store i64 %34, ptr %30, align 8, !tbaa !5
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.thread, !llvm.loop !9
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #1

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPv(ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { builtin allocsize(0) }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.peeled.count", i32 2}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopFullUnrollPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass