; LLVM IR from xirc/cp-algorithm :: atcoder/abc181/C/main.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@xs = external dso_local global %"class.std::vector", align 8
@ys = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvev() #0 {
  %1 = alloca i1, align 1
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %98, %0
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = load i32, ptr @N, align 4, !tbaa !5
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  store i32 2, ptr %3, align 4
  br label %101

13:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %92, %13
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = load i32, ptr @N, align 4, !tbaa !5
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 5, ptr %3, align 4
  br label %95

19:                                               ; preds = %14
  %20 = load i32, ptr %2, align 4, !tbaa !5
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = icmp eq i32 %20, %21
  br i1 %22, label %23, label %24

23:                                               ; preds = %19
  br label %92

24:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %86, %24
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = load i32, ptr @N, align 4, !tbaa !5
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %25
  store i32 8, ptr %3, align 4
  br label %89

30:                                               ; preds = %25
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = load i32, ptr %2, align 4, !tbaa !5
  %33 = icmp eq i32 %31, %32
  br i1 %33, label %38, label %34

34:                                               ; preds = %30
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = icmp eq i32 %35, %36
  br i1 %37, label %38, label %39

38:                                               ; preds = %34, %30
  br label %86

39:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %41) #2
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = load i32, ptr %2, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = sub nsw i32 %43, %47
  %49 = load i32, ptr %5, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %50) #2
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %54) #2
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = sub nsw i32 %52, %56
  %58 = mul nsw i32 %48, %57
  store i32 %58, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %59 = load i32, ptr %5, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %60) #2
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %63 = load i32, ptr %4, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %64) #2
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = sub nsw i32 %62, %66
  %68 = load i32, ptr %4, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %69) #2
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %72 = load i32, ptr %2, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %73) #2
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = sub nsw i32 %71, %75
  %77 = mul nsw i32 %67, %76
  store i32 %77, ptr %7, align 4, !tbaa !5
  %78 = load i32, ptr %6, align 4, !tbaa !5
  %79 = load i32, ptr %7, align 4, !tbaa !5
  %80 = icmp eq i32 %78, %79
  br i1 %80, label %81, label %82

81:                                               ; preds = %39
  store i1 true, ptr %1, align 1
  store i32 1, ptr %3, align 4
  br label %83

82:                                               ; preds = %39
  store i32 0, ptr %3, align 4
  br label %83

83:                                               ; preds = %82, %81
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %84 = load i32, ptr %3, align 4
  switch i32 %84, label %89 [
    i32 0, label %85
  ]

85:                                               ; preds = %83
  br label %86

86:                                               ; preds = %85, %38
  %87 = load i32, ptr %5, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %5, align 4, !tbaa !5
  br label %25, !llvm.loop !9

89:                                               ; preds = %83, %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  %90 = load i32, ptr %3, align 4
  switch i32 %90, label %95 [
    i32 8, label %91
  ]

91:                                               ; preds = %89
  br label %92

92:                                               ; preds = %91, %23
  %93 = load i32, ptr %4, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %4, align 4, !tbaa !5
  br label %14, !llvm.loop !11

95:                                               ; preds = %89, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %96 = load i32, ptr %3, align 4
  switch i32 %96, label %101 [
    i32 5, label %97
  ]

97:                                               ; preds = %95
  br label %98

98:                                               ; preds = %97
  %99 = load i32, ptr %2, align 4, !tbaa !5
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %2, align 4, !tbaa !5
  br label %8, !llvm.loop !12

101:                                              ; preds = %95, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  %102 = load i32, ptr %3, align 4
  switch i32 %102, label %106 [
    i32 2, label %103
    i32 1, label %104
  ]

103:                                              ; preds = %101
  store i1 false, ptr %1, align 1
  br label %104

104:                                              ; preds = %103, %101
  %105 = load i1, ptr %1, align 1
  ret i1 %105

106:                                              ; preds = %101
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@xs = external dso_local global %"class.std::vector", align 8
@ys = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5solvev() local_unnamed_addr #0 {
  %1 = load i32, ptr @N, align 4
  %.not4051 = icmp sgt i32 %1, 0
  br i1 %.not4051, label %.preheader42, label %.loopexit41

.preheader42:                                     ; preds = %0, %._crit_edge
  %2 = phi i32 [ %44, %._crit_edge ], [ %1, %0 ]
  %indvars.iv62 = phi i64 [ %indvars.iv.next63, %._crit_edge ], [ 0, %0 ]
  %3 = icmp sgt i32 %2, 0
  br i1 %3, label %.lr.ph50, label %._crit_edge

.lr.ph50:                                         ; preds = %.preheader42, %.loopexit
  %4 = phi i32 [ %40, %.loopexit ], [ %2, %.preheader42 ]
  %5 = phi i32 [ %41, %.loopexit ], [ %2, %.preheader42 ]
  %indvars.iv59 = phi i64 [ %indvars.iv.next60, %.loopexit ], [ 0, %.preheader42 ]
  %6 = icmp ne i64 %indvars.iv62, %indvars.iv59
  %.not3546 = icmp sgt i32 %5, 0
  %or.cond54 = and i1 %6, %.not3546
  br i1 %or.cond54, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.lr.ph50, %35
  %7 = phi i32 [ %36, %35 ], [ %4, %.lr.ph50 ]
  %8 = phi i32 [ %37, %35 ], [ %5, %.lr.ph50 ]
  %9 = phi i32 [ %38, %35 ], [ %5, %.lr.ph50 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %35 ], [ 0, %.lr.ph50 ]
  %10 = icmp eq i64 %indvars.iv, %indvars.iv62
  %11 = icmp eq i64 %indvars.iv, %indvars.iv59
  %or.cond = or i1 %10, %11
  br i1 %or.cond, label %35, label %12

12:                                               ; preds = %.lr.ph
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %indvars.iv59) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %indvars.iv62) #1
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = sub nsw i32 %14, %16
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %indvars.iv) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %indvars.iv59) #1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = sub nsw i32 %19, %21
  %23 = mul nsw i32 %22, %17
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %indvars.iv) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ys, i64 noundef %indvars.iv59) #1
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = sub nsw i32 %25, %27
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %indvars.iv59) #1
  %30 = load i32, ptr %29, align 4, !tbaa !5
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @xs, i64 noundef %indvars.iv62) #1
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = sub nsw i32 %30, %32
  %34 = mul nsw i32 %33, %28
  %.not = icmp eq i32 %23, %34
  br i1 %.not, label %.loopexit41, label %._crit_edge64

._crit_edge64:                                    ; preds = %12
  %.pre = load i32, ptr @N, align 4
  br label %35

35:                                               ; preds = %._crit_edge64, %.lr.ph
  %36 = phi i32 [ %.pre, %._crit_edge64 ], [ %7, %.lr.ph ]
  %37 = phi i32 [ %.pre, %._crit_edge64 ], [ %8, %.lr.ph ]
  %38 = phi i32 [ %.pre, %._crit_edge64 ], [ %9, %.lr.ph ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %39 = sext i32 %38 to i64
  %.not35 = icmp slt i64 %indvars.iv.next, %39
  br i1 %.not35, label %.lr.ph, label %.loopexit, !llvm.loop !9

.loopexit:                                        ; preds = %35, %.lr.ph50
  %40 = phi i32 [ %4, %.lr.ph50 ], [ %36, %35 ]
  %41 = phi i32 [ %5, %.lr.ph50 ], [ %37, %35 ]
  %indvars.iv.next60 = add nuw nsw i64 %indvars.iv59, 1
  %42 = sext i32 %41 to i64
  %43 = icmp slt i64 %indvars.iv.next60, %42
  br i1 %43, label %.lr.ph50, label %._crit_edge, !llvm.loop !11

._crit_edge:                                      ; preds = %.loopexit, %.preheader42
  %44 = phi i32 [ %2, %.preheader42 ], [ %40, %.loopexit ]
  %indvars.iv.next63 = add nuw nsw i64 %indvars.iv62, 1
  %45 = sext i32 %44 to i64
  %.not40 = icmp slt i64 %indvars.iv.next63, %45
  br i1 %.not40, label %.preheader42, label %.loopexit41, !llvm.loop !12

.loopexit41:                                      ; preds = %._crit_edge, %12, %0
  %.not4045 = phi i1 [ false, %0 ], [ true, %12 ], [ false, %._crit_edge ]
  ret i1 %.not4045
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10, !13}
!13 = !{!"llvm.loop.unswitch.partial.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass