; LLVM IR from xirc/cp-algorithm :: atcoder/arc107/B/main.ll (Z5solveii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z1fii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solveii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  store i64 0, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 2, ptr %6, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %27, %2
  %8 = load i32, ptr %6, align 4, !tbaa !5
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = mul nsw i32 2, %9
  %11 = icmp sle i32 %8, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %30

13:                                               ; preds = %7
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = call noundef i32 @_Z1fii(i32 noundef %14, i32 noundef %15)
  %17 = sext i32 %16 to i64
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = load i32, ptr %6, align 4, !tbaa !5
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = sub nsw i32 %19, %20
  %22 = call noundef i32 @_Z1fii(i32 noundef %18, i32 noundef %21)
  %23 = sext i32 %22 to i64
  %24 = mul nsw i64 %17, %23
  %25 = load i64, ptr %5, align 8, !tbaa !9
  %26 = add nsw i64 %25, %24
  store i64 %26, ptr %5, align 8, !tbaa !9
  br label %27

27:                                               ; preds = %13
  %28 = load i32, ptr %6, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %6, align 4, !tbaa !5
  br label %7, !llvm.loop !11

30:                                               ; preds = %12
  %31 = load i64, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret i64 %31
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z1fii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solveii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not11 = icmp slt i32 %0, 1
  br i1 %.not11, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %3 = shl nuw i32 %0, 1
  %smax = tail call i32 @llvm.smax.i32(i32 %3, i32 2)
  br label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %2
  %.010.lcssa = phi i64 [ 0, %2 ], [ %10, %.lr.ph ]
  ret i64 %.010.lcssa

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.013 = phi i32 [ %11, %.lr.ph ], [ 2, %.lr.ph.preheader ]
  %.01012 = phi i64 [ %10, %.lr.ph ], [ 0, %.lr.ph.preheader ]
  %4 = tail call noundef i32 @_Z1fii(i32 noundef %0, i32 noundef %.013)
  %5 = sext i32 %4 to i64
  %6 = sub nsw i32 %.013, %1
  %7 = tail call noundef i32 @_Z1fii(i32 noundef %0, i32 noundef %6)
  %8 = sext i32 %7 to i64
  %9 = mul nsw i64 %8, %5
  %10 = add nsw i64 %9, %.01012
  %11 = add nuw nsw i32 %.013, 1
  %exitcond.not = icmp eq i32 %.013, %smax
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass