; LLVM IR from VAR-solutions/Algorithms :: Tree/Heavy Light Decomposition/hld.ll (Z3hldii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@t = external dso_local global [100001 x %"class.std::vector"], align 16
@nxt = external dso_local global [100001 x i32], align 16
@chain = external dso_local global [100001 x i32], align 16
@szc = external dso_local global [100001 x i32], align 16
@st = external dso_local global [100001 x i32], align 16
@top = external dso_local global [100001 x i32], align 16
@nd = external dso_local global i32, align 4
@tim = external dso_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3hldii(i32 noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %8 = load i32, ptr @nd, align 4, !tbaa !5
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = getelementptr inbounds [100001 x i32], ptr @chain, i64 0, i64 %10
  store i32 %8, ptr %11, align 4, !tbaa !5
  %12 = load i32, ptr @tim, align 4, !tbaa !5
  %13 = add nsw i32 %12, 1
  store i32 %13, ptr @tim, align 4, !tbaa !5
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [100001 x i32], ptr @st, i64 0, i64 %15
  store i32 %13, ptr %16, align 4, !tbaa !5
  %17 = load i32, ptr @nd, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [100001 x i32], ptr @szc, i64 0, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %27, label %22

22:                                               ; preds = %2
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = load i32, ptr @nd, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [100001 x i32], ptr @top, i64 0, i64 %25
  store i32 %23, ptr %26, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %22, %2
  %28 = load i32, ptr @nd, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [100001 x i32], ptr @szc, i64 0, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %30, align 4, !tbaa !5
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [100001 x i32], ptr @nxt, i64 0, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = icmp ne i32 %36, -1
  br i1 %37, label %38, label %44

38:                                               ; preds = %27
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [100001 x i32], ptr @nxt, i64 0, i64 %40
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = load i32, ptr %3, align 4, !tbaa !5
  call void @_Z3hldii(i32 noundef %42, i32 noundef %43)
  br label %44

44:                                               ; preds = %38, %27
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %81, %44
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = load i32, ptr %3, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [100001 x %"class.std::vector"], ptr @t, i64 0, i64 %49
  %51 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %50) #3
  %52 = icmp ult i64 %47, %51
  br i1 %52, label %54, label %53

53:                                               ; preds = %45
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %84

54:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %55 = load i32, ptr %3, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [100001 x %"class.std::vector"], ptr @t, i64 0, i64 %56
  %58 = load i32, ptr %5, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #3
  %61 = load i32, ptr %60, align 4, !tbaa !5
  store i32 %61, ptr %7, align 4, !tbaa !5
  %62 = load i32, ptr %7, align 4, !tbaa !5
  %63 = load i32, ptr %4, align 4, !tbaa !5
  %64 = icmp eq i32 %62, %63
  br i1 %64, label %72, label %65

65:                                               ; preds = %54
  %66 = load i32, ptr %7, align 4, !tbaa !5
  %67 = load i32, ptr %3, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds [100001 x i32], ptr @nxt, i64 0, i64 %68
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = icmp eq i32 %66, %70
  br i1 %71, label %72, label %73

72:                                               ; preds = %65, %54
  store i32 4, ptr %6, align 4
  br label %78

73:                                               ; preds = %65
  %74 = load i32, ptr @nd, align 4, !tbaa !5
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr @nd, align 4, !tbaa !5
  %76 = load i32, ptr %7, align 4, !tbaa !5
  %77 = load i32, ptr %3, align 4, !tbaa !5
  call void @_Z3hldii(i32 noundef %76, i32 noundef %77)
  store i32 0, ptr %6, align 4
  br label %78

78:                                               ; preds = %73, %72
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  %79 = load i32, ptr %6, align 4
  switch i32 %79, label %85 [
    i32 0, label %80
    i32 4, label %81
  ]

80:                                               ; preds = %78
  br label %81

81:                                               ; preds = %80, %78
  %82 = load i32, ptr %5, align 4, !tbaa !5
  %83 = add nsw i32 %82, 1
  store i32 %83, ptr %5, align 4, !tbaa !5
  br label %45, !llvm.loop !9

84:                                               ; preds = %53
  ret void

85:                                               ; preds = %78
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@t = external dso_local global [100001 x %"class.std::vector"], align 16
@nxt = external dso_local local_unnamed_addr global [100001 x i32], align 16
@chain = external dso_local local_unnamed_addr global [100001 x i32], align 16
@szc = external dso_local local_unnamed_addr global [100001 x i32], align 16
@st = external dso_local local_unnamed_addr global [100001 x i32], align 16
@top = external dso_local local_unnamed_addr global [100001 x i32], align 16
@nd = external dso_local local_unnamed_addr global i32, align 4
@tim = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3hldii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = load i32, ptr @nd, align 4, !tbaa !5
  %4 = sext i32 %0 to i64
  %5 = getelementptr inbounds [100001 x i32], ptr @chain, i64 0, i64 %4
  store i32 %3, ptr %5, align 4, !tbaa !5
  %6 = load i32, ptr @tim, align 4, !tbaa !5
  %7 = add nsw i32 %6, 1
  store i32 %7, ptr @tim, align 4, !tbaa !5
  %8 = getelementptr inbounds [100001 x i32], ptr @st, i64 0, i64 %4
  store i32 %7, ptr %8, align 4, !tbaa !5
  %9 = sext i32 %3 to i64
  %10 = getelementptr inbounds [100001 x i32], ptr @szc, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %.not = icmp eq i32 %11, 0
  br i1 %.not, label %12, label %14

12:                                               ; preds = %2
  %13 = getelementptr inbounds [100001 x i32], ptr @top, i64 0, i64 %9
  store i32 %0, ptr %13, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %12, %2
  %15 = add nsw i32 %11, 1
  store i32 %15, ptr %10, align 4, !tbaa !5
  %16 = getelementptr inbounds [100001 x i32], ptr @nxt, i64 0, i64 %4
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %.not20 = icmp eq i32 %17, -1
  br i1 %.not20, label %19, label %18

18:                                               ; preds = %14
  tail call void @_Z3hldii(i32 noundef %17, i32 noundef %0)
  br label %19

19:                                               ; preds = %18, %14
  %20 = getelementptr inbounds [100001 x %"class.std::vector"], ptr @t, i64 0, i64 %4
  %21 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #1
  %.not22 = icmp eq i64 %21, 0
  br i1 %.not22, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %31, %19
  ret void

.lr.ph:                                           ; preds = %19, %31
  %indvars.iv = phi i64 [ %indvars.iv.next, %31 ], [ 0, %19 ]
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp eq i32 %23, %1
  br i1 %24, label %31, label %25

25:                                               ; preds = %.lr.ph
  %26 = load i32, ptr %16, align 4, !tbaa !5
  %27 = icmp eq i32 %23, %26
  br i1 %27, label %31, label %28

28:                                               ; preds = %25
  %29 = load i32, ptr @nd, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr @nd, align 4, !tbaa !5
  tail call void @_Z3hldii(i32 noundef %23, i32 noundef %0)
  br label %31

31:                                               ; preds = %.lr.ph, %25, %28
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %32 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #1
  %33 = icmp ugt i64 %32, %indvars.iv.next
  br i1 %33, label %.lr.ph, label %._crit_edge, !llvm.loop !9
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass