; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/sdps_v3_6 (CfgInitialize)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, ptr, [8 x i8], [32 x %struct.XSdPs_Adma2Descriptor], i64, [24 x i8] }
%struct.XSdPs_Adma2Descriptor = type <{ i16, i16, i64 }>

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [159 x i8], align 1
@TransferMode = external dso_local global i16, align 2

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_CfgInitialize(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #4
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = icmp ne ptr %12, null
  br i1 %13, label %14, label %15

14:                                               ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %16

15:                                               ; preds = %3
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 185)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %250

16:                                               ; preds = %14
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = icmp ne ptr %17, null
  br i1 %18, label %19, label %20

19:                                               ; preds = %16
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %21

20:                                               ; preds = %16
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 186)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %250

21:                                               ; preds = %19
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.XSdPs_Config, ptr %22, i32 0, i32 0
  %24 = load i16, ptr %23, align 4, !tbaa !11
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.XSdPs, ptr %25, i32 0, i32 0
  %27 = getelementptr inbounds %struct.XSdPs_Config, ptr %26, i32 0, i32 0
  store i16 %24, ptr %27, align 32, !tbaa !14
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.XSdPs, ptr %29, i32 0, i32 0
  %31 = getelementptr inbounds %struct.XSdPs_Config, ptr %30, i32 0, i32 1
  store i32 %28, ptr %31, align 4, !tbaa !17
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.XSdPs_Config, ptr %32, i32 0, i32 2
  %34 = load i32, ptr %33, align 4, !tbaa !18
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.XSdPs, ptr %35, i32 0, i32 0
  %37 = getelementptr inbounds %struct.XSdPs_Config, ptr %36, i32 0, i32 2
  store i32 %34, ptr %37, align 8, !tbaa !19
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.XSdPs, ptr %38, i32 0, i32 1
  store i32 286331153, ptr %39, align 4, !tbaa !20
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.XSdPs_Config, ptr %40, i32 0, i32 3
  %42 = load i32, ptr %41, align 4, !tbaa !21
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.XSdPs, ptr %43, i32 0, i32 0
  %45 = getelementptr inbounds %struct.XSdPs_Config, ptr %44, i32 0, i32 3
  store i32 %42, ptr %45, align 4, !tbaa !22
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.XSdPs_Config, ptr %46, i32 0, i32 4
  %48 = load i32, ptr %47, align 4, !tbaa !23
  %49 = load ptr, ptr %5, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.XSdPs, ptr %49, i32 0, i32 0
  %51 = getelementptr inbounds %struct.XSdPs_Config, ptr %50, i32 0, i32 4
  store i32 %48, ptr %51, align 16, !tbaa !24
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.XSdPs_Config, ptr %52, i32 0, i32 5
  %54 = load i32, ptr %53, align 4, !tbaa !25
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.XSdPs, ptr %55, i32 0, i32 0
  %57 = getelementptr inbounds %struct.XSdPs_Config, ptr %56, i32 0, i32 5
  store i32 %54, ptr %57, align 4, !tbaa !26
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.XSdPs_Config, ptr %58, i32 0, i32 6
  %60 = load i32, ptr %59, align 4, !tbaa !27
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.XSdPs, ptr %61, i32 0, i32 0
  %63 = getelementptr inbounds %struct.XSdPs_Config, ptr %62, i32 0, i32 6
  store i32 %60, ptr %63, align 8, !tbaa !28
  %64 = load ptr, ptr %6, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.XSdPs_Config, ptr %64, i32 0, i32 7
  %66 = load i32, ptr %65, align 4, !tbaa !29
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.XSdPs, ptr %67, i32 0, i32 0
  %69 = getelementptr inbounds %struct.XSdPs_Config, ptr %68, i32 0, i32 7
  store i32 %66, ptr %69, align 4, !tbaa !30
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.XSdPs_Config, ptr %70, i32 0, i32 8
  %72 = load i8, ptr %71, align 4, !tbaa !31
  %73 = load ptr, ptr %5, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.XSdPs, ptr %73, i32 0, i32 0
  %75 = getelementptr inbounds %struct.XSdPs_Config, ptr %74, i32 0, i32 8
  store i8 %72, ptr %75, align 32, !tbaa !32
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.XSdPs, ptr %76, i32 0, i32 14
  store i32 0, ptr %77, align 4, !tbaa !33
  %78 = load ptr, ptr %5, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.XSdPs, ptr %78, i32 0, i32 16
  store i32 6, ptr %79, align 4, !tbaa !34
  %80 = load ptr, ptr %5, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.XSdPs, ptr %80, i32 0, i32 17
  store ptr null, ptr %81, align 16, !tbaa !35
  %82 = load ptr, ptr %5, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.XSdPs, ptr %82, i32 0, i32 20
  store i64 0, ptr %83, align 32, !tbaa !36
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.XSdPs, ptr %84, i32 0, i32 0
  %86 = getelementptr inbounds %struct.XSdPs_Config, ptr %85, i32 0, i32 1
  %87 = load i32, ptr %86, align 4, !tbaa !17
  %88 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %87, i8 noundef zeroext -2)
  %89 = zext i16 %88 to i32
  %90 = and i32 %89, 255
  %91 = icmp eq i32 %90, 2
  br i1 %91, label %92, label %97

92:                                               ; preds = %21
  %93 = load ptr, ptr %5, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.XSdPs, ptr %93, i32 0, i32 0
  %95 = getelementptr inbounds %struct.XSdPs_Config, ptr %94, i32 0, i32 1
  %96 = load i32, ptr %95, align 4, !tbaa !17
  call void @XSdPs_WriteReg8(i32 noundef %96, i8 noundef zeroext 41, i8 noundef zeroext 16)
  br label %102

97:                                               ; preds = %21
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.XSdPs, ptr %98, i32 0, i32 0
  %100 = getelementptr inbounds %struct.XSdPs_Config, ptr %99, i32 0, i32 1
  %101 = load i32, ptr %100, align 4, !tbaa !17
  call void @XSdPs_WriteReg8(i32 noundef %101, i8 noundef zeroext 41, i8 noundef zeroext 0)
  br label %102

102:                                              ; preds = %97, %92
  call void @usleep(i64 noundef 1000)
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.XSdPs, ptr %103, i32 0, i32 0
  %105 = getelementptr inbounds %struct.XSdPs_Config, ptr %104, i32 0, i32 1
  %106 = load i32, ptr %105, align 4, !tbaa !17
  call void @XSdPs_WriteReg8(i32 noundef %106, i8 noundef zeroext 47, i8 noundef zeroext 1)
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.XSdPs, ptr %107, i32 0, i32 0
  %109 = getelementptr inbounds %struct.XSdPs_Config, ptr %108, i32 0, i32 1
  %110 = load i32, ptr %109, align 4, !tbaa !17
  %111 = call zeroext i8 @XSdPs_ReadReg8(i32 noundef %110, i8 noundef zeroext 47)
  store i8 %111, ptr %10, align 1, !tbaa !37
  br label %112

112:                                              ; preds = %117, %102
  %113 = load i8, ptr %10, align 1, !tbaa !37
  %114 = zext i8 %113 to i32
  %115 = and i32 %114, 1
  %116 = icmp ne i32 %115, 0
  br i1 %116, label %117, label %123

117:                                              ; preds = %112
  %118 = load ptr, ptr %5, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.XSdPs, ptr %118, i32 0, i32 0
  %120 = getelementptr inbounds %struct.XSdPs_Config, ptr %119, i32 0, i32 1
  %121 = load i32, ptr %120, align 4, !tbaa !17
  %122 = call zeroext i8 @XSdPs_ReadReg8(i32 noundef %121, i8 noundef zeroext 47)
  store i8 %122, ptr %10, align 1, !tbaa !37
  br label %112, !llvm.loop !38

123:                                              ; preds = %112
  %124 = load ptr, ptr %5, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.XSdPs, ptr %124, i32 0, i32 0
  %126 = getelementptr inbounds %struct.XSdPs_Config, ptr %125, i32 0, i32 1
  %127 = load i32, ptr %126, align 4, !tbaa !17
  %128 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %127, i8 noundef zeroext -2)
  %129 = zext i16 %128 to i32
  %130 = and i32 %129, 255
  %131 = trunc i32 %130 to i8
  %132 = load ptr, ptr %5, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.XSdPs, ptr %132, i32 0, i32 7
  store i8 %131, ptr %133, align 2, !tbaa !40
  %134 = load ptr, ptr %5, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.XSdPs, ptr %134, i32 0, i32 0
  %136 = getelementptr inbounds %struct.XSdPs_Config, ptr %135, i32 0, i32 1
  %137 = load i32, ptr %136, align 4, !tbaa !17
  %138 = add i32 %137, 64
  %139 = zext i32 %138 to i64
  %140 = call i32 @Xil_In32(i64 noundef %139)
  %141 = load ptr, ptr %5, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.XSdPs, ptr %141, i32 0, i32 2
  store i32 %140, ptr %142, align 8, !tbaa !41
  %143 = load ptr, ptr %5, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.XSdPs, ptr %143, i32 0, i32 7
  %145 = load i8, ptr %144, align 2, !tbaa !40
  %146 = zext i8 %145 to i32
  %147 = icmp eq i32 %146, 2
  br i1 %147, label %148, label %153

148:                                              ; preds = %123
  %149 = load ptr, ptr %5, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.XSdPs, ptr %149, i32 0, i32 0
  %151 = getelementptr inbounds %struct.XSdPs_Config, ptr %150, i32 0, i32 1
  %152 = load i32, ptr %151, align 4, !tbaa !17
  call void @XSdPs_WriteReg8(i32 noundef %152, i8 noundef zeroext 41, i8 noundef zeroext 15)
  br label %158

153:                                              ; preds = %123
  %154 = load ptr, ptr %5, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.XSdPs, ptr %154, i32 0, i32 0
  %156 = getelementptr inbounds %struct.XSdPs_Config, ptr %155, i32 0, i32 1
  %157 = load i32, ptr %156, align 4, !tbaa !17
  call void @XSdPs_WriteReg8(i32 noundef %157, i8 noundef zeroext 41, i8 noundef zeroext 15)
  br label %158

158:                                              ; preds = %153, %148
  %159 = load ptr, ptr %5, align 8, !tbaa !5
  %160 = getelementptr inbounds %struct.XSdPs, ptr %159, i32 0, i32 7
  %161 = load i8, ptr %160, align 2, !tbaa !40
  %162 = zext i8 %161 to i32
  %163 = icmp eq i32 %162, 2
  br i1 %163, label %164, label %172

164:                                              ; preds = %158
  %165 = load ptr, ptr %5, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.XSdPs, ptr %165, i32 0, i32 2
  %167 = load i32, ptr %166, align 8, !tbaa !41
  %168 = and i32 %167, -1073741824
  %169 = icmp eq i32 %168, 1073741824
  br i1 %169, label %170, label %171

170:                                              ; preds = %164
  call void @usleep(i64 noundef 200)
  br label %171

171:                                              ; preds = %170, %164
  br label %172

172:                                              ; preds = %171, %158
  %173 = load ptr, ptr %5, align 8, !tbaa !5
  %174 = call i32 @XSdPs_Change_ClkFreq(ptr noundef %173, i32 noundef 400000)
  store i32 %174, ptr %8, align 4, !tbaa !9
  %175 = load i32, ptr %8, align 4, !tbaa !9
  %176 = sext i32 %175 to i64
  %177 = icmp ne i64 %176, 0
  br i1 %177, label %178, label %179

178:                                              ; preds = %172
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %248

179:                                              ; preds = %172
  %180 = load ptr, ptr %5, align 8, !tbaa !5
  %181 = getelementptr inbounds %struct.XSdPs, ptr %180, i32 0, i32 2
  %182 = load i32, ptr %181, align 8, !tbaa !41
  %183 = and i32 %182, 16777216
  %184 = icmp ne i32 %183, 0
  br i1 %184, label %185, label %186

185:                                              ; preds = %179
  store i8 14, ptr %9, align 1, !tbaa !37
  br label %203

186:                                              ; preds = %179
  %187 = load ptr, ptr %5, align 8, !tbaa !5
  %188 = getelementptr inbounds %struct.XSdPs, ptr %187, i32 0, i32 2
  %189 = load i32, ptr %188, align 8, !tbaa !41
  %190 = and i32 %189, 33554432
  %191 = icmp ne i32 %190, 0
  br i1 %191, label %192, label %193

192:                                              ; preds = %186
  store i8 12, ptr %9, align 1, !tbaa !37
  br label %202

193:                                              ; preds = %186
  %194 = load ptr, ptr %5, align 8, !tbaa !5
  %195 = getelementptr inbounds %struct.XSdPs, ptr %194, i32 0, i32 2
  %196 = load i32, ptr %195, align 8, !tbaa !41
  %197 = and i32 %196, 67108864
  %198 = icmp ne i32 %197, 0
  br i1 %198, label %199, label %200

199:                                              ; preds = %193
  store i8 10, ptr %9, align 1, !tbaa !37
  br label %201

200:                                              ; preds = %193
  store i8 0, ptr %9, align 1, !tbaa !37
  br label %201

201:                                              ; preds = %200, %199
  br label %202

202:                                              ; preds = %201, %192
  br label %203

203:                                              ; preds = %202, %185
  %204 = load ptr, ptr %5, align 8, !tbaa !5
  %205 = getelementptr inbounds %struct.XSdPs, ptr %204, i32 0, i32 0
  %206 = getelementptr inbounds %struct.XSdPs_Config, ptr %205, i32 0, i32 1
  %207 = load i32, ptr %206, align 4, !tbaa !17
  %208 = load i8, ptr %9, align 1, !tbaa !37
  %209 = zext i8 %208 to i32
  %210 = or i32 %209, 1
  %211 = trunc i32 %210 to i8
  call void @XSdPs_WriteReg8(i32 noundef %207, i8 noundef zeroext 41, i8 noundef zeroext %211)
  %212 = load ptr, ptr %5, align 8, !tbaa !5
  %213 = getelementptr inbounds %struct.XSdPs, ptr %212, i32 0, i32 7
  %214 = load i8, ptr %213, align 2, !tbaa !40
  %215 = zext i8 %214 to i32
  %216 = icmp eq i32 %215, 2
  br i1 %216, label %217, label %222

217:                                              ; preds = %203
  %218 = load ptr, ptr %5, align 8, !tbaa !5
  %219 = getelementptr inbounds %struct.XSdPs, ptr %218, i32 0, i32 0
  %220 = getelementptr inbounds %struct.XSdPs_Config, ptr %219, i32 0, i32 1
  %221 = load i32, ptr %220, align 4, !tbaa !17
  call void @XSdPs_WriteReg8(i32 noundef %221, i8 noundef zeroext 40, i8 noundef zeroext 24)
  br label %227

222:                                              ; preds = %203
  %223 = load ptr, ptr %5, align 8, !tbaa !5
  %224 = getelementptr inbounds %struct.XSdPs, ptr %223, i32 0, i32 0
  %225 = getelementptr inbounds %struct.XSdPs_Config, ptr %224, i32 0, i32 1
  %226 = load i32, ptr %225, align 4, !tbaa !17
  call void @XSdPs_WriteReg8(i32 noundef %226, i8 noundef zeroext 40, i8 noundef zeroext 16)
  br label %227

227:                                              ; preds = %222, %217
  %228 = load ptr, ptr %5, align 8, !tbaa !5
  %229 = getelementptr inbounds %struct.XSdPs, ptr %228, i32 0, i32 0
  %230 = getelementptr inbounds %struct.XSdPs_Config, ptr %229, i32 0, i32 1
  %231 = load i32, ptr %230, align 4, !tbaa !17
  call void @XSdPs_WriteReg16(i32 noundef %231, i8 noundef zeroext 52, i16 noundef zeroext -257)
  %232 = load ptr, ptr %5, align 8, !tbaa !5
  %233 = getelementptr inbounds %struct.XSdPs, ptr %232, i32 0, i32 0
  %234 = getelementptr inbounds %struct.XSdPs_Config, ptr %233, i32 0, i32 1
  %235 = load i32, ptr %234, align 4, !tbaa !17
  call void @XSdPs_WriteReg16(i32 noundef %235, i8 noundef zeroext 54, i16 noundef zeroext -3073)
  %236 = load ptr, ptr %5, align 8, !tbaa !5
  %237 = getelementptr inbounds %struct.XSdPs, ptr %236, i32 0, i32 0
  %238 = getelementptr inbounds %struct.XSdPs_Config, ptr %237, i32 0, i32 1
  %239 = load i32, ptr %238, align 4, !tbaa !17
  call void @XSdPs_WriteReg16(i32 noundef %239, i8 noundef zeroext 56, i16 noundef zeroext 0)
  %240 = load ptr, ptr %5, align 8, !tbaa !5
  %241 = getelementptr inbounds %struct.XSdPs, ptr %240, i32 0, i32 0
  %242 = getelementptr inbounds %struct.XSdPs_Config, ptr %241, i32 0, i32 1
  %243 = load i32, ptr %242, align 4, !tbaa !17
  call void @XSdPs_WriteReg16(i32 noundef %243, i8 noundef zeroext 58, i16 noundef zeroext 0)
  store i16 19, ptr @TransferMode, align 2, !tbaa !42
  %244 = load ptr, ptr %5, align 8, !tbaa !5
  %245 = getelementptr inbounds %struct.XSdPs, ptr %244, i32 0, i32 0
  %246 = getelementptr inbounds %struct.XSdPs_Config, ptr %245, i32 0, i32 1
  %247 = load i32, ptr %246, align 4, !tbaa !17
  call void @XSdPs_WriteReg16(i32 noundef %247, i8 noundef zeroext 4, i16 noundef zeroext 512)
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %248

248:                                              ; preds = %227, %178
  %249 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %249, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %250

250:                                              ; preds = %248, %20, %15
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %251 = load i32, ptr %4, align 4
  ret i32 %251
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg8(i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #3

declare void @usleep(i64 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @XSdPs_ReadReg8(i32 noundef, i8 noundef zeroext) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

declare i32 @XSdPs_Change_ClkFreq(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"", !13, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !7, i64 32}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"", !12, i64 0, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !10, i64 56, !7, i64 60, !7, i64 64, !10, i64 80, !7, i64 84, !10, i64 100, !10, i64 104, !10, i64 108, !6, i64 112, !7, i64 128, !16, i64 512}
!16 = !{!"long", !7, i64 0}
!17 = !{!15, !10, i64 4}
!18 = !{!12, !10, i64 8}
!19 = !{!15, !10, i64 8}
!20 = !{!15, !10, i64 36}
!21 = !{!12, !10, i64 12}
!22 = !{!15, !10, i64 12}
!23 = !{!12, !10, i64 16}
!24 = !{!15, !10, i64 16}
!25 = !{!12, !10, i64 20}
!26 = !{!15, !10, i64 20}
!27 = !{!12, !10, i64 24}
!28 = !{!15, !10, i64 24}
!29 = !{!12, !10, i64 28}
!30 = !{!15, !10, i64 28}
!31 = !{!12, !7, i64 32}
!32 = !{!15, !7, i64 32}
!33 = !{!15, !10, i64 100}
!34 = !{!15, !10, i64 108}
!35 = !{!15, !6, i64 112}
!36 = !{!15, !16, i64 512}
!37 = !{!7, !7, i64 0}
!38 = distinct !{!38, !39}
!39 = !{!"llvm.loop.mustprogress"}
!40 = !{!15, !7, i64 54}
!41 = !{!15, !10, i64 40}
!42 = !{!13, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [159 x i8], align 1
@TransferMode = external dso_local local_unnamed_addr global i16, align 2

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XSdPs_CfgInitialize(ptr noundef %0, ptr noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %.not62 = icmp eq ptr %1, null
  br i1 %.not62, label %31, label %6

5:                                                ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 185) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %71

6:                                                ; preds = %4
  %7 = load i16, ptr %1, align 4, !tbaa !9
  store i16 %7, ptr %0, align 32, !tbaa !12
  %8 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %2, ptr %8, align 4, !tbaa !16
  %9 = getelementptr inbounds i8, ptr %1, i64 8
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  %11 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 286331153, ptr %11, align 4, !tbaa !17
  %12 = load <4 x i32>, ptr %9, align 4, !tbaa !5
  store <4 x i32> %12, ptr %10, align 8, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %1, i64 24
  %14 = getelementptr inbounds i8, ptr %0, i64 24
  %15 = load <2 x i32>, ptr %13, align 4, !tbaa !5
  store <2 x i32> %15, ptr %14, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %1, i64 32
  %17 = load i8, ptr %16, align 4, !tbaa !18
  %18 = getelementptr inbounds i8, ptr %0, i64 32
  store i8 %17, ptr %18, align 32, !tbaa !19
  %19 = getelementptr inbounds i8, ptr %0, i64 100
  store i32 0, ptr %19, align 4, !tbaa !20
  %20 = getelementptr inbounds i8, ptr %0, i64 108
  store i32 6, ptr %20, align 4, !tbaa !21
  %21 = getelementptr inbounds i8, ptr %0, i64 112
  store ptr null, ptr %21, align 16, !tbaa !22
  %22 = getelementptr inbounds i8, ptr %0, i64 512
  store i64 0, ptr %22, align 32, !tbaa !23
  %23 = tail call zeroext i16 @XSdPs_ReadReg16(i32 noundef %2, i8 noundef zeroext -2)
  %24 = and i16 %23, 255
  %25 = icmp eq i16 %24, 2
  %26 = load i32, ptr %8, align 4, !tbaa !16
  %.70 = select i1 %25, i8 16, i8 0
  tail call void @XSdPs_WriteReg8(i32 noundef %26, i8 noundef zeroext 41, i8 noundef zeroext %.70)
  tail call void @usleep(i64 noundef 1000) #3
  %27 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg8(i32 noundef %27, i8 noundef zeroext 47, i8 noundef zeroext 1)
  %28 = load i32, ptr %8, align 4, !tbaa !16
  %29 = tail call zeroext i8 @XSdPs_ReadReg8(i32 noundef %28, i8 noundef zeroext 47)
  %30 = and i8 %29, 1
  %.not6368 = icmp eq i8 %30, 0
  br i1 %.not6368, label %._crit_edge, label %.lr.ph

31:                                               ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 186) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %71

.lr.ph:                                           ; preds = %6, %.lr.ph
  %32 = load i32, ptr %8, align 4, !tbaa !16
  %33 = tail call zeroext i8 @XSdPs_ReadReg8(i32 noundef %32, i8 noundef zeroext 47)
  %34 = and i8 %33, 1
  %.not63 = icmp eq i8 %34, 0
  br i1 %.not63, label %._crit_edge, label %.lr.ph, !llvm.loop !24

._crit_edge:                                      ; preds = %.lr.ph, %6
  %35 = load i32, ptr %8, align 4, !tbaa !16
  %36 = tail call zeroext i16 @XSdPs_ReadReg16(i32 noundef %35, i8 noundef zeroext -2)
  %37 = trunc i16 %36 to i8
  %38 = getelementptr inbounds i8, ptr %0, i64 54
  store i8 %37, ptr %38, align 2, !tbaa !26
  %39 = load i32, ptr %8, align 4, !tbaa !16
  %40 = add i32 %39, 64
  %41 = zext i32 %40 to i64
  %42 = tail call i32 @Xil_In32(i64 noundef %41)
  %43 = getelementptr inbounds i8, ptr %0, i64 40
  store i32 %42, ptr %43, align 8, !tbaa !27
  %44 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg8(i32 noundef %44, i8 noundef zeroext 41, i8 noundef zeroext 15)
  %45 = load i8, ptr %38, align 2, !tbaa !26
  %46 = icmp eq i8 %45, 2
  br i1 %46, label %47, label %52

47:                                               ; preds = %._crit_edge
  %48 = load i32, ptr %43, align 8, !tbaa !27
  %49 = and i32 %48, -1073741824
  %50 = icmp eq i32 %49, 1073741824
  br i1 %50, label %51, label %52

51:                                               ; preds = %47
  tail call void @usleep(i64 noundef 200) #3
  br label %52

52:                                               ; preds = %47, %51, %._crit_edge
  %53 = tail call i32 @XSdPs_Change_ClkFreq(ptr noundef nonnull %0, i32 noundef 400000) #3
  %.not64 = icmp eq i32 %53, 0
  br i1 %.not64, label %54, label %71

54:                                               ; preds = %52
  %55 = load i32, ptr %43, align 8, !tbaa !27
  %56 = and i32 %55, 16777216
  %.not65 = icmp eq i32 %56, 0
  br i1 %.not65, label %57, label %61

57:                                               ; preds = %54
  %58 = and i32 %55, 33554432
  %.not66 = icmp eq i32 %58, 0
  br i1 %.not66, label %59, label %61

59:                                               ; preds = %57
  %60 = and i32 %55, 67108864
  %.not67 = icmp eq i32 %60, 0
  %. = select i1 %.not67, i8 1, i8 11
  br label %61

61:                                               ; preds = %59, %57, %54
  %.057 = phi i8 [ 15, %54 ], [ 13, %57 ], [ %., %59 ]
  %62 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg8(i32 noundef %62, i8 noundef zeroext 41, i8 noundef zeroext %.057)
  %63 = load i8, ptr %38, align 2, !tbaa !26
  %64 = icmp eq i8 %63, 2
  %65 = load i32, ptr %8, align 4, !tbaa !16
  %.71 = select i1 %64, i8 24, i8 16
  tail call void @XSdPs_WriteReg8(i32 noundef %65, i8 noundef zeroext 40, i8 noundef zeroext %.71)
  %66 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %66, i8 noundef zeroext 52, i16 noundef zeroext -257)
  %67 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %67, i8 noundef zeroext 54, i16 noundef zeroext -3073)
  %68 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %68, i8 noundef zeroext 56, i16 noundef zeroext 0)
  %69 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %69, i8 noundef zeroext 58, i16 noundef zeroext 0)
  store i16 19, ptr @TransferMode, align 2, !tbaa !28
  %70 = load i32, ptr %8, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %70, i8 noundef zeroext 4, i16 noundef zeroext 512)
  br label %71

71:                                               ; preds = %61, %52, %31, %5
  %.059 = phi i32 [ 0, %31 ], [ 0, %5 ], [ 0, %61 ], [ 1, %52 ]
  ret i32 %.059
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg8(i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

declare void @usleep(i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @XSdPs_ReadReg8(i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

declare i32 @XSdPs_Change_ClkFreq(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !7, i64 32}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"", !10, i64 0, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !6, i64 56, !7, i64 60, !7, i64 64, !6, i64 80, !7, i64 84, !6, i64 100, !6, i64 104, !6, i64 108, !14, i64 112, !7, i64 128, !15, i64 512}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!13, !6, i64 4}
!17 = !{!13, !6, i64 36}
!18 = !{!10, !7, i64 32}
!19 = !{!13, !7, i64 32}
!20 = !{!13, !6, i64 100}
!21 = !{!13, !6, i64 108}
!22 = !{!13, !14, i64 112}
!23 = !{!13, !15, i64 512}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = !{!13, !7, i64 54}
!27 = !{!13, !6, i64 40}
!28 = !{!11, !11, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass