; LLVM IR from sp-nitech/SPTK :: third_party/WORLD/fft_world.ll (ZN4sptk5world7cftrec4EiPdiS1_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sptk5world7cftrec4EiPdiS1_(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %13 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %13, ptr %12, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %17, %4
  %15 = load i32, ptr %12, align 4, !tbaa !5
  %16 = icmp sgt i32 %15, 512
  br i1 %16, label %17, label %34

17:                                               ; preds = %14
  %18 = load i32, ptr %12, align 4, !tbaa !5
  %19 = ashr i32 %18, 2
  store i32 %19, ptr %12, align 4, !tbaa !5
  %20 = load i32, ptr %12, align 4, !tbaa !5
  %21 = load ptr, ptr %6, align 8, !tbaa !9
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %12, align 4, !tbaa !5
  %24 = sub nsw i32 %22, %23
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds double, ptr %21, i64 %25
  %27 = load ptr, ptr %8, align 8, !tbaa !9
  %28 = load i32, ptr %7, align 4, !tbaa !5
  %29 = load i32, ptr %12, align 4, !tbaa !5
  %30 = ashr i32 %29, 1
  %31 = sub nsw i32 %28, %30
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds double, ptr %27, i64 %32
  call void @_ZN4sptk5world7cftmdl1EiPdS1_(i32 noundef %20, ptr noundef %26, ptr noundef %33)
  br label %14, !llvm.loop !11

34:                                               ; preds = %14
  %35 = load i32, ptr %12, align 4, !tbaa !5
  %36 = load ptr, ptr %6, align 8, !tbaa !9
  %37 = load i32, ptr %5, align 4, !tbaa !5
  %38 = load i32, ptr %12, align 4, !tbaa !5
  %39 = sub nsw i32 %37, %38
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds double, ptr %36, i64 %40
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = load ptr, ptr %8, align 8, !tbaa !9
  call void @_ZN4sptk5world7cftleafEiiPdiS1_(i32 noundef %35, i32 noundef 1, ptr noundef %41, i32 noundef %42, ptr noundef %43)
  store i32 0, ptr %11, align 4, !tbaa !5
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = load i32, ptr %12, align 4, !tbaa !5
  %46 = sub nsw i32 %44, %45
  store i32 %46, ptr %10, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %70, %34
  %48 = load i32, ptr %10, align 4, !tbaa !5
  %49 = icmp sgt i32 %48, 0
  br i1 %49, label %50, label %74

50:                                               ; preds = %47
  %51 = load i32, ptr %11, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %11, align 4, !tbaa !5
  %53 = load i32, ptr %12, align 4, !tbaa !5
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !5
  %56 = load ptr, ptr %6, align 8, !tbaa !9
  %57 = load i32, ptr %7, align 4, !tbaa !5
  %58 = load ptr, ptr %8, align 8, !tbaa !9
  %59 = call noundef i32 @_ZN4sptk5world7cfttreeEiiiPdiS1_(i32 noundef %53, i32 noundef %54, i32 noundef %55, ptr noundef %56, i32 noundef %57, ptr noundef %58)
  store i32 %59, ptr %9, align 4, !tbaa !5
  %60 = load i32, ptr %12, align 4, !tbaa !5
  %61 = load i32, ptr %9, align 4, !tbaa !5
  %62 = load ptr, ptr %6, align 8, !tbaa !9
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = load i32, ptr %12, align 4, !tbaa !5
  %65 = sub nsw i32 %63, %64
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds double, ptr %62, i64 %66
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = load ptr, ptr %8, align 8, !tbaa !9
  call void @_ZN4sptk5world7cftleafEiiPdiS1_(i32 noundef %60, i32 noundef %61, ptr noundef %67, i32 noundef %68, ptr noundef %69)
  br label %70

70:                                               ; preds = %50
  %71 = load i32, ptr %12, align 4, !tbaa !5
  %72 = load i32, ptr %10, align 4, !tbaa !5
  %73 = sub nsw i32 %72, %71
  store i32 %73, ptr %10, align 4, !tbaa !5
  br label %47, !llvm.loop !13

74:                                               ; preds = %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4sptk5world7cftleafEiiPdiS1_(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sptk5world7cftmdl1EiPdS1_(i32 noundef, ptr noundef, ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN4sptk5world7cfttreeEiiiPdiS1_(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sptk5world7cftrec4EiPdiS1_(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %0, 512
  br i1 %5, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %4, %.lr.ph
  %.036 = phi i32 [ %6, %.lr.ph ], [ %0, %4 ]
  %6 = lshr i32 %.036, 2
  %7 = sub nsw i32 %0, %6
  %8 = sext i32 %7 to i64
  %9 = getelementptr inbounds double, ptr %1, i64 %8
  %10 = lshr i32 %.036, 3
  %11 = sub nsw i32 %2, %10
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds double, ptr %3, i64 %12
  tail call void @_ZN4sptk5world7cftmdl1EiPdS1_(i32 noundef %6, ptr noundef %9, ptr noundef %13)
  %14 = icmp ugt i32 %.036, 2051
  br i1 %14, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %4
  %.0.lcssa = phi i32 [ %0, %4 ], [ %6, %.lr.ph ]
  %15 = sub nsw i32 %0, %.0.lcssa
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds double, ptr %1, i64 %16
  tail call void @_ZN4sptk5world7cftleafEiiPdiS1_(i32 noundef %.0.lcssa, i32 noundef 1, ptr noundef %17, i32 noundef %2, ptr noundef %3)
  %18 = icmp sgt i32 %15, 0
  br i1 %18, label %.lr.ph40, label %._crit_edge41

.lr.ph40:                                         ; preds = %._crit_edge, %.lr.ph40
  %.03438 = phi i32 [ %19, %.lr.ph40 ], [ 0, %._crit_edge ]
  %.03537 = phi i32 [ %21, %.lr.ph40 ], [ %15, %._crit_edge ]
  %19 = add nuw nsw i32 %.03438, 1
  %20 = tail call noundef i32 @_ZN4sptk5world7cfttreeEiiiPdiS1_(i32 noundef %.0.lcssa, i32 noundef %.03537, i32 noundef %19, ptr noundef %1, i32 noundef %2, ptr noundef %3)
  %21 = sub nsw i32 %.03537, %.0.lcssa
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds double, ptr %1, i64 %22
  tail call void @_ZN4sptk5world7cftleafEiiPdiS1_(i32 noundef %.0.lcssa, i32 noundef %20, ptr noundef %23, i32 noundef %2, ptr noundef %3)
  %24 = icmp sgt i32 %21, 0
  br i1 %24, label %.lr.ph40, label %._crit_edge41, !llvm.loop !7

._crit_edge41:                                    ; preds = %.lr.ph40, %._crit_edge
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4sptk5world7cftleafEiiPdiS1_(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sptk5world7cftmdl1EiPdS1_(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN4sptk5world7cfttreeEiiiPdiS1_(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass