; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/qspips_v3 (SetOptions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.OptionsMap = type { i32, i32 }
%struct.XQspiPs = type { %struct.XQspiPs_Config, i32, ptr, ptr, i32, i32, i32, ptr, ptr, i32 }
%struct.XQspiPs_Config = type { i16, i32, i32, i8 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1
@OptionsTable = external hidden global [5 x %struct.OptionsMap], align 16

; Function Attrs: nounwind uwtable
define dso_local i32 @XQspiPs_SetOptions(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %12, label %13

12:                                               ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %14

13:                                               ; preds = %2
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 126)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

14:                                               ; preds = %12
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.XQspiPs, ptr %15, i32 0, i32 1
  %17 = load i32, ptr %16, align 8, !tbaa !11
  %18 = icmp eq i32 %17, 286331153
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %21

20:                                               ; preds = %14
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 127)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

21:                                               ; preds = %19
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.XQspiPs, ptr %22, i32 0, i32 6
  %24 = load i32, ptr %23, align 8, !tbaa !15
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %27

26:                                               ; preds = %21
  store i32 21, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

27:                                               ; preds = %21
  %28 = load i32, ptr %5, align 4, !tbaa !9
  %29 = and i32 %28, 128
  store i32 %29, ptr %8, align 4, !tbaa !9
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = and i32 %30, -129
  store i32 %31, ptr %5, align 4, !tbaa !9
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.XQspiPs, ptr %32, i32 0, i32 0
  %34 = getelementptr inbounds %struct.XQspiPs_Config, ptr %33, i32 0, i32 1
  %35 = load i32, ptr %34, align 4, !tbaa !16
  %36 = add i32 %35, 0
  %37 = zext i32 %36 to i64
  %38 = call i32 @Xil_In32(i64 noundef %37)
  store i32 %38, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %70, %27
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = zext i32 %40 to i64
  %42 = icmp ult i64 %41, 5
  br i1 %42, label %43, label %73

43:                                               ; preds = %39
  %44 = load i32, ptr %5, align 4, !tbaa !9
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = zext i32 %45 to i64
  %47 = getelementptr inbounds [5 x %struct.OptionsMap], ptr @OptionsTable, i64 0, i64 %46
  %48 = getelementptr inbounds %struct.OptionsMap, ptr %47, i32 0, i32 0
  %49 = load i32, ptr %48, align 8, !tbaa !17
  %50 = and i32 %44, %49
  %51 = icmp ne i32 %50, 0
  br i1 %51, label %52, label %60

52:                                               ; preds = %43
  %53 = load i32, ptr %7, align 4, !tbaa !9
  %54 = zext i32 %53 to i64
  %55 = getelementptr inbounds [5 x %struct.OptionsMap], ptr @OptionsTable, i64 0, i64 %54
  %56 = getelementptr inbounds %struct.OptionsMap, ptr %55, i32 0, i32 1
  %57 = load i32, ptr %56, align 4, !tbaa !19
  %58 = load i32, ptr %6, align 4, !tbaa !9
  %59 = or i32 %58, %57
  store i32 %59, ptr %6, align 4, !tbaa !9
  br label %69

60:                                               ; preds = %43
  %61 = load i32, ptr %7, align 4, !tbaa !9
  %62 = zext i32 %61 to i64
  %63 = getelementptr inbounds [5 x %struct.OptionsMap], ptr @OptionsTable, i64 0, i64 %62
  %64 = getelementptr inbounds %struct.OptionsMap, ptr %63, i32 0, i32 1
  %65 = load i32, ptr %64, align 4, !tbaa !19
  %66 = xor i32 %65, -1
  %67 = load i32, ptr %6, align 4, !tbaa !9
  %68 = and i32 %67, %66
  store i32 %68, ptr %6, align 4, !tbaa !9
  br label %69

69:                                               ; preds = %60, %52
  br label %70

70:                                               ; preds = %69
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = add i32 %71, 1
  store i32 %72, ptr %7, align 4, !tbaa !9
  br label %39, !llvm.loop !20

73:                                               ; preds = %39
  %74 = load ptr, ptr %4, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.XQspiPs, ptr %74, i32 0, i32 0
  %76 = getelementptr inbounds %struct.XQspiPs_Config, ptr %75, i32 0, i32 1
  %77 = load i32, ptr %76, align 4, !tbaa !16
  %78 = add i32 %77, 0
  %79 = zext i32 %78 to i64
  %80 = load i32, ptr %6, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %79, i32 noundef %80)
  %81 = load ptr, ptr %4, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.XQspiPs, ptr %81, i32 0, i32 0
  %83 = getelementptr inbounds %struct.XQspiPs_Config, ptr %82, i32 0, i32 1
  %84 = load i32, ptr %83, align 4, !tbaa !16
  %85 = add i32 %84, 160
  %86 = zext i32 %85 to i64
  %87 = call i32 @Xil_In32(i64 noundef %86)
  store i32 %87, ptr %6, align 4, !tbaa !9
  %88 = load i32, ptr %8, align 4, !tbaa !9
  %89 = and i32 %88, 128
  %90 = icmp ne i32 %89, 0
  br i1 %90, label %91, label %100

91:                                               ; preds = %73
  %92 = load ptr, ptr %4, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.XQspiPs, ptr %92, i32 0, i32 0
  %94 = getelementptr inbounds %struct.XQspiPs_Config, ptr %93, i32 0, i32 1
  %95 = load i32, ptr %94, align 4, !tbaa !16
  %96 = add i32 %95, 160
  %97 = zext i32 %96 to i64
  call void @Xil_Out32(i64 noundef %97, i32 noundef -2147483285)
  %98 = load ptr, ptr %4, align 8, !tbaa !5
  %99 = call i32 @XQspiPs_SetSlaveSelect(ptr noundef %98)
  br label %110

100:                                              ; preds = %73
  %101 = load i32, ptr %6, align 4, !tbaa !9
  %102 = and i32 %101, 2147483647
  store i32 %102, ptr %6, align 4, !tbaa !9
  %103 = load ptr, ptr %4, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.XQspiPs, ptr %103, i32 0, i32 0
  %105 = getelementptr inbounds %struct.XQspiPs_Config, ptr %104, i32 0, i32 1
  %106 = load i32, ptr %105, align 4, !tbaa !16
  %107 = add i32 %106, 160
  %108 = zext i32 %107 to i64
  %109 = load i32, ptr %6, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %108, i32 noundef %109)
  br label %110

110:                                              ; preds = %100, %91
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %111

111:                                              ; preds = %110, %26, %20, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %112 = load i32, ptr %3, align 4
  ret i32 %112
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #3

declare i32 @XQspiPs_SetSlaveSelect(ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"", !13, i64 0, !10, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !6, i64 56, !6, i64 64, !10, i64 72}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !7, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !10, i64 48}
!16 = !{!12, !10, i64 4}
!17 = !{!18, !10, i64 0}
!18 = !{!"", !10, i64 0, !10, i64 4}
!19 = !{!18, !10, i64 4}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.OptionsMap = type { i32, i32 }

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1
@OptionsTable = external hidden local_unnamed_addr global [5 x %struct.OptionsMap], align 16

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 22) i32 @XQspiPs_SetOptions(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %7, label %3

3:                                                ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = load i32, ptr %4, align 8, !tbaa !9
  %6 = icmp eq i32 %5, 286331153
  br i1 %6, label %8, label %11

7:                                                ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 126) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %65

8:                                                ; preds = %3
  %9 = getelementptr inbounds i8, ptr %0, i64 48
  %10 = load i32, ptr %9, align 8, !tbaa !14
  %.not27 = icmp eq i32 %10, 0
  br i1 %.not27, label %12, label %65

11:                                               ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 127) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %65

12:                                               ; preds = %8
  %13 = and i32 %1, -129
  %14 = getelementptr inbounds i8, ptr %0, i64 4
  %15 = load i32, ptr %14, align 4, !tbaa !15
  %16 = zext i32 %15 to i64
  %17 = tail call i32 @Xil_In32(i64 noundef %16)
  %18 = load i32, ptr @OptionsTable, align 16, !tbaa !16
  %19 = and i32 %13, %18
  %.not29 = icmp eq i32 %19, 0
  %20 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 4), align 4, !tbaa !18
  %21 = or i32 %20, %17
  %22 = xor i32 %20, -1
  %23 = and i32 %17, %22
  %.1 = select i1 %.not29, i32 %23, i32 %21
  %24 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 8), align 8, !tbaa !16
  %25 = and i32 %13, %24
  %.not29.1 = icmp eq i32 %25, 0
  %26 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 12), align 4, !tbaa !18
  %27 = or i32 %26, %.1
  %28 = xor i32 %26, -1
  %29 = and i32 %.1, %28
  %.1.1 = select i1 %.not29.1, i32 %29, i32 %27
  %30 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 16), align 16, !tbaa !16
  %31 = and i32 %13, %30
  %.not29.2 = icmp eq i32 %31, 0
  %32 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 20), align 4, !tbaa !18
  %33 = or i32 %32, %.1.1
  %34 = xor i32 %32, -1
  %35 = and i32 %.1.1, %34
  %.1.2 = select i1 %.not29.2, i32 %35, i32 %33
  %36 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 24), align 8, !tbaa !16
  %37 = and i32 %13, %36
  %.not29.3 = icmp eq i32 %37, 0
  %38 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 28), align 4, !tbaa !18
  %39 = or i32 %38, %.1.2
  %40 = xor i32 %38, -1
  %41 = and i32 %.1.2, %40
  %.1.3 = select i1 %.not29.3, i32 %41, i32 %39
  %42 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 32), align 16, !tbaa !16
  %43 = and i32 %13, %42
  %.not29.4 = icmp eq i32 %43, 0
  %44 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 36), align 4, !tbaa !18
  %45 = or i32 %44, %.1.3
  %46 = xor i32 %44, -1
  %47 = and i32 %.1.3, %46
  %.1.4 = select i1 %.not29.4, i32 %47, i32 %45
  %48 = and i32 %1, 128
  %49 = load i32, ptr %14, align 4, !tbaa !15
  %50 = zext i32 %49 to i64
  tail call void @Xil_Out32(i64 noundef %50, i32 noundef %.1.4)
  %51 = load i32, ptr %14, align 4, !tbaa !15
  %52 = add i32 %51, 160
  %53 = zext i32 %52 to i64
  %54 = tail call i32 @Xil_In32(i64 noundef %53)
  %.not28 = icmp eq i32 %48, 0
  br i1 %.not28, label %60, label %55

55:                                               ; preds = %12
  %56 = load i32, ptr %14, align 4, !tbaa !15
  %57 = add i32 %56, 160
  %58 = zext i32 %57 to i64
  tail call void @Xil_Out32(i64 noundef %58, i32 noundef -2147483285)
  %59 = tail call i32 @XQspiPs_SetSlaveSelect(ptr noundef nonnull %0) #3
  br label %65

60:                                               ; preds = %12
  %61 = and i32 %54, 2147483647
  %62 = load i32, ptr %14, align 4, !tbaa !15
  %63 = add i32 %62, 160
  %64 = zext i32 %63 to i64
  tail call void @Xil_Out32(i64 noundef %64, i32 noundef %61)
  br label %65

65:                                               ; preds = %55, %60, %8, %11, %7
  %.0 = phi i32 [ 0, %11 ], [ 0, %7 ], [ 21, %8 ], [ 0, %60 ], [ 0, %55 ]
  ret i32 %.0
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @XQspiPs_SetSlaveSelect(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"", !11, i64 0, !6, i64 16, !13, i64 24, !13, i64 32, !6, i64 40, !6, i64 44, !6, i64 48, !13, i64 56, !13, i64 64, !6, i64 72}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !7, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !6, i64 48}
!15 = !{!10, !6, i64 4}
!16 = !{!17, !6, i64 0}
!17 = !{!"", !6, i64 0, !6, i64 4}
!18 = !{!17, !6, i64 4}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass