; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (Recv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_Recv(ptr noundef %0, ptr noundef %1, i32 noundef %2) #3 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = icmp ne ptr %11, null
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %15

14:                                               ; preds = %3
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 314)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %63

15:                                               ; preds = %13
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = icmp ne ptr %16, null
  br i1 %17, label %18, label %19

18:                                               ; preds = %15
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %20

19:                                               ; preds = %15
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 315)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %63

20:                                               ; preds = %18
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.XUartPs, ptr %21, i32 0, i32 2
  %23 = load i32, ptr %22, align 4, !tbaa !11
  %24 = icmp eq i32 %23, 286331153
  br i1 %24, label %25, label %26

25:                                               ; preds = %20
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %27

26:                                               ; preds = %20
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 316)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %63

27:                                               ; preds = %25
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.XUartPs, ptr %28, i32 0, i32 0
  %30 = getelementptr inbounds %struct.XUartPs_Config, ptr %29, i32 0, i32 1
  %31 = load i32, ptr %30, align 4, !tbaa !16
  %32 = add i32 %31, 16
  %33 = zext i32 %32 to i64
  %34 = call i32 @Xil_In32(i64 noundef %33)
  store i32 %34, ptr %9, align 4, !tbaa !9
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.XUartPs, ptr %35, i32 0, i32 0
  %37 = getelementptr inbounds %struct.XUartPs_Config, ptr %36, i32 0, i32 1
  %38 = load i32, ptr %37, align 4, !tbaa !16
  %39 = add i32 %38, 12
  %40 = zext i32 %39 to i64
  call void @Xil_Out32(i64 noundef %40, i32 noundef 16383)
  %41 = load i32, ptr %7, align 4, !tbaa !9
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XUartPs, ptr %42, i32 0, i32 5
  %44 = getelementptr inbounds %struct.XUartPsBuffer, ptr %43, i32 0, i32 1
  store i32 %41, ptr %44, align 8, !tbaa !17
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.XUartPs, ptr %46, i32 0, i32 5
  %48 = getelementptr inbounds %struct.XUartPsBuffer, ptr %47, i32 0, i32 2
  store i32 %45, ptr %48, align 4, !tbaa !18
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = load ptr, ptr %5, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.XUartPs, ptr %50, i32 0, i32 5
  %52 = getelementptr inbounds %struct.XUartPsBuffer, ptr %51, i32 0, i32 0
  store ptr %49, ptr %52, align 8, !tbaa !19
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = call i32 @XUartPs_ReceiveBuffer(ptr noundef %53)
  store i32 %54, ptr %8, align 4, !tbaa !9
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.XUartPs, ptr %55, i32 0, i32 0
  %57 = getelementptr inbounds %struct.XUartPs_Config, ptr %56, i32 0, i32 1
  %58 = load i32, ptr %57, align 4, !tbaa !16
  %59 = add i32 %58, 8
  %60 = zext i32 %59 to i64
  %61 = load i32, ptr %9, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %60, i32 noundef %61)
  %62 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %62, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %63

63:                                               ; preds = %27, %26, %19, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %64 = load i32, ptr %4, align 4
  ret i32 %64
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @XUartPs_ReceiveBuffer(ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 20}
!12 = !{!"", !13, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !15, i64 32, !15, i64 48, !6, i64 64, !6, i64 72, !10, i64 80, !7, i64 84}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}
!16 = !{!12, !10, i64 4}
!17 = !{!12, !10, i64 56}
!18 = !{!12, !10, i64 60}
!19 = !{!12, !6, i64 48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_Recv(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #2 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %.not17 = icmp eq ptr %1, null
  br i1 %.not17, label %10, label %6

5:                                                ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 314) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %28

6:                                                ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 20
  %8 = load i32, ptr %7, align 4, !tbaa !9
  %9 = icmp eq i32 %8, 286331153
  br i1 %9, label %11, label %27

10:                                               ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 315) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %28

11:                                               ; preds = %6
  %12 = getelementptr inbounds i8, ptr %0, i64 4
  %13 = load i32, ptr %12, align 4, !tbaa !15
  %14 = add i32 %13, 16
  %15 = zext i32 %14 to i64
  %16 = tail call i32 @Xil_In32(i64 noundef %15)
  %17 = load i32, ptr %12, align 4, !tbaa !15
  %18 = add i32 %17, 12
  %19 = zext i32 %18 to i64
  tail call void @Xil_Out32(i64 noundef %19, i32 noundef 16383)
  %20 = getelementptr inbounds i8, ptr %0, i64 48
  %21 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 %2, ptr %21, align 8, !tbaa !16
  %22 = getelementptr inbounds i8, ptr %0, i64 60
  store i32 %2, ptr %22, align 4, !tbaa !17
  store ptr %1, ptr %20, align 8, !tbaa !18
  %23 = tail call i32 @XUartPs_ReceiveBuffer(ptr noundef nonnull %0)
  %24 = load i32, ptr %12, align 4, !tbaa !15
  %25 = add i32 %24, 8
  %26 = zext i32 %25 to i64
  tail call void @Xil_Out32(i64 noundef %26, i32 noundef %16)
  br label %28

27:                                               ; preds = %6
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 316) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %11, %27, %10, %5
  %.0 = phi i32 [ %23, %11 ], [ 0, %27 ], [ 0, %10 ], [ 0, %5 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @XUartPs_ReceiveBuffer(ptr noundef) local_unnamed_addr #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 20}
!10 = !{!"", !11, i64 0, !6, i64 16, !6, i64 20, !6, i64 24, !13, i64 32, !13, i64 48, !14, i64 64, !14, i64 72, !6, i64 80, !7, i64 84}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !14, i64 0, !6, i64 8, !6, i64 12}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!10, !6, i64 4}
!16 = !{!10, !6, i64 56}
!17 = !{!10, !6, i64 60}
!18 = !{!10, !14, i64 48}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass