; LLVM IR from Mohammed-Shoaib/Coding-Problems :: Facebook/Hacker Cup/2020/Round 1/Perimetric - Chapter 1 (A1)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z10perimetriciiRSt6vectorIiSaIiEES2_(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3) #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca %"class.std::vector", align 8
  %10 = alloca %"class.std::allocator", align 1
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %9) #4
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #4
  call void @_ZNSaIxEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #4
  invoke void @_ZNSt6vectorIxSaIxEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %18, ptr noundef nonnull align 1 dereferenceable(1) %10)
          to label %19 unwind label %36

19:                                               ; preds = %4
  call void @_ZNSt15__new_allocatorIxED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #4
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = load ptr, ptr %8, align 8, !tbaa !9
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef 0) #4
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = add nsw i32 %20, %23
  %25 = mul nsw i32 2, %24
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef 0) #4
  store i64 %26, ptr %27, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef 0) #4
  %29 = load i64, ptr %28, align 8, !tbaa !11
  %30 = srem i64 %29, 1000000007
  store i64 %30, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  store i32 1, ptr %14, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %203, %19
  %32 = load i32, ptr %14, align 4, !tbaa !5
  %33 = load i32, ptr %5, align 4, !tbaa !5
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %40, label %35

35:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %206

36:                                               ; preds = %4
  %37 = landingpad { ptr, i32 }
          cleanup
  %38 = extractvalue { ptr, i32 } %37, 0
  store ptr %38, ptr %11, align 8
  %39 = extractvalue { ptr, i32 } %37, 1
  store i32 %39, ptr %12, align 4
  call void @_ZNSt15__new_allocatorIxED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %10) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #4
  br label %209

40:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %41 = load i32, ptr %14, align 4, !tbaa !5
  %42 = sub nsw i32 %41, 1
  store i32 %42, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !5
  %43 = load i32, ptr %14, align 4, !tbaa !5
  %44 = sub nsw i32 %43, 1
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %45) #4
  %47 = load i64, ptr %46, align 8, !tbaa !11
  %48 = load i32, ptr %6, align 4, !tbaa !5
  %49 = load ptr, ptr %8, align 8, !tbaa !9
  %50 = load i32, ptr %14, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #4
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = add nsw i32 %48, %53
  %55 = mul nsw i32 2, %54
  %56 = sext i32 %55 to i64
  %57 = add nsw i64 %47, %56
  %58 = load i32, ptr %14, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %59) #4
  store i64 %57, ptr %60, align 8, !tbaa !11
  br label %61

61:                                               ; preds = %99, %40
  %62 = load i32, ptr %15, align 4, !tbaa !5
  %63 = icmp sgt i32 %62, 0
  br i1 %63, label %64, label %90

64:                                               ; preds = %61
  %65 = load ptr, ptr %7, align 8, !tbaa !9
  %66 = load i32, ptr %15, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %67) #4
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = load i32, ptr %6, align 4, !tbaa !5
  %71 = add nsw i32 %69, %70
  %72 = load ptr, ptr %7, align 8, !tbaa !9
  %73 = load i32, ptr %14, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #4
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = icmp sge i32 %71, %76
  br i1 %77, label %78, label %90

78:                                               ; preds = %64
  %79 = load ptr, ptr %8, align 8, !tbaa !9
  %80 = load i32, ptr %15, align 4, !tbaa !5
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %81) #4
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = load ptr, ptr %8, align 8, !tbaa !9
  %85 = load i32, ptr %14, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %86) #4
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = icmp sle i32 %83, %88
  br label %90

90:                                               ; preds = %78, %64, %61
  %91 = phi i1 [ false, %64 ], [ false, %61 ], [ %89, %78 ]
  br i1 %91, label %92, label %105

92:                                               ; preds = %90
  %93 = load ptr, ptr %8, align 8, !tbaa !9
  %94 = load i32, ptr %15, align 4, !tbaa !5
  %95 = add nsw i32 %94, -1
  store i32 %95, ptr %15, align 4, !tbaa !5
  %96 = sext i32 %94 to i64
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %96) #4
  %98 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %97, ptr noundef nonnull align 4 dereferenceable(4) %16)
          to label %99 unwind label %101

99:                                               ; preds = %92
  %100 = load i32, ptr %98, align 4, !tbaa !5
  store i32 %100, ptr %16, align 4, !tbaa !5
  br label %61, !llvm.loop !13

101:                                              ; preds = %164, %156, %92
  %102 = landingpad { ptr, i32 }
          cleanup
  %103 = extractvalue { ptr, i32 } %102, 0
  store ptr %103, ptr %11, align 8
  %104 = extractvalue { ptr, i32 } %102, 1
  store i32 %104, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @_ZNSt6vectorIxSaIxEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #4
  br label %209

105:                                              ; preds = %90
  %106 = load ptr, ptr %7, align 8, !tbaa !9
  %107 = load i32, ptr %14, align 4, !tbaa !5
  %108 = sub nsw i32 %107, 1
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %109) #4
  %111 = load i32, ptr %110, align 4, !tbaa !5
  %112 = load i32, ptr %6, align 4, !tbaa !5
  %113 = add nsw i32 %111, %112
  %114 = load ptr, ptr %7, align 8, !tbaa !9
  %115 = load i32, ptr %14, align 4, !tbaa !5
  %116 = sext i32 %115 to i64
  %117 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %114, i64 noundef %116) #4
  %118 = load i32, ptr %117, align 4, !tbaa !5
  %119 = icmp sge i32 %113, %118
  br i1 %119, label %120, label %142

120:                                              ; preds = %105
  %121 = load ptr, ptr %7, align 8, !tbaa !9
  %122 = load i32, ptr %14, align 4, !tbaa !5
  %123 = sub nsw i32 %122, 1
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %121, i64 noundef %124) #4
  %126 = load i32, ptr %125, align 4, !tbaa !5
  %127 = load i32, ptr %6, align 4, !tbaa !5
  %128 = add nsw i32 %126, %127
  %129 = load ptr, ptr %7, align 8, !tbaa !9
  %130 = load i32, ptr %14, align 4, !tbaa !5
  %131 = sext i32 %130 to i64
  %132 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %129, i64 noundef %131) #4
  %133 = load i32, ptr %132, align 4, !tbaa !5
  %134 = sub nsw i32 %128, %133
  %135 = mul nsw i32 2, %134
  %136 = sext i32 %135 to i64
  %137 = load i32, ptr %14, align 4, !tbaa !5
  %138 = sext i32 %137 to i64
  %139 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %138) #4
  %140 = load i64, ptr %139, align 8, !tbaa !11
  %141 = sub nsw i64 %140, %136
  store i64 %141, ptr %139, align 8, !tbaa !11
  br label %142

142:                                              ; preds = %120, %105
  %143 = load ptr, ptr %7, align 8, !tbaa !9
  %144 = load i32, ptr %15, align 4, !tbaa !5
  %145 = sext i32 %144 to i64
  %146 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %143, i64 noundef %145) #4
  %147 = load i32, ptr %146, align 4, !tbaa !5
  %148 = load i32, ptr %6, align 4, !tbaa !5
  %149 = add nsw i32 %147, %148
  %150 = load ptr, ptr %7, align 8, !tbaa !9
  %151 = load i32, ptr %14, align 4, !tbaa !5
  %152 = sext i32 %151 to i64
  %153 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %150, i64 noundef %152) #4
  %154 = load i32, ptr %153, align 4, !tbaa !5
  %155 = icmp sge i32 %149, %154
  br i1 %155, label %156, label %164

156:                                              ; preds = %142
  %157 = load ptr, ptr %8, align 8, !tbaa !9
  %158 = load i32, ptr %15, align 4, !tbaa !5
  %159 = sext i32 %158 to i64
  %160 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %157, i64 noundef %159) #4
  %161 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %160, ptr noundef nonnull align 4 dereferenceable(4) %16)
          to label %162 unwind label %101

162:                                              ; preds = %156
  %163 = load i32, ptr %161, align 4, !tbaa !5
  store i32 %163, ptr %16, align 4, !tbaa !5
  br label %164

164:                                              ; preds = %162, %142
  %165 = load ptr, ptr %8, align 8, !tbaa !9
  %166 = load i32, ptr %14, align 4, !tbaa !5
  %167 = sext i32 %166 to i64
  %168 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %165, i64 noundef %167) #4
  %169 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %168, ptr noundef nonnull align 4 dereferenceable(4) %16)
          to label %170 unwind label %101

170:                                              ; preds = %164
  %171 = load i32, ptr %169, align 4, !tbaa !5
  %172 = mul nsw i32 2, %171
  %173 = sext i32 %172 to i64
  %174 = load i32, ptr %14, align 4, !tbaa !5
  %175 = sext i32 %174 to i64
  %176 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %175) #4
  %177 = load i64, ptr %176, align 8, !tbaa !11
  %178 = sub nsw i64 %177, %173
  store i64 %178, ptr %176, align 8, !tbaa !11
  %179 = load i32, ptr %14, align 4, !tbaa !5
  %180 = sext i32 %179 to i64
  %181 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %180) #4
  %182 = load i64, ptr %181, align 8, !tbaa !11
  %183 = srem i64 %182, 1000000007
  store i64 %183, ptr %181, align 8, !tbaa !11
  %184 = load i32, ptr %14, align 4, !tbaa !5
  %185 = sext i32 %184 to i64
  %186 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %185) #4
  %187 = load i64, ptr %186, align 8, !tbaa !11
  %188 = icmp slt i64 %187, 0
  br i1 %188, label %189, label %195

189:                                              ; preds = %170
  %190 = load i32, ptr %14, align 4, !tbaa !5
  %191 = sext i32 %190 to i64
  %192 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %191) #4
  %193 = load i64, ptr %192, align 8, !tbaa !11
  %194 = add nsw i64 %193, 1000000007
  store i64 %194, ptr %192, align 8, !tbaa !11
  br label %195

195:                                              ; preds = %189, %170
  %196 = load i64, ptr %13, align 8, !tbaa !11
  %197 = load i32, ptr %14, align 4, !tbaa !5
  %198 = sext i32 %197 to i64
  %199 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %198) #4
  %200 = load i64, ptr %199, align 8, !tbaa !11
  %201 = mul nsw i64 %196, %200
  %202 = srem i64 %201, 1000000007
  store i64 %202, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %203

203:                                              ; preds = %195
  %204 = load i32, ptr %14, align 4, !tbaa !5
  %205 = add nsw i32 %204, 1
  store i32 %205, ptr %14, align 4, !tbaa !5
  br label %31, !llvm.loop !15

206:                                              ; preds = %35
  %207 = load i64, ptr %13, align 8, !tbaa !11
  %208 = trunc i64 %207 to i32
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @_ZNSt6vectorIxSaIxEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %9) #4
  ret i32 %208

209:                                              ; preds = %101, %36
  call void @llvm.lifetime.end.p0(i64 24, ptr %9) #4
  br label %210

210:                                              ; preds = %209
  %211 = load ptr, ptr %11, align 8
  %212 = load i32, ptr %12, align 4
  %213 = insertvalue { ptr, i32 } poison, ptr %211, 0
  %214 = insertvalue { ptr, i32 } %213, i32 %212, 1
  resume { ptr, i32 } %214
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIxEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIxED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 -1000000006, 1000000007) i32 @_Z10perimetriciiRSt6vectorIiSaIiEES2_(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"class.std::vector", align 8
  %6 = alloca %"class.std::allocator", align 1
  %7 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4
  %8 = sext i32 %0 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #4
  call void @_ZNSaIxEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #4
  invoke void @_ZNSt6vectorIxSaIxEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %8, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %9 unwind label %21

9:                                                ; preds = %4
  call void @_ZNSt15__new_allocatorIxED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #4
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef 0) #4
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = add nsw i32 %11, %1
  %13 = shl nsw i32 %12, 1
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef 0) #4
  store i64 %14, ptr %15, align 8, !tbaa !9
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef 0) #4
  %17 = load i64, ptr %16, align 8, !tbaa !9
  %.05362 = srem i64 %17, 1000000007
  %18 = icmp sgt i32 %0, 1
  br i1 %18, label %.lr.ph65.preheader, label %._crit_edge

.lr.ph65.preheader:                               ; preds = %9
  %19 = add nsw i32 %0, -1
  %wide.trip.count = zext nneg i32 %19 to i64
  br label %.lr.ph65

._crit_edge:                                      ; preds = %96, %9
  %.053.lcssa = phi i64 [ %.05362, %9 ], [ %.053, %96 ]
  %20 = trunc nsw i64 %.053.lcssa to i32
  call void @_ZNSt6vectorIxSaIxEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  ret i32 %20

21:                                               ; preds = %4
  %22 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIxED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  resume { ptr, i32 } %22

.lr.ph65:                                         ; preds = %.lr.ph65.preheader, %96
  %indvars.iv71 = phi i64 [ 1, %.lr.ph65.preheader ], [ %indvars.iv.next72, %96 ]
  %indvars.iv = phi i64 [ 0, %.lr.ph65.preheader ], [ %indvars.iv.next, %96 ]
  %.05364 = phi i64 [ %.05362, %.lr.ph65.preheader ], [ %.053, %96 ]
  %23 = add nsw i64 %indvars.iv71, -1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %23) #4
  %25 = load i64, ptr %24, align 8, !tbaa !9
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv71) #4
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = add nsw i32 %27, %1
  %29 = shl nsw i32 %28, 1
  %30 = sext i32 %29 to i64
  %31 = add nsw i64 %25, %30
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv71) #4
  store i64 %31, ptr %32, align 8, !tbaa !9
  %33 = icmp ugt i64 %indvars.iv71, 1
  br i1 %33, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %.lr.ph65, %44
  %indvars.iv68 = phi i64 [ %indvars.iv.next69, %44 ], [ %indvars.iv, %.lr.ph65 ]
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv68) #4
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %35, %1
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv71) #4
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %.not = icmp slt i32 %36, %38
  br i1 %.not, label %.critedge, label %39

39:                                               ; preds = %.lr.ph
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv68) #4
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv71) #4
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %.not54 = icmp sgt i32 %41, %43
  br i1 %.not54, label %.critedge, label %44

44:                                               ; preds = %39
  %indvars.iv.next69 = add nsw i64 %indvars.iv68, -1
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv68) #4
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %45, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %47 = load i32, ptr %46, align 4, !tbaa !5
  store i32 %47, ptr %7, align 4, !tbaa !5
  %48 = icmp sgt i64 %indvars.iv68, 1
  br i1 %48, label %.lr.ph, label %.critedge, !llvm.loop !11

.critedge:                                        ; preds = %39, %44, %.lr.ph, %.lr.ph65
  %.0.lcssa = phi i64 [ %23, %.lr.ph65 ], [ %indvars.iv68, %.lr.ph ], [ 0, %44 ], [ %indvars.iv68, %39 ]
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %23) #4
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %51 = add nsw i32 %50, %1
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv71) #4
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %.not55 = icmp slt i32 %51, %53
  br i1 %.not55, label %66, label %54

54:                                               ; preds = %.critedge
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %23) #4
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = add nsw i32 %56, %1
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv71) #4
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = sub i32 %57, %59
  %61 = shl nsw i32 %60, 1
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv71) #4
  %64 = load i64, ptr %63, align 8, !tbaa !9
  %65 = sub nsw i64 %64, %62
  store i64 %65, ptr %63, align 8, !tbaa !9
  br label %66

66:                                               ; preds = %54, %.critedge
  %sext = shl i64 %.0.lcssa, 32
  %67 = ashr exact i64 %sext, 32
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %67) #4
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = add nsw i32 %69, %1
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv71) #4
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %.not56 = icmp slt i32 %70, %72
  br i1 %.not56, label %77, label %73

73:                                               ; preds = %66
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %67) #4
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %74, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %76 = load i32, ptr %75, align 4, !tbaa !5
  store i32 %76, ptr %7, align 4, !tbaa !5
  br label %77

77:                                               ; preds = %73, %66
  %78 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv71) #4
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %78, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %81 = shl nsw i32 %80, 1
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv71) #4
  %84 = load i64, ptr %83, align 8, !tbaa !9
  %85 = sub nsw i64 %84, %82
  store i64 %85, ptr %83, align 8, !tbaa !9
  %86 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv71) #4
  %87 = load i64, ptr %86, align 8, !tbaa !9
  %88 = srem i64 %87, 1000000007
  store i64 %88, ptr %86, align 8, !tbaa !9
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv71) #4
  %90 = load i64, ptr %89, align 8, !tbaa !9
  %91 = icmp slt i64 %90, 0
  br i1 %91, label %92, label %96

92:                                               ; preds = %77
  %93 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv71) #4
  %94 = load i64, ptr %93, align 8, !tbaa !9
  %95 = add nsw i64 %94, 1000000007
  store i64 %95, ptr %93, align 8, !tbaa !9
  br label %96

96:                                               ; preds = %92, %77
  %97 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv71) #4
  %98 = load i64, ptr %97, align 8, !tbaa !9
  %99 = mul nsw i64 %98, %.05364
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #4
  %indvars.iv.next72 = add nuw nsw i64 %indvars.iv71, 1
  %.053 = srem i64 %99, 1000000007
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph65, !llvm.loop !13
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIxEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIxSaIxEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIxED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass