; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/freertos (queue)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QueueDefinition = type { ptr, ptr, %union.anon, %struct.xLIST, %struct.xLIST, i64, i64, i64, i8, i8, ptr, i64, i8 }
%union.anon = type { %struct.QueuePointers }
%struct.QueuePointers = type { ptr, ptr }
%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }
%struct.SemaphoreData = type { ptr, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i64 @xTaskRemoveFromEventList(ptr noundef) #1 section "privileged_functions"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden i64 @prvNotifyQueueSetContainer(ptr noundef) #2 section "privileged_functions"

declare i32 @ulSetInterruptMask() #1

declare void @vClearInterruptMask(i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @xQueueGiveFromISR(ptr noundef %0, ptr noundef %1) #2 section "privileged_functions" {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %10, ptr %7, align 8, !tbaa !5
  %11 = load ptr, ptr %7, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %13, label %15

13:                                               ; preds = %2
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !9
  br label %14

14:                                               ; preds = %14, %13
  br label %14

15:                                               ; preds = %2
  %16 = load ptr, ptr %7, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.QueueDefinition, ptr %16, i32 0, i32 7
  %18 = load i64, ptr %17, align 8, !tbaa !10
  %19 = icmp eq i64 %18, 0
  %20 = zext i1 %19 to i32
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %24

22:                                               ; preds = %15
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !16
  br label %23

23:                                               ; preds = %23, %22
  br label %23

24:                                               ; preds = %15
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.QueueDefinition, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 8, !tbaa !17
  %28 = icmp eq ptr %27, null
  br i1 %28, label %29, label %35

29:                                               ; preds = %24
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.QueueDefinition, ptr %30, i32 0, i32 2
  %32 = getelementptr inbounds %struct.SemaphoreData, ptr %31, i32 0, i32 0
  %33 = load ptr, ptr %32, align 8, !tbaa !18
  %34 = icmp ne ptr %33, null
  br label %35

35:                                               ; preds = %29, %24
  %36 = phi i1 [ false, %24 ], [ %34, %29 ]
  %37 = xor i1 %36, true
  %38 = zext i1 %37 to i32
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %40, label %42

40:                                               ; preds = %35
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !19
  br label %41

41:                                               ; preds = %41, %40
  br label %41

42:                                               ; preds = %35
  %43 = call i32 @ulSetInterruptMask()
  %44 = zext i32 %43 to i64
  store i64 %44, ptr %6, align 8, !tbaa !20
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %45 = load ptr, ptr %7, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.QueueDefinition, ptr %45, i32 0, i32 5
  %47 = load volatile i64, ptr %46, align 8, !tbaa !21
  store i64 %47, ptr %8, align 8, !tbaa !20
  %48 = load i64, ptr %8, align 8, !tbaa !20
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.QueueDefinition, ptr %49, i32 0, i32 6
  %51 = load i64, ptr %50, align 8, !tbaa !22
  %52 = icmp ult i64 %48, %51
  br i1 %52, label %53, label %124

53:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  %54 = load ptr, ptr %7, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.QueueDefinition, ptr %54, i32 0, i32 9
  %56 = load volatile i8, ptr %55, align 1, !tbaa !23
  store i8 %56, ptr %9, align 1, !tbaa !18
  %57 = load i64, ptr %8, align 8, !tbaa !20
  %58 = add i64 %57, 1
  %59 = load ptr, ptr %7, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.QueueDefinition, ptr %59, i32 0, i32 5
  store volatile i64 %58, ptr %60, align 8, !tbaa !21
  %61 = load i8, ptr %9, align 1, !tbaa !18
  %62 = sext i8 %61 to i32
  %63 = icmp eq i32 %62, -1
  br i1 %63, label %64, label %108

64:                                               ; preds = %53
  %65 = load ptr, ptr %7, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.QueueDefinition, ptr %65, i32 0, i32 10
  %67 = load ptr, ptr %66, align 8, !tbaa !24
  %68 = icmp ne ptr %67, null
  br i1 %68, label %69, label %82

69:                                               ; preds = %64
  %70 = load ptr, ptr %7, align 8, !tbaa !5
  %71 = call i64 @prvNotifyQueueSetContainer(ptr noundef %70)
  %72 = icmp ne i64 %71, 0
  br i1 %72, label %73, label %80

73:                                               ; preds = %69
  %74 = load ptr, ptr %4, align 8, !tbaa !5
  %75 = icmp ne ptr %74, null
  br i1 %75, label %76, label %78

76:                                               ; preds = %73
  %77 = load ptr, ptr %4, align 8, !tbaa !5
  store i64 1, ptr %77, align 8, !tbaa !20
  br label %79

78:                                               ; preds = %73
  br label %79

79:                                               ; preds = %78, %76
  br label %81

80:                                               ; preds = %69
  br label %81

81:                                               ; preds = %80, %79
  br label %107

82:                                               ; preds = %64
  %83 = load ptr, ptr %7, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.QueueDefinition, ptr %83, i32 0, i32 4
  %85 = getelementptr inbounds %struct.xLIST, ptr %84, i32 0, i32 0
  %86 = load volatile i64, ptr %85, align 8, !tbaa !25
  %87 = icmp eq i64 %86, 0
  %88 = zext i1 %87 to i64
  %89 = select i1 %87, i64 1, i64 0
  %90 = icmp eq i64 %89, 0
  br i1 %90, label %91, label %105

91:                                               ; preds = %82
  %92 = load ptr, ptr %7, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.QueueDefinition, ptr %92, i32 0, i32 4
  %94 = call i64 @xTaskRemoveFromEventList(ptr noundef %93)
  %95 = icmp ne i64 %94, 0
  br i1 %95, label %96, label %103

96:                                               ; preds = %91
  %97 = load ptr, ptr %4, align 8, !tbaa !5
  %98 = icmp ne ptr %97, null
  br i1 %98, label %99, label %101

99:                                               ; preds = %96
  %100 = load ptr, ptr %4, align 8, !tbaa !5
  store i64 1, ptr %100, align 8, !tbaa !20
  br label %102

101:                                              ; preds = %96
  br label %102

102:                                              ; preds = %101, %99
  br label %104

103:                                              ; preds = %91
  br label %104

104:                                              ; preds = %103, %102
  br label %106

105:                                              ; preds = %82
  br label %106

106:                                              ; preds = %105, %104
  br label %107

107:                                              ; preds = %106, %81
  br label %123

108:                                              ; preds = %53
  %109 = load i8, ptr %9, align 1, !tbaa !18
  %110 = sext i8 %109 to i32
  %111 = icmp ne i32 %110, 127
  %112 = zext i1 %111 to i32
  %113 = icmp eq i32 %112, 0
  br i1 %113, label %114, label %116

114:                                              ; preds = %108
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !26
  br label %115

115:                                              ; preds = %115, %114
  br label %115

116:                                              ; preds = %108
  %117 = load i8, ptr %9, align 1, !tbaa !18
  %118 = sext i8 %117 to i32
  %119 = add nsw i32 %118, 1
  %120 = trunc i32 %119 to i8
  %121 = load ptr, ptr %7, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.QueueDefinition, ptr %121, i32 0, i32 9
  store volatile i8 %120, ptr %122, align 1, !tbaa !23
  br label %123

123:                                              ; preds = %116, %107
  store i64 1, ptr %5, align 8, !tbaa !20
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  br label %125

124:                                              ; preds = %42
  store i64 0, ptr %5, align 8, !tbaa !20
  br label %125

125:                                              ; preds = %124, %123
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  %126 = load i64, ptr %6, align 8, !tbaa !20
  %127 = trunc i64 %126 to i32
  call void @vClearInterruptMask(i32 noundef %127)
  %128 = load i64, ptr %5, align 8, !tbaa !20
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret i64 %128
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 2148323329}
!10 = !{!11, !13, i64 128}
!11 = !{!"QueueDefinition", !6, i64 0, !6, i64 8, !7, i64 16, !12, i64 32, !12, i64 72, !13, i64 112, !13, i64 120, !13, i64 128, !7, i64 136, !7, i64 137, !6, i64 144, !13, i64 152, !7, i64 160}
!12 = !{!"xLIST", !13, i64 0, !6, i64 8, !14, i64 16}
!13 = !{!"long", !7, i64 0}
!14 = !{!"xMINI_LIST_ITEM", !15, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"int", !7, i64 0}
!16 = !{i64 2148323481}
!17 = !{!11, !6, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{i64 2148323738}
!20 = !{!13, !13, i64 0}
!21 = !{!11, !13, i64 112}
!22 = !{!11, !13, i64 120}
!23 = !{!11, !7, i64 137}
!24 = !{!11, !6, i64 144}
!25 = !{!11, !13, i64 72}
!26 = !{i64 2148324248}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i64 @xTaskRemoveFromEventList(ptr noundef) local_unnamed_addr #0 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden i64 @prvNotifyQueueSetContainer(ptr noundef) local_unnamed_addr #1 section "privileged_functions"

declare i32 @ulSetInterruptMask() local_unnamed_addr #0

declare void @vClearInterruptMask(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 0, 2) i64 @xQueueGiveFromISR(ptr noundef %0, ptr noundef writeonly %1) local_unnamed_addr #1 section "privileged_functions" {
  %3 = icmp eq ptr %0, null
  br i1 %3, label %4, label %6

4:                                                ; preds = %2
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !5
  br label %5

5:                                                ; preds = %5, %4
  br label %5

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 128
  %8 = load i64, ptr %7, align 8, !tbaa !6
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %11, label %9

9:                                                ; preds = %6
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !15
  br label %10

10:                                               ; preds = %10, %9
  br label %10

11:                                               ; preds = %6
  %12 = load ptr, ptr %0, align 8, !tbaa !16
  %13 = icmp eq ptr %12, null
  br i1 %13, label %14, label %.critedge

14:                                               ; preds = %11
  %15 = getelementptr inbounds i8, ptr %0, i64 16
  %16 = load ptr, ptr %15, align 8, !tbaa !17
  %.not34 = icmp eq ptr %16, null
  br i1 %.not34, label %.critedge, label %17

17:                                               ; preds = %14
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !18
  br label %18

18:                                               ; preds = %18, %17
  br label %18

.critedge:                                        ; preds = %11, %14
  %19 = tail call i32 @ulSetInterruptMask() #2
  %20 = getelementptr inbounds i8, ptr %0, i64 112
  %21 = load volatile i64, ptr %20, align 8, !tbaa !19
  %22 = getelementptr inbounds i8, ptr %0, i64 120
  %23 = load i64, ptr %22, align 8, !tbaa !20
  %24 = icmp ult i64 %21, %23
  br i1 %24, label %25, label %49

25:                                               ; preds = %.critedge
  %26 = getelementptr inbounds i8, ptr %0, i64 137
  %27 = load volatile i8, ptr %26, align 1, !tbaa !21
  %28 = add nuw i64 %21, 1
  store volatile i64 %28, ptr %20, align 8, !tbaa !19
  switch i8 %27, label %47 [
    i8 -1, label %29
    i8 127, label %45
  ]

29:                                               ; preds = %25
  %30 = getelementptr inbounds i8, ptr %0, i64 144
  %31 = load ptr, ptr %30, align 8, !tbaa !22
  %.not32 = icmp eq ptr %31, null
  br i1 %.not32, label %37, label %32

32:                                               ; preds = %29
  %33 = tail call i64 @prvNotifyQueueSetContainer(ptr noundef nonnull %0)
  %34 = icmp ne i64 %33, 0
  %35 = icmp ne ptr %1, null
  %or.cond = and i1 %35, %34
  br i1 %or.cond, label %36, label %49

36:                                               ; preds = %32
  store i64 1, ptr %1, align 8, !tbaa !23
  br label %49

37:                                               ; preds = %29
  %38 = getelementptr inbounds i8, ptr %0, i64 72
  %39 = load volatile i64, ptr %38, align 8, !tbaa !24
  %.not33 = icmp eq i64 %39, 0
  br i1 %.not33, label %49, label %40

40:                                               ; preds = %37
  %41 = tail call i64 @xTaskRemoveFromEventList(ptr noundef nonnull %38) #2
  %42 = icmp ne i64 %41, 0
  %43 = icmp ne ptr %1, null
  %or.cond3 = and i1 %43, %42
  br i1 %or.cond3, label %44, label %49

44:                                               ; preds = %40
  store i64 1, ptr %1, align 8, !tbaa !23
  br label %49

45:                                               ; preds = %25
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !25
  br label %46

46:                                               ; preds = %46, %45
  br label %46

47:                                               ; preds = %25
  %48 = add nuw i8 %27, 1
  store volatile i8 %48, ptr %26, align 1, !tbaa !21
  br label %49

49:                                               ; preds = %.critedge, %47, %40, %44, %37, %36, %32
  %.0 = phi i64 [ 1, %32 ], [ 1, %36 ], [ 1, %37 ], [ 1, %44 ], [ 1, %40 ], [ 1, %47 ], [ 0, %.critedge ]
  tail call void @vClearInterruptMask(i32 noundef %19) #2
  ret i64 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2148323329}
!6 = !{!7, !12, i64 128}
!7 = !{!"QueueDefinition", !8, i64 0, !8, i64 8, !9, i64 16, !11, i64 32, !11, i64 72, !12, i64 112, !12, i64 120, !12, i64 128, !9, i64 136, !9, i64 137, !8, i64 144, !12, i64 152, !9, i64 160}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"xLIST", !12, i64 0, !8, i64 8, !13, i64 16}
!12 = !{!"long", !9, i64 0}
!13 = !{!"xMINI_LIST_ITEM", !14, i64 0, !8, i64 8, !8, i64 16}
!14 = !{!"int", !9, i64 0}
!15 = !{i64 2148323481}
!16 = !{!7, !8, i64 0}
!17 = !{!9, !9, i64 0}
!18 = !{i64 2148323738}
!19 = !{!7, !12, i64 112}
!20 = !{!7, !12, i64 120}
!21 = !{!7, !9, i64 137}
!22 = !{!7, !8, i64 144}
!23 = !{!12, !12, i64 0}
!24 = !{!7, !12, i64 72}
!25 = !{i64 2148324248}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass