; LLVM IR from sp-nitech/SPTK :: src/conversion (cepstrum_to_minimum_phase_impulse_response)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sptk::CepstrumToMinimumPhaseImpulseResponse" = type <{ ptr, i32, i32, i8, [7 x i8] }>

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK4sptk37CepstrumToMinimumPhaseImpulseResponse3RunERKSt6vectorIdSaIdEEPS3_(ptr noundef nonnull align 8 dereferenceable(17) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef %2) #0 align 2 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca double, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %15 = load ptr, ptr %5, align 8
  %16 = getelementptr inbounds %"class.sptk::CepstrumToMinimumPhaseImpulseResponse", ptr %15, i32 0, i32 3
  %17 = load i8, ptr %16, align 8, !tbaa !9, !range !13, !noundef !14
  %18 = trunc i8 %17 to i1
  br i1 %18, label %19, label %30

19:                                               ; preds = %3
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #5
  %22 = getelementptr inbounds %"class.sptk::CepstrumToMinimumPhaseImpulseResponse", ptr %15, i32 0, i32 1
  %23 = load i32, ptr %22, align 8, !tbaa !15
  %24 = add nsw i32 %23, 1
  %25 = sext i32 %24 to i64
  %26 = icmp ne i64 %21, %25
  br i1 %26, label %30, label %27

27:                                               ; preds = %19
  %28 = load ptr, ptr %7, align 8, !tbaa !5
  %29 = icmp eq ptr null, %28
  br i1 %29, label %30, label %31

30:                                               ; preds = %27, %19, %3
  store i1 false, ptr %4, align 1
  br label %113

31:                                               ; preds = %27
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %32) #5
  %34 = getelementptr inbounds %"class.sptk::CepstrumToMinimumPhaseImpulseResponse", ptr %15, i32 0, i32 2
  %35 = load i32, ptr %34, align 4, !tbaa !16
  %36 = add nsw i32 %35, 1
  %37 = sext i32 %36 to i64
  %38 = icmp ne i64 %33, %37
  br i1 %38, label %39, label %45

39:                                               ; preds = %31
  %40 = load ptr, ptr %7, align 8, !tbaa !5
  %41 = getelementptr inbounds %"class.sptk::CepstrumToMinimumPhaseImpulseResponse", ptr %15, i32 0, i32 2
  %42 = load i32, ptr %41, align 4, !tbaa !16
  %43 = add nsw i32 %42, 1
  %44 = sext i32 %43 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %44)
  br label %45

45:                                               ; preds = %39, %31
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef 0) #5
  store ptr %47, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %48 = load ptr, ptr %7, align 8, !tbaa !5
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef 0) #5
  store ptr %49, ptr %9, align 8, !tbaa !5
  %50 = load ptr, ptr %8, align 8, !tbaa !5
  %51 = getelementptr inbounds double, ptr %50, i64 0
  %52 = load double, ptr %51, align 8, !tbaa !17
  %53 = call double @exp(double noundef %52) #5
  %54 = load ptr, ptr %9, align 8, !tbaa !5
  %55 = getelementptr inbounds double, ptr %54, i64 0
  store double %53, ptr %55, align 8, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 1, ptr %10, align 4, !tbaa !19
  br label %56

56:                                               ; preds = %109, %45
  %57 = load i32, ptr %10, align 4, !tbaa !19
  %58 = getelementptr inbounds %"class.sptk::CepstrumToMinimumPhaseImpulseResponse", ptr %15, i32 0, i32 2
  %59 = load i32, ptr %58, align 4, !tbaa !16
  %60 = icmp sle i32 %57, %59
  br i1 %60, label %62, label %61

61:                                               ; preds = %56
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %112

62:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  store double 0.000000e+00, ptr %12, align 8, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  %63 = getelementptr inbounds %"class.sptk::CepstrumToMinimumPhaseImpulseResponse", ptr %15, i32 0, i32 1
  %64 = load i32, ptr %63, align 8, !tbaa !15
  %65 = load i32, ptr %10, align 4, !tbaa !19
  %66 = icmp slt i32 %64, %65
  br i1 %66, label %67, label %70

67:                                               ; preds = %62
  %68 = getelementptr inbounds %"class.sptk::CepstrumToMinimumPhaseImpulseResponse", ptr %15, i32 0, i32 1
  %69 = load i32, ptr %68, align 8, !tbaa !15
  br label %72

70:                                               ; preds = %62
  %71 = load i32, ptr %10, align 4, !tbaa !19
  br label %72

72:                                               ; preds = %70, %67
  %73 = phi i32 [ %69, %67 ], [ %71, %70 ]
  store i32 %73, ptr %13, align 4, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 1, ptr %14, align 4, !tbaa !19
  br label %74

74:                                               ; preds = %97, %72
  %75 = load i32, ptr %14, align 4, !tbaa !19
  %76 = load i32, ptr %13, align 4, !tbaa !19
  %77 = icmp sle i32 %75, %76
  br i1 %77, label %79, label %78

78:                                               ; preds = %74
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %100

79:                                               ; preds = %74
  %80 = load i32, ptr %14, align 4, !tbaa !19
  %81 = sitofp i32 %80 to double
  %82 = load ptr, ptr %8, align 8, !tbaa !5
  %83 = load i32, ptr %14, align 4, !tbaa !19
  %84 = sext i32 %83 to i64
  %85 = getelementptr inbounds double, ptr %82, i64 %84
  %86 = load double, ptr %85, align 8, !tbaa !17
  %87 = fmul double %81, %86
  %88 = load ptr, ptr %9, align 8, !tbaa !5
  %89 = load i32, ptr %10, align 4, !tbaa !19
  %90 = load i32, ptr %14, align 4, !tbaa !19
  %91 = sub nsw i32 %89, %90
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds double, ptr %88, i64 %92
  %94 = load double, ptr %93, align 8, !tbaa !17
  %95 = load double, ptr %12, align 8, !tbaa !17
  %96 = call double @llvm.fmuladd.f64(double %87, double %94, double %95)
  store double %96, ptr %12, align 8, !tbaa !17
  br label %97

97:                                               ; preds = %79
  %98 = load i32, ptr %14, align 4, !tbaa !19
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %14, align 4, !tbaa !19
  br label %74, !llvm.loop !20

100:                                              ; preds = %78
  %101 = load double, ptr %12, align 8, !tbaa !17
  %102 = load i32, ptr %10, align 4, !tbaa !19
  %103 = sitofp i32 %102 to double
  %104 = fdiv double %101, %103
  %105 = load ptr, ptr %9, align 8, !tbaa !5
  %106 = load i32, ptr %10, align 4, !tbaa !19
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds double, ptr %105, i64 %107
  store double %104, ptr %108, align 8, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  br label %109

109:                                              ; preds = %100
  %110 = load i32, ptr %10, align 4, !tbaa !19
  %111 = add nsw i32 %110, 1
  store i32 %111, ptr %10, align 4, !tbaa !19
  br label %56, !llvm.loop !22

112:                                              ; preds = %61
  store i1 true, ptr %4, align 1
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  br label %113

113:                                              ; preds = %112, %30
  %114 = load i1, ptr %4, align 1
  ret i1 %114
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nounwind
declare double @exp(double noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 16}
!10 = !{!"_ZTSN4sptk37CepstrumToMinimumPhaseImpulseResponseE", !11, i64 8, !11, i64 12, !12, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!10, !11, i64 8}
!16 = !{!10, !11, i64 12}
!17 = !{!18, !18, i64 0}
!18 = !{!"double", !7, i64 0}
!19 = !{!11, !11, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZNK4sptk37CepstrumToMinimumPhaseImpulseResponse3RunERKSt6vectorIdSaIdEEPS3_(ptr nocapture noundef nonnull readonly align 8 dereferenceable(17) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef %2) local_unnamed_addr #0 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = load i8, ptr %4, align 8, !tbaa !5, !range !11, !noundef !12
  %6 = trunc nuw i8 %5 to i1
  br i1 %6, label %7, label %.loopexit

7:                                                ; preds = %3
  %8 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #5
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = load i32, ptr %9, align 8, !tbaa !13
  %11 = add nsw i32 %10, 1
  %12 = sext i32 %11 to i64
  %13 = icmp ne i64 %8, %12
  %14 = icmp eq ptr %2, null
  %or.cond = or i1 %14, %13
  br i1 %or.cond, label %.loopexit, label %15

15:                                               ; preds = %7
  %16 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  %17 = getelementptr inbounds i8, ptr %0, i64 12
  %18 = load i32, ptr %17, align 4, !tbaa !14
  %19 = add nsw i32 %18, 1
  %20 = sext i32 %19 to i64
  %.not = icmp eq i64 %16, %20
  br i1 %.not, label %22, label %21

21:                                               ; preds = %15
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %20)
  br label %22

22:                                               ; preds = %21, %15
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #5
  %24 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #5
  %25 = load double, ptr %23, align 8, !tbaa !15
  %26 = tail call double @exp(double noundef %25) #5
  store double %26, ptr %24, align 8, !tbaa !15
  %27 = load i32, ptr %17, align 4, !tbaa !14
  %.not3439 = icmp slt i32 %27, 1
  br i1 %.not3439, label %.loopexit, label %.lr.ph42

.lr.ph42:                                         ; preds = %22
  %28 = load i32, ptr %9, align 8, !tbaa !13
  %29 = add nuw i32 %27, 1
  %wide.trip.count47 = zext i32 %29 to i64
  %.not3536 = icmp slt i32 %28, 1
  br label %30

30:                                               ; preds = %.lr.ph42, %._crit_edge
  %indvar = phi i32 [ 0, %.lr.ph42 ], [ %indvar.next, %._crit_edge ]
  %indvars.iv44 = phi i64 [ 1, %.lr.ph42 ], [ %indvars.iv.next45, %._crit_edge ]
  %31 = add i32 %indvar, 1
  %smin49 = tail call i32 @llvm.smin.i32(i32 %28, i32 %31)
  %32 = add i32 %smin49, 1
  %33 = zext i32 %32 to i64
  %34 = add nsw i64 %33, -1
  %35 = trunc nuw nsw i64 %indvars.iv44 to i32
  br i1 %.not3536, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %30
  %xtraiter = and i64 %34, 1
  %36 = icmp eq i32 %32, 2
  br i1 %36, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %34, -2
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %.lcssa.ph = phi double [ poison, %.lr.ph.preheader ], [ %66, %.lr.ph ]
  %indvars.iv.unr = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next.1, %.lr.ph ]
  %.02937.unr = phi double [ 0.000000e+00, %.lr.ph.preheader ], [ %66, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %37 = trunc nuw nsw i64 %indvars.iv.unr to i32
  %38 = uitofp nneg i32 %37 to double
  %39 = getelementptr inbounds double, ptr %23, i64 %indvars.iv.unr
  %40 = load double, ptr %39, align 8, !tbaa !15
  %41 = fmul double %40, %38
  %42 = sub nsw i64 %indvars.iv44, %indvars.iv.unr
  %43 = getelementptr inbounds double, ptr %24, i64 %42
  %44 = load double, ptr %43, align 8, !tbaa !15
  %45 = tail call double @llvm.fmuladd.f64(double %41, double %44, double %.02937.unr)
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.epil, %._crit_edge.loopexit.unr-lcssa, %30
  %.029.lcssa = phi double [ 0.000000e+00, %30 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %45, %.lr.ph.epil ]
  %46 = uitofp nneg i32 %35 to double
  %47 = fdiv double %.029.lcssa, %46
  %48 = getelementptr inbounds double, ptr %24, i64 %indvars.iv44
  store double %47, ptr %48, align 8, !tbaa !15
  %indvars.iv.next45 = add nuw nsw i64 %indvars.iv44, 1
  %exitcond48.not = icmp eq i64 %indvars.iv.next45, %wide.trip.count47
  %indvar.next = add i32 %indvar, 1
  br i1 %exitcond48.not, label %.loopexit, label %30, !llvm.loop !17

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %.lr.ph ]
  %.02937 = phi double [ 0.000000e+00, %.lr.ph.preheader.new ], [ %66, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %49 = trunc nuw nsw i64 %indvars.iv to i32
  %50 = uitofp nneg i32 %49 to double
  %51 = getelementptr inbounds double, ptr %23, i64 %indvars.iv
  %52 = load double, ptr %51, align 8, !tbaa !15
  %53 = fmul double %52, %50
  %54 = sub nsw i64 %indvars.iv44, %indvars.iv
  %55 = getelementptr inbounds double, ptr %24, i64 %54
  %56 = load double, ptr %55, align 8, !tbaa !15
  %57 = tail call double @llvm.fmuladd.f64(double %53, double %56, double %.02937)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %58 = trunc nuw nsw i64 %indvars.iv.next to i32
  %59 = uitofp nneg i32 %58 to double
  %60 = getelementptr inbounds double, ptr %23, i64 %indvars.iv.next
  %61 = load double, ptr %60, align 8, !tbaa !15
  %62 = fmul double %61, %59
  %63 = sub nsw i64 %indvars.iv44, %indvars.iv.next
  %64 = getelementptr inbounds double, ptr %24, i64 %63
  %65 = load double, ptr %64, align 8, !tbaa !15
  %66 = tail call double @llvm.fmuladd.f64(double %62, double %65, double %57)
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !19

.loopexit:                                        ; preds = %._crit_edge, %22, %3, %7
  %.028 = phi i1 [ false, %7 ], [ false, %3 ], [ true, %22 ], [ true, %._crit_edge ]
  ret i1 %.028
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @exp(double noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"_ZTSN4sptk37CepstrumToMinimumPhaseImpulseResponseE", !7, i64 8, !7, i64 12, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!6, !7, i64 8}
!14 = !{!6, !7, i64 12}
!15 = !{!16, !16, i64 0}
!16 = !{!"double", !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass