; LLVM IR from reyadussalahin/problem-solving :: data_structure/segment_tree/codeforces/F1295E/Solution.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@b = external dso_local global [800080 x i64], align 16
@u = external dso_local global [800080 x i64], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4lazyix(i32 noundef, i64 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #3 {
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %16 = load i32, ptr %10, align 4, !tbaa !5
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = icmp eq i32 %16, %17
  br i1 %18, label %19, label %28

19:                                               ; preds = %5
  %20 = load i32, ptr %9, align 4, !tbaa !5
  %21 = load i32, ptr %11, align 4, !tbaa !5
  %22 = icmp eq i32 %20, %21
  br i1 %22, label %23, label %28

23:                                               ; preds = %19
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [800080 x i64], ptr @b, i64 0, i64 %25
  %27 = load i64, ptr %26, align 8, !tbaa !9
  store i64 %27, ptr %6, align 8
  br label %105

28:                                               ; preds = %19, %5
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [800080 x i64], ptr @u, i64 0, i64 %30
  %32 = load i64, ptr %31, align 8, !tbaa !9
  %33 = icmp ne i64 %32, 0
  br i1 %33, label %34, label %52

34:                                               ; preds = %28
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = mul nsw i32 2, %35
  %37 = add nsw i32 %36, 1
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [800080 x i64], ptr @u, i64 0, i64 %39
  %41 = load i64, ptr %40, align 8, !tbaa !9
  call void @_Z4lazyix(i32 noundef %37, i64 noundef %41)
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = mul nsw i32 2, %42
  %44 = add nsw i32 %43, 2
  %45 = load i32, ptr %7, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds [800080 x i64], ptr @u, i64 0, i64 %46
  %48 = load i64, ptr %47, align 8, !tbaa !9
  call void @_Z4lazyix(i32 noundef %44, i64 noundef %48)
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [800080 x i64], ptr @u, i64 0, i64 %50
  store i64 0, ptr %51, align 8, !tbaa !9
  br label %52

52:                                               ; preds = %34, %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %53 = load i32, ptr %8, align 4, !tbaa !5
  %54 = load i32, ptr %9, align 4, !tbaa !5
  %55 = add nsw i32 %53, %54
  %56 = sdiv i32 %55, 2
  store i32 %56, ptr %12, align 4, !tbaa !5
  %57 = load i32, ptr %11, align 4, !tbaa !5
  %58 = load i32, ptr %12, align 4, !tbaa !5
  %59 = icmp sle i32 %57, %58
  br i1 %59, label %60, label %69

60:                                               ; preds = %52
  %61 = load i32, ptr %7, align 4, !tbaa !5
  %62 = mul nsw i32 2, %61
  %63 = add nsw i32 %62, 1
  %64 = load i32, ptr %8, align 4, !tbaa !5
  %65 = load i32, ptr %12, align 4, !tbaa !5
  %66 = load i32, ptr %10, align 4, !tbaa !5
  %67 = load i32, ptr %11, align 4, !tbaa !5
  %68 = call noundef i64 @_Z5queryiiiii(i32 noundef %63, i32 noundef %64, i32 noundef %65, i32 noundef %66, i32 noundef %67)
  store i64 %68, ptr %6, align 8
  store i32 1, ptr %13, align 4
  br label %104

69:                                               ; preds = %52
  %70 = load i32, ptr %10, align 4, !tbaa !5
  %71 = load i32, ptr %12, align 4, !tbaa !5
  %72 = icmp sgt i32 %70, %71
  br i1 %72, label %73, label %83

73:                                               ; preds = %69
  %74 = load i32, ptr %7, align 4, !tbaa !5
  %75 = mul nsw i32 2, %74
  %76 = add nsw i32 %75, 2
  %77 = load i32, ptr %12, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  %79 = load i32, ptr %9, align 4, !tbaa !5
  %80 = load i32, ptr %10, align 4, !tbaa !5
  %81 = load i32, ptr %11, align 4, !tbaa !5
  %82 = call noundef i64 @_Z5queryiiiii(i32 noundef %76, i32 noundef %78, i32 noundef %79, i32 noundef %80, i32 noundef %81)
  store i64 %82, ptr %6, align 8
  store i32 1, ptr %13, align 4
  br label %104

83:                                               ; preds = %69
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %84 = load i32, ptr %7, align 4, !tbaa !5
  %85 = mul nsw i32 2, %84
  %86 = add nsw i32 %85, 1
  %87 = load i32, ptr %8, align 4, !tbaa !5
  %88 = load i32, ptr %12, align 4, !tbaa !5
  %89 = load i32, ptr %10, align 4, !tbaa !5
  %90 = load i32, ptr %12, align 4, !tbaa !5
  %91 = call noundef i64 @_Z5queryiiiii(i32 noundef %86, i32 noundef %87, i32 noundef %88, i32 noundef %89, i32 noundef %90)
  store i64 %91, ptr %14, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %92 = load i32, ptr %7, align 4, !tbaa !5
  %93 = mul nsw i32 2, %92
  %94 = add nsw i32 %93, 2
  %95 = load i32, ptr %12, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  %97 = load i32, ptr %9, align 4, !tbaa !5
  %98 = load i32, ptr %12, align 4, !tbaa !5
  %99 = add nsw i32 %98, 1
  %100 = load i32, ptr %11, align 4, !tbaa !5
  %101 = call noundef i64 @_Z5queryiiiii(i32 noundef %94, i32 noundef %96, i32 noundef %97, i32 noundef %99, i32 noundef %100)
  store i64 %101, ptr %15, align 8, !tbaa !9
  %102 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %14, ptr noundef nonnull align 8 dereferenceable(8) %15)
  %103 = load i64, ptr %102, align 8, !tbaa !9
  store i64 %103, ptr %6, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  store i32 1, ptr %13, align 4
  br label %104

104:                                              ; preds = %83, %73, %60
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %105

105:                                              ; preds = %104, %23
  %106 = load i64, ptr %6, align 8
  ret i64 %106
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@b = external dso_local local_unnamed_addr global [800080 x i64], align 16
@u = external dso_local local_unnamed_addr global [800080 x i64], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4lazyix(i32 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #2 {
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = icmp eq i32 %3, %1
  %9 = icmp eq i32 %2, %4
  %or.cond5359 = and i1 %8, %9
  br i1 %or.cond5359, label %tailrecurse.outer._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %5, %tailrecurse.outer
  %10 = phi i1 [ %45, %tailrecurse.outer ], [ %8, %5 ]
  %.tr47.ph62 = phi i32 [ %.us-phi58, %tailrecurse.outer ], [ %2, %5 ]
  %.tr46.ph61 = phi i32 [ %44, %tailrecurse.outer ], [ %1, %5 ]
  %.tr.ph60 = phi i32 [ %43, %tailrecurse.outer ], [ %0, %5 ]
  br i1 %10, label %.lr.ph.split, label %.lr.ph.split.us

.lr.ph.split.us:                                  ; preds = %.lr.ph, %tailrecurse.us
  %.tr4755.us = phi i32 [ %21, %tailrecurse.us ], [ %.tr47.ph62, %.lr.ph ]
  %.tr54.us = phi i32 [ %23, %tailrecurse.us ], [ %.tr.ph60, %.lr.ph ]
  %11 = sext i32 %.tr54.us to i64
  %12 = getelementptr inbounds [800080 x i64], ptr @u, i64 0, i64 %11
  %13 = load i64, ptr %12, align 8, !tbaa !5
  %.not.us = icmp eq i64 %13, 0
  br i1 %.not.us, label %19, label %14

14:                                               ; preds = %.lr.ph.split.us
  %15 = shl nsw i32 %.tr54.us, 1
  %16 = or disjoint i32 %15, 1
  tail call void @_Z4lazyix(i32 noundef %16, i64 noundef %13)
  %17 = add nsw i32 %15, 2
  %18 = load i64, ptr %12, align 8, !tbaa !5
  tail call void @_Z4lazyix(i32 noundef %17, i64 noundef %18)
  store i64 0, ptr %12, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %14, %.lr.ph.split.us
  %20 = add i32 %.tr4755.us, %.tr46.ph61
  %21 = sdiv i32 %20, 2
  %.not45.us = icmp slt i32 %21, %4
  br i1 %.not45.us, label %.split.us, label %tailrecurse.us

tailrecurse.us:                                   ; preds = %19
  %22 = shl nsw i32 %.tr54.us, 1
  %23 = or disjoint i32 %22, 1
  br label %.lr.ph.split.us

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer, %tailrecurse, %5
  %.tr.lcssa = phi i32 [ %0, %5 ], [ %39, %tailrecurse ], [ %43, %tailrecurse.outer ]
  %24 = sext i32 %.tr.lcssa to i64
  %25 = getelementptr inbounds [800080 x i64], ptr @b, i64 0, i64 %24
  %26 = load i64, ptr %25, align 8, !tbaa !5
  br label %common.ret127

.lr.ph.split:                                     ; preds = %.lr.ph, %tailrecurse
  %.tr4755 = phi i32 [ %37, %tailrecurse ], [ %.tr47.ph62, %.lr.ph ]
  %.tr54 = phi i32 [ %39, %tailrecurse ], [ %.tr.ph60, %.lr.ph ]
  %27 = sext i32 %.tr54 to i64
  %28 = getelementptr inbounds [800080 x i64], ptr @u, i64 0, i64 %27
  %29 = load i64, ptr %28, align 8, !tbaa !5
  %.not = icmp eq i64 %29, 0
  br i1 %.not, label %35, label %30

30:                                               ; preds = %.lr.ph.split
  %31 = shl nsw i32 %.tr54, 1
  %32 = or disjoint i32 %31, 1
  tail call void @_Z4lazyix(i32 noundef %32, i64 noundef %29)
  %33 = add nsw i32 %31, 2
  %34 = load i64, ptr %28, align 8, !tbaa !5
  tail call void @_Z4lazyix(i32 noundef %33, i64 noundef %34)
  store i64 0, ptr %28, align 8, !tbaa !5
  br label %35

35:                                               ; preds = %30, %.lr.ph.split
  %36 = add i32 %.tr4755, %.tr46.ph61
  %37 = sdiv i32 %36, 2
  %.not45 = icmp slt i32 %37, %4
  br i1 %.not45, label %.split.us, label %tailrecurse

tailrecurse:                                      ; preds = %35
  %38 = shl nsw i32 %.tr54, 1
  %39 = or disjoint i32 %38, 1
  %40 = icmp eq i32 %37, %4
  br i1 %40, label %tailrecurse.outer._crit_edge, label %.lr.ph.split

.split.us:                                        ; preds = %19, %35
  %.us-phi = phi i32 [ %37, %35 ], [ %21, %19 ]
  %.us-phi57 = phi i32 [ %.tr54, %35 ], [ %.tr54.us, %19 ]
  %.us-phi58 = phi i32 [ %.tr4755, %35 ], [ %.tr4755.us, %19 ]
  %41 = icmp slt i32 %.us-phi, %3
  br i1 %41, label %tailrecurse.outer, label %47

tailrecurse.outer:                                ; preds = %.split.us
  %42 = shl nsw i32 %.us-phi57, 1
  %43 = add nsw i32 %42, 2
  %44 = add nsw i32 %.us-phi, 1
  %45 = icmp eq i32 %44, %3
  %46 = icmp eq i32 %.us-phi58, %4
  %or.cond53 = and i1 %45, %46
  br i1 %or.cond53, label %tailrecurse.outer._crit_edge, label %.lr.ph

common.ret127:                                    ; preds = %47, %tailrecurse.outer._crit_edge
  %common.ret127.op = phi i64 [ %26, %tailrecurse.outer._crit_edge ], [ %55, %47 ]
  ret i64 %common.ret127.op

47:                                               ; preds = %.split.us
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
  %48 = shl nsw i32 %.us-phi57, 1
  %49 = or disjoint i32 %48, 1
  %50 = tail call noundef i64 @_Z5queryiiiii(i32 noundef %49, i32 noundef %.tr46.ph61, i32 noundef %.us-phi, i32 noundef %3, i32 noundef %.us-phi)
  store i64 %50, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
  %51 = add nsw i32 %48, 2
  %52 = add nsw i32 %.us-phi, 1
  %53 = tail call noundef i64 @_Z5queryiiiii(i32 noundef %51, i32 noundef %52, i32 noundef %.us-phi58, i32 noundef %52, i32 noundef %4)
  store i64 %53, ptr %7, align 8, !tbaa !5
  %54 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7)
  %55 = load i64, ptr %54, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
  br label %common.ret127
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass