; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/scugic_v3 (Connect)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XScuGic = type { ptr, i32, i32 }
%struct.XScuGic_Config = type { i16, i32, i32, [95 x %struct.XScuGic_VectorTableEntry] }
%struct.XScuGic_VectorTableEntry = type { ptr, ptr }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [164 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XScuGic_Connect(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %12, label %13

12:                                               ; preds = %4
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %14

13:                                               ; preds = %4
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 458)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %5, align 4
  br label %50

14:                                               ; preds = %12
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = icmp ult i32 %15, 95
  br i1 %16, label %17, label %18

17:                                               ; preds = %14
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %19

18:                                               ; preds = %14
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 459)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %5, align 4
  br label %50

19:                                               ; preds = %17
  %20 = load ptr, ptr %8, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %22, label %23

22:                                               ; preds = %19
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %24

23:                                               ; preds = %19
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 460)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %5, align 4
  br label %50

24:                                               ; preds = %22
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.XScuGic, ptr %25, i32 0, i32 1
  %27 = load i32, ptr %26, align 8, !tbaa !11
  %28 = icmp eq i32 %27, 286331153
  br i1 %28, label %29, label %30

29:                                               ; preds = %24
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %31

30:                                               ; preds = %24
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 461)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %5, align 4
  br label %50

31:                                               ; preds = %29
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.XScuGic, ptr %33, i32 0, i32 0
  %35 = load ptr, ptr %34, align 8, !tbaa !13
  %36 = getelementptr inbounds %struct.XScuGic_Config, ptr %35, i32 0, i32 3
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = zext i32 %37 to i64
  %39 = getelementptr inbounds [95 x %struct.XScuGic_VectorTableEntry], ptr %36, i64 0, i64 %38
  %40 = getelementptr inbounds %struct.XScuGic_VectorTableEntry, ptr %39, i32 0, i32 0
  store ptr %32, ptr %40, align 8, !tbaa !14
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XScuGic, ptr %42, i32 0, i32 0
  %44 = load ptr, ptr %43, align 8, !tbaa !13
  %45 = getelementptr inbounds %struct.XScuGic_Config, ptr %44, i32 0, i32 3
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = zext i32 %46 to i64
  %48 = getelementptr inbounds [95 x %struct.XScuGic_VectorTableEntry], ptr %45, i64 0, i64 %47
  %49 = getelementptr inbounds %struct.XScuGic_VectorTableEntry, ptr %48, i32 0, i32 1
  store ptr %41, ptr %49, align 8, !tbaa !16
  store i32 0, ptr %5, align 4
  br label %50

50:                                               ; preds = %31, %30, %23, %18, %13
  %51 = load i32, ptr %5, align 4
  ret i32 %51
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}
!13 = !{!12, !6, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"", !6, i64 0, !6, i64 8}
!16 = !{!15, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XScuGic_VectorTableEntry = type { ptr, ptr }

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [164 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @XScuGic_Connect(ptr noundef readonly %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #1 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %7, label %5

5:                                                ; preds = %4
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %6 = icmp ult i32 %1, 95
  br i1 %6, label %8, label %9

7:                                                ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 458) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %22

8:                                                ; preds = %5
  %.not12 = icmp eq ptr %2, null
  br i1 %.not12, label %14, label %10

9:                                                ; preds = %5
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 459) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %22

10:                                               ; preds = %8
  %11 = getelementptr inbounds i8, ptr %0, i64 8
  %12 = load i32, ptr %11, align 8, !tbaa !9
  %13 = icmp eq i32 %12, 286331153
  br i1 %13, label %15, label %21

14:                                               ; preds = %8
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 460) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %22

15:                                               ; preds = %10
  %16 = load ptr, ptr %0, align 8, !tbaa !12
  %17 = getelementptr inbounds i8, ptr %16, i64 16
  %18 = zext nneg i32 %1 to i64
  %19 = getelementptr inbounds [95 x %struct.XScuGic_VectorTableEntry], ptr %17, i64 0, i64 %18
  store ptr %2, ptr %19, align 8, !tbaa !13
  %20 = getelementptr inbounds [95 x %struct.XScuGic_VectorTableEntry], ptr %17, i64 0, i64 %18, i32 1
  store ptr %3, ptr %20, align 8, !tbaa !15
  br label %22

21:                                               ; preds = %10
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 461) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %15, %21, %14, %9, %7
  ret i32 0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"", !11, i64 0, !6, i64 8, !6, i64 12}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"", !11, i64 0, !11, i64 8}
!15 = !{!14, !11, i64 8}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass