; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/evaluation/src/slre (libslre)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.slre_cap = type { ptr, i32 }

@text = external dso_local global [46 x i8], align 16
@regexes = external dso_local global [4 x ptr], align 16

; Function Attrs: nounwind uwtable
declare dso_local i32 @slre_match(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind willreturn memory(read)
declare i64 @strlen(ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @benchmark_slre() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca %struct.slre_cap, align 8
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  %5 = call i64 @strlen(ptr noundef @text) #4
  %6 = trunc i64 %5 to i32
  store i32 %6, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store volatile i32 0, ptr %4, align 4, !tbaa !5
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %19, %0
  %8 = load i32, ptr %1, align 4, !tbaa !5
  %9 = icmp slt i32 %8, 4
  br i1 %9, label %10, label %22

10:                                               ; preds = %7
  %11 = load i32, ptr %1, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [4 x ptr], ptr @regexes, i64 0, i64 %12
  %14 = load ptr, ptr %13, align 8, !tbaa !9
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = call i32 @slre_match(ptr noundef %14, ptr noundef @text, i32 noundef %15, ptr noundef %3, i32 noundef 1)
  %17 = load volatile i32, ptr %4, align 4, !tbaa !5
  %18 = add nsw i32 %17, %16
  store volatile i32 %18, ptr %4, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %10
  %20 = load i32, ptr %1, align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr %1, align 4, !tbaa !5
  br label %7, !llvm.loop !11

22:                                               ; preds = %7
  %23 = load volatile i32, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret i32 %23
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.slre_cap = type { ptr, i32 }

@text = external dso_local global [46 x i8], align 16
@regexes = external dso_local local_unnamed_addr global [4 x ptr], align 16

; Function Attrs: nounwind uwtable
declare dso_local i32 @slre_match(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i64 @strlen(ptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @benchmark_slre() local_unnamed_addr #0 {
  %1 = alloca %struct.slre_cap, align 8
  %2 = alloca i32, align 4
  %3 = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) @text) #3
  %4 = trunc i64 %3 to i32
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)
  store volatile i32 0, ptr %2, align 4, !tbaa !5
  %5 = load ptr, ptr @regexes, align 16, !tbaa !9
  %6 = call i32 @slre_match(ptr noundef %5, ptr noundef nonnull @text, i32 noundef %4, ptr noundef nonnull %1, i32 noundef 1)
  %.0..0..0..0. = load volatile i32, ptr %2, align 4, !tbaa !5
  %7 = add nsw i32 %.0..0..0..0., %6
  store volatile i32 %7, ptr %2, align 4, !tbaa !5
  %8 = load ptr, ptr getelementptr inbounds (i8, ptr @regexes, i64 8), align 8, !tbaa !9
  %9 = call i32 @slre_match(ptr noundef %8, ptr noundef nonnull @text, i32 noundef %4, ptr noundef nonnull %1, i32 noundef 1)
  %.0..0..0..0..1 = load volatile i32, ptr %2, align 4, !tbaa !5
  %10 = add nsw i32 %.0..0..0..0..1, %9
  store volatile i32 %10, ptr %2, align 4, !tbaa !5
  %11 = load ptr, ptr getelementptr inbounds (i8, ptr @regexes, i64 16), align 16, !tbaa !9
  %12 = call i32 @slre_match(ptr noundef %11, ptr noundef nonnull @text, i32 noundef %4, ptr noundef nonnull %1, i32 noundef 1)
  %.0..0..0..0..2 = load volatile i32, ptr %2, align 4, !tbaa !5
  %13 = add nsw i32 %.0..0..0..0..2, %12
  store volatile i32 %13, ptr %2, align 4, !tbaa !5
  %14 = load ptr, ptr getelementptr inbounds (i8, ptr @regexes, i64 24), align 8, !tbaa !9
  %15 = call i32 @slre_match(ptr noundef %14, ptr noundef nonnull @text, i32 noundef %4, ptr noundef nonnull %1, i32 noundef 1)
  %.0..0..0..0..3 = load volatile i32, ptr %2, align 4, !tbaa !5
  %16 = add nsw i32 %.0..0..0..0..3, %15
  store volatile i32 %16, ptr %2, align 4, !tbaa !5
  %.0..0..0..0.1 = load volatile i32, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) #4
  ret i32 %.0..0..0..0.1
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass