; LLVM IR from BlueBrain/CoreNeuron :: coreneuron/permute (cellorder1)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }
%"class.coreneuron::TNode" = type <{ ptr, ptr, %"class.std::vector", i64, i64, i64, i64, i64, i64, i64, i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl" }
%"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl" = type { %"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN10coreneuron5TNodeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN10coreneuron15level_from_leafERSt6vectorIPNS_5TNodeESaIS2_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %10 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %11 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store i64 0, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = call noundef i64 @_ZNKSt6vectorIPN10coreneuron5TNodeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  %14 = sub i64 %13, 1
  store i64 %14, ptr %4, align 8, !tbaa !9
  br label %15

15:                                               ; preds = %67, %1
  br i1 true, label %17, label %16

16:                                               ; preds = %15
  store i32 2, ptr %5, align 4
  br label %70

17:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = load i64, ptr %4, align 8, !tbaa !9
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %19) #3
  %21 = load ptr, ptr %20, align 8, !tbaa !5
  store ptr %21, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = getelementptr inbounds %"class.coreneuron::TNode", ptr %22, i32 0, i32 2
  store ptr %23, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %24 = load ptr, ptr %8, align 8, !tbaa !5
  %25 = call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %24) #3
  %26 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %9, i32 0, i32 0
  store ptr %25, ptr %26, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %27 = load ptr, ptr %8, align 8, !tbaa !5
  %28 = call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %27) #3
  %29 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %10, i32 0, i32 0
  store ptr %28, ptr %29, align 8
  br label %30

30:                                               ; preds = %48, %17
  %31 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10) #3
  br i1 %31, label %33, label %32

32:                                               ; preds = %30
  store i32 5, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %50

33:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %9) #3
  store ptr %34, ptr %11, align 8, !tbaa !5
  %35 = load i64, ptr %7, align 8, !tbaa !9
  %36 = load ptr, ptr %11, align 8, !tbaa !5
  %37 = load ptr, ptr %36, align 8, !tbaa !5
  %38 = getelementptr inbounds %"class.coreneuron::TNode", ptr %37, i32 0, i32 7
  %39 = load i64, ptr %38, align 8, !tbaa !11
  %40 = icmp ule i64 %35, %39
  br i1 %40, label %41, label %47

41:                                               ; preds = %33
  %42 = load ptr, ptr %11, align 8, !tbaa !5
  %43 = load ptr, ptr %42, align 8, !tbaa !5
  %44 = getelementptr inbounds %"class.coreneuron::TNode", ptr %43, i32 0, i32 7
  %45 = load i64, ptr %44, align 8, !tbaa !11
  %46 = add i64 %45, 1
  store i64 %46, ptr %7, align 8, !tbaa !9
  br label %47

47:                                               ; preds = %41, %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  br label %48

48:                                               ; preds = %47
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %9) #3
  br label %30

50:                                               ; preds = %32
  %51 = load i64, ptr %7, align 8, !tbaa !9
  %52 = load ptr, ptr %6, align 8, !tbaa !5
  %53 = getelementptr inbounds %"class.coreneuron::TNode", ptr %52, i32 0, i32 7
  store i64 %51, ptr %53, align 8, !tbaa !11
  %54 = load i64, ptr %3, align 8, !tbaa !9
  %55 = load i64, ptr %7, align 8, !tbaa !9
  %56 = icmp ult i64 %54, %55
  br i1 %56, label %57, label %59

57:                                               ; preds = %50
  %58 = load i64, ptr %7, align 8, !tbaa !9
  store i64 %58, ptr %3, align 8, !tbaa !9
  br label %59

59:                                               ; preds = %57, %50
  %60 = load i64, ptr %4, align 8, !tbaa !9
  %61 = icmp eq i64 %60, 0
  br i1 %61, label %62, label %63

62:                                               ; preds = %59
  store i32 2, ptr %5, align 4
  br label %64

63:                                               ; preds = %59
  store i32 0, ptr %5, align 4
  br label %64

64:                                               ; preds = %63, %62
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %65 = load i32, ptr %5, align 4
  switch i32 %65, label %70 [
    i32 0, label %66
  ]

66:                                               ; preds = %64
  br label %67

67:                                               ; preds = %66
  %68 = load i64, ptr %4, align 8, !tbaa !9
  %69 = add i64 %68, -1
  store i64 %69, ptr %4, align 8, !tbaa !9
  br label %15, !llvm.loop !18

70:                                               ; preds = %64, %16
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  br label %71

71:                                               ; preds = %70
  %72 = load i64, ptr %3, align 8, !tbaa !9
  store i32 1, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret i64 %72
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 72}
!12 = !{!"_ZTSN10coreneuron5TNodeE", !6, i64 8, !13, i64 16, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !17, i64 96}
!13 = !{!"_ZTSSt6vectorIPN10coreneuron5TNodeESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"int", !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN10coreneuron5TNodeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN10coreneuron15level_from_leafERSt6vectorIPNS_5TNodeESaIS2_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %3 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %4 = tail call noundef i64 @_ZNKSt6vectorIPN10coreneuron5TNodeESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  br label %5

5:                                                ; preds = %._crit_edge, %1
  %.017.in = phi i64 [ %4, %1 ], [ %.017, %._crit_edge ]
  %.0 = phi i64 [ 0, %1 ], [ %spec.select, %._crit_edge ]
  %.017 = add i64 %.017.in, -1
  %6 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.017) #4
  %7 = load ptr, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %7, i64 16
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
  %9 = call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  store ptr %9, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  %10 = call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  store ptr %10, ptr %3, align 8
  %11 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  br i1 %11, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %5
  %.018.lcssa = phi i64 [ 0, %5 ], [ %spec.select23, %.lr.ph ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  %12 = getelementptr inbounds i8, ptr %7, i64 72
  store i64 %.018.lcssa, ptr %12, align 8, !tbaa !9
  %spec.select = call i64 @llvm.umax.i64(i64 %.0, i64 %.018.lcssa)
  %.not = icmp eq i64 %.017, 0
  br i1 %.not, label %20, label %5, !llvm.loop !17

.lr.ph:                                           ; preds = %5, %.lr.ph
  %.01824 = phi i64 [ %spec.select23, %.lr.ph ], [ 0, %5 ]
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  %14 = load ptr, ptr %13, align 8, !tbaa !5
  %15 = getelementptr inbounds i8, ptr %14, i64 72
  %16 = load i64, ptr %15, align 8, !tbaa !9
  %.not22 = icmp ugt i64 %.01824, %16
  %17 = add i64 %16, 1
  %spec.select23 = select i1 %.not22, i64 %.01824, i64 %17
  %18 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  %19 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  br i1 %19, label %.lr.ph, label %._crit_edge

20:                                               ; preds = %._crit_edge
  ret i64 %spec.select
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !15, i64 72}
!10 = !{!"_ZTSN10coreneuron5TNodeE", !6, i64 8, !11, i64 16, !15, i64 40, !15, i64 48, !15, i64 56, !15, i64 64, !15, i64 72, !15, i64 80, !15, i64 88, !16, i64 96}
!11 = !{!"_ZTSSt6vectorIPN10coreneuron5TNodeESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"long", !7, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass