; LLVM IR from vmartinv/eldiego :: math/phollards.rho.ll (Z3rhox)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z6mulmodxxx(i64 noundef, i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z3rhox(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  %8 = load i64, ptr %3, align 8, !tbaa !5
  %9 = and i64 %8, 1
  %10 = icmp eq i64 %9, 0
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  store i64 2, ptr %2, align 8
  br label %74

12:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  store i64 2, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  store i64 2, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 1, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %13 = call i32 @rand() #4
  %14 = sext i32 %13 to i64
  %15 = load i64, ptr %3, align 8, !tbaa !5
  %16 = srem i64 %14, %15
  %17 = add nsw i64 %16, 1
  store i64 %17, ptr %7, align 8, !tbaa !5
  br label %18

18:                                               ; preds = %62, %12
  %19 = load i64, ptr %6, align 8, !tbaa !5
  %20 = icmp eq i64 %19, 1
  br i1 %20, label %21, label %63

21:                                               ; preds = %18
  %22 = load i64, ptr %4, align 8, !tbaa !5
  %23 = load i64, ptr %4, align 8, !tbaa !5
  %24 = load i64, ptr %3, align 8, !tbaa !5
  %25 = call noundef i64 @_Z6mulmodxxx(i64 noundef %22, i64 noundef %23, i64 noundef %24)
  %26 = load i64, ptr %7, align 8, !tbaa !5
  %27 = add nsw i64 %25, %26
  %28 = load i64, ptr %3, align 8, !tbaa !5
  %29 = srem i64 %27, %28
  store i64 %29, ptr %4, align 8, !tbaa !5
  %30 = load i64, ptr %5, align 8, !tbaa !5
  %31 = load i64, ptr %5, align 8, !tbaa !5
  %32 = load i64, ptr %3, align 8, !tbaa !5
  %33 = call noundef i64 @_Z6mulmodxxx(i64 noundef %30, i64 noundef %31, i64 noundef %32)
  %34 = load i64, ptr %7, align 8, !tbaa !5
  %35 = add nsw i64 %33, %34
  %36 = load i64, ptr %3, align 8, !tbaa !5
  %37 = srem i64 %35, %36
  store i64 %37, ptr %5, align 8, !tbaa !5
  %38 = load i64, ptr %5, align 8, !tbaa !5
  %39 = load i64, ptr %5, align 8, !tbaa !5
  %40 = load i64, ptr %3, align 8, !tbaa !5
  %41 = call noundef i64 @_Z6mulmodxxx(i64 noundef %38, i64 noundef %39, i64 noundef %40)
  %42 = load i64, ptr %7, align 8, !tbaa !5
  %43 = add nsw i64 %41, %42
  %44 = load i64, ptr %3, align 8, !tbaa !5
  %45 = srem i64 %43, %44
  store i64 %45, ptr %5, align 8, !tbaa !5
  %46 = load i64, ptr %4, align 8, !tbaa !5
  %47 = load i64, ptr %5, align 8, !tbaa !5
  %48 = sub nsw i64 %46, %47
  %49 = icmp sge i64 %48, 0
  br i1 %49, label %50, label %56

50:                                               ; preds = %21
  %51 = load i64, ptr %4, align 8, !tbaa !5
  %52 = load i64, ptr %5, align 8, !tbaa !5
  %53 = sub nsw i64 %51, %52
  %54 = load i64, ptr %3, align 8, !tbaa !5
  %55 = call noundef i64 @_Z3gcdxx(i64 noundef %53, i64 noundef %54)
  store i64 %55, ptr %6, align 8, !tbaa !5
  br label %62

56:                                               ; preds = %21
  %57 = load i64, ptr %5, align 8, !tbaa !5
  %58 = load i64, ptr %4, align 8, !tbaa !5
  %59 = sub nsw i64 %57, %58
  %60 = load i64, ptr %3, align 8, !tbaa !5
  %61 = call noundef i64 @_Z3gcdxx(i64 noundef %59, i64 noundef %60)
  store i64 %61, ptr %6, align 8, !tbaa !5
  br label %62

62:                                               ; preds = %56, %50
  br label %18, !llvm.loop !9

63:                                               ; preds = %18
  %64 = load i64, ptr %6, align 8, !tbaa !5
  %65 = load i64, ptr %3, align 8, !tbaa !5
  %66 = icmp eq i64 %64, %65
  br i1 %66, label %67, label %70

67:                                               ; preds = %63
  %68 = load i64, ptr %3, align 8, !tbaa !5
  %69 = call noundef i64 @_Z3rhox(i64 noundef %68)
  br label %72

70:                                               ; preds = %63
  %71 = load i64, ptr %6, align 8, !tbaa !5
  br label %72

72:                                               ; preds = %70, %67
  %73 = phi i64 [ %69, %67 ], [ %71, %70 ]
  store i64 %73, ptr %2, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  br label %74

74:                                               ; preds = %72, %11
  %75 = load i64, ptr %2, align 8
  ret i64 %75
}

; Function Attrs: nounwind
declare i32 @rand() #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_Z3gcdxx(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_Z6mulmodxxx(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i64 2, 1) i64 @_Z3rhox(i64 noundef %0) local_unnamed_addr #0 {
  %2 = and i64 %0, 1
  %3 = icmp eq i64 %2, 0
  br i1 %3, label %.split38, label %tailrecurse

tailrecurse:                                      ; preds = %1, %21
  %4 = tail call i32 @rand() #4
  %5 = sext i32 %4 to i64
  %6 = srem i64 %5, %0
  %7 = add nsw i64 %6, 1
  br label %8

8:                                                ; preds = %tailrecurse, %8
  %.03237 = phi i64 [ 2, %tailrecurse ], [ %17, %8 ]
  %.03336 = phi i64 [ 2, %tailrecurse ], [ %11, %8 ]
  %9 = tail call noundef i64 @_Z6mulmodxxx(i64 noundef %.03336, i64 noundef %.03336, i64 noundef %0)
  %10 = add nsw i64 %9, %7
  %11 = srem i64 %10, %0
  %12 = tail call noundef i64 @_Z6mulmodxxx(i64 noundef %.03237, i64 noundef %.03237, i64 noundef %0)
  %13 = add nsw i64 %12, %7
  %14 = srem i64 %13, %0
  %15 = tail call noundef i64 @_Z6mulmodxxx(i64 noundef %14, i64 noundef %14, i64 noundef %0)
  %16 = add nsw i64 %15, %7
  %17 = srem i64 %16, %0
  %18 = sub nsw i64 %11, %17
  %.sink = tail call i64 @llvm.abs.i64(i64 %18, i1 false)
  %19 = tail call noundef i64 @_Z3gcdxx(i64 noundef %.sink, i64 noundef %0)
  %20 = icmp eq i64 %19, 1
  br i1 %20, label %8, label %21, !llvm.loop !5

21:                                               ; preds = %8
  %22 = icmp eq i64 %19, %0
  br i1 %22, label %tailrecurse, label %.split38

.split38:                                         ; preds = %21, %1
  %.0.split = phi i64 [ 2, %1 ], [ %19, %21 ]
  ret i64 %.0.split
}

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.abs.i64(i64, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass