; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/qspips_v3 (CfgInitialize)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XQspiPs = type { %struct.XQspiPs_Config, i32, ptr, ptr, i32, i32, i32, ptr, ptr, i32 }
%struct.XQspiPs_Config = type { i16, i32, i32, i8 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @XQspiPs_CfgInitialize(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %12

11:                                               ; preds = %3
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 209)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  br label %49

12:                                               ; preds = %10
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %16

15:                                               ; preds = %12
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %17

16:                                               ; preds = %12
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 210)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  br label %49

17:                                               ; preds = %15
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.XQspiPs, ptr %18, i32 0, i32 6
  %20 = load i32, ptr %19, align 8, !tbaa !11
  %21 = icmp eq i32 %20, 1
  br i1 %21, label %22, label %23

22:                                               ; preds = %17
  store i32 5, ptr %4, align 4
  br label %49

23:                                               ; preds = %17
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.XQspiPs, ptr %24, i32 0, i32 6
  store i32 0, ptr %25, align 8, !tbaa !11
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.XQspiPs, ptr %27, i32 0, i32 0
  %29 = getelementptr inbounds %struct.XQspiPs_Config, ptr %28, i32 0, i32 1
  store i32 %26, ptr %29, align 4, !tbaa !15
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.XQspiPs, ptr %30, i32 0, i32 7
  store ptr @StubStatusHandler, ptr %31, align 8, !tbaa !16
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.XQspiPs, ptr %32, i32 0, i32 2
  store ptr null, ptr %33, align 8, !tbaa !17
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.XQspiPs, ptr %34, i32 0, i32 3
  store ptr null, ptr %35, align 8, !tbaa !18
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.XQspiPs, ptr %36, i32 0, i32 4
  store i32 0, ptr %37, align 8, !tbaa !19
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.XQspiPs, ptr %38, i32 0, i32 5
  store i32 0, ptr %39, align 4, !tbaa !20
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.XQspiPs, ptr %40, i32 0, i32 1
  store i32 286331153, ptr %41, align 8, !tbaa !21
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XQspiPs_Config, ptr %42, i32 0, i32 3
  %44 = load i8, ptr %43, align 4, !tbaa !22
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.XQspiPs, ptr %45, i32 0, i32 0
  %47 = getelementptr inbounds %struct.XQspiPs_Config, ptr %46, i32 0, i32 3
  store i8 %44, ptr %47, align 4, !tbaa !23
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  call void @XQspiPs_Reset(ptr noundef %48)
  store i32 0, ptr %4, align 4
  br label %49

49:                                               ; preds = %23, %22, %16, %11
  %50 = load i32, ptr %4, align 4
  ret i32 %50
}

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @StubStatusHandler(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @XQspiPs_Reset(ptr noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 48}
!12 = !{!"", !13, i64 0, !10, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !6, i64 56, !6, i64 64, !10, i64 72}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !7, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !10, i64 4}
!16 = !{!12, !6, i64 56}
!17 = !{!12, !6, i64 24}
!18 = !{!12, !6, i64 32}
!19 = !{!12, !10, i64 40}
!20 = !{!12, !10, i64 44}
!21 = !{!12, !10, i64 16}
!22 = !{!13, !7, i64 12}
!23 = !{!12, !7, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 6) i32 @XQspiPs_CfgInitialize(ptr noundef %0, ptr noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %.not17 = icmp eq ptr %1, null
  br i1 %.not17, label %10, label %6

5:                                                ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 209) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %19

6:                                                ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 48
  %8 = load i32, ptr %7, align 8, !tbaa !9
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %19, label %11

10:                                               ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 210) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %19

11:                                               ; preds = %6
  store i32 0, ptr %7, align 8, !tbaa !9
  %12 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %2, ptr %12, align 4, !tbaa !14
  %13 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr @StubStatusHandler, ptr %13, align 8, !tbaa !15
  %14 = getelementptr inbounds i8, ptr %0, i64 24
  %15 = getelementptr inbounds i8, ptr %0, i64 16
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %14, i8 0, i64 24, i1 false)
  store i32 286331153, ptr %15, align 8, !tbaa !16
  %16 = getelementptr inbounds i8, ptr %1, i64 12
  %17 = load i8, ptr %16, align 4, !tbaa !17
  %18 = getelementptr inbounds i8, ptr %0, i64 12
  store i8 %17, ptr %18, align 4, !tbaa !18
  tail call void @XQspiPs_Reset(ptr noundef nonnull %0)
  br label %19

19:                                               ; preds = %6, %11, %10, %5
  %.0 = phi i32 [ 0, %11 ], [ 0, %10 ], [ 0, %5 ], [ 5, %6 ]
  ret i32 %.0
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @StubStatusHandler(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @XQspiPs_Reset(ptr noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 48}
!10 = !{!"", !11, i64 0, !6, i64 16, !13, i64 24, !13, i64 32, !6, i64 40, !6, i64 44, !6, i64 48, !13, i64 56, !13, i64 64, !6, i64 72}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !7, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !6, i64 4}
!15 = !{!10, !13, i64 56}
!16 = !{!10, !6, i64 16}
!17 = !{!11, !7, i64 12}
!18 = !{!10, !7, i64 12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass