; LLVM IR from sp-nitech/SPTK :: src/generation/m_sequence_generation.ll (ZN4sptk19MSequenceGeneration3GetEPd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sptk::MSequenceGeneration" = type <{ %"class.sptk::RandomGenerationInterface", i32, [4 x i8] }>
%"class.sptk::RandomGenerationInterface" = type { ptr }

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN4sptk19MSequenceGeneration3GetEPd(ptr noundef nonnull align 8 dereferenceable(12) %0, ptr noundef %1) unnamed_addr #0 align 2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = icmp eq ptr null, %9
  br i1 %10, label %11, label %12

11:                                               ; preds = %2
  store i1 false, ptr %3, align 1
  br label %46

12:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %13 = getelementptr inbounds %"class.sptk::MSequenceGeneration", ptr %8, i32 0, i32 1
  %14 = load i32, ptr %13, align 8, !tbaa !9
  %15 = ashr i32 %14, 1
  store i32 %15, ptr %13, align 8, !tbaa !9
  %16 = getelementptr inbounds %"class.sptk::MSequenceGeneration", ptr %8, i32 0, i32 1
  %17 = load i32, ptr %16, align 8, !tbaa !9
  %18 = and i32 %17, 1
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %12
  store i32 1, ptr %6, align 4, !tbaa !13
  br label %22

21:                                               ; preds = %12
  store i32 -1, ptr %6, align 4, !tbaa !13
  br label %22

22:                                               ; preds = %21, %20
  %23 = getelementptr inbounds %"class.sptk::MSequenceGeneration", ptr %8, i32 0, i32 1
  %24 = load i32, ptr %23, align 8, !tbaa !9
  %25 = and i32 %24, 268435456
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %28

27:                                               ; preds = %22
  store i32 1, ptr %7, align 4, !tbaa !13
  br label %29

28:                                               ; preds = %22
  store i32 -1, ptr %7, align 4, !tbaa !13
  br label %29

29:                                               ; preds = %28, %27
  %30 = load i32, ptr %6, align 4, !tbaa !13
  %31 = load i32, ptr %7, align 4, !tbaa !13
  %32 = add nsw i32 %30, %31
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %38

34:                                               ; preds = %29
  %35 = getelementptr inbounds %"class.sptk::MSequenceGeneration", ptr %8, i32 0, i32 1
  %36 = load i32, ptr %35, align 8, !tbaa !9
  %37 = and i32 %36, 2147483647
  store i32 %37, ptr %35, align 8, !tbaa !9
  br label %42

38:                                               ; preds = %29
  %39 = getelementptr inbounds %"class.sptk::MSequenceGeneration", ptr %8, i32 0, i32 1
  %40 = load i32, ptr %39, align 8, !tbaa !9
  %41 = or i32 %40, -2147483648
  store i32 %41, ptr %39, align 8, !tbaa !9
  br label %42

42:                                               ; preds = %38, %34
  %43 = load i32, ptr %6, align 4, !tbaa !13
  %44 = sitofp i32 %43 to double
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  store double %44, ptr %45, align 8, !tbaa !14
  store i1 true, ptr %3, align 1
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %46

46:                                               ; preds = %42, %11
  %47 = load i1, ptr %3, align 1
  ret i1 %47
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"_ZTSN4sptk19MSequenceGenerationE", !11, i64 0, !12, i64 8}
!11 = !{!"_ZTSN4sptk25RandomGenerationInterfaceE"}
!12 = !{!"int", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"double", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local noundef zeroext i1 @_ZN4sptk19MSequenceGeneration3GetEPd(ptr nocapture noundef nonnull align 8 dereferenceable(12) %0, ptr noundef writeonly %1) unnamed_addr #0 align 2 {
  %3 = icmp ne ptr %1, null
  br i1 %3, label %4, label %12

4:                                                ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = lshr i32 %6, 1
  %8 = and i32 %6, 2
  %.not = icmp eq i32 %8, 0
  %. = select i1 %.not, i32 -1, i32 1
  %9 = and i32 %6, 536870912
  %.not9 = icmp eq i32 %9, 0
  %.not10 = xor i1 %.not, %.not9
  %10 = or disjoint i32 %7, -2147483648
  %storemerge = select i1 %.not10, i32 %10, i32 %7
  store i32 %storemerge, ptr %5, align 8, !tbaa !5
  %11 = sitofp i32 %. to double
  store double %11, ptr %1, align 8, !tbaa !11
  br label %12

12:                                               ; preds = %2, %4
  ret i1 %3
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"_ZTSN4sptk19MSequenceGenerationE", !7, i64 0, !8, i64 8}
!7 = !{!"_ZTSN4sptk25RandomGenerationInterfaceE"}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !9, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass