; LLVM IR from thekyria/elabtsaot2 :: emulator_hw/hardware_model/emulatorhw.ll (ZN9elabtsaot10EmulatorHw12set_got_gainEd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.elabtsaot::EmulatorHw" = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl" }
%"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl" = type { %"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl_data" }
%"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.elabtsaot::Slice" = type <{ %"class.elabtsaot::SliceAnalog", %"class.elabtsaot::SliceDigital", i32, [4 x i8] }>
%"class.elabtsaot::SliceAnalog" = type { double, double, %"class.elabtsaot::DAC", %"class.elabtsaot::DAC", %"class.std::vector.0" }
%"class.elabtsaot::DAC" = type <{ double, double, i32, i32, i32, [4 x i8], double, double, double, double, i32, [4 x i8] }>
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.elabtsaot::SliceDigital" = type { %"class.elabtsaot::GPFPQPipeline", %"class.elabtsaot::GPFSlackPipeline", %"class.elabtsaot::TDGeneratorPipeline", %"class.elabtsaot::TDConstZLoadPipeline", %"class.elabtsaot::TDConstILoadPipeline", %"class.elabtsaot::TDConstPLoadPipeline", [4 x [6 x i32]], [4 x [6 x double]], [4 x [6 x double]] }
%"class.elabtsaot::GPFPQPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15", %"class.std::vector.15" }
%"class.elabtsaot::Pipeline" = type { ptr, %"class.std::vector.5", i64, i64, i64, i64, %"class.std::vector.10" }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.elabtsaot::GPFSlackPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15" }
%"class.elabtsaot::TDGeneratorPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.20", %"class.std::vector.15", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20" }
%"class.std::vector.20" = type { %"struct.std::_Vector_base.21" }
%"struct.std::_Vector_base.21" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.elabtsaot::TDConstZLoadPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15", %"class.std::vector.15" }
%"class.elabtsaot::TDConstILoadPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15" }
%"class.elabtsaot::TDConstPLoadPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15", %"class.std::vector.15" }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(1676) ptr @_ZNSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN9elabtsaot10EmulatorHw12set_got_gainEd(ptr noundef nonnull align 8 dereferenceable(24) %0, double noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca double, align 8
  %5 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store double %1, ptr %4, align 8, !tbaa !9
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  store i64 0, ptr %5, align 8, !tbaa !11
  br label %7

7:                                                ; preds = %20, %2
  %8 = load i64, ptr %5, align 8, !tbaa !11
  %9 = getelementptr inbounds %"class.elabtsaot::EmulatorHw", ptr %6, i32 0, i32 0
  %10 = call noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #2
  %11 = icmp ne i64 %8, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  br label %23

13:                                               ; preds = %7
  %14 = load double, ptr %4, align 8, !tbaa !9
  %15 = getelementptr inbounds %"class.elabtsaot::EmulatorHw", ptr %6, i32 0, i32 0
  %16 = load i64, ptr %5, align 8, !tbaa !11
  %17 = call noundef nonnull align 8 dereferenceable(1676) ptr @_ZNSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %16) #2
  %18 = getelementptr inbounds %"struct.elabtsaot::Slice", ptr %17, i32 0, i32 0
  %19 = getelementptr inbounds %"class.elabtsaot::SliceAnalog", ptr %18, i32 0, i32 0
  store double %14, ptr %19, align 8, !tbaa !13
  br label %20

20:                                               ; preds = %13
  %21 = load i64, ptr %5, align 8, !tbaa !11
  %22 = add i64 %21, 1
  store i64 %22, ptr %5, align 8, !tbaa !11
  br label %7, !llvm.loop !46

23:                                               ; preds = %12
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"_ZTSN9elabtsaot5SliceE", !15, i64 0, !22, i64 184, !17, i64 1672}
!15 = !{!"_ZTSN9elabtsaot11SliceAnalogE", !10, i64 0, !10, i64 8, !16, i64 16, !16, i64 88, !18, i64 160}
!16 = !{!"_ZTSN9elabtsaot3DACE", !10, i64 0, !10, i64 8, !17, i64 16, !17, i64 20, !17, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !17, i64 64}
!17 = !{!"int", !7, i64 0}
!18 = !{!"_ZTSSt6vectorIS_IN9elabtsaot4AtomESaIS1_EESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseISt6vectorIN9elabtsaot4AtomESaIS2_EESaIS4_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN9elabtsaot4AtomESaIS2_EESaIS4_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN9elabtsaot4AtomESaIS2_EESaIS4_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSN9elabtsaot12SliceDigitalE", !23, i64 0, !37, i64 136, !38, i64 248, !43, i64 624, !44, i64 760, !45, i64 872, !7, i64 1008, !7, i64 1104, !7, i64 1296}
!23 = !{!"_ZTSN9elabtsaot13GPFPQPipelineE", !24, i64 0, !33, i64 88, !33, i64 112}
!24 = !{!"_ZTSN9elabtsaot8PipelineE", !25, i64 8, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !29, i64 64}
!25 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!"_ZTSSt6vectorISt4pairIiiESaIS1_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseISt4pairIiiESaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorISt7complexIdESaIS1_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseISt7complexIdESaIS1_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseISt7complexIdESaIS1_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseISt7complexIdESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSN9elabtsaot16GPFSlackPipelineE", !24, i64 0, !33, i64 88}
!38 = !{!"_ZTSN9elabtsaot19TDGeneratorPipelineE", !24, i64 0, !39, i64 88, !33, i64 112, !39, i64 136, !39, i64 160, !39, i64 184, !39, i64 208, !39, i64 232, !39, i64 256, !39, i64 280, !39, i64 304, !39, i64 328, !39, i64 352}
!39 = !{!"_ZTSSt6vectorIdSaIdEE", !40, i64 0}
!40 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !42, i64 0}
!42 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!43 = !{!"_ZTSN9elabtsaot20TDConstZLoadPipelineE", !24, i64 0, !33, i64 88, !33, i64 112}
!44 = !{!"_ZTSN9elabtsaot20TDConstILoadPipelineE", !24, i64 0, !33, i64 88}
!45 = !{!"_ZTSN9elabtsaot20TDConstPLoadPipelineE", !24, i64 0, !33, i64 88, !33, i64 112}
!46 = distinct !{!46, !47}
!47 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(1676) ptr @_ZNSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN9elabtsaot10EmulatorHw12set_got_gainEd(ptr noundef nonnull align 8 dereferenceable(24) %0, double noundef %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not4 = icmp eq i64 %3, 0
  br i1 %.not4, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %2
  ret void

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.05 = phi i64 [ %5, %.lr.ph ], [ 0, %2 ]
  %4 = tail call noundef nonnull align 8 dereferenceable(1676) ptr @_ZNSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.05) #1
  store double %1, ptr %4, align 8, !tbaa !5
  %5 = add i64 %.05, 1
  %6 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not = icmp eq i64 %5, %6
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !43
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"_ZTSN9elabtsaot5SliceE", !7, i64 0, !18, i64 184, !12, i64 1672}
!7 = !{!"_ZTSN9elabtsaot11SliceAnalogE", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 88, !13, i64 160}
!8 = !{!"double", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSN9elabtsaot3DACE", !8, i64 0, !8, i64 8, !12, i64 16, !12, i64 20, !12, i64 24, !8, i64 32, !8, i64 40, !8, i64 48, !8, i64 56, !12, i64 64}
!12 = !{!"int", !9, i64 0}
!13 = !{!"_ZTSSt6vectorIS_IN9elabtsaot4AtomESaIS1_EESaIS3_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseISt6vectorIN9elabtsaot4AtomESaIS2_EESaIS4_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN9elabtsaot4AtomESaIS2_EESaIS4_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseISt6vectorIN9elabtsaot4AtomESaIS2_EESaIS4_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!17 = !{!"any pointer", !9, i64 0}
!18 = !{!"_ZTSN9elabtsaot12SliceDigitalE", !19, i64 0, !34, i64 136, !35, i64 248, !40, i64 624, !41, i64 760, !42, i64 872, !9, i64 1008, !9, i64 1104, !9, i64 1296}
!19 = !{!"_ZTSN9elabtsaot13GPFPQPipelineE", !20, i64 0, !30, i64 88, !30, i64 112}
!20 = !{!"_ZTSN9elabtsaot8PipelineE", !21, i64 8, !25, i64 32, !25, i64 40, !25, i64 48, !25, i64 56, !26, i64 64}
!21 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!25 = !{!"long", !9, i64 0}
!26 = !{!"_ZTSSt6vectorISt4pairIiiESaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseISt4pairIiiESaIS1_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!30 = !{!"_ZTSSt6vectorISt7complexIdESaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseISt7complexIdESaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt7complexIdESaIS1_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseISt7complexIdESaIS1_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!34 = !{!"_ZTSN9elabtsaot16GPFSlackPipelineE", !20, i64 0, !30, i64 88}
!35 = !{!"_ZTSN9elabtsaot19TDGeneratorPipelineE", !20, i64 0, !36, i64 88, !30, i64 112, !36, i64 136, !36, i64 160, !36, i64 184, !36, i64 208, !36, i64 232, !36, i64 256, !36, i64 280, !36, i64 304, !36, i64 328, !36, i64 352}
!36 = !{!"_ZTSSt6vectorIdSaIdEE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!40 = !{!"_ZTSN9elabtsaot20TDConstZLoadPipelineE", !20, i64 0, !30, i64 88, !30, i64 112}
!41 = !{!"_ZTSN9elabtsaot20TDConstILoadPipelineE", !20, i64 0, !30, i64 88}
!42 = !{!"_ZTSN9elabtsaot20TDConstPLoadPipelineE", !20, i64 0, !30, i64 88, !30, i64 112}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass