; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/freertos (stream_buffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local ptr @xStreamBufferGenericCreate(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 section "privileged_functions" {
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %9 = load i64, ptr %6, align 8, !tbaa !5
  %10 = icmp eq i64 %9, 1
  br i1 %10, label %11, label %19

11:                                               ; preds = %3
  store i8 1, ptr %8, align 1, !tbaa !9
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = icmp ugt i64 %12, 8
  %14 = zext i1 %13 to i32
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %18

16:                                               ; preds = %11
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !10
  br label %17

17:                                               ; preds = %17, %16
  br label %17

18:                                               ; preds = %11
  br label %27

19:                                               ; preds = %3
  store i8 0, ptr %8, align 1, !tbaa !9
  %20 = load i64, ptr %4, align 8, !tbaa !5
  %21 = icmp ugt i64 %20, 0
  %22 = zext i1 %21 to i32
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %26

24:                                               ; preds = %19
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !11
  br label %25

25:                                               ; preds = %25, %24
  br label %25

26:                                               ; preds = %19
  br label %27

27:                                               ; preds = %26, %18
  %28 = load i64, ptr %5, align 8, !tbaa !5
  %29 = load i64, ptr %4, align 8, !tbaa !5
  %30 = icmp ule i64 %28, %29
  %31 = zext i1 %30 to i32
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %35

33:                                               ; preds = %27
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !12
  br label %34

34:                                               ; preds = %34, %33
  br label %34

35:                                               ; preds = %27
  %36 = load i64, ptr %5, align 8, !tbaa !5
  %37 = icmp eq i64 %36, 0
  br i1 %37, label %38, label %39

38:                                               ; preds = %35
  store i64 1, ptr %5, align 8, !tbaa !5
  br label %39

39:                                               ; preds = %38, %35
  %40 = load i64, ptr %4, align 8, !tbaa !5
  %41 = load i64, ptr %4, align 8, !tbaa !5
  %42 = add i64 %41, 1
  %43 = add i64 %42, 72
  %44 = icmp ult i64 %40, %43
  br i1 %44, label %45, label %51

45:                                               ; preds = %39
  %46 = load i64, ptr %4, align 8, !tbaa !5
  %47 = add i64 %46, 1
  store i64 %47, ptr %4, align 8, !tbaa !5
  %48 = load i64, ptr %4, align 8, !tbaa !5
  %49 = add i64 %48, 72
  %50 = call ptr @pvPortMalloc(i64 noundef %49)
  store ptr %50, ptr %7, align 8, !tbaa !13
  br label %52

51:                                               ; preds = %39
  store ptr null, ptr %7, align 8, !tbaa !13
  br label %52

52:                                               ; preds = %51, %45
  %53 = load ptr, ptr %7, align 8, !tbaa !13
  %54 = icmp ne ptr %53, null
  br i1 %54, label %55, label %62

55:                                               ; preds = %52
  %56 = load ptr, ptr %7, align 8, !tbaa !13
  %57 = load ptr, ptr %7, align 8, !tbaa !13
  %58 = getelementptr inbounds i8, ptr %57, i64 72
  %59 = load i64, ptr %4, align 8, !tbaa !5
  %60 = load i64, ptr %5, align 8, !tbaa !5
  %61 = load i8, ptr %8, align 1, !tbaa !9
  call void @prvInitialiseNewStreamBuffer(ptr noundef %56, ptr noundef %58, i64 noundef %59, i64 noundef %60, i8 noundef zeroext %61)
  br label %63

62:                                               ; preds = %52
  br label %63

63:                                               ; preds = %62, %55
  %64 = load ptr, ptr %7, align 8, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret ptr %64
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @pvPortMalloc(i64 noundef) #2 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewStreamBuffer(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i8 noundef zeroext) #0 section "privileged_functions"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{i64 2148085797}
!11 = !{i64 2148085945}
!12 = !{i64 2148086111}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local ptr @xStreamBufferGenericCreate(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 section "privileged_functions" {
  %4 = icmp eq i64 %2, 1
  br i1 %4, label %5, label %9

5:                                                ; preds = %3
  %6 = icmp ult i64 %0, 9
  br i1 %6, label %7, label %12

7:                                                ; preds = %5
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !5
  br label %8

8:                                                ; preds = %8, %7
  br label %8

9:                                                ; preds = %3
  %.not = icmp eq i64 %0, 0
  br i1 %.not, label %10, label %12

10:                                               ; preds = %9
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !6
  br label %11

11:                                               ; preds = %11, %10
  br label %11

12:                                               ; preds = %9, %5
  %.0 = phi i8 [ 1, %5 ], [ 0, %9 ]
  %.not20 = icmp ugt i64 %1, %0
  br i1 %.not20, label %13, label %15

13:                                               ; preds = %12
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !7
  br label %14

14:                                               ; preds = %14, %13
  br label %14

15:                                               ; preds = %12
  %spec.store.select = tail call i64 @llvm.umax.i64(i64 %1, i64 1)
  %16 = icmp ult i64 %0, -73
  br i1 %16, label %17, label %.thread

17:                                               ; preds = %15
  %18 = add nuw i64 %0, 73
  %19 = tail call ptr @pvPortMalloc(i64 noundef %18) #3
  %.not21 = icmp eq ptr %19, null
  br i1 %.not21, label %.thread, label %20

20:                                               ; preds = %17
  %21 = add nuw i64 %0, 1
  %22 = getelementptr inbounds i8, ptr %19, i64 72
  tail call void @prvInitialiseNewStreamBuffer(ptr noundef nonnull %19, ptr noundef nonnull %22, i64 noundef %21, i64 noundef %spec.store.select, i8 noundef zeroext %.0)
  br label %.thread

.thread:                                          ; preds = %15, %17, %20
  %.01625 = phi ptr [ null, %17 ], [ %19, %20 ], [ null, %15 ]
  ret ptr %.01625
}

declare ptr @pvPortMalloc(i64 noundef) local_unnamed_addr #1 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden void @prvInitialiseNewStreamBuffer(ptr noundef, ptr noundef, i64 noundef, i64 noundef, i8 noundef zeroext) local_unnamed_addr #0 section "privileged_functions"

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2148085797}
!6 = !{i64 2148085945}
!7 = !{i64 2148086111}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass