; LLVM IR from sbshah97/DS-Algo-Handbook :: labs/lab2/Merge_Sort/merge_sort.ll (Z5mergeiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@a = external dso_local global %"class.std::vector", align 8
@b = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5mergeiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %10 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %10, ptr %7, align 4, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %11, ptr %8, align 4, !tbaa !5
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = add nsw i32 %12, 1
  store i32 %13, ptr %9, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %45, %3
  %15 = load i32, ptr %8, align 4, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = icmp sle i32 %15, %16
  br i1 %17, label %18, label %22

18:                                               ; preds = %14
  %19 = load i32, ptr %9, align 4, !tbaa !5
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br label %22

22:                                               ; preds = %18, %14
  %23 = phi i1 [ false, %14 ], [ %21, %18 ]
  br i1 %23, label %24, label %50

24:                                               ; preds = %22
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %26) #3
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = load i32, ptr %9, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %30) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp sle i32 %28, %32
  br i1 %33, label %34, label %39

34:                                               ; preds = %24
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %8, align 4, !tbaa !5
  %37 = sext i32 %35 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %37) #3
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @b, ptr noundef nonnull align 4 dereferenceable(4) %38)
  br label %44

39:                                               ; preds = %24
  %40 = load i32, ptr %9, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %9, align 4, !tbaa !5
  %42 = sext i32 %40 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %42) #3
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @b, ptr noundef nonnull align 4 dereferenceable(4) %43)
  br label %44

44:                                               ; preds = %39, %34
  br label %45

45:                                               ; preds = %44
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %7, align 4, !tbaa !5
  %48 = load i32, ptr %8, align 4, !tbaa !5
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %8, align 4, !tbaa !5
  br label %14, !llvm.loop !9

50:                                               ; preds = %22
  br label %51

51:                                               ; preds = %55, %50
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = load i32, ptr %5, align 4, !tbaa !5
  %54 = icmp sle i32 %52, %53
  br i1 %54, label %55, label %60

55:                                               ; preds = %51
  %56 = load i32, ptr %8, align 4, !tbaa !5
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %8, align 4, !tbaa !5
  %58 = sext i32 %56 to i64
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %58) #3
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @b, ptr noundef nonnull align 4 dereferenceable(4) %59)
  br label %51, !llvm.loop !11

60:                                               ; preds = %51
  br label %61

61:                                               ; preds = %65, %60
  %62 = load i32, ptr %9, align 4, !tbaa !5
  %63 = load i32, ptr %5, align 4, !tbaa !5
  %64 = icmp sle i32 %62, %63
  br i1 %64, label %65, label %70

65:                                               ; preds = %61
  %66 = load i32, ptr %9, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %9, align 4, !tbaa !5
  %68 = sext i32 %66 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %68) #3
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @b, ptr noundef nonnull align 4 dereferenceable(4) %69)
  br label %61, !llvm.loop !12

70:                                               ; preds = %61
  call void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) @a) #3
  %71 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %71, ptr %7, align 4, !tbaa !5
  br label %72

72:                                               ; preds = %84, %70
  %73 = load i32, ptr %7, align 4, !tbaa !5
  %74 = load i32, ptr %6, align 4, !tbaa !5
  %75 = icmp sle i32 %73, %74
  br i1 %75, label %76, label %87

76:                                               ; preds = %72
  %77 = load i32, ptr %7, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %78) #3
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %81 = load i32, ptr %7, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %82) #3
  store i32 %80, ptr %83, align 4, !tbaa !5
  br label %84

84:                                               ; preds = %76
  %85 = load i32, ptr %7, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %7, align 4, !tbaa !5
  br label %72, !llvm.loop !13

87:                                               ; preds = %72
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@a = external dso_local global %"class.std::vector", align 8
@b = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5mergeiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = add i32 %1, 1
  %5 = icmp sle i32 %0, %1
  %6 = icmp slt i32 %1, %2
  %7 = and i1 %5, %6
  br i1 %7, label %.lr.ph, label %.preheader33

.preheader33:                                     ; preds = %.lr.ph, %3
  %.025.lcssa = phi i32 [ %0, %3 ], [ %18, %.lr.ph ]
  %.0.lcssa = phi i32 [ %4, %3 ], [ %.1, %.lr.ph ]
  %.not37 = icmp sgt i32 %.025.lcssa, %1
  br i1 %.not37, label %.preheader, label %.lr.ph39.preheader

.lr.ph39.preheader:                               ; preds = %.preheader33
  %8 = sext i32 %.025.lcssa to i64
  br label %.lr.ph39

.lr.ph:                                           ; preds = %3, %.lr.ph
  %.035 = phi i32 [ %.1, %.lr.ph ], [ %4, %3 ]
  %.02534 = phi i32 [ %18, %.lr.ph ], [ %0, %3 ]
  %9 = sext i32 %.02534 to i64
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %9) #2
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = sext i32 %.035 to i64
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %12) #2
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %.not32 = icmp sle i32 %11, %14
  %.sink59 = select i1 %.not32, i64 %9, i64 %12
  %15 = zext i1 %.not32 to i32
  %.126 = add nsw i32 %.02534, %15
  %not..not32 = xor i1 %.not32, true
  %16 = zext i1 %not..not32 to i32
  %.1 = add nsw i32 %.035, %16
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %.sink59) #2
  tail call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @b, ptr noundef nonnull align 4 dereferenceable(4) %17)
  %18 = add nsw i32 %.126, 1
  %19 = icmp slt i32 %.126, %1
  %20 = icmp sle i32 %.1, %2
  %21 = select i1 %19, i1 %20, i1 false
  br i1 %21, label %.lr.ph, label %.preheader33, !llvm.loop !9

.preheader:                                       ; preds = %.lr.ph39, %.preheader33
  %.not3040 = icmp sgt i32 %.0.lcssa, %1
  br i1 %.not3040, label %._crit_edge, label %.lr.ph42.preheader

.lr.ph42.preheader:                               ; preds = %.preheader
  %22 = sext i32 %.0.lcssa to i64
  br label %.lr.ph42

.lr.ph39:                                         ; preds = %.lr.ph39.preheader, %.lr.ph39
  %indvars.iv = phi i64 [ %8, %.lr.ph39.preheader ], [ %indvars.iv.next, %.lr.ph39 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %indvars.iv) #2
  tail call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @b, ptr noundef nonnull align 4 dereferenceable(4) %23)
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %4, %lftr.wideiv
  br i1 %exitcond.not, label %.preheader, label %.lr.ph39, !llvm.loop !11

.lr.ph42:                                         ; preds = %.lr.ph42.preheader, %.lr.ph42
  %indvars.iv49 = phi i64 [ %22, %.lr.ph42.preheader ], [ %indvars.iv.next50, %.lr.ph42 ]
  %indvars.iv.next50 = add nsw i64 %indvars.iv49, 1
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %indvars.iv49) #2
  tail call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @b, ptr noundef nonnull align 4 dereferenceable(4) %24)
  %lftr.wideiv52 = trunc i64 %indvars.iv.next50 to i32
  %exitcond53.not = icmp eq i32 %4, %lftr.wideiv52
  br i1 %exitcond53.not, label %._crit_edge, label %.lr.ph42, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph42, %.preheader
  tail call void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) @a) #2
  %.not3143 = icmp sgt i32 %0, %2
  br i1 %.not3143, label %._crit_edge47, label %.lr.ph46.preheader

.lr.ph46.preheader:                               ; preds = %._crit_edge
  %25 = sext i32 %0 to i64
  %26 = add i32 %2, 1
  br label %.lr.ph46

.lr.ph46:                                         ; preds = %.lr.ph46.preheader, %.lr.ph46
  %indvars.iv54 = phi i64 [ %25, %.lr.ph46.preheader ], [ %indvars.iv.next55, %.lr.ph46 ]
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv54) #2
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %indvars.iv54) #2
  store i32 %28, ptr %29, align 4, !tbaa !5
  %indvars.iv.next55 = add nsw i64 %indvars.iv54, 1
  %lftr.wideiv57 = trunc i64 %indvars.iv.next55 to i32
  %exitcond58.not = icmp eq i32 %26, %lftr.wideiv57
  br i1 %exitcond58.not, label %._crit_edge47, label %.lr.ph46, !llvm.loop !13

._crit_edge47:                                    ; preds = %.lr.ph46, %._crit_edge
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass