; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/gpiops_v3 (GetBankPin)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @XGetPlatform_Info() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @XGpioPs_GetBankPin(i8 noundef zeroext %0, ptr noundef %1, ptr noundef %2) #2 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca [6 x i32], align 16
  %8 = alloca i32, align 4
  store i8 %0, ptr %4, align 1, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !8
  store ptr %2, ptr %6, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 24, ptr %7) #4
  call void @llvm.memset.p0.i64(ptr align 16 %7, i8 0, i64 24, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %9 = call i32 @XGetPlatform_Info()
  store i32 %9, ptr %8, align 4, !tbaa !10
  %10 = load i32, ptr %8, align 4, !tbaa !10
  %11 = icmp eq i32 %10, 1
  br i1 %11, label %12, label %40

12:                                               ; preds = %3
  %13 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 0
  store i32 25, ptr %13, align 16, !tbaa !10
  %14 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 1
  store i32 51, ptr %14, align 4, !tbaa !10
  %15 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 2
  store i32 77, ptr %15, align 8, !tbaa !10
  %16 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 3
  store i32 109, ptr %16, align 4, !tbaa !10
  %17 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 4
  store i32 141, ptr %17, align 16, !tbaa !10
  %18 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 5
  store i32 173, ptr %18, align 4, !tbaa !10
  %19 = load ptr, ptr %5, align 8, !tbaa !8
  store i8 0, ptr %19, align 1, !tbaa !5
  br label %20

20:                                               ; preds = %35, %12
  %21 = load ptr, ptr %5, align 8, !tbaa !8
  %22 = load i8, ptr %21, align 1, !tbaa !5
  %23 = zext i8 %22 to i32
  %24 = icmp ult i32 %23, 6
  br i1 %24, label %25, label %39

25:                                               ; preds = %20
  %26 = load i8, ptr %4, align 1, !tbaa !5
  %27 = zext i8 %26 to i32
  %28 = load ptr, ptr %5, align 8, !tbaa !8
  %29 = load i8, ptr %28, align 1, !tbaa !5
  %30 = zext i8 %29 to i64
  %31 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 %30
  %32 = load i32, ptr %31, align 4, !tbaa !10
  %33 = icmp ule i32 %27, %32
  br i1 %33, label %34, label %35

34:                                               ; preds = %25
  br label %39

35:                                               ; preds = %25
  %36 = load ptr, ptr %5, align 8, !tbaa !8
  %37 = load i8, ptr %36, align 1, !tbaa !5
  %38 = add i8 %37, 1
  store i8 %38, ptr %36, align 1, !tbaa !5
  br label %20, !llvm.loop !12

39:                                               ; preds = %34, %20
  br label %66

40:                                               ; preds = %3
  %41 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 0
  store i32 31, ptr %41, align 16, !tbaa !10
  %42 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 1
  store i32 53, ptr %42, align 4, !tbaa !10
  %43 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 2
  store i32 85, ptr %43, align 8, !tbaa !10
  %44 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 3
  store i32 117, ptr %44, align 4, !tbaa !10
  %45 = load ptr, ptr %5, align 8, !tbaa !8
  store i8 0, ptr %45, align 1, !tbaa !5
  br label %46

46:                                               ; preds = %61, %40
  %47 = load ptr, ptr %5, align 8, !tbaa !8
  %48 = load i8, ptr %47, align 1, !tbaa !5
  %49 = zext i8 %48 to i32
  %50 = icmp ult i32 %49, 4
  br i1 %50, label %51, label %65

51:                                               ; preds = %46
  %52 = load i8, ptr %4, align 1, !tbaa !5
  %53 = zext i8 %52 to i32
  %54 = load ptr, ptr %5, align 8, !tbaa !8
  %55 = load i8, ptr %54, align 1, !tbaa !5
  %56 = zext i8 %55 to i64
  %57 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 %56
  %58 = load i32, ptr %57, align 4, !tbaa !10
  %59 = icmp ule i32 %53, %58
  br i1 %59, label %60, label %61

60:                                               ; preds = %51
  br label %65

61:                                               ; preds = %51
  %62 = load ptr, ptr %5, align 8, !tbaa !8
  %63 = load i8, ptr %62, align 1, !tbaa !5
  %64 = add i8 %63, 1
  store i8 %64, ptr %62, align 1, !tbaa !5
  br label %46, !llvm.loop !14

65:                                               ; preds = %60, %46
  br label %66

66:                                               ; preds = %65, %39
  %67 = load ptr, ptr %5, align 8, !tbaa !8
  %68 = load i8, ptr %67, align 1, !tbaa !5
  %69 = zext i8 %68 to i32
  %70 = icmp eq i32 %69, 0
  br i1 %70, label %71, label %74

71:                                               ; preds = %66
  %72 = load i8, ptr %4, align 1, !tbaa !5
  %73 = load ptr, ptr %6, align 8, !tbaa !8
  store i8 %72, ptr %73, align 1, !tbaa !5
  br label %88

74:                                               ; preds = %66
  %75 = load i8, ptr %4, align 1, !tbaa !5
  %76 = zext i8 %75 to i32
  %77 = load ptr, ptr %5, align 8, !tbaa !8
  %78 = load i8, ptr %77, align 1, !tbaa !5
  %79 = zext i8 %78 to i32
  %80 = sub nsw i32 %79, 1
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds [6 x i32], ptr %7, i64 0, i64 %81
  %83 = load i32, ptr %82, align 4, !tbaa !10
  %84 = add i32 %83, 1
  %85 = urem i32 %76, %84
  %86 = trunc i32 %85 to i8
  %87 = load ptr, ptr %6, align 8, !tbaa !8
  store i8 %86, ptr %87, align 1, !tbaa !5
  br label %88

88:                                               ; preds = %74, %71
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #4
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @XGetPlatform_Info() local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @XGpioPs_GetBankPin(i8 noundef zeroext %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #2 {
  %4 = alloca [6 x i32], align 16
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(24) %4, i8 0, i64 24, i1 false)
  %5 = tail call i32 @XGetPlatform_Info() #4
  %6 = icmp eq i32 %5, 1
  br i1 %6, label %7, label %15

7:                                                ; preds = %3
  store <4 x i32> <i32 25, i32 51, i32 77, i32 109>, ptr %4, align 16, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %4, i64 16
  store i32 141, ptr %8, align 16, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %4, i64 20
  store i32 173, ptr %9, align 4, !tbaa !5
  %.not17 = icmp ugt i8 %0, 25
  br i1 %.not17, label %10, label %.loopexit

10:                                               ; preds = %7
  %.not17.1 = icmp ugt i8 %0, 51
  br i1 %.not17.1, label %11, label %..thread_crit_edge

11:                                               ; preds = %10
  %.not17.2 = icmp ugt i8 %0, 77
  br i1 %.not17.2, label %12, label %..thread_crit_edge

12:                                               ; preds = %11
  %.not17.3 = icmp ugt i8 %0, 109
  br i1 %.not17.3, label %13, label %..thread_crit_edge

13:                                               ; preds = %12
  %.not17.4 = icmp ugt i8 %0, -115
  br i1 %.not17.4, label %14, label %..thread_crit_edge

14:                                               ; preds = %13
  %.not17.5 = icmp ugt i8 %0, -83
  br i1 %.not17.5, label %.thread.loopexit, label %..thread_crit_edge

.thread.loopexit:                                 ; preds = %14
  store i8 6, ptr %1, align 1, !tbaa !9
  br label %.thread

15:                                               ; preds = %3
  store <4 x i32> <i32 31, i32 53, i32 85, i32 117>, ptr %4, align 16, !tbaa !5
  %.not = icmp ugt i8 %0, 31
  br i1 %.not, label %16, label %.loopexit

16:                                               ; preds = %15
  %.not.1 = icmp ugt i8 %0, 53
  br i1 %.not.1, label %17, label %..thread_crit_edge

17:                                               ; preds = %16
  %.not.2 = icmp ugt i8 %0, 85
  br i1 %.not.2, label %18, label %..thread_crit_edge

18:                                               ; preds = %17
  %.not.3 = icmp ugt i8 %0, 117
  br i1 %.not.3, label %.thread.loopexit19, label %..thread_crit_edge

.thread.loopexit19:                               ; preds = %18
  store i8 4, ptr %1, align 1, !tbaa !9
  br label %.thread

.loopexit:                                        ; preds = %15, %7
  store i8 0, ptr %1, align 1, !tbaa !9
  br label %28

..thread_crit_edge:                               ; preds = %10, %11, %12, %13, %14, %16, %17, %18
  %storemerge.ph = phi i8 [ 3, %18 ], [ 2, %17 ], [ 1, %16 ], [ 5, %14 ], [ 4, %13 ], [ 3, %12 ], [ 2, %11 ], [ 1, %10 ]
  store i8 %storemerge.ph, ptr %1, align 1, !tbaa !9
  %19 = zext nneg i8 %storemerge.ph to i64
  %20 = add nuw nsw i64 %19, 4294967295
  %21 = and i64 %20, 4294967295
  br label %.thread

.thread:                                          ; preds = %..thread_crit_edge, %.thread.loopexit19, %.thread.loopexit
  %22 = phi i64 [ %21, %..thread_crit_edge ], [ 5, %.thread.loopexit ], [ 3, %.thread.loopexit19 ]
  %.pre-phi = zext i8 %0 to i32
  %23 = getelementptr inbounds [6 x i32], ptr %4, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = add i32 %24, 1
  %26 = urem i32 %.pre-phi, %25
  %27 = trunc nuw i32 %26 to i8
  br label %28

28:                                               ; preds = %.loopexit, %.thread
  %storemerge18 = phi i8 [ %27, %.thread ], [ %0, %.loopexit ]
  store i8 %storemerge18, ptr %2, align 1, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SCCPPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass