; LLVM IR from weicao/cascadb :: test/t_bloom.ll (Z19false_positive_ratev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.cascadb::Slice" = type <{ ptr, i32, [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z7matchesRKN7cascadb5SliceE(ptr noundef nonnull align 8 dereferenceable(12)) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_Z19false_positive_ratev() #1 {
  %1 = alloca [4 x i8], align 1
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca %"class.cascadb::Slice", align 8
  %5 = alloca { ptr, i32 }, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %20, %0
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = icmp slt i32 %7, 10000
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %23

10:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 16, ptr %4) #3
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = add nsw i32 %11, 1000000000
  %13 = getelementptr inbounds [4 x i8], ptr %1, i64 0, i64 0
  %14 = call { ptr, i32 } @_ZL9build_keyiPc(i32 noundef %12, ptr noundef %13)
  store { ptr, i32 } %14, ptr %5, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %4, ptr align 8 %5, i64 12, i1 false)
  %15 = call noundef zeroext i1 @_Z7matchesRKN7cascadb5SliceE(ptr noundef nonnull align 8 dereferenceable(12) %4)
  call void @llvm.lifetime.end.p0(i64 16, ptr %4) #3
  br i1 %15, label %16, label %19

16:                                               ; preds = %10
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %2, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %16, %10
  br label %20

20:                                               ; preds = %19
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr %3, align 4, !tbaa !5
  br label %6, !llvm.loop !9

23:                                               ; preds = %9
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = sitofp i32 %24 to double
  %26 = fdiv double %25, 1.000000e+04
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret double %26
}

; Function Attrs: mustprogress uwtable
declare hidden { ptr, i32 } @_ZL9build_keyiPc(i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.cascadb::Slice" = type <{ ptr, i32, [4 x i8] }>

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z7matchesRKN7cascadb5SliceE(ptr noundef nonnull align 8 dereferenceable(12)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_Z19false_positive_ratev() local_unnamed_addr #1 {
  %1 = alloca [4 x i8], align 1
  %2 = alloca %"class.cascadb::Slice", align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #2
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %2, i64 8
  br label %6

3:                                                ; preds = %6
  %4 = uitofp nneg i32 %spec.select to double
  %5 = fdiv double %4, 1.000000e+04
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #2
  ret double %5

6:                                                ; preds = %0, %6
  %.07 = phi i32 [ 0, %0 ], [ %spec.select, %6 ]
  %.056 = phi i32 [ 0, %0 ], [ %11, %6 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #2
  %7 = add nuw nsw i32 %.056, 1000000000
  %8 = call { ptr, i32 } @_ZL9build_keyiPc(i32 noundef %7, ptr noundef nonnull %1)
  %.fca.0.extract = extractvalue { ptr, i32 } %8, 0
  %.fca.1.extract = extractvalue { ptr, i32 } %8, 1
  store ptr %.fca.0.extract, ptr %2, align 8
  store i32 %.fca.1.extract, ptr %.sroa.2.0..sroa_idx, align 8
  %9 = call noundef zeroext i1 @_Z7matchesRKN7cascadb5SliceE(ptr noundef nonnull align 8 dereferenceable(12) %2)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #2
  %10 = zext i1 %9 to i32
  %spec.select = add nuw nsw i32 %.07, %10
  %11 = add nuw nsw i32 %.056, 1
  %exitcond.not = icmp eq i32 %11, 10000
  br i1 %exitcond.not, label %3, label %6, !llvm.loop !5
}

; Function Attrs: mustprogress uwtable
declare hidden { ptr, i32 } @_ZL9build_keyiPc(i32 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass