; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/devcfg_v3 (CfgInitialize)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XDcfg = type { %struct.XDcfg_Config, i32, i32, ptr, ptr }
%struct.XDcfg_Config = type { i16, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @XDcfg_CfgInitialize(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %12

11:                                               ; preds = %3
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 133)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  br label %44

12:                                               ; preds = %10
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %16

15:                                               ; preds = %12
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %17

16:                                               ; preds = %12
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 134)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  br label %44

17:                                               ; preds = %15
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.XDcfg, ptr %18, i32 0, i32 2
  %20 = load i32, ptr %19, align 4, !tbaa !11
  %21 = icmp eq i32 %20, 572662306
  br i1 %21, label %22, label %23

22:                                               ; preds = %17
  store i32 5, ptr %4, align 4
  br label %44

23:                                               ; preds = %17
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.XDcfg_Config, ptr %24, i32 0, i32 0
  %26 = load i16, ptr %25, align 4, !tbaa !15
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.XDcfg, ptr %27, i32 0, i32 0
  %29 = getelementptr inbounds %struct.XDcfg_Config, ptr %28, i32 0, i32 0
  store i16 %26, ptr %29, align 8, !tbaa !16
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.XDcfg, ptr %31, i32 0, i32 0
  %33 = getelementptr inbounds %struct.XDcfg_Config, ptr %32, i32 0, i32 1
  store i32 %30, ptr %33, align 4, !tbaa !17
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.XDcfg, ptr %34, i32 0, i32 2
  store i32 0, ptr %35, align 4, !tbaa !11
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.XDcfg, ptr %36, i32 0, i32 0
  %38 = getelementptr inbounds %struct.XDcfg_Config, ptr %37, i32 0, i32 1
  %39 = load i32, ptr %38, align 4, !tbaa !17
  %40 = add i32 %39, 52
  %41 = zext i32 %40 to i64
  call void @Xil_Out32(i64 noundef %41, i32 noundef 1971052301)
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XDcfg, ptr %42, i32 0, i32 1
  store i32 286331153, ptr %43, align 8, !tbaa !18
  store i32 0, ptr %4, align 4
  br label %44

44:                                               ; preds = %23, %22, %16, %11
  %45 = load i32, ptr %4, align 4
  ret i32 %45
}

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 12}
!12 = !{!"", !13, i64 0, !10, i64 8, !10, i64 12, !6, i64 16, !6, i64 24}
!13 = !{!"", !14, i64 0, !10, i64 4}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !14, i64 0}
!16 = !{!12, !14, i64 0}
!17 = !{!12, !10, i64 4}
!18 = !{!12, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 6) i32 @XDcfg_CfgInitialize(ptr noundef %0, ptr noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %.not12 = icmp eq ptr %1, null
  br i1 %.not12, label %10, label %6

5:                                                ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 133) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %17

6:                                                ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 12
  %8 = load i32, ptr %7, align 4, !tbaa !9
  %9 = icmp eq i32 %8, 572662306
  br i1 %9, label %17, label %11

10:                                               ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 134) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %17

11:                                               ; preds = %6
  %12 = load i16, ptr %1, align 4, !tbaa !14
  store i16 %12, ptr %0, align 8, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %2, ptr %13, align 4, !tbaa !16
  store i32 0, ptr %7, align 4, !tbaa !9
  %14 = add i32 %2, 52
  %15 = zext i32 %14 to i64
  tail call void @Xil_Out32(i64 noundef %15, i32 noundef 1971052301)
  %16 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 286331153, ptr %16, align 8, !tbaa !17
  br label %17

17:                                               ; preds = %6, %11, %10, %5
  %.0 = phi i32 [ 0, %11 ], [ 0, %10 ], [ 0, %5 ], [ 5, %6 ]
  ret i32 %.0
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 12}
!10 = !{!"", !11, i64 0, !6, i64 8, !6, i64 12, !13, i64 16, !13, i64 24}
!11 = !{!"", !12, i64 0, !6, i64 4}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!11, !12, i64 0}
!15 = !{!10, !12, i64 0}
!16 = !{!10, !6, i64 4}
!17 = !{!10, !6, i64 8}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass