; LLVM IR from TLE-MEC/Hack-CP-DSA :: Hackerrank/Hackerland Radio Transmitters/solution.ll (Z5checki)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5checki(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  br label %6

6:                                                ; preds = %60, %1
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = load i32, ptr @n, align 4, !tbaa !5
  %9 = icmp slt i32 %7, %8
  br i1 %9, label %10, label %61

10:                                               ; preds = %6
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = add nsw i32 %11, 1
  store i32 %12, ptr %3, align 4, !tbaa !5
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %14) #2
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = add nsw i32 %16, %17
  store i32 %18, ptr %5, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %32, %10
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %30

23:                                               ; preds = %19
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br label %30

30:                                               ; preds = %23, %19
  %31 = phi i1 [ false, %19 ], [ %29, %23 ]
  br i1 %31, label %32, label %35

32:                                               ; preds = %30
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %4, align 4, !tbaa !5
  br label %19, !llvm.loop !9

35:                                               ; preds = %30
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = add nsw i32 %36, -1
  store i32 %37, ptr %4, align 4, !tbaa !5
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %39) #2
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = load i32, ptr %2, align 4, !tbaa !5
  %43 = add nsw i32 %41, %42
  store i32 %43, ptr %5, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %57, %35
  %45 = load i32, ptr %4, align 4, !tbaa !5
  %46 = load i32, ptr @n, align 4, !tbaa !5
  %47 = icmp slt i32 %45, %46
  br i1 %47, label %48, label %55

48:                                               ; preds = %44
  %49 = load i32, ptr %4, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %50) #2
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = load i32, ptr %5, align 4, !tbaa !5
  %54 = icmp sle i32 %52, %53
  br label %55

55:                                               ; preds = %48, %44
  %56 = phi i1 [ false, %44 ], [ %54, %48 ]
  br i1 %56, label %57, label %60

57:                                               ; preds = %55
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %4, align 4, !tbaa !5
  br label %44, !llvm.loop !11

60:                                               ; preds = %55
  br label %6, !llvm.loop !12

61:                                               ; preds = %6
  %62 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %62
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@vec = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5checki(i32 noundef %0) local_unnamed_addr #0 {
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = icmp sgt i32 %2, 0
  br i1 %3, label %.lr.ph30, label %._crit_edge

.lr.ph30:                                         ; preds = %1, %.critedge2
  %.029 = phi i32 [ %.2.lcssa, %.critedge2 ], [ 0, %1 ]
  %.01828 = phi i32 [ %4, %.critedge2 ], [ 0, %1 ]
  %4 = add nuw nsw i32 %.01828, 1
  %5 = sext i32 %.029 to i64
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %5) #1
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = add nsw i32 %7, %0
  %9 = load i32, ptr @n, align 4, !tbaa !5
  %10 = icmp slt i32 %.029, %9
  br i1 %10, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %.lr.ph30, %13
  %indvars.iv = phi i64 [ %indvars.iv.next, %13 ], [ %5, %.lr.ph30 ]
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %indvars.iv) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %.not = icmp sgt i32 %12, %8
  br i1 %.not, label %.critedge.loopexit, label %13

13:                                               ; preds = %.lr.ph
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = icmp slt i64 %indvars.iv.next, %15
  br i1 %16, label %.lr.ph, label %.critedge.loopexit, !llvm.loop !9

.critedge.loopexit:                               ; preds = %13, %.lr.ph
  %.1.lcssa.ph.in = phi i64 [ %indvars.iv, %.lr.ph ], [ %indvars.iv.next, %13 ]
  %.1.lcssa.ph = trunc i64 %.1.lcssa.ph.in to i32
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.lr.ph30
  %.1.lcssa = phi i32 [ %.029, %.lr.ph30 ], [ %.1.lcssa.ph, %.critedge.loopexit ]
  %17 = add nsw i32 %.1.lcssa, -1
  %18 = sext i32 %17 to i64
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %18) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = add nsw i32 %20, %0
  %22 = load i32, ptr @n, align 4, !tbaa !5
  %.not32 = icmp sgt i32 %.1.lcssa, %22
  br i1 %.not32, label %.critedge2, label %.lr.ph24.preheader

.lr.ph24.preheader:                               ; preds = %.critedge
  %23 = sext i32 %.1.lcssa to i64
  %24 = add nsw i64 %23, -1
  br label %.lr.ph24

.lr.ph24:                                         ; preds = %.lr.ph24.preheader, %27
  %indvars.iv34 = phi i64 [ %24, %.lr.ph24.preheader ], [ %indvars.iv.next35, %27 ]
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vec, i64 noundef %indvars.iv34) #1
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %.not19 = icmp sgt i32 %26, %21
  %.pre.pre = load i32, ptr @n, align 4, !tbaa !5
  br i1 %.not19, label %.critedge2.loopexit, label %27

27:                                               ; preds = %.lr.ph24
  %indvars.iv.next35 = add nsw i64 %indvars.iv34, 1
  %28 = sext i32 %.pre.pre to i64
  %29 = icmp slt i64 %indvars.iv.next35, %28
  br i1 %29, label %.lr.ph24, label %.critedge2.loopexit, !llvm.loop !11

.critedge2.loopexit:                              ; preds = %27, %.lr.ph24
  %.2.lcssa.ph.in = phi i64 [ %indvars.iv34, %.lr.ph24 ], [ %indvars.iv.next35, %27 ]
  %.2.lcssa.ph = trunc i64 %.2.lcssa.ph.in to i32
  br label %.critedge2

.critedge2:                                       ; preds = %.critedge2.loopexit, %.critedge
  %30 = phi i32 [ %22, %.critedge ], [ %.pre.pre, %.critedge2.loopexit ]
  %.2.lcssa = phi i32 [ %17, %.critedge ], [ %.2.lcssa.ph, %.critedge2.loopexit ]
  %31 = icmp slt i32 %.2.lcssa, %30
  br i1 %31, label %.lr.ph30, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %.critedge2, %1
  %.018.lcssa = phi i32 [ 0, %1 ], [ %4, %.critedge2 ]
  ret i32 %.018.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass