; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/qspips_v3 (ResetHw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @XQspiPs_ResetHw(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %4 = load i32, ptr %2, align 4, !tbaa !5
  %5 = add i32 %4, 12
  %6 = zext i32 %5 to i64
  call void @Xil_Out32(i64 noundef %6, i32 noundef 125)
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = add i32 %7, 20
  %9 = zext i32 %8 to i64
  call void @Xil_Out32(i64 noundef %9, i32 noundef 0)
  %10 = load i32, ptr %2, align 4, !tbaa !5
  %11 = add i32 %10, 0
  %12 = zext i32 %11 to i64
  %13 = call i32 @Xil_In32(i64 noundef %12)
  store i32 %13, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = or i32 %14, 17408
  store i32 %15, ptr %3, align 4, !tbaa !5
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = add i32 %16, 0
  %18 = zext i32 %17 to i64
  %19 = load i32, ptr %3, align 4, !tbaa !5
  call void @Xil_Out32(i64 noundef %18, i32 noundef %19)
  %20 = load i32, ptr %2, align 4, !tbaa !5
  %21 = add i32 %20, 40
  %22 = zext i32 %21 to i64
  call void @Xil_Out32(i64 noundef %22, i32 noundef 1)
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = add i32 %23, 44
  %25 = zext i32 %24 to i64
  call void @Xil_Out32(i64 noundef %25, i32 noundef 1)
  br label %26

26:                                               ; preds = %33, %1
  %27 = load i32, ptr %2, align 4, !tbaa !5
  %28 = add i32 %27, 4
  %29 = zext i32 %28 to i64
  %30 = call i32 @Xil_In32(i64 noundef %29)
  %31 = and i32 %30, 16
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %38

33:                                               ; preds = %26
  %34 = load i32, ptr %2, align 4, !tbaa !5
  %35 = add i32 %34, 32
  %36 = zext i32 %35 to i64
  %37 = call i32 @Xil_In32(i64 noundef %36)
  br label %26, !llvm.loop !9

38:                                               ; preds = %26
  %39 = load i32, ptr %2, align 4, !tbaa !5
  %40 = add i32 %39, 4
  %41 = zext i32 %40 to i64
  %42 = call i32 @Xil_In32(i64 noundef %41)
  %43 = load i32, ptr %2, align 4, !tbaa !5
  %44 = add i32 %43, 4
  %45 = zext i32 %44 to i64
  call void @Xil_Out32(i64 noundef %45, i32 noundef 65)
  %46 = load i32, ptr %2, align 4, !tbaa !5
  %47 = add i32 %46, 0
  %48 = zext i32 %47 to i64
  %49 = call i32 @Xil_In32(i64 noundef %48)
  store i32 %49, ptr %3, align 4, !tbaa !5
  %50 = load i32, ptr %3, align 4, !tbaa !5
  %51 = or i32 %50, -2146941759
  store i32 %51, ptr %3, align 4, !tbaa !5
  %52 = load i32, ptr %3, align 4, !tbaa !5
  %53 = and i32 %52, -3
  store i32 %53, ptr %3, align 4, !tbaa !5
  %54 = load i32, ptr %2, align 4, !tbaa !5
  %55 = add i32 %54, 0
  %56 = zext i32 %55 to i64
  %57 = load i32, ptr %3, align 4, !tbaa !5
  call void @Xil_Out32(i64 noundef %56, i32 noundef %57)
  %58 = load i32, ptr %2, align 4, !tbaa !5
  %59 = add i32 %58, 160
  %60 = zext i32 %59 to i64
  call void @Xil_Out32(i64 noundef %60, i32 noundef 0)
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @XQspiPs_ResetHw(i32 noundef %0) local_unnamed_addr #0 {
  %2 = add i32 %0, 12
  %3 = zext i32 %2 to i64
  tail call void @Xil_Out32(i64 noundef %3, i32 noundef 125)
  %4 = add i32 %0, 20
  %5 = zext i32 %4 to i64
  tail call void @Xil_Out32(i64 noundef %5, i32 noundef 0)
  %6 = zext i32 %0 to i64
  %7 = tail call i32 @Xil_In32(i64 noundef %6)
  %8 = or i32 %7, 17408
  tail call void @Xil_Out32(i64 noundef %6, i32 noundef %8)
  %9 = add i32 %0, 40
  %10 = zext i32 %9 to i64
  tail call void @Xil_Out32(i64 noundef %10, i32 noundef 1)
  %11 = add i32 %0, 44
  %12 = zext i32 %11 to i64
  tail call void @Xil_Out32(i64 noundef %12, i32 noundef 1)
  %13 = add i32 %0, 4
  %14 = zext i32 %13 to i64
  %15 = tail call i32 @Xil_In32(i64 noundef %14)
  %16 = and i32 %15, 16
  %.not18 = icmp eq i32 %16, 0
  br i1 %.not18, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %17 = add i32 %0, 32
  %18 = zext i32 %17 to i64
  br label %19

19:                                               ; preds = %.lr.ph, %19
  %20 = tail call i32 @Xil_In32(i64 noundef %18)
  %21 = tail call i32 @Xil_In32(i64 noundef %14)
  %22 = and i32 %21, 16
  %.not = icmp eq i32 %22, 0
  br i1 %.not, label %._crit_edge, label %19, !llvm.loop !5

._crit_edge:                                      ; preds = %19, %1
  %23 = tail call i32 @Xil_In32(i64 noundef %14)
  tail call void @Xil_Out32(i64 noundef %14, i32 noundef 65)
  %24 = tail call i32 @Xil_In32(i64 noundef %6)
  %25 = and i32 %24, 2146941756
  %26 = or disjoint i32 %25, -2146941759
  tail call void @Xil_Out32(i64 noundef %6, i32 noundef %26)
  %27 = add i32 %0, 160
  %28 = zext i32 %27 to i64
  tail call void @Xil_Out32(i64 noundef %28, i32 noundef 0)
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass