; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (SetFlowDelay)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @XUartPs_SetFlowDelay(ptr noundef %0, i8 noundef zeroext %1) #3 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i8 %1, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = icmp ne ptr %7, null
  br i1 %8, label %9, label %10

9:                                                ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !10
  br label %11

10:                                               ; preds = %2
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 534)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !10
  store i32 1, ptr %6, align 4
  br label %35

11:                                               ; preds = %9
  %12 = load i8, ptr %4, align 1, !tbaa !9
  %13 = zext i8 %12 to i32
  %14 = icmp sgt i32 %13, 63
  br i1 %14, label %15, label %16

15:                                               ; preds = %11
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !10
  br label %17

16:                                               ; preds = %11
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 535)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !10
  store i32 1, ptr %6, align 4
  br label %35

17:                                               ; preds = %15
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.XUartPs, ptr %18, i32 0, i32 2
  %20 = load i32, ptr %19, align 4, !tbaa !12
  %21 = icmp eq i32 %20, 286331153
  br i1 %21, label %22, label %23

22:                                               ; preds = %17
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !10
  br label %24

23:                                               ; preds = %17
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 536)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !10
  store i32 1, ptr %6, align 4
  br label %35

24:                                               ; preds = %22
  %25 = load i8, ptr %4, align 1, !tbaa !9
  %26 = zext i8 %25 to i32
  %27 = and i32 %26, 63
  store i32 %27, ptr %5, align 4, !tbaa !10
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.XUartPs, ptr %28, i32 0, i32 0
  %30 = getelementptr inbounds %struct.XUartPs_Config, ptr %29, i32 0, i32 1
  %31 = load i32, ptr %30, align 4, !tbaa !17
  %32 = add i32 %31, 56
  %33 = zext i32 %32 to i64
  %34 = load i32, ptr %5, align 4, !tbaa !10
  call void @Xil_Out32(i64 noundef %33, i32 noundef %34)
  store i32 0, ptr %6, align 4
  br label %35

35:                                               ; preds = %24, %23, %16, %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  %36 = load i32, ptr %6, align 4
  switch i32 %36, label %38 [
    i32 0, label %37
    i32 1, label %37
  ]

37:                                               ; preds = %35, %35
  ret void

38:                                               ; preds = %35
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !11, i64 20}
!13 = !{!"", !14, i64 0, !11, i64 16, !11, i64 20, !11, i64 24, !16, i64 32, !16, i64 48, !6, i64 64, !6, i64 72, !11, i64 80, !7, i64 84}
!14 = !{!"", !15, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!15 = !{!"short", !7, i64 0}
!16 = !{!"", !6, i64 0, !11, i64 8, !11, i64 12}
!17 = !{!13, !11, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @XUartPs_SetFlowDelay(ptr noundef readonly %0, i8 noundef zeroext %1) local_unnamed_addr #2 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %3

3:                                                ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %4 = icmp ugt i8 %1, 63
  br i1 %4, label %6, label %10

5:                                                ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 534) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %19

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 20
  %8 = load i32, ptr %7, align 4, !tbaa !9
  %9 = icmp eq i32 %8, 286331153
  br i1 %9, label %11, label %18

10:                                               ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 535) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %19

11:                                               ; preds = %6
  %12 = and i8 %1, 63
  %13 = zext nneg i8 %12 to i32
  %14 = getelementptr inbounds i8, ptr %0, i64 4
  %15 = load i32, ptr %14, align 4, !tbaa !15
  %16 = add i32 %15, 56
  %17 = zext i32 %16 to i64
  tail call void @Xil_Out32(i64 noundef %17, i32 noundef %13)
  br label %19

18:                                               ; preds = %6
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 536) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %11, %18, %10, %5
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 20}
!10 = !{!"", !11, i64 0, !6, i64 16, !6, i64 20, !6, i64 24, !13, i64 32, !13, i64 48, !14, i64 64, !14, i64 72, !6, i64 80, !7, i64 84}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !14, i64 0, !6, i64 8, !6, i64 12}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!10, !6, i64 4}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass