; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/evaluation/src/qrduino (qrframe)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@WDB = external dso_local global i8, align 1
@WD = external dso_local global i8, align 1
@framebase = external dso_local global ptr, align 8
@framask = external dso_local global ptr, align 8
@rlens = external dso_local global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local void @initframe() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  %3 = load i8, ptr @WDB, align 1, !tbaa !5
  %4 = zext i8 %3 to i32
  %5 = load i8, ptr @WD, align 1, !tbaa !5
  %6 = zext i8 %5 to i32
  %7 = mul nsw i32 %4, %6
  %8 = sext i32 %7 to i64
  %9 = call ptr @calloc_beebs(i64 noundef %8, i64 noundef 1)
  store ptr %9, ptr @framebase, align 8, !tbaa !8
  %10 = load i8, ptr @WD, align 1, !tbaa !5
  %11 = zext i8 %10 to i32
  %12 = load i8, ptr @WD, align 1, !tbaa !5
  %13 = zext i8 %12 to i32
  %14 = add nsw i32 %13, 1
  %15 = mul nsw i32 %11, %14
  %16 = sdiv i32 %15, 2
  %17 = add nsw i32 %16, 7
  %18 = sdiv i32 %17, 8
  %19 = sext i32 %18 to i64
  %20 = call ptr @calloc_beebs(i64 noundef %19, i64 noundef 1)
  store ptr %20, ptr @framask, align 8, !tbaa !8
  %21 = load i8, ptr @WD, align 1, !tbaa !5
  %22 = zext i8 %21 to i32
  %23 = add nsw i32 %22, 1
  %24 = sext i32 %23 to i64
  %25 = call ptr @malloc_beebs(i64 noundef %24)
  store ptr %25, ptr @rlens, align 8, !tbaa !8
  call void @putfind()
  call void @doaligns()
  %26 = load ptr, ptr @framebase, align 8, !tbaa !8
  %27 = load i8, ptr @WD, align 1, !tbaa !5
  %28 = zext i8 %27 to i32
  %29 = sub nsw i32 %28, 8
  %30 = load i8, ptr @WDB, align 1, !tbaa !5
  %31 = zext i8 %30 to i32
  %32 = mul nsw i32 %29, %31
  %33 = add nsw i32 1, %32
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i8, ptr %26, i64 %34
  %36 = load i8, ptr %35, align 1, !tbaa !5
  %37 = zext i8 %36 to i32
  %38 = or i32 %37, 128
  %39 = trunc i32 %38 to i8
  store i8 %39, ptr %35, align 1, !tbaa !5
  store i32 0, ptr %2, align 4, !tbaa !10
  br label %40

40:                                               ; preds = %58, %0
  %41 = load i32, ptr %2, align 4, !tbaa !10
  %42 = icmp ult i32 %41, 7
  br i1 %42, label %43, label %61

43:                                               ; preds = %40
  %44 = load i32, ptr %2, align 4, !tbaa !10
  %45 = trunc i32 %44 to i8
  call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %45)
  %46 = load i8, ptr @WD, align 1, !tbaa !5
  %47 = zext i8 %46 to i32
  %48 = sub nsw i32 %47, 8
  %49 = trunc i32 %48 to i8
  %50 = load i32, ptr %2, align 4, !tbaa !10
  %51 = trunc i32 %50 to i8
  call void @setmask(i8 noundef zeroext %49, i8 noundef zeroext %51)
  %52 = load i32, ptr %2, align 4, !tbaa !10
  %53 = load i8, ptr @WD, align 1, !tbaa !5
  %54 = zext i8 %53 to i32
  %55 = add i32 %52, %54
  %56 = sub i32 %55, 7
  %57 = trunc i32 %56 to i8
  call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %57)
  br label %58

58:                                               ; preds = %43
  %59 = load i32, ptr %2, align 4, !tbaa !10
  %60 = add i32 %59, 1
  store i32 %60, ptr %2, align 4, !tbaa !10
  br label %40, !llvm.loop !12

61:                                               ; preds = %40
  store i32 0, ptr %1, align 4, !tbaa !10
  br label %62

62:                                               ; preds = %80, %61
  %63 = load i32, ptr %1, align 4, !tbaa !10
  %64 = icmp ult i32 %63, 8
  br i1 %64, label %65, label %83

65:                                               ; preds = %62
  %66 = load i32, ptr %1, align 4, !tbaa !10
  %67 = trunc i32 %66 to i8
  call void @setmask(i8 noundef zeroext %67, i8 noundef zeroext 7)
  %68 = load i32, ptr %1, align 4, !tbaa !10
  %69 = load i8, ptr @WD, align 1, !tbaa !5
  %70 = zext i8 %69 to i32
  %71 = add i32 %68, %70
  %72 = sub i32 %71, 8
  %73 = trunc i32 %72 to i8
  call void @setmask(i8 noundef zeroext %73, i8 noundef zeroext 7)
  %74 = load i32, ptr %1, align 4, !tbaa !10
  %75 = trunc i32 %74 to i8
  %76 = load i8, ptr @WD, align 1, !tbaa !5
  %77 = zext i8 %76 to i32
  %78 = sub nsw i32 %77, 8
  %79 = trunc i32 %78 to i8
  call void @setmask(i8 noundef zeroext %75, i8 noundef zeroext %79)
  br label %80

80:                                               ; preds = %65
  %81 = load i32, ptr %1, align 4, !tbaa !10
  %82 = add i32 %81, 1
  store i32 %82, ptr %1, align 4, !tbaa !10
  br label %62, !llvm.loop !14

83:                                               ; preds = %62
  store i32 0, ptr %1, align 4, !tbaa !10
  br label %84

84:                                               ; preds = %90, %83
  %85 = load i32, ptr %1, align 4, !tbaa !10
  %86 = icmp ult i32 %85, 9
  br i1 %86, label %87, label %93

87:                                               ; preds = %84
  %88 = load i32, ptr %1, align 4, !tbaa !10
  %89 = trunc i32 %88 to i8
  call void @setmask(i8 noundef zeroext %89, i8 noundef zeroext 8)
  br label %90

90:                                               ; preds = %87
  %91 = load i32, ptr %1, align 4, !tbaa !10
  %92 = add i32 %91, 1
  store i32 %92, ptr %1, align 4, !tbaa !10
  br label %84, !llvm.loop !15

93:                                               ; preds = %84
  store i32 0, ptr %1, align 4, !tbaa !10
  br label %94

94:                                               ; preds = %106, %93
  %95 = load i32, ptr %1, align 4, !tbaa !10
  %96 = icmp ult i32 %95, 8
  br i1 %96, label %97, label %109

97:                                               ; preds = %94
  %98 = load i32, ptr %1, align 4, !tbaa !10
  %99 = load i8, ptr @WD, align 1, !tbaa !5
  %100 = zext i8 %99 to i32
  %101 = add i32 %98, %100
  %102 = sub i32 %101, 8
  %103 = trunc i32 %102 to i8
  call void @setmask(i8 noundef zeroext %103, i8 noundef zeroext 8)
  %104 = load i32, ptr %1, align 4, !tbaa !10
  %105 = trunc i32 %104 to i8
  call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %105)
  br label %106

106:                                              ; preds = %97
  %107 = load i32, ptr %1, align 4, !tbaa !10
  %108 = add i32 %107, 1
  store i32 %108, ptr %1, align 4, !tbaa !10
  br label %94, !llvm.loop !16

109:                                              ; preds = %94
  store i32 0, ptr %2, align 4, !tbaa !10
  br label %110

110:                                              ; preds = %120, %109
  %111 = load i32, ptr %2, align 4, !tbaa !10
  %112 = icmp ult i32 %111, 7
  br i1 %112, label %113, label %123

113:                                              ; preds = %110
  %114 = load i32, ptr %2, align 4, !tbaa !10
  %115 = load i8, ptr @WD, align 1, !tbaa !5
  %116 = zext i8 %115 to i32
  %117 = add i32 %114, %116
  %118 = sub i32 %117, 7
  %119 = trunc i32 %118 to i8
  call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %119)
  br label %120

120:                                              ; preds = %113
  %121 = load i32, ptr %2, align 4, !tbaa !10
  %122 = add i32 %121, 1
  store i32 %122, ptr %2, align 4, !tbaa !10
  br label %110, !llvm.loop !17

123:                                              ; preds = %110
  store i32 0, ptr %1, align 4, !tbaa !10
  br label %124

124:                                              ; preds = %174, %123
  %125 = load i32, ptr %1, align 4, !tbaa !10
  %126 = load i8, ptr @WD, align 1, !tbaa !5
  %127 = zext i8 %126 to i32
  %128 = sub nsw i32 %127, 14
  %129 = icmp ult i32 %125, %128
  br i1 %129, label %130, label %177

130:                                              ; preds = %124
  %131 = load i32, ptr %1, align 4, !tbaa !10
  %132 = and i32 %131, 1
  %133 = icmp ne i32 %132, 0
  br i1 %133, label %134, label %141

134:                                              ; preds = %130
  %135 = load i32, ptr %1, align 4, !tbaa !10
  %136 = add i32 8, %135
  %137 = trunc i32 %136 to i8
  call void @setmask(i8 noundef zeroext %137, i8 noundef zeroext 6)
  %138 = load i32, ptr %1, align 4, !tbaa !10
  %139 = add i32 8, %138
  %140 = trunc i32 %139 to i8
  call void @setmask(i8 noundef zeroext 6, i8 noundef zeroext %140)
  br label %173

141:                                              ; preds = %130
  %142 = load i32, ptr %1, align 4, !tbaa !10
  %143 = add i32 8, %142
  %144 = and i32 %143, 7
  %145 = ashr i32 128, %144
  %146 = load ptr, ptr @framebase, align 8, !tbaa !8
  %147 = load i32, ptr %1, align 4, !tbaa !10
  %148 = add i32 8, %147
  %149 = lshr i32 %148, 3
  %150 = load i8, ptr @WDB, align 1, !tbaa !5
  %151 = zext i8 %150 to i32
  %152 = mul nsw i32 6, %151
  %153 = add i32 %149, %152
  %154 = zext i32 %153 to i64
  %155 = getelementptr inbounds i8, ptr %146, i64 %154
  %156 = load i8, ptr %155, align 1, !tbaa !5
  %157 = zext i8 %156 to i32
  %158 = or i32 %157, %145
  %159 = trunc i32 %158 to i8
  store i8 %159, ptr %155, align 1, !tbaa !5
  %160 = load ptr, ptr @framebase, align 8, !tbaa !8
  %161 = load i32, ptr %1, align 4, !tbaa !10
  %162 = add i32 8, %161
  %163 = load i8, ptr @WDB, align 1, !tbaa !5
  %164 = zext i8 %163 to i32
  %165 = mul i32 %162, %164
  %166 = add i32 0, %165
  %167 = zext i32 %166 to i64
  %168 = getelementptr inbounds i8, ptr %160, i64 %167
  %169 = load i8, ptr %168, align 1, !tbaa !5
  %170 = zext i8 %169 to i32
  %171 = or i32 %170, 2
  %172 = trunc i32 %171 to i8
  store i8 %172, ptr %168, align 1, !tbaa !5
  br label %173

173:                                              ; preds = %141, %134
  br label %174

174:                                              ; preds = %173
  %175 = load i32, ptr %1, align 4, !tbaa !10
  %176 = add i32 %175, 1
  store i32 %176, ptr %1, align 4, !tbaa !10
  br label %124, !llvm.loop !18

177:                                              ; preds = %124
  call void @putvpat()
  store i32 0, ptr %2, align 4, !tbaa !10
  br label %178

178:                                              ; preds = %217, %177
  %179 = load i32, ptr %2, align 4, !tbaa !10
  %180 = load i8, ptr @WD, align 1, !tbaa !5
  %181 = zext i8 %180 to i32
  %182 = icmp ult i32 %179, %181
  br i1 %182, label %183, label %220

183:                                              ; preds = %178
  store i32 0, ptr %1, align 4, !tbaa !10
  br label %184

184:                                              ; preds = %213, %183
  %185 = load i32, ptr %1, align 4, !tbaa !10
  %186 = load i32, ptr %2, align 4, !tbaa !10
  %187 = icmp ule i32 %185, %186
  br i1 %187, label %188, label %216

188:                                              ; preds = %184
  %189 = load ptr, ptr @framebase, align 8, !tbaa !8
  %190 = load i32, ptr %1, align 4, !tbaa !10
  %191 = lshr i32 %190, 3
  %192 = load i32, ptr %2, align 4, !tbaa !10
  %193 = load i8, ptr @WDB, align 1, !tbaa !5
  %194 = zext i8 %193 to i32
  %195 = mul i32 %192, %194
  %196 = add i32 %191, %195
  %197 = zext i32 %196 to i64
  %198 = getelementptr inbounds i8, ptr %189, i64 %197
  %199 = load i8, ptr %198, align 1, !tbaa !5
  %200 = zext i8 %199 to i32
  %201 = load i32, ptr %1, align 4, !tbaa !10
  %202 = and i32 %201, 7
  %203 = sub i32 7, %202
  %204 = ashr i32 %200, %203
  %205 = and i32 %204, 1
  %206 = icmp ne i32 %205, 0
  br i1 %206, label %207, label %212

207:                                              ; preds = %188
  %208 = load i32, ptr %1, align 4, !tbaa !10
  %209 = trunc i32 %208 to i8
  %210 = load i32, ptr %2, align 4, !tbaa !10
  %211 = trunc i32 %210 to i8
  call void @setmask(i8 noundef zeroext %209, i8 noundef zeroext %211)
  br label %212

212:                                              ; preds = %207, %188
  br label %213

213:                                              ; preds = %212
  %214 = load i32, ptr %1, align 4, !tbaa !10
  %215 = add i32 %214, 1
  store i32 %215, ptr %1, align 4, !tbaa !10
  br label %184, !llvm.loop !19

216:                                              ; preds = %184
  br label %217

217:                                              ; preds = %216
  %218 = load i32, ptr %2, align 4, !tbaa !10
  %219 = add i32 %218, 1
  store i32 %219, ptr %2, align 4, !tbaa !10
  br label %178, !llvm.loop !20

220:                                              ; preds = %178
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden ptr @calloc_beebs(i64 noundef, i64 noundef) #0

; Function Attrs: nounwind uwtable
declare hidden ptr @malloc_beebs(i64 noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @doaligns() #0

; Function Attrs: nounwind uwtable
declare hidden void @setmask(i8 noundef zeroext, i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare hidden void @putvpat() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden void @putfind() #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}
!16 = distinct !{!16, !13}
!17 = distinct !{!17, !13}
!18 = distinct !{!18, !13}
!19 = distinct !{!19, !13}
!20 = distinct !{!20, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@WDB = external dso_local local_unnamed_addr global i8, align 1
@WD = external dso_local local_unnamed_addr global i8, align 1
@framebase = external dso_local local_unnamed_addr global ptr, align 8
@framask = external dso_local local_unnamed_addr global ptr, align 8
@rlens = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local void @initframe() local_unnamed_addr #0 {
.preheader47.preheader:
  %0 = load i8, ptr @WDB, align 1, !tbaa !5
  %1 = zext i8 %0 to i64
  %2 = load i8, ptr @WD, align 1, !tbaa !5
  %3 = zext i8 %2 to i64
  %4 = mul nuw nsw i64 %3, %1
  %5 = tail call ptr @calloc_beebs(i64 noundef %4, i64 noundef 1)
  store ptr %5, ptr @framebase, align 8, !tbaa !8
  %6 = load i8, ptr @WD, align 1, !tbaa !5
  %7 = zext i8 %6 to i32
  %8 = add nuw nsw i32 %7, 1
  %9 = mul nuw nsw i32 %8, %7
  %10 = lshr i32 %9, 1
  %11 = add nuw nsw i32 %10, 7
  %12 = lshr i32 %11, 3
  %13 = zext nneg i32 %12 to i64
  %14 = tail call ptr @calloc_beebs(i64 noundef %13, i64 noundef 1)
  store ptr %14, ptr @framask, align 8, !tbaa !8
  %15 = load i8, ptr @WD, align 1, !tbaa !5
  %16 = zext i8 %15 to i64
  %17 = add nuw nsw i64 %16, 1
  %18 = tail call ptr @malloc_beebs(i64 noundef %17)
  store ptr %18, ptr @rlens, align 8, !tbaa !8
  tail call void @putfind()
  tail call void @doaligns()
  %19 = load ptr, ptr @framebase, align 8, !tbaa !8
  %20 = load i8, ptr @WD, align 1, !tbaa !5
  %21 = zext i8 %20 to i64
  %22 = add nsw i64 %21, -8
  %23 = load i8, ptr @WDB, align 1, !tbaa !5
  %24 = zext i8 %23 to i64
  %25 = mul nsw i64 %22, %24
  %26 = getelementptr i8, ptr %19, i64 %25
  %27 = getelementptr i8, ptr %26, i64 1
  %28 = load i8, ptr %27, align 1, !tbaa !5
  %29 = or i8 %28, -128
  store i8 %29, ptr %27, align 1, !tbaa !5
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 0)
  %30 = load i8, ptr @WD, align 1, !tbaa !5
  %31 = add i8 %30, -8
  tail call void @setmask(i8 noundef zeroext %31, i8 noundef zeroext 0)
  %32 = load i8, ptr @WD, align 1, !tbaa !5
  %33 = add i8 %32, -7
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %33)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 1)
  %34 = load i8, ptr @WD, align 1, !tbaa !5
  %35 = add i8 %34, -8
  tail call void @setmask(i8 noundef zeroext %35, i8 noundef zeroext 1)
  %36 = load i8, ptr @WD, align 1, !tbaa !5
  %37 = add i8 %36, -6
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %37)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 2)
  %38 = load i8, ptr @WD, align 1, !tbaa !5
  %39 = add i8 %38, -8
  tail call void @setmask(i8 noundef zeroext %39, i8 noundef zeroext 2)
  %40 = load i8, ptr @WD, align 1, !tbaa !5
  %41 = add i8 %40, -5
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %41)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 3)
  %42 = load i8, ptr @WD, align 1, !tbaa !5
  %43 = add i8 %42, -8
  tail call void @setmask(i8 noundef zeroext %43, i8 noundef zeroext 3)
  %44 = load i8, ptr @WD, align 1, !tbaa !5
  %45 = add i8 %44, -4
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %45)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 4)
  %46 = load i8, ptr @WD, align 1, !tbaa !5
  %47 = add i8 %46, -8
  tail call void @setmask(i8 noundef zeroext %47, i8 noundef zeroext 4)
  %48 = load i8, ptr @WD, align 1, !tbaa !5
  %49 = add i8 %48, -3
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %49)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 5)
  %50 = load i8, ptr @WD, align 1, !tbaa !5
  %51 = add i8 %50, -8
  tail call void @setmask(i8 noundef zeroext %51, i8 noundef zeroext 5)
  %52 = load i8, ptr @WD, align 1, !tbaa !5
  %53 = add i8 %52, -2
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %53)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 6)
  %54 = load i8, ptr @WD, align 1, !tbaa !5
  %55 = add i8 %54, -8
  tail call void @setmask(i8 noundef zeroext %55, i8 noundef zeroext 6)
  %56 = load i8, ptr @WD, align 1, !tbaa !5
  %57 = add i8 %56, -1
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %57)
  tail call void @setmask(i8 noundef zeroext 0, i8 noundef zeroext 7)
  %58 = load i8, ptr @WD, align 1, !tbaa !5
  %59 = add i8 %58, -8
  tail call void @setmask(i8 noundef zeroext %59, i8 noundef zeroext 7)
  %60 = load i8, ptr @WD, align 1, !tbaa !5
  %61 = add i8 %60, -8
  tail call void @setmask(i8 noundef zeroext 0, i8 noundef zeroext %61)
  tail call void @setmask(i8 noundef zeroext 1, i8 noundef zeroext 7)
  %62 = load i8, ptr @WD, align 1, !tbaa !5
  %63 = add i8 %62, -7
  tail call void @setmask(i8 noundef zeroext %63, i8 noundef zeroext 7)
  %64 = load i8, ptr @WD, align 1, !tbaa !5
  %65 = add i8 %64, -8
  tail call void @setmask(i8 noundef zeroext 1, i8 noundef zeroext %65)
  tail call void @setmask(i8 noundef zeroext 2, i8 noundef zeroext 7)
  %66 = load i8, ptr @WD, align 1, !tbaa !5
  %67 = add i8 %66, -6
  tail call void @setmask(i8 noundef zeroext %67, i8 noundef zeroext 7)
  %68 = load i8, ptr @WD, align 1, !tbaa !5
  %69 = add i8 %68, -8
  tail call void @setmask(i8 noundef zeroext 2, i8 noundef zeroext %69)
  tail call void @setmask(i8 noundef zeroext 3, i8 noundef zeroext 7)
  %70 = load i8, ptr @WD, align 1, !tbaa !5
  %71 = add i8 %70, -5
  tail call void @setmask(i8 noundef zeroext %71, i8 noundef zeroext 7)
  %72 = load i8, ptr @WD, align 1, !tbaa !5
  %73 = add i8 %72, -8
  tail call void @setmask(i8 noundef zeroext 3, i8 noundef zeroext %73)
  tail call void @setmask(i8 noundef zeroext 4, i8 noundef zeroext 7)
  %74 = load i8, ptr @WD, align 1, !tbaa !5
  %75 = add i8 %74, -4
  tail call void @setmask(i8 noundef zeroext %75, i8 noundef zeroext 7)
  %76 = load i8, ptr @WD, align 1, !tbaa !5
  %77 = add i8 %76, -8
  tail call void @setmask(i8 noundef zeroext 4, i8 noundef zeroext %77)
  tail call void @setmask(i8 noundef zeroext 5, i8 noundef zeroext 7)
  %78 = load i8, ptr @WD, align 1, !tbaa !5
  %79 = add i8 %78, -3
  tail call void @setmask(i8 noundef zeroext %79, i8 noundef zeroext 7)
  %80 = load i8, ptr @WD, align 1, !tbaa !5
  %81 = add i8 %80, -8
  tail call void @setmask(i8 noundef zeroext 5, i8 noundef zeroext %81)
  tail call void @setmask(i8 noundef zeroext 6, i8 noundef zeroext 7)
  %82 = load i8, ptr @WD, align 1, !tbaa !5
  %83 = add i8 %82, -2
  tail call void @setmask(i8 noundef zeroext %83, i8 noundef zeroext 7)
  %84 = load i8, ptr @WD, align 1, !tbaa !5
  %85 = add i8 %84, -8
  tail call void @setmask(i8 noundef zeroext 6, i8 noundef zeroext %85)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 7)
  %86 = load i8, ptr @WD, align 1, !tbaa !5
  %87 = add i8 %86, -1
  tail call void @setmask(i8 noundef zeroext %87, i8 noundef zeroext 7)
  %88 = load i8, ptr @WD, align 1, !tbaa !5
  %89 = add i8 %88, -8
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext %89)
  tail call void @setmask(i8 noundef zeroext 0, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 1, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 2, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 3, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 4, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 5, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 6, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 7, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 8)
  %90 = load i8, ptr @WD, align 1, !tbaa !5
  %91 = add i8 %90, -8
  tail call void @setmask(i8 noundef zeroext %91, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 0)
  %92 = load i8, ptr @WD, align 1, !tbaa !5
  %93 = add i8 %92, -7
  tail call void @setmask(i8 noundef zeroext %93, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 1)
  %94 = load i8, ptr @WD, align 1, !tbaa !5
  %95 = add i8 %94, -6
  tail call void @setmask(i8 noundef zeroext %95, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 2)
  %96 = load i8, ptr @WD, align 1, !tbaa !5
  %97 = add i8 %96, -5
  tail call void @setmask(i8 noundef zeroext %97, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 3)
  %98 = load i8, ptr @WD, align 1, !tbaa !5
  %99 = add i8 %98, -4
  tail call void @setmask(i8 noundef zeroext %99, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 4)
  %100 = load i8, ptr @WD, align 1, !tbaa !5
  %101 = add i8 %100, -3
  tail call void @setmask(i8 noundef zeroext %101, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 5)
  %102 = load i8, ptr @WD, align 1, !tbaa !5
  %103 = add i8 %102, -2
  tail call void @setmask(i8 noundef zeroext %103, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 6)
  %104 = load i8, ptr @WD, align 1, !tbaa !5
  %105 = add i8 %104, -1
  tail call void @setmask(i8 noundef zeroext %105, i8 noundef zeroext 8)
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext 7)
  %106 = load i8, ptr @WD, align 1, !tbaa !5
  %107 = add i8 %106, -7
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %107)
  %108 = load i8, ptr @WD, align 1, !tbaa !5
  %109 = add i8 %108, -6
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %109)
  %110 = load i8, ptr @WD, align 1, !tbaa !5
  %111 = add i8 %110, -5
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %111)
  %112 = load i8, ptr @WD, align 1, !tbaa !5
  %113 = add i8 %112, -4
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %113)
  %114 = load i8, ptr @WD, align 1, !tbaa !5
  %115 = add i8 %114, -3
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %115)
  %116 = load i8, ptr @WD, align 1, !tbaa !5
  %117 = add i8 %116, -2
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %117)
  %118 = load i8, ptr @WD, align 1, !tbaa !5
  %119 = add i8 %118, -1
  tail call void @setmask(i8 noundef zeroext 8, i8 noundef zeroext %119)
  %120 = load i8, ptr @WD, align 1, !tbaa !5
  %.not57 = icmp eq i8 %120, 14
  br i1 %.not57, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader47.preheader, %148
  %.353 = phi i32 [ %149, %148 ], [ 0, %.preheader47.preheader ]
  %121 = and i32 %.353, 1
  %.not42 = icmp eq i32 %121, 0
  br i1 %.not42, label %125, label %122

122:                                              ; preds = %.lr.ph
  %123 = trunc i32 %.353 to i8
  %124 = add i8 %123, 8
  tail call void @setmask(i8 noundef zeroext %124, i8 noundef zeroext 6)
  tail call void @setmask(i8 noundef zeroext 6, i8 noundef zeroext %124)
  br label %148

125:                                              ; preds = %.lr.ph
  %126 = add i32 %.353, 8
  %127 = and i32 %.353, 6
  %128 = lshr exact i32 128, %127
  %129 = load ptr, ptr @framebase, align 8, !tbaa !8
  %130 = lshr i32 %126, 3
  %131 = load i8, ptr @WDB, align 1, !tbaa !5
  %132 = zext i8 %131 to i32
  %133 = mul nuw nsw i32 %132, 6
  %134 = add nuw nsw i32 %133, %130
  %135 = zext nneg i32 %134 to i64
  %136 = getelementptr inbounds i8, ptr %129, i64 %135
  %137 = load i8, ptr %136, align 1, !tbaa !5
  %138 = trunc nuw i32 %128 to i8
  %139 = or i8 %137, %138
  store i8 %139, ptr %136, align 1, !tbaa !5
  %140 = load ptr, ptr @framebase, align 8, !tbaa !8
  %141 = load i8, ptr @WDB, align 1, !tbaa !5
  %142 = zext i8 %141 to i32
  %143 = mul i32 %126, %142
  %144 = zext i32 %143 to i64
  %145 = getelementptr inbounds i8, ptr %140, i64 %144
  %146 = load i8, ptr %145, align 1, !tbaa !5
  %147 = or i8 %146, 2
  store i8 %147, ptr %145, align 1, !tbaa !5
  br label %148

148:                                              ; preds = %122, %125
  %149 = add nuw i32 %.353, 1
  %150 = load i8, ptr @WD, align 1, !tbaa !5
  %151 = zext i8 %150 to i32
  %152 = add nsw i32 %151, -14
  %153 = icmp ult i32 %149, %152
  br i1 %153, label %.lr.ph, label %._crit_edge, !llvm.loop !10

._crit_edge:                                      ; preds = %148, %.preheader47.preheader
  tail call void @putvpat()
  %154 = load i8, ptr @WD, align 1, !tbaa !5
  %.not58 = icmp eq i8 %154, 0
  br i1 %.not58, label %._crit_edge56, label %.preheader.preheader

.preheader.preheader:                             ; preds = %._crit_edge
  %.pre59.pre = load ptr, ptr @framebase, align 8, !tbaa !8
  %.pre61.pre = load i8, ptr @WDB, align 1, !tbaa !5
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %177
  %.pre61 = phi i8 [ %.pre61.pre, %.preheader.preheader ], [ %.pre6165, %177 ]
  %.pre59 = phi ptr [ %.pre59.pre, %.preheader.preheader ], [ %.pre5962, %177 ]
  %indvars.iv = phi i32 [ 1, %.preheader.preheader ], [ %indvars.iv.next, %177 ]
  %.255 = phi i32 [ 0, %.preheader.preheader ], [ %178, %177 ]
  %155 = trunc nuw i32 %.255 to i8
  br label %156

156:                                              ; preds = %.preheader, %173
  %.pre6166 = phi i8 [ %.pre61, %.preheader ], [ %.pre6165, %173 ]
  %.pre5963 = phi ptr [ %.pre59, %.preheader ], [ %.pre5962, %173 ]
  %157 = phi i8 [ %.pre61, %.preheader ], [ %174, %173 ]
  %158 = phi ptr [ %.pre59, %.preheader ], [ %175, %173 ]
  %.454 = phi i32 [ 0, %.preheader ], [ %176, %173 ]
  %159 = lshr i32 %.454, 3
  %160 = zext i8 %157 to i32
  %161 = mul nuw nsw i32 %.255, %160
  %162 = add nuw nsw i32 %161, %159
  %163 = zext nneg i32 %162 to i64
  %164 = getelementptr inbounds i8, ptr %158, i64 %163
  %165 = load i8, ptr %164, align 1, !tbaa !5
  %166 = zext i8 %165 to i32
  %167 = and i32 %.454, 7
  %168 = xor i32 %167, 7
  %169 = shl nuw nsw i32 1, %168
  %170 = and i32 %169, %166
  %.not41 = icmp eq i32 %170, 0
  br i1 %.not41, label %173, label %171

171:                                              ; preds = %156
  %172 = trunc nuw i32 %.454 to i8
  tail call void @setmask(i8 noundef zeroext %172, i8 noundef zeroext %155)
  %.pre = load ptr, ptr @framebase, align 8, !tbaa !8
  %.pre60 = load i8, ptr @WDB, align 1, !tbaa !5
  br label %173

173:                                              ; preds = %156, %171
  %.pre6165 = phi i8 [ %.pre6166, %156 ], [ %.pre60, %171 ]
  %.pre5962 = phi ptr [ %.pre5963, %156 ], [ %.pre, %171 ]
  %174 = phi i8 [ %157, %156 ], [ %.pre60, %171 ]
  %175 = phi ptr [ %158, %156 ], [ %.pre, %171 ]
  %176 = add nuw nsw i32 %.454, 1
  %exitcond.not = icmp eq i32 %176, %indvars.iv
  br i1 %exitcond.not, label %177, label %156, !llvm.loop !12

177:                                              ; preds = %173
  %178 = add nuw nsw i32 %.255, 1
  %179 = load i8, ptr @WD, align 1, !tbaa !5
  %180 = zext i8 %179 to i32
  %181 = icmp ult i32 %178, %180
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  br i1 %181, label %.preheader, label %._crit_edge56, !llvm.loop !13

._crit_edge56:                                    ; preds = %177, %._crit_edge
  ret void
}

; Function Attrs: nounwind uwtable
declare hidden ptr @calloc_beebs(i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden ptr @malloc_beebs(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @doaligns() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @setmask(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @putvpat() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @putfind() local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass