; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/evaluation/src/bubblesort (libbubblesort)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @BubbleSort(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %7

7:                                                ; preds = %64, %1
  %8 = load i32, ptr %6, align 4, !tbaa !9
  %9 = icmp slt i32 %8, 100
  br i1 %9, label %10, label %67

10:                                               ; preds = %7
  store i32 1, ptr %3, align 4, !tbaa !9
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %56, %10
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = icmp slt i32 %12, 100
  br i1 %13, label %14, label %59

14:                                               ; preds = %11
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = sub nsw i32 100, %16
  %18 = icmp sge i32 %15, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  br label %59

20:                                               ; preds = %14
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds i32, ptr %21, i64 %23
  %25 = load i32, ptr %24, align 4, !tbaa !9
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = load i32, ptr %5, align 4, !tbaa !9
  %28 = add nsw i32 %27, 1
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds i32, ptr %26, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = icmp sgt i32 %25, %31
  br i1 %32, label %33, label %55

33:                                               ; preds = %20
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = load i32, ptr %5, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds i32, ptr %34, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !9
  store i32 %38, ptr %4, align 4, !tbaa !9
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = add nsw i32 %40, 1
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds i32, ptr %39, i64 %42
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = load ptr, ptr %2, align 8, !tbaa !5
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds i32, ptr %45, i64 %47
  store i32 %44, ptr %48, align 4, !tbaa !9
  %49 = load i32, ptr %4, align 4, !tbaa !9
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = add nsw i32 %51, 1
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds i32, ptr %50, i64 %53
  store i32 %49, ptr %54, align 4, !tbaa !9
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %55

55:                                               ; preds = %33, %20
  br label %56

56:                                               ; preds = %55
  %57 = load i32, ptr %5, align 4, !tbaa !9
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %5, align 4, !tbaa !9
  br label %11, !llvm.loop !11

59:                                               ; preds = %19, %11
  %60 = load i32, ptr %3, align 4, !tbaa !9
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %62, label %63

62:                                               ; preds = %59
  br label %67

63:                                               ; preds = %59
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %6, align 4, !tbaa !9
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %6, align 4, !tbaa !9
  br label %7, !llvm.loop !13

67:                                               ; preds = %62, %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @BubbleSort(ptr nocapture noundef %0) local_unnamed_addr #0 {
  br label %.lr.ph.preheader

._crit_edge.thread:                               ; preds = %.thread, %._crit_edge
  %2 = add nuw nsw i32 %.027, 1
  %indvars.iv.next32 = add nsw i64 %indvars.iv31, -1
  %exitcond34.not = icmp eq i32 %2, 100
  br i1 %exitcond34.not, label %12, label %.lr.ph.preheader, !llvm.loop !5

.lr.ph.preheader:                                 ; preds = %._crit_edge.thread, %1
  %indvars.iv31 = phi i64 [ 100, %1 ], [ %indvars.iv.next32, %._crit_edge.thread ]
  %.027 = phi i32 [ 0, %1 ], [ %2, %._crit_edge.thread ]
  %.pre = load i32, ptr %0, align 4, !tbaa !7
  br label %.lr.ph.outer

.lr.ph.outer:                                     ; preds = %.lr.ph._crit_edge, %.lr.ph.preheader
  %.ph = phi i32 [ %.lcssa, %.lr.ph._crit_edge ], [ %.pre, %.lr.ph.preheader ]
  %indvars.iv.ph = phi i64 [ %indvars.iv.next.lcssa, %.lr.ph._crit_edge ], [ 0, %.lr.ph.preheader ]
  %.02025.ph = phi i32 [ %.02025.lcssa, %.lr.ph._crit_edge ], [ 1, %.lr.ph.preheader ]
  %indvars.iv.next46 = add nuw nsw i64 %indvars.iv.ph, 1
  %3 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next46
  %4 = load i32, ptr %3, align 4, !tbaa !7
  %5 = icmp sgt i32 %.ph, %4
  br i1 %5, label %.thread, label %.lr.ph._crit_edge

.lr.ph:                                           ; preds = %.thread
  %indvars.iv.next = add nuw nsw i64 %indvars.iv.next48, 1
  %6 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  %7 = load i32, ptr %6, align 4, !tbaa !7
  %8 = icmp sgt i32 %.ph, %7
  br i1 %8, label %.thread, label %.lr.ph._crit_edge, !llvm.loop !11

.lr.ph._crit_edge:                                ; preds = %.lr.ph, %.lr.ph.outer
  %.02025.lcssa = phi i32 [ %.02025.ph, %.lr.ph.outer ], [ 0, %.lr.ph ]
  %indvars.iv.next.lcssa = phi i64 [ %indvars.iv.next46, %.lr.ph.outer ], [ %indvars.iv.next, %.lr.ph ]
  %.lcssa = phi i32 [ %4, %.lr.ph.outer ], [ %7, %.lr.ph ]
  %exitcond.not = icmp eq i64 %indvars.iv.next.lcssa, %indvars.iv31
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.outer, !llvm.loop !11

.thread:                                          ; preds = %.lr.ph.outer, %.lr.ph
  %9 = phi i32 [ %7, %.lr.ph ], [ %4, %.lr.ph.outer ]
  %10 = phi ptr [ %6, %.lr.ph ], [ %3, %.lr.ph.outer ]
  %indvars.iv.next48 = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.next46, %.lr.ph.outer ]
  %indvars.iv47 = phi i64 [ %indvars.iv.next48, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.outer ]
  %11 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv47
  store i32 %9, ptr %11, align 4, !tbaa !7
  store i32 %.ph, ptr %10, align 4, !tbaa !7
  %exitcond.not36 = icmp eq i64 %indvars.iv.next48, %indvars.iv31
  br i1 %exitcond.not36, label %._crit_edge.thread, label %.lr.ph, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph._crit_edge
  %.not23 = icmp eq i32 %.02025.lcssa, 0
  br i1 %.not23, label %._crit_edge.thread, label %12

12:                                               ; preds = %._crit_edge, %._crit_edge.thread
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass