; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/evaluation/src/sglib_listinsertsort (listinsertsort)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ilist = type { i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @sglib_iListType_add(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 -1, ptr %6, align 4, !tbaa !9
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %7, ptr %5, align 8, !tbaa !5
  br label %8

8:                                                ; preds = %25, %2
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = load ptr, ptr %9, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %12, label %22

12:                                               ; preds = %8
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = load ptr, ptr %13, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.ilist, ptr %14, i32 0, i32 0
  %16 = load i32, ptr %15, align 8, !tbaa !11
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.ilist, ptr %17, i32 0, i32 0
  %19 = load i32, ptr %18, align 8, !tbaa !11
  %20 = sub nsw i32 %16, %19
  store i32 %20, ptr %6, align 4, !tbaa !9
  %21 = icmp slt i32 %20, 0
  br label %22

22:                                               ; preds = %12, %8
  %23 = phi i1 [ false, %8 ], [ %21, %12 ]
  br i1 %23, label %24, label %29

24:                                               ; preds = %22
  br label %25

25:                                               ; preds = %24
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = load ptr, ptr %26, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.ilist, ptr %27, i32 0, i32 1
  store ptr %28, ptr %5, align 8, !tbaa !5
  br label %8, !llvm.loop !13

29:                                               ; preds = %22
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = load ptr, ptr %30, align 8, !tbaa !5
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.ilist, ptr %32, i32 0, i32 1
  store ptr %31, ptr %33, align 8, !tbaa !15
  %34 = load ptr, ptr %4, align 8, !tbaa !5
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %34, ptr %35, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"ilist", !10, i64 0, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!12, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @sglib_iListType_add(ptr nocapture noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %.not10 = icmp eq ptr %3, null
  br i1 %.not10, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %4 = load i32, ptr %1, align 8, !tbaa !9
  %5 = load i32, ptr %3, align 8, !tbaa !9
  %6 = icmp slt i32 %5, %4
  br i1 %6, label %.lr.ph16, label %.critedge

7:                                                ; preds = %.lr.ph16
  %8 = load i32, ptr %12, align 8, !tbaa !9
  %9 = icmp slt i32 %8, %4
  br i1 %9, label %.lr.ph16, label %.critedge.loopexit, !llvm.loop !12

.lr.ph16:                                         ; preds = %.lr.ph, %7
  %10 = phi ptr [ %12, %7 ], [ %3, %.lr.ph ]
  %11 = getelementptr inbounds i8, ptr %10, i64 8
  %12 = load ptr, ptr %11, align 8, !tbaa !5
  %.not = icmp eq ptr %12, null
  br i1 %.not, label %.critedge.loopexit, label %7, !llvm.loop !12

.critedge.loopexit:                               ; preds = %7, %.lr.ph16
  %.lcssa.ph = phi ptr [ %12, %7 ], [ null, %.lr.ph16 ]
  %13 = getelementptr inbounds i8, ptr %10, i64 8
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %.lr.ph, %2
  %.0.lcssa = phi ptr [ %0, %2 ], [ %0, %.lr.ph ], [ %13, %.critedge.loopexit ]
  %.lcssa = phi ptr [ null, %2 ], [ %3, %.lr.ph ], [ %.lcssa.ph, %.critedge.loopexit ]
  %14 = getelementptr inbounds i8, ptr %1, i64 8
  store ptr %.lcssa, ptr %14, align 8, !tbaa !14
  store ptr %1, ptr %.0.lcssa, align 8, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"ilist", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!10, !6, i64 8}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass