; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000/src/ARINC653_PORT (mmu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @MMU_FLTRANSLATIONTABLE_MAPSLTRANSLATIONTABLE(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = and i32 %14, -1048576
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp ne i32 %15, %16
  br i1 %17, label %18, label %19

18:                                               ; preds = %4
  store i8 0, ptr %5, align 1
  store i32 1, ptr %13, align 4
  br label %46

19:                                               ; preds = %4
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = lshr i32 %21, 20
  %23 = zext i32 %22 to i64
  %24 = getelementptr inbounds i32, ptr %20, i64 %23
  store ptr %24, ptr %10, align 8, !tbaa !5
  %25 = load ptr, ptr %10, align 8, !tbaa !5
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %19
  store i8 0, ptr %5, align 1
  store i32 1, ptr %13, align 4
  br label %46

29:                                               ; preds = %19
  store i32 0, ptr %11, align 4, !tbaa !9
  %30 = load i32, ptr %9, align 4, !tbaa !9
  switch i32 %30, label %37 [
    i32 0, label %31
    i32 1, label %34
  ]

31:                                               ; preds = %29
  %32 = load i32, ptr %11, align 4, !tbaa !9
  %33 = or i32 %32, 0
  store i32 %33, ptr %11, align 4, !tbaa !9
  br label %37

34:                                               ; preds = %29
  %35 = load i32, ptr %11, align 4, !tbaa !9
  %36 = or i32 %35, 8
  store i32 %36, ptr %11, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %34, %31, %29
  %38 = load ptr, ptr %8, align 8, !tbaa !5
  %39 = ptrtoint ptr %38 to i32
  %40 = and i32 %39, -1024
  %41 = or i32 1, %40
  %42 = load i32, ptr %11, align 4, !tbaa !9
  %43 = or i32 %41, %42
  store i32 %43, ptr %12, align 4, !tbaa !9
  %44 = load i32, ptr %12, align 4, !tbaa !9
  %45 = load ptr, ptr %10, align 8, !tbaa !5
  store i32 %44, ptr %45, align 4, !tbaa !9
  store i8 1, ptr %5, align 1
  store i32 1, ptr %13, align 4
  br label %46

46:                                               ; preds = %37, %28, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %47 = load i8, ptr %5, align 1
  ret i8 %47
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local zeroext range(i8 0, 2) i8 @MMU_FLTRANSLATIONTABLE_MAPSLTRANSLATIONTABLE(ptr nocapture noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = and i32 %1, 1048575
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %6, label %17

6:                                                ; preds = %4
  %7 = lshr exact i32 %1, 20
  %8 = zext nneg i32 %7 to i64
  %9 = getelementptr inbounds i32, ptr %0, i64 %8
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %.not14 = icmp eq i32 %10, 0
  br i1 %.not14, label %11, label %17

11:                                               ; preds = %6
  %switch.selectcmp = icmp eq i32 %3, 1
  %12 = ptrtoint ptr %2 to i64
  %13 = trunc i64 %12 to i32
  %14 = and i32 %13, -1024
  %15 = select i1 %switch.selectcmp, i32 9, i32 1
  %16 = or disjoint i32 %15, %14
  store i32 %16, ptr %9, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %6, %4, %11
  %.0 = phi i8 [ 1, %11 ], [ 0, %4 ], [ 0, %6 ]
  ret i8 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass