; LLVM IR from artvns/SimpleFvm :: simplefvm/src/MeshLoader/MeshContainer/MacroCell.ll (ZN10meshloader9MacroCellC2Emm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.meshloader::MacroCell" = type <{ %"class.meshloader::Cell", %"class.meshloader::Cell", %"class.meshloader::Cell", ptr, ptr, ptr, ptr, i64, i64, i8, [7 x i8] }>
%"class.meshloader::Cell" = type { i64, i64, double, double, double }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10meshloader9MacroCellC2Emm(ptr noundef nonnull align 8 dereferenceable(169) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i64 %2, ptr %6, align 8, !tbaa !9
  %7 = load ptr, ptr %4, align 8
  %8 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 0
  %9 = load i64, ptr %5, align 8, !tbaa !9
  call void @_ZN10meshloader4CellC1Em(ptr noundef nonnull align 8 dereferenceable(40) %8, i64 noundef %9)
  %10 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 1
  %11 = load i64, ptr %5, align 8, !tbaa !9
  call void @_ZN10meshloader4CellC1Em(ptr noundef nonnull align 8 dereferenceable(40) %10, i64 noundef %11)
  %12 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 2
  %13 = load i64, ptr %5, align 8, !tbaa !9
  %14 = load i64, ptr %6, align 8, !tbaa !9
  call void @_ZN10meshloader4CellC1Emm(ptr noundef nonnull align 8 dereferenceable(40) %12, i64 noundef %13, i64 noundef %14)
  %15 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 3
  store ptr null, ptr %15, align 8, !tbaa !11
  %16 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 4
  store ptr null, ptr %16, align 8, !tbaa !16
  %17 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 5
  store ptr null, ptr %17, align 8, !tbaa !17
  %18 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 6
  store ptr null, ptr %18, align 8, !tbaa !18
  %19 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 7
  %20 = load i64, ptr %5, align 8, !tbaa !9
  store i64 %20, ptr %19, align 8, !tbaa !19
  %21 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 8
  %22 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %22, ptr %21, align 8, !tbaa !20
  %23 = getelementptr inbounds %"class.meshloader::MacroCell", ptr %7, i32 0, i32 9
  store i8 0, ptr %23, align 8, !tbaa !21
  ret void
}

declare void @_ZN10meshloader4CellC1Em(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) unnamed_addr #1

declare void @_ZN10meshloader4CellC1Emm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef, i64 noundef) unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 120}
!12 = !{!"_ZTSN10meshloader9MacroCellE", !13, i64 0, !13, i64 40, !13, i64 80, !6, i64 120, !6, i64 128, !6, i64 136, !6, i64 144, !10, i64 152, !10, i64 160, !15, i64 168}
!13 = !{!"_ZTSN10meshloader4CellE", !10, i64 0, !10, i64 8, !14, i64 16, !14, i64 24, !14, i64 32}
!14 = !{!"double", !7, i64 0}
!15 = !{!"bool", !7, i64 0}
!16 = !{!12, !6, i64 128}
!17 = !{!12, !6, i64 136}
!18 = !{!12, !6, i64 144}
!19 = !{!12, !10, i64 152}
!20 = !{!12, !10, i64 160}
!21 = !{!12, !15, i64 168}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10meshloader9MacroCellC2Emm(ptr noundef nonnull align 8 dereferenceable(169) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #0 align 2 {
  tail call void @_ZN10meshloader4CellC1Em(ptr noundef nonnull align 8 dereferenceable(40) %0, i64 noundef %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 40
  tail call void @_ZN10meshloader4CellC1Em(ptr noundef nonnull align 8 dereferenceable(40) %4, i64 noundef %1)
  %5 = getelementptr inbounds i8, ptr %0, i64 80
  tail call void @_ZN10meshloader4CellC1Emm(ptr noundef nonnull align 8 dereferenceable(40) %5, i64 noundef %1, i64 noundef %2)
  %6 = getelementptr inbounds i8, ptr %0, i64 120
  %7 = getelementptr inbounds i8, ptr %0, i64 152
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %6, i8 0, i64 32, i1 false)
  store i64 %1, ptr %7, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 160
  store i64 %2, ptr %8, align 8, !tbaa !14
  %9 = getelementptr inbounds i8, ptr %0, i64 168
  store i8 0, ptr %9, align 8, !tbaa !15
  ret void
}

declare void @_ZN10meshloader4CellC1Em(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) unnamed_addr #1

declare void @_ZN10meshloader4CellC1Emm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef, i64 noundef) unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 152}
!6 = !{!"_ZTSN10meshloader9MacroCellE", !7, i64 0, !7, i64 40, !7, i64 80, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !8, i64 152, !8, i64 160, !13, i64 168}
!7 = !{!"_ZTSN10meshloader4CellE", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"double", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"bool", !9, i64 0}
!14 = !{!6, !8, i64 160}
!15 = !{!6, !13, i64 168}


; Effective O3 passes: EarlyCSEPass,InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass