; LLVM IR from Mohammed-Shoaib/Coding-Problems :: Codeforces/Solutions/1106A.ll (Z13crossCountingiSt6vectorIS_IcSaIcEESaIS1_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z13crossCountingiSt6vectorIS_IcSaIcEESaIS1_EE(i32 noundef %0, ptr noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %126, %2
  %10 = load i32, ptr %6, align 4, !tbaa !5
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = sub nsw i32 %11, 1
  %13 = icmp slt i32 %10, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %9
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %129

15:                                               ; preds = %9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 1, ptr %8, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %122, %15
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = sub nsw i32 %18, 1
  %20 = icmp slt i32 %17, %19
  br i1 %20, label %22, label %21

21:                                               ; preds = %16
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %125

22:                                               ; preds = %16
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = sub nsw i32 %23, 1
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %25) #2
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = sub nsw i32 %27, 1
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %29) #2
  %31 = load i8, ptr %30, align 1, !tbaa !11
  %32 = sext i8 %31 to i32
  %33 = load i32, ptr %6, align 4, !tbaa !5
  %34 = sub nsw i32 %33, 1
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %35) #2
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %39) #2
  %41 = load i8, ptr %40, align 1, !tbaa !11
  %42 = sext i8 %41 to i32
  %43 = icmp eq i32 %32, %42
  br i1 %43, label %44, label %121

44:                                               ; preds = %22
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = sub nsw i32 %45, 1
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %47) #2
  %49 = load i32, ptr %8, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %51) #2
  %53 = load i8, ptr %52, align 1, !tbaa !11
  %54 = sext i8 %53 to i32
  %55 = load i32, ptr %6, align 4, !tbaa !5
  %56 = add nsw i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %57) #2
  %59 = load i32, ptr %8, align 4, !tbaa !5
  %60 = sub nsw i32 %59, 1
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %61) #2
  %63 = load i8, ptr %62, align 1, !tbaa !11
  %64 = sext i8 %63 to i32
  %65 = icmp eq i32 %54, %64
  br i1 %65, label %66, label %121

66:                                               ; preds = %44
  %67 = load i32, ptr %6, align 4, !tbaa !5
  %68 = add nsw i32 %67, 1
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %69) #2
  %71 = load i32, ptr %8, align 4, !tbaa !5
  %72 = sub nsw i32 %71, 1
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %73) #2
  %75 = load i8, ptr %74, align 1, !tbaa !11
  %76 = sext i8 %75 to i32
  %77 = load i32, ptr %6, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %79) #2
  %81 = load i32, ptr %8, align 4, !tbaa !5
  %82 = add nsw i32 %81, 1
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %83) #2
  %85 = load i8, ptr %84, align 1, !tbaa !11
  %86 = sext i8 %85 to i32
  %87 = icmp eq i32 %76, %86
  br i1 %87, label %88, label %121

88:                                               ; preds = %66
  %89 = load i32, ptr %6, align 4, !tbaa !5
  %90 = add nsw i32 %89, 1
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %91) #2
  %93 = load i32, ptr %8, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %95) #2
  %97 = load i8, ptr %96, align 1, !tbaa !11
  %98 = sext i8 %97 to i32
  %99 = load i32, ptr %6, align 4, !tbaa !5
  %100 = sext i32 %99 to i64
  %101 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %100) #2
  %102 = load i32, ptr %8, align 4, !tbaa !5
  %103 = sext i32 %102 to i64
  %104 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %101, i64 noundef %103) #2
  %105 = load i8, ptr %104, align 1, !tbaa !11
  %106 = sext i8 %105 to i32
  %107 = icmp eq i32 %98, %106
  br i1 %107, label %108, label %121

108:                                              ; preds = %88
  %109 = load i32, ptr %6, align 4, !tbaa !5
  %110 = sext i32 %109 to i64
  %111 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %110) #2
  %112 = load i32, ptr %8, align 4, !tbaa !5
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %111, i64 noundef %113) #2
  %115 = load i8, ptr %114, align 1, !tbaa !11
  %116 = sext i8 %115 to i32
  %117 = icmp eq i32 %116, 88
  br i1 %117, label %118, label %121

118:                                              ; preds = %108
  %119 = load i32, ptr %5, align 4, !tbaa !5
  %120 = add nsw i32 %119, 1
  store i32 %120, ptr %5, align 4, !tbaa !5
  br label %121

121:                                              ; preds = %118, %108, %88, %66, %44, %22
  br label %122

122:                                              ; preds = %121
  %123 = load i32, ptr %8, align 4, !tbaa !5
  %124 = add nsw i32 %123, 1
  store i32 %124, ptr %8, align 4, !tbaa !5
  br label %16, !llvm.loop !12

125:                                              ; preds = %21
  br label %126

126:                                              ; preds = %125
  %127 = load i32, ptr %6, align 4, !tbaa !5
  %128 = add nsw i32 %127, 1
  store i32 %128, ptr %6, align 4, !tbaa !5
  br label %9, !llvm.loop !14

129:                                              ; preds = %14
  %130 = load i32, ptr %5, align 4, !tbaa !5
  store i32 1, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %130
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z13crossCountingiSt6vectorIS_IcSaIcEESaIS1_EE(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %0, 2
  br i1 %3, label %.preheader.us.preheader, label %._crit_edge33

.preheader.us.preheader:                          ; preds = %2
  %4 = add nsw i32 %0, -1
  %wide.trip.count39 = zext nneg i32 %4 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %indvars.iv36 = phi i64 [ 1, %.preheader.us.preheader ], [ %indvars.iv.next37, %._crit_edge.us ]
  %.02731.us = phi i32 [ 0, %.preheader.us.preheader ], [ %.2.us, %._crit_edge.us ]
  %5 = add nsw i64 %indvars.iv36, -1
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  br label %6

6:                                                ; preds = %.preheader.us, %45
  %indvars.iv = phi i64 [ 1, %.preheader.us ], [ %indvars.iv.next, %45 ]
  %.129.us = phi i32 [ %.02731.us, %.preheader.us ], [ %.2.us, %45 ]
  %7 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %5) #1
  %8 = add nsw i64 %indvars.iv, -1
  %9 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %8) #1
  %10 = load i8, ptr %9, align 1, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %5) #1
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %12 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %indvars.iv.next) #1
  %13 = load i8, ptr %12, align 1, !tbaa !5
  %14 = icmp eq i8 %10, %13
  br i1 %14, label %15, label %45

15:                                               ; preds = %6
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %5) #1
  %17 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv.next) #1
  %18 = load i8, ptr %17, align 1, !tbaa !5
  %19 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next37) #1
  %20 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %8) #1
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %22 = icmp eq i8 %18, %21
  br i1 %22, label %23, label %45

23:                                               ; preds = %15
  %24 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next37) #1
  %25 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %8) #1
  %26 = load i8, ptr %25, align 1, !tbaa !5
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next37) #1
  %28 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv.next) #1
  %29 = load i8, ptr %28, align 1, !tbaa !5
  %30 = icmp eq i8 %26, %29
  br i1 %30, label %31, label %45

31:                                               ; preds = %23
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next37) #1
  %33 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %indvars.iv.next) #1
  %34 = load i8, ptr %33, align 1, !tbaa !5
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv36) #1
  %36 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %indvars.iv) #1
  %37 = load i8, ptr %36, align 1, !tbaa !5
  %38 = icmp eq i8 %34, %37
  br i1 %38, label %39, label %45

39:                                               ; preds = %31
  %40 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv36) #1
  %41 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %indvars.iv) #1
  %42 = load i8, ptr %41, align 1, !tbaa !5
  %43 = icmp eq i8 %42, 88
  %44 = zext i1 %43 to i32
  %spec.select.us = add nsw i32 %.129.us, %44
  br label %45

45:                                               ; preds = %39, %31, %23, %15, %6
  %.2.us = phi i32 [ %.129.us, %31 ], [ %.129.us, %23 ], [ %.129.us, %15 ], [ %.129.us, %6 ], [ %spec.select.us, %39 ]
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count39
  br i1 %exitcond.not, label %._crit_edge.us, label %6, !llvm.loop !8

._crit_edge.us:                                   ; preds = %45
  %exitcond40.not = icmp eq i64 %indvars.iv.next37, %wide.trip.count39
  br i1 %exitcond40.not, label %._crit_edge33, label %.preheader.us, !llvm.loop !10

._crit_edge33:                                    ; preds = %._crit_edge.us, %2
  %.027.lcssa = phi i32 [ 0, %2 ], [ %.2.us, %._crit_edge.us ]
  ret i32 %.027.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass