; LLVM IR from BlueBrain/CoreNeuron :: coreneuron/permute (cellorder1)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }
%"class.coreneuron::TNode" = type <{ ptr, ptr, %"class.std::vector", i64, i64, i64, i64, i64, i64, i64, i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl" }
%"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl" = type { %"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<coreneuron::TNode *, std::allocator<coreneuron::TNode *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN10coreneuron15level_from_rootERSt6vectorIPNS_5TNodeESaIS2_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  %4 = alloca ptr, align 8
  %5 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %6 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %7 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store i64 0, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %8, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #3
  %11 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %5, i32 0, i32 0
  store ptr %10, ptr %11, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  %14 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %6, i32 0, i32 0
  store ptr %13, ptr %14, align 8
  br label %15

15:                                               ; preds = %53, %1
  %16 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %5, ptr noundef nonnull align 8 dereferenceable(8) %6) #3
  br i1 %16, label %18, label %17

17:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  br label %55

18:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %19 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %5) #3
  store ptr %19, ptr %7, align 8, !tbaa !5
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = load ptr, ptr %20, align 8, !tbaa !5
  %22 = getelementptr inbounds %"class.coreneuron::TNode", ptr %21, i32 0, i32 1
  %23 = load ptr, ptr %22, align 8, !tbaa !11
  %24 = icmp ne ptr %23, null
  br i1 %24, label %25, label %48

25:                                               ; preds = %18
  %26 = load ptr, ptr %7, align 8, !tbaa !5
  %27 = load ptr, ptr %26, align 8, !tbaa !5
  %28 = getelementptr inbounds %"class.coreneuron::TNode", ptr %27, i32 0, i32 1
  %29 = load ptr, ptr %28, align 8, !tbaa !11
  %30 = getelementptr inbounds %"class.coreneuron::TNode", ptr %29, i32 0, i32 7
  %31 = load i64, ptr %30, align 8, !tbaa !18
  %32 = add i64 %31, 1
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = load ptr, ptr %33, align 8, !tbaa !5
  %35 = getelementptr inbounds %"class.coreneuron::TNode", ptr %34, i32 0, i32 7
  store i64 %32, ptr %35, align 8, !tbaa !18
  %36 = load i64, ptr %3, align 8, !tbaa !9
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = load ptr, ptr %37, align 8, !tbaa !5
  %39 = getelementptr inbounds %"class.coreneuron::TNode", ptr %38, i32 0, i32 7
  %40 = load i64, ptr %39, align 8, !tbaa !18
  %41 = icmp ult i64 %36, %40
  br i1 %41, label %42, label %47

42:                                               ; preds = %25
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load ptr, ptr %43, align 8, !tbaa !5
  %45 = getelementptr inbounds %"class.coreneuron::TNode", ptr %44, i32 0, i32 7
  %46 = load i64, ptr %45, align 8, !tbaa !18
  store i64 %46, ptr %3, align 8, !tbaa !9
  br label %47

47:                                               ; preds = %42, %25
  br label %52

48:                                               ; preds = %18
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = load ptr, ptr %49, align 8, !tbaa !5
  %51 = getelementptr inbounds %"class.coreneuron::TNode", ptr %50, i32 0, i32 7
  store i64 0, ptr %51, align 8, !tbaa !18
  br label %52

52:                                               ; preds = %48, %47
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  br label %53

53:                                               ; preds = %52
  %54 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %5) #3
  br label %15

55:                                               ; preds = %17
  %56 = load i64, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret i64 %56
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"_ZTSN10coreneuron5TNodeE", !6, i64 8, !13, i64 16, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !17, i64 96}
!13 = !{!"_ZTSSt6vectorIPN10coreneuron5TNodeESaIS2_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"int", !7, i64 0}
!18 = !{!12, !10, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN10coreneuron15level_from_rootERSt6vectorIPNS_5TNodeESaIS2_EE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %3 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
  %4 = tail call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  store ptr %4, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  %5 = tail call ptr @_ZNSt6vectorIPN10coreneuron5TNodeESaIS2_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  store ptr %5, ptr %3, align 8
  %6 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  br i1 %6, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %15, %1
  %.0.lcssa = phi i64 [ 0, %1 ], [ %.1, %15 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  ret i64 %.0.lcssa

.lr.ph:                                           ; preds = %1, %15
  %.012 = phi i64 [ %.1, %15 ], [ 0, %1 ]
  %7 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %8, i64 8
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %.not = icmp eq ptr %10, null
  br i1 %.not, label %15, label %11

11:                                               ; preds = %.lr.ph
  %12 = getelementptr inbounds i8, ptr %10, i64 72
  %13 = load i64, ptr %12, align 8, !tbaa !17
  %14 = add i64 %13, 1
  %spec.select = call i64 @llvm.umax.i64(i64 %.012, i64 %14)
  br label %15

15:                                               ; preds = %.lr.ph, %11
  %.sink = phi i64 [ %14, %11 ], [ 0, %.lr.ph ]
  %.1 = phi i64 [ %spec.select, %11 ], [ %.012, %.lr.ph ]
  %16 = getelementptr inbounds i8, ptr %8, i64 72
  store i64 %.sink, ptr %16, align 8
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %2) #4
  %18 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #4
  br i1 %18, label %.lr.ph, label %._crit_edge
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEEbRKNS_17__normal_iteratorIT_T0_EESD_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPPN10coreneuron5TNodeESt6vectorIS3_SaIS3_EEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTSN10coreneuron5TNodeE", !6, i64 8, !11, i64 16, !15, i64 40, !15, i64 48, !15, i64 56, !15, i64 64, !15, i64 72, !15, i64 80, !15, i64 88, !16, i64 96}
!11 = !{!"_ZTSSt6vectorIPN10coreneuron5TNodeESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN10coreneuron5TNodeESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"long", !7, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!10, !15, i64 72}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass