; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (CfgInitialize)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_CfgInitialize(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = icmp ne ptr %12, null
  br i1 %13, label %14, label %15

14:                                               ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %16

15:                                               ; preds = %3
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 136)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %112

16:                                               ; preds = %14
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = icmp ne ptr %17, null
  br i1 %18, label %19, label %20

19:                                               ; preds = %16
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %21

20:                                               ; preds = %16
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 137)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %112

21:                                               ; preds = %19
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.XUartPs, ptr %23, i32 0, i32 0
  %25 = getelementptr inbounds %struct.XUartPs_Config, ptr %24, i32 0, i32 1
  store i32 %22, ptr %25, align 4, !tbaa !11
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.XUartPs_Config, ptr %26, i32 0, i32 2
  %28 = load i32, ptr %27, align 4, !tbaa !16
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.XUartPs, ptr %29, i32 0, i32 0
  %31 = getelementptr inbounds %struct.XUartPs_Config, ptr %30, i32 0, i32 2
  store i32 %28, ptr %31, align 8, !tbaa !17
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.XUartPs_Config, ptr %32, i32 0, i32 3
  %34 = load i32, ptr %33, align 4, !tbaa !18
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.XUartPs, ptr %35, i32 0, i32 0
  %37 = getelementptr inbounds %struct.XUartPs_Config, ptr %36, i32 0, i32 3
  store i32 %34, ptr %37, align 4, !tbaa !19
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.XUartPs, ptr %38, i32 0, i32 6
  store ptr @XUartPs_StubHandler, ptr %39, align 8, !tbaa !20
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.XUartPs, ptr %40, i32 0, i32 4
  %42 = getelementptr inbounds %struct.XUartPsBuffer, ptr %41, i32 0, i32 0
  store ptr null, ptr %42, align 8, !tbaa !21
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.XUartPs, ptr %43, i32 0, i32 4
  %45 = getelementptr inbounds %struct.XUartPsBuffer, ptr %44, i32 0, i32 2
  store i32 0, ptr %45, align 4, !tbaa !22
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.XUartPs, ptr %46, i32 0, i32 4
  %48 = getelementptr inbounds %struct.XUartPsBuffer, ptr %47, i32 0, i32 1
  store i32 0, ptr %48, align 8, !tbaa !23
  %49 = load ptr, ptr %5, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.XUartPs, ptr %49, i32 0, i32 5
  %51 = getelementptr inbounds %struct.XUartPsBuffer, ptr %50, i32 0, i32 0
  store ptr null, ptr %51, align 8, !tbaa !24
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.XUartPs, ptr %52, i32 0, i32 5
  %54 = getelementptr inbounds %struct.XUartPsBuffer, ptr %53, i32 0, i32 2
  store i32 0, ptr %54, align 4, !tbaa !25
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.XUartPs, ptr %55, i32 0, i32 5
  %57 = getelementptr inbounds %struct.XUartPsBuffer, ptr %56, i32 0, i32 1
  store i32 0, ptr %57, align 8, !tbaa !26
  %58 = call i32 @XGetPlatform_Info()
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.XUartPs, ptr %59, i32 0, i32 8
  store i32 %58, ptr %60, align 8, !tbaa !27
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.XUartPs, ptr %61, i32 0, i32 9
  store i8 0, ptr %62, align 4, !tbaa !28
  %63 = load ptr, ptr %5, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.XUartPs, ptr %63, i32 0, i32 2
  store i32 286331153, ptr %64, align 4, !tbaa !29
  store i32 115200, ptr %10, align 4, !tbaa !9
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = load i32, ptr %10, align 4, !tbaa !9
  %67 = call i32 @XUartPs_SetBaudRate(ptr noundef %65, i32 noundef %66)
  store i32 %67, ptr %8, align 4, !tbaa !9
  %68 = load i32, ptr %8, align 4, !tbaa !9
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %73

70:                                               ; preds = %21
  %71 = load ptr, ptr %5, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.XUartPs, ptr %71, i32 0, i32 2
  store i32 0, ptr %72, align 4, !tbaa !29
  br label %110

73:                                               ; preds = %21
  %74 = load ptr, ptr %5, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.XUartPs, ptr %74, i32 0, i32 0
  %76 = getelementptr inbounds %struct.XUartPs_Config, ptr %75, i32 0, i32 1
  %77 = load i32, ptr %76, align 4, !tbaa !11
  %78 = add i32 %77, 4
  %79 = zext i32 %78 to i64
  %80 = call i32 @Xil_In32(i64 noundef %79)
  store i32 %80, ptr %9, align 4, !tbaa !9
  %81 = load i32, ptr %9, align 4, !tbaa !9
  %82 = and i32 %81, -191
  store i32 %82, ptr %9, align 4, !tbaa !9
  %83 = load i32, ptr %9, align 4, !tbaa !9
  %84 = or i32 %83, 32
  store i32 %84, ptr %9, align 4, !tbaa !9
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.XUartPs, ptr %85, i32 0, i32 0
  %87 = getelementptr inbounds %struct.XUartPs_Config, ptr %86, i32 0, i32 1
  %88 = load i32, ptr %87, align 4, !tbaa !11
  %89 = add i32 %88, 4
  %90 = zext i32 %89 to i64
  %91 = load i32, ptr %9, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %90, i32 noundef %91)
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.XUartPs, ptr %92, i32 0, i32 0
  %94 = getelementptr inbounds %struct.XUartPs_Config, ptr %93, i32 0, i32 1
  %95 = load i32, ptr %94, align 4, !tbaa !11
  %96 = add i32 %95, 32
  %97 = zext i32 %96 to i64
  call void @Xil_Out32(i64 noundef %97, i32 noundef 8)
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.XUartPs, ptr %98, i32 0, i32 0
  %100 = getelementptr inbounds %struct.XUartPs_Config, ptr %99, i32 0, i32 1
  %101 = load i32, ptr %100, align 4, !tbaa !11
  %102 = add i32 %101, 28
  %103 = zext i32 %102 to i64
  call void @Xil_Out32(i64 noundef %103, i32 noundef 1)
  %104 = load ptr, ptr %5, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.XUartPs, ptr %104, i32 0, i32 0
  %106 = getelementptr inbounds %struct.XUartPs_Config, ptr %105, i32 0, i32 1
  %107 = load i32, ptr %106, align 4, !tbaa !11
  %108 = add i32 %107, 12
  %109 = zext i32 %108 to i64
  call void @Xil_Out32(i64 noundef %109, i32 noundef 16383)
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %110

110:                                              ; preds = %73, %70
  %111 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %111, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %112

112:                                              ; preds = %110, %20, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %113 = load i32, ptr %4, align 4
  ret i32 %113
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
declare hidden void @XUartPs_StubHandler(ptr noundef, i32 noundef, i32 noundef) #0

declare i32 @XGetPlatform_Info() #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @XUartPs_SetBaudRate(ptr noundef, i32 noundef) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 4}
!12 = !{!"", !13, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !15, i64 32, !15, i64 48, !6, i64 64, !6, i64 72, !10, i64 80, !7, i64 84}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}
!16 = !{!13, !10, i64 8}
!17 = !{!12, !10, i64 8}
!18 = !{!13, !10, i64 12}
!19 = !{!12, !10, i64 12}
!20 = !{!12, !6, i64 64}
!21 = !{!12, !6, i64 32}
!22 = !{!12, !10, i64 44}
!23 = !{!12, !10, i64 40}
!24 = !{!12, !6, i64 48}
!25 = !{!12, !10, i64 60}
!26 = !{!12, !10, i64 56}
!27 = !{!12, !10, i64 80}
!28 = !{!12, !7, i64 84}
!29 = !{!12, !10, i64 20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_CfgInitialize(ptr noundef %0, ptr noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %3
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %.not35 = icmp eq ptr %1, null
  br i1 %.not35, label %18, label %6

5:                                                ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 136) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %39

6:                                                ; preds = %4
  %7 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %2, ptr %7, align 4, !tbaa !9
  %8 = getelementptr inbounds i8, ptr %1, i64 8
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = load <2 x i32>, ptr %8, align 4, !tbaa !5
  store <2 x i32> %10, ptr %9, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 64
  store ptr @XUartPs_StubHandler, ptr %11, align 8, !tbaa !15
  %12 = getelementptr inbounds i8, ptr %0, i64 32
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %12, i8 0, i64 32, i1 false)
  %13 = tail call i32 @XGetPlatform_Info() #4
  %14 = getelementptr inbounds i8, ptr %0, i64 80
  store i32 %13, ptr %14, align 8, !tbaa !16
  %15 = getelementptr inbounds i8, ptr %0, i64 84
  store i8 0, ptr %15, align 4, !tbaa !17
  %16 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 286331153, ptr %16, align 4, !tbaa !18
  %17 = tail call i32 @XUartPs_SetBaudRate(ptr noundef nonnull %0, i32 noundef 115200)
  %.not36 = icmp eq i32 %17, 0
  br i1 %.not36, label %20, label %19

18:                                               ; preds = %4
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 137) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %39

19:                                               ; preds = %6
  store i32 0, ptr %16, align 4, !tbaa !18
  br label %39

20:                                               ; preds = %6
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = add i32 %21, 4
  %23 = zext i32 %22 to i64
  %24 = tail call i32 @Xil_In32(i64 noundef %23)
  %25 = and i32 %24, -191
  %26 = or disjoint i32 %25, 32
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = add i32 %27, 4
  %29 = zext i32 %28 to i64
  tail call void @Xil_Out32(i64 noundef %29, i32 noundef %26)
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = add i32 %30, 32
  %32 = zext i32 %31 to i64
  tail call void @Xil_Out32(i64 noundef %32, i32 noundef 8)
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = add i32 %33, 28
  %35 = zext i32 %34 to i64
  tail call void @Xil_Out32(i64 noundef %35, i32 noundef 1)
  %36 = load i32, ptr %7, align 4, !tbaa !9
  %37 = add i32 %36, 12
  %38 = zext i32 %37 to i64
  tail call void @Xil_Out32(i64 noundef %38, i32 noundef 16383)
  br label %39

39:                                               ; preds = %19, %20, %18, %5
  %.0 = phi i32 [ 0, %18 ], [ 0, %5 ], [ %17, %19 ], [ 0, %20 ]
  ret i32 %.0
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @XUartPs_StubHandler(ptr noundef, i32 noundef, i32 noundef) #0

declare i32 @XGetPlatform_Info() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @XUartPs_SetBaudRate(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"", !11, i64 0, !6, i64 16, !6, i64 20, !6, i64 24, !13, i64 32, !13, i64 48, !14, i64 64, !14, i64 72, !6, i64 80, !7, i64 84}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !14, i64 0, !6, i64 8, !6, i64 12}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!10, !14, i64 64}
!16 = !{!10, !6, i64 80}
!17 = !{!10, !7, i64 84}
!18 = !{!10, !6, i64 20}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass