; LLVM IR from erwincoumans/tiny-differentiable-simulator :: third_party/zeromq/src/v2_encoder.ll (ZN3zmq12v2_encoder_t13message_readyEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.zmq::v2_encoder_t" = type <{ %"class.zmq::encoder_base_t", [9 x i8], [7 x i8] }>
%"class.zmq::encoder_base_t" = type { %"struct.zmq::i_encoder", ptr, i64, { i64, i64 }, i8, i64, ptr, ptr }
%"struct.zmq::i_encoder" = type { ptr }

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE9next_stepEPvmMS1_FvvEb(ptr noundef nonnull align 8 dereferenceable(72), ptr noundef, i64 noundef, i64, i64, i1 noundef zeroext) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3zmq12v2_encoder_t13message_readyEv(ptr noundef nonnull align 8 dereferenceable(81) %0) #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca { i64, i64 }, align 8
  %6 = alloca { i64, i64 }, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #6
  %8 = getelementptr inbounds %"class.zmq::v2_encoder_t", ptr %7, i32 0, i32 1
  %9 = getelementptr inbounds [9 x i8], ptr %8, i64 0, i64 0
  store ptr %9, ptr %3, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  store i8 0, ptr %10, align 1, !tbaa !9
  %11 = call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %7)
  %12 = call noundef zeroext i8 @_ZNK3zmq5msg_t5flagsEv(ptr noundef nonnull align 8 dereferenceable(64) %11)
  %13 = zext i8 %12 to i32
  %14 = and i32 %13, 1
  %15 = icmp ne i32 %14, 0
  br i1 %15, label %16, label %22

16:                                               ; preds = %1
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = load i8, ptr %17, align 1, !tbaa !9
  %19 = zext i8 %18 to i32
  %20 = or i32 %19, 1
  %21 = trunc i32 %20 to i8
  store i8 %21, ptr %17, align 1, !tbaa !9
  br label %22

22:                                               ; preds = %16, %1
  %23 = call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %7)
  %24 = call noundef i64 @_ZNK3zmq5msg_t4sizeEv(ptr noundef nonnull align 8 dereferenceable(64) %23)
  %25 = icmp ugt i64 %24, 255
  br i1 %25, label %26, label %32

26:                                               ; preds = %22
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = load i8, ptr %27, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = or i32 %29, 2
  %31 = trunc i32 %30 to i8
  store i8 %31, ptr %27, align 1, !tbaa !9
  br label %32

32:                                               ; preds = %26, %22
  %33 = call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %7)
  %34 = call noundef zeroext i8 @_ZNK3zmq5msg_t5flagsEv(ptr noundef nonnull align 8 dereferenceable(64) %33)
  %35 = zext i8 %34 to i32
  %36 = and i32 %35, 2
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %44

38:                                               ; preds = %32
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load i8, ptr %39, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  %42 = or i32 %41, 4
  %43 = trunc i32 %42 to i8
  store i8 %43, ptr %39, align 1, !tbaa !9
  br label %44

44:                                               ; preds = %38, %32
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #6
  %45 = call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %7)
  %46 = call noundef i64 @_ZNK3zmq5msg_t4sizeEv(ptr noundef nonnull align 8 dereferenceable(64) %45)
  store i64 %46, ptr %4, align 8, !tbaa !10
  %47 = load i64, ptr %4, align 8, !tbaa !10
  %48 = icmp ugt i64 %47, 255
  %49 = zext i1 %48 to i64
  %50 = call i64 @llvm.expect.i64(i64 %49, i64 0)
  %51 = icmp ne i64 %50, 0
  br i1 %51, label %52, label %63

52:                                               ; preds = %44
  %53 = getelementptr inbounds %"class.zmq::v2_encoder_t", ptr %7, i32 0, i32 1
  %54 = getelementptr inbounds [9 x i8], ptr %53, i64 0, i64 0
  %55 = getelementptr inbounds i8, ptr %54, i64 1
  %56 = load i64, ptr %4, align 8, !tbaa !10
  call void @_ZN3zmq10put_uint64EPhm(ptr noundef %55, i64 noundef %56)
  %57 = getelementptr inbounds %"class.zmq::v2_encoder_t", ptr %7, i32 0, i32 1
  %58 = getelementptr inbounds [9 x i8], ptr %57, i64 0, i64 0
  store { i64, i64 } { i64 ptrtoint (ptr @_ZN3zmq12v2_encoder_t10size_readyEv to i64), i64 0 }, ptr %5, align 8, !tbaa !9
  %59 = getelementptr inbounds { i64, i64 }, ptr %5, i32 0, i32 0
  %60 = load i64, ptr %59, align 8
  %61 = getelementptr inbounds { i64, i64 }, ptr %5, i32 0, i32 1
  %62 = load i64, ptr %61, align 8
  call void @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE9next_stepEPvmMS1_FvvEb(ptr noundef nonnull align 8 dereferenceable(72) %7, ptr noundef %58, i64 noundef 9, i64 %60, i64 %62, i1 noundef zeroext false)
  br label %74

63:                                               ; preds = %44
  %64 = load i64, ptr %4, align 8, !tbaa !10
  %65 = trunc i64 %64 to i8
  %66 = getelementptr inbounds %"class.zmq::v2_encoder_t", ptr %7, i32 0, i32 1
  %67 = getelementptr inbounds [9 x i8], ptr %66, i64 0, i64 1
  store i8 %65, ptr %67, align 1, !tbaa !9
  %68 = getelementptr inbounds %"class.zmq::v2_encoder_t", ptr %7, i32 0, i32 1
  %69 = getelementptr inbounds [9 x i8], ptr %68, i64 0, i64 0
  store { i64, i64 } { i64 ptrtoint (ptr @_ZN3zmq12v2_encoder_t10size_readyEv to i64), i64 0 }, ptr %6, align 8, !tbaa !9
  %70 = getelementptr inbounds { i64, i64 }, ptr %6, i32 0, i32 0
  %71 = load i64, ptr %70, align 8
  %72 = getelementptr inbounds { i64, i64 }, ptr %6, i32 0, i32 1
  %73 = load i64, ptr %72, align 8
  call void @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE9next_stepEPvmMS1_FvvEb(ptr noundef nonnull align 8 dereferenceable(72) %7, ptr noundef %69, i64 noundef 2, i64 %71, i64 %73, i1 noundef zeroext false)
  br label %74

74:                                               ; preds = %63, %52
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #6
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72)) #3 align 2

declare noundef zeroext i8 @_ZNK3zmq5msg_t5flagsEv(ptr noundef nonnull align 8 dereferenceable(64)) #4

declare noundef i64 @_ZNK3zmq5msg_t4sizeEv(ptr noundef nonnull align 8 dereferenceable(64)) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3zmq10put_uint64EPhm(ptr noundef, i64 noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3zmq12v2_encoder_t10size_readyEv(ptr noundef nonnull align 8 dereferenceable(81)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE9next_stepEPvmMS1_FvvEb(ptr noundef nonnull align 8 dereferenceable(72), ptr noundef, i64 noundef, i64, i64, i1 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3zmq12v2_encoder_t13message_readyEv(ptr noundef nonnull align 8 dereferenceable(81) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 72
  store i8 0, ptr %2, align 8, !tbaa !5
  %3 = tail call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %0)
  %4 = tail call noundef zeroext i8 @_ZNK3zmq5msg_t5flagsEv(ptr noundef nonnull align 8 dereferenceable(64) %3)
  %5 = and i8 %4, 1
  %.not = icmp eq i8 %5, 0
  br i1 %.not, label %9, label %6

6:                                                ; preds = %1
  %7 = load i8, ptr %2, align 8, !tbaa !5
  %8 = or i8 %7, 1
  store i8 %8, ptr %2, align 8, !tbaa !5
  br label %9

9:                                                ; preds = %6, %1
  %10 = tail call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %0)
  %11 = tail call noundef i64 @_ZNK3zmq5msg_t4sizeEv(ptr noundef nonnull align 8 dereferenceable(64) %10)
  %12 = icmp ugt i64 %11, 255
  br i1 %12, label %13, label %16

13:                                               ; preds = %9
  %14 = load i8, ptr %2, align 8, !tbaa !5
  %15 = or i8 %14, 2
  store i8 %15, ptr %2, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %13, %9
  %17 = tail call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %0)
  %18 = tail call noundef zeroext i8 @_ZNK3zmq5msg_t5flagsEv(ptr noundef nonnull align 8 dereferenceable(64) %17)
  %19 = and i8 %18, 2
  %.not9 = icmp eq i8 %19, 0
  br i1 %.not9, label %23, label %20

20:                                               ; preds = %16
  %21 = load i8, ptr %2, align 8, !tbaa !5
  %22 = or i8 %21, 4
  store i8 %22, ptr %2, align 8, !tbaa !5
  br label %23

23:                                               ; preds = %20, %16
  %24 = tail call noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72) %0)
  %25 = tail call noundef i64 @_ZNK3zmq5msg_t4sizeEv(ptr noundef nonnull align 8 dereferenceable(64) %24)
  %26 = icmp ugt i64 %25, 255
  br i1 %26, label %27, label %29, !prof !8

27:                                               ; preds = %23
  %28 = getelementptr inbounds i8, ptr %0, i64 73
  tail call void @_ZN3zmq10put_uint64EPhm(ptr noundef nonnull %28, i64 noundef %25)
  br label %32

29:                                               ; preds = %23
  %30 = trunc nuw i64 %25 to i8
  %31 = getelementptr inbounds i8, ptr %0, i64 73
  store i8 %30, ptr %31, align 1, !tbaa !5
  br label %32

32:                                               ; preds = %29, %27
  %.sink = phi i64 [ 2, %29 ], [ 9, %27 ]
  tail call void @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE9next_stepEPvmMS1_FvvEb(ptr noundef nonnull align 8 dereferenceable(72) %0, ptr noundef nonnull %2, i64 noundef %.sink, i64 ptrtoint (ptr @_ZN3zmq12v2_encoder_t10size_readyEv to i64), i64 0, i1 noundef zeroext false)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN3zmq14encoder_base_tINS_12v2_encoder_tEE11in_progressEv(ptr noundef nonnull align 8 dereferenceable(72)) local_unnamed_addr #2 align 2

declare noundef zeroext i8 @_ZNK3zmq5msg_t5flagsEv(ptr noundef nonnull align 8 dereferenceable(64)) local_unnamed_addr #3

declare noundef i64 @_ZNK3zmq5msg_t4sizeEv(ptr noundef nonnull align 8 dereferenceable(64)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN3zmq10put_uint64EPhm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3zmq12v2_encoder_t10size_readyEv(ptr noundef nonnull align 8 dereferenceable(81)) #1 align 2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!"branch_weights", !"expected", i32 1, i32 2000}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass