; LLVM IR from Mohammed-Shoaib/Coding-Problems :: Codeforces/Solutions/1082A.ll (Z12vasyaAndBookiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z12vasyaAndBookiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  %13 = load i32, ptr %8, align 4, !tbaa !5
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = sub nsw i32 %13, %14
  %16 = call i32 @llvm.abs.i32(i32 %15, i1 true)
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = srem i32 %16, %17
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %27

20:                                               ; preds = %4
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = sub nsw i32 %21, %22
  %24 = call i32 @llvm.abs.i32(i32 %23, i1 true)
  %25 = load i32, ptr %9, align 4, !tbaa !5
  %26 = sdiv i32 %24, %25
  store i32 %26, ptr %5, align 4
  br label %76

27:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 2147483647, ptr %11, align 4, !tbaa !5
  store i32 2147483647, ptr %10, align 4, !tbaa !5
  %28 = load i32, ptr %8, align 4, !tbaa !5
  %29 = sub nsw i32 %28, 1
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = srem i32 %29, %30
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %45

33:                                               ; preds = %27
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = load i32, ptr %9, align 4, !tbaa !5
  %36 = sdiv i32 %34, %35
  store i32 %36, ptr %10, align 4, !tbaa !5
  %37 = load i32, ptr %7, align 4, !tbaa !5
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = add nsw i32 %37, %38
  %40 = sub nsw i32 %39, 1
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = sdiv i32 %40, %41
  %43 = load i32, ptr %10, align 4, !tbaa !5
  %44 = add nsw i32 %43, %42
  store i32 %44, ptr %10, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %33, %27
  %46 = load i32, ptr %6, align 4, !tbaa !5
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = sub nsw i32 %46, %47
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = srem i32 %48, %49
  %51 = icmp eq i32 %50, 0
  br i1 %51, label %52, label %68

52:                                               ; preds = %45
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = load i32, ptr %8, align 4, !tbaa !5
  %55 = sub nsw i32 %53, %54
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = sdiv i32 %55, %56
  store i32 %57, ptr %11, align 4, !tbaa !5
  %58 = load i32, ptr %6, align 4, !tbaa !5
  %59 = load i32, ptr %7, align 4, !tbaa !5
  %60 = sub nsw i32 %58, %59
  %61 = load i32, ptr %9, align 4, !tbaa !5
  %62 = add nsw i32 %60, %61
  %63 = sub nsw i32 %62, 1
  %64 = load i32, ptr %9, align 4, !tbaa !5
  %65 = sdiv i32 %63, %64
  %66 = load i32, ptr %11, align 4, !tbaa !5
  %67 = add nsw i32 %66, %65
  store i32 %67, ptr %11, align 4, !tbaa !5
  br label %68

68:                                               ; preds = %52, %45
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %11)
  %70 = load i32, ptr %69, align 4, !tbaa !5
  store i32 %70, ptr %12, align 4, !tbaa !5
  %71 = load i32, ptr %12, align 4, !tbaa !5
  %72 = icmp eq i32 %71, 2147483647
  br i1 %72, label %73, label %74

73:                                               ; preds = %68
  store i32 -1, ptr %12, align 4, !tbaa !5
  br label %74

74:                                               ; preds = %73, %68
  %75 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %75, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %76

76:                                               ; preds = %74, %20
  %77 = load i32, ptr %5, align 4
  ret i32 %77
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z12vasyaAndBookiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = sub nsw i32 %2, %1
  %8 = tail call i32 @llvm.abs.i32(i32 %7, i1 true)
  %9 = srem i32 %8, %3
  %10 = sdiv i32 %8, %3
  %11 = icmp eq i32 %9, 0
  br i1 %11, label %37, label %12

12:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
  store i32 2147483647, ptr %6, align 4, !tbaa !5
  %13 = add nsw i32 %2, -1
  %14 = srem i32 %13, %3
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %22

16:                                               ; preds = %12
  %17 = sdiv i32 %2, %3
  %18 = add i32 %3, -1
  %19 = add i32 %18, %1
  %20 = sdiv i32 %19, %3
  %21 = add nsw i32 %20, %17
  br label %22

22:                                               ; preds = %16, %12
  %storemerge = phi i32 [ %21, %16 ], [ 2147483647, %12 ]
  store i32 %storemerge, ptr %5, align 4, !tbaa !5
  %23 = sub nsw i32 %0, %2
  %24 = srem i32 %23, %3
  %25 = sdiv i32 %23, %3
  %26 = icmp eq i32 %24, 0
  br i1 %26, label %27, label %33

27:                                               ; preds = %22
  %28 = xor i32 %1, -1
  %29 = add i32 %28, %0
  %30 = add i32 %29, %3
  %31 = sdiv i32 %30, %3
  %32 = add nsw i32 %31, %25
  store i32 %32, ptr %6, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %27, %22
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp eq i32 %35, 2147483647
  %spec.store.select = select i1 %36, i32 -1, i32 %35
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  br label %37

37:                                               ; preds = %4, %33
  %.0 = phi i32 [ %spec.store.select, %33 ], [ %10, %4 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass