; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (GetOptions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Mapping = type { i16, i16, i32 }
%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1
@OptionsTable = external hidden global [8 x %struct.Mapping], align 16

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @XUartPs_GetOptions(ptr noundef %0) #0 {
  %2 = alloca i16, align 2
  %3 = alloca ptr, align 8
  %4 = alloca i16, align 2
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #4
  store i16 0, ptr %4, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !11
  br label %12

11:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 122)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !11
  store i16 0, ptr %2, align 2
  store i32 1, ptr %7, align 4
  br label %63

12:                                               ; preds = %10
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.XUartPs, ptr %13, i32 0, i32 2
  %15 = load i32, ptr %14, align 4, !tbaa !13
  %16 = icmp eq i32 %15, 286331153
  br i1 %16, label %17, label %18

17:                                               ; preds = %12
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !11
  br label %19

18:                                               ; preds = %12
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 123)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !11
  store i16 0, ptr %2, align 2
  store i32 1, ptr %7, align 4
  br label %63

19:                                               ; preds = %17
  store i32 0, ptr %6, align 4, !tbaa !11
  br label %20

20:                                               ; preds = %58, %19
  %21 = load i32, ptr %6, align 4, !tbaa !11
  %22 = zext i32 %21 to i64
  %23 = icmp ult i64 %22, 8
  br i1 %23, label %24, label %61

24:                                               ; preds = %20
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.XUartPs, ptr %25, i32 0, i32 0
  %27 = getelementptr inbounds %struct.XUartPs_Config, ptr %26, i32 0, i32 1
  %28 = load i32, ptr %27, align 4, !tbaa !17
  %29 = load i32, ptr %6, align 4, !tbaa !11
  %30 = zext i32 %29 to i64
  %31 = getelementptr inbounds [8 x %struct.Mapping], ptr @OptionsTable, i64 0, i64 %30
  %32 = getelementptr inbounds %struct.Mapping, ptr %31, i32 0, i32 1
  %33 = load i16, ptr %32, align 2, !tbaa !18
  %34 = zext i16 %33 to i32
  %35 = add i32 %28, %34
  %36 = zext i32 %35 to i64
  %37 = call i32 @Xil_In32(i64 noundef %36)
  store i32 %37, ptr %5, align 4, !tbaa !11
  %38 = load i32, ptr %5, align 4, !tbaa !11
  %39 = load i32, ptr %6, align 4, !tbaa !11
  %40 = zext i32 %39 to i64
  %41 = getelementptr inbounds [8 x %struct.Mapping], ptr @OptionsTable, i64 0, i64 %40
  %42 = getelementptr inbounds %struct.Mapping, ptr %41, i32 0, i32 2
  %43 = load i32, ptr %42, align 4, !tbaa !20
  %44 = and i32 %38, %43
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %57

46:                                               ; preds = %24
  %47 = load i32, ptr %6, align 4, !tbaa !11
  %48 = zext i32 %47 to i64
  %49 = getelementptr inbounds [8 x %struct.Mapping], ptr @OptionsTable, i64 0, i64 %48
  %50 = getelementptr inbounds %struct.Mapping, ptr %49, i32 0, i32 0
  %51 = load i16, ptr %50, align 8, !tbaa !21
  %52 = zext i16 %51 to i32
  %53 = load i16, ptr %4, align 2, !tbaa !9
  %54 = zext i16 %53 to i32
  %55 = or i32 %54, %52
  %56 = trunc i32 %55 to i16
  store i16 %56, ptr %4, align 2, !tbaa !9
  br label %57

57:                                               ; preds = %46, %24
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %6, align 4, !tbaa !11
  %60 = add i32 %59, 1
  store i32 %60, ptr %6, align 4, !tbaa !11
  br label %20, !llvm.loop !22

61:                                               ; preds = %20
  %62 = load i16, ptr %4, align 2, !tbaa !9
  store i16 %62, ptr %2, align 2
  store i32 1, ptr %7, align 4
  br label %63

63:                                               ; preds = %61, %18, %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #4
  %64 = load i16, ptr %2, align 2
  ret i16 %64
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 20}
!14 = !{!"", !15, i64 0, !12, i64 16, !12, i64 20, !12, i64 24, !16, i64 32, !16, i64 48, !6, i64 64, !6, i64 72, !12, i64 80, !7, i64 84}
!15 = !{!"", !10, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!16 = !{!"", !6, i64 0, !12, i64 8, !12, i64 12}
!17 = !{!14, !12, i64 4}
!18 = !{!19, !10, i64 2}
!19 = !{!"", !10, i64 0, !10, i64 2, !12, i64 4}
!20 = !{!19, !12, i64 4}
!21 = !{!19, !10, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Mapping = type { i16, i16, i32 }

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1
@OptionsTable = external hidden local_unnamed_addr global [8 x %struct.Mapping], align 16

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @XUartPs_GetOptions(ptr noundef readonly %0) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %6, label %2

2:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 20
  %4 = load i32, ptr %3, align 4, !tbaa !9
  %5 = icmp eq i32 %4, 286331153
  br i1 %5, label %7, label %86

6:                                                ; preds = %1
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 122) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %.loopexit

7:                                                ; preds = %2
  %8 = getelementptr inbounds i8, ptr %0, i64 4
  %9 = load i32, ptr %8, align 4, !tbaa !15
  %10 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 2), align 2, !tbaa !16
  %11 = zext i16 %10 to i32
  %12 = add i32 %9, %11
  %13 = zext i32 %12 to i64
  %14 = tail call i32 @Xil_In32(i64 noundef %13)
  %15 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 4), align 4, !tbaa !18
  %16 = and i32 %15, %14
  %.not15 = icmp eq i32 %16, 0
  %17 = load i16, ptr @OptionsTable, align 16
  %spec.select = select i1 %.not15, i16 0, i16 %17
  %18 = load i32, ptr %8, align 4, !tbaa !15
  %19 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 10), align 2, !tbaa !16
  %20 = zext i16 %19 to i32
  %21 = add i32 %18, %20
  %22 = zext i32 %21 to i64
  %23 = tail call i32 @Xil_In32(i64 noundef %22)
  %24 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 12), align 4, !tbaa !18
  %25 = and i32 %24, %23
  %.not15.1 = icmp eq i32 %25, 0
  %26 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 8), align 8
  %27 = select i1 %.not15.1, i16 0, i16 %26
  %.1.1 = or i16 %spec.select, %27
  %28 = load i32, ptr %8, align 4, !tbaa !15
  %29 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 18), align 2, !tbaa !16
  %30 = zext i16 %29 to i32
  %31 = add i32 %28, %30
  %32 = zext i32 %31 to i64
  %33 = tail call i32 @Xil_In32(i64 noundef %32)
  %34 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 20), align 4, !tbaa !18
  %35 = and i32 %34, %33
  %.not15.2 = icmp eq i32 %35, 0
  %36 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 16), align 16
  %37 = select i1 %.not15.2, i16 0, i16 %36
  %.1.2 = or i16 %.1.1, %37
  %38 = load i32, ptr %8, align 4, !tbaa !15
  %39 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 26), align 2, !tbaa !16
  %40 = zext i16 %39 to i32
  %41 = add i32 %38, %40
  %42 = zext i32 %41 to i64
  %43 = tail call i32 @Xil_In32(i64 noundef %42)
  %44 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 28), align 4, !tbaa !18
  %45 = and i32 %44, %43
  %.not15.3 = icmp eq i32 %45, 0
  %46 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 24), align 8
  %47 = select i1 %.not15.3, i16 0, i16 %46
  %.1.3 = or i16 %.1.2, %47
  %48 = load i32, ptr %8, align 4, !tbaa !15
  %49 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 34), align 2, !tbaa !16
  %50 = zext i16 %49 to i32
  %51 = add i32 %48, %50
  %52 = zext i32 %51 to i64
  %53 = tail call i32 @Xil_In32(i64 noundef %52)
  %54 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 36), align 4, !tbaa !18
  %55 = and i32 %54, %53
  %.not15.4 = icmp eq i32 %55, 0
  %56 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 32), align 16
  %57 = select i1 %.not15.4, i16 0, i16 %56
  %.1.4 = or i16 %.1.3, %57
  %58 = load i32, ptr %8, align 4, !tbaa !15
  %59 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 42), align 2, !tbaa !16
  %60 = zext i16 %59 to i32
  %61 = add i32 %58, %60
  %62 = zext i32 %61 to i64
  %63 = tail call i32 @Xil_In32(i64 noundef %62)
  %64 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 44), align 4, !tbaa !18
  %65 = and i32 %64, %63
  %.not15.5 = icmp eq i32 %65, 0
  %66 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 40), align 8
  %67 = select i1 %.not15.5, i16 0, i16 %66
  %.1.5 = or i16 %.1.4, %67
  %68 = load i32, ptr %8, align 4, !tbaa !15
  %69 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 50), align 2, !tbaa !16
  %70 = zext i16 %69 to i32
  %71 = add i32 %68, %70
  %72 = zext i32 %71 to i64
  %73 = tail call i32 @Xil_In32(i64 noundef %72)
  %74 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 52), align 4, !tbaa !18
  %75 = and i32 %74, %73
  %.not15.6 = icmp eq i32 %75, 0
  %76 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 48), align 16
  %77 = select i1 %.not15.6, i16 0, i16 %76
  %.1.6 = or i16 %.1.5, %77
  %78 = load i32, ptr %8, align 4, !tbaa !15
  %79 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 58), align 2, !tbaa !16
  %80 = zext i16 %79 to i32
  %81 = add i32 %78, %80
  %82 = zext i32 %81 to i64
  %83 = tail call i32 @Xil_In32(i64 noundef %82)
  %84 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 60), align 4, !tbaa !18
  %85 = and i32 %84, %83
  %.not15.7 = icmp eq i32 %85, 0
  br i1 %.not15.7, label %.loopexit, label %87

86:                                               ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 123) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %.loopexit

87:                                               ; preds = %7
  %88 = load i16, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 56), align 8, !tbaa !19
  %89 = or i16 %88, %.1.6
  br label %.loopexit

.loopexit:                                        ; preds = %7, %87, %86, %6
  %.011 = phi i16 [ 0, %86 ], [ 0, %6 ], [ %89, %87 ], [ %.1.6, %7 ]
  ret i16 %.011
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 20}
!10 = !{!"", !11, i64 0, !6, i64 16, !6, i64 20, !6, i64 24, !13, i64 32, !13, i64 48, !14, i64 64, !14, i64 72, !6, i64 80, !7, i64 84}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !14, i64 0, !6, i64 8, !6, i64 12}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!10, !6, i64 4}
!16 = !{!17, !12, i64 2}
!17 = !{!"", !12, i64 0, !12, i64 2, !6, i64 4}
!18 = !{!17, !6, i64 4}
!19 = !{!17, !12, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass