; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (SelfTest)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [172 x i8], align 1
@TestString = external hidden global [32 x i8], align 16
@ReturnString = external hidden global [32 x i8], align 16

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_SelfTest(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %12, label %13

12:                                               ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %14

13:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 102)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %128

14:                                               ; preds = %12
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.XUartPs, ptr %15, i32 0, i32 2
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = icmp eq i32 %17, 286331153
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %21

20:                                               ; preds = %14
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 103)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %128

21:                                               ; preds = %19
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.XUartPs, ptr %22, i32 0, i32 0
  %24 = getelementptr inbounds %struct.XUartPs_Config, ptr %23, i32 0, i32 1
  %25 = load i32, ptr %24, align 4, !tbaa !16
  %26 = add i32 %25, 16
  %27 = zext i32 %26 to i64
  %28 = call i32 @Xil_In32(i64 noundef %27)
  store i32 %28, ptr %5, align 4, !tbaa !9
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.XUartPs, ptr %29, i32 0, i32 0
  %31 = getelementptr inbounds %struct.XUartPs_Config, ptr %30, i32 0, i32 1
  %32 = load i32, ptr %31, align 4, !tbaa !16
  %33 = add i32 %32, 12
  %34 = zext i32 %33 to i64
  call void @Xil_Out32(i64 noundef %34, i32 noundef 16383)
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.XUartPs, ptr %35, i32 0, i32 0
  %37 = getelementptr inbounds %struct.XUartPs_Config, ptr %36, i32 0, i32 1
  %38 = load i32, ptr %37, align 4, !tbaa !16
  %39 = add i32 %38, 4
  %40 = zext i32 %39 to i64
  %41 = call i32 @Xil_In32(i64 noundef %40)
  store i32 %41, ptr %6, align 4, !tbaa !9
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XUartPs, ptr %42, i32 0, i32 0
  %44 = getelementptr inbounds %struct.XUartPs_Config, ptr %43, i32 0, i32 1
  %45 = load i32, ptr %44, align 4, !tbaa !16
  %46 = add i32 %45, 4
  %47 = zext i32 %46 to i64
  %48 = load i32, ptr %6, align 4, !tbaa !9
  %49 = and i32 %48, -769
  %50 = or i32 %49, 512
  call void @Xil_Out32(i64 noundef %47, i32 noundef %50)
  store i8 0, ptr %7, align 1, !tbaa !17
  br label %51

51:                                               ; preds = %87, %21
  %52 = load i8, ptr %7, align 1, !tbaa !17
  %53 = zext i8 %52 to i32
  %54 = icmp slt i32 %53, 32
  br i1 %54, label %55, label %90

55:                                               ; preds = %51
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = load i8, ptr %7, align 1, !tbaa !17
  %58 = zext i8 %57 to i64
  %59 = getelementptr inbounds [32 x i8], ptr @TestString, i64 0, i64 %58
  %60 = call i32 @XUartPs_Send(ptr noundef %56, ptr noundef %59, i32 noundef 1)
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.XUartPs, ptr %61, i32 0, i32 0
  %63 = getelementptr inbounds %struct.XUartPs_Config, ptr %62, i32 0, i32 1
  %64 = load i32, ptr %63, align 4, !tbaa !16
  %65 = add i32 %64, 44
  %66 = zext i32 %65 to i64
  %67 = call i32 @Xil_In32(i64 noundef %66)
  %68 = and i32 %67, 2
  store i32 %68, ptr %8, align 4, !tbaa !9
  br label %69

69:                                               ; preds = %72, %55
  %70 = load i32, ptr %8, align 4, !tbaa !9
  %71 = icmp eq i32 %70, 2
  br i1 %71, label %72, label %81

72:                                               ; preds = %69
  %73 = load ptr, ptr %3, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.XUartPs, ptr %73, i32 0, i32 0
  %75 = getelementptr inbounds %struct.XUartPs_Config, ptr %74, i32 0, i32 1
  %76 = load i32, ptr %75, align 4, !tbaa !16
  %77 = add i32 %76, 44
  %78 = zext i32 %77 to i64
  %79 = call i32 @Xil_In32(i64 noundef %78)
  %80 = and i32 %79, 2
  store i32 %80, ptr %8, align 4, !tbaa !9
  br label %69, !llvm.loop !18

81:                                               ; preds = %69
  %82 = load ptr, ptr %3, align 8, !tbaa !5
  %83 = load i8, ptr %7, align 1, !tbaa !17
  %84 = zext i8 %83 to i64
  %85 = getelementptr inbounds [32 x i8], ptr @ReturnString, i64 0, i64 %84
  %86 = call i32 @XUartPs_Recv(ptr noundef %82, ptr noundef %85, i32 noundef 1)
  br label %87

87:                                               ; preds = %81
  %88 = load i8, ptr %7, align 1, !tbaa !17
  %89 = add i8 %88, 1
  store i8 %89, ptr %7, align 1, !tbaa !17
  br label %51, !llvm.loop !20

90:                                               ; preds = %51
  store i8 0, ptr %7, align 1, !tbaa !17
  br label %91

91:                                               ; preds = %109, %90
  %92 = load i8, ptr %7, align 1, !tbaa !17
  %93 = zext i8 %92 to i32
  %94 = icmp slt i32 %93, 32
  br i1 %94, label %95, label %112

95:                                               ; preds = %91
  %96 = load i8, ptr %7, align 1, !tbaa !17
  %97 = zext i8 %96 to i64
  %98 = getelementptr inbounds [32 x i8], ptr @TestString, i64 0, i64 %97
  %99 = load i8, ptr %98, align 1, !tbaa !17
  %100 = zext i8 %99 to i32
  %101 = load i8, ptr %7, align 1, !tbaa !17
  %102 = zext i8 %101 to i64
  %103 = getelementptr inbounds [32 x i8], ptr @ReturnString, i64 0, i64 %102
  %104 = load i8, ptr %103, align 1, !tbaa !17
  %105 = zext i8 %104 to i32
  %106 = icmp ne i32 %100, %105
  br i1 %106, label %107, label %108

107:                                              ; preds = %95
  store i32 1054, ptr %4, align 4, !tbaa !9
  br label %108

108:                                              ; preds = %107, %95
  br label %109

109:                                              ; preds = %108
  %110 = load i8, ptr %7, align 1, !tbaa !17
  %111 = add i8 %110, 1
  store i8 %111, ptr %7, align 1, !tbaa !17
  br label %91, !llvm.loop !21

112:                                              ; preds = %91
  %113 = load ptr, ptr %3, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.XUartPs, ptr %113, i32 0, i32 0
  %115 = getelementptr inbounds %struct.XUartPs_Config, ptr %114, i32 0, i32 1
  %116 = load i32, ptr %115, align 4, !tbaa !16
  %117 = add i32 %116, 8
  %118 = zext i32 %117 to i64
  %119 = load i32, ptr %5, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %118, i32 noundef %119)
  %120 = load ptr, ptr %3, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.XUartPs, ptr %120, i32 0, i32 0
  %122 = getelementptr inbounds %struct.XUartPs_Config, ptr %121, i32 0, i32 1
  %123 = load i32, ptr %122, align 4, !tbaa !16
  %124 = add i32 %123, 4
  %125 = zext i32 %124 to i64
  %126 = load i32, ptr %6, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %125, i32 noundef %126)
  %127 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %127, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %128

128:                                              ; preds = %112, %20, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %129 = load i32, ptr %2, align 4
  ret i32 %129
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #3

declare i32 @XUartPs_Send(ptr noundef, ptr noundef, i32 noundef) #2

declare i32 @XUartPs_Recv(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 20}
!12 = !{!"", !13, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !15, i64 32, !15, i64 48, !6, i64 64, !6, i64 72, !10, i64 80, !7, i64 84}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}
!16 = !{!12, !10, i64 4}
!17 = !{!7, !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
!21 = distinct !{!21, !19}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [172 x i8], align 1
@TestString = external hidden global [32 x i8], align 16
@ReturnString = external hidden global [32 x i8], align 16

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 1055) i32 @XUartPs_SelfTest(ptr noundef %0) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %6, label %2

2:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 20
  %4 = load i32, ptr %3, align 4, !tbaa !9
  %5 = icmp eq i32 %4, 286331153
  br i1 %5, label %7, label %25

6:                                                ; preds = %1
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 102) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %51

7:                                                ; preds = %2
  %8 = getelementptr inbounds i8, ptr %0, i64 4
  %9 = load i32, ptr %8, align 4, !tbaa !15
  %10 = add i32 %9, 16
  %11 = zext i32 %10 to i64
  %12 = tail call i32 @Xil_In32(i64 noundef %11)
  %13 = load i32, ptr %8, align 4, !tbaa !15
  %14 = add i32 %13, 12
  %15 = zext i32 %14 to i64
  tail call void @Xil_Out32(i64 noundef %15, i32 noundef 16383)
  %16 = load i32, ptr %8, align 4, !tbaa !15
  %17 = add i32 %16, 4
  %18 = zext i32 %17 to i64
  %19 = tail call i32 @Xil_In32(i64 noundef %18)
  %20 = load i32, ptr %8, align 4, !tbaa !15
  %21 = add i32 %20, 4
  %22 = zext i32 %21 to i64
  %23 = and i32 %19, -769
  %24 = or disjoint i32 %23, 512
  tail call void @Xil_Out32(i64 noundef %22, i32 noundef %24)
  br label %26

25:                                               ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 103) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %51

26:                                               ; preds = %7, %._crit_edge
  %indvars.iv = phi i64 [ 0, %7 ], [ %indvars.iv.next, %._crit_edge ]
  %27 = getelementptr inbounds [32 x i8], ptr @TestString, i64 0, i64 %indvars.iv
  %28 = tail call i32 @XUartPs_Send(ptr noundef nonnull %0, ptr noundef nonnull %27, i32 noundef 1) #3
  %29 = load i32, ptr %8, align 4, !tbaa !15
  %30 = add i32 %29, 44
  %31 = zext i32 %30 to i64
  %32 = tail call i32 @Xil_In32(i64 noundef %31)
  %.032 = and i32 %32, 2
  %.not3133 = icmp eq i32 %.032, 0
  br i1 %.not3133, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %26, %.lr.ph
  %33 = load i32, ptr %8, align 4, !tbaa !15
  %34 = add i32 %33, 44
  %35 = zext i32 %34 to i64
  %36 = tail call i32 @Xil_In32(i64 noundef %35)
  %.0 = and i32 %36, 2
  %.not31 = icmp eq i32 %.0, 0
  br i1 %.not31, label %._crit_edge, label %.lr.ph, !llvm.loop !16

._crit_edge:                                      ; preds = %.lr.ph, %26
  %37 = getelementptr inbounds [32 x i8], ptr @ReturnString, i64 0, i64 %indvars.iv
  %38 = tail call i32 @XUartPs_Recv(ptr noundef nonnull %0, ptr noundef nonnull %37, i32 noundef 1) #3
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 32
  br i1 %exitcond.not, label %.preheader.preheader, label %26, !llvm.loop !18

.preheader.preheader:                             ; preds = %._crit_edge
  %39 = load <32 x i8>, ptr @TestString, align 16, !tbaa !19
  %40 = load <32 x i8>, ptr @ReturnString, align 16, !tbaa !19
  %41 = icmp eq <32 x i8> %39, %40
  %42 = freeze <32 x i1> %41
  %43 = bitcast <32 x i1> %42 to i32
  %44 = icmp eq i32 %43, -1
  %spec.select.31 = select i1 %44, i32 0, i32 1054
  %45 = load i32, ptr %8, align 4, !tbaa !15
  %46 = add i32 %45, 8
  %47 = zext i32 %46 to i64
  tail call void @Xil_Out32(i64 noundef %47, i32 noundef %12)
  %48 = load i32, ptr %8, align 4, !tbaa !15
  %49 = add i32 %48, 4
  %50 = zext i32 %49 to i64
  tail call void @Xil_Out32(i64 noundef %50, i32 noundef %19)
  br label %51

51:                                               ; preds = %.preheader.preheader, %25, %6
  %.026 = phi i32 [ %spec.select.31, %.preheader.preheader ], [ 0, %25 ], [ 0, %6 ]
  ret i32 %.026
}

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @XUartPs_Send(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @XUartPs_Recv(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 20}
!10 = !{!"", !11, i64 0, !6, i64 16, !6, i64 20, !6, i64 24, !13, i64 32, !13, i64 48, !14, i64 64, !14, i64 72, !6, i64 80, !7, i64 84}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !14, i64 0, !6, i64 8, !6, i64 12}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!10, !6, i64 4}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = !{!7, !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalDCEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass