; LLVM IR from seikhchilli/codeforces-solution :: 1786A1 (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i8, align 1
  store i32 0, ptr %1, align 4
  %8 = call noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext false)
  %9 = load ptr, ptr @_ZSt3cin, align 8, !tbaa !5
  %10 = getelementptr i8, ptr %9, i64 -24
  %11 = load i64, ptr %10, align 8
  %12 = getelementptr inbounds i8, ptr @_ZSt3cin, i64 %11
  %13 = call noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264) %12, ptr noundef null)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #6
  %14 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  br label %15

15:                                               ; preds = %118, %0
  %16 = load i32, ptr %2, align 4, !tbaa !8
  %17 = add nsw i32 %16, -1
  store i32 %17, ptr %2, align 4, !tbaa !8
  %18 = icmp ne i32 %16, 0
  br i1 %18, label %19, label %125

19:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  %20 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  store i32 1, ptr %4, align 4, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  store i64 0, ptr %5, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  store i64 0, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #6
  store i8 1, ptr %7, align 1, !tbaa !13
  br label %21

21:                                               ; preds = %117, %19
  %22 = load i32, ptr %3, align 4, !tbaa !8
  %23 = icmp sgt i32 %22, 0
  br i1 %23, label %24, label %118

24:                                               ; preds = %21
  %25 = load i8, ptr %7, align 1, !tbaa !13, !range !15, !noundef !16
  %26 = trunc i8 %25 to i1
  br i1 %26, label %27, label %72

27:                                               ; preds = %24
  %28 = load i32, ptr %3, align 4, !tbaa !8
  %29 = load i32, ptr %4, align 4, !tbaa !8
  %30 = sub nsw i32 %28, %29
  %31 = icmp sgt i32 %30, 0
  br i1 %31, label %32, label %42

32:                                               ; preds = %27
  %33 = load i32, ptr %4, align 4, !tbaa !8
  %34 = sext i32 %33 to i64
  %35 = load i64, ptr %5, align 8, !tbaa !11
  %36 = add nsw i64 %35, %34
  store i64 %36, ptr %5, align 8, !tbaa !11
  %37 = load i32, ptr %4, align 4, !tbaa !8
  %38 = load i32, ptr %3, align 4, !tbaa !8
  %39 = sub nsw i32 %38, %37
  store i32 %39, ptr %3, align 4, !tbaa !8
  %40 = load i32, ptr %4, align 4, !tbaa !8
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %4, align 4, !tbaa !8
  br label %47

42:                                               ; preds = %27
  %43 = load i32, ptr %3, align 4, !tbaa !8
  %44 = sext i32 %43 to i64
  %45 = load i64, ptr %5, align 8, !tbaa !11
  %46 = add nsw i64 %45, %44
  store i64 %46, ptr %5, align 8, !tbaa !11
  store i32 0, ptr %3, align 4, !tbaa !8
  br label %47

47:                                               ; preds = %42, %32
  %48 = load i32, ptr %3, align 4, !tbaa !8
  %49 = load i32, ptr %4, align 4, !tbaa !8
  %50 = sub nsw i32 %48, %49
  %51 = icmp sgt i32 %50, 0
  br i1 %51, label %52, label %62

52:                                               ; preds = %47
  %53 = load i32, ptr %4, align 4, !tbaa !8
  %54 = sext i32 %53 to i64
  %55 = load i64, ptr %6, align 8, !tbaa !11
  %56 = add nsw i64 %55, %54
  store i64 %56, ptr %6, align 8, !tbaa !11
  %57 = load i32, ptr %4, align 4, !tbaa !8
  %58 = load i32, ptr %3, align 4, !tbaa !8
  %59 = sub nsw i32 %58, %57
  store i32 %59, ptr %3, align 4, !tbaa !8
  %60 = load i32, ptr %4, align 4, !tbaa !8
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %4, align 4, !tbaa !8
  br label %67

62:                                               ; preds = %47
  %63 = load i32, ptr %3, align 4, !tbaa !8
  %64 = sext i32 %63 to i64
  %65 = load i64, ptr %6, align 8, !tbaa !11
  %66 = add nsw i64 %65, %64
  store i64 %66, ptr %6, align 8, !tbaa !11
  store i32 0, ptr %3, align 4, !tbaa !8
  br label %67

67:                                               ; preds = %62, %52
  %68 = load i8, ptr %7, align 1, !tbaa !13, !range !15, !noundef !16
  %69 = trunc i8 %68 to i1
  %70 = xor i1 %69, true
  %71 = zext i1 %70 to i8
  store i8 %71, ptr %7, align 1, !tbaa !13
  br label %117

72:                                               ; preds = %24
  %73 = load i32, ptr %3, align 4, !tbaa !8
  %74 = load i32, ptr %4, align 4, !tbaa !8
  %75 = sub nsw i32 %73, %74
  %76 = icmp sgt i32 %75, 0
  br i1 %76, label %77, label %87

77:                                               ; preds = %72
  %78 = load i32, ptr %4, align 4, !tbaa !8
  %79 = sext i32 %78 to i64
  %80 = load i64, ptr %6, align 8, !tbaa !11
  %81 = add nsw i64 %80, %79
  store i64 %81, ptr %6, align 8, !tbaa !11
  %82 = load i32, ptr %4, align 4, !tbaa !8
  %83 = load i32, ptr %3, align 4, !tbaa !8
  %84 = sub nsw i32 %83, %82
  store i32 %84, ptr %3, align 4, !tbaa !8
  %85 = load i32, ptr %4, align 4, !tbaa !8
  %86 = add nsw i32 %85, 1
  store i32 %86, ptr %4, align 4, !tbaa !8
  br label %92

87:                                               ; preds = %72
  %88 = load i32, ptr %3, align 4, !tbaa !8
  %89 = sext i32 %88 to i64
  %90 = load i64, ptr %6, align 8, !tbaa !11
  %91 = add nsw i64 %90, %89
  store i64 %91, ptr %6, align 8, !tbaa !11
  store i32 0, ptr %3, align 4, !tbaa !8
  br label %92

92:                                               ; preds = %87, %77
  %93 = load i32, ptr %3, align 4, !tbaa !8
  %94 = load i32, ptr %4, align 4, !tbaa !8
  %95 = sub nsw i32 %93, %94
  %96 = icmp sgt i32 %95, 0
  br i1 %96, label %97, label %107

97:                                               ; preds = %92
  %98 = load i32, ptr %4, align 4, !tbaa !8
  %99 = sext i32 %98 to i64
  %100 = load i64, ptr %5, align 8, !tbaa !11
  %101 = add nsw i64 %100, %99
  store i64 %101, ptr %5, align 8, !tbaa !11
  %102 = load i32, ptr %4, align 4, !tbaa !8
  %103 = load i32, ptr %3, align 4, !tbaa !8
  %104 = sub nsw i32 %103, %102
  store i32 %104, ptr %3, align 4, !tbaa !8
  %105 = load i32, ptr %4, align 4, !tbaa !8
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %4, align 4, !tbaa !8
  br label %112

107:                                              ; preds = %92
  %108 = load i32, ptr %3, align 4, !tbaa !8
  %109 = sext i32 %108 to i64
  %110 = load i64, ptr %5, align 8, !tbaa !11
  %111 = add nsw i64 %110, %109
  store i64 %111, ptr %5, align 8, !tbaa !11
  store i32 0, ptr %3, align 4, !tbaa !8
  br label %112

112:                                              ; preds = %107, %97
  %113 = load i8, ptr %7, align 1, !tbaa !13, !range !15, !noundef !16
  %114 = trunc i8 %113 to i1
  %115 = xor i1 %114, true
  %116 = zext i1 %115 to i8
  store i8 %116, ptr %7, align 1, !tbaa !13
  br label %117

117:                                              ; preds = %112, %67
  br label %21, !llvm.loop !17

118:                                              ; preds = %21
  %119 = load i64, ptr %5, align 8, !tbaa !11
  %120 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %119)
  %121 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %120, ptr noundef @.str)
  %122 = load i64, ptr %6, align 8, !tbaa !11
  %123 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) %121, i64 noundef %122)
  %124 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %123, ptr noundef @.str.1)
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %15, !llvm.loop !19

125:                                              ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #6
  %126 = load i32, ptr %1, align 4
  ret i32 %126
}

declare noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext) #1

; Function Attrs: mustprogress nounwind uwtable
declare noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264), ptr noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #5 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !10, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !10, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = tail call noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext false)
  %4 = load ptr, ptr @_ZSt3cin, align 8, !tbaa !5
  %5 = getelementptr i8, ptr %4, i64 -24
  %6 = load i64, ptr %5, align 8
  %7 = getelementptr inbounds i8, ptr @_ZSt3cin, i64 %6
  %8 = tail call noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264) %7, ptr noundef null)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #7
  %9 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %10 = load i32, ptr %1, align 4, !tbaa !8
  %11 = add nsw i32 %10, -1
  store i32 %11, ptr %1, align 4, !tbaa !8
  %.not53 = icmp eq i32 %10, 0
  br i1 %.not53, label %._crit_edge56, label %.lr.ph55

.lr.ph55:                                         ; preds = %0, %._crit_edge
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #7
  %12 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %.promoted = load i32, ptr %2, align 4, !tbaa !8
  %13 = icmp sgt i32 %.promoted, 0
  br i1 %13, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.lr.ph55, %.lr.ph
  %.051 = phi i1 [ %.1, %.lr.ph ], [ true, %.lr.ph55 ]
  %.03050 = phi i64 [ %.3, %.lr.ph ], [ 0, %.lr.ph55 ]
  %.03249 = phi i64 [ %.335, %.lr.ph ], [ 0, %.lr.ph55 ]
  %.03648 = phi i32 [ %.238, %.lr.ph ], [ 1, %.lr.ph55 ]
  %14 = phi i32 [ %.sink57, %.lr.ph ], [ %.promoted, %.lr.ph55 ]
  %15 = sub nsw i32 %14, %.03648
  %16 = icmp sgt i32 %15, 0
  %17 = sext i32 %.03648 to i64
  %18 = zext nneg i32 %14 to i64
  %.sink = call i32 @llvm.smax.i32(i32 %15, i32 0)
  %19 = zext i1 %16 to i32
  %.137 = add nsw i32 %.03648, %19
  %.pn46 = select i1 %16, i64 %17, i64 %18
  %20 = sub nsw i32 %.sink, %.137
  %21 = icmp sgt i32 %20, 0
  %.sink57 = call i32 @llvm.smax.i32(i32 %20, i32 0)
  %22 = zext i1 %21 to i32
  %.238 = add nsw i32 %.137, %22
  %.pn47.in = select i1 %21, i32 %.137, i32 %.sink
  %.pn47 = sext i32 %.pn47.in to i64
  %.pn46..pn47 = select i1 %.051, i64 %.pn46, i64 %.pn47
  %.pn47..pn46 = select i1 %.051, i64 %.pn47, i64 %.pn46
  %.3 = add nsw i64 %.pn47..pn46, %.03050
  %.335 = add nsw i64 %.pn46..pn47, %.03249
  %.1 = xor i1 %.051, true
  %.not60 = icmp slt i32 %20, 1
  br i1 %.not60, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !11

._crit_edge.loopexit:                             ; preds = %.lr.ph
  store i32 %.sink57, ptr %2, align 4
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph55
  %.032.lcssa = phi i64 [ 0, %.lr.ph55 ], [ %.335, %._crit_edge.loopexit ]
  %.030.lcssa = phi i64 [ 0, %.lr.ph55 ], [ %.3, %._crit_edge.loopexit ]
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %.032.lcssa)
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %23, ptr noundef nonnull @.str)
  %25 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) %24, i64 noundef %.030.lcssa)
  %26 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %25, ptr noundef nonnull @.str.1)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #7
  %27 = load i32, ptr %1, align 4, !tbaa !8
  %28 = add nsw i32 %27, -1
  store i32 %28, ptr %1, align 4, !tbaa !8
  %.not = icmp eq i32 %27, 0
  br i1 %.not, label %._crit_edge56, label %.lr.ph55, !llvm.loop !13

._crit_edge56:                                    ; preds = %._crit_edge, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #7
  ret i32 0
}

declare noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264), ptr noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #6

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MergedLoadStoreMotionPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass