; LLVM IR from MakeContributions/DSA :: algorithms/CPlusPlus/Sorting/cycle-sort.ll (Z9cycleSortPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z9cycleSortPii(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %85, %2
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = load i32, ptr %4, align 4, !tbaa !9
  %14 = sub nsw i32 %13, 1
  %15 = icmp slt i32 %12, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %11
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %88

17:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = load i32, ptr %5, align 4, !tbaa !9
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds i32, ptr %18, i64 %20
  %22 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %22, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %23 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %23, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %24 = load i32, ptr %5, align 4, !tbaa !9
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %9, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %43, %17
  %27 = load i32, ptr %9, align 4, !tbaa !9
  %28 = load i32, ptr %4, align 4, !tbaa !9
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %26
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %46

31:                                               ; preds = %26
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i32, ptr %32, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %39, label %42

39:                                               ; preds = %31
  %40 = load i32, ptr %8, align 4, !tbaa !9
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %8, align 4, !tbaa !9
  br label %42

42:                                               ; preds = %39, %31
  br label %43

43:                                               ; preds = %42
  %44 = load i32, ptr %9, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %9, align 4, !tbaa !9
  br label %26, !llvm.loop !11

46:                                               ; preds = %30
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = load i32, ptr %8, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds i32, ptr %47, i64 %49
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %50) #3
  br label %51

51:                                               ; preds = %79, %46
  %52 = load i32, ptr %8, align 4, !tbaa !9
  %53 = load i32, ptr %5, align 4, !tbaa !9
  %54 = icmp ne i32 %52, %53
  br i1 %54, label %55, label %84

55:                                               ; preds = %51
  %56 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %56, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %57 = load i32, ptr %5, align 4, !tbaa !9
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %10, align 4, !tbaa !9
  br label %59

59:                                               ; preds = %76, %55
  %60 = load i32, ptr %10, align 4, !tbaa !9
  %61 = load i32, ptr %4, align 4, !tbaa !9
  %62 = icmp slt i32 %60, %61
  br i1 %62, label %64, label %63

63:                                               ; preds = %59
  store i32 10, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %79

64:                                               ; preds = %59
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = load i32, ptr %10, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds i32, ptr %65, i64 %67
  %69 = load i32, ptr %68, align 4, !tbaa !9
  %70 = load i32, ptr %7, align 4, !tbaa !9
  %71 = icmp slt i32 %69, %70
  br i1 %71, label %72, label %75

72:                                               ; preds = %64
  %73 = load i32, ptr %8, align 4, !tbaa !9
  %74 = add nsw i32 %73, 1
  store i32 %74, ptr %8, align 4, !tbaa !9
  br label %75

75:                                               ; preds = %72, %64
  br label %76

76:                                               ; preds = %75
  %77 = load i32, ptr %10, align 4, !tbaa !9
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %10, align 4, !tbaa !9
  br label %59, !llvm.loop !13

79:                                               ; preds = %63
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  %81 = load i32, ptr %8, align 4, !tbaa !9
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds i32, ptr %80, i64 %82
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %83) #3
  br label %51, !llvm.loop !14

84:                                               ; preds = %51
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %85

85:                                               ; preds = %84
  %86 = load i32, ptr %5, align 4, !tbaa !9
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %5, align 4, !tbaa !9
  br label %11, !llvm.loop !15

88:                                               ; preds = %16
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z9cycleSortPii(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  %4 = icmp sgt i32 %1, 1
  br i1 %4, label %.lr.ph42.preheader, label %._crit_edge43

.lr.ph42.preheader:                               ; preds = %2
  %5 = add nsw i32 %1, -1
  %wide.trip.count55 = zext nneg i32 %5 to i64
  %wide.trip.count = zext nneg i32 %1 to i64
  %wide.trip.count50 = zext nneg i32 %1 to i64
  br label %.lr.ph.preheader

._crit_edge43:                                    ; preds = %._crit_edge39, %2
  ret void

.lr.ph.preheader:                                 ; preds = %._crit_edge39, %.lr.ph42.preheader
  %indvars.iv52 = phi i64 [ 0, %.lr.ph42.preheader ], [ %indvars.iv.next53, %._crit_edge39 ]
  %indvars.iv = phi i64 [ 1, %.lr.ph42.preheader ], [ %indvars.iv.next, %._crit_edge39 ]
  %6 = xor i64 %indvars.iv52, -1
  %7 = add nsw i64 %6, %wide.trip.count
  %8 = xor i64 %indvars.iv52, -1
  %9 = add nsw i64 %8, %wide.trip.count
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %10 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv52
  %11 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %11, ptr %3, align 4, !tbaa !5
  %indvars.iv.next53 = add nuw nsw i64 %indvars.iv52, 1
  %12 = trunc nuw nsw i64 %indvars.iv52 to i32
  %min.iters.check61 = icmp ult i64 %7, 8
  br i1 %min.iters.check61, label %.lr.ph.preheader80, label %vector.ph62

.lr.ph.preheader80:                               ; preds = %middle.block59, %.lr.ph.preheader
  %indvars.iv44.ph = phi i64 [ %indvars.iv, %.lr.ph.preheader ], [ %ind.end65, %middle.block59 ]
  %.02731.ph = phi i32 [ %12, %.lr.ph.preheader ], [ %24, %middle.block59 ]
  br label %.lr.ph

vector.ph62:                                      ; preds = %.lr.ph.preheader
  %n.vec64 = and i64 %7, -8
  %ind.end65 = add i64 %indvars.iv, %n.vec64
  %13 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %12, i64 0
  %broadcast.splatinsert74 = insertelement <4 x i32> poison, i32 %11, i64 0
  %broadcast.splat75 = shufflevector <4 x i32> %broadcast.splatinsert74, <4 x i32> poison, <4 x i32> zeroinitializer
  %14 = getelementptr i32, ptr %0, i64 %indvars.iv
  br label %vector.body67

vector.body67:                                    ; preds = %vector.body67, %vector.ph62
  %index68 = phi i64 [ 0, %vector.ph62 ], [ %index.next76, %vector.body67 ]
  %vec.phi69 = phi <4 x i32> [ %13, %vector.ph62 ], [ %21, %vector.body67 ]
  %vec.phi70 = phi <4 x i32> [ zeroinitializer, %vector.ph62 ], [ %22, %vector.body67 ]
  %15 = getelementptr i32, ptr %14, i64 %index68
  %16 = getelementptr inbounds i8, ptr %15, i64 16
  %wide.load72 = load <4 x i32>, ptr %15, align 4, !tbaa !5
  %wide.load73 = load <4 x i32>, ptr %16, align 4, !tbaa !5
  %17 = icmp slt <4 x i32> %wide.load72, %broadcast.splat75
  %18 = icmp slt <4 x i32> %wide.load73, %broadcast.splat75
  %19 = zext <4 x i1> %17 to <4 x i32>
  %20 = zext <4 x i1> %18 to <4 x i32>
  %21 = add <4 x i32> %vec.phi69, %19
  %22 = add <4 x i32> %vec.phi70, %20
  %index.next76 = add nuw i64 %index68, 8
  %23 = icmp eq i64 %index.next76, %n.vec64
  br i1 %23, label %middle.block59, label %vector.body67, !llvm.loop !9

middle.block59:                                   ; preds = %vector.body67
  %bin.rdx77 = add <4 x i32> %22, %21
  %24 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx77)
  %cmp.n78 = icmp eq i64 %7, %n.vec64
  br i1 %cmp.n78, label %._crit_edge, label %.lr.ph.preheader80

._crit_edge:                                      ; preds = %.lr.ph, %middle.block59
  %spec.select.lcssa = phi i32 [ %24, %middle.block59 ], [ %spec.select, %.lr.ph ]
  %25 = sext i32 %spec.select.lcssa to i64
  %26 = getelementptr inbounds i32, ptr %0, i64 %25
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %26) #4
  %27 = zext i32 %spec.select.lcssa to i64
  %.not38 = icmp eq i64 %indvars.iv52, %27
  br i1 %.not38, label %._crit_edge39, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %._crit_edge
  %min.iters.check = icmp ult i64 %9, 8
  %n.vec = and i64 %9, -8
  %ind.end = add i64 %indvars.iv, %n.vec
  %28 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %12, i64 0
  %29 = getelementptr i32, ptr %0, i64 %indvars.iv
  %cmp.n = icmp eq i64 %9, %n.vec
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge36.us
  %30 = load i32, ptr %3, align 4, !tbaa !5
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.ph

vector.ph:                                        ; preds = %.preheader.us
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %30, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %28, %vector.ph ], [ %37, %vector.body ]
  %vec.phi57 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %38, %vector.body ]
  %31 = getelementptr i32, ptr %29, i64 %index
  %32 = getelementptr inbounds i8, ptr %31, i64 16
  %wide.load = load <4 x i32>, ptr %31, align 4, !tbaa !5
  %wide.load58 = load <4 x i32>, ptr %32, align 4, !tbaa !5
  %33 = icmp slt <4 x i32> %wide.load, %broadcast.splat
  %34 = icmp slt <4 x i32> %wide.load58, %broadcast.splat
  %35 = zext <4 x i1> %33 to <4 x i32>
  %36 = zext <4 x i1> %34 to <4 x i32>
  %37 = add <4 x i32> %vec.phi, %35
  %38 = add <4 x i32> %vec.phi57, %36
  %index.next = add nuw i64 %index, 8
  %39 = icmp eq i64 %index.next, %n.vec
  br i1 %39, label %middle.block, label %vector.body, !llvm.loop !13

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %38, %37
  %40 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %._crit_edge36.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader.us
  %indvars.iv47.ph = phi i64 [ %indvars.iv, %.preheader.us ], [ %ind.end, %middle.block ]
  %.333.us.ph = phi i32 [ %12, %.preheader.us ], [ %40, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv47 = phi i64 [ %indvars.iv.next48, %scalar.ph ], [ %indvars.iv47.ph, %scalar.ph.preheader ]
  %.333.us = phi i32 [ %spec.select30.us, %scalar.ph ], [ %.333.us.ph, %scalar.ph.preheader ]
  %41 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv47
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = icmp slt i32 %42, %30
  %44 = zext i1 %43 to i32
  %spec.select30.us = add nuw nsw i32 %.333.us, %44
  %indvars.iv.next48 = add nuw nsw i64 %indvars.iv47, 1
  %exitcond51.not = icmp eq i64 %indvars.iv.next48, %wide.trip.count50
  br i1 %exitcond51.not, label %._crit_edge36.us, label %scalar.ph, !llvm.loop !14

._crit_edge36.us:                                 ; preds = %scalar.ph, %middle.block
  %spec.select30.us.lcssa = phi i32 [ %40, %middle.block ], [ %spec.select30.us, %scalar.ph ]
  %45 = zext i32 %spec.select30.us.lcssa to i64
  %46 = getelementptr inbounds i32, ptr %0, i64 %45
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %46) #4
  %.not.us = icmp eq i64 %indvars.iv52, %45
  br i1 %.not.us, label %._crit_edge39, label %.preheader.us, !llvm.loop !15

.lr.ph:                                           ; preds = %.lr.ph.preheader80, %.lr.ph
  %indvars.iv44 = phi i64 [ %indvars.iv.next45, %.lr.ph ], [ %indvars.iv44.ph, %.lr.ph.preheader80 ]
  %.02731 = phi i32 [ %spec.select, %.lr.ph ], [ %.02731.ph, %.lr.ph.preheader80 ]
  %47 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv44
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = icmp slt i32 %48, %11
  %50 = zext i1 %49 to i32
  %spec.select = add nuw nsw i32 %.02731, %50
  %indvars.iv.next45 = add nuw nsw i64 %indvars.iv44, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next45, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !16

._crit_edge39:                                    ; preds = %._crit_edge36.us, %._crit_edge
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond56.not = icmp eq i64 %indvars.iv.next53, %wide.trip.count55
  br i1 %exitcond56.not, label %._crit_edge43, label %.lr.ph.preheader, !llvm.loop !17
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !11, !12}
!14 = distinct !{!14, !10, !12, !11}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10, !12, !11}
!17 = distinct !{!17, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass