; LLVM IR from thekyria/elabtsaot2 :: emulator_hw/hardware_model (emulatorhw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.elabtsaot::EmulatorHw" = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl" }
%"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl" = type { %"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl_data" }
%"struct.std::_Vector_base<elabtsaot::Slice, std::allocator<elabtsaot::Slice>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.elabtsaot::Slice" = type <{ %"class.elabtsaot::SliceAnalog", %"class.elabtsaot::SliceDigital", i32, [4 x i8] }>
%"class.elabtsaot::SliceAnalog" = type { double, double, %"class.elabtsaot::DAC", %"class.elabtsaot::DAC", %"class.std::vector.0" }
%"class.elabtsaot::DAC" = type <{ double, double, i32, i32, i32, [4 x i8], double, double, double, double, i32, [4 x i8] }>
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<elabtsaot::Atom>, std::allocator<std::vector<elabtsaot::Atom>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.elabtsaot::SliceDigital" = type { %"class.elabtsaot::GPFPQPipeline", %"class.elabtsaot::GPFSlackPipeline", %"class.elabtsaot::TDGeneratorPipeline", %"class.elabtsaot::TDConstZLoadPipeline", %"class.elabtsaot::TDConstILoadPipeline", %"class.elabtsaot::TDConstPLoadPipeline", [4 x [6 x i32]], [4 x [6 x double]], [4 x [6 x double]] }
%"class.elabtsaot::GPFPQPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15", %"class.std::vector.15" }
%"class.elabtsaot::Pipeline" = type { ptr, %"class.std::vector.5", i64, i64, i64, i64, %"class.std::vector.10" }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::complex<double>, std::allocator<std::complex<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.elabtsaot::GPFSlackPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15" }
%"class.elabtsaot::TDGeneratorPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.20", %"class.std::vector.15", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20", %"class.std::vector.20" }
%"class.std::vector.20" = type { %"struct.std::_Vector_base.21" }
%"struct.std::_Vector_base.21" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.elabtsaot::TDConstZLoadPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15", %"class.std::vector.15" }
%"class.elabtsaot::TDConstILoadPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15" }
%"class.elabtsaot::TDConstPLoadPipeline" = type { %"class.elabtsaot::Pipeline", %"class.std::vector.15", %"class.std::vector.15" }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_ZNK9elabtsaot10EmulatorHw20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca double, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %6 = call noundef double @_ZNSt14numeric_limitsIdE3maxEv() #4
  store double %6, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !11
  br label %7

7:                                                ; preds = %31, %1
  %8 = load i32, ptr %4, align 4, !tbaa !11
  %9 = zext i32 %8 to i64
  %10 = getelementptr inbounds %"class.elabtsaot::EmulatorHw", ptr %5, i32 0, i32 0
  %11 = call noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %12 = icmp ne i64 %9, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %34

14:                                               ; preds = %7
  %15 = getelementptr inbounds %"class.elabtsaot::EmulatorHw", ptr %5, i32 0, i32 0
  %16 = load i32, ptr %4, align 4, !tbaa !11
  %17 = zext i32 %16 to i64
  %18 = call noundef nonnull align 8 dereferenceable(1676) ptr @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %17) #4
  %19 = getelementptr inbounds %"struct.elabtsaot::Slice", ptr %18, i32 0, i32 0
  %20 = call noundef double @_ZNK9elabtsaot11SliceAnalog20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(184) %19)
  %21 = load double, ptr %3, align 8, !tbaa !9
  %22 = fcmp olt double %20, %21
  br i1 %22, label %23, label %30

23:                                               ; preds = %14
  %24 = getelementptr inbounds %"class.elabtsaot::EmulatorHw", ptr %5, i32 0, i32 0
  %25 = load i32, ptr %4, align 4, !tbaa !11
  %26 = zext i32 %25 to i64
  %27 = call noundef nonnull align 8 dereferenceable(1676) ptr @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #4
  %28 = getelementptr inbounds %"struct.elabtsaot::Slice", ptr %27, i32 0, i32 0
  %29 = call noundef double @_ZNK9elabtsaot11SliceAnalog20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(184) %28)
  store double %29, ptr %3, align 8, !tbaa !9
  br label %30

30:                                               ; preds = %23, %14
  br label %31

31:                                               ; preds = %30
  %32 = load i32, ptr %4, align 4, !tbaa !11
  %33 = add i32 %32, 1
  store i32 %33, ptr %4, align 4, !tbaa !11
  br label %7, !llvm.loop !13

34:                                               ; preds = %13
  %35 = load double, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret double %35
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNSt14numeric_limitsIdE3maxEv() #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(1676) ptr @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

declare noundef double @_ZNK9elabtsaot11SliceAnalog20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(184)) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_ZNK9elabtsaot10EmulatorHw20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #1 align 2 {
  %2 = tail call noundef double @_ZNSt14numeric_limitsIdE3maxEv() #3
  %3 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %.not8 = icmp eq i64 %3, 0
  br i1 %.not8, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %11, %1
  %.06.lcssa = phi double [ %2, %1 ], [ %.1, %11 ]
  ret double %.06.lcssa

.lr.ph:                                           ; preds = %1, %11
  %4 = phi i64 [ %13, %11 ], [ 0, %1 ]
  %.010 = phi i32 [ %12, %11 ], [ 0, %1 ]
  %.069 = phi double [ %.1, %11 ], [ %2, %1 ]
  %5 = tail call noundef nonnull align 8 dereferenceable(1676) ptr @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %4) #3
  %6 = tail call noundef double @_ZNK9elabtsaot11SliceAnalog20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(184) %5)
  %7 = fcmp olt double %6, %.069
  br i1 %7, label %8, label %11

8:                                                ; preds = %.lr.ph
  %9 = tail call noundef nonnull align 8 dereferenceable(1676) ptr @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %4) #3
  %10 = tail call noundef double @_ZNK9elabtsaot11SliceAnalog20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(184) %9)
  br label %11

11:                                               ; preds = %.lr.ph, %8
  %.1 = phi double [ %10, %8 ], [ %.069, %.lr.ph ]
  %12 = add i32 %.010, 1
  %13 = zext i32 %12 to i64
  %14 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %.not = icmp eq i64 %14, %13
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNSt14numeric_limitsIdE3maxEv() local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(1676) ptr @_ZNKSt6vectorIN9elabtsaot5SliceESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

declare noundef double @_ZNK9elabtsaot11SliceAnalog20getMinMaxAchievableREv(ptr noundef nonnull align 8 dereferenceable(184)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass