; LLVM IR from thekyria/elabtsaot2 :: emulator_hw/hardware_model/atom.ll (ZN9elabtsaot4Atom5resetEb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.elabtsaot::Atom" = type { %"class.elabtsaot::Node", %"class.std::vector", %"class.std::vector", %"class.std::vector.0" }
%"class.elabtsaot::Node" = type { double, double, double, double, i8, i8, i8, i8, double, double, double, double, i8, i8, i8, i8, [4 x i8], %"class.elabtsaot::Potentiometer", %"class.elabtsaot::Potentiometer", %"class.elabtsaot::Potentiometer", %"class.elabtsaot::Potentiometer" }
%"class.elabtsaot::Potentiometer" = type <{ ptr, double, double, i32, [4 x i8], double, i32, i32, i8, i8, [6 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<elabtsaot::EmulatorBranch, std::allocator<elabtsaot::EmulatorBranch>>::_Vector_impl" }
%"struct.std::_Vector_base<elabtsaot::EmulatorBranch, std::allocator<elabtsaot::EmulatorBranch>>::_Vector_impl" = type { %"struct.std::_Vector_base<elabtsaot::EmulatorBranch, std::allocator<elabtsaot::EmulatorBranch>>::_Vector_impl_data" }
%"struct.std::_Vector_base<elabtsaot::EmulatorBranch, std::allocator<elabtsaot::EmulatorBranch>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN9elabtsaot4Atom5resetEb(ptr noundef nonnull align 8 dereferenceable(392) %0, i1 noundef zeroext %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %8 = zext i1 %1 to i8
  store i8 %8, ptr %4, align 1, !tbaa !9
  %9 = load ptr, ptr %3, align 8
  %10 = getelementptr inbounds %"class.elabtsaot::Atom", ptr %9, i32 0, i32 0
  %11 = load i8, ptr %4, align 1, !tbaa !9, !range !11, !noundef !12
  %12 = trunc i8 %11 to i1
  %13 = call noundef i32 @_ZN9elabtsaot4Node5resetEb(ptr noundef nonnull align 8 dereferenceable(304) %10, i1 noundef zeroext %12)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store i64 0, ptr %6, align 8, !tbaa !15
  br label %14

14:                                               ; preds = %29, %2
  %15 = load i64, ptr %6, align 8, !tbaa !15
  %16 = getelementptr inbounds %"class.elabtsaot::Atom", ptr %9, i32 0, i32 1
  %17 = call noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #4
  %18 = icmp ne i64 %15, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  br label %32

20:                                               ; preds = %14
  %21 = getelementptr inbounds %"class.elabtsaot::Atom", ptr %9, i32 0, i32 1
  %22 = load i64, ptr %6, align 8, !tbaa !15
  %23 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZNSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %22) #4
  %24 = load i8, ptr %4, align 1, !tbaa !9, !range !11, !noundef !12
  %25 = trunc i8 %24 to i1
  %26 = call noundef i32 @_ZN9elabtsaot14EmulatorBranch5resetEb(ptr noundef nonnull align 8 dereferenceable(120) %23, i1 noundef zeroext %25)
  %27 = load i32, ptr %5, align 4, !tbaa !13
  %28 = or i32 %27, %26
  store i32 %28, ptr %5, align 4, !tbaa !13
  br label %29

29:                                               ; preds = %20
  %30 = load i64, ptr %6, align 8, !tbaa !15
  %31 = add i64 %30, 1
  store i64 %31, ptr %6, align 8, !tbaa !15
  br label %14, !llvm.loop !17

32:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store i64 0, ptr %7, align 8, !tbaa !15
  br label %33

33:                                               ; preds = %48, %32
  %34 = load i64, ptr %7, align 8, !tbaa !15
  %35 = getelementptr inbounds %"class.elabtsaot::Atom", ptr %9, i32 0, i32 2
  %36 = call noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #4
  %37 = icmp ne i64 %34, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  br label %51

39:                                               ; preds = %33
  %40 = getelementptr inbounds %"class.elabtsaot::Atom", ptr %9, i32 0, i32 2
  %41 = load i64, ptr %7, align 8, !tbaa !15
  %42 = call noundef nonnull align 8 dereferenceable(120) ptr @_ZNSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %41) #4
  %43 = load i8, ptr %4, align 1, !tbaa !9, !range !11, !noundef !12
  %44 = trunc i8 %43 to i1
  %45 = call noundef i32 @_ZN9elabtsaot14EmulatorBranch5resetEb(ptr noundef nonnull align 8 dereferenceable(120) %42, i1 noundef zeroext %44)
  %46 = load i32, ptr %5, align 4, !tbaa !13
  %47 = or i32 %46, %45
  store i32 %47, ptr %5, align 4, !tbaa !13
  br label %48

48:                                               ; preds = %39
  %49 = load i64, ptr %7, align 8, !tbaa !15
  %50 = add i64 %49, 1
  store i64 %50, ptr %7, align 8, !tbaa !15
  br label %33, !llvm.loop !19

51:                                               ; preds = %38
  %52 = load i32, ptr %5, align 4, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret i32 %52
}

declare noundef i32 @_ZN9elabtsaot4Node5resetEb(ptr noundef nonnull align 8 dereferenceable(304), i1 noundef zeroext) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(120) ptr @_ZNSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

declare noundef i32 @_ZN9elabtsaot14EmulatorBranch5resetEb(ptr noundef nonnull align 8 dereferenceable(120), i1 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN9elabtsaot4Atom5resetEb(ptr noundef nonnull align 8 dereferenceable(392) %0, i1 noundef zeroext %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef i32 @_ZN9elabtsaot4Node5resetEb(ptr noundef nonnull align 8 dereferenceable(304) %0, i1 noundef zeroext %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 304
  %5 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %.not15 = icmp eq i64 %5, 0
  br i1 %.not15, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %2
  %.013.lcssa = phi i32 [ 0, %2 ], [ %10, %.lr.ph ]
  %6 = getelementptr inbounds i8, ptr %0, i64 328
  %7 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #3
  %.not1418 = icmp eq i64 %7, 0
  br i1 %.not1418, label %._crit_edge, label %.lr.ph21

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.01217 = phi i64 [ %11, %.lr.ph ], [ 0, %2 ]
  %.01316 = phi i32 [ %10, %.lr.ph ], [ 0, %2 ]
  %8 = tail call noundef nonnull align 8 dereferenceable(120) ptr @_ZNSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %.01217) #3
  %9 = tail call noundef i32 @_ZN9elabtsaot14EmulatorBranch5resetEb(ptr noundef nonnull align 8 dereferenceable(120) %8, i1 noundef zeroext %1)
  %10 = or i32 %9, %.01316
  %11 = add i64 %.01217, 1
  %12 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %.not = icmp eq i64 %11, %12
  br i1 %.not, label %.preheader, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph21, %.preheader
  %.1.lcssa = phi i32 [ %.013.lcssa, %.preheader ], [ %15, %.lr.ph21 ]
  ret i32 %.1.lcssa

.lr.ph21:                                         ; preds = %.preheader, %.lr.ph21
  %.020 = phi i64 [ %16, %.lr.ph21 ], [ 0, %.preheader ]
  %.119 = phi i32 [ %15, %.lr.ph21 ], [ %.013.lcssa, %.preheader ]
  %13 = tail call noundef nonnull align 8 dereferenceable(120) ptr @_ZNSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %.020) #3
  %14 = tail call noundef i32 @_ZN9elabtsaot14EmulatorBranch5resetEb(ptr noundef nonnull align 8 dereferenceable(120) %13, i1 noundef zeroext %1)
  %15 = or i32 %14, %.119
  %16 = add i64 %.020, 1
  %17 = tail call noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #3
  %.not14 = icmp eq i64 %16, %17
  br i1 %.not14, label %._crit_edge, label %.lr.ph21, !llvm.loop !7
}

declare noundef i32 @_ZN9elabtsaot4Node5resetEb(ptr noundef nonnull align 8 dereferenceable(304), i1 noundef zeroext) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(120) ptr @_ZNSt6vectorIN9elabtsaot14EmulatorBranchESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

declare noundef i32 @_ZN9elabtsaot14EmulatorBranch5resetEb(ptr noundef nonnull align 8 dereferenceable(120), i1 noundef zeroext) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass