; LLVM IR from Mohammed-Shoaib/Coding-Problems :: Codeforces/Solutions/1277A.ll (Z14happy_birthdayi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z14happy_birthdayi(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %27, %1
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = icmp sle i32 %7, 9
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %30

10:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  store i64 %12, ptr %5, align 8, !tbaa !9
  br label %13

13:                                               ; preds = %18, %10
  %14 = load i64, ptr %5, align 8, !tbaa !9
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = icmp sle i64 %14, %16
  br i1 %17, label %18, label %26

18:                                               ; preds = %13
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %3, align 4, !tbaa !5
  %21 = load i64, ptr %5, align 8, !tbaa !9
  %22 = mul nsw i64 10, %21
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = add nsw i64 %22, %24
  store i64 %25, ptr %5, align 8, !tbaa !9
  br label %13, !llvm.loop !11

26:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  br label %27

27:                                               ; preds = %26
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %4, align 4, !tbaa !5
  br label %6, !llvm.loop !13

30:                                               ; preds = %9
  %31 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %31
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @_Z14happy_birthdayi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = sext i32 %0 to i64
  %.not11 = icmp slt i32 %0, 1
  br i1 %.not11, label %._crit_edge.8, label %.lr.ph

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.013 = phi i64 [ %5, %.lr.ph ], [ 1, %1 ]
  %.112 = phi i32 [ %3, %.lr.ph ], [ 0, %1 ]
  %3 = add nuw nsw i32 %.112, 1
  %4 = mul nsw i64 %.013, 10
  %5 = or disjoint i64 %4, 1
  %.not.not = icmp slt i64 %4, %2
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph
  %.not11.1 = icmp eq i32 %0, 1
  br i1 %.not11.1, label %._crit_edge.8, label %.lr.ph.1

.lr.ph.1:                                         ; preds = %._crit_edge, %.lr.ph.1
  %.013.1 = phi i64 [ %8, %.lr.ph.1 ], [ 2, %._crit_edge ]
  %.112.1 = phi i32 [ %6, %.lr.ph.1 ], [ %3, %._crit_edge ]
  %6 = add nuw nsw i32 %.112.1, 1
  %7 = mul nsw i64 %.013.1, 10
  %8 = add nsw i64 %7, 2
  %.not.1 = icmp sgt i64 %8, %2
  br i1 %.not.1, label %._crit_edge.1, label %.lr.ph.1, !llvm.loop !5

._crit_edge.1:                                    ; preds = %.lr.ph.1
  %.not11.2 = icmp slt i32 %0, 3
  br i1 %.not11.2, label %._crit_edge.8, label %.lr.ph.2

.lr.ph.2:                                         ; preds = %._crit_edge.1, %.lr.ph.2
  %.013.2 = phi i64 [ %11, %.lr.ph.2 ], [ 3, %._crit_edge.1 ]
  %.112.2 = phi i32 [ %9, %.lr.ph.2 ], [ %6, %._crit_edge.1 ]
  %9 = add nuw nsw i32 %.112.2, 1
  %10 = mul nsw i64 %.013.2, 10
  %11 = add nsw i64 %10, 3
  %.not.2 = icmp sgt i64 %11, %2
  br i1 %.not.2, label %._crit_edge.2, label %.lr.ph.2, !llvm.loop !5

._crit_edge.2:                                    ; preds = %.lr.ph.2
  %.not11.3 = icmp eq i32 %0, 3
  br i1 %.not11.3, label %._crit_edge.8, label %.lr.ph.3

.lr.ph.3:                                         ; preds = %._crit_edge.2, %.lr.ph.3
  %.013.3 = phi i64 [ %14, %.lr.ph.3 ], [ 4, %._crit_edge.2 ]
  %.112.3 = phi i32 [ %12, %.lr.ph.3 ], [ %9, %._crit_edge.2 ]
  %12 = add nsw i32 %.112.3, 1
  %13 = mul nsw i64 %.013.3, 10
  %14 = add nsw i64 %13, 4
  %.not.3 = icmp sgt i64 %14, %2
  br i1 %.not.3, label %._crit_edge.3, label %.lr.ph.3, !llvm.loop !5

._crit_edge.3:                                    ; preds = %.lr.ph.3
  %.not11.4 = icmp slt i32 %0, 5
  br i1 %.not11.4, label %._crit_edge.8, label %.lr.ph.4

.lr.ph.4:                                         ; preds = %._crit_edge.3, %.lr.ph.4
  %.013.4 = phi i64 [ %17, %.lr.ph.4 ], [ 5, %._crit_edge.3 ]
  %.112.4 = phi i32 [ %15, %.lr.ph.4 ], [ %12, %._crit_edge.3 ]
  %15 = add nsw i32 %.112.4, 1
  %16 = mul nsw i64 %.013.4, 10
  %17 = add nsw i64 %16, 5
  %.not.4 = icmp sgt i64 %17, %2
  br i1 %.not.4, label %._crit_edge.4, label %.lr.ph.4, !llvm.loop !5

._crit_edge.4:                                    ; preds = %.lr.ph.4
  %.not11.5 = icmp eq i32 %0, 5
  br i1 %.not11.5, label %._crit_edge.8, label %.lr.ph.5

.lr.ph.5:                                         ; preds = %._crit_edge.4, %.lr.ph.5
  %.013.5 = phi i64 [ %20, %.lr.ph.5 ], [ 6, %._crit_edge.4 ]
  %.112.5 = phi i32 [ %18, %.lr.ph.5 ], [ %15, %._crit_edge.4 ]
  %18 = add nsw i32 %.112.5, 1
  %19 = mul nsw i64 %.013.5, 10
  %20 = add nsw i64 %19, 6
  %.not.5 = icmp sgt i64 %20, %2
  br i1 %.not.5, label %._crit_edge.5, label %.lr.ph.5, !llvm.loop !5

._crit_edge.5:                                    ; preds = %.lr.ph.5
  %.not11.6 = icmp slt i32 %0, 7
  br i1 %.not11.6, label %._crit_edge.8, label %.lr.ph.6

.lr.ph.6:                                         ; preds = %._crit_edge.5, %.lr.ph.6
  %.013.6 = phi i64 [ %23, %.lr.ph.6 ], [ 7, %._crit_edge.5 ]
  %.112.6 = phi i32 [ %21, %.lr.ph.6 ], [ %18, %._crit_edge.5 ]
  %21 = add nsw i32 %.112.6, 1
  %22 = mul nsw i64 %.013.6, 10
  %23 = add nsw i64 %22, 7
  %.not.6 = icmp sgt i64 %23, %2
  br i1 %.not.6, label %._crit_edge.6, label %.lr.ph.6, !llvm.loop !5

._crit_edge.6:                                    ; preds = %.lr.ph.6
  %.not11.7 = icmp eq i32 %0, 7
  br i1 %.not11.7, label %._crit_edge.8, label %.lr.ph.7

.lr.ph.7:                                         ; preds = %._crit_edge.6, %.lr.ph.7
  %.013.7 = phi i64 [ %26, %.lr.ph.7 ], [ 8, %._crit_edge.6 ]
  %.112.7 = phi i32 [ %24, %.lr.ph.7 ], [ %21, %._crit_edge.6 ]
  %24 = add nsw i32 %.112.7, 1
  %25 = mul nsw i64 %.013.7, 10
  %26 = add nsw i64 %25, 8
  %.not.7 = icmp sgt i64 %26, %2
  br i1 %.not.7, label %._crit_edge.7, label %.lr.ph.7, !llvm.loop !5

._crit_edge.7:                                    ; preds = %.lr.ph.7
  %.not11.8 = icmp slt i32 %0, 9
  br i1 %.not11.8, label %._crit_edge.8, label %.lr.ph.8

.lr.ph.8:                                         ; preds = %._crit_edge.7, %.lr.ph.8
  %.013.8 = phi i64 [ %29, %.lr.ph.8 ], [ 9, %._crit_edge.7 ]
  %.112.8 = phi i32 [ %27, %.lr.ph.8 ], [ %24, %._crit_edge.7 ]
  %27 = add nsw i32 %.112.8, 1
  %28 = mul nsw i64 %.013.8, 10
  %29 = add nsw i64 %28, 9
  %.not.8 = icmp sgt i64 %29, %2
  br i1 %.not.8, label %._crit_edge.8, label %.lr.ph.8, !llvm.loop !5

._crit_edge.8:                                    ; preds = %.lr.ph.8, %1, %._crit_edge, %._crit_edge.1, %._crit_edge.2, %._crit_edge.3, %._crit_edge.4, %._crit_edge.5, %._crit_edge.6, %._crit_edge.7
  %.1.lcssa.8 = phi i32 [ %24, %._crit_edge.7 ], [ %21, %._crit_edge.6 ], [ %18, %._crit_edge.5 ], [ %15, %._crit_edge.4 ], [ %12, %._crit_edge.3 ], [ %9, %._crit_edge.2 ], [ %6, %._crit_edge.1 ], [ %3, %._crit_edge ], [ 0, %1 ], [ %27, %.lr.ph.8 ]
  ret i32 %.1.lcssa.8
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass