; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc (ToCCRValue)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XDmaPs_ChanCtrl = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XDmaPs_ToCCRValue(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %15, i32 0, i32 0
  %17 = load i32, ptr %16, align 4, !tbaa !9
  %18 = call i32 @XDmaPs_ToEndianSwapSizeBits(i32 noundef %17)
  store i32 %18, ptr %3, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %19, i32 0, i32 4
  %21 = load i32, ptr %20, align 4, !tbaa !13
  %22 = call i32 @XDmaPs_ToBurstSizeBits(i32 noundef %21)
  store i32 %22, ptr %4, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %23, i32 0, i32 3
  %25 = load i32, ptr %24, align 4, !tbaa !14
  %26 = sub i32 %25, 1
  %27 = and i32 %26, 15
  store i32 %27, ptr %5, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %28 = load ptr, ptr %2, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %28, i32 0, i32 1
  %30 = load i32, ptr %29, align 4, !tbaa !15
  %31 = and i32 %30, 3
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %32, i32 0, i32 1
  %34 = load i32, ptr %33, align 4, !tbaa !15
  %35 = and i32 %34, 8
  %36 = lshr i32 %35, 1
  %37 = or i32 %31, %36
  store i32 %37, ptr %6, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %38 = load ptr, ptr %2, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %38, i32 0, i32 2
  %40 = load i32, ptr %39, align 4, !tbaa !16
  %41 = and i32 %40, 7
  store i32 %41, ptr %7, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %42, i32 0, i32 5
  %44 = load i32, ptr %43, align 4, !tbaa !17
  %45 = and i32 %44, 1
  store i32 %45, ptr %8, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %46 = load ptr, ptr %2, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %46, i32 0, i32 9
  %48 = load i32, ptr %47, align 4, !tbaa !18
  %49 = call i32 @XDmaPs_ToBurstSizeBits(i32 noundef %48)
  store i32 %49, ptr %9, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %50, i32 0, i32 8
  %52 = load i32, ptr %51, align 4, !tbaa !19
  %53 = sub i32 %52, 1
  %54 = and i32 %53, 15
  store i32 %54, ptr %10, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %55 = load ptr, ptr %2, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %55, i32 0, i32 6
  %57 = load i32, ptr %56, align 4, !tbaa !20
  %58 = and i32 %57, 3
  %59 = load ptr, ptr %2, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %59, i32 0, i32 6
  %61 = load i32, ptr %60, align 4, !tbaa !20
  %62 = and i32 %61, 8
  %63 = lshr i32 %62, 1
  %64 = or i32 %58, %63
  store i32 %64, ptr %11, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %65 = load ptr, ptr %2, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %65, i32 0, i32 7
  %67 = load i32, ptr %66, align 4, !tbaa !21
  %68 = and i32 %67, 7
  store i32 %68, ptr %12, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %69 = load ptr, ptr %2, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.XDmaPs_ChanCtrl, ptr %69, i32 0, i32 10
  %71 = load i32, ptr %70, align 4, !tbaa !22
  %72 = and i32 %71, 1
  store i32 %72, ptr %13, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %73 = load i32, ptr %3, align 4, !tbaa !12
  %74 = shl i32 %73, 28
  %75 = load i32, ptr %6, align 4, !tbaa !12
  %76 = shl i32 %75, 25
  %77 = or i32 %74, %76
  %78 = load i32, ptr %7, align 4, !tbaa !12
  %79 = shl i32 %78, 22
  %80 = or i32 %77, %79
  %81 = load i32, ptr %5, align 4, !tbaa !12
  %82 = shl i32 %81, 18
  %83 = or i32 %80, %82
  %84 = load i32, ptr %4, align 4, !tbaa !12
  %85 = shl i32 %84, 15
  %86 = or i32 %83, %85
  %87 = load i32, ptr %8, align 4, !tbaa !12
  %88 = shl i32 %87, 14
  %89 = or i32 %86, %88
  %90 = load i32, ptr %11, align 4, !tbaa !12
  %91 = shl i32 %90, 11
  %92 = or i32 %89, %91
  %93 = load i32, ptr %12, align 4, !tbaa !12
  %94 = shl i32 %93, 8
  %95 = or i32 %92, %94
  %96 = load i32, ptr %10, align 4, !tbaa !12
  %97 = shl i32 %96, 4
  %98 = or i32 %95, %97
  %99 = load i32, ptr %9, align 4, !tbaa !12
  %100 = shl i32 %99, 1
  %101 = or i32 %98, %100
  %102 = load i32, ptr %13, align 4, !tbaa !12
  %103 = or i32 %101, %102
  store i32 %103, ptr %14, align 4, !tbaa !12
  %104 = load i32, ptr %14, align 4, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %104
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @XDmaPs_ToEndianSwapSizeBits(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @XDmaPs_ToBurstSizeBits(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 16}
!14 = !{!10, !11, i64 12}
!15 = !{!10, !11, i64 4}
!16 = !{!10, !11, i64 8}
!17 = !{!10, !11, i64 20}
!18 = !{!10, !11, i64 36}
!19 = !{!10, !11, i64 32}
!20 = !{!10, !11, i64 24}
!21 = !{!10, !11, i64 28}
!22 = !{!10, !11, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @XDmaPs_ToCCRValue(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = load i32, ptr %0, align 4, !tbaa !5
  %3 = tail call i32 @XDmaPs_ToEndianSwapSizeBits(i32 noundef %2)
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = load i32, ptr %4, align 4, !tbaa !10
  %6 = tail call i32 @XDmaPs_ToBurstSizeBits(i32 noundef %5)
  %7 = getelementptr inbounds i8, ptr %0, i64 12
  %8 = load i32, ptr %7, align 4, !tbaa !11
  %9 = getelementptr inbounds i8, ptr %0, i64 4
  %10 = load i32, ptr %9, align 4, !tbaa !12
  %11 = and i32 %10, 3
  %12 = lshr i32 %10, 1
  %13 = and i32 %12, 4
  %14 = or disjoint i32 %13, %11
  %15 = getelementptr inbounds i8, ptr %0, i64 8
  %16 = load i32, ptr %15, align 4, !tbaa !13
  %17 = getelementptr inbounds i8, ptr %0, i64 20
  %18 = load i32, ptr %17, align 4, !tbaa !14
  %19 = getelementptr inbounds i8, ptr %0, i64 36
  %20 = load i32, ptr %19, align 4, !tbaa !15
  %21 = tail call i32 @XDmaPs_ToBurstSizeBits(i32 noundef %20)
  %22 = getelementptr inbounds i8, ptr %0, i64 32
  %23 = load i32, ptr %22, align 4, !tbaa !16
  %24 = getelementptr inbounds i8, ptr %0, i64 24
  %25 = load i32, ptr %24, align 4, !tbaa !17
  %26 = and i32 %25, 3
  %27 = lshr i32 %25, 1
  %28 = and i32 %27, 4
  %29 = or disjoint i32 %28, %26
  %30 = getelementptr inbounds i8, ptr %0, i64 28
  %31 = load i32, ptr %30, align 4, !tbaa !18
  %32 = getelementptr inbounds i8, ptr %0, i64 40
  %33 = load i32, ptr %32, align 4, !tbaa !19
  %34 = and i32 %33, 1
  %35 = shl i32 %3, 28
  %36 = shl nuw nsw i32 %14, 25
  %37 = or disjoint i32 %36, %35
  %38 = shl i32 %16, 22
  %39 = and i32 %38, 29360128
  %40 = or disjoint i32 %37, %39
  %41 = shl i32 %8, 18
  %42 = add i32 %41, 3932160
  %43 = and i32 %42, 3932160
  %44 = or disjoint i32 %40, %43
  %45 = shl i32 %6, 15
  %46 = or i32 %44, %45
  %47 = shl i32 %18, 14
  %48 = and i32 %47, 16384
  %49 = or disjoint i32 %46, %48
  %50 = shl nuw nsw i32 %29, 11
  %51 = or disjoint i32 %49, %50
  %52 = shl i32 %31, 8
  %53 = and i32 %52, 1792
  %54 = shl i32 %23, 4
  %55 = add i32 %54, 240
  %56 = and i32 %55, 240
  %57 = shl i32 %21, 1
  %58 = or i32 %56, %57
  %59 = or i32 %58, %53
  %60 = or disjoint i32 %59, %34
  %61 = or i32 %60, %51
  ret i32 %61
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @XDmaPs_ToEndianSwapSizeBits(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @XDmaPs_ToBurstSizeBits(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 16}
!11 = !{!6, !7, i64 12}
!12 = !{!6, !7, i64 4}
!13 = !{!6, !7, i64 8}
!14 = !{!6, !7, i64 20}
!15 = !{!6, !7, i64 36}
!16 = !{!6, !7, i64 32}
!17 = !{!6, !7, i64 24}
!18 = !{!6, !7, i64 28}
!19 = !{!6, !7, i64 40}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass