; LLVM IR from Mohammed-Shoaib/Coding-Problems :: Gulf Programming Contest/2019/fruit (fruit)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5validiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsRiiiRSt6vectorIS0_IbSaIbEESaIS2_EERS0_IS0_IcSaIcEESaIS7_EE(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca %"struct.std::_Bit_reference", align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca %"struct.std::_Bit_reference", align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #3
  %16 = load ptr, ptr %9, align 8, !tbaa !5
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %18) #3
  %20 = load i32, ptr %8, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %19, i64 noundef %21)
  %23 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 0
  %24 = extractvalue { ptr, i64 } %22, 0
  store ptr %24, ptr %23, align 8
  %25 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 1
  %26 = extractvalue { ptr, i64 } %22, 1
  store i64 %26, ptr %25, align 8
  %27 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %11, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 -1, ptr %12, align 4, !tbaa !9
  br label %28

28:                                               ; preds = %114, %5
  %29 = load i32, ptr %12, align 4, !tbaa !9
  %30 = icmp sle i32 %29, 1
  br i1 %30, label %32, label %31

31:                                               ; preds = %28
  store i32 2, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %117

32:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 -1, ptr %14, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %110, %32
  %34 = load i32, ptr %14, align 4, !tbaa !9
  %35 = icmp sle i32 %34, 1
  br i1 %35, label %37, label %36

36:                                               ; preds = %33
  store i32 5, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %113

37:                                               ; preds = %33
  %38 = load i32, ptr %12, align 4, !tbaa !9
  %39 = icmp ne i32 %38, 0
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #3
  br i1 %39, label %43, label %40

40:                                               ; preds = %37
  %41 = load i32, ptr %14, align 4, !tbaa !9
  %42 = icmp ne i32 %41, 0
  br i1 %42, label %43, label %95

43:                                               ; preds = %40, %37
  %44 = load i32, ptr %12, align 4, !tbaa !9
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = add nsw i32 %44, %45
  %47 = load i32, ptr %14, align 4, !tbaa !9
  %48 = load i32, ptr %8, align 4, !tbaa !9
  %49 = add nsw i32 %47, %48
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  %51 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %50) #3
  %52 = trunc i64 %51 to i32
  %53 = call noundef zeroext i1 @_Z5validiii(i32 noundef %46, i32 noundef %49, i32 noundef %52)
  br i1 %53, label %54, label %95

54:                                               ; preds = %43
  %55 = load ptr, ptr %9, align 8, !tbaa !5
  %56 = load i32, ptr %12, align 4, !tbaa !9
  %57 = load i32, ptr %7, align 4, !tbaa !9
  %58 = add nsw i32 %56, %57
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %59) #3
  %61 = load i32, ptr %14, align 4, !tbaa !9
  %62 = load i32, ptr %8, align 4, !tbaa !9
  %63 = add nsw i32 %61, %62
  %64 = sext i32 %63 to i64
  %65 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %60, i64 noundef %64)
  %66 = getelementptr inbounds { ptr, i64 }, ptr %15, i32 0, i32 0
  %67 = extractvalue { ptr, i64 } %65, 0
  store ptr %67, ptr %66, align 8
  %68 = getelementptr inbounds { ptr, i64 }, ptr %15, i32 0, i32 1
  %69 = extractvalue { ptr, i64 } %65, 1
  store i64 %69, ptr %68, align 8
  %70 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %15) #3
  br i1 %70, label %95, label %71

71:                                               ; preds = %54
  %72 = load ptr, ptr %10, align 8, !tbaa !5
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #3
  %76 = load i32, ptr %8, align 4, !tbaa !9
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %77) #3
  %79 = load i8, ptr %78, align 1, !tbaa !11
  %80 = sext i8 %79 to i32
  %81 = load ptr, ptr %10, align 8, !tbaa !5
  %82 = load i32, ptr %12, align 4, !tbaa !9
  %83 = load i32, ptr %7, align 4, !tbaa !9
  %84 = add nsw i32 %82, %83
  %85 = sext i32 %84 to i64
  %86 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %85) #3
  %87 = load i32, ptr %14, align 4, !tbaa !9
  %88 = load i32, ptr %8, align 4, !tbaa !9
  %89 = add nsw i32 %87, %88
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %90) #3
  %92 = load i8, ptr %91, align 1, !tbaa !11
  %93 = sext i8 %92 to i32
  %94 = icmp eq i32 %80, %93
  br label %95

95:                                               ; preds = %71, %54, %43, %40
  %96 = phi i1 [ false, %54 ], [ false, %43 ], [ false, %40 ], [ %94, %71 ]
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #3
  br i1 %96, label %97, label %109

97:                                               ; preds = %95
  %98 = load ptr, ptr %6, align 8, !tbaa !5
  %99 = load i32, ptr %98, align 4, !tbaa !9
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %98, align 4, !tbaa !9
  %101 = load i32, ptr %12, align 4, !tbaa !9
  %102 = load i32, ptr %7, align 4, !tbaa !9
  %103 = add nsw i32 %101, %102
  %104 = load i32, ptr %14, align 4, !tbaa !9
  %105 = load i32, ptr %8, align 4, !tbaa !9
  %106 = add nsw i32 %104, %105
  %107 = load ptr, ptr %9, align 8, !tbaa !5
  %108 = load ptr, ptr %10, align 8, !tbaa !5
  call void @_Z3dfsRiiiRSt6vectorIS0_IbSaIbEESaIS2_EERS0_IS0_IcSaIcEESaIS7_EE(ptr noundef nonnull align 4 dereferenceable(4) %98, i32 noundef %103, i32 noundef %106, ptr noundef nonnull align 8 dereferenceable(24) %107, ptr noundef nonnull align 8 dereferenceable(24) %108)
  br label %109

109:                                              ; preds = %97, %95
  br label %110

110:                                              ; preds = %109
  %111 = load i32, ptr %14, align 4, !tbaa !9
  %112 = add nsw i32 %111, 1
  store i32 %112, ptr %14, align 4, !tbaa !9
  br label %33, !llvm.loop !12

113:                                              ; preds = %36
  br label %114

114:                                              ; preds = %113
  %115 = load i32, ptr %12, align 4, !tbaa !9
  %116 = add nsw i32 %115, 1
  store i32 %116, ptr %12, align 4, !tbaa !9
  br label %28, !llvm.loop !14

117:                                              ; preds = %31
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z5validiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsRiiiRSt6vectorIS0_IbSaIbEESaIS2_EERS0_IS0_IcSaIcEESaIS7_EE(ptr nocapture noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4) local_unnamed_addr #1 {
  %6 = alloca %"struct.std::_Bit_reference", align 8
  %7 = alloca %"struct.std::_Bit_reference", align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #3
  %8 = sext i32 %1 to i64
  %9 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %8) #3
  %10 = sext i32 %2 to i64
  %11 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %9, i64 noundef %10)
  %12 = extractvalue { ptr, i64 } %11, 0
  store ptr %12, ptr %6, align 8
  %13 = getelementptr inbounds i8, ptr %6, i64 8
  %14 = extractvalue { ptr, i64 } %11, 1
  store i64 %14, ptr %13, align 8
  %15 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %6, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #3
  %16 = getelementptr inbounds i8, ptr %7, i64 8
  %17 = add nsw i64 %10, -1
  %18 = trunc nsw i64 %17 to i32
  %19 = add nsw i64 %10, 1
  %20 = trunc nsw i64 %19 to i32
  br label %22

21:                                               ; preds = %91
  ret void

22:                                               ; preds = %91, %5
  %indvars.iv = phi i64 [ -1, %5 ], [ %indvars.iv.next, %91 ]
  %23 = add nsw i64 %indvars.iv, %8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %24 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %25 = trunc i64 %24 to i32
  %26 = trunc nsw i64 %23 to i32
  %27 = call noundef zeroext i1 @_Z5validiii(i32 noundef %26, i32 noundef %18, i32 noundef %25)
  br i1 %27, label %28, label %.critedge

28:                                               ; preds = %22
  %29 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %23) #3
  %30 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %29, i64 noundef %17)
  %31 = extractvalue { ptr, i64 } %30, 0
  store ptr %31, ptr %7, align 8
  %32 = extractvalue { ptr, i64 } %30, 1
  store i64 %32, ptr %16, align 8
  %33 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #3
  br i1 %33, label %.critedge, label %34

34:                                               ; preds = %28
  %35 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %8) #3
  %36 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %10) #3
  %37 = load i8, ptr %36, align 1, !tbaa !5
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %23) #3
  %39 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %17) #3
  %40 = load i8, ptr %39, align 1, !tbaa !5
  %41 = icmp eq i8 %37, %40
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br i1 %41, label %42, label %45

42:                                               ; preds = %34
  %43 = load i32, ptr %0, align 4, !tbaa !8
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %0, align 4, !tbaa !8
  call void @_Z3dfsRiiiRSt6vectorIS0_IbSaIbEESaIS2_EERS0_IS0_IcSaIcEESaIS7_EE(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %26, i32 noundef %18, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4)
  br label %45

.critedge:                                        ; preds = %22, %28
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br label %45

45:                                               ; preds = %34, %42, %.critedge
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %46 = icmp eq i64 %indvars.iv, 0
  br i1 %46, label %.critedge.1, label %47

47:                                               ; preds = %45
  %48 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %49 = trunc i64 %48 to i32
  %50 = trunc nsw i64 %23 to i32
  %51 = call noundef zeroext i1 @_Z5validiii(i32 noundef %50, i32 noundef %2, i32 noundef %49)
  br i1 %51, label %52, label %.critedge.1

52:                                               ; preds = %47
  %53 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %23) #3
  %54 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %53, i64 noundef %10)
  %55 = extractvalue { ptr, i64 } %54, 0
  store ptr %55, ptr %7, align 8
  %56 = extractvalue { ptr, i64 } %54, 1
  store i64 %56, ptr %16, align 8
  %57 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #3
  br i1 %57, label %.critedge.1, label %58

58:                                               ; preds = %52
  %59 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %8) #3
  %60 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %10) #3
  %61 = load i8, ptr %60, align 1, !tbaa !5
  %62 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %23) #3
  %63 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %10) #3
  %64 = load i8, ptr %63, align 1, !tbaa !5
  %65 = icmp eq i8 %61, %64
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br i1 %65, label %66, label %69

66:                                               ; preds = %58
  %67 = load i32, ptr %0, align 4, !tbaa !8
  %68 = add nsw i32 %67, 1
  store i32 %68, ptr %0, align 4, !tbaa !8
  call void @_Z3dfsRiiiRSt6vectorIS0_IbSaIbEESaIS2_EERS0_IS0_IcSaIcEESaIS7_EE(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %50, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4)
  br label %69

.critedge.1:                                      ; preds = %52, %47, %45
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br label %69

69:                                               ; preds = %58, %66, %.critedge.1
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %70 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  %71 = trunc i64 %70 to i32
  %72 = trunc nsw i64 %23 to i32
  %73 = call noundef zeroext i1 @_Z5validiii(i32 noundef %72, i32 noundef %20, i32 noundef %71)
  br i1 %73, label %74, label %.critedge.2

74:                                               ; preds = %69
  %75 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %23) #3
  %76 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %75, i64 noundef %19)
  %77 = extractvalue { ptr, i64 } %76, 0
  store ptr %77, ptr %7, align 8
  %78 = extractvalue { ptr, i64 } %76, 1
  store i64 %78, ptr %16, align 8
  %79 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #3
  br i1 %79, label %.critedge.2, label %80

80:                                               ; preds = %74
  %81 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %8) #3
  %82 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %10) #3
  %83 = load i8, ptr %82, align 1, !tbaa !5
  %84 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %23) #3
  %85 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %19) #3
  %86 = load i8, ptr %85, align 1, !tbaa !5
  %87 = icmp eq i8 %83, %86
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br i1 %87, label %88, label %91

88:                                               ; preds = %80
  %89 = load i32, ptr %0, align 4, !tbaa !8
  %90 = add nsw i32 %89, 1
  store i32 %90, ptr %0, align 4, !tbaa !8
  call void @_Z3dfsRiiiRSt6vectorIS0_IbSaIbEESaIS2_EERS0_IS0_IcSaIcEESaIS7_EE(ptr noundef nonnull align 4 dereferenceable(4) %0, i32 noundef %72, i32 noundef %20, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4)
  br label %91

.critedge.2:                                      ; preds = %74, %69
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br label %91

91:                                               ; preds = %.critedge.2, %88, %80
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 2
  br i1 %exitcond.not, label %21, label %22, !llvm.loop !10
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass