; LLVM IR from lesialin/ImageSignalProcessing_C :: src/isp_blc.ll (Z7isp_blcPt)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_isp_config = external global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7isp_blcPt(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i16, align 2
  %4 = alloca i16, align 2
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i16, align 2
  %12 = alloca i16, align 2
  %13 = alloca i16, align 2
  %14 = alloca i16, align 2
  %15 = alloca i16, align 2
  %16 = alloca i32, align 4
  %17 = alloca i16, align 2
  %18 = alloca i16, align 2
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %14) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %15) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %17) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %18) #2
  %22 = load i32, ptr @g_isp_config, align 8, !tbaa !9
  %23 = trunc i32 %22 to i16
  store i16 %23, ptr %3, align 2, !tbaa !25
  %24 = load i32, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 1), align 4, !tbaa !26
  %25 = trunc i32 %24 to i16
  store i16 %25, ptr %4, align 2, !tbaa !25
  %26 = load i16, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 2), align 8, !tbaa !27
  %27 = zext i16 %26 to i32
  %28 = shl i32 1, %27
  %29 = sub nsw i32 %28, 1
  %30 = trunc i32 %29 to i16
  store i16 %30, ptr %5, align 2, !tbaa !25
  %31 = load i16, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 5), align 8, !tbaa !28
  store i16 %31, ptr %6, align 2, !tbaa !25
  %32 = load i16, ptr getelementptr inbounds (%struct.blc_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 5), i32 0, i32 1), align 2, !tbaa !29
  store i16 %32, ptr %7, align 2, !tbaa !25
  %33 = load i16, ptr getelementptr inbounds (%struct.blc_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 5), i32 0, i32 2), align 4, !tbaa !30
  store i16 %33, ptr %8, align 2, !tbaa !25
  %34 = load i16, ptr getelementptr inbounds (%struct.blc_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 5), i32 0, i32 3), align 2, !tbaa !31
  store i16 %34, ptr %9, align 2, !tbaa !25
  %35 = load float, ptr getelementptr inbounds (%struct.blc_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 5), i32 0, i32 4), align 8, !tbaa !32
  %36 = fmul float %35, 1.638400e+04
  %37 = fptoui float %36 to i16
  store i16 %37, ptr %14, align 2, !tbaa !25
  %38 = load float, ptr getelementptr inbounds (%struct.blc_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 5), i32 0, i32 5), align 4, !tbaa !33
  %39 = fmul float %38, 1.638400e+04
  %40 = fptoui float %39 to i16
  store i16 %40, ptr %15, align 2, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #2
  store i32 2, ptr %19, align 4, !tbaa !34
  br label %41

41:                                               ; preds = %235, %1
  %42 = load i32, ptr %19, align 4, !tbaa !34
  %43 = load i16, ptr %4, align 2, !tbaa !25
  %44 = zext i16 %43 to i32
  %45 = sub nsw i32 %44, 2
  %46 = icmp slt i32 %42, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %41
  store i32 2, ptr %20, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #2
  br label %238

48:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #2
  store i32 2, ptr %21, align 4, !tbaa !34
  br label %49

49:                                               ; preds = %231, %48
  %50 = load i32, ptr %21, align 4, !tbaa !34
  %51 = load i16, ptr %3, align 2, !tbaa !25
  %52 = zext i16 %51 to i32
  %53 = sub nsw i32 %52, 2
  %54 = icmp slt i32 %50, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %49
  store i32 5, ptr %20, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #2
  br label %234

56:                                               ; preds = %49
  %57 = load i32, ptr %19, align 4, !tbaa !34
  %58 = load i16, ptr %3, align 2, !tbaa !25
  %59 = zext i16 %58 to i32
  %60 = mul nsw i32 %57, %59
  %61 = load i32, ptr %21, align 4, !tbaa !34
  %62 = add nsw i32 %60, %61
  store i32 %62, ptr %16, align 4, !tbaa !34
  %63 = load ptr, ptr %2, align 8, !tbaa !5
  %64 = load i32, ptr %16, align 4, !tbaa !34
  %65 = zext i32 %64 to i64
  %66 = getelementptr inbounds i16, ptr %63, i64 %65
  %67 = load i16, ptr %66, align 2, !tbaa !25
  store i16 %67, ptr %10, align 2, !tbaa !25
  %68 = load ptr, ptr %2, align 8, !tbaa !5
  %69 = load i32, ptr %16, align 4, !tbaa !34
  %70 = add i32 %69, 1
  %71 = zext i32 %70 to i64
  %72 = getelementptr inbounds i16, ptr %68, i64 %71
  %73 = load i16, ptr %72, align 2, !tbaa !25
  store i16 %73, ptr %11, align 2, !tbaa !25
  %74 = load ptr, ptr %2, align 8, !tbaa !5
  %75 = load i32, ptr %16, align 4, !tbaa !34
  %76 = load i16, ptr %3, align 2, !tbaa !25
  %77 = zext i16 %76 to i32
  %78 = add i32 %75, %77
  %79 = zext i32 %78 to i64
  %80 = getelementptr inbounds i16, ptr %74, i64 %79
  %81 = load i16, ptr %80, align 2, !tbaa !25
  store i16 %81, ptr %12, align 2, !tbaa !25
  %82 = load ptr, ptr %2, align 8, !tbaa !5
  %83 = load i32, ptr %16, align 4, !tbaa !34
  %84 = load i16, ptr %3, align 2, !tbaa !25
  %85 = zext i16 %84 to i32
  %86 = add i32 %83, %85
  %87 = add i32 %86, 1
  %88 = zext i32 %87 to i64
  %89 = getelementptr inbounds i16, ptr %82, i64 %88
  %90 = load i16, ptr %89, align 2, !tbaa !25
  store i16 %90, ptr %13, align 2, !tbaa !25
  %91 = load i16, ptr %10, align 2, !tbaa !25
  %92 = zext i16 %91 to i32
  %93 = load i16, ptr %6, align 2, !tbaa !25
  %94 = zext i16 %93 to i32
  %95 = icmp sgt i32 %92, %94
  br i1 %95, label %96, label %102

96:                                               ; preds = %56
  %97 = load i16, ptr %10, align 2, !tbaa !25
  %98 = zext i16 %97 to i32
  %99 = load i16, ptr %6, align 2, !tbaa !25
  %100 = zext i16 %99 to i32
  %101 = sub nsw i32 %98, %100
  br label %103

102:                                              ; preds = %56
  br label %103

103:                                              ; preds = %102, %96
  %104 = phi i32 [ %101, %96 ], [ 0, %102 ]
  %105 = trunc i32 %104 to i16
  store i16 %105, ptr %10, align 2, !tbaa !25
  %106 = load i16, ptr %11, align 2, !tbaa !25
  %107 = zext i16 %106 to i32
  %108 = load i16, ptr %7, align 2, !tbaa !25
  %109 = zext i16 %108 to i32
  %110 = icmp sgt i32 %107, %109
  br i1 %110, label %111, label %117

111:                                              ; preds = %103
  %112 = load i16, ptr %11, align 2, !tbaa !25
  %113 = zext i16 %112 to i32
  %114 = load i16, ptr %7, align 2, !tbaa !25
  %115 = zext i16 %114 to i32
  %116 = sub nsw i32 %113, %115
  br label %118

117:                                              ; preds = %103
  br label %118

118:                                              ; preds = %117, %111
  %119 = phi i32 [ %116, %111 ], [ 0, %117 ]
  %120 = trunc i32 %119 to i16
  store i16 %120, ptr %11, align 2, !tbaa !25
  %121 = load i16, ptr %12, align 2, !tbaa !25
  %122 = zext i16 %121 to i32
  %123 = load i16, ptr %8, align 2, !tbaa !25
  %124 = zext i16 %123 to i32
  %125 = icmp sgt i32 %122, %124
  br i1 %125, label %126, label %132

126:                                              ; preds = %118
  %127 = load i16, ptr %12, align 2, !tbaa !25
  %128 = zext i16 %127 to i32
  %129 = load i16, ptr %8, align 2, !tbaa !25
  %130 = zext i16 %129 to i32
  %131 = sub nsw i32 %128, %130
  br label %133

132:                                              ; preds = %118
  br label %133

133:                                              ; preds = %132, %126
  %134 = phi i32 [ %131, %126 ], [ 0, %132 ]
  %135 = trunc i32 %134 to i16
  store i16 %135, ptr %12, align 2, !tbaa !25
  %136 = load i16, ptr %13, align 2, !tbaa !25
  %137 = zext i16 %136 to i32
  %138 = load i16, ptr %9, align 2, !tbaa !25
  %139 = zext i16 %138 to i32
  %140 = icmp sgt i32 %137, %139
  br i1 %140, label %141, label %147

141:                                              ; preds = %133
  %142 = load i16, ptr %13, align 2, !tbaa !25
  %143 = zext i16 %142 to i32
  %144 = load i16, ptr %9, align 2, !tbaa !25
  %145 = zext i16 %144 to i32
  %146 = sub nsw i32 %143, %145
  br label %148

147:                                              ; preds = %133
  br label %148

148:                                              ; preds = %147, %141
  %149 = phi i32 [ %146, %141 ], [ 0, %147 ]
  %150 = trunc i32 %149 to i16
  store i16 %150, ptr %13, align 2, !tbaa !25
  %151 = load i16, ptr %10, align 2, !tbaa !25
  %152 = zext i16 %151 to i32
  %153 = load i16, ptr %14, align 2, !tbaa !25
  %154 = zext i16 %153 to i32
  %155 = mul nsw i32 %152, %154
  %156 = ashr i32 %155, 14
  %157 = trunc i32 %156 to i16
  store i16 %157, ptr %17, align 2, !tbaa !25
  %158 = load i16, ptr %13, align 2, !tbaa !25
  %159 = zext i16 %158 to i32
  %160 = load i16, ptr %15, align 2, !tbaa !25
  %161 = zext i16 %160 to i32
  %162 = mul nsw i32 %159, %161
  %163 = ashr i32 %162, 14
  %164 = trunc i32 %163 to i16
  store i16 %164, ptr %18, align 2, !tbaa !25
  %165 = load i16, ptr %10, align 2, !tbaa !25
  %166 = load ptr, ptr %2, align 8, !tbaa !5
  %167 = load i32, ptr %16, align 4, !tbaa !34
  %168 = zext i32 %167 to i64
  %169 = getelementptr inbounds i16, ptr %166, i64 %168
  store i16 %165, ptr %169, align 2, !tbaa !25
  %170 = load i16, ptr %11, align 2, !tbaa !25
  %171 = zext i16 %170 to i32
  %172 = load i16, ptr %17, align 2, !tbaa !25
  %173 = zext i16 %172 to i32
  %174 = add nsw i32 %171, %173
  %175 = load i16, ptr %5, align 2, !tbaa !25
  %176 = zext i16 %175 to i32
  %177 = icmp sgt i32 %174, %176
  br i1 %177, label %178, label %181

178:                                              ; preds = %148
  %179 = load i16, ptr %5, align 2, !tbaa !25
  %180 = zext i16 %179 to i32
  br label %187

181:                                              ; preds = %148
  %182 = load i16, ptr %11, align 2, !tbaa !25
  %183 = zext i16 %182 to i32
  %184 = load i16, ptr %17, align 2, !tbaa !25
  %185 = zext i16 %184 to i32
  %186 = add nsw i32 %183, %185
  br label %187

187:                                              ; preds = %181, %178
  %188 = phi i32 [ %180, %178 ], [ %186, %181 ]
  %189 = trunc i32 %188 to i16
  %190 = load ptr, ptr %2, align 8, !tbaa !5
  %191 = load i32, ptr %16, align 4, !tbaa !34
  %192 = add i32 %191, 1
  %193 = zext i32 %192 to i64
  %194 = getelementptr inbounds i16, ptr %190, i64 %193
  store i16 %189, ptr %194, align 2, !tbaa !25
  %195 = load i16, ptr %12, align 2, !tbaa !25
  %196 = zext i16 %195 to i32
  %197 = load i16, ptr %18, align 2, !tbaa !25
  %198 = zext i16 %197 to i32
  %199 = add nsw i32 %196, %198
  %200 = load i16, ptr %5, align 2, !tbaa !25
  %201 = zext i16 %200 to i32
  %202 = icmp sgt i32 %199, %201
  br i1 %202, label %203, label %206

203:                                              ; preds = %187
  %204 = load i16, ptr %5, align 2, !tbaa !25
  %205 = zext i16 %204 to i32
  br label %212

206:                                              ; preds = %187
  %207 = load i16, ptr %12, align 2, !tbaa !25
  %208 = zext i16 %207 to i32
  %209 = load i16, ptr %18, align 2, !tbaa !25
  %210 = zext i16 %209 to i32
  %211 = add nsw i32 %208, %210
  br label %212

212:                                              ; preds = %206, %203
  %213 = phi i32 [ %205, %203 ], [ %211, %206 ]
  %214 = trunc i32 %213 to i16
  %215 = load ptr, ptr %2, align 8, !tbaa !5
  %216 = load i32, ptr %16, align 4, !tbaa !34
  %217 = load i16, ptr %3, align 2, !tbaa !25
  %218 = zext i16 %217 to i32
  %219 = add i32 %216, %218
  %220 = zext i32 %219 to i64
  %221 = getelementptr inbounds i16, ptr %215, i64 %220
  store i16 %214, ptr %221, align 2, !tbaa !25
  %222 = load i16, ptr %13, align 2, !tbaa !25
  %223 = load ptr, ptr %2, align 8, !tbaa !5
  %224 = load i32, ptr %16, align 4, !tbaa !34
  %225 = load i16, ptr %3, align 2, !tbaa !25
  %226 = zext i16 %225 to i32
  %227 = add i32 %224, %226
  %228 = add i32 %227, 1
  %229 = zext i32 %228 to i64
  %230 = getelementptr inbounds i16, ptr %223, i64 %229
  store i16 %222, ptr %230, align 2, !tbaa !25
  br label %231

231:                                              ; preds = %212
  %232 = load i32, ptr %21, align 4, !tbaa !34
  %233 = add nsw i32 %232, 2
  store i32 %233, ptr %21, align 4, !tbaa !34
  br label %49, !llvm.loop !35

234:                                              ; preds = %55
  br label %235

235:                                              ; preds = %234
  %236 = load i32, ptr %19, align 4, !tbaa !34
  %237 = add nsw i32 %236, 2
  store i32 %237, ptr %19, align 4, !tbaa !34
  br label %41, !llvm.loop !37

238:                                              ; preds = %47
  call void @llvm.lifetime.end.p0(i64 2, ptr %18) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %17) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS12isp_config_t", !11, i64 0, !11, i64 4, !12, i64 8, !13, i64 16, !16, i64 48, !12, i64 64, !13, i64 72, !18, i64 104, !7, i64 120, !13, i64 168, !17, i64 200, !7, i64 204, !19, i64 252, !20, i64 256, !7, i64 320, !21, i64 350, !22, i64 362, !23, i64 364, !24, i64 372}
!11 = !{!"int", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTS9blc_cfg_t", !12, i64 0, !12, i64 2, !12, i64 4, !12, i64 6, !17, i64 8, !17, i64 12}
!17 = !{!"float", !7, i64 0}
!18 = !{!"_ZTS10awb_gain_t", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12}
!19 = !{!"_ZTS9nlm_cfg_t", !7, i64 0, !7, i64 1, !7, i64 2}
!20 = !{!"_ZTS9bnf_cfg_t", !7, i64 0, !7, i64 50, !7, i64 58}
!21 = !{!"_ZTS9eeh_cfg_t", !12, i64 0, !12, i64 2, !12, i64 4, !12, i64 6, !12, i64 8, !12, i64 10}
!22 = !{!"_ZTS9fcs_cfg_t", !7, i64 0, !7, i64 1}
!23 = !{!"_ZTS9hsc_cfg_t", !7, i64 0, !17, i64 4}
!24 = !{!"_ZTS9bcc_cfg_t", !7, i64 0, !17, i64 4}
!25 = !{!12, !12, i64 0}
!26 = !{!10, !11, i64 4}
!27 = !{!10, !12, i64 8}
!28 = !{!10, !12, i64 48}
!29 = !{!10, !12, i64 50}
!30 = !{!10, !12, i64 52}
!31 = !{!10, !12, i64 54}
!32 = !{!10, !17, i64 56}
!33 = !{!10, !17, i64 60}
!34 = !{!11, !11, i64 0}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}
!37 = distinct !{!37, !36}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_isp_config = external local_unnamed_addr global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @_Z7isp_blcPt(ptr nocapture noundef %0) local_unnamed_addr #0 {
  %2 = load i32, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 4), align 4, !tbaa !5
  %3 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 48), align 8, !tbaa !24
  %4 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 50), align 2, !tbaa !25
  %5 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 52), align 4, !tbaa !26
  %6 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 54), align 2, !tbaa !27
  %7 = and i32 %2, 65535
  %8 = add nsw i32 %7, -2
  %9 = icmp ugt i32 %7, 4
  br i1 %9, label %.preheader.lr.ph, label %._crit_edge65

.preheader.lr.ph:                                 ; preds = %1
  %10 = load float, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 60), align 4, !tbaa !28
  %11 = fmul float %10, 1.638400e+04
  %12 = fptoui float %11 to i16
  %13 = load float, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 56), align 8, !tbaa !29
  %14 = fmul float %13, 1.638400e+04
  %15 = fptoui float %14 to i16
  %16 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 8), align 8, !tbaa !30
  %17 = zext nneg i16 %16 to i32
  %notmask = shl nsw i32 -1, %17
  %18 = load i32, ptr @g_isp_config, align 8, !tbaa !31
  %19 = and i32 %18, 65535
  %20 = icmp ugt i32 %19, 4
  %21 = zext i16 %15 to i32
  %22 = zext i16 %12 to i32
  %23 = and i32 %notmask, 65535
  %24 = xor i32 %23, 65535
  br i1 %20, label %.preheader.us.preheader, label %._crit_edge65

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %25 = add nsw i32 %19, -2
  %26 = zext nneg i32 %19 to i64
  %27 = zext i32 %25 to i64
  %28 = zext i32 %8 to i64
  %invariant.gep = getelementptr inbounds i8, ptr %0, i64 2
  %umax = tail call i64 @llvm.umax.i64(i64 %27, i64 4)
  %29 = mul nuw nsw i64 %26, 6
  %30 = shl nuw nsw i64 %26, 2
  %31 = shl nuw nsw i64 %26, 2
  %32 = getelementptr i8, ptr %0, i64 %31
  %scevgep71 = getelementptr i8, ptr %32, i64 4
  %umax72 = tail call i64 @llvm.umax.i64(i64 %28, i64 4)
  %33 = shl nuw nsw i64 %umax72, 1
  %34 = add nsw i64 %33, -6
  %35 = and i64 %34, -4
  %36 = add nuw nsw i64 %35, 4
  %37 = mul nsw i64 %36, %26
  %umax73 = tail call i64 @llvm.umax.i64(i64 %27, i64 4)
  %38 = shl nuw nsw i64 %umax73, 1
  %39 = add nsw i64 %38, -6
  %40 = and i64 %39, -4
  %41 = add i64 %37, %40
  %42 = getelementptr i8, ptr %0, i64 %41
  %scevgep74 = getelementptr i8, ptr %42, i64 6
  %43 = getelementptr i8, ptr %0, i64 %31
  %scevgep75 = getelementptr i8, ptr %43, i64 6
  %44 = getelementptr i8, ptr %0, i64 %41
  %scevgep76 = getelementptr i8, ptr %44, i64 8
  %45 = mul nuw nsw i64 %26, 6
  %46 = getelementptr i8, ptr %0, i64 %45
  %scevgep77 = getelementptr i8, ptr %46, i64 4
  %47 = add nuw nsw i64 %35, 6
  %48 = mul nsw i64 %47, %26
  %49 = add i64 %48, %40
  %50 = getelementptr i8, ptr %0, i64 %49
  %scevgep78 = getelementptr i8, ptr %50, i64 6
  %51 = getelementptr i8, ptr %0, i64 %45
  %scevgep79 = getelementptr i8, ptr %51, i64 6
  %52 = getelementptr i8, ptr %0, i64 %49
  %scevgep80 = getelementptr i8, ptr %52, i64 8
  %umax100 = tail call i64 @llvm.umax.i64(i64 %27, i64 4)
  %53 = add nsw i64 %umax100, -3
  %54 = lshr i64 %53, 1
  %55 = add nuw nsw i64 %54, 1
  %min.iters.check = icmp ult i64 %53, 14
  %56 = getelementptr i8, ptr %0, i64 %29
  %57 = getelementptr i8, ptr %56, i64 6
  %58 = shl nuw nsw i64 %umax, 1
  %59 = add nsw i64 %58, -6
  %mul.result = and i64 %59, -4
  %bound0 = icmp ult ptr %scevgep71, %scevgep76
  %bound1 = icmp ult ptr %43, %42
  %found.conflict = and i1 %bound0, %bound1
  %bound081 = icmp ult ptr %scevgep71, %scevgep78
  %bound182 = icmp ult ptr %scevgep77, %scevgep74
  %found.conflict83 = and i1 %bound081, %bound182
  %conflict.rdx = or i1 %found.conflict, %found.conflict83
  %bound084 = icmp ult ptr %scevgep71, %scevgep80
  %bound185 = icmp ult ptr %51, %42
  %found.conflict86 = and i1 %bound084, %bound185
  %conflict.rdx87 = or i1 %conflict.rdx, %found.conflict86
  %bound088 = icmp ult ptr %43, %50
  %bound189 = icmp ult ptr %scevgep77, %scevgep76
  %found.conflict90 = and i1 %bound088, %bound189
  %conflict.rdx91 = or i1 %conflict.rdx87, %found.conflict90
  %bound092 = icmp ult ptr %scevgep75, %scevgep80
  %bound193 = icmp ult ptr %scevgep79, %scevgep76
  %found.conflict94 = and i1 %bound092, %bound193
  %conflict.rdx95 = or i1 %conflict.rdx91, %found.conflict94
  %bound096 = icmp ult ptr %scevgep77, %scevgep80
  %bound197 = icmp ult ptr %51, %50
  %found.conflict98 = and i1 %bound096, %bound197
  %conflict.rdx99 = or i1 %conflict.rdx95, %found.conflict98
  %n.vec = and i64 %55, 9223372036854775804
  %60 = shl nuw i64 %n.vec, 1
  %ind.end = or disjoint i64 %60, 2
  %broadcast.splatinsert = insertelement <4 x i16> poison, i16 %3, i64 0
  %broadcast.splat = shufflevector <4 x i16> %broadcast.splatinsert, <4 x i16> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert105 = insertelement <4 x i16> poison, i16 %4, i64 0
  %broadcast.splat106 = shufflevector <4 x i16> %broadcast.splatinsert105, <4 x i16> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert107 = insertelement <4 x i16> poison, i16 %5, i64 0
  %broadcast.splat108 = shufflevector <4 x i16> %broadcast.splatinsert107, <4 x i16> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert109 = insertelement <4 x i16> poison, i16 %6, i64 0
  %broadcast.splat110 = shufflevector <4 x i16> %broadcast.splatinsert109, <4 x i16> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert111 = insertelement <4 x i32> poison, i32 %21, i64 0
  %broadcast.splat112 = shufflevector <4 x i32> %broadcast.splatinsert111, <4 x i32> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert113 = insertelement <4 x i32> poison, i32 %22, i64 0
  %broadcast.splat114 = shufflevector <4 x i32> %broadcast.splatinsert113, <4 x i32> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert115 = insertelement <4 x i32> poison, i32 %24, i64 0
  %broadcast.splat116 = shufflevector <4 x i32> %broadcast.splatinsert115, <4 x i32> poison, <4 x i32> zeroinitializer
  %invariant.gep118 = getelementptr i8, ptr %0, i64 -2
  %invariant.gep120 = getelementptr i8, ptr %invariant.gep, i64 -2
  %cmp.n = icmp eq i64 %55, %n.vec
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %indvar = phi i64 [ 0, %.preheader.us.preheader ], [ %indvar.next, %._crit_edge.us ]
  %indvars.iv68 = phi i64 [ 2, %.preheader.us.preheader ], [ %indvars.iv.next69, %._crit_edge.us ]
  %61 = mul nuw nsw i64 %indvars.iv68, %26
  %62 = mul i64 %30, %indvar
  %scevgep = getelementptr i8, ptr %57, i64 %62
  %63 = getelementptr i8, ptr %scevgep, i64 %mul.result
  %64 = icmp ult ptr %63, %scevgep
  %or.cond = select i1 %min.iters.check, i1 true, i1 %64
  %brmerge = select i1 %or.cond, i1 true, i1 %conflict.rdx99
  br i1 %brmerge, label %scalar.ph.preheader, label %vector.body

vector.body:                                      ; preds = %.preheader.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader.us ]
  %65 = shl i64 %index, 1
  %offset.idx = or disjoint i64 %65, 2
  %66 = add nuw nsw i64 %offset.idx, %61
  %67 = getelementptr inbounds i16, ptr %0, i64 %66
  %wide.vec = load <8 x i16>, ptr %67, align 2, !tbaa !32
  %strided.vec = shufflevector <8 x i16> %wide.vec, <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %strided.vec101 = shufflevector <8 x i16> %wide.vec, <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %68 = or disjoint i64 %66, 1
  %69 = add nuw nsw i64 %66, %26
  %70 = getelementptr inbounds i16, ptr %0, i64 %69
  %wide.vec102 = load <8 x i16>, ptr %70, align 2, !tbaa !32
  %strided.vec103 = shufflevector <8 x i16> %wide.vec102, <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %strided.vec104 = shufflevector <8 x i16> %wide.vec102, <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %71 = tail call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %strided.vec, <4 x i16> %broadcast.splat)
  %72 = tail call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %strided.vec101, <4 x i16> %broadcast.splat106)
  %73 = tail call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %strided.vec103, <4 x i16> %broadcast.splat108)
  %74 = tail call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %strided.vec104, <4 x i16> %broadcast.splat110)
  %75 = zext <4 x i16> %71 to <4 x i32>
  %76 = mul nuw nsw <4 x i32> %broadcast.splat112, %75
  %77 = lshr <4 x i32> %76, <i32 14, i32 14, i32 14, i32 14>
  %78 = zext <4 x i16> %74 to <4 x i32>
  %79 = mul nuw nsw <4 x i32> %broadcast.splat114, %78
  %80 = lshr <4 x i32> %79, <i32 14, i32 14, i32 14, i32 14>
  %81 = zext <4 x i16> %72 to <4 x i32>
  %82 = and <4 x i32> %77, <i32 65535, i32 65535, i32 65535, i32 65535>
  %83 = add nuw nsw <4 x i32> %82, %81
  %84 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %83, <4 x i32> %broadcast.splat116)
  %85 = trunc nuw <4 x i32> %84 to <4 x i16>
  %gep119 = getelementptr i16, ptr %invariant.gep118, i64 %68
  %interleaved.vec = shufflevector <4 x i16> %71, <4 x i16> %85, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
  store <8 x i16> %interleaved.vec, ptr %gep119, align 2, !tbaa !32
  %86 = zext <4 x i16> %73 to <4 x i32>
  %87 = and <4 x i32> %80, <i32 65535, i32 65535, i32 65535, i32 65535>
  %88 = add nuw nsw <4 x i32> %87, %86
  %89 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %88, <4 x i32> %broadcast.splat116)
  %90 = trunc nuw <4 x i32> %89 to <4 x i16>
  %gep121 = getelementptr i16, ptr %invariant.gep120, i64 %69
  %interleaved.vec117 = shufflevector <4 x i16> %90, <4 x i16> %74, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
  store <8 x i16> %interleaved.vec117, ptr %gep121, align 2, !tbaa !32
  %index.next = add nuw i64 %index, 4
  %91 = icmp eq i64 %index.next, %n.vec
  br i1 %91, label %middle.block, label %vector.body, !llvm.loop !33

middle.block:                                     ; preds = %vector.body
  br i1 %cmp.n, label %._crit_edge.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %.preheader.us, %middle.block
  %indvars.iv.ph = phi i64 [ 2, %.preheader.us ], [ %ind.end, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %92 = add nuw nsw i64 %indvars.iv, %61
  %93 = getelementptr inbounds i16, ptr %0, i64 %92
  %94 = load i16, ptr %93, align 2, !tbaa !32
  %95 = or disjoint i64 %92, 1
  %96 = getelementptr inbounds i16, ptr %0, i64 %95
  %97 = load i16, ptr %96, align 2, !tbaa !32
  %98 = add nuw nsw i64 %92, %26
  %99 = getelementptr inbounds i16, ptr %0, i64 %98
  %100 = load i16, ptr %99, align 2, !tbaa !32
  %gep = getelementptr inbounds i16, ptr %invariant.gep, i64 %98
  %101 = load i16, ptr %gep, align 2, !tbaa !32
  %102 = tail call i16 @llvm.usub.sat.i16(i16 %94, i16 %3)
  %103 = tail call i16 @llvm.usub.sat.i16(i16 %97, i16 %4)
  %104 = tail call i16 @llvm.usub.sat.i16(i16 %100, i16 %5)
  %105 = tail call i16 @llvm.usub.sat.i16(i16 %101, i16 %6)
  %106 = zext i16 %102 to i32
  %107 = mul nuw nsw i32 %106, %21
  %108 = lshr i32 %107, 14
  %109 = zext i16 %105 to i32
  %110 = mul nuw nsw i32 %109, %22
  %111 = lshr i32 %110, 14
  store i16 %102, ptr %93, align 2, !tbaa !32
  %112 = zext i16 %103 to i32
  %113 = and i32 %108, 65535
  %114 = add nuw nsw i32 %113, %112
  %115 = tail call i32 @llvm.umin.i32(i32 %114, i32 %24)
  %116 = trunc nuw i32 %115 to i16
  store i16 %116, ptr %96, align 2, !tbaa !32
  %117 = zext i16 %104 to i32
  %118 = and i32 %111, 65535
  %119 = add nuw nsw i32 %118, %117
  %120 = tail call i32 @llvm.umin.i32(i32 %119, i32 %24)
  %121 = trunc nuw i32 %120 to i16
  store i16 %121, ptr %99, align 2, !tbaa !32
  store i16 %105, ptr %gep, align 2, !tbaa !32
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
  %122 = icmp ult i64 %indvars.iv.next, %27
  br i1 %122, label %scalar.ph, label %._crit_edge.us, !llvm.loop !37

._crit_edge.us:                                   ; preds = %scalar.ph, %middle.block
  %indvars.iv.next69 = add nuw nsw i64 %indvars.iv68, 2
  %123 = icmp ult i64 %indvars.iv.next69, %28
  %indvar.next = add i64 %indvar, 1
  br i1 %123, label %.preheader.us, label %._crit_edge65, !llvm.loop !38

._crit_edge65:                                    ; preds = %._crit_edge.us, %.preheader.lr.ph, %1
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i16 @llvm.usub.sat.i16(i16, i16) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i16> @llvm.usub.sat.v4i16(<4 x i16>, <4 x i16>) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"_ZTS12isp_config_t", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !15, i64 48, !10, i64 64, !11, i64 72, !17, i64 104, !8, i64 120, !11, i64 168, !16, i64 200, !8, i64 204, !18, i64 252, !19, i64 256, !8, i64 320, !20, i64 350, !21, i64 362, !22, i64 364, !23, i64 372}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !8, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!"_ZTS9blc_cfg_t", !10, i64 0, !10, i64 2, !10, i64 4, !10, i64 6, !16, i64 8, !16, i64 12}
!16 = !{!"float", !8, i64 0}
!17 = !{!"_ZTS10awb_gain_t", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12}
!18 = !{!"_ZTS9nlm_cfg_t", !8, i64 0, !8, i64 1, !8, i64 2}
!19 = !{!"_ZTS9bnf_cfg_t", !8, i64 0, !8, i64 50, !8, i64 58}
!20 = !{!"_ZTS9eeh_cfg_t", !10, i64 0, !10, i64 2, !10, i64 4, !10, i64 6, !10, i64 8, !10, i64 10}
!21 = !{!"_ZTS9fcs_cfg_t", !8, i64 0, !8, i64 1}
!22 = !{!"_ZTS9hsc_cfg_t", !8, i64 0, !16, i64 4}
!23 = !{!"_ZTS9bcc_cfg_t", !8, i64 0, !16, i64 4}
!24 = !{!6, !10, i64 48}
!25 = !{!6, !10, i64 50}
!26 = !{!6, !10, i64 52}
!27 = !{!6, !10, i64 54}
!28 = !{!6, !16, i64 60}
!29 = !{!6, !16, i64 56}
!30 = !{!6, !10, i64 8}
!31 = !{!6, !7, i64 0}
!32 = !{!10, !10, i64 0}
!33 = distinct !{!33, !34, !35, !36}
!34 = !{!"llvm.loop.mustprogress"}
!35 = !{!"llvm.loop.isvectorized", i32 1}
!36 = !{!"llvm.loop.unroll.runtime.disable"}
!37 = distinct !{!37, !34, !35}
!38 = distinct !{!38, !34}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalDCEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass