; LLVM IR from jorgemf/c-evolutionary-library :: src/NeuralNet.ll (ZN9NeuralNet13createNeuronsEiiPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator.12" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.11" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.14" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.13" = type { ptr }
%class.NeuralNet = type { ptr, i32, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.0", ptr, %"class.std::vector.5", ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<InputNeuron *, std::allocator<InputNeuron *>>::_Vector_impl" }
%"struct.std::_Vector_base<InputNeuron *, std::allocator<InputNeuron *>>::_Vector_impl" = type { %"struct.std::_Vector_base<InputNeuron *, std::allocator<InputNeuron *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<InputNeuron *, std::allocator<InputNeuron *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Neuron *, std::allocator<Neuron *>>::_Vector_impl" }
%"struct.std::_Vector_base<Neuron *, std::allocator<Neuron *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Neuron *, std::allocator<Neuron *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Neuron *, std::allocator<Neuron *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Connection *, std::allocator<Connection *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #3

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #2

declare void @_ZN10BiasNeuronC1Ei(ptr noundef nonnull align 8 dereferenceable(80), i32 noundef) unnamed_addr #4

declare void @_ZN11InputNeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80), i32 noundef, i32 noundef) unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare dso_local ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr, ptr noundef nonnull align 8 dereferenceable(8)) #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9__gnu_cxx17__normal_iteratorIPKP11InputNeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #6 align 2

declare void @_ZN6NeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80), i32 noundef, i32 noundef) unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare dso_local ptr @_ZNSt6vectorIP6NeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EERS6_(ptr noundef nonnull align 8 dereferenceable(24), ptr, ptr noundef nonnull align 8 dereferenceable(8)) #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP6NeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #6 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9__gnu_cxx17__normal_iteratorIPKP6NeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #6 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9NeuralNet13createNeuronsEiiPii(ptr noundef nonnull align 8 dereferenceable(128) %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) #5 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca %"class.__gnu_cxx::__normal_iterator.12", align 8
  %18 = alloca %"class.__gnu_cxx::__normal_iterator.11", align 8
  %19 = alloca ptr, align 8
  %20 = alloca %"class.__gnu_cxx::__normal_iterator.11", align 8
  %21 = alloca %"class.__gnu_cxx::__normal_iterator.14", align 8
  %22 = alloca %"class.__gnu_cxx::__normal_iterator.13", align 8
  %23 = alloca %"class.__gnu_cxx::__normal_iterator.13", align 8
  %24 = alloca %"class.__gnu_cxx::__normal_iterator.14", align 8
  %25 = alloca %"class.__gnu_cxx::__normal_iterator.13", align 8
  %26 = alloca %"class.__gnu_cxx::__normal_iterator.13", align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !9
  %27 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #7
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = load i32, ptr %10, align 4, !tbaa !9
  %30 = add nsw i32 %28, %29
  %31 = add nsw i32 %30, 1
  store i32 %31, ptr %13, align 4, !tbaa !9
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %44, %5
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = load i32, ptr %8, align 4, !tbaa !9
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %36, label %47

36:                                               ; preds = %32
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = load i32, ptr %11, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds i32, ptr %37, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !9
  %42 = load i32, ptr %13, align 4, !tbaa !9
  %43 = add nsw i32 %42, %41
  store i32 %43, ptr %13, align 4, !tbaa !9
  br label %44

44:                                               ; preds = %36
  %45 = load i32, ptr %11, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %11, align 4, !tbaa !9
  br label %32, !llvm.loop !11

47:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #7
  store i32 0, ptr %14, align 4, !tbaa !9
  %48 = load i32, ptr %13, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %49, i64 8)
  %51 = extractvalue { i64, i1 } %50, 1
  %52 = extractvalue { i64, i1 } %50, 0
  %53 = select i1 %51, i64 -1, i64 %52
  %54 = call noalias noundef nonnull ptr @_Znam(i64 noundef %53) #8
  %55 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  store ptr %54, ptr %55, align 8, !tbaa !13
  %56 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 80) #8
  %57 = load i32, ptr %14, align 4, !tbaa !9
  invoke void @_ZN10BiasNeuronC1Ei(ptr noundef nonnull align 8 dereferenceable(80) %56, i32 noundef %57)
          to label %58 unwind label %103

58:                                               ; preds = %47
  %59 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 5
  store ptr %56, ptr %59, align 8, !tbaa !27
  %60 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 5
  %61 = load ptr, ptr %60, align 8, !tbaa !27
  %62 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  %63 = load ptr, ptr %62, align 8, !tbaa !13
  %64 = load i32, ptr %14, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds ptr, ptr %63, i64 %65
  store ptr %61, ptr %66, align 8, !tbaa !5
  %67 = load i32, ptr %14, align 4, !tbaa !9
  %68 = add nsw i32 %67, 1
  store i32 %68, ptr %14, align 4, !tbaa !9
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %69

69:                                               ; preds = %100, %58
  %70 = load i32, ptr %11, align 4, !tbaa !9
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = icmp slt i32 %70, %71
  br i1 %72, label %73, label %111

73:                                               ; preds = %69
  %74 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 80) #8
  %75 = load i32, ptr %14, align 4, !tbaa !9
  %76 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 1
  %77 = load i32, ptr %76, align 8, !tbaa !28
  invoke void @_ZN11InputNeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80) %74, i32 noundef %75, i32 noundef %77)
          to label %78 unwind label %107

78:                                               ; preds = %73
  %79 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  %80 = load ptr, ptr %79, align 8, !tbaa !13
  %81 = load i32, ptr %14, align 4, !tbaa !9
  %82 = sext i32 %81 to i64
  %83 = getelementptr inbounds ptr, ptr %80, i64 %82
  store ptr %74, ptr %83, align 8, !tbaa !5
  %84 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 2
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #7
  %85 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 2
  %86 = call ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %85) #7
  %87 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.11", ptr %18, i32 0, i32 0
  store ptr %86, ptr %87, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKP11InputNeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %18) #7
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #7
  %88 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  %89 = load ptr, ptr %88, align 8, !tbaa !13
  %90 = load i32, ptr %14, align 4, !tbaa !9
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds ptr, ptr %89, i64 %91
  %93 = load ptr, ptr %92, align 8, !tbaa !5
  store ptr %93, ptr %19, align 8, !tbaa !5
  %94 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.12", ptr %17, i32 0, i32 0
  %95 = load ptr, ptr %94, align 8
  %96 = call ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %84, ptr %95, ptr noundef nonnull align 8 dereferenceable(8) %19)
  %97 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.11", ptr %20, i32 0, i32 0
  store ptr %96, ptr %97, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #7
  %98 = load i32, ptr %14, align 4, !tbaa !9
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %14, align 4, !tbaa !9
  br label %100

100:                                              ; preds = %78
  %101 = load i32, ptr %11, align 4, !tbaa !9
  %102 = add nsw i32 %101, 1
  store i32 %102, ptr %11, align 4, !tbaa !9
  br label %69, !llvm.loop !29

103:                                              ; preds = %47
  %104 = landingpad { ptr, i32 }
          cleanup
  %105 = extractvalue { ptr, i32 } %104, 0
  store ptr %105, ptr %15, align 8
  %106 = extractvalue { ptr, i32 } %104, 1
  store i32 %106, ptr %16, align 4
  call void @_ZdlPvm(ptr noundef %56, i64 noundef 80) #9
  br label %201

107:                                              ; preds = %73
  %108 = landingpad { ptr, i32 }
          cleanup
  %109 = extractvalue { ptr, i32 } %108, 0
  store ptr %109, ptr %15, align 8
  %110 = extractvalue { ptr, i32 } %108, 1
  store i32 %110, ptr %16, align 4
  call void @_ZdlPvm(ptr noundef %74, i64 noundef 80) #9
  br label %201

111:                                              ; preds = %69
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %112

112:                                              ; preds = %159, %111
  %113 = load i32, ptr %12, align 4, !tbaa !9
  %114 = load i32, ptr %8, align 4, !tbaa !9
  %115 = icmp slt i32 %113, %114
  br i1 %115, label %116, label %162

116:                                              ; preds = %112
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %117

117:                                              ; preds = %151, %116
  %118 = load i32, ptr %11, align 4, !tbaa !9
  %119 = load ptr, ptr %9, align 8, !tbaa !5
  %120 = load i32, ptr %12, align 4, !tbaa !9
  %121 = sext i32 %120 to i64
  %122 = getelementptr inbounds i32, ptr %119, i64 %121
  %123 = load i32, ptr %122, align 4, !tbaa !9
  %124 = icmp slt i32 %118, %123
  br i1 %124, label %125, label %158

125:                                              ; preds = %117
  %126 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 80) #8
  %127 = load i32, ptr %14, align 4, !tbaa !9
  %128 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 1
  %129 = load i32, ptr %128, align 8, !tbaa !28
  invoke void @_ZN6NeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80) %126, i32 noundef %127, i32 noundef %129)
          to label %130 unwind label %154

130:                                              ; preds = %125
  %131 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  %132 = load ptr, ptr %131, align 8, !tbaa !13
  %133 = load i32, ptr %14, align 4, !tbaa !9
  %134 = sext i32 %133 to i64
  %135 = getelementptr inbounds ptr, ptr %132, i64 %134
  store ptr %126, ptr %135, align 8, !tbaa !5
  %136 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 3
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #7
  %137 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 3
  %138 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %137) #7
  %139 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.13", ptr %22, i32 0, i32 0
  store ptr %138, ptr %139, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKP6NeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8) %21, ptr noundef nonnull align 8 dereferenceable(8) %22) #7
  %140 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  %141 = load ptr, ptr %140, align 8, !tbaa !13
  %142 = load i32, ptr %14, align 4, !tbaa !9
  %143 = sext i32 %142 to i64
  %144 = getelementptr inbounds ptr, ptr %141, i64 %143
  %145 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.14", ptr %21, i32 0, i32 0
  %146 = load ptr, ptr %145, align 8
  %147 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EERS6_(ptr noundef nonnull align 8 dereferenceable(24) %136, ptr %146, ptr noundef nonnull align 8 dereferenceable(8) %144)
  %148 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.13", ptr %23, i32 0, i32 0
  store ptr %147, ptr %148, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #7
  %149 = load i32, ptr %14, align 4, !tbaa !9
  %150 = add nsw i32 %149, 1
  store i32 %150, ptr %14, align 4, !tbaa !9
  br label %151

151:                                              ; preds = %130
  %152 = load i32, ptr %11, align 4, !tbaa !9
  %153 = add nsw i32 %152, 1
  store i32 %153, ptr %11, align 4, !tbaa !9
  br label %117, !llvm.loop !30

154:                                              ; preds = %125
  %155 = landingpad { ptr, i32 }
          cleanup
  %156 = extractvalue { ptr, i32 } %155, 0
  store ptr %156, ptr %15, align 8
  %157 = extractvalue { ptr, i32 } %155, 1
  store i32 %157, ptr %16, align 4
  call void @_ZdlPvm(ptr noundef %126, i64 noundef 80) #9
  br label %201

158:                                              ; preds = %117
  br label %159

159:                                              ; preds = %158
  %160 = load i32, ptr %12, align 4, !tbaa !9
  %161 = add nsw i32 %160, 1
  store i32 %161, ptr %12, align 4, !tbaa !9
  br label %112, !llvm.loop !31

162:                                              ; preds = %112
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %163

163:                                              ; preds = %193, %162
  %164 = load i32, ptr %11, align 4, !tbaa !9
  %165 = load i32, ptr %10, align 4, !tbaa !9
  %166 = icmp slt i32 %164, %165
  br i1 %166, label %167, label %200

167:                                              ; preds = %163
  %168 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 80) #8
  %169 = load i32, ptr %14, align 4, !tbaa !9
  %170 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 1
  %171 = load i32, ptr %170, align 8, !tbaa !28
  invoke void @_ZN6NeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80) %168, i32 noundef %169, i32 noundef %171)
          to label %172 unwind label %196

172:                                              ; preds = %167
  %173 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  %174 = load ptr, ptr %173, align 8, !tbaa !13
  %175 = load i32, ptr %14, align 4, !tbaa !9
  %176 = sext i32 %175 to i64
  %177 = getelementptr inbounds ptr, ptr %174, i64 %176
  store ptr %168, ptr %177, align 8, !tbaa !5
  %178 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #7
  %179 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 4
  %180 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %179) #7
  %181 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.13", ptr %25, i32 0, i32 0
  store ptr %180, ptr %181, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKP6NeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8) %24, ptr noundef nonnull align 8 dereferenceable(8) %25) #7
  %182 = getelementptr inbounds %class.NeuralNet, ptr %27, i32 0, i32 7
  %183 = load ptr, ptr %182, align 8, !tbaa !13
  %184 = load i32, ptr %14, align 4, !tbaa !9
  %185 = sext i32 %184 to i64
  %186 = getelementptr inbounds ptr, ptr %183, i64 %185
  %187 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.14", ptr %24, i32 0, i32 0
  %188 = load ptr, ptr %187, align 8
  %189 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EERS6_(ptr noundef nonnull align 8 dereferenceable(24) %178, ptr %188, ptr noundef nonnull align 8 dereferenceable(8) %186)
  %190 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator.13", ptr %26, i32 0, i32 0
  store ptr %189, ptr %190, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #7
  %191 = load i32, ptr %14, align 4, !tbaa !9
  %192 = add nsw i32 %191, 1
  store i32 %192, ptr %14, align 4, !tbaa !9
  br label %193

193:                                              ; preds = %172
  %194 = load i32, ptr %11, align 4, !tbaa !9
  %195 = add nsw i32 %194, 1
  store i32 %195, ptr %11, align 4, !tbaa !9
  br label %163, !llvm.loop !32

196:                                              ; preds = %167
  %197 = landingpad { ptr, i32 }
          cleanup
  %198 = extractvalue { ptr, i32 } %197, 0
  store ptr %198, ptr %15, align 8
  %199 = extractvalue { ptr, i32 } %197, 1
  store i32 %199, ptr %16, align 4
  call void @_ZdlPvm(ptr noundef %168, i64 noundef 80) #9
  br label %201

200:                                              ; preds = %163
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  ret void

201:                                              ; preds = %196, %154, %107, %103
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #7
  br label %202

202:                                              ; preds = %201
  %203 = load ptr, ptr %15, align 8
  %204 = load i32, ptr %16, align 4
  %205 = insertvalue { ptr, i32 } poison, ptr %203, 0
  %206 = insertvalue { ptr, i32 } %205, i32 %204, 1
  resume { ptr, i32 } %206
}

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !6, i64 120}
!14 = !{!"_ZTS9NeuralNet", !10, i64 8, !15, i64 16, !19, i64 40, !19, i64 64, !6, i64 88, !23, i64 96, !6, i64 120}
!15 = !{!"_ZTSSt6vectorIP11InputNeuronSaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIP11InputNeuronSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIP11InputNeuronSaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11InputNeuronSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!"_ZTSSt6vectorIP6NeuronSaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIP6NeuronSaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIP6NeuronSaIS1_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIP6NeuronSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!14, !6, i64 88}
!28 = !{!14, !10, i64 8}
!29 = distinct !{!29, !12}
!30 = distinct !{!30, !12}
!31 = distinct !{!31, !12}
!32 = distinct !{!32, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator.12" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.11" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.14" = type { ptr }
%"class.__gnu_cxx::__normal_iterator.13" = type { ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #2

declare void @_ZN10BiasNeuronC1Ei(ptr noundef nonnull align 8 dereferenceable(80), i32 noundef) unnamed_addr #3

declare void @_ZN11InputNeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80), i32 noundef, i32 noundef) unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9__gnu_cxx17__normal_iteratorIPKP11InputNeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

declare void @_ZN6NeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80), i32 noundef, i32 noundef) unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local ptr @_ZNSt6vectorIP6NeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EERS6_(ptr noundef nonnull align 8 dereferenceable(24), ptr, ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIP6NeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #5 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9__gnu_cxx17__normal_iteratorIPKP6NeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #5 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN9NeuralNet13createNeuronsEiiPii(ptr noundef nonnull align 8 dereferenceable(128) %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3, i32 noundef %4) local_unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca %"class.__gnu_cxx::__normal_iterator.12", align 8
  %7 = alloca %"class.__gnu_cxx::__normal_iterator.11", align 8
  %8 = alloca ptr, align 8
  %9 = alloca %"class.__gnu_cxx::__normal_iterator.14", align 8
  %10 = alloca %"class.__gnu_cxx::__normal_iterator.13", align 8
  %11 = alloca %"class.__gnu_cxx::__normal_iterator.14", align 8
  %12 = alloca %"class.__gnu_cxx::__normal_iterator.13", align 8
  %13 = add i32 %1, 1
  %14 = add i32 %13, %4
  %15 = icmp sgt i32 %2, 0
  br i1 %15, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %5
  %wide.trip.count = zext nneg i32 %2 to i64
  %min.iters.check = icmp ult i32 %2, 8
  br i1 %min.iters.check, label %.lr.ph.preheader122, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %wide.trip.count, 2147483640
  %16 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %14, i64 0
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %16, %vector.ph ], [ %19, %vector.body ]
  %vec.phi115 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %20, %vector.body ]
  %17 = getelementptr inbounds i32, ptr %3, i64 %index
  %18 = getelementptr inbounds i8, ptr %17, i64 16
  %wide.load = load <4 x i32>, ptr %17, align 4, !tbaa !5
  %wide.load116 = load <4 x i32>, ptr %18, align 4, !tbaa !5
  %19 = add <4 x i32> %wide.load, %vec.phi
  %20 = add <4 x i32> %wide.load116, %vec.phi115
  %index.next = add nuw i64 %index, 8
  %21 = icmp eq i64 %index.next, %n.vec
  br i1 %21, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %20, %19
  %22 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader122

.lr.ph.preheader122:                              ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  %.04258.ph = phi i32 [ %14, %.lr.ph.preheader ], [ %22, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader122, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader122 ]
  %.04258 = phi i32 [ %25, %.lr.ph ], [ %.04258.ph, %.lr.ph.preheader122 ]
  %23 = getelementptr inbounds i32, ptr %3, i64 %indvars.iv
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = add nsw i32 %24, %.04258
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %5
  %.042.lcssa = phi i32 [ %14, %5 ], [ %22, %middle.block ], [ %25, %.lr.ph ]
  %26 = sext i32 %.042.lcssa to i64
  %27 = icmp slt i32 %.042.lcssa, 0
  %28 = shl nsw i64 %26, 3
  %29 = select i1 %27, i64 -1, i64 %28
  %30 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %29) #7
  %31 = getelementptr inbounds i8, ptr %0, i64 120
  store ptr %30, ptr %31, align 8, !tbaa !14
  %32 = tail call noalias noundef nonnull dereferenceable(80) ptr @_Znwm(i64 noundef 80) #7
  invoke void @_ZN10BiasNeuronC1Ei(ptr noundef nonnull align 8 dereferenceable(80) %32, i32 noundef 0)
          to label %33 unwind label %54

33:                                               ; preds = %._crit_edge
  %34 = getelementptr inbounds i8, ptr %0, i64 88
  store ptr %32, ptr %34, align 8, !tbaa !29
  %35 = load ptr, ptr %31, align 8, !tbaa !14
  store ptr %32, ptr %35, align 8, !tbaa !30
  %36 = icmp sgt i32 %1, 0
  br i1 %36, label %.lr.ph63, label %.preheader52

.lr.ph63:                                         ; preds = %33
  %37 = getelementptr inbounds i8, ptr %0, i64 8
  %38 = getelementptr inbounds i8, ptr %0, i64 16
  %wide.trip.count89 = zext i32 %13 to i64
  br label %41

.preheader52:                                     ; preds = %45, %33
  %.045.lcssa = phi i32 [ 1, %33 ], [ %13, %45 ]
  br i1 %15, label %.preheader51.lr.ph, label %.preheader

.preheader51.lr.ph:                               ; preds = %.preheader52
  %39 = getelementptr inbounds i8, ptr %0, i64 8
  %40 = getelementptr inbounds i8, ptr %0, i64 40
  %wide.trip.count97 = zext nneg i32 %2 to i64
  br label %.preheader51

41:                                               ; preds = %.lr.ph63, %45
  %indvars.iv86 = phi i64 [ 1, %.lr.ph63 ], [ %indvars.iv.next87, %45 ]
  %42 = call noalias noundef nonnull dereferenceable(80) ptr @_Znwm(i64 noundef 80) #7
  %43 = load i32, ptr %37, align 8, !tbaa !31
  %44 = trunc nuw nsw i64 %indvars.iv86 to i32
  invoke void @_ZN11InputNeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80) %42, i32 noundef %44, i32 noundef %43)
          to label %45 unwind label %56

45:                                               ; preds = %41
  %46 = load ptr, ptr %31, align 8, !tbaa !14
  %47 = getelementptr inbounds ptr, ptr %46, i64 %indvars.iv86
  store ptr %42, ptr %47, align 8, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #8
  %48 = call ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %38) #8
  store ptr %48, ptr %7, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKP11InputNeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #8
  %49 = load ptr, ptr %31, align 8, !tbaa !14
  %50 = getelementptr inbounds ptr, ptr %49, i64 %indvars.iv86
  %51 = load ptr, ptr %50, align 8, !tbaa !30
  store ptr %51, ptr %8, align 8, !tbaa !30
  %52 = load ptr, ptr %6, align 8
  %53 = call ptr @_ZNSt6vectorIP11InputNeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %38, ptr %52, ptr noundef nonnull align 8 dereferenceable(8) %8)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #8
  %indvars.iv.next87 = add nuw nsw i64 %indvars.iv86, 1
  %exitcond90.not = icmp eq i64 %indvars.iv.next87, %wide.trip.count89
  br i1 %exitcond90.not, label %.preheader52, label %41, !llvm.loop !32

54:                                               ; preds = %._crit_edge
  %55 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZdlPvm(ptr noundef nonnull %32, i64 noundef 80) #9
  br label %98

56:                                               ; preds = %41
  %57 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %42, i64 noundef 80) #9
  br label %98

.preheader51:                                     ; preds = %.preheader51.lr.ph, %._crit_edge68
  %indvars.iv94 = phi i64 [ 0, %.preheader51.lr.ph ], [ %indvars.iv.next95, %._crit_edge68 ]
  %.14670 = phi i32 [ %.045.lcssa, %.preheader51.lr.ph ], [ %.247.lcssa, %._crit_edge68 ]
  %58 = getelementptr inbounds i32, ptr %3, i64 %indvars.iv94
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = icmp sgt i32 %59, 0
  br i1 %60, label %.lr.ph67.preheader, label %._crit_edge68

.lr.ph67.preheader:                               ; preds = %.preheader51
  %61 = sext i32 %.14670 to i64
  br label %.lr.ph67

.preheader:                                       ; preds = %._crit_edge68, %.preheader52
  %.146.lcssa = phi i32 [ %.045.lcssa, %.preheader52 ], [ %.247.lcssa, %._crit_edge68 ]
  %62 = icmp sgt i32 %4, 0
  br i1 %62, label %.lr.ph75, label %._crit_edge76

.lr.ph75:                                         ; preds = %.preheader
  %63 = getelementptr inbounds i8, ptr %0, i64 8
  %64 = getelementptr inbounds i8, ptr %0, i64 64
  %65 = sext i32 %.146.lcssa to i64
  br label %83

.lr.ph67:                                         ; preds = %.lr.ph67.preheader, %69
  %indvars.iv91 = phi i64 [ %61, %.lr.ph67.preheader ], [ %indvars.iv.next92, %69 ]
  %.266 = phi i32 [ 0, %.lr.ph67.preheader ], [ %77, %69 ]
  %66 = call noalias noundef nonnull dereferenceable(80) ptr @_Znwm(i64 noundef 80) #7
  %67 = load i32, ptr %39, align 8, !tbaa !31
  %68 = trunc nsw i64 %indvars.iv91 to i32
  invoke void @_ZN6NeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80) %66, i32 noundef %68, i32 noundef %67)
          to label %69 unwind label %80

69:                                               ; preds = %.lr.ph67
  %70 = load ptr, ptr %31, align 8, !tbaa !14
  %71 = getelementptr inbounds ptr, ptr %70, i64 %indvars.iv91
  store ptr %66, ptr %71, align 8, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #8
  %72 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %40) #8
  store ptr %72, ptr %10, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKP6NeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8) %9, ptr noundef nonnull align 8 dereferenceable(8) %10) #8
  %73 = load ptr, ptr %31, align 8, !tbaa !14
  %74 = getelementptr inbounds ptr, ptr %73, i64 %indvars.iv91
  %75 = load ptr, ptr %9, align 8
  %76 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EERS6_(ptr noundef nonnull align 8 dereferenceable(24) %40, ptr %75, ptr noundef nonnull align 8 dereferenceable(8) %74)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #8
  %indvars.iv.next92 = add nsw i64 %indvars.iv91, 1
  %77 = add nuw nsw i32 %.266, 1
  %78 = load i32, ptr %58, align 4, !tbaa !5
  %79 = icmp slt i32 %77, %78
  br i1 %79, label %.lr.ph67, label %._crit_edge68.loopexit, !llvm.loop !33

80:                                               ; preds = %.lr.ph67
  %81 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %66, i64 noundef 80) #9
  br label %98

._crit_edge68.loopexit:                           ; preds = %69
  %82 = trunc nsw i64 %indvars.iv.next92 to i32
  br label %._crit_edge68

._crit_edge68:                                    ; preds = %._crit_edge68.loopexit, %.preheader51
  %.247.lcssa = phi i32 [ %.14670, %.preheader51 ], [ %82, %._crit_edge68.loopexit ]
  %indvars.iv.next95 = add nuw nsw i64 %indvars.iv94, 1
  %exitcond98.not = icmp eq i64 %indvars.iv.next95, %wide.trip.count97
  br i1 %exitcond98.not, label %.preheader, label %.preheader51, !llvm.loop !34

83:                                               ; preds = %.lr.ph75, %87
  %indvars.iv99 = phi i64 [ %65, %.lr.ph75 ], [ %indvars.iv.next100, %87 ]
  %.374 = phi i32 [ 0, %.lr.ph75 ], [ %95, %87 ]
  %84 = call noalias noundef nonnull dereferenceable(80) ptr @_Znwm(i64 noundef 80) #7
  %85 = load i32, ptr %63, align 8, !tbaa !31
  %86 = trunc nsw i64 %indvars.iv99 to i32
  invoke void @_ZN6NeuronC1Eii(ptr noundef nonnull align 8 dereferenceable(80) %84, i32 noundef %86, i32 noundef %85)
          to label %87 unwind label %96

87:                                               ; preds = %83
  %88 = load ptr, ptr %31, align 8, !tbaa !14
  %89 = getelementptr inbounds ptr, ptr %88, i64 %indvars.iv99
  store ptr %84, ptr %89, align 8, !tbaa !30
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %12) #8
  %90 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %64) #8
  store ptr %90, ptr %12, align 8
  call void @_ZN9__gnu_cxx17__normal_iteratorIPKP6NeuronSt6vectorIS2_SaIS2_EEEC2IPS2_vEERKNS0_IT_S7_EE(ptr noundef nonnull align 8 dereferenceable(8) %11, ptr noundef nonnull align 8 dereferenceable(8) %12) #8
  %91 = load ptr, ptr %31, align 8, !tbaa !14
  %92 = getelementptr inbounds ptr, ptr %91, i64 %indvars.iv99
  %93 = load ptr, ptr %11, align 8
  %94 = call ptr @_ZNSt6vectorIP6NeuronSaIS1_EE6insertEN9__gnu_cxx17__normal_iteratorIPKS1_S3_EERS6_(ptr noundef nonnull align 8 dereferenceable(24) %64, ptr %93, ptr noundef nonnull align 8 dereferenceable(8) %92)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %12) #8
  %indvars.iv.next100 = add nsw i64 %indvars.iv99, 1
  %95 = add nuw nsw i32 %.374, 1
  %exitcond102.not = icmp eq i32 %95, %4
  br i1 %exitcond102.not, label %._crit_edge76, label %83, !llvm.loop !35

96:                                               ; preds = %83
  %97 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %84, i64 noundef 80) #9
  br label %98

._crit_edge76:                                    ; preds = %87, %.preheader
  ret void

98:                                               ; preds = %96, %80, %56, %54
  %.pn = phi { ptr, i32 } [ %57, %56 ], [ %81, %80 ], [ %97, %96 ], [ %55, %54 ]
  resume { ptr, i32 } %.pn
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #6

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #7 = { builtin allocsize(0) }
attributes #8 = { nounwind }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = !{!15, !20, i64 120}
!15 = !{!"_ZTS9NeuralNet", !6, i64 8, !16, i64 16, !21, i64 40, !21, i64 64, !20, i64 88, !25, i64 96, !20, i64 120}
!16 = !{!"_ZTSSt6vectorIP11InputNeuronSaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIP11InputNeuronSaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIP11InputNeuronSaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIP11InputNeuronSaIS1_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!20 = !{!"any pointer", !7, i64 0}
!21 = !{!"_ZTSSt6vectorIP6NeuronSaIS1_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIP6NeuronSaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIP6NeuronSaIS1_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIP6NeuronSaIS1_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!25 = !{!"_ZTSSt6vectorIP10ConnectionSaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIP10ConnectionSaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIP10ConnectionSaIS1_EE17_Vector_impl_dataE", !20, i64 0, !20, i64 8, !20, i64 16}
!29 = !{!15, !20, i64 88}
!30 = !{!20, !20, i64 0}
!31 = !{!15, !6, i64 8}
!32 = distinct !{!32, !10}
!33 = distinct !{!33, !10}
!34 = distinct !{!34, !10}
!35 = distinct !{!35, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass