; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc (L1DCacheInvalidateRange)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @Xil_L1DCacheInvalidateRange(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %11 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %11, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 32, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !5
  %12 = call i32 asm sideeffect "mrs\09$0, cpsr\0A", "=r,~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !9
  store i32 %12, ptr %9, align 4, !tbaa !5
  %13 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %13, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  %14 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %14, ptr %8, align 4, !tbaa !5
  %15 = load i32, ptr %8, align 4, !tbaa !5
  %16 = or i32 %15, 192
  call void asm sideeffect "msr\09cpsr,$0\0A", "r,~{dirflag},~{fpsr},~{flags}"(i32 %16) #2, !srcloc !10
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %34

19:                                               ; preds = %2
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = add i32 %20, %21
  store i32 %22, ptr %7, align 4, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = and i32 %23, -32
  store i32 %24, ptr %5, align 4, !tbaa !5
  call void asm sideeffect "mcr p15, 2, $0,  c0,  c0, 0\0A", "r,~{dirflag},~{fpsr},~{flags}"(i32 0) #2, !srcloc !11
  br label %25

25:                                               ; preds = %29, %19
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = icmp ult i32 %26, %27
  br i1 %28, label %29, label %33

29:                                               ; preds = %25
  %30 = load i32, ptr %5, align 4, !tbaa !5
  call void asm sideeffect "mcr p15, 0, $0,  c7,  c6, 1", "r,~{dirflag},~{fpsr},~{flags}"(i32 %30) #2, !srcloc !12
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = add i32 %31, 32
  store i32 %32, ptr %5, align 4, !tbaa !5
  br label %25, !llvm.loop !13

33:                                               ; preds = %25
  br label %34

34:                                               ; preds = %33, %2
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !15
  %35 = load i32, ptr %8, align 4, !tbaa !5
  call void asm sideeffect "msr\09cpsr,$0\0A", "r,~{dirflag},~{fpsr},~{flags}"(i32 %35) #2, !srcloc !16
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 2147864414}
!10 = !{i64 2147864510}
!11 = !{i64 2147864600}
!12 = !{i64 2147864714}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{i64 2147864833}
!16 = !{i64 2147864883}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @Xil_L1DCacheInvalidateRange(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call i32 asm sideeffect "mrs\09$0, cpsr\0A", "=r,~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !5
  %4 = or i32 %3, 192
  tail call void asm sideeffect "msr\09cpsr,$0\0A", "r,~{dirflag},~{fpsr},~{flags}"(i32 %4) #1, !srcloc !6
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %.loopexit, label %5

5:                                                ; preds = %2
  %6 = add i32 %1, %0
  %7 = and i32 %0, -32
  tail call void asm sideeffect "mcr p15, 2, $0,  c0,  c0, 0\0A", "r,~{dirflag},~{fpsr},~{flags}"(i32 0) #1, !srcloc !7
  %8 = icmp ult i32 %7, %6
  br i1 %8, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %5, %.lr.ph
  %.014 = phi i32 [ %9, %.lr.ph ], [ %7, %5 ]
  tail call void asm sideeffect "mcr p15, 0, $0,  c7,  c6, 1", "r,~{dirflag},~{fpsr},~{flags}"(i32 %.014) #1, !srcloc !8
  %9 = add i32 %.014, 32
  %10 = icmp ult i32 %9, %6
  br i1 %10, label %.lr.ph, label %.loopexit, !llvm.loop !9

.loopexit:                                        ; preds = %.lr.ph, %5, %2
  tail call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #1, !srcloc !11
  tail call void asm sideeffect "msr\09cpsr,$0\0A", "r,~{dirflag},~{fpsr},~{flags}"(i32 %3) #1, !srcloc !12
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2147864414}
!6 = !{i64 2147864510}
!7 = !{i64 2147864600}
!8 = !{i64 2147864714}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{i64 2147864833}
!12 = !{i64 2147864883}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass