; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/evaluation/src/ndes (libndes)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IMMENSE = type { i64, i64 }
%struct.GREAT = type { i64, i64, i64 }

@icd = external hidden global %struct.IMMENSE, align 8
@ipc2 = external hidden constant [49 x i8], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @getbit(i64, i64, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @ks(i32 noundef %0, ptr noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %20, label %11

11:                                               ; preds = %2
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = icmp eq i32 %12, 2
  br i1 %13, label %20, label %14

14:                                               ; preds = %11
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = icmp eq i32 %15, 9
  br i1 %16, label %20, label %17

17:                                               ; preds = %14
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = icmp eq i32 %18, 16
  br i1 %19, label %20, label %33

20:                                               ; preds = %17, %14, %11, %2
  %21 = load i64, ptr getelementptr inbounds (%struct.IMMENSE, ptr @icd, i32 0, i32 1), align 8, !tbaa !11
  %22 = load i64, ptr getelementptr inbounds (%struct.IMMENSE, ptr @icd, i32 0, i32 1), align 8, !tbaa !11
  %23 = and i64 %22, 1
  %24 = shl i64 %23, 28
  %25 = or i64 %21, %24
  %26 = lshr i64 %25, 1
  store i64 %26, ptr getelementptr inbounds (%struct.IMMENSE, ptr @icd, i32 0, i32 1), align 8, !tbaa !11
  %27 = load i64, ptr @icd, align 8, !tbaa !14
  %28 = load i64, ptr @icd, align 8, !tbaa !14
  %29 = and i64 %28, 1
  %30 = shl i64 %29, 28
  %31 = or i64 %27, %30
  %32 = lshr i64 %31, 1
  store i64 %32, ptr @icd, align 8, !tbaa !14
  br label %54

33:                                               ; preds = %17
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %50, %33
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = icmp sle i32 %35, 2
  br i1 %36, label %37, label %53

37:                                               ; preds = %34
  %38 = load i64, ptr getelementptr inbounds (%struct.IMMENSE, ptr @icd, i32 0, i32 1), align 8, !tbaa !11
  %39 = load i64, ptr getelementptr inbounds (%struct.IMMENSE, ptr @icd, i32 0, i32 1), align 8, !tbaa !11
  %40 = and i64 %39, 1
  %41 = shl i64 %40, 28
  %42 = or i64 %38, %41
  %43 = lshr i64 %42, 1
  store i64 %43, ptr getelementptr inbounds (%struct.IMMENSE, ptr @icd, i32 0, i32 1), align 8, !tbaa !11
  %44 = load i64, ptr @icd, align 8, !tbaa !14
  %45 = load i64, ptr @icd, align 8, !tbaa !14
  %46 = and i64 %45, 1
  %47 = shl i64 %46, 28
  %48 = or i64 %44, %47
  %49 = lshr i64 %48, 1
  store i64 %49, ptr @icd, align 8, !tbaa !14
  br label %50

50:                                               ; preds = %37
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %5, align 4, !tbaa !5
  br label %34, !llvm.loop !15

53:                                               ; preds = %34
  br label %54

54:                                               ; preds = %53, %20
  %55 = load ptr, ptr %4, align 8, !tbaa !9
  %56 = getelementptr inbounds %struct.GREAT, ptr %55, i32 0, i32 0
  store i64 0, ptr %56, align 8, !tbaa !17
  %57 = load ptr, ptr %4, align 8, !tbaa !9
  %58 = getelementptr inbounds %struct.GREAT, ptr %57, i32 0, i32 1
  store i64 0, ptr %58, align 8, !tbaa !19
  %59 = load ptr, ptr %4, align 8, !tbaa !9
  %60 = getelementptr inbounds %struct.GREAT, ptr %59, i32 0, i32 2
  store i64 0, ptr %60, align 8, !tbaa !20
  store i32 16, ptr %6, align 4, !tbaa !5
  store i32 32, ptr %7, align 4, !tbaa !5
  store i32 48, ptr %8, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %116, %54
  %62 = load i32, ptr %6, align 4, !tbaa !5
  %63 = icmp sge i32 %62, 1
  br i1 %63, label %64, label %123

64:                                               ; preds = %61
  %65 = load ptr, ptr %4, align 8, !tbaa !9
  %66 = getelementptr inbounds %struct.GREAT, ptr %65, i32 0, i32 2
  %67 = load i64, ptr %66, align 8, !tbaa !20
  %68 = shl i64 %67, 1
  %69 = load i32, ptr %6, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds [49 x i8], ptr @ipc2, i64 0, i64 %70
  %72 = load i8, ptr %71, align 1, !tbaa !21
  %73 = sext i8 %72 to i32
  %74 = load i64, ptr @icd, align 8
  %75 = load i64, ptr getelementptr inbounds ({ i64, i64 }, ptr @icd, i32 0, i32 1), align 8
  %76 = call i64 @getbit(i64 %74, i64 %75, i32 noundef %73, i32 noundef 28)
  %77 = trunc i64 %76 to i16
  %78 = zext i16 %77 to i64
  %79 = or i64 %68, %78
  %80 = load ptr, ptr %4, align 8, !tbaa !9
  %81 = getelementptr inbounds %struct.GREAT, ptr %80, i32 0, i32 2
  store i64 %79, ptr %81, align 8, !tbaa !20
  %82 = load ptr, ptr %4, align 8, !tbaa !9
  %83 = getelementptr inbounds %struct.GREAT, ptr %82, i32 0, i32 1
  %84 = load i64, ptr %83, align 8, !tbaa !19
  %85 = shl i64 %84, 1
  %86 = load i32, ptr %7, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds [49 x i8], ptr @ipc2, i64 0, i64 %87
  %89 = load i8, ptr %88, align 1, !tbaa !21
  %90 = sext i8 %89 to i32
  %91 = load i64, ptr @icd, align 8
  %92 = load i64, ptr getelementptr inbounds ({ i64, i64 }, ptr @icd, i32 0, i32 1), align 8
  %93 = call i64 @getbit(i64 %91, i64 %92, i32 noundef %90, i32 noundef 28)
  %94 = trunc i64 %93 to i16
  %95 = zext i16 %94 to i64
  %96 = or i64 %85, %95
  %97 = load ptr, ptr %4, align 8, !tbaa !9
  %98 = getelementptr inbounds %struct.GREAT, ptr %97, i32 0, i32 1
  store i64 %96, ptr %98, align 8, !tbaa !19
  %99 = load ptr, ptr %4, align 8, !tbaa !9
  %100 = getelementptr inbounds %struct.GREAT, ptr %99, i32 0, i32 0
  %101 = load i64, ptr %100, align 8, !tbaa !17
  %102 = shl i64 %101, 1
  %103 = load i32, ptr %8, align 4, !tbaa !5
  %104 = sext i32 %103 to i64
  %105 = getelementptr inbounds [49 x i8], ptr @ipc2, i64 0, i64 %104
  %106 = load i8, ptr %105, align 1, !tbaa !21
  %107 = sext i8 %106 to i32
  %108 = load i64, ptr @icd, align 8
  %109 = load i64, ptr getelementptr inbounds ({ i64, i64 }, ptr @icd, i32 0, i32 1), align 8
  %110 = call i64 @getbit(i64 %108, i64 %109, i32 noundef %107, i32 noundef 28)
  %111 = trunc i64 %110 to i16
  %112 = zext i16 %111 to i64
  %113 = or i64 %102, %112
  %114 = load ptr, ptr %4, align 8, !tbaa !9
  %115 = getelementptr inbounds %struct.GREAT, ptr %114, i32 0, i32 0
  store i64 %113, ptr %115, align 8, !tbaa !17
  br label %116

116:                                              ; preds = %64
  %117 = load i32, ptr %6, align 4, !tbaa !5
  %118 = add nsw i32 %117, -1
  store i32 %118, ptr %6, align 4, !tbaa !5
  %119 = load i32, ptr %7, align 4, !tbaa !5
  %120 = add nsw i32 %119, -1
  store i32 %120, ptr %7, align 4, !tbaa !5
  %121 = load i32, ptr %8, align 4, !tbaa !5
  %122 = add nsw i32 %121, -1
  store i32 %122, ptr %8, align 4, !tbaa !5
  br label %61, !llvm.loop !22

123:                                              ; preds = %61
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"IMMENSE", !13, i64 0, !13, i64 8}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !13, i64 0}
!18 = !{!"GREAT", !13, i64 0, !13, i64 8, !13, i64 16}
!19 = !{!18, !13, i64 8}
!20 = !{!18, !13, i64 16}
!21 = !{!7, !7, i64 0}
!22 = distinct !{!22, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.IMMENSE = type { i64, i64 }

@icd = external hidden local_unnamed_addr global %struct.IMMENSE, align 8
@ipc2 = external hidden local_unnamed_addr constant [49 x i8], align 16

; Function Attrs: nounwind uwtable
declare dso_local i64 @getbit(i64, i64, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @ks(i32 noundef %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
  switch i32 %0, label %.preheader [
    i32 16, label %18
    i32 9, label %18
    i32 2, label %18
    i32 1, label %18
  ]

.preheader:                                       ; preds = %2
  %.promoted = load i64, ptr getelementptr inbounds (i8, ptr @icd, i64 8), align 8, !tbaa !5
  %icd.promoted = load i64, ptr @icd, align 8, !tbaa !10
  %3 = shl i64 %.promoted, 28
  %4 = and i64 %3, 268435456
  %5 = or i64 %4, %.promoted
  %6 = lshr i64 %5, 1
  %7 = shl i64 %icd.promoted, 28
  %8 = and i64 %7, 268435456
  %9 = or i64 %8, %icd.promoted
  %10 = lshr i64 %9, 1
  %11 = shl i64 %6, 28
  %12 = and i64 %11, 268435456
  %13 = or i64 %12, %6
  %14 = lshr i64 %13, 1
  %15 = shl i64 %10, 28
  %16 = and i64 %15, 268435456
  %17 = or i64 %16, %10
  store i64 %14, ptr getelementptr inbounds (i8, ptr @icd, i64 8), align 8, !tbaa !5
  br label %28

18:                                               ; preds = %2, %2, %2, %2
  %19 = load i64, ptr getelementptr inbounds (i8, ptr @icd, i64 8), align 8, !tbaa !5
  %20 = shl i64 %19, 28
  %21 = and i64 %20, 268435456
  %22 = or i64 %21, %19
  %23 = lshr i64 %22, 1
  store i64 %23, ptr getelementptr inbounds (i8, ptr @icd, i64 8), align 8, !tbaa !5
  %24 = load i64, ptr @icd, align 8, !tbaa !10
  %25 = shl i64 %24, 28
  %26 = and i64 %25, 268435456
  %27 = or i64 %26, %24
  br label %28

28:                                               ; preds = %.preheader, %18
  %storemerge.in = phi i64 [ %27, %18 ], [ %17, %.preheader ]
  %storemerge = lshr i64 %storemerge.in, 1
  store i64 %storemerge, ptr @icd, align 8, !tbaa !10
  %29 = getelementptr inbounds i8, ptr %1, i64 8
  %30 = getelementptr inbounds i8, ptr %1, i64 16
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %1, i8 0, i64 24, i1 false)
  br label %31

31:                                               ; preds = %28, %31
  %indvars.iv37 = phi i64 [ 16, %28 ], [ %indvars.iv.next38, %31 ]
  %indvars.iv35 = phi i64 [ 32, %28 ], [ %indvars.iv.next36, %31 ]
  %indvars.iv = phi i64 [ 48, %28 ], [ %indvars.iv.next, %31 ]
  %32 = load i64, ptr %30, align 8, !tbaa !11
  %33 = shl i64 %32, 1
  %34 = getelementptr inbounds [49 x i8], ptr @ipc2, i64 0, i64 %indvars.iv37
  %35 = load i8, ptr %34, align 1, !tbaa !13
  %36 = sext i8 %35 to i32
  %37 = load i64, ptr @icd, align 8
  %38 = load i64, ptr getelementptr inbounds (i8, ptr @icd, i64 8), align 8
  %39 = tail call i64 @getbit(i64 %37, i64 %38, i32 noundef %36, i32 noundef 28)
  %40 = and i64 %39, 65535
  %41 = or i64 %40, %33
  store i64 %41, ptr %30, align 8, !tbaa !11
  %42 = load i64, ptr %29, align 8, !tbaa !14
  %43 = shl i64 %42, 1
  %44 = getelementptr inbounds [49 x i8], ptr @ipc2, i64 0, i64 %indvars.iv35
  %45 = load i8, ptr %44, align 1, !tbaa !13
  %46 = sext i8 %45 to i32
  %47 = load i64, ptr @icd, align 8
  %48 = load i64, ptr getelementptr inbounds (i8, ptr @icd, i64 8), align 8
  %49 = tail call i64 @getbit(i64 %47, i64 %48, i32 noundef %46, i32 noundef 28)
  %50 = and i64 %49, 65535
  %51 = or i64 %50, %43
  store i64 %51, ptr %29, align 8, !tbaa !14
  %52 = load i64, ptr %1, align 8, !tbaa !15
  %53 = shl i64 %52, 1
  %54 = getelementptr inbounds [49 x i8], ptr @ipc2, i64 0, i64 %indvars.iv
  %55 = load i8, ptr %54, align 1, !tbaa !13
  %56 = sext i8 %55 to i32
  %57 = load i64, ptr @icd, align 8
  %58 = load i64, ptr getelementptr inbounds (i8, ptr @icd, i64 8), align 8
  %59 = tail call i64 @getbit(i64 %57, i64 %58, i32 noundef %56, i32 noundef 28)
  %60 = and i64 %59, 65535
  %61 = or i64 %60, %53
  store i64 %61, ptr %1, align 8, !tbaa !15
  %indvars.iv.next38 = add nsw i64 %indvars.iv37, -1
  %indvars.iv.next36 = add nsw i64 %indvars.iv35, -1
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %62 = icmp ugt i64 %indvars.iv37, 1
  br i1 %62, label %31, label %63, !llvm.loop !16

63:                                               ; preds = %31
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"IMMENSE", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!12, !7, i64 16}
!12 = !{!"GREAT", !7, i64 0, !7, i64 8, !7, i64 16}
!13 = !{!8, !8, i64 0}
!14 = !{!12, !7, i64 8}
!15 = !{!12, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass