; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/qspips_v3 (GetOptions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.OptionsMap = type { i32, i32 }
%struct.XQspiPs = type { %struct.XQspiPs_Config, i32, ptr, ptr, i32, i32, i32, ptr, ptr, i32 }
%struct.XQspiPs_Config = type { i16, i32, i32, i8 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1
@OptionsTable = external hidden global [5 x %struct.OptionsMap], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XQspiPs_GetOptions(ptr noundef %0) #3 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %12

11:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 208)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %68

12:                                               ; preds = %10
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.XQspiPs, ptr %13, i32 0, i32 1
  %15 = load i32, ptr %14, align 8, !tbaa !11
  %16 = icmp eq i32 %15, 286331153
  br i1 %16, label %17, label %18

17:                                               ; preds = %12
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %19

18:                                               ; preds = %12
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 209)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %68

19:                                               ; preds = %17
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.XQspiPs, ptr %20, i32 0, i32 0
  %22 = getelementptr inbounds %struct.XQspiPs_Config, ptr %21, i32 0, i32 1
  %23 = load i32, ptr %22, align 4, !tbaa !15
  %24 = add i32 %23, 0
  %25 = zext i32 %24 to i64
  %26 = call i32 @Xil_In32(i64 noundef %25)
  store i32 %26, ptr %5, align 4, !tbaa !9
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %49, %19
  %28 = load i32, ptr %6, align 4, !tbaa !9
  %29 = zext i32 %28 to i64
  %30 = icmp ult i64 %29, 5
  br i1 %30, label %31, label %52

31:                                               ; preds = %27
  %32 = load i32, ptr %5, align 4, !tbaa !9
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = zext i32 %33 to i64
  %35 = getelementptr inbounds [5 x %struct.OptionsMap], ptr @OptionsTable, i64 0, i64 %34
  %36 = getelementptr inbounds %struct.OptionsMap, ptr %35, i32 0, i32 1
  %37 = load i32, ptr %36, align 4, !tbaa !16
  %38 = and i32 %32, %37
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %48

40:                                               ; preds = %31
  %41 = load i32, ptr %6, align 4, !tbaa !9
  %42 = zext i32 %41 to i64
  %43 = getelementptr inbounds [5 x %struct.OptionsMap], ptr @OptionsTable, i64 0, i64 %42
  %44 = getelementptr inbounds %struct.OptionsMap, ptr %43, i32 0, i32 0
  %45 = load i32, ptr %44, align 8, !tbaa !18
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = or i32 %46, %45
  store i32 %47, ptr %4, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %40, %31
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %6, align 4, !tbaa !9
  %51 = add i32 %50, 1
  store i32 %51, ptr %6, align 4, !tbaa !9
  br label %27, !llvm.loop !19

52:                                               ; preds = %27
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.XQspiPs, ptr %53, i32 0, i32 0
  %55 = getelementptr inbounds %struct.XQspiPs_Config, ptr %54, i32 0, i32 1
  %56 = load i32, ptr %55, align 4, !tbaa !15
  %57 = add i32 %56, 160
  %58 = zext i32 %57 to i64
  %59 = call i32 @Xil_In32(i64 noundef %58)
  store i32 %59, ptr %5, align 4, !tbaa !9
  %60 = load i32, ptr %5, align 4, !tbaa !9
  %61 = and i32 %60, -2147483648
  %62 = icmp ne i32 %61, 0
  br i1 %62, label %63, label %66

63:                                               ; preds = %52
  %64 = load i32, ptr %4, align 4, !tbaa !9
  %65 = or i32 %64, 128
  store i32 %65, ptr %4, align 4, !tbaa !9
  br label %66

66:                                               ; preds = %63, %52
  %67 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %67, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %68

68:                                               ; preds = %66, %18, %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  %69 = load i32, ptr %2, align 4
  ret i32 %69
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"", !13, i64 0, !10, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !6, i64 56, !6, i64 64, !10, i64 72}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !7, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !10, i64 4}
!16 = !{!17, !10, i64 4}
!17 = !{!"", !10, i64 0, !10, i64 4}
!18 = !{!17, !10, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.OptionsMap = type { i32, i32 }

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1
@OptionsTable = external hidden local_unnamed_addr global [5 x %struct.OptionsMap], align 16

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XQspiPs_GetOptions(ptr noundef readonly %0) local_unnamed_addr #2 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %6, label %2

2:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 16
  %4 = load i32, ptr %3, align 8, !tbaa !9
  %5 = icmp eq i32 %4, 286331153
  br i1 %5, label %7, label %37

6:                                                ; preds = %1
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 208) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %38

7:                                                ; preds = %2
  %8 = getelementptr inbounds i8, ptr %0, i64 4
  %9 = load i32, ptr %8, align 4, !tbaa !14
  %10 = zext i32 %9 to i64
  %11 = tail call i32 @Xil_In32(i64 noundef %10)
  %12 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 4), align 4, !tbaa !15
  %13 = and i32 %12, %11
  %.not18 = icmp eq i32 %13, 0
  %14 = load i32, ptr @OptionsTable, align 16
  %spec.select23 = select i1 %.not18, i32 0, i32 %14
  %15 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 12), align 4, !tbaa !15
  %16 = and i32 %15, %11
  %.not18.1 = icmp eq i32 %16, 0
  %17 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 8), align 8
  %18 = select i1 %.not18.1, i32 0, i32 %17
  %.1.1 = or i32 %spec.select23, %18
  %19 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 20), align 4, !tbaa !15
  %20 = and i32 %19, %11
  %.not18.2 = icmp eq i32 %20, 0
  %21 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 16), align 16
  %22 = select i1 %.not18.2, i32 0, i32 %21
  %.1.2 = or i32 %.1.1, %22
  %23 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 28), align 4, !tbaa !15
  %24 = and i32 %23, %11
  %.not18.3 = icmp eq i32 %24, 0
  %25 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 24), align 8
  %26 = select i1 %.not18.3, i32 0, i32 %25
  %.1.3 = or i32 %.1.2, %26
  %27 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 36), align 4, !tbaa !15
  %28 = and i32 %27, %11
  %.not18.4 = icmp eq i32 %28, 0
  %29 = load i32, ptr getelementptr inbounds (i8, ptr @OptionsTable, i64 32), align 16
  %30 = select i1 %.not18.4, i32 0, i32 %29
  %.1.4 = or i32 %.1.3, %30
  %31 = load i32, ptr %8, align 4, !tbaa !14
  %32 = add i32 %31, 160
  %33 = zext i32 %32 to i64
  %34 = tail call i32 @Xil_In32(i64 noundef %33)
  %35 = lshr i32 %34, 24
  %36 = and i32 %35, 128
  %spec.select = or i32 %36, %.1.4
  br label %38

37:                                               ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 209) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %7, %37, %6
  %.014 = phi i32 [ %spec.select, %7 ], [ 0, %37 ], [ 0, %6 ]
  ret i32 %.014
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"", !11, i64 0, !6, i64 16, !13, i64 24, !13, i64 32, !6, i64 40, !6, i64 44, !6, i64 48, !13, i64 56, !13, i64 64, !6, i64 72}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !7, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !6, i64 4}
!15 = !{!16, !6, i64 4}
!16 = !{!"", !6, i64 0, !6, i64 4}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass