; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/gpiops_v3 (SelfTest)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XGpioPs = type { %struct.XGpioPs_Config, i32, ptr, ptr, i32, i32, i8 }
%struct.XGpioPs_Config = type { i16, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [172 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @XGpioPs_SelfTest(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 34, ptr %12, align 4, !tbaa !9
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = icmp ne ptr %14, null
  br i1 %15, label %16, label %17

16:                                               ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %18

17:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 92)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %13, align 4
  br label %56

18:                                               ; preds = %16
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.XGpioPs, ptr %19, i32 0, i32 1
  %21 = load i32, ptr %20, align 8, !tbaa !11
  %22 = icmp eq i32 %21, 286331153
  br i1 %22, label %23, label %24

23:                                               ; preds = %18
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %25

24:                                               ; preds = %18
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 93)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %13, align 4
  br label %56

25:                                               ; preds = %23
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = call i32 @XGpioPs_IntrGetEnabled(ptr noundef %26, i8 noundef zeroext 0)
  store i32 %27, ptr %5, align 4, !tbaa !9
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = load i32, ptr %5, align 4, !tbaa !9
  call void @XGpioPs_IntrDisable(ptr noundef %28, i8 noundef zeroext 0, i32 noundef %29)
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  call void @XGpioPs_GetIntrType(ptr noundef %30, i8 noundef zeroext 0, ptr noundef %6, ptr noundef %7, ptr noundef %8)
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = load i32, ptr %12, align 4, !tbaa !9
  %33 = load i32, ptr %12, align 4, !tbaa !9
  %34 = load i32, ptr %12, align 4, !tbaa !9
  call void @XGpioPs_SetIntrType(ptr noundef %31, i8 noundef zeroext 0, i32 noundef %32, i32 noundef %33, i32 noundef %34)
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  call void @XGpioPs_GetIntrType(ptr noundef %35, i8 noundef zeroext 0, ptr noundef %9, ptr noundef %10, ptr noundef %11)
  %36 = load i32, ptr %9, align 4, !tbaa !9
  %37 = load i32, ptr %12, align 4, !tbaa !9
  %38 = icmp ne i32 %36, %37
  br i1 %38, label %39, label %48

39:                                               ; preds = %25
  %40 = load i32, ptr %10, align 4, !tbaa !9
  %41 = load i32, ptr %12, align 4, !tbaa !9
  %42 = icmp ne i32 %40, %41
  br i1 %42, label %43, label %48

43:                                               ; preds = %39
  %44 = load i32, ptr %11, align 4, !tbaa !9
  %45 = load i32, ptr %12, align 4, !tbaa !9
  %46 = icmp ne i32 %44, %45
  br i1 %46, label %47, label %48

47:                                               ; preds = %43
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %47, %43, %39, %25
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = load i32, ptr %6, align 4, !tbaa !9
  %51 = load i32, ptr %7, align 4, !tbaa !9
  %52 = load i32, ptr %8, align 4, !tbaa !9
  call void @XGpioPs_SetIntrType(ptr noundef %49, i8 noundef zeroext 0, i32 noundef %50, i32 noundef %51, i32 noundef %52)
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = load i32, ptr %5, align 4, !tbaa !9
  call void @XGpioPs_IntrEnable(ptr noundef %53, i8 noundef zeroext 0, i32 noundef %54)
  %55 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %55, ptr %2, align 4
  store i32 1, ptr %13, align 4
  br label %56

56:                                               ; preds = %48, %24, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %57 = load i32, ptr %2, align 4
  ret i32 %57
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) #2

declare i32 @XGpioPs_IntrGetEnabled(ptr noundef, i8 noundef zeroext) #2

declare void @XGpioPs_IntrDisable(ptr noundef, i8 noundef zeroext, i32 noundef) #2

declare void @XGpioPs_GetIntrType(ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef) #2

declare void @XGpioPs_SetIntrType(ptr noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) #2

declare void @XGpioPs_IntrEnable(ptr noundef, i8 noundef zeroext, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"", !13, i64 0, !10, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !10, i64 36, !7, i64 40}
!13 = !{!"", !14, i64 0, !10, i64 4}
!14 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [172 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XGpioPs_SelfTest(ptr noundef %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
  store i32 0, ptr %7, align 4, !tbaa !5
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %12, label %8

8:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = load i32, ptr %9, align 8, !tbaa !9
  %11 = icmp eq i32 %10, 286331153
  br i1 %11, label %13, label %21

12:                                               ; preds = %1
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 92) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %22

13:                                               ; preds = %8
  %14 = tail call i32 @XGpioPs_IntrGetEnabled(ptr noundef nonnull %0, i8 noundef zeroext 0) #3
  tail call void @XGpioPs_IntrDisable(ptr noundef nonnull %0, i8 noundef zeroext 0, i32 noundef %14) #3
  call void @XGpioPs_GetIntrType(ptr noundef nonnull %0, i8 noundef zeroext 0, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3
  call void @XGpioPs_SetIntrType(ptr noundef nonnull %0, i8 noundef zeroext 0, i32 noundef 34, i32 noundef 34, i32 noundef 34) #3
  call void @XGpioPs_GetIntrType(ptr noundef nonnull %0, i8 noundef zeroext 0, ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef nonnull %7) #3
  %15 = load i32, ptr %5, align 4, !tbaa !5
  %.not20 = icmp ne i32 %15, 34
  %16 = load i32, ptr %6, align 4
  %.not21 = icmp ne i32 %16, 34
  %or.cond.not24 = select i1 %.not20, i1 %.not21, i1 false
  %17 = load i32, ptr %7, align 4
  %.not22 = icmp ne i32 %17, 34
  %or.cond23.not = select i1 %or.cond.not24, i1 %.not22, i1 false
  %.018 = zext i1 %or.cond23.not to i32
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = load i32, ptr %4, align 4, !tbaa !5
  call void @XGpioPs_SetIntrType(ptr noundef nonnull %0, i8 noundef zeroext 0, i32 noundef %18, i32 noundef %19, i32 noundef %20) #3
  call void @XGpioPs_IntrEnable(ptr noundef nonnull %0, i8 noundef zeroext 0, i32 noundef %14) #3
  br label %22

21:                                               ; preds = %8
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 93) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %13, %21, %12
  %.0 = phi i32 [ %.018, %13 ], [ 0, %21 ], [ 0, %12 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #2

declare i32 @XGpioPs_IntrGetEnabled(ptr noundef, i8 noundef zeroext) local_unnamed_addr #2

declare void @XGpioPs_IntrDisable(ptr noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #2

declare void @XGpioPs_GetIntrType(ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @XGpioPs_SetIntrType(ptr noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @XGpioPs_IntrEnable(ptr noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"", !11, i64 0, !6, i64 8, !13, i64 16, !13, i64 24, !6, i64 32, !6, i64 36, !7, i64 40}
!11 = !{!"", !12, i64 0, !6, i64 4}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}


; Effective O3 passes: DSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass