; LLVM IR from weicao/cascadb :: src/store/ram_directory.ll (ZN7cascadb7RAMFile4readEmNS_5SliceERm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.cascadb::Slice" = type <{ ptr, i32, [4 x i8] }>
%"class.cascadb::ScopedMutex" = type { i8, ptr }
%"class.cascadb::RAMFile" = type { %"class.cascadb::Mutex", i64, %"class.std::vector", i64, i64 }
%"class.cascadb::Mutex" = type { i8, %union.pthread_mutex_t }
%union.pthread_mutex_t = type { %struct.__pthread_mutex_s }
%struct.__pthread_mutex_s = type { i32, i32, i32, i32, i32, i16, i16, %struct.__pthread_internal_list }
%struct.__pthread_internal_list = type { ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl" }
%"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl" = type { %"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char *, std::allocator<char *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [12 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [76 x i8], align 1
@__PRETTY_FUNCTION__._ZN7cascadb7RAMFile4readEmNS_5SliceERm = external hidden unnamed_addr constant [55 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [10 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7cascadb7RAMFile4readEmNS_5SliceERm(ptr noundef nonnull align 8 dereferenceable(96) %0, i64 noundef %1, ptr %2, i32 %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #0 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca i1, align 1
  %7 = alloca %"class.cascadb::Slice", align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca %"class.cascadb::ScopedMutex", align 8
  %12 = alloca i64, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  %21 = getelementptr inbounds { ptr, i32 }, ptr %7, i32 0, i32 0
  store ptr %2, ptr %21, align 8
  %22 = getelementptr inbounds { ptr, i32 }, ptr %7, i32 0, i32 1
  store i32 %3, ptr %22, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i64 %1, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  %23 = load ptr, ptr %8, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #5
  %24 = getelementptr inbounds %"class.cascadb::RAMFile", ptr %23, i32 0, i32 0
  call void @_ZN7cascadb11ScopedMutexC2EPNS_5MutexE(ptr noundef nonnull align 8 dereferenceable(16) %11, ptr noundef %24)
  %25 = getelementptr inbounds %"class.cascadb::RAMFile", ptr %23, i32 0, i32 1
  %26 = load i64, ptr %25, align 8, !tbaa !11
  %27 = icmp ugt i64 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %5
  br label %31

29:                                               ; preds = %5
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 17, ptr noundef @__PRETTY_FUNCTION__._ZN7cascadb7RAMFile4readEmNS_5SliceERm) #6
  unreachable

30:                                               ; No predecessors!
  br label %31

31:                                               ; preds = %30, %28
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %32 = getelementptr inbounds %"class.cascadb::RAMFile", ptr %23, i32 0, i32 4
  %33 = load i64, ptr %32, align 8, !tbaa !19
  store i64 %33, ptr %12, align 8, !tbaa !9
  invoke void @_ZN7cascadb11ScopedMutex6unlockEv(ptr noundef nonnull align 8 dereferenceable(16) %11)
          to label %34 unwind label %40

34:                                               ; preds = %31
  %35 = load i64, ptr %9, align 8, !tbaa !9
  %36 = load i64, ptr %12, align 8, !tbaa !9
  %37 = icmp uge i64 %35, %36
  br i1 %37, label %38, label %44

38:                                               ; preds = %34
  %39 = load ptr, ptr %10, align 8, !tbaa !5
  store i64 0, ptr %39, align 8, !tbaa !9
  store i1 true, ptr %6, align 1
  store i32 1, ptr %15, align 4
  br label %137

40:                                               ; preds = %31
  %41 = landingpad { ptr, i32 }
          cleanup
  %42 = extractvalue { ptr, i32 } %41, 0
  store ptr %42, ptr %13, align 8
  %43 = extractvalue { ptr, i32 } %41, 1
  store i32 %43, ptr %14, align 4
  br label %139

44:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  %45 = invoke noundef i64 @_ZNK7cascadb5Slice4sizeEv(ptr noundef nonnull align 8 dereferenceable(12) %7)
          to label %46 unwind label %57

46:                                               ; preds = %44
  store i64 %45, ptr %16, align 8, !tbaa !9
  %47 = load i64, ptr %12, align 8, !tbaa !9
  %48 = load i64, ptr %9, align 8, !tbaa !9
  %49 = invoke noundef i64 @_ZNK7cascadb5Slice4sizeEv(ptr noundef nonnull align 8 dereferenceable(12) %7)
          to label %50 unwind label %57

50:                                               ; preds = %46
  %51 = add i64 %48, %49
  %52 = icmp ult i64 %47, %51
  br i1 %52, label %53, label %61

53:                                               ; preds = %50
  %54 = load i64, ptr %12, align 8, !tbaa !9
  %55 = load i64, ptr %9, align 8, !tbaa !9
  %56 = sub i64 %54, %55
  store i64 %56, ptr %16, align 8, !tbaa !9
  br label %61

57:                                               ; preds = %46, %44
  %58 = landingpad { ptr, i32 }
          cleanup
  %59 = extractvalue { ptr, i32 } %58, 0
  store ptr %59, ptr %13, align 8
  %60 = extractvalue { ptr, i32 } %58, 1
  store i32 %60, ptr %14, align 4
  br label %136

61:                                               ; preds = %53, %50
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #5
  %62 = load i64, ptr %9, align 8, !tbaa !9
  %63 = udiv i64 %62, 4096
  store i64 %63, ptr %17, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #5
  store i64 0, ptr %18, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #5
  %64 = load i64, ptr %16, align 8, !tbaa !9
  store i64 %64, ptr %19, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #5
  %65 = load i64, ptr %9, align 8, !tbaa !9
  %66 = urem i64 %65, 4096
  %67 = sub i64 4096, %66
  store i64 %67, ptr %20, align 8, !tbaa !9
  %68 = load i64, ptr %19, align 8, !tbaa !9
  %69 = load i64, ptr %20, align 8, !tbaa !9
  %70 = icmp ult i64 %68, %69
  br i1 %70, label %71, label %73

71:                                               ; preds = %61
  %72 = load i64, ptr %19, align 8, !tbaa !9
  br label %75

73:                                               ; preds = %61
  %74 = load i64, ptr %20, align 8, !tbaa !9
  br label %75

75:                                               ; preds = %73, %71
  %76 = phi i64 [ %72, %71 ], [ %74, %73 ]
  store i64 %76, ptr %20, align 8, !tbaa !9
  %77 = invoke noundef ptr @_ZNK7cascadb5Slice4dataEv(ptr noundef nonnull align 8 dereferenceable(12) %7)
          to label %78 unwind label %123

78:                                               ; preds = %75
  %79 = getelementptr inbounds %"class.cascadb::RAMFile", ptr %23, i32 0, i32 2
  %80 = load i64, ptr %17, align 8, !tbaa !9
  %81 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPcSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %80) #5
  %82 = load ptr, ptr %81, align 8, !tbaa !5
  %83 = load i64, ptr %9, align 8, !tbaa !9
  %84 = urem i64 %83, 4096
  %85 = getelementptr inbounds i8, ptr %82, i64 %84
  %86 = load i64, ptr %20, align 8, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %77, ptr align 1 %85, i64 %86, i1 false)
  %87 = load i64, ptr %20, align 8, !tbaa !9
  %88 = load i64, ptr %19, align 8, !tbaa !9
  %89 = sub i64 %88, %87
  store i64 %89, ptr %19, align 8, !tbaa !9
  %90 = load i64, ptr %20, align 8, !tbaa !9
  %91 = load i64, ptr %18, align 8, !tbaa !9
  %92 = add i64 %91, %90
  store i64 %92, ptr %18, align 8, !tbaa !9
  %93 = load i64, ptr %17, align 8, !tbaa !9
  %94 = add i64 %93, 1
  store i64 %94, ptr %17, align 8, !tbaa !9
  br label %95

95:                                               ; preds = %107, %78
  %96 = load i64, ptr %19, align 8, !tbaa !9
  %97 = icmp ugt i64 %96, 0
  br i1 %97, label %98, label %127

98:                                               ; preds = %95
  %99 = load i64, ptr %19, align 8, !tbaa !9
  %100 = icmp ult i64 %99, 4096
  br i1 %100, label %101, label %103

101:                                              ; preds = %98
  %102 = load i64, ptr %19, align 8, !tbaa !9
  br label %104

103:                                              ; preds = %98
  br label %104

104:                                              ; preds = %103, %101
  %105 = phi i64 [ %102, %101 ], [ 4096, %103 ]
  store i64 %105, ptr %20, align 8, !tbaa !9
  %106 = invoke noundef ptr @_ZNK7cascadb5Slice4dataEv(ptr noundef nonnull align 8 dereferenceable(12) %7)
          to label %107 unwind label %123

107:                                              ; preds = %104
  %108 = load i64, ptr %18, align 8, !tbaa !9
  %109 = getelementptr inbounds i8, ptr %106, i64 %108
  %110 = getelementptr inbounds %"class.cascadb::RAMFile", ptr %23, i32 0, i32 2
  %111 = load i64, ptr %17, align 8, !tbaa !9
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPcSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %111) #5
  %113 = load ptr, ptr %112, align 8, !tbaa !5
  %114 = load i64, ptr %20, align 8, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %109, ptr align 1 %113, i64 %114, i1 false)
  %115 = load i64, ptr %20, align 8, !tbaa !9
  %116 = load i64, ptr %19, align 8, !tbaa !9
  %117 = sub i64 %116, %115
  store i64 %117, ptr %19, align 8, !tbaa !9
  %118 = load i64, ptr %20, align 8, !tbaa !9
  %119 = load i64, ptr %18, align 8, !tbaa !9
  %120 = add i64 %119, %118
  store i64 %120, ptr %18, align 8, !tbaa !9
  %121 = load i64, ptr %17, align 8, !tbaa !9
  %122 = add i64 %121, 1
  store i64 %122, ptr %17, align 8, !tbaa !9
  br label %95, !llvm.loop !20

123:                                              ; preds = %104, %75
  %124 = landingpad { ptr, i32 }
          cleanup
  %125 = extractvalue { ptr, i32 } %124, 0
  store ptr %125, ptr %13, align 8
  %126 = extractvalue { ptr, i32 } %124, 1
  store i32 %126, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  br label %136

127:                                              ; preds = %95
  %128 = load i64, ptr %19, align 8, !tbaa !9
  %129 = icmp eq i64 %128, 0
  br i1 %129, label %130, label %131

130:                                              ; preds = %127
  br label %133

131:                                              ; preds = %127
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 48, ptr noundef @__PRETTY_FUNCTION__._ZN7cascadb7RAMFile4readEmNS_5SliceERm) #6
  unreachable

132:                                              ; No predecessors!
  br label %133

133:                                              ; preds = %132, %130
  %134 = load i64, ptr %16, align 8, !tbaa !9
  %135 = load ptr, ptr %10, align 8, !tbaa !5
  store i64 %134, ptr %135, align 8, !tbaa !9
  store i1 true, ptr %6, align 1
  store i32 1, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  br label %137

136:                                              ; preds = %123, %57
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  br label %139

137:                                              ; preds = %133, %38
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @_ZN7cascadb11ScopedMutexD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %11) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #5
  %138 = load i1, ptr %6, align 1
  ret i1 %138

139:                                              ; preds = %136, %40
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @_ZN7cascadb11ScopedMutexD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %11) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #5
  br label %140

140:                                              ; preds = %139
  %141 = load ptr, ptr %13, align 8
  %142 = load i32, ptr %14, align 4
  %143 = insertvalue { ptr, i32 } poison, ptr %141, 0
  %144 = insertvalue { ptr, i32 } %143, i32 %142, 1
  resume { ptr, i32 } %144
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7cascadb11ScopedMutexC2EPNS_5MutexE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef) unnamed_addr #0 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7cascadb11ScopedMutex6unlockEv(ptr noundef nonnull align 8 dereferenceable(16)) #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK7cascadb5Slice4sizeEv(ptr noundef nonnull align 8 dereferenceable(12)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7cascadb5Slice4dataEv(ptr noundef nonnull align 8 dereferenceable(12)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPcSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7cascadb11ScopedMutexD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 48}
!12 = !{!"_ZTSN7cascadb7RAMFileE", !13, i64 0, !10, i64 48, !15, i64 56, !10, i64 80, !10, i64 88}
!13 = !{!"_ZTSN7cascadb5MutexE", !14, i64 0, !7, i64 8}
!14 = !{!"bool", !7, i64 0}
!15 = !{!"_ZTSSt6vectorIPcSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIPcSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!19 = !{!12, !10, i64 88}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.cascadb::Slice" = type <{ ptr, i32, [4 x i8] }>
%"class.cascadb::ScopedMutex" = type { i8, ptr }

@.str = external hidden unnamed_addr constant [12 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [76 x i8], align 1
@__PRETTY_FUNCTION__._ZN7cascadb7RAMFile4readEmNS_5SliceERm = external hidden unnamed_addr constant [55 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7cascadb7RAMFile4readEmNS_5SliceERm(ptr noundef nonnull align 8 dereferenceable(96) %0, i64 noundef %1, ptr %2, i32 %3, ptr nocapture noundef nonnull writeonly align 8 dereferenceable(8) %4) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca %"class.cascadb::Slice", align 8
  %7 = alloca %"class.cascadb::ScopedMutex", align 8
  store ptr %2, ptr %6, align 8
  %8 = getelementptr inbounds i8, ptr %6, i64 8
  store i32 %3, ptr %8, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #6
  call void @_ZN7cascadb11ScopedMutexC2EPNS_5MutexE(ptr noundef nonnull align 8 dereferenceable(16) %7, ptr noundef nonnull %0)
  %9 = getelementptr inbounds i8, ptr %0, i64 48
  %10 = load i64, ptr %9, align 8, !tbaa !5
  %.not = icmp eq i64 %10, 0
  br i1 %.not, label %11, label %12

11:                                               ; preds = %5
  call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 17, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN7cascadb7RAMFile4readEmNS_5SliceERm) #7
  unreachable

12:                                               ; preds = %5
  %13 = getelementptr inbounds i8, ptr %0, i64 88
  %14 = load i64, ptr %13, align 8, !tbaa !17
  invoke void @_ZN7cascadb11ScopedMutex6unlockEv(ptr noundef nonnull align 8 dereferenceable(16) %7)
          to label %15 unwind label %16

15:                                               ; preds = %12
  %.not45 = icmp ugt i64 %14, %1
  br i1 %.not45, label %18, label %.loopexit

16:                                               ; preds = %12
  %17 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN7cascadb11ScopedMutexD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %7) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #6
  resume { ptr, i32 } %17

18:                                               ; preds = %15
  %19 = call noundef i64 @_ZNK7cascadb5Slice4sizeEv(ptr noundef nonnull align 8 dereferenceable(12) %6)
  %20 = call noundef i64 @_ZNK7cascadb5Slice4sizeEv(ptr noundef nonnull align 8 dereferenceable(12) %6)
  %21 = add i64 %20, %1
  %22 = icmp ult i64 %14, %21
  %23 = sub i64 %14, %1
  %spec.select = select i1 %22, i64 %23, i64 %19
  %24 = lshr i64 %1, 12
  %25 = and i64 %1, 4095
  %26 = sub nuw nsw i64 4096, %25
  %27 = call i64 @llvm.umin.i64(i64 %spec.select, i64 %26)
  %28 = call noundef ptr @_ZNK7cascadb5Slice4dataEv(ptr noundef nonnull align 8 dereferenceable(12) %6)
  %29 = getelementptr inbounds i8, ptr %0, i64 56
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPcSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %24) #6
  %31 = load ptr, ptr %30, align 8, !tbaa !18
  %32 = getelementptr inbounds i8, ptr %31, i64 %25
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %28, ptr align 1 %32, i64 %27, i1 false)
  %33 = sub i64 %spec.select, %27
  %.not4647 = icmp eq i64 %33, 0
  br i1 %.not4647, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %18, %.lr.ph
  %.050 = phi i64 [ %39, %.lr.ph ], [ %33, %18 ]
  %.03949 = phi i64 [ %40, %.lr.ph ], [ %27, %18 ]
  %.040.in48 = phi i64 [ %.040, %.lr.ph ], [ %24, %18 ]
  %.040 = add i64 %.040.in48, 1
  %34 = call i64 @llvm.umin.i64(i64 %.050, i64 4096)
  %35 = call noundef ptr @_ZNK7cascadb5Slice4dataEv(ptr noundef nonnull align 8 dereferenceable(12) %6)
  %36 = getelementptr inbounds i8, ptr %35, i64 %.03949
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPcSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %.040) #6
  %38 = load ptr, ptr %37, align 8, !tbaa !18
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %36, ptr noundef nonnull align 1 dereferenceable(1) %38, i64 %34, i1 false)
  %39 = sub i64 %.050, %34
  %40 = add i64 %34, %.03949
  %.not46 = icmp eq i64 %39, 0
  br i1 %.not46, label %.loopexit, label %.lr.ph, !llvm.loop !19

.loopexit:                                        ; preds = %.lr.ph, %18, %15
  %storemerge = phi i64 [ 0, %15 ], [ %spec.select, %18 ], [ %spec.select, %.lr.ph ]
  store i64 %storemerge, ptr %4, align 8, !tbaa !21
  call void @_ZN7cascadb11ScopedMutexD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %7) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #6
  ret i1 true
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7cascadb11ScopedMutexC2EPNS_5MutexE(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef) unnamed_addr #0 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN7cascadb11ScopedMutex6unlockEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK7cascadb5Slice4sizeEv(ptr noundef nonnull align 8 dereferenceable(12)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK7cascadb5Slice4dataEv(ptr noundef nonnull align 8 dereferenceable(12)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPcSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7cascadb11ScopedMutexD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #3 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #5

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 48}
!6 = !{!"_ZTSN7cascadb7RAMFileE", !7, i64 0, !11, i64 48, !12, i64 56, !11, i64 80, !11, i64 88}
!7 = !{!"_ZTSN7cascadb5MutexE", !8, i64 0, !9, i64 8}
!8 = !{!"bool", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"_ZTSSt6vectorIPcSaIS0_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIPcSaIS0_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIPcSaIS0_EE17_Vector_impl_dataE", !16, i64 0, !16, i64 8, !16, i64 16}
!16 = !{!"any pointer", !9, i64 0}
!17 = !{!6, !11, i64 88}
!18 = !{!16, !16, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!11, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass