; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/freertos/portable/GCC/ARM_CM23/secure (secure_context)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SecureContext = type { ptr, ptr, ptr, ptr }

@SecureContext_Init.ulSecureContextsInitialized = external hidden global i32, align 4
@xSecureContexts = external dso_local global [8 x %struct.SecureContext], align 16

; Function Attrs: nounwind uwtable
define dso_local void @SecureContext_Init() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  %3 = call i32 asm sideeffect "mrs $0, ipsr", "=r,~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !5
  store i32 %3, ptr %1, align 4, !tbaa !6
  %4 = load i32, ptr %1, align 4, !tbaa !6
  %5 = icmp ne i32 %4, 0
  br i1 %5, label %6, label %35

6:                                                ; preds = %0
  %7 = load i32, ptr @SecureContext_Init.ulSecureContextsInitialized, align 4, !tbaa !6
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %9, label %35

9:                                                ; preds = %6
  store i32 1, ptr @SecureContext_Init.ulSecureContextsInitialized, align 4, !tbaa !6
  call void asm sideeffect "msr psplim, $0", "r,~{dirflag},~{fpsr},~{flags}"(i32 0) #2, !srcloc !10
  call void asm sideeffect "msr psp, $0", "r,~{dirflag},~{fpsr},~{flags}"(i32 0) #2, !srcloc !11
  store i32 0, ptr %2, align 4, !tbaa !6
  br label %10

10:                                               ; preds = %31, %9
  %11 = load i32, ptr %2, align 4, !tbaa !6
  %12 = zext i32 %11 to i64
  %13 = icmp ult i64 %12, 8
  br i1 %13, label %14, label %34

14:                                               ; preds = %10
  %15 = load i32, ptr %2, align 4, !tbaa !6
  %16 = zext i32 %15 to i64
  %17 = getelementptr inbounds [8 x %struct.SecureContext], ptr @xSecureContexts, i64 0, i64 %16
  %18 = getelementptr inbounds %struct.SecureContext, ptr %17, i32 0, i32 0
  store ptr null, ptr %18, align 16, !tbaa !12
  %19 = load i32, ptr %2, align 4, !tbaa !6
  %20 = zext i32 %19 to i64
  %21 = getelementptr inbounds [8 x %struct.SecureContext], ptr @xSecureContexts, i64 0, i64 %20
  %22 = getelementptr inbounds %struct.SecureContext, ptr %21, i32 0, i32 1
  store ptr null, ptr %22, align 8, !tbaa !15
  %23 = load i32, ptr %2, align 4, !tbaa !6
  %24 = zext i32 %23 to i64
  %25 = getelementptr inbounds [8 x %struct.SecureContext], ptr @xSecureContexts, i64 0, i64 %24
  %26 = getelementptr inbounds %struct.SecureContext, ptr %25, i32 0, i32 2
  store ptr null, ptr %26, align 16, !tbaa !16
  %27 = load i32, ptr %2, align 4, !tbaa !6
  %28 = zext i32 %27 to i64
  %29 = getelementptr inbounds [8 x %struct.SecureContext], ptr @xSecureContexts, i64 0, i64 %28
  %30 = getelementptr inbounds %struct.SecureContext, ptr %29, i32 0, i32 3
  store ptr null, ptr %30, align 8, !tbaa !17
  br label %31

31:                                               ; preds = %14
  %32 = load i32, ptr %2, align 4, !tbaa !6
  %33 = add i32 %32, 1
  store i32 %33, ptr %2, align 4, !tbaa !6
  br label %10, !llvm.loop !18

34:                                               ; preds = %10
  call void asm sideeffect "msr control, $0", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 3) #2, !srcloc !20
  br label %35

35:                                               ; preds = %34, %6, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2147880814}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{i64 2147880874}
!11 = !{i64 2147880944}
!12 = !{!13, !14, i64 0}
!13 = !{!"SecureContext", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!13, !14, i64 16}
!17 = !{!13, !14, i64 24}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{i64 2147881070}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.SecureContext = type { ptr, ptr, ptr, ptr }

@SecureContext_Init.ulSecureContextsInitialized = external hidden local_unnamed_addr global i32, align 4
@xSecureContexts = external dso_local local_unnamed_addr global [8 x %struct.SecureContext], align 16

; Function Attrs: nounwind uwtable
define dso_local void @SecureContext_Init() local_unnamed_addr #0 {
  %1 = tail call i32 asm sideeffect "mrs $0, ipsr", "=r,~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !5
  %2 = icmp ne i32 %1, 0
  %3 = load i32, ptr @SecureContext_Init.ulSecureContextsInitialized, align 4
  %4 = icmp eq i32 %3, 0
  %or.cond = select i1 %2, i1 %4, i1 false
  br i1 %or.cond, label %5, label %6

5:                                                ; preds = %0
  store i32 1, ptr @SecureContext_Init.ulSecureContextsInitialized, align 4, !tbaa !6
  tail call void asm sideeffect "msr psplim, $0", "r,~{dirflag},~{fpsr},~{flags}"(i32 0) #2, !srcloc !10
  tail call void asm sideeffect "msr psp, $0", "r,~{dirflag},~{fpsr},~{flags}"(i32 0) #2, !srcloc !11
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(256) @xSecureContexts, i8 0, i64 256, i1 false), !tbaa !12
  tail call void asm sideeffect "msr control, $0", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 3) #2, !srcloc !14
  br label %6

6:                                                ; preds = %5, %0
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2147880814}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{i64 2147880874}
!11 = !{i64 2147880944}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{i64 2147881070}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopIdiomRecognizePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass