; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (SetBaudRate)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_SetBaudRate(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #4
  store i8 0, ptr %11, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 -1, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = icmp ne ptr %17, null
  br i1 %18, label %19, label %20

19:                                               ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %21

20:                                               ; preds = %2
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 540)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %16, align 4
  br label %172

21:                                               ; preds = %19
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.XUartPs, ptr %22, i32 0, i32 2
  %24 = load i32, ptr %23, align 4, !tbaa !12
  %25 = icmp eq i32 %24, 286331153
  br i1 %25, label %26, label %27

26:                                               ; preds = %21
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %28

27:                                               ; preds = %21
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 541)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %16, align 4
  br label %172

28:                                               ; preds = %26
  %29 = load i32, ptr %5, align 4, !tbaa !9
  %30 = icmp ule i32 %29, 921600
  br i1 %30, label %31, label %32

31:                                               ; preds = %28
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %33

32:                                               ; preds = %28
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 542)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %16, align 4
  br label %172

33:                                               ; preds = %31
  %34 = load i32, ptr %5, align 4, !tbaa !9
  %35 = icmp uge i32 %34, 110
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %38

37:                                               ; preds = %33
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 543)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %3, align 4
  store i32 1, ptr %16, align 4
  br label %172

38:                                               ; preds = %36
  %39 = load i32, ptr %5, align 4, !tbaa !9
  %40 = mul i32 %39, 2
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.XUartPs, ptr %41, i32 0, i32 0
  %43 = getelementptr inbounds %struct.XUartPs_Config, ptr %42, i32 0, i32 2
  %44 = load i32, ptr %43, align 8, !tbaa !17
  %45 = icmp ugt i32 %40, %44
  br i1 %45, label %46, label %47

46:                                               ; preds = %38
  store i32 1055, ptr %3, align 4
  store i32 1, ptr %16, align 4
  br label %172

47:                                               ; preds = %38
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.XUartPs, ptr %48, i32 0, i32 0
  %50 = getelementptr inbounds %struct.XUartPs_Config, ptr %49, i32 0, i32 1
  %51 = load i32, ptr %50, align 4, !tbaa !18
  %52 = add i32 %51, 4
  %53 = zext i32 %52 to i64
  %54 = call i32 @Xil_In32(i64 noundef %53)
  store i32 %54, ptr %14, align 4, !tbaa !9
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.XUartPs, ptr %55, i32 0, i32 0
  %57 = getelementptr inbounds %struct.XUartPs_Config, ptr %56, i32 0, i32 2
  %58 = load i32, ptr %57, align 8, !tbaa !17
  store i32 %58, ptr %15, align 4, !tbaa !9
  %59 = load i32, ptr %14, align 4, !tbaa !9
  %60 = and i32 %59, 1
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %62, label %68

62:                                               ; preds = %47
  %63 = load ptr, ptr %4, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.XUartPs, ptr %63, i32 0, i32 0
  %65 = getelementptr inbounds %struct.XUartPs_Config, ptr %64, i32 0, i32 2
  %66 = load i32, ptr %65, align 8, !tbaa !17
  %67 = udiv i32 %66, 8
  store i32 %67, ptr %15, align 4, !tbaa !9
  br label %68

68:                                               ; preds = %62, %47
  store i32 4, ptr %6, align 4, !tbaa !9
  br label %69

69:                                               ; preds = %106, %68
  %70 = load i32, ptr %6, align 4, !tbaa !9
  %71 = icmp ult i32 %70, 255
  br i1 %71, label %72, label %109

72:                                               ; preds = %69
  %73 = load i32, ptr %15, align 4, !tbaa !9
  %74 = load i32, ptr %5, align 4, !tbaa !9
  %75 = load i32, ptr %6, align 4, !tbaa !9
  %76 = add i32 %75, 1
  %77 = mul i32 %74, %76
  %78 = udiv i32 %73, %77
  store i32 %78, ptr %7, align 4, !tbaa !9
  %79 = load i32, ptr %15, align 4, !tbaa !9
  %80 = load i32, ptr %7, align 4, !tbaa !9
  %81 = load i32, ptr %6, align 4, !tbaa !9
  %82 = add i32 %81, 1
  %83 = mul i32 %80, %82
  %84 = udiv i32 %79, %83
  store i32 %84, ptr %8, align 4, !tbaa !9
  %85 = load i32, ptr %5, align 4, !tbaa !9
  %86 = load i32, ptr %8, align 4, !tbaa !9
  %87 = icmp ugt i32 %85, %86
  br i1 %87, label %88, label %92

88:                                               ; preds = %72
  %89 = load i32, ptr %5, align 4, !tbaa !9
  %90 = load i32, ptr %8, align 4, !tbaa !9
  %91 = sub i32 %89, %90
  store i32 %91, ptr %9, align 4, !tbaa !9
  br label %96

92:                                               ; preds = %72
  %93 = load i32, ptr %8, align 4, !tbaa !9
  %94 = load i32, ptr %5, align 4, !tbaa !9
  %95 = sub i32 %93, %94
  store i32 %95, ptr %9, align 4, !tbaa !9
  br label %96

96:                                               ; preds = %92, %88
  %97 = load i32, ptr %12, align 4, !tbaa !9
  %98 = load i32, ptr %9, align 4, !tbaa !9
  %99 = icmp ugt i32 %97, %98
  br i1 %99, label %100, label %105

100:                                              ; preds = %96
  %101 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %101, ptr %10, align 4, !tbaa !9
  %102 = load i32, ptr %6, align 4, !tbaa !9
  %103 = trunc i32 %102 to i8
  store i8 %103, ptr %11, align 1, !tbaa !11
  %104 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %104, ptr %12, align 4, !tbaa !9
  br label %105

105:                                              ; preds = %100, %96
  br label %106

106:                                              ; preds = %105
  %107 = load i32, ptr %6, align 4, !tbaa !9
  %108 = add i32 %107, 1
  store i32 %108, ptr %6, align 4, !tbaa !9
  br label %69, !llvm.loop !19

109:                                              ; preds = %69
  %110 = load i32, ptr %12, align 4, !tbaa !9
  %111 = mul i32 %110, 100
  %112 = load i32, ptr %5, align 4, !tbaa !9
  %113 = udiv i32 %111, %112
  store i32 %113, ptr %13, align 4, !tbaa !9
  %114 = load i32, ptr %13, align 4, !tbaa !9
  %115 = icmp ult i32 3, %114
  br i1 %115, label %116, label %117

116:                                              ; preds = %109
  store i32 1055, ptr %3, align 4
  store i32 1, ptr %16, align 4
  br label %172

117:                                              ; preds = %109
  %118 = load ptr, ptr %4, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.XUartPs, ptr %118, i32 0, i32 0
  %120 = getelementptr inbounds %struct.XUartPs_Config, ptr %119, i32 0, i32 1
  %121 = load i32, ptr %120, align 4, !tbaa !18
  %122 = add i32 %121, 0
  %123 = zext i32 %122 to i64
  %124 = load ptr, ptr %4, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.XUartPs, ptr %124, i32 0, i32 0
  %126 = getelementptr inbounds %struct.XUartPs_Config, ptr %125, i32 0, i32 1
  %127 = load i32, ptr %126, align 4, !tbaa !18
  %128 = add i32 %127, 0
  %129 = zext i32 %128 to i64
  %130 = call i32 @Xil_In32(i64 noundef %129)
  %131 = and i32 %130, -61
  %132 = or i32 %131, 40
  call void @Xil_Out32(i64 noundef %123, i32 noundef %132)
  %133 = load ptr, ptr %4, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.XUartPs, ptr %133, i32 0, i32 0
  %135 = getelementptr inbounds %struct.XUartPs_Config, ptr %134, i32 0, i32 1
  %136 = load i32, ptr %135, align 4, !tbaa !18
  %137 = add i32 %136, 24
  %138 = zext i32 %137 to i64
  %139 = load i32, ptr %10, align 4, !tbaa !9
  call void @Xil_Out32(i64 noundef %138, i32 noundef %139)
  %140 = load ptr, ptr %4, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.XUartPs, ptr %140, i32 0, i32 0
  %142 = getelementptr inbounds %struct.XUartPs_Config, ptr %141, i32 0, i32 1
  %143 = load i32, ptr %142, align 4, !tbaa !18
  %144 = add i32 %143, 52
  %145 = zext i32 %144 to i64
  %146 = load i8, ptr %11, align 1, !tbaa !11
  %147 = zext i8 %146 to i32
  call void @Xil_Out32(i64 noundef %145, i32 noundef %147)
  %148 = load ptr, ptr %4, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.XUartPs, ptr %148, i32 0, i32 0
  %150 = getelementptr inbounds %struct.XUartPs_Config, ptr %149, i32 0, i32 1
  %151 = load i32, ptr %150, align 4, !tbaa !18
  %152 = add i32 %151, 0
  %153 = zext i32 %152 to i64
  call void @Xil_Out32(i64 noundef %153, i32 noundef 3)
  %154 = load ptr, ptr %4, align 8, !tbaa !5
  %155 = getelementptr inbounds %struct.XUartPs, ptr %154, i32 0, i32 0
  %156 = getelementptr inbounds %struct.XUartPs_Config, ptr %155, i32 0, i32 1
  %157 = load i32, ptr %156, align 4, !tbaa !18
  %158 = add i32 %157, 0
  %159 = zext i32 %158 to i64
  %160 = load ptr, ptr %4, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.XUartPs, ptr %160, i32 0, i32 0
  %162 = getelementptr inbounds %struct.XUartPs_Config, ptr %161, i32 0, i32 1
  %163 = load i32, ptr %162, align 4, !tbaa !18
  %164 = add i32 %163, 0
  %165 = zext i32 %164 to i64
  %166 = call i32 @Xil_In32(i64 noundef %165)
  %167 = and i32 %166, -61
  %168 = or i32 %167, 20
  call void @Xil_Out32(i64 noundef %159, i32 noundef %168)
  %169 = load i32, ptr %5, align 4, !tbaa !9
  %170 = load ptr, ptr %4, align 8, !tbaa !5
  %171 = getelementptr inbounds %struct.XUartPs, ptr %170, i32 0, i32 3
  store i32 %169, ptr %171, align 8, !tbaa !21
  store i32 0, ptr %3, align 4
  store i32 1, ptr %16, align 4
  br label %172

172:                                              ; preds = %117, %116, %46, %37, %32, %27, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %173 = load i32, ptr %3, align 4
  ret i32 %173
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 20}
!13 = !{!"", !14, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !16, i64 32, !16, i64 48, !6, i64 64, !6, i64 72, !10, i64 80, !7, i64 84}
!14 = !{!"", !15, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!15 = !{!"short", !7, i64 0}
!16 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}
!17 = !{!13, !10, i64 8}
!18 = !{!13, !10, i64 4}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!13, !10, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [163 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 1056) i32 @XUartPs_SetBaudRate(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %7, label %3

3:                                                ; preds = %2
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 20
  %5 = load i32, ptr %4, align 4, !tbaa !9
  %6 = icmp eq i32 %5, 286331153
  br i1 %6, label %8, label %10

7:                                                ; preds = %2
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 540) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %65

8:                                                ; preds = %3
  %9 = icmp ult i32 %1, 921601
  br i1 %9, label %11, label %13

10:                                               ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 541) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %65

11:                                               ; preds = %8
  %12 = icmp ugt i32 %1, 109
  br i1 %12, label %14, label %19

13:                                               ; preds = %8
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 542) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %65

14:                                               ; preds = %11
  %15 = shl nuw nsw i32 %1, 1
  %16 = getelementptr inbounds i8, ptr %0, i64 8
  %17 = load i32, ptr %16, align 8, !tbaa !15
  %18 = icmp ugt i32 %15, %17
  br i1 %18, label %65, label %20

19:                                               ; preds = %11
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 543) #4
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %65

20:                                               ; preds = %14
  %21 = getelementptr inbounds i8, ptr %0, i64 4
  %22 = load i32, ptr %21, align 4, !tbaa !16
  %23 = add i32 %22, 4
  %24 = zext i32 %23 to i64
  %25 = tail call i32 @Xil_In32(i64 noundef %24)
  %26 = load i32, ptr %16, align 8, !tbaa !15
  %27 = and i32 %25, 1
  %.not55 = icmp eq i32 %27, 0
  %28 = lshr i32 %26, 3
  %spec.select = select i1 %.not55, i32 %26, i32 %28
  br label %29

29:                                               ; preds = %20, %29
  %.04459 = phi i32 [ 4, %20 ], [ %30, %29 ]
  %.04558 = phi i32 [ -1, %20 ], [ %.1, %29 ]
  %.04657 = phi i8 [ 0, %20 ], [ %.147, %29 ]
  %.04856 = phi i32 [ 0, %20 ], [ %.149, %29 ]
  %30 = add nuw nsw i32 %.04459, 1
  %31 = mul nuw nsw i32 %30, %1
  %32 = udiv i32 %spec.select, %31
  %33 = mul i32 %32, %30
  %34 = udiv i32 %spec.select, %33
  %35 = icmp ult i32 %34, %1
  %36 = sub nsw i32 %1, %34
  %37 = sub i32 %34, %1
  %.050 = select i1 %35, i32 %36, i32 %37
  %38 = icmp ugt i32 %.04558, %.050
  %39 = trunc nuw i32 %.04459 to i8
  %.149 = select i1 %38, i32 %32, i32 %.04856
  %.147 = select i1 %38, i8 %39, i8 %.04657
  %.1 = tail call i32 @llvm.umin.i32(i32 %.04558, i32 %.050)
  %exitcond.not = icmp eq i32 %30, 255
  br i1 %exitcond.not, label %40, label %29, !llvm.loop !17

40:                                               ; preds = %29
  %41 = mul i32 %.1, 100
  %42 = udiv i32 %41, %1
  %43 = icmp ugt i32 %42, 3
  br i1 %43, label %65, label %44

44:                                               ; preds = %40
  %45 = load i32, ptr %21, align 4, !tbaa !16
  %46 = zext i32 %45 to i64
  %47 = tail call i32 @Xil_In32(i64 noundef %46)
  %48 = and i32 %47, -61
  %49 = or disjoint i32 %48, 40
  tail call void @Xil_Out32(i64 noundef %46, i32 noundef %49)
  %50 = load i32, ptr %21, align 4, !tbaa !16
  %51 = add i32 %50, 24
  %52 = zext i32 %51 to i64
  tail call void @Xil_Out32(i64 noundef %52, i32 noundef %.149)
  %53 = load i32, ptr %21, align 4, !tbaa !16
  %54 = add i32 %53, 52
  %55 = zext i32 %54 to i64
  %56 = zext i8 %.147 to i32
  tail call void @Xil_Out32(i64 noundef %55, i32 noundef %56)
  %57 = load i32, ptr %21, align 4, !tbaa !16
  %58 = zext i32 %57 to i64
  tail call void @Xil_Out32(i64 noundef %58, i32 noundef 3)
  %59 = load i32, ptr %21, align 4, !tbaa !16
  %60 = zext i32 %59 to i64
  %61 = tail call i32 @Xil_In32(i64 noundef %60)
  %62 = and i32 %61, -61
  %63 = or disjoint i32 %62, 20
  tail call void @Xil_Out32(i64 noundef %60, i32 noundef %63)
  %64 = getelementptr inbounds i8, ptr %0, i64 24
  store i32 %1, ptr %64, align 8, !tbaa !19
  br label %65

65:                                               ; preds = %40, %14, %44, %19, %13, %10, %7
  %.043 = phi i32 [ 0, %44 ], [ 0, %19 ], [ 0, %13 ], [ 0, %10 ], [ 0, %7 ], [ 1055, %14 ], [ 1055, %40 ]
  ret i32 %.043
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 20}
!10 = !{!"", !11, i64 0, !6, i64 16, !6, i64 20, !6, i64 24, !13, i64 32, !13, i64 48, !14, i64 64, !14, i64 72, !6, i64 80, !7, i64 84}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !14, i64 0, !6, i64 8, !6, i64 12}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!10, !6, i64 8}
!16 = !{!10, !6, i64 4}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!10, !6, i64 24}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass