; LLVM IR from TLE-MEC/Hack-CP-DSA :: Leetcode/Binary Subarrays With Sum/solution.ll (Z4calcRSt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z4calcRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %76, %2
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = sext i32 %10 to i64
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #2
  %14 = icmp ult i64 %11, %13
  br i1 %14, label %15, label %19

15:                                               ; preds = %9
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = icmp sle i32 %16, %17
  br label %19

19:                                               ; preds = %15, %9
  %20 = phi i1 [ false, %9 ], [ %18, %15 ]
  br i1 %20, label %21, label %77

21:                                               ; preds = %19
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %24) #2
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = add nsw i32 %27, %26
  store i32 %28, ptr %8, align 4, !tbaa !9
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = load i32, ptr %4, align 4, !tbaa !9
  %31 = icmp sle i32 %29, %30
  br i1 %31, label %32, label %41

32:                                               ; preds = %21
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = load i32, ptr %5, align 4, !tbaa !9
  %35 = sub nsw i32 %33, %34
  %36 = add nsw i32 %35, 1
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = add nsw i32 %37, %36
  store i32 %38, ptr %7, align 4, !tbaa !9
  %39 = load i32, ptr %6, align 4, !tbaa !9
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %6, align 4, !tbaa !9
  br label %76

41:                                               ; preds = %21
  br label %42

42:                                               ; preds = %52, %41
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = load i32, ptr %4, align 4, !tbaa !9
  %45 = icmp sgt i32 %43, %44
  br i1 %45, label %46, label %50

46:                                               ; preds = %42
  %47 = load i32, ptr %5, align 4, !tbaa !9
  %48 = load i32, ptr %6, align 4, !tbaa !9
  %49 = icmp sle i32 %47, %48
  br label %50

50:                                               ; preds = %46, %42
  %51 = phi i1 [ false, %42 ], [ %49, %46 ]
  br i1 %51, label %52, label %62

52:                                               ; preds = %50
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = load i32, ptr %5, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55) #2
  %57 = load i32, ptr %56, align 4, !tbaa !9
  %58 = load i32, ptr %8, align 4, !tbaa !9
  %59 = sub nsw i32 %58, %57
  store i32 %59, ptr %8, align 4, !tbaa !9
  %60 = load i32, ptr %5, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %5, align 4, !tbaa !9
  br label %42, !llvm.loop !11

62:                                               ; preds = %50
  %63 = load i32, ptr %5, align 4, !tbaa !9
  %64 = load i32, ptr %6, align 4, !tbaa !9
  %65 = icmp sle i32 %63, %64
  br i1 %65, label %66, label %73

66:                                               ; preds = %62
  %67 = load i32, ptr %6, align 4, !tbaa !9
  %68 = load i32, ptr %5, align 4, !tbaa !9
  %69 = sub nsw i32 %67, %68
  %70 = add nsw i32 %69, 1
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = add nsw i32 %71, %70
  store i32 %72, ptr %7, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %66, %62
  %74 = load i32, ptr %6, align 4, !tbaa !9
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %6, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %73, %32
  br label %9, !llvm.loop !13

77:                                               ; preds = %19
  %78 = load i32, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %78
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z4calcRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not50 = icmp eq i64 %3, 0
  br i1 %.not50, label %._crit_edge48, label %.lr.ph47

.lr.ph47:                                         ; preds = %2, %22
  %indvars.iv55 = phi i64 [ %indvars.iv.next56.pre-phi, %22 ], [ 0, %2 ]
  %.045 = phi i32 [ %.2, %22 ], [ 0, %2 ]
  %.02744 = phi i32 [ %.229, %22 ], [ 0, %2 ]
  %.03242 = phi i32 [ %.234, %22 ], [ 0, %2 ]
  %4 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv55) #1
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = add nsw i32 %5, %.045
  %.not = icmp sgt i32 %6, %1
  br i1 %.not, label %.preheader, label %9

.preheader:                                       ; preds = %.lr.ph47
  %7 = sext i32 %.03242 to i64
  %.not58 = icmp slt i64 %indvars.iv55, %7
  br i1 %.not58, label %._crit_edge.thread, label %.lr.ph

._crit_edge.thread:                               ; preds = %.preheader
  %8 = add nuw nsw i64 %indvars.iv55, 1
  br label %22

9:                                                ; preds = %.lr.ph47
  %10 = trunc nuw nsw i64 %indvars.iv55 to i32
  %reass.sub = sub i32 %10, %.03242
  %11 = add i32 %reass.sub, 1
  %.pre = add nuw nsw i64 %indvars.iv55, 1
  br label %22

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %7, %.preheader ]
  %.139 = phi i32 [ %14, %.lr.ph ], [ %6, %.preheader ]
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = sub nsw i32 %.139, %13
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %15 = icmp sgt i32 %14, %1
  %16 = icmp slt i64 %indvars.iv, %indvars.iv55
  %17 = and i1 %15, %16
  br i1 %17, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph
  %18 = trunc nsw i64 %indvars.iv.next to i32
  %19 = add nuw i64 %indvars.iv55, 1
  %20 = trunc nuw i64 %19 to i32
  %21 = sub i32 %20, %18
  %spec.select = select i1 %16, i32 %21, i32 0
  br label %22

22:                                               ; preds = %._crit_edge, %._crit_edge.thread, %9
  %indvars.iv.next56.pre-phi = phi i64 [ %.pre, %9 ], [ %8, %._crit_edge.thread ], [ %19, %._crit_edge ]
  %.234 = phi i32 [ %.03242, %9 ], [ %.03242, %._crit_edge.thread ], [ %18, %._crit_edge ]
  %.pn = phi i32 [ %11, %9 ], [ 0, %._crit_edge.thread ], [ %spec.select, %._crit_edge ]
  %.2 = phi i32 [ %6, %9 ], [ %6, %._crit_edge.thread ], [ %14, %._crit_edge ]
  %.229 = add nsw i32 %.pn, %.02744
  %23 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %24 = icmp ugt i64 %23, %indvars.iv.next56.pre-phi
  %25 = sext i32 %.234 to i64
  %26 = icmp sge i64 %indvars.iv.next56.pre-phi, %25
  %27 = select i1 %24, i1 %26, i1 false
  br i1 %27, label %.lr.ph47, label %._crit_edge48, !llvm.loop !11

._crit_edge48:                                    ; preds = %22, %2
  %.027.lcssa = phi i32 [ 0, %2 ], [ %.229, %22 ]
  ret i32 %.027.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass