; LLVM IR from lesialin/ImageSignalProcessing_C :: src/isp_eeh.ll (Z5emluts)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_isp_config = external global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef signext i8 @_Z5emluts(i16 noundef signext %0) #0 {
  %2 = alloca i16, align 2
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  store i16 %0, ptr %2, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  store i8 0, ptr %4, align 1, !tbaa !11
  %5 = load i16, ptr %2, align 2, !tbaa !5
  %6 = sext i16 %5 to i32
  %7 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 3), align 2, !tbaa !12
  %8 = zext i16 %7 to i32
  %9 = sub nsw i32 0, %8
  %10 = icmp slt i32 %6, %9
  br i1 %10, label %11, label %17

11:                                               ; preds = %1
  %12 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 1), align 2, !tbaa !27
  %13 = zext i16 %12 to i32
  %14 = load i16, ptr %2, align 2, !tbaa !5
  %15 = sext i16 %14 to i32
  %16 = mul nsw i32 %13, %15
  store i32 %16, ptr %3, align 4, !tbaa !9
  br label %81

17:                                               ; preds = %1
  %18 = load i16, ptr %2, align 2, !tbaa !5
  %19 = sext i16 %18 to i32
  %20 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 3), align 2, !tbaa !12
  %21 = zext i16 %20 to i32
  %22 = sub nsw i32 0, %21
  %23 = icmp sge i32 %19, %22
  br i1 %23, label %24, label %32

24:                                               ; preds = %17
  %25 = load i16, ptr %2, align 2, !tbaa !5
  %26 = sext i16 %25 to i32
  %27 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 2), align 2, !tbaa !28
  %28 = zext i16 %27 to i32
  %29 = sub nsw i32 0, %28
  %30 = icmp slt i32 %26, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %24
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %80

32:                                               ; preds = %24, %17
  %33 = load i16, ptr %2, align 2, !tbaa !5
  %34 = sext i16 %33 to i32
  %35 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 2), align 2, !tbaa !28
  %36 = zext i16 %35 to i32
  %37 = sub nsw i32 0, %36
  %38 = icmp sge i32 %34, %37
  br i1 %38, label %39, label %52

39:                                               ; preds = %32
  %40 = load i16, ptr %2, align 2, !tbaa !5
  %41 = sext i16 %40 to i32
  %42 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 2), align 2, !tbaa !28
  %43 = zext i16 %42 to i32
  %44 = icmp slt i32 %41, %43
  br i1 %44, label %45, label %52

45:                                               ; preds = %39
  %46 = load i16, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), align 2, !tbaa !29
  %47 = zext i16 %46 to i32
  %48 = sub nsw i32 0, %47
  %49 = load i16, ptr %2, align 2, !tbaa !5
  %50 = sext i16 %49 to i32
  %51 = mul nsw i32 %48, %50
  store i32 %51, ptr %3, align 4, !tbaa !9
  br label %79

52:                                               ; preds = %39, %32
  %53 = load i16, ptr %2, align 2, !tbaa !5
  %54 = sext i16 %53 to i32
  %55 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 2), align 2, !tbaa !28
  %56 = zext i16 %55 to i32
  %57 = icmp sge i32 %54, %56
  br i1 %57, label %58, label %65

58:                                               ; preds = %52
  %59 = load i16, ptr %2, align 2, !tbaa !5
  %60 = sext i16 %59 to i32
  %61 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 3), align 2, !tbaa !12
  %62 = zext i16 %61 to i32
  %63 = icmp slt i32 %60, %62
  br i1 %63, label %64, label %65

64:                                               ; preds = %58
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %78

65:                                               ; preds = %58, %52
  %66 = load i16, ptr %2, align 2, !tbaa !5
  %67 = sext i16 %66 to i32
  %68 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 3), align 2, !tbaa !12
  %69 = zext i16 %68 to i32
  %70 = icmp sge i32 %67, %69
  br i1 %70, label %71, label %77

71:                                               ; preds = %65
  %72 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 1), align 2, !tbaa !27
  %73 = zext i16 %72 to i32
  %74 = load i16, ptr %2, align 2, !tbaa !5
  %75 = sext i16 %74 to i32
  %76 = mul nsw i32 %73, %75
  store i32 %76, ptr %3, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %71, %65
  br label %78

78:                                               ; preds = %77, %64
  br label %79

79:                                               ; preds = %78, %45
  br label %80

80:                                               ; preds = %79, %31
  br label %81

81:                                               ; preds = %80, %11
  %82 = load i32, ptr %3, align 4, !tbaa !9
  %83 = ashr i32 %82, 8
  store i32 %83, ptr %3, align 4, !tbaa !9
  %84 = load i32, ptr %3, align 4, !tbaa !9
  %85 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 5), align 2, !tbaa !30
  %86 = sext i16 %85 to i32
  %87 = icmp sgt i32 %84, %86
  br i1 %87, label %88, label %91

88:                                               ; preds = %81
  %89 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 5), align 2, !tbaa !30
  %90 = sext i16 %89 to i32
  br label %93

91:                                               ; preds = %81
  %92 = load i32, ptr %3, align 4, !tbaa !9
  br label %93

93:                                               ; preds = %91, %88
  %94 = phi i32 [ %90, %88 ], [ %92, %91 ]
  %95 = trunc i32 %94 to i8
  store i8 %95, ptr %4, align 1, !tbaa !11
  %96 = load i32, ptr %3, align 4, !tbaa !9
  %97 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 4), align 2, !tbaa !31
  %98 = sext i16 %97 to i32
  %99 = icmp slt i32 %96, %98
  br i1 %99, label %100, label %103

100:                                              ; preds = %93
  %101 = load i16, ptr getelementptr inbounds (%struct.eeh_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 18), i32 0, i32 4), align 2, !tbaa !31
  %102 = sext i16 %101 to i32
  br label %105

103:                                              ; preds = %93
  %104 = load i32, ptr %3, align 4, !tbaa !9
  br label %105

105:                                              ; preds = %103, %100
  %106 = phi i32 [ %102, %100 ], [ %104, %103 ]
  %107 = trunc i32 %106 to i8
  store i8 %107, ptr %4, align 1, !tbaa !11
  %108 = load i8, ptr %4, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i8 %108
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !6, i64 356}
!13 = !{!"_ZTS12isp_config_t", !10, i64 0, !10, i64 4, !6, i64 8, !14, i64 16, !18, i64 48, !6, i64 64, !14, i64 72, !20, i64 104, !7, i64 120, !14, i64 168, !19, i64 200, !7, i64 204, !21, i64 252, !22, i64 256, !7, i64 320, !23, i64 350, !24, i64 362, !25, i64 364, !26, i64 372}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !17, i64 8, !7, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!"_ZTS9blc_cfg_t", !6, i64 0, !6, i64 2, !6, i64 4, !6, i64 6, !19, i64 8, !19, i64 12}
!19 = !{!"float", !7, i64 0}
!20 = !{!"_ZTS10awb_gain_t", !19, i64 0, !19, i64 4, !19, i64 8, !19, i64 12}
!21 = !{!"_ZTS9nlm_cfg_t", !7, i64 0, !7, i64 1, !7, i64 2}
!22 = !{!"_ZTS9bnf_cfg_t", !7, i64 0, !7, i64 50, !7, i64 58}
!23 = !{!"_ZTS9eeh_cfg_t", !6, i64 0, !6, i64 2, !6, i64 4, !6, i64 6, !6, i64 8, !6, i64 10}
!24 = !{!"_ZTS9fcs_cfg_t", !7, i64 0, !7, i64 1}
!25 = !{!"_ZTS9hsc_cfg_t", !7, i64 0, !19, i64 4}
!26 = !{!"_ZTS9bcc_cfg_t", !7, i64 0, !19, i64 4}
!27 = !{!13, !6, i64 352}
!28 = !{!13, !6, i64 354}
!29 = !{!13, !6, i64 350}
!30 = !{!13, !6, i64 360}
!31 = !{!13, !6, i64 358}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_isp_config = external local_unnamed_addr global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local noundef signext i8 @_Z5emluts(i16 noundef signext %0) local_unnamed_addr #0 {
  %2 = sext i16 %0 to i32
  %3 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 356), align 4
  %4 = zext i16 %3 to i32
  %5 = sub nsw i32 0, %4
  %6 = icmp slt i32 %2, %5
  br i1 %6, label %7, label %11

7:                                                ; preds = %1
  %8 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 352), align 8, !tbaa !5
  %9 = zext i16 %8 to i32
  %10 = mul nsw i32 %9, %2
  br label %29

11:                                               ; preds = %1
  %12 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 354), align 2, !tbaa !24
  %13 = zext i16 %12 to i32
  %14 = sub nsw i32 0, %13
  %15 = icmp slt i32 %2, %14
  br i1 %15, label %29, label %16

16:                                               ; preds = %11
  %17 = icmp slt i32 %2, %13
  br i1 %17, label %18, label %23

18:                                               ; preds = %16
  %19 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 350), align 2, !tbaa !25
  %20 = zext i16 %19 to i32
  %21 = mul nsw i32 %2, %20
  %22 = sub nsw i32 0, %21
  br label %29

23:                                               ; preds = %16
  %24 = icmp ult i32 %2, %4
  br i1 %24, label %29, label %25

25:                                               ; preds = %23
  %26 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 352), align 8, !tbaa !5
  %27 = zext i16 %26 to i32
  %28 = mul nuw nsw i32 %27, %2
  br label %29

29:                                               ; preds = %23, %11, %25, %18, %7
  %.0 = phi i32 [ %10, %7 ], [ %22, %18 ], [ %28, %25 ], [ 0, %11 ], [ 0, %23 ]
  %30 = ashr i32 %.0, 8
  %31 = load i16, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 358), align 2
  %32 = sext i16 %31 to i32
  %33 = tail call i32 @llvm.smax.i32(i32 %30, i32 %32)
  %34 = trunc i32 %33 to i8
  ret i8 %34
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 352}
!6 = !{!"_ZTS12isp_config_t", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !15, i64 48, !10, i64 64, !11, i64 72, !17, i64 104, !8, i64 120, !11, i64 168, !16, i64 200, !8, i64 204, !18, i64 252, !19, i64 256, !8, i64 320, !20, i64 350, !21, i64 362, !22, i64 364, !23, i64 372}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !8, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!"_ZTS9blc_cfg_t", !10, i64 0, !10, i64 2, !10, i64 4, !10, i64 6, !16, i64 8, !16, i64 12}
!16 = !{!"float", !8, i64 0}
!17 = !{!"_ZTS10awb_gain_t", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12}
!18 = !{!"_ZTS9nlm_cfg_t", !8, i64 0, !8, i64 1, !8, i64 2}
!19 = !{!"_ZTS9bnf_cfg_t", !8, i64 0, !8, i64 50, !8, i64 58}
!20 = !{!"_ZTS9eeh_cfg_t", !10, i64 0, !10, i64 2, !10, i64 4, !10, i64 6, !10, i64 8, !10, i64 10}
!21 = !{!"_ZTS9fcs_cfg_t", !8, i64 0, !8, i64 1}
!22 = !{!"_ZTS9hsc_cfg_t", !8, i64 0, !16, i64 4}
!23 = !{!"_ZTS9bcc_cfg_t", !8, i64 0, !16, i64 4}
!24 = !{!6, !10, i64 354}
!25 = !{!6, !10, i64 350}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass