; LLVM IR from ryansturmer/thinfat32 :: src (thinfat32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @upper(i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @tf_shorten_filename(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i8 %2, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = call i64 @strlen(ptr noundef %11) #5
  %13 = trunc i64 %12 to i32
  store i32 %13, ptr %7, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = call ptr @strrchr(ptr noundef %14, i32 noundef 46) #5
  store ptr %15, ptr %10, align 8, !tbaa !5
  store i32 0, ptr %8, align 4, !tbaa !10
  br label %16

16:                                               ; preds = %131, %3
  %17 = load i32, ptr %8, align 4, !tbaa !10
  %18 = icmp slt i32 %17, 3
  br i1 %18, label %19, label %134

19:                                               ; preds = %16
  br label %20

20:                                               ; preds = %103, %19
  %21 = load ptr, ptr %10, align 8, !tbaa !5
  %22 = icmp ne ptr %21, null
  br i1 %22, label %23, label %101

23:                                               ; preds = %20
  %24 = load ptr, ptr %10, align 8, !tbaa !5
  %25 = load i8, ptr %24, align 1, !tbaa !9
  %26 = zext i8 %25 to i32
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %101

28:                                               ; preds = %23
  %29 = load ptr, ptr %10, align 8, !tbaa !5
  %30 = load i8, ptr %29, align 1, !tbaa !9
  %31 = zext i8 %30 to i32
  %32 = icmp slt i32 %31, 127
  br i1 %32, label %33, label %98

33:                                               ; preds = %28
  %34 = load ptr, ptr %10, align 8, !tbaa !5
  %35 = load i8, ptr %34, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = icmp sgt i32 %36, 20
  br i1 %37, label %38, label %98

38:                                               ; preds = %33
  %39 = load ptr, ptr %10, align 8, !tbaa !5
  %40 = load i8, ptr %39, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  %42 = icmp ne i32 %41, 34
  br i1 %42, label %43, label %98

43:                                               ; preds = %38
  %44 = load ptr, ptr %10, align 8, !tbaa !5
  %45 = load i8, ptr %44, align 1, !tbaa !9
  %46 = zext i8 %45 to i32
  %47 = icmp ne i32 %46, 42
  br i1 %47, label %48, label %98

48:                                               ; preds = %43
  %49 = load ptr, ptr %10, align 8, !tbaa !5
  %50 = load i8, ptr %49, align 1, !tbaa !9
  %51 = zext i8 %50 to i32
  %52 = icmp ne i32 %51, 46
  br i1 %52, label %53, label %98

53:                                               ; preds = %48
  %54 = load ptr, ptr %10, align 8, !tbaa !5
  %55 = load i8, ptr %54, align 1, !tbaa !9
  %56 = zext i8 %55 to i32
  %57 = icmp ne i32 %56, 47
  br i1 %57, label %58, label %98

58:                                               ; preds = %53
  %59 = load ptr, ptr %10, align 8, !tbaa !5
  %60 = load i8, ptr %59, align 1, !tbaa !9
  %61 = zext i8 %60 to i32
  %62 = icmp ne i32 %61, 58
  br i1 %62, label %63, label %98

63:                                               ; preds = %58
  %64 = load ptr, ptr %10, align 8, !tbaa !5
  %65 = load i8, ptr %64, align 1, !tbaa !9
  %66 = zext i8 %65 to i32
  %67 = icmp ne i32 %66, 60
  br i1 %67, label %68, label %98

68:                                               ; preds = %63
  %69 = load ptr, ptr %10, align 8, !tbaa !5
  %70 = load i8, ptr %69, align 1, !tbaa !9
  %71 = zext i8 %70 to i32
  %72 = icmp ne i32 %71, 62
  br i1 %72, label %73, label %98

73:                                               ; preds = %68
  %74 = load ptr, ptr %10, align 8, !tbaa !5
  %75 = load i8, ptr %74, align 1, !tbaa !9
  %76 = zext i8 %75 to i32
  %77 = icmp ne i32 %76, 63
  br i1 %77, label %78, label %98

78:                                               ; preds = %73
  %79 = load ptr, ptr %10, align 8, !tbaa !5
  %80 = load i8, ptr %79, align 1, !tbaa !9
  %81 = zext i8 %80 to i32
  %82 = icmp ne i32 %81, 91
  br i1 %82, label %83, label %98

83:                                               ; preds = %78
  %84 = load ptr, ptr %10, align 8, !tbaa !5
  %85 = load i8, ptr %84, align 1, !tbaa !9
  %86 = zext i8 %85 to i32
  %87 = icmp ne i32 %86, 92
  br i1 %87, label %88, label %98

88:                                               ; preds = %83
  %89 = load ptr, ptr %10, align 8, !tbaa !5
  %90 = load i8, ptr %89, align 1, !tbaa !9
  %91 = zext i8 %90 to i32
  %92 = icmp ne i32 %91, 93
  br i1 %92, label %93, label %98

93:                                               ; preds = %88
  %94 = load ptr, ptr %10, align 8, !tbaa !5
  %95 = load i8, ptr %94, align 1, !tbaa !9
  %96 = zext i8 %95 to i32
  %97 = icmp ne i32 %96, 124
  br label %98

98:                                               ; preds = %93, %88, %83, %78, %73, %68, %63, %58, %53, %48, %43, %38, %33, %28
  %99 = phi i1 [ false, %88 ], [ false, %83 ], [ false, %78 ], [ false, %73 ], [ false, %68 ], [ false, %63 ], [ false, %58 ], [ false, %53 ], [ false, %48 ], [ false, %43 ], [ false, %38 ], [ false, %33 ], [ false, %28 ], [ %97, %93 ]
  %100 = xor i1 %99, true
  br label %101

101:                                              ; preds = %98, %23, %20
  %102 = phi i1 [ false, %23 ], [ false, %20 ], [ %100, %98 ]
  br i1 %102, label %103, label %106

103:                                              ; preds = %101
  %104 = load ptr, ptr %10, align 8, !tbaa !5
  %105 = getelementptr inbounds i8, ptr %104, i32 1
  store ptr %105, ptr %10, align 8, !tbaa !5
  br label %20, !llvm.loop !12

106:                                              ; preds = %101
  %107 = load ptr, ptr %10, align 8, !tbaa !5
  %108 = icmp eq ptr %107, null
  br i1 %108, label %114, label %109

109:                                              ; preds = %106
  %110 = load ptr, ptr %10, align 8, !tbaa !5
  %111 = load i8, ptr %110, align 1, !tbaa !9
  %112 = zext i8 %111 to i32
  %113 = icmp eq i32 %112, 0
  br i1 %113, label %114, label %120

114:                                              ; preds = %109, %106
  %115 = load ptr, ptr %4, align 8, !tbaa !5
  %116 = getelementptr inbounds i8, ptr %115, i64 8
  %117 = load i32, ptr %8, align 4, !tbaa !10
  %118 = sext i32 %117 to i64
  %119 = getelementptr inbounds i8, ptr %116, i64 %118
  store i8 32, ptr %119, align 1, !tbaa !9
  br label %130

120:                                              ; preds = %109
  %121 = load ptr, ptr %10, align 8, !tbaa !5
  %122 = getelementptr inbounds i8, ptr %121, i32 1
  store ptr %122, ptr %10, align 8, !tbaa !5
  %123 = load i8, ptr %121, align 1, !tbaa !9
  %124 = call zeroext i8 @upper(i8 noundef zeroext %123)
  %125 = load ptr, ptr %4, align 8, !tbaa !5
  %126 = getelementptr inbounds i8, ptr %125, i64 8
  %127 = load i32, ptr %8, align 4, !tbaa !10
  %128 = sext i32 %127 to i64
  %129 = getelementptr inbounds i8, ptr %126, i64 %128
  store i8 %124, ptr %129, align 1, !tbaa !9
  br label %130

130:                                              ; preds = %120, %114
  br label %131

131:                                              ; preds = %130
  %132 = load i32, ptr %8, align 4, !tbaa !10
  %133 = add nsw i32 %132, 1
  store i32 %133, ptr %8, align 4, !tbaa !10
  br label %16, !llvm.loop !14

134:                                              ; preds = %16
  store i32 0, ptr %8, align 4, !tbaa !10
  %135 = load ptr, ptr %5, align 8, !tbaa !5
  %136 = call ptr @strrchr(ptr noundef %135, i32 noundef 46) #5
  store ptr %136, ptr %10, align 8, !tbaa !5
  br label %137

137:                                              ; preds = %283, %146, %134
  br label %138

138:                                              ; preds = %137
  %139 = load i32, ptr %8, align 4, !tbaa !10
  %140 = icmp eq i32 %139, 8
  br i1 %140, label %141, label %142

141:                                              ; preds = %138
  br label %286

142:                                              ; preds = %138
  %143 = load ptr, ptr %5, align 8, !tbaa !5
  %144 = load ptr, ptr %10, align 8, !tbaa !5
  %145 = icmp eq ptr %143, %144
  br i1 %145, label %146, label %152

146:                                              ; preds = %142
  %147 = load ptr, ptr %4, align 8, !tbaa !5
  %148 = load i32, ptr %8, align 4, !tbaa !10
  %149 = add nsw i32 %148, 1
  store i32 %149, ptr %8, align 4, !tbaa !10
  %150 = sext i32 %148 to i64
  %151 = getelementptr inbounds i8, ptr %147, i64 %150
  store i8 32, ptr %151, align 1, !tbaa !9
  br label %137

152:                                              ; preds = %142
  %153 = load ptr, ptr %4, align 8, !tbaa !5
  %154 = load i8, ptr %153, align 1, !tbaa !9
  %155 = zext i8 %154 to i32
  %156 = icmp eq i32 %155, 32
  br i1 %156, label %157, label %158

157:                                              ; preds = %152
  store i32 1, ptr %9, align 4, !tbaa !10
  br label %283

158:                                              ; preds = %152
  br label %159

159:                                              ; preds = %239, %158
  %160 = load ptr, ptr %5, align 8, !tbaa !5
  %161 = load i8, ptr %160, align 1, !tbaa !9
  %162 = zext i8 %161 to i32
  %163 = icmp ne i32 %162, 0
  br i1 %163, label %164, label %237

164:                                              ; preds = %159
  %165 = load ptr, ptr %5, align 8, !tbaa !5
  %166 = load i8, ptr %165, align 1, !tbaa !9
  %167 = zext i8 %166 to i32
  %168 = icmp slt i32 %167, 127
  br i1 %168, label %169, label %234

169:                                              ; preds = %164
  %170 = load ptr, ptr %5, align 8, !tbaa !5
  %171 = load i8, ptr %170, align 1, !tbaa !9
  %172 = zext i8 %171 to i32
  %173 = icmp sgt i32 %172, 20
  br i1 %173, label %174, label %234

174:                                              ; preds = %169
  %175 = load ptr, ptr %5, align 8, !tbaa !5
  %176 = load i8, ptr %175, align 1, !tbaa !9
  %177 = zext i8 %176 to i32
  %178 = icmp ne i32 %177, 34
  br i1 %178, label %179, label %234

179:                                              ; preds = %174
  %180 = load ptr, ptr %5, align 8, !tbaa !5
  %181 = load i8, ptr %180, align 1, !tbaa !9
  %182 = zext i8 %181 to i32
  %183 = icmp ne i32 %182, 42
  br i1 %183, label %184, label %234

184:                                              ; preds = %179
  %185 = load ptr, ptr %5, align 8, !tbaa !5
  %186 = load i8, ptr %185, align 1, !tbaa !9
  %187 = zext i8 %186 to i32
  %188 = icmp ne i32 %187, 46
  br i1 %188, label %189, label %234

189:                                              ; preds = %184
  %190 = load ptr, ptr %5, align 8, !tbaa !5
  %191 = load i8, ptr %190, align 1, !tbaa !9
  %192 = zext i8 %191 to i32
  %193 = icmp ne i32 %192, 47
  br i1 %193, label %194, label %234

194:                                              ; preds = %189
  %195 = load ptr, ptr %5, align 8, !tbaa !5
  %196 = load i8, ptr %195, align 1, !tbaa !9
  %197 = zext i8 %196 to i32
  %198 = icmp ne i32 %197, 58
  br i1 %198, label %199, label %234

199:                                              ; preds = %194
  %200 = load ptr, ptr %5, align 8, !tbaa !5
  %201 = load i8, ptr %200, align 1, !tbaa !9
  %202 = zext i8 %201 to i32
  %203 = icmp ne i32 %202, 60
  br i1 %203, label %204, label %234

204:                                              ; preds = %199
  %205 = load ptr, ptr %5, align 8, !tbaa !5
  %206 = load i8, ptr %205, align 1, !tbaa !9
  %207 = zext i8 %206 to i32
  %208 = icmp ne i32 %207, 62
  br i1 %208, label %209, label %234

209:                                              ; preds = %204
  %210 = load ptr, ptr %5, align 8, !tbaa !5
  %211 = load i8, ptr %210, align 1, !tbaa !9
  %212 = zext i8 %211 to i32
  %213 = icmp ne i32 %212, 63
  br i1 %213, label %214, label %234

214:                                              ; preds = %209
  %215 = load ptr, ptr %5, align 8, !tbaa !5
  %216 = load i8, ptr %215, align 1, !tbaa !9
  %217 = zext i8 %216 to i32
  %218 = icmp ne i32 %217, 91
  br i1 %218, label %219, label %234

219:                                              ; preds = %214
  %220 = load ptr, ptr %5, align 8, !tbaa !5
  %221 = load i8, ptr %220, align 1, !tbaa !9
  %222 = zext i8 %221 to i32
  %223 = icmp ne i32 %222, 92
  br i1 %223, label %224, label %234

224:                                              ; preds = %219
  %225 = load ptr, ptr %5, align 8, !tbaa !5
  %226 = load i8, ptr %225, align 1, !tbaa !9
  %227 = zext i8 %226 to i32
  %228 = icmp ne i32 %227, 93
  br i1 %228, label %229, label %234

229:                                              ; preds = %224
  %230 = load ptr, ptr %5, align 8, !tbaa !5
  %231 = load i8, ptr %230, align 1, !tbaa !9
  %232 = zext i8 %231 to i32
  %233 = icmp ne i32 %232, 124
  br label %234

234:                                              ; preds = %229, %224, %219, %214, %209, %204, %199, %194, %189, %184, %179, %174, %169, %164
  %235 = phi i1 [ false, %224 ], [ false, %219 ], [ false, %214 ], [ false, %209 ], [ false, %204 ], [ false, %199 ], [ false, %194 ], [ false, %189 ], [ false, %184 ], [ false, %179 ], [ false, %174 ], [ false, %169 ], [ false, %164 ], [ %233, %229 ]
  %236 = xor i1 %235, true
  br label %237

237:                                              ; preds = %234, %159
  %238 = phi i1 [ false, %159 ], [ %236, %234 ]
  br i1 %238, label %239, label %242

239:                                              ; preds = %237
  %240 = load ptr, ptr %5, align 8, !tbaa !5
  %241 = getelementptr inbounds i8, ptr %240, i32 1
  store ptr %241, ptr %5, align 8, !tbaa !5
  br label %159, !llvm.loop !15

242:                                              ; preds = %237
  %243 = load ptr, ptr %5, align 8, !tbaa !5
  %244 = load i8, ptr %243, align 1, !tbaa !9
  %245 = zext i8 %244 to i32
  %246 = icmp eq i32 %245, 0
  br i1 %246, label %247, label %252

247:                                              ; preds = %242
  %248 = load ptr, ptr %4, align 8, !tbaa !5
  %249 = load i32, ptr %8, align 4, !tbaa !10
  %250 = sext i32 %249 to i64
  %251 = getelementptr inbounds i8, ptr %248, i64 %250
  store i8 32, ptr %251, align 1, !tbaa !9
  br label %282

252:                                              ; preds = %242
  %253 = load ptr, ptr %5, align 8, !tbaa !5
  %254 = load i8, ptr %253, align 1, !tbaa !9
  %255 = zext i8 %254 to i32
  %256 = icmp eq i32 %255, 44
  br i1 %256, label %267, label %257

257:                                              ; preds = %252
  %258 = load ptr, ptr %5, align 8, !tbaa !5
  %259 = load i8, ptr %258, align 1, !tbaa !9
  %260 = zext i8 %259 to i32
  %261 = icmp eq i32 %260, 91
  br i1 %261, label %267, label %262

262:                                              ; preds = %257
  %263 = load ptr, ptr %5, align 8, !tbaa !5
  %264 = load i8, ptr %263, align 1, !tbaa !9
  %265 = zext i8 %264 to i32
  %266 = icmp eq i32 %265, 93
  br i1 %266, label %267, label %272

267:                                              ; preds = %262, %257, %252
  %268 = load ptr, ptr %4, align 8, !tbaa !5
  %269 = load i32, ptr %8, align 4, !tbaa !10
  %270 = sext i32 %269 to i64
  %271 = getelementptr inbounds i8, ptr %268, i64 %270
  store i8 95, ptr %271, align 1, !tbaa !9
  br label %281

272:                                              ; preds = %262
  %273 = load ptr, ptr %5, align 8, !tbaa !5
  %274 = getelementptr inbounds i8, ptr %273, i32 1
  store ptr %274, ptr %5, align 8, !tbaa !5
  %275 = load i8, ptr %273, align 1, !tbaa !9
  %276 = call zeroext i8 @upper(i8 noundef zeroext %275)
  %277 = load ptr, ptr %4, align 8, !tbaa !5
  %278 = load i32, ptr %8, align 4, !tbaa !10
  %279 = sext i32 %278 to i64
  %280 = getelementptr inbounds i8, ptr %277, i64 %279
  store i8 %276, ptr %280, align 1, !tbaa !9
  br label %281

281:                                              ; preds = %272, %267
  br label %282

282:                                              ; preds = %281, %247
  br label %283

283:                                              ; preds = %282, %157
  %284 = load i32, ptr %8, align 4, !tbaa !10
  %285 = add nsw i32 %284, 1
  store i32 %285, ptr %8, align 4, !tbaa !10
  br label %137

286:                                              ; preds = %141
  %287 = load i8, ptr %6, align 1, !tbaa !9
  %288 = zext i8 %287 to i32
  %289 = icmp sgt i32 %288, 4
  br i1 %289, label %290, label %298

290:                                              ; preds = %286
  %291 = load ptr, ptr %4, align 8, !tbaa !5
  %292 = getelementptr inbounds i8, ptr %291, i64 2
  %293 = load i8, ptr %6, align 1, !tbaa !9
  %294 = zext i8 %293 to i32
  %295 = call i32 (ptr, i64, ptr, ...) @snprintf(ptr noundef %292, i64 noundef 6, ptr noundef @.str.5, i32 noundef %294) #4
  %296 = load ptr, ptr %4, align 8, !tbaa !5
  %297 = getelementptr inbounds i8, ptr %296, i64 7
  store i8 49, ptr %297, align 1, !tbaa !9
  br label %329

298:                                              ; preds = %286
  %299 = load ptr, ptr %4, align 8, !tbaa !5
  %300 = call ptr @strchr(ptr noundef %299, i32 noundef 32) #5
  store ptr %300, ptr %10, align 8, !tbaa !5
  %301 = load ptr, ptr %10, align 8, !tbaa !5
  %302 = icmp eq ptr %301, null
  br i1 %302, label %310, label %303

303:                                              ; preds = %298
  %304 = load ptr, ptr %10, align 8, !tbaa !5
  %305 = load ptr, ptr %4, align 8, !tbaa !5
  %306 = ptrtoint ptr %304 to i64
  %307 = ptrtoint ptr %305 to i64
  %308 = sub i64 %306, %307
  %309 = icmp sgt i64 %308, 6
  br i1 %309, label %310, label %319

310:                                              ; preds = %303, %298
  %311 = load ptr, ptr %4, align 8, !tbaa !5
  %312 = getelementptr inbounds i8, ptr %311, i64 6
  store i8 126, ptr %312, align 1, !tbaa !9
  %313 = load i8, ptr %6, align 1, !tbaa !9
  %314 = zext i8 %313 to i32
  %315 = add nsw i32 %314, 48
  %316 = trunc i32 %315 to i8
  %317 = load ptr, ptr %4, align 8, !tbaa !5
  %318 = getelementptr inbounds i8, ptr %317, i64 7
  store i8 %316, ptr %318, align 1, !tbaa !9
  br label %328

319:                                              ; preds = %303
  %320 = load ptr, ptr %10, align 8, !tbaa !5
  %321 = getelementptr inbounds i8, ptr %320, i32 1
  store ptr %321, ptr %10, align 8, !tbaa !5
  store i8 126, ptr %320, align 1, !tbaa !9
  %322 = load i8, ptr %6, align 1, !tbaa !9
  %323 = zext i8 %322 to i32
  %324 = add nsw i32 %323, 48
  %325 = trunc i32 %324 to i8
  %326 = load ptr, ptr %10, align 8, !tbaa !5
  %327 = getelementptr inbounds i8, ptr %326, i32 1
  store ptr %327, ptr %10, align 8, !tbaa !5
  store i8 %325, ptr %326, align 1, !tbaa !9
  br label %328

328:                                              ; preds = %319, %310
  br label %329

329:                                              ; preds = %328, %290
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret i32 0
}

; Function Attrs: nounwind willreturn memory(read)
declare i64 @strlen(ptr noundef) #2

; Function Attrs: nounwind willreturn memory(read)
declare ptr @strrchr(ptr noundef, i32 noundef) #2

; Function Attrs: nounwind
declare i32 @snprintf(ptr noundef, i64 noundef, ptr noundef, ...) #3

; Function Attrs: nounwind willreturn memory(read)
declare ptr @strchr(ptr noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = distinct !{!15, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @upper(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @tf_shorten_filename(ptr noundef %0, ptr noundef readonly %1, i8 noundef zeroext %2) local_unnamed_addr #0 {
.preheader147:
  %3 = tail call ptr @strrchr(ptr noundef nonnull dereferenceable(1) %1, i32 noundef 46) #4
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %cond154 = icmp eq ptr %3, null
  br i1 %cond154, label %.preheader147.2.thread190, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.preheader147
  %5 = load i8, ptr %3, align 1, !tbaa !5
  %.fr146277 = freeze i8 %5
  %.not101278 = icmp eq i8 %.fr146277, 0
  br i1 %.not101278, label %.lr.ph.preheader.1, label %.lr.ph281

.lr.ph281:                                        ; preds = %.lr.ph.preheader, %.critedge125
  %.fr146280 = phi i8 [ %.fr146, %.critedge125 ], [ %.fr146277, %.lr.ph.preheader ]
  %.1155279 = phi ptr [ %7, %.critedge125 ], [ %3, %.lr.ph.preheader ]
  %6 = add i8 %.fr146280, -127
  %or.cond = icmp ult i8 %6, -106
  br i1 %or.cond, label %.critedge125, label %switch.early.test

switch.early.test:                                ; preds = %.lr.ph281
  switch i8 %.fr146280, label %.critedge [
    i8 93, label %.critedge125
    i8 92, label %.critedge125
    i8 91, label %.critedge125
    i8 63, label %.critedge125
    i8 62, label %.critedge125
    i8 60, label %.critedge125
    i8 58, label %.critedge125
    i8 47, label %.critedge125
    i8 46, label %.critedge125
    i8 42, label %.critedge125
    i8 34, label %.critedge125
    i8 124, label %.critedge125
  ]

.critedge125:                                     ; preds = %.lr.ph281, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test, %switch.early.test
  %7 = getelementptr inbounds i8, ptr %.1155279, i64 1
  %8 = load i8, ptr %7, align 1, !tbaa !5
  %.fr146 = freeze i8 %8
  %.not101 = icmp eq i8 %.fr146, 0
  br i1 %.not101, label %.lr.ph.preheader.1, label %.lr.ph281, !llvm.loop !8

.critedge:                                        ; preds = %switch.early.test
  %9 = getelementptr inbounds i8, ptr %.1155279, i64 1
  %10 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr146280)
  br label %.lr.ph.preheader.1

.preheader147.2.thread190:                        ; preds = %.preheader147
  store i8 32, ptr %4, align 1, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 9
  store i8 32, ptr %11, align 1, !tbaa !5
  br label %.lr.ph161

.lr.ph.preheader.1:                               ; preds = %.critedge125, %.lr.ph.preheader, %.critedge
  %storemerge.ph = phi i8 [ %10, %.critedge ], [ 32, %.lr.ph.preheader ], [ 32, %.critedge125 ]
  %.2.ph = phi ptr [ %9, %.critedge ], [ %3, %.lr.ph.preheader ], [ %7, %.critedge125 ]
  store i8 %storemerge.ph, ptr %4, align 1, !tbaa !5
  %12 = load i8, ptr %.2.ph, align 1, !tbaa !5
  %.fr146.1282 = freeze i8 %12
  %.not101.1283 = icmp eq i8 %.fr146.1282, 0
  br i1 %.not101.1283, label %.lr.ph.preheader.2, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader.1, %.critedge125.1
  %.fr146.1285 = phi i8 [ %.fr146.1, %.critedge125.1 ], [ %.fr146.1282, %.lr.ph.preheader.1 ]
  %.1155.1284 = phi ptr [ %16, %.critedge125.1 ], [ %.2.ph, %.lr.ph.preheader.1 ]
  %13 = add i8 %.fr146.1285, -127
  %or.cond.1 = icmp ult i8 %13, -106
  br i1 %or.cond.1, label %.critedge125.1, label %switch.early.test.1

switch.early.test.1:                              ; preds = %.lr.ph
  switch i8 %.fr146.1285, label %.preheader147.2.thread [
    i8 93, label %.critedge125.1
    i8 92, label %.critedge125.1
    i8 91, label %.critedge125.1
    i8 63, label %.critedge125.1
    i8 62, label %.critedge125.1
    i8 60, label %.critedge125.1
    i8 58, label %.critedge125.1
    i8 47, label %.critedge125.1
    i8 46, label %.critedge125.1
    i8 42, label %.critedge125.1
    i8 34, label %.critedge125.1
    i8 124, label %.critedge125.1
  ]

.preheader147.2.thread:                           ; preds = %switch.early.test.1
  %14 = getelementptr inbounds i8, ptr %.1155.1284, i64 1
  %15 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr146.1285)
  br label %.lr.ph.preheader.2

.critedge125.1:                                   ; preds = %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %switch.early.test.1, %.lr.ph
  %16 = getelementptr inbounds i8, ptr %.1155.1284, i64 1
  %17 = load i8, ptr %16, align 1, !tbaa !5
  %.fr146.1 = freeze i8 %17
  %.not101.1 = icmp eq i8 %.fr146.1, 0
  br i1 %.not101.1, label %.lr.ph.preheader.2, label %.lr.ph, !llvm.loop !8

.lr.ph.preheader.2:                               ; preds = %.critedge125.1, %.lr.ph.preheader.1, %.preheader147.2.thread
  %.sink = phi i8 [ %15, %.preheader147.2.thread ], [ 32, %.lr.ph.preheader.1 ], [ 32, %.critedge125.1 ]
  %.2.1189 = phi ptr [ %14, %.preheader147.2.thread ], [ %.2.ph, %.lr.ph.preheader.1 ], [ %16, %.critedge125.1 ]
  %18 = getelementptr inbounds i8, ptr %0, i64 9
  store i8 %.sink, ptr %18, align 1, !tbaa !5
  %19 = load i8, ptr %.2.1189, align 1, !tbaa !5
  %.fr146.2287 = freeze i8 %19
  %.not101.2288 = icmp eq i8 %.fr146.2287, 0
  br i1 %.not101.2288, label %.lr.ph161, label %.lr.ph291

.lr.ph291:                                        ; preds = %.lr.ph.preheader.2, %.critedge125.2
  %.fr146.2290 = phi i8 [ %.fr146.2, %.critedge125.2 ], [ %.fr146.2287, %.lr.ph.preheader.2 ]
  %.1155.2289 = phi ptr [ %22, %.critedge125.2 ], [ %.2.1189, %.lr.ph.preheader.2 ]
  %20 = add i8 %.fr146.2290, -127
  %or.cond.2 = icmp ult i8 %20, -106
  br i1 %or.cond.2, label %.critedge125.2, label %switch.early.test.2

switch.early.test.2:                              ; preds = %.lr.ph291
  switch i8 %.fr146.2290, label %.critedge.2 [
    i8 93, label %.critedge125.2
    i8 92, label %.critedge125.2
    i8 91, label %.critedge125.2
    i8 63, label %.critedge125.2
    i8 62, label %.critedge125.2
    i8 60, label %.critedge125.2
    i8 58, label %.critedge125.2
    i8 47, label %.critedge125.2
    i8 46, label %.critedge125.2
    i8 42, label %.critedge125.2
    i8 34, label %.critedge125.2
    i8 124, label %.critedge125.2
  ]

.critedge.2:                                      ; preds = %switch.early.test.2
  %21 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr146.2290)
  br label %.lr.ph161

.critedge125.2:                                   ; preds = %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %switch.early.test.2, %.lr.ph291
  %22 = getelementptr inbounds i8, ptr %.1155.2289, i64 1
  %23 = load i8, ptr %22, align 1, !tbaa !5
  %.fr146.2 = freeze i8 %23
  %.not101.2 = icmp eq i8 %.fr146.2, 0
  br i1 %.not101.2, label %.lr.ph161, label %.lr.ph291, !llvm.loop !8

.lr.ph161:                                        ; preds = %.critedge125.2, %.lr.ph.preheader.2, %.preheader147.2.thread190, %.critedge.2
  %.sink239 = phi i8 [ %21, %.critedge.2 ], [ 32, %.preheader147.2.thread190 ], [ 32, %.lr.ph.preheader.2 ], [ 32, %.critedge125.2 ]
  %24 = getelementptr inbounds i8, ptr %0, i64 10
  store i8 %.sink239, ptr %24, align 1, !tbaa !5
  %25 = tail call ptr @strrchr(ptr noundef nonnull dereferenceable(1) %1, i32 noundef 46) #4
  %26 = icmp eq ptr %25, %1
  br i1 %26, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split

.lr.ph161.split.us.preheader:                     ; preds = %.outer.thread, %.outer.6, %.outer.5, %.outer.4, %.outer.3, %.outer.2, %.outer.1, %.outer, %.lr.ph161
  %.179.ph171.lcssa.wide = phi i64 [ 0, %.lr.ph161 ], [ 1, %.outer ], [ 2, %.outer.1 ], [ 3, %.outer.2 ], [ 4, %.outer.3 ], [ 5, %.outer.4 ], [ 6, %.outer.5 ], [ 7, %.outer.6 ], [ 1, %.outer.thread ]
  %scevgep = getelementptr i8, ptr %0, i64 %.179.ph171.lcssa.wide
  %27 = sub nuw nsw i64 8, %.179.ph171.lcssa.wide
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %scevgep, i8 32, i64 %27, i1 false), !tbaa !5
  br label %.outer._crit_edge

.lr.ph161.split:                                  ; preds = %.lr.ph161
  %28 = load i8, ptr %0, align 1, !tbaa !5
  %29 = icmp eq i8 %28, 32
  br i1 %29, label %.outer, label %.preheader

.preheader:                                       ; preds = %.lr.ph161.split
  %30 = load i8, ptr %1, align 1, !tbaa !5
  %.fr145163 = freeze i8 %30
  %.not164 = icmp eq i8 %.fr145163, 0
  br i1 %.not164, label %.outer.sink.split, label %.lr.ph167

.lr.ph167:                                        ; preds = %.preheader, %.critedge139
  %.fr145166 = phi i8 [ %.fr145, %.critedge139 ], [ %.fr145163, %.preheader ]
  %.181165 = phi ptr [ %32, %.critedge139 ], [ %1, %.preheader ]
  %31 = add i8 %.fr145166, -127
  %or.cond126 = icmp ult i8 %31, -106
  br i1 %or.cond126, label %.critedge139, label %switch.early.test144

switch.early.test144:                             ; preds = %.lr.ph167
  switch i8 %.fr145166, label %34 [
    i8 93, label %.critedge139
    i8 92, label %.critedge139
    i8 91, label %.critedge139
    i8 63, label %.critedge139
    i8 62, label %.critedge139
    i8 60, label %.critedge139
    i8 58, label %.critedge139
    i8 47, label %.critedge139
    i8 46, label %.critedge139
    i8 42, label %.critedge139
    i8 34, label %.critedge139
    i8 124, label %.critedge139
    i8 44, label %.outer.thread
  ]

.critedge139:                                     ; preds = %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %switch.early.test144, %.lr.ph167
  %32 = getelementptr inbounds i8, ptr %.181165, i64 1
  %33 = load i8, ptr %32, align 1, !tbaa !5
  %.fr145 = freeze i8 %33
  %.not = icmp eq i8 %.fr145, 0
  br i1 %.not, label %.outer.sink.split, label %.lr.ph167, !llvm.loop !10

34:                                               ; preds = %switch.early.test144
  %35 = getelementptr inbounds i8, ptr %.181165, i64 1
  %36 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166)
  br label %.outer.sink.split

.outer.sink.split:                                ; preds = %.critedge139, %.preheader, %34
  %.sink241 = phi i8 [ %36, %34 ], [ 32, %.preheader ], [ 32, %.critedge139 ]
  %.282.ph = phi ptr [ %35, %34 ], [ %1, %.preheader ], [ %32, %.critedge139 ]
  store i8 %.sink241, ptr %0, align 1, !tbaa !5
  br label %.outer

.outer:                                           ; preds = %.outer.sink.split, %.lr.ph161.split
  %37 = phi i8 [ 32, %.lr.ph161.split ], [ %.sink241, %.outer.sink.split ]
  %.282 = phi ptr [ %1, %.lr.ph161.split ], [ %.282.ph, %.outer.sink.split ]
  %38 = icmp eq ptr %.282, %25
  br i1 %38, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split.1

.outer.thread:                                    ; preds = %switch.early.test144
  store i8 95, ptr %0, align 1, !tbaa !5
  %39 = icmp eq ptr %.181165, %25
  br i1 %39, label %.lr.ph161.split.us.preheader, label %.preheader.1

.lr.ph161.split.1:                                ; preds = %.outer
  %40 = icmp eq i8 %37, 32
  br i1 %40, label %.outer.1, label %.preheader.1

.preheader.1:                                     ; preds = %.outer.thread, %.lr.ph161.split.1
  %.282194196 = phi ptr [ %.282, %.lr.ph161.split.1 ], [ %.181165, %.outer.thread ]
  %41 = load i8, ptr %.282194196, align 1, !tbaa !5
  %.fr145163.1 = freeze i8 %41
  %.not164.1 = icmp eq i8 %.fr145163.1, 0
  br i1 %.not164.1, label %.outer.1.sink.split, label %.lr.ph167.1

.lr.ph167.1:                                      ; preds = %.preheader.1, %.critedge139.1
  %.fr145166.1 = phi i8 [ %.fr145.1, %.critedge139.1 ], [ %.fr145163.1, %.preheader.1 ]
  %.181165.1 = phi ptr [ %46, %.critedge139.1 ], [ %.282194196, %.preheader.1 ]
  %42 = add i8 %.fr145166.1, -127
  %or.cond126.1 = icmp ult i8 %42, -106
  br i1 %or.cond126.1, label %.critedge139.1, label %switch.early.test144.1

switch.early.test144.1:                           ; preds = %.lr.ph167.1
  switch i8 %.fr145166.1, label %43 [
    i8 93, label %.critedge139.1
    i8 92, label %.critedge139.1
    i8 91, label %.critedge139.1
    i8 63, label %.critedge139.1
    i8 62, label %.critedge139.1
    i8 60, label %.critedge139.1
    i8 58, label %.critedge139.1
    i8 47, label %.critedge139.1
    i8 46, label %.critedge139.1
    i8 42, label %.critedge139.1
    i8 34, label %.critedge139.1
    i8 124, label %.critedge139.1
    i8 44, label %.outer.1.sink.split
  ]

43:                                               ; preds = %switch.early.test144.1
  %44 = getelementptr inbounds i8, ptr %.181165.1, i64 1
  %45 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166.1)
  br label %.outer.1.sink.split

.critedge139.1:                                   ; preds = %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %switch.early.test144.1, %.lr.ph167.1
  %46 = getelementptr inbounds i8, ptr %.181165.1, i64 1
  %47 = load i8, ptr %46, align 1, !tbaa !5
  %.fr145.1 = freeze i8 %47
  %.not.1 = icmp eq i8 %.fr145.1, 0
  br i1 %.not.1, label %.outer.1.sink.split, label %.lr.ph167.1, !llvm.loop !10

.outer.1.sink.split:                              ; preds = %.critedge139.1, %switch.early.test144.1, %.preheader.1, %43
  %.sink242 = phi i8 [ %45, %43 ], [ 32, %.preheader.1 ], [ 95, %switch.early.test144.1 ], [ 32, %.critedge139.1 ]
  %.282.1.ph = phi ptr [ %44, %43 ], [ %.282194196, %.preheader.1 ], [ %.181165.1, %switch.early.test144.1 ], [ %46, %.critedge139.1 ]
  %48 = getelementptr inbounds i8, ptr %0, i64 1
  store i8 %.sink242, ptr %48, align 1, !tbaa !5
  br label %.outer.1

.outer.1:                                         ; preds = %.outer.1.sink.split, %.lr.ph161.split.1
  %.282.1 = phi ptr [ %.282, %.lr.ph161.split.1 ], [ %.282.1.ph, %.outer.1.sink.split ]
  %49 = icmp eq ptr %.282.1, %25
  br i1 %49, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split.2

.lr.ph161.split.2:                                ; preds = %.outer.1
  %50 = load i8, ptr %0, align 1, !tbaa !5
  %51 = icmp eq i8 %50, 32
  br i1 %51, label %.outer.2, label %.preheader.2

.preheader.2:                                     ; preds = %.lr.ph161.split.2
  %52 = load i8, ptr %.282.1, align 1, !tbaa !5
  %.fr145163.2 = freeze i8 %52
  %.not164.2 = icmp eq i8 %.fr145163.2, 0
  br i1 %.not164.2, label %.outer.2.sink.split, label %.lr.ph167.2

.lr.ph167.2:                                      ; preds = %.preheader.2, %.critedge139.2
  %.fr145166.2 = phi i8 [ %.fr145.2, %.critedge139.2 ], [ %.fr145163.2, %.preheader.2 ]
  %.181165.2 = phi ptr [ %57, %.critedge139.2 ], [ %.282.1, %.preheader.2 ]
  %53 = add i8 %.fr145166.2, -127
  %or.cond126.2 = icmp ult i8 %53, -106
  br i1 %or.cond126.2, label %.critedge139.2, label %switch.early.test144.2

switch.early.test144.2:                           ; preds = %.lr.ph167.2
  switch i8 %.fr145166.2, label %54 [
    i8 93, label %.critedge139.2
    i8 92, label %.critedge139.2
    i8 91, label %.critedge139.2
    i8 63, label %.critedge139.2
    i8 62, label %.critedge139.2
    i8 60, label %.critedge139.2
    i8 58, label %.critedge139.2
    i8 47, label %.critedge139.2
    i8 46, label %.critedge139.2
    i8 42, label %.critedge139.2
    i8 34, label %.critedge139.2
    i8 124, label %.critedge139.2
    i8 44, label %.outer.2.sink.split
  ]

54:                                               ; preds = %switch.early.test144.2
  %55 = getelementptr inbounds i8, ptr %.181165.2, i64 1
  %56 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166.2)
  br label %.outer.2.sink.split

.critedge139.2:                                   ; preds = %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %switch.early.test144.2, %.lr.ph167.2
  %57 = getelementptr inbounds i8, ptr %.181165.2, i64 1
  %58 = load i8, ptr %57, align 1, !tbaa !5
  %.fr145.2 = freeze i8 %58
  %.not.2 = icmp eq i8 %.fr145.2, 0
  br i1 %.not.2, label %.outer.2.sink.split, label %.lr.ph167.2, !llvm.loop !10

.outer.2.sink.split:                              ; preds = %.critedge139.2, %switch.early.test144.2, %.preheader.2, %54
  %.sink244 = phi i8 [ %56, %54 ], [ 32, %.preheader.2 ], [ 95, %switch.early.test144.2 ], [ 32, %.critedge139.2 ]
  %.282.2.ph = phi ptr [ %55, %54 ], [ %.282.1, %.preheader.2 ], [ %.181165.2, %switch.early.test144.2 ], [ %57, %.critedge139.2 ]
  %59 = getelementptr inbounds i8, ptr %0, i64 2
  store i8 %.sink244, ptr %59, align 1, !tbaa !5
  br label %.outer.2

.outer.2:                                         ; preds = %.outer.2.sink.split, %.lr.ph161.split.2
  %.282.2 = phi ptr [ %.282.1, %.lr.ph161.split.2 ], [ %.282.2.ph, %.outer.2.sink.split ]
  %60 = icmp eq ptr %.282.2, %25
  br i1 %60, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split.3

.lr.ph161.split.3:                                ; preds = %.outer.2
  %61 = load i8, ptr %0, align 1, !tbaa !5
  %62 = icmp eq i8 %61, 32
  br i1 %62, label %.outer.3, label %.preheader.3

.preheader.3:                                     ; preds = %.lr.ph161.split.3
  %63 = load i8, ptr %.282.2, align 1, !tbaa !5
  %.fr145163.3 = freeze i8 %63
  %.not164.3 = icmp eq i8 %.fr145163.3, 0
  br i1 %.not164.3, label %.outer.3.sink.split, label %.lr.ph167.3

.lr.ph167.3:                                      ; preds = %.preheader.3, %.critedge139.3
  %.fr145166.3 = phi i8 [ %.fr145.3, %.critedge139.3 ], [ %.fr145163.3, %.preheader.3 ]
  %.181165.3 = phi ptr [ %68, %.critedge139.3 ], [ %.282.2, %.preheader.3 ]
  %64 = add i8 %.fr145166.3, -127
  %or.cond126.3 = icmp ult i8 %64, -106
  br i1 %or.cond126.3, label %.critedge139.3, label %switch.early.test144.3

switch.early.test144.3:                           ; preds = %.lr.ph167.3
  switch i8 %.fr145166.3, label %65 [
    i8 93, label %.critedge139.3
    i8 92, label %.critedge139.3
    i8 91, label %.critedge139.3
    i8 63, label %.critedge139.3
    i8 62, label %.critedge139.3
    i8 60, label %.critedge139.3
    i8 58, label %.critedge139.3
    i8 47, label %.critedge139.3
    i8 46, label %.critedge139.3
    i8 42, label %.critedge139.3
    i8 34, label %.critedge139.3
    i8 124, label %.critedge139.3
    i8 44, label %.outer.3.sink.split
  ]

65:                                               ; preds = %switch.early.test144.3
  %66 = getelementptr inbounds i8, ptr %.181165.3, i64 1
  %67 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166.3)
  br label %.outer.3.sink.split

.critedge139.3:                                   ; preds = %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %switch.early.test144.3, %.lr.ph167.3
  %68 = getelementptr inbounds i8, ptr %.181165.3, i64 1
  %69 = load i8, ptr %68, align 1, !tbaa !5
  %.fr145.3 = freeze i8 %69
  %.not.3 = icmp eq i8 %.fr145.3, 0
  br i1 %.not.3, label %.outer.3.sink.split, label %.lr.ph167.3, !llvm.loop !10

.outer.3.sink.split:                              ; preds = %.critedge139.3, %switch.early.test144.3, %.preheader.3, %65
  %.sink246 = phi i8 [ %67, %65 ], [ 32, %.preheader.3 ], [ 95, %switch.early.test144.3 ], [ 32, %.critedge139.3 ]
  %.282.3.ph = phi ptr [ %66, %65 ], [ %.282.2, %.preheader.3 ], [ %.181165.3, %switch.early.test144.3 ], [ %68, %.critedge139.3 ]
  %70 = getelementptr inbounds i8, ptr %0, i64 3
  store i8 %.sink246, ptr %70, align 1, !tbaa !5
  br label %.outer.3

.outer.3:                                         ; preds = %.outer.3.sink.split, %.lr.ph161.split.3
  %.282.3 = phi ptr [ %.282.2, %.lr.ph161.split.3 ], [ %.282.3.ph, %.outer.3.sink.split ]
  %71 = icmp eq ptr %.282.3, %25
  br i1 %71, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split.4

.lr.ph161.split.4:                                ; preds = %.outer.3
  %72 = load i8, ptr %0, align 1, !tbaa !5
  %73 = icmp eq i8 %72, 32
  br i1 %73, label %.outer.4, label %.preheader.4

.preheader.4:                                     ; preds = %.lr.ph161.split.4
  %74 = load i8, ptr %.282.3, align 1, !tbaa !5
  %.fr145163.4 = freeze i8 %74
  %.not164.4 = icmp eq i8 %.fr145163.4, 0
  br i1 %.not164.4, label %.outer.4.sink.split, label %.lr.ph167.4

.lr.ph167.4:                                      ; preds = %.preheader.4, %.critedge139.4
  %.fr145166.4 = phi i8 [ %.fr145.4, %.critedge139.4 ], [ %.fr145163.4, %.preheader.4 ]
  %.181165.4 = phi ptr [ %79, %.critedge139.4 ], [ %.282.3, %.preheader.4 ]
  %75 = add i8 %.fr145166.4, -127
  %or.cond126.4 = icmp ult i8 %75, -106
  br i1 %or.cond126.4, label %.critedge139.4, label %switch.early.test144.4

switch.early.test144.4:                           ; preds = %.lr.ph167.4
  switch i8 %.fr145166.4, label %76 [
    i8 93, label %.critedge139.4
    i8 92, label %.critedge139.4
    i8 91, label %.critedge139.4
    i8 63, label %.critedge139.4
    i8 62, label %.critedge139.4
    i8 60, label %.critedge139.4
    i8 58, label %.critedge139.4
    i8 47, label %.critedge139.4
    i8 46, label %.critedge139.4
    i8 42, label %.critedge139.4
    i8 34, label %.critedge139.4
    i8 124, label %.critedge139.4
    i8 44, label %.outer.4.sink.split
  ]

76:                                               ; preds = %switch.early.test144.4
  %77 = getelementptr inbounds i8, ptr %.181165.4, i64 1
  %78 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166.4)
  br label %.outer.4.sink.split

.critedge139.4:                                   ; preds = %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %switch.early.test144.4, %.lr.ph167.4
  %79 = getelementptr inbounds i8, ptr %.181165.4, i64 1
  %80 = load i8, ptr %79, align 1, !tbaa !5
  %.fr145.4 = freeze i8 %80
  %.not.4 = icmp eq i8 %.fr145.4, 0
  br i1 %.not.4, label %.outer.4.sink.split, label %.lr.ph167.4, !llvm.loop !10

.outer.4.sink.split:                              ; preds = %.critedge139.4, %switch.early.test144.4, %.preheader.4, %76
  %.sink248 = phi i8 [ %78, %76 ], [ 32, %.preheader.4 ], [ 95, %switch.early.test144.4 ], [ 32, %.critedge139.4 ]
  %.282.4.ph = phi ptr [ %77, %76 ], [ %.282.3, %.preheader.4 ], [ %.181165.4, %switch.early.test144.4 ], [ %79, %.critedge139.4 ]
  %81 = getelementptr inbounds i8, ptr %0, i64 4
  store i8 %.sink248, ptr %81, align 1, !tbaa !5
  br label %.outer.4

.outer.4:                                         ; preds = %.outer.4.sink.split, %.lr.ph161.split.4
  %.282.4 = phi ptr [ %.282.3, %.lr.ph161.split.4 ], [ %.282.4.ph, %.outer.4.sink.split ]
  %82 = icmp eq ptr %.282.4, %25
  br i1 %82, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split.5

.lr.ph161.split.5:                                ; preds = %.outer.4
  %83 = load i8, ptr %0, align 1, !tbaa !5
  %84 = icmp eq i8 %83, 32
  br i1 %84, label %.outer.5, label %.preheader.5

.preheader.5:                                     ; preds = %.lr.ph161.split.5
  %85 = load i8, ptr %.282.4, align 1, !tbaa !5
  %.fr145163.5 = freeze i8 %85
  %.not164.5 = icmp eq i8 %.fr145163.5, 0
  br i1 %.not164.5, label %.outer.5.sink.split, label %.lr.ph167.5

.lr.ph167.5:                                      ; preds = %.preheader.5, %.critedge139.5
  %.fr145166.5 = phi i8 [ %.fr145.5, %.critedge139.5 ], [ %.fr145163.5, %.preheader.5 ]
  %.181165.5 = phi ptr [ %90, %.critedge139.5 ], [ %.282.4, %.preheader.5 ]
  %86 = add i8 %.fr145166.5, -127
  %or.cond126.5 = icmp ult i8 %86, -106
  br i1 %or.cond126.5, label %.critedge139.5, label %switch.early.test144.5

switch.early.test144.5:                           ; preds = %.lr.ph167.5
  switch i8 %.fr145166.5, label %87 [
    i8 93, label %.critedge139.5
    i8 92, label %.critedge139.5
    i8 91, label %.critedge139.5
    i8 63, label %.critedge139.5
    i8 62, label %.critedge139.5
    i8 60, label %.critedge139.5
    i8 58, label %.critedge139.5
    i8 47, label %.critedge139.5
    i8 46, label %.critedge139.5
    i8 42, label %.critedge139.5
    i8 34, label %.critedge139.5
    i8 124, label %.critedge139.5
    i8 44, label %.outer.5.sink.split
  ]

87:                                               ; preds = %switch.early.test144.5
  %88 = getelementptr inbounds i8, ptr %.181165.5, i64 1
  %89 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166.5)
  br label %.outer.5.sink.split

.critedge139.5:                                   ; preds = %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %switch.early.test144.5, %.lr.ph167.5
  %90 = getelementptr inbounds i8, ptr %.181165.5, i64 1
  %91 = load i8, ptr %90, align 1, !tbaa !5
  %.fr145.5 = freeze i8 %91
  %.not.5 = icmp eq i8 %.fr145.5, 0
  br i1 %.not.5, label %.outer.5.sink.split, label %.lr.ph167.5, !llvm.loop !10

.outer.5.sink.split:                              ; preds = %.critedge139.5, %switch.early.test144.5, %.preheader.5, %87
  %.sink250 = phi i8 [ %89, %87 ], [ 32, %.preheader.5 ], [ 95, %switch.early.test144.5 ], [ 32, %.critedge139.5 ]
  %.282.5.ph = phi ptr [ %88, %87 ], [ %.282.4, %.preheader.5 ], [ %.181165.5, %switch.early.test144.5 ], [ %90, %.critedge139.5 ]
  %92 = getelementptr inbounds i8, ptr %0, i64 5
  store i8 %.sink250, ptr %92, align 1, !tbaa !5
  br label %.outer.5

.outer.5:                                         ; preds = %.outer.5.sink.split, %.lr.ph161.split.5
  %.282.5 = phi ptr [ %.282.4, %.lr.ph161.split.5 ], [ %.282.5.ph, %.outer.5.sink.split ]
  %93 = icmp eq ptr %.282.5, %25
  br i1 %93, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split.6

.lr.ph161.split.6:                                ; preds = %.outer.5
  %94 = load i8, ptr %0, align 1, !tbaa !5
  %95 = icmp eq i8 %94, 32
  br i1 %95, label %.outer.6, label %.preheader.6

.preheader.6:                                     ; preds = %.lr.ph161.split.6
  %96 = load i8, ptr %.282.5, align 1, !tbaa !5
  %.fr145163.6 = freeze i8 %96
  %.not164.6 = icmp eq i8 %.fr145163.6, 0
  br i1 %.not164.6, label %.outer.6.sink.split, label %.lr.ph167.6

.lr.ph167.6:                                      ; preds = %.preheader.6, %.critedge139.6
  %.fr145166.6 = phi i8 [ %.fr145.6, %.critedge139.6 ], [ %.fr145163.6, %.preheader.6 ]
  %.181165.6 = phi ptr [ %101, %.critedge139.6 ], [ %.282.5, %.preheader.6 ]
  %97 = add i8 %.fr145166.6, -127
  %or.cond126.6 = icmp ult i8 %97, -106
  br i1 %or.cond126.6, label %.critedge139.6, label %switch.early.test144.6

switch.early.test144.6:                           ; preds = %.lr.ph167.6
  switch i8 %.fr145166.6, label %98 [
    i8 93, label %.critedge139.6
    i8 92, label %.critedge139.6
    i8 91, label %.critedge139.6
    i8 63, label %.critedge139.6
    i8 62, label %.critedge139.6
    i8 60, label %.critedge139.6
    i8 58, label %.critedge139.6
    i8 47, label %.critedge139.6
    i8 46, label %.critedge139.6
    i8 42, label %.critedge139.6
    i8 34, label %.critedge139.6
    i8 124, label %.critedge139.6
    i8 44, label %.outer.6.sink.split
  ]

98:                                               ; preds = %switch.early.test144.6
  %99 = getelementptr inbounds i8, ptr %.181165.6, i64 1
  %100 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166.6)
  br label %.outer.6.sink.split

.critedge139.6:                                   ; preds = %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %switch.early.test144.6, %.lr.ph167.6
  %101 = getelementptr inbounds i8, ptr %.181165.6, i64 1
  %102 = load i8, ptr %101, align 1, !tbaa !5
  %.fr145.6 = freeze i8 %102
  %.not.6 = icmp eq i8 %.fr145.6, 0
  br i1 %.not.6, label %.outer.6.sink.split, label %.lr.ph167.6, !llvm.loop !10

.outer.6.sink.split:                              ; preds = %.critedge139.6, %switch.early.test144.6, %.preheader.6, %98
  %.sink252 = phi i8 [ %100, %98 ], [ 32, %.preheader.6 ], [ 95, %switch.early.test144.6 ], [ 32, %.critedge139.6 ]
  %.282.6.ph = phi ptr [ %99, %98 ], [ %.282.5, %.preheader.6 ], [ %.181165.6, %switch.early.test144.6 ], [ %101, %.critedge139.6 ]
  %103 = getelementptr inbounds i8, ptr %0, i64 6
  store i8 %.sink252, ptr %103, align 1, !tbaa !5
  br label %.outer.6

.outer.6:                                         ; preds = %.outer.6.sink.split, %.lr.ph161.split.6
  %.282.6 = phi ptr [ %.282.5, %.lr.ph161.split.6 ], [ %.282.6.ph, %.outer.6.sink.split ]
  %104 = icmp eq ptr %.282.6, %25
  br i1 %104, label %.lr.ph161.split.us.preheader, label %.lr.ph161.split.7

.lr.ph161.split.7:                                ; preds = %.outer.6
  %105 = load i8, ptr %0, align 1, !tbaa !5
  %106 = icmp eq i8 %105, 32
  br i1 %106, label %.outer._crit_edge, label %.preheader.7

.preheader.7:                                     ; preds = %.lr.ph161.split.7
  %107 = load i8, ptr %.282.6, align 1, !tbaa !5
  %.fr145163.7 = freeze i8 %107
  %.not164.7 = icmp eq i8 %.fr145163.7, 0
  br i1 %.not164.7, label %.critedge2.thread.7, label %.lr.ph167.7

.lr.ph167.7:                                      ; preds = %.preheader.7, %.critedge139.7
  %.fr145166.7 = phi i8 [ %.fr145.7, %.critedge139.7 ], [ %.fr145163.7, %.preheader.7 ]
  %.181165.7 = phi ptr [ %114, %.critedge139.7 ], [ %.282.6, %.preheader.7 ]
  %108 = add i8 %.fr145166.7, -127
  %or.cond126.7 = icmp ult i8 %108, -106
  br i1 %or.cond126.7, label %.critedge139.7, label %switch.early.test144.7

switch.early.test144.7:                           ; preds = %.lr.ph167.7
  switch i8 %.fr145166.7, label %111 [
    i8 93, label %.critedge139.7
    i8 92, label %.critedge139.7
    i8 91, label %.critedge139.7
    i8 63, label %.critedge139.7
    i8 62, label %.critedge139.7
    i8 60, label %.critedge139.7
    i8 58, label %.critedge139.7
    i8 47, label %.critedge139.7
    i8 46, label %.critedge139.7
    i8 42, label %.critedge139.7
    i8 34, label %.critedge139.7
    i8 124, label %.critedge139.7
    i8 44, label %109
  ]

109:                                              ; preds = %switch.early.test144.7
  %110 = getelementptr inbounds i8, ptr %0, i64 7
  store i8 95, ptr %110, align 1, !tbaa !5
  br label %.outer._crit_edge

111:                                              ; preds = %switch.early.test144.7
  %112 = tail call zeroext i8 @upper(i8 noundef zeroext %.fr145166.7)
  %113 = getelementptr inbounds i8, ptr %0, i64 7
  store i8 %112, ptr %113, align 1, !tbaa !5
  br label %.outer._crit_edge

.critedge139.7:                                   ; preds = %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %switch.early.test144.7, %.lr.ph167.7
  %114 = getelementptr inbounds i8, ptr %.181165.7, i64 1
  %115 = load i8, ptr %114, align 1, !tbaa !5
  %.fr145.7 = freeze i8 %115
  %.not.7 = icmp eq i8 %.fr145.7, 0
  br i1 %.not.7, label %.critedge2.thread.7, label %.lr.ph167.7, !llvm.loop !10

.critedge2.thread.7:                              ; preds = %.critedge139.7, %.preheader.7
  %116 = getelementptr inbounds i8, ptr %0, i64 7
  store i8 32, ptr %116, align 1, !tbaa !5
  br label %.outer._crit_edge

.outer._crit_edge:                                ; preds = %.lr.ph161.split.7, %109, %111, %.critedge2.thread.7, %.lr.ph161.split.us.preheader
  %117 = icmp ugt i8 %2, 4
  br i1 %117, label %118, label %123

118:                                              ; preds = %.outer._crit_edge
  %119 = zext i8 %2 to i32
  %120 = getelementptr inbounds i8, ptr %0, i64 2
  %121 = tail call i32 (ptr, i64, ptr, ...) @snprintf(ptr noundef nonnull dereferenceable(1) %120, i64 noundef 6, ptr noundef nonnull @.str.5, i32 noundef %119) #5
  %122 = getelementptr inbounds i8, ptr %0, i64 7
  store i8 49, ptr %122, align 1, !tbaa !5
  br label %136

123:                                              ; preds = %.outer._crit_edge
  %124 = tail call ptr @strchr(ptr noundef nonnull dereferenceable(1) %0, i32 noundef 32) #4
  %125 = icmp eq ptr %124, null
  %126 = ptrtoint ptr %124 to i64
  %127 = ptrtoint ptr %0 to i64
  %128 = sub i64 %126, %127
  %129 = icmp sgt i64 %128, 6
  %or.cond143 = or i1 %125, %129
  %130 = or disjoint i8 %2, 48
  br i1 %or.cond143, label %131, label %134

131:                                              ; preds = %123
  %132 = getelementptr inbounds i8, ptr %0, i64 6
  store i8 126, ptr %132, align 1, !tbaa !5
  %133 = getelementptr inbounds i8, ptr %0, i64 7
  store i8 %130, ptr %133, align 1, !tbaa !5
  br label %136

134:                                              ; preds = %123
  %135 = getelementptr inbounds i8, ptr %124, i64 1
  store i8 126, ptr %124, align 1, !tbaa !5
  store i8 %130, ptr %135, align 1, !tbaa !5
  br label %136

136:                                              ; preds = %131, %134, %118
  ret i32 0
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strrchr(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @snprintf(ptr noalias nocapture noundef writeonly, i64 noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strchr(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind willreturn memory(read) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass