; LLVM IR from sp-nitech/SPTK :: src/utils (misc_utils)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4sptk40ComputeSecondOrderRegressionCoefficientsEiPSt6vectorIdSaIdEE(i32 noundef %0, ptr noundef %1) #2 {
  %3 = alloca i1, align 1
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca double, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = icmp sle i32 %12, 0
  br i1 %13, label %17, label %14

14:                                               ; preds = %2
  %15 = load ptr, ptr %5, align 8, !tbaa !9
  %16 = icmp eq ptr null, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %14, %2
  store i1 false, ptr %3, align 1
  br label %87

18:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = mul nsw i32 2, %19
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr %6, align 4, !tbaa !5
  %22 = load ptr, ptr %5, align 8, !tbaa !9
  %23 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %22) #3
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = icmp ne i64 %23, %25
  br i1 %26, label %27, label %31

27:                                               ; preds = %18
  %28 = load ptr, ptr %5, align 8, !tbaa !9
  %29 = load i32, ptr %6, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30)
  br label %31

31:                                               ; preds = %27, %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = mul nsw i32 %32, %33
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  %37 = mul nsw i32 %34, %36
  %38 = sdiv i32 %37, 3
  store i32 %38, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = mul nsw i32 3, %40
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = mul nsw i32 %41, %42
  %44 = load i32, ptr %4, align 4, !tbaa !5
  %45 = mul nsw i32 3, %44
  %46 = add nsw i32 %43, %45
  %47 = sub nsw i32 %46, 1
  %48 = mul nsw i32 %39, %47
  %49 = sdiv i32 %48, 5
  store i32 %49, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = load i32, ptr %6, align 4, !tbaa !5
  %52 = mul nsw i32 %50, %51
  %53 = load i32, ptr %7, align 4, !tbaa !5
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = mul nsw i32 %53, %54
  %56 = sub nsw i32 %52, %55
  %57 = sitofp i32 %56 to double
  %58 = fdiv double 5.000000e-01, %57
  store double %58, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %59 = load i32, ptr %4, align 4, !tbaa !5
  %60 = sub nsw i32 0, %59
  store i32 %60, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %81, %31
  %62 = load i32, ptr %10, align 4, !tbaa !5
  %63 = load i32, ptr %4, align 4, !tbaa !5
  %64 = icmp sle i32 %62, %63
  br i1 %64, label %66, label %65

65:                                               ; preds = %61
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %86

66:                                               ; preds = %61
  %67 = load i32, ptr %6, align 4, !tbaa !5
  %68 = load i32, ptr %10, align 4, !tbaa !5
  %69 = mul nsw i32 %67, %68
  %70 = load i32, ptr %10, align 4, !tbaa !5
  %71 = mul nsw i32 %69, %70
  %72 = load i32, ptr %7, align 4, !tbaa !5
  %73 = sub nsw i32 %71, %72
  %74 = sitofp i32 %73 to double
  %75 = load double, ptr %9, align 8, !tbaa !11
  %76 = fmul double %74, %75
  %77 = load ptr, ptr %5, align 8, !tbaa !9
  %78 = load i32, ptr %11, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #3
  store double %76, ptr %80, align 8, !tbaa !11
  br label %81

81:                                               ; preds = %66
  %82 = load i32, ptr %10, align 4, !tbaa !5
  %83 = add nsw i32 %82, 1
  store i32 %83, ptr %10, align 4, !tbaa !5
  %84 = load i32, ptr %11, align 4, !tbaa !5
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %11, align 4, !tbaa !5
  br label %61, !llvm.loop !13

86:                                               ; preds = %65
  store i1 true, ptr %3, align 1
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %87

87:                                               ; preds = %86, %17
  %88 = load i1, ptr %3, align 1
  ret i1 %88
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN4sptk40ComputeSecondOrderRegressionCoefficientsEiPSt6vectorIdSaIdEE(i32 noundef %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = icmp sgt i32 %0, 0
  %4 = icmp ne ptr %1, null
  %or.cond.not = and i1 %3, %4
  br i1 %or.cond.not, label %5, label %.loopexit

5:                                                ; preds = %2
  %6 = shl nuw nsw i32 %0, 1
  %7 = or disjoint i32 %6, 1
  %8 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %9 = zext nneg i32 %7 to i64
  %.not = icmp eq i64 %8, %9
  br i1 %.not, label %.lr.ph.preheader, label %10

10:                                               ; preds = %5
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %9)
  br label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %5, %10
  %11 = add nuw nsw i32 %0, 1
  %12 = mul i32 %11, %0
  %13 = mul i32 %12, %7
  %14 = udiv i32 %13, 3
  %15 = mul nuw nsw i32 %0, 3
  %16 = add nuw i32 %15, 3
  %17 = mul nuw i32 %16, %0
  %18 = add nsw i32 %17, -1
  %19 = mul nsw i32 %14, %18
  %20 = udiv i32 %19, 5
  %21 = mul nuw nsw i32 %20, %7
  %22 = mul nuw nsw i32 %14, %14
  %23 = sub nsw i32 %21, %22
  %24 = sitofp i32 %23 to double
  %25 = fdiv double 5.000000e-01, %24
  %26 = sub nsw i32 0, %0
  %27 = shl nuw i32 %0, 1
  %28 = or disjoint i32 %27, 1
  %wide.trip.count = zext i32 %28 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.03140 = phi i32 [ %26, %.lr.ph.preheader ], [ %35, %.lr.ph ]
  %29 = mul nsw i32 %.03140, %7
  %30 = mul nsw i32 %29, %.03140
  %31 = sub nsw i32 %30, %14
  %32 = sitofp i32 %31 to double
  %33 = fmul double %25, %32
  %34 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #2
  store double %33, ptr %34, align 8, !tbaa !5
  %35 = add nsw i32 %.03140, 1
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !9

.loopexit:                                        ; preds = %.lr.ph, %2
  ret i1 %or.cond.not
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass