; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000/src/ARINC653_PORT (mmu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MMU_SLTRANSLATIONTABLE_MAPSMALLPAGE(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @MMU_SLTRANSLATIONTABLE_MAPSMALLPAGES(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) #1 {
  %10 = alloca i8, align 1
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %11, align 8, !tbaa !5
  store i32 %1, ptr %12, align 4, !tbaa !9
  store i32 %2, ptr %13, align 4, !tbaa !9
  store i32 %3, ptr %14, align 4, !tbaa !9
  store i32 %4, ptr %15, align 4, !tbaa !9
  store i32 %5, ptr %16, align 4, !tbaa !9
  store i32 %6, ptr %17, align 4, !tbaa !9
  store i32 %7, ptr %18, align 4, !tbaa !9
  store i32 %8, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #2
  %22 = load i32, ptr %12, align 4, !tbaa !9
  %23 = and i32 %22, -4096
  %24 = load i32, ptr %12, align 4, !tbaa !9
  %25 = icmp ne i32 %23, %24
  br i1 %25, label %26, label %27

26:                                               ; preds = %9
  store i8 0, ptr %10, align 1
  store i32 1, ptr %21, align 4
  br label %55

27:                                               ; preds = %9
  %28 = load i32, ptr %13, align 4, !tbaa !9
  %29 = and i32 %28, -4096
  %30 = load i32, ptr %13, align 4, !tbaa !9
  %31 = icmp ne i32 %29, %30
  br i1 %31, label %32, label %33

32:                                               ; preds = %27
  store i8 0, ptr %10, align 1
  store i32 1, ptr %21, align 4
  br label %55

33:                                               ; preds = %27
  %34 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %34, ptr %20, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %51, %33
  %36 = load i32, ptr %20, align 4, !tbaa !9
  %37 = load i32, ptr %13, align 4, !tbaa !9
  %38 = icmp ult i32 %36, %37
  br i1 %38, label %39, label %54

39:                                               ; preds = %35
  %40 = load ptr, ptr %11, align 8, !tbaa !5
  %41 = load i32, ptr %20, align 4, !tbaa !9
  %42 = load i32, ptr %14, align 4, !tbaa !9
  %43 = load i32, ptr %15, align 4, !tbaa !9
  %44 = load i32, ptr %16, align 4, !tbaa !9
  %45 = load i32, ptr %17, align 4, !tbaa !9
  %46 = load i32, ptr %18, align 4, !tbaa !9
  %47 = load i32, ptr %19, align 4, !tbaa !9
  %48 = call zeroext i8 @MMU_SLTRANSLATIONTABLE_MAPSMALLPAGE(ptr noundef %40, i32 noundef %41, i32 noundef %42, i32 noundef %43, i32 noundef %44, i32 noundef %45, i32 noundef %46, i32 noundef %47)
  %49 = icmp ne i8 %48, 0
  br i1 %49, label %51, label %50

50:                                               ; preds = %39
  store i8 0, ptr %10, align 1
  store i32 1, ptr %21, align 4
  br label %55

51:                                               ; preds = %39
  %52 = load i32, ptr %20, align 4, !tbaa !9
  %53 = add i32 %52, 4096
  store i32 %53, ptr %20, align 4, !tbaa !9
  br label %35, !llvm.loop !11

54:                                               ; preds = %35
  store i8 1, ptr %10, align 1
  store i32 1, ptr %21, align 4
  br label %55

55:                                               ; preds = %54, %50, %32, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #2
  %56 = load i8, ptr %10, align 1
  ret i8 %56
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MMU_SLTRANSLATIONTABLE_MAPSMALLPAGE(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @MMU_SLTRANSLATIONTABLE_MAPSMALLPAGES(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8) local_unnamed_addr #0 {
  %10 = or i32 %2, %1
  %11 = and i32 %10, 4095
  %or.cond = icmp eq i32 %11, 0
  br i1 %or.cond, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %9
  %12 = icmp ult i32 %1, %2
  br i1 %12, label %.lr.ph, label %.loopexit

13:                                               ; preds = %.lr.ph
  %14 = add nuw i32 %.021, 4096
  %15 = icmp ult i32 %14, %2
  br i1 %15, label %.lr.ph, label %.loopexit, !llvm.loop !5

.lr.ph:                                           ; preds = %.preheader, %13
  %.021 = phi i32 [ %14, %13 ], [ %1, %.preheader ]
  %16 = tail call zeroext i8 @MMU_SLTRANSLATIONTABLE_MAPSMALLPAGE(ptr noundef %0, i32 noundef %.021, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8)
  %.not20 = icmp eq i8 %16, 0
  br i1 %.not20, label %.loopexit, label %13

.loopexit:                                        ; preds = %.lr.ph, %13, %.preheader, %9
  %.016 = phi i8 [ 0, %9 ], [ 1, %.preheader ], [ 0, %.lr.ph ], [ 1, %13 ]
  ret i8 %.016
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass