; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/freertos (queue)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xTIME_OUT = type { i64, i32 }
%struct.QueueDefinition = type { ptr, ptr, %union.anon, %struct.xLIST, %struct.xLIST, i64, i64, i64, i8, i8, ptr, i64, i8 }
%union.anon = type { %struct.QueuePointers }
%struct.QueuePointers = type { ptr, ptr }
%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @vPortEnterCritical() #1

declare i64 @xTaskRemoveFromEventList(ptr noundef) #1 section "privileged_functions"

declare void @vPortYield() #1

declare void @vPortExitCritical() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @xQueueGenericSend(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3) #2 section "privileged_functions" {
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca %struct.xTIME_OUT, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store i64 0, ptr %10, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %16, ptr %13, align 8, !tbaa !5
  %17 = load ptr, ptr %13, align 8, !tbaa !5
  %18 = icmp eq ptr %17, null
  br i1 %18, label %19, label %21

19:                                               ; preds = %4
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !13
  br label %20

20:                                               ; preds = %20, %19
  br label %20

21:                                               ; preds = %4
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  %23 = icmp eq ptr %22, null
  br i1 %23, label %24, label %29

24:                                               ; preds = %21
  %25 = load ptr, ptr %13, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.QueueDefinition, ptr %25, i32 0, i32 7
  %27 = load i64, ptr %26, align 8, !tbaa !14
  %28 = icmp ne i64 %27, 0
  br label %29

29:                                               ; preds = %24, %21
  %30 = phi i1 [ false, %21 ], [ %28, %24 ]
  %31 = xor i1 %30, true
  %32 = zext i1 %31 to i32
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %36

34:                                               ; preds = %29
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !18
  br label %35

35:                                               ; preds = %35, %34
  br label %35

36:                                               ; preds = %29
  %37 = load i64, ptr %9, align 8, !tbaa !11
  %38 = icmp eq i64 %37, 2
  br i1 %38, label %39, label %44

39:                                               ; preds = %36
  %40 = load ptr, ptr %13, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.QueueDefinition, ptr %40, i32 0, i32 6
  %42 = load i64, ptr %41, align 8, !tbaa !19
  %43 = icmp ne i64 %42, 1
  br label %44

44:                                               ; preds = %39, %36
  %45 = phi i1 [ false, %36 ], [ %43, %39 ]
  %46 = xor i1 %45, true
  %47 = zext i1 %46 to i32
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %51

49:                                               ; preds = %44
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !20
  br label %50

50:                                               ; preds = %50, %49
  br label %50

51:                                               ; preds = %44
  %52 = call i64 @xTaskGetSchedulerState()
  %53 = icmp eq i64 %52, 0
  br i1 %53, label %54, label %57

54:                                               ; preds = %51
  %55 = load i32, ptr %8, align 4, !tbaa !9
  %56 = icmp ne i32 %55, 0
  br label %57

57:                                               ; preds = %54, %51
  %58 = phi i1 [ false, %51 ], [ %56, %54 ]
  %59 = xor i1 %58, true
  %60 = zext i1 %59 to i32
  %61 = icmp eq i32 %60, 0
  br i1 %61, label %62, label %64

62:                                               ; preds = %57
  call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !21
  br label %63

63:                                               ; preds = %63, %62
  br label %63

64:                                               ; preds = %57
  br label %65

65:                                               ; preds = %180, %64
  call void @vPortEnterCritical()
  %66 = load ptr, ptr %13, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.QueueDefinition, ptr %66, i32 0, i32 5
  %68 = load volatile i64, ptr %67, align 8, !tbaa !22
  %69 = load ptr, ptr %13, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.QueueDefinition, ptr %69, i32 0, i32 6
  %71 = load i64, ptr %70, align 8, !tbaa !19
  %72 = icmp ult i64 %68, %71
  br i1 %72, label %76, label %73

73:                                               ; preds = %65
  %74 = load i64, ptr %9, align 8, !tbaa !11
  %75 = icmp eq i64 %74, 2
  br i1 %75, label %76, label %128

76:                                               ; preds = %73, %65
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %77 = load ptr, ptr %13, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.QueueDefinition, ptr %77, i32 0, i32 5
  %79 = load volatile i64, ptr %78, align 8, !tbaa !22
  store i64 %79, ptr %14, align 8, !tbaa !11
  %80 = load ptr, ptr %13, align 8, !tbaa !5
  %81 = load ptr, ptr %7, align 8, !tbaa !5
  %82 = load i64, ptr %9, align 8, !tbaa !11
  %83 = call i64 @prvCopyDataToQueue(ptr noundef %80, ptr noundef %81, i64 noundef %82)
  store i64 %83, ptr %11, align 8, !tbaa !11
  %84 = load ptr, ptr %13, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.QueueDefinition, ptr %84, i32 0, i32 10
  %86 = load ptr, ptr %85, align 8, !tbaa !23
  %87 = icmp ne ptr %86, null
  br i1 %87, label %88, label %103

88:                                               ; preds = %76
  %89 = load i64, ptr %9, align 8, !tbaa !11
  %90 = icmp eq i64 %89, 2
  br i1 %90, label %91, label %95

91:                                               ; preds = %88
  %92 = load i64, ptr %14, align 8, !tbaa !11
  %93 = icmp ne i64 %92, 0
  br i1 %93, label %94, label %95

94:                                               ; preds = %91
  br label %102

95:                                               ; preds = %91, %88
  %96 = load ptr, ptr %13, align 8, !tbaa !5
  %97 = call i64 @prvNotifyQueueSetContainer(ptr noundef %96)
  %98 = icmp ne i64 %97, 0
  br i1 %98, label %99, label %100

99:                                               ; preds = %95
  call void @vPortYield()
  br label %101

100:                                              ; preds = %95
  br label %101

101:                                              ; preds = %100, %99
  br label %102

102:                                              ; preds = %101, %94
  br label %127

103:                                              ; preds = %76
  %104 = load ptr, ptr %13, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.QueueDefinition, ptr %104, i32 0, i32 4
  %106 = getelementptr inbounds %struct.xLIST, ptr %105, i32 0, i32 0
  %107 = load volatile i64, ptr %106, align 8, !tbaa !24
  %108 = icmp eq i64 %107, 0
  %109 = zext i1 %108 to i64
  %110 = select i1 %108, i64 1, i64 0
  %111 = icmp eq i64 %110, 0
  br i1 %111, label %112, label %120

112:                                              ; preds = %103
  %113 = load ptr, ptr %13, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.QueueDefinition, ptr %113, i32 0, i32 4
  %115 = call i64 @xTaskRemoveFromEventList(ptr noundef %114)
  %116 = icmp ne i64 %115, 0
  br i1 %116, label %117, label %118

117:                                              ; preds = %112
  call void @vPortYield()
  br label %119

118:                                              ; preds = %112
  br label %119

119:                                              ; preds = %118, %117
  br label %126

120:                                              ; preds = %103
  %121 = load i64, ptr %11, align 8, !tbaa !11
  %122 = icmp ne i64 %121, 0
  br i1 %122, label %123, label %124

123:                                              ; preds = %120
  call void @vPortYield()
  br label %125

124:                                              ; preds = %120
  br label %125

125:                                              ; preds = %124, %123
  br label %126

126:                                              ; preds = %125, %119
  br label %127

127:                                              ; preds = %126, %102
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @vPortExitCritical()
  store i64 1, ptr %5, align 8
  store i32 1, ptr %15, align 4
  br label %181

128:                                              ; preds = %73
  %129 = load i32, ptr %8, align 4, !tbaa !9
  %130 = icmp eq i32 %129, 0
  br i1 %130, label %131, label %132

131:                                              ; preds = %128
  call void @vPortExitCritical()
  store i64 0, ptr %5, align 8
  store i32 1, ptr %15, align 4
  br label %181

132:                                              ; preds = %128
  %133 = load i64, ptr %10, align 8, !tbaa !11
  %134 = icmp eq i64 %133, 0
  br i1 %134, label %135, label %136

135:                                              ; preds = %132
  call void @vTaskInternalSetTimeOutState(ptr noundef %12)
  store i64 1, ptr %10, align 8, !tbaa !11
  br label %137

136:                                              ; preds = %132
  br label %137

137:                                              ; preds = %136, %135
  br label %138

138:                                              ; preds = %137
  br label %139

139:                                              ; preds = %138
  call void @vPortExitCritical()
  call void @vTaskSuspendAll()
  call void @vPortEnterCritical()
  %140 = load ptr, ptr %13, align 8, !tbaa !5
  %141 = getelementptr inbounds %struct.QueueDefinition, ptr %140, i32 0, i32 8
  %142 = load volatile i8, ptr %141, align 8, !tbaa !25
  %143 = sext i8 %142 to i32
  %144 = icmp eq i32 %143, -1
  br i1 %144, label %145, label %148

145:                                              ; preds = %139
  %146 = load ptr, ptr %13, align 8, !tbaa !5
  %147 = getelementptr inbounds %struct.QueueDefinition, ptr %146, i32 0, i32 8
  store volatile i8 0, ptr %147, align 8, !tbaa !25
  br label %148

148:                                              ; preds = %145, %139
  %149 = load ptr, ptr %13, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.QueueDefinition, ptr %149, i32 0, i32 9
  %151 = load volatile i8, ptr %150, align 1, !tbaa !26
  %152 = sext i8 %151 to i32
  %153 = icmp eq i32 %152, -1
  br i1 %153, label %154, label %157

154:                                              ; preds = %148
  %155 = load ptr, ptr %13, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.QueueDefinition, ptr %155, i32 0, i32 9
  store volatile i8 0, ptr %156, align 1, !tbaa !26
  br label %157

157:                                              ; preds = %154, %148
  call void @vPortExitCritical()
  %158 = call i64 @xTaskCheckForTimeOut(ptr noundef %12, ptr noundef %8)
  %159 = icmp eq i64 %158, 0
  br i1 %159, label %160, label %177

160:                                              ; preds = %157
  %161 = load ptr, ptr %13, align 8, !tbaa !5
  %162 = call i64 @prvIsQueueFull(ptr noundef %161)
  %163 = icmp ne i64 %162, 0
  br i1 %163, label %164, label %173

164:                                              ; preds = %160
  %165 = load ptr, ptr %13, align 8, !tbaa !5
  %166 = getelementptr inbounds %struct.QueueDefinition, ptr %165, i32 0, i32 3
  %167 = load i32, ptr %8, align 4, !tbaa !9
  call void @vTaskPlaceOnEventList(ptr noundef %166, i32 noundef %167)
  %168 = load ptr, ptr %13, align 8, !tbaa !5
  call void @prvUnlockQueue(ptr noundef %168)
  %169 = call i64 @xTaskResumeAll()
  %170 = icmp eq i64 %169, 0
  br i1 %170, label %171, label %172

171:                                              ; preds = %164
  call void @vPortYield()
  br label %172

172:                                              ; preds = %171, %164
  br label %176

173:                                              ; preds = %160
  %174 = load ptr, ptr %13, align 8, !tbaa !5
  call void @prvUnlockQueue(ptr noundef %174)
  %175 = call i64 @xTaskResumeAll()
  br label %176

176:                                              ; preds = %173, %172
  br label %180

177:                                              ; preds = %157
  %178 = load ptr, ptr %13, align 8, !tbaa !5
  call void @prvUnlockQueue(ptr noundef %178)
  %179 = call i64 @xTaskResumeAll()
  store i64 0, ptr %5, align 8
  store i32 1, ptr %15, align 4
  br label %181

180:                                              ; preds = %176
  br label %65

181:                                              ; preds = %177, %131, %127
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %182 = load i64, ptr %5, align 8
  ret i64 %182
}

declare i64 @xTaskGetSchedulerState() #1 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden i64 @prvCopyDataToQueue(ptr noundef, ptr noundef, i64 noundef) #2 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden i64 @prvNotifyQueueSetContainer(ptr noundef) #2 section "privileged_functions"

declare void @vTaskInternalSetTimeOutState(ptr noundef) #1 section "privileged_functions"

declare void @vTaskSuspendAll() #1 section "privileged_functions"

declare i64 @xTaskCheckForTimeOut(ptr noundef, ptr noundef) #1 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden i64 @prvIsQueueFull(ptr noundef) #2 section "privileged_functions"

declare void @vTaskPlaceOnEventList(ptr noundef, i32 noundef) #1 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden void @prvUnlockQueue(ptr noundef) #2 section "privileged_functions"

declare i64 @xTaskResumeAll() #1 section "privileged_functions"

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{i64 2148319602}
!14 = !{!15, !12, i64 128}
!15 = !{!"QueueDefinition", !6, i64 0, !6, i64 8, !7, i64 16, !16, i64 32, !16, i64 72, !12, i64 112, !12, i64 120, !12, i64 128, !7, i64 136, !7, i64 137, !6, i64 144, !12, i64 152, !7, i64 160}
!16 = !{!"xLIST", !12, i64 0, !6, i64 8, !17, i64 16}
!17 = !{!"xMINI_LIST_ITEM", !10, i64 0, !6, i64 8, !6, i64 16}
!18 = !{i64 2148319826}
!19 = !{!15, !12, i64 120}
!20 = !{i64 2148320051}
!21 = !{i64 2148320286}
!22 = !{!15, !12, i64 112}
!23 = !{!15, !6, i64 144}
!24 = !{!15, !12, i64 72}
!25 = !{!15, !7, i64 136}
!26 = !{!15, !7, i64 137}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xTIME_OUT = type { i64, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @vPortEnterCritical() local_unnamed_addr #1

declare i64 @xTaskRemoveFromEventList(ptr noundef) local_unnamed_addr #1 section "privileged_functions"

declare void @vPortYield() local_unnamed_addr #1

declare void @vPortExitCritical() local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i64 0, 2) i64 @xQueueGenericSend(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3) local_unnamed_addr #2 section "privileged_functions" {
  %5 = alloca i32, align 4
  %6 = alloca %struct.xTIME_OUT, align 8
  store i32 %2, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #3
  %7 = icmp eq ptr %0, null
  br i1 %7, label %8, label %10

8:                                                ; preds = %4
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !9
  br label %9

9:                                                ; preds = %9, %8
  br label %9

10:                                               ; preds = %4
  %11 = icmp eq ptr %1, null
  br i1 %11, label %12, label %.critedge

12:                                               ; preds = %10
  %13 = getelementptr inbounds i8, ptr %0, i64 128
  %14 = load i64, ptr %13, align 8, !tbaa !10
  %.not42 = icmp eq i64 %14, 0
  br i1 %.not42, label %.critedge, label %15

15:                                               ; preds = %12
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !16
  br label %16

16:                                               ; preds = %16, %15
  br label %16

.critedge:                                        ; preds = %10, %12
  %17 = icmp eq i64 %3, 2
  br i1 %17, label %18, label %.critedge41

18:                                               ; preds = %.critedge
  %19 = getelementptr inbounds i8, ptr %0, i64 120
  %20 = load i64, ptr %19, align 8, !tbaa !17
  %.not43 = icmp eq i64 %20, 1
  br i1 %.not43, label %.critedge41, label %21

21:                                               ; preds = %18
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !18
  br label %22

22:                                               ; preds = %22, %21
  br label %22

.critedge41:                                      ; preds = %.critedge, %18
  %23 = tail call i64 @xTaskGetSchedulerState() #3
  %24 = icmp eq i64 %23, 0
  %25 = icmp ne i32 %2, 0
  %26 = and i1 %24, %25
  br i1 %26, label %61, label %.preheader

.preheader:                                       ; preds = %.critedge41
  tail call void @vPortEnterCritical() #3
  %27 = getelementptr inbounds i8, ptr %0, i64 112
  %28 = load volatile i64, ptr %27, align 8, !tbaa !19
  %29 = getelementptr inbounds i8, ptr %0, i64 120
  %30 = load i64, ptr %29, align 8, !tbaa !17
  %31 = icmp ult i64 %28, %30
  %or.cond46 = or i1 %17, %31
  br i1 %or.cond46, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader
  %32 = getelementptr inbounds i8, ptr %0, i64 136
  %33 = getelementptr inbounds i8, ptr %0, i64 137
  %34 = getelementptr inbounds i8, ptr %0, i64 32
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = icmp eq i32 %35, 0
  br i1 %36, label %.loopexit, label %37

37:                                               ; preds = %.lr.ph
  call void @vTaskInternalSetTimeOutState(ptr noundef nonnull %6) #3
  call void @vPortExitCritical() #3
  call void @vTaskSuspendAll() #3
  call void @vPortEnterCritical() #3
  %38 = load volatile i8, ptr %32, align 8, !tbaa !20
  %39 = icmp eq i8 %38, -1
  br i1 %39, label %40, label %41

40:                                               ; preds = %37
  store volatile i8 0, ptr %32, align 8, !tbaa !20
  br label %41

41:                                               ; preds = %40, %37
  %42 = load volatile i8, ptr %33, align 1, !tbaa !21
  %43 = icmp eq i8 %42, -1
  br i1 %43, label %44, label %45

44:                                               ; preds = %41
  store volatile i8 0, ptr %33, align 1, !tbaa !21
  br label %45

45:                                               ; preds = %44, %41
  call void @vPortExitCritical() #3
  %46 = call i64 @xTaskCheckForTimeOut(ptr noundef nonnull %6, ptr noundef nonnull %5) #3
  %47 = icmp eq i64 %46, 0
  br i1 %47, label %48, label %.loopexit48

48:                                               ; preds = %45
  %49 = call i64 @prvIsQueueFull(ptr noundef nonnull %0)
  %.not.peel = icmp eq i64 %49, 0
  br i1 %.not.peel, label %55, label %50

50:                                               ; preds = %48
  %51 = load i32, ptr %5, align 4, !tbaa !5
  call void @vTaskPlaceOnEventList(ptr noundef nonnull %34, i32 noundef %51) #3
  call void @prvUnlockQueue(ptr noundef nonnull %0)
  %52 = call i64 @xTaskResumeAll() #3
  %53 = icmp eq i64 %52, 0
  br i1 %53, label %54, label %57

54:                                               ; preds = %50
  call void @vPortYield() #3
  br label %57

55:                                               ; preds = %48
  call void @prvUnlockQueue(ptr noundef nonnull %0)
  %56 = call i64 @xTaskResumeAll() #3
  br label %57

57:                                               ; preds = %55, %54, %50
  call void @vPortEnterCritical() #3
  %58 = load volatile i64, ptr %27, align 8, !tbaa !19
  %59 = load i64, ptr %29, align 8, !tbaa !17
  %60 = icmp ult i64 %58, %59
  br i1 %60, label %._crit_edge, label %.peel.next

61:                                               ; preds = %.critedge41
  tail call void asm sideeffect " cpsid i ", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !22
  br label %62

62:                                               ; preds = %62, %61
  br label %62

._crit_edge:                                      ; preds = %101, %57, %.preheader
  %63 = load volatile i64, ptr %27, align 8, !tbaa !19
  %64 = call i64 @prvCopyDataToQueue(ptr noundef nonnull %0, ptr noundef %1, i64 noundef %3)
  %65 = getelementptr inbounds i8, ptr %0, i64 144
  %66 = load ptr, ptr %65, align 8, !tbaa !23
  %.not35 = icmp eq ptr %66, null
  br i1 %.not35, label %71, label %67

67:                                               ; preds = %._crit_edge
  %68 = icmp ne i64 %63, 0
  %or.cond3 = select i1 %17, i1 %68, i1 false
  br i1 %or.cond3, label %77, label %69

69:                                               ; preds = %67
  %70 = call i64 @prvNotifyQueueSetContainer(ptr noundef nonnull %0)
  %.not39 = icmp eq i64 %70, 0
  br i1 %.not39, label %77, label %.sink.split

71:                                               ; preds = %._crit_edge
  %72 = getelementptr inbounds i8, ptr %0, i64 72
  %73 = load volatile i64, ptr %72, align 8, !tbaa !24
  %.not36 = icmp eq i64 %73, 0
  br i1 %.not36, label %76, label %74

74:                                               ; preds = %71
  %75 = call i64 @xTaskRemoveFromEventList(ptr noundef nonnull %72) #3
  %.not38 = icmp eq i64 %75, 0
  br i1 %.not38, label %77, label %.sink.split

76:                                               ; preds = %71
  %.not37 = icmp eq i64 %64, 0
  br i1 %.not37, label %77, label %.sink.split

.sink.split:                                      ; preds = %76, %74, %69
  call void @vPortYield() #3
  br label %77

77:                                               ; preds = %.sink.split, %74, %76, %67, %69
  call void @vPortExitCritical() #3
  br label %105

.peel.next:                                       ; preds = %57, %101
  %78 = load i32, ptr %5, align 4, !tbaa !5
  %79 = icmp eq i32 %78, 0
  br i1 %79, label %.loopexit, label %80

.loopexit:                                        ; preds = %.peel.next, %.lr.ph
  call void @vPortExitCritical() #3
  br label %105

80:                                               ; preds = %.peel.next
  call void @vPortExitCritical() #3
  call void @vTaskSuspendAll() #3
  call void @vPortEnterCritical() #3
  %81 = load volatile i8, ptr %32, align 8, !tbaa !20
  %82 = icmp eq i8 %81, -1
  br i1 %82, label %83, label %84

83:                                               ; preds = %80
  store volatile i8 0, ptr %32, align 8, !tbaa !20
  br label %84

84:                                               ; preds = %83, %80
  %85 = load volatile i8, ptr %33, align 1, !tbaa !21
  %86 = icmp eq i8 %85, -1
  br i1 %86, label %87, label %88

87:                                               ; preds = %84
  store volatile i8 0, ptr %33, align 1, !tbaa !21
  br label %88

88:                                               ; preds = %87, %84
  call void @vPortExitCritical() #3
  %89 = call i64 @xTaskCheckForTimeOut(ptr noundef nonnull %6, ptr noundef nonnull %5) #3
  %90 = icmp eq i64 %89, 0
  br i1 %90, label %91, label %.loopexit48

91:                                               ; preds = %88
  %92 = call i64 @prvIsQueueFull(ptr noundef nonnull %0)
  %.not = icmp eq i64 %92, 0
  br i1 %.not, label %98, label %93

93:                                               ; preds = %91
  %94 = load i32, ptr %5, align 4, !tbaa !5
  call void @vTaskPlaceOnEventList(ptr noundef nonnull %34, i32 noundef %94) #3
  call void @prvUnlockQueue(ptr noundef nonnull %0)
  %95 = call i64 @xTaskResumeAll() #3
  %96 = icmp eq i64 %95, 0
  br i1 %96, label %97, label %101

97:                                               ; preds = %93
  call void @vPortYield() #3
  br label %101

98:                                               ; preds = %91
  call void @prvUnlockQueue(ptr noundef nonnull %0)
  %99 = call i64 @xTaskResumeAll() #3
  br label %101

.loopexit48:                                      ; preds = %88, %45
  call void @prvUnlockQueue(ptr noundef nonnull %0)
  %100 = call i64 @xTaskResumeAll() #3
  br label %105

101:                                              ; preds = %98, %97, %93
  call void @vPortEnterCritical() #3
  %102 = load volatile i64, ptr %27, align 8, !tbaa !19
  %103 = load i64, ptr %29, align 8, !tbaa !17
  %104 = icmp ult i64 %102, %103
  br i1 %104, label %._crit_edge, label %.peel.next, !llvm.loop !25

105:                                              ; preds = %.loopexit48, %.loopexit, %77
  %.0 = phi i64 [ 1, %77 ], [ 0, %.loopexit ], [ 0, %.loopexit48 ]
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #3
  ret i64 %.0
}

declare i64 @xTaskGetSchedulerState() local_unnamed_addr #1 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden i64 @prvCopyDataToQueue(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden i64 @prvNotifyQueueSetContainer(ptr noundef) local_unnamed_addr #2 section "privileged_functions"

declare void @vTaskInternalSetTimeOutState(ptr noundef) local_unnamed_addr #1 section "privileged_functions"

declare void @vTaskSuspendAll() local_unnamed_addr #1 section "privileged_functions"

declare i64 @xTaskCheckForTimeOut(ptr noundef, ptr noundef) local_unnamed_addr #1 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden i64 @prvIsQueueFull(ptr noundef) local_unnamed_addr #2 section "privileged_functions"

declare void @vTaskPlaceOnEventList(ptr noundef, i32 noundef) local_unnamed_addr #1 section "privileged_functions"

; Function Attrs: nounwind uwtable
declare hidden void @prvUnlockQueue(ptr noundef) local_unnamed_addr #2 section "privileged_functions"

declare i64 @xTaskResumeAll() local_unnamed_addr #1 section "privileged_functions"

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 2148319602}
!10 = !{!11, !14, i64 128}
!11 = !{!"QueueDefinition", !12, i64 0, !12, i64 8, !7, i64 16, !13, i64 32, !13, i64 72, !14, i64 112, !14, i64 120, !14, i64 128, !7, i64 136, !7, i64 137, !12, i64 144, !14, i64 152, !7, i64 160}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"xLIST", !14, i64 0, !12, i64 8, !15, i64 16}
!14 = !{!"long", !7, i64 0}
!15 = !{!"xMINI_LIST_ITEM", !6, i64 0, !12, i64 8, !12, i64 16}
!16 = !{i64 2148319826}
!17 = !{!11, !14, i64 120}
!18 = !{i64 2148320051}
!19 = !{!11, !14, i64 112}
!20 = !{!11, !7, i64 136}
!21 = !{!11, !7, i64 137}
!22 = !{i64 2148320286}
!23 = !{!11, !12, i64 144}
!24 = !{!11, !14, i64 72}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass