; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/sdps_v3_6 (BusSpeed)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XSdPs = type { %struct.XSdPs_Config, i32, i32, i32, i32, i8, i8, i8, i8, i32, i8, [4 x i32], i32, [4 x i32], i32, i32, i32, ptr, [8 x i8], [32 x %struct.XSdPs_Adma2Descriptor], i64, [24 x i8] }
%struct.XSdPs_Config = type { i16, i32, i32, i32, i32, i32, i32, i32, i8 }
%struct.XSdPs_Adma2Descriptor = type <{ i16, i16, i64 }>

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [167 x i8], align 1
@TransferMode = external global i16, align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @XSdPs_SetupADMA2DescTbl(ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) #2

declare void @usleep(i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @XSdPs_ReadReg8(i32 noundef, i8 noundef zeroext) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg8(i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @XSdPs_Change_BusSpeed(ptr noundef %0) #3 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca [64 x i8], align 16
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 64, ptr %9) #5
  call void @llvm.memset.p0.i64(ptr align 16 %9, i8 0, i64 64, i1 false)
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = icmp ne ptr %11, null
  br i1 %12, label %13, label %14

13:                                               ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %15

14:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 484)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %241

15:                                               ; preds = %13
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.XSdPs, ptr %16, i32 0, i32 1
  %18 = load i32, ptr %17, align 4, !tbaa !11
  %19 = icmp eq i32 %18, 286331153
  br i1 %19, label %20, label %21

20:                                               ; preds = %15
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %22

21:                                               ; preds = %15
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 485)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 0, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %241

22:                                               ; preds = %20
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.XSdPs, ptr %23, i32 0, i32 5
  %25 = load i8, ptr %24, align 4, !tbaa !16
  %26 = zext i8 %25 to i32
  %27 = icmp eq i32 %26, 1
  br i1 %27, label %28, label %97

28:                                               ; preds = %22
  store i16 1, ptr %7, align 2, !tbaa !17
  store i16 64, ptr %8, align 2, !tbaa !17
  %29 = load i16, ptr %8, align 2, !tbaa !17
  %30 = zext i16 %29 to i32
  %31 = and i32 %30, 4095
  %32 = trunc i32 %31 to i16
  store i16 %32, ptr %8, align 2, !tbaa !17
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.XSdPs, ptr %33, i32 0, i32 0
  %35 = getelementptr inbounds %struct.XSdPs_Config, ptr %34, i32 0, i32 1
  %36 = load i32, ptr %35, align 4, !tbaa !18
  %37 = load i16, ptr %8, align 2, !tbaa !17
  call void @XSdPs_WriteReg16(i32 noundef %36, i8 noundef zeroext 4, i16 noundef zeroext %37)
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = load i16, ptr %7, align 2, !tbaa !17
  %40 = zext i16 %39 to i32
  %41 = getelementptr inbounds [64 x i8], ptr %9, i64 0, i64 0
  call void @XSdPs_SetupADMA2DescTbl(ptr noundef %38, i32 noundef %40, ptr noundef %41)
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XSdPs, ptr %42, i32 0, i32 0
  %44 = getelementptr inbounds %struct.XSdPs_Config, ptr %43, i32 0, i32 8
  %45 = load i8, ptr %44, align 32, !tbaa !19
  %46 = zext i8 %45 to i32
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %48, label %51

48:                                               ; preds = %28
  %49 = getelementptr inbounds [64 x i8], ptr %9, i64 0, i64 0
  %50 = ptrtoint ptr %49 to i64
  call void @Xil_DCacheFlushRange(i64 noundef %50, i32 noundef 64)
  br label %51

51:                                               ; preds = %48, %28
  store i16 17, ptr @TransferMode, align 2, !tbaa !17
  store i32 -2130706447, ptr %6, align 4, !tbaa !9
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = load i32, ptr %6, align 4, !tbaa !9
  %54 = call i32 @XSdPs_CmdTransfer(ptr noundef %52, i32 noundef 1536, i32 noundef %53, i32 noundef 1)
  store i32 %54, ptr %4, align 4, !tbaa !9
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = icmp ne i64 %56, 0
  br i1 %57, label %58, label %59

58:                                               ; preds = %51
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

59:                                               ; preds = %51
  br label %60

60:                                               ; preds = %76, %59
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.XSdPs, ptr %61, i32 0, i32 0
  %63 = getelementptr inbounds %struct.XSdPs_Config, ptr %62, i32 0, i32 1
  %64 = load i32, ptr %63, align 4, !tbaa !18
  %65 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %64, i8 noundef zeroext 48)
  %66 = zext i16 %65 to i32
  store i32 %66, ptr %5, align 4, !tbaa !9
  %67 = load i32, ptr %5, align 4, !tbaa !9
  %68 = and i32 %67, 32768
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %75

70:                                               ; preds = %60
  %71 = load ptr, ptr %3, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.XSdPs, ptr %71, i32 0, i32 0
  %73 = getelementptr inbounds %struct.XSdPs_Config, ptr %72, i32 0, i32 1
  %74 = load i32, ptr %73, align 4, !tbaa !18
  call void @XSdPs_WriteReg16(i32 noundef %74, i8 noundef zeroext 50, i16 noundef zeroext -3073)
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

75:                                               ; preds = %60
  br label %76

76:                                               ; preds = %75
  %77 = load i32, ptr %5, align 4, !tbaa !9
  %78 = and i32 %77, 2
  %79 = icmp eq i32 %78, 0
  br i1 %79, label %60, label %80, !llvm.loop !20

80:                                               ; preds = %76
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.XSdPs, ptr %81, i32 0, i32 0
  %83 = getelementptr inbounds %struct.XSdPs_Config, ptr %82, i32 0, i32 1
  %84 = load i32, ptr %83, align 4, !tbaa !18
  call void @XSdPs_WriteReg16(i32 noundef %84, i8 noundef zeroext 48, i16 noundef zeroext 2)
  %85 = load ptr, ptr %3, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.XSdPs, ptr %85, i32 0, i32 9
  store i32 50000000, ptr %86, align 8, !tbaa !22
  %87 = load ptr, ptr %3, align 8, !tbaa !5
  %88 = load ptr, ptr %3, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.XSdPs, ptr %88, i32 0, i32 9
  %90 = load i32, ptr %89, align 8, !tbaa !22
  %91 = call i32 @XSdPs_Change_ClkFreq(ptr noundef %87, i32 noundef %90)
  store i32 %91, ptr %4, align 4, !tbaa !9
  %92 = load i32, ptr %4, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = icmp ne i64 %93, 0
  br i1 %94, label %95, label %96

95:                                               ; preds = %80
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

96:                                               ; preds = %80
  br label %224

97:                                               ; preds = %22
  %98 = load ptr, ptr %3, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.XSdPs, ptr %98, i32 0, i32 5
  %100 = load i8, ptr %99, align 4, !tbaa !16
  %101 = zext i8 %100 to i32
  %102 = icmp eq i32 %101, 2
  br i1 %102, label %103, label %146

103:                                              ; preds = %97
  store i32 62456064, ptr %6, align 4, !tbaa !9
  %104 = load ptr, ptr %3, align 8, !tbaa !5
  %105 = load i32, ptr %6, align 4, !tbaa !9
  %106 = call i32 @XSdPs_CmdTransfer(ptr noundef %104, i32 noundef 1536, i32 noundef %105, i32 noundef 0)
  store i32 %106, ptr %4, align 4, !tbaa !9
  %107 = load i32, ptr %4, align 4, !tbaa !9
  %108 = sext i32 %107 to i64
  %109 = icmp ne i64 %108, 0
  br i1 %109, label %110, label %111

110:                                              ; preds = %103
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

111:                                              ; preds = %103
  br label %112

112:                                              ; preds = %128, %111
  %113 = load ptr, ptr %3, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.XSdPs, ptr %113, i32 0, i32 0
  %115 = getelementptr inbounds %struct.XSdPs_Config, ptr %114, i32 0, i32 1
  %116 = load i32, ptr %115, align 4, !tbaa !18
  %117 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %116, i8 noundef zeroext 48)
  %118 = zext i16 %117 to i32
  store i32 %118, ptr %5, align 4, !tbaa !9
  %119 = load i32, ptr %5, align 4, !tbaa !9
  %120 = and i32 %119, 32768
  %121 = icmp ne i32 %120, 0
  br i1 %121, label %122, label %127

122:                                              ; preds = %112
  %123 = load ptr, ptr %3, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.XSdPs, ptr %123, i32 0, i32 0
  %125 = getelementptr inbounds %struct.XSdPs_Config, ptr %124, i32 0, i32 1
  %126 = load i32, ptr %125, align 4, !tbaa !18
  call void @XSdPs_WriteReg16(i32 noundef %126, i8 noundef zeroext 50, i16 noundef zeroext -3073)
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

127:                                              ; preds = %112
  br label %128

128:                                              ; preds = %127
  %129 = load i32, ptr %5, align 4, !tbaa !9
  %130 = and i32 %129, 2
  %131 = icmp eq i32 %130, 0
  br i1 %131, label %112, label %132, !llvm.loop !23

132:                                              ; preds = %128
  %133 = load ptr, ptr %3, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.XSdPs, ptr %133, i32 0, i32 0
  %135 = getelementptr inbounds %struct.XSdPs_Config, ptr %134, i32 0, i32 1
  %136 = load i32, ptr %135, align 4, !tbaa !18
  call void @XSdPs_WriteReg16(i32 noundef %136, i8 noundef zeroext 48, i16 noundef zeroext 2)
  %137 = load ptr, ptr %3, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.XSdPs, ptr %137, i32 0, i32 9
  store i32 52000000, ptr %138, align 8, !tbaa !22
  %139 = load ptr, ptr %3, align 8, !tbaa !5
  %140 = call i32 @XSdPs_Change_ClkFreq(ptr noundef %139, i32 noundef 52000000)
  store i32 %140, ptr %4, align 4, !tbaa !9
  %141 = load i32, ptr %4, align 4, !tbaa !9
  %142 = sext i32 %141 to i64
  %143 = icmp ne i64 %142, 0
  br i1 %143, label %144, label %145

144:                                              ; preds = %132
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

145:                                              ; preds = %132
  br label %223

146:                                              ; preds = %97
  %147 = load ptr, ptr %3, align 8, !tbaa !5
  %148 = getelementptr inbounds %struct.XSdPs, ptr %147, i32 0, i32 16
  %149 = load i32, ptr %148, align 4, !tbaa !24
  %150 = icmp eq i32 %149, 7
  br i1 %150, label %151, label %154

151:                                              ; preds = %146
  store i32 62456320, ptr %6, align 4, !tbaa !9
  %152 = load ptr, ptr %3, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.XSdPs, ptr %152, i32 0, i32 9
  store i32 200000000, ptr %153, align 8, !tbaa !22
  br label %166

154:                                              ; preds = %146
  %155 = load ptr, ptr %3, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.XSdPs, ptr %155, i32 0, i32 16
  %157 = load i32, ptr %156, align 4, !tbaa !24
  %158 = icmp eq i32 %157, 4
  br i1 %158, label %159, label %162

159:                                              ; preds = %154
  store i32 62456064, ptr %6, align 4, !tbaa !9
  %160 = load ptr, ptr %3, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.XSdPs, ptr %160, i32 0, i32 9
  store i32 52000000, ptr %161, align 8, !tbaa !22
  br label %165

162:                                              ; preds = %154
  store i32 62456064, ptr %6, align 4, !tbaa !9
  %163 = load ptr, ptr %3, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.XSdPs, ptr %163, i32 0, i32 9
  store i32 52000000, ptr %164, align 8, !tbaa !22
  br label %165

165:                                              ; preds = %162, %159
  br label %166

166:                                              ; preds = %165, %151
  %167 = load ptr, ptr %3, align 8, !tbaa !5
  %168 = load i32, ptr %6, align 4, !tbaa !9
  %169 = call i32 @XSdPs_CmdTransfer(ptr noundef %167, i32 noundef 1536, i32 noundef %168, i32 noundef 0)
  store i32 %169, ptr %4, align 4, !tbaa !9
  %170 = load i32, ptr %4, align 4, !tbaa !9
  %171 = sext i32 %170 to i64
  %172 = icmp ne i64 %171, 0
  br i1 %172, label %173, label %174

173:                                              ; preds = %166
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

174:                                              ; preds = %166
  br label %175

175:                                              ; preds = %191, %174
  %176 = load ptr, ptr %3, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.XSdPs, ptr %176, i32 0, i32 0
  %178 = getelementptr inbounds %struct.XSdPs_Config, ptr %177, i32 0, i32 1
  %179 = load i32, ptr %178, align 4, !tbaa !18
  %180 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %179, i8 noundef zeroext 48)
  %181 = zext i16 %180 to i32
  store i32 %181, ptr %5, align 4, !tbaa !9
  %182 = load i32, ptr %5, align 4, !tbaa !9
  %183 = and i32 %182, 32768
  %184 = icmp ne i32 %183, 0
  br i1 %184, label %185, label %190

185:                                              ; preds = %175
  %186 = load ptr, ptr %3, align 8, !tbaa !5
  %187 = getelementptr inbounds %struct.XSdPs, ptr %186, i32 0, i32 0
  %188 = getelementptr inbounds %struct.XSdPs_Config, ptr %187, i32 0, i32 1
  %189 = load i32, ptr %188, align 4, !tbaa !18
  call void @XSdPs_WriteReg16(i32 noundef %189, i8 noundef zeroext 50, i16 noundef zeroext -3073)
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

190:                                              ; preds = %175
  br label %191

191:                                              ; preds = %190
  %192 = load i32, ptr %5, align 4, !tbaa !9
  %193 = and i32 %192, 2
  %194 = icmp eq i32 %193, 0
  br i1 %194, label %175, label %195, !llvm.loop !25

195:                                              ; preds = %191
  %196 = load ptr, ptr %3, align 8, !tbaa !5
  %197 = getelementptr inbounds %struct.XSdPs, ptr %196, i32 0, i32 0
  %198 = getelementptr inbounds %struct.XSdPs_Config, ptr %197, i32 0, i32 1
  %199 = load i32, ptr %198, align 4, !tbaa !18
  call void @XSdPs_WriteReg16(i32 noundef %199, i8 noundef zeroext 48, i16 noundef zeroext 2)
  %200 = load ptr, ptr %3, align 8, !tbaa !5
  %201 = load ptr, ptr %3, align 8, !tbaa !5
  %202 = getelementptr inbounds %struct.XSdPs, ptr %201, i32 0, i32 9
  %203 = load i32, ptr %202, align 8, !tbaa !22
  %204 = call i32 @XSdPs_Change_ClkFreq(ptr noundef %200, i32 noundef %203)
  store i32 %204, ptr %4, align 4, !tbaa !9
  %205 = load i32, ptr %4, align 4, !tbaa !9
  %206 = sext i32 %205 to i64
  %207 = icmp ne i64 %206, 0
  br i1 %207, label %208, label %209

208:                                              ; preds = %195
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

209:                                              ; preds = %195
  %210 = load ptr, ptr %3, align 8, !tbaa !5
  %211 = getelementptr inbounds %struct.XSdPs, ptr %210, i32 0, i32 16
  %212 = load i32, ptr %211, align 4, !tbaa !24
  %213 = icmp eq i32 %212, 7
  br i1 %213, label %214, label %222

214:                                              ; preds = %209
  %215 = load ptr, ptr %3, align 8, !tbaa !5
  %216 = call i32 @XSdPs_Execute_Tuning(ptr noundef %215)
  store i32 %216, ptr %4, align 4, !tbaa !9
  %217 = load i32, ptr %4, align 4, !tbaa !9
  %218 = sext i32 %217 to i64
  %219 = icmp ne i64 %218, 0
  br i1 %219, label %220, label %221

220:                                              ; preds = %214
  store i32 1, ptr %4, align 4, !tbaa !9
  br label %239

221:                                              ; preds = %214
  br label %222

222:                                              ; preds = %221, %209
  br label %223

223:                                              ; preds = %222, %145
  br label %224

224:                                              ; preds = %223, %96
  call void @usleep(i64 noundef 1000)
  %225 = load ptr, ptr %3, align 8, !tbaa !5
  %226 = getelementptr inbounds %struct.XSdPs, ptr %225, i32 0, i32 0
  %227 = getelementptr inbounds %struct.XSdPs_Config, ptr %226, i32 0, i32 1
  %228 = load i32, ptr %227, align 4, !tbaa !18
  %229 = call zeroext i8 @XSdPs_ReadReg8(i32 noundef %228, i8 noundef zeroext 40)
  %230 = zext i8 %229 to i32
  store i32 %230, ptr %5, align 4, !tbaa !9
  %231 = load i32, ptr %5, align 4, !tbaa !9
  %232 = or i32 %231, 4
  store i32 %232, ptr %5, align 4, !tbaa !9
  %233 = load ptr, ptr %3, align 8, !tbaa !5
  %234 = getelementptr inbounds %struct.XSdPs, ptr %233, i32 0, i32 0
  %235 = getelementptr inbounds %struct.XSdPs_Config, ptr %234, i32 0, i32 1
  %236 = load i32, ptr %235, align 4, !tbaa !18
  %237 = load i32, ptr %5, align 4, !tbaa !9
  %238 = trunc i32 %237 to i8
  call void @XSdPs_WriteReg8(i32 noundef %236, i8 noundef zeroext 40, i8 noundef zeroext %238)
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %239

239:                                              ; preds = %224, %220, %208, %185, %173, %144, %122, %110, %95, %70, %58
  %240 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %240, ptr %2, align 4
  store i32 1, ptr %10, align 4
  br label %241

241:                                              ; preds = %239, %21, %14
  call void @llvm.lifetime.end.p0(i64 64, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  %242 = load i32, ptr %2, align 4
  ret i32 %242
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare void @Xil_DCacheFlushRange(i64 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @XSdPs_Change_ClkFreq(ptr noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
declare hidden i32 @XSdPs_Execute_Tuning(ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 36}
!12 = !{!"", !13, i64 0, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !10, i64 56, !7, i64 60, !7, i64 64, !10, i64 80, !7, i64 84, !10, i64 100, !10, i64 104, !10, i64 108, !6, i64 112, !7, i64 128, !15, i64 512}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !7, i64 32}
!14 = !{!"short", !7, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!12, !7, i64 52}
!17 = !{!14, !14, i64 0}
!18 = !{!12, !10, i64 4}
!19 = !{!12, !7, i64 32}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!12, !10, i64 56}
!23 = distinct !{!23, !21}
!24 = !{!12, !10, i64 108}
!25 = distinct !{!25, !21}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [167 x i8], align 1
@TransferMode = external local_unnamed_addr global i16, align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #1

declare i32 @XSdPs_CmdTransfer(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg16(i32 noundef, i8 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @XSdPs_SetupADMA2DescTbl(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @XSdPs_ReadReg16(i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

declare void @usleep(i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i8 @XSdPs_ReadReg8(i32 noundef, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @XSdPs_WriteReg8(i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XSdPs_Change_BusSpeed(ptr noundef %0) local_unnamed_addr #3 {
  %2 = alloca [64 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %2) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(64) %2, i8 0, i64 64, i1 false)
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %7, label %3

3:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 36
  %5 = load i32, ptr %4, align 4, !tbaa !9
  %6 = icmp eq i32 %5, 286331153
  br i1 %6, label %8, label %11

7:                                                ; preds = %1
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 484) #5
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %81

8:                                                ; preds = %3
  %9 = getelementptr inbounds i8, ptr %0, i64 52
  %10 = load i8, ptr %9, align 4, !tbaa !15
  switch i8 %10, label %48 [
    i8 1, label %12
    i8 2, label %33
  ]

11:                                               ; preds = %3
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 485) #5
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %81

12:                                               ; preds = %8
  %13 = getelementptr inbounds i8, ptr %0, i64 4
  %14 = load i32, ptr %13, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %14, i8 noundef zeroext 4, i16 noundef zeroext 64)
  call void @XSdPs_SetupADMA2DescTbl(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull %2) #5
  %15 = getelementptr inbounds i8, ptr %0, i64 32
  %16 = load i8, ptr %15, align 32, !tbaa !17
  %17 = icmp eq i8 %16, 0
  br i1 %17, label %18, label %20

18:                                               ; preds = %12
  %19 = ptrtoint ptr %2 to i64
  call void @Xil_DCacheFlushRange(i64 noundef %19, i32 noundef 64) #5
  br label %20

20:                                               ; preds = %18, %12
  store i16 17, ptr @TransferMode, align 2, !tbaa !18
  %21 = call i32 @XSdPs_CmdTransfer(ptr noundef nonnull %0, i32 noundef 1536, i32 noundef -2130706447, i32 noundef 1) #5
  %.not69 = icmp eq i32 %21, 0
  br i1 %.not69, label %.preheader72, label %81

.preheader72:                                     ; preds = %20, %26
  %22 = load i32, ptr %13, align 4, !tbaa !16
  %23 = call zeroext i16 @XSdPs_ReadReg16(i32 noundef %22, i8 noundef zeroext 48)
  %.not70 = icmp sgt i16 %23, -1
  br i1 %.not70, label %26, label %24

24:                                               ; preds = %.preheader72
  %25 = load i32, ptr %13, align 4, !tbaa !16
  call void @XSdPs_WriteReg16(i32 noundef %25, i8 noundef zeroext 50, i16 noundef zeroext -3073)
  br label %81

26:                                               ; preds = %.preheader72
  %27 = and i16 %23, 2
  %28 = icmp eq i16 %27, 0
  br i1 %28, label %.preheader72, label %29, !llvm.loop !19

29:                                               ; preds = %26
  %30 = load i32, ptr %13, align 4, !tbaa !16
  call void @XSdPs_WriteReg16(i32 noundef %30, i8 noundef zeroext 48, i16 noundef zeroext 2)
  %31 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 50000000, ptr %31, align 8, !tbaa !21
  %32 = call i32 @XSdPs_Change_ClkFreq(ptr noundef nonnull %0, i32 noundef 50000000)
  %.not71 = icmp eq i32 %32, 0
  br i1 %.not71, label %75, label %81

33:                                               ; preds = %8
  %34 = tail call i32 @XSdPs_CmdTransfer(ptr noundef nonnull %0, i32 noundef 1536, i32 noundef 62456064, i32 noundef 0) #5
  %.not66 = icmp eq i32 %34, 0
  br i1 %.not66, label %.preheader73, label %81

.preheader73:                                     ; preds = %33
  %35 = getelementptr inbounds i8, ptr %0, i64 4
  br label %36

36:                                               ; preds = %.preheader73, %41
  %37 = load i32, ptr %35, align 4, !tbaa !16
  %38 = tail call zeroext i16 @XSdPs_ReadReg16(i32 noundef %37, i8 noundef zeroext 48)
  %.not67 = icmp sgt i16 %38, -1
  br i1 %.not67, label %41, label %39

39:                                               ; preds = %36
  %40 = load i32, ptr %35, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %40, i8 noundef zeroext 50, i16 noundef zeroext -3073)
  br label %81

41:                                               ; preds = %36
  %42 = and i16 %38, 2
  %43 = icmp eq i16 %42, 0
  br i1 %43, label %36, label %44, !llvm.loop !22

44:                                               ; preds = %41
  %45 = load i32, ptr %35, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %45, i8 noundef zeroext 48, i16 noundef zeroext 2)
  %46 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 52000000, ptr %46, align 8, !tbaa !21
  %47 = tail call i32 @XSdPs_Change_ClkFreq(ptr noundef nonnull %0, i32 noundef 52000000)
  %.not68 = icmp eq i32 %47, 0
  br i1 %.not68, label %75, label %81

48:                                               ; preds = %8
  %49 = getelementptr inbounds i8, ptr %0, i64 108
  %50 = load i32, ptr %49, align 4, !tbaa !23
  %51 = getelementptr inbounds i8, ptr %0, i64 56
  switch i32 %50, label %53 [
    i32 7, label %54
    i32 4, label %52
  ]

52:                                               ; preds = %48
  br label %54

53:                                               ; preds = %48
  br label %54

54:                                               ; preds = %48, %52, %53
  %.sink = phi i32 [ 52000000, %52 ], [ 52000000, %53 ], [ 200000000, %48 ]
  %.058 = phi i32 [ 62456064, %52 ], [ 62456064, %53 ], [ 62456320, %48 ]
  store i32 %.sink, ptr %51, align 8, !tbaa !21
  %55 = tail call i32 @XSdPs_CmdTransfer(ptr noundef nonnull %0, i32 noundef 1536, i32 noundef %.058, i32 noundef 0) #5
  %.not62 = icmp eq i32 %55, 0
  br i1 %.not62, label %.preheader, label %81

.preheader:                                       ; preds = %54
  %56 = getelementptr inbounds i8, ptr %0, i64 4
  br label %57

57:                                               ; preds = %.preheader, %62
  %58 = load i32, ptr %56, align 4, !tbaa !16
  %59 = tail call zeroext i16 @XSdPs_ReadReg16(i32 noundef %58, i8 noundef zeroext 48)
  %.not63 = icmp sgt i16 %59, -1
  br i1 %.not63, label %62, label %60

60:                                               ; preds = %57
  %61 = load i32, ptr %56, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %61, i8 noundef zeroext 50, i16 noundef zeroext -3073)
  br label %81

62:                                               ; preds = %57
  %63 = and i16 %59, 2
  %64 = icmp eq i16 %63, 0
  br i1 %64, label %57, label %65, !llvm.loop !24

65:                                               ; preds = %62
  %66 = load i32, ptr %56, align 4, !tbaa !16
  tail call void @XSdPs_WriteReg16(i32 noundef %66, i8 noundef zeroext 48, i16 noundef zeroext 2)
  %67 = getelementptr inbounds i8, ptr %0, i64 56
  %68 = load i32, ptr %67, align 8, !tbaa !21
  %69 = tail call i32 @XSdPs_Change_ClkFreq(ptr noundef nonnull %0, i32 noundef %68)
  %.not64 = icmp eq i32 %69, 0
  br i1 %.not64, label %70, label %81

70:                                               ; preds = %65
  %71 = load i32, ptr %49, align 4, !tbaa !23
  %72 = icmp eq i32 %71, 7
  br i1 %72, label %73, label %75

73:                                               ; preds = %70
  %74 = tail call i32 @XSdPs_Execute_Tuning(ptr noundef nonnull %0)
  %.not65 = icmp eq i32 %74, 0
  br i1 %.not65, label %75, label %81

75:                                               ; preds = %44, %73, %70, %29
  call void @usleep(i64 noundef 1000) #5
  %76 = getelementptr inbounds i8, ptr %0, i64 4
  %77 = load i32, ptr %76, align 4, !tbaa !16
  %78 = call zeroext i8 @XSdPs_ReadReg8(i32 noundef %77, i8 noundef zeroext 40)
  %79 = or i8 %78, 4
  %80 = load i32, ptr %76, align 4, !tbaa !16
  call void @XSdPs_WriteReg8(i32 noundef %80, i8 noundef zeroext 40, i8 noundef zeroext %79)
  br label %81

81:                                               ; preds = %24, %39, %60, %75, %20, %29, %33, %44, %54, %65, %73, %11, %7
  %.0 = phi i32 [ 0, %11 ], [ 0, %7 ], [ 1, %24 ], [ 0, %75 ], [ 1, %39 ], [ 1, %60 ], [ 1, %20 ], [ 1, %29 ], [ 1, %33 ], [ 1, %44 ], [ 1, %54 ], [ 1, %65 ], [ 1, %73 ]
  call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %2) #5
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

declare void @Xil_DCacheFlushRange(i64 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @XSdPs_Change_ClkFreq(ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: nounwind uwtable
declare hidden i32 @XSdPs_Execute_Tuning(ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 36}
!10 = !{!"", !11, i64 0, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !7, i64 52, !7, i64 53, !7, i64 54, !7, i64 55, !6, i64 56, !7, i64 60, !7, i64 64, !6, i64 80, !7, i64 84, !6, i64 100, !6, i64 104, !6, i64 108, !13, i64 112, !7, i64 128, !14, i64 512}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !7, i64 32}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!10, !7, i64 52}
!16 = !{!10, !6, i64 4}
!17 = !{!10, !7, i64 32}
!18 = !{!12, !12, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!10, !6, i64 56}
!22 = distinct !{!22, !20}
!23 = !{!10, !6, i64 108}
!24 = distinct !{!24, !20}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass