; LLVM IR from lesialin/ImageSignalProcessing_C :: src/isp_hsc.ll (Z7isp_hscPh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_isp_config = external global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7isp_hscPh(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i16, align 2
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca i8, align 1
  %13 = alloca i8, align 1
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  %17 = load float, ptr getelementptr inbounds (%struct.hsc_cfg_t, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 20), i32 0, i32 1), align 4, !tbaa !9
  %18 = fmul float %17, 6.400000e+01
  %19 = fptosi float %18 to i16
  store i16 %19, ptr %6, align 2, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %20 = load i8, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 20), align 4, !tbaa !26
  %21 = uitofp i8 %20 to double
  store double %21, ptr %9, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #3
  %22 = load i32, ptr @g_isp_config, align 8, !tbaa !29
  %23 = trunc i32 %22 to i16
  store i16 %23, ptr %4, align 2, !tbaa !25
  %24 = load i32, ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 1), align 4, !tbaa !30
  %25 = trunc i32 %24 to i16
  store i16 %25, ptr %5, align 2, !tbaa !25
  %26 = load i16, ptr %4, align 2, !tbaa !25
  %27 = zext i16 %26 to i32
  %28 = load i16, ptr %5, align 2, !tbaa !25
  %29 = zext i16 %28 to i32
  %30 = mul nsw i32 %27, %29
  store i32 %30, ptr %3, align 4, !tbaa !31
  %31 = load double, ptr %9, align 8, !tbaa !27
  %32 = fdiv double %31, 1.800000e+02
  %33 = fmul double %32, 0x400921FB53C8D4F1
  %34 = call double @cos(double noundef %33) #3
  store double %34, ptr %10, align 8, !tbaa !27
  %35 = load double, ptr %9, align 8, !tbaa !27
  %36 = fdiv double %35, 1.800000e+02
  %37 = fmul double %36, 0x400921FB53C8D4F1
  %38 = call double @sin(double noundef %37) #3
  store double %38, ptr %11, align 8, !tbaa !27
  %39 = load double, ptr %10, align 8, !tbaa !27
  %40 = fmul double %39, 6.400000e+01
  %41 = fptosi double %40 to i8
  store i8 %41, ptr %12, align 1, !tbaa !32
  %42 = load double, ptr %11, align 8, !tbaa !27
  %43 = fmul double %42, 6.400000e+01
  %44 = fptosi double %43 to i8
  store i8 %44, ptr %13, align 1, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !31
  br label %45

45:                                               ; preds = %241, %1
  %46 = load i32, ptr %14, align 4, !tbaa !31
  %47 = load i16, ptr %5, align 2, !tbaa !25
  %48 = zext i16 %47 to i32
  %49 = icmp slt i32 %46, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %45
  store i32 2, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %244

51:                                               ; preds = %45
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 0, ptr %16, align 4, !tbaa !31
  br label %52

52:                                               ; preds = %237, %51
  %53 = load i32, ptr %16, align 4, !tbaa !31
  %54 = load i16, ptr %4, align 2, !tbaa !25
  %55 = zext i16 %54 to i32
  %56 = icmp slt i32 %53, %55
  br i1 %56, label %58, label %57

57:                                               ; preds = %52
  store i32 5, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %240

58:                                               ; preds = %52
  %59 = load ptr, ptr %2, align 8, !tbaa !5
  %60 = load i32, ptr %14, align 4, !tbaa !31
  %61 = load i16, ptr %4, align 2, !tbaa !25
  %62 = zext i16 %61 to i32
  %63 = mul nsw i32 %60, %62
  %64 = load i32, ptr %16, align 4, !tbaa !31
  %65 = add nsw i32 %63, %64
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds i8, ptr %59, i64 %66
  %68 = load i8, ptr %67, align 1, !tbaa !32
  %69 = zext i8 %68 to i16
  store i16 %69, ptr %7, align 2, !tbaa !25
  %70 = load ptr, ptr %2, align 8, !tbaa !5
  %71 = load i32, ptr %3, align 4, !tbaa !31
  %72 = load i32, ptr %14, align 4, !tbaa !31
  %73 = load i16, ptr %4, align 2, !tbaa !25
  %74 = zext i16 %73 to i32
  %75 = mul nsw i32 %72, %74
  %76 = add i32 %71, %75
  %77 = load i32, ptr %16, align 4, !tbaa !31
  %78 = add i32 %76, %77
  %79 = zext i32 %78 to i64
  %80 = getelementptr inbounds i8, ptr %70, i64 %79
  %81 = load i8, ptr %80, align 1, !tbaa !32
  %82 = zext i8 %81 to i16
  store i16 %82, ptr %8, align 2, !tbaa !25
  %83 = load i16, ptr %7, align 2, !tbaa !25
  %84 = sext i16 %83 to i32
  %85 = sub nsw i32 %84, 128
  %86 = load i8, ptr %12, align 1, !tbaa !32
  %87 = sext i8 %86 to i32
  %88 = mul nsw i32 %85, %87
  %89 = load i16, ptr %8, align 2, !tbaa !25
  %90 = sext i16 %89 to i32
  %91 = sub nsw i32 %90, 128
  %92 = load i8, ptr %13, align 1, !tbaa !32
  %93 = sext i8 %92 to i32
  %94 = mul nsw i32 %91, %93
  %95 = add nsw i32 %88, %94
  %96 = ashr i32 %95, 6
  %97 = add nsw i32 %96, 128
  %98 = trunc i32 %97 to i16
  store i16 %98, ptr %7, align 2, !tbaa !25
  %99 = load i16, ptr %8, align 2, !tbaa !25
  %100 = sext i16 %99 to i32
  %101 = sub nsw i32 %100, 128
  %102 = load i8, ptr %12, align 1, !tbaa !32
  %103 = sext i8 %102 to i32
  %104 = mul nsw i32 %101, %103
  %105 = load i16, ptr %7, align 2, !tbaa !25
  %106 = sext i16 %105 to i32
  %107 = sub nsw i32 %106, 128
  %108 = load i8, ptr %13, align 1, !tbaa !32
  %109 = sext i8 %108 to i32
  %110 = mul nsw i32 %107, %109
  %111 = add nsw i32 %104, %110
  %112 = ashr i32 %111, 6
  %113 = add nsw i32 %112, 128
  %114 = trunc i32 %113 to i16
  store i16 %114, ptr %8, align 2, !tbaa !25
  %115 = load i16, ptr %7, align 2, !tbaa !25
  %116 = sext i16 %115 to i32
  %117 = icmp sgt i32 %116, 255
  br i1 %117, label %118, label %119

118:                                              ; preds = %58
  br label %122

119:                                              ; preds = %58
  %120 = load i16, ptr %7, align 2, !tbaa !25
  %121 = sext i16 %120 to i32
  br label %122

122:                                              ; preds = %119, %118
  %123 = phi i32 [ 255, %118 ], [ %121, %119 ]
  %124 = trunc i32 %123 to i16
  store i16 %124, ptr %7, align 2, !tbaa !25
  %125 = load i16, ptr %7, align 2, !tbaa !25
  %126 = sext i16 %125 to i32
  %127 = icmp slt i32 %126, 0
  br i1 %127, label %128, label %129

128:                                              ; preds = %122
  br label %132

129:                                              ; preds = %122
  %130 = load i16, ptr %7, align 2, !tbaa !25
  %131 = sext i16 %130 to i32
  br label %132

132:                                              ; preds = %129, %128
  %133 = phi i32 [ 0, %128 ], [ %131, %129 ]
  %134 = trunc i32 %133 to i16
  store i16 %134, ptr %7, align 2, !tbaa !25
  %135 = load i16, ptr %8, align 2, !tbaa !25
  %136 = sext i16 %135 to i32
  %137 = icmp sgt i32 %136, 255
  br i1 %137, label %138, label %139

138:                                              ; preds = %132
  br label %142

139:                                              ; preds = %132
  %140 = load i16, ptr %8, align 2, !tbaa !25
  %141 = sext i16 %140 to i32
  br label %142

142:                                              ; preds = %139, %138
  %143 = phi i32 [ 255, %138 ], [ %141, %139 ]
  %144 = trunc i32 %143 to i16
  store i16 %144, ptr %8, align 2, !tbaa !25
  %145 = load i16, ptr %8, align 2, !tbaa !25
  %146 = sext i16 %145 to i32
  %147 = icmp slt i32 %146, 0
  br i1 %147, label %148, label %149

148:                                              ; preds = %142
  br label %152

149:                                              ; preds = %142
  %150 = load i16, ptr %8, align 2, !tbaa !25
  %151 = sext i16 %150 to i32
  br label %152

152:                                              ; preds = %149, %148
  %153 = phi i32 [ 0, %148 ], [ %151, %149 ]
  %154 = trunc i32 %153 to i16
  store i16 %154, ptr %8, align 2, !tbaa !25
  %155 = load i16, ptr %6, align 2, !tbaa !25
  %156 = sext i16 %155 to i32
  %157 = load i16, ptr %7, align 2, !tbaa !25
  %158 = sext i16 %157 to i32
  %159 = sub nsw i32 %158, 128
  %160 = mul nsw i32 %156, %159
  %161 = ashr i32 %160, 6
  %162 = add nsw i32 %161, 128
  %163 = trunc i32 %162 to i16
  store i16 %163, ptr %7, align 2, !tbaa !25
  %164 = load i16, ptr %6, align 2, !tbaa !25
  %165 = sext i16 %164 to i32
  %166 = load i16, ptr %8, align 2, !tbaa !25
  %167 = sext i16 %166 to i32
  %168 = sub nsw i32 %167, 128
  %169 = mul nsw i32 %165, %168
  %170 = ashr i32 %169, 6
  %171 = add nsw i32 %170, 128
  %172 = trunc i32 %171 to i16
  store i16 %172, ptr %8, align 2, !tbaa !25
  %173 = load i16, ptr %7, align 2, !tbaa !25
  %174 = sext i16 %173 to i32
  %175 = icmp sgt i32 %174, 255
  br i1 %175, label %176, label %177

176:                                              ; preds = %152
  br label %180

177:                                              ; preds = %152
  %178 = load i16, ptr %7, align 2, !tbaa !25
  %179 = sext i16 %178 to i32
  br label %180

180:                                              ; preds = %177, %176
  %181 = phi i32 [ 255, %176 ], [ %179, %177 ]
  %182 = trunc i32 %181 to i16
  store i16 %182, ptr %7, align 2, !tbaa !25
  %183 = load i16, ptr %7, align 2, !tbaa !25
  %184 = sext i16 %183 to i32
  %185 = icmp slt i32 %184, 0
  br i1 %185, label %186, label %187

186:                                              ; preds = %180
  br label %190

187:                                              ; preds = %180
  %188 = load i16, ptr %7, align 2, !tbaa !25
  %189 = sext i16 %188 to i32
  br label %190

190:                                              ; preds = %187, %186
  %191 = phi i32 [ 0, %186 ], [ %189, %187 ]
  %192 = trunc i32 %191 to i16
  store i16 %192, ptr %7, align 2, !tbaa !25
  %193 = load i16, ptr %8, align 2, !tbaa !25
  %194 = sext i16 %193 to i32
  %195 = icmp sgt i32 %194, 255
  br i1 %195, label %196, label %197

196:                                              ; preds = %190
  br label %200

197:                                              ; preds = %190
  %198 = load i16, ptr %8, align 2, !tbaa !25
  %199 = sext i16 %198 to i32
  br label %200

200:                                              ; preds = %197, %196
  %201 = phi i32 [ 255, %196 ], [ %199, %197 ]
  %202 = trunc i32 %201 to i16
  store i16 %202, ptr %8, align 2, !tbaa !25
  %203 = load i16, ptr %8, align 2, !tbaa !25
  %204 = sext i16 %203 to i32
  %205 = icmp slt i32 %204, 0
  br i1 %205, label %206, label %207

206:                                              ; preds = %200
  br label %210

207:                                              ; preds = %200
  %208 = load i16, ptr %8, align 2, !tbaa !25
  %209 = sext i16 %208 to i32
  br label %210

210:                                              ; preds = %207, %206
  %211 = phi i32 [ 0, %206 ], [ %209, %207 ]
  %212 = trunc i32 %211 to i16
  store i16 %212, ptr %8, align 2, !tbaa !25
  %213 = load i16, ptr %7, align 2, !tbaa !25
  %214 = trunc i16 %213 to i8
  %215 = load ptr, ptr %2, align 8, !tbaa !5
  %216 = load i32, ptr %14, align 4, !tbaa !31
  %217 = load i16, ptr %4, align 2, !tbaa !25
  %218 = zext i16 %217 to i32
  %219 = mul nsw i32 %216, %218
  %220 = load i32, ptr %16, align 4, !tbaa !31
  %221 = add nsw i32 %219, %220
  %222 = sext i32 %221 to i64
  %223 = getelementptr inbounds i8, ptr %215, i64 %222
  store i8 %214, ptr %223, align 1, !tbaa !32
  %224 = load i16, ptr %8, align 2, !tbaa !25
  %225 = trunc i16 %224 to i8
  %226 = load ptr, ptr %2, align 8, !tbaa !5
  %227 = load i32, ptr %3, align 4, !tbaa !31
  %228 = load i32, ptr %14, align 4, !tbaa !31
  %229 = load i16, ptr %4, align 2, !tbaa !25
  %230 = zext i16 %229 to i32
  %231 = mul nsw i32 %228, %230
  %232 = add i32 %227, %231
  %233 = load i32, ptr %16, align 4, !tbaa !31
  %234 = add i32 %232, %233
  %235 = zext i32 %234 to i64
  %236 = getelementptr inbounds i8, ptr %226, i64 %235
  store i8 %225, ptr %236, align 1, !tbaa !32
  br label %237

237:                                              ; preds = %210
  %238 = load i32, ptr %16, align 4, !tbaa !31
  %239 = add nsw i32 %238, 1
  store i32 %239, ptr %16, align 4, !tbaa !31
  br label %52, !llvm.loop !33

240:                                              ; preds = %57
  br label %241

241:                                              ; preds = %240
  %242 = load i32, ptr %14, align 4, !tbaa !31
  %243 = add nsw i32 %242, 1
  store i32 %243, ptr %14, align 4, !tbaa !31
  br label %45, !llvm.loop !35

244:                                              ; preds = %50
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare double @cos(double noundef) #2

; Function Attrs: nounwind
declare double @sin(double noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !17, i64 368}
!10 = !{!"_ZTS12isp_config_t", !11, i64 0, !11, i64 4, !12, i64 8, !13, i64 16, !16, i64 48, !12, i64 64, !13, i64 72, !18, i64 104, !7, i64 120, !13, i64 168, !17, i64 200, !7, i64 204, !19, i64 252, !20, i64 256, !7, i64 320, !21, i64 350, !22, i64 362, !23, i64 364, !24, i64 372}
!11 = !{!"int", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !14, i64 0, !15, i64 8, !7, i64 16}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTS9blc_cfg_t", !12, i64 0, !12, i64 2, !12, i64 4, !12, i64 6, !17, i64 8, !17, i64 12}
!17 = !{!"float", !7, i64 0}
!18 = !{!"_ZTS10awb_gain_t", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12}
!19 = !{!"_ZTS9nlm_cfg_t", !7, i64 0, !7, i64 1, !7, i64 2}
!20 = !{!"_ZTS9bnf_cfg_t", !7, i64 0, !7, i64 50, !7, i64 58}
!21 = !{!"_ZTS9eeh_cfg_t", !12, i64 0, !12, i64 2, !12, i64 4, !12, i64 6, !12, i64 8, !12, i64 10}
!22 = !{!"_ZTS9fcs_cfg_t", !7, i64 0, !7, i64 1}
!23 = !{!"_ZTS9hsc_cfg_t", !7, i64 0, !17, i64 4}
!24 = !{!"_ZTS9bcc_cfg_t", !7, i64 0, !17, i64 4}
!25 = !{!12, !12, i64 0}
!26 = !{!10, !7, i64 364}
!27 = !{!28, !28, i64 0}
!28 = !{!"double", !7, i64 0}
!29 = !{!10, !11, i64 0}
!30 = !{!10, !11, i64 4}
!31 = !{!11, !11, i64 0}
!32 = !{!7, !7, i64 0}
!33 = distinct !{!33, !34}
!34 = !{!"llvm.loop.mustprogress"}
!35 = distinct !{!35, !34}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_isp_config = external local_unnamed_addr global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nofree nounwind memory(readwrite, inaccessiblemem: write) uwtable
define dso_local void @_Z7isp_hscPh(ptr nocapture noundef %0) local_unnamed_addr #0 {
  %2 = load float, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 368), align 8, !tbaa !5
  %3 = load i8, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 364), align 4, !tbaa !24
  %4 = uitofp i8 %3 to double
  %5 = load i32, ptr @g_isp_config, align 8, !tbaa !25
  %6 = load i32, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 4), align 4, !tbaa !26
  %7 = and i32 %5, 65535
  %8 = and i32 %6, 65535
  %9 = fdiv double %4, 1.800000e+02
  %10 = fmul double %9, 0x400921FB53C8D4F1
  %11 = tail call double @cos(double noundef %10) #3
  %12 = tail call double @sin(double noundef %10) #3
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %._crit_edge78, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %1
  %13 = fmul double %12, 6.400000e+01
  %14 = fptosi double %13 to i8
  %15 = fmul double %11, 6.400000e+01
  %16 = fptosi double %15 to i8
  %17 = fmul float %2, 6.400000e+01
  %18 = fptosi float %17 to i16
  %.not79 = icmp eq i32 %7, 0
  %19 = sext i8 %16 to i32
  %20 = sext i8 %14 to i32
  %factor.op.mul = shl nsw i32 %19, 10
  %factor.op.mul71 = shl nsw i32 %20, 10
  %21 = sext i16 %18 to i32
  %22 = shl nsw i32 %21, 10
  br i1 %.not79, label %._crit_edge78, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %23 = zext nneg i32 %7 to i64
  %24 = zext nneg i32 %8 to i64
  %25 = add nsw i64 %23, -1
  %26 = mul nuw nsw i64 %23, %24
  %scevgep = getelementptr i8, ptr %0, i64 %26
  %scevgep88 = getelementptr i8, ptr %0, i64 %23
  %min.iters.check = icmp ult i32 %7, 8
  %27 = trunc nsw i64 %25 to i32
  %28 = icmp ugt i64 %25, 4294967295
  %min.iters.check90 = icmp ult i32 %7, 16
  %n.vec = and i64 %23, 65520
  %broadcast.splatinsert = insertelement <16 x i32> poison, i32 %factor.op.mul, i64 0
  %broadcast.splat = shufflevector <16 x i32> %broadcast.splatinsert, <16 x i32> poison, <16 x i32> zeroinitializer
  %broadcast.splatinsert92 = insertelement <16 x i32> poison, i32 %factor.op.mul71, i64 0
  %broadcast.splat93 = shufflevector <16 x i32> %broadcast.splatinsert92, <16 x i32> poison, <16 x i32> zeroinitializer
  %broadcast.splatinsert94 = insertelement <16 x i32> poison, i32 %22, i64 0
  %broadcast.splat95 = shufflevector <16 x i32> %broadcast.splatinsert94, <16 x i32> poison, <16 x i32> zeroinitializer
  %cmp.n = icmp eq i64 %n.vec, %23
  %n.vec.remaining = and i64 %23, 8
  %min.epilog.iters.check.not.not = icmp eq i64 %n.vec.remaining, 0
  %n.vec97 = and i64 %23, 65528
  %broadcast.splatinsert101 = insertelement <8 x i32> poison, i32 %factor.op.mul, i64 0
  %broadcast.splat102 = shufflevector <8 x i32> %broadcast.splatinsert101, <8 x i32> poison, <8 x i32> zeroinitializer
  %broadcast.splatinsert103 = insertelement <8 x i32> poison, i32 %factor.op.mul71, i64 0
  %broadcast.splat104 = shufflevector <8 x i32> %broadcast.splatinsert103, <8 x i32> poison, <8 x i32> zeroinitializer
  %broadcast.splatinsert105 = insertelement <8 x i32> poison, i32 %22, i64 0
  %broadcast.splat106 = shufflevector <8 x i32> %broadcast.splatinsert105, <8 x i32> poison, <8 x i32> zeroinitializer
  %cmp.n108 = icmp eq i64 %n.vec97, %23
  br label %iter.check

iter.check:                                       ; preds = %.preheader.us.preheader, %._crit_edge.us
  %indvars.iv82 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next83, %._crit_edge.us ]
  %29 = trunc i64 %indvars.iv82 to i32
  %30 = add i32 %8, %29
  %31 = mul i32 %7, %30
  %32 = zext i32 %31 to i64
  %scevgep87 = getelementptr i8, ptr %0, i64 %32
  %scevgep89 = getelementptr i8, ptr %scevgep88, i64 %32
  %33 = mul nuw nsw i64 %indvars.iv82, %23
  %34 = trunc i64 %indvars.iv82 to i32
  %35 = add i32 %8, %34
  %36 = mul i32 %35, %7
  %invariant.gep = getelementptr inbounds i8, ptr %0, i64 %33
  br i1 %min.iters.check, label %vec.epilog.scalar.ph.preheader, label %vector.scevcheck

vector.scevcheck:                                 ; preds = %iter.check
  %37 = trunc i64 %indvars.iv82 to i32
  %38 = add i32 %8, %37
  %39 = mul i32 %7, %38
  %40 = xor i32 %39, -1
  %41 = icmp ult i32 %40, %27
  %42 = or i1 %41, %28
  br i1 %42, label %vec.epilog.scalar.ph.preheader, label %vector.memcheck

vector.memcheck:                                  ; preds = %vector.scevcheck
  %bound0 = icmp ugt ptr %scevgep89, %0
  %bound1 = icmp ult ptr %scevgep87, %scevgep
  %found.conflict = and i1 %bound0, %bound1
  br i1 %found.conflict, label %vec.epilog.scalar.ph.preheader, label %vector.main.loop.iter.check

vector.main.loop.iter.check:                      ; preds = %vector.memcheck
  br i1 %min.iters.check90, label %vec.epilog.ph, label %vector.body

vector.body:                                      ; preds = %vector.main.loop.iter.check, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %vector.main.loop.iter.check ]
  %43 = trunc i64 %index to i32
  %44 = getelementptr inbounds i8, ptr %invariant.gep, i64 %index
  %wide.load = load <16 x i8>, ptr %44, align 1, !tbaa !27, !alias.scope !28, !noalias !31
  %45 = add i32 %36, %43
  %46 = zext i32 %45 to i64
  %47 = getelementptr inbounds i8, ptr %0, i64 %46
  %wide.load91 = load <16 x i8>, ptr %47, align 1, !tbaa !27, !alias.scope !31
  %48 = zext <16 x i8> %wide.load to <16 x i32>
  %49 = add nuw nsw <16 x i32> %48, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %50 = mul <16 x i32> %49, %broadcast.splat
  %51 = zext <16 x i8> %wide.load91 to <16 x i32>
  %52 = add nsw <16 x i32> %51, <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128>
  %53 = mul nsw <16 x i32> %52, %broadcast.splat93
  %54 = add <16 x i32> %53, %50
  %55 = mul nsw <16 x i32> %52, %broadcast.splat
  %56 = add <16 x i32> %54, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %57 = ashr <16 x i32> %56, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %58 = add nsw <16 x i32> %57, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %59 = mul <16 x i32> %58, %broadcast.splat93
  %60 = add <16 x i32> %59, %55
  %61 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %57, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %62 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %61, <16 x i32> zeroinitializer)
  %63 = add <16 x i32> %60, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %64 = ashr <16 x i32> %63, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %65 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %64, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %66 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %65, <16 x i32> zeroinitializer)
  %67 = add nuw nsw <16 x i32> %62, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %68 = add nuw nsw <16 x i32> %66, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %69 = mul <16 x i32> %broadcast.splat95, %67
  %70 = add <16 x i32> %69, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %71 = ashr <16 x i32> %70, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %72 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %71, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %73 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %72, <16 x i32> zeroinitializer)
  %74 = mul <16 x i32> %broadcast.splat95, %68
  %75 = add <16 x i32> %74, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %76 = ashr <16 x i32> %75, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %77 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %76, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %78 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %77, <16 x i32> zeroinitializer)
  %79 = trunc <16 x i32> %73 to <16 x i8>
  store <16 x i8> %79, ptr %44, align 1, !tbaa !27, !alias.scope !28, !noalias !31
  %80 = trunc <16 x i32> %78 to <16 x i8>
  store <16 x i8> %80, ptr %47, align 1, !tbaa !27, !alias.scope !31
  %index.next = add nuw i64 %index, 16
  %81 = icmp eq i64 %index.next, %n.vec
  br i1 %81, label %middle.block, label %vector.body, !llvm.loop !33

middle.block:                                     ; preds = %vector.body
  br i1 %cmp.n, label %._crit_edge.us, label %vec.epilog.iter.check

vec.epilog.iter.check:                            ; preds = %middle.block
  br i1 %min.epilog.iters.check.not.not, label %vec.epilog.scalar.ph.preheader, label %vec.epilog.ph

vec.epilog.ph:                                    ; preds = %vector.main.loop.iter.check, %vec.epilog.iter.check
  %vec.epilog.resume.val = phi i64 [ %n.vec, %vec.epilog.iter.check ], [ 0, %vector.main.loop.iter.check ]
  br label %vec.epilog.vector.body

vec.epilog.vector.body:                           ; preds = %vec.epilog.vector.body, %vec.epilog.ph
  %index98 = phi i64 [ %vec.epilog.resume.val, %vec.epilog.ph ], [ %index.next107, %vec.epilog.vector.body ]
  %82 = trunc i64 %index98 to i32
  %83 = getelementptr inbounds i8, ptr %invariant.gep, i64 %index98
  %wide.load99 = load <8 x i8>, ptr %83, align 1, !tbaa !27, !alias.scope !37, !noalias !40
  %84 = add i32 %36, %82
  %85 = zext i32 %84 to i64
  %86 = getelementptr inbounds i8, ptr %0, i64 %85
  %wide.load100 = load <8 x i8>, ptr %86, align 1, !tbaa !27, !alias.scope !40
  %87 = zext <8 x i8> %wide.load99 to <8 x i32>
  %88 = add nuw nsw <8 x i32> %87, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %89 = mul <8 x i32> %88, %broadcast.splat102
  %90 = zext <8 x i8> %wide.load100 to <8 x i32>
  %91 = add nsw <8 x i32> %90, <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128>
  %92 = mul nsw <8 x i32> %91, %broadcast.splat104
  %93 = add <8 x i32> %92, %89
  %94 = mul nsw <8 x i32> %91, %broadcast.splat102
  %95 = add <8 x i32> %93, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %96 = ashr <8 x i32> %95, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %97 = add nsw <8 x i32> %96, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %98 = mul <8 x i32> %97, %broadcast.splat104
  %99 = add <8 x i32> %98, %94
  %100 = tail call <8 x i32> @llvm.smin.v8i32(<8 x i32> %96, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %101 = tail call <8 x i32> @llvm.smax.v8i32(<8 x i32> %100, <8 x i32> zeroinitializer)
  %102 = add <8 x i32> %99, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %103 = ashr <8 x i32> %102, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %104 = tail call <8 x i32> @llvm.smin.v8i32(<8 x i32> %103, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %105 = tail call <8 x i32> @llvm.smax.v8i32(<8 x i32> %104, <8 x i32> zeroinitializer)
  %106 = add nuw nsw <8 x i32> %101, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %107 = add nuw nsw <8 x i32> %105, <i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176, i32 4194176>
  %108 = mul <8 x i32> %broadcast.splat106, %106
  %109 = add <8 x i32> %108, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %110 = ashr <8 x i32> %109, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %111 = tail call <8 x i32> @llvm.smin.v8i32(<8 x i32> %110, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %112 = tail call <8 x i32> @llvm.smax.v8i32(<8 x i32> %111, <8 x i32> zeroinitializer)
  %113 = mul <8 x i32> %broadcast.splat106, %107
  %114 = add <8 x i32> %113, <i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608, i32 8388608>
  %115 = ashr <8 x i32> %114, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
  %116 = tail call <8 x i32> @llvm.smin.v8i32(<8 x i32> %115, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>)
  %117 = tail call <8 x i32> @llvm.smax.v8i32(<8 x i32> %116, <8 x i32> zeroinitializer)
  %118 = trunc <8 x i32> %112 to <8 x i8>
  store <8 x i8> %118, ptr %83, align 1, !tbaa !27, !alias.scope !37, !noalias !40
  %119 = trunc <8 x i32> %117 to <8 x i8>
  store <8 x i8> %119, ptr %86, align 1, !tbaa !27, !alias.scope !40
  %index.next107 = add nuw i64 %index98, 8
  %120 = icmp eq i64 %index.next107, %n.vec97
  br i1 %120, label %vec.epilog.middle.block, label %vec.epilog.vector.body, !llvm.loop !42

vec.epilog.middle.block:                          ; preds = %vec.epilog.vector.body
  br i1 %cmp.n108, label %._crit_edge.us, label %vec.epilog.scalar.ph.preheader

vec.epilog.scalar.ph.preheader:                   ; preds = %vec.epilog.middle.block, %vector.memcheck, %vector.scevcheck, %iter.check, %vec.epilog.iter.check
  %indvars.iv.ph = phi i64 [ 0, %iter.check ], [ 0, %vector.memcheck ], [ 0, %vector.scevcheck ], [ %n.vec, %vec.epilog.iter.check ], [ %n.vec97, %vec.epilog.middle.block ]
  br label %vec.epilog.scalar.ph

vec.epilog.scalar.ph:                             ; preds = %vec.epilog.scalar.ph.preheader, %vec.epilog.scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %vec.epilog.scalar.ph ], [ %indvars.iv.ph, %vec.epilog.scalar.ph.preheader ]
  %gep = getelementptr inbounds i8, ptr %invariant.gep, i64 %indvars.iv
  %121 = load i8, ptr %gep, align 1, !tbaa !27
  %122 = trunc nuw nsw i64 %indvars.iv to i32
  %123 = add i32 %36, %122
  %124 = zext i32 %123 to i64
  %125 = getelementptr inbounds i8, ptr %0, i64 %124
  %126 = load i8, ptr %125, align 1, !tbaa !27
  %127 = zext i8 %121 to i32
  %128 = add nuw nsw i32 %127, 4194176
  %.reass.us = mul i32 %128, %factor.op.mul
  %129 = zext i8 %126 to i32
  %130 = add nsw i32 %129, -128
  %.reass72.us = mul nsw i32 %130, %factor.op.mul71
  %131 = add i32 %.reass72.us, %.reass.us
  %.reass74.us = mul nsw i32 %130, %factor.op.mul
  %sext.us = add i32 %131, 8388608
  %132 = ashr i32 %sext.us, 16
  %133 = add nsw i32 %132, 4194176
  %.reass76.us = mul i32 %133, %factor.op.mul71
  %134 = add i32 %.reass76.us, %.reass74.us
  %135 = tail call i32 @llvm.smin.i32(i32 %132, i32 255)
  %136 = tail call i32 @llvm.smax.i32(i32 %135, i32 0)
  %sext62.us = add i32 %134, 8388608
  %137 = ashr i32 %sext62.us, 16
  %138 = tail call i32 @llvm.smin.i32(i32 %137, i32 255)
  %139 = tail call i32 @llvm.smax.i32(i32 %138, i32 0)
  %140 = add nuw nsw i32 %136, 4194176
  %141 = add nuw nsw i32 %139, 4194176
  %142 = mul i32 %22, %140
  %sext66.us = add i32 %142, 8388608
  %143 = ashr i32 %sext66.us, 16
  %144 = tail call i32 @llvm.smin.i32(i32 %143, i32 255)
  %145 = tail call i32 @llvm.smax.i32(i32 %144, i32 0)
  %146 = mul i32 %22, %141
  %sext68.us = add i32 %146, 8388608
  %147 = ashr i32 %sext68.us, 16
  %148 = tail call i32 @llvm.smin.i32(i32 %147, i32 255)
  %149 = tail call i32 @llvm.smax.i32(i32 %148, i32 0)
  %150 = trunc nuw i32 %145 to i8
  store i8 %150, ptr %gep, align 1, !tbaa !27
  %151 = trunc nuw i32 %149 to i8
  store i8 %151, ptr %125, align 1, !tbaa !27
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %23
  br i1 %exitcond.not, label %._crit_edge.us, label %vec.epilog.scalar.ph, !llvm.loop !43

._crit_edge.us:                                   ; preds = %vec.epilog.scalar.ph, %vec.epilog.middle.block, %middle.block
  %indvars.iv.next83 = add nuw nsw i64 %indvars.iv82, 1
  %exitcond86.not = icmp eq i64 %indvars.iv.next83, %24
  br i1 %exitcond86.not, label %._crit_edge78, label %iter.check, !llvm.loop !44

._crit_edge78:                                    ; preds = %._crit_edge.us, %.preheader.lr.ph, %1
  ret void
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @cos(double noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @sin(double noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <16 x i32> @llvm.smin.v16i32(<16 x i32>, <16 x i32>) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <16 x i32> @llvm.smax.v16i32(<16 x i32>, <16 x i32>) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <8 x i32> @llvm.smin.v8i32(<8 x i32>, <8 x i32>) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <8 x i32> @llvm.smax.v8i32(<8 x i32>, <8 x i32>) #2

attributes #0 = { mustprogress nofree nounwind memory(readwrite, inaccessiblemem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !16, i64 368}
!6 = !{!"_ZTS12isp_config_t", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !15, i64 48, !10, i64 64, !11, i64 72, !17, i64 104, !8, i64 120, !11, i64 168, !16, i64 200, !8, i64 204, !18, i64 252, !19, i64 256, !8, i64 320, !20, i64 350, !21, i64 362, !22, i64 364, !23, i64 372}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !12, i64 0, !14, i64 8, !8, i64 16}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!"_ZTS9blc_cfg_t", !10, i64 0, !10, i64 2, !10, i64 4, !10, i64 6, !16, i64 8, !16, i64 12}
!16 = !{!"float", !8, i64 0}
!17 = !{!"_ZTS10awb_gain_t", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12}
!18 = !{!"_ZTS9nlm_cfg_t", !8, i64 0, !8, i64 1, !8, i64 2}
!19 = !{!"_ZTS9bnf_cfg_t", !8, i64 0, !8, i64 50, !8, i64 58}
!20 = !{!"_ZTS9eeh_cfg_t", !10, i64 0, !10, i64 2, !10, i64 4, !10, i64 6, !10, i64 8, !10, i64 10}
!21 = !{!"_ZTS9fcs_cfg_t", !8, i64 0, !8, i64 1}
!22 = !{!"_ZTS9hsc_cfg_t", !8, i64 0, !16, i64 4}
!23 = !{!"_ZTS9bcc_cfg_t", !8, i64 0, !16, i64 4}
!24 = !{!6, !8, i64 364}
!25 = !{!6, !7, i64 0}
!26 = !{!6, !7, i64 4}
!27 = !{!8, !8, i64 0}
!28 = !{!29}
!29 = distinct !{!29, !30}
!30 = distinct !{!30, !"LVerDomain"}
!31 = !{!32}
!32 = distinct !{!32, !30}
!33 = distinct !{!33, !34, !35, !36}
!34 = !{!"llvm.loop.mustprogress"}
!35 = !{!"llvm.loop.isvectorized", i32 1}
!36 = !{!"llvm.loop.unroll.runtime.disable"}
!37 = !{!38}
!38 = distinct !{!38, !39}
!39 = distinct !{!39, !"LVerDomain"}
!40 = !{!41}
!41 = distinct !{!41, !39}
!42 = distinct !{!42, !34, !35, !36}
!43 = distinct !{!43, !34, !35}
!44 = distinct !{!44, !34}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass