; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (ReceiveBuffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_ReceiveBuffer(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.XUartPs, ptr %8, i32 0, i32 0
  %10 = getelementptr inbounds %struct.XUartPs_Config, ptr %9, i32 0, i32 1
  %11 = load i32, ptr %10, align 4, !tbaa !11
  %12 = add i32 %11, 44
  %13 = zext i32 %12 to i64
  %14 = call i32 @Xil_In32(i64 noundef %13)
  store i32 %14, ptr %3, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %55, %1
  %16 = load i32, ptr %4, align 4, !tbaa !9
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.XUartPs, ptr %17, i32 0, i32 5
  %19 = getelementptr inbounds %struct.XUartPsBuffer, ptr %18, i32 0, i32 2
  %20 = load i32, ptr %19, align 4, !tbaa !16
  %21 = icmp ult i32 %16, %20
  br i1 %21, label %22, label %26

22:                                               ; preds = %15
  %23 = load i32, ptr %3, align 4, !tbaa !9
  %24 = and i32 %23, 2
  %25 = icmp eq i32 %24, 0
  br label %26

26:                                               ; preds = %22, %15
  %27 = phi i1 [ false, %15 ], [ %25, %22 ]
  br i1 %27, label %28, label %80

28:                                               ; preds = %26
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.XUartPs, ptr %29, i32 0, i32 9
  %31 = load i8, ptr %30, align 4, !tbaa !17
  %32 = icmp ne i8 %31, 0
  br i1 %32, label %33, label %55

33:                                               ; preds = %28
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.XUartPs, ptr %34, i32 0, i32 0
  %36 = getelementptr inbounds %struct.XUartPs_Config, ptr %35, i32 0, i32 1
  %37 = load i32, ptr %36, align 4, !tbaa !11
  %38 = add i32 %37, 72
  %39 = zext i32 %38 to i64
  %40 = call i32 @Xil_In32(i64 noundef %39)
  store i32 %40, ptr %5, align 4, !tbaa !9
  %41 = load i32, ptr %5, align 4, !tbaa !9
  %42 = and i32 %41, 7
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %54

44:                                               ; preds = %33
  %45 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %45, ptr %6, align 4, !tbaa !9
  store i32 6, ptr %7, align 4, !tbaa !9
  %46 = load ptr, ptr %2, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.XUartPs, ptr %46, i32 0, i32 6
  %48 = load ptr, ptr %47, align 8, !tbaa !18
  %49 = load ptr, ptr %2, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.XUartPs, ptr %49, i32 0, i32 7
  %51 = load ptr, ptr %50, align 8, !tbaa !19
  %52 = load i32, ptr %7, align 4, !tbaa !9
  %53 = load i32, ptr %6, align 4, !tbaa !9
  call void %48(ptr noundef %51, i32 noundef %52, i32 noundef %53)
  br label %54

54:                                               ; preds = %44, %33
  br label %55

55:                                               ; preds = %54, %28
  %56 = load ptr, ptr %2, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.XUartPs, ptr %56, i32 0, i32 0
  %58 = getelementptr inbounds %struct.XUartPs_Config, ptr %57, i32 0, i32 1
  %59 = load i32, ptr %58, align 4, !tbaa !11
  %60 = add i32 %59, 48
  %61 = zext i32 %60 to i64
  %62 = call i32 @Xil_In32(i64 noundef %61)
  %63 = trunc i32 %62 to i8
  %64 = load ptr, ptr %2, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.XUartPs, ptr %64, i32 0, i32 5
  %66 = getelementptr inbounds %struct.XUartPsBuffer, ptr %65, i32 0, i32 0
  %67 = load ptr, ptr %66, align 8, !tbaa !20
  %68 = load i32, ptr %4, align 4, !tbaa !9
  %69 = zext i32 %68 to i64
  %70 = getelementptr inbounds i8, ptr %67, i64 %69
  store i8 %63, ptr %70, align 1, !tbaa !21
  %71 = load i32, ptr %4, align 4, !tbaa !9
  %72 = add i32 %71, 1
  store i32 %72, ptr %4, align 4, !tbaa !9
  %73 = load ptr, ptr %2, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.XUartPs, ptr %73, i32 0, i32 0
  %75 = getelementptr inbounds %struct.XUartPs_Config, ptr %74, i32 0, i32 1
  %76 = load i32, ptr %75, align 4, !tbaa !11
  %77 = add i32 %76, 44
  %78 = zext i32 %77 to i64
  %79 = call i32 @Xil_In32(i64 noundef %78)
  store i32 %79, ptr %3, align 4, !tbaa !9
  br label %15, !llvm.loop !22

80:                                               ; preds = %26
  %81 = load ptr, ptr %2, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.XUartPs, ptr %81, i32 0, i32 9
  store i8 0, ptr %82, align 4, !tbaa !17
  %83 = load ptr, ptr %2, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.XUartPs, ptr %83, i32 0, i32 5
  %85 = getelementptr inbounds %struct.XUartPsBuffer, ptr %84, i32 0, i32 0
  %86 = load ptr, ptr %85, align 8, !tbaa !20
  %87 = icmp ne ptr %86, null
  br i1 %87, label %88, label %96

88:                                               ; preds = %80
  %89 = load i32, ptr %4, align 4, !tbaa !9
  %90 = load ptr, ptr %2, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.XUartPs, ptr %90, i32 0, i32 5
  %92 = getelementptr inbounds %struct.XUartPsBuffer, ptr %91, i32 0, i32 0
  %93 = load ptr, ptr %92, align 8, !tbaa !20
  %94 = zext i32 %89 to i64
  %95 = getelementptr inbounds i8, ptr %93, i64 %94
  store ptr %95, ptr %92, align 8, !tbaa !20
  br label %96

96:                                               ; preds = %88, %80
  %97 = load i32, ptr %4, align 4, !tbaa !9
  %98 = load ptr, ptr %2, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.XUartPs, ptr %98, i32 0, i32 5
  %100 = getelementptr inbounds %struct.XUartPsBuffer, ptr %99, i32 0, i32 2
  %101 = load i32, ptr %100, align 4, !tbaa !16
  %102 = sub i32 %101, %97
  store i32 %102, ptr %100, align 4, !tbaa !16
  %103 = load i32, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %103
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 4}
!12 = !{!"", !13, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !15, i64 32, !15, i64 48, !6, i64 64, !6, i64 72, !10, i64 80, !7, i64 84}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}
!16 = !{!12, !10, i64 60}
!17 = !{!12, !7, i64 84}
!18 = !{!12, !6, i64 64}
!19 = !{!12, !6, i64 72}
!20 = !{!12, !6, i64 48}
!21 = !{!7, !7, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_ReceiveBuffer(ptr nocapture noundef %0) local_unnamed_addr #1 {
  %2 = getelementptr inbounds i8, ptr %0, i64 4
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = add i32 %3, 44
  %5 = zext i32 %4 to i64
  %6 = tail call i32 @Xil_In32(i64 noundef %5)
  %7 = getelementptr inbounds i8, ptr %0, i64 48
  %8 = getelementptr inbounds i8, ptr %0, i64 60
  %9 = load i32, ptr %8, align 4, !tbaa !14
  %10 = icmp ne i32 %9, 0
  %11 = and i32 %6, 2
  %12 = icmp eq i32 %11, 0
  %13 = select i1 %10, i1 %12, i1 false
  br i1 %13, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %1
  %14 = getelementptr inbounds i8, ptr %0, i64 84
  %15 = getelementptr inbounds i8, ptr %0, i64 64
  %16 = getelementptr inbounds i8, ptr %0, i64 72
  br label %17

17:                                               ; preds = %.lr.ph, %28
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %28 ]
  %18 = load i8, ptr %14, align 4, !tbaa !15
  %.not25 = icmp eq i8 %18, 0
  br i1 %.not25, label %28, label %19

19:                                               ; preds = %17
  %20 = load i32, ptr %2, align 4, !tbaa !5
  %21 = add i32 %20, 72
  %22 = zext i32 %21 to i64
  %23 = tail call i32 @Xil_In32(i64 noundef %22)
  %24 = and i32 %23, 7
  %.not26 = icmp eq i32 %24, 0
  br i1 %.not26, label %28, label %25

25:                                               ; preds = %19
  %26 = load ptr, ptr %15, align 8, !tbaa !16
  %27 = load ptr, ptr %16, align 8, !tbaa !17
  tail call void %26(ptr noundef %27, i32 noundef 6, i32 noundef %23) #2
  br label %28

28:                                               ; preds = %19, %25, %17
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = add i32 %29, 48
  %31 = zext i32 %30 to i64
  %32 = tail call i32 @Xil_In32(i64 noundef %31)
  %33 = trunc i32 %32 to i8
  %34 = load ptr, ptr %7, align 8, !tbaa !18
  %35 = getelementptr inbounds i8, ptr %34, i64 %indvars.iv
  store i8 %33, ptr %35, align 1, !tbaa !19
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %36 = load i32, ptr %2, align 4, !tbaa !5
  %37 = add i32 %36, 44
  %38 = zext i32 %37 to i64
  %39 = tail call i32 @Xil_In32(i64 noundef %38)
  %40 = load i32, ptr %8, align 4, !tbaa !14
  %41 = zext i32 %40 to i64
  %42 = icmp ult i64 %indvars.iv.next, %41
  %43 = and i32 %39, 2
  %44 = icmp eq i32 %43, 0
  %45 = select i1 %42, i1 %44, i1 false
  br i1 %45, label %17, label %._crit_edge.loopexit, !llvm.loop !20

._crit_edge.loopexit:                             ; preds = %28
  %46 = trunc nuw i64 %indvars.iv.next to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %1
  %.023.lcssa = phi i32 [ 0, %1 ], [ %46, %._crit_edge.loopexit ]
  %.lcssa = phi i32 [ %9, %1 ], [ %40, %._crit_edge.loopexit ]
  %47 = getelementptr inbounds i8, ptr %0, i64 84
  store i8 0, ptr %47, align 4, !tbaa !15
  %48 = load ptr, ptr %7, align 8, !tbaa !18
  %.not = icmp eq ptr %48, null
  br i1 %.not, label %52, label %49

49:                                               ; preds = %._crit_edge
  %50 = zext i32 %.023.lcssa to i64
  %51 = getelementptr inbounds i8, ptr %48, i64 %50
  store ptr %51, ptr %7, align 8, !tbaa !18
  br label %52

52:                                               ; preds = %49, %._crit_edge
  %53 = sub i32 %.lcssa, %.023.lcssa
  store i32 %53, ptr %8, align 4, !tbaa !14
  ret i32 %.023.lcssa
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 4}
!6 = !{!"", !7, i64 0, !11, i64 16, !11, i64 20, !11, i64 24, !12, i64 32, !12, i64 48, !13, i64 64, !13, i64 72, !11, i64 80, !9, i64 84}
!7 = !{!"", !8, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"", !13, i64 0, !11, i64 8, !11, i64 12}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!6, !11, i64 60}
!15 = !{!6, !9, i64 84}
!16 = !{!6, !13, i64 64}
!17 = !{!6, !13, i64 72}
!18 = !{!6, !13, i64 48}
!19 = !{!9, !9, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass