; LLVM IR from MakeContributions/DSA :: algorithms/CPlusPlus/Arrays/search-sorted-rotated.ll (Z12search_arraySt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z12search_arraySt6vectorIiSaIiEEi(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %10 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %11 = sub i64 %10, 1
  %12 = trunc i64 %11 to i32
  store i32 %12, ptr %7, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %88, %2
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = icmp sle i32 %14, %15
  br i1 %16, label %17, label %89

17:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = sub nsw i32 %19, %20
  %22 = sdiv i32 %21, 2
  %23 = add nsw i32 %18, %22
  store i32 %23, ptr %8, align 4, !tbaa !9
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = load i32, ptr %5, align 4, !tbaa !9
  %29 = icmp eq i32 %27, %28
  br i1 %29, label %30, label %32

30:                                               ; preds = %17
  %31 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %31, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %86

32:                                               ; preds = %17
  %33 = load i32, ptr %8, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %34) #2
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = load i32, ptr %6, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %38) #2
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = icmp sgt i32 %36, %40
  br i1 %41, label %42, label %63

42:                                               ; preds = %32
  %43 = load i32, ptr %6, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %44) #2
  %46 = load i32, ptr %45, align 4, !tbaa !9
  %47 = load i32, ptr %5, align 4, !tbaa !9
  %48 = icmp sle i32 %46, %47
  br i1 %48, label %49, label %59

49:                                               ; preds = %42
  %50 = load i32, ptr %5, align 4, !tbaa !9
  %51 = load i32, ptr %8, align 4, !tbaa !9
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %52) #2
  %54 = load i32, ptr %53, align 4, !tbaa !9
  %55 = icmp slt i32 %50, %54
  br i1 %55, label %56, label %59

56:                                               ; preds = %49
  %57 = load i32, ptr %8, align 4, !tbaa !9
  %58 = sub nsw i32 %57, 1
  store i32 %58, ptr %7, align 4, !tbaa !9
  br label %62

59:                                               ; preds = %49, %42
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %6, align 4, !tbaa !9
  br label %62

62:                                               ; preds = %59, %56
  br label %84

63:                                               ; preds = %32
  %64 = load i32, ptr %7, align 4, !tbaa !9
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %65) #2
  %67 = load i32, ptr %66, align 4, !tbaa !9
  %68 = load i32, ptr %5, align 4, !tbaa !9
  %69 = icmp sge i32 %67, %68
  br i1 %69, label %70, label %80

70:                                               ; preds = %63
  %71 = load i32, ptr %5, align 4, !tbaa !9
  %72 = load i32, ptr %8, align 4, !tbaa !9
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %73) #2
  %75 = load i32, ptr %74, align 4, !tbaa !9
  %76 = icmp sgt i32 %71, %75
  br i1 %76, label %77, label %80

77:                                               ; preds = %70
  %78 = load i32, ptr %8, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %6, align 4, !tbaa !9
  br label %83

80:                                               ; preds = %70, %63
  %81 = load i32, ptr %8, align 4, !tbaa !9
  %82 = sub nsw i32 %81, 1
  store i32 %82, ptr %7, align 4, !tbaa !9
  br label %83

83:                                               ; preds = %80, %77
  br label %84

84:                                               ; preds = %83, %62
  br label %85

85:                                               ; preds = %84
  store i32 0, ptr %9, align 4
  br label %86

86:                                               ; preds = %85, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %87 = load i32, ptr %9, align 4
  switch i32 %87, label %90 [
    i32 0, label %88
  ]

88:                                               ; preds = %86
  br label %13, !llvm.loop !11

89:                                               ; preds = %13
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %90

90:                                               ; preds = %89, %86
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %91 = load i32, ptr %3, align 4
  ret i32 %91
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z12search_arraySt6vectorIiSaIiEEi(ptr noundef nonnull %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %4 = trunc i64 %3 to i32
  %5 = add i32 %4, -1
  %.not38 = icmp slt i32 %5, 0
  br i1 %.not38, label %.thread, label %.lr.ph

.lr.ph:                                           ; preds = %2, %42
  %.02540 = phi i32 [ %.227, %42 ], [ %5, %2 ]
  %.02839 = phi i32 [ %.230, %42 ], [ 0, %2 ]
  %6 = sub nsw i32 %.02540, %.02839
  %7 = sdiv i32 %6, 2
  %8 = add nsw i32 %7, %.02839
  %9 = sext i32 %8 to i64
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %9) #1
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %.not34 = icmp eq i32 %11, %1
  br i1 %.not34, label %.thread, label %12

12:                                               ; preds = %.lr.ph
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %9) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = sext i32 %.02839 to i64
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp sgt i32 %14, %17
  br i1 %18, label %19, label %30

19:                                               ; preds = %12
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %.not33 = icmp sgt i32 %21, %1
  br i1 %.not33, label %28, label %22

22:                                               ; preds = %19
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %9) #1
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp sgt i32 %24, %1
  br i1 %25, label %26, label %28

26:                                               ; preds = %22
  %27 = add nsw i32 %8, -1
  br label %42

28:                                               ; preds = %22, %19
  %29 = add nsw i32 %8, 1
  br label %42

30:                                               ; preds = %12
  %31 = sext i32 %.02540 to i64
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %31) #1
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %.not32 = icmp slt i32 %33, %1
  br i1 %.not32, label %40, label %34

34:                                               ; preds = %30
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %9) #1
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = icmp slt i32 %36, %1
  br i1 %37, label %38, label %40

38:                                               ; preds = %34
  %39 = add nsw i32 %8, 1
  br label %42

40:                                               ; preds = %34, %30
  %41 = add nsw i32 %8, -1
  br label %42

42:                                               ; preds = %38, %40, %26, %28
  %.230 = phi i32 [ %.02839, %26 ], [ %29, %28 ], [ %39, %38 ], [ %.02839, %40 ]
  %.227 = phi i32 [ %27, %26 ], [ %.02540, %28 ], [ %.02540, %38 ], [ %41, %40 ]
  %.not = icmp sgt i32 %.230, %.227
  br i1 %.not, label %.thread, label %.lr.ph

.thread:                                          ; preds = %42, %.lr.ph, %2
  %.2 = phi i32 [ -1, %2 ], [ %8, %.lr.ph ], [ -1, %42 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass