; LLVM IR from CactiLab/Sherloc-Cortex-M-CFVD :: Sherloc_runtime/evaluation/src/qrduino (qrframe)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@WDB = external dso_local global i8, align 1
@WD = external dso_local global i8, align 1
@VERSION = external dso_local global i8, align 1
@qrframe = external dso_local global ptr, align 8
@ECCLEVEL = external dso_local global i8, align 1
@eccblocks = external hidden constant [640 x i8], align 16
@neccblk1 = external dso_local global i8, align 1
@neccblk2 = external dso_local global i8, align 1
@datablkw = external dso_local global i8, align 1
@eccblkwid = external dso_local global i8, align 1
@strinbuf = external dso_local global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden ptr @malloc_beebs(i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @initecc(i8 noundef zeroext %0, i8 noundef zeroext %1) #1 {
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i8 %0, ptr %3, align 1, !tbaa !5
  store i8 %1, ptr %4, align 1, !tbaa !5
  %7 = load i8, ptr %4, align 1, !tbaa !5
  store i8 %7, ptr @VERSION, align 1, !tbaa !5
  %8 = load i8, ptr %4, align 1, !tbaa !5
  %9 = zext i8 %8 to i32
  %10 = mul nsw i32 4, %9
  %11 = add nsw i32 17, %10
  %12 = trunc i32 %11 to i8
  store i8 %12, ptr @WD, align 1, !tbaa !5
  %13 = load i8, ptr @WD, align 1, !tbaa !5
  %14 = zext i8 %13 to i32
  %15 = add nsw i32 %14, 7
  %16 = sdiv i32 %15, 8
  %17 = trunc i32 %16 to i8
  store i8 %17, ptr @WDB, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %18 = load i8, ptr @WD, align 1, !tbaa !5
  %19 = zext i8 %18 to i32
  %20 = load i8, ptr @WDB, align 1, !tbaa !5
  %21 = zext i8 %20 to i32
  %22 = mul nsw i32 %19, %21
  store i32 %22, ptr %5, align 4, !tbaa !8
  %23 = load i32, ptr %5, align 4, !tbaa !8
  %24 = icmp ult i32 %23, 768
  br i1 %24, label %25, label %26

25:                                               ; preds = %2
  store i32 768, ptr %5, align 4, !tbaa !8
  br label %26

26:                                               ; preds = %25, %2
  %27 = load i32, ptr %5, align 4, !tbaa !8
  %28 = zext i32 %27 to i64
  %29 = call ptr @malloc_beebs(i64 noundef %28)
  store ptr %29, ptr @qrframe, align 8, !tbaa !10
  %30 = load i8, ptr %3, align 1, !tbaa !5
  store i8 %30, ptr @ECCLEVEL, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %31 = load i8, ptr %3, align 1, !tbaa !5
  %32 = zext i8 %31 to i32
  %33 = sub nsw i32 %32, 1
  %34 = mul nsw i32 %33, 4
  %35 = load i8, ptr %4, align 1, !tbaa !5
  %36 = zext i8 %35 to i32
  %37 = sub nsw i32 %36, 1
  %38 = mul nsw i32 %37, 16
  %39 = add nsw i32 %34, %38
  store i32 %39, ptr %6, align 4, !tbaa !8
  %40 = load i32, ptr %6, align 4, !tbaa !8
  %41 = add i32 %40, 1
  store i32 %41, ptr %6, align 4, !tbaa !8
  %42 = zext i32 %40 to i64
  %43 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %42
  %44 = load i8, ptr %43, align 1, !tbaa !5
  store i8 %44, ptr @neccblk1, align 1, !tbaa !5
  %45 = load i32, ptr %6, align 4, !tbaa !8
  %46 = add i32 %45, 1
  store i32 %46, ptr %6, align 4, !tbaa !8
  %47 = zext i32 %45 to i64
  %48 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %47
  %49 = load i8, ptr %48, align 1, !tbaa !5
  store i8 %49, ptr @neccblk2, align 1, !tbaa !5
  %50 = load i32, ptr %6, align 4, !tbaa !8
  %51 = add i32 %50, 1
  store i32 %51, ptr %6, align 4, !tbaa !8
  %52 = zext i32 %50 to i64
  %53 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %52
  %54 = load i8, ptr %53, align 1, !tbaa !5
  store i8 %54, ptr @datablkw, align 1, !tbaa !5
  %55 = load i32, ptr %6, align 4, !tbaa !8
  %56 = add i32 %55, 1
  store i32 %56, ptr %6, align 4, !tbaa !8
  %57 = zext i32 %55 to i64
  %58 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %57
  %59 = load i8, ptr %58, align 1, !tbaa !5
  store i8 %59, ptr @eccblkwid, align 1, !tbaa !5
  %60 = load i32, ptr %5, align 4, !tbaa !8
  %61 = load i8, ptr @datablkw, align 1, !tbaa !5
  %62 = zext i8 %61 to i32
  %63 = load i8, ptr @datablkw, align 1, !tbaa !5
  %64 = zext i8 %63 to i32
  %65 = load i8, ptr @eccblkwid, align 1, !tbaa !5
  %66 = zext i8 %65 to i32
  %67 = add nsw i32 %64, %66
  %68 = load i8, ptr @neccblk1, align 1, !tbaa !5
  %69 = zext i8 %68 to i32
  %70 = load i8, ptr @neccblk2, align 1, !tbaa !5
  %71 = zext i8 %70 to i32
  %72 = add nsw i32 %69, %71
  %73 = mul nsw i32 %67, %72
  %74 = add nsw i32 %62, %73
  %75 = load i8, ptr @neccblk2, align 1, !tbaa !5
  %76 = zext i8 %75 to i32
  %77 = add nsw i32 %74, %76
  %78 = icmp ult i32 %60, %77
  br i1 %78, label %79, label %97

79:                                               ; preds = %26
  %80 = load i8, ptr @datablkw, align 1, !tbaa !5
  %81 = zext i8 %80 to i32
  %82 = load i8, ptr @datablkw, align 1, !tbaa !5
  %83 = zext i8 %82 to i32
  %84 = load i8, ptr @eccblkwid, align 1, !tbaa !5
  %85 = zext i8 %84 to i32
  %86 = add nsw i32 %83, %85
  %87 = load i8, ptr @neccblk1, align 1, !tbaa !5
  %88 = zext i8 %87 to i32
  %89 = load i8, ptr @neccblk2, align 1, !tbaa !5
  %90 = zext i8 %89 to i32
  %91 = add nsw i32 %88, %90
  %92 = mul nsw i32 %86, %91
  %93 = add nsw i32 %81, %92
  %94 = load i8, ptr @neccblk2, align 1, !tbaa !5
  %95 = zext i8 %94 to i32
  %96 = add nsw i32 %93, %95
  store i32 %96, ptr %5, align 4, !tbaa !8
  br label %97

97:                                               ; preds = %79, %26
  %98 = load i32, ptr %5, align 4, !tbaa !8
  %99 = zext i32 %98 to i64
  %100 = call ptr @malloc_beebs(i64 noundef %99)
  store ptr %100, ptr @strinbuf, align 8, !tbaa !10
  %101 = load i8, ptr @datablkw, align 1, !tbaa !5
  %102 = zext i8 %101 to i32
  %103 = load i8, ptr @neccblk1, align 1, !tbaa !5
  %104 = zext i8 %103 to i32
  %105 = load i8, ptr @neccblk2, align 1, !tbaa !5
  %106 = zext i8 %105 to i32
  %107 = add nsw i32 %104, %106
  %108 = mul nsw i32 %102, %107
  %109 = load i8, ptr @neccblk2, align 1, !tbaa !5
  %110 = zext i8 %109 to i32
  %111 = add nsw i32 %108, %110
  %112 = sub nsw i32 %111, 3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %112
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@WDB = external dso_local local_unnamed_addr global i8, align 1
@WD = external dso_local local_unnamed_addr global i8, align 1
@VERSION = external dso_local local_unnamed_addr global i8, align 1
@qrframe = external dso_local local_unnamed_addr global ptr, align 8
@ECCLEVEL = external dso_local local_unnamed_addr global i8, align 1
@eccblocks = external hidden local_unnamed_addr constant [640 x i8], align 16
@neccblk1 = external dso_local local_unnamed_addr global i8, align 1
@neccblk2 = external dso_local local_unnamed_addr global i8, align 1
@datablkw = external dso_local local_unnamed_addr global i8, align 1
@eccblkwid = external dso_local local_unnamed_addr global i8, align 1
@strinbuf = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
declare hidden ptr @malloc_beebs(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -3, 130303) i32 @initecc(i8 noundef zeroext %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  store i8 %1, ptr @VERSION, align 1, !tbaa !5
  %3 = zext i8 %1 to i32
  %4 = shl i8 %1, 2
  %5 = add i8 %4, 17
  store i8 %5, ptr @WD, align 1, !tbaa !5
  %6 = zext i8 %5 to i16
  %7 = add nuw nsw i16 %6, 7
  %8 = lshr i16 %7, 3
  %9 = trunc nuw nsw i16 %8 to i8
  store i8 %9, ptr @WDB, align 1, !tbaa !5
  %10 = zext i8 %5 to i32
  %11 = zext nneg i16 %8 to i32
  %12 = mul nuw nsw i32 %11, %10
  %spec.store.select = tail call i32 @llvm.umax.i32(i32 %12, i32 768)
  %13 = zext nneg i32 %spec.store.select to i64
  %14 = tail call ptr @malloc_beebs(i64 noundef %13)
  store ptr %14, ptr @qrframe, align 8, !tbaa !8
  store i8 %0, ptr @ECCLEVEL, align 1, !tbaa !5
  %15 = zext i8 %0 to i32
  %16 = shl nuw nsw i32 %15, 2
  %17 = shl nuw nsw i32 %3, 4
  %18 = add nuw nsw i32 %17, %16
  %19 = add nsw i32 %18, -20
  %20 = add nsw i32 %18, -19
  %21 = zext i32 %19 to i64
  %22 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %21
  %23 = load i8, ptr %22, align 4, !tbaa !5
  store i8 %23, ptr @neccblk1, align 1, !tbaa !5
  %24 = add nsw i32 %18, -18
  %25 = zext i32 %20 to i64
  %26 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %25
  %27 = load i8, ptr %26, align 1, !tbaa !5
  store i8 %27, ptr @neccblk2, align 1, !tbaa !5
  %28 = add nsw i32 %18, -17
  %29 = zext i32 %24 to i64
  %30 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %29
  %31 = load i8, ptr %30, align 2, !tbaa !5
  store i8 %31, ptr @datablkw, align 1, !tbaa !5
  %32 = zext i32 %28 to i64
  %33 = getelementptr inbounds [640 x i8], ptr @eccblocks, i64 0, i64 %32
  %34 = load i8, ptr %33, align 1, !tbaa !5
  store i8 %34, ptr @eccblkwid, align 1, !tbaa !5
  %35 = zext i8 %31 to i32
  %36 = zext i8 %34 to i32
  %37 = add nuw nsw i32 %36, %35
  %38 = zext i8 %23 to i32
  %39 = zext i8 %27 to i32
  %40 = add nuw nsw i32 %39, %38
  %41 = mul nuw nsw i32 %37, %40
  %42 = add nuw nsw i32 %35, %39
  %43 = add nuw nsw i32 %42, %41
  %spec.select = tail call i32 @llvm.umax.i32(i32 %spec.store.select, i32 %43)
  %44 = zext nneg i32 %spec.select to i64
  %45 = tail call ptr @malloc_beebs(i64 noundef %44)
  store ptr %45, ptr @strinbuf, align 8, !tbaa !8
  %46 = load i8, ptr @datablkw, align 1, !tbaa !5
  %47 = zext i8 %46 to i32
  %48 = load i8, ptr @neccblk1, align 1, !tbaa !5
  %49 = zext i8 %48 to i32
  %50 = load i8, ptr @neccblk2, align 1, !tbaa !5
  %51 = zext i8 %50 to i32
  %52 = add nuw nsw i32 %51, %49
  %53 = mul nuw nsw i32 %52, %47
  %54 = add nsw i32 %51, -3
  %55 = add nsw i32 %54, %53
  ret i32 %55
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass