; LLVM IR from cvxpy/cvxpy :: cvxpy/cvxcore/src (LinOpOperations)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Eigen::Triplet" = type { i32, i32, double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN5Eigen7TripletIdiEESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5Eigen7TripletIdiEC2ERKiS3_RKd(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z12add_tripletsRSt6vectorIN5Eigen7TripletIdiEESaIS2_EERKS_IS_IiSaIiEESaIS7_EERKS7_iii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"class.Eigen::Triplet", align 8
  %15 = alloca double, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  %22 = load i32, ptr %11, align 4, !tbaa !9
  %23 = icmp slt i32 %22, 0
  br i1 %23, label %24, label %28

24:                                               ; preds = %6
  %25 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  store double 1.000000e+00, ptr %15, align 8, !tbaa !11
  call void @_ZN5Eigen7TripletIdiEC2ERKiS3_RKd(ptr noundef nonnull align 8 dereferenceable(16) %14, ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef nonnull align 8 dereferenceable(8) %15)
  call void @_ZNSt6vectorIN5Eigen7TripletIdiEESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24) %25, ptr noundef nonnull align 8 dereferenceable(16) %14)
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #4
  %26 = load i32, ptr %13, align 4, !tbaa !9
  %27 = add nsw i32 %26, 1
  store i32 %27, ptr %7, align 4
  br label %100

28:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %29 = load ptr, ptr %9, align 8, !tbaa !5
  %30 = load i32, ptr %11, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #4
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef 0) #4
  %34 = load i32, ptr %33, align 4, !tbaa !9
  store i32 %34, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %35 = load ptr, ptr %9, align 8, !tbaa !5
  %36 = load i32, ptr %11, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %37) #4
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef 1) #4
  %40 = load i32, ptr %39, align 4, !tbaa !9
  store i32 %40, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = load i32, ptr %11, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #4
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef 2) #4
  %46 = load i32, ptr %45, align 4, !tbaa !9
  store i32 %46, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  %47 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %47, ptr %19, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %97, %28
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %19, align 4, !tbaa !9
  %51 = icmp slt i32 %50, 0
  br i1 %51, label %60, label %52

52:                                               ; preds = %49
  %53 = load i32, ptr %19, align 4, !tbaa !9
  %54 = load ptr, ptr %10, align 8, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %56) #4
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = icmp sge i32 %53, %58
  br i1 %59, label %60, label %61

60:                                               ; preds = %52, %49
  br label %98

61:                                               ; preds = %52
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %62 = load i32, ptr %12, align 4, !tbaa !9
  %63 = load i32, ptr %19, align 4, !tbaa !9
  %64 = load ptr, ptr %10, align 8, !tbaa !5
  %65 = load i32, ptr %11, align 4, !tbaa !9
  %66 = call noundef i32 @_Z14vecprod_beforeRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %64, i32 noundef %65)
  %67 = mul nsw i32 %63, %66
  %68 = add nsw i32 %62, %67
  store i32 %68, ptr %20, align 4, !tbaa !9
  %69 = load ptr, ptr %8, align 8, !tbaa !5
  %70 = load ptr, ptr %9, align 8, !tbaa !5
  %71 = load ptr, ptr %10, align 8, !tbaa !5
  %72 = load i32, ptr %11, align 4, !tbaa !9
  %73 = sub nsw i32 %72, 1
  %74 = load i32, ptr %20, align 4, !tbaa !9
  %75 = load i32, ptr %13, align 4, !tbaa !9
  %76 = call noundef i32 @_Z12add_tripletsRSt6vectorIN5Eigen7TripletIdiEESaIS2_EERKS_IS_IiSaIiEESaIS7_EERKS7_iii(ptr noundef nonnull align 8 dereferenceable(24) %69, ptr noundef nonnull align 8 dereferenceable(24) %70, ptr noundef nonnull align 8 dereferenceable(24) %71, i32 noundef %73, i32 noundef %74, i32 noundef %75)
  store i32 %76, ptr %13, align 4, !tbaa !9
  %77 = load i32, ptr %18, align 4, !tbaa !9
  %78 = load i32, ptr %19, align 4, !tbaa !9
  %79 = add nsw i32 %78, %77
  store i32 %79, ptr %19, align 4, !tbaa !9
  %80 = load i32, ptr %18, align 4, !tbaa !9
  %81 = icmp sgt i32 %80, 0
  br i1 %81, label %82, label %86

82:                                               ; preds = %61
  %83 = load i32, ptr %19, align 4, !tbaa !9
  %84 = load i32, ptr %17, align 4, !tbaa !9
  %85 = icmp sge i32 %83, %84
  br i1 %85, label %93, label %86

86:                                               ; preds = %82, %61
  %87 = load i32, ptr %18, align 4, !tbaa !9
  %88 = icmp slt i32 %87, 0
  br i1 %88, label %89, label %94

89:                                               ; preds = %86
  %90 = load i32, ptr %19, align 4, !tbaa !9
  %91 = load i32, ptr %17, align 4, !tbaa !9
  %92 = icmp sle i32 %90, %91
  br i1 %92, label %93, label %94

93:                                               ; preds = %89, %82
  store i32 3, ptr %21, align 4
  br label %95

94:                                               ; preds = %89, %86
  store i32 0, ptr %21, align 4
  br label %95

95:                                               ; preds = %94, %93
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  %96 = load i32, ptr %21, align 4
  switch i32 %96, label %102 [
    i32 0, label %97
    i32 3, label %98
  ]

97:                                               ; preds = %95
  br label %48, !llvm.loop !13

98:                                               ; preds = %95, %60
  %99 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %99, ptr %7, align 4
  store i32 1, ptr %21, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  br label %100

100:                                              ; preds = %98, %24
  %101 = load i32, ptr %7, align 4
  ret i32 %101

102:                                              ; preds = %95
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

declare noundef i32 @_Z14vecprod_beforeRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Eigen::Triplet" = type { i32, i32, double }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIN5Eigen7TripletIdiEESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5Eigen7TripletIdiEC2ERKiS3_RKd(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 8 dereferenceable(8)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z12add_tripletsRSt6vectorIN5Eigen7TripletIdiEESaIS2_EERKS_IS_IiSaIiEESaIS7_EERKS7_iii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #1 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %"class.Eigen::Triplet", align 8
  %10 = alloca double, align 8
  store i32 %4, ptr %7, align 4, !tbaa !5
  store i32 %5, ptr %8, align 4, !tbaa !5
  %11 = icmp slt i32 %3, 0
  br i1 %11, label %12, label %15

12:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %9) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #4
  store double 1.000000e+00, ptr %10, align 8, !tbaa !9
  call void @_ZN5Eigen7TripletIdiEC2ERKiS3_RKd(ptr noundef nonnull align 8 dereferenceable(16) %9, ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 8 dereferenceable(8) %10)
  call void @_ZNSt6vectorIN5Eigen7TripletIdiEESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(16) %9)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %9) #4
  %13 = load i32, ptr %8, align 4, !tbaa !5
  %14 = add nsw i32 %13, 1
  br label %.loopexit

15:                                               ; preds = %6
  %16 = zext nneg i32 %3 to i64
  %17 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %16) #4
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef 0) #4
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %16) #4
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef 1) #4
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %16) #4
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef 2) #4
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = add nsw i32 %3, -1
  %27 = icmp slt i32 %25, 1
  %28 = icmp sgt i32 %25, -1
  br label %29

29:                                               ; preds = %35, %15
  %30 = phi i32 [ %5, %15 ], [ %39, %35 ]
  %.031 = phi i32 [ %19, %15 ], [ %40, %35 ]
  %31 = icmp slt i32 %.031, 0
  br i1 %31, label %.loopexit, label %32

32:                                               ; preds = %29
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %16) #4
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %.not = icmp slt i32 %.031, %34
  br i1 %.not, label %35, label %.loopexit

35:                                               ; preds = %32
  %36 = tail call noundef i32 @_Z14vecprod_beforeRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %3)
  %37 = mul nsw i32 %36, %.031
  %38 = add nsw i32 %37, %4
  %39 = tail call noundef i32 @_Z12add_tripletsRSt6vectorIN5Eigen7TripletIdiEESaIS2_EERKS_IS_IiSaIiEESaIS7_EERKS7_iii(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %26, i32 noundef %38, i32 noundef %30)
  %40 = add nsw i32 %.031, %25
  %.not33 = icmp slt i32 %40, %22
  %or.cond = select i1 %27, i1 true, i1 %.not33
  %.not34 = icmp sgt i32 %40, %22
  %or.cond35 = select i1 %28, i1 true, i1 %.not34
  %41 = select i1 %or.cond, i1 %or.cond35, i1 false
  br i1 %41, label %29, label %.loopexit

.loopexit:                                        ; preds = %32, %29, %35, %12
  %.030 = phi i32 [ %14, %12 ], [ %30, %32 ], [ %30, %29 ], [ %39, %35 ]
  ret i32 %.030
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

declare noundef i32 @_Z14vecprod_beforeRKSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass