; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/gpiops_v3 (IntrHandler)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XGpioPs = type { %struct.XGpioPs_Config, i32, ptr, ptr, i32, i32, i8 }
%struct.XGpioPs_Config = type { i16, i32 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [168 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetEnabled(ptr noundef, i8 noundef zeroext) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetStatus(ptr noundef, i8 noundef zeroext) #2

; Function Attrs: nounwind uwtable
declare dso_local void @XGpioPs_IntrClear(ptr noundef, i8 noundef zeroext, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @XGpioPs_IntrHandler(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = icmp ne ptr %7, null
  br i1 %8, label %9, label %10

9:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %11

10:                                               ; preds = %1
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 690)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 1, ptr %6, align 4
  br label %58

11:                                               ; preds = %9
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.XGpioPs, ptr %12, i32 0, i32 1
  %14 = load i32, ptr %13, align 8, !tbaa !11
  %15 = icmp eq i32 %14, 286331153
  br i1 %15, label %16, label %17

16:                                               ; preds = %11
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %18

17:                                               ; preds = %11
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 691)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 1, ptr %6, align 4
  br label %58

18:                                               ; preds = %16
  store i8 0, ptr %3, align 1, !tbaa !15
  br label %19

19:                                               ; preds = %54, %18
  %20 = load i8, ptr %3, align 1, !tbaa !15
  %21 = zext i8 %20 to i32
  %22 = load ptr, ptr %2, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.XGpioPs, ptr %22, i32 0, i32 6
  %24 = load i8, ptr %23, align 8, !tbaa !16
  %25 = zext i8 %24 to i32
  %26 = icmp slt i32 %21, %25
  br i1 %26, label %27, label %57

27:                                               ; preds = %19
  %28 = load ptr, ptr %2, align 8, !tbaa !5
  %29 = load i8, ptr %3, align 1, !tbaa !15
  %30 = call i32 @XGpioPs_IntrGetStatus(ptr noundef %28, i8 noundef zeroext %29)
  store i32 %30, ptr %4, align 4, !tbaa !9
  %31 = load i32, ptr %4, align 4, !tbaa !9
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %33, label %53

33:                                               ; preds = %27
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = load i8, ptr %3, align 1, !tbaa !15
  %36 = call i32 @XGpioPs_IntrGetEnabled(ptr noundef %34, i8 noundef zeroext %35)
  store i32 %36, ptr %5, align 4, !tbaa !9
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = load i8, ptr %3, align 1, !tbaa !15
  %39 = load i32, ptr %4, align 4, !tbaa !9
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = and i32 %39, %40
  call void @XGpioPs_IntrClear(ptr noundef %37, i8 noundef zeroext %38, i32 noundef %41)
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.XGpioPs, ptr %42, i32 0, i32 2
  %44 = load ptr, ptr %43, align 8, !tbaa !17
  %45 = load ptr, ptr %2, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.XGpioPs, ptr %45, i32 0, i32 3
  %47 = load ptr, ptr %46, align 8, !tbaa !18
  %48 = load i8, ptr %3, align 1, !tbaa !15
  %49 = zext i8 %48 to i32
  %50 = load i32, ptr %4, align 4, !tbaa !9
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = and i32 %50, %51
  call void %44(ptr noundef %47, i32 noundef %49, i32 noundef %52)
  br label %53

53:                                               ; preds = %33, %27
  br label %54

54:                                               ; preds = %53
  %55 = load i8, ptr %3, align 1, !tbaa !15
  %56 = add i8 %55, 1
  store i8 %56, ptr %3, align 1, !tbaa !15
  br label %19, !llvm.loop !19

57:                                               ; preds = %19
  store i32 0, ptr %6, align 4
  br label %58

58:                                               ; preds = %57, %17, %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #3
  %59 = load i32, ptr %6, align 4
  switch i32 %59, label %61 [
    i32 0, label %60
    i32 1, label %60
  ]

60:                                               ; preds = %58, %58
  ret void

61:                                               ; preds = %58
  unreachable
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"", !13, i64 0, !10, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !10, i64 36, !7, i64 40}
!13 = !{!"", !14, i64 0, !10, i64 4}
!14 = !{!"short", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!12, !7, i64 40}
!17 = !{!12, !6, i64 16}
!18 = !{!12, !6, i64 24}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [168 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetEnabled(ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @XGpioPs_IntrGetStatus(ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @XGpioPs_IntrClear(ptr noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @XGpioPs_IntrHandler(ptr noundef %0) local_unnamed_addr #1 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %.loopexit.sink.split, label %2

2:                                                ; preds = %1
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  %4 = load i32, ptr %3, align 8, !tbaa !9
  %5 = icmp eq i32 %4, 286331153
  br i1 %5, label %6, label %.loopexit.sink.split

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = load i8, ptr %7, align 8, !tbaa !14
  %.not23 = icmp eq i8 %8, 0
  br i1 %.not23, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %6
  %9 = getelementptr inbounds i8, ptr %0, i64 16
  %10 = getelementptr inbounds i8, ptr %0, i64 24
  br label %11

11:                                               ; preds = %.lr.ph, %19
  %indvars.iv = phi i32 [ 0, %.lr.ph ], [ %indvars.iv.next, %19 ]
  %12 = trunc nuw i32 %indvars.iv to i8
  %13 = tail call i32 @XGpioPs_IntrGetStatus(ptr noundef nonnull %0, i8 noundef zeroext %12)
  %.not21 = icmp eq i32 %13, 0
  br i1 %.not21, label %19, label %14

14:                                               ; preds = %11
  %15 = tail call i32 @XGpioPs_IntrGetEnabled(ptr noundef nonnull %0, i8 noundef zeroext %12)
  %16 = and i32 %15, %13
  tail call void @XGpioPs_IntrClear(ptr noundef nonnull %0, i8 noundef zeroext %12, i32 noundef %16)
  %17 = load ptr, ptr %9, align 8, !tbaa !15
  %18 = load ptr, ptr %10, align 8, !tbaa !16
  tail call void %17(ptr noundef %18, i32 noundef %indvars.iv, i32 noundef %16) #2
  br label %19

19:                                               ; preds = %11, %14
  %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
  %20 = load i8, ptr %7, align 8, !tbaa !14
  %21 = zext i8 %20 to i32
  %22 = icmp ult i32 %indvars.iv.next, %21
  br i1 %22, label %11, label %.loopexit, !llvm.loop !17

.loopexit.sink.split:                             ; preds = %2, %1
  %.sink = phi i32 [ 690, %1 ], [ 691, %2 ]
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef %.sink) #2
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %.loopexit

.loopexit:                                        ; preds = %19, %.loopexit.sink.split, %6
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"", !11, i64 0, !6, i64 8, !13, i64 16, !13, i64 24, !6, i64 32, !6, i64 36, !7, i64 40}
!11 = !{!"", !12, i64 0, !6, i64 4}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !7, i64 40}
!15 = !{!10, !13, i64 16}
!16 = !{!10, !13, i64 24}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass