; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/uartps_v3 (SendBuffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XUartPs = type { %struct.XUartPs_Config, i32, i32, i32, %struct.XUartPsBuffer, %struct.XUartPsBuffer, ptr, ptr, i32, i8 }
%struct.XUartPs_Config = type { i16, i32, i32, i32 }
%struct.XUartPsBuffer = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_SendBuffer(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  br label %5

5:                                                ; preds = %24, %1
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.XUartPs, ptr %6, i32 0, i32 0
  %8 = getelementptr inbounds %struct.XUartPs_Config, ptr %7, i32 0, i32 1
  %9 = load i32, ptr %8, align 4, !tbaa !11
  %10 = add i32 %9, 44
  %11 = zext i32 %10 to i64
  %12 = call i32 @Xil_In32(i64 noundef %11)
  %13 = and i32 %12, 16
  %14 = icmp eq i32 %13, 16
  br i1 %14, label %22, label %15

15:                                               ; preds = %5
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.XUartPs, ptr %16, i32 0, i32 4
  %18 = getelementptr inbounds %struct.XUartPsBuffer, ptr %17, i32 0, i32 2
  %19 = load i32, ptr %18, align 4, !tbaa !16
  %20 = load i32, ptr %3, align 4, !tbaa !9
  %21 = icmp ugt i32 %19, %20
  br label %22

22:                                               ; preds = %15, %5
  %23 = phi i1 [ false, %5 ], [ %21, %15 ]
  br i1 %23, label %24, label %42

24:                                               ; preds = %22
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.XUartPs, ptr %25, i32 0, i32 0
  %27 = getelementptr inbounds %struct.XUartPs_Config, ptr %26, i32 0, i32 1
  %28 = load i32, ptr %27, align 4, !tbaa !11
  %29 = add i32 %28, 48
  %30 = zext i32 %29 to i64
  %31 = load ptr, ptr %2, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.XUartPs, ptr %31, i32 0, i32 4
  %33 = getelementptr inbounds %struct.XUartPsBuffer, ptr %32, i32 0, i32 0
  %34 = load ptr, ptr %33, align 8, !tbaa !17
  %35 = load i32, ptr %3, align 4, !tbaa !9
  %36 = zext i32 %35 to i64
  %37 = getelementptr inbounds i8, ptr %34, i64 %36
  %38 = load i8, ptr %37, align 1, !tbaa !18
  %39 = zext i8 %38 to i32
  call void @Xil_Out32(i64 noundef %30, i32 noundef %39)
  %40 = load i32, ptr %3, align 4, !tbaa !9
  %41 = add i32 %40, 1
  store i32 %41, ptr %3, align 4, !tbaa !9
  br label %5, !llvm.loop !19

42:                                               ; preds = %22
  %43 = load i32, ptr %3, align 4, !tbaa !9
  %44 = load ptr, ptr %2, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.XUartPs, ptr %44, i32 0, i32 4
  %46 = getelementptr inbounds %struct.XUartPsBuffer, ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !17
  %48 = zext i32 %43 to i64
  %49 = getelementptr inbounds i8, ptr %47, i64 %48
  store ptr %49, ptr %46, align 8, !tbaa !17
  %50 = load i32, ptr %3, align 4, !tbaa !9
  %51 = load ptr, ptr %2, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.XUartPs, ptr %51, i32 0, i32 4
  %53 = getelementptr inbounds %struct.XUartPsBuffer, ptr %52, i32 0, i32 2
  %54 = load i32, ptr %53, align 4, !tbaa !16
  %55 = sub i32 %54, %50
  store i32 %55, ptr %53, align 4, !tbaa !16
  %56 = load ptr, ptr %2, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.XUartPs, ptr %56, i32 0, i32 0
  %58 = getelementptr inbounds %struct.XUartPs_Config, ptr %57, i32 0, i32 1
  %59 = load i32, ptr %58, align 4, !tbaa !11
  %60 = add i32 %59, 16
  %61 = zext i32 %60 to i64
  %62 = call i32 @Xil_In32(i64 noundef %61)
  store i32 %62, ptr %4, align 4, !tbaa !9
  %63 = load i32, ptr %4, align 4, !tbaa !9
  %64 = and i32 %63, 4
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %74, label %66

66:                                               ; preds = %42
  %67 = load i32, ptr %4, align 4, !tbaa !9
  %68 = and i32 %67, 2
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %74, label %70

70:                                               ; preds = %66
  %71 = load i32, ptr %4, align 4, !tbaa !9
  %72 = and i32 %71, 1
  %73 = icmp ne i32 %72, 0
  br i1 %73, label %74, label %83

74:                                               ; preds = %70, %66, %42
  %75 = load ptr, ptr %2, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.XUartPs, ptr %75, i32 0, i32 0
  %77 = getelementptr inbounds %struct.XUartPs_Config, ptr %76, i32 0, i32 1
  %78 = load i32, ptr %77, align 4, !tbaa !11
  %79 = add i32 %78, 8
  %80 = zext i32 %79 to i64
  %81 = load i32, ptr %4, align 4, !tbaa !9
  %82 = or i32 %81, 8
  call void @Xil_Out32(i64 noundef %80, i32 noundef %82)
  br label %83

83:                                               ; preds = %74, %70
  %84 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %84
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 4}
!12 = !{!"", !13, i64 0, !10, i64 16, !10, i64 20, !10, i64 24, !15, i64 32, !15, i64 48, !6, i64 64, !6, i64 72, !10, i64 80, !7, i64 84}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}
!16 = !{!12, !10, i64 44}
!17 = !{!12, !6, i64 32}
!18 = !{!7, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @Xil_Out32(i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XUartPs_SendBuffer(ptr nocapture noundef %0) local_unnamed_addr #1 {
  %2 = getelementptr inbounds i8, ptr %0, i64 44
  %3 = getelementptr inbounds i8, ptr %0, i64 4
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = add i32 %4, 44
  %6 = zext i32 %5 to i64
  %7 = tail call i32 @Xil_In32(i64 noundef %6)
  %8 = and i32 %7, 16
  %.not21 = icmp eq i32 %8, 0
  br i1 %.not21, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %1
  %9 = getelementptr inbounds i8, ptr %0, i64 32
  br label %10

10:                                               ; preds = %.lr.ph, %14
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %14 ]
  %11 = load i32, ptr %2, align 4, !tbaa !14
  %12 = zext i32 %11 to i64
  %13 = icmp ult i64 %indvars.iv, %12
  br i1 %13, label %14, label %.critedge.loopexit

14:                                               ; preds = %10
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = add i32 %15, 48
  %17 = zext i32 %16 to i64
  %18 = load ptr, ptr %9, align 8, !tbaa !15
  %19 = getelementptr inbounds i8, ptr %18, i64 %indvars.iv
  %20 = load i8, ptr %19, align 1, !tbaa !16
  %21 = zext i8 %20 to i32
  tail call void @Xil_Out32(i64 noundef %17, i32 noundef %21)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = add i32 %22, 44
  %24 = zext i32 %23 to i64
  %25 = tail call i32 @Xil_In32(i64 noundef %24)
  %26 = and i32 %25, 16
  %.not = icmp eq i32 %26, 0
  br i1 %.not, label %10, label %.critedge.loopexit, !llvm.loop !17

.critedge.loopexit:                               ; preds = %14, %10
  %.0.lcssa.ph.in = phi i64 [ %indvars.iv, %10 ], [ %indvars.iv.next, %14 ]
  %.0.lcssa.ph = trunc i64 %.0.lcssa.ph.in to i32
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %1
  %.0.lcssa = phi i32 [ 0, %1 ], [ %.0.lcssa.ph, %.critedge.loopexit ]
  %27 = getelementptr inbounds i8, ptr %0, i64 32
  %28 = load ptr, ptr %27, align 8, !tbaa !15
  %29 = zext i32 %.0.lcssa to i64
  %30 = getelementptr inbounds i8, ptr %28, i64 %29
  store ptr %30, ptr %27, align 8, !tbaa !15
  %31 = load i32, ptr %2, align 4, !tbaa !14
  %32 = sub i32 %31, %.0.lcssa
  store i32 %32, ptr %2, align 4, !tbaa !14
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = add i32 %33, 16
  %35 = zext i32 %34 to i64
  %36 = tail call i32 @Xil_In32(i64 noundef %35)
  %37 = and i32 %36, 7
  %or.cond20 = icmp eq i32 %37, 0
  br i1 %or.cond20, label %43, label %38

38:                                               ; preds = %.critedge
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = add i32 %39, 8
  %41 = zext i32 %40 to i64
  %42 = or i32 %36, 8
  tail call void @Xil_Out32(i64 noundef %41, i32 noundef %42)
  br label %43

43:                                               ; preds = %.critedge, %38
  ret i32 %.0.lcssa
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 4}
!6 = !{!"", !7, i64 0, !11, i64 16, !11, i64 20, !11, i64 24, !12, i64 32, !12, i64 48, !13, i64 64, !13, i64 72, !11, i64 80, !9, i64 84}
!7 = !{!"", !8, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"", !13, i64 0, !11, i64 8, !11, i64 12}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!6, !11, i64 44}
!15 = !{!6, !13, i64 32}
!16 = !{!9, !9, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass