; LLVM IR from Mohammed-Shoaib/Coding-Problems :: HackerRank/Algorithms/Medium/M0023.ll (Z27hackerlandRadioTransmittersiRSt6vectorIiSaIiEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.__gnu_cxx::__normal_iterator" = type { ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z27hackerlandRadioTransmittersiRSt6vectorIiSaIiEE(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %10 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %11 = load ptr, ptr %4, align 8, !tbaa !9
  %12 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #4
  %13 = trunc i64 %12 to i32
  store i32 %13, ptr %5, align 4, !tbaa !5
  store i32 0, ptr %6, align 4, !tbaa !5
  store i32 0, ptr %8, align 4, !tbaa !5
  %14 = load ptr, ptr %4, align 8, !tbaa !9
  %15 = call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #4
  %16 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %9, i32 0, i32 0
  store ptr %15, ptr %16, align 8
  %17 = load ptr, ptr %4, align 8, !tbaa !9
  %18 = call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #4
  %19 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %10, i32 0, i32 0
  store ptr %18, ptr %19, align 8
  %20 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %9, i32 0, i32 0
  %21 = load ptr, ptr %20, align 8
  %22 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %10, i32 0, i32 0
  %23 = load ptr, ptr %22, align 8
  call void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr %21, ptr %23)
  br label %24

24:                                               ; preds = %79, %2
  %25 = load i32, ptr %6, align 4, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %28, label %82

28:                                               ; preds = %24
  %29 = load ptr, ptr %4, align 8, !tbaa !9
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #4
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = add nsw i32 %33, %34
  store i32 %35, ptr %7, align 4, !tbaa !5
  br label %36

36:                                               ; preds = %50, %28
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = icmp slt i32 %37, %38
  br i1 %39, label %40, label %48

40:                                               ; preds = %36
  %41 = load ptr, ptr %4, align 8, !tbaa !9
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #4
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = icmp sle i32 %45, %46
  br label %48

48:                                               ; preds = %40, %36
  %49 = phi i1 [ false, %36 ], [ %47, %40 ]
  br i1 %49, label %50, label %53

50:                                               ; preds = %48
  %51 = load i32, ptr %6, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %6, align 4, !tbaa !5
  br label %36, !llvm.loop !11

53:                                               ; preds = %48
  %54 = load ptr, ptr %4, align 8, !tbaa !9
  %55 = load i32, ptr %6, align 4, !tbaa !5
  %56 = add nsw i32 %55, -1
  store i32 %56, ptr %6, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %57) #4
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = load i32, ptr %3, align 4, !tbaa !5
  %61 = add nsw i32 %59, %60
  store i32 %61, ptr %7, align 4, !tbaa !5
  br label %62

62:                                               ; preds = %76, %53
  %63 = load i32, ptr %6, align 4, !tbaa !5
  %64 = load i32, ptr %5, align 4, !tbaa !5
  %65 = icmp slt i32 %63, %64
  br i1 %65, label %66, label %74

66:                                               ; preds = %62
  %67 = load ptr, ptr %4, align 8, !tbaa !9
  %68 = load i32, ptr %6, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #4
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %72 = load i32, ptr %7, align 4, !tbaa !5
  %73 = icmp sle i32 %71, %72
  br label %74

74:                                               ; preds = %66, %62
  %75 = phi i1 [ false, %62 ], [ %73, %66 ]
  br i1 %75, label %76, label %79

76:                                               ; preds = %74
  %77 = load i32, ptr %6, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %6, align 4, !tbaa !5
  br label %62, !llvm.loop !13

79:                                               ; preds = %74
  %80 = load i32, ptr %8, align 4, !tbaa !5
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %8, align 4, !tbaa !5
  br label %24, !llvm.loop !14

82:                                               ; preds = %24
  %83 = load i32, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret i32 %83
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr, ptr) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z27hackerlandRadioTransmittersiRSt6vectorIiSaIiEE(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  %4 = trunc i64 %3 to i32
  %5 = tail call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  %6 = tail call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #4
  tail call void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr %5, ptr %6)
  %7 = icmp sgt i32 %4, 0
  br i1 %7, label %.lr.ph36.preheader, label %._crit_edge

.lr.ph36.preheader:                               ; preds = %2
  %8 = and i64 %3, 2147483647
  br label %.lr.ph36

.lr.ph36:                                         ; preds = %.lr.ph36.preheader, %.critedge2
  %.035 = phi i32 [ %.2.lcssa, %.critedge2 ], [ 0, %.lr.ph36.preheader ]
  %.02734 = phi i32 [ %33, %.critedge2 ], [ 0, %.lr.ph36.preheader ]
  %9 = sext i32 %.035 to i64
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %9) #4
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = add nsw i32 %11, %0
  %13 = add nsw i32 %.035, 1
  %smax = tail call i32 @llvm.smax.i32(i32 %13, i32 %4)
  br label %14

14:                                               ; preds = %.lr.ph36, %17
  %indvars.iv = phi i64 [ %9, %.lr.ph36 ], [ %indvars.iv.next, %17 ]
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #4
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %.not = icmp sgt i32 %16, %12
  br i1 %.not, label %.critedge.split.loop.exit47, label %17

17:                                               ; preds = %14
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %18 = icmp slt i64 %indvars.iv.next, %8
  br i1 %18, label %14, label %.critedge, !llvm.loop !9

.critedge.split.loop.exit47:                      ; preds = %14
  %19 = trunc nsw i64 %indvars.iv to i32
  br label %.critedge

.critedge:                                        ; preds = %17, %.critedge.split.loop.exit47
  %.1.lcssa = phi i32 [ %19, %.critedge.split.loop.exit47 ], [ %smax, %17 ]
  %20 = add nsw i32 %.1.lcssa, -1
  %21 = sext i32 %20 to i64
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %21) #4
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = add nsw i32 %23, %0
  %.not38 = icmp sgt i32 %.1.lcssa, %4
  br i1 %.not38, label %.critedge2, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.critedge
  %25 = sext i32 %.1.lcssa to i64
  %26 = add nsw i64 %25, -1
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %29
  %indvars.iv40 = phi i64 [ %26, %.lr.ph.preheader ], [ %indvars.iv.next41, %29 ]
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv40) #4
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %.not29 = icmp sgt i32 %28, %24
  br i1 %.not29, label %.critedge2.loopexit, label %29

29:                                               ; preds = %.lr.ph
  %indvars.iv.next41 = add nsw i64 %indvars.iv40, 1
  %30 = icmp slt i64 %indvars.iv.next41, %8
  br i1 %30, label %.lr.ph, label %.critedge2.thread, !llvm.loop !11

.critedge2.thread:                                ; preds = %29
  %31 = add nuw nsw i32 %.02734, 1
  br label %._crit_edge

.critedge2.loopexit:                              ; preds = %.lr.ph
  %32 = trunc nsw i64 %indvars.iv40 to i32
  br label %.critedge2

.critedge2:                                       ; preds = %.critedge2.loopexit, %.critedge
  %.2.lcssa = phi i32 [ %20, %.critedge ], [ %32, %.critedge2.loopexit ]
  %33 = add nuw nsw i32 %.02734, 1
  %34 = icmp slt i32 %.2.lcssa, %4
  br i1 %34, label %.lr.ph36, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %.critedge2, %.critedge2.thread, %2
  %.027.lcssa = phi i32 [ 0, %2 ], [ %31, %.critedge2.thread ], [ %33, %.critedge2 ]
  ret i32 %.027.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_(ptr, ptr) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass