; LLVM IR from weicao/cascadb :: src/tree (node)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN7cascadb11BlockWriter11writeUInt32Ej(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7cascadb8LeafNode12write_bucketERNS_11BlockWriterEPSt6vectorINS_6RecordESaIS4_EE(ptr noundef nonnull align 8 dereferenceable(320) %0, ptr noundef nonnull align 8 dereferenceable(16) %1, ptr noundef %2) #1 align 2 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %10 = load ptr, ptr %5, align 8
  %11 = load ptr, ptr %6, align 8, !tbaa !5
  %12 = load ptr, ptr %7, align 8, !tbaa !5
  %13 = call noundef i64 @_ZNKSt6vectorIN7cascadb6RecordESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  %14 = trunc i64 %13 to i32
  %15 = call noundef zeroext i1 @_ZN7cascadb11BlockWriter11writeUInt32Ej(ptr noundef nonnull align 8 dereferenceable(16) %11, i32 noundef %14)
  br i1 %15, label %17, label %16

16:                                               ; preds = %3
  store i1 false, ptr %4, align 1
  br label %38

17:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %18

18:                                               ; preds = %32, %17
  %19 = load i64, ptr %8, align 8, !tbaa !9
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = call noundef i64 @_ZNKSt6vectorIN7cascadb6RecordESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #4
  %22 = icmp ult i64 %19, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %18
  store i32 2, ptr %9, align 4
  br label %35

24:                                               ; preds = %18
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = load i64, ptr %8, align 8, !tbaa !9
  %27 = call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN7cascadb6RecordESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %26) #4
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = call noundef zeroext i1 @_ZN7cascadb6Record8write_toERNS_11BlockWriterE(ptr noundef nonnull align 8 dereferenceable(32) %27, ptr noundef nonnull align 8 dereferenceable(16) %28)
  br i1 %29, label %31, label %30

30:                                               ; preds = %24
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %35

31:                                               ; preds = %24
  br label %32

32:                                               ; preds = %31
  %33 = load i64, ptr %8, align 8, !tbaa !9
  %34 = add i64 %33, 1
  store i64 %34, ptr %8, align 8, !tbaa !9
  br label %18, !llvm.loop !11

35:                                               ; preds = %30, %23
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  %36 = load i32, ptr %9, align 4
  switch i32 %36, label %40 [
    i32 2, label %37
    i32 1, label %38
  ]

37:                                               ; preds = %35
  store i1 true, ptr %4, align 1
  br label %38

38:                                               ; preds = %37, %35, %16
  %39 = load i1, ptr %4, align 1
  ret i1 %39

40:                                               ; preds = %35
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7cascadb6RecordESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN7cascadb6RecordESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

declare noundef zeroext i1 @_ZN7cascadb6Record8write_toERNS_11BlockWriterE(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(16)) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN7cascadb11BlockWriter11writeUInt32Ej(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_ZN7cascadb8LeafNode12write_bucketERNS_11BlockWriterEPSt6vectorINS_6RecordESaIS4_EE(ptr nocapture noundef nonnull readnone align 8 dereferenceable(320) %0, ptr noundef nonnull align 8 dereferenceable(16) %1, ptr noundef nonnull %2) local_unnamed_addr #0 align 2 {
  %4 = tail call noundef i64 @_ZNKSt6vectorIN7cascadb6RecordESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #3
  %5 = trunc i64 %4 to i32
  %6 = tail call noundef zeroext i1 @_ZN7cascadb11BlockWriter11writeUInt32Ej(ptr noundef nonnull align 8 dereferenceable(16) %1, i32 noundef %5)
  br i1 %6, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %3
  %7 = tail call noundef i64 @_ZNKSt6vectorIN7cascadb6RecordESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #3
  %8 = icmp eq i64 %7, 0
  br i1 %8, label %.loopexit, label %.lr.ph

9:                                                ; preds = %.lr.ph
  %10 = add nuw i64 %.01012, 1
  %11 = tail call noundef i64 @_ZNKSt6vectorIN7cascadb6RecordESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #3
  %.not = icmp ult i64 %10, %11
  br i1 %.not, label %.lr.ph, label %.loopexit, !llvm.loop !5

.lr.ph:                                           ; preds = %.preheader, %9
  %.01012 = phi i64 [ %10, %9 ], [ 0, %.preheader ]
  %12 = tail call noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN7cascadb6RecordESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %.01012) #3
  %13 = tail call noundef zeroext i1 @_ZN7cascadb6Record8write_toERNS_11BlockWriterE(ptr noundef nonnull align 8 dereferenceable(32) %12, ptr noundef nonnull align 8 dereferenceable(16) %1)
  br i1 %13, label %9, label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %9, %.preheader, %3
  %.1 = phi i1 [ false, %3 ], [ true, %.preheader ], [ %13, %9 ], [ %13, %.lr.ph ]
  ret i1 %.1
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7cascadb6RecordESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(32) ptr @_ZNSt6vectorIN7cascadb6RecordESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

declare noundef zeroext i1 @_ZN7cascadb6Record8write_toERNS_11BlockWriterE(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: ConstraintEliminationPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass