; LLVM IR from TLE-MEC/Hack-CP-DSA :: Codechef/Minimize the digit Sum/solution.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #0 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %10, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %12 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %11, ptr noundef nonnull align 8 dereferenceable(8) %3)
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store i64 9223372036854775807, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  store i64 0, ptr %5, align 8, !tbaa !5
  %13 = load i64, ptr %1, align 8, !tbaa !5
  %14 = load i64, ptr %2, align 8, !tbaa !5
  %15 = icmp sge i64 %13, %14
  br i1 %15, label %16, label %22

16:                                               ; preds = %0
  %17 = load i64, ptr %1, align 8, !tbaa !5
  %18 = load i64, ptr %3, align 8, !tbaa !5
  %19 = icmp sle i64 %17, %18
  br i1 %19, label %20, label %22

20:                                               ; preds = %16
  %21 = load i64, ptr %1, align 8, !tbaa !5
  store i64 %21, ptr %5, align 8, !tbaa !5
  br label %105

22:                                               ; preds = %16, %0
  %23 = load i64, ptr %1, align 8, !tbaa !5
  %24 = load i64, ptr %2, align 8, !tbaa !5
  %25 = icmp slt i64 %23, %24
  br i1 %25, label %26, label %28

26:                                               ; preds = %22
  %27 = load i64, ptr %2, align 8, !tbaa !5
  store i64 %27, ptr %5, align 8, !tbaa !5
  br label %104

28:                                               ; preds = %22
  br label %29

29:                                               ; preds = %58, %28
  %30 = load i64, ptr %2, align 8, !tbaa !5
  %31 = load i64, ptr %3, align 8, !tbaa !5
  %32 = icmp slt i64 %30, %31
  br i1 %32, label %33, label %39

33:                                               ; preds = %29
  %34 = load i64, ptr %1, align 8, !tbaa !5
  %35 = load i64, ptr %3, align 8, !tbaa !5
  %36 = sdiv i64 %34, %35
  %37 = load i64, ptr %3, align 8, !tbaa !5
  %38 = icmp slt i64 %36, %37
  br label %39

39:                                               ; preds = %33, %29
  %40 = phi i1 [ false, %29 ], [ %38, %33 ]
  br i1 %40, label %41, label %63

41:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %42 = load i64, ptr %1, align 8, !tbaa !5
  %43 = load i64, ptr %3, align 8, !tbaa !5
  %44 = sdiv i64 %42, %43
  store i64 %44, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %45 = load i64, ptr %1, align 8, !tbaa !5
  %46 = load i64, ptr %3, align 8, !tbaa !5
  %47 = srem i64 %45, %46
  store i64 %47, ptr %7, align 8, !tbaa !5
  %48 = load i64, ptr %4, align 8, !tbaa !5
  %49 = load i64, ptr %6, align 8, !tbaa !5
  %50 = load i64, ptr %7, align 8, !tbaa !5
  %51 = add nsw i64 %49, %50
  %52 = icmp sgt i64 %48, %51
  br i1 %52, label %53, label %58

53:                                               ; preds = %41
  %54 = load i64, ptr %6, align 8, !tbaa !5
  %55 = load i64, ptr %7, align 8, !tbaa !5
  %56 = add nsw i64 %54, %55
  store i64 %56, ptr %4, align 8, !tbaa !5
  %57 = load i64, ptr %3, align 8, !tbaa !5
  store i64 %57, ptr %5, align 8, !tbaa !5
  br label %58

58:                                               ; preds = %53, %41
  %59 = load i64, ptr %1, align 8, !tbaa !5
  %60 = load i64, ptr %6, align 8, !tbaa !5
  %61 = add nsw i64 %60, 1
  %62 = sdiv i64 %59, %61
  store i64 %62, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  br label %29, !llvm.loop !9

63:                                               ; preds = %39
  br label %64

64:                                               ; preds = %100, %63
  %65 = load i64, ptr %2, align 8, !tbaa !5
  %66 = load i64, ptr %3, align 8, !tbaa !5
  %67 = icmp sle i64 %65, %66
  br i1 %67, label %68, label %103

68:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %69 = load i64, ptr %1, align 8, !tbaa !5
  store i64 %69, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store i64 0, ptr %9, align 8, !tbaa !5
  br label %70

70:                                               ; preds = %99, %68
  br label %71

71:                                               ; preds = %70
  %72 = load i64, ptr %8, align 8, !tbaa !5
  %73 = load i64, ptr %2, align 8, !tbaa !5
  %74 = icmp slt i64 %72, %73
  br i1 %74, label %75, label %86

75:                                               ; preds = %71
  %76 = load i64, ptr %8, align 8, !tbaa !5
  %77 = load i64, ptr %9, align 8, !tbaa !5
  %78 = add nsw i64 %77, %76
  store i64 %78, ptr %9, align 8, !tbaa !5
  %79 = load i64, ptr %9, align 8, !tbaa !5
  %80 = load i64, ptr %4, align 8, !tbaa !5
  %81 = icmp slt i64 %79, %80
  br i1 %81, label %82, label %85

82:                                               ; preds = %75
  %83 = load i64, ptr %9, align 8, !tbaa !5
  store i64 %83, ptr %4, align 8, !tbaa !5
  %84 = load i64, ptr %2, align 8, !tbaa !5
  store i64 %84, ptr %5, align 8, !tbaa !5
  br label %85

85:                                               ; preds = %82, %75
  br label %100

86:                                               ; preds = %71
  %87 = load i64, ptr %8, align 8, !tbaa !5
  %88 = load i64, ptr %2, align 8, !tbaa !5
  %89 = srem i64 %87, %88
  %90 = load i64, ptr %9, align 8, !tbaa !5
  %91 = add nsw i64 %90, %89
  store i64 %91, ptr %9, align 8, !tbaa !5
  %92 = load i64, ptr %2, align 8, !tbaa !5
  %93 = load i64, ptr %8, align 8, !tbaa !5
  %94 = sdiv i64 %93, %92
  store i64 %94, ptr %8, align 8, !tbaa !5
  %95 = load i64, ptr %9, align 8, !tbaa !5
  %96 = load i64, ptr %4, align 8, !tbaa !5
  %97 = icmp sge i64 %95, %96
  br i1 %97, label %98, label %99

98:                                               ; preds = %86
  br label %100

99:                                               ; preds = %86
  br label %70, !llvm.loop !11

100:                                              ; preds = %98, %85
  %101 = load i64, ptr %2, align 8, !tbaa !5
  %102 = add nsw i64 %101, 1
  store i64 %102, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %64, !llvm.loop !12

103:                                              ; preds = %64
  br label %104

104:                                              ; preds = %103, %26
  br label %105

105:                                              ; preds = %104, %20
  %106 = load i64, ptr %5, align 8, !tbaa !5
  %107 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %106)
  %108 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %107, ptr noundef @.str)
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #0 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #4
  %4 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %5 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %4, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16) %5, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %7 = load i64, ptr %1, align 8, !tbaa !5
  %8 = load i64, ptr %2, align 8, !tbaa !5
  %.not = icmp slt i64 %7, %8
  %9 = load i64, ptr %3, align 8
  %.not33 = icmp sle i64 %7, %9
  %not..not = xor i1 %.not, true
  %or.cond = select i1 %not..not, i1 %.not33, i1 false
  %brmerge = select i1 %.not, i1 true, i1 %.not33
  %.mux = select i1 %or.cond, i64 %7, i64 %8
  br i1 %brmerge, label %.loopexit39, label %.preheader40

.preheader40:                                     ; preds = %0
  %10 = icmp slt i64 %8, %9
  br i1 %10, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %.preheader40, %15
  %.01944 = phi i64 [ %spec.select36, %15 ], [ 9223372036854775807, %.preheader40 ]
  %.02043 = phi i64 [ %spec.select, %15 ], [ 0, %.preheader40 ]
  %11 = phi i64 [ %19, %15 ], [ %9, %.preheader40 ]
  %12 = sdiv i64 %7, %11
  %13 = srem i64 %7, %11
  %14 = icmp slt i64 %12, %11
  br i1 %14, label %15, label %.critedge

15:                                               ; preds = %.lr.ph
  %16 = add nsw i64 %13, %12
  %17 = icmp sgt i64 %.01944, %16
  %spec.select = select i1 %17, i64 %11, i64 %.02043
  %spec.select36 = call i64 @llvm.smin.i64(i64 %.01944, i64 %16)
  %18 = add nsw i64 %12, 1
  %19 = sdiv i64 %7, %18
  store i64 %19, ptr %3, align 8, !tbaa !5
  %20 = icmp slt i64 %8, %19
  br i1 %20, label %.lr.ph, label %.critedge, !llvm.loop !9

.critedge:                                        ; preds = %.lr.ph, %15, %.preheader40
  %.020.lcssa = phi i64 [ 0, %.preheader40 ], [ %spec.select, %15 ], [ %.02043, %.lr.ph ]
  %.019.lcssa = phi i64 [ 9223372036854775807, %.preheader40 ], [ %spec.select36, %15 ], [ %.01944, %.lr.ph ]
  %.lcssa = phi i64 [ %9, %.preheader40 ], [ %19, %15 ], [ %11, %.lr.ph ]
  %.not3452 = icmp sgt i64 %8, %.lcssa
  br i1 %.not3452, label %.loopexit39, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.critedge
  %21 = add i64 %.lcssa, 1
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.loopexit
  %.254 = phi i64 [ %.3, %.loopexit ], [ %.019.lcssa, %.preheader.preheader ]
  %.22253 = phi i64 [ %.323, %.loopexit ], [ %.020.lcssa, %.preheader.preheader ]
  %22 = phi i64 [ %32, %.loopexit ], [ %8, %.preheader.preheader ]
  br label %23

23:                                               ; preds = %.preheader, %28
  %.018 = phi i64 [ %31, %28 ], [ %7, %.preheader ]
  %.0 = phi i64 [ %30, %28 ], [ 0, %.preheader ]
  %24 = icmp slt i64 %.018, %22
  br i1 %24, label %25, label %28

25:                                               ; preds = %23
  %26 = add nsw i64 %.0, %.018
  %27 = icmp slt i64 %26, %.254
  %spec.select37 = select i1 %27, i64 %22, i64 %.22253
  %spec.select38 = call i64 @llvm.smin.i64(i64 %26, i64 %.254)
  br label %.loopexit

28:                                               ; preds = %23
  %29 = srem i64 %.018, %22
  %30 = add nsw i64 %29, %.0
  %31 = sdiv i64 %.018, %22
  %.not35 = icmp slt i64 %30, %.254
  br i1 %.not35, label %23, label %.loopexit, !llvm.loop !11

.loopexit:                                        ; preds = %28, %25
  %.323 = phi i64 [ %spec.select37, %25 ], [ %.22253, %28 ]
  %.3 = phi i64 [ %spec.select38, %25 ], [ %.254, %28 ]
  %32 = add i64 %22, 1
  %exitcond.not = icmp eq i64 %22, %.lcssa
  br i1 %exitcond.not, label %..loopexit39_crit_edge, label %.preheader, !llvm.loop !12

..loopexit39_crit_edge:                           ; preds = %.loopexit
  store i64 %21, ptr %2, align 8, !tbaa !5
  br label %.loopexit39

.loopexit39:                                      ; preds = %.critedge, %..loopexit39_crit_edge, %0
  %.4 = phi i64 [ %.mux, %0 ], [ %.323, %..loopexit39_crit_edge ], [ %.020.lcssa, %.critedge ]
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i64 noundef %.4)
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %33, ptr noundef nonnull @.str)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #4
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERx(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEx(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass