; LLVM IR from sp-nitech/SPTK :: src/math/frequency_transform.ll (ZN4sptk18FrequencyTransformC2Eiid)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sptk::FrequencyTransform" = type <{ ptr, i32, i32, double, i8, [7 x i8] }>

@_ZTVN4sptk18FrequencyTransformE = external dso_local unnamed_addr constant { [4 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sptk18FrequencyTransformC2Eiid(ptr noundef nonnull align 8 dereferenceable(25) %0, i32 noundef %1, i32 noundef %2, double noundef %3) unnamed_addr #0 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca double, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store double %3, ptr %8, align 8, !tbaa !11
  %9 = load ptr, ptr %5, align 8
  store ptr getelementptr inbounds inrange(-16, 16) ({ [4 x ptr] }, ptr @_ZTVN4sptk18FrequencyTransformE, i32 0, i32 0, i32 2), ptr %9, align 8, !tbaa !13
  %10 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 1
  %11 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %11, ptr %10, align 8, !tbaa !15
  %12 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 2
  %13 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %13, ptr %12, align 4, !tbaa !18
  %14 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 3
  %15 = load double, ptr %8, align 8, !tbaa !11
  store double %15, ptr %14, align 8, !tbaa !19
  %16 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 4
  store i8 1, ptr %16, align 8, !tbaa !20
  %17 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 1
  %18 = load i32, ptr %17, align 8, !tbaa !15
  %19 = icmp slt i32 %18, 0
  br i1 %19, label %28, label %20

20:                                               ; preds = %4
  %21 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 2
  %22 = load i32, ptr %21, align 4, !tbaa !18
  %23 = icmp slt i32 %22, 0
  br i1 %23, label %28, label %24

24:                                               ; preds = %20
  %25 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 3
  %26 = load double, ptr %25, align 8, !tbaa !19
  %27 = call noundef zeroext i1 @_ZN4sptk12IsValidAlphaEd(double noundef %26)
  br i1 %27, label %30, label %28

28:                                               ; preds = %24, %20, %4
  %29 = getelementptr inbounds %"class.sptk::FrequencyTransform", ptr %9, i32 0, i32 4
  store i8 0, ptr %29, align 8, !tbaa !20
  br label %30

30:                                               ; preds = %28, %24
  ret void
}

declare noundef zeroext i1 @_ZN4sptk12IsValidAlphaEd(double noundef) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"vtable pointer", !8, i64 0}
!15 = !{!16, !10, i64 8}
!16 = !{!"_ZTSN4sptk18FrequencyTransformE", !10, i64 8, !10, i64 12, !12, i64 16, !17, i64 24}
!17 = !{!"bool", !7, i64 0}
!18 = !{!16, !10, i64 12}
!19 = !{!16, !12, i64 16}
!20 = !{!16, !17, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN4sptk18FrequencyTransformE = external dso_local unnamed_addr constant { [4 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sptk18FrequencyTransformC2Eiid(ptr nocapture noundef nonnull writeonly align 8 dereferenceable(25) %0, i32 noundef %1, i32 noundef %2, double noundef %3) unnamed_addr #0 align 2 {
  store ptr getelementptr inbounds inrange(-16, 16) (i8, ptr @_ZTVN4sptk18FrequencyTransformE, i64 16), ptr %0, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %1, ptr %5, align 8, !tbaa !8
  %6 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 %2, ptr %6, align 4, !tbaa !14
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  store double %3, ptr %7, align 8, !tbaa !15
  %8 = getelementptr inbounds i8, ptr %0, i64 24
  store i8 1, ptr %8, align 8, !tbaa !16
  %9 = or i32 %2, %1
  %or.cond.not = icmp sgt i32 %9, -1
  br i1 %or.cond.not, label %10, label %12

10:                                               ; preds = %4
  %11 = tail call noundef zeroext i1 @_ZN4sptk12IsValidAlphaEd(double noundef %3)
  br i1 %11, label %13, label %12

12:                                               ; preds = %10, %4
  store i8 0, ptr %8, align 8, !tbaa !16
  br label %13

13:                                               ; preds = %12, %10
  ret void
}

declare noundef zeroext i1 @_ZN4sptk12IsValidAlphaEd(double noundef) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !10, i64 8}
!9 = !{!"_ZTSN4sptk18FrequencyTransformE", !10, i64 8, !10, i64 12, !12, i64 16, !13, i64 24}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !7, i64 0}
!12 = !{!"double", !11, i64 0}
!13 = !{!"bool", !11, i64 0}
!14 = !{!9, !10, i64 12}
!15 = !{!9, !12, i64 16}
!16 = !{!9, !13, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass