; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc (SelfTest)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XDmaPs = type { %struct.XDmaPs_Config, i32, i32, ptr, ptr, [8 x %struct.XDmaPs_ChannelData] }
%struct.XDmaPs_Config = type { i16, i32 }
%struct.XDmaPs_ChannelData = type { i32, i32, [2 x %struct.XDmaPs_ProgBuf], ptr, ptr, ptr, ptr, i32 }
%struct.XDmaPs_ProgBuf = type { [128 x i8], i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @XDmaPs_SelfTest(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.XDmaPs, ptr %7, i32 0, i32 0
  %9 = getelementptr inbounds %struct.XDmaPs_Config, ptr %8, i32 0, i32 1
  %10 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %10, ptr %4, align 4, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %11 = load i32, ptr %4, align 4, !tbaa !14
  %12 = add i32 %11, 3328
  %13 = zext i32 %12 to i64
  %14 = call i32 @Xil_In32(i64 noundef %13)
  %15 = and i32 %14, 1
  %16 = icmp ne i32 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %1
  store i32 1, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %37

18:                                               ; preds = %1
  store i32 0, ptr %5, align 4, !tbaa !14
  br label %19

19:                                               ; preds = %33, %18
  %20 = load i32, ptr %5, align 4, !tbaa !14
  %21 = icmp slt i32 %20, 8
  br i1 %21, label %22, label %36

22:                                               ; preds = %19
  %23 = load i32, ptr %4, align 4, !tbaa !14
  %24 = load i32, ptr %5, align 4, !tbaa !14
  %25 = mul nsw i32 %24, 8
  %26 = add nsw i32 256, %25
  %27 = add i32 %23, %26
  %28 = zext i32 %27 to i64
  %29 = call i32 @Xil_In32(i64 noundef %28)
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %32

31:                                               ; preds = %22
  store i32 1, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %37

32:                                               ; preds = %22
  br label %33

33:                                               ; preds = %32
  %34 = load i32, ptr %5, align 4, !tbaa !14
  %35 = add nsw i32 %34, 1
  store i32 %35, ptr %5, align 4, !tbaa !14
  br label %19, !llvm.loop !15

36:                                               ; preds = %19
  store i32 0, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %37

37:                                               ; preds = %36, %31, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %38 = load i32, ptr %2, align 4
  ret i32 %38
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 4}
!10 = !{!"", !11, i64 0, !13, i64 8, !13, i64 12, !6, i64 16, !6, i64 24, !7, i64 32}
!11 = !{!"", !12, i64 0, !13, i64 4}
!12 = !{!"short", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XDmaPs_SelfTest(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 4
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = add i32 %3, 3328
  %5 = zext i32 %4 to i64
  %6 = tail call i32 @Xil_In32(i64 noundef %5)
  %7 = and i32 %6, 1
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %1
  %8 = add i32 %3, 256
  %9 = zext i32 %8 to i64
  %10 = tail call i32 @Xil_In32(i64 noundef %9)
  %.not7 = icmp eq i32 %10, 0
  br i1 %.not7, label %11, label %.loopexit

11:                                               ; preds = %.preheader
  %12 = add i32 %3, 264
  %13 = zext i32 %12 to i64
  %14 = tail call i32 @Xil_In32(i64 noundef %13)
  %.not7.1 = icmp eq i32 %14, 0
  br i1 %.not7.1, label %15, label %.loopexit

15:                                               ; preds = %11
  %16 = add i32 %3, 272
  %17 = zext i32 %16 to i64
  %18 = tail call i32 @Xil_In32(i64 noundef %17)
  %.not7.2 = icmp eq i32 %18, 0
  br i1 %.not7.2, label %19, label %.loopexit

19:                                               ; preds = %15
  %20 = add i32 %3, 280
  %21 = zext i32 %20 to i64
  %22 = tail call i32 @Xil_In32(i64 noundef %21)
  %.not7.3 = icmp eq i32 %22, 0
  br i1 %.not7.3, label %23, label %.loopexit

23:                                               ; preds = %19
  %24 = add i32 %3, 288
  %25 = zext i32 %24 to i64
  %26 = tail call i32 @Xil_In32(i64 noundef %25)
  %.not7.4 = icmp eq i32 %26, 0
  br i1 %.not7.4, label %27, label %.loopexit

27:                                               ; preds = %23
  %28 = add i32 %3, 296
  %29 = zext i32 %28 to i64
  %30 = tail call i32 @Xil_In32(i64 noundef %29)
  %.not7.5 = icmp eq i32 %30, 0
  br i1 %.not7.5, label %31, label %.loopexit

31:                                               ; preds = %27
  %32 = add i32 %3, 304
  %33 = zext i32 %32 to i64
  %34 = tail call i32 @Xil_In32(i64 noundef %33)
  %.not7.6 = icmp eq i32 %34, 0
  br i1 %.not7.6, label %35, label %.loopexit

35:                                               ; preds = %31
  %36 = add i32 %3, 312
  %37 = zext i32 %36 to i64
  %38 = tail call i32 @Xil_In32(i64 noundef %37)
  %.not7.7 = icmp ne i32 %38, 0
  %spec.select = zext i1 %.not7.7 to i32
  br label %.loopexit

.loopexit:                                        ; preds = %35, %.preheader, %11, %15, %19, %23, %27, %31, %1
  %.06 = phi i32 [ 1, %1 ], [ 1, %.preheader ], [ 1, %11 ], [ 1, %15 ], [ 1, %19 ], [ 1, %23 ], [ 1, %27 ], [ 1, %31 ], [ %spec.select, %35 ]
  ret i32 %.06
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 4}
!6 = !{!"", !7, i64 0, !11, i64 8, !11, i64 12, !12, i64 16, !12, i64 24, !9, i64 32}
!7 = !{!"", !8, i64 0, !11, i64 4}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass