; LLVM IR from vul337/PrIntFuzz :: config/linux/firmware/isci (create_fw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isci_orom = type { %struct.sci_bios_oem_param_block_hdr, [2 x %struct.sci_oem_params] }
%struct.sci_bios_oem_param_block_hdr = type { [8 x i8], i16, i8, i8, i8, i8, i16, [8 x i8] }
%struct.sci_oem_params = type { %struct.anon, [4 x %struct.anon.1], [4 x %struct.sci_phy_oem_params] }
%struct.anon = type { i8, i8, %union.anon, i8 }
%union.anon = type { %struct.anon.0 }
%struct.anon.0 = type { i8 }
%struct.anon.1 = type { i8 }
%struct.sci_phy_oem_params = type { %struct.anon.2, i32, i32, i32, i32 }
%struct.anon.2 = type { i32, i32 }

@sig = external hidden constant [9 x i8], align 1
@enable_ssc = external hidden constant i8, align 1
@phy_mask = external hidden constant [2 x [4 x i8]], align 1
@cable_selection = external hidden constant [2 x [4 x i32]], align 16
@sas_addr = external hidden constant [2 x [4 x i64]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @set_binary_values(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.isci_orom, ptr %10, i32 0, i32 0
  %12 = getelementptr inbounds %struct.sci_bios_oem_param_block_hdr, ptr %11, i32 0, i32 0
  %13 = getelementptr inbounds [8 x i8], ptr %12, i64 0, i64 0
  %14 = call ptr @strncpy(ptr noundef %13, ptr noundef @sig, i64 noundef 8) #3
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.isci_orom, ptr %15, i32 0, i32 0
  %17 = getelementptr inbounds %struct.sci_bios_oem_param_block_hdr, ptr %16, i32 0, i32 3
  store i8 19, ptr %17, align 1, !tbaa !9
  %18 = load ptr, ptr %2, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.isci_orom, ptr %18, i32 0, i32 0
  %20 = getelementptr inbounds %struct.sci_bios_oem_param_block_hdr, ptr %19, i32 0, i32 1
  store i16 232, ptr %20, align 1, !tbaa !13
  %21 = load ptr, ptr %2, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.isci_orom, ptr %21, i32 0, i32 0
  %23 = getelementptr inbounds %struct.sci_bios_oem_param_block_hdr, ptr %22, i32 0, i32 2
  store i8 24, ptr %23, align 1, !tbaa !14
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.isci_orom, ptr %24, i32 0, i32 0
  %26 = getelementptr inbounds %struct.sci_bios_oem_param_block_hdr, ptr %25, i32 0, i32 5
  store i8 2, ptr %26, align 1, !tbaa !15
  store i32 0, ptr %3, align 4, !tbaa !16
  br label %27

27:                                               ; preds = %142, %1
  %28 = load i32, ptr %3, align 4, !tbaa !16
  %29 = icmp slt i32 %28, 2
  br i1 %29, label %30, label %145

30:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %31 = load ptr, ptr %2, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.isci_orom, ptr %31, i32 0, i32 1
  %33 = load i32, ptr %3, align 4, !tbaa !16
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [2 x %struct.sci_oem_params], ptr %32, i64 0, i64 %34
  store ptr %35, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  store i8 0, ptr %7, align 1, !tbaa !18
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.sci_oem_params, ptr %36, i32 0, i32 0
  %38 = getelementptr inbounds %struct.anon, ptr %37, i32 0, i32 0
  store i8 1, ptr %38, align 1, !tbaa !19
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.sci_oem_params, ptr %39, i32 0, i32 0
  %41 = getelementptr inbounds %struct.anon, ptr %40, i32 0, i32 1
  store i8 1, ptr %41, align 1, !tbaa !22
  %42 = load i8, ptr @enable_ssc, align 1, !tbaa !18
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.sci_oem_params, ptr %43, i32 0, i32 0
  %45 = getelementptr inbounds %struct.anon, ptr %44, i32 0, i32 2
  store i8 %42, ptr %45, align 1, !tbaa !18
  store i32 0, ptr %5, align 4, !tbaa !16
  br label %46

46:                                               ; preds = %63, %30
  %47 = load i32, ptr %5, align 4, !tbaa !16
  %48 = icmp slt i32 %47, 4
  br i1 %48, label %49, label %66

49:                                               ; preds = %46
  %50 = load i32, ptr %3, align 4, !tbaa !16
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [2 x [4 x i8]], ptr @phy_mask, i64 0, i64 %51
  %53 = load i32, ptr %5, align 4, !tbaa !16
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds [4 x i8], ptr %52, i64 0, i64 %54
  %56 = load i8, ptr %55, align 1, !tbaa !18
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.sci_oem_params, ptr %57, i32 0, i32 1
  %59 = load i32, ptr %5, align 4, !tbaa !16
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds [4 x %struct.anon.1], ptr %58, i64 0, i64 %60
  %62 = getelementptr inbounds %struct.anon.1, ptr %61, i32 0, i32 0
  store i8 %56, ptr %62, align 1, !tbaa !23
  br label %63

63:                                               ; preds = %49
  %64 = load i32, ptr %5, align 4, !tbaa !16
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %5, align 4, !tbaa !16
  br label %46, !llvm.loop !25

66:                                               ; preds = %46
  store i32 0, ptr %4, align 4, !tbaa !16
  br label %67

67:                                               ; preds = %134, %66
  %68 = load i32, ptr %4, align 4, !tbaa !16
  %69 = icmp slt i32 %68, 4
  br i1 %69, label %70, label %137

70:                                               ; preds = %67
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %71 = load ptr, ptr %6, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.sci_oem_params, ptr %71, i32 0, i32 2
  %73 = load i32, ptr %4, align 4, !tbaa !16
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [4 x %struct.sci_phy_oem_params], ptr %72, i64 0, i64 %74
  store ptr %75, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  %76 = load i32, ptr %3, align 4, !tbaa !16
  %77 = sext i32 %76 to i64
  %78 = getelementptr inbounds [2 x [4 x i32]], ptr @cable_selection, i64 0, i64 %77
  %79 = load i32, ptr %4, align 4, !tbaa !16
  %80 = sext i32 %79 to i64
  %81 = getelementptr inbounds [4 x i32], ptr %78, i64 0, i64 %80
  %82 = load i32, ptr %81, align 4, !tbaa !16
  %83 = trunc i32 %82 to i8
  store i8 %83, ptr %9, align 1, !tbaa !18
  %84 = load i32, ptr %3, align 4, !tbaa !16
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [2 x [4 x i64]], ptr @sas_addr, i64 0, i64 %85
  %87 = load i32, ptr %4, align 4, !tbaa !16
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds [4 x i64], ptr %86, i64 0, i64 %88
  %90 = load i64, ptr %89, align 8, !tbaa !27
  %91 = lshr i64 %90, 32
  %92 = trunc i64 %91 to i32
  %93 = load ptr, ptr %8, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.sci_phy_oem_params, ptr %93, i32 0, i32 0
  %95 = getelementptr inbounds %struct.anon.2, ptr %94, i32 0, i32 0
  store i32 %92, ptr %95, align 4, !tbaa !29
  %96 = load i32, ptr %3, align 4, !tbaa !16
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds [2 x [4 x i64]], ptr @sas_addr, i64 0, i64 %97
  %99 = load i32, ptr %4, align 4, !tbaa !16
  %100 = sext i32 %99 to i64
  %101 = getelementptr inbounds [4 x i64], ptr %98, i64 0, i64 %100
  %102 = load i64, ptr %101, align 8, !tbaa !27
  %103 = trunc i64 %102 to i32
  %104 = load ptr, ptr %8, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.sci_phy_oem_params, ptr %104, i32 0, i32 0
  %106 = getelementptr inbounds %struct.anon.2, ptr %105, i32 0, i32 1
  store i32 %103, ptr %106, align 4, !tbaa !32
  %107 = load ptr, ptr %8, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.sci_phy_oem_params, ptr %107, i32 0, i32 1
  store i32 777480, ptr %108, align 4, !tbaa !33
  %109 = load ptr, ptr %8, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.sci_phy_oem_params, ptr %109, i32 0, i32 2
  store i32 1047552, ptr %110, align 4, !tbaa !34
  %111 = load ptr, ptr %8, align 8, !tbaa !5
  %112 = getelementptr inbounds %struct.sci_phy_oem_params, ptr %111, i32 0, i32 3
  store i32 752649, ptr %112, align 4, !tbaa !35
  %113 = load ptr, ptr %8, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.sci_phy_oem_params, ptr %113, i32 0, i32 4
  store i32 719982, ptr %114, align 4, !tbaa !36
  %115 = load i8, ptr %9, align 1, !tbaa !18
  %116 = zext i8 %115 to i32
  %117 = and i32 %116, 1
  %118 = load i32, ptr %4, align 4, !tbaa !16
  %119 = shl i32 %117, %118
  %120 = load i8, ptr %7, align 1, !tbaa !18
  %121 = zext i8 %120 to i32
  %122 = or i32 %121, %119
  %123 = trunc i32 %122 to i8
  store i8 %123, ptr %7, align 1, !tbaa !18
  %124 = load i8, ptr %9, align 1, !tbaa !18
  %125 = zext i8 %124 to i32
  %126 = and i32 %125, 2
  %127 = load i32, ptr %4, align 4, !tbaa !16
  %128 = add nsw i32 %127, 3
  %129 = shl i32 %126, %128
  %130 = load i8, ptr %7, align 1, !tbaa !18
  %131 = zext i8 %130 to i32
  %132 = or i32 %131, %129
  %133 = trunc i32 %132 to i8
  store i8 %133, ptr %7, align 1, !tbaa !18
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %134

134:                                              ; preds = %70
  %135 = load i32, ptr %4, align 4, !tbaa !16
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %4, align 4, !tbaa !16
  br label %67, !llvm.loop !37

137:                                              ; preds = %67
  %138 = load i8, ptr %7, align 1, !tbaa !18
  %139 = load ptr, ptr %6, align 8, !tbaa !5
  %140 = getelementptr inbounds %struct.sci_oem_params, ptr %139, i32 0, i32 0
  %141 = getelementptr inbounds %struct.anon, ptr %140, i32 0, i32 3
  store i8 %138, ptr %141, align 1, !tbaa !38
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  br label %142

142:                                              ; preds = %137
  %143 = load i32, ptr %3, align 4, !tbaa !16
  %144 = add nsw i32 %143, 1
  store i32 %144, ptr %3, align 4, !tbaa !16
  br label %27, !llvm.loop !39

145:                                              ; preds = %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nounwind
declare ptr @strncpy(ptr noundef, ptr noundef, i64 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 11}
!10 = !{!"isci_orom", !11, i64 0, !7, i64 24}
!11 = !{!"sci_bios_oem_param_block_hdr", !7, i64 0, !12, i64 8, !7, i64 10, !7, i64 11, !7, i64 12, !7, i64 13, !12, i64 14, !7, i64 16}
!12 = !{!"short", !7, i64 0}
!13 = !{!10, !12, i64 8}
!14 = !{!10, !7, i64 10}
!15 = !{!10, !7, i64 13}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !7, i64 0}
!20 = !{!"sci_oem_params", !21, i64 0, !7, i64 4, !7, i64 8}
!21 = !{!"", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!22 = !{!20, !7, i64 1}
!23 = !{!24, !7, i64 0}
!24 = !{!"", !7, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
!27 = !{!28, !28, i64 0}
!28 = !{!"long long", !7, i64 0}
!29 = !{!30, !17, i64 0}
!30 = !{!"sci_phy_oem_params", !31, i64 0, !17, i64 8, !17, i64 12, !17, i64 16, !17, i64 20}
!31 = !{!"", !17, i64 0, !17, i64 4}
!32 = !{!30, !17, i64 4}
!33 = !{!30, !17, i64 8}
!34 = !{!30, !17, i64 12}
!35 = !{!30, !17, i64 16}
!36 = !{!30, !17, i64 20}
!37 = distinct !{!37, !26}
!38 = !{!20, !7, i64 3}
!39 = distinct !{!39, !26}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sig = external hidden constant [9 x i8], align 1
@enable_ssc = external hidden local_unnamed_addr constant i8, align 1
@phy_mask = external hidden local_unnamed_addr constant [2 x [4 x i8]], align 1
@cable_selection = external hidden local_unnamed_addr constant [2 x [4 x i32]], align 16
@sas_addr = external hidden local_unnamed_addr constant [2 x [4 x i64]], align 16

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @set_binary_values(ptr noundef %0) local_unnamed_addr #0 {
.preheader:
  %1 = tail call ptr @strncpy(ptr noundef nonnull dereferenceable(1) %0, ptr noundef nonnull dereferenceable(1) @sig, i64 noundef 8) #2
  %2 = getelementptr inbounds i8, ptr %0, i64 11
  store i8 19, ptr %2, align 1, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 8
  store i16 232, ptr %3, align 1, !tbaa !11
  %4 = getelementptr inbounds i8, ptr %0, i64 10
  store i8 24, ptr %4, align 1, !tbaa !12
  %5 = getelementptr inbounds i8, ptr %0, i64 13
  store i8 2, ptr %5, align 1, !tbaa !13
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  %7 = load i8, ptr @enable_ssc, align 1, !tbaa !14
  store i8 1, ptr %6, align 1, !tbaa !15
  %8 = getelementptr inbounds i8, ptr %0, i64 25
  store i8 1, ptr %8, align 1, !tbaa !18
  %9 = getelementptr inbounds i8, ptr %0, i64 26
  store i8 %7, ptr %9, align 1, !tbaa !14
  %10 = getelementptr inbounds i8, ptr %0, i64 28
  %11 = load <4 x i8>, ptr @phy_mask, align 1, !tbaa !14
  store <4 x i8> %11, ptr %10, align 1, !tbaa !19
  %12 = getelementptr inbounds i8, ptr %0, i64 32
  %13 = load i32, ptr @cable_selection, align 16, !tbaa !21
  %14 = load i64, ptr @sas_addr, align 16, !tbaa !23
  %15 = lshr i64 %14, 32
  %16 = trunc nuw i64 %15 to i32
  store i32 %16, ptr %12, align 4, !tbaa !25
  %17 = trunc i64 %14 to i32
  %18 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 %17, ptr %18, align 4, !tbaa !28
  %19 = getelementptr inbounds i8, ptr %0, i64 40
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %19, align 4, !tbaa !21
  %20 = and i32 %13, 1
  %21 = shl i32 %13, 3
  %22 = and i32 %21, 16
  %23 = or disjoint i32 %20, %22
  %24 = getelementptr inbounds i8, ptr %0, i64 56
  %25 = load i32, ptr getelementptr inbounds (i8, ptr @cable_selection, i64 4), align 4, !tbaa !21
  %26 = load i64, ptr getelementptr inbounds (i8, ptr @sas_addr, i64 8), align 8, !tbaa !23
  %27 = lshr i64 %26, 32
  %28 = trunc nuw i64 %27 to i32
  store i32 %28, ptr %24, align 4, !tbaa !25
  %29 = trunc i64 %26 to i32
  %30 = getelementptr inbounds i8, ptr %0, i64 60
  store i32 %29, ptr %30, align 4, !tbaa !28
  %31 = getelementptr inbounds i8, ptr %0, i64 64
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %31, align 4, !tbaa !21
  %32 = shl i32 %25, 1
  %33 = and i32 %32, 2
  %34 = shl i32 %25, 4
  %35 = and i32 %34, 32
  %36 = or disjoint i32 %33, %35
  %37 = or disjoint i32 %23, %36
  %38 = getelementptr inbounds i8, ptr %0, i64 80
  %39 = load i32, ptr getelementptr inbounds (i8, ptr @cable_selection, i64 8), align 8, !tbaa !21
  %40 = load i64, ptr getelementptr inbounds (i8, ptr @sas_addr, i64 16), align 16, !tbaa !23
  %41 = lshr i64 %40, 32
  %42 = trunc nuw i64 %41 to i32
  store i32 %42, ptr %38, align 4, !tbaa !25
  %43 = trunc i64 %40 to i32
  %44 = getelementptr inbounds i8, ptr %0, i64 84
  store i32 %43, ptr %44, align 4, !tbaa !28
  %45 = getelementptr inbounds i8, ptr %0, i64 88
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %45, align 4, !tbaa !21
  %46 = shl i32 %39, 2
  %47 = and i32 %46, 4
  %48 = shl i32 %39, 5
  %49 = and i32 %48, 64
  %50 = or disjoint i32 %47, %49
  %51 = or disjoint i32 %37, %50
  %52 = getelementptr inbounds i8, ptr %0, i64 104
  %53 = load i32, ptr getelementptr inbounds (i8, ptr @cable_selection, i64 12), align 4, !tbaa !21
  %54 = load i64, ptr getelementptr inbounds (i8, ptr @sas_addr, i64 24), align 8, !tbaa !23
  %55 = lshr i64 %54, 32
  %56 = trunc nuw i64 %55 to i32
  store i32 %56, ptr %52, align 4, !tbaa !25
  %57 = trunc i64 %54 to i32
  %58 = getelementptr inbounds i8, ptr %0, i64 108
  store i32 %57, ptr %58, align 4, !tbaa !28
  %59 = getelementptr inbounds i8, ptr %0, i64 112
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %59, align 4, !tbaa !21
  %60 = shl i32 %53, 3
  %61 = and i32 %60, 8
  %62 = shl i32 %53, 6
  %63 = and i32 %62, 128
  %64 = or disjoint i32 %61, %63
  %65 = or disjoint i32 %51, %64
  %66 = trunc nuw i32 %65 to i8
  %67 = getelementptr inbounds i8, ptr %0, i64 27
  store i8 %66, ptr %67, align 1, !tbaa !29
  %68 = getelementptr inbounds i8, ptr %0, i64 128
  store i8 1, ptr %68, align 1, !tbaa !15
  %69 = getelementptr inbounds i8, ptr %0, i64 129
  store i8 1, ptr %69, align 1, !tbaa !18
  %70 = getelementptr inbounds i8, ptr %0, i64 130
  store i8 %7, ptr %70, align 1, !tbaa !14
  %71 = getelementptr inbounds i8, ptr %0, i64 132
  %72 = load <4 x i8>, ptr getelementptr inbounds (i8, ptr @phy_mask, i64 4), align 1, !tbaa !14
  store <4 x i8> %72, ptr %71, align 1, !tbaa !19
  %73 = getelementptr inbounds i8, ptr %0, i64 136
  %74 = load i32, ptr getelementptr inbounds (i8, ptr @cable_selection, i64 16), align 16, !tbaa !21
  %75 = load i64, ptr getelementptr inbounds (i8, ptr @sas_addr, i64 32), align 16, !tbaa !23
  %76 = lshr i64 %75, 32
  %77 = trunc nuw i64 %76 to i32
  store i32 %77, ptr %73, align 4, !tbaa !25
  %78 = trunc i64 %75 to i32
  %79 = getelementptr inbounds i8, ptr %0, i64 140
  store i32 %78, ptr %79, align 4, !tbaa !28
  %80 = getelementptr inbounds i8, ptr %0, i64 144
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %80, align 4, !tbaa !21
  %81 = and i32 %74, 1
  %82 = shl i32 %74, 3
  %83 = and i32 %82, 16
  %84 = or disjoint i32 %81, %83
  %85 = getelementptr inbounds i8, ptr %0, i64 160
  %86 = load i32, ptr getelementptr inbounds (i8, ptr @cable_selection, i64 20), align 4, !tbaa !21
  %87 = load i64, ptr getelementptr inbounds (i8, ptr @sas_addr, i64 40), align 8, !tbaa !23
  %88 = lshr i64 %87, 32
  %89 = trunc nuw i64 %88 to i32
  store i32 %89, ptr %85, align 4, !tbaa !25
  %90 = trunc i64 %87 to i32
  %91 = getelementptr inbounds i8, ptr %0, i64 164
  store i32 %90, ptr %91, align 4, !tbaa !28
  %92 = getelementptr inbounds i8, ptr %0, i64 168
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %92, align 4, !tbaa !21
  %93 = shl i32 %86, 1
  %94 = and i32 %93, 2
  %95 = shl i32 %86, 4
  %96 = and i32 %95, 32
  %97 = or disjoint i32 %94, %96
  %98 = or disjoint i32 %84, %97
  %99 = getelementptr inbounds i8, ptr %0, i64 184
  %100 = load i32, ptr getelementptr inbounds (i8, ptr @cable_selection, i64 24), align 8, !tbaa !21
  %101 = load i64, ptr getelementptr inbounds (i8, ptr @sas_addr, i64 48), align 16, !tbaa !23
  %102 = lshr i64 %101, 32
  %103 = trunc nuw i64 %102 to i32
  store i32 %103, ptr %99, align 4, !tbaa !25
  %104 = trunc i64 %101 to i32
  %105 = getelementptr inbounds i8, ptr %0, i64 188
  store i32 %104, ptr %105, align 4, !tbaa !28
  %106 = getelementptr inbounds i8, ptr %0, i64 192
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %106, align 4, !tbaa !21
  %107 = shl i32 %100, 2
  %108 = and i32 %107, 4
  %109 = shl i32 %100, 5
  %110 = and i32 %109, 64
  %111 = or disjoint i32 %108, %110
  %112 = or disjoint i32 %98, %111
  %113 = getelementptr inbounds i8, ptr %0, i64 208
  %114 = load i32, ptr getelementptr inbounds (i8, ptr @cable_selection, i64 28), align 4, !tbaa !21
  %115 = load i64, ptr getelementptr inbounds (i8, ptr @sas_addr, i64 56), align 8, !tbaa !23
  %116 = lshr i64 %115, 32
  %117 = trunc nuw i64 %116 to i32
  store i32 %117, ptr %113, align 4, !tbaa !25
  %118 = trunc i64 %115 to i32
  %119 = getelementptr inbounds i8, ptr %0, i64 212
  store i32 %118, ptr %119, align 4, !tbaa !28
  %120 = getelementptr inbounds i8, ptr %0, i64 216
  store <4 x i32> <i32 777480, i32 1047552, i32 752649, i32 719982>, ptr %120, align 4, !tbaa !21
  %121 = shl i32 %114, 3
  %122 = and i32 %121, 8
  %123 = shl i32 %114, 6
  %124 = and i32 %123, 128
  %125 = or disjoint i32 %122, %124
  %126 = or disjoint i32 %112, %125
  %127 = trunc nuw i32 %126 to i8
  %128 = getelementptr inbounds i8, ptr %0, i64 131
  store i8 %127, ptr %128, align 1, !tbaa !29
  ret void
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: readwrite)
declare ptr @strncpy(ptr noalias noundef returned writeonly, ptr noalias nocapture noundef readonly, i64 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: readwrite) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 11}
!6 = !{!"isci_orom", !7, i64 0, !8, i64 24}
!7 = !{!"sci_bios_oem_param_block_hdr", !8, i64 0, !10, i64 8, !8, i64 10, !8, i64 11, !8, i64 12, !8, i64 13, !10, i64 14, !8, i64 16}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !8, i64 10}
!13 = !{!6, !8, i64 13}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"sci_oem_params", !17, i64 0, !8, i64 4, !8, i64 8}
!17 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!18 = !{!16, !8, i64 1}
!19 = !{!20, !8, i64 0}
!20 = !{!"", !8, i64 0}
!21 = !{!22, !22, i64 0}
!22 = !{!"int", !8, i64 0}
!23 = !{!24, !24, i64 0}
!24 = !{!"long long", !8, i64 0}
!25 = !{!26, !22, i64 0}
!26 = !{!"sci_phy_oem_params", !27, i64 0, !22, i64 8, !22, i64 12, !22, i64 16, !22, i64 20}
!27 = !{!"", !22, i64 0, !22, i64 4}
!28 = !{!26, !22, i64 4}
!29 = !{!16, !8, i64 3}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass