; LLVM IR from MakeContributions/DSA :: algorithms/CPlusPlus/Arrays (counting-inversions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z15count_split_invRSt6vectorIiSaIiEES2_S2_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  store i64 0, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #2
  %16 = trunc i64 %15 to i32
  store i32 %16, ptr %10, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #2
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #2
  %22 = trunc i64 %21 to i32
  store i32 %22, ptr %12, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  store i32 0, ptr %13, align 4, !tbaa !11
  br label %23

23:                                               ; preds = %114, %3
  %24 = load i32, ptr %13, align 4, !tbaa !11
  %25 = load i32, ptr %10, align 4, !tbaa !11
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %117

28:                                               ; preds = %23
  %29 = load i32, ptr %9, align 4, !tbaa !11
  %30 = load i32, ptr %11, align 4, !tbaa !11
  %31 = icmp ne i32 %29, %30
  br i1 %31, label %32, label %79

32:                                               ; preds = %28
  %33 = load i32, ptr %8, align 4, !tbaa !11
  %34 = load i32, ptr %12, align 4, !tbaa !11
  %35 = icmp ne i32 %33, %34
  br i1 %35, label %36, label %79

36:                                               ; preds = %32
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = load i32, ptr %8, align 4, !tbaa !11
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %39) #2
  %41 = load i32, ptr %40, align 4, !tbaa !11
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load i32, ptr %9, align 4, !tbaa !11
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #2
  %46 = load i32, ptr %45, align 4, !tbaa !11
  %47 = icmp sle i32 %41, %46
  br i1 %47, label %48, label %66

48:                                               ; preds = %36
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = load i32, ptr %8, align 4, !tbaa !11
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #2
  %53 = load i32, ptr %52, align 4, !tbaa !11
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = load i32, ptr %13, align 4, !tbaa !11
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %56) #2
  store i32 %53, ptr %57, align 4, !tbaa !11
  %58 = load i32, ptr %8, align 4, !tbaa !11
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %8, align 4, !tbaa !11
  %60 = load i32, ptr %11, align 4, !tbaa !11
  %61 = load i32, ptr %9, align 4, !tbaa !11
  %62 = sub nsw i32 %60, %61
  %63 = sext i32 %62 to i64
  %64 = load i64, ptr %7, align 8, !tbaa !9
  %65 = add nsw i64 %64, %63
  store i64 %65, ptr %7, align 8, !tbaa !9
  br label %78

66:                                               ; preds = %36
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  %68 = load i32, ptr %9, align 4, !tbaa !11
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #2
  %71 = load i32, ptr %70, align 4, !tbaa !11
  %72 = load ptr, ptr %4, align 8, !tbaa !5
  %73 = load i32, ptr %13, align 4, !tbaa !11
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #2
  store i32 %71, ptr %75, align 4, !tbaa !11
  %76 = load i32, ptr %9, align 4, !tbaa !11
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %9, align 4, !tbaa !11
  br label %78

78:                                               ; preds = %66, %48
  br label %113

79:                                               ; preds = %32, %28
  %80 = load i32, ptr %9, align 4, !tbaa !11
  %81 = load i32, ptr %11, align 4, !tbaa !11
  %82 = icmp eq i32 %80, %81
  br i1 %82, label %83, label %95

83:                                               ; preds = %79
  %84 = load ptr, ptr %6, align 8, !tbaa !5
  %85 = load i32, ptr %8, align 4, !tbaa !11
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %86) #2
  %88 = load i32, ptr %87, align 4, !tbaa !11
  %89 = load ptr, ptr %4, align 8, !tbaa !5
  %90 = load i32, ptr %13, align 4, !tbaa !11
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %91) #2
  store i32 %88, ptr %92, align 4, !tbaa !11
  %93 = load i32, ptr %8, align 4, !tbaa !11
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %8, align 4, !tbaa !11
  br label %112

95:                                               ; preds = %79
  %96 = load i32, ptr %8, align 4, !tbaa !11
  %97 = load i32, ptr %12, align 4, !tbaa !11
  %98 = icmp eq i32 %96, %97
  br i1 %98, label %99, label %111

99:                                               ; preds = %95
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = load i32, ptr %9, align 4, !tbaa !11
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %102) #2
  %104 = load i32, ptr %103, align 4, !tbaa !11
  %105 = load ptr, ptr %4, align 8, !tbaa !5
  %106 = load i32, ptr %13, align 4, !tbaa !11
  %107 = sext i32 %106 to i64
  %108 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %107) #2
  store i32 %104, ptr %108, align 4, !tbaa !11
  %109 = load i32, ptr %9, align 4, !tbaa !11
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %9, align 4, !tbaa !11
  br label %111

111:                                              ; preds = %99, %95
  br label %112

112:                                              ; preds = %111, %83
  br label %113

113:                                              ; preds = %112, %78
  br label %114

114:                                              ; preds = %113
  %115 = load i32, ptr %13, align 4, !tbaa !11
  %116 = add nsw i32 %115, 1
  store i32 %116, ptr %13, align 4, !tbaa !11
  br label %23, !llvm.loop !13

117:                                              ; preds = %27
  %118 = load i64, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  ret i64 %118
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z15count_split_invRSt6vectorIiSaIiEES2_S2_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #0 {
  %4 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %5 = trunc i64 %4 to i32
  %6 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %7 = trunc i64 %6 to i32
  %8 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #1
  %9 = trunc i64 %8 to i32
  %10 = icmp sgt i32 %5, 0
  br i1 %10, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %3
  %wide.trip.count = and i64 %4, 2147483647
  br label %.lr.ph

._crit_edge:                                      ; preds = %45, %3
  %.041.lcssa = phi i64 [ 0, %3 ], [ %.1, %45 ]
  ret i64 %.041.lcssa

.lr.ph:                                           ; preds = %.lr.ph.preheader, %45
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %45 ]
  %.04151 = phi i64 [ 0, %.lr.ph.preheader ], [ %.1, %45 ]
  %.04250 = phi i32 [ 0, %.lr.ph.preheader ], [ %.143, %45 ]
  %.04449 = phi i32 [ 0, %.lr.ph.preheader ], [ %.145, %45 ]
  %.not = icmp eq i32 %.04449, %7
  %.not47 = icmp eq i32 %.04250, %9
  %or.cond = select i1 %.not, i1 true, i1 %.not47
  br i1 %or.cond, label %31, label %11

11:                                               ; preds = %.lr.ph
  %12 = sext i32 %.04250 to i64
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %12) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = sext i32 %.04449 to i64
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %15) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %.not48 = icmp sgt i32 %14, %17
  br i1 %.not48, label %26, label %18

18:                                               ; preds = %11
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %12) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  store i32 %20, ptr %21, align 4, !tbaa !5
  %22 = add nsw i32 %.04250, 1
  %23 = sub nsw i32 %7, %.04449
  %24 = sext i32 %23 to i64
  %25 = add nsw i64 %.04151, %24
  br label %45

26:                                               ; preds = %11
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %15) #1
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  store i32 %28, ptr %29, align 4, !tbaa !5
  %30 = add nsw i32 %.04449, 1
  br label %45

31:                                               ; preds = %.lr.ph
  br i1 %.not, label %32, label %38

32:                                               ; preds = %31
  %33 = sext i32 %.04250 to i64
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %33) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  store i32 %35, ptr %36, align 4, !tbaa !5
  %37 = add nsw i32 %.04250, 1
  br label %45

38:                                               ; preds = %31
  br i1 %.not47, label %39, label %45

39:                                               ; preds = %38
  %40 = sext i32 %.04449 to i64
  %41 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %40) #1
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  store i32 %42, ptr %43, align 4, !tbaa !5
  %44 = add nsw i32 %.04449, 1
  br label %45

45:                                               ; preds = %26, %18, %38, %39, %32
  %.145 = phi i32 [ %.04449, %18 ], [ %30, %26 ], [ %7, %32 ], [ %44, %39 ], [ %.04449, %38 ]
  %.143 = phi i32 [ %22, %18 ], [ %.04250, %26 ], [ %37, %32 ], [ %9, %39 ], [ %.04250, %38 ]
  %.1 = phi i64 [ %25, %18 ], [ %.04151, %26 ], [ %.04151, %32 ], [ %.04151, %39 ], [ %.04151, %38 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass