; LLVM IR from lesialin/ImageSignalProcessing_C :: src/isp_csc.ll (Z12isp_csc_initv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_csc_mat_fixed = external dso_local global [9 x i16], align 16
@g_isp_config = external global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z12isp_csc_initv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %4

4:                                                ; preds = %35, %0
  %5 = load i32, ptr %1, align 4, !tbaa !5
  %6 = icmp slt i32 %5, 3
  br i1 %6, label %8, label %7

7:                                                ; preds = %4
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %38

8:                                                ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %31, %8
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = icmp slt i32 %10, 3
  br i1 %11, label %13, label %12

12:                                               ; preds = %9
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %34

13:                                               ; preds = %9
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = mul nsw i32 %14, 4
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = add nsw i32 %15, %16
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [12 x float], ptr getelementptr inbounds (%struct.isp_config_t, ptr @g_isp_config, i32 0, i32 13), i64 0, i64 %18
  %20 = load float, ptr %19, align 4, !tbaa !9
  %21 = fmul float %20, 2.560000e+02
  %22 = fpext float %21 to double
  %23 = fadd double %22, 5.000000e-01
  %24 = fptosi double %23 to i16
  %25 = load i32, ptr %1, align 4, !tbaa !5
  %26 = mul nsw i32 %25, 3
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = add nsw i32 %26, %27
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [9 x i16], ptr @g_csc_mat_fixed, i64 0, i64 %29
  store i16 %24, ptr %30, align 2, !tbaa !11
  br label %31

31:                                               ; preds = %13
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %3, align 4, !tbaa !5
  br label %9, !llvm.loop !13

34:                                               ; preds = %12
  br label %35

35:                                               ; preds = %34
  %36 = load i32, ptr %1, align 4, !tbaa !5
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %1, align 4, !tbaa !5
  br label %4, !llvm.loop !15

38:                                               ; preds = %7
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.isp_config_t = type <{ i32, i32, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.blc_cfg_t, i16, [6 x i8], %"class.std::__cxx11::basic_string", %struct.awb_gain_t, [12 x float], %"class.std::__cxx11::basic_string", float, [12 x float], %struct.nlm_cfg_t, i8, %struct.bnf_cfg_t, [15 x i16], %struct.eeh_cfg_t, %struct.fcs_cfg_t, %struct.hsc_cfg_t, %struct.bcc_cfg_t, [4 x i8] }>
%struct.blc_cfg_t = type { i16, i16, i16, i16, float, float }
%struct.awb_gain_t = type { float, float, float, float }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.nlm_cfg_t = type { i8, i8, i8 }
%struct.bnf_cfg_t = type { [25 x i16], [4 x i16], [3 x i16] }
%struct.eeh_cfg_t = type { i16, i16, i16, i16, i16, i16 }
%struct.fcs_cfg_t = type { i8, i8 }
%struct.hsc_cfg_t = type { i8, float }
%struct.bcc_cfg_t = type { i8, float }

@g_csc_mat_fixed = external dso_local local_unnamed_addr global [9 x i16], align 16
@g_isp_config = external local_unnamed_addr global %struct.isp_config_t, align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z12isp_csc_initv() local_unnamed_addr #0 {
.preheader:
  %0 = load <4 x float>, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 204), align 4
  %1 = shufflevector <4 x float> %0, <4 x float> poison, <8 x i32> <i32 0, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
  %2 = load <2 x float>, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 208), align 8, !tbaa !5
  %3 = load float, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 220), align 4, !tbaa !5
  %4 = load <2 x float>, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 224), align 8, !tbaa !5
  %5 = load <2 x float>, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 236), align 4, !tbaa !5
  %6 = shufflevector <2 x float> %2, <2 x float> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
  %7 = shufflevector <8 x float> %1, <8 x float> %6, <8 x i32> <i32 0, i32 8, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
  %8 = insertelement <8 x float> %7, float %3, i64 3
  %9 = shufflevector <2 x float> %4, <2 x float> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
  %10 = shufflevector <8 x float> %8, <8 x float> %9, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 poison, i32 poison>
  %11 = shufflevector <2 x float> %5, <2 x float> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
  %12 = shufflevector <8 x float> %10, <8 x float> %11, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
  %13 = fmul <8 x float> %12, <float 2.560000e+02, float 2.560000e+02, float 2.560000e+02, float 2.560000e+02, float 2.560000e+02, float 2.560000e+02, float 2.560000e+02, float 2.560000e+02>
  %14 = fpext <8 x float> %13 to <8 x double>
  %15 = fadd <8 x double> %14, <double 5.000000e-01, double 5.000000e-01, double 5.000000e-01, double 5.000000e-01, double 5.000000e-01, double 5.000000e-01, double 5.000000e-01, double 5.000000e-01>
  %16 = fptosi <8 x double> %15 to <8 x i16>
  store <8 x i16> %16, ptr @g_csc_mat_fixed, align 16, !tbaa !9
  %17 = load float, ptr getelementptr inbounds (i8, ptr @g_isp_config, i64 244), align 4, !tbaa !5
  %18 = fmul float %17, 2.560000e+02
  %19 = fpext float %18 to double
  %20 = fadd double %19, 5.000000e-01
  %21 = fptosi double %20 to i16
  store i16 %21, ptr getelementptr inbounds (i8, ptr @g_csc_mat_fixed, i64 16), align 16, !tbaa !9
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,VectorCombinePass