; LLVM IR from kkan2020/evacc :: firmware/main (crc16)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @CalcCrc16(ptr noundef, i16 noundef zeroext, i16 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @ValidateCrcBlk(ptr noundef %0, i16 noundef zeroext %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i16 %1, ptr %5, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  %9 = load i16, ptr %5, align 2, !tbaa !9
  %10 = zext i16 %9 to i32
  %11 = icmp sle i32 %10, 2
  br i1 %11, label %15, label %12

12:                                               ; preds = %2
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %16, label %15

15:                                               ; preds = %12, %2
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %54

16:                                               ; preds = %12
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %17, ptr %6, align 8, !tbaa !5
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = load i16, ptr %5, align 2, !tbaa !9
  %20 = zext i16 %19 to i32
  %21 = sub nsw i32 %20, 1
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds i8, ptr %18, i64 %22
  %24 = load i8, ptr %23, align 1, !tbaa !11
  %25 = zext i8 %24 to i16
  store i16 %25, ptr %7, align 2, !tbaa !9
  %26 = load i16, ptr %7, align 2, !tbaa !9
  %27 = zext i16 %26 to i32
  %28 = shl i32 %27, 8
  %29 = trunc i32 %28 to i16
  store i16 %29, ptr %7, align 2, !tbaa !9
  %30 = load ptr, ptr %6, align 8, !tbaa !5
  %31 = load i16, ptr %5, align 2, !tbaa !9
  %32 = zext i16 %31 to i32
  %33 = sub nsw i32 %32, 2
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i8, ptr %30, i64 %34
  %36 = load i8, ptr %35, align 1, !tbaa !11
  %37 = zext i8 %36 to i32
  %38 = load i16, ptr %7, align 2, !tbaa !9
  %39 = zext i16 %38 to i32
  %40 = or i32 %39, %37
  %41 = trunc i32 %40 to i16
  store i16 %41, ptr %7, align 2, !tbaa !9
  %42 = load i16, ptr %7, align 2, !tbaa !9
  %43 = zext i16 %42 to i32
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = load i16, ptr %5, align 2, !tbaa !9
  %46 = zext i16 %45 to i32
  %47 = sub nsw i32 %46, 2
  %48 = trunc i32 %47 to i16
  %49 = call zeroext i16 @CalcCrc16(ptr noundef %44, i16 noundef zeroext %48, i16 noundef zeroext -1)
  %50 = zext i16 %49 to i32
  %51 = icmp eq i32 %43, %50
  br i1 %51, label %52, label %53

52:                                               ; preds = %16
  store i32 1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %54

53:                                               ; preds = %16
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %54

54:                                               ; preds = %53, %52, %15
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %55 = load i32, ptr %3, align 4
  ret i32 %55
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @CalcCrc16(ptr noundef, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @ValidateCrcBlk(ptr noundef %0, i16 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = icmp ugt i16 %1, 2
  %4 = icmp ne ptr %0, null
  %or.cond = and i1 %4, %3
  br i1 %or.cond, label %5, label %23

5:                                                ; preds = %2
  %6 = zext i16 %1 to i32
  %7 = zext i16 %1 to i64
  %8 = getelementptr i8, ptr %0, i64 %7
  %9 = getelementptr i8, ptr %8, i64 -1
  %10 = load i8, ptr %9, align 1, !tbaa !5
  %11 = zext i8 %10 to i32
  %12 = shl nuw nsw i32 %11, 8
  %13 = add nsw i32 %6, -2
  %14 = zext nneg i32 %13 to i64
  %15 = getelementptr inbounds i8, ptr %0, i64 %14
  %16 = load i8, ptr %15, align 1, !tbaa !5
  %17 = zext i8 %16 to i32
  %18 = or disjoint i32 %12, %17
  %19 = trunc nuw i32 %13 to i16
  %20 = tail call zeroext i16 @CalcCrc16(ptr noundef nonnull %0, i16 noundef zeroext %19, i16 noundef zeroext -1)
  %21 = zext i16 %20 to i32
  %22 = icmp eq i32 %18, %21
  %. = zext i1 %22 to i32
  br label %23

23:                                               ; preds = %5, %2
  %.0 = phi i32 [ 0, %2 ], [ %., %5 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass