; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000/src/ARINC653_PORT (mmu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._MMU_INFORMATION_TYPE = type { ptr, i32, i32, ptr, i32, i32 }

@CORE_MMU_INFORMATION = external dso_local global [2 x %struct._MMU_INFORMATION_TYPE], align 16

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @MMU_FLTRANSLATIONTABLE_ALLOCATE(ptr noundef %0) #0 {
  %2 = alloca i8, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %9 = call i32 @CP15CoreIDGet()
  store i32 %9, ptr %4, align 4, !tbaa !9
  %10 = load i32, ptr %4, align 4, !tbaa !9
  %11 = zext i32 %10 to i64
  %12 = getelementptr inbounds [2 x %struct._MMU_INFORMATION_TYPE], ptr @CORE_MMU_INFORMATION, i64 0, i64 %11
  store ptr %12, ptr %5, align 8, !tbaa !5
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = load ptr, ptr %13, align 8, !tbaa !5
  %15 = icmp ne ptr %14, null
  br i1 %15, label %16, label %47

16:                                               ; preds = %1
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = load ptr, ptr %17, align 8, !tbaa !5
  store ptr %18, ptr %6, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %43, %16
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = load ptr, ptr %21, align 8, !tbaa !5
  %23 = getelementptr inbounds i32, ptr %22, i64 4096
  %24 = icmp ult ptr %20, %23
  br i1 %24, label %25, label %46

25:                                               ; preds = %19
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = and i32 %27, 3
  %29 = icmp eq i32 %28, 1
  br i1 %29, label %30, label %40

30:                                               ; preds = %25
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = load i32, ptr %31, align 4, !tbaa !9
  %33 = and i32 %32, -1024
  %34 = zext i32 %33 to i64
  %35 = inttoptr i64 %34 to ptr
  store ptr %35, ptr %7, align 8, !tbaa !5
  %36 = call zeroext i8 @MMU_SLTRANSLATIONTABLE_ALLOCATE(ptr noundef %7)
  %37 = icmp ne i8 %36, 0
  br i1 %37, label %39, label %38

38:                                               ; preds = %30
  store i8 0, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %87

39:                                               ; preds = %30
  br label %42

40:                                               ; preds = %25
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 0, ptr %41, align 4, !tbaa !9
  br label %42

42:                                               ; preds = %40, %39
  br label %43

43:                                               ; preds = %42
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = getelementptr inbounds i32, ptr %44, i32 1
  store ptr %45, ptr %6, align 8, !tbaa !5
  br label %19, !llvm.loop !11

46:                                               ; preds = %19
  store i8 1, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %87

47:                                               ; preds = %1
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %48, i32 0, i32 2
  %50 = load i32, ptr %49, align 4, !tbaa !13
  %51 = add i32 %50, 16384
  %52 = sub i32 %51, 1
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %53, i32 0, i32 1
  %55 = load i32, ptr %54, align 8, !tbaa !15
  %56 = icmp uge i32 %52, %55
  br i1 %56, label %57, label %58

57:                                               ; preds = %47
  store i8 0, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %87

58:                                               ; preds = %47
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %59, i32 0, i32 0
  %61 = load ptr, ptr %60, align 8, !tbaa !16
  store ptr %61, ptr %6, align 8, !tbaa !5
  br label %62

62:                                               ; preds = %71, %58
  %63 = load ptr, ptr %6, align 8, !tbaa !5
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %64, i32 0, i32 0
  %66 = load ptr, ptr %65, align 8, !tbaa !16
  %67 = getelementptr inbounds i32, ptr %66, i64 4096
  %68 = icmp ult ptr %63, %67
  br i1 %68, label %69, label %74

69:                                               ; preds = %62
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 0, ptr %70, align 4, !tbaa !9
  br label %71

71:                                               ; preds = %69
  %72 = load ptr, ptr %6, align 8, !tbaa !5
  %73 = getelementptr inbounds i32, ptr %72, i32 1
  store ptr %73, ptr %6, align 8, !tbaa !5
  br label %62, !llvm.loop !17

74:                                               ; preds = %62
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %75, i32 0, i32 0
  %77 = load ptr, ptr %76, align 8, !tbaa !16
  %78 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %77, ptr %78, align 8, !tbaa !5
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %79, i32 0, i32 0
  %81 = load ptr, ptr %80, align 8, !tbaa !16
  %82 = getelementptr inbounds i32, ptr %81, i64 4096
  store ptr %82, ptr %80, align 8, !tbaa !16
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct._MMU_INFORMATION_TYPE, ptr %83, i32 0, i32 2
  %85 = load i32, ptr %84, align 4, !tbaa !13
  %86 = add i32 %85, 16384
  store i32 %86, ptr %84, align 4, !tbaa !13
  store i8 1, ptr %2, align 1
  store i32 1, ptr %8, align 4
  br label %87

87:                                               ; preds = %74, %57, %46, %38
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %88 = load i8, ptr %2, align 1
  ret i8 %88
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @CP15CoreIDGet() #2

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MMU_SLTRANSLATIONTABLE_ALLOCATE(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !10, i64 12}
!14 = !{!"_MMU_INFORMATION_TYPE", !6, i64 0, !10, i64 8, !10, i64 12, !6, i64 16, !10, i64 24, !10, i64 28}
!15 = !{!14, !10, i64 8}
!16 = !{!14, !6, i64 0}
!17 = distinct !{!17, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._MMU_INFORMATION_TYPE = type { ptr, i32, i32, ptr, i32, i32 }

@CORE_MMU_INFORMATION = external dso_local local_unnamed_addr global [2 x %struct._MMU_INFORMATION_TYPE], align 16

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @MMU_FLTRANSLATIONTABLE_ALLOCATE(ptr nocapture noundef %0) local_unnamed_addr #0 {
  %2 = alloca ptr, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
  %3 = tail call i32 @CP15CoreIDGet() #4
  %4 = zext i32 %3 to i64
  %5 = getelementptr inbounds [2 x %struct._MMU_INFORMATION_TYPE], ptr @CORE_MMU_INFORMATION, i64 0, i64 %4
  %6 = load ptr, ptr %0, align 8, !tbaa !5
  %.not = icmp eq ptr %6, null
  br i1 %.not, label %22, label %.lr.ph

.lr.ph:                                           ; preds = %1, %17
  %7 = phi ptr [ %18, %17 ], [ %6, %1 ]
  %.024 = phi ptr [ %19, %17 ], [ %6, %1 ]
  %8 = load i32, ptr %.024, align 4, !tbaa !9
  %9 = and i32 %8, 3
  %10 = icmp eq i32 %9, 1
  br i1 %10, label %11, label %16

11:                                               ; preds = %.lr.ph
  %12 = and i32 %8, -1024
  %13 = zext i32 %12 to i64
  %14 = inttoptr i64 %13 to ptr
  store ptr %14, ptr %2, align 8, !tbaa !5
  %15 = call zeroext i8 @MMU_SLTRANSLATIONTABLE_ALLOCATE(ptr noundef nonnull %2)
  %.not23 = icmp eq i8 %15, 0
  br i1 %.not23, label %.loopexit, label %._crit_edge

._crit_edge:                                      ; preds = %11
  %.pre = load ptr, ptr %0, align 8, !tbaa !5
  br label %17

16:                                               ; preds = %.lr.ph
  store i32 0, ptr %.024, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %._crit_edge, %16
  %18 = phi ptr [ %.pre, %._crit_edge ], [ %7, %16 ]
  %19 = getelementptr inbounds i8, ptr %.024, i64 4
  %20 = getelementptr inbounds i8, ptr %18, i64 16384
  %21 = icmp ult ptr %19, %20
  br i1 %21, label %.lr.ph, label %.loopexit, !llvm.loop !11

22:                                               ; preds = %1
  %23 = getelementptr inbounds i8, ptr %5, i64 12
  %24 = load i32, ptr %23, align 4, !tbaa !13
  %25 = add i32 %24, 16383
  %26 = getelementptr inbounds i8, ptr %5, i64 8
  %27 = load i32, ptr %26, align 8, !tbaa !15
  %.not22 = icmp ult i32 %25, %27
  br i1 %.not22, label %28, label %.loopexit

28:                                               ; preds = %22
  %29 = load ptr, ptr %5, align 16, !tbaa !16
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16384) %29, i8 0, i64 16384, i1 false), !tbaa !9
  store ptr %29, ptr %0, align 8, !tbaa !5
  %30 = getelementptr inbounds i8, ptr %29, i64 16384
  store ptr %30, ptr %5, align 16, !tbaa !16
  %31 = load i32, ptr %23, align 4, !tbaa !13
  %32 = add i32 %31, 16384
  store i32 %32, ptr %23, align 4, !tbaa !13
  br label %.loopexit

.loopexit:                                        ; preds = %11, %17, %22, %28
  %.020 = phi i8 [ 1, %28 ], [ 0, %22 ], [ 0, %11 ], [ 1, %17 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
  ret i8 %.020
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @CP15CoreIDGet() local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MMU_SLTRANSLATIONTABLE_ALLOCATE(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !10, i64 12}
!14 = !{!"_MMU_INFORMATION_TYPE", !6, i64 0, !10, i64 8, !10, i64 12, !6, i64 16, !10, i64 24, !10, i64 28}
!15 = !{!14, !10, i64 8}
!16 = !{!14, !6, i64 0}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass