; LLVM IR from lfarcaro/ARINC653_ARMV7A_Z7000 :: ARINC653_ARMV7A_Z7000.sw/ARINC653_ARMV7A_Z7000_bsp/ps7_cortexa9_0/libsrc/qspips_v3 (GetDelays)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XQspiPs = type { %struct.XQspiPs_Config, i32, ptr, ptr, i32, i32, i32, ptr, ptr, i32 }
%struct.XQspiPs_Config = type { i16, i32, i32, i8 }

@Xil_AssertStatus = external global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @Xil_Assert(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @XQspiPs_GetDelays(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #3 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp ne ptr %13, null
  br i1 %14, label %15, label %16

15:                                               ; preds = %5
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %17

16:                                               ; preds = %5
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 409)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 1, ptr %12, align 4
  br label %51

17:                                               ; preds = %15
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.XQspiPs, ptr %18, i32 0, i32 1
  %20 = load i32, ptr %19, align 8, !tbaa !11
  %21 = icmp eq i32 %20, 286331153
  br i1 %21, label %22, label %23

22:                                               ; preds = %17
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !9
  br label %24

23:                                               ; preds = %17
  call void @Xil_Assert(ptr noundef @.str, i32 noundef 410)
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !9
  store i32 1, ptr %12, align 4
  br label %51

24:                                               ; preds = %22
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.XQspiPs, ptr %25, i32 0, i32 0
  %27 = getelementptr inbounds %struct.XQspiPs_Config, ptr %26, i32 0, i32 1
  %28 = load i32, ptr %27, align 4, !tbaa !15
  %29 = add i32 %28, 24
  %30 = zext i32 %29 to i64
  %31 = call i32 @Xil_In32(i64 noundef %30)
  store i32 %31, ptr %11, align 4, !tbaa !9
  %32 = load i32, ptr %11, align 4, !tbaa !9
  %33 = and i32 %32, 255
  %34 = trunc i32 %33 to i8
  %35 = load ptr, ptr %10, align 8, !tbaa !5
  store i8 %34, ptr %35, align 1, !tbaa !16
  %36 = load i32, ptr %11, align 4, !tbaa !9
  %37 = and i32 %36, 65280
  %38 = lshr i32 %37, 8
  %39 = trunc i32 %38 to i8
  %40 = load ptr, ptr %9, align 8, !tbaa !5
  store i8 %39, ptr %40, align 1, !tbaa !16
  %41 = load i32, ptr %11, align 4, !tbaa !9
  %42 = and i32 %41, 16711680
  %43 = lshr i32 %42, 16
  %44 = trunc i32 %43 to i8
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %44, ptr %45, align 1, !tbaa !16
  %46 = load i32, ptr %11, align 4, !tbaa !9
  %47 = and i32 %46, -16777216
  %48 = lshr i32 %47, 24
  %49 = trunc i32 %48 to i8
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 %49, ptr %50, align 1, !tbaa !16
  store i32 0, ptr %12, align 4
  br label %51

51:                                               ; preds = %24, %23, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  %52 = load i32, ptr %12, align 4
  switch i32 %52, label %54 [
    i32 0, label %53
    i32 1, label %53
  ]

53:                                               ; preds = %51, %51
  ret void

54:                                               ; preds = %51
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"", !13, i64 0, !10, i64 16, !6, i64 24, !6, i64 32, !10, i64 40, !10, i64 44, !10, i64 48, !6, i64 56, !6, i64 64, !10, i64 72}
!13 = !{!"", !14, i64 0, !10, i64 4, !10, i64 8, !7, i64 12}
!14 = !{!"short", !7, i64 0}
!15 = !{!12, !10, i64 4}
!16 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@Xil_AssertStatus = external local_unnamed_addr global i32, align 4
@.str = external hidden unnamed_addr constant [171 x i8], align 1

declare void @Xil_Assert(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @Xil_In32(i64 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @XQspiPs_GetDelays(ptr noundef readonly %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #2 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %10, label %6

6:                                                ; preds = %5
  store i32 0, ptr @Xil_AssertStatus, align 4, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  %8 = load i32, ptr %7, align 8, !tbaa !9
  %9 = icmp eq i32 %8, 286331153
  br i1 %9, label %11, label %24

10:                                               ; preds = %5
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 409) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %25

11:                                               ; preds = %6
  %12 = getelementptr inbounds i8, ptr %0, i64 4
  %13 = load i32, ptr %12, align 4, !tbaa !14
  %14 = add i32 %13, 24
  %15 = zext i32 %14 to i64
  %16 = tail call i32 @Xil_In32(i64 noundef %15)
  %17 = trunc i32 %16 to i8
  store i8 %17, ptr %4, align 1, !tbaa !15
  %18 = lshr i32 %16, 8
  %19 = trunc i32 %18 to i8
  store i8 %19, ptr %3, align 1, !tbaa !15
  %20 = lshr i32 %16, 16
  %21 = trunc i32 %20 to i8
  store i8 %21, ptr %2, align 1, !tbaa !15
  %22 = lshr i32 %16, 24
  %23 = trunc nuw i32 %22 to i8
  store i8 %23, ptr %1, align 1, !tbaa !15
  br label %25

24:                                               ; preds = %6
  tail call void @Xil_Assert(ptr noundef nonnull @.str, i32 noundef 410) #3
  store i32 1, ptr @Xil_AssertStatus, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %11, %24, %10
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"", !11, i64 0, !6, i64 16, !13, i64 24, !13, i64 32, !6, i64 40, !6, i64 44, !6, i64 48, !13, i64 56, !13, i64 64, !6, i64 72}
!11 = !{!"", !12, i64 0, !6, i64 4, !6, i64 8, !7, i64 12}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !6, i64 4}
!15 = !{!7, !7, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass