; LLVM IR from google/esh :: examples/physical/nucleo-f401re/platform/uart (uart)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @uart_init() #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %2 = and i32 %1, -8193
  store volatile i32 %2, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  store volatile i32 140, ptr inttoptr (i64 1073759240 to ptr), align 4, !tbaa !5
  %3 = load volatile i32, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %4 = or i32 %3, 12
  store volatile i32 %4, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %5 = load volatile i32, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %6 = or i32 %5, 8192
  store volatile i32 %6, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @uart_init() local_unnamed_addr #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %2 = and i32 %1, -8193
  store volatile i32 %2, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  store volatile i32 140, ptr inttoptr (i64 1073759240 to ptr), align 8, !tbaa !5
  %3 = load volatile i32, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %4 = or i32 %3, 12
  store volatile i32 %4, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %5 = load volatile i32, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  %6 = or i32 %5, 8192
  store volatile i32 %6, ptr inttoptr (i64 1073759244 to ptr), align 4, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,InferAlignmentPass,PostOrderFunctionAttrsPass