; LLVM IR from Montimage/mmt-security :: src/lib (mmt_security)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.mmt_sec_handler_struct = type { ptr, ptr, i32 }

@proto_atts_count = external hidden global i64, align 8
@rules_count = external hidden global i64, align 8
@rules = external hidden global [100000 x ptr], align 16
@is_init = external hidden global i8, align 1
@.str.3 = external hidden unnamed_addr constant [56 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [83 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [79 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @mmt_sec_log(i32 noundef, ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #2

; Function Attrs: nounwind uwtable
define dso_local ptr @mmt_sec_register(i64 noundef %0, ptr noundef %1, ptr noundef %2, i1 noundef zeroext %3, ptr noundef %4, ptr noundef %5) #3 {
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i8, align 1
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  store i64 %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !9
  %16 = zext i1 %3 to i8
  store i8 %16, ptr %10, align 1, !tbaa !11
  store ptr %4, ptr %11, align 8, !tbaa !9
  store ptr %5, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %17 = call ptr @mmt_mem_alloc(i64 noundef 24)
  store ptr %17, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %18 = load i64, ptr %7, align 8, !tbaa !5
  %19 = trunc i64 %18 to i32
  %20 = load ptr, ptr %13, align 8, !tbaa !9
  %21 = getelementptr inbounds %struct.mmt_sec_handler_struct, ptr %20, i32 0, i32 2
  store i32 %19, ptr %21, align 8, !tbaa !13
  %22 = load i8, ptr @is_init, align 1, !tbaa !11, !range !16, !noundef !17
  %23 = trunc i8 %22 to i1
  %24 = zext i1 %23 to i32
  %25 = icmp eq i32 %24, 0
  %26 = xor i1 %25, true
  %27 = xor i1 %26, true
  %28 = zext i1 %27 to i32
  %29 = sext i32 %28 to i64
  %30 = call i64 @llvm.expect.i64(i64 %29, i64 0)
  %31 = icmp ne i64 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %6
  call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 4, ptr noundef @.str.3)
  br label %33

33:                                               ; preds = %32, %6
  %34 = load i8, ptr %10, align 1, !tbaa !11, !range !16, !noundef !17
  %35 = trunc i8 %34 to i1
  br i1 %35, label %36, label %49

36:                                               ; preds = %33
  %37 = load i64, ptr %7, align 8, !tbaa !5
  %38 = icmp eq i64 %37, 0
  br i1 %38, label %39, label %43

39:                                               ; preds = %36
  %40 = call ptr (...) @mmt_sec_get_version_info()
  %41 = load i64, ptr @rules_count, align 8, !tbaa !5
  %42 = load i64, ptr @proto_atts_count, align 8, !tbaa !5
  call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 0, ptr noundef @.str.4, ptr noundef %40, i64 noundef %41, i64 noundef %42)
  br label %48

43:                                               ; preds = %36
  %44 = call ptr (...) @mmt_sec_get_version_info()
  %45 = load i64, ptr @rules_count, align 8, !tbaa !5
  %46 = load i64, ptr @proto_atts_count, align 8, !tbaa !5
  %47 = load i64, ptr %7, align 8, !tbaa !5
  call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 0, ptr noundef @.str.5, ptr noundef %44, i64 noundef %45, i64 noundef %46, i64 noundef %47)
  br label %48

48:                                               ; preds = %43, %39
  br label %49

49:                                               ; preds = %48, %33
  %50 = load i64, ptr %7, align 8, !tbaa !5
  %51 = icmp eq i64 %50, 0
  br i1 %51, label %52, label %63

52:                                               ; preds = %49
  %53 = load i64, ptr @rules_count, align 8, !tbaa !5
  %54 = load i8, ptr %10, align 1, !tbaa !11, !range !16, !noundef !17
  %55 = trunc i8 %54 to i1
  %56 = load ptr, ptr %11, align 8, !tbaa !9
  %57 = load ptr, ptr %12, align 8, !tbaa !9
  %58 = call ptr @mmt_single_sec_register(ptr noundef @rules, i64 noundef %53, i1 noundef zeroext %55, ptr noundef %56, ptr noundef %57)
  %59 = load ptr, ptr %13, align 8, !tbaa !9
  %60 = getelementptr inbounds %struct.mmt_sec_handler_struct, ptr %59, i32 0, i32 0
  store ptr %58, ptr %60, align 8, !tbaa !18
  %61 = load ptr, ptr %13, align 8, !tbaa !9
  %62 = getelementptr inbounds %struct.mmt_sec_handler_struct, ptr %61, i32 0, i32 1
  store ptr @mmt_single_sec_process, ptr %62, align 8, !tbaa !19
  br label %77

63:                                               ; preds = %49
  %64 = load i64, ptr %7, align 8, !tbaa !5
  %65 = trunc i64 %64 to i8
  %66 = load ptr, ptr %8, align 8, !tbaa !9
  %67 = load ptr, ptr %9, align 8, !tbaa !9
  %68 = load i8, ptr %10, align 1, !tbaa !11, !range !16, !noundef !17
  %69 = trunc i8 %68 to i1
  %70 = load ptr, ptr %11, align 8, !tbaa !9
  %71 = load ptr, ptr %12, align 8, !tbaa !9
  %72 = call ptr @mmt_smp_sec_register(i8 noundef zeroext %65, ptr noundef %66, ptr noundef %67, i1 noundef zeroext %69, ptr noundef %70, ptr noundef %71)
  %73 = load ptr, ptr %13, align 8, !tbaa !9
  %74 = getelementptr inbounds %struct.mmt_sec_handler_struct, ptr %73, i32 0, i32 0
  store ptr %72, ptr %74, align 8, !tbaa !18
  %75 = load ptr, ptr %13, align 8, !tbaa !9
  %76 = getelementptr inbounds %struct.mmt_sec_handler_struct, ptr %75, i32 0, i32 1
  store ptr @mmt_smp_sec_process, ptr %76, align 8, !tbaa !19
  br label %77

77:                                               ; preds = %63, %52
  %78 = load ptr, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  ret ptr %78
}

declare ptr @mmt_mem_alloc(i64 noundef) #1

declare ptr @mmt_sec_get_version_info(...) #1

declare ptr @mmt_single_sec_register(ptr noundef, i64 noundef, i1 noundef zeroext, ptr noundef, ptr noundef) #1

declare void @mmt_single_sec_process(ptr noundef, ptr noundef) #1

declare ptr @mmt_smp_sec_register(i8 noundef zeroext, ptr noundef, ptr noundef, i1 noundef zeroext, ptr noundef, ptr noundef) #1

declare void @mmt_smp_sec_process(ptr noundef, ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!14, !15, i64 16}
!14 = !{!"mmt_sec_handler_struct", !10, i64 0, !10, i64 8, !15, i64 16}
!15 = !{!"int", !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = !{!14, !10, i64 0}
!19 = !{!14, !10, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@proto_atts_count = external hidden local_unnamed_addr global i64, align 8
@rules_count = external hidden local_unnamed_addr global i64, align 8
@rules = external hidden global [100000 x ptr], align 16
@is_init = external hidden local_unnamed_addr global i8, align 1
@.str.3 = external hidden unnamed_addr constant [56 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [83 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [79 x i8], align 1

declare void @mmt_sec_log(i32 noundef, ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local ptr @mmt_sec_register(i64 noundef %0, ptr noundef %1, ptr noundef %2, i1 noundef zeroext %3, ptr noundef %4, ptr noundef %5) local_unnamed_addr #1 {
  %7 = tail call ptr @mmt_mem_alloc(i64 noundef 24) #2
  %8 = trunc i64 %0 to i32
  %9 = getelementptr inbounds i8, ptr %7, i64 16
  store i32 %8, ptr %9, align 8, !tbaa !5
  %10 = load i8, ptr @is_init, align 1, !tbaa !11, !range !13, !noundef !14
  %11 = icmp eq i8 %10, 0
  br i1 %11, label %12, label %13, !prof !15

12:                                               ; preds = %6
  tail call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 4, ptr noundef nonnull @.str.3) #2
  br label %13

13:                                               ; preds = %12, %6
  %14 = icmp eq i64 %0, 0
  br i1 %3, label %15, label %19

15:                                               ; preds = %13
  %16 = tail call ptr (...) @mmt_sec_get_version_info() #2
  %17 = load i64, ptr @rules_count, align 8, !tbaa !16
  %18 = load i64, ptr @proto_atts_count, align 8, !tbaa !16
  br i1 %14, label %.thread, label %.thread19

.thread:                                          ; preds = %15
  tail call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 0, ptr noundef nonnull @.str.4, ptr noundef %16, i64 noundef %17, i64 noundef %18) #2
  br label %20

.thread19:                                        ; preds = %15
  tail call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 0, ptr noundef nonnull @.str.5, ptr noundef %16, i64 noundef %17, i64 noundef %18, i64 noundef %0) #2
  br label %23

19:                                               ; preds = %13
  br i1 %14, label %20, label %23

20:                                               ; preds = %.thread, %19
  %21 = load i64, ptr @rules_count, align 8, !tbaa !16
  %22 = tail call ptr @mmt_single_sec_register(ptr noundef nonnull @rules, i64 noundef %21, i1 noundef zeroext %3, ptr noundef %4, ptr noundef %5) #2
  br label %26

23:                                               ; preds = %.thread19, %19
  %24 = trunc i64 %0 to i8
  %25 = tail call ptr @mmt_smp_sec_register(i8 noundef zeroext %24, ptr noundef %1, ptr noundef %2, i1 noundef zeroext %3, ptr noundef %4, ptr noundef %5) #2
  br label %26

26:                                               ; preds = %23, %20
  %.sink = phi ptr [ %25, %23 ], [ %22, %20 ]
  %mmt_smp_sec_process.sink = phi ptr [ @mmt_smp_sec_process, %23 ], [ @mmt_single_sec_process, %20 ]
  store ptr %.sink, ptr %7, align 8, !tbaa !18
  %27 = getelementptr inbounds i8, ptr %7, i64 8
  store ptr %mmt_smp_sec_process.sink, ptr %27, align 8, !tbaa !19
  ret ptr %7
}

declare ptr @mmt_mem_alloc(i64 noundef) local_unnamed_addr #0

declare ptr @mmt_sec_get_version_info(...) local_unnamed_addr #0

declare ptr @mmt_single_sec_register(ptr noundef, i64 noundef, i1 noundef zeroext, ptr noundef, ptr noundef) local_unnamed_addr #0

declare void @mmt_single_sec_process(ptr noundef, ptr noundef) #0

declare ptr @mmt_smp_sec_register(i8 noundef zeroext, ptr noundef, ptr noundef, i1 noundef zeroext, ptr noundef, ptr noundef) local_unnamed_addr #0

declare void @mmt_smp_sec_process(ptr noundef, ptr noundef) #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"mmt_sec_handler_struct", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_Bool", !8, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!6, !7, i64 0}
!19 = !{!6, !7, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LowerExpectIntrinsicPass,SROAPass,SimplifyCFGPass,TailCallElimPass