; LLVM IR from MRPT/mvsim :: modules/simulator/src/PID_Controller.ll (ZN5mvsim14PID_Controller7computeEdd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.mvsim::PID_Controller" = type { double, double, double, double, double, double, double, double }

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_ZN5mvsim14PID_Controller7computeEdd(ptr noundef nonnull align 8 dereferenceable(64) %0, double noundef %1, double noundef %2) #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store double %1, ptr %5, align 8, !tbaa !9
  store double %2, ptr %6, align 8, !tbaa !9
  %8 = load ptr, ptr %4, align 8
  %9 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 6
  %10 = load double, ptr %9, align 8, !tbaa !11
  %11 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 7
  store double %10, ptr %11, align 8, !tbaa !13
  %12 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 5
  %13 = load double, ptr %12, align 8, !tbaa !14
  %14 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 6
  store double %13, ptr %14, align 8, !tbaa !11
  %15 = load double, ptr %5, align 8, !tbaa !9
  %16 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 5
  store double %15, ptr %16, align 8, !tbaa !14
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %17 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 4
  %18 = load double, ptr %17, align 8, !tbaa !15
  %19 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 0
  %20 = load double, ptr %19, align 8, !tbaa !16
  %21 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 5
  %22 = load double, ptr %21, align 8, !tbaa !14
  %23 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 6
  %24 = load double, ptr %23, align 8, !tbaa !11
  %25 = fsub double %22, %24
  %26 = call double @llvm.fmuladd.f64(double %20, double %25, double %18)
  %27 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 1
  %28 = load double, ptr %27, align 8, !tbaa !17
  %29 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 5
  %30 = load double, ptr %29, align 8, !tbaa !14
  %31 = fmul double %28, %30
  %32 = load double, ptr %6, align 8, !tbaa !9
  %33 = call double @llvm.fmuladd.f64(double %31, double %32, double %26)
  %34 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 2
  %35 = load double, ptr %34, align 8, !tbaa !18
  %36 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 5
  %37 = load double, ptr %36, align 8, !tbaa !14
  %38 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 6
  %39 = load double, ptr %38, align 8, !tbaa !11
  %40 = call double @llvm.fmuladd.f64(double -2.000000e+00, double %39, double %37)
  %41 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 7
  %42 = load double, ptr %41, align 8, !tbaa !13
  %43 = fadd double %40, %42
  %44 = fmul double %35, %43
  %45 = load double, ptr %6, align 8, !tbaa !9
  %46 = fdiv double %44, %45
  %47 = fadd double %33, %46
  store double %47, ptr %7, align 8, !tbaa !9
  %48 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %49 = load double, ptr %48, align 8, !tbaa !19
  %50 = fcmp une double %49, 0.000000e+00
  br i1 %50, label %51, label %72

51:                                               ; preds = %3
  %52 = load double, ptr %7, align 8, !tbaa !9
  %53 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %54 = load double, ptr %53, align 8, !tbaa !19
  %55 = fneg double %54
  %56 = fcmp olt double %52, %55
  br i1 %56, label %62, label %57

57:                                               ; preds = %51
  %58 = load double, ptr %7, align 8, !tbaa !9
  %59 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %60 = load double, ptr %59, align 8, !tbaa !19
  %61 = fcmp ogt double %58, %60
  br i1 %61, label %62, label %72

62:                                               ; preds = %57, %51
  %63 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 1
  %64 = load double, ptr %63, align 8, !tbaa !17
  %65 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 5
  %66 = load double, ptr %65, align 8, !tbaa !14
  %67 = fmul double %64, %66
  %68 = load double, ptr %6, align 8, !tbaa !9
  %69 = load double, ptr %7, align 8, !tbaa !9
  %70 = fneg double %67
  %71 = call double @llvm.fmuladd.f64(double %70, double %68, double %69)
  store double %71, ptr %7, align 8, !tbaa !9
  br label %72

72:                                               ; preds = %62, %57, %3
  %73 = load double, ptr %7, align 8, !tbaa !9
  %74 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 4
  store double %73, ptr %74, align 8, !tbaa !15
  %75 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %76 = load double, ptr %75, align 8, !tbaa !19
  %77 = fcmp une double %76, 0.000000e+00
  br i1 %77, label %78, label %97

78:                                               ; preds = %72
  %79 = load double, ptr %7, align 8, !tbaa !9
  %80 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %81 = load double, ptr %80, align 8, !tbaa !19
  %82 = fneg double %81
  %83 = fcmp olt double %79, %82
  br i1 %83, label %84, label %88

84:                                               ; preds = %78
  %85 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %86 = load double, ptr %85, align 8, !tbaa !19
  %87 = fneg double %86
  store double %87, ptr %7, align 8, !tbaa !9
  br label %88

88:                                               ; preds = %84, %78
  %89 = load double, ptr %7, align 8, !tbaa !9
  %90 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %91 = load double, ptr %90, align 8, !tbaa !19
  %92 = fcmp ogt double %89, %91
  br i1 %92, label %93, label %96

93:                                               ; preds = %88
  %94 = getelementptr inbounds %"struct.mvsim::PID_Controller", ptr %8, i32 0, i32 3
  %95 = load double, ptr %94, align 8, !tbaa !19
  store double %95, ptr %7, align 8, !tbaa !9
  br label %96

96:                                               ; preds = %93, %88
  br label %97

97:                                               ; preds = %96, %72
  %98 = load double, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret double %98
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !10, i64 48}
!12 = !{!"_ZTSN5mvsim14PID_ControllerE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!13 = !{!12, !10, i64 56}
!14 = !{!12, !10, i64 40}
!15 = !{!12, !10, i64 32}
!16 = !{!12, !10, i64 0}
!17 = !{!12, !10, i64 8}
!18 = !{!12, !10, i64 16}
!19 = !{!12, !10, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local noundef double @_ZN5mvsim14PID_Controller7computeEdd(ptr nocapture noundef nonnull align 8 dereferenceable(64) %0, double noundef %1, double noundef %2) local_unnamed_addr #0 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 48
  %5 = getelementptr inbounds i8, ptr %0, i64 40
  %6 = load <2 x double>, ptr %5, align 8, !tbaa !5
  store <2 x double> %6, ptr %4, align 8, !tbaa !5
  store double %1, ptr %5, align 8, !tbaa !9
  %7 = getelementptr inbounds i8, ptr %0, i64 32
  %8 = load double, ptr %7, align 8, !tbaa !11
  %9 = load double, ptr %0, align 8, !tbaa !12
  %10 = extractelement <2 x double> %6, i64 0
  %11 = fsub double %1, %10
  %12 = tail call double @llvm.fmuladd.f64(double %9, double %11, double %8)
  %13 = getelementptr inbounds i8, ptr %0, i64 8
  %14 = load double, ptr %13, align 8, !tbaa !13
  %15 = fmul double %14, %1
  %16 = tail call double @llvm.fmuladd.f64(double %15, double %2, double %12)
  %17 = getelementptr inbounds i8, ptr %0, i64 16
  %18 = load double, ptr %17, align 8, !tbaa !14
  %19 = tail call double @llvm.fmuladd.f64(double %10, double -2.000000e+00, double %1)
  %20 = extractelement <2 x double> %6, i64 1
  %21 = fadd double %20, %19
  %22 = fmul double %21, %18
  %23 = fdiv double %22, %2
  %24 = fadd double %16, %23
  %25 = getelementptr inbounds i8, ptr %0, i64 24
  %26 = load double, ptr %25, align 8, !tbaa !15
  %27 = fcmp une double %26, 0.000000e+00
  br i1 %27, label %28, label %37

28:                                               ; preds = %3
  %29 = fneg double %26
  %30 = fcmp olt double %24, %29
  %31 = fcmp ogt double %24, %26
  %or.cond = or i1 %30, %31
  %32 = fneg double %14
  %33 = fmul double %32, %1
  %34 = tail call double @llvm.fmuladd.f64(double %33, double %2, double %24)
  %.0.ph = select i1 %or.cond, double %34, double %24
  store double %.0.ph, ptr %7, align 8, !tbaa !11
  %35 = fcmp olt double %.0.ph, %29
  %.1 = select i1 %35, double %29, double %.0.ph
  %36 = fcmp ogt double %.1, %26
  br i1 %36, label %38, label %39

37:                                               ; preds = %3
  store double %24, ptr %7, align 8, !tbaa !11
  br label %39

38:                                               ; preds = %28
  br label %39

39:                                               ; preds = %37, %28, %38
  %.2 = phi double [ %26, %38 ], [ %.1, %28 ], [ %24, %37 ]
  ret double %.2
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 40}
!10 = !{!"_ZTSN5mvsim14PID_ControllerE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!11 = !{!10, !6, i64 32}
!12 = !{!10, !6, i64 0}
!13 = !{!10, !6, i64 8}
!14 = !{!10, !6, i64 16}
!15 = !{!10, !6, i64 24}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass