; LLVM IR from whoiswelliton/Computer_Engineering_UTFPR-PB :: Embedded_Systems/TIVA Connected TM4C1294XL Projects/00 - freeRTOS10_on_TIVA (vTaskSuspend)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }
%struct.tskTaskControlBlock = type { ptr, %struct.xLIST_ITEM, %struct.xLIST_ITEM, i64, ptr, [32 x i8], i64, i64, [1 x i32], [1 x i8] }
%struct.xLIST_ITEM = type { i32, ptr, ptr, ptr, ptr }

@pxCurrentTCB = external dso_local global ptr, align 8
@pxReadyTasksLists = external hidden global [15 x %struct.xLIST], align 16
@uxTopReadyPriority = external hidden global i64, align 8
@uxCurrentNumberOfTasks = external hidden global i64, align 8
@xSchedulerRunning = external hidden global i64, align 8
@uxSchedulerSuspended = external hidden global i64, align 8
@xSuspendedTaskList = external hidden global %struct.xLIST, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @vPortEnterCritical() #1

declare i64 @uxListRemove(ptr noundef) #1

declare void @vListInsertEnd(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @prvResetNextTaskUnblockTime() #2

declare void @vPortExitCritical() #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #3

; Function Attrs: nounwind uwtable
define dso_local void @vTaskSuspend(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  call void @vPortEnterCritical()
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = icmp eq ptr %5, null
  br i1 %6, label %7, label %9

7:                                                ; preds = %1
  %8 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  br label %11

9:                                                ; preds = %1
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  br label %11

11:                                               ; preds = %9, %7
  %12 = phi ptr [ %8, %7 ], [ %10, %9 ]
  store ptr %12, ptr %3, align 8, !tbaa !5
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %13, i32 0, i32 1
  %15 = call i64 @uxListRemove(ptr noundef %14)
  %16 = icmp eq i64 %15, 0
  br i1 %16, label %17, label %34

17:                                               ; preds = %11
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %18, i32 0, i32 3
  %20 = load i64, ptr %19, align 8, !tbaa !9
  %21 = getelementptr inbounds [15 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %20
  %22 = getelementptr inbounds %struct.xLIST, ptr %21, i32 0, i32 0
  %23 = load volatile i64, ptr %22, align 8, !tbaa !14
  %24 = icmp eq i64 %23, 0
  br i1 %24, label %25, label %33

25:                                               ; preds = %17
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %26, i32 0, i32 3
  %28 = load i64, ptr %27, align 8, !tbaa !9
  %29 = shl i64 1, %28
  %30 = xor i64 %29, -1
  %31 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !17
  %32 = and i64 %31, %30
  store volatile i64 %32, ptr @uxTopReadyPriority, align 8, !tbaa !17
  br label %33

33:                                               ; preds = %25, %17
  br label %35

34:                                               ; preds = %11
  br label %35

35:                                               ; preds = %34, %33
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %36, i32 0, i32 2
  %38 = getelementptr inbounds %struct.xLIST_ITEM, ptr %37, i32 0, i32 4
  %39 = load ptr, ptr %38, align 8, !tbaa !18
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %45

41:                                               ; preds = %35
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %42, i32 0, i32 2
  %44 = call i64 @uxListRemove(ptr noundef %43)
  br label %46

45:                                               ; preds = %35
  br label %46

46:                                               ; preds = %45, %41
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %47, i32 0, i32 1
  call void @vListInsertEnd(ptr noundef @xSuspendedTaskList, ptr noundef %48)
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  store i64 0, ptr %4, align 8, !tbaa !17
  br label %49

49:                                               ; preds = %66, %46
  %50 = load i64, ptr %4, align 8, !tbaa !17
  %51 = icmp slt i64 %50, 1
  br i1 %51, label %52, label %69

52:                                               ; preds = %49
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %53, i32 0, i32 9
  %55 = load i64, ptr %4, align 8, !tbaa !17
  %56 = getelementptr inbounds [1 x i8], ptr %54, i64 0, i64 %55
  %57 = load volatile i8, ptr %56, align 1, !tbaa !19
  %58 = zext i8 %57 to i32
  %59 = icmp eq i32 %58, 1
  br i1 %59, label %60, label %65

60:                                               ; preds = %52
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %61, i32 0, i32 9
  %63 = load i64, ptr %4, align 8, !tbaa !17
  %64 = getelementptr inbounds [1 x i8], ptr %62, i64 0, i64 %63
  store volatile i8 0, ptr %64, align 1, !tbaa !19
  br label %65

65:                                               ; preds = %60, %52
  br label %66

66:                                               ; preds = %65
  %67 = load i64, ptr %4, align 8, !tbaa !17
  %68 = add nsw i64 %67, 1
  store i64 %68, ptr %4, align 8, !tbaa !17
  br label %49, !llvm.loop !20

69:                                               ; preds = %49
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  call void @vPortExitCritical()
  %70 = load volatile i64, ptr @xSchedulerRunning, align 8, !tbaa !17
  %71 = icmp ne i64 %70, 0
  br i1 %71, label %72, label %73

72:                                               ; preds = %69
  call void @vPortEnterCritical()
  call void @prvResetNextTaskUnblockTime()
  call void @vPortExitCritical()
  br label %74

73:                                               ; preds = %69
  br label %74

74:                                               ; preds = %73, %72
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  %76 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  %77 = icmp eq ptr %75, %76
  br i1 %77, label %78, label %97

78:                                               ; preds = %74
  %79 = load volatile i64, ptr @xSchedulerRunning, align 8, !tbaa !17
  %80 = icmp ne i64 %79, 0
  br i1 %80, label %81, label %89

81:                                               ; preds = %78
  %82 = load volatile i64, ptr @uxSchedulerSuspended, align 8, !tbaa !17
  %83 = icmp eq i64 %82, 0
  %84 = zext i1 %83 to i32
  %85 = icmp eq i32 %84, 0
  br i1 %85, label %86, label %88

86:                                               ; preds = %81
  call void @vPortRaiseBASEPRI()
  br label %87

87:                                               ; preds = %87, %86
  br label %87

88:                                               ; preds = %81
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !22
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !23
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !24
  br label %96

89:                                               ; preds = %78
  %90 = load volatile i64, ptr @xSuspendedTaskList, align 8, !tbaa !14
  %91 = load volatile i64, ptr @uxCurrentNumberOfTasks, align 8, !tbaa !17
  %92 = icmp eq i64 %90, %91
  br i1 %92, label %93, label %94

93:                                               ; preds = %89
  store volatile ptr null, ptr @pxCurrentTCB, align 8, !tbaa !5
  br label %95

94:                                               ; preds = %89
  call void @vTaskSwitchContext()
  br label %95

95:                                               ; preds = %94, %93
  br label %96

96:                                               ; preds = %95, %88
  br label %98

97:                                               ; preds = %74
  br label %98

98:                                               ; preds = %97, %96
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @vTaskSwitchContext() #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 88}
!10 = !{!"tskTaskControlBlock", !6, i64 0, !11, i64 8, !11, i64 48, !13, i64 88, !6, i64 96, !7, i64 104, !13, i64 136, !13, i64 144, !7, i64 152, !7, i64 156}
!11 = !{!"xLIST_ITEM", !12, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!12 = !{!"int", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"xLIST", !13, i64 0, !6, i64 8, !16, i64 16}
!16 = !{!"xMINI_LIST_ITEM", !12, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!13, !13, i64 0}
!18 = !{!10, !6, i64 80}
!19 = !{!7, !7, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!12, !12, i64 0}
!23 = !{i64 2148435424}
!24 = !{i64 2148435493}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }

@pxCurrentTCB = external dso_local global ptr, align 8
@pxReadyTasksLists = external hidden global [15 x %struct.xLIST], align 16
@uxTopReadyPriority = external hidden global i64, align 8
@uxCurrentNumberOfTasks = external hidden global i64, align 8
@xSchedulerRunning = external hidden global i64, align 8
@uxSchedulerSuspended = external hidden global i64, align 8
@xSuspendedTaskList = external hidden global %struct.xLIST, align 8

declare void @vPortEnterCritical() local_unnamed_addr #0

declare i64 @uxListRemove(ptr noundef) local_unnamed_addr #0

declare void @vListInsertEnd(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @prvResetNextTaskUnblockTime() local_unnamed_addr #1

declare void @vPortExitCritical() local_unnamed_addr #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @vTaskSuspend(ptr noundef %0) local_unnamed_addr #1 {
  tail call void @vPortEnterCritical() #3
  %2 = icmp eq ptr %0, null
  br i1 %2, label %3, label %5

3:                                                ; preds = %1
  %4 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  br label %5

5:                                                ; preds = %1, %3
  %6 = phi ptr [ %4, %3 ], [ %0, %1 ]
  %7 = getelementptr inbounds i8, ptr %6, i64 8
  %8 = tail call i64 @uxListRemove(ptr noundef nonnull %7) #3
  %9 = icmp eq i64 %8, 0
  br i1 %9, label %10, label %21

10:                                               ; preds = %5
  %11 = getelementptr inbounds i8, ptr %6, i64 88
  %12 = load i64, ptr %11, align 8, !tbaa !9
  %13 = getelementptr inbounds [15 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %12
  %14 = load volatile i64, ptr %13, align 8, !tbaa !14
  %15 = icmp eq i64 %14, 0
  br i1 %15, label %16, label %21

16:                                               ; preds = %10
  %17 = shl nuw i64 1, %12
  %18 = xor i64 %17, -1
  %19 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !17
  %20 = and i64 %19, %18
  store volatile i64 %20, ptr @uxTopReadyPriority, align 8, !tbaa !17
  br label %21

21:                                               ; preds = %5, %10, %16
  %22 = getelementptr inbounds i8, ptr %6, i64 80
  %23 = load ptr, ptr %22, align 8, !tbaa !18
  %.not = icmp eq ptr %23, null
  br i1 %.not, label %.critedge, label %24

24:                                               ; preds = %21
  %25 = getelementptr inbounds i8, ptr %6, i64 48
  %26 = tail call i64 @uxListRemove(ptr noundef nonnull %25) #3
  br label %.critedge

.critedge:                                        ; preds = %21, %24
  tail call void @vListInsertEnd(ptr noundef nonnull @xSuspendedTaskList, ptr noundef nonnull %7) #3
  %27 = getelementptr inbounds i8, ptr %6, i64 156
  %28 = load volatile i8, ptr %27, align 1, !tbaa !19
  %29 = icmp eq i8 %28, 1
  br i1 %29, label %30, label %31

30:                                               ; preds = %.critedge
  store volatile i8 0, ptr %27, align 1, !tbaa !19
  br label %31

31:                                               ; preds = %30, %.critedge
  tail call void @vPortExitCritical() #3
  %32 = load volatile i64, ptr @xSchedulerRunning, align 8, !tbaa !17
  %.not15 = icmp eq i64 %32, 0
  br i1 %.not15, label %34, label %33

33:                                               ; preds = %31
  tail call void @vPortEnterCritical() #3
  tail call void @prvResetNextTaskUnblockTime()
  tail call void @vPortExitCritical() #3
  br label %34

34:                                               ; preds = %31, %33
  %35 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  %36 = icmp eq ptr %6, %35
  br i1 %36, label %37, label %50

37:                                               ; preds = %34
  %38 = load volatile i64, ptr @xSchedulerRunning, align 8, !tbaa !17
  %.not16 = icmp eq i64 %38, 0
  br i1 %.not16, label %44, label %39

39:                                               ; preds = %37
  %40 = load volatile i64, ptr @uxSchedulerSuspended, align 8, !tbaa !17
  %.not17 = icmp eq i64 %40, 0
  br i1 %.not17, label %43, label %41

41:                                               ; preds = %39
  tail call void @vPortRaiseBASEPRI()
  br label %42

42:                                               ; preds = %42, %41
  br label %42

43:                                               ; preds = %39
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !20
  tail call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !21
  tail call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !22
  br label %50

44:                                               ; preds = %37
  %45 = load volatile i64, ptr @xSuspendedTaskList, align 8, !tbaa !14
  %46 = load volatile i64, ptr @uxCurrentNumberOfTasks, align 8, !tbaa !17
  %47 = icmp eq i64 %45, %46
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  store volatile ptr null, ptr @pxCurrentTCB, align 8, !tbaa !5
  br label %50

49:                                               ; preds = %44
  tail call void @vTaskSwitchContext()
  br label %50

50:                                               ; preds = %34, %43, %49, %48
  ret void
}

; Function Attrs: nounwind uwtable
declare dso_local void @vTaskSwitchContext() local_unnamed_addr #1

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 88}
!10 = !{!"tskTaskControlBlock", !6, i64 0, !11, i64 8, !11, i64 48, !13, i64 88, !6, i64 96, !7, i64 104, !13, i64 136, !13, i64 144, !7, i64 152, !7, i64 156}
!11 = !{!"xLIST_ITEM", !12, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!12 = !{!"int", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"xLIST", !13, i64 0, !6, i64 8, !16, i64 16}
!16 = !{!"xMINI_LIST_ITEM", !12, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!13, !13, i64 0}
!18 = !{!10, !6, i64 80}
!19 = !{!7, !7, i64 0}
!20 = !{!12, !12, i64 0}
!21 = !{i64 2148435424}
!22 = !{i64 2148435493}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass