; LLVM IR from Tunghohin/Competitive_Coding :: Luogu/p2023.ll (Z5queryiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32, i64, i64, i64 }

@mod = external dso_local global i32, align 4
@tr = external dso_local global [400040 x %struct.Node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z9push_downi(i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5queryiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %11
  %13 = getelementptr inbounds %struct.Node, ptr %12, i32 0, i32 0
  %14 = load i32, ptr %13, align 16, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = icmp sge i32 %14, %15
  br i1 %16, label %17, label %31

17:                                               ; preds = %3
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %19
  %21 = getelementptr inbounds %struct.Node, ptr %20, i32 0, i32 1
  %22 = load i32, ptr %21, align 4, !tbaa !12
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = icmp sle i32 %22, %23
  br i1 %24, label %25, label %31

25:                                               ; preds = %17
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %27
  %29 = getelementptr inbounds %struct.Node, ptr %28, i32 0, i32 4
  %30 = load i64, ptr %29, align 8, !tbaa !13
  store i64 %30, ptr %4, align 8
  br label %75

31:                                               ; preds = %17, %3
  %32 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z9push_downi(i32 noundef %32)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %33 = load i32, ptr %5, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %34
  %36 = getelementptr inbounds %struct.Node, ptr %35, i32 0, i32 0
  %37 = load i32, ptr %36, align 16, !tbaa !9
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %39
  %41 = getelementptr inbounds %struct.Node, ptr %40, i32 0, i32 1
  %42 = load i32, ptr %41, align 4, !tbaa !12
  %43 = add nsw i32 %37, %42
  %44 = ashr i32 %43, 1
  store i32 %44, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store i64 0, ptr %9, align 8, !tbaa !14
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = icmp sle i32 %45, %46
  br i1 %47, label %48, label %57

48:                                               ; preds = %31
  %49 = load i32, ptr %5, align 4, !tbaa !5
  %50 = shl i32 %49, 1
  %51 = load i32, ptr %6, align 4, !tbaa !5
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = call noundef i64 @_Z5queryiii(i32 noundef %50, i32 noundef %51, i32 noundef %52)
  %54 = load i32, ptr @mod, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = srem i64 %53, %55
  store i64 %56, ptr %9, align 8, !tbaa !14
  br label %57

57:                                               ; preds = %48, %31
  %58 = load i32, ptr %7, align 4, !tbaa !5
  %59 = load i32, ptr %8, align 4, !tbaa !5
  %60 = icmp sgt i32 %58, %59
  br i1 %60, label %61, label %73

61:                                               ; preds = %57
  %62 = load i64, ptr %9, align 8, !tbaa !14
  %63 = load i32, ptr %5, align 4, !tbaa !5
  %64 = shl i32 %63, 1
  %65 = or i32 %64, 1
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = load i32, ptr %7, align 4, !tbaa !5
  %68 = call noundef i64 @_Z5queryiii(i32 noundef %65, i32 noundef %66, i32 noundef %67)
  %69 = add nsw i64 %62, %68
  %70 = load i32, ptr @mod, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = srem i64 %69, %71
  store i64 %72, ptr %9, align 8, !tbaa !14
  br label %73

73:                                               ; preds = %61, %57
  %74 = load i64, ptr %9, align 8, !tbaa !14
  store i64 %74, ptr %4, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %75

75:                                               ; preds = %73, %25
  %76 = load i64, ptr %4, align 8
  ret i64 %76
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4Node", !6, i64 0, !6, i64 4, !11, i64 8, !11, i64 16, !11, i64 24}
!11 = !{!"long long", !7, i64 0}
!12 = !{!10, !6, i64 4}
!13 = !{!10, !11, i64 24}
!14 = !{!11, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32, i64, i64, i64 }

@mod = external dso_local local_unnamed_addr global i32, align 4
@tr = external dso_local local_unnamed_addr global [400040 x %struct.Node], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_Z9push_downi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5queryiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = sext i32 %0 to i64
  %5 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %4
  %6 = load i32, ptr %5, align 16, !tbaa !5
  %.not = icmp slt i32 %6, %1
  br i1 %.not, label %13, label %7

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %5, i64 4
  %9 = load i32, ptr %8, align 4, !tbaa !11
  %.not24 = icmp sgt i32 %9, %2
  br i1 %.not24, label %13, label %10

10:                                               ; preds = %7
  %11 = getelementptr inbounds i8, ptr %5, i64 24
  %12 = load i64, ptr %11, align 8, !tbaa !12
  br label %common.ret26

13:                                               ; preds = %7, %3
  tail call void @_Z9push_downi(i32 noundef %0)
  %14 = load i32, ptr %5, align 16, !tbaa !5
  %15 = getelementptr inbounds i8, ptr %5, i64 4
  %16 = load i32, ptr %15, align 4, !tbaa !11
  %17 = add nsw i32 %16, %14
  %18 = ashr i32 %17, 1
  %.not25 = icmp slt i32 %18, %1
  br i1 %.not25, label %25, label %19

19:                                               ; preds = %13
  %20 = shl i32 %0, 1
  %21 = tail call noundef i64 @_Z5queryiii(i32 noundef %20, i32 noundef %1, i32 noundef %2)
  %22 = load i32, ptr @mod, align 4, !tbaa !13
  %23 = sext i32 %22 to i64
  %24 = srem i64 %21, %23
  br label %25

25:                                               ; preds = %19, %13
  %.0 = phi i64 [ %24, %19 ], [ 0, %13 ]
  %26 = icmp slt i32 %18, %2
  br i1 %26, label %27, label %common.ret26

common.ret26:                                     ; preds = %25, %10, %27
  %common.ret26.op = phi i64 [ %34, %27 ], [ %12, %10 ], [ %.0, %25 ]
  ret i64 %common.ret26.op

27:                                               ; preds = %25
  %28 = shl i32 %0, 1
  %29 = or disjoint i32 %28, 1
  %30 = tail call noundef i64 @_Z5queryiii(i32 noundef %29, i32 noundef %1, i32 noundef %2)
  %31 = add nsw i64 %30, %.0
  %32 = load i32, ptr @mod, align 4, !tbaa !13
  %33 = sext i32 %32 to i64
  %34 = srem i64 %31, %33
  br label %common.ret26
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS4Node", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long long", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !10, i64 24}
!13 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass