; LLVM IR from niessner/Matterport :: code/gaps/pkgs/RNBasics/RNQueue.ll (ZN8RNVQueue7ReverseEii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.RNVQueue = type { %class.RNVArray, i32, i32 }
%class.RNVArray = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN8RNVQueue7ReverseEii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  %11 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %12 = getelementptr inbounds %class.RNVQueue, ptr %11, i32 0, i32 1
  %13 = load i32, ptr %12, align 8, !tbaa !11
  %14 = load i32, ptr %5, align 4, !tbaa !9
  %15 = sub nsw i32 %13, %14
  store i32 %15, ptr %7, align 4, !tbaa !9
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp sle i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %3
  store i32 1, ptr %8, align 4
  br label %53

19:                                               ; preds = %3
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = icmp sgt i32 %20, 0
  br i1 %21, label %22, label %28

22:                                               ; preds = %19
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %26, label %28

26:                                               ; preds = %22
  %27 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %27, ptr %7, align 4, !tbaa !9
  br label %28

28:                                               ; preds = %26, %22, %19
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = icmp sle i32 %29, 0
  br i1 %30, label %31, label %32

31:                                               ; preds = %28
  store i32 1, ptr %8, align 4
  br label %53

32:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %33 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %33, ptr %9, align 4, !tbaa !9
  %34 = load i32, ptr %5, align 4, !tbaa !9
  %35 = load i32, ptr %7, align 4, !tbaa !9
  %36 = add nsw i32 %34, %35
  %37 = sub nsw i32 %36, 1
  store i32 %37, ptr %10, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %47, %32
  %39 = load i32, ptr %9, align 4, !tbaa !9
  %40 = load i32, ptr %10, align 4, !tbaa !9
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %42, label %52

42:                                               ; preds = %38
  %43 = load i32, ptr %9, align 4, !tbaa !9
  %44 = call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef %43)
  %45 = load i32, ptr %10, align 4, !tbaa !9
  %46 = call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef %45)
  call void @_Z6RNSwapPvS_S_i(ptr noundef %44, ptr noundef %46, ptr noundef null, i32 noundef 8)
  br label %47

47:                                               ; preds = %42
  %48 = load i32, ptr %9, align 4, !tbaa !9
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %9, align 4, !tbaa !9
  %50 = load i32, ptr %10, align 4, !tbaa !9
  %51 = add nsw i32 %50, -1
  store i32 %51, ptr %10, align 4, !tbaa !9
  br label %38, !llvm.loop !14

52:                                               ; preds = %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  store i32 0, ptr %8, align 4
  br label %53

53:                                               ; preds = %52, %31, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  %54 = load i32, ptr %8, align 4
  switch i32 %54, label %56 [
    i32 0, label %55
    i32 1, label %55
  ]

55:                                               ; preds = %53, %53
  ret void

56:                                               ; preds = %53
  unreachable
}

declare void @_Z6RNSwapPvS_S_i(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"_ZTS8RNVQueue", !13, i64 0, !10, i64 16, !10, i64 20}
!13 = !{!"_ZTS8RNVArray", !6, i64 0, !10, i64 8, !10, i64 12}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN8RNVQueue7ReverseEii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = load i32, ptr %4, align 8, !tbaa !5
  %6 = sub nsw i32 %5, %1
  %7 = icmp slt i32 %6, 1
  br i1 %7, label %.loopexit, label %8

8:                                                ; preds = %3
  %9 = icmp sgt i32 %2, 0
  %10 = tail call i32 @llvm.umin.i32(i32 %6, i32 %2)
  %.017 = select i1 %9, i32 %10, i32 %6
  %11 = add nsw i32 %.017, %1
  %.020 = add nsw i32 %11, -1
  %12 = icmp sgt i32 %.020, %1
  br i1 %12, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %8, %.lr.ph
  %.022 = phi i32 [ %.0, %.lr.ph ], [ %.020, %8 ]
  %.01621 = phi i32 [ %15, %.lr.ph ], [ %1, %8 ]
  %13 = tail call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.01621)
  %14 = tail call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.022)
  tail call void @_Z6RNSwapPvS_S_i(ptr noundef %13, ptr noundef %14, ptr noundef null, i32 noundef 8)
  %15 = add nsw i32 %.01621, 1
  %.0 = add nsw i32 %.022, -1
  %16 = icmp slt i32 %15, %.0
  br i1 %16, label %.lr.ph, label %.loopexit, !llvm.loop !12

.loopexit:                                        ; preds = %.lr.ph, %8, %3
  ret void
}

declare void @_Z6RNSwapPvS_S_i(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"_ZTS8RNVQueue", !7, i64 0, !11, i64 16, !11, i64 20}
!7 = !{!"_ZTS8RNVArray", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass