; LLVM IR from alenic/realGA :: src/algorithms.ll (ZN4RALG12argSelectionEPfiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4RALG10realgaSwapERfS0_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN4RALG12argSelectionEPfiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca float, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %69, %4
  %15 = load i32, ptr %11, align 4, !tbaa !9
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 2, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  br label %72

19:                                               ; preds = %14
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = load i32, ptr %11, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds float, ptr %20, i64 %22
  %24 = load float, ptr %23, align 4, !tbaa !11
  store float %24, ptr %9, align 4, !tbaa !11
  %25 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %25, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = load i32, ptr %11, align 4, !tbaa !9
  %28 = add nsw i32 %26, %27
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %13, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %51, %19
  %31 = load i32, ptr %13, align 4, !tbaa !9
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = icmp sle i32 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 5, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %54

35:                                               ; preds = %30
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = load i32, ptr %13, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds float, ptr %36, i64 %38
  %40 = load float, ptr %39, align 4, !tbaa !11
  %41 = load float, ptr %9, align 4, !tbaa !11
  %42 = fcmp olt float %40, %41
  br i1 %42, label %43, label %50

43:                                               ; preds = %35
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = load i32, ptr %13, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = getelementptr inbounds float, ptr %44, i64 %46
  %48 = load float, ptr %47, align 4, !tbaa !11
  store float %48, ptr %9, align 4, !tbaa !11
  %49 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %49, ptr %10, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %43, %35
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %13, align 4, !tbaa !9
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %13, align 4, !tbaa !9
  br label %30, !llvm.loop !13

54:                                               ; preds = %34
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = load i32, ptr %8, align 4, !tbaa !9
  %57 = sub nsw i32 %56, 1
  %58 = icmp slt i32 %55, %57
  br i1 %58, label %59, label %68

59:                                               ; preds = %54
  %60 = load ptr, ptr %5, align 8, !tbaa !5
  %61 = load i32, ptr %11, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds float, ptr %60, i64 %62
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds float, ptr %64, i64 %66
  call void @_ZN4RALG10realgaSwapERfS0_(ptr noundef nonnull align 4 dereferenceable(4) %63, ptr noundef nonnull align 4 dereferenceable(4) %67)
  br label %68

68:                                               ; preds = %59, %54
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %11, align 4, !tbaa !9
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr %11, align 4, !tbaa !9
  br label %14, !llvm.loop !15

72:                                               ; preds = %18
  %73 = load i32, ptr %10, align 4, !tbaa !9
  store i32 1, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret i32 %73
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4RALG10realgaSwapERfS0_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN4RALG12argSelectionEPfiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
.lr.ph35:
  %4 = icmp sgt i32 %3, 0
  tail call void @llvm.assume(i1 %4)
  %5 = add nsw i32 %3, -1
  %6 = sext i32 %1 to i64
  %7 = sext i32 %2 to i64
  %8 = zext nneg i32 %5 to i64
  %wide.trip.count = zext nneg i32 %3 to i64
  %invariant.op = sub nsw i64 %7, %6
  br label %9

._crit_edge36:                                    ; preds = %21
  ret i32 %.1.lcssa

9:                                                ; preds = %.lr.ph35, %21
  %indvars.iv41 = phi i64 [ 0, %.lr.ph35 ], [ %indvars.iv.next42, %21 ]
  %indvars.iv = phi i64 [ %6, %.lr.ph35 ], [ %indvars.iv.next, %21 ]
  %10 = getelementptr inbounds float, ptr %0, i64 %indvars.iv41
  %.not.not29 = icmp slt i64 %indvars.iv41, %invariant.op
  %11 = trunc nuw nsw i64 %indvars.iv41 to i32
  br i1 %.not.not29, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %9
  %12 = load float, ptr %10, align 4, !tbaa !5
  br label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %9
  %.1.lcssa = phi i32 [ %11, %9 ], [ %.2, %.lr.ph ]
  %13 = icmp ult i64 %indvars.iv41, %8
  br i1 %13, label %18, label %21

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv38 = phi i64 [ %indvars.iv, %.lr.ph.preheader ], [ %indvars.iv.next39, %.lr.ph ]
  %.131 = phi i32 [ %11, %.lr.ph.preheader ], [ %.2, %.lr.ph ]
  %.02530 = phi float [ %12, %.lr.ph.preheader ], [ %.126, %.lr.ph ]
  %indvars.iv.next39 = add nsw i64 %indvars.iv38, 1
  %14 = getelementptr inbounds float, ptr %0, i64 %indvars.iv.next39
  %15 = load float, ptr %14, align 4, !tbaa !5
  %16 = fcmp olt float %15, %.02530
  %.126 = select i1 %16, float %15, float %.02530
  %17 = trunc nsw i64 %indvars.iv.next39 to i32
  %.2 = select i1 %16, i32 %17, i32 %.131
  %.not.not = icmp slt i64 %indvars.iv.next39, %7
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !9

18:                                               ; preds = %._crit_edge
  %19 = sext i32 %.1.lcssa to i64
  %20 = getelementptr inbounds float, ptr %0, i64 %19
  tail call void @_ZN4RALG10realgaSwapERfS0_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %20)
  br label %21

21:                                               ; preds = %._crit_edge, %18
  %indvars.iv.next42 = add nuw nsw i64 %indvars.iv41, 1
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next42, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge36, label %9, !llvm.loop !11
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)
declare void @llvm.assume(i1 noundef) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass