; LLVM IR from Tunghohin/Competitive_Coding :: Luogu/p3372.ll (Z5buildiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32, i64, i64 }

@a = external dso_local global [100010 x i32], align 16
@tr = external dso_local global [400040 x %struct.Node], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7push_upi(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %struct.Node, align 8
  %8 = alloca %struct.Node, align 8
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = load i32, ptr %6, align 4, !tbaa !5
  %12 = icmp eq i32 %10, %11
  br i1 %12, label %13, label %28

13:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 24, ptr %7) #4
  %14 = getelementptr inbounds %struct.Node, ptr %7, i32 0, i32 0
  %15 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %15, ptr %14, align 8, !tbaa !9
  %16 = getelementptr inbounds %struct.Node, ptr %7, i32 0, i32 1
  %17 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %17, ptr %16, align 4, !tbaa !12
  %18 = getelementptr inbounds %struct.Node, ptr %7, i32 0, i32 2
  store i64 0, ptr %18, align 8, !tbaa !13
  %19 = getelementptr inbounds %struct.Node, ptr %7, i32 0, i32 3
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [100010 x i32], ptr @a, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  store i64 %24, ptr %19, align 8, !tbaa !14
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %26
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %27, ptr align 8 %7, i64 24, i1 false), !tbaa.struct !15
  call void @llvm.lifetime.end.p0(i64 24, ptr %7) #4
  br label %53

28:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 24, ptr %8) #4
  %29 = getelementptr inbounds %struct.Node, ptr %8, i32 0, i32 0
  %30 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %30, ptr %29, align 8, !tbaa !9
  %31 = getelementptr inbounds %struct.Node, ptr %8, i32 0, i32 1
  %32 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %32, ptr %31, align 4, !tbaa !12
  %33 = getelementptr inbounds %struct.Node, ptr %8, i32 0, i32 2
  store i64 0, ptr %33, align 8, !tbaa !13
  %34 = getelementptr inbounds %struct.Node, ptr %8, i32 0, i32 3
  store i64 0, ptr %34, align 8, !tbaa !14
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %36
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %37, ptr align 8 %8, i64 24, i1 false), !tbaa.struct !15
  call void @llvm.lifetime.end.p0(i64 24, ptr %8) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = add nsw i32 %38, %39
  %41 = ashr i32 %40, 1
  store i32 %41, ptr %9, align 4, !tbaa !5
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = shl i32 %42, 1
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z5buildiii(i32 noundef %43, i32 noundef %44, i32 noundef %45)
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = shl i32 %46, 1
  %48 = or i32 %47, 1
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  %51 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z5buildiii(i32 noundef %48, i32 noundef %50, i32 noundef %51)
  %52 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z7push_upi(i32 noundef %52)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %53

53:                                               ; preds = %28, %13
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4Node", !6, i64 0, !6, i64 4, !11, i64 8, !11, i64 16}
!11 = !{!"long long", !7, i64 0}
!12 = !{!10, !6, i64 4}
!13 = !{!10, !11, i64 8}
!14 = !{!10, !11, i64 16}
!15 = !{i64 0, i64 4, !5, i64 4, i64 4, !5, i64 8, i64 8, !16, i64 16, i64 8, !16}
!16 = !{!11, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Node = type { i32, i32, i64, i64 }

@a = external dso_local local_unnamed_addr global [100010 x i32], align 16
@tr = external dso_local local_unnamed_addr global [400040 x %struct.Node], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z7push_upi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5buildiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %1, %2
  br i1 %4, label %common.ret, label %11

common.ret:                                       ; preds = %3
  %5 = sext i32 %1 to i64
  %6 = getelementptr inbounds [100010 x i32], ptr @a, i64 0, i64 %5
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = sext i32 %7 to i64
  %9 = sext i32 %0 to i64
  %10 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %9
  store i32 %1, ptr %10, align 8, !tbaa !5
  %.sroa.43.0..sroa_idx = getelementptr inbounds i8, ptr %10, i64 4
  store i32 %1, ptr %.sroa.43.0..sroa_idx, align 4, !tbaa !5
  %.sroa.54.0..sroa_idx = getelementptr inbounds i8, ptr %10, i64 8
  store i64 0, ptr %.sroa.54.0..sroa_idx, align 8, !tbaa !9
  %.sroa.65.0..sroa_idx = getelementptr inbounds i8, ptr %10, i64 16
  store i64 %8, ptr %.sroa.65.0..sroa_idx, align 8, !tbaa !9
  br label %common.ret24

common.ret24:                                     ; preds = %11, %common.ret
  ret void

11:                                               ; preds = %3
  %12 = sext i32 %0 to i64
  %13 = getelementptr inbounds [400040 x %struct.Node], ptr @tr, i64 0, i64 %12
  store i32 %1, ptr %13, align 8, !tbaa !5
  %.sroa.4.0..sroa_idx = getelementptr inbounds i8, ptr %13, i64 4
  store i32 %2, ptr %.sroa.4.0..sroa_idx, align 4, !tbaa !5
  %.sroa.5.0..sroa_idx = getelementptr inbounds i8, ptr %13, i64 8
  %14 = add nsw i32 %2, %1
  %15 = ashr i32 %14, 1
  %16 = shl i32 %0, 1
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %.sroa.5.0..sroa_idx, i8 0, i64 16, i1 false)
  tail call void @_Z5buildiii(i32 noundef %16, i32 noundef %1, i32 noundef %15)
  %17 = or disjoint i32 %16, 1
  %18 = add nsw i32 %15, 1
  tail call void @_Z5buildiii(i32 noundef %17, i32 noundef %18, i32 noundef %2)
  tail call void @_Z7push_upi(i32 noundef %0)
  br label %common.ret24
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass