; LLVM IR from mickypaganini/SSI2016-jet-clustering :: spartyjet-4.0.2_mac/External/fastjet-3.0.0/plugins/SISCone/siscone/siscone/vic_648ef11b (ZN7siscone9CvicinityD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.siscone::Cvicinity" = type { ptr, double, double, double, double, double, double, i32, %"class.std::vector", %"class.std::vector.3", ptr, %"class.std::vector.8", i32, double, double }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.siscone::Cvicinity_elm" = type { ptr, ptr, double, double, double, i8, double, %"class.std::__cxx11::list" }
%"class.std::__cxx11::list" = type { %"class.std::__cxx11::_List_base" }
%"class.std::__cxx11::_List_base" = type { %"struct.std::__cxx11::_List_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_List_impl" }
%"struct.std::__cxx11::_List_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_List_impl" = type { %"struct.std::__detail::_List_node_header" }
%"struct.std::__detail::_List_node_header" = type { %"struct.std::__detail::_List_node_base", i64 }
%"struct.std::__detail::_List_node_base" = type { ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7siscone9CvicinityD2Ev(ptr noundef nonnull align 8 dereferenceable(168) %0) unnamed_addr #0 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %"class.siscone::Cvicinity", ptr %3, i32 0, i32 10
  %5 = load ptr, ptr %4, align 8, !tbaa !9
  %6 = icmp ne ptr %5, null
  br i1 %6, label %7, label %24

7:                                                ; preds = %1
  %8 = getelementptr inbounds %"class.siscone::Cvicinity", ptr %3, i32 0, i32 10
  %9 = load ptr, ptr %8, align 8, !tbaa !9
  %10 = icmp eq ptr %9, null
  br i1 %10, label %23, label %11

11:                                               ; preds = %7
  %12 = getelementptr inbounds i8, ptr %9, i64 -8
  %13 = load i64, ptr %12, align 8
  %14 = getelementptr inbounds %"class.siscone::Cvicinity_elm", ptr %9, i64 %13
  %15 = icmp eq ptr %9, %14
  br i1 %15, label %20, label %16

16:                                               ; preds = %16, %11
  %17 = phi ptr [ %14, %11 ], [ %18, %16 ]
  %18 = getelementptr inbounds %"class.siscone::Cvicinity_elm", ptr %17, i64 -1
  call void @_ZN7siscone13Cvicinity_elmD2Ev(ptr noundef nonnull align 8 dereferenceable(80) %18) #3
  %19 = icmp eq ptr %18, %9
  br i1 %19, label %20, label %16

20:                                               ; preds = %16, %11
  %21 = mul i64 80, %13
  %22 = add i64 %21, 8
  call void @_ZdaPvm(ptr noundef %12, i64 noundef %22) #4
  br label %23

23:                                               ; preds = %20, %7
  br label %24

24:                                               ; preds = %23, %1
  %25 = getelementptr inbounds %"class.siscone::Cvicinity", ptr %3, i32 0, i32 11
  call void @_ZNSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %25) #3
  %26 = getelementptr inbounds %"class.siscone::Cvicinity", ptr %3, i32 0, i32 9
  call void @_ZNSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %26) #3
  %27 = getelementptr inbounds %"class.siscone::Cvicinity", ptr %3, i32 0, i32 8
  call void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %27) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7siscone13Cvicinity_elmD2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPvm(ptr noundef, i64 noundef) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 112}
!10 = !{!"_ZTSN7siscone9CvicinityE", !6, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !12, i64 56, !13, i64 64, !17, i64 88, !6, i64 112, !21, i64 120, !12, i64 144, !11, i64 152, !11, i64 160}
!11 = !{!"double", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSSt6vectorIN7siscone9CmomentumESaIS1_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.siscone::Cvicinity_elm" = type { ptr, ptr, double, double, double, i8, double, %"class.std::__cxx11::list" }
%"class.std::__cxx11::list" = type { %"class.std::__cxx11::_List_base" }
%"class.std::__cxx11::_List_base" = type { %"struct.std::__cxx11::_List_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_List_impl" }
%"struct.std::__cxx11::_List_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_List_impl" = type { %"struct.std::__detail::_List_node_header" }
%"struct.std::__detail::_List_node_header" = type { %"struct.std::__detail::_List_node_base", i64 }
%"struct.std::__detail::_List_node_base" = type { ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7siscone9CvicinityD2Ev(ptr noundef nonnull align 8 dereferenceable(168) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 112
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %14, label %4

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %3, i64 -8
  %6 = load i64, ptr %5, align 8
  %7 = icmp eq i64 %6, 0
  br i1 %7, label %.loopexit, label %.preheader.preheader

.preheader.preheader:                             ; preds = %4
  %8 = getelementptr inbounds %"class.siscone::Cvicinity_elm", ptr %3, i64 %6
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.preheader
  %9 = phi ptr [ %10, %.preheader ], [ %8, %.preheader.preheader ]
  %10 = getelementptr inbounds i8, ptr %9, i64 -80
  tail call void @_ZN7siscone13Cvicinity_elmD2Ev(ptr noundef nonnull align 8 dereferenceable(80) %10) #3
  %11 = icmp eq ptr %10, %3
  br i1 %11, label %.loopexit, label %.preheader

.loopexit:                                        ; preds = %.preheader, %4
  %12 = mul i64 %6, 80
  %13 = or disjoint i64 %12, 8
  tail call void @_ZdaPvm(ptr noundef nonnull %5, i64 noundef %13) #4
  br label %14

14:                                               ; preds = %.loopexit, %1
  %15 = getelementptr inbounds i8, ptr %0, i64 120
  tail call void @_ZNSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #3
  %16 = getelementptr inbounds i8, ptr %0, i64 88
  tail call void @_ZNSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #3
  %17 = getelementptr inbounds i8, ptr %0, i64 64
  tail call void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %17) #3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7siscone13Cvicinity_elmD2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdaPvm(ptr noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 112}
!6 = !{!"_ZTSN7siscone9CvicinityE", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !11, i64 56, !12, i64 64, !16, i64 88, !7, i64 112, !20, i64 120, !11, i64 144, !10, i64 152, !10, i64 160}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"double", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"_ZTSSt6vectorIN7siscone9CmomentumESaIS1_EE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!16 = !{!"_ZTSSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!20 = !{!"_ZTSSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass