; LLVM IR from niessner/Matterport :: code/gaps/pkgs/R3Shapes/R3Polyline.ll (ZN10R3Polyline13SetVertexDataEiPv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.R3Polyline = type { %class.R3Curve, ptr, ptr, ptr, i32, %class.R3Box }
%class.R3Curve = type { %class.R3Shape }
%class.R3Shape = type { ptr }
%class.R3Box = type { %class.R3Solid, %class.R3Point, %class.R3Point }
%class.R3Solid = type { %class.R3Shape }
%class.R3Point = type { [3 x double] }

@stderr = external global ptr, align 8
@.str.3 = external hidden unnamed_addr constant [33 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #0

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10R3Polyline13SetVertexDataEiPv(ptr noundef nonnull align 8 dereferenceable(96) %0, i32 noundef %1, ptr noundef %2) unnamed_addr #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  %7 = load ptr, ptr %4, align 8
  %8 = getelementptr inbounds %class.R3Polyline, ptr %7, i32 0, i32 3
  %9 = load ptr, ptr %8, align 8, !tbaa !11
  %10 = icmp ne ptr %9, null
  br i1 %10, label %27, label %11

11:                                               ; preds = %3
  %12 = call noundef i32 @_ZNK10R3Polyline9NVerticesEv(ptr noundef nonnull align 8 dereferenceable(96) %7)
  %13 = sext i32 %12 to i64
  %14 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %13, i64 8)
  %15 = extractvalue { i64, i1 } %14, 1
  %16 = extractvalue { i64, i1 } %14, 0
  %17 = select i1 %15, i64 -1, i64 %16
  %18 = call noalias noundef nonnull ptr @_Znam(i64 noundef %17) #5
  %19 = getelementptr inbounds %class.R3Polyline, ptr %7, i32 0, i32 3
  store ptr %18, ptr %19, align 8, !tbaa !11
  %20 = getelementptr inbounds %class.R3Polyline, ptr %7, i32 0, i32 3
  %21 = load ptr, ptr %20, align 8, !tbaa !11
  %22 = icmp ne ptr %21, null
  br i1 %22, label %26, label %23

23:                                               ; preds = %11
  %24 = load ptr, ptr @stderr, align 8, !tbaa !5
  %25 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %24, ptr noundef @.str.3) #6
  br label %34

26:                                               ; preds = %11
  br label %27

27:                                               ; preds = %26, %3
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %class.R3Polyline, ptr %7, i32 0, i32 3
  %30 = load ptr, ptr %29, align 8, !tbaa !11
  %31 = load i32, ptr %5, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds ptr, ptr %30, i64 %32
  store ptr %28, ptr %33, align 8, !tbaa !5
  br label %34

34:                                               ; preds = %27, %23
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK10R3Polyline9NVerticesEv(ptr noundef nonnull align 8 dereferenceable(96)) #3 align 2

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #4

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 24}
!12 = !{!"_ZTS10R3Polyline", !13, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !15, i64 40}
!13 = !{!"_ZTS7R3Curve", !14, i64 0}
!14 = !{!"_ZTS7R3Shape"}
!15 = !{!"_ZTS5R3Box", !16, i64 0, !17, i64 8, !17, i64 32}
!16 = !{!"_ZTS7R3Solid", !14, i64 0}
!17 = !{!"_ZTS7R3Point", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10R3Polyline13SetVertexDataEiPv(ptr noundef nonnull align 8 dereferenceable(96) %0, i32 noundef %1, ptr noundef %2) unnamed_addr #1 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %.not = icmp eq ptr %5, null
  br i1 %.not, label %6, label %13

6:                                                ; preds = %3
  %7 = tail call noundef i32 @_ZNK10R3Polyline9NVerticesEv(ptr noundef nonnull align 8 dereferenceable(96) %0)
  %8 = zext nneg i32 %7 to i64
  %9 = icmp slt i32 %7, 0
  %10 = shl nuw nsw i64 %8, 3
  %11 = select i1 %9, i64 -1, i64 %10
  %12 = tail call noalias noundef nonnull ptr @_Znam(i64 noundef %11) #3
  store ptr %12, ptr %4, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %6, %3
  %14 = phi ptr [ %12, %6 ], [ %5, %3 ]
  %15 = sext i32 %1 to i64
  %16 = getelementptr inbounds ptr, ptr %14, i64 %15
  store ptr %2, ptr %16, align 8, !tbaa !16
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK10R3Polyline9NVerticesEv(ptr noundef nonnull align 8 dereferenceable(96)) local_unnamed_addr #2 align 2

attributes #0 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 24}
!6 = !{!"_ZTS10R3Polyline", !7, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !12, i64 32, !13, i64 40}
!7 = !{!"_ZTS7R3Curve", !8, i64 0}
!8 = !{!"_ZTS7R3Shape"}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"int", !10, i64 0}
!13 = !{!"_ZTS5R3Box", !14, i64 0, !15, i64 8, !15, i64 32}
!14 = !{!"_ZTS7R3Solid", !8, i64 0}
!15 = !{!"_ZTS7R3Point", !10, i64 0}
!16 = !{!9, !9, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass