; LLVM IR from Montimage/mmt-security :: src/lib (mmt_single_security)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.mmt_single_sec_handler_struct = type { i64, ptr, ptr, ptr, ptr, ptr, ptr, %struct.mmt_bit_t, i64, i8, ptr, i32 }
%struct.mmt_bit_t = type { [32 x i8] }
%struct.rule_engine_struct = type { ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, i64, i64 }

; Function Attrs: nounwind uwtable
define dso_local ptr @mmt_single_sec_register(ptr noundef %0, i64 noundef %1, i1 noundef zeroext %2, ptr noundef %3, ptr noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i8, align 1
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i64 %1, ptr %8, align 8, !tbaa !9
  %21 = zext i1 %2 to i8
  store i8 %21, ptr %9, align 1, !tbaa !11
  store ptr %3, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #6
  %22 = call i32 @mmt_sec_get_config(i32 noundef 1)
  store i32 %22, ptr %18, align 4, !tbaa !13
  br label %23

23:                                               ; preds = %5
  %24 = load ptr, ptr %7, align 8, !tbaa !5
  %25 = icmp eq ptr %24, null
  %26 = xor i1 %25, true
  %27 = xor i1 %26, true
  %28 = zext i1 %27 to i32
  %29 = sext i32 %28 to i64
  %30 = call i64 @llvm.expect.i64(i64 %29, i64 0)
  %31 = icmp ne i64 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %23
  store ptr null, ptr %6, align 8
  store i32 1, ptr %19, align 4
  br label %161

33:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #6
  %34 = call ptr @mmt_mem_alloc(i64 noundef 120)
  store ptr %34, ptr %20, align 8, !tbaa !5
  %35 = load i64, ptr %8, align 8, !tbaa !9
  %36 = load ptr, ptr %20, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %36, i32 0, i32 0
  store i64 %35, ptr %37, align 64, !tbaa !15
  %38 = load i64, ptr %8, align 8, !tbaa !9
  %39 = mul i64 8, %38
  %40 = call ptr @mmt_mem_alloc(i64 noundef %39)
  %41 = load ptr, ptr %20, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %41, i32 0, i32 1
  store ptr %40, ptr %42, align 8, !tbaa !18
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  %44 = load ptr, ptr %20, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %44, i32 0, i32 2
  store ptr %43, ptr %45, align 16, !tbaa !19
  %46 = load ptr, ptr %11, align 8, !tbaa !5
  %47 = load ptr, ptr %20, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %47, i32 0, i32 3
  store ptr %46, ptr %48, align 8, !tbaa !20
  %49 = load i64, ptr %8, align 8, !tbaa !9
  %50 = mul i64 8, %49
  %51 = call ptr @mmt_mem_alloc(i64 noundef %50)
  %52 = load ptr, ptr %20, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %52, i32 0, i32 5
  store ptr %51, ptr %53, align 8, !tbaa !21
  %54 = load i8, ptr %9, align 1, !tbaa !11, !range !22, !noundef !23
  %55 = trunc i8 %54 to i1
  %56 = load ptr, ptr %20, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %56, i32 0, i32 9
  %58 = zext i1 %55 to i8
  store i8 %58, ptr %57, align 32, !tbaa !24
  %59 = load ptr, ptr %20, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %59, i32 0, i32 7
  call void @mmt_bit_init(ptr noundef %60)
  %61 = load i64, ptr %8, align 8, !tbaa !9
  %62 = mul i64 32, %61
  %63 = call ptr @mmt_mem_alloc(i64 noundef %62)
  %64 = load ptr, ptr %20, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %64, i32 0, i32 6
  store ptr %63, ptr %65, align 16, !tbaa !25
  %66 = load ptr, ptr %20, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %66, i32 0, i32 10
  store ptr null, ptr %67, align 8, !tbaa !26
  %68 = load i64, ptr %8, align 8, !tbaa !9
  %69 = mul i64 8, %68
  %70 = call ptr @mmt_mem_alloc(i64 noundef %69)
  %71 = load ptr, ptr %20, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %71, i32 0, i32 4
  store ptr %70, ptr %72, align 32, !tbaa !27
  store i32 0, ptr %12, align 4, !tbaa !13
  br label %73

73:                                               ; preds = %151, %33
  %74 = load i32, ptr %12, align 4, !tbaa !13
  %75 = sext i32 %74 to i64
  %76 = load i64, ptr %8, align 8, !tbaa !9
  %77 = icmp ult i64 %75, %76
  br i1 %77, label %78, label %154

78:                                               ; preds = %73
  %79 = load ptr, ptr %7, align 8, !tbaa !5
  %80 = load i32, ptr %12, align 4, !tbaa !13
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds ptr, ptr %79, i64 %81
  %83 = load ptr, ptr %82, align 8, !tbaa !5
  store ptr %83, ptr %16, align 8, !tbaa !5
  %84 = load ptr, ptr %16, align 8, !tbaa !5
  %85 = load ptr, ptr %20, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %85, i32 0, i32 1
  %87 = load ptr, ptr %86, align 8, !tbaa !18
  %88 = load i32, ptr %12, align 4, !tbaa !13
  %89 = sext i32 %88 to i64
  %90 = getelementptr inbounds ptr, ptr %87, i64 %89
  store ptr %84, ptr %90, align 8, !tbaa !5
  %91 = load ptr, ptr %16, align 8, !tbaa !5
  %92 = load i32, ptr %18, align 4, !tbaa !13
  %93 = zext i32 %92 to i64
  %94 = call ptr @rule_engine_init(ptr noundef %91, i64 noundef %93)
  %95 = load ptr, ptr %20, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %95, i32 0, i32 4
  %97 = load ptr, ptr %96, align 32, !tbaa !27
  %98 = load i32, ptr %12, align 4, !tbaa !13
  %99 = sext i32 %98 to i64
  %100 = getelementptr inbounds ptr, ptr %97, i64 %99
  store ptr %94, ptr %100, align 8, !tbaa !5
  %101 = load ptr, ptr %20, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %101, i32 0, i32 5
  %103 = load ptr, ptr %102, align 8, !tbaa !21
  %104 = load i32, ptr %12, align 4, !tbaa !13
  %105 = sext i32 %104 to i64
  %106 = getelementptr inbounds i64, ptr %103, i64 %105
  store i64 0, ptr %106, align 8, !tbaa !9
  %107 = load ptr, ptr %20, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %107, i32 0, i32 6
  %109 = load ptr, ptr %108, align 16, !tbaa !25
  %110 = load i32, ptr %12, align 4, !tbaa !13
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds %struct.mmt_bit_t, ptr %109, i64 %111
  call void @mmt_bit_init(ptr noundef %112)
  %113 = load ptr, ptr %20, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %113, i32 0, i32 4
  %115 = load ptr, ptr %114, align 32, !tbaa !27
  %116 = load i32, ptr %12, align 4, !tbaa !13
  %117 = sext i32 %116 to i64
  %118 = getelementptr inbounds ptr, ptr %115, i64 %117
  %119 = load ptr, ptr %118, align 8, !tbaa !5
  store ptr %119, ptr %15, align 8, !tbaa !5
  store i32 0, ptr %13, align 4, !tbaa !13
  br label %120

120:                                              ; preds = %139, %78
  %121 = load i32, ptr %13, align 4, !tbaa !13
  %122 = load ptr, ptr %15, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.rule_engine_struct, ptr %122, i32 0, i32 5
  %124 = load i32, ptr %123, align 8, !tbaa !28
  %125 = icmp ult i32 %121, %124
  br i1 %125, label %126, label %142

126:                                              ; preds = %120
  %127 = load ptr, ptr %20, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %127, i32 0, i32 6
  %129 = load ptr, ptr %128, align 16, !tbaa !25
  %130 = load i32, ptr %12, align 4, !tbaa !13
  %131 = sext i32 %130 to i64
  %132 = getelementptr inbounds %struct.mmt_bit_t, ptr %129, i64 %131
  %133 = load ptr, ptr %15, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.rule_engine_struct, ptr %133, i32 0, i32 10
  %135 = load ptr, ptr %134, align 64, !tbaa !30
  %136 = load i32, ptr %13, align 4, !tbaa !13
  %137 = sext i32 %136 to i64
  %138 = getelementptr inbounds %struct.mmt_bit_t, ptr %135, i64 %137
  call void @mmt_bit_or(ptr noundef %132, ptr noundef %138)
  br label %139

139:                                              ; preds = %126
  %140 = load i32, ptr %13, align 4, !tbaa !13
  %141 = add nsw i32 %140, 1
  store i32 %141, ptr %13, align 4, !tbaa !13
  br label %120, !llvm.loop !31

142:                                              ; preds = %120
  %143 = load ptr, ptr %20, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %143, i32 0, i32 7
  %145 = load ptr, ptr %20, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %145, i32 0, i32 6
  %147 = load ptr, ptr %146, align 16, !tbaa !25
  %148 = load i32, ptr %12, align 4, !tbaa !13
  %149 = sext i32 %148 to i64
  %150 = getelementptr inbounds %struct.mmt_bit_t, ptr %147, i64 %149
  call void @mmt_bit_or(ptr noundef %144, ptr noundef %150)
  br label %151

151:                                              ; preds = %142
  %152 = load i32, ptr %12, align 4, !tbaa !13
  %153 = add nsw i32 %152, 1
  store i32 %153, ptr %12, align 4, !tbaa !13
  br label %73, !llvm.loop !33

154:                                              ; preds = %73
  %155 = load ptr, ptr %20, align 8, !tbaa !5
  %156 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %155, i32 0, i32 8
  store i64 0, ptr %156, align 8, !tbaa !34
  %157 = load ptr, ptr %20, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.mmt_single_sec_handler_struct, ptr %157, i32 0, i32 11
  %159 = call i32 @pthread_spin_init(ptr noundef %158, i32 noundef 0) #6
  %160 = load ptr, ptr %20, align 8, !tbaa !5
  store ptr %160, ptr %6, align 8
  store i32 1, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  br label %161

161:                                              ; preds = %154, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  %162 = load ptr, ptr %6, align 8
  ret ptr %162
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @mmt_sec_get_config(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #3

declare ptr @mmt_mem_alloc(i64 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @mmt_bit_init(ptr noundef) #4

declare ptr @rule_engine_init(ptr noundef, i64 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @mmt_bit_or(ptr noundef, ptr noundef) #4

; Function Attrs: nounwind
declare i32 @pthread_spin_init(ptr noundef, i32 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"mmt_single_sec_handler_struct", !10, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !17, i64 56, !10, i64 88, !12, i64 96, !6, i64 104, !14, i64 112}
!17 = !{!"", !7, i64 0}
!18 = !{!16, !6, i64 8}
!19 = !{!16, !6, i64 16}
!20 = !{!16, !6, i64 24}
!21 = !{!16, !6, i64 40}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = !{!16, !12, i64 96}
!25 = !{!16, !6, i64 48}
!26 = !{!16, !6, i64 104}
!27 = !{!16, !6, i64 32}
!28 = !{!29, !14, i64 40}
!29 = !{!"rule_engine_struct", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !14, i64 40, !14, i64 44, !14, i64 48, !14, i64 52, !6, i64 56, !6, i64 64, !10, i64 72, !10, i64 80}
!30 = !{!29, !6, i64 64}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = distinct !{!33, !32}
!34 = !{!16, !10, i64 88}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.mmt_bit_t = type { [32 x i8] }

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @mmt_single_sec_register(ptr noundef readonly %0, i64 noundef %1, i1 noundef zeroext %2, ptr noundef %3, ptr noundef %4) local_unnamed_addr #0 {
  %6 = tail call i32 @mmt_sec_get_config(i32 noundef 1) #4
  %7 = icmp eq ptr %0, null
  br i1 %7, label %58, label %8, !prof !5

8:                                                ; preds = %5
  %9 = zext i1 %2 to i8
  %10 = tail call ptr @mmt_mem_alloc(i64 noundef 120) #4
  store i64 %1, ptr %10, align 64, !tbaa !6
  %11 = shl i64 %1, 3
  %12 = tail call ptr @mmt_mem_alloc(i64 noundef %11) #4
  %13 = getelementptr inbounds i8, ptr %10, i64 8
  store ptr %12, ptr %13, align 8, !tbaa !15
  %14 = getelementptr inbounds i8, ptr %10, i64 16
  store ptr %3, ptr %14, align 16, !tbaa !16
  %15 = getelementptr inbounds i8, ptr %10, i64 24
  store ptr %4, ptr %15, align 8, !tbaa !17
  %16 = tail call ptr @mmt_mem_alloc(i64 noundef %11) #4
  %17 = getelementptr inbounds i8, ptr %10, i64 40
  store ptr %16, ptr %17, align 8, !tbaa !18
  %18 = getelementptr inbounds i8, ptr %10, i64 96
  store i8 %9, ptr %18, align 32, !tbaa !19
  %19 = getelementptr inbounds i8, ptr %10, i64 56
  tail call void @mmt_bit_init(ptr noundef nonnull %19)
  %20 = shl i64 %1, 5
  %21 = tail call ptr @mmt_mem_alloc(i64 noundef %20) #4
  %22 = getelementptr inbounds i8, ptr %10, i64 48
  store ptr %21, ptr %22, align 16, !tbaa !20
  %23 = getelementptr inbounds i8, ptr %10, i64 104
  store ptr null, ptr %23, align 8, !tbaa !21
  %24 = tail call ptr @mmt_mem_alloc(i64 noundef %11) #4
  %25 = getelementptr inbounds i8, ptr %10, i64 32
  store ptr %24, ptr %25, align 32, !tbaa !22
  %.not = icmp eq i64 %1, 0
  br i1 %.not, label %._crit_edge58, label %.lr.ph57

.lr.ph57:                                         ; preds = %8
  %26 = zext i32 %6 to i64
  br label %27

27:                                               ; preds = %.lr.ph57, %._crit_edge
  %indvars.iv61 = phi i64 [ 0, %.lr.ph57 ], [ %indvars.iv.next62, %._crit_edge ]
  %28 = getelementptr inbounds ptr, ptr %0, i64 %indvars.iv61
  %29 = load ptr, ptr %28, align 8, !tbaa !23
  %30 = load ptr, ptr %13, align 8, !tbaa !15
  %31 = getelementptr inbounds ptr, ptr %30, i64 %indvars.iv61
  store ptr %29, ptr %31, align 8, !tbaa !23
  %32 = tail call ptr @rule_engine_init(ptr noundef %29, i64 noundef %26) #4
  %33 = load ptr, ptr %25, align 32, !tbaa !22
  %34 = getelementptr inbounds ptr, ptr %33, i64 %indvars.iv61
  store ptr %32, ptr %34, align 8, !tbaa !23
  %35 = load ptr, ptr %17, align 8, !tbaa !18
  %36 = getelementptr inbounds i64, ptr %35, i64 %indvars.iv61
  store i64 0, ptr %36, align 8, !tbaa !24
  %37 = load ptr, ptr %22, align 16, !tbaa !20
  %38 = getelementptr inbounds %struct.mmt_bit_t, ptr %37, i64 %indvars.iv61
  tail call void @mmt_bit_init(ptr noundef %38)
  %39 = load ptr, ptr %25, align 32, !tbaa !22
  %40 = getelementptr inbounds ptr, ptr %39, i64 %indvars.iv61
  %41 = load ptr, ptr %40, align 8, !tbaa !23
  %42 = getelementptr inbounds i8, ptr %41, i64 40
  %43 = load i32, ptr %42, align 8, !tbaa !25
  %.not59 = icmp eq i32 %43, 0
  br i1 %.not59, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %27
  %44 = getelementptr inbounds i8, ptr %41, i64 64
  br label %45

45:                                               ; preds = %.lr.ph, %45
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %45 ]
  %46 = load ptr, ptr %22, align 16, !tbaa !20
  %47 = getelementptr inbounds %struct.mmt_bit_t, ptr %46, i64 %indvars.iv61
  %48 = load ptr, ptr %44, align 64, !tbaa !27
  %49 = getelementptr inbounds %struct.mmt_bit_t, ptr %48, i64 %indvars.iv
  tail call void @mmt_bit_or(ptr noundef %47, ptr noundef %49)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %50 = load i32, ptr %42, align 8, !tbaa !25
  %51 = zext i32 %50 to i64
  %52 = icmp ult i64 %indvars.iv.next, %51
  br i1 %52, label %45, label %._crit_edge, !llvm.loop !28

._crit_edge:                                      ; preds = %45, %27
  %53 = load ptr, ptr %22, align 16, !tbaa !20
  %54 = getelementptr inbounds %struct.mmt_bit_t, ptr %53, i64 %indvars.iv61
  tail call void @mmt_bit_or(ptr noundef nonnull %19, ptr noundef %54)
  %indvars.iv.next62 = add nuw i64 %indvars.iv61, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next62, %1
  br i1 %exitcond.not, label %._crit_edge58, label %27, !llvm.loop !30

._crit_edge58:                                    ; preds = %._crit_edge, %8
  %55 = getelementptr inbounds i8, ptr %10, i64 88
  store i64 0, ptr %55, align 8, !tbaa !31
  %56 = getelementptr inbounds i8, ptr %10, i64 112
  %57 = tail call i32 @pthread_spin_init(ptr noundef nonnull %56, i32 noundef 0) #4
  br label %58

58:                                               ; preds = %5, %._crit_edge58
  %.0 = phi ptr [ %10, %._crit_edge58 ], [ null, %5 ]
  ret ptr %.0
}

declare i32 @mmt_sec_get_config(i32 noundef) local_unnamed_addr #1

declare ptr @mmt_mem_alloc(i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @mmt_bit_init(ptr noundef) local_unnamed_addr #2

declare ptr @rule_engine_init(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @mmt_bit_or(ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind
declare i32 @pthread_spin_init(ptr noundef, i32 noundef) local_unnamed_addr #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!6 = !{!7, !8, i64 0}
!7 = !{!"mmt_single_sec_handler_struct", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !12, i64 56, !8, i64 88, !13, i64 96, !11, i64 104, !14, i64 112}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"", !9, i64 0}
!13 = !{!"_Bool", !9, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!7, !11, i64 8}
!16 = !{!7, !11, i64 16}
!17 = !{!7, !11, i64 24}
!18 = !{!7, !11, i64 40}
!19 = !{!7, !13, i64 96}
!20 = !{!7, !11, i64 48}
!21 = !{!7, !11, i64 104}
!22 = !{!7, !11, i64 32}
!23 = !{!11, !11, i64 0}
!24 = !{!8, !8, i64 0}
!25 = !{!26, !14, i64 40}
!26 = !{!"rule_engine_struct", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !14, i64 40, !14, i64 44, !14, i64 48, !14, i64 52, !11, i64 56, !11, i64 64, !8, i64 72, !8, i64 80}
!27 = !{!26, !11, i64 64}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = distinct !{!30, !29}
!31 = !{!7, !8, i64 88}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LowerExpectIntrinsicPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass