; LLVM IR from whoiswelliton/Computer_Engineering_UTFPR-PB :: Embedded_Systems/TIVA Connected TM4C1294XL Projects/00 - freeRTOS10_on_TIVA (vTaskPrioritySet)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }
%struct.tskTaskControlBlock = type { ptr, %struct.xLIST_ITEM, %struct.xLIST_ITEM, i64, ptr, [32 x i8], i64, i64, [1 x i32], [1 x i8] }
%struct.xLIST_ITEM = type { i32, ptr, ptr, ptr, ptr }

@pxCurrentTCB = external dso_local global ptr, align 8
@pxReadyTasksLists = external hidden global [15 x %struct.xLIST], align 16
@uxTopReadyPriority = external hidden global i64, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @vPortEnterCritical() #1

declare i64 @uxListRemove(ptr noundef) #1

declare void @vListInsertEnd(ptr noundef, ptr noundef) #1

declare void @vPortExitCritical() #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #2

; Function Attrs: nounwind uwtable
define dso_local void @vTaskPrioritySet(ptr noundef %0, i64 noundef %1) #3 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 0, ptr %8, align 8, !tbaa !9
  %9 = load i64, ptr %4, align 8, !tbaa !9
  %10 = icmp ult i64 %9, 15
  %11 = zext i1 %10 to i32
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %15

13:                                               ; preds = %2
  call void @vPortRaiseBASEPRI()
  br label %14

14:                                               ; preds = %14, %13
  br label %14

15:                                               ; preds = %2
  %16 = load i64, ptr %4, align 8, !tbaa !9
  %17 = icmp uge i64 %16, 15
  br i1 %17, label %18, label %19

18:                                               ; preds = %15
  store i64 14, ptr %4, align 8, !tbaa !9
  br label %20

19:                                               ; preds = %15
  br label %20

20:                                               ; preds = %19, %18
  call void @vPortEnterCritical()
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = icmp eq ptr %21, null
  br i1 %22, label %23, label %25

23:                                               ; preds = %20
  %24 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  br label %27

25:                                               ; preds = %20
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  br label %27

27:                                               ; preds = %25, %23
  %28 = phi ptr [ %24, %23 ], [ %26, %25 ]
  store ptr %28, ptr %5, align 8, !tbaa !5
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %29, i32 0, i32 6
  %31 = load i64, ptr %30, align 8, !tbaa !11
  store i64 %31, ptr %6, align 8, !tbaa !9
  %32 = load i64, ptr %6, align 8, !tbaa !9
  %33 = load i64, ptr %4, align 8, !tbaa !9
  %34 = icmp ne i64 %32, %33
  br i1 %34, label %35, label %140

35:                                               ; preds = %27
  %36 = load i64, ptr %4, align 8, !tbaa !9
  %37 = load i64, ptr %6, align 8, !tbaa !9
  %38 = icmp ugt i64 %36, %37
  br i1 %38, label %39, label %54

39:                                               ; preds = %35
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  %42 = icmp ne ptr %40, %41
  br i1 %42, label %43, label %52

43:                                               ; preds = %39
  %44 = load i64, ptr %4, align 8, !tbaa !9
  %45 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %45, i32 0, i32 3
  %47 = load i64, ptr %46, align 8, !tbaa !15
  %48 = icmp uge i64 %44, %47
  br i1 %48, label %49, label %50

49:                                               ; preds = %43
  store i64 1, ptr %8, align 8, !tbaa !9
  br label %51

50:                                               ; preds = %43
  br label %51

51:                                               ; preds = %50, %49
  br label %53

52:                                               ; preds = %39
  br label %53

53:                                               ; preds = %52, %51
  br label %61

54:                                               ; preds = %35
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  %57 = icmp eq ptr %55, %56
  br i1 %57, label %58, label %59

58:                                               ; preds = %54
  store i64 1, ptr %8, align 8, !tbaa !9
  br label %60

59:                                               ; preds = %54
  br label %60

60:                                               ; preds = %59, %58
  br label %61

61:                                               ; preds = %60, %53
  %62 = load ptr, ptr %5, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %62, i32 0, i32 3
  %64 = load i64, ptr %63, align 8, !tbaa !15
  store i64 %64, ptr %7, align 8, !tbaa !9
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %65, i32 0, i32 6
  %67 = load i64, ptr %66, align 8, !tbaa !11
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %68, i32 0, i32 3
  %70 = load i64, ptr %69, align 8, !tbaa !15
  %71 = icmp eq i64 %67, %70
  br i1 %71, label %72, label %76

72:                                               ; preds = %61
  %73 = load i64, ptr %4, align 8, !tbaa !9
  %74 = load ptr, ptr %5, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %74, i32 0, i32 3
  store i64 %73, ptr %75, align 8, !tbaa !15
  br label %77

76:                                               ; preds = %61
  br label %77

77:                                               ; preds = %76, %72
  %78 = load i64, ptr %4, align 8, !tbaa !9
  %79 = load ptr, ptr %5, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %79, i32 0, i32 6
  store i64 %78, ptr %80, align 8, !tbaa !11
  %81 = load ptr, ptr %5, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %81, i32 0, i32 2
  %83 = getelementptr inbounds %struct.xLIST_ITEM, ptr %82, i32 0, i32 0
  %84 = load i32, ptr %83, align 8, !tbaa !16
  %85 = zext i32 %84 to i64
  %86 = and i64 %85, 2147483648
  %87 = icmp eq i64 %86, 0
  br i1 %87, label %88, label %95

88:                                               ; preds = %77
  %89 = load i64, ptr %4, align 8, !tbaa !9
  %90 = trunc i64 %89 to i32
  %91 = sub i32 15, %90
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %92, i32 0, i32 2
  %94 = getelementptr inbounds %struct.xLIST_ITEM, ptr %93, i32 0, i32 0
  store i32 %91, ptr %94, align 8, !tbaa !16
  br label %96

95:                                               ; preds = %77
  br label %96

96:                                               ; preds = %95, %88
  %97 = load ptr, ptr %5, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %97, i32 0, i32 1
  %99 = getelementptr inbounds %struct.xLIST_ITEM, ptr %98, i32 0, i32 4
  %100 = load ptr, ptr %99, align 8, !tbaa !17
  %101 = load i64, ptr %7, align 8, !tbaa !9
  %102 = getelementptr inbounds [15 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %101
  %103 = icmp eq ptr %100, %102
  %104 = zext i1 %103 to i64
  %105 = select i1 %103, i64 1, i64 0
  %106 = icmp ne i64 %105, 0
  br i1 %106, label %107, label %132

107:                                              ; preds = %96
  %108 = load ptr, ptr %5, align 8, !tbaa !5
  %109 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %108, i32 0, i32 1
  %110 = call i64 @uxListRemove(ptr noundef %109)
  %111 = icmp eq i64 %110, 0
  br i1 %111, label %112, label %118

112:                                              ; preds = %107
  %113 = load i64, ptr %7, align 8, !tbaa !9
  %114 = shl i64 1, %113
  %115 = xor i64 %114, -1
  %116 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !9
  %117 = and i64 %116, %115
  store volatile i64 %117, ptr @uxTopReadyPriority, align 8, !tbaa !9
  br label %119

118:                                              ; preds = %107
  br label %119

119:                                              ; preds = %118, %112
  %120 = load ptr, ptr %5, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %120, i32 0, i32 3
  %122 = load i64, ptr %121, align 8, !tbaa !15
  %123 = shl i64 1, %122
  %124 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !9
  %125 = or i64 %124, %123
  store volatile i64 %125, ptr @uxTopReadyPriority, align 8, !tbaa !9
  %126 = load ptr, ptr %5, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %126, i32 0, i32 3
  %128 = load i64, ptr %127, align 8, !tbaa !15
  %129 = getelementptr inbounds [15 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %128
  %130 = load ptr, ptr %5, align 8, !tbaa !5
  %131 = getelementptr inbounds %struct.tskTaskControlBlock, ptr %130, i32 0, i32 1
  call void @vListInsertEnd(ptr noundef %129, ptr noundef %131)
  br label %133

132:                                              ; preds = %96
  br label %133

133:                                              ; preds = %132, %119
  %134 = load i64, ptr %8, align 8, !tbaa !9
  %135 = icmp ne i64 %134, 0
  br i1 %135, label %136, label %137

136:                                              ; preds = %133
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !18
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !19
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !20
  br label %138

137:                                              ; preds = %133
  br label %138

138:                                              ; preds = %137, %136
  %139 = load i64, ptr %7, align 8, !tbaa !9
  br label %140

140:                                              ; preds = %138, %27
  call void @vPortExitCritical()
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 136}
!12 = !{!"tskTaskControlBlock", !6, i64 0, !13, i64 8, !13, i64 48, !10, i64 88, !6, i64 96, !7, i64 104, !10, i64 136, !10, i64 144, !7, i64 152, !7, i64 156}
!13 = !{!"xLIST_ITEM", !14, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !10, i64 88}
!16 = !{!12, !14, i64 48}
!17 = !{!12, !6, i64 40}
!18 = !{!14, !14, i64 0}
!19 = !{i64 2148433489}
!20 = !{i64 2148433558}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }

@pxCurrentTCB = external dso_local global ptr, align 8
@pxReadyTasksLists = external hidden global [15 x %struct.xLIST], align 16
@uxTopReadyPriority = external hidden global i64, align 8

declare void @vPortEnterCritical() local_unnamed_addr #0

declare i64 @uxListRemove(ptr noundef) local_unnamed_addr #0

declare void @vListInsertEnd(ptr noundef, ptr noundef) local_unnamed_addr #0

declare void @vPortExitCritical() local_unnamed_addr #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @vTaskPrioritySet(ptr noundef %0, i64 noundef %1) local_unnamed_addr #2 {
  %3 = icmp ugt i64 %1, 14
  br i1 %3, label %4, label %6

4:                                                ; preds = %2
  tail call void @vPortRaiseBASEPRI()
  br label %5

5:                                                ; preds = %5, %4
  br label %5

6:                                                ; preds = %2
  tail call void @vPortEnterCritical() #3
  %7 = icmp eq ptr %0, null
  br i1 %7, label %8, label %10

8:                                                ; preds = %6
  %9 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  br label %10

10:                                               ; preds = %6, %8
  %11 = phi ptr [ %9, %8 ], [ %0, %6 ]
  %12 = getelementptr inbounds i8, ptr %11, i64 136
  %13 = load i64, ptr %12, align 8, !tbaa !9
  %.not = icmp eq i64 %13, %1
  br i1 %.not, label %58, label %14

14:                                               ; preds = %10
  %15 = icmp ult i64 %13, %1
  %16 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  br i1 %15, label %17, label %22

17:                                               ; preds = %14
  %.not32 = icmp eq ptr %11, %16
  br i1 %.not32, label %24, label %18

18:                                               ; preds = %17
  %19 = load volatile ptr, ptr @pxCurrentTCB, align 8, !tbaa !5
  %20 = getelementptr inbounds i8, ptr %19, i64 88
  %21 = load i64, ptr %20, align 8, !tbaa !14
  %.not33 = icmp ugt i64 %21, %1
  br label %24

22:                                               ; preds = %14
  %23 = icmp ne ptr %11, %16
  br label %24

24:                                               ; preds = %22, %18, %17
  %.not34 = phi i1 [ true, %17 ], [ %.not33, %18 ], [ %23, %22 ]
  %25 = getelementptr inbounds i8, ptr %11, i64 88
  %26 = load i64, ptr %25, align 8, !tbaa !14
  %27 = icmp eq i64 %13, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %24
  store i64 %1, ptr %25, align 8, !tbaa !14
  br label %29

29:                                               ; preds = %24, %28
  store i64 %1, ptr %12, align 8, !tbaa !9
  %30 = getelementptr inbounds i8, ptr %11, i64 48
  %31 = load i32, ptr %30, align 8, !tbaa !15
  %32 = icmp sgt i32 %31, -1
  br i1 %32, label %33, label %36

33:                                               ; preds = %29
  %34 = trunc nuw i64 %1 to i32
  %35 = sub nuw nsw i32 15, %34
  store i32 %35, ptr %30, align 8, !tbaa !15
  br label %36

36:                                               ; preds = %29, %33
  %37 = getelementptr inbounds i8, ptr %11, i64 8
  %38 = getelementptr inbounds i8, ptr %11, i64 40
  %39 = load ptr, ptr %38, align 8, !tbaa !16
  %40 = getelementptr inbounds [15 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %26
  %41 = icmp eq ptr %39, %40
  br i1 %41, label %42, label %56

42:                                               ; preds = %36
  %43 = tail call i64 @uxListRemove(ptr noundef nonnull %37) #3
  %44 = icmp eq i64 %43, 0
  br i1 %44, label %45, label %50

45:                                               ; preds = %42
  %46 = shl nuw i64 1, %26
  %47 = xor i64 %46, -1
  %48 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !17
  %49 = and i64 %48, %47
  store volatile i64 %49, ptr @uxTopReadyPriority, align 8, !tbaa !17
  br label %50

50:                                               ; preds = %42, %45
  %51 = load i64, ptr %25, align 8, !tbaa !14
  %52 = shl nuw i64 1, %51
  %53 = load volatile i64, ptr @uxTopReadyPriority, align 8, !tbaa !17
  %54 = or i64 %53, %52
  store volatile i64 %54, ptr @uxTopReadyPriority, align 8, !tbaa !17
  %55 = getelementptr inbounds [15 x %struct.xLIST], ptr @pxReadyTasksLists, i64 0, i64 %51
  tail call void @vListInsertEnd(ptr noundef nonnull %55, ptr noundef nonnull %37) #3
  br label %56

56:                                               ; preds = %36, %50
  br i1 %.not34, label %58, label %57

57:                                               ; preds = %56
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !18
  tail call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !19
  tail call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !20
  br label %58

58:                                               ; preds = %57, %56, %10
  tail call void @vPortExitCritical() #3
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 136}
!10 = !{!"tskTaskControlBlock", !6, i64 0, !11, i64 8, !11, i64 48, !13, i64 88, !6, i64 96, !7, i64 104, !13, i64 136, !13, i64 144, !7, i64 152, !7, i64 156}
!11 = !{!"xLIST_ITEM", !12, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32}
!12 = !{!"int", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!10, !13, i64 88}
!15 = !{!10, !12, i64 48}
!16 = !{!10, !6, i64 40}
!17 = !{!13, !13, i64 0}
!18 = !{!12, !12, i64 0}
!19 = !{i64 2148433489}
!20 = !{i64 2148433558}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass