; LLVM IR from mickypaganini/SSI2016-jet-clustering :: spartyjet-4.0.2_mac/External/fastjet-3.0.0/plugins/SISCone/siscone/siscone/pro_c1d57912 (EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.siscone::Cborder_store" = type <{ ptr, double, i8, [7 x i8] }>
%"class.siscone::Cstable_cones" = type { %"class.siscone::Cvicinity", %"class.std::vector", ptr, i32, double, double, %"class.siscone::Cmomentum", ptr, ptr, i32, i32, %"class.siscone::Cmomentum", %"class.std::vector.10", %"class.std::vector.15", double }
%"class.siscone::Cvicinity" = type { ptr, double, double, double, double, double, double, i32, %"class.std::vector", %"class.std::vector.0", ptr, %"class.std::vector.5", i32, double, double }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.siscone::Cmomentum" = type <{ double, double, double, double, double, double, i32, i32, %"class.siscone::Creference", [4 x i8] }>
%"class.siscone::Creference" = type { [3 x i32] }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN7siscone9Cmomentum12build_etaphiEv(ptr noundef nonnull align 8 dereferenceable(68)) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7siscone13Cstable_cones14test_stabilityERNS_9CmomentumERKSt6vectorINS_13Cborder_storeESaIS4_EE(ptr noundef nonnull align 8 dereferenceable(448) %0, ptr noundef nonnull align 8 dereferenceable(68) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %10 = load ptr, ptr %4, align 8
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN7siscone9Cmomentum12build_etaphiEv(ptr noundef nonnull align 8 dereferenceable(68) %11)
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #5
  store i8 1, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !11
  br label %12

12:                                               ; preds = %41, %3
  %13 = load i32, ptr %8, align 4, !tbaa !11
  %14 = zext i32 %13 to i64
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = call noundef i64 @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15) #5
  %17 = icmp ult i64 %14, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %12
  store i32 2, ptr %9, align 4
  br label %44

19:                                               ; preds = %12
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  %22 = load i32, ptr %8, align 4, !tbaa !11
  %23 = zext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(17) ptr @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23) #5
  %25 = getelementptr inbounds %"class.siscone::Cborder_store", ptr %24, i32 0, i32 0
  %26 = load ptr, ptr %25, align 8, !tbaa !13
  %27 = call noundef zeroext i1 @_ZN7siscone13Cstable_cones9is_insideEPNS_9CmomentumES2_(ptr noundef nonnull align 8 dereferenceable(448) %10, ptr noundef %20, ptr noundef %26)
  %28 = zext i1 %27 to i32
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load i32, ptr %8, align 4, !tbaa !11
  %31 = zext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(17) ptr @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31) #5
  %33 = getelementptr inbounds %"class.siscone::Cborder_store", ptr %32, i32 0, i32 2
  %34 = load i8, ptr %33, align 8, !tbaa !16, !range !17, !noundef !18
  %35 = trunc i8 %34 to i1
  %36 = zext i1 %35 to i32
  %37 = xor i32 %28, %36
  %38 = icmp ne i32 %37, 0
  br i1 %38, label %39, label %40

39:                                               ; preds = %19
  store i8 0, ptr %7, align 1, !tbaa !9
  store i32 2, ptr %9, align 4
  br label %44

40:                                               ; preds = %19
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %8, align 4, !tbaa !11
  %43 = add i32 %42, 1
  store i32 %43, ptr %8, align 4, !tbaa !11
  br label %12, !llvm.loop !19

44:                                               ; preds = %39, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  br label %45

45:                                               ; preds = %44
  %46 = load i8, ptr %7, align 1, !tbaa !9, !range !17, !noundef !18
  %47 = trunc i8 %46 to i1
  br i1 %47, label %48, label %53

48:                                               ; preds = %45
  %49 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %10, i32 0, i32 2
  %50 = load ptr, ptr %49, align 8, !tbaa !21
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = call noundef i32 @_ZN7siscone10hash_cones6insertEPNS_9CmomentumE(ptr noundef nonnull align 8 dereferenceable(24) %50, ptr noundef %51)
  br label %53

53:                                               ; preds = %48, %45
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN7siscone13Cstable_cones9is_insideEPNS_9CmomentumES2_(ptr noundef nonnull align 8 dereferenceable(448), ptr noundef, ptr noundef) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(17) ptr @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

declare noundef i32 @_ZN7siscone10hash_cones6insertEPNS_9CmomentumE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"_ZTSN7siscone13Cborder_storeE", !6, i64 0, !15, i64 8, !10, i64 16}
!15 = !{!"double", !7, i64 0}
!16 = !{!14, !10, i64 16}
!17 = !{i8 0, i8 2}
!18 = !{}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!22, !6, i64 192}
!22 = !{!"_ZTSN7siscone13Cstable_conesE", !23, i64 0, !24, i64 168, !6, i64 192, !12, i64 200, !15, i64 208, !15, i64 216, !36, i64 224, !6, i64 296, !6, i64 304, !12, i64 312, !12, i64 316, !36, i64 320, !38, i64 392, !42, i64 416, !15, i64 440}
!23 = !{!"_ZTSN7siscone9CvicinityE", !6, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !15, i64 48, !12, i64 56, !24, i64 64, !28, i64 88, !6, i64 112, !32, i64 120, !12, i64 144, !15, i64 152, !15, i64 160}
!24 = !{!"_ZTSSt6vectorIN7siscone9CmomentumESaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTSSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTSSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{!"_ZTSN7siscone9CmomentumE", !15, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !12, i64 48, !12, i64 52, !37, i64 56}
!37 = !{!"_ZTSN7siscone10CreferenceE", !7, i64 0}
!38 = !{!"_ZTSSt6vectorIPN7siscone9CmomentumESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!42 = !{!"_ZTSSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !43, i64 0}
!43 = !{!"_ZTSSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !44, i64 0}
!44 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE12_Vector_implE", !45, i64 0}
!45 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @_ZN7siscone9Cmomentum12build_etaphiEv(ptr noundef nonnull align 8 dereferenceable(68)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7siscone13Cstable_cones14test_stabilityERNS_9CmomentumERKSt6vectorINS_13Cborder_storeESaIS4_EE(ptr noundef nonnull align 8 dereferenceable(448) %0, ptr noundef nonnull align 8 dereferenceable(68) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #1 align 2 {
  tail call void @_ZN7siscone9Cmomentum12build_etaphiEv(ptr noundef nonnull align 8 dereferenceable(68) %1)
  %4 = tail call noundef i64 @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  %.not1314.not = icmp eq i64 %4, 0
  br i1 %.not1314.not, label %.critedge, label %.lr.ph

5:                                                ; preds = %.lr.ph
  %6 = add i32 %.015, 1
  %7 = zext i32 %6 to i64
  %8 = tail call noundef i64 @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #4
  %.not13 = icmp ugt i64 %8, %7
  br i1 %.not13, label %.lr.ph, label %.critedge, !llvm.loop !5

.lr.ph:                                           ; preds = %3, %5
  %9 = phi i64 [ %7, %5 ], [ 0, %3 ]
  %.015 = phi i32 [ %6, %5 ], [ 0, %3 ]
  %10 = tail call noundef nonnull align 8 dereferenceable(17) ptr @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %9) #4
  %11 = load ptr, ptr %10, align 8, !tbaa !7
  %12 = tail call noundef zeroext i1 @_ZN7siscone13Cstable_cones9is_insideEPNS_9CmomentumES2_(ptr noundef nonnull align 8 dereferenceable(448) %0, ptr noundef nonnull %1, ptr noundef %11)
  %13 = tail call noundef nonnull align 8 dereferenceable(17) ptr @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %9) #4
  %14 = getelementptr inbounds i8, ptr %13, i64 16
  %15 = load i8, ptr %14, align 8, !tbaa !14, !range !15, !noundef !16
  %16 = zext i1 %12 to i8
  %.not = icmp eq i8 %15, %16
  br i1 %.not, label %5, label %.loopexit

.critedge:                                        ; preds = %5, %3
  %17 = getelementptr inbounds i8, ptr %0, i64 192
  %18 = load ptr, ptr %17, align 8, !tbaa !17
  %19 = tail call noundef i32 @_ZN7siscone10hash_cones6insertEPNS_9CmomentumE(ptr noundef nonnull align 8 dereferenceable(24) %18, ptr noundef nonnull %1)
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %.critedge
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN7siscone13Cstable_cones9is_insideEPNS_9CmomentumES2_(ptr noundef nonnull align 8 dereferenceable(448), ptr noundef, ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(17) ptr @_ZNKSt6vectorIN7siscone13Cborder_storeESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

declare noundef i32 @_ZN7siscone10hash_cones6insertEPNS_9CmomentumE(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !9, i64 0}
!8 = !{!"_ZTSN7siscone13Cborder_storeE", !9, i64 0, !12, i64 8, !13, i64 16}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = !{!"double", !10, i64 0}
!13 = !{!"bool", !10, i64 0}
!14 = !{!8, !13, i64 16}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!18, !9, i64 192}
!18 = !{!"_ZTSN7siscone13Cstable_conesE", !19, i64 0, !21, i64 168, !9, i64 192, !20, i64 200, !12, i64 208, !12, i64 216, !33, i64 224, !9, i64 296, !9, i64 304, !20, i64 312, !20, i64 316, !33, i64 320, !35, i64 392, !39, i64 416, !12, i64 440}
!19 = !{!"_ZTSN7siscone9CvicinityE", !9, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !20, i64 56, !21, i64 64, !25, i64 88, !9, i64 112, !29, i64 120, !20, i64 144, !12, i64 152, !12, i64 160}
!20 = !{!"int", !10, i64 0}
!21 = !{!"_ZTSSt6vectorIN7siscone9CmomentumESaIS1_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!25 = !{!"_ZTSSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!29 = !{!"_ZTSSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!33 = !{!"_ZTSN7siscone9CmomentumE", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !20, i64 48, !20, i64 52, !34, i64 56}
!34 = !{!"_ZTSN7siscone10CreferenceE", !10, i64 0}
!35 = !{!"_ZTSSt6vectorIPN7siscone9CmomentumESaIS2_EE", !36, i64 0}
!36 = !{!"_ZTSSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE12_Vector_implE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}
!39 = !{!"_ZTSSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !40, i64 0}
!40 = !{!"_ZTSSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE12_Vector_implE", !42, i64 0}
!42 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE17_Vector_impl_dataE", !9, i64 0, !9, i64 8, !9, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass