; LLVM IR from whoiswelliton/Computer_Engineering_UTFPR-PB :: Embedded_Systems/TIVA Connected TM4C1294XL Projects/01 - lwIP_HTTPServer_on_TIVA (memfind)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.pbuf = type { ptr, ptr, i16, i16, i8, i8, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @pbuf_memcmp(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @pbuf_memfind(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i16 noundef zeroext %3) #1 {
  %5 = alloca i16, align 2
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i16, align 2
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i16, align 2
  %12 = alloca i16, align 2
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i16 %2, ptr %8, align 2, !tbaa !9
  store i16 %3, ptr %9, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %11) #2
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.pbuf, ptr %14, i32 0, i32 2
  %16 = load i16, ptr %15, align 8, !tbaa !11
  %17 = zext i16 %16 to i32
  %18 = load i16, ptr %8, align 2, !tbaa !9
  %19 = zext i16 %18 to i32
  %20 = sub nsw i32 %17, %19
  %21 = trunc i32 %20 to i16
  store i16 %21, ptr %11, align 2, !tbaa !9
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.pbuf, ptr %22, i32 0, i32 2
  %24 = load i16, ptr %23, align 8, !tbaa !11
  %25 = zext i16 %24 to i32
  %26 = load i16, ptr %8, align 2, !tbaa !9
  %27 = zext i16 %26 to i32
  %28 = load i16, ptr %9, align 2, !tbaa !9
  %29 = zext i16 %28 to i32
  %30 = add nsw i32 %27, %29
  %31 = icmp sge i32 %25, %30
  br i1 %31, label %32, label %59

32:                                               ; preds = %4
  %33 = load i16, ptr %9, align 2, !tbaa !9
  store i16 %33, ptr %10, align 2, !tbaa !9
  br label %34

34:                                               ; preds = %55, %32
  %35 = load i16, ptr %10, align 2, !tbaa !9
  %36 = zext i16 %35 to i32
  %37 = load i16, ptr %11, align 2, !tbaa !9
  %38 = zext i16 %37 to i32
  %39 = icmp sle i32 %36, %38
  br i1 %39, label %40, label %58

40:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #2
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = load i16, ptr %10, align 2, !tbaa !9
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load i16, ptr %8, align 2, !tbaa !9
  %45 = call zeroext i16 @pbuf_memcmp(ptr noundef %41, i16 noundef zeroext %42, ptr noundef %43, i16 noundef zeroext %44)
  store i16 %45, ptr %12, align 2, !tbaa !9
  %46 = load i16, ptr %12, align 2, !tbaa !9
  %47 = zext i16 %46 to i32
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %51

49:                                               ; preds = %40
  %50 = load i16, ptr %10, align 2, !tbaa !9
  store i16 %50, ptr %5, align 2
  store i32 1, ptr %13, align 4
  br label %52

51:                                               ; preds = %40
  store i32 0, ptr %13, align 4
  br label %52

52:                                               ; preds = %51, %49
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #2
  %53 = load i32, ptr %13, align 4
  switch i32 %53, label %60 [
    i32 0, label %54
  ]

54:                                               ; preds = %52
  br label %55

55:                                               ; preds = %54
  %56 = load i16, ptr %10, align 2, !tbaa !9
  %57 = add i16 %56, 1
  store i16 %57, ptr %10, align 2, !tbaa !9
  br label %34, !llvm.loop !13

58:                                               ; preds = %34
  br label %59

59:                                               ; preds = %58, %4
  store i16 -1, ptr %5, align 2
  store i32 1, ptr %13, align 4
  br label %60

60:                                               ; preds = %59, %52
  call void @llvm.lifetime.end.p0(i64 2, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #2
  %61 = load i16, ptr %5, align 2
  ret i16 %61
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"pbuf", !6, i64 0, !6, i64 8, !10, i64 16, !10, i64 18, !7, i64 20, !7, i64 21, !7, i64 22, !7, i64 23}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @pbuf_memcmp(ptr noundef, i16 noundef zeroext, ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i16 @pbuf_memfind(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2, i16 noundef zeroext %3) local_unnamed_addr #0 {
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  %6 = load i16, ptr %5, align 8, !tbaa !5
  %7 = zext i16 %6 to i32
  %8 = zext i16 %2 to i32
  %9 = sub i16 %6, %2
  %10 = zext i16 %3 to i32
  %11 = add nuw nsw i32 %10, %8
  %.not = icmp ugt i32 %11, %7
  %.not1820 = icmp ult i16 %9, %3
  %or.cond = or i1 %.not, %.not1820
  br i1 %or.cond, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %4, %13
  %.01721 = phi i16 [ %14, %13 ], [ %3, %4 ]
  %12 = tail call zeroext i16 @pbuf_memcmp(ptr noundef %0, i16 noundef zeroext %.01721, ptr noundef %1, i16 noundef zeroext %2)
  %.not19 = icmp eq i16 %12, 0
  br i1 %.not19, label %.loopexit, label %13

13:                                               ; preds = %.lr.ph
  %14 = add i16 %.01721, 1
  %.not18 = icmp ugt i16 %14, %9
  br i1 %.not18, label %.loopexit, label %.lr.ph, !llvm.loop !11

.loopexit:                                        ; preds = %.lr.ph, %13, %4
  %.2 = phi i16 [ -1, %4 ], [ %.01721, %.lr.ph ], [ -1, %13 ]
  ret i16 %.2
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"pbuf", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 18, !8, i64 20, !8, i64 21, !8, i64 22, !8, i64 23}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass