; LLVM IR from gzc/CLRS :: C06-Heapsort/p_queue.ll (ZN7p_queue12increase_keyEii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.p_queue = type { [10000 x i32], i32 }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004), i32 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7p_queue12increase_keyEii(ptr noundef nonnull align 4 dereferenceable(40004) %0, i32 noundef %1, i32 noundef %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  %7 = load ptr, ptr %4, align 8
  %8 = getelementptr inbounds %class.p_queue, ptr %7, i32 0, i32 0
  %9 = load i32, ptr %5, align 4, !tbaa !9
  %10 = sext i32 %9 to i64
  %11 = getelementptr inbounds [10000 x i32], ptr %8, i64 0, i64 %10
  %12 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %13 = load i32, ptr %12, align 4, !tbaa !9
  %14 = getelementptr inbounds %class.p_queue, ptr %7, i32 0, i32 0
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [10000 x i32], ptr %14, i64 0, i64 %16
  store i32 %13, ptr %17, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %36, %3
  %19 = load i32, ptr %5, align 4, !tbaa !9
  %20 = icmp sgt i32 %19, 0
  br i1 %20, label %21, label %34

21:                                               ; preds = %18
  %22 = getelementptr inbounds %class.p_queue, ptr %7, i32 0, i32 0
  %23 = load i32, ptr %5, align 4, !tbaa !9
  %24 = call noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004) %7, i32 noundef %23)
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [10000 x i32], ptr %22, i64 0, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = getelementptr inbounds %class.p_queue, ptr %7, i32 0, i32 0
  %29 = load i32, ptr %5, align 4, !tbaa !9
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [10000 x i32], ptr %28, i64 0, i64 %30
  %32 = load i32, ptr %31, align 4, !tbaa !9
  %33 = icmp slt i32 %27, %32
  br label %34

34:                                               ; preds = %21, %18
  %35 = phi i1 [ false, %18 ], [ %33, %21 ]
  br i1 %35, label %36, label %48

36:                                               ; preds = %34
  %37 = getelementptr inbounds %class.p_queue, ptr %7, i32 0, i32 0
  %38 = load i32, ptr %5, align 4, !tbaa !9
  %39 = call noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004) %7, i32 noundef %38)
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [10000 x i32], ptr %37, i64 0, i64 %40
  %42 = getelementptr inbounds %class.p_queue, ptr %7, i32 0, i32 0
  %43 = load i32, ptr %5, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [10000 x i32], ptr %42, i64 0, i64 %44
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %41, ptr noundef nonnull align 4 dereferenceable(4) %45) #3
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = call noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004) %7, i32 noundef %46)
  store i32 %47, ptr %5, align 4, !tbaa !9
  br label %18, !llvm.loop !11

48:                                               ; preds = %34
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7p_queue12increase_keyEii(ptr noundef nonnull align 4 dereferenceable(40004) %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = alloca i32, align 4
  store i32 %2, ptr %4, align 4, !tbaa !5
  %5 = sext i32 %1 to i64
  %6 = getelementptr inbounds [10000 x i32], ptr %0, i64 0, i64 %5
  %7 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %8 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %8, ptr %6, align 4, !tbaa !5
  %9 = icmp sgt i32 %1, 0
  br i1 %9, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %3, %18
  %.08 = phi i32 [ %22, %18 ], [ %1, %3 ]
  %10 = call noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004) %0, i32 noundef %.08)
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [10000 x i32], ptr %0, i64 0, i64 %11
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = zext nneg i32 %.08 to i64
  %15 = getelementptr inbounds [10000 x i32], ptr %0, i64 0, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = icmp slt i32 %13, %16
  br i1 %17, label %18, label %.critedge

18:                                               ; preds = %.lr.ph
  %19 = call noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004) %0, i32 noundef %.08)
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [10000 x i32], ptr %0, i64 0, i64 %20
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull align 4 dereferenceable(4) %15) #2
  %22 = call noundef i32 @_ZN7p_queue6parentEi(ptr noundef nonnull align 4 dereferenceable(40004) %0, i32 noundef %.08)
  %23 = icmp sgt i32 %22, 0
  br i1 %23, label %.lr.ph, label %.critedge, !llvm.loop !9

.critedge:                                        ; preds = %.lr.ph, %18, %3
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3maxIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass