; LLVM IR from niessner/Matterport :: code/gaps/pkgs/R3Shapes/R3Mesh.ll (ZN10R3MeshEdgeC2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.R3MeshEdge = type { ptr, [2 x ptr], [2 x ptr], double, i32, %class.RNFlags, double, i32, ptr }
%class.RNFlags = type { i64 }

@_ZTV10R3MeshEdge = external dso_local unnamed_addr constant { [4 x ptr] }, align 8

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7RNFlagsC2Em(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10R3MeshEdgeC2Ev(ptr noundef nonnull align 8 dereferenceable(88) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  store ptr getelementptr inbounds inrange(-16, 16) ({ [4 x ptr] }, ptr @_ZTV10R3MeshEdge, i32 0, i32 0, i32 2), ptr %3, align 8, !tbaa !9
  %4 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 3
  store double 0.000000e+00, ptr %4, align 8, !tbaa !11
  %5 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 4
  store i32 -1, ptr %5, align 8, !tbaa !17
  %6 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 5
  call void @_ZN7RNFlagsC2Em(ptr noundef nonnull align 8 dereferenceable(8) %6, i64 noundef 0)
  %7 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 6
  store double 0.000000e+00, ptr %7, align 8, !tbaa !18
  %8 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 7
  store i32 0, ptr %8, align 8, !tbaa !19
  %9 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 8
  store ptr null, ptr %9, align 8, !tbaa !20
  %10 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 1
  %11 = getelementptr inbounds [2 x ptr], ptr %10, i64 0, i64 1
  store ptr null, ptr %11, align 8, !tbaa !5
  %12 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 1
  %13 = getelementptr inbounds [2 x ptr], ptr %12, i64 0, i64 0
  store ptr null, ptr %13, align 8, !tbaa !5
  %14 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 2
  %15 = getelementptr inbounds [2 x ptr], ptr %14, i64 0, i64 1
  store ptr null, ptr %15, align 8, !tbaa !5
  %16 = getelementptr inbounds %class.R3MeshEdge, ptr %3, i32 0, i32 2
  %17 = getelementptr inbounds [2 x ptr], ptr %16, i64 0, i64 0
  store ptr null, ptr %17, align 8, !tbaa !5
  ret void
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !13, i64 40}
!12 = !{!"_ZTS10R3MeshEdge", !7, i64 8, !7, i64 24, !13, i64 40, !14, i64 48, !15, i64 56, !13, i64 64, !14, i64 72, !6, i64 80}
!13 = !{!"double", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"_ZTS7RNFlags", !16, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!12, !14, i64 48}
!18 = !{!12, !13, i64 64}
!19 = !{!12, !14, i64 72}
!20 = !{!12, !6, i64 80}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTV10R3MeshEdge = external dso_local unnamed_addr constant { [4 x ptr] }, align 8

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN7RNFlagsC2Em(ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10R3MeshEdgeC2Ev(ptr noundef nonnull align 8 dereferenceable(88) %0) unnamed_addr #1 align 2 {
  store ptr getelementptr inbounds inrange(-16, 16) (i8, ptr @_ZTV10R3MeshEdge, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 40
  store double 0.000000e+00, ptr %2, align 8, !tbaa !8
  %3 = getelementptr inbounds i8, ptr %0, i64 48
  store i32 -1, ptr %3, align 8, !tbaa !16
  %4 = getelementptr inbounds i8, ptr %0, i64 56
  tail call void @_ZN7RNFlagsC2Em(ptr noundef nonnull align 8 dereferenceable(8) %4, i64 noundef 0)
  %5 = getelementptr inbounds i8, ptr %0, i64 64
  store double 0.000000e+00, ptr %5, align 8, !tbaa !17
  %6 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 0, ptr %6, align 8, !tbaa !18
  %7 = getelementptr inbounds i8, ptr %0, i64 80
  store ptr null, ptr %7, align 8, !tbaa !19
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %8, i8 0, i64 32, i1 false)
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !11, i64 40}
!9 = !{!"_ZTS10R3MeshEdge", !10, i64 8, !10, i64 24, !11, i64 40, !12, i64 48, !13, i64 56, !11, i64 64, !12, i64 72, !15, i64 80}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = !{!"double", !10, i64 0}
!12 = !{!"int", !10, i64 0}
!13 = !{!"_ZTS7RNFlags", !14, i64 0}
!14 = !{!"long", !10, i64 0}
!15 = !{!"any pointer", !10, i64 0}
!16 = !{!9, !12, i64 48}
!17 = !{!9, !11, i64 64}
!18 = !{!9, !12, i64 72}
!19 = !{!9, !15, i64 80}


; Effective O3 passes: EarlyCSEPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,TailCallElimPass