; LLVM IR from whoiswelliton/Computer_Engineering_UTFPR-PB :: Embedded_Systems/TIVA Connected TM4C1294XL Projects/00 - freeRTOS10_on_TIVA (xQueueGenericReset)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QueueDefinition = type { ptr, ptr, %union.anon, %struct.xLIST, %struct.xLIST, i64, i64, i64, i8, i8 }
%union.anon = type { %struct.QueuePointers }
%struct.QueuePointers = type { ptr, ptr }
%struct.xLIST = type { i64, ptr, %struct.xMINI_LIST_ITEM }
%struct.xMINI_LIST_ITEM = type { i32, ptr, ptr }

; Function Attrs: nounwind uwtable
define dso_local i64 @xQueueGenericReset(ptr noundef %0, i64 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #4
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %6, ptr %5, align 8, !tbaa !5
  %7 = load ptr, ptr %5, align 8, !tbaa !5
  %8 = icmp eq ptr %7, null
  br i1 %8, label %9, label %11

9:                                                ; preds = %2
  call void @vPortRaiseBASEPRI()
  br label %10

10:                                               ; preds = %10, %9
  br label %10

11:                                               ; preds = %2
  call void @vPortEnterCritical()
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.QueueDefinition, ptr %12, i32 0, i32 0
  %14 = load ptr, ptr %13, align 8, !tbaa !11
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.QueueDefinition, ptr %15, i32 0, i32 6
  %17 = load i64, ptr %16, align 8, !tbaa !16
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.QueueDefinition, ptr %18, i32 0, i32 7
  %20 = load i64, ptr %19, align 8, !tbaa !17
  %21 = mul i64 %17, %20
  %22 = getelementptr inbounds i8, ptr %14, i64 %21
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.QueueDefinition, ptr %23, i32 0, i32 2
  %25 = getelementptr inbounds %struct.QueuePointers, ptr %24, i32 0, i32 0
  store ptr %22, ptr %25, align 8, !tbaa !18
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.QueueDefinition, ptr %26, i32 0, i32 5
  store volatile i64 0, ptr %27, align 8, !tbaa !19
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.QueueDefinition, ptr %28, i32 0, i32 0
  %30 = load ptr, ptr %29, align 8, !tbaa !11
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.QueueDefinition, ptr %31, i32 0, i32 1
  store ptr %30, ptr %32, align 8, !tbaa !20
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.QueueDefinition, ptr %33, i32 0, i32 0
  %35 = load ptr, ptr %34, align 8, !tbaa !11
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.QueueDefinition, ptr %36, i32 0, i32 6
  %38 = load i64, ptr %37, align 8, !tbaa !16
  %39 = sub i64 %38, 1
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.QueueDefinition, ptr %40, i32 0, i32 7
  %42 = load i64, ptr %41, align 8, !tbaa !17
  %43 = mul i64 %39, %42
  %44 = getelementptr inbounds i8, ptr %35, i64 %43
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.QueueDefinition, ptr %45, i32 0, i32 2
  %47 = getelementptr inbounds %struct.QueuePointers, ptr %46, i32 0, i32 1
  store ptr %44, ptr %47, align 8, !tbaa !18
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.QueueDefinition, ptr %48, i32 0, i32 8
  store volatile i8 -1, ptr %49, align 8, !tbaa !21
  %50 = load ptr, ptr %5, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.QueueDefinition, ptr %50, i32 0, i32 9
  store volatile i8 -1, ptr %51, align 1, !tbaa !22
  %52 = load i64, ptr %4, align 8, !tbaa !9
  %53 = icmp eq i64 %52, 0
  br i1 %53, label %54, label %73

54:                                               ; preds = %11
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.QueueDefinition, ptr %55, i32 0, i32 3
  %57 = getelementptr inbounds %struct.xLIST, ptr %56, i32 0, i32 0
  %58 = load volatile i64, ptr %57, align 8, !tbaa !23
  %59 = icmp eq i64 %58, 0
  %60 = zext i1 %59 to i64
  %61 = select i1 %59, i64 1, i64 0
  %62 = icmp eq i64 %61, 0
  br i1 %62, label %63, label %71

63:                                               ; preds = %54
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.QueueDefinition, ptr %64, i32 0, i32 3
  %66 = call i64 @xTaskRemoveFromEventList(ptr noundef %65)
  %67 = icmp ne i64 %66, 0
  br i1 %67, label %68, label %69

68:                                               ; preds = %63
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !24
  call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !25
  call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !26
  br label %70

69:                                               ; preds = %63
  br label %70

70:                                               ; preds = %69, %68
  br label %72

71:                                               ; preds = %54
  br label %72

72:                                               ; preds = %71, %70
  br label %78

73:                                               ; preds = %11
  %74 = load ptr, ptr %5, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.QueueDefinition, ptr %74, i32 0, i32 3
  call void @vListInitialise(ptr noundef %75)
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.QueueDefinition, ptr %76, i32 0, i32 4
  call void @vListInitialise(ptr noundef %77)
  br label %78

78:                                               ; preds = %73, %72
  call void @vPortExitCritical()
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #4
  ret i64 1
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #2

declare void @vPortEnterCritical() #3

declare i64 @xTaskRemoveFromEventList(ptr noundef) #3

declare void @vListInitialise(ptr noundef) #3

declare void @vPortExitCritical() #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"QueueDefinition", !6, i64 0, !6, i64 8, !7, i64 16, !13, i64 32, !13, i64 72, !10, i64 112, !10, i64 120, !10, i64 128, !7, i64 136, !7, i64 137}
!13 = !{!"xLIST", !10, i64 0, !6, i64 8, !14, i64 16}
!14 = !{!"xMINI_LIST_ITEM", !15, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"int", !7, i64 0}
!16 = !{!12, !10, i64 120}
!17 = !{!12, !10, i64 128}
!18 = !{!7, !7, i64 0}
!19 = !{!12, !10, i64 112}
!20 = !{!12, !6, i64 8}
!21 = !{!12, !7, i64 136}
!22 = !{!12, !7, i64 137}
!23 = !{!12, !10, i64 32}
!24 = !{!15, !15, i64 0}
!25 = !{i64 2148257297}
!26 = !{i64 2148257366}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef i64 @xQueueGenericReset(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq ptr %0, null
  br i1 %3, label %4, label %6

4:                                                ; preds = %2
  tail call void @vPortRaiseBASEPRI()
  br label %5

5:                                                ; preds = %5, %4
  br label %5

6:                                                ; preds = %2
  tail call void @vPortEnterCritical() #3
  %7 = load ptr, ptr %0, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 120
  %9 = load i64, ptr %8, align 8, !tbaa !14
  %10 = getelementptr inbounds i8, ptr %0, i64 128
  %11 = load i64, ptr %10, align 8, !tbaa !15
  %12 = mul i64 %11, %9
  %13 = getelementptr inbounds i8, ptr %7, i64 %12
  %14 = getelementptr inbounds i8, ptr %0, i64 16
  store ptr %13, ptr %14, align 8, !tbaa !16
  %15 = getelementptr inbounds i8, ptr %0, i64 112
  store volatile i64 0, ptr %15, align 8, !tbaa !17
  %16 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %7, ptr %16, align 8, !tbaa !18
  %17 = add i64 %9, -1
  %18 = mul i64 %17, %11
  %19 = getelementptr inbounds i8, ptr %7, i64 %18
  %20 = getelementptr inbounds i8, ptr %0, i64 24
  store ptr %19, ptr %20, align 8, !tbaa !16
  %21 = getelementptr inbounds i8, ptr %0, i64 136
  store volatile i8 -1, ptr %21, align 8, !tbaa !19
  %22 = getelementptr inbounds i8, ptr %0, i64 137
  store volatile i8 -1, ptr %22, align 1, !tbaa !20
  %23 = icmp eq i64 %1, 0
  %24 = getelementptr inbounds i8, ptr %0, i64 32
  br i1 %23, label %25, label %30

25:                                               ; preds = %6
  %26 = load volatile i64, ptr %24, align 8, !tbaa !21
  %.not = icmp eq i64 %26, 0
  br i1 %.not, label %32, label %27

27:                                               ; preds = %25
  %28 = tail call i64 @xTaskRemoveFromEventList(ptr noundef nonnull %24) #3
  %.not19 = icmp eq i64 %28, 0
  br i1 %.not19, label %32, label %29

29:                                               ; preds = %27
  store volatile i32 268435456, ptr inttoptr (i64 3758157060 to ptr), align 4, !tbaa !22
  tail call void asm sideeffect "dsb", "~{memory},~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !23
  tail call void asm sideeffect "isb", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !24
  br label %32

30:                                               ; preds = %6
  tail call void @vListInitialise(ptr noundef nonnull %24) #3
  %31 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @vListInitialise(ptr noundef nonnull %31) #3
  br label %32

32:                                               ; preds = %27, %29, %25, %30
  tail call void @vPortExitCritical() #3
  ret i64 1
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #1

declare void @vPortEnterCritical() local_unnamed_addr #2

declare i64 @xTaskRemoveFromEventList(ptr noundef) local_unnamed_addr #2

declare void @vListInitialise(ptr noundef) local_unnamed_addr #2

declare void @vPortExitCritical() local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"QueueDefinition", !7, i64 0, !7, i64 8, !8, i64 16, !10, i64 32, !10, i64 72, !11, i64 112, !11, i64 120, !11, i64 128, !8, i64 136, !8, i64 137}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"xLIST", !11, i64 0, !7, i64 8, !12, i64 16}
!11 = !{!"long", !8, i64 0}
!12 = !{!"xMINI_LIST_ITEM", !13, i64 0, !7, i64 8, !7, i64 16}
!13 = !{!"int", !8, i64 0}
!14 = !{!6, !11, i64 120}
!15 = !{!6, !11, i64 128}
!16 = !{!8, !8, i64 0}
!17 = !{!6, !11, i64 112}
!18 = !{!6, !7, i64 8}
!19 = !{!6, !8, i64 136}
!20 = !{!6, !8, i64 137}
!21 = !{!6, !11, i64 32}
!22 = !{!13, !13, i64 0}
!23 = !{i64 2148257297}
!24 = !{i64 2148257366}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass