; LLVM IR from DionysiosB/CodeForces :: 1400-1499/1490D-PermutationTransformation.ll (Z1flllRKSt6vectorIlSaIlEERS1_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z1flllRKSt6vectorIlSaIlEERS1_(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4) #0 {
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  store i64 %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !9
  %13 = load i64, ptr %6, align 8, !tbaa !5
  %14 = load i64, ptr %7, align 8, !tbaa !5
  %15 = icmp sge i64 %13, %14
  br i1 %15, label %16, label %17

16:                                               ; preds = %5
  br label %60

17:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %18 = load i64, ptr %6, align 8, !tbaa !5
  store i64 %18, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %19 = load i64, ptr %6, align 8, !tbaa !5
  %20 = add nsw i64 %19, 1
  store i64 %20, ptr %12, align 8, !tbaa !5
  br label %21

21:                                               ; preds = %39, %17
  %22 = load i64, ptr %12, align 8, !tbaa !5
  %23 = load i64, ptr %7, align 8, !tbaa !5
  %24 = icmp slt i64 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %42

26:                                               ; preds = %21
  %27 = load ptr, ptr %9, align 8, !tbaa !9
  %28 = load i64, ptr %12, align 8, !tbaa !5
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %28) #3
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = load ptr, ptr %9, align 8, !tbaa !9
  %32 = load i64, ptr %11, align 8, !tbaa !5
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %32) #3
  %34 = load i64, ptr %33, align 8, !tbaa !5
  %35 = icmp sgt i64 %30, %34
  br i1 %35, label %36, label %38

36:                                               ; preds = %26
  %37 = load i64, ptr %12, align 8, !tbaa !5
  store i64 %37, ptr %11, align 8, !tbaa !5
  br label %38

38:                                               ; preds = %36, %26
  br label %39

39:                                               ; preds = %38
  %40 = load i64, ptr %12, align 8, !tbaa !5
  %41 = add nsw i64 %40, 1
  store i64 %41, ptr %12, align 8, !tbaa !5
  br label %21, !llvm.loop !11

42:                                               ; preds = %25
  %43 = load i64, ptr %8, align 8, !tbaa !5
  %44 = load ptr, ptr %10, align 8, !tbaa !9
  %45 = load i64, ptr %11, align 8, !tbaa !5
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %45) #3
  store i64 %43, ptr %46, align 8, !tbaa !5
  %47 = load i64, ptr %6, align 8, !tbaa !5
  %48 = load i64, ptr %11, align 8, !tbaa !5
  %49 = load i64, ptr %8, align 8, !tbaa !5
  %50 = add nsw i64 %49, 1
  %51 = load ptr, ptr %9, align 8, !tbaa !9
  %52 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z1flllRKSt6vectorIlSaIlEERS1_(i64 noundef %47, i64 noundef %48, i64 noundef %50, ptr noundef nonnull align 8 dereferenceable(24) %51, ptr noundef nonnull align 8 dereferenceable(24) %52)
  %53 = load i64, ptr %11, align 8, !tbaa !5
  %54 = add nsw i64 %53, 1
  %55 = load i64, ptr %7, align 8, !tbaa !5
  %56 = load i64, ptr %8, align 8, !tbaa !5
  %57 = add nsw i64 %56, 1
  %58 = load ptr, ptr %9, align 8, !tbaa !9
  %59 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z1flllRKSt6vectorIlSaIlEERS1_(i64 noundef %54, i64 noundef %55, i64 noundef %57, ptr noundef nonnull align 8 dereferenceable(24) %58, ptr noundef nonnull align 8 dereferenceable(24) %59)
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  br label %60

60:                                               ; preds = %42, %16
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z1flllRKSt6vectorIlSaIlEERS1_(i64 noundef %0, i64 noundef %1, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4) local_unnamed_addr #0 {
  %.not34 = icmp slt i64 %0, %1
  br i1 %.not34, label %.preheader, label %tailrecurse._crit_edge

.preheader:                                       ; preds = %5, %tailrecurse
  %.tr2836 = phi i64 [ %8, %tailrecurse ], [ %2, %5 ]
  %.tr35 = phi i64 [ %.pre-phi, %tailrecurse ], [ %0, %5 ]
  %.031 = add nsw i64 %.tr35, 1
  %6 = icmp slt i64 %.031, %1
  br i1 %6, label %.lr.ph, label %tailrecurse

tailrecurse.loopexit:                             ; preds = %.lr.ph
  %.pre = add nsw i64 %spec.select, 1
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.loopexit, %.preheader
  %.pre-phi = phi i64 [ %.pre, %tailrecurse.loopexit ], [ %.031, %.preheader ]
  %.024.lcssa = phi i64 [ %spec.select, %tailrecurse.loopexit ], [ %.tr35, %.preheader ]
  %7 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %.024.lcssa) #1
  store i64 %.tr2836, ptr %7, align 8, !tbaa !5
  %8 = add nsw i64 %.tr2836, 1
  tail call void @_Z1flllRKSt6vectorIlSaIlEERS1_(i64 noundef %.tr35, i64 noundef %.024.lcssa, i64 noundef %8, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4)
  %.not = icmp slt i64 %.pre-phi, %1
  br i1 %.not, label %.preheader, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %.033 = phi i64 [ %.0, %.lr.ph ], [ %.031, %.preheader ]
  %.02432 = phi i64 [ %spec.select, %.lr.ph ], [ %.tr35, %.preheader ]
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %.033) #1
  %10 = load i64, ptr %9, align 8, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %.02432) #1
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = icmp sgt i64 %10, %12
  %spec.select = select i1 %13, i64 %.033, i64 %.02432
  %.0 = add i64 %.033, 1
  %exitcond.not = icmp eq i64 %.0, %1
  br i1 %exitcond.not, label %tailrecurse.loopexit, label %.lr.ph, !llvm.loop !9

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass