; LLVM IR from whoiswelliton/Computer_Engineering_UTFPR-PB :: Embedded_Systems/TIVA Connected TM4C1294XL Projects/00 - freeRTOS10_on_TIVA (xTimerGenericCommand)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.tmrTimerQueueMessage = type { i64, %union.anon }
%union.anon = type { %struct.tmrTimerParameters }
%struct.tmrTimerParameters = type { i32, ptr }

@xTimerQueue = external hidden global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @xTimerGenericCommand(ptr noundef %0, i64 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca %struct.tmrTimerQueueMessage, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !11
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  store i64 0, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %12) #4
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %15, label %17

15:                                               ; preds = %5
  call void @vPortRaiseBASEPRI()
  br label %16

16:                                               ; preds = %16, %15
  br label %16

17:                                               ; preds = %5
  %18 = load ptr, ptr @xTimerQueue, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %47

20:                                               ; preds = %17
  %21 = load i64, ptr %7, align 8, !tbaa !9
  %22 = getelementptr inbounds %struct.tmrTimerQueueMessage, ptr %12, i32 0, i32 0
  store i64 %21, ptr %22, align 8, !tbaa !13
  %23 = load i32, ptr %8, align 4, !tbaa !11
  %24 = getelementptr inbounds %struct.tmrTimerQueueMessage, ptr %12, i32 0, i32 1
  %25 = getelementptr inbounds %struct.tmrTimerParameters, ptr %24, i32 0, i32 0
  store i32 %23, ptr %25, align 8, !tbaa !15
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.tmrTimerQueueMessage, ptr %12, i32 0, i32 1
  %28 = getelementptr inbounds %struct.tmrTimerParameters, ptr %27, i32 0, i32 1
  store ptr %26, ptr %28, align 8, !tbaa !15
  %29 = load i64, ptr %7, align 8, !tbaa !9
  %30 = icmp slt i64 %29, 6
  br i1 %30, label %31, label %42

31:                                               ; preds = %20
  %32 = call i64 @xTaskGetSchedulerState()
  %33 = icmp eq i64 %32, 2
  br i1 %33, label %34, label %38

34:                                               ; preds = %31
  %35 = load ptr, ptr @xTimerQueue, align 8, !tbaa !5
  %36 = load i32, ptr %10, align 4, !tbaa !11
  %37 = call i64 @xQueueGenericSend(ptr noundef %35, ptr noundef %12, i32 noundef %36, i64 noundef 0)
  store i64 %37, ptr %11, align 8, !tbaa !9
  br label %41

38:                                               ; preds = %31
  %39 = load ptr, ptr @xTimerQueue, align 8, !tbaa !5
  %40 = call i64 @xQueueGenericSend(ptr noundef %39, ptr noundef %12, i32 noundef 0, i64 noundef 0)
  store i64 %40, ptr %11, align 8, !tbaa !9
  br label %41

41:                                               ; preds = %38, %34
  br label %46

42:                                               ; preds = %20
  %43 = load ptr, ptr @xTimerQueue, align 8, !tbaa !5
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = call i64 @xQueueGenericSendFromISR(ptr noundef %43, ptr noundef %12, ptr noundef %44, i64 noundef 0)
  store i64 %45, ptr %11, align 8, !tbaa !9
  br label %46

46:                                               ; preds = %42, %41
  br label %48

47:                                               ; preds = %17
  br label %48

48:                                               ; preds = %47, %46
  %49 = load i64, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  ret i64 %49
}

declare i64 @xTaskGetSchedulerState() #3

declare i64 @xQueueGenericSend(ptr noundef, ptr noundef, i32 noundef, i64 noundef) #3

declare i64 @xQueueGenericSendFromISR(ptr noundef, ptr noundef, ptr noundef, i64 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"tmrTimerQueueMessage", !10, i64 0, !7, i64 8}
!15 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.tmrTimerQueueMessage = type { i64, %union.anon }
%union.anon = type { %struct.tmrTimerParameters }
%struct.tmrTimerParameters = type { i32, ptr }

@xTimerQueue = external hidden local_unnamed_addr global ptr, align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @vPortRaiseBASEPRI() local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @xTimerGenericCommand(ptr noundef %0, i64 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) local_unnamed_addr #2 {
  %6 = alloca %struct.tmrTimerQueueMessage, align 8
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #4
  %7 = icmp eq ptr %0, null
  br i1 %7, label %8, label %10

8:                                                ; preds = %5
  tail call void @vPortRaiseBASEPRI()
  br label %9

9:                                                ; preds = %9, %8
  br label %9

10:                                               ; preds = %5
  %11 = load ptr, ptr @xTimerQueue, align 8, !tbaa !5
  %.not = icmp eq ptr %11, null
  br i1 %.not, label %26, label %12

12:                                               ; preds = %10
  store i64 %1, ptr %6, align 8, !tbaa !9
  %13 = getelementptr inbounds i8, ptr %6, i64 8
  store i32 %2, ptr %13, align 8, !tbaa !12
  %14 = getelementptr inbounds i8, ptr %6, i64 16
  store ptr %0, ptr %14, align 8, !tbaa !12
  %15 = icmp slt i64 %1, 6
  br i1 %15, label %16, label %24

16:                                               ; preds = %12
  %17 = tail call i64 @xTaskGetSchedulerState() #4
  %18 = icmp eq i64 %17, 2
  %19 = load ptr, ptr @xTimerQueue, align 8, !tbaa !5
  br i1 %18, label %20, label %22

20:                                               ; preds = %16
  %21 = call i64 @xQueueGenericSend(ptr noundef %19, ptr noundef nonnull %6, i32 noundef %4, i64 noundef 0) #4
  br label %26

22:                                               ; preds = %16
  %23 = call i64 @xQueueGenericSend(ptr noundef %19, ptr noundef nonnull %6, i32 noundef 0, i64 noundef 0) #4
  br label %26

24:                                               ; preds = %12
  %25 = call i64 @xQueueGenericSendFromISR(ptr noundef nonnull %11, ptr noundef nonnull %6, ptr noundef %3, i64 noundef 0) #4
  br label %26

26:                                               ; preds = %10, %24, %22, %20
  %.0 = phi i64 [ %21, %20 ], [ %23, %22 ], [ %25, %24 ], [ 0, %10 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #4
  ret i64 %.0
}

declare i64 @xTaskGetSchedulerState() local_unnamed_addr #3

declare i64 @xQueueGenericSend(ptr noundef, ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #3

declare i64 @xQueueGenericSendFromISR(ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"tmrTimerQueueMessage", !11, i64 0, !7, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass