; LLVM IR from Bousk/Net :: NetworkLib/src/Utils.ll (ZN5Bousk5Utils19CreateRightBitsMaskEh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [68 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@__PRETTY_FUNCTION__._ZN5Bousk5Utils19CreateRightBitsMaskEh = external hidden unnamed_addr constant [47 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i8 @_ZN5Bousk5Utils19CreateRightBitsMaskEh(i8 noundef zeroext %0) #1 {
  %2 = alloca i8, align 1
  %3 = alloca i8, align 1
  store i8 %0, ptr %3, align 1, !tbaa !5
  %4 = load i8, ptr %3, align 1, !tbaa !5
  %5 = zext i8 %4 to i32
  %6 = icmp sge i32 %5, 1
  br i1 %6, label %7, label %11

7:                                                ; preds = %1
  %8 = load i8, ptr %3, align 1, !tbaa !5
  %9 = zext i8 %8 to i32
  %10 = icmp sle i32 %9, 8
  br label %11

11:                                               ; preds = %7, %1
  %12 = phi i1 [ false, %1 ], [ %10, %7 ]
  br i1 %12, label %13, label %14

13:                                               ; preds = %11
  br label %16

14:                                               ; preds = %11
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 22, ptr noundef @__PRETTY_FUNCTION__._ZN5Bousk5Utils19CreateRightBitsMaskEh) #2
  unreachable

15:                                               ; No predecessors!
  br label %16

16:                                               ; preds = %15, %13
  %17 = load i8, ptr %3, align 1, !tbaa !5
  %18 = zext i8 %17 to i32
  switch i32 %18, label %27 [
    i32 1, label %19
    i32 2, label %20
    i32 3, label %21
    i32 4, label %22
    i32 5, label %23
    i32 6, label %24
    i32 7, label %25
    i32 8, label %26
  ]

19:                                               ; preds = %16
  store i8 1, ptr %2, align 1
  br label %28

20:                                               ; preds = %16
  store i8 3, ptr %2, align 1
  br label %28

21:                                               ; preds = %16
  store i8 7, ptr %2, align 1
  br label %28

22:                                               ; preds = %16
  store i8 15, ptr %2, align 1
  br label %28

23:                                               ; preds = %16
  store i8 31, ptr %2, align 1
  br label %28

24:                                               ; preds = %16
  store i8 63, ptr %2, align 1
  br label %28

25:                                               ; preds = %16
  store i8 127, ptr %2, align 1
  br label %28

26:                                               ; preds = %16
  store i8 -1, ptr %2, align 1
  br label %28

27:                                               ; preds = %16
  store i8 0, ptr %2, align 1
  br label %28

28:                                               ; preds = %27, %26, %25, %24, %23, %22, %21, %20, %19
  %29 = load i8, ptr %2, align 1
  ret i8 %29
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [68 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@__PRETTY_FUNCTION__._ZN5Bousk5Utils19CreateRightBitsMaskEh = external hidden unnamed_addr constant [47 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext range(i8 1, 0) i8 @_ZN5Bousk5Utils19CreateRightBitsMaskEh(i8 noundef zeroext %0) local_unnamed_addr #1 {
  %2 = add i8 %0, -1
  %3 = icmp ult i8 %2, 8
  br i1 %3, label %switch.lookup, label %4

4:                                                ; preds = %1
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 22, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN5Bousk5Utils19CreateRightBitsMaskEh) #2
  unreachable

switch.lookup:                                    ; preds = %1
  %switch.tableidx = add nsw i8 %0, -1
  %switch.cast = zext i8 %switch.tableidx to i64
  %switch.shiftamt = shl nuw nsw i64 %switch.cast, 3
  %switch.downshift = lshr i64 -36240869367020799, %switch.shiftamt
  %switch.masked = trunc i64 %switch.downshift to i8
  ret i8 %switch.masked
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass