; LLVM IR from mickypaganini/SSI2016-jet-clustering :: spartyjet-4.0.2_mac/External/fastjet-3.0.0/plugins/SISCone/siscone/siscone/pro_677d5597 (conesD2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.siscone::Cstable_cones" = type { %"class.siscone::Cvicinity", %"class.std::vector", ptr, i32, double, double, %"class.siscone::Cmomentum", ptr, ptr, i32, i32, %"class.siscone::Cmomentum", %"class.std::vector.10", %"class.std::vector.15", double }
%"class.siscone::Cvicinity" = type { ptr, double, double, double, double, double, double, i32, %"class.std::vector", %"class.std::vector.0", ptr, %"class.std::vector.5", i32, double, double }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cvicinity_inclusion, std::allocator<siscone::Cvicinity_inclusion>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cvicinity_elm *, std::allocator<siscone::Cvicinity_elm *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cmomentum, std::allocator<siscone::Cmomentum>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.siscone::Cmomentum" = type <{ double, double, double, double, double, double, i32, i32, %"class.siscone::Creference", [4 x i8] }>
%"class.siscone::Creference" = type { [3 x i32] }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl" }
%"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl" = type { %"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<siscone::Cmomentum *, std::allocator<siscone::Cmomentum *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<siscone::Creference, siscone::Creference>, std::allocator<std::pair<siscone::Creference, siscone::Creference>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nounwind
declare void @_ZN7siscone9CmomentumD1Ev(ptr noundef nonnull align 8 dereferenceable(68)) unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: nounwind
declare void @_ZN7siscone9CvicinityD2Ev(ptr noundef nonnull align 8 dereferenceable(168)) unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7siscone13Cstable_conesD2Ev(ptr noundef nonnull align 8 dereferenceable(448) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %3 = load ptr, ptr %2, align 8
  %4 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %3, i32 0, i32 2
  %5 = load ptr, ptr %4, align 8, !tbaa !9
  %6 = icmp ne ptr %5, null
  br i1 %6, label %7, label %13

7:                                                ; preds = %1
  %8 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %3, i32 0, i32 2
  %9 = load ptr, ptr %8, align 8, !tbaa !9
  %10 = icmp eq ptr %9, null
  br i1 %10, label %12, label %11

11:                                               ; preds = %7
  call void @_ZN7siscone10hash_conesD1Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #3
  call void @_ZdlPvm(ptr noundef %9, i64 noundef 24) #4
  br label %12

12:                                               ; preds = %11, %7
  br label %13

13:                                               ; preds = %12, %1
  %14 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %3, i32 0, i32 13
  call void @_ZNSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  %15 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %3, i32 0, i32 12
  call void @_ZNSt6vectorIPN7siscone9CmomentumESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #3
  %16 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %3, i32 0, i32 11
  call void @_ZN7siscone9CmomentumD1Ev(ptr noundef nonnull align 8 dereferenceable(68) %16) #3
  %17 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %3, i32 0, i32 6
  call void @_ZN7siscone9CmomentumD1Ev(ptr noundef nonnull align 8 dereferenceable(68) %17) #3
  %18 = getelementptr inbounds %"class.siscone::Cstable_cones", ptr %3, i32 0, i32 1
  call void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #3
  call void @_ZN7siscone9CvicinityD2Ev(ptr noundef nonnull align 8 dereferenceable(168) %3) #3
  ret void
}

; Function Attrs: nounwind
declare void @_ZN7siscone10hash_conesD1Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7siscone9CmomentumESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

attributes #0 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 192}
!10 = !{!"_ZTSN7siscone13Cstable_conesE", !11, i64 0, !14, i64 168, !6, i64 192, !13, i64 200, !12, i64 208, !12, i64 216, !26, i64 224, !6, i64 296, !6, i64 304, !13, i64 312, !13, i64 316, !26, i64 320, !28, i64 392, !32, i64 416, !12, i64 440}
!11 = !{!"_ZTSN7siscone9CvicinityE", !6, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !13, i64 56, !14, i64 64, !18, i64 88, !6, i64 112, !22, i64 120, !13, i64 144, !12, i64 152, !12, i64 160}
!12 = !{!"double", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIN7siscone9CmomentumESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!"_ZTSN7siscone9CmomentumE", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !13, i64 48, !13, i64 52, !27, i64 56}
!27 = !{!"_ZTSN7siscone10CreferenceE", !7, i64 0}
!28 = !{!"_ZTSSt6vectorIPN7siscone9CmomentumESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTSSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind
declare void @_ZN7siscone9CmomentumD1Ev(ptr noundef nonnull align 8 dereferenceable(68)) unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: nounwind
declare void @_ZN7siscone9CvicinityD2Ev(ptr noundef nonnull align 8 dereferenceable(168)) unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7siscone13Cstable_conesD2Ev(ptr noundef nonnull align 8 dereferenceable(448) %0) unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 192
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %5, label %4

4:                                                ; preds = %1
  tail call void @_ZN7siscone10hash_conesD1Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #3
  tail call void @_ZdlPvm(ptr noundef nonnull %3, i64 noundef 24) #4
  br label %5

5:                                                ; preds = %4, %1
  %6 = getelementptr inbounds i8, ptr %0, i64 416
  tail call void @_ZNSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #3
  %7 = getelementptr inbounds i8, ptr %0, i64 392
  tail call void @_ZNSt6vectorIPN7siscone9CmomentumESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  %8 = getelementptr inbounds i8, ptr %0, i64 320
  tail call void @_ZN7siscone9CmomentumD1Ev(ptr noundef nonnull align 8 dereferenceable(68) %8) #3
  %9 = getelementptr inbounds i8, ptr %0, i64 224
  tail call void @_ZN7siscone9CmomentumD1Ev(ptr noundef nonnull align 8 dereferenceable(68) %9) #3
  %10 = getelementptr inbounds i8, ptr %0, i64 168
  tail call void @_ZNSt6vectorIN7siscone9CmomentumESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %10) #3
  tail call void @_ZN7siscone9CvicinityD2Ev(ptr noundef nonnull align 8 dereferenceable(168) %0) #3
  ret void
}

; Function Attrs: nounwind
declare void @_ZN7siscone10hash_conesD1Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN7siscone9CmomentumESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

attributes #0 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 192}
!6 = !{!"_ZTSN7siscone13Cstable_conesE", !7, i64 0, !13, i64 168, !8, i64 192, !12, i64 200, !11, i64 208, !11, i64 216, !25, i64 224, !8, i64 296, !8, i64 304, !12, i64 312, !12, i64 316, !25, i64 320, !27, i64 392, !31, i64 416, !11, i64 440}
!7 = !{!"_ZTSN7siscone9CvicinityE", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !12, i64 56, !13, i64 64, !17, i64 88, !8, i64 112, !21, i64 120, !12, i64 144, !11, i64 152, !11, i64 160}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"double", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!"_ZTSSt6vectorIN7siscone9CmomentumESaIS1_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIN7siscone9CmomentumESaIS1_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!17 = !{!"_ZTSSt6vectorIN7siscone19Cvicinity_inclusionESaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIN7siscone19Cvicinity_inclusionESaIS1_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!21 = !{!"_ZTSSt6vectorIPN7siscone13Cvicinity_elmESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIPN7siscone13Cvicinity_elmESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!25 = !{!"_ZTSN7siscone9CmomentumE", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !12, i64 48, !12, i64 52, !26, i64 56}
!26 = !{!"_ZTSN7siscone10CreferenceE", !9, i64 0}
!27 = !{!"_ZTSSt6vectorIPN7siscone9CmomentumESaIS2_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIPN7siscone9CmomentumESaIS2_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}
!31 = !{!"_ZTSSt6vectorISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseISt4pairIN7siscone10CreferenceES2_ESaIS3_EE17_Vector_impl_dataE", !8, i64 0, !8, i64 8, !8, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass