; LLVM IR from niessner/Matterport :: code/gaps/pkgs/RNBasics/RNQueue.ll (ZN8RNVQueue5ShiftEiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.RNVQueue = type { %class.RNVArray, i32, i32 }
%class.RNVArray = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN8RNVQueue5ShiftEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #3 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  %13 = load ptr, ptr %5, align 8
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = icmp slt i32 %14, 0
  br i1 %15, label %16, label %24

16:                                               ; preds = %4
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = sub nsw i32 0, %18
  %20 = icmp slt i32 %17, %19
  br i1 %20, label %21, label %24

21:                                               ; preds = %16
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = sub nsw i32 0, %22
  store i32 %23, ptr %6, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %21, %16, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %25 = getelementptr inbounds %class.RNVQueue, ptr %13, i32 0, i32 1
  %26 = load i32, ptr %25, align 8, !tbaa !11
  %27 = load i32, ptr %6, align 4, !tbaa !9
  %28 = sub nsw i32 %26, %27
  store i32 %28, ptr %9, align 4, !tbaa !9
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = icmp sgt i32 %29, 0
  br i1 %30, label %31, label %35

31:                                               ; preds = %24
  %32 = load i32, ptr %8, align 4, !tbaa !9
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = sub nsw i32 %33, %32
  store i32 %34, ptr %9, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %31, %24
  %36 = load i32, ptr %9, align 4, !tbaa !9
  %37 = icmp sle i32 %36, 0
  br i1 %37, label %38, label %39

38:                                               ; preds = %35
  store i32 1, ptr %10, align 4
  br label %103

39:                                               ; preds = %35
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = icmp sgt i32 %40, 0
  br i1 %41, label %42, label %48

42:                                               ; preds = %39
  %43 = load i32, ptr %7, align 4, !tbaa !9
  %44 = load i32, ptr %9, align 4, !tbaa !9
  %45 = icmp slt i32 %43, %44
  br i1 %45, label %46, label %48

46:                                               ; preds = %42
  %47 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %47, ptr %9, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %46, %42, %39
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = icmp slt i32 %49, 0
  br i1 %50, label %51, label %74

51:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %52 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %52, ptr %11, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %70, %51
  %54 = load i32, ptr %11, align 4, !tbaa !9
  %55 = load i32, ptr %6, align 4, !tbaa !9
  %56 = load i32, ptr %9, align 4, !tbaa !9
  %57 = add nsw i32 %55, %56
  %58 = icmp slt i32 %54, %57
  br i1 %58, label %60, label %59

59:                                               ; preds = %53
  store i32 2, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %73

60:                                               ; preds = %53
  %61 = load i32, ptr %11, align 4, !tbaa !9
  %62 = call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %13, i32 noundef %61)
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef %62)
  %64 = load ptr, ptr %63, align 8, !tbaa !5
  %65 = load i32, ptr %11, align 4, !tbaa !9
  %66 = load i32, ptr %8, align 4, !tbaa !9
  %67 = add nsw i32 %65, %66
  %68 = call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %13, i32 noundef %67)
  %69 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef %68)
  store ptr %64, ptr %69, align 8, !tbaa !5
  br label %70

70:                                               ; preds = %60
  %71 = load i32, ptr %11, align 4, !tbaa !9
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %11, align 4, !tbaa !9
  br label %53, !llvm.loop !14

73:                                               ; preds = %59
  br label %102

74:                                               ; preds = %48
  %75 = load i32, ptr %8, align 4, !tbaa !9
  %76 = icmp sgt i32 %75, 0
  br i1 %76, label %77, label %101

77:                                               ; preds = %74
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %78 = load i32, ptr %6, align 4, !tbaa !9
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = add nsw i32 %78, %79
  %81 = sub nsw i32 %80, 1
  store i32 %81, ptr %12, align 4, !tbaa !9
  br label %82

82:                                               ; preds = %97, %77
  %83 = load i32, ptr %12, align 4, !tbaa !9
  %84 = load i32, ptr %6, align 4, !tbaa !9
  %85 = icmp sge i32 %83, %84
  br i1 %85, label %87, label %86

86:                                               ; preds = %82
  store i32 5, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %100

87:                                               ; preds = %82
  %88 = load i32, ptr %12, align 4, !tbaa !9
  %89 = call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %13, i32 noundef %88)
  %90 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef %89)
  %91 = load ptr, ptr %90, align 8, !tbaa !5
  %92 = load i32, ptr %12, align 4, !tbaa !9
  %93 = load i32, ptr %8, align 4, !tbaa !9
  %94 = add nsw i32 %92, %93
  %95 = call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %13, i32 noundef %94)
  %96 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef %95)
  store ptr %91, ptr %96, align 8, !tbaa !5
  br label %97

97:                                               ; preds = %87
  %98 = load i32, ptr %12, align 4, !tbaa !9
  %99 = add nsw i32 %98, -1
  store i32 %99, ptr %12, align 4, !tbaa !9
  br label %82, !llvm.loop !16

100:                                              ; preds = %86
  br label %101

101:                                              ; preds = %100, %74
  br label %102

102:                                              ; preds = %101, %73
  store i32 0, ptr %10, align 4
  br label %103

103:                                              ; preds = %102, %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %104 = load i32, ptr %10, align 4
  switch i32 %104, label %106 [
    i32 0, label %105
    i32 1, label %105
  ]

105:                                              ; preds = %103, %103
  ret void

106:                                              ; preds = %103
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"_ZTS8RNVQueue", !13, i64 0, !10, i64 16, !10, i64 20}
!13 = !{!"_ZTS8RNVArray", !6, i64 0, !10, i64 8, !10, i64 12}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN8RNVQueue5ShiftEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #2 align 2 {
  %5 = icmp slt i32 %3, 0
  %6 = sub nsw i32 0, %3
  %spec.select = tail call i32 @llvm.smax.i32(i32 %6, i32 %1)
  %.033 = select i1 %5, i32 %spec.select, i32 %1
  %7 = getelementptr inbounds i8, ptr %0, i64 16
  %8 = load i32, ptr %7, align 8, !tbaa !5
  %9 = icmp sgt i32 %3, 0
  %10 = tail call i32 @llvm.smax.i32(i32 %3, i32 0)
  %11 = add i32 %.033, %10
  %spec.select39 = sub i32 %8, %11
  %12 = icmp slt i32 %spec.select39, 1
  br i1 %12, label %.loopexit, label %13

13:                                               ; preds = %4
  %14 = icmp sgt i32 %2, 0
  %15 = tail call i32 @llvm.umin.i32(i32 %spec.select39, i32 %2)
  %.1 = select i1 %14, i32 %15, i32 %spec.select39
  br i1 %5, label %.preheader, label %25

.preheader:                                       ; preds = %13
  %16 = add nuw nsw i32 %.1, %spec.select
  %17 = icmp sgt i32 %.1, 0
  br i1 %17, label %.lr.ph45, label %.loopexit

.lr.ph45:                                         ; preds = %.preheader, %.lr.ph45
  %.03144 = phi i32 [ %24, %.lr.ph45 ], [ %spec.select, %.preheader ]
  %18 = tail call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.03144)
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef %18)
  %20 = load ptr, ptr %19, align 8, !tbaa !12
  %21 = add nsw i32 %.03144, %3
  %22 = tail call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %21)
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef %22)
  store ptr %20, ptr %23, align 8, !tbaa !12
  %24 = add i32 %.03144, 1
  %exitcond.not = icmp eq i32 %24, %16
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph45, !llvm.loop !13

25:                                               ; preds = %13
  %.not.not42 = icmp sgt i32 %.1, 0
  %or.cond = and i1 %9, %.not.not42
  br i1 %or.cond, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %25
  %26 = add nsw i32 %.1, %1
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.0.in43 = phi i32 [ %.0, %.lr.ph ], [ %26, %.lr.ph.preheader ]
  %.0 = add nsw i32 %.0.in43, -1
  %27 = tail call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.0)
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef %27)
  %29 = load ptr, ptr %28, align 8, !tbaa !12
  %30 = add nsw i32 %.0, %3
  %31 = tail call noundef ptr @_ZNK8RNVQueue8KthEntryEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %30)
  %32 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK8RNVQueue13EntryContentsEPPv(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef %31)
  store ptr %29, ptr %32, align 8, !tbaa !12
  %.not.not = icmp sgt i32 %.0, %.033
  br i1 %.not.not, label %.lr.ph, label %.loopexit, !llvm.loop !15

.loopexit:                                        ; preds = %.lr.ph, %.lr.ph45, %.preheader, %25, %4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #3

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"_ZTS8RNVQueue", !7, i64 0, !11, i64 16, !11, i64 20}
!7 = !{!"_ZTS8RNVArray", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass