; LLVM IR from Montimage/mmt-security :: src/lib (rule_verif_engine)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.rule_info_struct = type { i32, i32, ptr, ptr, ptr, ptr, i8, i8, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.rule_engine_struct = type { ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, i64, i64 }

@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [46 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @_process_single_packet(ptr noundef, ptr noundef) #1

declare void @mmt_sec_log(i32 noundef, ptr noundef, ...) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @_process_multi_packets(ptr noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #3

; Function Attrs: nounwind uwtable
define dso_local ptr @rule_engine_init(ptr noundef %0, i64 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #7
  br label %7

7:                                                ; preds = %2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  %10 = xor i1 %9, true
  %11 = xor i1 %10, true
  %12 = xor i1 %11, true
  %13 = zext i1 %12 to i32
  %14 = sext i32 %13 to i64
  %15 = call i64 @llvm.expect.i64(i64 %14, i64 0)
  %16 = icmp ne i64 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %7
  call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 4, ptr noundef @.str.1)
  call void @exit(i32 noundef 0) #8
  unreachable

18:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #7
  %19 = call ptr @mmt_mem_alloc(i64 noundef 88)
  store ptr %19, ptr %6, align 8, !tbaa !5
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.rule_info_struct, ptr %20, i32 0, i32 11
  %22 = load ptr, ptr %21, align 8, !tbaa !11
  %23 = call ptr (...) %22()
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.rule_engine_struct, ptr %24, i32 0, i32 1
  store ptr %23, ptr %25, align 8, !tbaa !14
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.rule_engine_struct, ptr %26, i32 0, i32 1
  %28 = load ptr, ptr %27, align 8, !tbaa !14
  call void @fsm_set_id(ptr noundef %28, i16 noundef zeroext 0)
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = load ptr, ptr %6, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.rule_engine_struct, ptr %30, i32 0, i32 0
  store ptr %29, ptr %31, align 64, !tbaa !16
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.rule_info_struct, ptr %32, i32 0, i32 7
  %34 = load i8, ptr %33, align 1, !tbaa !17
  %35 = zext i8 %34 to i32
  %36 = add nsw i32 %35, 1
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.rule_engine_struct, ptr %37, i32 0, i32 5
  store i32 %36, ptr %38, align 8, !tbaa !18
  br label %39

39:                                               ; preds = %18
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.rule_engine_struct, ptr %40, i32 0, i32 5
  %42 = load i32, ptr %41, align 8, !tbaa !18
  %43 = icmp ule i32 %42, 64
  %44 = xor i1 %43, true
  %45 = xor i1 %44, true
  %46 = xor i1 %45, true
  %47 = zext i1 %46 to i32
  %48 = sext i32 %47 to i64
  %49 = call i64 @llvm.expect.i64(i64 %48, i64 0)
  %50 = icmp ne i64 %49, 0
  br i1 %50, label %51, label %52

51:                                               ; preds = %39
  call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 4, ptr noundef @.str.2)
  call void @exit(i32 noundef 0) #8
  unreachable

52:                                               ; preds = %39
  %53 = load i64, ptr %4, align 8, !tbaa !9
  %54 = trunc i64 %53 to i32
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.rule_engine_struct, ptr %55, i32 0, i32 6
  store i32 %54, ptr %56, align 4, !tbaa !19
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.rule_engine_struct, ptr %57, i32 0, i32 7
  store i32 1, ptr %58, align 16, !tbaa !20
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.rule_engine_struct, ptr %59, i32 0, i32 8
  store i32 0, ptr %60, align 4, !tbaa !21
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.rule_engine_struct, ptr %61, i32 0, i32 5
  %63 = load i32, ptr %62, align 8, !tbaa !18
  %64 = zext i32 %63 to i64
  %65 = mul i64 %64, 8
  %66 = call ptr @mmt_mem_alloc(i64 noundef %65)
  %67 = load ptr, ptr %6, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.rule_engine_struct, ptr %67, i32 0, i32 2
  store ptr %66, ptr %68, align 16, !tbaa !22
  store i64 0, ptr %5, align 8, !tbaa !9
  br label %69

69:                                               ; preds = %82, %52
  %70 = load i64, ptr %5, align 8, !tbaa !9
  %71 = load ptr, ptr %6, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.rule_engine_struct, ptr %71, i32 0, i32 5
  %73 = load i32, ptr %72, align 8, !tbaa !18
  %74 = zext i32 %73 to i64
  %75 = icmp ult i64 %70, %74
  br i1 %75, label %76, label %85

76:                                               ; preds = %69
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.rule_engine_struct, ptr %77, i32 0, i32 2
  %79 = load ptr, ptr %78, align 16, !tbaa !22
  %80 = load i64, ptr %5, align 8, !tbaa !9
  %81 = getelementptr inbounds ptr, ptr %79, i64 %80
  store ptr null, ptr %81, align 8, !tbaa !5
  br label %82

82:                                               ; preds = %76
  %83 = load i64, ptr %5, align 8, !tbaa !9
  %84 = add i64 %83, 1
  store i64 %84, ptr %5, align 8, !tbaa !9
  br label %69, !llvm.loop !23

85:                                               ; preds = %69
  %86 = load ptr, ptr %6, align 8, !tbaa !5
  %87 = load ptr, ptr %6, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.rule_engine_struct, ptr %87, i32 0, i32 1
  %89 = load ptr, ptr %88, align 8, !tbaa !14
  call void @_set_expecting_events_id(ptr noundef %86, ptr noundef %89, i1 noundef zeroext false, i64 noundef 0)
  %90 = load ptr, ptr %6, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.rule_engine_struct, ptr %90, i32 0, i32 6
  %92 = load i32, ptr %91, align 4, !tbaa !19
  %93 = zext i32 %92 to i64
  %94 = mul i64 %93, 8
  %95 = call ptr @mmt_mem_alloc(i64 noundef %94)
  %96 = load ptr, ptr %6, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.rule_engine_struct, ptr %96, i32 0, i32 3
  store ptr %95, ptr %97, align 8, !tbaa !25
  store i64 0, ptr %5, align 8, !tbaa !9
  br label %98

98:                                               ; preds = %111, %85
  %99 = load i64, ptr %5, align 8, !tbaa !9
  %100 = load ptr, ptr %6, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.rule_engine_struct, ptr %100, i32 0, i32 6
  %102 = load i32, ptr %101, align 4, !tbaa !19
  %103 = zext i32 %102 to i64
  %104 = icmp ult i64 %99, %103
  br i1 %104, label %105, label %114

105:                                              ; preds = %98
  %106 = load ptr, ptr %6, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.rule_engine_struct, ptr %106, i32 0, i32 3
  %108 = load ptr, ptr %107, align 8, !tbaa !25
  %109 = load i64, ptr %5, align 8, !tbaa !9
  %110 = getelementptr inbounds ptr, ptr %108, i64 %109
  store ptr null, ptr %110, align 8, !tbaa !5
  br label %111

111:                                              ; preds = %105
  %112 = load i64, ptr %5, align 8, !tbaa !9
  %113 = add i64 %112, 1
  store i64 %113, ptr %5, align 8, !tbaa !9
  br label %98, !llvm.loop !26

114:                                              ; preds = %98
  %115 = load ptr, ptr %6, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.rule_engine_struct, ptr %115, i32 0, i32 3
  %117 = load ptr, ptr %116, align 8, !tbaa !25
  %118 = getelementptr inbounds ptr, ptr %117, i64 0
  %119 = load ptr, ptr %118, align 8, !tbaa !5
  %120 = load ptr, ptr %6, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.rule_engine_struct, ptr %120, i32 0, i32 1
  %122 = load ptr, ptr %121, align 8, !tbaa !14
  %123 = call ptr @insert_node_to_link_list(ptr noundef %119, ptr noundef %122)
  %124 = load ptr, ptr %6, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.rule_engine_struct, ptr %124, i32 0, i32 3
  %126 = load ptr, ptr %125, align 8, !tbaa !25
  %127 = getelementptr inbounds ptr, ptr %126, i64 0
  store ptr %123, ptr %127, align 8, !tbaa !5
  %128 = load ptr, ptr %6, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.rule_engine_struct, ptr %128, i32 0, i32 5
  %130 = load i32, ptr %129, align 8, !tbaa !18
  %131 = zext i32 %130 to i64
  %132 = call ptr @mmt_array_init(i64 noundef %131)
  %133 = load ptr, ptr %6, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.rule_engine_struct, ptr %133, i32 0, i32 4
  store ptr %132, ptr %134, align 32, !tbaa !27
  %135 = load ptr, ptr %6, align 8, !tbaa !5
  %136 = getelementptr inbounds %struct.rule_engine_struct, ptr %135, i32 0, i32 5
  %137 = load i32, ptr %136, align 8, !tbaa !18
  %138 = zext i32 %137 to i64
  %139 = mul i64 32, %138
  %140 = call ptr @mmt_mem_alloc(i64 noundef %139)
  %141 = load ptr, ptr %6, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.rule_engine_struct, ptr %141, i32 0, i32 10
  store ptr %140, ptr %142, align 64, !tbaa !28
  %143 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_calculate_hash_number(ptr noundef %143)
  %144 = load ptr, ptr %6, align 8, !tbaa !5
  %145 = getelementptr inbounds %struct.rule_engine_struct, ptr %144, i32 0, i32 1
  %146 = load ptr, ptr %145, align 8, !tbaa !14
  %147 = load ptr, ptr %6, align 8, !tbaa !5
  call void @fsm_set_user_data(ptr noundef %146, ptr noundef %147)
  %148 = load ptr, ptr %6, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.rule_engine_struct, ptr %148, i32 0, i32 12
  store i64 0, ptr %149, align 16, !tbaa !29
  %150 = load ptr, ptr %6, align 8, !tbaa !5
  %151 = getelementptr inbounds %struct.rule_engine_struct, ptr %150, i32 0, i32 11
  store i64 0, ptr %151, align 8, !tbaa !30
  %152 = load ptr, ptr %6, align 8, !tbaa !5
  %153 = getelementptr inbounds %struct.rule_engine_struct, ptr %152, i32 0, i32 1
  %154 = load ptr, ptr %153, align 8, !tbaa !14
  %155 = call zeroext i1 @fsm_is_verifying_single_packet(ptr noundef %154)
  br i1 %155, label %156, label %159

156:                                              ; preds = %114
  %157 = load ptr, ptr %6, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.rule_engine_struct, ptr %157, i32 0, i32 9
  store ptr @_process_single_packet, ptr %158, align 8, !tbaa !31
  br label %162

159:                                              ; preds = %114
  %160 = load ptr, ptr %6, align 8, !tbaa !5
  %161 = getelementptr inbounds %struct.rule_engine_struct, ptr %160, i32 0, i32 9
  store ptr @_process_multi_packets, ptr %161, align 8, !tbaa !31
  br label %162

162:                                              ; preds = %159, %156
  %163 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #7
  ret ptr %163
}

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #4

declare ptr @mmt_mem_alloc(i64 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @fsm_set_id(ptr noundef, i16 noundef zeroext) #5

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @_set_expecting_events_id(ptr noundef, ptr noundef, i1 noundef zeroext, i64 noundef) #5

; Function Attrs: inlinehint nounwind uwtable
declare hidden ptr @insert_node_to_link_list(ptr noundef, ptr noundef) #5

; Function Attrs: alwaysinline nounwind uwtable
declare hidden ptr @mmt_array_init(i64 noundef) #6

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @_calculate_hash_number(ptr noundef) #5

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @fsm_set_user_data(ptr noundef, ptr noundef) #5

declare zeroext i1 @fsm_is_verifying_single_packet(ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 72}
!12 = !{!"rule_info_struct", !13, i64 0, !13, i64 4, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !7, i64 40, !7, i64 41, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88}
!13 = !{!"int", !7, i64 0}
!14 = !{!15, !6, i64 8}
!15 = !{!"rule_engine_struct", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !13, i64 40, !13, i64 44, !13, i64 48, !13, i64 52, !6, i64 56, !6, i64 64, !10, i64 72, !10, i64 80}
!16 = !{!15, !6, i64 0}
!17 = !{!12, !7, i64 41}
!18 = !{!15, !13, i64 40}
!19 = !{!15, !13, i64 44}
!20 = !{!15, !13, i64 48}
!21 = !{!15, !13, i64 52}
!22 = !{!15, !6, i64 16}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!15, !6, i64 24}
!26 = distinct !{!26, !24}
!27 = !{!15, !6, i64 32}
!28 = !{!15, !6, i64 64}
!29 = !{!15, !10, i64 80}
!30 = !{!15, !10, i64 72}
!31 = !{!15, !6, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [46 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local i32 @_process_single_packet(ptr noundef, ptr noundef) #0

declare void @mmt_sec_log(i32 noundef, ptr noundef, ...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @_process_multi_packets(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @rule_engine_init(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %3, label %4, !prof !5

3:                                                ; preds = %2
  tail call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 4, ptr noundef nonnull @.str.1) #6
  tail call void @exit(i32 noundef 0) #7
  unreachable

4:                                                ; preds = %2
  %5 = tail call ptr @mmt_mem_alloc(i64 noundef 88) #6
  %6 = getelementptr inbounds i8, ptr %0, i64 72
  %7 = load ptr, ptr %6, align 8, !tbaa !6
  %8 = tail call ptr (...) %7() #6
  %9 = getelementptr inbounds i8, ptr %5, i64 8
  store ptr %8, ptr %9, align 8, !tbaa !12
  tail call void @fsm_set_id(ptr noundef %8, i16 noundef zeroext 0)
  store ptr %0, ptr %5, align 64, !tbaa !15
  %10 = getelementptr inbounds i8, ptr %0, i64 41
  %11 = load i8, ptr %10, align 1, !tbaa !16
  %12 = zext i8 %11 to i32
  %13 = add nuw nsw i32 %12, 1
  %14 = getelementptr inbounds i8, ptr %5, i64 40
  store i32 %13, ptr %14, align 8, !tbaa !17
  %15 = icmp ugt i8 %11, 63
  br i1 %15, label %16, label %17, !prof !5

16:                                               ; preds = %4
  tail call void (i32, ptr, ...) @mmt_sec_log(i32 noundef 4, ptr noundef nonnull @.str.2) #6
  tail call void @exit(i32 noundef 0) #7
  unreachable

17:                                               ; preds = %4
  %18 = trunc i64 %1 to i32
  %19 = getelementptr inbounds i8, ptr %5, i64 44
  store i32 %18, ptr %19, align 4, !tbaa !18
  %20 = getelementptr inbounds i8, ptr %5, i64 48
  store i32 1, ptr %20, align 16, !tbaa !19
  %21 = getelementptr inbounds i8, ptr %5, i64 52
  store i32 0, ptr %21, align 4, !tbaa !20
  %22 = shl nuw nsw i32 %13, 3
  %23 = zext nneg i32 %22 to i64
  %24 = tail call ptr @mmt_mem_alloc(i64 noundef %23) #6
  %25 = getelementptr inbounds i8, ptr %5, i64 16
  store ptr %24, ptr %25, align 16, !tbaa !21
  %26 = load i32, ptr %14, align 8, !tbaa !17
  %27 = zext i32 %26 to i64
  %.not49 = icmp eq i32 %26, 0
  br i1 %.not49, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %17
  %xtraiter = and i64 %27, 3
  %28 = icmp ult i32 %26, 4
  br i1 %28, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %27, 4294967292
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %.044 = phi i64 [ 0, %.lr.ph.preheader.new ], [ %40, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %29 = load ptr, ptr %25, align 16, !tbaa !21
  %30 = getelementptr inbounds ptr, ptr %29, i64 %.044
  store ptr null, ptr %30, align 8, !tbaa !22
  %31 = or disjoint i64 %.044, 1
  %32 = load ptr, ptr %25, align 16, !tbaa !21
  %33 = getelementptr inbounds ptr, ptr %32, i64 %31
  store ptr null, ptr %33, align 8, !tbaa !22
  %34 = or disjoint i64 %.044, 2
  %35 = load ptr, ptr %25, align 16, !tbaa !21
  %36 = getelementptr inbounds ptr, ptr %35, i64 %34
  store ptr null, ptr %36, align 8, !tbaa !22
  %37 = or disjoint i64 %.044, 3
  %38 = load ptr, ptr %25, align 16, !tbaa !21
  %39 = getelementptr inbounds ptr, ptr %38, i64 %37
  store ptr null, ptr %39, align 8, !tbaa !22
  %40 = add nuw nsw i64 %.044, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !23

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %.044.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %40, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %.044.epil = phi i64 [ %43, %.lr.ph.epil ], [ %.044.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %41 = load ptr, ptr %25, align 16, !tbaa !21
  %42 = getelementptr inbounds ptr, ptr %41, i64 %.044.epil
  store ptr null, ptr %42, align 8, !tbaa !22
  %43 = add nuw nsw i64 %.044.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !25

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %17
  %44 = load ptr, ptr %9, align 8, !tbaa !12
  tail call void @_set_expecting_events_id(ptr noundef nonnull %5, ptr noundef %44, i1 noundef zeroext false, i64 noundef 0)
  %45 = load i32, ptr %19, align 4, !tbaa !18
  %46 = zext i32 %45 to i64
  %47 = shl nuw nsw i64 %46, 3
  %48 = tail call ptr @mmt_mem_alloc(i64 noundef %47) #6
  %49 = getelementptr inbounds i8, ptr %5, i64 24
  store ptr %48, ptr %49, align 8, !tbaa !27
  %50 = load i32, ptr %19, align 4, !tbaa !18
  %51 = zext i32 %50 to i64
  %.not50 = icmp eq i32 %50, 0
  br i1 %.not50, label %._crit_edge48, label %.lr.ph47.preheader

.lr.ph47.preheader:                               ; preds = %._crit_edge
  %xtraiter52 = and i64 %51, 3
  %52 = icmp ult i32 %50, 4
  br i1 %52, label %._crit_edge48.loopexit.unr-lcssa, label %.lr.ph47.preheader.new

.lr.ph47.preheader.new:                           ; preds = %.lr.ph47.preheader
  %unroll_iter55 = and i64 %51, 4294967292
  br label %.lr.ph47

.lr.ph47:                                         ; preds = %.lr.ph47, %.lr.ph47.preheader.new
  %.145 = phi i64 [ 0, %.lr.ph47.preheader.new ], [ %64, %.lr.ph47 ]
  %niter56 = phi i64 [ 0, %.lr.ph47.preheader.new ], [ %niter56.next.3, %.lr.ph47 ]
  %53 = load ptr, ptr %49, align 8, !tbaa !27
  %54 = getelementptr inbounds ptr, ptr %53, i64 %.145
  store ptr null, ptr %54, align 8, !tbaa !22
  %55 = or disjoint i64 %.145, 1
  %56 = load ptr, ptr %49, align 8, !tbaa !27
  %57 = getelementptr inbounds ptr, ptr %56, i64 %55
  store ptr null, ptr %57, align 8, !tbaa !22
  %58 = or disjoint i64 %.145, 2
  %59 = load ptr, ptr %49, align 8, !tbaa !27
  %60 = getelementptr inbounds ptr, ptr %59, i64 %58
  store ptr null, ptr %60, align 8, !tbaa !22
  %61 = or disjoint i64 %.145, 3
  %62 = load ptr, ptr %49, align 8, !tbaa !27
  %63 = getelementptr inbounds ptr, ptr %62, i64 %61
  store ptr null, ptr %63, align 8, !tbaa !22
  %64 = add nuw nsw i64 %.145, 4
  %niter56.next.3 = add i64 %niter56, 4
  %niter56.ncmp.3 = icmp eq i64 %niter56.next.3, %unroll_iter55
  br i1 %niter56.ncmp.3, label %._crit_edge48.loopexit.unr-lcssa, label %.lr.ph47, !llvm.loop !28

._crit_edge48.loopexit.unr-lcssa:                 ; preds = %.lr.ph47, %.lr.ph47.preheader
  %.145.unr = phi i64 [ 0, %.lr.ph47.preheader ], [ %64, %.lr.ph47 ]
  %lcmp.mod54.not = icmp eq i64 %xtraiter52, 0
  br i1 %lcmp.mod54.not, label %._crit_edge48.loopexit, label %.lr.ph47.epil

.lr.ph47.epil:                                    ; preds = %._crit_edge48.loopexit.unr-lcssa, %.lr.ph47.epil
  %.145.epil = phi i64 [ %67, %.lr.ph47.epil ], [ %.145.unr, %._crit_edge48.loopexit.unr-lcssa ]
  %epil.iter53 = phi i64 [ %epil.iter53.next, %.lr.ph47.epil ], [ 0, %._crit_edge48.loopexit.unr-lcssa ]
  %65 = load ptr, ptr %49, align 8, !tbaa !27
  %66 = getelementptr inbounds ptr, ptr %65, i64 %.145.epil
  store ptr null, ptr %66, align 8, !tbaa !22
  %67 = add nuw nsw i64 %.145.epil, 1
  %epil.iter53.next = add i64 %epil.iter53, 1
  %epil.iter53.cmp.not = icmp eq i64 %epil.iter53.next, %xtraiter52
  br i1 %epil.iter53.cmp.not, label %._crit_edge48.loopexit, label %.lr.ph47.epil, !llvm.loop !29

._crit_edge48.loopexit:                           ; preds = %.lr.ph47.epil, %._crit_edge48.loopexit.unr-lcssa
  %.pre = load ptr, ptr %49, align 8, !tbaa !27
  br label %._crit_edge48

._crit_edge48:                                    ; preds = %._crit_edge48.loopexit, %._crit_edge
  %68 = phi ptr [ %.pre, %._crit_edge48.loopexit ], [ %48, %._crit_edge ]
  %69 = load ptr, ptr %68, align 8, !tbaa !22
  %70 = load ptr, ptr %9, align 8, !tbaa !12
  %71 = tail call ptr @insert_node_to_link_list(ptr noundef %69, ptr noundef %70)
  %72 = load ptr, ptr %49, align 8, !tbaa !27
  store ptr %71, ptr %72, align 8, !tbaa !22
  %73 = load i32, ptr %14, align 8, !tbaa !17
  %74 = zext i32 %73 to i64
  %75 = tail call ptr @mmt_array_init(i64 noundef %74)
  %76 = getelementptr inbounds i8, ptr %5, i64 32
  store ptr %75, ptr %76, align 32, !tbaa !30
  %77 = load i32, ptr %14, align 8, !tbaa !17
  %78 = zext i32 %77 to i64
  %79 = shl nuw nsw i64 %78, 5
  %80 = tail call ptr @mmt_mem_alloc(i64 noundef %79) #6
  %81 = getelementptr inbounds i8, ptr %5, i64 64
  store ptr %80, ptr %81, align 64, !tbaa !31
  tail call void @_calculate_hash_number(ptr noundef nonnull %5)
  %82 = load ptr, ptr %9, align 8, !tbaa !12
  tail call void @fsm_set_user_data(ptr noundef %82, ptr noundef nonnull %5)
  %83 = getelementptr inbounds i8, ptr %5, i64 72
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %83, i8 0, i64 16, i1 false)
  %84 = load ptr, ptr %9, align 8, !tbaa !12
  %85 = tail call zeroext i1 @fsm_is_verifying_single_packet(ptr noundef %84) #6
  %spec.select = select i1 %85, ptr @_process_single_packet, ptr @_process_multi_packets
  %86 = getelementptr inbounds i8, ptr %5, i64 56
  store ptr %spec.select, ptr %86, align 8
  ret ptr %5
}

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #2

declare ptr @mmt_mem_alloc(i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @fsm_set_id(ptr noundef, i16 noundef zeroext) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @_set_expecting_events_id(ptr noundef, ptr noundef, i1 noundef zeroext, i64 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden ptr @insert_node_to_link_list(ptr noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden ptr @mmt_array_init(i64 noundef) local_unnamed_addr #4

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @_calculate_hash_number(ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @fsm_set_user_data(ptr noundef, ptr noundef) local_unnamed_addr #3

declare zeroext i1 @fsm_is_verifying_single_packet(ptr noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!6 = !{!7, !11, i64 72}
!7 = !{!"rule_info_struct", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !9, i64 40, !9, i64 41, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"rule_engine_struct", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !8, i64 40, !8, i64 44, !8, i64 48, !8, i64 52, !11, i64 56, !11, i64 64, !14, i64 72, !14, i64 80}
!14 = !{!"long", !9, i64 0}
!15 = !{!13, !11, i64 0}
!16 = !{!7, !9, i64 41}
!17 = !{!13, !8, i64 40}
!18 = !{!13, !8, i64 44}
!19 = !{!13, !8, i64 48}
!20 = !{!13, !8, i64 52}
!21 = !{!13, !11, i64 16}
!22 = !{!11, !11, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.unroll.disable"}
!27 = !{!13, !11, i64 24}
!28 = distinct !{!28, !24}
!29 = distinct !{!29, !26}
!30 = !{!13, !11, i64 32}
!31 = !{!13, !11, i64 64}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LowerExpectIntrinsicPass,MemCpyOptPass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass