; LLVM IR from taichi-dev/taichi :: taichi/runtime/llvm/runtime_module (runtime)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @cuda_shfl_down_sync_f32(i32 noundef, float noundef, i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @op_add_f32(float noundef, float noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local float @warp_reduce_add_f32(i32 noundef %0, float noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca float, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store float %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 16, ptr %5, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %17, %2
  %7 = load i32, ptr %5, align 4, !tbaa !5
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %10, label %9

9:                                                ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %20

10:                                               ; preds = %6
  %11 = load float, ptr %4, align 4, !tbaa !9
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = load float, ptr %4, align 4, !tbaa !9
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = call float @cuda_shfl_down_sync_f32(i32 noundef %12, float noundef %13, i32 noundef %14, i32 noundef 31)
  %16 = call float @op_add_f32(float noundef %11, float noundef %15)
  store float %16, ptr %4, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %10
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = sdiv i32 %18, 2
  store i32 %19, ptr %5, align 4, !tbaa !5
  br label %6, !llvm.loop !11

20:                                               ; preds = %9
  %21 = load float, ptr %4, align 4, !tbaa !9
  ret float %21
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @cuda_shfl_down_sync_f32(i32 noundef, float noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @op_add_f32(float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local float @warp_reduce_add_f32(i32 noundef %0, float noundef %1) local_unnamed_addr #0 {
  %3 = tail call float @cuda_shfl_down_sync_f32(i32 noundef %0, float noundef %1, i32 noundef 16, i32 noundef 31)
  %4 = tail call float @op_add_f32(float noundef %1, float noundef %3)
  %5 = tail call float @cuda_shfl_down_sync_f32(i32 noundef %0, float noundef %4, i32 noundef 8, i32 noundef 31)
  %6 = tail call float @op_add_f32(float noundef %4, float noundef %5)
  %7 = tail call float @cuda_shfl_down_sync_f32(i32 noundef %0, float noundef %6, i32 noundef 4, i32 noundef 31)
  %8 = tail call float @op_add_f32(float noundef %6, float noundef %7)
  %9 = tail call float @cuda_shfl_down_sync_f32(i32 noundef %0, float noundef %8, i32 noundef 2, i32 noundef 31)
  %10 = tail call float @op_add_f32(float noundef %8, float noundef %9)
  %11 = tail call float @cuda_shfl_down_sync_f32(i32 noundef %0, float noundef %10, i32 noundef 1, i32 noundef 31)
  %12 = tail call float @op_add_f32(float noundef %10, float noundef %11)
  ret float %12
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass