; LLVM IR from taichi-dev/taichi :: taichi/runtime/llvm/runtime_module (runtime)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @thread_idx() #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @warp_size() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @atomic_add_f32(ptr noundef, float noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @cuda_active_mask() #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @warp_reduce_add_f32(i32 noundef, float noundef) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local float @reduce_add_f32(ptr noundef %0, float noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca float, align 4
  %5 = alloca i32, align 4
  %6 = alloca float, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store float %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %7 = call i32 @cuda_active_mask()
  store i32 %7, ptr %5, align 4, !tbaa !11
  %8 = load i32, ptr %5, align 4, !tbaa !11
  %9 = icmp ne i32 %8, -1
  br i1 %9, label %10, label %14

10:                                               ; preds = %2
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = load float, ptr %4, align 4, !tbaa !9
  %13 = call float @atomic_add_f32(ptr noundef %11, float noundef %12)
  br label %27

14:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %15 = load float, ptr %4, align 4, !tbaa !9
  %16 = call float @warp_reduce_add_f32(i32 noundef -1, float noundef %15)
  store float %16, ptr %6, align 4, !tbaa !9
  %17 = call i32 @thread_idx()
  %18 = call i32 @warp_size()
  %19 = sub nsw i32 %18, 1
  %20 = and i32 %17, %19
  %21 = icmp eq i32 %20, 0
  br i1 %21, label %22, label %26

22:                                               ; preds = %14
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = load float, ptr %6, align 4, !tbaa !9
  %25 = call float @atomic_add_f32(ptr noundef %23, float noundef %24)
  br label %26

26:                                               ; preds = %22, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %27

27:                                               ; preds = %26, %10
  %28 = load float, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret float %28
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @thread_idx() local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @warp_size() local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @atomic_add_f32(ptr noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @cuda_active_mask() local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local float @warp_reduce_add_f32(i32 noundef, float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef float @reduce_add_f32(ptr noundef %0, float noundef returned %1) local_unnamed_addr #0 {
  %3 = tail call i32 @cuda_active_mask()
  %.not = icmp eq i32 %3, -1
  br i1 %.not, label %4, label %.sink.split

4:                                                ; preds = %2
  %5 = tail call float @warp_reduce_add_f32(i32 noundef -1, float noundef %1)
  %6 = tail call i32 @thread_idx()
  %7 = tail call i32 @warp_size()
  %8 = add nsw i32 %7, -1
  %9 = and i32 %8, %6
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %.sink.split, label %12

.sink.split:                                      ; preds = %4, %2
  %.sink = phi float [ %1, %2 ], [ %5, %4 ]
  %11 = tail call float @atomic_add_f32(ptr noundef %0, float noundef %.sink)
  br label %12

12:                                               ; preds = %.sink.split, %4
  ret float %1
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass