; LLVM IR from PetarV-/Algorithms :: Searching Algorithms/Quickselect.ll (Z7qselectiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@niz = external dso_local global [1000001 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z7qselectiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = icmp slt i32 %12, %13
  br i1 %14, label %15, label %91

15:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %16 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %16, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %6, align 4, !tbaa !5
  %19 = add nsw i32 %17, %18
  %20 = sdiv i32 %19, 2
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !5
  store i32 %23, ptr %9, align 4, !tbaa !5
  %24 = load i32, ptr %5, align 4, !tbaa !5
  %25 = load i32, ptr %6, align 4, !tbaa !5
  %26 = add nsw i32 %24, %25
  %27 = sdiv i32 %26, 2
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %28
  %30 = load i32, ptr %6, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %31
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %29, ptr noundef nonnull align 4 dereferenceable(4) %32) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %33 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %33, ptr %10, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %56, %15
  %35 = load i32, ptr %10, align 4, !tbaa !5
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = icmp slt i32 %35, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %59

39:                                               ; preds = %34
  %40 = load i32, ptr %10, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %41
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = load i32, ptr %9, align 4, !tbaa !5
  %45 = icmp slt i32 %43, %44
  br i1 %45, label %46, label %55

46:                                               ; preds = %39
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %48
  %50 = load i32, ptr %10, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %51
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %49, ptr noundef nonnull align 4 dereferenceable(4) %52) #3
  %53 = load i32, ptr %8, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %8, align 4, !tbaa !5
  br label %55

55:                                               ; preds = %46, %39
  br label %56

56:                                               ; preds = %55
  %57 = load i32, ptr %10, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %10, align 4, !tbaa !5
  br label %34, !llvm.loop !9

59:                                               ; preds = %38
  %60 = load i32, ptr %8, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %61
  %63 = load i32, ptr %6, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %64
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %62, ptr noundef nonnull align 4 dereferenceable(4) %65) #3
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = load i32, ptr %7, align 4, !tbaa !5
  %68 = icmp eq i32 %66, %67
  br i1 %68, label %69, label %74

69:                                               ; preds = %59
  %70 = load i32, ptr %8, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %71
  %73 = load i32, ptr %72, align 4, !tbaa !5
  store i32 %73, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %90

74:                                               ; preds = %59
  %75 = load i32, ptr %7, align 4, !tbaa !5
  %76 = load i32, ptr %8, align 4, !tbaa !5
  %77 = icmp slt i32 %75, %76
  br i1 %77, label %78, label %84

78:                                               ; preds = %74
  %79 = load i32, ptr %5, align 4, !tbaa !5
  %80 = load i32, ptr %8, align 4, !tbaa !5
  %81 = sub nsw i32 %80, 1
  %82 = load i32, ptr %7, align 4, !tbaa !5
  %83 = call noundef i32 @_Z7qselectiii(i32 noundef %79, i32 noundef %81, i32 noundef %82)
  store i32 %83, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %90

84:                                               ; preds = %74
  %85 = load i32, ptr %8, align 4, !tbaa !5
  %86 = add nsw i32 %85, 1
  %87 = load i32, ptr %6, align 4, !tbaa !5
  %88 = load i32, ptr %7, align 4, !tbaa !5
  %89 = call noundef i32 @_Z7qselectiii(i32 noundef %86, i32 noundef %87, i32 noundef %88)
  store i32 %89, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %90

90:                                               ; preds = %84, %78, %69
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %96

91:                                               ; preds = %3
  %92 = load i32, ptr %5, align 4, !tbaa !5
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %93
  %95 = load i32, ptr %94, align 4, !tbaa !5
  store i32 %95, ptr %4, align 4
  br label %96

96:                                               ; preds = %91, %90
  %97 = load i32, ptr %4, align 4
  ret i32 %97
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@niz = external dso_local global [1000001 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z7qselectiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp slt i32 %0, %1
  br i1 %4, label %.lr.ph, label %tailrecurse.outer._crit_edge

.lr.ph:                                           ; preds = %3, %tailrecurse.outer
  %.tr39.ph51 = phi i32 [ %.tr3948, %tailrecurse.outer ], [ %1, %3 ]
  %.tr.ph50 = phi i32 [ %32, %tailrecurse.outer ], [ %0, %3 ]
  %5 = sext i32 %.tr.ph50 to i64
  br label %6

6:                                                ; preds = %.lr.ph, %tailrecurse
  %.tr3948 = phi i32 [ %.tr39.ph51, %.lr.ph ], [ %30, %tailrecurse ]
  %7 = add nsw i32 %.tr3948, %.tr.ph50
  %8 = sdiv i32 %7, 2
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = sext i32 %.tr3948 to i64
  %13 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %12
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %13) #2
  br label %18

14:                                               ; preds = %26
  %15 = sext i32 %.134 to i64
  %16 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %15
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %16, ptr noundef nonnull align 4 dereferenceable(4) %13) #2
  %17 = icmp eq i32 %.134, %2
  br i1 %17, label %.loopexit, label %28

18:                                               ; preds = %6, %26
  %indvars.iv = phi i64 [ %5, %6 ], [ %indvars.iv.next, %26 ]
  %.03346 = phi i32 [ %.tr.ph50, %6 ], [ %.134, %26 ]
  %19 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %indvars.iv
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp slt i32 %20, %11
  br i1 %21, label %22, label %26

22:                                               ; preds = %18
  %23 = sext i32 %.03346 to i64
  %24 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %23
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %24, ptr noundef nonnull align 4 dereferenceable(4) %19) #2
  %25 = add nsw i32 %.03346, 1
  br label %26

26:                                               ; preds = %18, %22
  %.134 = phi i32 [ %25, %22 ], [ %.03346, %18 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %27 = icmp slt i64 %indvars.iv.next, %12
  br i1 %27, label %18, label %14, !llvm.loop !9

28:                                               ; preds = %14
  %29 = icmp sgt i32 %.134, %2
  br i1 %29, label %tailrecurse, label %tailrecurse.outer

tailrecurse:                                      ; preds = %28
  %30 = add nsw i32 %.134, -1
  %31 = icmp slt i32 %.tr.ph50, %30
  br i1 %31, label %6, label %tailrecurse.outer._crit_edge

tailrecurse.outer:                                ; preds = %28
  %32 = add nsw i32 %.134, 1
  %33 = icmp slt i32 %32, %.tr3948
  br i1 %33, label %.lr.ph, label %tailrecurse.outer._crit_edge

tailrecurse.outer._crit_edge:                     ; preds = %tailrecurse.outer, %tailrecurse, %3
  %.tr.ph.lcssa45 = phi i32 [ %0, %3 ], [ %.tr.ph50, %tailrecurse ], [ %32, %tailrecurse.outer ]
  %34 = sext i32 %.tr.ph.lcssa45 to i64
  %35 = getelementptr inbounds [1000001 x i32], ptr @niz, i64 0, i64 %34
  br label %.loopexit

.loopexit:                                        ; preds = %14, %tailrecurse.outer._crit_edge
  %.1.in = phi ptr [ %35, %tailrecurse.outer._crit_edge ], [ %16, %14 ]
  %.1 = load i32, ptr %.1.in, align 4, !tbaa !5
  ret i32 %.1
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass