; LLVM IR from whoiswelliton/Computer_Engineering_UTFPR-PB :: Embedded_Systems/TIVA Connected TM4C1294XL Projects/01 - lwIP_HTTPServer_on_TIVA (wnd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.tcp_pcb = type { %struct.ip4_addr, %struct.ip4_addr, i8, i8, i8, i8, ptr, ptr, i32, i8, i16, i16, i16, i8, i8, i8, i32, i32, i16, i16, i32, i16, i16, i32, i32, i16, i16, i16, i8, i8, i32, i16, i16, i32, i32, i32, i32, i32, i16, i16, i16, i16, i16, i16, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i8, i8, i8, i8 }
%struct.ip4_addr = type { i32 }

@.str = external hidden unnamed_addr constant [40 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [178 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [26 x i8], align 1

declare i32 @printf(ptr noundef, ...) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @tcp_update_rcv_ann_wnd(ptr noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  br label %7

7:                                                ; preds = %1
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp ne ptr %8, null
  br i1 %9, label %15, label %10

10:                                               ; preds = %7
  br label %11

11:                                               ; preds = %10
  %12 = call i32 (ptr, ...) @printf(ptr noundef @.str, ptr noundef @.str.11, i32 noundef 934, ptr noundef @.str.2)
  br label %13

13:                                               ; preds = %11
  br label %14

14:                                               ; preds = %13
  br label %15

15:                                               ; preds = %14, %7
  br label %16

16:                                               ; preds = %15
  br label %17

17:                                               ; preds = %16
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.tcp_pcb, ptr %18, i32 0, i32 17
  %20 = load i32, ptr %19, align 4, !tbaa !9
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.tcp_pcb, ptr %21, i32 0, i32 18
  %23 = load i16, ptr %22, align 8, !tbaa !14
  %24 = zext i16 %23 to i32
  %25 = add i32 %20, %24
  store i32 %25, ptr %4, align 4, !tbaa !15
  %26 = load i32, ptr %4, align 4, !tbaa !15
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.tcp_pcb, ptr %27, i32 0, i32 20
  %29 = load i32, ptr %28, align 4, !tbaa !16
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.tcp_pcb, ptr %30, i32 0, i32 22
  %32 = load i16, ptr %31, align 2, !tbaa !17
  %33 = zext i16 %32 to i32
  %34 = icmp slt i32 1460, %33
  br i1 %34, label %35, label %36

35:                                               ; preds = %17
  br label %41

36:                                               ; preds = %17
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.tcp_pcb, ptr %37, i32 0, i32 22
  %39 = load i16, ptr %38, align 2, !tbaa !17
  %40 = zext i16 %39 to i32
  br label %41

41:                                               ; preds = %36, %35
  %42 = phi i32 [ 1460, %35 ], [ %40, %36 ]
  %43 = add i32 %29, %42
  %44 = sub i32 %26, %43
  %45 = icmp sge i32 %44, 0
  br i1 %45, label %46, label %57

46:                                               ; preds = %41
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.tcp_pcb, ptr %47, i32 0, i32 18
  %49 = load i16, ptr %48, align 8, !tbaa !14
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.tcp_pcb, ptr %50, i32 0, i32 19
  store i16 %49, ptr %51, align 2, !tbaa !18
  %52 = load i32, ptr %4, align 4, !tbaa !15
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.tcp_pcb, ptr %53, i32 0, i32 20
  %55 = load i32, ptr %54, align 4, !tbaa !16
  %56 = sub i32 %52, %55
  store i32 %56, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %93

57:                                               ; preds = %41
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.tcp_pcb, ptr %58, i32 0, i32 17
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.tcp_pcb, ptr %61, i32 0, i32 20
  %63 = load i32, ptr %62, align 4, !tbaa !16
  %64 = sub i32 %60, %63
  %65 = icmp sgt i32 %64, 0
  br i1 %65, label %66, label %69

66:                                               ; preds = %57
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.tcp_pcb, ptr %67, i32 0, i32 19
  store i16 0, ptr %68, align 2, !tbaa !18
  br label %92

69:                                               ; preds = %57
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.tcp_pcb, ptr %70, i32 0, i32 20
  %72 = load i32, ptr %71, align 4, !tbaa !16
  %73 = load ptr, ptr %3, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.tcp_pcb, ptr %73, i32 0, i32 17
  %75 = load i32, ptr %74, align 4, !tbaa !9
  %76 = sub i32 %72, %75
  store i32 %76, ptr %6, align 4, !tbaa !15
  br label %77

77:                                               ; preds = %69
  %78 = load i32, ptr %6, align 4, !tbaa !15
  %79 = icmp ule i32 %78, 65535
  br i1 %79, label %85, label %80

80:                                               ; preds = %77
  br label %81

81:                                               ; preds = %80
  %82 = call i32 (ptr, ...) @printf(ptr noundef @.str, ptr noundef @.str.12, i32 noundef 950, ptr noundef @.str.2)
  br label %83

83:                                               ; preds = %81
  br label %84

84:                                               ; preds = %83
  br label %85

85:                                               ; preds = %84, %77
  br label %86

86:                                               ; preds = %85
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %6, align 4, !tbaa !15
  %89 = trunc i32 %88 to i16
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.tcp_pcb, ptr %90, i32 0, i32 19
  store i16 %89, ptr %91, align 2, !tbaa !18
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %92

92:                                               ; preds = %87, %66
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %93

93:                                               ; preds = %92, %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %94 = load i32, ptr %2, align 4
  ret i32 %94
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 52}
!10 = !{!"tcp_pcb", !11, i64 0, !11, i64 4, !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !6, i64 16, !6, i64 24, !12, i64 32, !7, i64 36, !13, i64 38, !13, i64 40, !13, i64 42, !7, i64 44, !7, i64 45, !7, i64 46, !12, i64 48, !12, i64 52, !13, i64 56, !13, i64 58, !12, i64 60, !13, i64 64, !13, i64 66, !12, i64 68, !12, i64 72, !13, i64 76, !13, i64 78, !13, i64 80, !7, i64 82, !7, i64 83, !12, i64 84, !13, i64 88, !13, i64 90, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !13, i64 112, !13, i64 114, !13, i64 116, !13, i64 118, !13, i64 120, !13, i64 122, !6, i64 128, !6, i64 136, !6, i64 144, !6, i64 152, !6, i64 160, !6, i64 168, !6, i64 176, !6, i64 184, !6, i64 192, !12, i64 200, !7, i64 204, !7, i64 205, !7, i64 206, !7, i64 207}
!11 = !{!"ip4_addr", !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!10, !13, i64 56}
!15 = !{!12, !12, i64 0}
!16 = !{!10, !12, i64 60}
!17 = !{!10, !13, i64 66}
!18 = !{!10, !13, i64 58}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [40 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [178 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: nofree nounwind uwtable
define dso_local i32 @tcp_update_rcv_ann_wnd(ptr noundef %0) local_unnamed_addr #1 {
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %2, label %4

2:                                                ; preds = %1
  %3 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, ptr noundef nonnull @.str.11, i32 noundef 934, ptr noundef nonnull @.str.2)
  br label %4

4:                                                ; preds = %2, %1
  %5 = getelementptr inbounds i8, ptr %0, i64 52
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 56
  %8 = load i16, ptr %7, align 8, !tbaa !13
  %9 = zext i16 %8 to i32
  %10 = add i32 %6, %9
  %11 = getelementptr inbounds i8, ptr %0, i64 60
  %12 = load i32, ptr %11, align 4, !tbaa !14
  %13 = getelementptr inbounds i8, ptr %0, i64 66
  %14 = load i16, ptr %13, align 2, !tbaa !15
  %narrow = tail call i16 @llvm.umin.i16(i16 %14, i16 1460)
  %spec.select = zext nneg i16 %narrow to i32
  %15 = add i32 %12, %spec.select
  %16 = sub i32 %10, %15
  %17 = icmp sgt i32 %16, -1
  br i1 %17, label %18, label %21

18:                                               ; preds = %4
  %19 = getelementptr inbounds i8, ptr %0, i64 58
  store i16 %8, ptr %19, align 2, !tbaa !16
  %20 = sub i32 %10, %12
  br label %34

21:                                               ; preds = %4
  %22 = sub i32 %6, %12
  %23 = icmp sgt i32 %22, 0
  br i1 %23, label %24, label %26

24:                                               ; preds = %21
  %25 = getelementptr inbounds i8, ptr %0, i64 58
  store i16 0, ptr %25, align 2, !tbaa !16
  br label %34

26:                                               ; preds = %21
  %27 = sub i32 %12, %6
  %28 = icmp ult i32 %27, 65536
  br i1 %28, label %31, label %29

29:                                               ; preds = %26
  %30 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, ptr noundef nonnull @.str.12, i32 noundef 950, ptr noundef nonnull @.str.2)
  br label %31

31:                                               ; preds = %29, %26
  %32 = trunc i32 %27 to i16
  %33 = getelementptr inbounds i8, ptr %0, i64 58
  store i16 %32, ptr %33, align 2, !tbaa !16
  br label %34

34:                                               ; preds = %24, %31, %18
  %.0 = phi i32 [ %20, %18 ], [ 0, %31 ], [ 0, %24 ]
  ret i32 %.0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i16 @llvm.umin.i16(i16, i16) #2

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 52}
!6 = !{!"tcp_pcb", !7, i64 0, !7, i64 4, !9, i64 8, !9, i64 9, !9, i64 10, !9, i64 11, !11, i64 16, !11, i64 24, !8, i64 32, !9, i64 36, !12, i64 38, !12, i64 40, !12, i64 42, !9, i64 44, !9, i64 45, !9, i64 46, !8, i64 48, !8, i64 52, !12, i64 56, !12, i64 58, !8, i64 60, !12, i64 64, !12, i64 66, !8, i64 68, !8, i64 72, !12, i64 76, !12, i64 78, !12, i64 80, !9, i64 82, !9, i64 83, !8, i64 84, !12, i64 88, !12, i64 90, !8, i64 92, !8, i64 96, !8, i64 100, !8, i64 104, !8, i64 108, !12, i64 112, !12, i64 114, !12, i64 116, !12, i64 118, !12, i64 120, !12, i64 122, !11, i64 128, !11, i64 136, !11, i64 144, !11, i64 152, !11, i64 160, !11, i64 168, !11, i64 176, !11, i64 184, !11, i64 192, !8, i64 200, !9, i64 204, !9, i64 205, !9, i64 206, !9, i64 207}
!7 = !{!"ip4_addr", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"short", !9, i64 0}
!13 = !{!6, !12, i64 56}
!14 = !{!6, !8, i64 60}
!15 = !{!6, !12, i64 66}
!16 = !{!6, !12, i64 58}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass