; LLVM IR from Tunghohin/Competitive_Coding :: Daimayuan/1060.ll (Z5checki)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.FlowGraph = type <{ i32, i32, i32, [4 x i8], [202000 x %"struct.FlowGraph<long long>::edge"], [100100 x i32], i32, [100100 x i32], [100100 x i32], [4 x i8] }>
%"struct.FlowGraph<long long>::edge" = type { i32, i32, i64 }
%"struct.std::pair" = type { i32, i32 }

@nn = external dso_local global i32, align 4
@mm = external dso_local global i32, align 4
@games = external dso_local global %"class.std::vector", align 8
@g = external dso_local global %class.FlowGraph, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5checki(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %8 = load i32, ptr @nn, align 4, !tbaa !5
  %9 = load i32, ptr @mm, align 4, !tbaa !5
  %10 = add nsw i32 %8, %9
  %11 = add nsw i32 %10, 1
  store i32 %11, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %12 = load i32, ptr @nn, align 4, !tbaa !5
  %13 = load i32, ptr @mm, align 4, !tbaa !5
  %14 = add nsw i32 %12, %13
  %15 = add nsw i32 %14, 2
  store i32 %15, ptr %4, align 4, !tbaa !5
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = load i32, ptr %4, align 4, !tbaa !5
  call void @_ZN9FlowGraphIxE4initEiii(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %16, i32 noundef %17, i32 noundef %18)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 1, ptr %5, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %43, %1
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = load i32, ptr @mm, align 4, !tbaa !5
  %22 = icmp sle i32 %20, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %46

24:                                               ; preds = %19
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !5
  call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %25, i32 noundef %26, i64 noundef 1)
  %27 = load i32, ptr %5, align 4, !tbaa !5
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIiiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @games, i64 noundef %29) #3
  %31 = getelementptr inbounds %"struct.std::pair", ptr %30, i32 0, i32 0
  %32 = load i32, ptr %31, align 4, !tbaa !9
  %33 = load i32, ptr @mm, align 4, !tbaa !5
  %34 = add nsw i32 %32, %33
  call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %27, i32 noundef %34, i64 noundef 1)
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIiiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @games, i64 noundef %37) #3
  %39 = getelementptr inbounds %"struct.std::pair", ptr %38, i32 0, i32 1
  %40 = load i32, ptr %39, align 4, !tbaa !11
  %41 = load i32, ptr @mm, align 4, !tbaa !5
  %42 = add nsw i32 %40, %41
  call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %35, i32 noundef %42, i64 noundef 1)
  br label %43

43:                                               ; preds = %24
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %5, align 4, !tbaa !5
  br label %19, !llvm.loop !12

46:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 1, ptr %6, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %59, %46
  %48 = load i32, ptr %6, align 4, !tbaa !5
  %49 = load i32, ptr @nn, align 4, !tbaa !5
  %50 = icmp sle i32 %48, %49
  br i1 %50, label %52, label %51

51:                                               ; preds = %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %62

52:                                               ; preds = %47
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = load i32, ptr @mm, align 4, !tbaa !5
  %55 = add nsw i32 %53, %54
  %56 = load i32, ptr %4, align 4, !tbaa !5
  %57 = load i32, ptr %2, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %55, i32 noundef %56, i64 noundef %58)
  br label %59

59:                                               ; preds = %52
  %60 = load i32, ptr %6, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %6, align 4, !tbaa !5
  br label %47, !llvm.loop !14

62:                                               ; preds = %51
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %63 = call noundef i64 @_ZN9FlowGraphIxE5dinicEv(ptr noundef nonnull align 8 dereferenceable(4433220) @g)
  store i64 %63, ptr %7, align 8, !tbaa !15
  %64 = load i64, ptr %7, align 8, !tbaa !15
  %65 = load i32, ptr @mm, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = icmp eq i64 %64, %66
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i1 %67
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9FlowGraphIxE4initEiii(ptr noundef nonnull align 8 dereferenceable(4433220), i32 noundef, i32 noundef, i32 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220), i32 noundef, i32 noundef, i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIiiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN9FlowGraphIxE5dinicEv(ptr noundef nonnull align 8 dereferenceable(4433220)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSSt4pairIiiE", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = !{!16, !16, i64 0}
!16 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.FlowGraph = type <{ i32, i32, i32, [4 x i8], [202000 x %"struct.FlowGraph<long long>::edge"], [100100 x i32], i32, [100100 x i32], [100100 x i32], [4 x i8] }>
%"struct.FlowGraph<long long>::edge" = type { i32, i32, i64 }

@nn = external dso_local local_unnamed_addr global i32, align 4
@mm = external dso_local local_unnamed_addr global i32, align 4
@games = external dso_local global %"class.std::vector", align 8
@g = external dso_local global %class.FlowGraph, align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z5checki(i32 noundef %0) local_unnamed_addr #0 {
  %2 = load i32, ptr @nn, align 4, !tbaa !5
  %3 = load i32, ptr @mm, align 4, !tbaa !5
  %4 = add nsw i32 %3, %2
  %5 = add nsw i32 %4, 1
  %6 = add nsw i32 %4, 2
  tail call void @_ZN9FlowGraphIxE4initEiii(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %5, i32 noundef %6, i32 noundef %6)
  %7 = load i32, ptr @mm, align 4, !tbaa !5
  %.not19 = icmp slt i32 %7, 1
  br i1 %.not19, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %1
  %8 = load i32, ptr @nn, align 4, !tbaa !5
  %.not1821 = icmp slt i32 %8, 1
  br i1 %.not1821, label %._crit_edge, label %.lr.ph23

.lr.ph23:                                         ; preds = %.preheader
  %9 = sext i32 %0 to i64
  br label %26

.lr.ph:                                           ; preds = %1, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 1, %1 ]
  %10 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %5, i32 noundef %10, i64 noundef 1)
  %11 = tail call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIiiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @games, i64 noundef %indvars.iv) #2
  %12 = load i32, ptr %11, align 4, !tbaa !9
  %13 = load i32, ptr @mm, align 4, !tbaa !5
  %14 = add nsw i32 %13, %12
  tail call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %10, i32 noundef %14, i64 noundef 1)
  %15 = tail call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIiiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @games, i64 noundef %indvars.iv) #2
  %16 = getelementptr inbounds i8, ptr %15, i64 4
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = load i32, ptr @mm, align 4, !tbaa !5
  %19 = add nsw i32 %18, %17
  tail call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %10, i32 noundef %19, i64 noundef 1)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %20 = load i32, ptr @mm, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %.not.not = icmp slt i64 %indvars.iv, %21
  br i1 %.not.not, label %.lr.ph, label %.preheader, !llvm.loop !12

._crit_edge:                                      ; preds = %26, %.preheader
  %22 = tail call noundef i64 @_ZN9FlowGraphIxE5dinicEv(ptr noundef nonnull align 8 dereferenceable(4433220) @g)
  %23 = load i32, ptr @mm, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = icmp eq i64 %22, %24
  ret i1 %25

26:                                               ; preds = %.lr.ph23, %26
  %.01722 = phi i32 [ 1, %.lr.ph23 ], [ %29, %26 ]
  %27 = load i32, ptr @mm, align 4, !tbaa !5
  %28 = add nsw i32 %27, %.01722
  tail call void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220) @g, i32 noundef %28, i32 noundef %6, i64 noundef %9)
  %29 = add nuw nsw i32 %.01722, 1
  %30 = load i32, ptr @nn, align 4, !tbaa !5
  %.not18.not = icmp slt i32 %.01722, %30
  br i1 %.not18.not, label %26, label %._crit_edge, !llvm.loop !14
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9FlowGraphIxE4initEiii(ptr noundef nonnull align 8 dereferenceable(4433220), i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN9FlowGraphIxE8add_edgeEiix(ptr noundef nonnull align 8 dereferenceable(4433220), i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIiiESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZN9FlowGraphIxE5dinicEv(ptr noundef nonnull align 8 dereferenceable(4433220)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSSt4pairIiiE", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass