; LLVM IR from DionysiosB/CodeForces :: 1300-1399/1352E-SpecialElements.ll (Z5checkSt6vectorIlSaIlEEl)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5checkSt6vectorIlSaIlEEl(ptr noundef %0, i64 noundef %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 0, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  store i64 1, ptr %7, align 8, !tbaa !9
  br label %10

10:                                               ; preds = %52, %2
  %11 = load i64, ptr %7, align 8, !tbaa !9
  %12 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %13 = icmp ult i64 %11, %12
  br i1 %13, label %14, label %53

14:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  %15 = load i64, ptr %7, align 8, !tbaa !9
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #2
  %17 = load i64, ptr %16, align 8, !tbaa !9
  %18 = load i64, ptr %6, align 8, !tbaa !9
  %19 = icmp sgt i64 %18, 0
  br i1 %19, label %20, label %25

20:                                               ; preds = %14
  %21 = load i64, ptr %6, align 8, !tbaa !9
  %22 = sub nsw i64 %21, 1
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #2
  %24 = load i64, ptr %23, align 8, !tbaa !9
  br label %26

25:                                               ; preds = %14
  br label %26

26:                                               ; preds = %25, %20
  %27 = phi i64 [ %24, %20 ], [ 0, %25 ]
  %28 = sub nsw i64 %17, %27
  store i64 %28, ptr %8, align 8, !tbaa !9
  %29 = load i64, ptr %8, align 8, !tbaa !9
  %30 = load i64, ptr %5, align 8, !tbaa !9
  %31 = icmp eq i64 %29, %30
  br i1 %31, label %32, label %33

32:                                               ; preds = %26
  store i1 true, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %50

33:                                               ; preds = %26
  %34 = load i64, ptr %8, align 8, !tbaa !9
  %35 = load i64, ptr %5, align 8, !tbaa !9
  %36 = icmp sgt i64 %34, %35
  br i1 %36, label %37, label %45

37:                                               ; preds = %33
  %38 = load i64, ptr %6, align 8, !tbaa !9
  %39 = add nsw i64 %38, 1
  %40 = load i64, ptr %7, align 8, !tbaa !9
  %41 = icmp slt i64 %39, %40
  br i1 %41, label %42, label %45

42:                                               ; preds = %37
  %43 = load i64, ptr %6, align 8, !tbaa !9
  %44 = add nsw i64 %43, 1
  store i64 %44, ptr %6, align 8, !tbaa !9
  br label %48

45:                                               ; preds = %37, %33
  %46 = load i64, ptr %7, align 8, !tbaa !9
  %47 = add nsw i64 %46, 1
  store i64 %47, ptr %7, align 8, !tbaa !9
  br label %48

48:                                               ; preds = %45, %42
  br label %49

49:                                               ; preds = %48
  store i32 0, ptr %9, align 4
  br label %50

50:                                               ; preds = %49, %32
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %51 = load i32, ptr %9, align 4
  switch i32 %51, label %54 [
    i32 0, label %52
  ]

52:                                               ; preds = %50
  br label %10, !llvm.loop !11

53:                                               ; preds = %10
  store i1 false, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %54

54:                                               ; preds = %53, %50
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %55 = load i1, ptr %3, align 1
  ret i1 %55
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5checkSt6vectorIlSaIlEEl(ptr noundef nonnull %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %4 = icmp ugt i64 %3, 1
  br i1 %4, label %.lr.ph, label %.thread

.lr.ph:                                           ; preds = %2, %15
  %.01430 = phi i64 [ %spec.select24, %15 ], [ 1, %2 ]
  %.01729 = phi i64 [ %spec.select, %15 ], [ 0, %2 ]
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.01430) #1
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = icmp sgt i64 %.01729, 0
  br i1 %7, label %8, label %12

8:                                                ; preds = %.lr.ph
  %9 = add nsw i64 %.01729, -1
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %9) #1
  %11 = load i64, ptr %10, align 8, !tbaa !5
  br label %12

12:                                               ; preds = %.lr.ph, %8
  %13 = phi i64 [ %11, %8 ], [ 0, %.lr.ph ]
  %14 = sub nsw i64 %6, %13
  %.not = icmp eq i64 %14, %1
  br i1 %.not, label %.thread, label %15

15:                                               ; preds = %12
  %16 = icmp sle i64 %14, %1
  %17 = add nsw i64 %.01729, 1
  %18 = icmp sge i64 %17, %.01430
  %or.cond.not = select i1 %16, i1 true, i1 %18
  %spec.select = select i1 %or.cond.not, i64 %.01729, i64 %17
  %19 = zext i1 %or.cond.not to i64
  %spec.select24 = add nuw nsw i64 %.01430, %19
  %20 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %21 = icmp ult i64 %spec.select24, %20
  br i1 %21, label %.lr.ph, label %.thread

.thread:                                          ; preds = %15, %12, %2
  %.lcssa = phi i1 [ false, %2 ], [ %.not, %12 ], [ %.not, %15 ]
  ret i1 %.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass