; LLVM IR from DionysiosB/CodeForces :: 1300-1399 (1388C-UncleBogdanAndCountryHappiness)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS1_S6_RS_IbSaIbEERb(i64 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(40) %4, ptr noundef nonnull align 1 dereferenceable(1) %5) #0 {
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca %"struct.std::_Bit_reference", align 8
  %14 = alloca %"struct.std::_Bit_reference", align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i32, align 4
  %18 = alloca i64, align 8
  %19 = alloca %"struct.std::_Bit_reference", align 8
  store i64 %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !9
  store ptr %5, ptr %12, align 8, !tbaa !9
  %20 = load ptr, ptr %12, align 8, !tbaa !9
  %21 = load i8, ptr %20, align 1, !tbaa !11, !range !13, !noundef !14
  %22 = trunc i8 %21 to i1
  br i1 %22, label %24, label %23

23:                                               ; preds = %6
  br label %151

24:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #3
  %25 = load ptr, ptr %11, align 8, !tbaa !9
  %26 = load i64, ptr %7, align 8, !tbaa !5
  %27 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %25, i64 noundef %26)
  %28 = getelementptr inbounds { ptr, i64 }, ptr %13, i32 0, i32 0
  %29 = extractvalue { ptr, i64 } %27, 0
  store ptr %29, ptr %28, align 8
  %30 = getelementptr inbounds { ptr, i64 }, ptr %13, i32 0, i32 1
  %31 = extractvalue { ptr, i64 } %27, 1
  store i64 %31, ptr %30, align 8
  %32 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %13) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #3
  br i1 %32, label %33, label %34

33:                                               ; preds = %24
  br label %151

34:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #3
  %35 = load ptr, ptr %11, align 8, !tbaa !9
  %36 = load i64, ptr %7, align 8, !tbaa !5
  %37 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %35, i64 noundef %36)
  %38 = getelementptr inbounds { ptr, i64 }, ptr %14, i32 0, i32 0
  %39 = extractvalue { ptr, i64 } %37, 0
  store ptr %39, ptr %38, align 8
  %40 = getelementptr inbounds { ptr, i64 }, ptr %14, i32 0, i32 1
  %41 = extractvalue { ptr, i64 } %37, 1
  store i64 %41, ptr %40, align 8
  %42 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %14, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  store i64 0, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  store i64 0, ptr %16, align 8, !tbaa !5
  br label %43

43:                                               ; preds = %92, %34
  %44 = load i64, ptr %16, align 8, !tbaa !5
  %45 = load ptr, ptr %8, align 8, !tbaa !9
  %46 = load i64, ptr %7, align 8, !tbaa !5
  %47 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %46) #3
  %48 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %47) #3
  %49 = icmp ult i64 %44, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %43
  store i32 2, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  br label %95

51:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  %52 = load ptr, ptr %8, align 8, !tbaa !9
  %53 = load i64, ptr %7, align 8, !tbaa !5
  %54 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %53) #3
  %55 = load i64, ptr %16, align 8, !tbaa !5
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %55) #3
  %57 = load i64, ptr %56, align 8, !tbaa !5
  store i64 %57, ptr %18, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %19) #3
  %58 = load ptr, ptr %11, align 8, !tbaa !9
  %59 = load i64, ptr %18, align 8, !tbaa !5
  %60 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %58, i64 noundef %59)
  %61 = getelementptr inbounds { ptr, i64 }, ptr %19, i32 0, i32 0
  %62 = extractvalue { ptr, i64 } %60, 0
  store ptr %62, ptr %61, align 8
  %63 = getelementptr inbounds { ptr, i64 }, ptr %19, i32 0, i32 1
  %64 = extractvalue { ptr, i64 } %60, 1
  store i64 %64, ptr %63, align 8
  %65 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %19) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %19) #3
  br i1 %65, label %66, label %67

66:                                               ; preds = %51
  store i32 4, ptr %17, align 4
  br label %89

67:                                               ; preds = %51
  %68 = load i64, ptr %18, align 8, !tbaa !5
  %69 = load ptr, ptr %8, align 8, !tbaa !9
  %70 = load ptr, ptr %9, align 8, !tbaa !9
  %71 = load ptr, ptr %10, align 8, !tbaa !9
  %72 = load ptr, ptr %11, align 8, !tbaa !9
  %73 = load ptr, ptr %12, align 8, !tbaa !9
  call void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS1_S6_RS_IbSaIbEERb(i64 noundef %68, ptr noundef nonnull align 8 dereferenceable(24) %69, ptr noundef nonnull align 8 dereferenceable(24) %70, ptr noundef nonnull align 8 dereferenceable(24) %71, ptr noundef nonnull align 8 dereferenceable(40) %72, ptr noundef nonnull align 1 dereferenceable(1) %73)
  %74 = load ptr, ptr %9, align 8, !tbaa !9
  %75 = load i64, ptr %18, align 8, !tbaa !5
  %76 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %75) #3
  %77 = load i64, ptr %76, align 8, !tbaa !5
  %78 = load ptr, ptr %9, align 8, !tbaa !9
  %79 = load i64, ptr %7, align 8, !tbaa !5
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %79) #3
  %81 = load i64, ptr %80, align 8, !tbaa !5
  %82 = add nsw i64 %81, %77
  store i64 %82, ptr %80, align 8, !tbaa !5
  %83 = load ptr, ptr %10, align 8, !tbaa !9
  %84 = load i64, ptr %18, align 8, !tbaa !5
  %85 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %84) #3
  %86 = load i64, ptr %85, align 8, !tbaa !5
  %87 = load i64, ptr %15, align 8, !tbaa !5
  %88 = add nsw i64 %87, %86
  store i64 %88, ptr %15, align 8, !tbaa !5
  store i32 0, ptr %17, align 4
  br label %89

89:                                               ; preds = %67, %66
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  %90 = load i32, ptr %17, align 4
  switch i32 %90, label %152 [
    i32 0, label %91
    i32 4, label %92
  ]

91:                                               ; preds = %89
  br label %92

92:                                               ; preds = %91, %89
  %93 = load i64, ptr %16, align 8, !tbaa !5
  %94 = add nsw i64 %93, 1
  store i64 %94, ptr %16, align 8, !tbaa !5
  br label %43, !llvm.loop !15

95:                                               ; preds = %50
  %96 = load ptr, ptr %10, align 8, !tbaa !9
  %97 = load i64, ptr %7, align 8, !tbaa !5
  %98 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %97) #3
  %99 = load i64, ptr %98, align 8, !tbaa !5
  %100 = load ptr, ptr %9, align 8, !tbaa !9
  %101 = load i64, ptr %7, align 8, !tbaa !5
  %102 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %101) #3
  %103 = load i64, ptr %102, align 8, !tbaa !5
  %104 = add nsw i64 %99, %103
  %105 = srem i64 %104, 2
  %106 = icmp ne i64 %105, 0
  br i1 %106, label %107, label %109

107:                                              ; preds = %95
  %108 = load ptr, ptr %12, align 8, !tbaa !9
  store i8 0, ptr %108, align 1, !tbaa !11
  store i32 1, ptr %17, align 4
  br label %150

109:                                              ; preds = %95
  %110 = load ptr, ptr %10, align 8, !tbaa !9
  %111 = load i64, ptr %7, align 8, !tbaa !5
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %111) #3
  %113 = load i64, ptr %112, align 8, !tbaa !5
  %114 = load ptr, ptr %9, align 8, !tbaa !9
  %115 = load i64, ptr %7, align 8, !tbaa !5
  %116 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %114, i64 noundef %115) #3
  %117 = load i64, ptr %116, align 8, !tbaa !5
  %118 = add nsw i64 %113, %117
  %119 = sdiv i64 %118, 2
  %120 = load ptr, ptr %10, align 8, !tbaa !9
  %121 = load i64, ptr %7, align 8, !tbaa !5
  %122 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %120, i64 noundef %121) #3
  store i64 %119, ptr %122, align 8, !tbaa !5
  %123 = load ptr, ptr %10, align 8, !tbaa !9
  %124 = load i64, ptr %7, align 8, !tbaa !5
  %125 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %123, i64 noundef %124) #3
  %126 = load i64, ptr %125, align 8, !tbaa !5
  %127 = icmp slt i64 %126, 0
  br i1 %127, label %138, label %128

128:                                              ; preds = %109
  %129 = load ptr, ptr %10, align 8, !tbaa !9
  %130 = load i64, ptr %7, align 8, !tbaa !5
  %131 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %129, i64 noundef %130) #3
  %132 = load i64, ptr %131, align 8, !tbaa !5
  %133 = load ptr, ptr %9, align 8, !tbaa !9
  %134 = load i64, ptr %7, align 8, !tbaa !5
  %135 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %133, i64 noundef %134) #3
  %136 = load i64, ptr %135, align 8, !tbaa !5
  %137 = icmp sgt i64 %132, %136
  br i1 %137, label %138, label %140

138:                                              ; preds = %128, %109
  %139 = load ptr, ptr %12, align 8, !tbaa !9
  store i8 0, ptr %139, align 1, !tbaa !11
  store i32 1, ptr %17, align 4
  br label %150

140:                                              ; preds = %128
  %141 = load ptr, ptr %10, align 8, !tbaa !9
  %142 = load i64, ptr %7, align 8, !tbaa !5
  %143 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %141, i64 noundef %142) #3
  %144 = load i64, ptr %143, align 8, !tbaa !5
  %145 = load i64, ptr %15, align 8, !tbaa !5
  %146 = icmp slt i64 %144, %145
  br i1 %146, label %147, label %149

147:                                              ; preds = %140
  %148 = load ptr, ptr %12, align 8, !tbaa !9
  store i8 0, ptr %148, align 1, !tbaa !11
  store i32 1, ptr %17, align 4
  br label %150

149:                                              ; preds = %140
  store i32 1, ptr %17, align 4
  br label %150

150:                                              ; preds = %149, %147, %138, %107
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  br label %151

151:                                              ; preds = %150, %33, %23
  ret void

152:                                              ; preds = %89
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS1_S6_RS_IbSaIbEERb(i64 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(40) %4, ptr nocapture noundef nonnull align 1 dereferenceable(1) %5) local_unnamed_addr #0 {
  %7 = alloca %"struct.std::_Bit_reference", align 8
  %8 = alloca %"struct.std::_Bit_reference", align 8
  %9 = alloca %"struct.std::_Bit_reference", align 8
  %10 = load i8, ptr %5, align 1, !tbaa !5, !range !9, !noundef !10
  %11 = trunc nuw i8 %10 to i1
  br i1 %11, label %12, label %76

12:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %13 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %4, i64 noundef %0)
  %14 = extractvalue { ptr, i64 } %13, 0
  store ptr %14, ptr %7, align 8
  %15 = getelementptr inbounds i8, ptr %7, i64 8
  %16 = extractvalue { ptr, i64 } %13, 1
  store i64 %16, ptr %15, align 8
  %17 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br i1 %17, label %76, label %18

18:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %8) #3
  %19 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %4, i64 noundef %0)
  %20 = extractvalue { ptr, i64 } %19, 0
  store ptr %20, ptr %8, align 8
  %21 = getelementptr inbounds i8, ptr %8, i64 8
  %22 = extractvalue { ptr, i64 } %19, 1
  store i64 %22, ptr %21, align 8
  %23 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %8, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %8) #3
  %24 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %0) #3
  %25 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %24) #3
  %.not51 = icmp eq i64 %25, 0
  br i1 %.not51, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %18
  %26 = getelementptr inbounds i8, ptr %9, i64 8
  br label %33

._crit_edge:                                      ; preds = %50, %18
  %.0.lcssa = phi i64 [ 0, %18 ], [ %.1, %50 ]
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %28 = load i64, ptr %27, align 8, !tbaa !11
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %0) #3
  %30 = load i64, ptr %29, align 8, !tbaa !11
  %31 = add nsw i64 %30, %28
  %32 = and i64 %31, 1
  %.not = icmp eq i64 %32, 0
  br i1 %.not, label %55, label %.sink.split

33:                                               ; preds = %.lr.ph, %50
  %.050 = phi i64 [ 0, %.lr.ph ], [ %.1, %50 ]
  %.04849 = phi i64 [ 0, %.lr.ph ], [ %51, %50 ]
  %34 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %0) #3
  %35 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %.04849) #3
  %36 = load i64, ptr %35, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %9) #3
  %37 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %4, i64 noundef %36)
  %38 = extractvalue { ptr, i64 } %37, 0
  store ptr %38, ptr %9, align 8
  %39 = extractvalue { ptr, i64 } %37, 1
  store i64 %39, ptr %26, align 8
  %40 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %9) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %9) #3
  br i1 %40, label %50, label %41

41:                                               ; preds = %33
  call void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS1_S6_RS_IbSaIbEERb(i64 noundef %36, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(40) %4, ptr noundef nonnull align 1 dereferenceable(1) %5)
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %36) #3
  %43 = load i64, ptr %42, align 8, !tbaa !11
  %44 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %0) #3
  %45 = load i64, ptr %44, align 8, !tbaa !11
  %46 = add nsw i64 %45, %43
  store i64 %46, ptr %44, align 8, !tbaa !11
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %36) #3
  %48 = load i64, ptr %47, align 8, !tbaa !11
  %49 = add nsw i64 %48, %.050
  br label %50

50:                                               ; preds = %33, %41
  %.1 = phi i64 [ %49, %41 ], [ %.050, %33 ]
  %51 = add nuw nsw i64 %.04849, 1
  %52 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %0) #3
  %53 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %52) #3
  %54 = icmp ult i64 %51, %53
  br i1 %54, label %33, label %._crit_edge, !llvm.loop !13

55:                                               ; preds = %._crit_edge
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %57 = load i64, ptr %56, align 8, !tbaa !11
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %0) #3
  %59 = load i64, ptr %58, align 8, !tbaa !11
  %60 = add nsw i64 %59, %57
  %61 = sdiv i64 %60, 2
  %62 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  store i64 %61, ptr %62, align 8, !tbaa !11
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %64 = load i64, ptr %63, align 8, !tbaa !11
  %65 = icmp slt i64 %64, 0
  br i1 %65, label %.sink.split, label %66

66:                                               ; preds = %55
  %67 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %68 = load i64, ptr %67, align 8, !tbaa !11
  %69 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %0) #3
  %70 = load i64, ptr %69, align 8, !tbaa !11
  %71 = icmp sgt i64 %68, %70
  br i1 %71, label %.sink.split, label %72

72:                                               ; preds = %66
  %73 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %74 = load i64, ptr %73, align 8, !tbaa !11
  %75 = icmp slt i64 %74, %.0.lcssa
  br i1 %75, label %.sink.split, label %76

.sink.split:                                      ; preds = %72, %55, %66, %._crit_edge
  store i8 0, ptr %5, align 1, !tbaa !5
  br label %76

76:                                               ; preds = %.sink.split, %72, %12, %6
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"bool", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i8 0, i8 2}
!10 = !{}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass