; LLVM IR from taichi-dev/taichi :: taichi/runtime/llvm/runtime_module (runtime)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local i64 @atomic_add_partial_bits_b64(ptr noundef %0, i32 noundef %1, i32 noundef %2, i64 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i64 %3, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %13 = load i32, ptr %7, align 4, !tbaa !9
  %14 = sub i32 64, %13
  %15 = zext i32 %14 to i64
  %16 = shl i64 -1, %15
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = sub i32 64, %17
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = sub i32 %18, %19
  %21 = zext i32 %20 to i64
  %22 = lshr i64 %16, %21
  store i64 %22, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  store i64 0, ptr %10, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = load i64, ptr %23, align 8, !tbaa !11
  store i64 %24, ptr %11, align 8, !tbaa !11
  br label %25

25:                                               ; preds = %50, %4
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = load i64, ptr %26, align 8, !tbaa !11
  store i64 %27, ptr %11, align 8, !tbaa !11
  %28 = load i64, ptr %11, align 8, !tbaa !11
  %29 = load i64, ptr %8, align 8, !tbaa !11
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = zext i32 %30 to i64
  %32 = shl i64 %29, %31
  %33 = add i64 %28, %32
  store i64 %33, ptr %10, align 8, !tbaa !11
  %34 = load i64, ptr %11, align 8, !tbaa !11
  %35 = load i64, ptr %9, align 8, !tbaa !11
  %36 = xor i64 %35, -1
  %37 = and i64 %34, %36
  %38 = load i64, ptr %10, align 8, !tbaa !11
  %39 = load i64, ptr %9, align 8, !tbaa !11
  %40 = and i64 %38, %39
  %41 = or i64 %37, %40
  store i64 %41, ptr %10, align 8, !tbaa !11
  br label %42

42:                                               ; preds = %25
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = load i64, ptr %11, align 8
  %45 = load i64, ptr %10, align 8
  %46 = cmpxchg weak ptr %43, i64 %44, i64 %45 seq_cst seq_cst, align 8
  %47 = extractvalue { i64, i1 } %46, 0
  %48 = extractvalue { i64, i1 } %46, 1
  br i1 %48, label %50, label %49

49:                                               ; preds = %42
  store i64 %47, ptr %11, align 8
  br label %50

50:                                               ; preds = %49, %42
  %51 = zext i1 %48 to i8
  store i8 %51, ptr %12, align 1, !tbaa !13
  %52 = load i8, ptr %12, align 1, !tbaa !13, !range !15, !noundef !16
  %53 = trunc i8 %52 to i1
  %54 = xor i1 %53, true
  br i1 %54, label %25, label %55, !llvm.loop !17

55:                                               ; preds = %50
  %56 = load i64, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  ret i64 %56
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nounwind memory(argmem: readwrite) uwtable
define dso_local i64 @atomic_add_partial_bits_b64(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
  %5 = sub i32 64, %2
  %6 = zext nneg i32 %5 to i64
  %7 = shl nsw i64 -1, %6
  %8 = add i32 %1, %2
  %9 = sub i32 64, %8
  %10 = zext nneg i32 %9 to i64
  %11 = lshr i64 %7, %10
  %12 = zext nneg i32 %1 to i64
  %13 = shl i64 %3, %12
  %14 = xor i64 %11, -1
  br label %15

15:                                               ; preds = %15, %4
  %16 = load i64, ptr %0, align 8, !tbaa !5
  %17 = add i64 %16, %13
  %18 = and i64 %16, %14
  %19 = and i64 %17, %11
  %20 = or disjoint i64 %19, %18
  %21 = cmpxchg weak ptr %0, i64 %16, i64 %20 seq_cst seq_cst, align 8
  %22 = extractvalue { i64, i1 } %21, 1
  br i1 %22, label %23, label %15, !llvm.loop !9

23:                                               ; preds = %15
  ret i64 %16
}

attributes #0 = { mustprogress nofree norecurse nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass