; LLVM IR from whoiswelliton/Computer_Engineering_UTFPR-PB :: Embedded_Systems/TIVA Connected TM4C1294XL Projects/01 - lwIP_HTTPServer_on_TIVA (bind)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ip4_addr = type { i32 }
%struct.udp_pcb = type { %struct.ip4_addr, %struct.ip4_addr, i8, i8, i8, i8, ptr, i8, i16, i16, ptr, ptr }

@.str = external hidden unnamed_addr constant [40 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [178 x i8], align 1
@udp_pcbs = external dso_local global ptr, align 8
@ip_addr_any = external constant %struct.ip4_addr, align 4
@.str.20 = external hidden unnamed_addr constant [22 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @printf(ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i8 @udp_bind(ptr noundef %0, ptr noundef %1, i16 noundef zeroext %2) #2 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i16 %2, ptr %7, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  %11 = load ptr, ptr %6, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  store ptr @ip_addr_any, ptr %6, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %13, %3
  br label %15

15:                                               ; preds = %14
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = icmp ne ptr %16, null
  br i1 %17, label %23, label %18

18:                                               ; preds = %15
  br label %19

19:                                               ; preds = %18
  %20 = call i32 (ptr, ...) @printf(ptr noundef @.str, ptr noundef @.str.20, i32 noundef 951, ptr noundef @.str.2)
  br label %21

21:                                               ; preds = %19
  br label %22

22:                                               ; preds = %21
  store i8 -16, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %143

23:                                               ; preds = %15
  br label %24

24:                                               ; preds = %23
  br label %25

25:                                               ; preds = %24
  store i8 0, ptr %9, align 1, !tbaa !11
  %26 = load ptr, ptr @udp_pcbs, align 8, !tbaa !5
  store ptr %26, ptr %8, align 8, !tbaa !5
  br label %27

27:                                               ; preds = %36, %25
  %28 = load ptr, ptr %8, align 8, !tbaa !5
  %29 = icmp ne ptr %28, null
  br i1 %29, label %30, label %40

30:                                               ; preds = %27
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = icmp eq ptr %31, %32
  br i1 %33, label %34, label %35

34:                                               ; preds = %30
  store i8 1, ptr %9, align 1, !tbaa !11
  br label %40

35:                                               ; preds = %30
  br label %36

36:                                               ; preds = %35
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.udp_pcb, ptr %37, i32 0, i32 6
  %39 = load ptr, ptr %38, align 8, !tbaa !12
  store ptr %39, ptr %8, align 8, !tbaa !5
  br label %27, !llvm.loop !16

40:                                               ; preds = %34, %27
  %41 = load i16, ptr %7, align 2, !tbaa !9
  %42 = zext i16 %41 to i32
  %43 = icmp eq i32 %42, 0
  br i1 %43, label %44, label %51

44:                                               ; preds = %40
  %45 = call zeroext i16 @udp_new_port()
  store i16 %45, ptr %7, align 2, !tbaa !9
  %46 = load i16, ptr %7, align 2, !tbaa !9
  %47 = zext i16 %46 to i32
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %50

49:                                               ; preds = %44
  store i8 -8, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %143

50:                                               ; preds = %44
  br label %118

51:                                               ; preds = %40
  %52 = load ptr, ptr @udp_pcbs, align 8, !tbaa !5
  store ptr %52, ptr %8, align 8, !tbaa !5
  br label %53

53:                                               ; preds = %113, %51
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = icmp ne ptr %54, null
  br i1 %55, label %56, label %117

56:                                               ; preds = %53
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = load ptr, ptr %8, align 8, !tbaa !5
  %59 = icmp ne ptr %57, %58
  br i1 %59, label %60, label %112

60:                                               ; preds = %56
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.udp_pcb, ptr %61, i32 0, i32 3
  %63 = load i8, ptr %62, align 1, !tbaa !18
  %64 = zext i8 %63 to i32
  %65 = and i32 %64, 4
  %66 = icmp ne i32 %65, 0
  br i1 %66, label %67, label %74

67:                                               ; preds = %60
  %68 = load ptr, ptr %8, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.udp_pcb, ptr %68, i32 0, i32 3
  %70 = load i8, ptr %69, align 1, !tbaa !18
  %71 = zext i8 %70 to i32
  %72 = and i32 %71, 4
  %73 = icmp ne i32 %72, 0
  br i1 %73, label %111, label %74

74:                                               ; preds = %67, %60
  %75 = load ptr, ptr %8, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.udp_pcb, ptr %75, i32 0, i32 8
  %77 = load i16, ptr %76, align 2, !tbaa !19
  %78 = zext i16 %77 to i32
  %79 = load i16, ptr %7, align 2, !tbaa !9
  %80 = zext i16 %79 to i32
  %81 = icmp eq i32 %78, %80
  br i1 %81, label %82, label %110

82:                                               ; preds = %74
  %83 = load ptr, ptr %8, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.udp_pcb, ptr %83, i32 0, i32 0
  %85 = getelementptr inbounds %struct.ip4_addr, ptr %84, i32 0, i32 0
  %86 = load i32, ptr %85, align 8, !tbaa !20
  %87 = load ptr, ptr %6, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.ip4_addr, ptr %87, i32 0, i32 0
  %89 = load i32, ptr %88, align 4, !tbaa !21
  %90 = icmp eq i32 %86, %89
  br i1 %90, label %109, label %91

91:                                               ; preds = %82
  %92 = load ptr, ptr %6, align 8, !tbaa !5
  %93 = icmp eq ptr %92, null
  br i1 %93, label %109, label %94

94:                                               ; preds = %91
  %95 = load ptr, ptr %6, align 8, !tbaa !5
  %96 = getelementptr inbounds %struct.ip4_addr, ptr %95, i32 0, i32 0
  %97 = load i32, ptr %96, align 4, !tbaa !21
  %98 = icmp eq i32 %97, 0
  br i1 %98, label %109, label %99

99:                                               ; preds = %94
  %100 = load ptr, ptr %8, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.udp_pcb, ptr %100, i32 0, i32 0
  %102 = icmp eq ptr %101, null
  br i1 %102, label %109, label %103

103:                                              ; preds = %99
  %104 = load ptr, ptr %8, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.udp_pcb, ptr %104, i32 0, i32 0
  %106 = getelementptr inbounds %struct.ip4_addr, ptr %105, i32 0, i32 0
  %107 = load i32, ptr %106, align 8, !tbaa !20
  %108 = icmp eq i32 %107, 0
  br i1 %108, label %109, label %110

109:                                              ; preds = %103, %99, %94, %91, %82
  store i8 -8, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %143

110:                                              ; preds = %103, %74
  br label %111

111:                                              ; preds = %110, %67
  br label %112

112:                                              ; preds = %111, %56
  br label %113

113:                                              ; preds = %112
  %114 = load ptr, ptr %8, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.udp_pcb, ptr %114, i32 0, i32 6
  %116 = load ptr, ptr %115, align 8, !tbaa !12
  store ptr %116, ptr %8, align 8, !tbaa !5
  br label %53, !llvm.loop !22

117:                                              ; preds = %53
  br label %118

118:                                              ; preds = %117, %50
  %119 = load ptr, ptr %6, align 8, !tbaa !5
  %120 = icmp eq ptr %119, null
  br i1 %120, label %121, label %122

121:                                              ; preds = %118
  br label %126

122:                                              ; preds = %118
  %123 = load ptr, ptr %6, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.ip4_addr, ptr %123, i32 0, i32 0
  %125 = load i32, ptr %124, align 4, !tbaa !21
  br label %126

126:                                              ; preds = %122, %121
  %127 = phi i32 [ 0, %121 ], [ %125, %122 ]
  %128 = load ptr, ptr %5, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.udp_pcb, ptr %128, i32 0, i32 0
  %130 = getelementptr inbounds %struct.ip4_addr, ptr %129, i32 0, i32 0
  store i32 %127, ptr %130, align 8, !tbaa !20
  %131 = load i16, ptr %7, align 2, !tbaa !9
  %132 = load ptr, ptr %5, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.udp_pcb, ptr %132, i32 0, i32 8
  store i16 %131, ptr %133, align 2, !tbaa !19
  %134 = load i8, ptr %9, align 1, !tbaa !11
  %135 = zext i8 %134 to i32
  %136 = icmp eq i32 %135, 0
  br i1 %136, label %137, label %142

137:                                              ; preds = %126
  %138 = load ptr, ptr @udp_pcbs, align 8, !tbaa !5
  %139 = load ptr, ptr %5, align 8, !tbaa !5
  %140 = getelementptr inbounds %struct.udp_pcb, ptr %139, i32 0, i32 6
  store ptr %138, ptr %140, align 8, !tbaa !12
  %141 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %141, ptr @udp_pcbs, align 8, !tbaa !5
  br label %142

142:                                              ; preds = %137, %126
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %143

143:                                              ; preds = %142, %109, %49, %22
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  %144 = load i8, ptr %4, align 1
  ret i8 %144
}

; Function Attrs: nounwind uwtable
declare hidden zeroext i16 @udp_new_port() #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !6, i64 16}
!13 = !{!"udp_pcb", !14, i64 0, !14, i64 4, !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !6, i64 16, !7, i64 24, !10, i64 26, !10, i64 28, !6, i64 32, !6, i64 40}
!14 = !{!"ip4_addr", !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!13, !7, i64 9}
!19 = !{!13, !10, i64 26}
!20 = !{!13, !15, i64 0}
!21 = !{!14, !15, i64 0}
!22 = distinct !{!22, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ip4_addr = type { i32 }

@.str = external hidden unnamed_addr constant [40 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [178 x i8], align 1
@udp_pcbs = external dso_local local_unnamed_addr global ptr, align 8
@ip_addr_any = external local_unnamed_addr constant %struct.ip4_addr, align 4
@.str.20 = external hidden unnamed_addr constant [22 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local signext range(i8 -16, 1) i8 @udp_bind(ptr noundef %0, ptr noundef readonly %1, i16 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = icmp eq ptr %1, null
  %spec.store.select = select i1 %4, ptr @ip_addr_any, ptr %1
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %5, label %.preheader49

5:                                                ; preds = %3
  %6 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, ptr noundef nonnull @.str.20, i32 noundef 951, ptr noundef nonnull @.str.2)
  br label %.loopexit48

.preheader49:                                     ; preds = %3, %.preheader49
  %.034.in = phi ptr [ %8, %.preheader49 ], [ @udp_pcbs, %3 ]
  %.034 = load ptr, ptr %.034.in, align 8, !tbaa !5
  %.not41 = icmp eq ptr %.034, null
  %7 = icmp eq ptr %.034, %0
  %or.cond47 = or i1 %.not41, %7
  %8 = getelementptr inbounds i8, ptr %.034, i64 16
  br i1 %or.cond47, label %9, label %.preheader49, !llvm.loop !9

9:                                                ; preds = %.preheader49
  %10 = icmp eq i16 %2, 0
  br i1 %10, label %12, label %.preheader

.preheader:                                       ; preds = %9
  %.150 = load ptr, ptr @udp_pcbs, align 8, !tbaa !5
  %.not4251 = icmp eq ptr %.150, null
  br i1 %.not4251, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader
  %11 = getelementptr inbounds i8, ptr %0, i64 9
  br label %15

12:                                               ; preds = %9
  %13 = tail call zeroext i16 @udp_new_port()
  %14 = icmp eq i16 %13, 0
  br i1 %14, label %.loopexit48, label %.loopexit

15:                                               ; preds = %.lr.ph, %33
  %.152 = phi ptr [ %.150, %.lr.ph ], [ %.1, %33 ]
  %.not43 = icmp eq ptr %.152, %0
  br i1 %.not43, label %33, label %16

16:                                               ; preds = %15
  %17 = load i8, ptr %11, align 1, !tbaa !11
  %18 = and i8 %17, 4
  %.not44 = icmp eq i8 %18, 0
  br i1 %.not44, label %23, label %19

19:                                               ; preds = %16
  %20 = getelementptr inbounds i8, ptr %.152, i64 9
  %21 = load i8, ptr %20, align 1, !tbaa !11
  %22 = and i8 %21, 4
  %.not45 = icmp eq i8 %22, 0
  br i1 %.not45, label %23, label %33

23:                                               ; preds = %19, %16
  %24 = getelementptr inbounds i8, ptr %.152, i64 26
  %25 = load i16, ptr %24, align 2, !tbaa !16
  %26 = icmp eq i16 %25, %2
  br i1 %26, label %27, label %33

27:                                               ; preds = %23
  %28 = load i32, ptr %.152, align 8, !tbaa !17
  %29 = load i32, ptr %spec.store.select, align 4, !tbaa !18
  %30 = icmp eq i32 %28, %29
  %31 = icmp eq i32 %29, 0
  %or.cond = or i1 %30, %31
  %32 = icmp eq i32 %28, 0
  %or.cond46 = or i1 %32, %or.cond
  br i1 %or.cond46, label %.loopexit48, label %33

33:                                               ; preds = %27, %15, %23, %19
  %34 = getelementptr inbounds i8, ptr %.152, i64 16
  %.1 = load ptr, ptr %34, align 8, !tbaa !5
  %.not42 = icmp eq ptr %.1, null
  br i1 %.not42, label %.loopexit, label %15, !llvm.loop !19

.loopexit:                                        ; preds = %33, %.preheader, %12
  %.035 = phi i16 [ %13, %12 ], [ %2, %.preheader ], [ %2, %33 ]
  %35 = load i32, ptr %spec.store.select, align 4, !tbaa !18
  store i32 %35, ptr %0, align 8, !tbaa !17
  %36 = getelementptr inbounds i8, ptr %0, i64 26
  store i16 %.035, ptr %36, align 2, !tbaa !16
  br i1 %.not41, label %37, label %.loopexit48

37:                                               ; preds = %.loopexit
  %38 = load ptr, ptr @udp_pcbs, align 8, !tbaa !5
  %39 = getelementptr inbounds i8, ptr %0, i64 16
  store ptr %38, ptr %39, align 8, !tbaa !20
  store ptr %0, ptr @udp_pcbs, align 8, !tbaa !5
  br label %.loopexit48

.loopexit48:                                      ; preds = %27, %.loopexit, %37, %12, %5
  %.036 = phi i8 [ -16, %5 ], [ -8, %12 ], [ 0, %37 ], [ 0, %.loopexit ], [ -8, %27 ]
  ret i8 %.036
}

; Function Attrs: nounwind uwtable
declare hidden zeroext i16 @udp_new_port() local_unnamed_addr #1

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !7, i64 9}
!12 = !{!"udp_pcb", !13, i64 0, !13, i64 4, !7, i64 8, !7, i64 9, !7, i64 10, !7, i64 11, !6, i64 16, !7, i64 24, !15, i64 26, !15, i64 28, !6, i64 32, !6, i64 40}
!13 = !{!"ip4_addr", !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"short", !7, i64 0}
!16 = !{!12, !15, i64 26}
!17 = !{!12, !14, i64 0}
!18 = !{!13, !14, i64 0}
!19 = distinct !{!19, !10}
!20 = !{!12, !6, i64 16}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass