; LLVM IR from niessner/Matterport :: code/gaps/pkgs/R3Shapes/R3Mesh.ll (ZNK6R3Mesh11DrawEdgeIDsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.R3Mesh = type { ptr, %class.RNArray, %class.RNArray.0, %class.RNArray.1, ptr, ptr, ptr, [128 x i8], %class.R3Box, ptr }
%class.RNArray = type { %class.RNVArray }
%class.RNVArray = type { ptr, i32, i32 }
%class.RNArray.0 = type { %class.RNVArray }
%class.RNArray.1 = type { %class.RNVArray }
%class.R3Box = type { %class.R3Solid, %class.R3Point, %class.R3Point }
%class.R3Solid = type { %class.R3Shape }
%class.R3Shape = type { ptr }
%class.R3Point = type { [3 x double] }
%class.R3MeshEdge = type { ptr, [2 x ptr], [2 x ptr], double, i32, %class.RNFlags, double, i32, ptr }
%class.RNFlags = type { i64 }

@.str = external hidden unnamed_addr constant [41 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [88 x i8], align 1
@.str.38 = external hidden unnamed_addr constant [18 x i8], align 1

declare void @_Z7RNAbortPKcz(ptr noundef, ...) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8RNVArray8NEntriesEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK7RNArrayIP10R3MeshEdgeEixEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) #3 align 2

declare void @glDisable(i32 noundef) #0

declare void @glColor3ub(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #0

declare void @glEnable(i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK6R3Mesh11DrawEdgeIDsEv(ptr noundef nonnull align 8 dereferenceable(272) %0) unnamed_addr #3 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @glDisable(i32 noundef 2896)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %45, %1
  %9 = load i32, ptr %3, align 4, !tbaa !9
  %10 = getelementptr inbounds %class.R3Mesh, ptr %7, i32 0, i32 2
  %11 = call noundef i32 @_ZNK8RNVArray8NEntriesEv(ptr noundef nonnull align 8 dereferenceable(16) %10)
  %12 = icmp slt i32 %9, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %48

14:                                               ; preds = %8
  %15 = getelementptr inbounds %class.R3Mesh, ptr %7, i32 0, i32 2
  %16 = load i32, ptr %3, align 4, !tbaa !9
  %17 = call noundef ptr @_ZNK7RNArrayIP10R3MeshEdgeEixEi(ptr noundef nonnull align 8 dereferenceable(16) %15, i32 noundef %16)
  %18 = getelementptr inbounds %class.R3MeshEdge, ptr %17, i32 0, i32 4
  %19 = load i32, ptr %18, align 8, !tbaa !11
  %20 = load i32, ptr %3, align 4, !tbaa !9
  %21 = icmp eq i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %14
  call void (ptr, ...) @_Z7RNAbortPKcz(ptr noundef @.str, ptr noundef @.str.38, i32 noundef 2853, ptr noundef @.str.2)
  br label %23

23:                                               ; preds = %22, %14
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #4
  %24 = load i32, ptr %3, align 4, !tbaa !9
  %25 = shl i32 %24, 16
  %26 = and i32 %25, 255
  %27 = trunc i32 %26 to i8
  store i8 %27, ptr %4, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #4
  %28 = load i32, ptr %3, align 4, !tbaa !9
  %29 = shl i32 %28, 8
  %30 = and i32 %29, 255
  %31 = trunc i32 %30 to i8
  store i8 %31, ptr %5, align 1, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  %32 = load i32, ptr %3, align 4, !tbaa !9
  %33 = shl i32 %32, 0
  %34 = and i32 %33, 255
  %35 = trunc i32 %34 to i8
  store i8 %35, ptr %6, align 1, !tbaa !16
  %36 = load i8, ptr %4, align 1, !tbaa !16
  %37 = load i8, ptr %5, align 1, !tbaa !16
  %38 = load i8, ptr %6, align 1, !tbaa !16
  call void @glColor3ub(i8 noundef zeroext %36, i8 noundef zeroext %37, i8 noundef zeroext %38)
  %39 = getelementptr inbounds %class.R3Mesh, ptr %7, i32 0, i32 2
  %40 = load i32, ptr %3, align 4, !tbaa !9
  %41 = call noundef ptr @_ZNK7RNArrayIP10R3MeshEdgeEixEi(ptr noundef nonnull align 8 dereferenceable(16) %39, i32 noundef %40)
  %42 = load ptr, ptr %7, align 8, !tbaa !17
  %43 = getelementptr inbounds ptr, ptr %42, i64 44
  %44 = load ptr, ptr %43, align 8
  call void %44(ptr noundef nonnull align 8 dereferenceable(272) %7, ptr noundef %41)
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  br label %45

45:                                               ; preds = %23
  %46 = load i32, ptr %3, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %3, align 4, !tbaa !9
  br label %8, !llvm.loop !19

48:                                               ; preds = %13
  call void @glEnable(i32 noundef 2896)
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 48}
!12 = !{!"_ZTS10R3MeshEdge", !7, i64 8, !7, i64 24, !13, i64 40, !10, i64 48, !14, i64 56, !13, i64 64, !10, i64 72, !6, i64 80}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTS7RNFlags", !15, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"vtable pointer", !8, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [41 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [88 x i8], align 1
@.str.38 = external hidden unnamed_addr constant [18 x i8], align 1

declare void @_Z7RNAbortPKcz(ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8RNVArray8NEntriesEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef ptr @_ZNK7RNArrayIP10R3MeshEdgeEixEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) local_unnamed_addr #2 align 2

declare void @glDisable(i32 noundef) local_unnamed_addr #0

declare void @glColor3ub(i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @glEnable(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZNK6R3Mesh11DrawEdgeIDsEv(ptr noundef nonnull align 8 dereferenceable(272) %0) unnamed_addr #2 align 2 {
  tail call void @glDisable(i32 noundef 2896)
  %2 = getelementptr inbounds i8, ptr %0, i64 24
  %3 = tail call noundef i32 @_ZNK8RNVArray8NEntriesEv(ptr noundef nonnull align 8 dereferenceable(16) %2)
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %10, %1
  tail call void @glEnable(i32 noundef 2896)
  ret void

.lr.ph:                                           ; preds = %1, %10
  %.011 = phi i32 [ %16, %10 ], [ 0, %1 ]
  %5 = tail call noundef ptr @_ZNK7RNArrayIP10R3MeshEdgeEixEi(ptr noundef nonnull align 8 dereferenceable(16) %2, i32 noundef %.011)
  %6 = getelementptr inbounds i8, ptr %5, i64 48
  %7 = load i32, ptr %6, align 8, !tbaa !5
  %8 = icmp eq i32 %7, %.011
  br i1 %8, label %10, label %9

9:                                                ; preds = %.lr.ph
  tail call void (ptr, ...) @_Z7RNAbortPKcz(ptr noundef nonnull @.str, ptr noundef nonnull @.str.38, i32 noundef 2853, ptr noundef nonnull @.str.2)
  br label %10

10:                                               ; preds = %9, %.lr.ph
  %11 = trunc i32 %.011 to i8
  tail call void @glColor3ub(i8 noundef zeroext 0, i8 noundef zeroext 0, i8 noundef zeroext %11)
  %12 = tail call noundef ptr @_ZNK7RNArrayIP10R3MeshEdgeEixEi(ptr noundef nonnull align 8 dereferenceable(16) %2, i32 noundef %.011)
  %13 = load ptr, ptr %0, align 8, !tbaa !14
  %14 = getelementptr inbounds i8, ptr %13, i64 352
  %15 = load ptr, ptr %14, align 8
  tail call void %15(ptr noundef nonnull align 8 dereferenceable(272) %0, ptr noundef %12)
  %16 = add nuw nsw i32 %.011, 1
  %17 = tail call noundef i32 @_ZNK8RNVArray8NEntriesEv(ptr noundef nonnull align 8 dereferenceable(16) %2)
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %.lr.ph, label %._crit_edge, !llvm.loop !16
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 48}
!6 = !{!"_ZTS10R3MeshEdge", !7, i64 8, !7, i64 24, !9, i64 40, !10, i64 48, !11, i64 56, !9, i64 64, !10, i64 72, !13, i64 80}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"double", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!"_ZTS7RNFlags", !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"vtable pointer", !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass