; LLVM IR from mickypaganini/SSI2016-jet-clustering :: spartyjet-4.0.2_mac/External/fastjet-3.0.0/plugins/SISCone/siscone/siscone/ran_845baa9a (getEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.siscone::ranlux_state_t" = type { i32, i32, i32, i32, i32, [24 x i64] }

@_ZN7siscone18local_ranlux_stateE = external dso_local global %"struct.siscone::ranlux_state_t", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_ZN7siscone10ranlux_getEv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  %4 = load i32, ptr getelementptr inbounds (%"struct.siscone::ranlux_state_t", ptr @_ZN7siscone18local_ranlux_stateE, i32 0, i32 3), align 4, !tbaa !5
  store i32 %4, ptr %1, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #3
  %5 = call noundef i64 @_ZN7sisconeL15increment_stateEv()
  store i64 %5, ptr %2, align 8, !tbaa !11
  %6 = load i32, ptr getelementptr inbounds (%"struct.siscone::ranlux_state_t", ptr @_ZN7siscone18local_ranlux_stateE, i32 0, i32 2), align 8, !tbaa !13
  %7 = add i32 %6, 1
  store i32 %7, ptr getelementptr inbounds (%"struct.siscone::ranlux_state_t", ptr @_ZN7siscone18local_ranlux_stateE, i32 0, i32 2), align 8, !tbaa !13
  %8 = load i32, ptr getelementptr inbounds (%"struct.siscone::ranlux_state_t", ptr @_ZN7siscone18local_ranlux_stateE, i32 0, i32 2), align 8, !tbaa !13
  %9 = icmp eq i32 %8, 24
  br i1 %9, label %10, label %21

10:                                               ; preds = %0
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr getelementptr inbounds (%"struct.siscone::ranlux_state_t", ptr @_ZN7siscone18local_ranlux_stateE, i32 0, i32 2), align 8, !tbaa !13
  store i32 0, ptr %3, align 4, !tbaa !10
  br label %11

11:                                               ; preds = %17, %10
  %12 = load i32, ptr %3, align 4, !tbaa !10
  %13 = load i32, ptr %1, align 4, !tbaa !10
  %14 = icmp ult i32 %12, %13
  br i1 %14, label %15, label %20

15:                                               ; preds = %11
  %16 = call noundef i64 @_ZN7sisconeL15increment_stateEv()
  br label %17

17:                                               ; preds = %15
  %18 = load i32, ptr %3, align 4, !tbaa !10
  %19 = add i32 %18, 1
  store i32 %19, ptr %3, align 4, !tbaa !10
  br label %11, !llvm.loop !14

20:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %21

21:                                               ; preds = %20, %0
  %22 = load i64, ptr %2, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret i64 %22
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZN7sisconeL15increment_stateEv() #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 12}
!6 = !{!"_ZTSN7siscone14ranlux_state_tE", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !8, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!6, !7, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.siscone::ranlux_state_t" = type { i32, i32, i32, i32, i32, [24 x i64] }

@_ZN7siscone18local_ranlux_stateE = external dso_local local_unnamed_addr global %"struct.siscone::ranlux_state_t", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZN7siscone10ranlux_getEv() local_unnamed_addr #0 {
  %1 = load i32, ptr getelementptr inbounds (i8, ptr @_ZN7siscone18local_ranlux_stateE, i64 12), align 4, !tbaa !5
  %2 = tail call noundef i64 @_ZN7sisconeL15increment_stateEv()
  %3 = load i32, ptr getelementptr inbounds (i8, ptr @_ZN7siscone18local_ranlux_stateE, i64 8), align 8, !tbaa !10
  %4 = add i32 %3, 1
  store i32 %4, ptr getelementptr inbounds (i8, ptr @_ZN7siscone18local_ranlux_stateE, i64 8), align 8, !tbaa !10
  %5 = icmp eq i32 %4, 24
  br i1 %5, label %6, label %.loopexit

6:                                                ; preds = %0
  store i32 0, ptr getelementptr inbounds (i8, ptr @_ZN7siscone18local_ranlux_stateE, i64 8), align 8, !tbaa !10
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %6, %.lr.ph
  %.04 = phi i32 [ %8, %.lr.ph ], [ 0, %6 ]
  %7 = tail call noundef i64 @_ZN7sisconeL15increment_stateEv()
  %8 = add nuw i32 %.04, 1
  %exitcond.not = icmp eq i32 %8, %1
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !11

.loopexit:                                        ; preds = %.lr.ph, %6, %0
  ret i64 %2
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i64 @_ZN7sisconeL15increment_stateEv() local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 12}
!6 = !{!"_ZTSN7siscone14ranlux_state_tE", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !8, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 8}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass