; LLVM IR from gzc/CLRS :: C07-Quicksort/exercise_code (quickSortWithEqualElements)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZN9QuickSort18fastThreePartitionEiiRSt6vectorIiSaIiEE(ptr noundef nonnull align 1 dereferenceable(1) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3) #3 align 2 {
  %5 = alloca %"struct.std::pair", align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  %19 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %20 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %20, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %23 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %23, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %26 = load ptr, ptr %9, align 8, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #4
  %30 = load i32, ptr %29, align 4, !tbaa !9
  store i32 %30, ptr %14, align 4, !tbaa !9
  br label %31

31:                                               ; preds = %135, %4
  br label %32

32:                                               ; preds = %31
  br label %33

33:                                               ; preds = %47, %32
  %34 = load ptr, ptr %9, align 8, !tbaa !5
  %35 = load i32, ptr %10, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %10, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %37) #4
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = load i32, ptr %14, align 4, !tbaa !9
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %42, label %48

42:                                               ; preds = %33
  %43 = load i32, ptr %10, align 4, !tbaa !9
  %44 = load i32, ptr %8, align 4, !tbaa !9
  %45 = icmp eq i32 %43, %44
  br i1 %45, label %46, label %47

46:                                               ; preds = %42
  br label %48

47:                                               ; preds = %42
  br label %33, !llvm.loop !11

48:                                               ; preds = %46, %33
  br label %49

49:                                               ; preds = %63, %48
  %50 = load ptr, ptr %9, align 8, !tbaa !5
  %51 = load i32, ptr %11, align 4, !tbaa !9
  %52 = add nsw i32 %51, -1
  store i32 %52, ptr %11, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %53) #4
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = load i32, ptr %14, align 4, !tbaa !9
  %57 = icmp sgt i32 %55, %56
  br i1 %57, label %58, label %64

58:                                               ; preds = %49
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = icmp eq i32 %59, %60
  br i1 %61, label %62, label %63

62:                                               ; preds = %58
  br label %64

63:                                               ; preds = %58
  br label %49, !llvm.loop !13

64:                                               ; preds = %62, %49
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = load i32, ptr %11, align 4, !tbaa !9
  %67 = icmp eq i32 %65, %66
  br i1 %67, label %68, label %86

68:                                               ; preds = %64
  %69 = load ptr, ptr %9, align 8, !tbaa !5
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #4
  %73 = load i32, ptr %72, align 4, !tbaa !9
  %74 = load i32, ptr %14, align 4, !tbaa !9
  %75 = icmp eq i32 %73, %74
  br i1 %75, label %76, label %86

76:                                               ; preds = %68
  %77 = load ptr, ptr %9, align 8, !tbaa !5
  %78 = load i32, ptr %12, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %12, align 4, !tbaa !9
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %80) #4
  %82 = load ptr, ptr %9, align 8, !tbaa !5
  %83 = load i32, ptr %10, align 4, !tbaa !9
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %82, i64 noundef %84) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %81, ptr noundef nonnull align 4 dereferenceable(4) %85) #4
  br label %86

86:                                               ; preds = %76, %68, %64
  %87 = load i32, ptr %10, align 4, !tbaa !9
  %88 = load i32, ptr %11, align 4, !tbaa !9
  %89 = icmp sge i32 %87, %88
  br i1 %89, label %90, label %91

90:                                               ; preds = %86
  br label %136

91:                                               ; preds = %86
  %92 = load ptr, ptr %9, align 8, !tbaa !5
  %93 = load i32, ptr %10, align 4, !tbaa !9
  %94 = sext i32 %93 to i64
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %94) #4
  %96 = load ptr, ptr %9, align 8, !tbaa !5
  %97 = load i32, ptr %11, align 4, !tbaa !9
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %98) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %95, ptr noundef nonnull align 4 dereferenceable(4) %99) #4
  %100 = load ptr, ptr %9, align 8, !tbaa !5
  %101 = load i32, ptr %10, align 4, !tbaa !9
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %102) #4
  %104 = load i32, ptr %103, align 4, !tbaa !9
  %105 = load i32, ptr %14, align 4, !tbaa !9
  %106 = icmp eq i32 %104, %105
  br i1 %106, label %107, label %117

107:                                              ; preds = %91
  %108 = load ptr, ptr %9, align 8, !tbaa !5
  %109 = load i32, ptr %12, align 4, !tbaa !9
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %12, align 4, !tbaa !9
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %108, i64 noundef %111) #4
  %113 = load ptr, ptr %9, align 8, !tbaa !5
  %114 = load i32, ptr %10, align 4, !tbaa !9
  %115 = sext i32 %114 to i64
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %115) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %112, ptr noundef nonnull align 4 dereferenceable(4) %116) #4
  br label %117

117:                                              ; preds = %107, %91
  %118 = load ptr, ptr %9, align 8, !tbaa !5
  %119 = load i32, ptr %11, align 4, !tbaa !9
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %118, i64 noundef %120) #4
  %122 = load i32, ptr %121, align 4, !tbaa !9
  %123 = load i32, ptr %14, align 4, !tbaa !9
  %124 = icmp eq i32 %122, %123
  br i1 %124, label %125, label %135

125:                                              ; preds = %117
  %126 = load ptr, ptr %9, align 8, !tbaa !5
  %127 = load i32, ptr %13, align 4, !tbaa !9
  %128 = add nsw i32 %127, -1
  store i32 %128, ptr %13, align 4, !tbaa !9
  %129 = sext i32 %128 to i64
  %130 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %126, i64 noundef %129) #4
  %131 = load ptr, ptr %9, align 8, !tbaa !5
  %132 = load i32, ptr %11, align 4, !tbaa !9
  %133 = sext i32 %132 to i64
  %134 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %131, i64 noundef %133) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %130, ptr noundef nonnull align 4 dereferenceable(4) %134) #4
  br label %135

135:                                              ; preds = %125, %117
  br label %31, !llvm.loop !14

136:                                              ; preds = %90
  %137 = load i32, ptr %11, align 4, !tbaa !9
  %138 = add nsw i32 %137, 1
  store i32 %138, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %139 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %139, ptr %15, align 4, !tbaa !9
  br label %140

140:                                              ; preds = %155, %136
  %141 = load i32, ptr %15, align 4, !tbaa !9
  %142 = load i32, ptr %12, align 4, !tbaa !9
  %143 = icmp sle i32 %141, %142
  br i1 %143, label %145, label %144

144:                                              ; preds = %140
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %158

145:                                              ; preds = %140
  %146 = load ptr, ptr %9, align 8, !tbaa !5
  %147 = load i32, ptr %15, align 4, !tbaa !9
  %148 = sext i32 %147 to i64
  %149 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %146, i64 noundef %148) #4
  %150 = load ptr, ptr %9, align 8, !tbaa !5
  %151 = load i32, ptr %11, align 4, !tbaa !9
  %152 = add nsw i32 %151, -1
  store i32 %152, ptr %11, align 4, !tbaa !9
  %153 = sext i32 %151 to i64
  %154 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %150, i64 noundef %153) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %149, ptr noundef nonnull align 4 dereferenceable(4) %154) #4
  br label %155

155:                                              ; preds = %145
  %156 = load i32, ptr %15, align 4, !tbaa !9
  %157 = add nsw i32 %156, 1
  store i32 %157, ptr %15, align 4, !tbaa !9
  br label %140, !llvm.loop !15

158:                                              ; preds = %144
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %159 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %159, ptr %16, align 4, !tbaa !9
  br label %160

160:                                              ; preds = %175, %158
  %161 = load i32, ptr %16, align 4, !tbaa !9
  %162 = load i32, ptr %13, align 4, !tbaa !9
  %163 = icmp sge i32 %161, %162
  br i1 %163, label %165, label %164

164:                                              ; preds = %160
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  br label %178

165:                                              ; preds = %160
  %166 = load ptr, ptr %9, align 8, !tbaa !5
  %167 = load i32, ptr %16, align 4, !tbaa !9
  %168 = sext i32 %167 to i64
  %169 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %166, i64 noundef %168) #4
  %170 = load ptr, ptr %9, align 8, !tbaa !5
  %171 = load i32, ptr %10, align 4, !tbaa !9
  %172 = add nsw i32 %171, 1
  store i32 %172, ptr %10, align 4, !tbaa !9
  %173 = sext i32 %171 to i64
  %174 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %170, i64 noundef %173) #4
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %169, ptr noundef nonnull align 4 dereferenceable(4) %174) #4
  br label %175

175:                                              ; preds = %165
  %176 = load i32, ptr %16, align 4, !tbaa !9
  %177 = add nsw i32 %176, -1
  store i32 %177, ptr %16, align 4, !tbaa !9
  br label %160, !llvm.loop !16

178:                                              ; preds = %164
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %179 = load i32, ptr %11, align 4, !tbaa !9
  %180 = add nsw i32 %179, 1
  store i32 %180, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %181 = load i32, ptr %10, align 4, !tbaa !9
  %182 = sub nsw i32 %181, 1
  store i32 %182, ptr %18, align 4, !tbaa !9
  %183 = call i64 @_ZSt9make_pairIiiESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS1_INS2_IT0_E4typeEE6__typeEEOS3_OS8_(ptr noundef nonnull align 4 dereferenceable(4) %17, ptr noundef nonnull align 4 dereferenceable(4) %18)
  store i64 %183, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %184 = load i64, ptr %5, align 4
  ret i64 %184
}

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZSt9make_pairIiiESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS1_INS2_IT0_E4typeEE6__typeEEOS3_OS8_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZN9QuickSort18fastThreePartitionEiiRSt6vectorIiSaIiEE(ptr nocapture noundef nonnull readnone align 1 dereferenceable(1) %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3) local_unnamed_addr #3 align 2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = add nsw i32 %2, 1
  %8 = sext i32 %1 to i64
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %8) #4
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %sext = sext i32 %2 to i64
  br label %.outer

.outer:                                           ; preds = %57, %4
  %.071.ph = phi i32 [ %25, %57 ], [ %7, %4 ]
  %.068.ph = phi i32 [ %.270, %57 ], [ %1, %4 ]
  %.066.ph = phi i32 [ %58, %57 ], [ %7, %4 ]
  %.065.ph = phi i32 [ %28, %57 ], [ %1, %4 ]
  br label %11

11:                                               ; preds = %.outer, %53
  %.071 = phi i32 [ %25, %53 ], [ %.071.ph, %.outer ]
  %.068 = phi i32 [ %.270, %53 ], [ %.068.ph, %.outer ]
  %.065 = phi i32 [ %28, %53 ], [ %.065.ph, %.outer ]
  %12 = sext i32 %.065 to i64
  br label %13

13:                                               ; preds = %13, %11
  %indvars.iv = phi i64 [ %indvars.iv.next, %13 ], [ %12, %11 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next) #4
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp sge i32 %15, %10
  %17 = icmp eq i64 %indvars.iv.next, %sext
  %or.cond = or i1 %17, %16
  br i1 %or.cond, label %.preheader83, label %13, !llvm.loop !9

.preheader83:                                     ; preds = %13
  %18 = sext i32 %.071 to i64
  %19 = add i32 %.071, -1
  %20 = sext i32 %19 to i64
  br label %21

21:                                               ; preds = %.preheader83, %21
  %indvars.iv105 = phi i64 [ %20, %.preheader83 ], [ %indvars.iv.next106, %21 ]
  %indvars.iv100 = phi i64 [ %18, %.preheader83 ], [ %indvars.iv.next101, %21 ]
  %indvars.iv.next101 = add nsw i64 %indvars.iv100, -1
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next101) #4
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp sle i32 %23, %10
  %25 = trunc nsw i64 %indvars.iv.next101 to i32
  %26 = icmp eq i32 %25, %1
  %or.cond81 = or i1 %26, %24
  %indvars.iv.next106 = add nsw i64 %indvars.iv105, -1
  br i1 %or.cond81, label %27, label %21, !llvm.loop !11

27:                                               ; preds = %21
  %28 = trunc nsw i64 %indvars.iv.next to i32
  %29 = icmp eq i64 %indvars.iv.next, %indvars.iv.next101
  br i1 %29, label %30, label %39

30:                                               ; preds = %27
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next) #4
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp eq i32 %32, %10
  br i1 %33, label %34, label %39

34:                                               ; preds = %30
  %35 = add nsw i32 %.068, 1
  %36 = sext i32 %35 to i64
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %36) #4
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next) #4
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %37, ptr noundef nonnull align 4 dereferenceable(4) %38) #4
  br label %39

39:                                               ; preds = %34, %30, %27
  %.169 = phi i32 [ %35, %34 ], [ %.068, %30 ], [ %.068, %27 ]
  %.not = icmp slt i64 %indvars.iv.next, %indvars.iv.next101
  br i1 %.not, label %42, label %.preheader82

.preheader82:                                     ; preds = %39
  %40 = trunc nsw i64 %indvars.iv100 to i32
  %.not7987 = icmp slt i32 %.169, %1
  br i1 %.not7987, label %.preheader, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.preheader82
  %41 = add i32 %.169, 1
  br label %.lr.ph

42:                                               ; preds = %39
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next) #4
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next101) #4
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %43, ptr noundef nonnull align 4 dereferenceable(4) %44) #4
  %45 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next) #4
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = icmp eq i32 %46, %10
  br i1 %47, label %48, label %53

48:                                               ; preds = %42
  %49 = add nsw i32 %.169, 1
  %50 = sext i32 %49 to i64
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %50) #4
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next) #4
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %51, ptr noundef nonnull align 4 dereferenceable(4) %52) #4
  br label %53

53:                                               ; preds = %48, %42
  %.270 = phi i32 [ %49, %48 ], [ %.169, %42 ]
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next101) #4
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = icmp eq i32 %55, %10
  br i1 %56, label %57, label %11, !llvm.loop !12

57:                                               ; preds = %53
  %58 = add nsw i32 %.066.ph, -1
  %59 = sext i32 %58 to i64
  %60 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %59) #4
  %61 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv.next101) #4
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %60, ptr noundef nonnull align 4 dereferenceable(4) %61) #4
  br label %.outer, !llvm.loop !12

.preheader.loopexit:                              ; preds = %.lr.ph
  %62 = trunc nsw i64 %indvars.iv107 to i32
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %.preheader82
  %.273.lcssa = phi i32 [ %40, %.preheader82 ], [ %62, %.preheader.loopexit ]
  %.not8090 = icmp sgt i32 %.066.ph, %2
  br i1 %.not8090, label %._crit_edge, label %.lr.ph93.preheader

.lr.ph93.preheader:                               ; preds = %.preheader
  %63 = sext i32 %.066.ph to i64
  br label %.lr.ph93

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv107 = phi i64 [ %indvars.iv105, %.lr.ph.preheader ], [ %indvars.iv.next108, %.lr.ph ]
  %indvars.iv103 = phi i64 [ %8, %.lr.ph.preheader ], [ %indvars.iv.next104, %.lr.ph ]
  %64 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv103) #4
  %indvars.iv.next108 = add nsw i64 %indvars.iv107, -1
  %65 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv107) #4
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %64, ptr noundef nonnull align 4 dereferenceable(4) %65) #4
  %indvars.iv.next104 = add nsw i64 %indvars.iv103, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next104 to i32
  %exitcond.not = icmp eq i32 %41, %lftr.wideiv
  br i1 %exitcond.not, label %.preheader.loopexit, label %.lr.ph, !llvm.loop !13

._crit_edge.loopexit:                             ; preds = %.lr.ph93
  %66 = trunc nsw i64 %indvars.iv.next115 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %.2.lcssa = phi i32 [ %40, %.preheader ], [ %66, %._crit_edge.loopexit ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
  store i32 %.273.lcssa, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
  %67 = add nsw i32 %.2.lcssa, -1
  store i32 %67, ptr %6, align 4, !tbaa !5
  %68 = call i64 @_ZSt9make_pairIiiESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS1_INS2_IT0_E4typeEE6__typeEEOS3_OS8_(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
  ret i64 %68

.lr.ph93:                                         ; preds = %.lr.ph93.preheader, %.lr.ph93
  %indvars.iv114 = phi i64 [ %indvars.iv100, %.lr.ph93.preheader ], [ %indvars.iv.next115, %.lr.ph93 ]
  %indvars.iv112 = phi i64 [ %sext, %.lr.ph93.preheader ], [ %indvars.iv.next113, %.lr.ph93 ]
  %69 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv112) #4
  %indvars.iv.next115 = add nsw i64 %indvars.iv114, 1
  %70 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv114) #4
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %69, ptr noundef nonnull align 4 dereferenceable(4) %70) #4
  %indvars.iv.next113 = add nsw i64 %indvars.iv112, -1
  %.not80.not = icmp sgt i64 %indvars.iv112, %63
  br i1 %.not80.not, label %.lr.ph93, label %._crit_edge.loopexit, !llvm.loop !14
}

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZSt9make_pairIiiESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS1_INS2_IT0_E4typeEE6__typeEEOS3_OS8_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass