; LLVM IR from Tunghohin/Competitive_Coding :: Codeforces/cf1547_D.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@a = external dso_local global [200010 x i32], align 16
@b = external dso_local global [200010 x i32], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  %12 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 1, ptr %2, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %23, %0
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = load i32, ptr %1, align 4, !tbaa !5
  %16 = icmp sle i32 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %26

18:                                               ; preds = %13
  %19 = load i32, ptr %2, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [200010 x i32], ptr @a, i64 0, i64 %20
  %22 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %21)
  br label %23

23:                                               ; preds = %18
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %2, align 4, !tbaa !5
  br label %13, !llvm.loop !9

26:                                               ; preds = %17
  store i32 0, ptr getelementptr inbounds ([200010 x i32], ptr @b, i64 0, i64 1), align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %80, %26
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = load i32, ptr %1, align 4, !tbaa !5
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %27
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %83

32:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [200010 x i32], ptr @a, i64 0, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [200010 x i32], ptr @b, i64 0, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = xor i32 %36, %40
  store i32 %41, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %42 = load i32, ptr %3, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [200010 x i32], ptr @a, i64 0, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !5
  store i32 %46, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 30, ptr %8, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %71, %32
  %48 = load i32, ptr %8, align 4, !tbaa !5
  %49 = icmp sge i32 %48, 0
  br i1 %49, label %51, label %50

50:                                               ; preds = %47
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %74

51:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %52 = load i32, ptr %5, align 4, !tbaa !5
  %53 = load i32, ptr %8, align 4, !tbaa !5
  %54 = ashr i32 %52, %53
  %55 = and i32 %54, 1
  store i32 %55, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %56 = load i32, ptr %6, align 4, !tbaa !5
  %57 = load i32, ptr %8, align 4, !tbaa !5
  %58 = ashr i32 %56, %57
  %59 = and i32 %58, 1
  store i32 %59, ptr %10, align 4, !tbaa !5
  %60 = load i32, ptr %9, align 4, !tbaa !5
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %62, label %70

62:                                               ; preds = %51
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = icmp ne i32 %63, 0
  br i1 %64, label %70, label %65

65:                                               ; preds = %62
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = shl i32 1, %66
  %68 = load i32, ptr %7, align 4, !tbaa !5
  %69 = add nsw i32 %68, %67
  store i32 %69, ptr %7, align 4, !tbaa !5
  br label %70

70:                                               ; preds = %65, %62, %51
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %71

71:                                               ; preds = %70
  %72 = load i32, ptr %8, align 4, !tbaa !5
  %73 = add nsw i32 %72, -1
  store i32 %73, ptr %8, align 4, !tbaa !5
  br label %47, !llvm.loop !11

74:                                               ; preds = %50
  %75 = load i32, ptr %7, align 4, !tbaa !5
  %76 = load i32, ptr %3, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [200010 x i32], ptr @b, i64 0, i64 %78
  store i32 %75, ptr %79, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %80

80:                                               ; preds = %74
  %81 = load i32, ptr %3, align 4, !tbaa !5
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %3, align 4, !tbaa !5
  br label %27, !llvm.loop !12

83:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 1, ptr %11, align 4, !tbaa !5
  br label %84

84:                                               ; preds = %96, %83
  %85 = load i32, ptr %11, align 4, !tbaa !5
  %86 = load i32, ptr %1, align 4, !tbaa !5
  %87 = icmp sle i32 %85, %86
  br i1 %87, label %89, label %88

88:                                               ; preds = %84
  store i32 11, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %99

89:                                               ; preds = %84
  %90 = load i32, ptr %11, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds [200010 x i32], ptr @b, i64 0, i64 %91
  %93 = load i32, ptr %92, align 4, !tbaa !5
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %93)
  %95 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8) %94, i8 noundef signext 32)
  br label %96

96:                                               ; preds = %89
  %97 = load i32, ptr %11, align 4, !tbaa !5
  %98 = add nsw i32 %97, 1
  store i32 %98, ptr %11, align 4, !tbaa !5
  br label %84, !llvm.loop !13

99:                                               ; preds = %88
  %100 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i8 noundef signext 10)
  store i32 1, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8), i8 noundef signext) #3

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@a = external dso_local global [200010 x i32], align 16
@b = external dso_local local_unnamed_addr global [200010 x i32], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #5
  %2 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %.not29 = icmp slt i32 %3, 1
  br i1 %.not29, label %.preheader.thread, label %.lr.ph

.preheader.thread:                                ; preds = %0
  store i32 0, ptr getelementptr inbounds (i8, ptr @b, i64 4), align 4, !tbaa !5
  br label %._crit_edge39

._crit_edge:                                      ; preds = %.lr.ph
  store i32 0, ptr getelementptr inbounds (i8, ptr @b, i64 4), align 4, !tbaa !5
  %4 = icmp sgt i32 %7, 1
  br i1 %4, label %.lr.ph35.preheader, label %.preheader

.lr.ph35.preheader:                               ; preds = %._crit_edge
  %wide.trip.count = zext nneg i32 %7 to i64
  br label %.lr.ph35

.lr.ph:                                           ; preds = %0, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 1, %0 ]
  %5 = getelementptr inbounds [200010 x i32], ptr @a, i64 0, i64 %indvars.iv
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = sext i32 %7 to i64
  %.not.not = icmp slt i64 %indvars.iv, %8
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !9

.preheader.loopexit:                              ; preds = %.lr.ph35
  %.pre = load i32, ptr %1, align 4, !tbaa !5
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %._crit_edge
  %9 = phi i32 [ %.pre, %.preheader.loopexit ], [ %7, %._crit_edge ]
  %.not2836 = icmp slt i32 %9, 1
  br i1 %.not2836, label %._crit_edge39, label %.lr.ph38

.lr.ph35:                                         ; preds = %.lr.ph35.preheader, %.lr.ph35
  %10 = phi i32 [ 0, %.lr.ph35.preheader ], [ %op.rdx55, %.lr.ph35 ]
  %indvars.iv42 = phi i64 [ 1, %.lr.ph35.preheader ], [ %indvars.iv.next43, %.lr.ph35 ]
  %11 = getelementptr inbounds [200010 x i32], ptr @a, i64 0, i64 %indvars.iv42
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = xor i32 %10, %12
  %indvars.iv.next43 = add nuw nsw i64 %indvars.iv42, 1
  %14 = getelementptr inbounds [200010 x i32], ptr @a, i64 0, i64 %indvars.iv.next43
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = insertelement <4 x i32> poison, i32 %13, i64 0
  %17 = shufflevector <4 x i32> %16, <4 x i32> poison, <4 x i32> zeroinitializer
  %18 = and <4 x i32> %17, <i32 536870912, i32 1073741824, i32 268435456, i32 134217728>
  %19 = icmp eq <4 x i32> %18, zeroinitializer
  %20 = insertelement <4 x i32> poison, i32 %15, i64 0
  %21 = shufflevector <4 x i32> %20, <4 x i32> poison, <4 x i32> zeroinitializer
  %22 = and <4 x i32> %21, <i32 536870912, i32 1073741824, i32 268435456, i32 134217728>
  %23 = icmp ne <4 x i32> %22, zeroinitializer
  %24 = select <4 x i1> %19, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i1> %23
  %25 = select <4 x i1> %24, <4 x i32> zeroinitializer, <4 x i32> <i32 536870912, i32 1073741824, i32 268435456, i32 134217728>
  %26 = and i32 %13, 67108864
  %27 = icmp eq i32 %26, 0
  %28 = and i32 %15, 67108864
  %29 = icmp ne i32 %28, 0
  %or.cond.4 = select i1 %27, i1 true, i1 %29
  %30 = select i1 %or.cond.4, i32 0, i32 67108864
  %31 = and i32 %13, 33554432
  %32 = icmp eq i32 %31, 0
  %33 = and i32 %15, 33554432
  %34 = icmp ne i32 %33, 0
  %or.cond.5 = select i1 %32, i1 true, i1 %34
  %35 = select i1 %or.cond.5, i32 0, i32 33554432
  %36 = and i32 %13, 16777216
  %37 = icmp eq i32 %36, 0
  %38 = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %25)
  %op.rdx56 = or disjoint i32 %38, %30
  %39 = insertelement <16 x i32> poison, i32 %13, i64 0
  %40 = shufflevector <16 x i32> %39, <16 x i32> poison, <16 x i32> zeroinitializer
  %41 = and <16 x i32> %40, <i32 8388608, i32 4194304, i32 2097152, i32 1048576, i32 524288, i32 262144, i32 131072, i32 65536, i32 32768, i32 16384, i32 8192, i32 4096, i32 2048, i32 1024, i32 512, i32 256>
  %42 = icmp eq <16 x i32> %41, zeroinitializer
  %43 = insertelement <16 x i32> poison, i32 %15, i64 0
  %44 = shufflevector <16 x i32> %43, <16 x i32> poison, <16 x i32> zeroinitializer
  %45 = and <16 x i32> %44, <i32 8388608, i32 4194304, i32 2097152, i32 1048576, i32 524288, i32 262144, i32 131072, i32 65536, i32 32768, i32 16384, i32 8192, i32 4096, i32 2048, i32 1024, i32 512, i32 256>
  %46 = icmp ne <16 x i32> %45, zeroinitializer
  %47 = select <16 x i1> %42, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <16 x i1> %46
  %48 = select <16 x i1> %47, <16 x i32> zeroinitializer, <16 x i32> <i32 8388608, i32 4194304, i32 2097152, i32 1048576, i32 524288, i32 262144, i32 131072, i32 65536, i32 32768, i32 16384, i32 8192, i32 4096, i32 2048, i32 1024, i32 512, i32 256>
  %49 = and <4 x i32> %17, <i32 128, i32 64, i32 32, i32 16>
  %50 = icmp eq <4 x i32> %49, zeroinitializer
  %51 = and <4 x i32> %21, <i32 128, i32 64, i32 32, i32 16>
  %52 = icmp ne <4 x i32> %51, zeroinitializer
  %53 = select <4 x i1> %50, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i1> %52
  %54 = select <4 x i1> %53, <4 x i32> zeroinitializer, <4 x i32> <i32 128, i32 64, i32 32, i32 16>
  %55 = and i32 %13, 8
  %56 = icmp eq i32 %55, 0
  %57 = and i32 %13, 4
  %58 = icmp eq i32 %57, 0
  %59 = and i32 %13, 2
  %60 = icmp eq i32 %59, 0
  %61 = and <4 x i32> %21, <i32 2, i32 4, i32 8, i32 16777216>
  %62 = icmp ne <4 x i32> %61, zeroinitializer
  %63 = extractelement <4 x i1> %62, i64 3
  %or.cond.6 = select i1 %37, i1 true, i1 %63
  %64 = select i1 %or.cond.6, i32 0, i32 16777216
  %op.rdx57 = or disjoint i32 %35, %64
  %op.rdx58 = or disjoint i32 %op.rdx56, %op.rdx57
  %65 = extractelement <4 x i1> %62, i64 2
  %or.cond.27 = select i1 %56, i1 true, i1 %65
  %66 = select i1 %or.cond.27, i32 0, i32 8
  %67 = extractelement <4 x i1> %62, i64 1
  %or.cond.28 = select i1 %58, i1 true, i1 %67
  %68 = select i1 %or.cond.28, i32 0, i32 4
  %69 = extractelement <4 x i1> %62, i64 0
  %or.cond.29 = select i1 %60, i1 true, i1 %69
  %70 = select i1 %or.cond.29, i32 0, i32 2
  %71 = and i32 %13, 1
  %72 = icmp ne i32 %71, 0
  %73 = and i32 %15, 1
  %74 = icmp eq i32 %73, 0
  %or.cond.30.not = select i1 %72, i1 %74, i1 false
  %75 = zext i1 %or.cond.30.not to i32
  %76 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %48)
  %77 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %54)
  %op.rdx = add i32 %76, %77
  %op.rdx51 = add i32 %op.rdx, %66
  %op.rdx52 = or disjoint i32 %68, %70
  %op.rdx53 = or disjoint i32 %op.rdx58, %75
  %op.rdx54 = add i32 %op.rdx51, %op.rdx52
  %op.rdx55 = add i32 %op.rdx54, %op.rdx53
  %78 = getelementptr inbounds [200010 x i32], ptr @b, i64 0, i64 %indvars.iv.next43
  store i32 %op.rdx55, ptr %78, align 4, !tbaa !5
  %exitcond.not = icmp eq i64 %indvars.iv.next43, %wide.trip.count
  br i1 %exitcond.not, label %.preheader.loopexit, label %.lr.ph35, !llvm.loop !11

._crit_edge39:                                    ; preds = %.lr.ph38, %.preheader.thread, %.preheader
  %79 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i8 noundef signext 10)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #5
  ret void

.lr.ph38:                                         ; preds = %.preheader, %.lr.ph38
  %indvars.iv45 = phi i64 [ %indvars.iv.next46, %.lr.ph38 ], [ 1, %.preheader ]
  %80 = getelementptr inbounds [200010 x i32], ptr @b, i64 0, i64 %indvars.iv45
  %81 = load i32, ptr %80, align 4, !tbaa !5
  %82 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %81)
  %83 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8) %82, i8 noundef signext 32)
  %indvars.iv.next46 = add nuw nsw i64 %indvars.iv45, 1
  %84 = load i32, ptr %1, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %.not28.not = icmp slt i64 %indvars.iv45, %85
  br i1 %.not28.not, label %.lr.ph38, label %._crit_edge39, !llvm.loop !12
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c(ptr noundef nonnull align 8 dereferenceable(8), i8 noundef signext) local_unnamed_addr #3

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v16i32(<16 x i32>) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass