; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_2)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_s(ptr noundef, i64 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) #2

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_hermes0x3A0x3AreadSignedLEB1280x28llvh0x3A0x3AArrayRef0x3Cunsigned0x20char0x3E0x2C0x20unsigned0x20int0x2C0x20long0x20long0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #4 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  store i64 0, ptr %13, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #5
  %24 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %24, ptr %14, align 4, !tbaa !9
  %25 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %25, ptr %15, align 4, !tbaa !9
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.w2c_hermes, ptr %26, i32 0, i32 6
  %28 = load i32, ptr %15, align 4, !tbaa !9
  %29 = zext i32 %28 to i64
  %30 = add i64 %29, 4
  %31 = call i32 @i32_load(ptr noundef %27, i64 noundef %30)
  store i32 %31, ptr %15, align 4, !tbaa !9
  %32 = load i32, ptr %14, align 4, !tbaa !9
  %33 = load i32, ptr %15, align 4, !tbaa !9
  %34 = icmp ult i32 %32, %33
  %35 = zext i1 %34 to i32
  store i32 %35, ptr %14, align 4, !tbaa !9
  %36 = load i32, ptr %14, align 4, !tbaa !9
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %132

38:                                               ; preds = %4
  %39 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %39, ptr %14, align 4, !tbaa !9
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.w2c_hermes, ptr %40, i32 0, i32 6
  %42 = load i32, ptr %14, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  %44 = call i32 @i32_load(ptr noundef %41, i64 noundef %43)
  store i32 %44, ptr %14, align 4, !tbaa !9
  %45 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %45, ptr %15, align 4, !tbaa !9
  %46 = load i32, ptr %15, align 4, !tbaa !9
  %47 = load i32, ptr %14, align 4, !tbaa !9
  %48 = add i32 %47, %46
  store i32 %48, ptr %14, align 4, !tbaa !9
  %49 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %49, ptr %10, align 4, !tbaa !9
  %50 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %50, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %14, align 4, !tbaa !9
  %51 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %51, ptr %7, align 4, !tbaa !9
  br label %52

52:                                               ; preds = %96, %38
  %53 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %53, ptr %14, align 4, !tbaa !9
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.w2c_hermes, ptr %54, i32 0, i32 6
  %56 = load i32, ptr %14, align 4, !tbaa !9
  %57 = zext i32 %56 to i64
  %58 = call i32 @i32_load8_s(ptr noundef %55, i64 noundef %57)
  store i32 %58, ptr %14, align 4, !tbaa !9
  %59 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %59, ptr %9, align 4, !tbaa !9
  store i32 127, ptr %15, align 4, !tbaa !9
  %60 = load i32, ptr %15, align 4, !tbaa !9
  %61 = load i32, ptr %14, align 4, !tbaa !9
  %62 = and i32 %61, %60
  store i32 %62, ptr %14, align 4, !tbaa !9
  %63 = load i32, ptr %14, align 4, !tbaa !9
  %64 = zext i32 %63 to i64
  store i64 %64, ptr %20, align 8, !tbaa !11
  %65 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %65, ptr %15, align 4, !tbaa !9
  %66 = load i32, ptr %15, align 4, !tbaa !9
  %67 = zext i32 %66 to i64
  store i64 %67, ptr %21, align 8, !tbaa !11
  %68 = load i64, ptr %21, align 8, !tbaa !11
  %69 = and i64 %68, 63
  %70 = load i64, ptr %20, align 8, !tbaa !11
  %71 = shl i64 %70, %69
  store i64 %71, ptr %20, align 8, !tbaa !11
  %72 = load i64, ptr %13, align 8, !tbaa !11
  store i64 %72, ptr %21, align 8, !tbaa !11
  %73 = load i64, ptr %21, align 8, !tbaa !11
  %74 = load i64, ptr %20, align 8, !tbaa !11
  %75 = or i64 %74, %73
  store i64 %75, ptr %20, align 8, !tbaa !11
  %76 = load i64, ptr %20, align 8, !tbaa !11
  store i64 %76, ptr %13, align 8, !tbaa !11
  %77 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %77, ptr %14, align 4, !tbaa !9
  store i32 1, ptr %15, align 4, !tbaa !9
  %78 = load i32, ptr %15, align 4, !tbaa !9
  %79 = load i32, ptr %14, align 4, !tbaa !9
  %80 = add i32 %79, %78
  store i32 %80, ptr %14, align 4, !tbaa !9
  %81 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %81, ptr %11, align 4, !tbaa !9
  %82 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %82, ptr %6, align 4, !tbaa !9
  %83 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %83, ptr %14, align 4, !tbaa !9
  store i32 7, ptr %15, align 4, !tbaa !9
  %84 = load i32, ptr %15, align 4, !tbaa !9
  %85 = load i32, ptr %14, align 4, !tbaa !9
  %86 = add i32 %85, %84
  store i32 %86, ptr %14, align 4, !tbaa !9
  %87 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %87, ptr %12, align 4, !tbaa !9
  %88 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %88, ptr %7, align 4, !tbaa !9
  %89 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %89, ptr %14, align 4, !tbaa !9
  store i32 0, ptr %15, align 4, !tbaa !9
  %90 = load i32, ptr %14, align 4, !tbaa !9
  %91 = load i32, ptr %15, align 4, !tbaa !9
  %92 = icmp slt i32 %90, %91
  %93 = zext i1 %92 to i32
  store i32 %93, ptr %14, align 4, !tbaa !9
  %94 = load i32, ptr %14, align 4, !tbaa !9
  %95 = icmp ne i32 %94, 0
  br i1 %95, label %96, label %97

96:                                               ; preds = %52
  br label %52

97:                                               ; preds = %52
  %98 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %98, ptr %14, align 4, !tbaa !9
  %99 = load i64, ptr %13, align 8, !tbaa !11
  store i64 %99, ptr %21, align 8, !tbaa !11
  store i64 -1, ptr %22, align 8, !tbaa !11
  %100 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %100, ptr %17, align 4, !tbaa !9
  %101 = load i32, ptr %17, align 4, !tbaa !9
  %102 = zext i32 %101 to i64
  store i64 %102, ptr %23, align 8, !tbaa !11
  %103 = load i64, ptr %23, align 8, !tbaa !11
  %104 = and i64 %103, 63
  %105 = load i64, ptr %22, align 8, !tbaa !11
  %106 = shl i64 %105, %104
  store i64 %106, ptr %22, align 8, !tbaa !11
  store i64 0, ptr %23, align 8, !tbaa !11
  %107 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %107, ptr %18, align 4, !tbaa !9
  store i32 64, ptr %19, align 4, !tbaa !9
  %108 = load i32, ptr %19, align 4, !tbaa !9
  %109 = load i32, ptr %18, align 4, !tbaa !9
  %110 = and i32 %109, %108
  store i32 %110, ptr %18, align 4, !tbaa !9
  %111 = load i32, ptr %18, align 4, !tbaa !9
  %112 = icmp ne i32 %111, 0
  br i1 %112, label %113, label %115

113:                                              ; preds = %97
  %114 = load i64, ptr %22, align 8, !tbaa !11
  br label %117

115:                                              ; preds = %97
  %116 = load i64, ptr %23, align 8, !tbaa !11
  br label %117

117:                                              ; preds = %115, %113
  %118 = phi i64 [ %114, %113 ], [ %116, %115 ]
  store i64 %118, ptr %22, align 8, !tbaa !11
  %119 = load i64, ptr %22, align 8, !tbaa !11
  %120 = load i64, ptr %21, align 8, !tbaa !11
  %121 = or i64 %120, %119
  store i64 %121, ptr %21, align 8, !tbaa !11
  %122 = load ptr, ptr %5, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.w2c_hermes, ptr %122, i32 0, i32 6
  %124 = load i32, ptr %14, align 4, !tbaa !9
  %125 = zext i32 %124 to i64
  %126 = load i64, ptr %21, align 8, !tbaa !11
  call void @i64_store(ptr noundef %123, i64 noundef %125, i64 noundef %126)
  %127 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %127, ptr %14, align 4, !tbaa !9
  %128 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %128, ptr %15, align 4, !tbaa !9
  %129 = load i32, ptr %15, align 4, !tbaa !9
  %130 = load i32, ptr %14, align 4, !tbaa !9
  %131 = sub i32 %130, %129
  store i32 %131, ptr %14, align 4, !tbaa !9
  br label %150

132:                                              ; preds = %4
  store i32 0, ptr %14, align 4, !tbaa !9
  %133 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %133, ptr %6, align 4, !tbaa !9
  store i32 202939, ptr %15, align 4, !tbaa !9
  %134 = load i32, ptr %15, align 4, !tbaa !9
  %135 = load i32, ptr %14, align 4, !tbaa !9
  %136 = add i32 %135, %134
  store i32 %136, ptr %14, align 4, !tbaa !9
  %137 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %137, ptr %15, align 4, !tbaa !9
  store i32 82833, ptr %16, align 4, !tbaa !9
  %138 = load i32, ptr %16, align 4, !tbaa !9
  %139 = load i32, ptr %15, align 4, !tbaa !9
  %140 = add i32 %139, %138
  store i32 %140, ptr %15, align 4, !tbaa !9
  store i32 241, ptr %16, align 4, !tbaa !9
  %141 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %141, ptr %17, align 4, !tbaa !9
  store i32 108367, ptr %18, align 4, !tbaa !9
  %142 = load i32, ptr %18, align 4, !tbaa !9
  %143 = load i32, ptr %17, align 4, !tbaa !9
  %144 = add i32 %143, %142
  store i32 %144, ptr %17, align 4, !tbaa !9
  %145 = load ptr, ptr %5, align 8, !tbaa !5
  %146 = load i32, ptr %14, align 4, !tbaa !9
  %147 = load i32, ptr %15, align 4, !tbaa !9
  %148 = load i32, ptr %16, align 4, !tbaa !9
  %149 = load i32, ptr %17, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %145, i32 noundef %146, i32 noundef %147, i32 noundef %148, i32 noundef %149)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

150:                                              ; preds = %117
  %151 = load i32, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  ret i32 %151
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_s(ptr noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_hermes0x3A0x3AreadSignedLEB1280x28llvh0x3A0x3AArrayRef0x3Cunsigned0x20char0x3E0x2C0x20unsigned0x20int0x2C0x20long0x20long0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #3 {
  %5 = getelementptr inbounds i8, ptr %0, i64 40
  %6 = zext i32 %1 to i64
  %7 = add nuw nsw i64 %6, 4
  %8 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %7)
  %9 = icmp ugt i32 %8, %2
  br i1 %9, label %10, label %34

10:                                               ; preds = %4
  %11 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %6)
  %12 = add i32 %11, %2
  br label %13

13:                                               ; preds = %13, %10
  %.081 = phi i64 [ 0, %10 ], [ %21, %13 ]
  %.080 = phi i32 [ 0, %10 ], [ %23, %13 ]
  %.0 = phi i32 [ %12, %10 ], [ %22, %13 ]
  %14 = zext i32 %.0 to i64
  %15 = tail call i32 @i32_load8_s(ptr noundef nonnull %5, i64 noundef %14)
  %16 = and i32 %15, 127
  %17 = zext nneg i32 %16 to i64
  %18 = and i32 %.080, 63
  %19 = zext nneg i32 %18 to i64
  %20 = shl i64 %17, %19
  %21 = or i64 %20, %.081
  %22 = add i32 %.0, 1
  %23 = add i32 %.080, 7
  %24 = icmp slt i32 %15, 0
  br i1 %24, label %13, label %25

25:                                               ; preds = %13
  %26 = and i32 %23, 63
  %27 = zext nneg i32 %26 to i64
  %28 = shl nsw i64 -1, %27
  %29 = and i32 %15, 64
  %.not = icmp eq i32 %29, 0
  %30 = select i1 %.not, i64 0, i64 %28
  %31 = or i64 %21, %30
  %32 = zext i32 %3 to i64
  tail call void @i64_store(ptr noundef nonnull %5, i64 noundef %32, i64 noundef %31)
  %33 = sub i32 %22, %12
  ret i32 %33

34:                                               ; preds = %4
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 202939, i32 noundef 82833, i32 noundef 241, i32 noundef 108367) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable
}

attributes #0 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass