; LLVM IR from DionysiosB/CodeForces :: 0001-0099/60B-SerialTime.ll (Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4) #0 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca %"struct.std::_Bit_reference", align 8
  %12 = alloca %"struct.std::_Bit_reference", align 8
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !9
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = icmp slt i32 %13, 0
  br i1 %14, label %42, label %15

15:                                               ; preds = %5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = load ptr, ptr %9, align 8, !tbaa !9
  %19 = call noundef i64 @_ZNKSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #3
  %20 = icmp uge i64 %17, %19
  br i1 %20, label %42, label %21

21:                                               ; preds = %15
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = icmp slt i32 %22, 0
  br i1 %23, label %42, label %24

24:                                               ; preds = %21
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = load ptr, ptr %9, align 8, !tbaa !9
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef 0) #3
  %29 = call noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %28) #3
  %30 = icmp uge i64 %26, %29
  br i1 %30, label %42, label %31

31:                                               ; preds = %24
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = icmp slt i32 %32, 0
  br i1 %33, label %42, label %34

34:                                               ; preds = %31
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = load ptr, ptr %9, align 8, !tbaa !9
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef 0) #3
  %39 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef 0) #3
  %40 = call noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %39) #3
  %41 = icmp uge i64 %36, %40
  br i1 %41, label %42, label %43

42:                                               ; preds = %34, %31, %24, %21, %15, %5
  br label %116

43:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #3
  %44 = load ptr, ptr %9, align 8, !tbaa !9
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %46) #3
  %48 = load i32, ptr %7, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %49) #3
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %50, i64 noundef %52)
  %54 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 0
  %55 = extractvalue { ptr, i64 } %53, 0
  store ptr %55, ptr %54, align 8
  %56 = getelementptr inbounds { ptr, i64 }, ptr %11, i32 0, i32 1
  %57 = extractvalue { ptr, i64 } %53, 1
  store i64 %57, ptr %56, align 8
  %58 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %11) #3
  %59 = xor i1 %58, true
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #3
  br i1 %59, label %60, label %61

60:                                               ; preds = %43
  br label %116

61:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 16, ptr %12) #3
  %62 = load ptr, ptr %9, align 8, !tbaa !9
  %63 = load i32, ptr %6, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %64) #3
  %66 = load i32, ptr %7, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %67) #3
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %68, i64 noundef %70)
  %72 = getelementptr inbounds { ptr, i64 }, ptr %12, i32 0, i32 0
  %73 = extractvalue { ptr, i64 } %71, 0
  store ptr %73, ptr %72, align 8
  %74 = getelementptr inbounds { ptr, i64 }, ptr %12, i32 0, i32 1
  %75 = extractvalue { ptr, i64 } %71, 1
  store i64 %75, ptr %74, align 8
  %76 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %12, i1 noundef zeroext false) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %12) #3
  %77 = load ptr, ptr %10, align 8, !tbaa !9
  %78 = load i32, ptr %77, align 4, !tbaa !5
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %77, align 4, !tbaa !5
  %80 = load i32, ptr %6, align 4, !tbaa !5
  %81 = sub nsw i32 %80, 1
  %82 = load i32, ptr %7, align 4, !tbaa !5
  %83 = load i32, ptr %8, align 4, !tbaa !5
  %84 = load ptr, ptr %9, align 8, !tbaa !9
  %85 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %81, i32 noundef %82, i32 noundef %83, ptr noundef nonnull align 8 dereferenceable(24) %84, ptr noundef nonnull align 4 dereferenceable(4) %85)
  %86 = load i32, ptr %6, align 4, !tbaa !5
  %87 = add nsw i32 %86, 1
  %88 = load i32, ptr %7, align 4, !tbaa !5
  %89 = load i32, ptr %8, align 4, !tbaa !5
  %90 = load ptr, ptr %9, align 8, !tbaa !9
  %91 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %87, i32 noundef %88, i32 noundef %89, ptr noundef nonnull align 8 dereferenceable(24) %90, ptr noundef nonnull align 4 dereferenceable(4) %91)
  %92 = load i32, ptr %6, align 4, !tbaa !5
  %93 = load i32, ptr %7, align 4, !tbaa !5
  %94 = sub nsw i32 %93, 1
  %95 = load i32, ptr %8, align 4, !tbaa !5
  %96 = load ptr, ptr %9, align 8, !tbaa !9
  %97 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %92, i32 noundef %94, i32 noundef %95, ptr noundef nonnull align 8 dereferenceable(24) %96, ptr noundef nonnull align 4 dereferenceable(4) %97)
  %98 = load i32, ptr %6, align 4, !tbaa !5
  %99 = load i32, ptr %7, align 4, !tbaa !5
  %100 = add nsw i32 %99, 1
  %101 = load i32, ptr %8, align 4, !tbaa !5
  %102 = load ptr, ptr %9, align 8, !tbaa !9
  %103 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %98, i32 noundef %100, i32 noundef %101, ptr noundef nonnull align 8 dereferenceable(24) %102, ptr noundef nonnull align 4 dereferenceable(4) %103)
  %104 = load i32, ptr %6, align 4, !tbaa !5
  %105 = load i32, ptr %7, align 4, !tbaa !5
  %106 = load i32, ptr %8, align 4, !tbaa !5
  %107 = sub nsw i32 %106, 1
  %108 = load ptr, ptr %9, align 8, !tbaa !9
  %109 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %104, i32 noundef %105, i32 noundef %107, ptr noundef nonnull align 8 dereferenceable(24) %108, ptr noundef nonnull align 4 dereferenceable(4) %109)
  %110 = load i32, ptr %6, align 4, !tbaa !5
  %111 = load i32, ptr %7, align 4, !tbaa !5
  %112 = load i32, ptr %8, align 4, !tbaa !5
  %113 = add nsw i32 %112, 1
  %114 = load ptr, ptr %9, align 8, !tbaa !9
  %115 = load ptr, ptr %10, align 8, !tbaa !9
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %110, i32 noundef %111, i32 noundef %113, ptr noundef nonnull align 8 dereferenceable(24) %114, ptr noundef nonnull align 4 dereferenceable(4) %115)
  br label %116

116:                                              ; preds = %61, %60, %42
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4) local_unnamed_addr #0 {
  %6 = alloca %"struct.std::_Bit_reference", align 8
  %7 = alloca %"struct.std::_Bit_reference", align 8
  %8 = icmp slt i32 %0, 0
  br i1 %8, label %49, label %9

9:                                                ; preds = %5
  %10 = zext nneg i32 %0 to i64
  %11 = tail call noundef i64 @_ZNKSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #3
  %12 = icmp ule i64 %11, %10
  %13 = icmp slt i32 %1, 0
  %or.cond = or i1 %13, %12
  br i1 %or.cond, label %49, label %14

14:                                               ; preds = %9
  %15 = zext nneg i32 %1 to i64
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef 0) #3
  %17 = tail call noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #3
  %18 = icmp ule i64 %17, %15
  %19 = icmp slt i32 %2, 0
  %or.cond3 = or i1 %19, %18
  br i1 %or.cond3, label %49, label %20

20:                                               ; preds = %14
  %21 = zext nneg i32 %2 to i64
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef 0) #3
  %23 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef 0) #3
  %24 = tail call noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40) %23) #3
  %.not = icmp ugt i64 %24, %21
  br i1 %.not, label %25, label %49

25:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #3
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %10) #3
  %27 = tail call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %15) #3
  %28 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %27, i64 noundef %21)
  %29 = extractvalue { ptr, i64 } %28, 0
  store ptr %29, ptr %6, align 8
  %30 = getelementptr inbounds i8, ptr %6, i64 8
  %31 = extractvalue { ptr, i64 } %28, 1
  store i64 %31, ptr %30, align 8
  %32 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %6) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #3
  br i1 %32, label %33, label %49

33:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %34 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %10) #3
  %35 = call noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %15) #3
  %36 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %35, i64 noundef %21)
  %37 = extractvalue { ptr, i64 } %36, 0
  store ptr %37, ptr %7, align 8
  %38 = getelementptr inbounds i8, ptr %7, i64 8
  %39 = extractvalue { ptr, i64 } %36, 1
  store i64 %39, ptr %38, align 8
  %40 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %7, i1 noundef zeroext false) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  %41 = load i32, ptr %4, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr %4, align 4, !tbaa !5
  %43 = add nsw i32 %0, -1
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %43, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %44 = add nuw nsw i32 %0, 1
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %44, i32 noundef %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %45 = add nsw i32 %1, -1
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %0, i32 noundef %45, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %46 = add nuw nsw i32 %1, 1
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %0, i32 noundef %46, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %47 = add nsw i32 %2, -1
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %0, i32 noundef %1, i32 noundef %47, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %48 = add nuw nsw i32 %2, 1
  call void @_Z3dfsiiiRSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EERi(i32 noundef %0, i32 noundef %1, i32 noundef %48, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  br label %49

49:                                               ; preds = %25, %5, %9, %14, %20, %33
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IbSaIbEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IbSaIbEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(40) ptr @_ZNSt6vectorIS_IbSaIbEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIbSaIbEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(40)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass