; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AAlignedHeapSegment0x3A0x3AgetCellMarkBit0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x20const0x2A0x29(ptr noundef %0, i32 noundef %1) #4 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %11 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %11, ptr %6, align 4, !tbaa !9
  store i32 -4194304, ptr %7, align 4, !tbaa !9
  %12 = load i32, ptr %7, align 4, !tbaa !9
  %13 = load i32, ptr %6, align 4, !tbaa !9
  %14 = and i32 %13, %12
  store i32 %14, ptr %6, align 4, !tbaa !9
  store i32 16384, ptr %7, align 4, !tbaa !9
  %15 = load i32, ptr %7, align 4, !tbaa !9
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = or i32 %16, %15
  store i32 %17, ptr %6, align 4, !tbaa !9
  %18 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %18, ptr %5, align 4, !tbaa !9
  %19 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %19, ptr %7, align 4, !tbaa !9
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = icmp ugt i32 %20, %21
  %23 = zext i1 %22 to i32
  store i32 %23, ptr %6, align 4, !tbaa !9
  %24 = load i32, ptr %6, align 4, !tbaa !9
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %27

26:                                               ; preds = %2
  br label %87

27:                                               ; preds = %2
  %28 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %28, ptr %6, align 4, !tbaa !9
  store i32 -4194304, ptr %7, align 4, !tbaa !9
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = and i32 %30, %29
  store i32 %31, ptr %6, align 4, !tbaa !9
  store i32 4194304, ptr %7, align 4, !tbaa !9
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load i32, ptr %6, align 4, !tbaa !9
  %34 = add i32 %33, %32
  store i32 %34, ptr %6, align 4, !tbaa !9
  %35 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %35, ptr %7, align 4, !tbaa !9
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = icmp ule i32 %36, %37
  %39 = zext i1 %38 to i32
  store i32 %39, ptr %6, align 4, !tbaa !9
  %40 = load i32, ptr %6, align 4, !tbaa !9
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %27
  br label %87

43:                                               ; preds = %27
  %44 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %44, ptr %6, align 4, !tbaa !9
  %45 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %45, ptr %7, align 4, !tbaa !9
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = load i32, ptr %6, align 4, !tbaa !9
  %48 = sub i32 %47, %46
  store i32 %48, ptr %6, align 4, !tbaa !9
  %49 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %49, ptr %4, align 4, !tbaa !9
  store i32 4194304, ptr %7, align 4, !tbaa !9
  %50 = load i32, ptr %6, align 4, !tbaa !9
  %51 = load i32, ptr %7, align 4, !tbaa !9
  %52 = icmp uge i32 %50, %51
  %53 = zext i1 %52 to i32
  store i32 %53, ptr %6, align 4, !tbaa !9
  %54 = load i32, ptr %6, align 4, !tbaa !9
  %55 = icmp ne i32 %54, 0
  br i1 %55, label %56, label %57

56:                                               ; preds = %43
  br label %105

57:                                               ; preds = %43
  %58 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %58, ptr %6, align 4, !tbaa !9
  %59 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %59, ptr %7, align 4, !tbaa !9
  store i32 6, ptr %8, align 4, !tbaa !9
  %60 = load i32, ptr %8, align 4, !tbaa !9
  %61 = and i32 %60, 31
  %62 = load i32, ptr %7, align 4, !tbaa !9
  %63 = lshr i32 %62, %61
  store i32 %63, ptr %7, align 4, !tbaa !9
  store i32 67108860, ptr %8, align 4, !tbaa !9
  %64 = load i32, ptr %8, align 4, !tbaa !9
  %65 = load i32, ptr %7, align 4, !tbaa !9
  %66 = and i32 %65, %64
  store i32 %66, ptr %7, align 4, !tbaa !9
  %67 = load i32, ptr %7, align 4, !tbaa !9
  %68 = load i32, ptr %6, align 4, !tbaa !9
  %69 = add i32 %68, %67
  store i32 %69, ptr %6, align 4, !tbaa !9
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.w2c_hermes, ptr %70, i32 0, i32 6
  %72 = load i32, ptr %6, align 4, !tbaa !9
  %73 = zext i32 %72 to i64
  %74 = call i32 @i32_load(ptr noundef %71, i64 noundef %73)
  store i32 %74, ptr %6, align 4, !tbaa !9
  %75 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %75, ptr %7, align 4, !tbaa !9
  store i32 3, ptr %8, align 4, !tbaa !9
  %76 = load i32, ptr %8, align 4, !tbaa !9
  %77 = and i32 %76, 31
  %78 = load i32, ptr %7, align 4, !tbaa !9
  %79 = lshr i32 %78, %77
  store i32 %79, ptr %7, align 4, !tbaa !9
  %80 = load i32, ptr %7, align 4, !tbaa !9
  %81 = and i32 %80, 31
  %82 = load i32, ptr %6, align 4, !tbaa !9
  %83 = lshr i32 %82, %81
  store i32 %83, ptr %6, align 4, !tbaa !9
  store i32 1, ptr %7, align 4, !tbaa !9
  %84 = load i32, ptr %7, align 4, !tbaa !9
  %85 = load i32, ptr %6, align 4, !tbaa !9
  %86 = and i32 %85, %84
  store i32 %86, ptr %6, align 4, !tbaa !9
  br label %123

87:                                               ; preds = %42, %26
  store i32 0, ptr %6, align 4, !tbaa !9
  %88 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %88, ptr %4, align 4, !tbaa !9
  store i32 170852, ptr %7, align 4, !tbaa !9
  %89 = load i32, ptr %7, align 4, !tbaa !9
  %90 = load i32, ptr %6, align 4, !tbaa !9
  %91 = add i32 %90, %89
  store i32 %91, ptr %6, align 4, !tbaa !9
  %92 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %92, ptr %7, align 4, !tbaa !9
  store i32 86240, ptr %8, align 4, !tbaa !9
  %93 = load i32, ptr %8, align 4, !tbaa !9
  %94 = load i32, ptr %7, align 4, !tbaa !9
  %95 = add i32 %94, %93
  store i32 %95, ptr %7, align 4, !tbaa !9
  store i32 118, ptr %8, align 4, !tbaa !9
  %96 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %96, ptr %9, align 4, !tbaa !9
  store i32 19893, ptr %10, align 4, !tbaa !9
  %97 = load i32, ptr %10, align 4, !tbaa !9
  %98 = load i32, ptr %9, align 4, !tbaa !9
  %99 = add i32 %98, %97
  store i32 %99, ptr %9, align 4, !tbaa !9
  %100 = load ptr, ptr %3, align 8, !tbaa !5
  %101 = load i32, ptr %6, align 4, !tbaa !9
  %102 = load i32, ptr %7, align 4, !tbaa !9
  %103 = load i32, ptr %8, align 4, !tbaa !9
  %104 = load i32, ptr %9, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %100, i32 noundef %101, i32 noundef %102, i32 noundef %103, i32 noundef %104)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

105:                                              ; preds = %56
  store i32 0, ptr %6, align 4, !tbaa !9
  %106 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %106, ptr %4, align 4, !tbaa !9
  store i32 169713, ptr %7, align 4, !tbaa !9
  %107 = load i32, ptr %7, align 4, !tbaa !9
  %108 = load i32, ptr %6, align 4, !tbaa !9
  %109 = add i32 %108, %107
  store i32 %109, ptr %6, align 4, !tbaa !9
  %110 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %110, ptr %7, align 4, !tbaa !9
  store i32 86240, ptr %8, align 4, !tbaa !9
  %111 = load i32, ptr %8, align 4, !tbaa !9
  %112 = load i32, ptr %7, align 4, !tbaa !9
  %113 = add i32 %112, %111
  store i32 %113, ptr %7, align 4, !tbaa !9
  store i32 134, ptr %8, align 4, !tbaa !9
  %114 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %114, ptr %9, align 4, !tbaa !9
  store i32 39587, ptr %10, align 4, !tbaa !9
  %115 = load i32, ptr %10, align 4, !tbaa !9
  %116 = load i32, ptr %9, align 4, !tbaa !9
  %117 = add i32 %116, %115
  store i32 %117, ptr %9, align 4, !tbaa !9
  %118 = load ptr, ptr %3, align 8, !tbaa !5
  %119 = load i32, ptr %6, align 4, !tbaa !9
  %120 = load i32, ptr %7, align 4, !tbaa !9
  %121 = load i32, ptr %8, align 4, !tbaa !9
  %122 = load i32, ptr %9, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %118, i32 noundef %119, i32 noundef %120, i32 noundef %121, i32 noundef %122)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

123:                                              ; preds = %57
  %124 = load i32, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  ret i32 %124
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AAlignedHeapSegment0x3A0x3AgetCellMarkBit0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x20const0x2A0x29(ptr noundef %0, i32 noundef %1) local_unnamed_addr #3 {
  %3 = and i32 %1, -4194304
  %4 = or disjoint i32 %3, 16384
  %5 = icmp ule i32 %4, %1
  %6 = add i32 %3, 4194304
  %.not = icmp ugt i32 %6, %1
  %or.cond = and i1 %5, %.not
  br i1 %or.cond, label %7, label %21

7:                                                ; preds = %2
  %8 = sub i32 %1, %4
  %9 = icmp ugt i32 %8, 4194303
  br i1 %9, label %22, label %10

10:                                               ; preds = %7
  %11 = lshr i32 %8, 6
  %12 = and i32 %11, 65532
  %13 = add nuw nsw i32 %12, %4
  %14 = getelementptr inbounds i8, ptr %0, i64 40
  %15 = zext i32 %13 to i64
  %16 = tail call i32 @i32_load(ptr noundef nonnull %14, i64 noundef %15)
  %17 = lshr i32 %1, 3
  %18 = and i32 %17, 31
  %19 = lshr i32 %16, %18
  %20 = and i32 %19, 1
  ret i32 %20

21:                                               ; preds = %2
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 170852, i32 noundef 86240, i32 noundef 118, i32 noundef 19893) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

22:                                               ; preds = %7
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 169713, i32 noundef 86240, i32 noundef 134, i32 noundef 39587) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass