; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_opt_compiled_0)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_reinterpret_f64(double noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden double @f64_reinterpret_i64(i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local double @w2c_hermes_0x5F_tan(ptr noundef %0, double noundef %1, double noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca double, align 8
  %14 = alloca double, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  %24 = alloca i64, align 8
  %25 = alloca double, align 8
  %26 = alloca double, align 8
  %27 = alloca double, align 8
  %28 = alloca double, align 8
  %29 = alloca double, align 8
  %30 = alloca double, align 8
  %31 = alloca double, align 8
  %32 = alloca double, align 8
  %33 = alloca double, align 8
  %34 = alloca double, align 8
  %35 = alloca double, align 8
  %36 = alloca double, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store double %1, ptr %6, align 8, !tbaa !9
  store double %2, ptr %7, align 8, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  store i64 0, ptr %12, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  store double 0.000000e+00, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store double 0.000000e+00, ptr %14, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %29) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %30) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %33) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %34) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %35) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %36) #3
  %37 = load double, ptr %6, align 8, !tbaa !9
  store double %37, ptr %25, align 8, !tbaa !9
  %38 = load double, ptr %25, align 8, !tbaa !9
  %39 = call i64 @i64_reinterpret_f64(double noundef %38)
  store i64 %39, ptr %20, align 8, !tbaa !13
  %40 = load i64, ptr %20, align 8, !tbaa !13
  store i64 %40, ptr %12, align 8, !tbaa !13
  store i64 32, ptr %21, align 8, !tbaa !13
  %41 = load i64, ptr %21, align 8, !tbaa !13
  %42 = and i64 %41, 63
  %43 = load i64, ptr %20, align 8, !tbaa !13
  %44 = lshr i64 %43, %42
  store i64 %44, ptr %20, align 8, !tbaa !13
  %45 = load i64, ptr %20, align 8, !tbaa !13
  %46 = trunc i64 %45 to i32
  store i32 %46, ptr %15, align 4, !tbaa !11
  %47 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %47, ptr %9, align 4, !tbaa !11
  store i32 2147483640, ptr %16, align 4, !tbaa !11
  %48 = load i32, ptr %16, align 4, !tbaa !11
  %49 = load i32, ptr %15, align 4, !tbaa !11
  %50 = and i32 %49, %48
  store i32 %50, ptr %15, align 4, !tbaa !11
  store i32 1072010280, ptr %16, align 4, !tbaa !11
  %51 = load i32, ptr %15, align 4, !tbaa !11
  %52 = load i32, ptr %16, align 4, !tbaa !11
  %53 = icmp ult i32 %51, %52
  %54 = zext i1 %53 to i32
  store i32 %54, ptr %15, align 4, !tbaa !11
  %55 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %55, ptr %10, align 4, !tbaa !11
  %56 = load i32, ptr %15, align 4, !tbaa !11
  %57 = icmp ne i32 %56, 0
  %58 = xor i1 %57, true
  %59 = zext i1 %58 to i32
  store i32 %59, ptr %15, align 4, !tbaa !11
  %60 = load i32, ptr %15, align 4, !tbaa !11
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %62, label %113

62:                                               ; preds = %4
  store double 0x3FE921FB54442D18, ptr %25, align 8, !tbaa !9
  %63 = load double, ptr %6, align 8, !tbaa !9
  store double %63, ptr %26, align 8, !tbaa !9
  %64 = load double, ptr %6, align 8, !tbaa !9
  store double %64, ptr %27, align 8, !tbaa !9
  %65 = load double, ptr %27, align 8, !tbaa !9
  %66 = fneg double %65
  store double %66, ptr %27, align 8, !tbaa !9
  %67 = load i64, ptr %12, align 8, !tbaa !13
  store i64 %67, ptr %23, align 8, !tbaa !13
  store i64 0, ptr %24, align 8, !tbaa !13
  %68 = load i64, ptr %23, align 8, !tbaa !13
  %69 = load i64, ptr %24, align 8, !tbaa !13
  %70 = icmp sge i64 %68, %69
  %71 = zext i1 %70 to i32
  %72 = sext i32 %71 to i64
  %73 = trunc i64 %72 to i32
  store i32 %73, ptr %18, align 4, !tbaa !11
  %74 = load i32, ptr %18, align 4, !tbaa !11
  store i32 %74, ptr %11, align 4, !tbaa !11
  %75 = load i32, ptr %18, align 4, !tbaa !11
  %76 = icmp ne i32 %75, 0
  br i1 %76, label %77, label %79

77:                                               ; preds = %62
  %78 = load double, ptr %26, align 8, !tbaa !9
  br label %81

79:                                               ; preds = %62
  %80 = load double, ptr %27, align 8, !tbaa !9
  br label %81

81:                                               ; preds = %79, %77
  %82 = phi double [ %78, %77 ], [ %80, %79 ]
  store double %82, ptr %26, align 8, !tbaa !9
  %83 = load double, ptr %26, align 8, !tbaa !9
  %84 = load double, ptr %25, align 8, !tbaa !9
  %85 = fsub double %84, %83
  store double %85, ptr %25, align 8, !tbaa !9
  store double 0x3C81A62633145C07, ptr %26, align 8, !tbaa !9
  %86 = load double, ptr %7, align 8, !tbaa !9
  store double %86, ptr %27, align 8, !tbaa !9
  %87 = load double, ptr %7, align 8, !tbaa !9
  store double %87, ptr %28, align 8, !tbaa !9
  %88 = load double, ptr %28, align 8, !tbaa !9
  %89 = fneg double %88
  store double %89, ptr %28, align 8, !tbaa !9
  %90 = load i32, ptr %11, align 4, !tbaa !11
  store i32 %90, ptr %19, align 4, !tbaa !11
  %91 = load i32, ptr %19, align 4, !tbaa !11
  %92 = icmp ne i32 %91, 0
  br i1 %92, label %93, label %95

93:                                               ; preds = %81
  %94 = load double, ptr %27, align 8, !tbaa !9
  br label %97

95:                                               ; preds = %81
  %96 = load double, ptr %28, align 8, !tbaa !9
  br label %97

97:                                               ; preds = %95, %93
  %98 = phi double [ %94, %93 ], [ %96, %95 ]
  store double %98, ptr %27, align 8, !tbaa !9
  %99 = load double, ptr %27, align 8, !tbaa !9
  %100 = load double, ptr %26, align 8, !tbaa !9
  %101 = fsub double %100, %99
  store double %101, ptr %26, align 8, !tbaa !9
  %102 = load double, ptr %26, align 8, !tbaa !9
  %103 = load double, ptr %25, align 8, !tbaa !9
  %104 = fadd double %103, %102
  store double %104, ptr %25, align 8, !tbaa !9
  %105 = load double, ptr %25, align 8, !tbaa !9
  store double %105, ptr %6, align 8, !tbaa !9
  %106 = load i32, ptr %9, align 4, !tbaa !11
  store i32 %106, ptr %15, align 4, !tbaa !11
  store i32 31, ptr %16, align 4, !tbaa !11
  %107 = load i32, ptr %16, align 4, !tbaa !11
  %108 = and i32 %107, 31
  %109 = load i32, ptr %15, align 4, !tbaa !11
  %110 = lshr i32 %109, %108
  store i32 %110, ptr %15, align 4, !tbaa !11
  %111 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %111, ptr %9, align 4, !tbaa !11
  store double 0.000000e+00, ptr %25, align 8, !tbaa !9
  %112 = load double, ptr %25, align 8, !tbaa !9
  store double %112, ptr %7, align 8, !tbaa !9
  br label %113

113:                                              ; preds = %97, %4
  %114 = load double, ptr %6, align 8, !tbaa !9
  store double %114, ptr %25, align 8, !tbaa !9
  %115 = load double, ptr %6, align 8, !tbaa !9
  store double %115, ptr %26, align 8, !tbaa !9
  %116 = load double, ptr %6, align 8, !tbaa !9
  store double %116, ptr %27, align 8, !tbaa !9
  %117 = load double, ptr %6, align 8, !tbaa !9
  store double %117, ptr %28, align 8, !tbaa !9
  %118 = load double, ptr %28, align 8, !tbaa !9
  %119 = load double, ptr %27, align 8, !tbaa !9
  %120 = fmul double %119, %118
  store double %120, ptr %27, align 8, !tbaa !9
  %121 = load double, ptr %27, align 8, !tbaa !9
  store double %121, ptr %14, align 8, !tbaa !9
  %122 = load double, ptr %27, align 8, !tbaa !9
  %123 = load double, ptr %26, align 8, !tbaa !9
  %124 = fmul double %123, %122
  store double %124, ptr %26, align 8, !tbaa !9
  %125 = load double, ptr %26, align 8, !tbaa !9
  store double %125, ptr %13, align 8, !tbaa !9
  store double 0x3FD5555555555563, ptr %27, align 8, !tbaa !9
  %126 = load double, ptr %27, align 8, !tbaa !9
  %127 = load double, ptr %26, align 8, !tbaa !9
  %128 = fmul double %127, %126
  store double %128, ptr %26, align 8, !tbaa !9
  %129 = load double, ptr %14, align 8, !tbaa !9
  store double %129, ptr %27, align 8, !tbaa !9
  %130 = load double, ptr %13, align 8, !tbaa !9
  store double %130, ptr %28, align 8, !tbaa !9
  %131 = load double, ptr %14, align 8, !tbaa !9
  store double %131, ptr %29, align 8, !tbaa !9
  %132 = load double, ptr %14, align 8, !tbaa !9
  store double %132, ptr %30, align 8, !tbaa !9
  %133 = load double, ptr %30, align 8, !tbaa !9
  %134 = load double, ptr %29, align 8, !tbaa !9
  %135 = fmul double %134, %133
  store double %135, ptr %29, align 8, !tbaa !9
  %136 = load double, ptr %29, align 8, !tbaa !9
  store double %136, ptr %13, align 8, !tbaa !9
  %137 = load double, ptr %13, align 8, !tbaa !9
  store double %137, ptr %30, align 8, !tbaa !9
  %138 = load double, ptr %13, align 8, !tbaa !9
  store double %138, ptr %31, align 8, !tbaa !9
  %139 = load double, ptr %13, align 8, !tbaa !9
  store double %139, ptr %32, align 8, !tbaa !9
  %140 = load double, ptr %13, align 8, !tbaa !9
  store double %140, ptr %33, align 8, !tbaa !9
  store double 0xBEF375CBDB605373, ptr %34, align 8, !tbaa !9
  %141 = load double, ptr %34, align 8, !tbaa !9
  %142 = load double, ptr %33, align 8, !tbaa !9
  %143 = fmul double %142, %141
  store double %143, ptr %33, align 8, !tbaa !9
  store double 0x3F147E88A03792A6, ptr %34, align 8, !tbaa !9
  %144 = load double, ptr %34, align 8, !tbaa !9
  %145 = load double, ptr %33, align 8, !tbaa !9
  %146 = fadd double %145, %144
  store double %146, ptr %33, align 8, !tbaa !9
  %147 = load double, ptr %33, align 8, !tbaa !9
  %148 = load double, ptr %32, align 8, !tbaa !9
  %149 = fmul double %148, %147
  store double %149, ptr %32, align 8, !tbaa !9
  store double 0x3F4344D8F2F26501, ptr %33, align 8, !tbaa !9
  %150 = load double, ptr %33, align 8, !tbaa !9
  %151 = load double, ptr %32, align 8, !tbaa !9
  %152 = fadd double %151, %150
  store double %152, ptr %32, align 8, !tbaa !9
  %153 = load double, ptr %32, align 8, !tbaa !9
  %154 = load double, ptr %31, align 8, !tbaa !9
  %155 = fmul double %154, %153
  store double %155, ptr %31, align 8, !tbaa !9
  store double 0x3F6D6D22C9560328, ptr %32, align 8, !tbaa !9
  %156 = load double, ptr %32, align 8, !tbaa !9
  %157 = load double, ptr %31, align 8, !tbaa !9
  %158 = fadd double %157, %156
  store double %158, ptr %31, align 8, !tbaa !9
  %159 = load double, ptr %31, align 8, !tbaa !9
  %160 = load double, ptr %30, align 8, !tbaa !9
  %161 = fmul double %160, %159
  store double %161, ptr %30, align 8, !tbaa !9
  store double 0x3F9664F48406D637, ptr %31, align 8, !tbaa !9
  %162 = load double, ptr %31, align 8, !tbaa !9
  %163 = load double, ptr %30, align 8, !tbaa !9
  %164 = fadd double %163, %162
  store double %164, ptr %30, align 8, !tbaa !9
  %165 = load double, ptr %30, align 8, !tbaa !9
  %166 = load double, ptr %29, align 8, !tbaa !9
  %167 = fmul double %166, %165
  store double %167, ptr %29, align 8, !tbaa !9
  store double 0x3FC111111110FE7A, ptr %30, align 8, !tbaa !9
  %168 = load double, ptr %30, align 8, !tbaa !9
  %169 = load double, ptr %29, align 8, !tbaa !9
  %170 = fadd double %169, %168
  store double %170, ptr %29, align 8, !tbaa !9
  %171 = load double, ptr %14, align 8, !tbaa !9
  store double %171, ptr %30, align 8, !tbaa !9
  %172 = load double, ptr %13, align 8, !tbaa !9
  store double %172, ptr %31, align 8, !tbaa !9
  %173 = load double, ptr %13, align 8, !tbaa !9
  store double %173, ptr %32, align 8, !tbaa !9
  %174 = load double, ptr %13, align 8, !tbaa !9
  store double %174, ptr %33, align 8, !tbaa !9
  %175 = load double, ptr %13, align 8, !tbaa !9
  store double %175, ptr %34, align 8, !tbaa !9
  %176 = load double, ptr %13, align 8, !tbaa !9
  store double %176, ptr %35, align 8, !tbaa !9
  store double 0x3EFB2A7074BF7AD4, ptr %36, align 8, !tbaa !9
  %177 = load double, ptr %36, align 8, !tbaa !9
  %178 = load double, ptr %35, align 8, !tbaa !9
  %179 = fmul double %178, %177
  store double %179, ptr %35, align 8, !tbaa !9
  store double 0x3F12B80F32F0A7E9, ptr %36, align 8, !tbaa !9
  %180 = load double, ptr %36, align 8, !tbaa !9
  %181 = load double, ptr %35, align 8, !tbaa !9
  %182 = fadd double %181, %180
  store double %182, ptr %35, align 8, !tbaa !9
  %183 = load double, ptr %35, align 8, !tbaa !9
  %184 = load double, ptr %34, align 8, !tbaa !9
  %185 = fmul double %184, %183
  store double %185, ptr %34, align 8, !tbaa !9
  store double 0x3F3026F71A8D1068, ptr %35, align 8, !tbaa !9
  %186 = load double, ptr %35, align 8, !tbaa !9
  %187 = load double, ptr %34, align 8, !tbaa !9
  %188 = fadd double %187, %186
  store double %188, ptr %34, align 8, !tbaa !9
  %189 = load double, ptr %34, align 8, !tbaa !9
  %190 = load double, ptr %33, align 8, !tbaa !9
  %191 = fmul double %190, %189
  store double %191, ptr %33, align 8, !tbaa !9
  store double 0x3F57DBC8FEE08315, ptr %34, align 8, !tbaa !9
  %192 = load double, ptr %34, align 8, !tbaa !9
  %193 = load double, ptr %33, align 8, !tbaa !9
  %194 = fadd double %193, %192
  store double %194, ptr %33, align 8, !tbaa !9
  %195 = load double, ptr %33, align 8, !tbaa !9
  %196 = load double, ptr %32, align 8, !tbaa !9
  %197 = fmul double %196, %195
  store double %197, ptr %32, align 8, !tbaa !9
  store double 0x3F8226E3E96E8493, ptr %33, align 8, !tbaa !9
  %198 = load double, ptr %33, align 8, !tbaa !9
  %199 = load double, ptr %32, align 8, !tbaa !9
  %200 = fadd double %199, %198
  store double %200, ptr %32, align 8, !tbaa !9
  %201 = load double, ptr %32, align 8, !tbaa !9
  %202 = load double, ptr %31, align 8, !tbaa !9
  %203 = fmul double %202, %201
  store double %203, ptr %31, align 8, !tbaa !9
  store double 0x3FABA1BA1BB341FE, ptr %32, align 8, !tbaa !9
  %204 = load double, ptr %32, align 8, !tbaa !9
  %205 = load double, ptr %31, align 8, !tbaa !9
  %206 = fadd double %205, %204
  store double %206, ptr %31, align 8, !tbaa !9
  %207 = load double, ptr %31, align 8, !tbaa !9
  %208 = load double, ptr %30, align 8, !tbaa !9
  %209 = fmul double %208, %207
  store double %209, ptr %30, align 8, !tbaa !9
  %210 = load double, ptr %30, align 8, !tbaa !9
  %211 = load double, ptr %29, align 8, !tbaa !9
  %212 = fadd double %211, %210
  store double %212, ptr %29, align 8, !tbaa !9
  %213 = load double, ptr %29, align 8, !tbaa !9
  %214 = load double, ptr %28, align 8, !tbaa !9
  %215 = fmul double %214, %213
  store double %215, ptr %28, align 8, !tbaa !9
  %216 = load double, ptr %7, align 8, !tbaa !9
  store double %216, ptr %29, align 8, !tbaa !9
  %217 = load double, ptr %29, align 8, !tbaa !9
  %218 = load double, ptr %28, align 8, !tbaa !9
  %219 = fadd double %218, %217
  store double %219, ptr %28, align 8, !tbaa !9
  %220 = load double, ptr %28, align 8, !tbaa !9
  %221 = load double, ptr %27, align 8, !tbaa !9
  %222 = fmul double %221, %220
  store double %222, ptr %27, align 8, !tbaa !9
  %223 = load double, ptr %7, align 8, !tbaa !9
  store double %223, ptr %28, align 8, !tbaa !9
  %224 = load double, ptr %28, align 8, !tbaa !9
  %225 = load double, ptr %27, align 8, !tbaa !9
  %226 = fadd double %225, %224
  store double %226, ptr %27, align 8, !tbaa !9
  %227 = load double, ptr %27, align 8, !tbaa !9
  %228 = load double, ptr %26, align 8, !tbaa !9
  %229 = fadd double %228, %227
  store double %229, ptr %26, align 8, !tbaa !9
  %230 = load double, ptr %26, align 8, !tbaa !9
  store double %230, ptr %13, align 8, !tbaa !9
  %231 = load double, ptr %26, align 8, !tbaa !9
  %232 = load double, ptr %25, align 8, !tbaa !9
  %233 = fadd double %232, %231
  store double %233, ptr %25, align 8, !tbaa !9
  %234 = load double, ptr %25, align 8, !tbaa !9
  store double %234, ptr %7, align 8, !tbaa !9
  %235 = load i32, ptr %10, align 4, !tbaa !11
  store i32 %235, ptr %15, align 4, !tbaa !11
  %236 = load i32, ptr %15, align 4, !tbaa !11
  %237 = icmp ne i32 %236, 0
  %238 = xor i1 %237, true
  %239 = zext i1 %238 to i32
  store i32 %239, ptr %15, align 4, !tbaa !11
  %240 = load i32, ptr %15, align 4, !tbaa !11
  %241 = icmp ne i32 %240, 0
  br i1 %241, label %242, label %296

242:                                              ; preds = %113
  store i32 1, ptr %15, align 4, !tbaa !11
  %243 = load i32, ptr %8, align 4, !tbaa !11
  store i32 %243, ptr %16, align 4, !tbaa !11
  store i32 1, ptr %17, align 4, !tbaa !11
  %244 = load i32, ptr %17, align 4, !tbaa !11
  %245 = and i32 %244, 31
  %246 = load i32, ptr %16, align 4, !tbaa !11
  %247 = shl i32 %246, %245
  store i32 %247, ptr %16, align 4, !tbaa !11
  %248 = load i32, ptr %16, align 4, !tbaa !11
  %249 = load i32, ptr %15, align 4, !tbaa !11
  %250 = sub i32 %249, %248
  store i32 %250, ptr %15, align 4, !tbaa !11
  %251 = load i32, ptr %15, align 4, !tbaa !11
  %252 = sitofp i32 %251 to double
  store double %252, ptr %25, align 8, !tbaa !9
  %253 = load double, ptr %25, align 8, !tbaa !9
  store double %253, ptr %14, align 8, !tbaa !9
  %254 = load double, ptr %6, align 8, !tbaa !9
  store double %254, ptr %26, align 8, !tbaa !9
  %255 = load double, ptr %13, align 8, !tbaa !9
  store double %255, ptr %27, align 8, !tbaa !9
  %256 = load double, ptr %7, align 8, !tbaa !9
  store double %256, ptr %28, align 8, !tbaa !9
  %257 = load double, ptr %7, align 8, !tbaa !9
  store double %257, ptr %29, align 8, !tbaa !9
  %258 = load double, ptr %29, align 8, !tbaa !9
  %259 = load double, ptr %28, align 8, !tbaa !9
  %260 = fmul double %259, %258
  store double %260, ptr %28, align 8, !tbaa !9
  %261 = load double, ptr %7, align 8, !tbaa !9
  store double %261, ptr %29, align 8, !tbaa !9
  %262 = load double, ptr %14, align 8, !tbaa !9
  store double %262, ptr %30, align 8, !tbaa !9
  %263 = load double, ptr %30, align 8, !tbaa !9
  %264 = load double, ptr %29, align 8, !tbaa !9
  %265 = fadd double %264, %263
  store double %265, ptr %29, align 8, !tbaa !9
  %266 = load double, ptr %29, align 8, !tbaa !9
  %267 = load double, ptr %28, align 8, !tbaa !9
  %268 = fdiv double %267, %266
  store double %268, ptr %28, align 8, !tbaa !9
  %269 = load double, ptr %28, align 8, !tbaa !9
  %270 = load double, ptr %27, align 8, !tbaa !9
  %271 = fsub double %270, %269
  store double %271, ptr %27, align 8, !tbaa !9
  %272 = load double, ptr %27, align 8, !tbaa !9
  %273 = load double, ptr %26, align 8, !tbaa !9
  %274 = fadd double %273, %272
  store double %274, ptr %26, align 8, !tbaa !9
  %275 = load double, ptr %26, align 8, !tbaa !9
  store double %275, ptr %6, align 8, !tbaa !9
  %276 = load double, ptr %6, align 8, !tbaa !9
  store double %276, ptr %27, align 8, !tbaa !9
  %277 = load double, ptr %27, align 8, !tbaa !9
  %278 = load double, ptr %26, align 8, !tbaa !9
  %279 = fadd double %278, %277
  store double %279, ptr %26, align 8, !tbaa !9
  %280 = load double, ptr %26, align 8, !tbaa !9
  %281 = load double, ptr %25, align 8, !tbaa !9
  %282 = fsub double %281, %280
  store double %282, ptr %25, align 8, !tbaa !9
  %283 = load double, ptr %25, align 8, !tbaa !9
  store double %283, ptr %6, align 8, !tbaa !9
  %284 = load double, ptr %25, align 8, !tbaa !9
  %285 = fneg double %284
  store double %285, ptr %25, align 8, !tbaa !9
  %286 = load double, ptr %6, align 8, !tbaa !9
  store double %286, ptr %26, align 8, !tbaa !9
  %287 = load i32, ptr %9, align 4, !tbaa !11
  store i32 %287, ptr %17, align 4, !tbaa !11
  %288 = load i32, ptr %17, align 4, !tbaa !11
  %289 = icmp ne i32 %288, 0
  br i1 %289, label %290, label %292

290:                                              ; preds = %242
  %291 = load double, ptr %25, align 8, !tbaa !9
  br label %294

292:                                              ; preds = %242
  %293 = load double, ptr %26, align 8, !tbaa !9
  br label %294

294:                                              ; preds = %292, %290
  %295 = phi double [ %291, %290 ], [ %293, %292 ]
  store double %295, ptr %25, align 8, !tbaa !9
  br label %356

296:                                              ; preds = %113
  %297 = load i32, ptr %8, align 4, !tbaa !11
  store i32 %297, ptr %15, align 4, !tbaa !11
  %298 = load i32, ptr %15, align 4, !tbaa !11
  %299 = icmp ne i32 %298, 0
  br i1 %299, label %300, label %353

300:                                              ; preds = %296
  store double -1.000000e+00, ptr %25, align 8, !tbaa !9
  %301 = load double, ptr %7, align 8, !tbaa !9
  store double %301, ptr %26, align 8, !tbaa !9
  %302 = load double, ptr %26, align 8, !tbaa !9
  %303 = load double, ptr %25, align 8, !tbaa !9
  %304 = fdiv double %303, %302
  store double %304, ptr %25, align 8, !tbaa !9
  %305 = load double, ptr %25, align 8, !tbaa !9
  store double %305, ptr %14, align 8, !tbaa !9
  %306 = load double, ptr %14, align 8, !tbaa !9
  store double %306, ptr %26, align 8, !tbaa !9
  %307 = load double, ptr %26, align 8, !tbaa !9
  %308 = call i64 @i64_reinterpret_f64(double noundef %307)
  store i64 %308, ptr %21, align 8, !tbaa !13
  store i64 -4294967296, ptr %22, align 8, !tbaa !13
  %309 = load i64, ptr %22, align 8, !tbaa !13
  %310 = load i64, ptr %21, align 8, !tbaa !13
  %311 = and i64 %310, %309
  store i64 %311, ptr %21, align 8, !tbaa !13
  %312 = load i64, ptr %21, align 8, !tbaa !13
  %313 = call double @f64_reinterpret_i64(i64 noundef %312)
  store double %313, ptr %26, align 8, !tbaa !9
  %314 = load double, ptr %26, align 8, !tbaa !9
  store double %314, ptr %14, align 8, !tbaa !9
  %315 = load double, ptr %13, align 8, !tbaa !9
  store double %315, ptr %27, align 8, !tbaa !9
  %316 = load double, ptr %7, align 8, !tbaa !9
  store double %316, ptr %28, align 8, !tbaa !9
  %317 = load double, ptr %28, align 8, !tbaa !9
  %318 = call i64 @i64_reinterpret_f64(double noundef %317)
  store i64 %318, ptr %23, align 8, !tbaa !13
  store i64 -4294967296, ptr %24, align 8, !tbaa !13
  %319 = load i64, ptr %24, align 8, !tbaa !13
  %320 = load i64, ptr %23, align 8, !tbaa !13
  %321 = and i64 %320, %319
  store i64 %321, ptr %23, align 8, !tbaa !13
  %322 = load i64, ptr %23, align 8, !tbaa !13
  %323 = call double @f64_reinterpret_i64(i64 noundef %322)
  store double %323, ptr %28, align 8, !tbaa !9
  %324 = load double, ptr %28, align 8, !tbaa !9
  store double %324, ptr %7, align 8, !tbaa !9
  %325 = load double, ptr %6, align 8, !tbaa !9
  store double %325, ptr %29, align 8, !tbaa !9
  %326 = load double, ptr %29, align 8, !tbaa !9
  %327 = load double, ptr %28, align 8, !tbaa !9
  %328 = fsub double %327, %326
  store double %328, ptr %28, align 8, !tbaa !9
  %329 = load double, ptr %28, align 8, !tbaa !9
  %330 = load double, ptr %27, align 8, !tbaa !9
  %331 = fsub double %330, %329
  store double %331, ptr %27, align 8, !tbaa !9
  %332 = load double, ptr %27, align 8, !tbaa !9
  %333 = load double, ptr %26, align 8, !tbaa !9
  %334 = fmul double %333, %332
  store double %334, ptr %26, align 8, !tbaa !9
  %335 = load double, ptr %14, align 8, !tbaa !9
  store double %335, ptr %27, align 8, !tbaa !9
  %336 = load double, ptr %7, align 8, !tbaa !9
  store double %336, ptr %28, align 8, !tbaa !9
  %337 = load double, ptr %28, align 8, !tbaa !9
  %338 = load double, ptr %27, align 8, !tbaa !9
  %339 = fmul double %338, %337
  store double %339, ptr %27, align 8, !tbaa !9
  store double 1.000000e+00, ptr %28, align 8, !tbaa !9
  %340 = load double, ptr %28, align 8, !tbaa !9
  %341 = load double, ptr %27, align 8, !tbaa !9
  %342 = fadd double %341, %340
  store double %342, ptr %27, align 8, !tbaa !9
  %343 = load double, ptr %27, align 8, !tbaa !9
  %344 = load double, ptr %26, align 8, !tbaa !9
  %345 = fadd double %344, %343
  store double %345, ptr %26, align 8, !tbaa !9
  %346 = load double, ptr %26, align 8, !tbaa !9
  %347 = load double, ptr %25, align 8, !tbaa !9
  %348 = fmul double %347, %346
  store double %348, ptr %25, align 8, !tbaa !9
  %349 = load double, ptr %14, align 8, !tbaa !9
  store double %349, ptr %26, align 8, !tbaa !9
  %350 = load double, ptr %26, align 8, !tbaa !9
  %351 = load double, ptr %25, align 8, !tbaa !9
  %352 = fadd double %351, %350
  store double %352, ptr %25, align 8, !tbaa !9
  br label %355

353:                                              ; preds = %296
  %354 = load double, ptr %7, align 8, !tbaa !9
  store double %354, ptr %25, align 8, !tbaa !9
  br label %355

355:                                              ; preds = %353, %300
  br label %356

356:                                              ; preds = %355, %294
  %357 = load double, ptr %25, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %36) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %35) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %34) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %33) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret double %357
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_reinterpret_f64(double noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden double @f64_reinterpret_i64(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local double @w2c_hermes_0x5F_tan(ptr nocapture noundef readnone %0, double noundef %1, double noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = tail call i64 @i64_reinterpret_f64(double noundef %1)
  %6 = lshr i64 %5, 32
  %7 = trunc nuw i64 %6 to i32
  %8 = and i32 %7, 2147483640
  %9 = icmp ugt i32 %8, 1072010279
  br i1 %9, label %10, label %22

10:                                               ; preds = %4
  %11 = insertelement <2 x double> poison, double %1, i64 0
  %12 = insertelement <2 x double> %11, double %2, i64 1
  %13 = fneg <2 x double> %12
  %14 = icmp sgt i64 %5, -1
  %15 = insertelement <2 x i1> poison, i1 %14, i64 0
  %16 = shufflevector <2 x i1> %15, <2 x i1> poison, <2 x i32> zeroinitializer
  %17 = select <2 x i1> %16, <2 x double> %12, <2 x double> %13
  %18 = fsub <2 x double> <double 0x3FE921FB54442D18, double 0x3C81A62633145C07>, %17
  %shift = shufflevector <2 x double> %18, <2 x double> poison, <2 x i32> <i32 1, i32 poison>
  %19 = fadd <2 x double> %18, %shift
  %20 = extractelement <2 x double> %19, i64 0
  %21 = lshr i32 %7, 31
  br label %22

22:                                               ; preds = %10, %4
  %.0212 = phi i32 [ %21, %10 ], [ %7, %4 ]
  %.0211 = phi double [ 0.000000e+00, %10 ], [ %2, %4 ]
  %.0 = phi double [ %20, %10 ], [ %1, %4 ]
  %23 = fmul double %.0, %.0
  %24 = fmul double %.0, %23
  %25 = fmul double %24, 0x3FD5555555555563
  %26 = fmul double %23, %23
  %27 = fmul double %26, 0x3EF375CBDB605373
  %28 = fsub double 0x3F147E88A03792A6, %27
  %29 = fmul double %26, %28
  %30 = fadd double %29, 0x3F4344D8F2F26501
  %31 = fmul double %26, %30
  %32 = fadd double %31, 0x3F6D6D22C9560328
  %33 = fmul double %26, %32
  %34 = fadd double %33, 0x3F9664F48406D637
  %35 = fmul double %26, %34
  %36 = fadd double %35, 0x3FC111111110FE7A
  %37 = fmul double %26, 0x3EFB2A7074BF7AD4
  %38 = fadd double %37, 0x3F12B80F32F0A7E9
  %39 = fmul double %26, %38
  %40 = fadd double %39, 0x3F3026F71A8D1068
  %41 = fmul double %26, %40
  %42 = fadd double %41, 0x3F57DBC8FEE08315
  %43 = fmul double %26, %42
  %44 = fadd double %43, 0x3F8226E3E96E8493
  %45 = fmul double %26, %44
  %46 = fadd double %45, 0x3FABA1BA1BB341FE
  %47 = fmul double %23, %46
  %48 = fadd double %36, %47
  %49 = fmul double %24, %48
  %50 = fadd double %.0211, %49
  %51 = fmul double %23, %50
  %52 = fadd double %.0211, %51
  %53 = fadd double %25, %52
  %54 = fadd double %.0, %53
  br i1 %9, label %55, label %68

55:                                               ; preds = %22
  %56 = shl i32 %3, 1
  %57 = sub i32 1, %56
  %58 = sitofp i32 %57 to double
  %59 = fmul double %54, %54
  %60 = fadd double %54, %58
  %61 = fdiv double %59, %60
  %62 = fsub double %53, %61
  %63 = fadd double %.0, %62
  %64 = fadd double %63, %63
  %65 = fsub double %58, %64
  %66 = fneg double %65
  %.not214 = icmp eq i32 %.0212, 0
  %67 = select i1 %.not214, double %65, double %66
  br label %85

68:                                               ; preds = %22
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %85, label %69

69:                                               ; preds = %68
  %70 = fdiv double -1.000000e+00, %54
  %71 = tail call i64 @i64_reinterpret_f64(double noundef %70)
  %72 = and i64 %71, -4294967296
  %73 = tail call double @f64_reinterpret_i64(i64 noundef %72)
  %74 = tail call i64 @i64_reinterpret_f64(double noundef %54)
  %75 = and i64 %74, -4294967296
  %76 = tail call double @f64_reinterpret_i64(i64 noundef %75)
  %77 = fsub double %76, %.0
  %78 = fsub double %53, %77
  %79 = fmul double %73, %78
  %80 = fmul double %73, %76
  %81 = fadd double %80, 1.000000e+00
  %82 = fadd double %81, %79
  %83 = fmul double %70, %82
  %84 = fadd double %73, %83
  br label %85

85:                                               ; preds = %68, %69, %55
  %.0213 = phi double [ %67, %55 ], [ %84, %69 ], [ %54, %68 ]
  ret double %.0213
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass,VectorCombinePass