; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_6)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_shl(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %14 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %14, ptr %9, align 4, !tbaa !9
  store i32 31, ptr %10, align 4, !tbaa !9
  %15 = load i32, ptr %9, align 4, !tbaa !9
  %16 = load i32, ptr %10, align 4, !tbaa !9
  %17 = icmp ule i32 %15, %16
  %18 = zext i1 %17 to i32
  store i32 %18, ptr %9, align 4, !tbaa !9
  %19 = load i32, ptr %9, align 4, !tbaa !9
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %33

21:                                               ; preds = %3
  %22 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %22, ptr %9, align 4, !tbaa !9
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.w2c_hermes, ptr %23, i32 0, i32 6
  %25 = load i32, ptr %9, align 4, !tbaa !9
  %26 = zext i32 %25 to i64
  %27 = call i32 @i32_load(ptr noundef %24, i64 noundef %26)
  store i32 %27, ptr %9, align 4, !tbaa !9
  %28 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %28, ptr %7, align 4, !tbaa !9
  %29 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %29, ptr %9, align 4, !tbaa !9
  store i32 4, ptr %10, align 4, !tbaa !9
  %30 = load i32, ptr %10, align 4, !tbaa !9
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = add i32 %31, %30
  store i32 %32, ptr %9, align 4, !tbaa !9
  br label %40

33:                                               ; preds = %3
  %34 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %34, ptr %9, align 4, !tbaa !9
  store i32 32, ptr %10, align 4, !tbaa !9
  %35 = load i32, ptr %10, align 4, !tbaa !9
  %36 = load i32, ptr %9, align 4, !tbaa !9
  %37 = sub i32 %36, %35
  store i32 %37, ptr %9, align 4, !tbaa !9
  %38 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %38, ptr %6, align 4, !tbaa !9
  %39 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %39, ptr %9, align 4, !tbaa !9
  br label %40

40:                                               ; preds = %33, %21
  %41 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %41, ptr %8, align 4, !tbaa !9
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.w2c_hermes, ptr %42, i32 0, i32 6
  %44 = load i32, ptr %9, align 4, !tbaa !9
  %45 = zext i32 %44 to i64
  %46 = call i32 @i32_load(ptr noundef %43, i64 noundef %45)
  store i32 %46, ptr %9, align 4, !tbaa !9
  %47 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %47, ptr %8, align 4, !tbaa !9
  %48 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %48, ptr %9, align 4, !tbaa !9
  %49 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %49, ptr %10, align 4, !tbaa !9
  %50 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %50, ptr %11, align 4, !tbaa !9
  %51 = load i32, ptr %11, align 4, !tbaa !9
  %52 = and i32 %51, 31
  %53 = load i32, ptr %10, align 4, !tbaa !9
  %54 = shl i32 %53, %52
  store i32 %54, ptr %10, align 4, !tbaa !9
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.w2c_hermes, ptr %55, i32 0, i32 6
  %57 = load i32, ptr %9, align 4, !tbaa !9
  %58 = zext i32 %57 to i64
  %59 = load i32, ptr %10, align 4, !tbaa !9
  call void @i32_store(ptr noundef %56, i64 noundef %58, i32 noundef %59)
  %60 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %60, ptr %9, align 4, !tbaa !9
  %61 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %61, ptr %10, align 4, !tbaa !9
  %62 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %62, ptr %11, align 4, !tbaa !9
  %63 = load i32, ptr %11, align 4, !tbaa !9
  %64 = and i32 %63, 31
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = shl i32 %65, %64
  store i32 %66, ptr %10, align 4, !tbaa !9
  %67 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %67, ptr %11, align 4, !tbaa !9
  store i32 32, ptr %12, align 4, !tbaa !9
  %68 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %68, ptr %13, align 4, !tbaa !9
  %69 = load i32, ptr %13, align 4, !tbaa !9
  %70 = load i32, ptr %12, align 4, !tbaa !9
  %71 = sub i32 %70, %69
  store i32 %71, ptr %12, align 4, !tbaa !9
  %72 = load i32, ptr %12, align 4, !tbaa !9
  %73 = and i32 %72, 31
  %74 = load i32, ptr %11, align 4, !tbaa !9
  %75 = lshr i32 %74, %73
  store i32 %75, ptr %11, align 4, !tbaa !9
  %76 = load i32, ptr %11, align 4, !tbaa !9
  %77 = load i32, ptr %10, align 4, !tbaa !9
  %78 = or i32 %77, %76
  store i32 %78, ptr %10, align 4, !tbaa !9
  %79 = load ptr, ptr %4, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.w2c_hermes, ptr %79, i32 0, i32 6
  %81 = load i32, ptr %9, align 4, !tbaa !9
  %82 = zext i32 %81 to i64
  %83 = add i64 %82, 4
  %84 = load i32, ptr %10, align 4, !tbaa !9
  call void @i32_store(ptr noundef %80, i64 noundef %83, i32 noundef %84)
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_shl(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = icmp ult i32 %2, 32
  %5 = zext i32 %1 to i64
  br i1 %4, label %6, label %10

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = tail call i32 @i32_load(ptr noundef nonnull %7, i64 noundef %5)
  %9 = add i32 %1, 4
  %.pre46 = zext i32 %9 to i64
  br label %12

10:                                               ; preds = %3
  %11 = add i32 %2, -32
  br label %12

12:                                               ; preds = %10, %6
  %.pre-phi47 = phi i64 [ %5, %10 ], [ %.pre46, %6 ]
  %.043 = phi i32 [ 0, %10 ], [ %8, %6 ]
  %.0 = phi i32 [ %11, %10 ], [ %2, %6 ]
  %13 = getelementptr inbounds i8, ptr %0, i64 40
  %14 = tail call i32 @i32_load(ptr noundef nonnull %13, i64 noundef %.pre-phi47)
  %15 = and i32 %.0, 31
  %16 = shl i32 %.043, %15
  tail call void @i32_store(ptr noundef nonnull %13, i64 noundef %5, i32 noundef %16)
  %17 = shl i32 %14, %15
  %18 = sub i32 0, %.0
  %19 = and i32 %18, 31
  %20 = lshr i32 %.043, %19
  %21 = or i32 %17, %20
  %22 = add nuw nsw i64 %5, 4
  tail call void @i32_store(ptr noundef nonnull %13, i64 noundef %22, i32 noundef %21)
  ret void
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass