; LLVM IR from DionysiosB/CodeForces :: 0800-0899 (878A-ShortProgram)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca [10 x i32], align 16
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 10, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %16 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %3)
  call void @llvm.lifetime.start.p0(i64 40, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %25, %0
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = icmp slt i32 %18, 10
  br i1 %19, label %21, label %20

20:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %28

21:                                               ; preds = %17
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %23
  store i32 -1, ptr %24, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %21
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = add nsw i32 %26, 1
  store i32 %27, ptr %5, align 4, !tbaa !5
  br label %17, !llvm.loop !9

28:                                               ; preds = %20
  br label %29

29:                                               ; preds = %89, %28
  %30 = load i64, ptr %3, align 8, !tbaa !11
  %31 = add nsw i64 %30, -1
  store i64 %31, ptr %3, align 8, !tbaa !11
  %32 = icmp ne i64 %30, 0
  br i1 %32, label %33, label %90

33:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %34 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str.1, ptr noundef %6, ptr noundef %7)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %86, %33
  %36 = load i32, ptr %8, align 4, !tbaa !5
  %37 = icmp slt i32 %36, 10
  br i1 %37, label %39, label %38

38:                                               ; preds = %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %89

39:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = and i32 %40, 1
  %42 = icmp ne i32 %41, 0
  %43 = zext i1 %42 to i8
  store i8 %43, ptr %9, align 1, !tbaa !13
  %44 = load i8, ptr %6, align 1, !tbaa !15
  %45 = sext i8 %44 to i32
  %46 = icmp eq i32 %45, 38
  br i1 %46, label %47, label %54

47:                                               ; preds = %39
  %48 = load i8, ptr %9, align 1, !tbaa !13, !range !16, !noundef !17
  %49 = trunc i8 %48 to i1
  br i1 %49, label %54, label %50

50:                                               ; preds = %47
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %52
  store i32 0, ptr %53, align 4, !tbaa !5
  br label %83

54:                                               ; preds = %47, %39
  %55 = load i8, ptr %6, align 1, !tbaa !15
  %56 = sext i8 %55 to i32
  %57 = icmp eq i32 %56, 124
  br i1 %57, label %58, label %65

58:                                               ; preds = %54
  %59 = load i8, ptr %9, align 1, !tbaa !13, !range !16, !noundef !17
  %60 = trunc i8 %59 to i1
  br i1 %60, label %61, label %65

61:                                               ; preds = %58
  %62 = load i32, ptr %8, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %63
  store i32 1, ptr %64, align 4, !tbaa !5
  br label %82

65:                                               ; preds = %58, %54
  %66 = load i8, ptr %6, align 1, !tbaa !15
  %67 = sext i8 %66 to i32
  %68 = icmp eq i32 %67, 94
  br i1 %68, label %69, label %81

69:                                               ; preds = %65
  %70 = load i8, ptr %9, align 1, !tbaa !13, !range !16, !noundef !17
  %71 = trunc i8 %70 to i1
  br i1 %71, label %72, label %81

72:                                               ; preds = %69
  %73 = load i32, ptr %8, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %74
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = sub nsw i32 1, %76
  %78 = load i32, ptr %8, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %79
  store i32 %77, ptr %80, align 4, !tbaa !5
  br label %81

81:                                               ; preds = %72, %69, %65
  br label %82

82:                                               ; preds = %81, %61
  br label %83

83:                                               ; preds = %82, %50
  %84 = load i32, ptr %7, align 4, !tbaa !5
  %85 = sdiv i32 %84, 2
  store i32 %85, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  br label %86

86:                                               ; preds = %83
  %87 = load i32, ptr %8, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %8, align 4, !tbaa !5
  br label %35, !llvm.loop !18

89:                                               ; preds = %38
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  br label %29, !llvm.loop !19

90:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 9, ptr %11, align 4, !tbaa !5
  br label %91

91:                                               ; preds = %107, %90
  %92 = load i32, ptr %11, align 4, !tbaa !5
  %93 = icmp sge i32 %92, 0
  br i1 %93, label %95, label %94

94:                                               ; preds = %91
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %110

95:                                               ; preds = %91
  %96 = load i32, ptr %10, align 4, !tbaa !5
  %97 = mul nsw i32 %96, 2
  store i32 %97, ptr %10, align 4, !tbaa !5
  %98 = load i32, ptr %11, align 4, !tbaa !5
  %99 = sext i32 %98 to i64
  %100 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %99
  %101 = load i32, ptr %100, align 4, !tbaa !5
  %102 = icmp eq i32 %101, 0
  %103 = zext i1 %102 to i32
  %104 = sub nsw i32 1, %103
  %105 = load i32, ptr %10, align 4, !tbaa !5
  %106 = add nsw i32 %105, %104
  store i32 %106, ptr %10, align 4, !tbaa !5
  br label %107

107:                                              ; preds = %95
  %108 = load i32, ptr %11, align 4, !tbaa !5
  %109 = add nsw i32 %108, -1
  store i32 %109, ptr %11, align 4, !tbaa !5
  br label %91, !llvm.loop !20

110:                                              ; preds = %94
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 9, ptr %13, align 4, !tbaa !5
  br label %111

111:                                              ; preds = %126, %110
  %112 = load i32, ptr %13, align 4, !tbaa !5
  %113 = icmp sge i32 %112, 0
  br i1 %113, label %115, label %114

114:                                              ; preds = %111
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %129

115:                                              ; preds = %111
  %116 = load i32, ptr %12, align 4, !tbaa !5
  %117 = mul nsw i32 %116, 2
  store i32 %117, ptr %12, align 4, !tbaa !5
  %118 = load i32, ptr %13, align 4, !tbaa !5
  %119 = sext i32 %118 to i64
  %120 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %119
  %121 = load i32, ptr %120, align 4, !tbaa !5
  %122 = icmp eq i32 %121, 1
  %123 = zext i1 %122 to i32
  %124 = load i32, ptr %12, align 4, !tbaa !5
  %125 = add nsw i32 %124, %123
  store i32 %125, ptr %12, align 4, !tbaa !5
  br label %126

126:                                              ; preds = %115
  %127 = load i32, ptr %13, align 4, !tbaa !5
  %128 = add nsw i32 %127, -1
  store i32 %128, ptr %13, align 4, !tbaa !5
  br label %111, !llvm.loop !21

129:                                              ; preds = %114
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 9, ptr %15, align 4, !tbaa !5
  br label %130

130:                                              ; preds = %145, %129
  %131 = load i32, ptr %15, align 4, !tbaa !5
  %132 = icmp sge i32 %131, 0
  br i1 %132, label %134, label %133

133:                                              ; preds = %130
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %148

134:                                              ; preds = %130
  %135 = load i32, ptr %14, align 4, !tbaa !5
  %136 = mul nsw i32 %135, 2
  store i32 %136, ptr %14, align 4, !tbaa !5
  %137 = load i32, ptr %15, align 4, !tbaa !5
  %138 = sext i32 %137 to i64
  %139 = getelementptr inbounds [10 x i32], ptr %4, i64 0, i64 %138
  %140 = load i32, ptr %139, align 4, !tbaa !5
  %141 = icmp eq i32 %140, 2
  %142 = zext i1 %141 to i32
  %143 = load i32, ptr %14, align 4, !tbaa !5
  %144 = add nsw i32 %143, %142
  store i32 %144, ptr %14, align 4, !tbaa !5
  br label %145

145:                                              ; preds = %134
  %146 = load i32, ptr %15, align 4, !tbaa !5
  %147 = add nsw i32 %146, -1
  store i32 %147, ptr %15, align 4, !tbaa !5
  br label %130, !llvm.loop !22

148:                                              ; preds = %133
  %149 = load i32, ptr %10, align 4, !tbaa !5
  %150 = load i32, ptr %12, align 4, !tbaa !5
  %151 = load i32, ptr %14, align 4, !tbaa !5
  %152 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef %149, i32 noundef %150, i32 noundef %151)
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @printf(ptr noundef, ...) #2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = distinct !{!18, !10}
!19 = distinct !{!19, !10}
!20 = distinct !{!20, !10}
!21 = distinct !{!21, !10}
!22 = distinct !{!22, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [7 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: mustprogress nofree norecurse nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
.preheader46:
  %0 = alloca i64, align 8
  %1 = alloca i8, align 1
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %0) #3
  %3 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %0)
  %4 = load i64, ptr %0, align 8, !tbaa !5
  %5 = add nsw i64 %4, -1
  store i64 %5, ptr %0, align 8, !tbaa !5
  %.not58 = icmp eq i64 %4, 0
  br i1 %.not58, label %.thread235, label %.lr.ph

.preheader45:                                     ; preds = %.split50.us
  %.not157 = icmp eq i32 %.sroa.111.4.fr, 0
  %spec.select = select i1 %.not157, i32 0, i32 2
  %6 = icmp ne i32 %.sroa.99.4, 0
  %7 = zext i1 %6 to i32
  %8 = or disjoint i32 %spec.select, %7
  %.not158 = icmp eq i32 %.sroa.87.4.fr, 0
  %9 = shl nuw nsw i32 %8, 2
  %10 = select i1 %.not158, i32 0, i32 2
  %11 = or disjoint i32 %9, %10
  %12 = icmp ne i32 %.sroa.75.4, 0
  %13 = zext i1 %12 to i32
  %14 = or disjoint i32 %11, %13
  %.not159 = icmp eq i32 %.sroa.63.4.fr, 0
  %15 = shl nuw nsw i32 %14, 2
  %16 = select i1 %.not159, i32 0, i32 2
  %17 = or disjoint i32 %15, %16
  %18 = icmp ne i32 %.sroa.51.4, 0
  %19 = zext i1 %18 to i32
  %20 = or disjoint i32 %17, %19
  %.not160 = icmp eq i32 %.sroa.39.4.fr, 0
  %21 = shl nuw nsw i32 %20, 2
  %spec.select426 = select i1 %.not160, i32 0, i32 2
  %22 = or disjoint i32 %21, %spec.select426
  br label %.thread235

.thread235:                                       ; preds = %.preheader45, %.preheader46
  %.sroa.0.0180211225257 = phi i32 [ -1, %.preheader46 ], [ %.sroa.0.4, %.preheader45 ]
  %.sroa.15.0181210226256 = phi i32 [ -1, %.preheader46 ], [ %179, %.preheader45 ]
  %.sroa.27.0182209227255 = phi i32 [ -1, %.preheader46 ], [ %.sroa.27.4, %.preheader45 ]
  %.sroa.39.0183208228254 = phi i32 [ -1, %.preheader46 ], [ %.sroa.39.4.fr, %.preheader45 ]
  %.sroa.51.0184207229253 = phi i32 [ -1, %.preheader46 ], [ %.sroa.51.4, %.preheader45 ]
  %.sroa.63.0185206230252 = phi i32 [ -1, %.preheader46 ], [ %.sroa.63.4.fr, %.preheader45 ]
  %.sroa.75.0186205231251 = phi i32 [ -1, %.preheader46 ], [ %.sroa.75.4, %.preheader45 ]
  %.sroa.87.0187204232250 = phi i32 [ -1, %.preheader46 ], [ %.sroa.87.4.fr, %.preheader45 ]
  %.sroa.99.0188203233249 = phi i32 [ -1, %.preheader46 ], [ %.sroa.99.4, %.preheader45 ]
  %.sroa.111.0189202234248 = phi i32 [ -1, %.preheader46 ], [ %.sroa.111.4.fr, %.preheader45 ]
  %23 = phi i32 [ 254, %.preheader46 ], [ %22, %.preheader45 ]
  %24 = icmp ne i32 %.sroa.27.0182209227255, 0
  %25 = zext i1 %24 to i32
  %26 = or disjoint i32 %23, %25
  %.not161 = icmp eq i32 %.sroa.15.0181210226256, 0
  %27 = icmp ne i32 %.sroa.0.0180211225257, 0
  %28 = zext i1 %27 to i32
  %29 = icmp eq i32 %.sroa.111.0189202234248, 1
  %spec.select423 = select i1 %29, i32 2, i32 0
  %30 = icmp eq i32 %.sroa.99.0188203233249, 1
  %31 = zext i1 %30 to i32
  %32 = or disjoint i32 %spec.select423, %31
  %33 = icmp eq i32 %.sroa.87.0187204232250, 1
  %34 = shl nuw nsw i32 %32, 2
  %35 = select i1 %33, i32 2, i32 0
  %36 = or disjoint i32 %34, %35
  %37 = icmp eq i32 %.sroa.75.0186205231251, 1
  %38 = zext i1 %37 to i32
  %39 = or disjoint i32 %36, %38
  %40 = icmp eq i32 %.sroa.63.0185206230252, 1
  %41 = shl nuw nsw i32 %39, 2
  %42 = select i1 %40, i32 2, i32 0
  %43 = or disjoint i32 %41, %42
  %44 = icmp eq i32 %.sroa.51.0184207229253, 1
  %45 = zext i1 %44 to i32
  %46 = or disjoint i32 %43, %45
  %47 = icmp eq i32 %.sroa.39.0183208228254, 1
  %48 = shl nuw nsw i32 %46, 2
  %49 = select i1 %47, i32 2, i32 0
  %50 = or disjoint i32 %48, %49
  %51 = icmp eq i32 %.sroa.27.0182209227255, 1
  %52 = zext i1 %51 to i32
  %53 = or disjoint i32 %50, %52
  %54 = icmp eq i32 %.sroa.15.0181210226256, 1
  %55 = icmp eq i32 %.sroa.0.0180211225257, 1
  %56 = zext i1 %55 to i32
  %57 = shl nuw nsw i32 %26, 2
  %58 = select i1 %.not161, i32 0, i32 2
  %59 = or disjoint i32 %57, %58
  %60 = icmp eq i32 %.sroa.111.0189202234248, 2
  %61 = select i1 %60, i32 2, i32 0
  %62 = icmp eq i32 %.sroa.99.0188203233249, 2
  %63 = zext i1 %62 to i32
  %64 = or disjoint i32 %61, %63
  %65 = icmp eq i32 %.sroa.87.0187204232250, 2
  %66 = shl nuw nsw i32 %64, 2
  %67 = select i1 %65, i32 2, i32 0
  %68 = or disjoint i32 %66, %67
  %69 = icmp eq i32 %.sroa.75.0186205231251, 2
  %70 = zext i1 %69 to i32
  %71 = or disjoint i32 %68, %70
  %72 = icmp eq i32 %.sroa.63.0185206230252, 2
  %73 = shl nuw nsw i32 %71, 2
  %74 = select i1 %72, i32 2, i32 0
  %75 = or disjoint i32 %73, %74
  %76 = icmp eq i32 %.sroa.51.0184207229253, 2
  %77 = zext i1 %76 to i32
  %78 = or disjoint i32 %75, %77
  %79 = icmp eq i32 %.sroa.39.0183208228254, 2
  %80 = shl nuw nsw i32 %78, 2
  %81 = select i1 %79, i32 2, i32 0
  %82 = or disjoint i32 %80, %81
  %83 = icmp eq i32 %.sroa.27.0182209227255, 2
  %84 = zext i1 %83 to i32
  %85 = or disjoint i32 %82, %84
  %86 = icmp eq i32 %.sroa.15.0181210226256, 2
  %87 = shl nuw nsw i32 %85, 2
  %88 = select i1 %86, i32 2, i32 0
  %89 = or disjoint i32 %87, %88
  %90 = icmp eq i32 %.sroa.0.0180211225257, 2
  %91 = zext i1 %90 to i32
  %92 = or disjoint i32 %89, %91
  %93 = shl nuw nsw i32 %53, 2
  %94 = select i1 %54, i32 2, i32 0
  %95 = or disjoint i32 %93, %94
  %96 = or disjoint i32 %95, %56
  %97 = or disjoint i32 %59, %28
  %98 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef %97, i32 noundef %96, i32 noundef %92)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %0) #3
  ret i32 0

.lr.ph:                                           ; preds = %.preheader46, %.split50.us
  %.sroa.0.1 = phi i32 [ %.sroa.0.4, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.15.1 = phi i32 [ %179, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.27.1 = phi i32 [ %.sroa.27.4, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.39.1 = phi i32 [ %.sroa.39.4.fr, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.51.1 = phi i32 [ %.sroa.51.4, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.63.1 = phi i32 [ %.sroa.63.4.fr, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.75.1 = phi i32 [ %.sroa.75.4, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.87.1 = phi i32 [ %.sroa.87.4.fr, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.99.1 = phi i32 [ %.sroa.99.4, %.split50.us ], [ -1, %.preheader46 ]
  %.sroa.111.1 = phi i32 [ %.sroa.111.4.fr, %.split50.us ], [ -1, %.preheader46 ]
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  %99 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str.1, ptr noundef nonnull %1, ptr noundef nonnull %2)
  %100 = load i8, ptr %1, align 1, !tbaa !9
  %.fr65 = freeze i8 %100
  %101 = icmp eq i8 %.fr65, 38
  %.promoted = load i32, ptr %2, align 4, !tbaa !10
  %102 = icmp ne i8 %.fr65, 124
  %.not66 = icmp eq i8 %.fr65, 94
  %103 = and i32 %.promoted, 1
  %.not37.us52 = icmp eq i32 %103, 0
  br i1 %.not66, label %150, label %.split.us.preheader

.split.us.preheader:                              ; preds = %.lr.ph
  %brmerge.not.us = select i1 %101, i1 %.not37.us52, i1 false
  br i1 %brmerge.not.us, label %.split.us.1, label %104

104:                                              ; preds = %.split.us.preheader
  %brmerge40.us = select i1 %102, i1 true, i1 %.not37.us52
  br i1 %brmerge40.us, label %.split.us.1, label %.split.us.1.thread

.split.us.1.thread:                               ; preds = %104
  %105 = sdiv i32 %.promoted, 2
  %106 = and i32 %105, 1
  %.not37.us.1262 = icmp eq i32 %106, 0
  br label %109

.split.us.1:                                      ; preds = %.split.us.preheader, %104
  %.sroa.0.2 = phi i32 [ %.sroa.0.1, %104 ], [ 0, %.split.us.preheader ]
  %107 = sdiv i32 %.promoted, 2
  %108 = and i32 %107, 1
  %.not37.us.1 = icmp eq i32 %108, 0
  %brmerge.not.us.1 = select i1 %101, i1 %.not37.us.1, i1 false
  br i1 %brmerge.not.us.1, label %.split.us.2, label %109

109:                                              ; preds = %.split.us.1.thread, %.split.us.1
  %.not37.us.1266 = phi i1 [ %.not37.us.1262, %.split.us.1.thread ], [ %.not37.us.1, %.split.us.1 ]
  %.sroa.0.2265 = phi i32 [ 1, %.split.us.1.thread ], [ %.sroa.0.2, %.split.us.1 ]
  %brmerge40.us.1 = select i1 %102, i1 true, i1 %.not37.us.1266
  br i1 %brmerge40.us.1, label %.split.us.2, label %.split.us.2.thread

.split.us.2.thread:                               ; preds = %109
  %110 = sdiv i32 %.promoted, 4
  %111 = and i32 %110, 1
  %.not37.us.2269 = icmp eq i32 %111, 0
  br label %114

.split.us.2:                                      ; preds = %.split.us.1, %109
  %.sroa.0.2264 = phi i32 [ %.sroa.0.2265, %109 ], [ %.sroa.0.2, %.split.us.1 ]
  %.sroa.15.2 = phi i32 [ %.sroa.15.1, %109 ], [ 0, %.split.us.1 ]
  %112 = sdiv i32 %.promoted, 4
  %113 = and i32 %112, 1
  %.not37.us.2 = icmp eq i32 %113, 0
  %brmerge.not.us.2 = select i1 %101, i1 %.not37.us.2, i1 false
  br i1 %brmerge.not.us.2, label %.split.us.3, label %114

114:                                              ; preds = %.split.us.2.thread, %.split.us.2
  %.not37.us.2275 = phi i1 [ %.not37.us.2269, %.split.us.2.thread ], [ %.not37.us.2, %.split.us.2 ]
  %.sroa.15.2274 = phi i32 [ 1, %.split.us.2.thread ], [ %.sroa.15.2, %.split.us.2 ]
  %.sroa.0.2264272 = phi i32 [ %.sroa.0.2265, %.split.us.2.thread ], [ %.sroa.0.2264, %.split.us.2 ]
  %brmerge40.us.2 = select i1 %102, i1 true, i1 %.not37.us.2275
  br i1 %brmerge40.us.2, label %.split.us.3, label %.split.us.3.thread

.split.us.3.thread:                               ; preds = %114
  %115 = sdiv i32 %.promoted, 8
  %116 = and i32 %115, 1
  %.not37.us.3279 = icmp eq i32 %116, 0
  br label %119

.split.us.3:                                      ; preds = %.split.us.2, %114
  %.sroa.15.2273 = phi i32 [ %.sroa.15.2274, %114 ], [ %.sroa.15.2, %.split.us.2 ]
  %.sroa.0.2264271 = phi i32 [ %.sroa.0.2264272, %114 ], [ %.sroa.0.2264, %.split.us.2 ]
  %.sroa.27.2 = phi i32 [ %.sroa.27.1, %114 ], [ 0, %.split.us.2 ]
  %117 = sdiv i32 %.promoted, 8
  %118 = and i32 %117, 1
  %.not37.us.3 = icmp eq i32 %118, 0
  %brmerge.not.us.3 = select i1 %101, i1 %.not37.us.3, i1 false
  br i1 %brmerge.not.us.3, label %.split.us.4, label %119

119:                                              ; preds = %.split.us.3.thread, %.split.us.3
  %.not37.us.3287 = phi i1 [ %.not37.us.3279, %.split.us.3.thread ], [ %.not37.us.3, %.split.us.3 ]
  %.sroa.27.2286 = phi i32 [ 1, %.split.us.3.thread ], [ %.sroa.27.2, %.split.us.3 ]
  %.sroa.0.2264271284 = phi i32 [ %.sroa.0.2264272, %.split.us.3.thread ], [ %.sroa.0.2264271, %.split.us.3 ]
  %.sroa.15.2273282 = phi i32 [ %.sroa.15.2274, %.split.us.3.thread ], [ %.sroa.15.2273, %.split.us.3 ]
  %brmerge40.us.3 = select i1 %102, i1 true, i1 %.not37.us.3287
  br i1 %brmerge40.us.3, label %.split.us.4, label %.split.us.4.thread

.split.us.4.thread:                               ; preds = %119
  %120 = sdiv i32 %.promoted, 16
  %121 = and i32 %120, 1
  %.not37.us.4292 = icmp eq i32 %121, 0
  br label %124

.split.us.4:                                      ; preds = %.split.us.3, %119
  %.sroa.27.2285 = phi i32 [ %.sroa.27.2286, %119 ], [ %.sroa.27.2, %.split.us.3 ]
  %.sroa.0.2264271283 = phi i32 [ %.sroa.0.2264271284, %119 ], [ %.sroa.0.2264271, %.split.us.3 ]
  %.sroa.15.2273281 = phi i32 [ %.sroa.15.2273282, %119 ], [ %.sroa.15.2273, %.split.us.3 ]
  %.sroa.39.2 = phi i32 [ %.sroa.39.1, %119 ], [ 0, %.split.us.3 ]
  %122 = sdiv i32 %.promoted, 16
  %123 = and i32 %122, 1
  %.not37.us.4 = icmp eq i32 %123, 0
  %brmerge.not.us.4 = select i1 %101, i1 %.not37.us.4, i1 false
  br i1 %brmerge.not.us.4, label %.split.us.5, label %124

124:                                              ; preds = %.split.us.4.thread, %.split.us.4
  %.not37.us.4302 = phi i1 [ %.not37.us.4292, %.split.us.4.thread ], [ %.not37.us.4, %.split.us.4 ]
  %.sroa.39.2301 = phi i32 [ 1, %.split.us.4.thread ], [ %.sroa.39.2, %.split.us.4 ]
  %.sroa.15.2273281299 = phi i32 [ %.sroa.15.2273282, %.split.us.4.thread ], [ %.sroa.15.2273281, %.split.us.4 ]
  %.sroa.0.2264271283297 = phi i32 [ %.sroa.0.2264271284, %.split.us.4.thread ], [ %.sroa.0.2264271283, %.split.us.4 ]
  %.sroa.27.2285295 = phi i32 [ %.sroa.27.2286, %.split.us.4.thread ], [ %.sroa.27.2285, %.split.us.4 ]
  %brmerge40.us.4 = select i1 %102, i1 true, i1 %.not37.us.4302
  br i1 %brmerge40.us.4, label %.split.us.5, label %.split.us.5.thread

.split.us.5.thread:                               ; preds = %124
  %125 = sdiv i32 %.promoted, 32
  %126 = and i32 %125, 1
  %.not37.us.5308 = icmp eq i32 %126, 0
  br label %129

.split.us.5:                                      ; preds = %.split.us.4, %124
  %.sroa.39.2300 = phi i32 [ %.sroa.39.2301, %124 ], [ %.sroa.39.2, %.split.us.4 ]
  %.sroa.15.2273281298 = phi i32 [ %.sroa.15.2273281299, %124 ], [ %.sroa.15.2273281, %.split.us.4 ]
  %.sroa.0.2264271283296 = phi i32 [ %.sroa.0.2264271283297, %124 ], [ %.sroa.0.2264271283, %.split.us.4 ]
  %.sroa.27.2285294 = phi i32 [ %.sroa.27.2285295, %124 ], [ %.sroa.27.2285, %.split.us.4 ]
  %.sroa.51.2 = phi i32 [ %.sroa.51.1, %124 ], [ 0, %.split.us.4 ]
  %127 = sdiv i32 %.promoted, 32
  %128 = and i32 %127, 1
  %.not37.us.5 = icmp eq i32 %128, 0
  %brmerge.not.us.5 = select i1 %101, i1 %.not37.us.5, i1 false
  br i1 %brmerge.not.us.5, label %.split.us.6, label %129

129:                                              ; preds = %.split.us.5.thread, %.split.us.5
  %.not37.us.5320 = phi i1 [ %.not37.us.5308, %.split.us.5.thread ], [ %.not37.us.5, %.split.us.5 ]
  %.sroa.51.2319 = phi i32 [ 1, %.split.us.5.thread ], [ %.sroa.51.2, %.split.us.5 ]
  %.sroa.27.2285294317 = phi i32 [ %.sroa.27.2285295, %.split.us.5.thread ], [ %.sroa.27.2285294, %.split.us.5 ]
  %.sroa.0.2264271283296315 = phi i32 [ %.sroa.0.2264271283297, %.split.us.5.thread ], [ %.sroa.0.2264271283296, %.split.us.5 ]
  %.sroa.15.2273281298313 = phi i32 [ %.sroa.15.2273281299, %.split.us.5.thread ], [ %.sroa.15.2273281298, %.split.us.5 ]
  %.sroa.39.2300311 = phi i32 [ %.sroa.39.2301, %.split.us.5.thread ], [ %.sroa.39.2300, %.split.us.5 ]
  %brmerge40.us.5 = select i1 %102, i1 true, i1 %.not37.us.5320
  br i1 %brmerge40.us.5, label %.split.us.6, label %.split.us.6.thread

.split.us.6.thread:                               ; preds = %129
  %130 = sdiv i32 %.promoted, 64
  %131 = and i32 %130, 1
  %.not37.us.6327 = icmp eq i32 %131, 0
  br label %134

.split.us.6:                                      ; preds = %.split.us.5, %129
  %.sroa.51.2318 = phi i32 [ %.sroa.51.2319, %129 ], [ %.sroa.51.2, %.split.us.5 ]
  %.sroa.27.2285294316 = phi i32 [ %.sroa.27.2285294317, %129 ], [ %.sroa.27.2285294, %.split.us.5 ]
  %.sroa.0.2264271283296314 = phi i32 [ %.sroa.0.2264271283296315, %129 ], [ %.sroa.0.2264271283296, %.split.us.5 ]
  %.sroa.15.2273281298312 = phi i32 [ %.sroa.15.2273281298313, %129 ], [ %.sroa.15.2273281298, %.split.us.5 ]
  %.sroa.39.2300310 = phi i32 [ %.sroa.39.2300311, %129 ], [ %.sroa.39.2300, %.split.us.5 ]
  %.sroa.63.2 = phi i32 [ %.sroa.63.1, %129 ], [ 0, %.split.us.5 ]
  %132 = sdiv i32 %.promoted, 64
  %133 = and i32 %132, 1
  %.not37.us.6 = icmp eq i32 %133, 0
  %brmerge.not.us.6 = select i1 %101, i1 %.not37.us.6, i1 false
  br i1 %brmerge.not.us.6, label %.split.us.7, label %134

134:                                              ; preds = %.split.us.6.thread, %.split.us.6
  %.not37.us.6341 = phi i1 [ %.not37.us.6327, %.split.us.6.thread ], [ %.not37.us.6, %.split.us.6 ]
  %.sroa.63.2340 = phi i32 [ 1, %.split.us.6.thread ], [ %.sroa.63.2, %.split.us.6 ]
  %.sroa.39.2300310338 = phi i32 [ %.sroa.39.2300311, %.split.us.6.thread ], [ %.sroa.39.2300310, %.split.us.6 ]
  %.sroa.15.2273281298312336 = phi i32 [ %.sroa.15.2273281298313, %.split.us.6.thread ], [ %.sroa.15.2273281298312, %.split.us.6 ]
  %.sroa.0.2264271283296314334 = phi i32 [ %.sroa.0.2264271283296315, %.split.us.6.thread ], [ %.sroa.0.2264271283296314, %.split.us.6 ]
  %.sroa.27.2285294316332 = phi i32 [ %.sroa.27.2285294317, %.split.us.6.thread ], [ %.sroa.27.2285294316, %.split.us.6 ]
  %.sroa.51.2318330 = phi i32 [ %.sroa.51.2319, %.split.us.6.thread ], [ %.sroa.51.2318, %.split.us.6 ]
  %brmerge40.us.6 = select i1 %102, i1 true, i1 %.not37.us.6341
  br i1 %brmerge40.us.6, label %.split.us.7, label %.split.us.7.thread

.split.us.7.thread:                               ; preds = %134
  %135 = sdiv i32 %.promoted, 128
  %136 = and i32 %135, 1
  %.not37.us.7349 = icmp eq i32 %136, 0
  br label %139

.split.us.7:                                      ; preds = %.split.us.6, %134
  %.sroa.63.2339 = phi i32 [ %.sroa.63.2340, %134 ], [ %.sroa.63.2, %.split.us.6 ]
  %.sroa.39.2300310337 = phi i32 [ %.sroa.39.2300310338, %134 ], [ %.sroa.39.2300310, %.split.us.6 ]
  %.sroa.15.2273281298312335 = phi i32 [ %.sroa.15.2273281298312336, %134 ], [ %.sroa.15.2273281298312, %.split.us.6 ]
  %.sroa.0.2264271283296314333 = phi i32 [ %.sroa.0.2264271283296314334, %134 ], [ %.sroa.0.2264271283296314, %.split.us.6 ]
  %.sroa.27.2285294316331 = phi i32 [ %.sroa.27.2285294316332, %134 ], [ %.sroa.27.2285294316, %.split.us.6 ]
  %.sroa.51.2318329 = phi i32 [ %.sroa.51.2318330, %134 ], [ %.sroa.51.2318, %.split.us.6 ]
  %.sroa.75.2 = phi i32 [ %.sroa.75.1, %134 ], [ 0, %.split.us.6 ]
  %137 = sdiv i32 %.promoted, 128
  %138 = and i32 %137, 1
  %.not37.us.7 = icmp eq i32 %138, 0
  %brmerge.not.us.7 = select i1 %101, i1 %.not37.us.7, i1 false
  br i1 %brmerge.not.us.7, label %.split.us.8, label %139

139:                                              ; preds = %.split.us.7.thread, %.split.us.7
  %.not37.us.7365 = phi i1 [ %.not37.us.7349, %.split.us.7.thread ], [ %.not37.us.7, %.split.us.7 ]
  %.sroa.75.2364 = phi i32 [ 1, %.split.us.7.thread ], [ %.sroa.75.2, %.split.us.7 ]
  %.sroa.51.2318329362 = phi i32 [ %.sroa.51.2318330, %.split.us.7.thread ], [ %.sroa.51.2318329, %.split.us.7 ]
  %.sroa.27.2285294316331360 = phi i32 [ %.sroa.27.2285294316332, %.split.us.7.thread ], [ %.sroa.27.2285294316331, %.split.us.7 ]
  %.sroa.0.2264271283296314333358 = phi i32 [ %.sroa.0.2264271283296314334, %.split.us.7.thread ], [ %.sroa.0.2264271283296314333, %.split.us.7 ]
  %.sroa.15.2273281298312335356 = phi i32 [ %.sroa.15.2273281298312336, %.split.us.7.thread ], [ %.sroa.15.2273281298312335, %.split.us.7 ]
  %.sroa.39.2300310337354 = phi i32 [ %.sroa.39.2300310338, %.split.us.7.thread ], [ %.sroa.39.2300310337, %.split.us.7 ]
  %.sroa.63.2339352 = phi i32 [ %.sroa.63.2340, %.split.us.7.thread ], [ %.sroa.63.2339, %.split.us.7 ]
  %brmerge40.us.7 = select i1 %102, i1 true, i1 %.not37.us.7365
  br i1 %brmerge40.us.7, label %.split.us.8, label %.split.us.8.thread

.split.us.8.thread:                               ; preds = %139
  %140 = sdiv i32 %.promoted, 256
  %141 = and i32 %140, 1
  %.not37.us.8374 = icmp eq i32 %141, 0
  br label %144

.split.us.8:                                      ; preds = %.split.us.7, %139
  %.sroa.75.2363 = phi i32 [ %.sroa.75.2364, %139 ], [ %.sroa.75.2, %.split.us.7 ]
  %.sroa.51.2318329361 = phi i32 [ %.sroa.51.2318329362, %139 ], [ %.sroa.51.2318329, %.split.us.7 ]
  %.sroa.27.2285294316331359 = phi i32 [ %.sroa.27.2285294316331360, %139 ], [ %.sroa.27.2285294316331, %.split.us.7 ]
  %.sroa.0.2264271283296314333357 = phi i32 [ %.sroa.0.2264271283296314333358, %139 ], [ %.sroa.0.2264271283296314333, %.split.us.7 ]
  %.sroa.15.2273281298312335355 = phi i32 [ %.sroa.15.2273281298312335356, %139 ], [ %.sroa.15.2273281298312335, %.split.us.7 ]
  %.sroa.39.2300310337353 = phi i32 [ %.sroa.39.2300310337354, %139 ], [ %.sroa.39.2300310337, %.split.us.7 ]
  %.sroa.63.2339351 = phi i32 [ %.sroa.63.2339352, %139 ], [ %.sroa.63.2339, %.split.us.7 ]
  %.sroa.87.2 = phi i32 [ %.sroa.87.1, %139 ], [ 0, %.split.us.7 ]
  %142 = sdiv i32 %.promoted, 256
  %143 = and i32 %142, 1
  %.not37.us.8 = icmp eq i32 %143, 0
  %brmerge.not.us.8 = select i1 %101, i1 %.not37.us.8, i1 false
  br i1 %brmerge.not.us.8, label %.split.us.9, label %144

144:                                              ; preds = %.split.us.8.thread, %.split.us.8
  %.not37.us.8392 = phi i1 [ %.not37.us.8374, %.split.us.8.thread ], [ %.not37.us.8, %.split.us.8 ]
  %.sroa.87.2391 = phi i32 [ 1, %.split.us.8.thread ], [ %.sroa.87.2, %.split.us.8 ]
  %.sroa.63.2339351389 = phi i32 [ %.sroa.63.2339352, %.split.us.8.thread ], [ %.sroa.63.2339351, %.split.us.8 ]
  %.sroa.39.2300310337353387 = phi i32 [ %.sroa.39.2300310337354, %.split.us.8.thread ], [ %.sroa.39.2300310337353, %.split.us.8 ]
  %.sroa.15.2273281298312335355385 = phi i32 [ %.sroa.15.2273281298312335356, %.split.us.8.thread ], [ %.sroa.15.2273281298312335355, %.split.us.8 ]
  %.sroa.0.2264271283296314333357383 = phi i32 [ %.sroa.0.2264271283296314333358, %.split.us.8.thread ], [ %.sroa.0.2264271283296314333357, %.split.us.8 ]
  %.sroa.27.2285294316331359381 = phi i32 [ %.sroa.27.2285294316331360, %.split.us.8.thread ], [ %.sroa.27.2285294316331359, %.split.us.8 ]
  %.sroa.51.2318329361379 = phi i32 [ %.sroa.51.2318329362, %.split.us.8.thread ], [ %.sroa.51.2318329361, %.split.us.8 ]
  %.sroa.75.2363377 = phi i32 [ %.sroa.75.2364, %.split.us.8.thread ], [ %.sroa.75.2363, %.split.us.8 ]
  %brmerge40.us.8 = select i1 %102, i1 true, i1 %.not37.us.8392
  br i1 %brmerge40.us.8, label %.split.us.9, label %.split.us.9.thread

.split.us.9.thread:                               ; preds = %144
  %145 = sdiv i32 %.promoted, 512
  %146 = and i32 %145, 1
  %.not37.us.9402 = icmp eq i32 %146, 0
  br label %149

.split.us.9:                                      ; preds = %.split.us.8, %144
  %.sroa.87.2390 = phi i32 [ %.sroa.87.2391, %144 ], [ %.sroa.87.2, %.split.us.8 ]
  %.sroa.63.2339351388 = phi i32 [ %.sroa.63.2339351389, %144 ], [ %.sroa.63.2339351, %.split.us.8 ]
  %.sroa.39.2300310337353386 = phi i32 [ %.sroa.39.2300310337353387, %144 ], [ %.sroa.39.2300310337353, %.split.us.8 ]
  %.sroa.15.2273281298312335355384 = phi i32 [ %.sroa.15.2273281298312335355385, %144 ], [ %.sroa.15.2273281298312335355, %.split.us.8 ]
  %.sroa.0.2264271283296314333357382 = phi i32 [ %.sroa.0.2264271283296314333357383, %144 ], [ %.sroa.0.2264271283296314333357, %.split.us.8 ]
  %.sroa.27.2285294316331359380 = phi i32 [ %.sroa.27.2285294316331359381, %144 ], [ %.sroa.27.2285294316331359, %.split.us.8 ]
  %.sroa.51.2318329361378 = phi i32 [ %.sroa.51.2318329361379, %144 ], [ %.sroa.51.2318329361, %.split.us.8 ]
  %.sroa.75.2363376 = phi i32 [ %.sroa.75.2363377, %144 ], [ %.sroa.75.2363, %.split.us.8 ]
  %.sroa.99.2 = phi i32 [ %.sroa.99.1, %144 ], [ 0, %.split.us.8 ]
  %147 = sdiv i32 %.promoted, 512
  %148 = and i32 %147, 1
  %.not37.us.9 = icmp eq i32 %148, 0
  %brmerge.not.us.9 = select i1 %101, i1 %.not37.us.9, i1 false
  br i1 %brmerge.not.us.9, label %.split50.us, label %149

149:                                              ; preds = %.split.us.9.thread, %.split.us.9
  %.not37.us.9422 = phi i1 [ %.not37.us.9402, %.split.us.9.thread ], [ %.not37.us.9, %.split.us.9 ]
  %.sroa.99.2421 = phi i32 [ 1, %.split.us.9.thread ], [ %.sroa.99.2, %.split.us.9 ]
  %.sroa.75.2363376419 = phi i32 [ %.sroa.75.2363377, %.split.us.9.thread ], [ %.sroa.75.2363376, %.split.us.9 ]
  %.sroa.51.2318329361378417 = phi i32 [ %.sroa.51.2318329361379, %.split.us.9.thread ], [ %.sroa.51.2318329361378, %.split.us.9 ]
  %.sroa.27.2285294316331359380415 = phi i32 [ %.sroa.27.2285294316331359381, %.split.us.9.thread ], [ %.sroa.27.2285294316331359380, %.split.us.9 ]
  %.sroa.0.2264271283296314333357382413 = phi i32 [ %.sroa.0.2264271283296314333357383, %.split.us.9.thread ], [ %.sroa.0.2264271283296314333357382, %.split.us.9 ]
  %.sroa.15.2273281298312335355384411 = phi i32 [ %.sroa.15.2273281298312335355385, %.split.us.9.thread ], [ %.sroa.15.2273281298312335355384, %.split.us.9 ]
  %.sroa.39.2300310337353386409 = phi i32 [ %.sroa.39.2300310337353387, %.split.us.9.thread ], [ %.sroa.39.2300310337353386, %.split.us.9 ]
  %.sroa.63.2339351388407 = phi i32 [ %.sroa.63.2339351389, %.split.us.9.thread ], [ %.sroa.63.2339351388, %.split.us.9 ]
  %.sroa.87.2390405 = phi i32 [ %.sroa.87.2391, %.split.us.9.thread ], [ %.sroa.87.2390, %.split.us.9 ]
  %brmerge40.us.9 = select i1 %102, i1 true, i1 %.not37.us.9422
  %spec.select424 = select i1 %brmerge40.us.9, i32 %.sroa.111.1, i32 1
  br label %.split50.us

150:                                              ; preds = %.lr.ph
  %151 = sub nsw i32 1, %.sroa.0.1
  %spec.select425 = select i1 %.not37.us52, i32 %.sroa.0.1, i32 %151
  %152 = sdiv i32 %.promoted, 2
  %153 = and i32 %152, 1
  %.not37.us52.1 = icmp eq i32 %153, 0
  %154 = sub nsw i32 1, %.sroa.15.1
  %.sroa.15.3 = select i1 %.not37.us52.1, i32 %.sroa.15.1, i32 %154
  %155 = sdiv i32 %.promoted, 4
  %156 = and i32 %155, 1
  %.not37.us52.2 = icmp eq i32 %156, 0
  %157 = sub nsw i32 1, %.sroa.27.1
  %.sroa.27.3 = select i1 %.not37.us52.2, i32 %.sroa.27.1, i32 %157
  %158 = sdiv i32 %.promoted, 8
  %159 = and i32 %158, 1
  %.not37.us52.3 = icmp eq i32 %159, 0
  %160 = sub nsw i32 1, %.sroa.39.1
  %.sroa.39.3 = select i1 %.not37.us52.3, i32 %.sroa.39.1, i32 %160
  %161 = sdiv i32 %.promoted, 16
  %162 = and i32 %161, 1
  %.not37.us52.4 = icmp eq i32 %162, 0
  %163 = sub nsw i32 1, %.sroa.51.1
  %.sroa.51.3 = select i1 %.not37.us52.4, i32 %.sroa.51.1, i32 %163
  %164 = sdiv i32 %.promoted, 32
  %165 = and i32 %164, 1
  %.not37.us52.5 = icmp eq i32 %165, 0
  %166 = sub nsw i32 1, %.sroa.63.1
  %.sroa.63.3 = select i1 %.not37.us52.5, i32 %.sroa.63.1, i32 %166
  %167 = sdiv i32 %.promoted, 64
  %168 = and i32 %167, 1
  %.not37.us52.6 = icmp eq i32 %168, 0
  %169 = sub nsw i32 1, %.sroa.75.1
  %.sroa.75.3 = select i1 %.not37.us52.6, i32 %.sroa.75.1, i32 %169
  %170 = sdiv i32 %.promoted, 128
  %171 = and i32 %170, 1
  %.not37.us52.7 = icmp eq i32 %171, 0
  %172 = sub nsw i32 1, %.sroa.87.1
  %.sroa.87.3 = select i1 %.not37.us52.7, i32 %.sroa.87.1, i32 %172
  %173 = sdiv i32 %.promoted, 256
  %174 = and i32 %173, 1
  %.not37.us52.8 = icmp eq i32 %174, 0
  %175 = sub nsw i32 1, %.sroa.99.1
  %.sroa.99.3 = select i1 %.not37.us52.8, i32 %.sroa.99.1, i32 %175
  %176 = sdiv i32 %.promoted, 512
  %177 = and i32 %176, 1
  %.not37.us52.9 = icmp eq i32 %177, 0
  %178 = sub nsw i32 1, %.sroa.111.1
  %spec.select427 = select i1 %.not37.us52.9, i32 %.sroa.111.1, i32 %178
  br label %.split50.us

.split50.us:                                      ; preds = %150, %149, %.split.us.9
  %.sroa.0.4 = phi i32 [ %.sroa.0.2264271283296314333357382, %.split.us.9 ], [ %.sroa.0.2264271283296314333357382413, %149 ], [ %spec.select425, %150 ]
  %.sroa.15.4 = phi i32 [ %.sroa.15.2273281298312335355384, %.split.us.9 ], [ %.sroa.15.2273281298312335355384411, %149 ], [ %.sroa.15.3, %150 ]
  %.sroa.27.4 = phi i32 [ %.sroa.27.2285294316331359380, %.split.us.9 ], [ %.sroa.27.2285294316331359380415, %149 ], [ %.sroa.27.3, %150 ]
  %.sroa.39.4 = phi i32 [ %.sroa.39.2300310337353386, %.split.us.9 ], [ %.sroa.39.2300310337353386409, %149 ], [ %.sroa.39.3, %150 ]
  %.sroa.51.4 = phi i32 [ %.sroa.51.2318329361378, %.split.us.9 ], [ %.sroa.51.2318329361378417, %149 ], [ %.sroa.51.3, %150 ]
  %.sroa.63.4 = phi i32 [ %.sroa.63.2339351388, %.split.us.9 ], [ %.sroa.63.2339351388407, %149 ], [ %.sroa.63.3, %150 ]
  %.sroa.75.4 = phi i32 [ %.sroa.75.2363376, %.split.us.9 ], [ %.sroa.75.2363376419, %149 ], [ %.sroa.75.3, %150 ]
  %.sroa.87.4 = phi i32 [ %.sroa.87.2390, %.split.us.9 ], [ %.sroa.87.2390405, %149 ], [ %.sroa.87.3, %150 ]
  %.sroa.99.4 = phi i32 [ %.sroa.99.2, %.split.us.9 ], [ %.sroa.99.2421, %149 ], [ %.sroa.99.3, %150 ]
  %.sroa.111.4 = phi i32 [ 0, %.split.us.9 ], [ %spec.select424, %149 ], [ %spec.select427, %150 ]
  %179 = freeze i32 %.sroa.15.4
  %.sroa.39.4.fr = freeze i32 %.sroa.39.4
  %.sroa.63.4.fr = freeze i32 %.sroa.63.4
  %.sroa.87.4.fr = freeze i32 %.sroa.87.4
  %.sroa.111.4.fr = freeze i32 %.sroa.111.4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1) #3
  %180 = load i64, ptr %0, align 8, !tbaa !5
  %181 = add nsw i64 %180, -1
  store i64 %181, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i64 %180, 0
  br i1 %.not, label %.preheader45, label %.lr.ph, !llvm.loop !12
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass