; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_opt_compiled_6)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_u(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store8(ptr noundef, i64 noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @w2c_hermes_llvh0x3A0x3Araw_ostream0x3A0x3Awrite0x28char0x20const0x2A0x2C0x20unsigned0x20long0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare i32 @w2c_hermes_0x5F_memset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_llvh0x3A0x3Awrite_hex0x28llvh0x3A0x3Araw_ostream0x260x2C0x20unsigned0x20long0x20long0x2C0x20llvh0x3A0x3AHexPrintStyle0x2C0x20llvh0x3A0x3AOptional0x3Cunsigned0x20long0x3E0x29(ptr noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i64 %2, ptr %8, align 8, !tbaa !11
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #5
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.w2c_hermes, ptr %24, i32 0, i32 3
  %26 = load i32, ptr %25, align 8, !tbaa !13
  store i32 %26, ptr %15, align 4, !tbaa !9
  store i32 128, ptr %16, align 4, !tbaa !9
  %27 = load i32, ptr %16, align 4, !tbaa !9
  %28 = load i32, ptr %15, align 4, !tbaa !9
  %29 = sub i32 %28, %27
  store i32 %29, ptr %15, align 4, !tbaa !9
  %30 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %30, ptr %11, align 4, !tbaa !9
  %31 = load i32, ptr %15, align 4, !tbaa !9
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.w2c_hermes, ptr %32, i32 0, i32 3
  store i32 %31, ptr %33, align 8, !tbaa !13
  %34 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %34, ptr %15, align 4, !tbaa !9
  %35 = load ptr, ptr %6, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.w2c_hermes, ptr %35, i32 0, i32 6
  %37 = load i32, ptr %15, align 4, !tbaa !9
  %38 = zext i32 %37 to i64
  %39 = add i64 %38, 4
  %40 = call i32 @i32_load8_u(ptr noundef %36, i64 noundef %39)
  store i32 %40, ptr %15, align 4, !tbaa !9
  %41 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %41, ptr %12, align 4, !tbaa !9
  %42 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %42, ptr %15, align 4, !tbaa !9
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.w2c_hermes, ptr %43, i32 0, i32 6
  %45 = load i32, ptr %15, align 4, !tbaa !9
  %46 = zext i32 %45 to i64
  %47 = call i32 @i32_load(ptr noundef %44, i64 noundef %46)
  store i32 %47, ptr %15, align 4, !tbaa !9
  %48 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %48, ptr %13, align 4, !tbaa !9
  %49 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %49, ptr %15, align 4, !tbaa !9
  store i32 48, ptr %16, align 4, !tbaa !9
  store i32 128, ptr %17, align 4, !tbaa !9
  %50 = load ptr, ptr %6, align 8, !tbaa !5
  %51 = load i32, ptr %15, align 4, !tbaa !9
  %52 = load i32, ptr %16, align 4, !tbaa !9
  %53 = load i32, ptr %17, align 4, !tbaa !9
  %54 = call i32 @w2c_hermes_0x5F_memset(ptr noundef %50, i32 noundef %51, i32 noundef %52, i32 noundef %53)
  store i32 %54, ptr %15, align 4, !tbaa !9
  %55 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %55, ptr %10, align 4, !tbaa !9
  store i32 128, ptr %15, align 4, !tbaa !9
  %56 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %56, ptr %16, align 4, !tbaa !9
  %57 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %57, ptr %17, align 4, !tbaa !9
  store i32 128, ptr %18, align 4, !tbaa !9
  %58 = load i32, ptr %17, align 4, !tbaa !9
  %59 = load i32, ptr %18, align 4, !tbaa !9
  %60 = icmp uge i32 %58, %59
  %61 = zext i1 %60 to i32
  store i32 %61, ptr %17, align 4, !tbaa !9
  %62 = load i32, ptr %17, align 4, !tbaa !9
  %63 = icmp ne i32 %62, 0
  br i1 %63, label %64, label %66

64:                                               ; preds = %5
  %65 = load i32, ptr %15, align 4, !tbaa !9
  br label %68

66:                                               ; preds = %5
  %67 = load i32, ptr %16, align 4, !tbaa !9
  br label %68

68:                                               ; preds = %66, %64
  %69 = phi i32 [ %65, %64 ], [ %67, %66 ]
  store i32 %69, ptr %15, align 4, !tbaa !9
  store i32 0, ptr %16, align 4, !tbaa !9
  %70 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %70, ptr %17, align 4, !tbaa !9
  %71 = load i32, ptr %17, align 4, !tbaa !9
  %72 = icmp ne i32 %71, 0
  br i1 %72, label %73, label %75

73:                                               ; preds = %68
  %74 = load i32, ptr %15, align 4, !tbaa !9
  br label %77

75:                                               ; preds = %68
  %76 = load i32, ptr %16, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %75, %73
  %78 = phi i32 [ %74, %73 ], [ %76, %75 ]
  store i32 %78, ptr %15, align 4, !tbaa !9
  %79 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %79, ptr %13, align 4, !tbaa !9
  %80 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %80, ptr %16, align 4, !tbaa !9
  store i32 -2, ptr %17, align 4, !tbaa !9
  %81 = load i32, ptr %17, align 4, !tbaa !9
  %82 = load i32, ptr %16, align 4, !tbaa !9
  %83 = and i32 %82, %81
  store i32 %83, ptr %16, align 4, !tbaa !9
  %84 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %84, ptr %11, align 4, !tbaa !9
  store i32 2, ptr %17, align 4, !tbaa !9
  %85 = load i32, ptr %16, align 4, !tbaa !9
  %86 = load i32, ptr %17, align 4, !tbaa !9
  %87 = icmp eq i32 %85, %86
  %88 = zext i1 %87 to i32
  store i32 %88, ptr %16, align 4, !tbaa !9
  store i32 1, ptr %17, align 4, !tbaa !9
  %89 = load i32, ptr %17, align 4, !tbaa !9
  %90 = and i32 %89, 31
  %91 = load i32, ptr %16, align 4, !tbaa !9
  %92 = shl i32 %91, %90
  store i32 %92, ptr %16, align 4, !tbaa !9
  store i32 1, ptr %17, align 4, !tbaa !9
  store i32 67, ptr %18, align 4, !tbaa !9
  %93 = load i64, ptr %8, align 8, !tbaa !11
  store i64 %93, ptr %23, align 8, !tbaa !11
  %94 = load i64, ptr %23, align 8, !tbaa !11
  %95 = icmp ne i64 %94, 0
  br i1 %95, label %96, label %100

96:                                               ; preds = %77
  %97 = load i64, ptr %23, align 8, !tbaa !11
  %98 = call i64 @llvm.ctlz.i64(i64 %97, i1 true)
  %99 = trunc i64 %98 to i32
  br label %101

100:                                              ; preds = %77
  br label %101

101:                                              ; preds = %100, %96
  %102 = phi i32 [ %99, %96 ], [ 64, %100 ]
  %103 = sext i32 %102 to i64
  store i64 %103, ptr %23, align 8, !tbaa !11
  %104 = load i64, ptr %23, align 8, !tbaa !11
  %105 = trunc i64 %104 to i32
  store i32 %105, ptr %19, align 4, !tbaa !9
  %106 = load i32, ptr %19, align 4, !tbaa !9
  %107 = load i32, ptr %18, align 4, !tbaa !9
  %108 = sub i32 %107, %106
  store i32 %108, ptr %18, align 4, !tbaa !9
  store i32 2, ptr %19, align 4, !tbaa !9
  %109 = load i32, ptr %19, align 4, !tbaa !9
  %110 = and i32 %109, 31
  %111 = load i32, ptr %18, align 4, !tbaa !9
  %112 = lshr i32 %111, %110
  store i32 %112, ptr %18, align 4, !tbaa !9
  %113 = load i32, ptr %18, align 4, !tbaa !9
  store i32 %113, ptr %12, align 4, !tbaa !9
  %114 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %114, ptr %19, align 4, !tbaa !9
  store i32 1, ptr %20, align 4, !tbaa !9
  %115 = load i32, ptr %19, align 4, !tbaa !9
  %116 = load i32, ptr %20, align 4, !tbaa !9
  %117 = icmp ule i32 %115, %116
  %118 = zext i1 %117 to i32
  store i32 %118, ptr %19, align 4, !tbaa !9
  %119 = load i32, ptr %19, align 4, !tbaa !9
  %120 = icmp ne i32 %119, 0
  br i1 %120, label %121, label %123

121:                                              ; preds = %101
  %122 = load i32, ptr %17, align 4, !tbaa !9
  br label %125

123:                                              ; preds = %101
  %124 = load i32, ptr %18, align 4, !tbaa !9
  br label %125

125:                                              ; preds = %123, %121
  %126 = phi i32 [ %122, %121 ], [ %124, %123 ]
  store i32 %126, ptr %17, align 4, !tbaa !9
  %127 = load i32, ptr %17, align 4, !tbaa !9
  %128 = load i32, ptr %16, align 4, !tbaa !9
  %129 = add i32 %128, %127
  store i32 %129, ptr %16, align 4, !tbaa !9
  %130 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %130, ptr %12, align 4, !tbaa !9
  %131 = load i32, ptr %15, align 4, !tbaa !9
  %132 = load i32, ptr %16, align 4, !tbaa !9
  %133 = icmp ugt i32 %131, %132
  %134 = zext i1 %133 to i32
  store i32 %134, ptr %15, align 4, !tbaa !9
  %135 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %135, ptr %14, align 4, !tbaa !9
  %136 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %136, ptr %15, align 4, !tbaa !9
  store i32 2, ptr %16, align 4, !tbaa !9
  %137 = load i32, ptr %15, align 4, !tbaa !9
  %138 = load i32, ptr %16, align 4, !tbaa !9
  %139 = icmp eq i32 %137, %138
  %140 = zext i1 %139 to i32
  store i32 %140, ptr %15, align 4, !tbaa !9
  %141 = load i32, ptr %15, align 4, !tbaa !9
  %142 = icmp ne i32 %141, 0
  br i1 %142, label %143, label %151

143:                                              ; preds = %125
  %144 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %144, ptr %15, align 4, !tbaa !9
  store i32 120, ptr %16, align 4, !tbaa !9
  %145 = load ptr, ptr %6, align 8, !tbaa !5
  %146 = getelementptr inbounds %struct.w2c_hermes, ptr %145, i32 0, i32 6
  %147 = load i32, ptr %15, align 4, !tbaa !9
  %148 = zext i32 %147 to i64
  %149 = add i64 %148, 1
  %150 = load i32, ptr %16, align 4, !tbaa !9
  call void @i32_store8(ptr noundef %146, i64 noundef %149, i32 noundef %150)
  br label %151

151:                                              ; preds = %143, %125
  %152 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %152, ptr %15, align 4, !tbaa !9
  %153 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %153, ptr %16, align 4, !tbaa !9
  %154 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %154, ptr %17, align 4, !tbaa !9
  %155 = load i32, ptr %17, align 4, !tbaa !9
  %156 = icmp ne i32 %155, 0
  br i1 %156, label %157, label %159

157:                                              ; preds = %151
  %158 = load i32, ptr %15, align 4, !tbaa !9
  br label %161

159:                                              ; preds = %151
  %160 = load i32, ptr %16, align 4, !tbaa !9
  br label %161

161:                                              ; preds = %159, %157
  %162 = phi i32 [ %158, %157 ], [ %160, %159 ]
  store i32 %162, ptr %15, align 4, !tbaa !9
  %163 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %163, ptr %13, align 4, !tbaa !9
  %164 = load i64, ptr %8, align 8, !tbaa !11
  store i64 %164, ptr %21, align 8, !tbaa !11
  store i64 0, ptr %22, align 8, !tbaa !11
  %165 = load i64, ptr %21, align 8, !tbaa !11
  %166 = load i64, ptr %22, align 8, !tbaa !11
  %167 = icmp ne i64 %165, %166
  %168 = zext i1 %167 to i32
  store i32 %168, ptr %15, align 4, !tbaa !9
  %169 = load i32, ptr %15, align 4, !tbaa !9
  %170 = icmp ne i32 %169, 0
  br i1 %170, label %171, label %247

171:                                              ; preds = %161
  store i32 87, ptr %15, align 4, !tbaa !9
  store i32 55, ptr %16, align 4, !tbaa !9
  %172 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %172, ptr %17, align 4, !tbaa !9
  store i32 -3, ptr %18, align 4, !tbaa !9
  %173 = load i32, ptr %18, align 4, !tbaa !9
  %174 = load i32, ptr %17, align 4, !tbaa !9
  %175 = and i32 %174, %173
  store i32 %175, ptr %17, align 4, !tbaa !9
  %176 = load i32, ptr %17, align 4, !tbaa !9
  %177 = icmp ne i32 %176, 0
  br i1 %177, label %178, label %180

178:                                              ; preds = %171
  %179 = load i32, ptr %15, align 4, !tbaa !9
  br label %182

180:                                              ; preds = %171
  %181 = load i32, ptr %16, align 4, !tbaa !9
  br label %182

182:                                              ; preds = %180, %178
  %183 = phi i32 [ %179, %178 ], [ %181, %180 ]
  store i32 %183, ptr %15, align 4, !tbaa !9
  %184 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %184, ptr %12, align 4, !tbaa !9
  %185 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %185, ptr %15, align 4, !tbaa !9
  %186 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %186, ptr %16, align 4, !tbaa !9
  %187 = load i32, ptr %16, align 4, !tbaa !9
  %188 = load i32, ptr %15, align 4, !tbaa !9
  %189 = add i32 %188, %187
  store i32 %189, ptr %15, align 4, !tbaa !9
  %190 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %190, ptr %9, align 4, !tbaa !9
  br label %191

191:                                              ; preds = %245, %182
  %192 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %192, ptr %15, align 4, !tbaa !9
  store i32 1, ptr %16, align 4, !tbaa !9
  %193 = load i32, ptr %16, align 4, !tbaa !9
  %194 = load i32, ptr %15, align 4, !tbaa !9
  %195 = sub i32 %194, %193
  store i32 %195, ptr %15, align 4, !tbaa !9
  %196 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %196, ptr %9, align 4, !tbaa !9
  %197 = load i64, ptr %8, align 8, !tbaa !11
  store i64 %197, ptr %22, align 8, !tbaa !11
  %198 = load i64, ptr %22, align 8, !tbaa !11
  %199 = trunc i64 %198 to i32
  store i32 %199, ptr %16, align 4, !tbaa !9
  store i32 15, ptr %17, align 4, !tbaa !9
  %200 = load i32, ptr %17, align 4, !tbaa !9
  %201 = load i32, ptr %16, align 4, !tbaa !9
  %202 = and i32 %201, %200
  store i32 %202, ptr %16, align 4, !tbaa !9
  %203 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %203, ptr %11, align 4, !tbaa !9
  store i32 48, ptr %17, align 4, !tbaa !9
  %204 = load i32, ptr %17, align 4, !tbaa !9
  %205 = load i32, ptr %16, align 4, !tbaa !9
  %206 = or i32 %205, %204
  store i32 %206, ptr %16, align 4, !tbaa !9
  %207 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %207, ptr %17, align 4, !tbaa !9
  %208 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %208, ptr %18, align 4, !tbaa !9
  %209 = load i32, ptr %18, align 4, !tbaa !9
  %210 = load i32, ptr %17, align 4, !tbaa !9
  %211 = add i32 %210, %209
  store i32 %211, ptr %17, align 4, !tbaa !9
  %212 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %212, ptr %18, align 4, !tbaa !9
  store i32 10, ptr %19, align 4, !tbaa !9
  %213 = load i32, ptr %18, align 4, !tbaa !9
  %214 = load i32, ptr %19, align 4, !tbaa !9
  %215 = icmp ult i32 %213, %214
  %216 = zext i1 %215 to i32
  store i32 %216, ptr %18, align 4, !tbaa !9
  %217 = load i32, ptr %18, align 4, !tbaa !9
  %218 = icmp ne i32 %217, 0
  br i1 %218, label %219, label %221

219:                                              ; preds = %191
  %220 = load i32, ptr %16, align 4, !tbaa !9
  br label %223

221:                                              ; preds = %191
  %222 = load i32, ptr %17, align 4, !tbaa !9
  br label %223

223:                                              ; preds = %221, %219
  %224 = phi i32 [ %220, %219 ], [ %222, %221 ]
  store i32 %224, ptr %16, align 4, !tbaa !9
  %225 = load ptr, ptr %6, align 8, !tbaa !5
  %226 = getelementptr inbounds %struct.w2c_hermes, ptr %225, i32 0, i32 6
  %227 = load i32, ptr %15, align 4, !tbaa !9
  %228 = zext i32 %227 to i64
  %229 = load i32, ptr %16, align 4, !tbaa !9
  call void @i32_store8(ptr noundef %226, i64 noundef %228, i32 noundef %229)
  %230 = load i64, ptr %8, align 8, !tbaa !11
  store i64 %230, ptr %21, align 8, !tbaa !11
  store i64 15, ptr %22, align 8, !tbaa !11
  %231 = load i64, ptr %21, align 8, !tbaa !11
  %232 = load i64, ptr %22, align 8, !tbaa !11
  %233 = icmp ugt i64 %231, %232
  %234 = zext i1 %233 to i32
  store i32 %234, ptr %15, align 4, !tbaa !9
  %235 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %235, ptr %11, align 4, !tbaa !9
  %236 = load i64, ptr %8, align 8, !tbaa !11
  store i64 %236, ptr %21, align 8, !tbaa !11
  store i64 4, ptr %22, align 8, !tbaa !11
  %237 = load i64, ptr %22, align 8, !tbaa !11
  %238 = and i64 %237, 63
  %239 = load i64, ptr %21, align 8, !tbaa !11
  %240 = lshr i64 %239, %238
  store i64 %240, ptr %21, align 8, !tbaa !11
  %241 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %241, ptr %8, align 8, !tbaa !11
  %242 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %242, ptr %15, align 4, !tbaa !9
  %243 = load i32, ptr %15, align 4, !tbaa !9
  %244 = icmp ne i32 %243, 0
  br i1 %244, label %245, label %246

245:                                              ; preds = %223
  br label %191

246:                                              ; preds = %223
  br label %247

247:                                              ; preds = %246, %161
  %248 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %248, ptr %15, align 4, !tbaa !9
  %249 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %249, ptr %16, align 4, !tbaa !9
  %250 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %250, ptr %17, align 4, !tbaa !9
  %251 = load ptr, ptr %6, align 8, !tbaa !5
  %252 = load i32, ptr %15, align 4, !tbaa !9
  %253 = load i32, ptr %16, align 4, !tbaa !9
  %254 = load i32, ptr %17, align 4, !tbaa !9
  %255 = call i32 @w2c_hermes_llvh0x3A0x3Araw_ostream0x3A0x3Awrite0x28char0x20const0x2A0x2C0x20unsigned0x20long0x29(ptr noundef %251, i32 noundef %252, i32 noundef %253, i32 noundef %254)
  store i32 %255, ptr %15, align 4, !tbaa !9
  %256 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %256, ptr %15, align 4, !tbaa !9
  store i32 128, ptr %16, align 4, !tbaa !9
  %257 = load i32, ptr %16, align 4, !tbaa !9
  %258 = load i32, ptr %15, align 4, !tbaa !9
  %259 = add i32 %258, %257
  store i32 %259, ptr %15, align 4, !tbaa !9
  %260 = load i32, ptr %15, align 4, !tbaa !9
  %261 = load ptr, ptr %6, align 8, !tbaa !5
  %262 = getelementptr inbounds %struct.w2c_hermes, ptr %261, i32 0, i32 3
  store i32 %260, ptr %262, align 8, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.ctlz.i64(i64, i1 immarg) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !10, i64 24}
!14 = !{!"w2c_hermes", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !10, i64 32, !15, i64 40, !17, i64 80}
!15 = !{!"", !6, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !16, i64 32}
!16 = !{!"_Bool", !7, i64 0}
!17 = !{!"", !6, i64 0, !10, i64 8, !10, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_u(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store8(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @w2c_hermes_llvh0x3A0x3Araw_ostream0x3A0x3Awrite0x28char0x20const0x2A0x2C0x20unsigned0x20long0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare i32 @w2c_hermes_0x5F_memset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_llvh0x3A0x3Awrite_hex0x28llvh0x3A0x3Araw_ostream0x260x2C0x20unsigned0x20long0x20long0x2C0x20llvh0x3A0x3AHexPrintStyle0x2C0x20llvh0x3A0x3AOptional0x3Cunsigned0x20long0x3E0x29(ptr noundef %0, i32 noundef %1, i64 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  %7 = load i32, ptr %6, align 8, !tbaa !5
  %8 = add i32 %7, -128
  store i32 %8, ptr %6, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %0, i64 40
  %10 = zext i32 %4 to i64
  %11 = add nuw nsw i64 %10, 4
  %12 = tail call i32 @i32_load8_u(ptr noundef nonnull %9, i64 noundef %11)
  %13 = tail call i32 @i32_load(ptr noundef nonnull %9, i64 noundef %10)
  %14 = tail call i32 @w2c_hermes_0x5F_memset(ptr noundef %0, i32 noundef %8, i32 noundef 48, i32 noundef 128) #5
  %15 = tail call i32 @llvm.umin.i32(i32 %13, i32 128)
  %.not = icmp eq i32 %12, 0
  %16 = select i1 %.not, i32 0, i32 %15
  %17 = and i32 %3, -2
  %18 = icmp eq i32 %17, 2
  %19 = select i1 %18, i32 2, i32 0
  %.not139 = icmp eq i64 %2, 0
  %20 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %2, i1 false)
  %21 = trunc nuw nsw i64 %20 to i32
  %22 = sub nuw nsw i32 67, %21
  %23 = lshr i32 %22, 2
  %24 = icmp ult i64 %2, 16
  %25 = select i1 %24, i32 1, i32 %23
  %26 = add nuw nsw i32 %25, %19
  br i1 %18, label %27, label %30

27:                                               ; preds = %5
  %28 = zext i32 %14 to i64
  %29 = add nuw nsw i64 %28, 1
  tail call void @i32_store8(ptr noundef nonnull %9, i64 noundef %29, i32 noundef 120)
  br label %30

30:                                               ; preds = %27, %5
  %31 = tail call i32 @llvm.umax.i32(i32 %16, i32 %26)
  br i1 %.not139, label %.loopexit, label %32

32:                                               ; preds = %30
  %33 = and i32 %3, -3
  %.not140 = icmp eq i32 %33, 0
  %34 = select i1 %.not140, i32 55, i32 87
  %35 = add i32 %31, %14
  br label %36

36:                                               ; preds = %36, %32
  %.0137 = phi i32 [ %35, %32 ], [ %37, %36 ]
  %.0 = phi i64 [ %2, %32 ], [ %46, %36 ]
  %37 = add i32 %.0137, -1
  %38 = trunc i64 %.0 to i32
  %39 = and i32 %38, 15
  %40 = or disjoint i32 %39, 48
  %41 = add nuw nsw i32 %39, %34
  %42 = icmp ult i32 %39, 10
  %43 = select i1 %42, i32 %40, i32 %41
  %44 = zext i32 %37 to i64
  tail call void @i32_store8(ptr noundef nonnull %9, i64 noundef %44, i32 noundef %43)
  %45 = icmp ugt i64 %.0, 15
  %46 = lshr i64 %.0, 4
  br i1 %45, label %36, label %.loopexit

.loopexit:                                        ; preds = %36, %30
  %47 = tail call i32 @w2c_hermes_llvh0x3A0x3Araw_ostream0x3A0x3Awrite0x28char0x20const0x2A0x2C0x20unsigned0x20long0x29(ptr noundef %0, i32 noundef %1, i32 noundef %14, i32 noundef %31)
  %48 = add i32 %14, 128
  store i32 %48, ptr %6, align 8, !tbaa !5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.ctlz.i64(i64, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #4

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"w2c_hermes", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !10, i64 28, !10, i64 32, !11, i64 40, !14, i64 80}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"", !7, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !13, i64 32}
!12 = !{!"long", !8, i64 0}
!13 = !{!"_Bool", !8, i64 0}
!14 = !{!"", !7, i64 0, !10, i64 8, !10, i64 12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass