; LLVM IR from DionysiosB/CodeForces :: 0800-0899/845B-LubaAndTheTicket.ll (Z7isLuckyl)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z7isLuckyl(i64 noundef %0) #0 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 0, ptr %4, align 8, !tbaa !5
  br label %7

7:                                                ; preds = %20, %1
  %8 = load i64, ptr %4, align 8, !tbaa !5
  %9 = icmp slt i64 %8, 3
  br i1 %9, label %11, label %10

10:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  br label %23

11:                                               ; preds = %7
  %12 = load i64, ptr %2, align 8, !tbaa !5
  %13 = srem i64 %12, 10
  %14 = load i32, ptr %3, align 4, !tbaa !9
  %15 = sext i32 %14 to i64
  %16 = add nsw i64 %15, %13
  %17 = trunc i64 %16 to i32
  store i32 %17, ptr %3, align 4, !tbaa !9
  %18 = load i64, ptr %2, align 8, !tbaa !5
  %19 = sdiv i64 %18, 10
  store i64 %19, ptr %2, align 8, !tbaa !5
  br label %20

20:                                               ; preds = %11
  %21 = load i64, ptr %4, align 8, !tbaa !5
  %22 = add nsw i64 %21, 1
  store i64 %22, ptr %4, align 8, !tbaa !5
  br label %7, !llvm.loop !11

23:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 0, ptr %6, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %37, %23
  %25 = load i64, ptr %6, align 8, !tbaa !5
  %26 = icmp slt i64 %25, 3
  br i1 %26, label %28, label %27

27:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  br label %40

28:                                               ; preds = %24
  %29 = load i64, ptr %2, align 8, !tbaa !5
  %30 = srem i64 %29, 10
  %31 = load i32, ptr %5, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = add nsw i64 %32, %30
  %34 = trunc i64 %33 to i32
  store i32 %34, ptr %5, align 4, !tbaa !9
  %35 = load i64, ptr %2, align 8, !tbaa !5
  %36 = sdiv i64 %35, 10
  store i64 %36, ptr %2, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %28
  %38 = load i64, ptr %6, align 8, !tbaa !5
  %39 = add nsw i64 %38, 1
  store i64 %39, ptr %6, align 8, !tbaa !5
  br label %24, !llvm.loop !13

40:                                               ; preds = %27
  %41 = load i32, ptr %3, align 4, !tbaa !9
  %42 = load i32, ptr %5, align 4, !tbaa !9
  %43 = icmp eq i32 %41, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i1 %43
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef zeroext i1 @_Z7isLuckyl(i64 noundef %0) local_unnamed_addr #0 {
.preheader:
  %1 = srem i64 %0, 10
  %2 = sdiv i64 %0, 10
  %3 = srem i64 %2, 10
  %4 = trunc nsw i64 %3 to i32
  %5 = sdiv i64 %0, 100
  %6 = srem i64 %5, 10
  %7 = trunc nsw i64 %6 to i32
  %8 = sdiv i64 %0, 1000
  %9 = srem i64 %8, 10
  %10 = trunc nsw i64 %9 to i32
  %11 = sdiv i64 %0, 10000
  %12 = srem i64 %11, 10
  %13 = trunc nsw i64 %12 to i32
  %14 = add nsw i32 %10, %13
  %15 = sdiv i64 %0, 100000
  %16 = srem i64 %15, 10
  %17 = trunc nsw i64 %16 to i32
  %18 = add nsw i32 %14, %17
  %19 = trunc nsw i64 %1 to i32
  %20 = add nsw i32 %19, %4
  %21 = add nsw i32 %20, %7
  %22 = icmp eq i32 %21, %18
  ret i1 %22
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass