; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_6)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden double @f64_reinterpret_i64(i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_reinterpret_f64(double noundef) #1

; Function Attrs: nounwind uwtable
define dso_local double @w2c_hermes_log10(ptr noundef %0, double noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca double, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca double, align 8
  %13 = alloca double, align 8
  %14 = alloca double, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca double, align 8
  %24 = alloca double, align 8
  %25 = alloca double, align 8
  %26 = alloca double, align 8
  %27 = alloca double, align 8
  %28 = alloca double, align 8
  %29 = alloca double, align 8
  %30 = alloca double, align 8
  %31 = alloca double, align 8
  %32 = alloca double, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store double %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  store i64 0, ptr %8, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store double 0.000000e+00, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store double 0.000000e+00, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  store double 0.000000e+00, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  store double 0.000000e+00, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  store double 0.000000e+00, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  store double 0.000000e+00, ptr %14, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %29) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %30) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #3
  %33 = load double, ptr %4, align 8, !tbaa !9
  store double %33, ptr %23, align 8, !tbaa !9
  %34 = load double, ptr %23, align 8, !tbaa !9
  %35 = call i64 @i64_reinterpret_f64(double noundef %34)
  store i64 %35, ptr %19, align 8, !tbaa !13
  %36 = load i64, ptr %19, align 8, !tbaa !13
  store i64 %36, ptr %8, align 8, !tbaa !13
  store i64 0, ptr %20, align 8, !tbaa !13
  %37 = load i64, ptr %19, align 8, !tbaa !13
  %38 = load i64, ptr %20, align 8, !tbaa !13
  %39 = icmp sge i64 %37, %38
  %40 = zext i1 %39 to i32
  %41 = sext i32 %40 to i64
  %42 = trunc i64 %41 to i32
  store i32 %42, ptr %15, align 4, !tbaa !11
  %43 = load i32, ptr %15, align 4, !tbaa !11
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %62

45:                                               ; preds = %2
  %46 = load i64, ptr %8, align 8, !tbaa !13
  store i64 %46, ptr %19, align 8, !tbaa !13
  store i64 32, ptr %20, align 8, !tbaa !13
  %47 = load i64, ptr %20, align 8, !tbaa !13
  %48 = and i64 %47, 63
  %49 = load i64, ptr %19, align 8, !tbaa !13
  %50 = lshr i64 %49, %48
  store i64 %50, ptr %19, align 8, !tbaa !13
  %51 = load i64, ptr %19, align 8, !tbaa !13
  %52 = trunc i64 %51 to i32
  store i32 %52, ptr %15, align 4, !tbaa !11
  %53 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %53, ptr %5, align 4, !tbaa !11
  store i32 1048575, ptr %16, align 4, !tbaa !11
  %54 = load i32, ptr %15, align 4, !tbaa !11
  %55 = load i32, ptr %16, align 4, !tbaa !11
  %56 = icmp ugt i32 %54, %55
  %57 = zext i1 %56 to i32
  store i32 %57, ptr %15, align 4, !tbaa !11
  %58 = load i32, ptr %15, align 4, !tbaa !11
  %59 = icmp ne i32 %58, 0
  br i1 %59, label %60, label %61

60:                                               ; preds = %45
  br label %102

61:                                               ; preds = %45
  br label %62

62:                                               ; preds = %61, %2
  %63 = load i64, ptr %8, align 8, !tbaa !13
  store i64 %63, ptr %19, align 8, !tbaa !13
  store i64 9223372036854775807, ptr %20, align 8, !tbaa !13
  %64 = load i64, ptr %20, align 8, !tbaa !13
  %65 = load i64, ptr %19, align 8, !tbaa !13
  %66 = and i64 %65, %64
  store i64 %66, ptr %19, align 8, !tbaa !13
  %67 = load i64, ptr %19, align 8, !tbaa !13
  %68 = icmp ne i64 %67, 0
  %69 = xor i1 %68, true
  %70 = zext i1 %69 to i32
  store i32 %70, ptr %15, align 4, !tbaa !11
  %71 = load i32, ptr %15, align 4, !tbaa !11
  %72 = icmp ne i32 %71, 0
  br i1 %72, label %73, label %82

73:                                               ; preds = %62
  store double -1.000000e+00, ptr %23, align 8, !tbaa !9
  %74 = load double, ptr %4, align 8, !tbaa !9
  store double %74, ptr %24, align 8, !tbaa !9
  %75 = load double, ptr %4, align 8, !tbaa !9
  store double %75, ptr %25, align 8, !tbaa !9
  %76 = load double, ptr %25, align 8, !tbaa !9
  %77 = load double, ptr %24, align 8, !tbaa !9
  %78 = fmul double %77, %76
  store double %78, ptr %24, align 8, !tbaa !9
  %79 = load double, ptr %24, align 8, !tbaa !9
  %80 = load double, ptr %23, align 8, !tbaa !9
  %81 = fdiv double %80, %79
  store double %81, ptr %23, align 8, !tbaa !9
  br label %347

82:                                               ; preds = %62
  %83 = load i64, ptr %8, align 8, !tbaa !13
  store i64 %83, ptr %19, align 8, !tbaa !13
  store i64 0, ptr %20, align 8, !tbaa !13
  %84 = load i64, ptr %19, align 8, !tbaa !13
  %85 = load i64, ptr %20, align 8, !tbaa !13
  %86 = icmp sge i64 %84, %85
  %87 = zext i1 %86 to i32
  %88 = sext i32 %87 to i64
  %89 = trunc i64 %88 to i32
  store i32 %89, ptr %15, align 4, !tbaa !11
  %90 = load i32, ptr %15, align 4, !tbaa !11
  %91 = icmp ne i32 %90, 0
  br i1 %91, label %92, label %93

92:                                               ; preds = %82
  br label %132

93:                                               ; preds = %82
  %94 = load double, ptr %4, align 8, !tbaa !9
  store double %94, ptr %23, align 8, !tbaa !9
  %95 = load double, ptr %4, align 8, !tbaa !9
  store double %95, ptr %24, align 8, !tbaa !9
  %96 = load double, ptr %24, align 8, !tbaa !9
  %97 = load double, ptr %23, align 8, !tbaa !9
  %98 = fsub double %97, %96
  store double %98, ptr %23, align 8, !tbaa !9
  store double 0.000000e+00, ptr %24, align 8, !tbaa !9
  %99 = load double, ptr %24, align 8, !tbaa !9
  %100 = load double, ptr %23, align 8, !tbaa !9
  %101 = fdiv double %100, %99
  store double %101, ptr %23, align 8, !tbaa !9
  br label %347

102:                                              ; preds = %60
  %103 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %103, ptr %15, align 4, !tbaa !11
  store i32 2146435071, ptr %16, align 4, !tbaa !11
  %104 = load i32, ptr %15, align 4, !tbaa !11
  %105 = load i32, ptr %16, align 4, !tbaa !11
  %106 = icmp ugt i32 %104, %105
  %107 = zext i1 %106 to i32
  store i32 %107, ptr %15, align 4, !tbaa !11
  %108 = load i32, ptr %15, align 4, !tbaa !11
  %109 = icmp ne i32 %108, 0
  br i1 %109, label %110, label %111

110:                                              ; preds = %102
  br label %345

111:                                              ; preds = %102
  store i32 1072693248, ptr %15, align 4, !tbaa !11
  %112 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %112, ptr %6, align 4, !tbaa !11
  store i32 -1023, ptr %15, align 4, !tbaa !11
  %113 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %113, ptr %7, align 4, !tbaa !11
  %114 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %114, ptr %15, align 4, !tbaa !11
  store i32 1072693248, ptr %16, align 4, !tbaa !11
  %115 = load i32, ptr %15, align 4, !tbaa !11
  %116 = load i32, ptr %16, align 4, !tbaa !11
  %117 = icmp ne i32 %115, %116
  %118 = zext i1 %117 to i32
  store i32 %118, ptr %15, align 4, !tbaa !11
  %119 = load i32, ptr %15, align 4, !tbaa !11
  %120 = icmp ne i32 %119, 0
  br i1 %120, label %121, label %124

121:                                              ; preds = %111
  %122 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %122, ptr %15, align 4, !tbaa !11
  %123 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %123, ptr %6, align 4, !tbaa !11
  br label %148

124:                                              ; preds = %111
  %125 = load i64, ptr %8, align 8, !tbaa !13
  store i64 %125, ptr %19, align 8, !tbaa !13
  %126 = load i64, ptr %19, align 8, !tbaa !13
  %127 = trunc i64 %126 to i32
  store i32 %127, ptr %15, align 4, !tbaa !11
  %128 = load i32, ptr %15, align 4, !tbaa !11
  %129 = icmp ne i32 %128, 0
  br i1 %129, label %130, label %131

130:                                              ; preds = %124
  br label %148

131:                                              ; preds = %124
  store double 0.000000e+00, ptr %23, align 8, !tbaa !9
  br label %347

132:                                              ; preds = %92
  %133 = load double, ptr %4, align 8, !tbaa !9
  store double %133, ptr %23, align 8, !tbaa !9
  store double 0x4350000000000000, ptr %24, align 8, !tbaa !9
  %134 = load double, ptr %24, align 8, !tbaa !9
  %135 = load double, ptr %23, align 8, !tbaa !9
  %136 = fmul double %135, %134
  store double %136, ptr %23, align 8, !tbaa !9
  %137 = load double, ptr %23, align 8, !tbaa !9
  %138 = call i64 @i64_reinterpret_f64(double noundef %137)
  store i64 %138, ptr %19, align 8, !tbaa !13
  %139 = load i64, ptr %19, align 8, !tbaa !13
  store i64 %139, ptr %8, align 8, !tbaa !13
  store i64 32, ptr %20, align 8, !tbaa !13
  %140 = load i64, ptr %20, align 8, !tbaa !13
  %141 = and i64 %140, 63
  %142 = load i64, ptr %19, align 8, !tbaa !13
  %143 = lshr i64 %142, %141
  store i64 %143, ptr %19, align 8, !tbaa !13
  %144 = load i64, ptr %19, align 8, !tbaa !13
  %145 = trunc i64 %144 to i32
  store i32 %145, ptr %15, align 4, !tbaa !11
  %146 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %146, ptr %6, align 4, !tbaa !11
  store i32 -1077, ptr %15, align 4, !tbaa !11
  %147 = load i32, ptr %15, align 4, !tbaa !11
  store i32 %147, ptr %7, align 4, !tbaa !11
  br label %148

148:                                              ; preds = %132, %130, %121
  %149 = load i32, ptr %7, align 4, !tbaa !11
  store i32 %149, ptr %15, align 4, !tbaa !11
  %150 = load i32, ptr %6, align 4, !tbaa !11
  store i32 %150, ptr %16, align 4, !tbaa !11
  store i32 614242, ptr %17, align 4, !tbaa !11
  %151 = load i32, ptr %17, align 4, !tbaa !11
  %152 = load i32, ptr %16, align 4, !tbaa !11
  %153 = add i32 %152, %151
  store i32 %153, ptr %16, align 4, !tbaa !11
  %154 = load i32, ptr %16, align 4, !tbaa !11
  store i32 %154, ptr %5, align 4, !tbaa !11
  store i32 20, ptr %17, align 4, !tbaa !11
  %155 = load i32, ptr %17, align 4, !tbaa !11
  %156 = and i32 %155, 31
  %157 = load i32, ptr %16, align 4, !tbaa !11
  %158 = lshr i32 %157, %156
  store i32 %158, ptr %16, align 4, !tbaa !11
  %159 = load i32, ptr %16, align 4, !tbaa !11
  %160 = load i32, ptr %15, align 4, !tbaa !11
  %161 = add i32 %160, %159
  store i32 %161, ptr %15, align 4, !tbaa !11
  %162 = load i32, ptr %15, align 4, !tbaa !11
  %163 = sitofp i32 %162 to double
  store double %163, ptr %23, align 8, !tbaa !9
  %164 = load double, ptr %23, align 8, !tbaa !9
  store double %164, ptr %13, align 8, !tbaa !9
  store double 0x3FD34413509F6000, ptr %24, align 8, !tbaa !9
  %165 = load double, ptr %24, align 8, !tbaa !9
  %166 = load double, ptr %23, align 8, !tbaa !9
  %167 = fmul double %166, %165
  store double %167, ptr %23, align 8, !tbaa !9
  %168 = load double, ptr %23, align 8, !tbaa !9
  store double %168, ptr %9, align 8, !tbaa !9
  %169 = load i64, ptr %8, align 8, !tbaa !13
  store i64 %169, ptr %20, align 8, !tbaa !13
  store i64 4294967295, ptr %21, align 8, !tbaa !13
  %170 = load i64, ptr %21, align 8, !tbaa !13
  %171 = load i64, ptr %20, align 8, !tbaa !13
  %172 = and i64 %171, %170
  store i64 %172, ptr %20, align 8, !tbaa !13
  %173 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %173, ptr %17, align 4, !tbaa !11
  store i32 1048575, ptr %18, align 4, !tbaa !11
  %174 = load i32, ptr %18, align 4, !tbaa !11
  %175 = load i32, ptr %17, align 4, !tbaa !11
  %176 = and i32 %175, %174
  store i32 %176, ptr %17, align 4, !tbaa !11
  store i32 1072079006, ptr %18, align 4, !tbaa !11
  %177 = load i32, ptr %18, align 4, !tbaa !11
  %178 = load i32, ptr %17, align 4, !tbaa !11
  %179 = add i32 %178, %177
  store i32 %179, ptr %17, align 4, !tbaa !11
  %180 = load i32, ptr %17, align 4, !tbaa !11
  %181 = zext i32 %180 to i64
  store i64 %181, ptr %21, align 8, !tbaa !13
  store i64 32, ptr %22, align 8, !tbaa !13
  %182 = load i64, ptr %22, align 8, !tbaa !13
  %183 = and i64 %182, 63
  %184 = load i64, ptr %21, align 8, !tbaa !13
  %185 = shl i64 %184, %183
  store i64 %185, ptr %21, align 8, !tbaa !13
  %186 = load i64, ptr %21, align 8, !tbaa !13
  %187 = load i64, ptr %20, align 8, !tbaa !13
  %188 = or i64 %187, %186
  store i64 %188, ptr %20, align 8, !tbaa !13
  %189 = load i64, ptr %20, align 8, !tbaa !13
  %190 = call double @f64_reinterpret_i64(i64 noundef %189)
  store double %190, ptr %24, align 8, !tbaa !9
  store double -1.000000e+00, ptr %25, align 8, !tbaa !9
  %191 = load double, ptr %25, align 8, !tbaa !9
  %192 = load double, ptr %24, align 8, !tbaa !9
  %193 = fadd double %192, %191
  store double %193, ptr %24, align 8, !tbaa !9
  %194 = load double, ptr %24, align 8, !tbaa !9
  store double %194, ptr %4, align 8, !tbaa !9
  %195 = load double, ptr %4, align 8, !tbaa !9
  store double %195, ptr %25, align 8, !tbaa !9
  %196 = load double, ptr %4, align 8, !tbaa !9
  store double %196, ptr %26, align 8, !tbaa !9
  store double 5.000000e-01, ptr %27, align 8, !tbaa !9
  %197 = load double, ptr %27, align 8, !tbaa !9
  %198 = load double, ptr %26, align 8, !tbaa !9
  %199 = fmul double %198, %197
  store double %199, ptr %26, align 8, !tbaa !9
  %200 = load double, ptr %26, align 8, !tbaa !9
  %201 = load double, ptr %25, align 8, !tbaa !9
  %202 = fmul double %201, %200
  store double %202, ptr %25, align 8, !tbaa !9
  %203 = load double, ptr %25, align 8, !tbaa !9
  store double %203, ptr %11, align 8, !tbaa !9
  %204 = load double, ptr %25, align 8, !tbaa !9
  %205 = load double, ptr %24, align 8, !tbaa !9
  %206 = fsub double %205, %204
  store double %206, ptr %24, align 8, !tbaa !9
  %207 = load double, ptr %24, align 8, !tbaa !9
  %208 = call i64 @i64_reinterpret_f64(double noundef %207)
  store i64 %208, ptr %20, align 8, !tbaa !13
  store i64 -4294967296, ptr %21, align 8, !tbaa !13
  %209 = load i64, ptr %21, align 8, !tbaa !13
  %210 = load i64, ptr %20, align 8, !tbaa !13
  %211 = and i64 %210, %209
  store i64 %211, ptr %20, align 8, !tbaa !13
  %212 = load i64, ptr %20, align 8, !tbaa !13
  %213 = call double @f64_reinterpret_i64(i64 noundef %212)
  store double %213, ptr %24, align 8, !tbaa !9
  %214 = load double, ptr %24, align 8, !tbaa !9
  store double %214, ptr %12, align 8, !tbaa !9
  store double 0x3FDBCB7B15200000, ptr %25, align 8, !tbaa !9
  %215 = load double, ptr %25, align 8, !tbaa !9
  %216 = load double, ptr %24, align 8, !tbaa !9
  %217 = fmul double %216, %215
  store double %217, ptr %24, align 8, !tbaa !9
  %218 = load double, ptr %24, align 8, !tbaa !9
  store double %218, ptr %10, align 8, !tbaa !9
  %219 = load double, ptr %24, align 8, !tbaa !9
  %220 = load double, ptr %23, align 8, !tbaa !9
  %221 = fadd double %220, %219
  store double %221, ptr %23, align 8, !tbaa !9
  %222 = load double, ptr %23, align 8, !tbaa !9
  store double %222, ptr %14, align 8, !tbaa !9
  %223 = load double, ptr %10, align 8, !tbaa !9
  store double %223, ptr %24, align 8, !tbaa !9
  %224 = load double, ptr %9, align 8, !tbaa !9
  store double %224, ptr %25, align 8, !tbaa !9
  %225 = load double, ptr %14, align 8, !tbaa !9
  store double %225, ptr %26, align 8, !tbaa !9
  %226 = load double, ptr %26, align 8, !tbaa !9
  %227 = load double, ptr %25, align 8, !tbaa !9
  %228 = fsub double %227, %226
  store double %228, ptr %25, align 8, !tbaa !9
  %229 = load double, ptr %25, align 8, !tbaa !9
  %230 = load double, ptr %24, align 8, !tbaa !9
  %231 = fadd double %230, %229
  store double %231, ptr %24, align 8, !tbaa !9
  %232 = load double, ptr %4, align 8, !tbaa !9
  store double %232, ptr %25, align 8, !tbaa !9
  %233 = load double, ptr %4, align 8, !tbaa !9
  store double %233, ptr %26, align 8, !tbaa !9
  store double 2.000000e+00, ptr %27, align 8, !tbaa !9
  %234 = load double, ptr %27, align 8, !tbaa !9
  %235 = load double, ptr %26, align 8, !tbaa !9
  %236 = fadd double %235, %234
  store double %236, ptr %26, align 8, !tbaa !9
  %237 = load double, ptr %26, align 8, !tbaa !9
  %238 = load double, ptr %25, align 8, !tbaa !9
  %239 = fdiv double %238, %237
  store double %239, ptr %25, align 8, !tbaa !9
  %240 = load double, ptr %25, align 8, !tbaa !9
  store double %240, ptr %9, align 8, !tbaa !9
  %241 = load double, ptr %11, align 8, !tbaa !9
  store double %241, ptr %26, align 8, !tbaa !9
  %242 = load double, ptr %9, align 8, !tbaa !9
  store double %242, ptr %27, align 8, !tbaa !9
  %243 = load double, ptr %9, align 8, !tbaa !9
  store double %243, ptr %28, align 8, !tbaa !9
  %244 = load double, ptr %28, align 8, !tbaa !9
  %245 = load double, ptr %27, align 8, !tbaa !9
  %246 = fmul double %245, %244
  store double %246, ptr %27, align 8, !tbaa !9
  %247 = load double, ptr %27, align 8, !tbaa !9
  store double %247, ptr %10, align 8, !tbaa !9
  %248 = load double, ptr %10, align 8, !tbaa !9
  store double %248, ptr %28, align 8, !tbaa !9
  %249 = load double, ptr %28, align 8, !tbaa !9
  %250 = load double, ptr %27, align 8, !tbaa !9
  %251 = fmul double %250, %249
  store double %251, ptr %27, align 8, !tbaa !9
  %252 = load double, ptr %27, align 8, !tbaa !9
  store double %252, ptr %9, align 8, !tbaa !9
  %253 = load double, ptr %9, align 8, !tbaa !9
  store double %253, ptr %28, align 8, !tbaa !9
  %254 = load double, ptr %9, align 8, !tbaa !9
  store double %254, ptr %29, align 8, !tbaa !9
  store double 0x3FC39A09D078C69F, ptr %30, align 8, !tbaa !9
  %255 = load double, ptr %30, align 8, !tbaa !9
  %256 = load double, ptr %29, align 8, !tbaa !9
  %257 = fmul double %256, %255
  store double %257, ptr %29, align 8, !tbaa !9
  store double 0x3FCC71C51D8E78AF, ptr %30, align 8, !tbaa !9
  %258 = load double, ptr %30, align 8, !tbaa !9
  %259 = load double, ptr %29, align 8, !tbaa !9
  %260 = fadd double %259, %258
  store double %260, ptr %29, align 8, !tbaa !9
  %261 = load double, ptr %29, align 8, !tbaa !9
  %262 = load double, ptr %28, align 8, !tbaa !9
  %263 = fmul double %262, %261
  store double %263, ptr %28, align 8, !tbaa !9
  store double 0x3FD999999997FA04, ptr %29, align 8, !tbaa !9
  %264 = load double, ptr %29, align 8, !tbaa !9
  %265 = load double, ptr %28, align 8, !tbaa !9
  %266 = fadd double %265, %264
  store double %266, ptr %28, align 8, !tbaa !9
  %267 = load double, ptr %28, align 8, !tbaa !9
  %268 = load double, ptr %27, align 8, !tbaa !9
  %269 = fmul double %268, %267
  store double %269, ptr %27, align 8, !tbaa !9
  %270 = load double, ptr %10, align 8, !tbaa !9
  store double %270, ptr %28, align 8, !tbaa !9
  %271 = load double, ptr %9, align 8, !tbaa !9
  store double %271, ptr %29, align 8, !tbaa !9
  %272 = load double, ptr %9, align 8, !tbaa !9
  store double %272, ptr %30, align 8, !tbaa !9
  %273 = load double, ptr %9, align 8, !tbaa !9
  store double %273, ptr %31, align 8, !tbaa !9
  store double 0x3FC2F112DF3E5244, ptr %32, align 8, !tbaa !9
  %274 = load double, ptr %32, align 8, !tbaa !9
  %275 = load double, ptr %31, align 8, !tbaa !9
  %276 = fmul double %275, %274
  store double %276, ptr %31, align 8, !tbaa !9
  store double 0x3FC7466496CB03DE, ptr %32, align 8, !tbaa !9
  %277 = load double, ptr %32, align 8, !tbaa !9
  %278 = load double, ptr %31, align 8, !tbaa !9
  %279 = fadd double %278, %277
  store double %279, ptr %31, align 8, !tbaa !9
  %280 = load double, ptr %31, align 8, !tbaa !9
  %281 = load double, ptr %30, align 8, !tbaa !9
  %282 = fmul double %281, %280
  store double %282, ptr %30, align 8, !tbaa !9
  store double 0x3FD2492494229359, ptr %31, align 8, !tbaa !9
  %283 = load double, ptr %31, align 8, !tbaa !9
  %284 = load double, ptr %30, align 8, !tbaa !9
  %285 = fadd double %284, %283
  store double %285, ptr %30, align 8, !tbaa !9
  %286 = load double, ptr %30, align 8, !tbaa !9
  %287 = load double, ptr %29, align 8, !tbaa !9
  %288 = fmul double %287, %286
  store double %288, ptr %29, align 8, !tbaa !9
  store double 0x3FE5555555555593, ptr %30, align 8, !tbaa !9
  %289 = load double, ptr %30, align 8, !tbaa !9
  %290 = load double, ptr %29, align 8, !tbaa !9
  %291 = fadd double %290, %289
  store double %291, ptr %29, align 8, !tbaa !9
  %292 = load double, ptr %29, align 8, !tbaa !9
  %293 = load double, ptr %28, align 8, !tbaa !9
  %294 = fmul double %293, %292
  store double %294, ptr %28, align 8, !tbaa !9
  %295 = load double, ptr %28, align 8, !tbaa !9
  %296 = load double, ptr %27, align 8, !tbaa !9
  %297 = fadd double %296, %295
  store double %297, ptr %27, align 8, !tbaa !9
  %298 = load double, ptr %27, align 8, !tbaa !9
  %299 = load double, ptr %26, align 8, !tbaa !9
  %300 = fadd double %299, %298
  store double %300, ptr %26, align 8, !tbaa !9
  %301 = load double, ptr %26, align 8, !tbaa !9
  %302 = load double, ptr %25, align 8, !tbaa !9
  %303 = fmul double %302, %301
  store double %303, ptr %25, align 8, !tbaa !9
  %304 = load double, ptr %4, align 8, !tbaa !9
  store double %304, ptr %26, align 8, !tbaa !9
  %305 = load double, ptr %12, align 8, !tbaa !9
  store double %305, ptr %27, align 8, !tbaa !9
  %306 = load double, ptr %27, align 8, !tbaa !9
  %307 = load double, ptr %26, align 8, !tbaa !9
  %308 = fsub double %307, %306
  store double %308, ptr %26, align 8, !tbaa !9
  %309 = load double, ptr %11, align 8, !tbaa !9
  store double %309, ptr %27, align 8, !tbaa !9
  %310 = load double, ptr %27, align 8, !tbaa !9
  %311 = load double, ptr %26, align 8, !tbaa !9
  %312 = fsub double %311, %310
  store double %312, ptr %26, align 8, !tbaa !9
  %313 = load double, ptr %26, align 8, !tbaa !9
  %314 = load double, ptr %25, align 8, !tbaa !9
  %315 = fadd double %314, %313
  store double %315, ptr %25, align 8, !tbaa !9
  %316 = load double, ptr %25, align 8, !tbaa !9
  store double %316, ptr %4, align 8, !tbaa !9
  store double 0x3FDBCB7B15200000, ptr %26, align 8, !tbaa !9
  %317 = load double, ptr %26, align 8, !tbaa !9
  %318 = load double, ptr %25, align 8, !tbaa !9
  %319 = fmul double %318, %317
  store double %319, ptr %25, align 8, !tbaa !9
  %320 = load double, ptr %13, align 8, !tbaa !9
  store double %320, ptr %26, align 8, !tbaa !9
  store double 0x3D59FEF311F12B36, ptr %27, align 8, !tbaa !9
  %321 = load double, ptr %27, align 8, !tbaa !9
  %322 = load double, ptr %26, align 8, !tbaa !9
  %323 = fmul double %322, %321
  store double %323, ptr %26, align 8, !tbaa !9
  %324 = load double, ptr %4, align 8, !tbaa !9
  store double %324, ptr %27, align 8, !tbaa !9
  %325 = load double, ptr %12, align 8, !tbaa !9
  store double %325, ptr %28, align 8, !tbaa !9
  %326 = load double, ptr %28, align 8, !tbaa !9
  %327 = load double, ptr %27, align 8, !tbaa !9
  %328 = fadd double %327, %326
  store double %328, ptr %27, align 8, !tbaa !9
  store double 0x3DBB9438CA9AADD5, ptr %28, align 8, !tbaa !9
  %329 = load double, ptr %28, align 8, !tbaa !9
  %330 = load double, ptr %27, align 8, !tbaa !9
  %331 = fmul double %330, %329
  store double %331, ptr %27, align 8, !tbaa !9
  %332 = load double, ptr %27, align 8, !tbaa !9
  %333 = load double, ptr %26, align 8, !tbaa !9
  %334 = fadd double %333, %332
  store double %334, ptr %26, align 8, !tbaa !9
  %335 = load double, ptr %26, align 8, !tbaa !9
  %336 = load double, ptr %25, align 8, !tbaa !9
  %337 = fadd double %336, %335
  store double %337, ptr %25, align 8, !tbaa !9
  %338 = load double, ptr %25, align 8, !tbaa !9
  %339 = load double, ptr %24, align 8, !tbaa !9
  %340 = fadd double %339, %338
  store double %340, ptr %24, align 8, !tbaa !9
  %341 = load double, ptr %24, align 8, !tbaa !9
  %342 = load double, ptr %23, align 8, !tbaa !9
  %343 = fadd double %342, %341
  store double %343, ptr %23, align 8, !tbaa !9
  %344 = load double, ptr %23, align 8, !tbaa !9
  store double %344, ptr %4, align 8, !tbaa !9
  br label %345

345:                                              ; preds = %148, %110
  %346 = load double, ptr %4, align 8, !tbaa !9
  store double %346, ptr %23, align 8, !tbaa !9
  br label %347

347:                                              ; preds = %345, %131, %93, %73
  %348 = load double, ptr %23, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret double %348
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden double @f64_reinterpret_i64(i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_reinterpret_f64(double noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local double @w2c_hermes_log10(ptr nocapture noundef readnone %0, double noundef %1) local_unnamed_addr #1 {
  %3 = tail call i64 @i64_reinterpret_f64(double noundef %1)
  %4 = icmp sgt i64 %3, -1
  br i1 %4, label %5, label %.thread

5:                                                ; preds = %2
  %6 = lshr i64 %3, 32
  %7 = trunc nuw nsw i64 %6 to i32
  %8 = icmp ugt i64 %3, 4503599627370495
  br i1 %8, label %17, label %9

9:                                                ; preds = %5
  %.not = icmp eq i64 %3, 0
  br i1 %.not, label %11, label %22

.thread:                                          ; preds = %2
  %10 = and i64 %3, 9223372036854775807
  %.not210 = icmp eq i64 %10, 0
  br i1 %.not210, label %11, label %14

11:                                               ; preds = %.thread, %9
  %12 = fmul double %1, %1
  %13 = fdiv double -1.000000e+00, %12
  br label %86

14:                                               ; preds = %.thread
  %15 = fsub double %1, %1
  %16 = fdiv double %15, 0.000000e+00
  br label %86

17:                                               ; preds = %5
  %18 = icmp ugt i64 %3, 9218868437227405311
  br i1 %18, label %86, label %19

19:                                               ; preds = %17
  %.not208 = icmp eq i64 %6, 1072693248
  br i1 %.not208, label %20, label %27

20:                                               ; preds = %19
  %21 = and i64 %3, 4294967295
  %.not209 = icmp eq i64 %21, 0
  br i1 %.not209, label %86, label %27

22:                                               ; preds = %9
  %23 = fmul double %1, 0x4350000000000000
  %24 = tail call i64 @i64_reinterpret_f64(double noundef %23)
  %25 = lshr i64 %24, 32
  %26 = trunc nuw i64 %25 to i32
  br label %27

27:                                               ; preds = %19, %20, %22
  %.0204 = phi i64 [ %3, %20 ], [ %24, %22 ], [ %3, %19 ]
  %.0203 = phi i32 [ -1023, %20 ], [ -1077, %22 ], [ -1023, %19 ]
  %.0202 = phi i32 [ 1072693248, %20 ], [ %26, %22 ], [ %7, %19 ]
  %28 = add i32 %.0202, 614242
  %29 = lshr i32 %28, 20
  %30 = add nsw i32 %29, %.0203
  %31 = sitofp i32 %30 to double
  %32 = fmul double %31, 0x3FD34413509F6000
  %33 = and i64 %.0204, 4294967295
  %34 = and i32 %28, 1048575
  %35 = add nuw nsw i32 %34, 1072079006
  %36 = zext nneg i32 %35 to i64
  %37 = shl nuw nsw i64 %36, 32
  %38 = or disjoint i64 %37, %33
  %39 = tail call double @f64_reinterpret_i64(i64 noundef %38)
  %40 = fadd double %39, -1.000000e+00
  %41 = fmul double %40, 5.000000e-01
  %42 = fmul double %40, %41
  %43 = fsub double %40, %42
  %44 = tail call i64 @i64_reinterpret_f64(double noundef %43)
  %45 = and i64 %44, -4294967296
  %46 = tail call double @f64_reinterpret_i64(i64 noundef %45)
  %47 = fadd double %40, 2.000000e+00
  %48 = fdiv double %40, %47
  %49 = fmul double %48, %48
  %50 = fmul double %49, %49
  %51 = fmul double %50, 0x3FC2F112DF3E5244
  %52 = fadd double %51, 0x3FC7466496CB03DE
  %53 = insertelement <2 x double> poison, double %50, i64 0
  %54 = shufflevector <2 x double> %53, <2 x double> poison, <2 x i32> zeroinitializer
  %55 = insertelement <2 x double> <double 0x3FC39A09D078C69F, double poison>, double %52, i64 1
  %56 = fmul <2 x double> %54, %55
  %57 = fadd <2 x double> %56, <double 0x3FCC71C51D8E78AF, double 0x3FD2492494229359>
  %58 = fmul <2 x double> %54, %57
  %59 = fadd <2 x double> %58, <double 0x3FD999999997FA04, double 0x3FE5555555555593>
  %60 = insertelement <2 x double> %53, double %49, i64 1
  %61 = fmul <2 x double> %60, %59
  %shift = shufflevector <2 x double> %61, <2 x double> poison, <2 x i32> <i32 1, i32 poison>
  %62 = fadd <2 x double> %61, %shift
  %63 = extractelement <2 x double> %62, i64 0
  %64 = fadd double %42, %63
  %65 = fmul double %48, %64
  %66 = fsub double %40, %46
  %67 = fsub double %66, %42
  %68 = fadd double %67, %65
  %69 = fmul double %31, 0x3D59FEF311F12B36
  %70 = fadd double %46, %68
  %71 = fmul double %70, 0x3DBB9438CA9AADD5
  %72 = fadd double %69, %71
  %73 = insertelement <2 x double> poison, double %46, i64 0
  %74 = insertelement <2 x double> %73, double %68, i64 1
  %75 = fmul <2 x double> %74, <double 0x3FDBCB7B15200000, double 0x3FDBCB7B15200000>
  %76 = insertelement <2 x double> poison, double %32, i64 0
  %77 = insertelement <2 x double> %76, double %72, i64 1
  %78 = fadd <2 x double> %75, %77
  %79 = extractelement <2 x double> %78, i64 0
  %80 = fsub double %32, %79
  %81 = extractelement <2 x double> %75, i64 0
  %82 = fadd double %81, %80
  %83 = extractelement <2 x double> %78, i64 1
  %84 = fadd double %82, %83
  %85 = fadd double %79, %84
  br label %86

86:                                               ; preds = %27, %17, %20, %14, %11
  %.0205 = phi double [ %13, %11 ], [ %16, %14 ], [ 0.000000e+00, %20 ], [ %1, %17 ], [ %85, %27 ]
  ret double %.0205
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass,VectorCombinePass