; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_2)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #2

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
declare dso_local void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenStatement0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x2C0x20hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AIsLoopBody0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #4

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenFunctionBody0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2) #4 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %13 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %13, ptr %8, align 4, !tbaa !9
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = icmp ne i32 %14, 0
  br i1 %15, label %16, label %84

16:                                               ; preds = %3
  %17 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %17, ptr %8, align 4, !tbaa !9
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.w2c_hermes, ptr %18, i32 0, i32 6
  %20 = load i32, ptr %8, align 4, !tbaa !9
  %21 = zext i32 %20 to i64
  %22 = add i64 %21, 8
  %23 = call i32 @i32_load(ptr noundef %19, i64 noundef %22)
  store i32 %23, ptr %8, align 4, !tbaa !9
  store i32 20, ptr %9, align 4, !tbaa !9
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = load i32, ptr %9, align 4, !tbaa !9
  %26 = icmp eq i32 %24, %25
  %27 = zext i1 %26 to i32
  store i32 %27, ptr %8, align 4, !tbaa !9
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = icmp ne i32 %28, 0
  br i1 %29, label %30, label %76

30:                                               ; preds = %16
  %31 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %31, ptr %8, align 4, !tbaa !9
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.w2c_hermes, ptr %32, i32 0, i32 6
  %34 = load i32, ptr %8, align 4, !tbaa !9
  %35 = zext i32 %34 to i64
  %36 = add i64 %35, 40
  %37 = call i32 @i32_load(ptr noundef %33, i64 noundef %36)
  store i32 %37, ptr %8, align 4, !tbaa !9
  %38 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %38, ptr %7, align 4, !tbaa !9
  %39 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %39, ptr %9, align 4, !tbaa !9
  store i32 36, ptr %10, align 4, !tbaa !9
  %40 = load i32, ptr %10, align 4, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = add i32 %41, %40
  store i32 %42, ptr %9, align 4, !tbaa !9
  %43 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %43, ptr %6, align 4, !tbaa !9
  %44 = load i32, ptr %8, align 4, !tbaa !9
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = icmp eq i32 %44, %45
  %47 = zext i1 %46 to i32
  store i32 %47, ptr %8, align 4, !tbaa !9
  %48 = load i32, ptr %8, align 4, !tbaa !9
  %49 = icmp ne i32 %48, 0
  br i1 %49, label %50, label %51

50:                                               ; preds = %30
  br label %83

51:                                               ; preds = %30
  br label %52

52:                                               ; preds = %74, %51
  %53 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %53, ptr %8, align 4, !tbaa !9
  %54 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %54, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = load i32, ptr %8, align 4, !tbaa !9
  %57 = load i32, ptr %9, align 4, !tbaa !9
  %58 = load i32, ptr %10, align 4, !tbaa !9
  call void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenStatement0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x2C0x20hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AIsLoopBody0x29(ptr noundef %55, i32 noundef %56, i32 noundef %57, i32 noundef %58)
  %59 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %59, ptr %8, align 4, !tbaa !9
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.w2c_hermes, ptr %60, i32 0, i32 6
  %62 = load i32, ptr %8, align 4, !tbaa !9
  %63 = zext i32 %62 to i64
  %64 = add i64 %63, 4
  %65 = call i32 @i32_load(ptr noundef %61, i64 noundef %64)
  store i32 %65, ptr %8, align 4, !tbaa !9
  %66 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %66, ptr %7, align 4, !tbaa !9
  %67 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %67, ptr %9, align 4, !tbaa !9
  %68 = load i32, ptr %8, align 4, !tbaa !9
  %69 = load i32, ptr %9, align 4, !tbaa !9
  %70 = icmp ne i32 %68, %69
  %71 = zext i1 %70 to i32
  store i32 %71, ptr %8, align 4, !tbaa !9
  %72 = load i32, ptr %8, align 4, !tbaa !9
  %73 = icmp ne i32 %72, 0
  br i1 %73, label %74, label %75

74:                                               ; preds = %52
  br label %52

75:                                               ; preds = %52
  br label %83

76:                                               ; preds = %16
  %77 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %77, ptr %8, align 4, !tbaa !9
  %78 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %78, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  %79 = load ptr, ptr %4, align 8, !tbaa !5
  %80 = load i32, ptr %8, align 4, !tbaa !9
  %81 = load i32, ptr %9, align 4, !tbaa !9
  %82 = load i32, ptr %10, align 4, !tbaa !9
  call void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenStatement0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x2C0x20hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AIsLoopBody0x29(ptr noundef %79, i32 noundef %80, i32 noundef %81, i32 noundef %82)
  br label %83

83:                                               ; preds = %76, %75, %50
  br label %101

84:                                               ; preds = %3
  store i32 0, ptr %8, align 4, !tbaa !9
  store i32 147142, ptr %9, align 4, !tbaa !9
  %85 = load i32, ptr %9, align 4, !tbaa !9
  %86 = load i32, ptr %8, align 4, !tbaa !9
  %87 = add i32 %86, %85
  store i32 %87, ptr %8, align 4, !tbaa !9
  %88 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %88, ptr %9, align 4, !tbaa !9
  store i32 82611, ptr %10, align 4, !tbaa !9
  %89 = load i32, ptr %10, align 4, !tbaa !9
  %90 = load i32, ptr %9, align 4, !tbaa !9
  %91 = add i32 %90, %89
  store i32 %91, ptr %9, align 4, !tbaa !9
  store i32 106, ptr %10, align 4, !tbaa !9
  %92 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %92, ptr %11, align 4, !tbaa !9
  store i32 28119, ptr %12, align 4, !tbaa !9
  %93 = load i32, ptr %12, align 4, !tbaa !9
  %94 = load i32, ptr %11, align 4, !tbaa !9
  %95 = add i32 %94, %93
  store i32 %95, ptr %11, align 4, !tbaa !9
  %96 = load ptr, ptr %4, align 8, !tbaa !5
  %97 = load i32, ptr %8, align 4, !tbaa !9
  %98 = load i32, ptr %9, align 4, !tbaa !9
  %99 = load i32, ptr %10, align 4, !tbaa !9
  %100 = load i32, ptr %11, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %96, i32 noundef %97, i32 noundef %98, i32 noundef %99, i32 noundef %100)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

101:                                              ; preds = %83
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #1

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenStatement0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x2C0x20hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AIsLoopBody0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenFunctionBody0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #3 {
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %19, label %4

4:                                                ; preds = %3
  %5 = getelementptr inbounds i8, ptr %0, i64 40
  %6 = zext i32 %2 to i64
  %7 = add nuw nsw i64 %6, 8
  %8 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %7)
  %9 = icmp eq i32 %8, 20
  br i1 %9, label %10, label %18

10:                                               ; preds = %4
  %11 = add nuw nsw i64 %6, 40
  %12 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %11)
  %13 = add i32 %2, 36
  %14 = icmp eq i32 %12, %13
  br i1 %14, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %10, %.preheader
  %.0 = phi i32 [ %17, %.preheader ], [ %12, %10 ]
  tail call void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenStatement0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x2C0x20hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AIsLoopBody0x29(ptr noundef %0, i32 noundef %1, i32 noundef %.0, i32 noundef 0)
  %15 = zext i32 %.0 to i64
  %16 = add nuw nsw i64 %15, 4
  %17 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %16)
  %.not53 = icmp eq i32 %17, %13
  br i1 %.not53, label %.loopexit, label %.preheader

18:                                               ; preds = %4
  tail call void @w2c_hermes_hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AgenStatement0x28hermes0x3A0x3AESTree0x3A0x3ANode0x2A0x2C0x20hermes0x3A0x3Airgen0x3A0x3AESTreeIRGen0x3A0x3AIsLoopBody0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef 0)
  br label %.loopexit

19:                                               ; preds = %3
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 147142, i32 noundef 82611, i32 noundef 106, i32 noundef 28119) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

.loopexit:                                        ; preds = %.preheader, %18, %10
  ret void
}

attributes #0 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass