; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_load(ptr noundef, i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AOldGen0x3A0x3AfinishAlloc0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x2A0x2C0x20unsigned0x20int0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #4 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  store i64 0, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #5
  %18 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %18, ptr %10, align 4, !tbaa !9
  %19 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %19, ptr %11, align 4, !tbaa !9
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.w2c_hermes, ptr %20, i32 0, i32 6
  %22 = load i32, ptr %11, align 4, !tbaa !9
  %23 = zext i32 %22 to i64
  %24 = add i64 %23, 48
  %25 = call i64 @i64_load(ptr noundef %21, i64 noundef %24)
  store i64 %25, ptr %16, align 8, !tbaa !11
  %26 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %26, ptr %12, align 4, !tbaa !9
  %27 = load i32, ptr %12, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  store i64 %28, ptr %17, align 8, !tbaa !11
  %29 = load i64, ptr %17, align 8, !tbaa !11
  %30 = load i64, ptr %16, align 8, !tbaa !11
  %31 = add i64 %30, %29
  store i64 %31, ptr %16, align 8, !tbaa !11
  %32 = load i64, ptr %16, align 8, !tbaa !11
  store i64 %32, ptr %9, align 8, !tbaa !11
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.w2c_hermes, ptr %33, i32 0, i32 6
  %35 = load i32, ptr %10, align 4, !tbaa !9
  %36 = zext i32 %35 to i64
  %37 = add i64 %36, 48
  %38 = load i64, ptr %16, align 8, !tbaa !11
  call void @i64_store(ptr noundef %34, i64 noundef %37, i64 noundef %38)
  %39 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %39, ptr %10, align 4, !tbaa !9
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.w2c_hermes, ptr %40, i32 0, i32 6
  %42 = load i32, ptr %10, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  %44 = add i64 %43, 24
  %45 = call i32 @i32_load(ptr noundef %41, i64 noundef %44)
  store i32 %45, ptr %10, align 4, !tbaa !9
  %46 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %46, ptr %11, align 4, !tbaa !9
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.w2c_hermes, ptr %47, i32 0, i32 6
  %49 = load i32, ptr %11, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = call i32 @i32_load(ptr noundef %48, i64 noundef %50)
  store i32 %51, ptr %11, align 4, !tbaa !9
  store i32 4464, ptr %12, align 4, !tbaa !9
  %52 = load i32, ptr %12, align 4, !tbaa !9
  %53 = load i32, ptr %11, align 4, !tbaa !9
  %54 = add i32 %53, %52
  store i32 %54, ptr %11, align 4, !tbaa !9
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.w2c_hermes, ptr %55, i32 0, i32 6
  %57 = load i32, ptr %11, align 4, !tbaa !9
  %58 = zext i32 %57 to i64
  %59 = call i32 @i32_load(ptr noundef %56, i64 noundef %58)
  store i32 %59, ptr %11, align 4, !tbaa !9
  store i32 0, ptr %12, align 4, !tbaa !9
  %60 = load i32, ptr %11, align 4, !tbaa !9
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = icmp ne i32 %60, %61
  %63 = zext i1 %62 to i32
  store i32 %63, ptr %11, align 4, !tbaa !9
  %64 = load i32, ptr %11, align 4, !tbaa !9
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = add i32 %65, %64
  store i32 %66, ptr %10, align 4, !tbaa !9
  store i32 4108288, ptr %11, align 4, !tbaa !9
  %67 = load i32, ptr %11, align 4, !tbaa !9
  %68 = load i32, ptr %10, align 4, !tbaa !9
  %69 = mul i32 %68, %67
  store i32 %69, ptr %10, align 4, !tbaa !9
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = zext i32 %70 to i64
  store i64 %71, ptr %15, align 8, !tbaa !11
  %72 = load i64, ptr %9, align 8, !tbaa !11
  store i64 %72, ptr %16, align 8, !tbaa !11
  %73 = load i64, ptr %15, align 8, !tbaa !11
  %74 = load i64, ptr %16, align 8, !tbaa !11
  %75 = icmp uge i64 %73, %74
  %76 = zext i1 %75 to i32
  store i32 %76, ptr %10, align 4, !tbaa !9
  %77 = load i32, ptr %10, align 4, !tbaa !9
  %78 = icmp ne i32 %77, 0
  br i1 %78, label %79, label %164

79:                                               ; preds = %4
  %80 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %80, ptr %10, align 4, !tbaa !9
  store i32 -4194304, ptr %11, align 4, !tbaa !9
  %81 = load i32, ptr %11, align 4, !tbaa !9
  %82 = load i32, ptr %10, align 4, !tbaa !9
  %83 = and i32 %82, %81
  store i32 %83, ptr %10, align 4, !tbaa !9
  store i32 16384, ptr %11, align 4, !tbaa !9
  %84 = load i32, ptr %11, align 4, !tbaa !9
  %85 = load i32, ptr %10, align 4, !tbaa !9
  %86 = or i32 %85, %84
  store i32 %86, ptr %10, align 4, !tbaa !9
  %87 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %87, ptr %6, align 4, !tbaa !9
  %88 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %88, ptr %11, align 4, !tbaa !9
  %89 = load i32, ptr %10, align 4, !tbaa !9
  %90 = load i32, ptr %11, align 4, !tbaa !9
  %91 = icmp ugt i32 %89, %90
  %92 = zext i1 %91 to i32
  store i32 %92, ptr %10, align 4, !tbaa !9
  %93 = load i32, ptr %10, align 4, !tbaa !9
  %94 = icmp ne i32 %93, 0
  br i1 %94, label %95, label %96

95:                                               ; preds = %79
  br label %182

96:                                               ; preds = %79
  %97 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %97, ptr %10, align 4, !tbaa !9
  store i32 -4194304, ptr %11, align 4, !tbaa !9
  %98 = load i32, ptr %11, align 4, !tbaa !9
  %99 = load i32, ptr %10, align 4, !tbaa !9
  %100 = and i32 %99, %98
  store i32 %100, ptr %10, align 4, !tbaa !9
  store i32 4194304, ptr %11, align 4, !tbaa !9
  %101 = load i32, ptr %11, align 4, !tbaa !9
  %102 = load i32, ptr %10, align 4, !tbaa !9
  %103 = add i32 %102, %101
  store i32 %103, ptr %10, align 4, !tbaa !9
  %104 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %104, ptr %11, align 4, !tbaa !9
  %105 = load i32, ptr %10, align 4, !tbaa !9
  %106 = load i32, ptr %11, align 4, !tbaa !9
  %107 = icmp ule i32 %105, %106
  %108 = zext i1 %107 to i32
  store i32 %108, ptr %10, align 4, !tbaa !9
  %109 = load i32, ptr %10, align 4, !tbaa !9
  %110 = icmp ne i32 %109, 0
  br i1 %110, label %111, label %112

111:                                              ; preds = %96
  br label %182

112:                                              ; preds = %96
  %113 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %113, ptr %10, align 4, !tbaa !9
  %114 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %114, ptr %11, align 4, !tbaa !9
  %115 = load i32, ptr %11, align 4, !tbaa !9
  %116 = load i32, ptr %10, align 4, !tbaa !9
  %117 = sub i32 %116, %115
  store i32 %117, ptr %10, align 4, !tbaa !9
  %118 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %118, ptr %8, align 4, !tbaa !9
  store i32 4194304, ptr %11, align 4, !tbaa !9
  %119 = load i32, ptr %10, align 4, !tbaa !9
  %120 = load i32, ptr %11, align 4, !tbaa !9
  %121 = icmp uge i32 %119, %120
  %122 = zext i1 %121 to i32
  store i32 %122, ptr %10, align 4, !tbaa !9
  %123 = load i32, ptr %10, align 4, !tbaa !9
  %124 = icmp ne i32 %123, 0
  br i1 %124, label %125, label %126

125:                                              ; preds = %112
  br label %200

126:                                              ; preds = %112
  %127 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %127, ptr %10, align 4, !tbaa !9
  %128 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %128, ptr %11, align 4, !tbaa !9
  store i32 6, ptr %12, align 4, !tbaa !9
  %129 = load i32, ptr %12, align 4, !tbaa !9
  %130 = and i32 %129, 31
  %131 = load i32, ptr %11, align 4, !tbaa !9
  %132 = lshr i32 %131, %130
  store i32 %132, ptr %11, align 4, !tbaa !9
  store i32 67108860, ptr %12, align 4, !tbaa !9
  %133 = load i32, ptr %12, align 4, !tbaa !9
  %134 = load i32, ptr %11, align 4, !tbaa !9
  %135 = and i32 %134, %133
  store i32 %135, ptr %11, align 4, !tbaa !9
  %136 = load i32, ptr %11, align 4, !tbaa !9
  %137 = load i32, ptr %10, align 4, !tbaa !9
  %138 = add i32 %137, %136
  store i32 %138, ptr %10, align 4, !tbaa !9
  %139 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %139, ptr %6, align 4, !tbaa !9
  %140 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %140, ptr %11, align 4, !tbaa !9
  %141 = load ptr, ptr %5, align 8, !tbaa !5
  %142 = getelementptr inbounds %struct.w2c_hermes, ptr %141, i32 0, i32 6
  %143 = load i32, ptr %11, align 4, !tbaa !9
  %144 = zext i32 %143 to i64
  %145 = call i32 @i32_load(ptr noundef %142, i64 noundef %144)
  store i32 %145, ptr %11, align 4, !tbaa !9
  store i32 1, ptr %12, align 4, !tbaa !9
  %146 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %146, ptr %13, align 4, !tbaa !9
  store i32 3, ptr %14, align 4, !tbaa !9
  %147 = load i32, ptr %14, align 4, !tbaa !9
  %148 = and i32 %147, 31
  %149 = load i32, ptr %13, align 4, !tbaa !9
  %150 = lshr i32 %149, %148
  store i32 %150, ptr %13, align 4, !tbaa !9
  %151 = load i32, ptr %13, align 4, !tbaa !9
  %152 = and i32 %151, 31
  %153 = load i32, ptr %12, align 4, !tbaa !9
  %154 = shl i32 %153, %152
  store i32 %154, ptr %12, align 4, !tbaa !9
  %155 = load i32, ptr %12, align 4, !tbaa !9
  %156 = load i32, ptr %11, align 4, !tbaa !9
  %157 = or i32 %156, %155
  store i32 %157, ptr %11, align 4, !tbaa !9
  %158 = load ptr, ptr %5, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.w2c_hermes, ptr %158, i32 0, i32 6
  %160 = load i32, ptr %10, align 4, !tbaa !9
  %161 = zext i32 %160 to i64
  %162 = load i32, ptr %11, align 4, !tbaa !9
  call void @i32_store(ptr noundef %159, i64 noundef %161, i32 noundef %162)
  %163 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %163, ptr %10, align 4, !tbaa !9
  br label %218

164:                                              ; preds = %4
  store i32 0, ptr %10, align 4, !tbaa !9
  %165 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %165, ptr %7, align 4, !tbaa !9
  store i32 131403, ptr %11, align 4, !tbaa !9
  %166 = load i32, ptr %11, align 4, !tbaa !9
  %167 = load i32, ptr %10, align 4, !tbaa !9
  %168 = add i32 %167, %166
  store i32 %168, ptr %10, align 4, !tbaa !9
  %169 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %169, ptr %11, align 4, !tbaa !9
  store i32 62693, ptr %12, align 4, !tbaa !9
  %170 = load i32, ptr %12, align 4, !tbaa !9
  %171 = load i32, ptr %11, align 4, !tbaa !9
  %172 = add i32 %171, %170
  store i32 %172, ptr %11, align 4, !tbaa !9
  store i32 2855, ptr %12, align 4, !tbaa !9
  %173 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %173, ptr %13, align 4, !tbaa !9
  store i32 44390, ptr %14, align 4, !tbaa !9
  %174 = load i32, ptr %14, align 4, !tbaa !9
  %175 = load i32, ptr %13, align 4, !tbaa !9
  %176 = add i32 %175, %174
  store i32 %176, ptr %13, align 4, !tbaa !9
  %177 = load ptr, ptr %5, align 8, !tbaa !5
  %178 = load i32, ptr %10, align 4, !tbaa !9
  %179 = load i32, ptr %11, align 4, !tbaa !9
  %180 = load i32, ptr %12, align 4, !tbaa !9
  %181 = load i32, ptr %13, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %177, i32 noundef %178, i32 noundef %179, i32 noundef %180, i32 noundef %181)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

182:                                              ; preds = %111, %95
  store i32 0, ptr %10, align 4, !tbaa !9
  %183 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %183, ptr %7, align 4, !tbaa !9
  store i32 170852, ptr %11, align 4, !tbaa !9
  %184 = load i32, ptr %11, align 4, !tbaa !9
  %185 = load i32, ptr %10, align 4, !tbaa !9
  %186 = add i32 %185, %184
  store i32 %186, ptr %10, align 4, !tbaa !9
  %187 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %187, ptr %11, align 4, !tbaa !9
  store i32 86240, ptr %12, align 4, !tbaa !9
  %188 = load i32, ptr %12, align 4, !tbaa !9
  %189 = load i32, ptr %11, align 4, !tbaa !9
  %190 = add i32 %189, %188
  store i32 %190, ptr %11, align 4, !tbaa !9
  store i32 118, ptr %12, align 4, !tbaa !9
  %191 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %191, ptr %13, align 4, !tbaa !9
  store i32 19893, ptr %14, align 4, !tbaa !9
  %192 = load i32, ptr %14, align 4, !tbaa !9
  %193 = load i32, ptr %13, align 4, !tbaa !9
  %194 = add i32 %193, %192
  store i32 %194, ptr %13, align 4, !tbaa !9
  %195 = load ptr, ptr %5, align 8, !tbaa !5
  %196 = load i32, ptr %10, align 4, !tbaa !9
  %197 = load i32, ptr %11, align 4, !tbaa !9
  %198 = load i32, ptr %12, align 4, !tbaa !9
  %199 = load i32, ptr %13, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %195, i32 noundef %196, i32 noundef %197, i32 noundef %198, i32 noundef %199)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

200:                                              ; preds = %125
  store i32 0, ptr %10, align 4, !tbaa !9
  %201 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %201, ptr %7, align 4, !tbaa !9
  store i32 169713, ptr %11, align 4, !tbaa !9
  %202 = load i32, ptr %11, align 4, !tbaa !9
  %203 = load i32, ptr %10, align 4, !tbaa !9
  %204 = add i32 %203, %202
  store i32 %204, ptr %10, align 4, !tbaa !9
  %205 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %205, ptr %11, align 4, !tbaa !9
  store i32 86240, ptr %12, align 4, !tbaa !9
  %206 = load i32, ptr %12, align 4, !tbaa !9
  %207 = load i32, ptr %11, align 4, !tbaa !9
  %208 = add i32 %207, %206
  store i32 %208, ptr %11, align 4, !tbaa !9
  store i32 139, ptr %12, align 4, !tbaa !9
  %209 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %209, ptr %13, align 4, !tbaa !9
  store i32 74698, ptr %14, align 4, !tbaa !9
  %210 = load i32, ptr %14, align 4, !tbaa !9
  %211 = load i32, ptr %13, align 4, !tbaa !9
  %212 = add i32 %211, %210
  store i32 %212, ptr %13, align 4, !tbaa !9
  %213 = load ptr, ptr %5, align 8, !tbaa !5
  %214 = load i32, ptr %10, align 4, !tbaa !9
  %215 = load i32, ptr %11, align 4, !tbaa !9
  %216 = load i32, ptr %12, align 4, !tbaa !9
  %217 = load i32, ptr %13, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %213, i32 noundef %214, i32 noundef %215, i32 noundef %216, i32 noundef %217)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

218:                                              ; preds = %126
  %219 = load i32, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  ret i32 %219
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_load(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i32 16384, -1) i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AOldGen0x3A0x3AfinishAlloc0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x2A0x2C0x20unsigned0x20int0x29(ptr noundef %0, i32 noundef %1, i32 noundef returned %2, i32 noundef %3) local_unnamed_addr #3 {
  %5 = getelementptr inbounds i8, ptr %0, i64 40
  %6 = zext i32 %1 to i64
  %7 = add nuw nsw i64 %6, 48
  %8 = tail call i64 @i64_load(ptr noundef nonnull %5, i64 noundef %7)
  %9 = sext i32 %3 to i64
  %10 = add i64 %8, %9
  tail call void @i64_store(ptr noundef nonnull %5, i64 noundef %7, i64 noundef %10)
  %11 = add nuw nsw i64 %6, 24
  %12 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %11)
  %13 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %6)
  %14 = add i32 %13, 4464
  %15 = zext i32 %14 to i64
  %16 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %15)
  %17 = icmp ne i32 %16, 0
  %18 = zext i1 %17 to i32
  %19 = add i32 %12, %18
  %20 = mul i32 %19, 4108288
  %21 = zext i32 %20 to i64
  %.not = icmp ugt i64 %10, %21
  br i1 %.not, label %40, label %22

22:                                               ; preds = %4
  %23 = and i32 %2, -4194304
  %24 = or disjoint i32 %23, 16384
  %25 = icmp ule i32 %24, %2
  %26 = add i32 %23, 4194304
  %.not127 = icmp ugt i32 %26, %2
  %or.cond = and i1 %25, %.not127
  br i1 %or.cond, label %27, label %41

27:                                               ; preds = %22
  %28 = sub i32 %2, %24
  %29 = icmp ugt i32 %28, 4194303
  br i1 %29, label %42, label %30

30:                                               ; preds = %27
  %31 = lshr i32 %28, 6
  %32 = and i32 %31, 65532
  %33 = add nuw nsw i32 %32, %24
  %34 = zext i32 %33 to i64
  %35 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %34)
  %36 = lshr i32 %2, 3
  %37 = and i32 %36, 31
  %38 = shl nuw i32 1, %37
  %39 = or i32 %35, %38
  tail call void @i32_store(ptr noundef nonnull %5, i64 noundef %34, i32 noundef %39)
  ret i32 %2

40:                                               ; preds = %4
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 131403, i32 noundef 62693, i32 noundef 2855, i32 noundef 44390) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

41:                                               ; preds = %22
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 170852, i32 noundef 86240, i32 noundef 118, i32 noundef 19893) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

42:                                               ; preds = %27
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 169713, i32 noundef 86240, i32 noundef 139, i32 noundef 74698) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass