; LLVM IR from DionysiosB/CodeForces :: 0600-0699 (622D-OptimalNumberPermutation)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@.str = external hidden unnamed_addr constant [4 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [1 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 personality ptr @__gxx_personality_v0 {
  %1 = alloca i32, align 4
  %2 = alloca i64, align 8
  %3 = alloca %"class.std::vector", align 8
  %4 = alloca i64, align 8
  %5 = alloca %"class.std::allocator", align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
  %10 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef @.str, ptr noundef %2)
  call void @llvm.lifetime.start.p0(i64 24, ptr %3) #5
  %11 = load i64, ptr %2, align 8, !tbaa !5
  %12 = mul nsw i64 2, %11
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  store i64 0, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #5
  call void @_ZNSaIlEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #5
  invoke void @_ZNSt6vectorIlSaIlEEC2EmRKlRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %12, ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 1 dereferenceable(1) %5)
          to label %13 unwind label %19

13:                                               ; preds = %0
  call void @_ZNSt15__new_allocatorIlED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  store i64 1, ptr %8, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %54, %13
  %15 = load i64, ptr %8, align 8, !tbaa !5
  %16 = load i64, ptr %2, align 8, !tbaa !5
  %17 = icmp slt i64 %15, %16
  br i1 %17, label %23, label %18

18:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  br label %57

19:                                               ; preds = %0
  %20 = landingpad { ptr, i32 }
          cleanup
  %21 = extractvalue { ptr, i32 } %20, 0
  store ptr %21, ptr %6, align 8
  %22 = extractvalue { ptr, i32 } %20, 1
  store i32 %22, ptr %7, align 4
  call void @_ZNSt15__new_allocatorIlED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  br label %108

23:                                               ; preds = %14
  %24 = load i64, ptr %8, align 8, !tbaa !5
  %25 = and i64 %24, 1
  %26 = icmp ne i64 %25, 0
  br i1 %26, label %27, label %38

27:                                               ; preds = %23
  %28 = load i64, ptr %8, align 8, !tbaa !5
  %29 = load i64, ptr %2, align 8, !tbaa !5
  %30 = load i64, ptr %8, align 8, !tbaa !5
  %31 = add nsw i64 %30, 1
  %32 = sdiv i64 %31, 2
  %33 = sub nsw i64 %29, %32
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %33) #5
  store i64 %28, ptr %34, align 8, !tbaa !5
  %35 = load i64, ptr %8, align 8, !tbaa !5
  %36 = sdiv i64 %35, 2
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %36) #5
  store i64 %28, ptr %37, align 8, !tbaa !5
  br label %53

38:                                               ; preds = %23
  %39 = load i64, ptr %8, align 8, !tbaa !5
  %40 = load i64, ptr %2, align 8, !tbaa !5
  %41 = mul nsw i64 2, %40
  %42 = sub nsw i64 %41, 1
  %43 = load i64, ptr %8, align 8, !tbaa !5
  %44 = sdiv i64 %43, 2
  %45 = sub nsw i64 %42, %44
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %45) #5
  store i64 %39, ptr %46, align 8, !tbaa !5
  %47 = load i64, ptr %2, align 8, !tbaa !5
  %48 = sub nsw i64 %47, 1
  %49 = load i64, ptr %8, align 8, !tbaa !5
  %50 = sdiv i64 %49, 2
  %51 = add nsw i64 %48, %50
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %51) #5
  store i64 %39, ptr %52, align 8, !tbaa !5
  br label %53

53:                                               ; preds = %38, %27
  br label %54

54:                                               ; preds = %53
  %55 = load i64, ptr %8, align 8, !tbaa !5
  %56 = add nsw i64 %55, 1
  store i64 %56, ptr %8, align 8, !tbaa !5
  br label %14, !llvm.loop !9

57:                                               ; preds = %18
  %58 = load i64, ptr %2, align 8, !tbaa !5
  %59 = load i64, ptr %2, align 8, !tbaa !5
  %60 = mul nsw i64 2, %59
  %61 = sub nsw i64 %60, 1
  %62 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %61) #5
  store i64 %58, ptr %62, align 8, !tbaa !5
  %63 = load i64, ptr %2, align 8, !tbaa !5
  %64 = and i64 %63, 1
  %65 = icmp ne i64 %64, 0
  br i1 %65, label %66, label %71

66:                                               ; preds = %57
  %67 = load i64, ptr %2, align 8, !tbaa !5
  %68 = load i64, ptr %2, align 8, !tbaa !5
  %69 = sdiv i64 %68, 2
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %69) #5
  store i64 %67, ptr %70, align 8, !tbaa !5
  br label %79

71:                                               ; preds = %57
  %72 = load i64, ptr %2, align 8, !tbaa !5
  %73 = load i64, ptr %2, align 8, !tbaa !5
  %74 = sub nsw i64 %73, 1
  %75 = load i64, ptr %2, align 8, !tbaa !5
  %76 = sdiv i64 %75, 2
  %77 = add nsw i64 %74, %76
  %78 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %77) #5
  store i64 %72, ptr %78, align 8, !tbaa !5
  br label %79

79:                                               ; preds = %71, %66
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  store i64 0, ptr %9, align 8, !tbaa !5
  br label %80

80:                                               ; preds = %92, %79
  %81 = load i64, ptr %9, align 8, !tbaa !5
  %82 = load i64, ptr %2, align 8, !tbaa !5
  %83 = mul nsw i64 2, %82
  %84 = icmp slt i64 %81, %83
  br i1 %84, label %86, label %85

85:                                               ; preds = %80
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %99

86:                                               ; preds = %80
  %87 = load i64, ptr %9, align 8, !tbaa !5
  %88 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %87) #5
  %89 = load i64, ptr %88, align 8, !tbaa !5
  %90 = invoke i32 (ptr, ...) @printf(ptr noundef @.str.1, i64 noundef %89)
          to label %91 unwind label %95

91:                                               ; preds = %86
  br label %92

92:                                               ; preds = %91
  %93 = load i64, ptr %9, align 8, !tbaa !5
  %94 = add nsw i64 %93, 1
  store i64 %94, ptr %9, align 8, !tbaa !5
  br label %80, !llvm.loop !11

95:                                               ; preds = %86
  %96 = landingpad { ptr, i32 }
          cleanup
  %97 = extractvalue { ptr, i32 } %96, 0
  store ptr %97, ptr %6, align 8
  %98 = extractvalue { ptr, i32 } %96, 1
  store i32 %98, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %107

99:                                               ; preds = %85
  %100 = invoke i32 @puts(ptr noundef @.str.2)
          to label %101 unwind label %103

101:                                              ; preds = %99
  store i32 0, ptr %1, align 4
  call void @_ZNSt6vectorIlSaIlEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  %102 = load i32, ptr %1, align 4
  ret i32 %102

103:                                              ; preds = %99
  %104 = landingpad { ptr, i32 }
          cleanup
  %105 = extractvalue { ptr, i32 } %104, 0
  store ptr %105, ptr %6, align 8
  %106 = extractvalue { ptr, i32 } %104, 1
  store i32 %106, ptr %7, align 4
  br label %107

107:                                              ; preds = %103, %95
  call void @_ZNSt6vectorIlSaIlEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #5
  br label %108

108:                                              ; preds = %107, %19
  call void @llvm.lifetime.end.p0(i64 24, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
  br label %109

109:                                              ; preds = %108
  %110 = load ptr, ptr %6, align 8
  %111 = load i32, ptr %7, align 4
  %112 = insertvalue { ptr, i32 } poison, ptr %110, 0
  %113 = insertvalue { ptr, i32 } %112, i32 %111, 1
  resume { ptr, i32 } %113
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @__isoc99_scanf(ptr noundef, ...) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIlEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIlSaIlEEC2EmRKlRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

declare i32 @printf(ptr noundef, ...) #2

declare i32 @puts(ptr noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIlSaIlEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIlED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #3 align 2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long, std::allocator<long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

@.str = external hidden unnamed_addr constant [4 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [1 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %1 = alloca i64, align 8
  %2 = alloca %"class.std::vector", align 8
  %3 = alloca i64, align 8
  %4 = alloca %"class.std::allocator", align 1
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #5
  %5 = call i32 (ptr, ...) @__isoc99_scanf(ptr noundef nonnull @.str, ptr noundef nonnull %1)
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #5
  %6 = load i64, ptr %1, align 8, !tbaa !5
  %7 = shl nsw i64 %6, 1
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  store i64 0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #5
  call void @_ZNSaIlEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  invoke void @_ZNSt6vectorIlSaIlEEC2EmRKlRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %7, ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 1 dereferenceable(1) %4)
          to label %8 unwind label %16

8:                                                ; preds = %0
  call void @_ZNSt15__new_allocatorIlED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  %9 = load i64, ptr %1, align 8, !tbaa !5
  %10 = icmp sgt i64 %9, 1
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %37, %8
  %.lcssa = phi i64 [ %9, %8 ], [ %38, %37 ]
  %11 = shl nsw i64 %.lcssa, 1
  %12 = add nsw i64 %11, -1
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %12) #5
  store i64 %.lcssa, ptr %13, align 8, !tbaa !5
  %14 = load i64, ptr %1, align 8, !tbaa !5
  %15 = and i64 %14, 1
  %.not = icmp eq i64 %15, 0
  br i1 %.not, label %42, label %40

16:                                               ; preds = %0
  %17 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIlED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %4) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #5
  resume { ptr, i32 } %17

.lr.ph:                                           ; preds = %8, %37
  %18 = phi i64 [ %38, %37 ], [ %9, %8 ]
  %.01417 = phi i64 [ %.pre-phi, %37 ], [ 1, %8 ]
  %19 = and i64 %.01417, 1
  %.not16 = icmp eq i64 %19, 0
  br i1 %.not16, label %27, label %20

20:                                               ; preds = %.lr.ph
  %21 = add nuw nsw i64 %.01417, 1
  %22 = lshr exact i64 %21, 1
  %23 = sub nsw i64 %18, %22
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %23) #5
  store i64 %.01417, ptr %24, align 8, !tbaa !5
  %25 = lshr i64 %.01417, 1
  %26 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %25) #5
  store i64 %.01417, ptr %26, align 8, !tbaa !5
  br label %37

27:                                               ; preds = %.lr.ph
  %28 = shl nsw i64 %18, 1
  %29 = lshr exact i64 %.01417, 1
  %30 = xor i64 %29, -1
  %31 = add i64 %28, %30
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %31) #5
  store i64 %.01417, ptr %32, align 8, !tbaa !5
  %33 = load i64, ptr %1, align 8, !tbaa !5
  %34 = add nsw i64 %29, -1
  %35 = add i64 %34, %33
  %36 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %35) #5
  store i64 %.01417, ptr %36, align 8, !tbaa !5
  %.pre = or disjoint i64 %.01417, 1
  br label %37

37:                                               ; preds = %20, %27
  %.pre-phi = phi i64 [ %21, %20 ], [ %.pre, %27 ]
  %38 = load i64, ptr %1, align 8, !tbaa !5
  %39 = icmp slt i64 %.pre-phi, %38
  br i1 %39, label %.lr.ph, label %._crit_edge, !llvm.loop !9

40:                                               ; preds = %._crit_edge
  %41 = sdiv i64 %14, 2
  br label %46

42:                                               ; preds = %._crit_edge
  %43 = add nsw i64 %14, -1
  %44 = ashr exact i64 %14, 1
  %45 = add nsw i64 %43, %44
  br label %46

46:                                               ; preds = %42, %40
  %.sink24 = phi i64 [ %45, %42 ], [ %41, %40 ]
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %.sink24) #5
  store i64 %14, ptr %47, align 8, !tbaa !5
  %48 = load i64, ptr %1, align 8, !tbaa !5
  %49 = icmp sgt i64 %48, 0
  br i1 %49, label %.lr.ph20, label %._crit_edge21

._crit_edge21:                                    ; preds = %.lr.ph20, %46
  %50 = call i32 @puts(ptr noundef nonnull dereferenceable(1) @.str.2)
  call void @_ZNSt6vectorIlSaIlEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #5
  ret i32 0

.lr.ph20:                                         ; preds = %46, %.lr.ph20
  %.018 = phi i64 [ %54, %.lr.ph20 ], [ 0, %46 ]
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %.018) #5
  %52 = load i64, ptr %51, align 8, !tbaa !5
  %53 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i64 noundef %52)
  %54 = add nuw nsw i64 %.018, 1
  %55 = load i64, ptr %1, align 8, !tbaa !5
  %56 = shl nsw i64 %55, 1
  %57 = icmp slt i64 %54, %56
  br i1 %57, label %.lr.ph20, label %._crit_edge21, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_scanf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIlEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIlSaIlEEC2EmRKlRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #4 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIlSaIlEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIlED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #3 align 2

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass