; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_7)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) #1

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store8(ptr noundef, i64 noundef, i32 noundef) #1

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_std0x3A0x3A_0x5F20x3A0x3Apair0x3Cllvh0x3A0x3ADenseMapIterator0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20false0x3E0x2C0x20bool0x3E0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x2C0x20hermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x3A0x3Atry_emplace0x3Cllvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x260x3E0x28hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x260x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #4 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  store i32 0, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store i32 0, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  store i32 0, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  store i32 0, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #5
  %25 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %25, ptr %20, align 4, !tbaa !9
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.w2c_hermes, ptr %26, i32 0, i32 6
  %28 = load i32, ptr %20, align 4, !tbaa !9
  %29 = zext i32 %28 to i64
  %30 = add i64 %29, 12
  %31 = call i32 @i32_load(ptr noundef %27, i64 noundef %30)
  store i32 %31, ptr %20, align 4, !tbaa !9
  %32 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %32, ptr %16, align 4, !tbaa !9
  %33 = load i32, ptr %20, align 4, !tbaa !9
  %34 = icmp ne i32 %33, 0
  %35 = xor i1 %34, true
  %36 = zext i1 %35 to i32
  store i32 %36, ptr %20, align 4, !tbaa !9
  %37 = load i32, ptr %20, align 4, !tbaa !9
  %38 = icmp ne i32 %37, 0
  br i1 %38, label %39, label %40

39:                                               ; preds = %5
  br label %229

40:                                               ; preds = %5
  %41 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %41, ptr %20, align 4, !tbaa !9
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.w2c_hermes, ptr %42, i32 0, i32 6
  %44 = load i32, ptr %20, align 4, !tbaa !9
  %45 = zext i32 %44 to i64
  %46 = call i32 @i32_load(ptr noundef %43, i64 noundef %45)
  store i32 %46, ptr %20, align 4, !tbaa !9
  %47 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %47, ptr %11, align 4, !tbaa !9
  store i32 8, ptr %21, align 4, !tbaa !9
  %48 = load i32, ptr %21, align 4, !tbaa !9
  %49 = load i32, ptr %20, align 4, !tbaa !9
  %50 = add i32 %49, %48
  store i32 %50, ptr %20, align 4, !tbaa !9
  %51 = load i32, ptr %20, align 4, !tbaa !9
  switch i32 %51, label %57 [
    i32 0, label %52
    i32 1, label %53
    i32 2, label %54
    i32 3, label %55
    i32 4, label %56
  ]

52:                                               ; preds = %40
  br label %58

53:                                               ; preds = %40
  br label %76

54:                                               ; preds = %40
  br label %76

55:                                               ; preds = %40
  br label %76

56:                                               ; preds = %40
  br label %58

57:                                               ; preds = %40
  br label %76

58:                                               ; preds = %56, %52
  store i32 0, ptr %20, align 4, !tbaa !9
  %59 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %59, ptr %7, align 4, !tbaa !9
  store i32 204136, ptr %21, align 4, !tbaa !9
  %60 = load i32, ptr %21, align 4, !tbaa !9
  %61 = load i32, ptr %20, align 4, !tbaa !9
  %62 = add i32 %61, %60
  store i32 %62, ptr %20, align 4, !tbaa !9
  %63 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %63, ptr %21, align 4, !tbaa !9
  store i32 81389, ptr %22, align 4, !tbaa !9
  %64 = load i32, ptr %22, align 4, !tbaa !9
  %65 = load i32, ptr %21, align 4, !tbaa !9
  %66 = add i32 %65, %64
  store i32 %66, ptr %21, align 4, !tbaa !9
  store i32 597, ptr %22, align 4, !tbaa !9
  %67 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %67, ptr %23, align 4, !tbaa !9
  store i32 48929, ptr %24, align 4, !tbaa !9
  %68 = load i32, ptr %24, align 4, !tbaa !9
  %69 = load i32, ptr %23, align 4, !tbaa !9
  %70 = add i32 %69, %68
  store i32 %70, ptr %23, align 4, !tbaa !9
  %71 = load ptr, ptr %6, align 8, !tbaa !5
  %72 = load i32, ptr %20, align 4, !tbaa !9
  %73 = load i32, ptr %21, align 4, !tbaa !9
  %74 = load i32, ptr %22, align 4, !tbaa !9
  %75 = load i32, ptr %23, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %71, i32 noundef %72, i32 noundef %73, i32 noundef %74, i32 noundef %75)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

76:                                               ; preds = %57, %55, %54, %53
  %77 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %77, ptr %20, align 4, !tbaa !9
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.w2c_hermes, ptr %78, i32 0, i32 6
  %80 = load i32, ptr %20, align 4, !tbaa !9
  %81 = zext i32 %80 to i64
  %82 = call i32 @i32_load(ptr noundef %79, i64 noundef %81)
  store i32 %82, ptr %20, align 4, !tbaa !9
  %83 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %83, ptr %17, align 4, !tbaa !9
  %84 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %84, ptr %21, align 4, !tbaa !9
  store i32 1, ptr %22, align 4, !tbaa !9
  %85 = load i32, ptr %22, align 4, !tbaa !9
  %86 = load i32, ptr %21, align 4, !tbaa !9
  %87 = sub i32 %86, %85
  store i32 %87, ptr %21, align 4, !tbaa !9
  %88 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %88, ptr %19, align 4, !tbaa !9
  %89 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %89, ptr %22, align 4, !tbaa !9
  store i32 4, ptr %23, align 4, !tbaa !9
  %90 = load i32, ptr %23, align 4, !tbaa !9
  %91 = and i32 %90, 31
  %92 = load i32, ptr %22, align 4, !tbaa !9
  %93 = lshr i32 %92, %91
  store i32 %93, ptr %22, align 4, !tbaa !9
  %94 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %94, ptr %23, align 4, !tbaa !9
  store i32 9, ptr %24, align 4, !tbaa !9
  %95 = load i32, ptr %24, align 4, !tbaa !9
  %96 = and i32 %95, 31
  %97 = load i32, ptr %23, align 4, !tbaa !9
  %98 = lshr i32 %97, %96
  store i32 %98, ptr %23, align 4, !tbaa !9
  %99 = load i32, ptr %23, align 4, !tbaa !9
  %100 = load i32, ptr %22, align 4, !tbaa !9
  %101 = xor i32 %100, %99
  store i32 %101, ptr %22, align 4, !tbaa !9
  %102 = load i32, ptr %22, align 4, !tbaa !9
  %103 = load i32, ptr %21, align 4, !tbaa !9
  %104 = and i32 %103, %102
  store i32 %104, ptr %21, align 4, !tbaa !9
  %105 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %105, ptr %18, align 4, !tbaa !9
  store i32 2, ptr %22, align 4, !tbaa !9
  %106 = load i32, ptr %22, align 4, !tbaa !9
  %107 = and i32 %106, 31
  %108 = load i32, ptr %21, align 4, !tbaa !9
  %109 = shl i32 %108, %107
  store i32 %109, ptr %21, align 4, !tbaa !9
  %110 = load i32, ptr %21, align 4, !tbaa !9
  %111 = load i32, ptr %20, align 4, !tbaa !9
  %112 = add i32 %111, %110
  store i32 %112, ptr %20, align 4, !tbaa !9
  %113 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %113, ptr %12, align 4, !tbaa !9
  %114 = load ptr, ptr %6, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.w2c_hermes, ptr %114, i32 0, i32 6
  %116 = load i32, ptr %20, align 4, !tbaa !9
  %117 = zext i32 %116 to i64
  %118 = call i32 @i32_load(ptr noundef %115, i64 noundef %117)
  store i32 %118, ptr %20, align 4, !tbaa !9
  %119 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %119, ptr %14, align 4, !tbaa !9
  %120 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %120, ptr %21, align 4, !tbaa !9
  %121 = load i32, ptr %20, align 4, !tbaa !9
  %122 = load i32, ptr %21, align 4, !tbaa !9
  %123 = icmp ne i32 %121, %122
  %124 = zext i1 %123 to i32
  store i32 %124, ptr %20, align 4, !tbaa !9
  %125 = load i32, ptr %20, align 4, !tbaa !9
  %126 = icmp ne i32 %125, 0
  br i1 %126, label %127, label %218

127:                                              ; preds = %76
  store i32 1, ptr %20, align 4, !tbaa !9
  %128 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %128, ptr %15, align 4, !tbaa !9
  br label %129

129:                                              ; preds = %216, %127
  %130 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %130, ptr %20, align 4, !tbaa !9
  store i32 -4, ptr %21, align 4, !tbaa !9
  %131 = load i32, ptr %20, align 4, !tbaa !9
  %132 = load i32, ptr %21, align 4, !tbaa !9
  %133 = icmp eq i32 %131, %132
  %134 = zext i1 %133 to i32
  store i32 %134, ptr %20, align 4, !tbaa !9
  %135 = load i32, ptr %20, align 4, !tbaa !9
  %136 = icmp ne i32 %135, 0
  br i1 %136, label %137, label %150

137:                                              ; preds = %129
  %138 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %138, ptr %20, align 4, !tbaa !9
  %139 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %139, ptr %21, align 4, !tbaa !9
  %140 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %140, ptr %22, align 4, !tbaa !9
  %141 = load i32, ptr %22, align 4, !tbaa !9
  %142 = icmp ne i32 %141, 0
  br i1 %142, label %143, label %145

143:                                              ; preds = %137
  %144 = load i32, ptr %20, align 4, !tbaa !9
  br label %147

145:                                              ; preds = %137
  %146 = load i32, ptr %21, align 4, !tbaa !9
  br label %147

147:                                              ; preds = %145, %143
  %148 = phi i32 [ %144, %143 ], [ %146, %145 ]
  store i32 %148, ptr %20, align 4, !tbaa !9
  %149 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %149, ptr %11, align 4, !tbaa !9
  br label %229

150:                                              ; preds = %129
  %151 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %151, ptr %20, align 4, !tbaa !9
  %152 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %152, ptr %21, align 4, !tbaa !9
  %153 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %153, ptr %22, align 4, !tbaa !9
  %154 = load i32, ptr %22, align 4, !tbaa !9
  %155 = icmp ne i32 %154, 0
  br i1 %155, label %156, label %158

156:                                              ; preds = %150
  %157 = load i32, ptr %20, align 4, !tbaa !9
  br label %160

158:                                              ; preds = %150
  %159 = load i32, ptr %21, align 4, !tbaa !9
  br label %160

160:                                              ; preds = %158, %156
  %161 = phi i32 [ %157, %156 ], [ %159, %158 ]
  store i32 %161, ptr %20, align 4, !tbaa !9
  %162 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %162, ptr %21, align 4, !tbaa !9
  %163 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %163, ptr %22, align 4, !tbaa !9
  store i32 -8, ptr %23, align 4, !tbaa !9
  %164 = load i32, ptr %22, align 4, !tbaa !9
  %165 = load i32, ptr %23, align 4, !tbaa !9
  %166 = icmp eq i32 %164, %165
  %167 = zext i1 %166 to i32
  store i32 %167, ptr %22, align 4, !tbaa !9
  %168 = load i32, ptr %22, align 4, !tbaa !9
  %169 = icmp ne i32 %168, 0
  br i1 %169, label %170, label %172

170:                                              ; preds = %160
  %171 = load i32, ptr %20, align 4, !tbaa !9
  br label %174

172:                                              ; preds = %160
  %173 = load i32, ptr %21, align 4, !tbaa !9
  br label %174

174:                                              ; preds = %172, %170
  %175 = phi i32 [ %171, %170 ], [ %173, %172 ]
  store i32 %175, ptr %20, align 4, !tbaa !9
  %176 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %176, ptr %13, align 4, !tbaa !9
  %177 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %177, ptr %20, align 4, !tbaa !9
  %178 = load i32, ptr %18, align 4, !tbaa !9
  store i32 %178, ptr %21, align 4, !tbaa !9
  %179 = load i32, ptr %21, align 4, !tbaa !9
  %180 = load i32, ptr %20, align 4, !tbaa !9
  %181 = add i32 %180, %179
  store i32 %181, ptr %20, align 4, !tbaa !9
  %182 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %182, ptr %12, align 4, !tbaa !9
  %183 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %183, ptr %20, align 4, !tbaa !9
  store i32 1, ptr %21, align 4, !tbaa !9
  %184 = load i32, ptr %21, align 4, !tbaa !9
  %185 = load i32, ptr %20, align 4, !tbaa !9
  %186 = add i32 %185, %184
  store i32 %186, ptr %20, align 4, !tbaa !9
  %187 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %187, ptr %15, align 4, !tbaa !9
  %188 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %188, ptr %20, align 4, !tbaa !9
  %189 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %189, ptr %21, align 4, !tbaa !9
  %190 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %190, ptr %22, align 4, !tbaa !9
  %191 = load i32, ptr %19, align 4, !tbaa !9
  store i32 %191, ptr %23, align 4, !tbaa !9
  %192 = load i32, ptr %23, align 4, !tbaa !9
  %193 = load i32, ptr %22, align 4, !tbaa !9
  %194 = and i32 %193, %192
  store i32 %194, ptr %22, align 4, !tbaa !9
  %195 = load i32, ptr %22, align 4, !tbaa !9
  store i32 %195, ptr %18, align 4, !tbaa !9
  store i32 2, ptr %23, align 4, !tbaa !9
  %196 = load i32, ptr %23, align 4, !tbaa !9
  %197 = and i32 %196, 31
  %198 = load i32, ptr %22, align 4, !tbaa !9
  %199 = shl i32 %198, %197
  store i32 %199, ptr %22, align 4, !tbaa !9
  %200 = load i32, ptr %22, align 4, !tbaa !9
  %201 = load i32, ptr %21, align 4, !tbaa !9
  %202 = add i32 %201, %200
  store i32 %202, ptr %21, align 4, !tbaa !9
  %203 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %203, ptr %12, align 4, !tbaa !9
  %204 = load ptr, ptr %6, align 8, !tbaa !5
  %205 = getelementptr inbounds %struct.w2c_hermes, ptr %204, i32 0, i32 6
  %206 = load i32, ptr %21, align 4, !tbaa !9
  %207 = zext i32 %206 to i64
  %208 = call i32 @i32_load(ptr noundef %205, i64 noundef %207)
  store i32 %208, ptr %21, align 4, !tbaa !9
  %209 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %209, ptr %14, align 4, !tbaa !9
  %210 = load i32, ptr %20, align 4, !tbaa !9
  %211 = load i32, ptr %21, align 4, !tbaa !9
  %212 = icmp ne i32 %210, %211
  %213 = zext i1 %212 to i32
  store i32 %213, ptr %20, align 4, !tbaa !9
  %214 = load i32, ptr %20, align 4, !tbaa !9
  %215 = icmp ne i32 %214, 0
  br i1 %215, label %216, label %217

216:                                              ; preds = %174
  br label %129

217:                                              ; preds = %174
  br label %218

218:                                              ; preds = %217, %76
  store i32 0, ptr %20, align 4, !tbaa !9
  %219 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %219, ptr %9, align 4, !tbaa !9
  %220 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %220, ptr %20, align 4, !tbaa !9
  %221 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %221, ptr %21, align 4, !tbaa !9
  store i32 2, ptr %22, align 4, !tbaa !9
  %222 = load i32, ptr %22, align 4, !tbaa !9
  %223 = and i32 %222, 31
  %224 = load i32, ptr %21, align 4, !tbaa !9
  %225 = shl i32 %224, %223
  store i32 %225, ptr %21, align 4, !tbaa !9
  %226 = load i32, ptr %21, align 4, !tbaa !9
  %227 = load i32, ptr %20, align 4, !tbaa !9
  %228 = add i32 %227, %226
  store i32 %228, ptr %20, align 4, !tbaa !9
  br label %273

229:                                              ; preds = %147, %39
  %230 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %230, ptr %20, align 4, !tbaa !9
  %231 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %231, ptr %21, align 4, !tbaa !9
  %232 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %232, ptr %22, align 4, !tbaa !9
  %233 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %233, ptr %23, align 4, !tbaa !9
  %234 = load ptr, ptr %6, align 8, !tbaa !5
  %235 = load i32, ptr %20, align 4, !tbaa !9
  %236 = load i32, ptr %21, align 4, !tbaa !9
  %237 = load i32, ptr %22, align 4, !tbaa !9
  %238 = load i32, ptr %23, align 4, !tbaa !9
  %239 = call i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x2C0x20hermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3ALiteral0x2A0x3E0x28hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x29(ptr noundef %234, i32 noundef %235, i32 noundef %236, i32 noundef %237, i32 noundef %238)
  store i32 %239, ptr %20, align 4, !tbaa !9
  %240 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %240, ptr %12, align 4, !tbaa !9
  %241 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %241, ptr %21, align 4, !tbaa !9
  %242 = load ptr, ptr %6, align 8, !tbaa !5
  %243 = getelementptr inbounds %struct.w2c_hermes, ptr %242, i32 0, i32 6
  %244 = load i32, ptr %21, align 4, !tbaa !9
  %245 = zext i32 %244 to i64
  %246 = call i32 @i32_load(ptr noundef %243, i64 noundef %245)
  store i32 %246, ptr %21, align 4, !tbaa !9
  %247 = load ptr, ptr %6, align 8, !tbaa !5
  %248 = getelementptr inbounds %struct.w2c_hermes, ptr %247, i32 0, i32 6
  %249 = load i32, ptr %20, align 4, !tbaa !9
  %250 = zext i32 %249 to i64
  %251 = load i32, ptr %21, align 4, !tbaa !9
  call void @i32_store(ptr noundef %248, i64 noundef %250, i32 noundef %251)
  store i32 1, ptr %20, align 4, !tbaa !9
  %252 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %252, ptr %9, align 4, !tbaa !9
  %253 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %253, ptr %20, align 4, !tbaa !9
  %254 = load ptr, ptr %6, align 8, !tbaa !5
  %255 = getelementptr inbounds %struct.w2c_hermes, ptr %254, i32 0, i32 6
  %256 = load i32, ptr %20, align 4, !tbaa !9
  %257 = zext i32 %256 to i64
  %258 = call i32 @i32_load(ptr noundef %255, i64 noundef %257)
  store i32 %258, ptr %20, align 4, !tbaa !9
  %259 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %259, ptr %21, align 4, !tbaa !9
  %260 = load ptr, ptr %6, align 8, !tbaa !5
  %261 = getelementptr inbounds %struct.w2c_hermes, ptr %260, i32 0, i32 6
  %262 = load i32, ptr %21, align 4, !tbaa !9
  %263 = zext i32 %262 to i64
  %264 = add i64 %263, 12
  %265 = call i32 @i32_load(ptr noundef %261, i64 noundef %264)
  store i32 %265, ptr %21, align 4, !tbaa !9
  store i32 2, ptr %22, align 4, !tbaa !9
  %266 = load i32, ptr %22, align 4, !tbaa !9
  %267 = and i32 %266, 31
  %268 = load i32, ptr %21, align 4, !tbaa !9
  %269 = shl i32 %268, %267
  store i32 %269, ptr %21, align 4, !tbaa !9
  %270 = load i32, ptr %21, align 4, !tbaa !9
  %271 = load i32, ptr %20, align 4, !tbaa !9
  %272 = add i32 %271, %270
  store i32 %272, ptr %20, align 4, !tbaa !9
  br label %273

273:                                              ; preds = %229, %218
  %274 = load i32, ptr %20, align 4, !tbaa !9
  store i32 %274, ptr %8, align 4, !tbaa !9
  %275 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %275, ptr %20, align 4, !tbaa !9
  %276 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %276, ptr %21, align 4, !tbaa !9
  %277 = load ptr, ptr %6, align 8, !tbaa !5
  %278 = getelementptr inbounds %struct.w2c_hermes, ptr %277, i32 0, i32 6
  %279 = load i32, ptr %20, align 4, !tbaa !9
  %280 = zext i32 %279 to i64
  %281 = add i64 %280, 8
  %282 = load i32, ptr %21, align 4, !tbaa !9
  call void @i32_store8(ptr noundef %278, i64 noundef %281, i32 noundef %282)
  %283 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %283, ptr %20, align 4, !tbaa !9
  %284 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %284, ptr %21, align 4, !tbaa !9
  %285 = load ptr, ptr %6, align 8, !tbaa !5
  %286 = getelementptr inbounds %struct.w2c_hermes, ptr %285, i32 0, i32 6
  %287 = load i32, ptr %20, align 4, !tbaa !9
  %288 = zext i32 %287 to i64
  %289 = add i64 %288, 4
  %290 = load i32, ptr %21, align 4, !tbaa !9
  call void @i32_store(ptr noundef %286, i64 noundef %289, i32 noundef %290)
  %291 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %291, ptr %20, align 4, !tbaa !9
  %292 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %292, ptr %21, align 4, !tbaa !9
  %293 = load ptr, ptr %6, align 8, !tbaa !5
  %294 = getelementptr inbounds %struct.w2c_hermes, ptr %293, i32 0, i32 6
  %295 = load i32, ptr %20, align 4, !tbaa !9
  %296 = zext i32 %295 to i64
  %297 = load i32, ptr %21, align 4, !tbaa !9
  call void @i32_store(ptr noundef %294, i64 noundef %296, i32 noundef %297)
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  ret void
}

declare i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x2C0x20hermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3ALiteral0x2A0x3E0x28hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store8(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_std0x3A0x3A_0x5F20x3A0x3Apair0x3Cllvh0x3A0x3ADenseMapIterator0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20false0x3E0x2C0x20bool0x3E0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x2C0x20hermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x3A0x3Atry_emplace0x3Cllvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x260x3E0x28hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x260x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #3 {
  %6 = getelementptr inbounds i8, ptr %0, i64 40
  %7 = zext i32 %2 to i64
  %8 = add nuw nsw i64 %7, 12
  %9 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %8)
  %.not = icmp eq i32 %9, 0
  %.pre = zext i32 %3 to i64
  br i1 %.not, label %._crit_edge, label %10

10:                                               ; preds = %5
  %11 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %.pre)
  switch i32 %11, label %13 [
    i32 -8, label %12
    i32 -4, label %12
  ]

12:                                               ; preds = %10, %10
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 204136, i32 noundef 81389, i32 noundef 597, i32 noundef 48929) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

13:                                               ; preds = %10
  %14 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %7)
  %15 = add i32 %9, -1
  %16 = lshr i32 %11, 4
  %17 = lshr i32 %11, 9
  %18 = xor i32 %16, %17
  %19 = and i32 %18, %15
  %20 = shl nuw nsw i32 %19, 2
  %21 = add i32 %14, %20
  %22 = zext i32 %21 to i64
  %23 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %22)
  %.not170 = icmp eq i32 %23, %11
  br i1 %.not170, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %13, %27
  %.0164 = phi i32 [ %35, %27 ], [ %21, %13 ]
  %.0163 = phi i32 [ %30, %27 ], [ 0, %13 ]
  %.0162 = phi i32 [ %37, %27 ], [ %23, %13 ]
  %.0161 = phi i32 [ %32, %27 ], [ 1, %13 ]
  %.0160 = phi i32 [ %33, %27 ], [ %19, %13 ]
  %24 = icmp eq i32 %.0162, -4
  %.not173 = icmp eq i32 %.0163, 0
  br i1 %24, label %25, label %27

25:                                               ; preds = %.preheader
  %26 = select i1 %.not173, i32 %.0164, i32 %.0163
  br label %._crit_edge

27:                                               ; preds = %.preheader
  %28 = icmp eq i32 %.0162, -8
  %29 = select i1 %28, i1 %.not173, i1 false
  %30 = select i1 %29, i32 %.0164, i32 %.0163
  %31 = add i32 %.0160, %.0161
  %32 = add i32 %.0161, 1
  %33 = and i32 %31, %15
  %34 = shl i32 %33, 2
  %35 = add i32 %34, %14
  %36 = zext i32 %35 to i64
  %37 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %36)
  %.not172 = icmp eq i32 %11, %37
  br i1 %.not172, label %.loopexit, label %.preheader

.loopexit:                                        ; preds = %27, %13
  %.1 = phi i32 [ %21, %13 ], [ %35, %27 ]
  %38 = shl i32 %9, 2
  %39 = add i32 %14, %38
  br label %47

._crit_edge:                                      ; preds = %5, %25
  %.0165 = phi i32 [ %26, %25 ], [ 0, %5 ]
  %40 = tail call i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x2C0x20hermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3ALiteral0x2A0x3E0x28hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x29(ptr noundef %0, i32 noundef %2, i32 noundef %3, i32 noundef %3, i32 noundef %.0165) #4
  %41 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %.pre)
  %42 = zext i32 %40 to i64
  tail call void @i32_store(ptr noundef nonnull %6, i64 noundef %42, i32 noundef %41)
  %43 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %7)
  %44 = tail call i32 @i32_load(ptr noundef nonnull %6, i64 noundef %8)
  %45 = shl i32 %44, 2
  %46 = add i32 %45, %43
  br label %47

47:                                               ; preds = %._crit_edge, %.loopexit
  %.0166 = phi i32 [ 1, %._crit_edge ], [ 0, %.loopexit ]
  %.2 = phi i32 [ %40, %._crit_edge ], [ %.1, %.loopexit ]
  %.0 = phi i32 [ %46, %._crit_edge ], [ %39, %.loopexit ]
  %48 = zext i32 %1 to i64
  %49 = add nuw nsw i64 %48, 8
  tail call void @i32_store8(ptr noundef nonnull %6, i64 noundef %49, i32 noundef %.0166)
  %50 = add nuw nsw i64 %48, 4
  tail call void @i32_store(ptr noundef nonnull %6, i64 noundef %50, i32 noundef %.0)
  tail call void @i32_store(ptr noundef nonnull %6, i64 noundef %48, i32 noundef %.2)
  ret void
}

declare i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x2C0x20hermes0x3A0x3ALiteral0x2A0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetEmpty0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3ALiteral0x2A0x3E0x28hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20hermes0x3A0x3ALiteral0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseSetPair0x3Chermes0x3A0x3ALiteral0x2A0x3E0x2A0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass