; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_opt_compiled_6)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden double @f64_reinterpret_i64(i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_reinterpret_f64(double noundef) #1

; Function Attrs: nounwind uwtable
define dso_local double @w2c_hermes_log1p(ptr noundef %0, double noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca double, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca double, align 8
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca double, align 8
  %20 = alloca double, align 8
  %21 = alloca double, align 8
  %22 = alloca double, align 8
  %23 = alloca double, align 8
  %24 = alloca double, align 8
  %25 = alloca double, align 8
  %26 = alloca double, align 8
  %27 = alloca double, align 8
  %28 = alloca double, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store double %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  store double 0.000000e+00, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store double 0.000000e+00, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  store double 0.000000e+00, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  store double 0.000000e+00, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #3
  %29 = load double, ptr %4, align 8, !tbaa !9
  store double %29, ptr %19, align 8, !tbaa !9
  %30 = load double, ptr %19, align 8, !tbaa !9
  %31 = call i64 @i64_reinterpret_f64(double noundef %30)
  store i64 %31, ptr %16, align 8, !tbaa !13
  %32 = load i64, ptr %16, align 8, !tbaa !13
  store i64 %32, ptr %7, align 8, !tbaa !13
  store i64 32, ptr %17, align 8, !tbaa !13
  %33 = load i64, ptr %17, align 8, !tbaa !13
  %34 = and i64 %33, 63
  %35 = load i64, ptr %16, align 8, !tbaa !13
  %36 = lshr i64 %35, %34
  store i64 %36, ptr %16, align 8, !tbaa !13
  %37 = load i64, ptr %16, align 8, !tbaa !13
  %38 = trunc i64 %37 to i32
  store i32 %38, ptr %12, align 4, !tbaa !11
  %39 = load i32, ptr %12, align 4, !tbaa !11
  store i32 %39, ptr %5, align 4, !tbaa !11
  %40 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %40, ptr %12, align 4, !tbaa !11
  store i32 1071284857, ptr %13, align 4, !tbaa !11
  %41 = load i32, ptr %12, align 4, !tbaa !11
  %42 = load i32, ptr %13, align 4, !tbaa !11
  %43 = icmp ugt i32 %41, %42
  %44 = zext i1 %43 to i32
  store i32 %44, ptr %12, align 4, !tbaa !11
  %45 = load i64, ptr %7, align 8, !tbaa !13
  store i64 %45, ptr %17, align 8, !tbaa !13
  store i64 0, ptr %18, align 8, !tbaa !13
  %46 = load i64, ptr %17, align 8, !tbaa !13
  %47 = load i64, ptr %18, align 8, !tbaa !13
  %48 = icmp sge i64 %46, %47
  %49 = zext i1 %48 to i32
  %50 = sext i32 %49 to i64
  %51 = trunc i64 %50 to i32
  store i32 %51, ptr %13, align 4, !tbaa !11
  %52 = load i32, ptr %13, align 4, !tbaa !11
  %53 = load i32, ptr %12, align 4, !tbaa !11
  %54 = and i32 %53, %52
  store i32 %54, ptr %12, align 4, !tbaa !11
  %55 = load i32, ptr %12, align 4, !tbaa !11
  %56 = icmp ne i32 %55, 0
  %57 = xor i1 %56, true
  %58 = zext i1 %57 to i32
  store i32 %58, ptr %12, align 4, !tbaa !11
  %59 = load i32, ptr %12, align 4, !tbaa !11
  %60 = icmp ne i32 %59, 0
  br i1 %60, label %61, label %110

61:                                               ; preds = %2
  %62 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %62, ptr %12, align 4, !tbaa !11
  store i32 -1074790400, ptr %13, align 4, !tbaa !11
  %63 = load i32, ptr %12, align 4, !tbaa !11
  %64 = load i32, ptr %13, align 4, !tbaa !11
  %65 = icmp uge i32 %63, %64
  %66 = zext i1 %65 to i32
  store i32 %66, ptr %12, align 4, !tbaa !11
  %67 = load i32, ptr %12, align 4, !tbaa !11
  %68 = icmp ne i32 %67, 0
  br i1 %68, label %69, label %87

69:                                               ; preds = %61
  store double 0xFFF0000000000000, ptr %19, align 8, !tbaa !9
  %70 = load double, ptr %4, align 8, !tbaa !9
  store double %70, ptr %20, align 8, !tbaa !9
  store double -1.000000e+00, ptr %21, align 8, !tbaa !9
  %71 = load double, ptr %20, align 8, !tbaa !9
  %72 = load double, ptr %21, align 8, !tbaa !9
  %73 = fcmp oeq double %71, %72
  %74 = zext i1 %73 to i32
  store i32 %74, ptr %13, align 4, !tbaa !11
  %75 = load i32, ptr %13, align 4, !tbaa !11
  %76 = icmp ne i32 %75, 0
  br i1 %76, label %77, label %78

77:                                               ; preds = %69
  br label %326

78:                                               ; preds = %69
  %79 = load double, ptr %4, align 8, !tbaa !9
  store double %79, ptr %19, align 8, !tbaa !9
  %80 = load double, ptr %4, align 8, !tbaa !9
  store double %80, ptr %20, align 8, !tbaa !9
  %81 = load double, ptr %20, align 8, !tbaa !9
  %82 = load double, ptr %19, align 8, !tbaa !9
  %83 = fsub double %82, %81
  store double %83, ptr %19, align 8, !tbaa !9
  store double 0.000000e+00, ptr %20, align 8, !tbaa !9
  %84 = load double, ptr %20, align 8, !tbaa !9
  %85 = load double, ptr %19, align 8, !tbaa !9
  %86 = fdiv double %85, %84
  store double %86, ptr %19, align 8, !tbaa !9
  br label %329

87:                                               ; preds = %61
  %88 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %88, ptr %12, align 4, !tbaa !11
  store i32 1, ptr %13, align 4, !tbaa !11
  %89 = load i32, ptr %13, align 4, !tbaa !11
  %90 = and i32 %89, 31
  %91 = load i32, ptr %12, align 4, !tbaa !11
  %92 = shl i32 %91, %90
  store i32 %92, ptr %12, align 4, !tbaa !11
  store i32 2034237440, ptr %13, align 4, !tbaa !11
  %93 = load i32, ptr %12, align 4, !tbaa !11
  %94 = load i32, ptr %13, align 4, !tbaa !11
  %95 = icmp ult i32 %93, %94
  %96 = zext i1 %95 to i32
  store i32 %96, ptr %12, align 4, !tbaa !11
  %97 = load i32, ptr %12, align 4, !tbaa !11
  %98 = icmp ne i32 %97, 0
  br i1 %98, label %99, label %100

99:                                               ; preds = %87
  br label %327

100:                                              ; preds = %87
  %101 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %101, ptr %12, align 4, !tbaa !11
  store i32 -1076707643, ptr %13, align 4, !tbaa !11
  %102 = load i32, ptr %12, align 4, !tbaa !11
  %103 = load i32, ptr %13, align 4, !tbaa !11
  %104 = icmp uge i32 %102, %103
  %105 = zext i1 %104 to i32
  store i32 %105, ptr %12, align 4, !tbaa !11
  %106 = load i32, ptr %12, align 4, !tbaa !11
  %107 = icmp ne i32 %106, 0
  br i1 %107, label %108, label %109

108:                                              ; preds = %100
  br label %120

109:                                              ; preds = %100
  store double 0.000000e+00, ptr %19, align 8, !tbaa !9
  br label %219

110:                                              ; preds = %2
  %111 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %111, ptr %12, align 4, !tbaa !11
  store i32 2146435071, ptr %13, align 4, !tbaa !11
  %112 = load i32, ptr %12, align 4, !tbaa !11
  %113 = load i32, ptr %13, align 4, !tbaa !11
  %114 = icmp ugt i32 %112, %113
  %115 = zext i1 %114 to i32
  store i32 %115, ptr %12, align 4, !tbaa !11
  %116 = load i32, ptr %12, align 4, !tbaa !11
  %117 = icmp ne i32 %116, 0
  br i1 %117, label %118, label %119

118:                                              ; preds = %110
  br label %327

119:                                              ; preds = %110
  br label %120

120:                                              ; preds = %119, %108
  %121 = load double, ptr %4, align 8, !tbaa !9
  store double %121, ptr %19, align 8, !tbaa !9
  store double 1.000000e+00, ptr %20, align 8, !tbaa !9
  %122 = load double, ptr %20, align 8, !tbaa !9
  %123 = load double, ptr %19, align 8, !tbaa !9
  %124 = fadd double %123, %122
  store double %124, ptr %19, align 8, !tbaa !9
  %125 = load double, ptr %19, align 8, !tbaa !9
  store double %125, ptr %8, align 8, !tbaa !9
  %126 = load double, ptr %19, align 8, !tbaa !9
  %127 = call i64 @i64_reinterpret_f64(double noundef %126)
  store i64 %127, ptr %16, align 8, !tbaa !13
  %128 = load i64, ptr %16, align 8, !tbaa !13
  store i64 %128, ptr %7, align 8, !tbaa !13
  store i64 32, ptr %17, align 8, !tbaa !13
  %129 = load i64, ptr %17, align 8, !tbaa !13
  %130 = and i64 %129, 63
  %131 = load i64, ptr %16, align 8, !tbaa !13
  %132 = lshr i64 %131, %130
  store i64 %132, ptr %16, align 8, !tbaa !13
  %133 = load i64, ptr %16, align 8, !tbaa !13
  %134 = trunc i64 %133 to i32
  store i32 %134, ptr %12, align 4, !tbaa !11
  store i32 614242, ptr %13, align 4, !tbaa !11
  %135 = load i32, ptr %13, align 4, !tbaa !11
  %136 = load i32, ptr %12, align 4, !tbaa !11
  %137 = add i32 %136, %135
  store i32 %137, ptr %12, align 4, !tbaa !11
  %138 = load i32, ptr %12, align 4, !tbaa !11
  store i32 %138, ptr %5, align 4, !tbaa !11
  store i32 20, ptr %13, align 4, !tbaa !11
  %139 = load i32, ptr %13, align 4, !tbaa !11
  %140 = and i32 %139, 31
  %141 = load i32, ptr %12, align 4, !tbaa !11
  %142 = lshr i32 %141, %140
  store i32 %142, ptr %12, align 4, !tbaa !11
  store i32 1023, ptr %13, align 4, !tbaa !11
  %143 = load i32, ptr %13, align 4, !tbaa !11
  %144 = load i32, ptr %12, align 4, !tbaa !11
  %145 = sub i32 %144, %143
  store i32 %145, ptr %12, align 4, !tbaa !11
  %146 = load i32, ptr %12, align 4, !tbaa !11
  store i32 %146, ptr %6, align 4, !tbaa !11
  %147 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %147, ptr %12, align 4, !tbaa !11
  store i32 1129316351, ptr %13, align 4, !tbaa !11
  %148 = load i32, ptr %12, align 4, !tbaa !11
  %149 = load i32, ptr %13, align 4, !tbaa !11
  %150 = icmp ule i32 %148, %149
  %151 = zext i1 %150 to i32
  store i32 %151, ptr %12, align 4, !tbaa !11
  %152 = load i32, ptr %12, align 4, !tbaa !11
  %153 = icmp ne i32 %152, 0
  br i1 %153, label %154, label %189

154:                                              ; preds = %120
  %155 = load double, ptr %4, align 8, !tbaa !9
  store double %155, ptr %19, align 8, !tbaa !9
  %156 = load double, ptr %8, align 8, !tbaa !9
  store double %156, ptr %20, align 8, !tbaa !9
  %157 = load double, ptr %20, align 8, !tbaa !9
  %158 = load double, ptr %19, align 8, !tbaa !9
  %159 = fsub double %158, %157
  store double %159, ptr %19, align 8, !tbaa !9
  store double 1.000000e+00, ptr %20, align 8, !tbaa !9
  %160 = load double, ptr %20, align 8, !tbaa !9
  %161 = load double, ptr %19, align 8, !tbaa !9
  %162 = fadd double %161, %160
  store double %162, ptr %19, align 8, !tbaa !9
  %163 = load double, ptr %4, align 8, !tbaa !9
  store double %163, ptr %20, align 8, !tbaa !9
  %164 = load double, ptr %8, align 8, !tbaa !9
  store double %164, ptr %21, align 8, !tbaa !9
  store double -1.000000e+00, ptr %22, align 8, !tbaa !9
  %165 = load double, ptr %22, align 8, !tbaa !9
  %166 = load double, ptr %21, align 8, !tbaa !9
  %167 = fadd double %166, %165
  store double %167, ptr %21, align 8, !tbaa !9
  %168 = load double, ptr %21, align 8, !tbaa !9
  %169 = load double, ptr %20, align 8, !tbaa !9
  %170 = fsub double %169, %168
  store double %170, ptr %20, align 8, !tbaa !9
  %171 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %171, ptr %14, align 4, !tbaa !11
  store i32 1074790399, ptr %15, align 4, !tbaa !11
  %172 = load i32, ptr %14, align 4, !tbaa !11
  %173 = load i32, ptr %15, align 4, !tbaa !11
  %174 = icmp ugt i32 %172, %173
  %175 = zext i1 %174 to i32
  store i32 %175, ptr %14, align 4, !tbaa !11
  %176 = load i32, ptr %14, align 4, !tbaa !11
  %177 = icmp ne i32 %176, 0
  br i1 %177, label %178, label %180

178:                                              ; preds = %154
  %179 = load double, ptr %19, align 8, !tbaa !9
  br label %182

180:                                              ; preds = %154
  %181 = load double, ptr %20, align 8, !tbaa !9
  br label %182

182:                                              ; preds = %180, %178
  %183 = phi double [ %179, %178 ], [ %181, %180 ]
  store double %183, ptr %19, align 8, !tbaa !9
  %184 = load double, ptr %8, align 8, !tbaa !9
  store double %184, ptr %20, align 8, !tbaa !9
  %185 = load double, ptr %20, align 8, !tbaa !9
  %186 = load double, ptr %19, align 8, !tbaa !9
  %187 = fdiv double %186, %185
  store double %187, ptr %19, align 8, !tbaa !9
  %188 = load double, ptr %19, align 8, !tbaa !9
  store double %188, ptr %10, align 8, !tbaa !9
  br label %189

189:                                              ; preds = %182, %120
  %190 = load i64, ptr %7, align 8, !tbaa !13
  store i64 %190, ptr %16, align 8, !tbaa !13
  store i64 4294967295, ptr %17, align 8, !tbaa !13
  %191 = load i64, ptr %17, align 8, !tbaa !13
  %192 = load i64, ptr %16, align 8, !tbaa !13
  %193 = and i64 %192, %191
  store i64 %193, ptr %16, align 8, !tbaa !13
  %194 = load i32, ptr %5, align 4, !tbaa !11
  store i32 %194, ptr %13, align 4, !tbaa !11
  store i32 1048575, ptr %14, align 4, !tbaa !11
  %195 = load i32, ptr %14, align 4, !tbaa !11
  %196 = load i32, ptr %13, align 4, !tbaa !11
  %197 = and i32 %196, %195
  store i32 %197, ptr %13, align 4, !tbaa !11
  store i32 1072079006, ptr %14, align 4, !tbaa !11
  %198 = load i32, ptr %14, align 4, !tbaa !11
  %199 = load i32, ptr %13, align 4, !tbaa !11
  %200 = add i32 %199, %198
  store i32 %200, ptr %13, align 4, !tbaa !11
  %201 = load i32, ptr %13, align 4, !tbaa !11
  %202 = zext i32 %201 to i64
  store i64 %202, ptr %17, align 8, !tbaa !13
  store i64 32, ptr %18, align 8, !tbaa !13
  %203 = load i64, ptr %18, align 8, !tbaa !13
  %204 = and i64 %203, 63
  %205 = load i64, ptr %17, align 8, !tbaa !13
  %206 = shl i64 %205, %204
  store i64 %206, ptr %17, align 8, !tbaa !13
  %207 = load i64, ptr %17, align 8, !tbaa !13
  %208 = load i64, ptr %16, align 8, !tbaa !13
  %209 = or i64 %208, %207
  store i64 %209, ptr %16, align 8, !tbaa !13
  %210 = load i64, ptr %16, align 8, !tbaa !13
  %211 = call double @f64_reinterpret_i64(i64 noundef %210)
  store double %211, ptr %19, align 8, !tbaa !9
  store double -1.000000e+00, ptr %20, align 8, !tbaa !9
  %212 = load double, ptr %20, align 8, !tbaa !9
  %213 = load double, ptr %19, align 8, !tbaa !9
  %214 = fadd double %213, %212
  store double %214, ptr %19, align 8, !tbaa !9
  %215 = load double, ptr %19, align 8, !tbaa !9
  store double %215, ptr %4, align 8, !tbaa !9
  %216 = load i32, ptr %6, align 4, !tbaa !11
  store i32 %216, ptr %12, align 4, !tbaa !11
  %217 = load i32, ptr %12, align 4, !tbaa !11
  %218 = sitofp i32 %217 to double
  store double %218, ptr %19, align 8, !tbaa !9
  br label %219

219:                                              ; preds = %189, %109
  %220 = load double, ptr %19, align 8, !tbaa !9
  store double %220, ptr %8, align 8, !tbaa !9
  store double 0x3FE62E42FEE00000, ptr %20, align 8, !tbaa !9
  %221 = load double, ptr %20, align 8, !tbaa !9
  %222 = load double, ptr %19, align 8, !tbaa !9
  %223 = fmul double %222, %221
  store double %223, ptr %19, align 8, !tbaa !9
  %224 = load double, ptr %4, align 8, !tbaa !9
  store double %224, ptr %20, align 8, !tbaa !9
  %225 = load double, ptr %4, align 8, !tbaa !9
  store double %225, ptr %21, align 8, !tbaa !9
  %226 = load double, ptr %4, align 8, !tbaa !9
  store double %226, ptr %22, align 8, !tbaa !9
  store double 2.000000e+00, ptr %23, align 8, !tbaa !9
  %227 = load double, ptr %23, align 8, !tbaa !9
  %228 = load double, ptr %22, align 8, !tbaa !9
  %229 = fadd double %228, %227
  store double %229, ptr %22, align 8, !tbaa !9
  %230 = load double, ptr %22, align 8, !tbaa !9
  %231 = load double, ptr %21, align 8, !tbaa !9
  %232 = fdiv double %231, %230
  store double %232, ptr %21, align 8, !tbaa !9
  %233 = load double, ptr %21, align 8, !tbaa !9
  store double %233, ptr %9, align 8, !tbaa !9
  %234 = load double, ptr %4, align 8, !tbaa !9
  store double %234, ptr %22, align 8, !tbaa !9
  %235 = load double, ptr %4, align 8, !tbaa !9
  store double %235, ptr %23, align 8, !tbaa !9
  store double 5.000000e-01, ptr %24, align 8, !tbaa !9
  %236 = load double, ptr %24, align 8, !tbaa !9
  %237 = load double, ptr %23, align 8, !tbaa !9
  %238 = fmul double %237, %236
  store double %238, ptr %23, align 8, !tbaa !9
  %239 = load double, ptr %23, align 8, !tbaa !9
  %240 = load double, ptr %22, align 8, !tbaa !9
  %241 = fmul double %240, %239
  store double %241, ptr %22, align 8, !tbaa !9
  %242 = load double, ptr %22, align 8, !tbaa !9
  store double %242, ptr %11, align 8, !tbaa !9
  %243 = load double, ptr %9, align 8, !tbaa !9
  store double %243, ptr %23, align 8, !tbaa !9
  %244 = load double, ptr %9, align 8, !tbaa !9
  store double %244, ptr %24, align 8, !tbaa !9
  %245 = load double, ptr %24, align 8, !tbaa !9
  %246 = load double, ptr %23, align 8, !tbaa !9
  %247 = fmul double %246, %245
  store double %247, ptr %23, align 8, !tbaa !9
  %248 = load double, ptr %23, align 8, !tbaa !9
  store double %248, ptr %9, align 8, !tbaa !9
  %249 = load double, ptr %9, align 8, !tbaa !9
  store double %249, ptr %24, align 8, !tbaa !9
  %250 = load double, ptr %24, align 8, !tbaa !9
  %251 = load double, ptr %23, align 8, !tbaa !9
  %252 = fmul double %251, %250
  store double %252, ptr %23, align 8, !tbaa !9
  %253 = load double, ptr %23, align 8, !tbaa !9
  store double %253, ptr %4, align 8, !tbaa !9
  %254 = load double, ptr %4, align 8, !tbaa !9
  store double %254, ptr %24, align 8, !tbaa !9
  %255 = load double, ptr %4, align 8, !tbaa !9
  store double %255, ptr %25, align 8, !tbaa !9
  store double 0x3FC39A09D078C69F, ptr %26, align 8, !tbaa !9
  %256 = load double, ptr %26, align 8, !tbaa !9
  %257 = load double, ptr %25, align 8, !tbaa !9
  %258 = fmul double %257, %256
  store double %258, ptr %25, align 8, !tbaa !9
  store double 0x3FCC71C51D8E78AF, ptr %26, align 8, !tbaa !9
  %259 = load double, ptr %26, align 8, !tbaa !9
  %260 = load double, ptr %25, align 8, !tbaa !9
  %261 = fadd double %260, %259
  store double %261, ptr %25, align 8, !tbaa !9
  %262 = load double, ptr %25, align 8, !tbaa !9
  %263 = load double, ptr %24, align 8, !tbaa !9
  %264 = fmul double %263, %262
  store double %264, ptr %24, align 8, !tbaa !9
  store double 0x3FD999999997FA04, ptr %25, align 8, !tbaa !9
  %265 = load double, ptr %25, align 8, !tbaa !9
  %266 = load double, ptr %24, align 8, !tbaa !9
  %267 = fadd double %266, %265
  store double %267, ptr %24, align 8, !tbaa !9
  %268 = load double, ptr %24, align 8, !tbaa !9
  %269 = load double, ptr %23, align 8, !tbaa !9
  %270 = fmul double %269, %268
  store double %270, ptr %23, align 8, !tbaa !9
  %271 = load double, ptr %9, align 8, !tbaa !9
  store double %271, ptr %24, align 8, !tbaa !9
  %272 = load double, ptr %4, align 8, !tbaa !9
  store double %272, ptr %25, align 8, !tbaa !9
  %273 = load double, ptr %4, align 8, !tbaa !9
  store double %273, ptr %26, align 8, !tbaa !9
  %274 = load double, ptr %4, align 8, !tbaa !9
  store double %274, ptr %27, align 8, !tbaa !9
  store double 0x3FC2F112DF3E5244, ptr %28, align 8, !tbaa !9
  %275 = load double, ptr %28, align 8, !tbaa !9
  %276 = load double, ptr %27, align 8, !tbaa !9
  %277 = fmul double %276, %275
  store double %277, ptr %27, align 8, !tbaa !9
  store double 0x3FC7466496CB03DE, ptr %28, align 8, !tbaa !9
  %278 = load double, ptr %28, align 8, !tbaa !9
  %279 = load double, ptr %27, align 8, !tbaa !9
  %280 = fadd double %279, %278
  store double %280, ptr %27, align 8, !tbaa !9
  %281 = load double, ptr %27, align 8, !tbaa !9
  %282 = load double, ptr %26, align 8, !tbaa !9
  %283 = fmul double %282, %281
  store double %283, ptr %26, align 8, !tbaa !9
  store double 0x3FD2492494229359, ptr %27, align 8, !tbaa !9
  %284 = load double, ptr %27, align 8, !tbaa !9
  %285 = load double, ptr %26, align 8, !tbaa !9
  %286 = fadd double %285, %284
  store double %286, ptr %26, align 8, !tbaa !9
  %287 = load double, ptr %26, align 8, !tbaa !9
  %288 = load double, ptr %25, align 8, !tbaa !9
  %289 = fmul double %288, %287
  store double %289, ptr %25, align 8, !tbaa !9
  store double 0x3FE5555555555593, ptr %26, align 8, !tbaa !9
  %290 = load double, ptr %26, align 8, !tbaa !9
  %291 = load double, ptr %25, align 8, !tbaa !9
  %292 = fadd double %291, %290
  store double %292, ptr %25, align 8, !tbaa !9
  %293 = load double, ptr %25, align 8, !tbaa !9
  %294 = load double, ptr %24, align 8, !tbaa !9
  %295 = fmul double %294, %293
  store double %295, ptr %24, align 8, !tbaa !9
  %296 = load double, ptr %24, align 8, !tbaa !9
  %297 = load double, ptr %23, align 8, !tbaa !9
  %298 = fadd double %297, %296
  store double %298, ptr %23, align 8, !tbaa !9
  %299 = load double, ptr %23, align 8, !tbaa !9
  %300 = load double, ptr %22, align 8, !tbaa !9
  %301 = fadd double %300, %299
  store double %301, ptr %22, align 8, !tbaa !9
  %302 = load double, ptr %22, align 8, !tbaa !9
  %303 = load double, ptr %21, align 8, !tbaa !9
  %304 = fmul double %303, %302
  store double %304, ptr %21, align 8, !tbaa !9
  %305 = load double, ptr %8, align 8, !tbaa !9
  store double %305, ptr %22, align 8, !tbaa !9
  store double 0x3DEA39EF35793C76, ptr %23, align 8, !tbaa !9
  %306 = load double, ptr %23, align 8, !tbaa !9
  %307 = load double, ptr %22, align 8, !tbaa !9
  %308 = fmul double %307, %306
  store double %308, ptr %22, align 8, !tbaa !9
  %309 = load double, ptr %10, align 8, !tbaa !9
  store double %309, ptr %23, align 8, !tbaa !9
  %310 = load double, ptr %23, align 8, !tbaa !9
  %311 = load double, ptr %22, align 8, !tbaa !9
  %312 = fadd double %311, %310
  store double %312, ptr %22, align 8, !tbaa !9
  %313 = load double, ptr %22, align 8, !tbaa !9
  %314 = load double, ptr %21, align 8, !tbaa !9
  %315 = fadd double %314, %313
  store double %315, ptr %21, align 8, !tbaa !9
  %316 = load double, ptr %11, align 8, !tbaa !9
  store double %316, ptr %22, align 8, !tbaa !9
  %317 = load double, ptr %22, align 8, !tbaa !9
  %318 = load double, ptr %21, align 8, !tbaa !9
  %319 = fsub double %318, %317
  store double %319, ptr %21, align 8, !tbaa !9
  %320 = load double, ptr %21, align 8, !tbaa !9
  %321 = load double, ptr %20, align 8, !tbaa !9
  %322 = fadd double %321, %320
  store double %322, ptr %20, align 8, !tbaa !9
  %323 = load double, ptr %20, align 8, !tbaa !9
  %324 = load double, ptr %19, align 8, !tbaa !9
  %325 = fadd double %324, %323
  store double %325, ptr %19, align 8, !tbaa !9
  br label %326

326:                                              ; preds = %219, %77
  br label %329

327:                                              ; preds = %118, %99
  %328 = load double, ptr %4, align 8, !tbaa !9
  store double %328, ptr %19, align 8, !tbaa !9
  br label %329

329:                                              ; preds = %327, %326, %78
  %330 = load double, ptr %19, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret double %330
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden double @f64_reinterpret_i64(i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_reinterpret_f64(double noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local double @w2c_hermes_log1p(ptr nocapture noundef readnone %0, double noundef %1) local_unnamed_addr #1 {
  %3 = tail call i64 @i64_reinterpret_f64(double noundef %1)
  %4 = icmp slt i64 %3, 4601133429810003968
  br i1 %4, label %5, label %16

5:                                                ; preds = %2
  %6 = icmp ugt i64 %3, -4616189618054758401
  br i1 %6, label %7, label %12

7:                                                ; preds = %5
  %8 = fcmp oeq double %1, -1.000000e+00
  br i1 %8, label %74, label %9

9:                                                ; preds = %7
  %10 = fsub double %1, %1
  %11 = fdiv double %10, 0.000000e+00
  br label %74

12:                                               ; preds = %5
  %sh.diff = lshr i64 %3, 31
  %tr.sh.diff = trunc i64 %sh.diff to i32
  %13 = icmp ult i32 %tr.sh.diff, 2034237440
  br i1 %13, label %74, label %14

14:                                               ; preds = %12
  %15 = icmp ugt i64 %3, -4624424114038243329
  br i1 %15, label %18, label %45

16:                                               ; preds = %2
  %17 = icmp ugt i64 %3, 9218868437227405311
  br i1 %17, label %74, label %18

18:                                               ; preds = %16, %14
  %19 = fadd double %1, 1.000000e+00
  %20 = tail call i64 @i64_reinterpret_f64(double noundef %19)
  %21 = lshr i64 %20, 32
  %22 = trunc nuw i64 %21 to i32
  %23 = add i32 %22, 614242
  %24 = lshr i32 %23, 20
  %25 = add nsw i32 %24, -1023
  %26 = icmp ult i32 %23, 1129316352
  br i1 %26, label %27, label %35

27:                                               ; preds = %18
  %28 = fsub double %1, %19
  %29 = fadd double %28, 1.000000e+00
  %30 = fadd double %19, -1.000000e+00
  %31 = fsub double %1, %30
  %32 = icmp ugt i32 %23, 1074790399
  %33 = select i1 %32, double %29, double %31
  %34 = fdiv double %33, %19
  br label %35

35:                                               ; preds = %27, %18
  %.0187 = phi double [ %34, %27 ], [ 0.000000e+00, %18 ]
  %36 = and i64 %20, 4294967295
  %37 = and i32 %23, 1048575
  %38 = add nuw nsw i32 %37, 1072079006
  %39 = zext nneg i32 %38 to i64
  %40 = shl nuw nsw i64 %39, 32
  %41 = or disjoint i64 %40, %36
  %42 = tail call double @f64_reinterpret_i64(i64 noundef %41)
  %43 = fadd double %42, -1.000000e+00
  %44 = sitofp i32 %25 to double
  br label %45

45:                                               ; preds = %14, %35
  %.1188 = phi double [ %.0187, %35 ], [ 0.000000e+00, %14 ]
  %.0186 = phi double [ %44, %35 ], [ 0.000000e+00, %14 ]
  %.0 = phi double [ %43, %35 ], [ %1, %14 ]
  %46 = fmul double %.0186, 0x3FE62E42FEE00000
  %47 = fadd double %.0, 2.000000e+00
  %48 = fdiv double %.0, %47
  %49 = fmul double %.0, 5.000000e-01
  %50 = fmul double %.0, %49
  %51 = fmul double %48, %48
  %52 = fmul double %51, %51
  %53 = fmul double %52, 0x3FC2F112DF3E5244
  %54 = fadd double %53, 0x3FC7466496CB03DE
  %55 = insertelement <2 x double> poison, double %52, i64 0
  %56 = shufflevector <2 x double> %55, <2 x double> poison, <2 x i32> zeroinitializer
  %57 = insertelement <2 x double> <double 0x3FC39A09D078C69F, double poison>, double %54, i64 1
  %58 = fmul <2 x double> %56, %57
  %59 = fadd <2 x double> %58, <double 0x3FCC71C51D8E78AF, double 0x3FD2492494229359>
  %60 = fmul <2 x double> %56, %59
  %61 = fadd <2 x double> %60, <double 0x3FD999999997FA04, double 0x3FE5555555555593>
  %62 = insertelement <2 x double> %55, double %51, i64 1
  %63 = fmul <2 x double> %62, %61
  %shift = shufflevector <2 x double> %63, <2 x double> poison, <2 x i32> <i32 1, i32 poison>
  %64 = fadd <2 x double> %63, %shift
  %65 = extractelement <2 x double> %64, i64 0
  %66 = fadd double %50, %65
  %67 = fmul double %48, %66
  %68 = fmul double %.0186, 0x3DEA39EF35793C76
  %69 = fadd double %.1188, %68
  %70 = fadd double %69, %67
  %71 = fsub double %70, %50
  %72 = fadd double %.0, %71
  %73 = fadd double %46, %72
  br label %74

74:                                               ; preds = %12, %16, %45, %7, %9
  %.1 = phi double [ 0xFFF0000000000000, %7 ], [ %11, %9 ], [ %73, %45 ], [ %1, %16 ], [ %1, %12 ]
  ret double %.1
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass,VectorCombinePass