; LLVM IR from DionysiosB/CodeForces :: 0900-0999/962C-MakeASquare.ll (Z5checkxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5checkxx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %26, %2
  %9 = load i64, ptr %4, align 8, !tbaa !5
  %10 = icmp sgt i64 %9, 0
  br i1 %10, label %11, label %29

11:                                               ; preds = %8
  %12 = load i64, ptr %5, align 8, !tbaa !5
  %13 = icmp eq i64 %12, 0
  br i1 %13, label %20, label %14

14:                                               ; preds = %11
  %15 = load i64, ptr %4, align 8, !tbaa !5
  %16 = srem i64 %15, 10
  %17 = load i64, ptr %5, align 8, !tbaa !5
  %18 = srem i64 %17, 10
  %19 = icmp ne i64 %16, %18
  br i1 %19, label %20, label %23

20:                                               ; preds = %14, %11
  %21 = load i32, ptr %6, align 4, !tbaa !9
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr %6, align 4, !tbaa !9
  br label %26

23:                                               ; preds = %14
  %24 = load i64, ptr %5, align 8, !tbaa !5
  %25 = sdiv i64 %24, 10
  store i64 %25, ptr %5, align 8, !tbaa !5
  br label %26

26:                                               ; preds = %23, %20
  %27 = load i64, ptr %4, align 8, !tbaa !5
  %28 = sdiv i64 %27, 10
  store i64 %28, ptr %4, align 8, !tbaa !5
  br label %8, !llvm.loop !11

29:                                               ; preds = %8
  %30 = load i64, ptr %5, align 8, !tbaa !5
  %31 = icmp sgt i64 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %29
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %35

33:                                               ; preds = %29
  %34 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %34, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %35

35:                                               ; preds = %33, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %36 = load i32, ptr %3, align 4
  ret i32 %36
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @_Z5checkxx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i64 %0, 0
  br i1 %3, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2, %11
  %.017 = phi i32 [ %.1, %11 ], [ 0, %2 ]
  %.01016 = phi i64 [ %.111, %11 ], [ %1, %2 ]
  %.01214 = phi i64 [ %12, %11 ], [ %0, %2 ]
  %4 = icmp eq i64 %.01016, 0
  br i1 %4, label %9, label %5

5:                                                ; preds = %.lr.ph
  %6 = urem i64 %.01214, 10
  %7 = srem i64 %.01016, 10
  %8 = sdiv i64 %.01016, 10
  %.not = icmp eq i64 %6, %7
  br i1 %.not, label %11, label %9

9:                                                ; preds = %5, %.lr.ph
  %10 = add nsw i32 %.017, 1
  br label %11

11:                                               ; preds = %5, %9
  %.111 = phi i64 [ %.01016, %9 ], [ %8, %5 ]
  %.1 = phi i32 [ %10, %9 ], [ %.017, %5 ]
  %12 = udiv i64 %.01214, 10
  %.not19 = icmp ult i64 %.01214, 10
  br i1 %.not19, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %11, %2
  %.010.lcssa = phi i64 [ %1, %2 ], [ %.111, %11 ]
  %.0.lcssa = phi i32 [ 0, %2 ], [ %.1, %11 ]
  %13 = icmp sgt i64 %.010.lcssa, 0
  %..0 = select i1 %13, i32 -1, i32 %.0.lcssa
  ret i32 %..0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DivRemPairsPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass