; LLVM IR from DionysiosB/CodeForces :: 0200-0299/274B-ZeroTree.ll (Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS_IbSaIbEERS1_S9_S9_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS_IbSaIbEERS1_S9_S9_(i64 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(40) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) %5) #0 {
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca %"struct.std::_Bit_reference", align 8
  %14 = alloca %"struct.std::_Bit_reference", align 8
  %15 = alloca i64, align 8
  %16 = alloca i32, align 4
  %17 = alloca i64, align 8
  %18 = alloca %"struct.std::_Bit_reference", align 8
  store i64 %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !9
  store ptr %5, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #3
  %19 = load ptr, ptr %9, align 8, !tbaa !9
  %20 = load i64, ptr %7, align 8, !tbaa !5
  %21 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %19, i64 noundef %20)
  %22 = getelementptr inbounds { ptr, i64 }, ptr %13, i32 0, i32 0
  %23 = extractvalue { ptr, i64 } %21, 0
  store ptr %23, ptr %22, align 8
  %24 = getelementptr inbounds { ptr, i64 }, ptr %13, i32 0, i32 1
  %25 = extractvalue { ptr, i64 } %21, 1
  store i64 %25, ptr %24, align 8
  %26 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %13) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #3
  br i1 %26, label %27, label %28

27:                                               ; preds = %6
  br label %170

28:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 16, ptr %14) #3
  %29 = load ptr, ptr %9, align 8, !tbaa !9
  %30 = load i64, ptr %7, align 8, !tbaa !5
  %31 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %29, i64 noundef %30)
  %32 = getelementptr inbounds { ptr, i64 }, ptr %14, i32 0, i32 0
  %33 = extractvalue { ptr, i64 } %31, 0
  store ptr %33, ptr %32, align 8
  %34 = getelementptr inbounds { ptr, i64 }, ptr %14, i32 0, i32 1
  %35 = extractvalue { ptr, i64 } %31, 1
  store i64 %35, ptr %34, align 8
  %36 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %14, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  store i64 0, ptr %15, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %119, %28
  %38 = load i64, ptr %15, align 8, !tbaa !5
  %39 = load ptr, ptr %8, align 8, !tbaa !9
  %40 = load i64, ptr %7, align 8, !tbaa !5
  %41 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %40) #3
  %42 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %41) #3
  %43 = icmp ult i64 %38, %42
  br i1 %43, label %45, label %44

44:                                               ; preds = %37
  store i32 2, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  br label %122

45:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  %46 = load ptr, ptr %8, align 8, !tbaa !9
  %47 = load i64, ptr %7, align 8, !tbaa !5
  %48 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %47) #3
  %49 = load i64, ptr %15, align 8, !tbaa !5
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %49) #3
  %51 = load i64, ptr %50, align 8, !tbaa !5
  store i64 %51, ptr %17, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %18) #3
  %52 = load ptr, ptr %9, align 8, !tbaa !9
  %53 = load i64, ptr %17, align 8, !tbaa !5
  %54 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %52, i64 noundef %53)
  %55 = getelementptr inbounds { ptr, i64 }, ptr %18, i32 0, i32 0
  %56 = extractvalue { ptr, i64 } %54, 0
  store ptr %56, ptr %55, align 8
  %57 = getelementptr inbounds { ptr, i64 }, ptr %18, i32 0, i32 1
  %58 = extractvalue { ptr, i64 } %54, 1
  store i64 %58, ptr %57, align 8
  %59 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %18) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr %18) #3
  br i1 %59, label %60, label %61

60:                                               ; preds = %45
  store i32 4, ptr %16, align 4
  br label %116

61:                                               ; preds = %45
  %62 = load i64, ptr %17, align 8, !tbaa !5
  %63 = load ptr, ptr %8, align 8, !tbaa !9
  %64 = load ptr, ptr %9, align 8, !tbaa !9
  %65 = load ptr, ptr %10, align 8, !tbaa !9
  %66 = load ptr, ptr %11, align 8, !tbaa !9
  %67 = load ptr, ptr %12, align 8, !tbaa !9
  call void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS_IbSaIbEERS1_S9_S9_(i64 noundef %62, ptr noundef nonnull align 8 dereferenceable(24) %63, ptr noundef nonnull align 8 dereferenceable(40) %64, ptr noundef nonnull align 8 dereferenceable(24) %65, ptr noundef nonnull align 8 dereferenceable(24) %66, ptr noundef nonnull align 8 dereferenceable(24) %67)
  %68 = load ptr, ptr %11, align 8, !tbaa !9
  %69 = load i64, ptr %7, align 8, !tbaa !5
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %69) #3
  %71 = load i64, ptr %70, align 8, !tbaa !5
  %72 = load ptr, ptr %11, align 8, !tbaa !9
  %73 = load i64, ptr %17, align 8, !tbaa !5
  %74 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %73) #3
  %75 = load i64, ptr %74, align 8, !tbaa !5
  %76 = icmp sgt i64 %71, %75
  br i1 %76, label %77, label %82

77:                                               ; preds = %61
  %78 = load ptr, ptr %11, align 8, !tbaa !9
  %79 = load i64, ptr %7, align 8, !tbaa !5
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %79) #3
  %81 = load i64, ptr %80, align 8, !tbaa !5
  br label %87

82:                                               ; preds = %61
  %83 = load ptr, ptr %11, align 8, !tbaa !9
  %84 = load i64, ptr %17, align 8, !tbaa !5
  %85 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %84) #3
  %86 = load i64, ptr %85, align 8, !tbaa !5
  br label %87

87:                                               ; preds = %82, %77
  %88 = phi i64 [ %81, %77 ], [ %86, %82 ]
  %89 = load ptr, ptr %11, align 8, !tbaa !9
  %90 = load i64, ptr %7, align 8, !tbaa !5
  %91 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %90) #3
  store i64 %88, ptr %91, align 8, !tbaa !5
  %92 = load ptr, ptr %12, align 8, !tbaa !9
  %93 = load i64, ptr %7, align 8, !tbaa !5
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %93) #3
  %95 = load i64, ptr %94, align 8, !tbaa !5
  %96 = load ptr, ptr %12, align 8, !tbaa !9
  %97 = load i64, ptr %17, align 8, !tbaa !5
  %98 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %97) #3
  %99 = load i64, ptr %98, align 8, !tbaa !5
  %100 = icmp sgt i64 %95, %99
  br i1 %100, label %101, label %106

101:                                              ; preds = %87
  %102 = load ptr, ptr %12, align 8, !tbaa !9
  %103 = load i64, ptr %7, align 8, !tbaa !5
  %104 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %102, i64 noundef %103) #3
  %105 = load i64, ptr %104, align 8, !tbaa !5
  br label %111

106:                                              ; preds = %87
  %107 = load ptr, ptr %12, align 8, !tbaa !9
  %108 = load i64, ptr %17, align 8, !tbaa !5
  %109 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %108) #3
  %110 = load i64, ptr %109, align 8, !tbaa !5
  br label %111

111:                                              ; preds = %106, %101
  %112 = phi i64 [ %105, %101 ], [ %110, %106 ]
  %113 = load ptr, ptr %12, align 8, !tbaa !9
  %114 = load i64, ptr %7, align 8, !tbaa !5
  %115 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %114) #3
  store i64 %112, ptr %115, align 8, !tbaa !5
  store i32 0, ptr %16, align 4
  br label %116

116:                                              ; preds = %111, %60
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  %117 = load i32, ptr %16, align 4
  switch i32 %117, label %171 [
    i32 0, label %118
    i32 4, label %119
  ]

118:                                              ; preds = %116
  br label %119

119:                                              ; preds = %118, %116
  %120 = load i64, ptr %15, align 8, !tbaa !5
  %121 = add nsw i64 %120, 1
  store i64 %121, ptr %15, align 8, !tbaa !5
  br label %37, !llvm.loop !11

122:                                              ; preds = %44
  %123 = load ptr, ptr %11, align 8, !tbaa !9
  %124 = load i64, ptr %7, align 8, !tbaa !5
  %125 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %123, i64 noundef %124) #3
  %126 = load i64, ptr %125, align 8, !tbaa !5
  %127 = load ptr, ptr %12, align 8, !tbaa !9
  %128 = load i64, ptr %7, align 8, !tbaa !5
  %129 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %127, i64 noundef %128) #3
  %130 = load i64, ptr %129, align 8, !tbaa !5
  %131 = sub nsw i64 %126, %130
  %132 = load ptr, ptr %10, align 8, !tbaa !9
  %133 = load i64, ptr %7, align 8, !tbaa !5
  %134 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %132, i64 noundef %133) #3
  %135 = load i64, ptr %134, align 8, !tbaa !5
  %136 = add nsw i64 %135, %131
  store i64 %136, ptr %134, align 8, !tbaa !5
  %137 = load ptr, ptr %10, align 8, !tbaa !9
  %138 = load i64, ptr %7, align 8, !tbaa !5
  %139 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %137, i64 noundef %138) #3
  %140 = load i64, ptr %139, align 8, !tbaa !5
  %141 = icmp sgt i64 %140, 0
  br i1 %141, label %142, label %152

142:                                              ; preds = %122
  %143 = load ptr, ptr %10, align 8, !tbaa !9
  %144 = load i64, ptr %7, align 8, !tbaa !5
  %145 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %143, i64 noundef %144) #3
  %146 = load i64, ptr %145, align 8, !tbaa !5
  %147 = load ptr, ptr %12, align 8, !tbaa !9
  %148 = load i64, ptr %7, align 8, !tbaa !5
  %149 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %147, i64 noundef %148) #3
  %150 = load i64, ptr %149, align 8, !tbaa !5
  %151 = add nsw i64 %150, %146
  store i64 %151, ptr %149, align 8, !tbaa !5
  br label %169

152:                                              ; preds = %122
  %153 = load ptr, ptr %10, align 8, !tbaa !9
  %154 = load i64, ptr %7, align 8, !tbaa !5
  %155 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %153, i64 noundef %154) #3
  %156 = load i64, ptr %155, align 8, !tbaa !5
  %157 = icmp slt i64 %156, 0
  br i1 %157, label %158, label %168

158:                                              ; preds = %152
  %159 = load ptr, ptr %10, align 8, !tbaa !9
  %160 = load i64, ptr %7, align 8, !tbaa !5
  %161 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %159, i64 noundef %160) #3
  %162 = load i64, ptr %161, align 8, !tbaa !5
  %163 = load ptr, ptr %11, align 8, !tbaa !9
  %164 = load i64, ptr %7, align 8, !tbaa !5
  %165 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %163, i64 noundef %164) #3
  %166 = load i64, ptr %165, align 8, !tbaa !5
  %167 = sub nsw i64 %166, %162
  store i64 %167, ptr %165, align 8, !tbaa !5
  br label %168

168:                                              ; preds = %158, %152
  br label %169

169:                                              ; preds = %168, %142
  br label %170

170:                                              ; preds = %169, %27
  ret void

171:                                              ; preds = %116
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS_IbSaIbEERS1_S9_S9_(i64 noundef %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(40) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) %5) local_unnamed_addr #0 {
  %7 = alloca %"struct.std::_Bit_reference", align 8
  %8 = alloca %"struct.std::_Bit_reference", align 8
  %9 = alloca %"struct.std::_Bit_reference", align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %7) #3
  %10 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %2, i64 noundef %0)
  %11 = extractvalue { ptr, i64 } %10, 0
  store ptr %11, ptr %7, align 8
  %12 = getelementptr inbounds i8, ptr %7, i64 8
  %13 = extractvalue { ptr, i64 } %10, 1
  store i64 %13, ptr %12, align 8
  %14 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %7) #3
  br i1 %14, label %79, label %15

15:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %8) #3
  %16 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %2, i64 noundef %0)
  %17 = extractvalue { ptr, i64 } %16, 0
  store ptr %17, ptr %8, align 8
  %18 = getelementptr inbounds i8, ptr %8, i64 8
  %19 = extractvalue { ptr, i64 } %16, 1
  store i64 %19, ptr %18, align 8
  %20 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %8, i1 noundef zeroext true) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %8) #3
  %21 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %0) #3
  %22 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #3
  %.not = icmp eq i64 %22, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %15
  %23 = getelementptr inbounds i8, ptr %9, i64 8
  br label %37

._crit_edge:                                      ; preds = %62, %15
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %0) #3
  %25 = load i64, ptr %24, align 8, !tbaa !5
  %26 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %0) #3
  %27 = load i64, ptr %26, align 8, !tbaa !5
  %28 = sub i64 %25, %27
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = add nsw i64 %28, %30
  store i64 %31, ptr %29, align 8, !tbaa !5
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %33 = load i64, ptr %32, align 8, !tbaa !5
  %34 = icmp sgt i64 %33, 0
  %35 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %36 = load i64, ptr %35, align 8, !tbaa !5
  br i1 %34, label %67, label %71

37:                                               ; preds = %.lr.ph, %62
  %.057 = phi i64 [ 0, %.lr.ph ], [ %63, %62 ]
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %0) #3
  %39 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %.057) #3
  %40 = load i64, ptr %39, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %9) #3
  %41 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %2, i64 noundef %40)
  %42 = extractvalue { ptr, i64 } %41, 0
  store ptr %42, ptr %9, align 8
  %43 = extractvalue { ptr, i64 } %41, 1
  store i64 %43, ptr %23, align 8
  %44 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %9) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %9) #3
  br i1 %44, label %62, label %45

45:                                               ; preds = %37
  call void @_Z3dfslRKSt6vectorIS_IlSaIlEESaIS1_EERS_IbSaIbEERS1_S9_S9_(i64 noundef %40, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(40) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) %5)
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %0) #3
  %47 = load i64, ptr %46, align 8, !tbaa !5
  %48 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %40) #3
  %49 = load i64, ptr %48, align 8, !tbaa !5
  %50 = icmp sgt i64 %47, %49
  %. = select i1 %50, i64 %0, i64 %40
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %.) #3
  %52 = load i64, ptr %51, align 8, !tbaa !5
  %53 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %0) #3
  store i64 %52, ptr %53, align 8, !tbaa !5
  %54 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %0) #3
  %55 = load i64, ptr %54, align 8, !tbaa !5
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %40) #3
  %57 = load i64, ptr %56, align 8, !tbaa !5
  %58 = icmp sgt i64 %55, %57
  %.sink58 = select i1 %58, i64 %0, i64 %40
  %59 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %.sink58) #3
  %60 = load i64, ptr %59, align 8, !tbaa !5
  %61 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %0) #3
  store i64 %60, ptr %61, align 8, !tbaa !5
  br label %62

62:                                               ; preds = %37, %45
  %63 = add nuw nsw i64 %.057, 1
  %64 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %0) #3
  %65 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %64) #3
  %66 = icmp ult i64 %63, %65
  br i1 %66, label %37, label %._crit_edge, !llvm.loop !9

67:                                               ; preds = %._crit_edge
  %68 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %0) #3
  %69 = load i64, ptr %68, align 8, !tbaa !5
  %70 = add nsw i64 %69, %36
  store i64 %70, ptr %68, align 8, !tbaa !5
  br label %79

71:                                               ; preds = %._crit_edge
  %72 = icmp slt i64 %36, 0
  br i1 %72, label %73, label %79

73:                                               ; preds = %71
  %74 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %0) #3
  %75 = load i64, ptr %74, align 8, !tbaa !5
  %76 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %0) #3
  %77 = load i64, ptr %76, align 8, !tbaa !5
  %78 = sub nsw i64 %77, %75
  store i64 %78, ptr %76, align 8, !tbaa !5
  br label %79

79:                                               ; preds = %67, %73, %71, %6
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass