; LLVM IR from DionysiosB/CodeForces :: 0700-0799/702C-CellularNetwork_BinarySearch.ll (Z5checkRKSt6vectorIlSaIlEES3_l)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5checkRKSt6vectorIlSaIlEES3_l(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  store i64 0, ptr %8, align 8, !tbaa !9
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef 0) #2
  %14 = load i64, ptr %13, align 8, !tbaa !9
  %15 = load i64, ptr %7, align 8, !tbaa !9
  %16 = add nsw i64 %14, %15
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef 0) #2
  %19 = load i64, ptr %18, align 8, !tbaa !9
  %20 = icmp slt i64 %16, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %3
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %104

22:                                               ; preds = %3
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEE4backEv(ptr noundef nonnull align 8 dereferenceable(24) %23) #2
  %25 = load i64, ptr %24, align 8, !tbaa !9
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEE4backEv(ptr noundef nonnull align 8 dereferenceable(24) %26) #2
  %28 = load i64, ptr %27, align 8, !tbaa !9
  %29 = load i64, ptr %7, align 8, !tbaa !9
  %30 = add nsw i64 %28, %29
  %31 = icmp sgt i64 %25, %30
  br i1 %31, label %32, label %33

32:                                               ; preds = %22
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %104

33:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  store i64 0, ptr %10, align 8, !tbaa !9
  br label %34

34:                                               ; preds = %98, %33
  %35 = load i64, ptr %10, align 8, !tbaa !9
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %36) #2
  %38 = icmp ult i64 %35, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %34
  store i32 2, ptr %9, align 4
  br label %101

40:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = load i64, ptr %10, align 8, !tbaa !9
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %42) #2
  %44 = load i64, ptr %43, align 8, !tbaa !9
  store i64 %44, ptr %11, align 8, !tbaa !9
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i64, ptr %8, align 8, !tbaa !9
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %46) #2
  %48 = load i64, ptr %47, align 8, !tbaa !9
  %49 = load i64, ptr %7, align 8, !tbaa !9
  %50 = sub nsw i64 %48, %49
  %51 = load i64, ptr %11, align 8, !tbaa !9
  %52 = icmp sle i64 %50, %51
  br i1 %52, label %53, label %63

53:                                               ; preds = %40
  %54 = load i64, ptr %11, align 8, !tbaa !9
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = load i64, ptr %8, align 8, !tbaa !9
  %57 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %56) #2
  %58 = load i64, ptr %57, align 8, !tbaa !9
  %59 = load i64, ptr %7, align 8, !tbaa !9
  %60 = add nsw i64 %58, %59
  %61 = icmp sle i64 %54, %60
  br i1 %61, label %62, label %63

62:                                               ; preds = %53
  store i32 4, ptr %9, align 4
  br label %95

63:                                               ; preds = %53, %40
  br label %64

64:                                               ; preds = %92, %63
  %65 = load i64, ptr %11, align 8, !tbaa !9
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = load i64, ptr %8, align 8, !tbaa !9
  %68 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %67) #2
  %69 = load i64, ptr %68, align 8, !tbaa !9
  %70 = load i64, ptr %7, align 8, !tbaa !9
  %71 = sub nsw i64 %69, %70
  %72 = icmp slt i64 %65, %71
  br i1 %72, label %82, label %73

73:                                               ; preds = %64
  %74 = load ptr, ptr %6, align 8, !tbaa !5
  %75 = load i64, ptr %8, align 8, !tbaa !9
  %76 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %75) #2
  %77 = load i64, ptr %76, align 8, !tbaa !9
  %78 = load i64, ptr %7, align 8, !tbaa !9
  %79 = add nsw i64 %77, %78
  %80 = load i64, ptr %11, align 8, !tbaa !9
  %81 = icmp slt i64 %79, %80
  br label %82

82:                                               ; preds = %73, %64
  %83 = phi i1 [ true, %64 ], [ %81, %73 ]
  br i1 %83, label %84, label %93

84:                                               ; preds = %82
  %85 = load i64, ptr %8, align 8, !tbaa !9
  %86 = add nsw i64 %85, 1
  store i64 %86, ptr %8, align 8, !tbaa !9
  %87 = load i64, ptr %8, align 8, !tbaa !9
  %88 = load ptr, ptr %6, align 8, !tbaa !5
  %89 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %88) #2
  %90 = icmp uge i64 %87, %89
  br i1 %90, label %91, label %92

91:                                               ; preds = %84
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %95

92:                                               ; preds = %84
  br label %64, !llvm.loop !11

93:                                               ; preds = %82
  br label %94

94:                                               ; preds = %93
  store i32 0, ptr %9, align 4
  br label %95

95:                                               ; preds = %94, %91, %62
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  %96 = load i32, ptr %9, align 4
  switch i32 %96, label %101 [
    i32 0, label %97
    i32 4, label %98
  ]

97:                                               ; preds = %95
  br label %98

98:                                               ; preds = %97, %95
  %99 = load i64, ptr %10, align 8, !tbaa !9
  %100 = add nsw i64 %99, 1
  store i64 %100, ptr %10, align 8, !tbaa !9
  br label %34, !llvm.loop !13

101:                                              ; preds = %95, %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %102 = load i32, ptr %9, align 4
  switch i32 %102, label %104 [
    i32 2, label %103
  ]

103:                                              ; preds = %101
  store i1 true, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %104

104:                                              ; preds = %103, %101, %32, %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %105 = load i1, ptr %4, align 1
  ret i1 %105
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEE4backEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5checkRKSt6vectorIlSaIlEES3_l(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %6 = add nsw i64 %5, %2
  %7 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #1
  %8 = load i64, ptr %7, align 8, !tbaa !5
  %9 = icmp slt i64 %6, %8
  br i1 %9, label %.loopexit48, label %10

10:                                               ; preds = %3
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEE4backEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEE4backEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %15 = add nsw i64 %14, %2
  %16 = icmp sgt i64 %12, %15
  br i1 %16, label %.loopexit48, label %.preheader

.preheader:                                       ; preds = %10
  %17 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not4452 = icmp eq i64 %17, 0
  br i1 %.not4452, label %.loopexit48, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader, %.loopexit
  %.03254 = phi i64 [ %39, %.loopexit ], [ 0, %.preheader ]
  %.03553 = phi i64 [ %.237.ph, %.loopexit ], [ 0, %.preheader ]
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.03254) #1
  %19 = load i64, ptr %18, align 8, !tbaa !5
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.03553) #1
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = sub nsw i64 %21, %2
  %.not = icmp sgt i64 %22, %19
  br i1 %.not, label %.preheader61, label %23

23:                                               ; preds = %.lr.ph
  %24 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.03553) #1
  %25 = load i64, ptr %24, align 8, !tbaa !5
  %26 = add nsw i64 %25, %2
  %.not42 = icmp sgt i64 %19, %26
  br i1 %.not42, label %.preheader61, label %.loopexit

.preheader61:                                     ; preds = %23, %.lr.ph
  br label %27

27:                                               ; preds = %.preheader61, %.critedge
  %.136 = phi i64 [ %37, %.critedge ], [ %.03553, %.preheader61 ]
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.136) #1
  %29 = load i64, ptr %28, align 8, !tbaa !5
  %30 = sub nsw i64 %29, %2
  %31 = icmp slt i64 %19, %30
  br i1 %31, label %.critedge, label %32

32:                                               ; preds = %27
  %33 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.136) #1
  %34 = load i64, ptr %33, align 8, !tbaa !5
  %35 = add nsw i64 %34, %2
  %36 = icmp slt i64 %35, %19
  br i1 %36, label %.critedge, label %.loopexit

.critedge:                                        ; preds = %27, %32
  %37 = add nsw i64 %.136, 1
  %38 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %.not43 = icmp ult i64 %37, %38
  br i1 %.not43, label %27, label %.loopexit48, !llvm.loop !9

.loopexit:                                        ; preds = %32, %23
  %.237.ph = phi i64 [ %.03553, %23 ], [ %.136, %32 ]
  %39 = add nuw nsw i64 %.03254, 1
  %40 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not44.not = icmp ult i64 %39, %40
  br i1 %.not44.not, label %.lr.ph, label %.loopexit48, !llvm.loop !11

.loopexit48:                                      ; preds = %.loopexit, %.critedge, %.preheader, %10, %3
  %.3 = phi i1 [ false, %3 ], [ false, %10 ], [ true, %.preheader ], [ false, %.critedge ], [ true, %.loopexit ]
  ret i1 %.3
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEE4backEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: ConstraintEliminationPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass