; LLVM IR from DionysiosB/CodeForces :: 0700-0799/781A-AndryushaAndColoredBalloons.ll (Z3dfsRKSt6vectorIS_IlSaIlEESaIS1_EERS1_llRl)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsRKSt6vectorIS_IlSaIlEESaIS1_EERS1_llRl(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2, i64 noundef %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  store i64 1, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  store i64 0, ptr %12, align 8, !tbaa !9
  br label %15

15:                                               ; preds = %82, %5
  %16 = load i64, ptr %12, align 8, !tbaa !9
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = load i64, ptr %8, align 8, !tbaa !9
  %19 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %18) #3
  %20 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %19) #3
  %21 = icmp ult i64 %16, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %15
  store i32 2, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  br label %85

23:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = load i64, ptr %8, align 8, !tbaa !9
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %25) #3
  %27 = load i64, ptr %12, align 8, !tbaa !9
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %27) #3
  %29 = load i64, ptr %28, align 8, !tbaa !9
  store i64 %29, ptr %14, align 8, !tbaa !9
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = load i64, ptr %14, align 8, !tbaa !9
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %31) #3
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = icmp sgt i64 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %23
  store i32 4, ptr %13, align 4
  br label %79

36:                                               ; preds = %23
  br label %37

37:                                               ; preds = %53, %36
  %38 = load i64, ptr %11, align 8, !tbaa !9
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = load i64, ptr %9, align 8, !tbaa !9
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %40) #3
  %42 = load i64, ptr %41, align 8, !tbaa !9
  %43 = icmp eq i64 %38, %42
  br i1 %43, label %51, label %44

44:                                               ; preds = %37
  %45 = load i64, ptr %11, align 8, !tbaa !9
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = load i64, ptr %8, align 8, !tbaa !9
  %48 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %47) #3
  %49 = load i64, ptr %48, align 8, !tbaa !9
  %50 = icmp eq i64 %45, %49
  br label %51

51:                                               ; preds = %44, %37
  %52 = phi i1 [ true, %37 ], [ %50, %44 ]
  br i1 %52, label %53, label %56

53:                                               ; preds = %51
  %54 = load i64, ptr %11, align 8, !tbaa !9
  %55 = add nsw i64 %54, 1
  store i64 %55, ptr %11, align 8, !tbaa !9
  br label %37, !llvm.loop !11

56:                                               ; preds = %51
  %57 = load ptr, ptr %10, align 8, !tbaa !5
  %58 = load i64, ptr %57, align 8, !tbaa !9
  %59 = load i64, ptr %11, align 8, !tbaa !9
  %60 = icmp sgt i64 %58, %59
  br i1 %60, label %61, label %64

61:                                               ; preds = %56
  %62 = load ptr, ptr %10, align 8, !tbaa !5
  %63 = load i64, ptr %62, align 8, !tbaa !9
  br label %66

64:                                               ; preds = %56
  %65 = load i64, ptr %11, align 8, !tbaa !9
  br label %66

66:                                               ; preds = %64, %61
  %67 = phi i64 [ %63, %61 ], [ %65, %64 ]
  %68 = load ptr, ptr %10, align 8, !tbaa !5
  store i64 %67, ptr %68, align 8, !tbaa !9
  %69 = load i64, ptr %11, align 8, !tbaa !9
  %70 = add nsw i64 %69, 1
  store i64 %70, ptr %11, align 8, !tbaa !9
  %71 = load ptr, ptr %7, align 8, !tbaa !5
  %72 = load i64, ptr %14, align 8, !tbaa !9
  %73 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %72) #3
  store i64 %69, ptr %73, align 8, !tbaa !9
  %74 = load ptr, ptr %6, align 8, !tbaa !5
  %75 = load ptr, ptr %7, align 8, !tbaa !5
  %76 = load i64, ptr %14, align 8, !tbaa !9
  %77 = load i64, ptr %8, align 8, !tbaa !9
  %78 = load ptr, ptr %10, align 8, !tbaa !5
  call void @_Z3dfsRKSt6vectorIS_IlSaIlEESaIS1_EERS1_llRl(ptr noundef nonnull align 8 dereferenceable(24) %74, ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %76, i64 noundef %77, ptr noundef nonnull align 8 dereferenceable(8) %78)
  store i32 0, ptr %13, align 4
  br label %79

79:                                               ; preds = %66, %35
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  %80 = load i32, ptr %13, align 4
  switch i32 %80, label %86 [
    i32 0, label %81
    i32 4, label %82
  ]

81:                                               ; preds = %79
  br label %82

82:                                               ; preds = %81, %79
  %83 = load i64, ptr %12, align 8, !tbaa !9
  %84 = add nsw i64 %83, 1
  store i64 %84, ptr %12, align 8, !tbaa !9
  br label %15, !llvm.loop !13

85:                                               ; preds = %22
  store i32 1, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret void

86:                                               ; preds = %79
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsRKSt6vectorIS_IlSaIlEESaIS1_EERS1_llRl(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef nonnull align 8 dereferenceable(8) %4) local_unnamed_addr #0 {
  %6 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %2) #2
  %7 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %6) #2
  %.not = icmp eq i64 %7, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %26, %5
  ret void

.lr.ph:                                           ; preds = %5, %26
  %.031 = phi i64 [ %.2, %26 ], [ 1, %5 ]
  %.02830 = phi i64 [ %27, %26 ], [ 0, %5 ]
  %8 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %2) #2
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %.02830) #2
  %10 = load i64, ptr %9, align 8, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #2
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = icmp sgt i64 %12, 0
  br i1 %13, label %26, label %.preheader

.preheader:                                       ; preds = %.lr.ph, %.critedge
  %.1 = phi i64 [ %21, %.critedge ], [ %.031, %.lr.ph ]
  %14 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %3) #2
  %15 = load i64, ptr %14, align 8, !tbaa !5
  %16 = icmp eq i64 %.1, %15
  br i1 %16, label %.critedge, label %17

17:                                               ; preds = %.preheader
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2) #2
  %19 = load i64, ptr %18, align 8, !tbaa !5
  %20 = icmp eq i64 %.1, %19
  br i1 %20, label %.critedge, label %22

.critedge:                                        ; preds = %.preheader, %17
  %21 = add nsw i64 %.1, 1
  br label %.preheader, !llvm.loop !9

22:                                               ; preds = %17
  %23 = load i64, ptr %4, align 8, !tbaa !5
  %..1 = tail call i64 @llvm.smax.i64(i64 %23, i64 %.1)
  store i64 %..1, ptr %4, align 8, !tbaa !5
  %24 = add nsw i64 %.1, 1
  %25 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10) #2
  store i64 %.1, ptr %25, align 8, !tbaa !5
  tail call void @_Z3dfsRKSt6vectorIS_IlSaIlEESaIS1_EERS1_llRl(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %10, i64 noundef %2, ptr noundef nonnull align 8 dereferenceable(8) %4)
  br label %26

26:                                               ; preds = %.lr.ph, %22
  %.2 = phi i64 [ %24, %22 ], [ %.031, %.lr.ph ]
  %27 = add nuw nsw i64 %.02830, 1
  %28 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %2) #2
  %29 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %28) #2
  %30 = icmp ult i64 %27, %29
  br i1 %30, label %.lr.ph, label %._crit_edge, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass