; LLVM IR from DionysiosB/CodeForces :: 0300-0399/363D-RentingBikes.ll (Z9checkRentRKSt6vectorIlSaIlEES3_ll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z9checkRentRKSt6vectorIlSaIlEES3_ll(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2, i64 noundef %3) #0 {
  %5 = alloca i64, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i64 %2, ptr %8, align 8, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #2
  store i64 %18, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %19) #2
  store i64 %20, ptr %11, align 8, !tbaa !9
  %21 = load i64, ptr %9, align 8, !tbaa !9
  %22 = load i64, ptr %11, align 8, !tbaa !9
  %23 = icmp sgt i64 %21, %22
  br i1 %23, label %28, label %24

24:                                               ; preds = %4
  %25 = load i64, ptr %9, align 8, !tbaa !9
  %26 = load i64, ptr %10, align 8, !tbaa !9
  %27 = icmp sgt i64 %25, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %24, %4
  store i64 -1, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %123

29:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  store i64 0, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #2
  store i64 0, ptr %14, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #2
  store i64 0, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #2
  store i64 0, ptr %16, align 8, !tbaa !9
  br label %30

30:                                               ; preds = %105, %29
  %31 = load i64, ptr %16, align 8, !tbaa !9
  %32 = load i64, ptr %9, align 8, !tbaa !9
  %33 = icmp slt i64 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 2, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #2
  br label %108

35:                                               ; preds = %30
  %36 = load ptr, ptr %7, align 8, !tbaa !5
  %37 = load i64, ptr %16, align 8, !tbaa !9
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %37) #2
  %39 = load i64, ptr %38, align 8, !tbaa !9
  %40 = load i64, ptr %15, align 8, !tbaa !9
  %41 = add nsw i64 %40, %39
  store i64 %41, ptr %15, align 8, !tbaa !9
  %42 = load ptr, ptr %7, align 8, !tbaa !5
  %43 = load i64, ptr %16, align 8, !tbaa !9
  %44 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %43) #2
  %45 = load i64, ptr %44, align 8, !tbaa !9
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = load i64, ptr %10, align 8, !tbaa !9
  %48 = load i64, ptr %9, align 8, !tbaa !9
  %49 = sub nsw i64 %47, %48
  %50 = load i64, ptr %16, align 8, !tbaa !9
  %51 = add nsw i64 %49, %50
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %51) #2
  %53 = load i64, ptr %52, align 8, !tbaa !9
  %54 = icmp slt i64 %45, %53
  br i1 %54, label %55, label %60

55:                                               ; preds = %35
  %56 = load ptr, ptr %7, align 8, !tbaa !5
  %57 = load i64, ptr %16, align 8, !tbaa !9
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %57) #2
  %59 = load i64, ptr %58, align 8, !tbaa !9
  br label %69

60:                                               ; preds = %35
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = load i64, ptr %10, align 8, !tbaa !9
  %63 = load i64, ptr %9, align 8, !tbaa !9
  %64 = sub nsw i64 %62, %63
  %65 = load i64, ptr %16, align 8, !tbaa !9
  %66 = add nsw i64 %64, %65
  %67 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %66) #2
  %68 = load i64, ptr %67, align 8, !tbaa !9
  br label %69

69:                                               ; preds = %60, %55
  %70 = phi i64 [ %59, %55 ], [ %68, %60 ]
  %71 = load i64, ptr %14, align 8, !tbaa !9
  %72 = add nsw i64 %71, %70
  store i64 %72, ptr %14, align 8, !tbaa !9
  %73 = load ptr, ptr %7, align 8, !tbaa !5
  %74 = load i64, ptr %16, align 8, !tbaa !9
  %75 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %74) #2
  %76 = load i64, ptr %75, align 8, !tbaa !9
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = load i64, ptr %10, align 8, !tbaa !9
  %79 = load i64, ptr %9, align 8, !tbaa !9
  %80 = sub nsw i64 %78, %79
  %81 = load i64, ptr %16, align 8, !tbaa !9
  %82 = add nsw i64 %80, %81
  %83 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %82) #2
  %84 = load i64, ptr %83, align 8, !tbaa !9
  %85 = icmp slt i64 %76, %84
  br i1 %85, label %86, label %87

86:                                               ; preds = %69
  br label %101

87:                                               ; preds = %69
  %88 = load ptr, ptr %7, align 8, !tbaa !5
  %89 = load i64, ptr %16, align 8, !tbaa !9
  %90 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %89) #2
  %91 = load i64, ptr %90, align 8, !tbaa !9
  %92 = load ptr, ptr %6, align 8, !tbaa !5
  %93 = load i64, ptr %10, align 8, !tbaa !9
  %94 = load i64, ptr %9, align 8, !tbaa !9
  %95 = sub nsw i64 %93, %94
  %96 = load i64, ptr %16, align 8, !tbaa !9
  %97 = add nsw i64 %95, %96
  %98 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %97) #2
  %99 = load i64, ptr %98, align 8, !tbaa !9
  %100 = sub nsw i64 %91, %99
  br label %101

101:                                              ; preds = %87, %86
  %102 = phi i64 [ 0, %86 ], [ %100, %87 ]
  %103 = load i64, ptr %13, align 8, !tbaa !9
  %104 = add nsw i64 %103, %102
  store i64 %104, ptr %13, align 8, !tbaa !9
  br label %105

105:                                              ; preds = %101
  %106 = load i64, ptr %16, align 8, !tbaa !9
  %107 = add nsw i64 %106, 1
  store i64 %107, ptr %16, align 8, !tbaa !9
  br label %30, !llvm.loop !11

108:                                              ; preds = %34
  %109 = load i64, ptr %13, align 8, !tbaa !9
  %110 = load i64, ptr %8, align 8, !tbaa !9
  %111 = icmp sgt i64 %109, %110
  br i1 %111, label %112, label %113

112:                                              ; preds = %108
  store i64 -1, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %122

113:                                              ; preds = %108
  %114 = load i64, ptr %15, align 8, !tbaa !9
  %115 = load i64, ptr %8, align 8, !tbaa !9
  %116 = icmp slt i64 %114, %115
  br i1 %116, label %117, label %118

117:                                              ; preds = %113
  store i64 0, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %122

118:                                              ; preds = %113
  %119 = load i64, ptr %15, align 8, !tbaa !9
  %120 = load i64, ptr %8, align 8, !tbaa !9
  %121 = sub nsw i64 %119, %120
  store i64 %121, ptr %5, align 8
  store i32 1, ptr %12, align 4
  br label %122

122:                                              ; preds = %118, %117, %112
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  br label %123

123:                                              ; preds = %122, %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %124 = load i64, ptr %5, align 8
  ret i64 %124
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z9checkRentRKSt6vectorIlSaIlEES3_ll(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
  %5 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %6 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #1
  %7 = icmp slt i64 %6, %3
  %8 = icmp slt i64 %5, %3
  %or.cond = or i1 %8, %7
  br i1 %or.cond, label %45, label %.preheader

.preheader:                                       ; preds = %4
  %9 = icmp sgt i64 %3, 0
  br i1 %9, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader
  %10 = sub nsw i64 %5, %3
  br label %12

._crit_edge:                                      ; preds = %38, %.preheader
  %.046.lcssa = phi i64 [ 0, %.preheader ], [ %40, %38 ]
  %.044.lcssa = phi i64 [ 0, %.preheader ], [ %15, %38 ]
  %11 = icmp sgt i64 %.046.lcssa, %2
  br i1 %11, label %45, label %42

12:                                               ; preds = %.lr.ph, %38
  %.053 = phi i64 [ 0, %.lr.ph ], [ %41, %38 ]
  %.04452 = phi i64 [ 0, %.lr.ph ], [ %15, %38 ]
  %.04651 = phi i64 [ 0, %.lr.ph ], [ %40, %38 ]
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.053) #1
  %14 = load i64, ptr %13, align 8, !tbaa !5
  %15 = add nsw i64 %14, %.04452
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.053) #1
  %17 = load i64, ptr %16, align 8, !tbaa !5
  %18 = add nsw i64 %.053, %10
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #1
  %20 = load i64, ptr %19, align 8, !tbaa !5
  %21 = icmp slt i64 %17, %20
  br i1 %21, label %22, label %24

22:                                               ; preds = %12
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.053) #1
  br label %26

24:                                               ; preds = %12
  %25 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #1
  br label %26

26:                                               ; preds = %24, %22
  %27 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.053) #1
  %28 = load i64, ptr %27, align 8, !tbaa !5
  %29 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #1
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = icmp slt i64 %28, %30
  br i1 %31, label %38, label %32

32:                                               ; preds = %26
  %33 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.053) #1
  %34 = load i64, ptr %33, align 8, !tbaa !5
  %35 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #1
  %36 = load i64, ptr %35, align 8, !tbaa !5
  %37 = sub nsw i64 %34, %36
  br label %38

38:                                               ; preds = %26, %32
  %39 = phi i64 [ %37, %32 ], [ 0, %26 ]
  %40 = add nsw i64 %39, %.04651
  %41 = add nuw nsw i64 %.053, 1
  %exitcond.not = icmp eq i64 %41, %3
  br i1 %exitcond.not, label %._crit_edge, label %12, !llvm.loop !9

42:                                               ; preds = %._crit_edge
  %43 = icmp slt i64 %.044.lcssa, %2
  %44 = sub nsw i64 %.044.lcssa, %2
  %spec.select = select i1 %43, i64 0, i64 %44
  br label %45

45:                                               ; preds = %42, %._crit_edge, %4
  %.1 = phi i64 [ -1, %4 ], [ -1, %._crit_edge ], [ %spec.select, %42 ]
  ret i64 %.1
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass