; LLVM IR from caryll/otfcc :: lib/table (BASE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__caryll_elementinterface_table_BASE = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.otfcc_Packet = type { i32, i16, i16, i16, i16, ptr }
%struct.otfcc_PacketPiece = type { i32, i32, i32, i32, ptr }
%struct.table_BASE = type { ptr, ptr }
%struct.otfcc_Options = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, ptr, ptr }
%struct.otfcc_ILogger = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }

@table_iBASE = external dso_local constant %struct.__caryll_elementinterface_table_BASE, align 8
@.str = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local ptr @otfcc_readBASE(ptr noundef byval(%struct.otfcc_Packet) align 8 %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %struct.otfcc_PacketPiece, align 8
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i16, align 2
  %15 = alloca i16, align 2
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  store ptr null, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 1, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %116, %2
  %17 = load i32, ptr %8, align 4, !tbaa !9
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %28

19:                                               ; preds = %16
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %28

22:                                               ; preds = %19
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = getelementptr inbounds %struct.otfcc_Packet, ptr %0, i32 0, i32 1
  %25 = load i16, ptr %24, align 4, !tbaa !11
  %26 = zext i16 %25 to i32
  %27 = icmp slt i32 %23, %26
  br label %28

28:                                               ; preds = %22, %19, %16
  %29 = phi i1 [ false, %19 ], [ false, %16 ], [ %27, %22 ]
  br i1 %29, label %31, label %30

30:                                               ; preds = %28
  store i32 2, ptr %9, align 4
  br label %123

31:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 24, ptr %10) #5
  %32 = getelementptr inbounds %struct.otfcc_Packet, ptr %0, i32 0, i32 5
  %33 = load ptr, ptr %32, align 8, !tbaa !14
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %33, i64 %35
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %10, ptr align 8 %36, i64 24, i1 false), !tbaa.struct !15
  br label %37

37:                                               ; preds = %108, %31
  %38 = load i32, ptr %6, align 4, !tbaa !9
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %41, label %40

40:                                               ; preds = %37
  store i32 5, ptr %9, align 4
  br label %113

41:                                               ; preds = %37
  %42 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %10, i32 0, i32 0
  %43 = load i32, ptr %42, align 8, !tbaa !16
  %44 = icmp eq i32 %43, 1111577413
  br i1 %44, label %45, label %107

45:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 1, ptr %11, align 4, !tbaa !9
  br label %46

46:                                               ; preds = %103, %45
  %47 = load i32, ptr %11, align 4, !tbaa !9
  %48 = icmp ne i32 %47, 0
  br i1 %48, label %50, label %49

49:                                               ; preds = %46
  store i32 8, ptr %9, align 4
  br label %104

50:                                               ; preds = %46
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %51 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %10, i32 0, i32 4
  %52 = load ptr, ptr %51, align 8, !tbaa !18
  store ptr %52, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  %53 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %10, i32 0, i32 3
  %54 = load i32, ptr %53, align 4, !tbaa !19
  store i32 %54, ptr %13, align 4, !tbaa !9
  %55 = load i32, ptr %13, align 4, !tbaa !9
  %56 = icmp ult i32 %55, 8
  br i1 %56, label %57, label %58

57:                                               ; preds = %50
  br label %87

58:                                               ; preds = %50
  %59 = call ptr @__caryll_allocate_clean(i64 noundef 16, i64 noundef 116)
  store ptr %59, ptr %5, align 8, !tbaa !5
  %60 = load ptr, ptr %12, align 8, !tbaa !5
  %61 = getelementptr inbounds i8, ptr %60, i64 4
  %62 = call zeroext i16 @read_16u(ptr noundef %61)
  store i16 %62, ptr %14, align 2, !tbaa !20
  %63 = load i16, ptr %14, align 2, !tbaa !20
  %64 = icmp ne i16 %63, 0
  br i1 %64, label %65, label %72

65:                                               ; preds = %58
  %66 = load ptr, ptr %12, align 8, !tbaa !5
  %67 = load i32, ptr %13, align 4, !tbaa !9
  %68 = load i16, ptr %14, align 2, !tbaa !20
  %69 = call ptr @readAxis(ptr noundef %66, i32 noundef %67, i16 noundef zeroext %68)
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.table_BASE, ptr %70, i32 0, i32 0
  store ptr %69, ptr %71, align 8, !tbaa !21
  br label %72

72:                                               ; preds = %65, %58
  %73 = load ptr, ptr %12, align 8, !tbaa !5
  %74 = getelementptr inbounds i8, ptr %73, i64 6
  %75 = call zeroext i16 @read_16u(ptr noundef %74)
  store i16 %75, ptr %15, align 2, !tbaa !20
  %76 = load i16, ptr %15, align 2, !tbaa !20
  %77 = icmp ne i16 %76, 0
  br i1 %77, label %78, label %85

78:                                               ; preds = %72
  %79 = load ptr, ptr %12, align 8, !tbaa !5
  %80 = load i32, ptr %13, align 4, !tbaa !9
  %81 = load i16, ptr %15, align 2, !tbaa !20
  %82 = call ptr @readAxis(ptr noundef %79, i32 noundef %80, i16 noundef zeroext %81)
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.table_BASE, ptr %83, i32 0, i32 1
  store ptr %82, ptr %84, align 8, !tbaa !23
  br label %85

85:                                               ; preds = %78, %72
  %86 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %86, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %100

87:                                               ; preds = %57
  %88 = load ptr, ptr %4, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.otfcc_Options, ptr %88, i32 0, i32 24
  %90 = load ptr, ptr %89, align 8, !tbaa !24
  %91 = getelementptr inbounds %struct.otfcc_ILogger, ptr %90, i32 0, i32 6
  %92 = load ptr, ptr %91, align 8, !tbaa !27
  %93 = load ptr, ptr %4, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.otfcc_Options, ptr %93, i32 0, i32 24
  %95 = load ptr, ptr %94, align 8, !tbaa !24
  %96 = call ptr @sdsempty()
  %97 = call ptr (ptr, ptr, ...) @sdscatprintf(ptr noundef %96, ptr noundef @.str)
  call void %92(ptr noundef %95, i8 noundef zeroext 1, i32 noundef 1, ptr noundef %97)
  %98 = load ptr, ptr getelementptr inbounds (%struct.__caryll_elementinterface_table_BASE, ptr @table_iBASE, i32 0, i32 7), align 8, !tbaa !29
  %99 = load ptr, ptr %5, align 8, !tbaa !5
  call void %98(ptr noundef %99)
  store ptr null, ptr %5, align 8, !tbaa !5
  store i32 0, ptr %9, align 4
  br label %100

100:                                              ; preds = %87, %85
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  %101 = load i32, ptr %9, align 4
  switch i32 %101, label %104 [
    i32 0, label %102
  ]

102:                                              ; preds = %100
  br label %103

103:                                              ; preds = %102
  store i32 0, ptr %11, align 4, !tbaa !9
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %46, !llvm.loop !31

104:                                              ; preds = %100, %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  %105 = load i32, ptr %9, align 4
  switch i32 %105, label %113 [
    i32 8, label %106
  ]

106:                                              ; preds = %104
  br label %107

107:                                              ; preds = %106, %41
  br label %108

108:                                              ; preds = %107
  %109 = load i32, ptr %6, align 4, !tbaa !9
  %110 = icmp ne i32 %109, 0
  %111 = xor i1 %110, true
  %112 = zext i1 %111 to i32
  store i32 %112, ptr %6, align 4, !tbaa !9
  br label %37, !llvm.loop !33

113:                                              ; preds = %104, %40
  call void @llvm.lifetime.end.p0(i64 24, ptr %10) #5
  %114 = load i32, ptr %9, align 4
  switch i32 %114, label %123 [
    i32 5, label %115
  ]

115:                                              ; preds = %113
  br label %116

116:                                              ; preds = %115
  %117 = load i32, ptr %6, align 4, !tbaa !9
  %118 = icmp ne i32 %117, 0
  %119 = xor i1 %118, true
  %120 = zext i1 %119 to i32
  store i32 %120, ptr %6, align 4, !tbaa !9
  %121 = load i32, ptr %7, align 4, !tbaa !9
  %122 = add nsw i32 %121, 1
  store i32 %122, ptr %7, align 4, !tbaa !9
  br label %16, !llvm.loop !34

123:                                              ; preds = %113, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  %124 = load i32, ptr %9, align 4
  switch i32 %124, label %127 [
    i32 2, label %125
  ]

125:                                              ; preds = %123
  %126 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %126, ptr %3, align 8
  store i32 1, ptr %9, align 4
  br label %127

127:                                              ; preds = %125, %123
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  %128 = load ptr, ptr %3, align 8
  ret ptr %128
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden ptr @__caryll_allocate_clean(i64 noundef, i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @read_16u(ptr noundef) #3

; Function Attrs: nounwind uwtable
declare hidden ptr @readAxis(ptr noundef, i32 noundef, i16 noundef zeroext) #0

declare ptr @sdscatprintf(ptr noundef, ptr noundef, ...) #4

declare ptr @sdsempty() #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 4}
!12 = !{!"", !10, i64 0, !13, i64 4, !13, i64 6, !13, i64 8, !13, i64 10, !6, i64 16}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !6, i64 16}
!15 = !{i64 0, i64 4, !9, i64 4, i64 4, !9, i64 8, i64 4, !9, i64 12, i64 4, !9, i64 16, i64 8, !5}
!16 = !{!17, !10, i64 0}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !6, i64 16}
!18 = !{!17, !6, i64 16}
!19 = !{!17, !10, i64 12}
!20 = !{!13, !13, i64 0}
!21 = !{!22, !6, i64 0}
!22 = !{!"", !6, i64 0, !6, i64 8}
!23 = !{!22, !6, i64 8}
!24 = !{!25, !6, i64 32}
!25 = !{!"", !26, i64 0, !26, i64 1, !26, i64 2, !26, i64 3, !26, i64 4, !26, i64 5, !26, i64 6, !26, i64 7, !26, i64 8, !26, i64 9, !26, i64 10, !26, i64 11, !26, i64 12, !26, i64 13, !26, i64 14, !26, i64 15, !26, i64 16, !26, i64 17, !26, i64 18, !26, i64 19, !26, i64 20, !26, i64 21, !26, i64 22, !6, i64 24, !6, i64 32}
!26 = !{!"_Bool", !7, i64 0}
!27 = !{!28, !6, i64 48}
!28 = !{!"otfcc_ILogger", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88}
!29 = !{!30, !6, i64 56}
!30 = !{!"__caryll_elementinterface_table_BASE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = distinct !{!33, !32}
!34 = distinct !{!34, !32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__caryll_elementinterface_table_BASE = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.otfcc_Packet = type { i32, i16, i16, i16, i16, ptr }
%struct.otfcc_PacketPiece = type { i32, i32, i32, i32, ptr }

@table_iBASE = external dso_local local_unnamed_addr constant %struct.__caryll_elementinterface_table_BASE, align 8
@.str = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local ptr @otfcc_readBASE(ptr nocapture noundef readonly byval(%struct.otfcc_Packet) align 8 %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 4
  %4 = load i16, ptr %3, align 4
  %.not = icmp eq i16 %4, 0
  br i1 %.not, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  %6 = getelementptr inbounds i8, ptr %1, i64 32
  %7 = load ptr, ptr getelementptr inbounds (i8, ptr @table_iBASE, i64 56), align 8
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = zext i16 %4 to i64
  br label %10

10:                                               ; preds = %.lr.ph, %.thread71
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %.thread71 ]
  %11 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %8, i64 %indvars.iv
  %.sroa.0.0.copyload = load i32, ptr %11, align 8, !tbaa !12
  %.not113 = icmp eq i32 %.sroa.0.0.copyload, 1111577413
  br i1 %.not113, label %.split.us, label %.thread71

.split.us:                                        ; preds = %10
  %.sroa.415.0..sroa_idx.le = getelementptr inbounds i8, ptr %11, i64 12
  %.sroa.415.0.copyload.le = load i32, ptr %.sroa.415.0..sroa_idx.le, align 4, !tbaa !12
  %.sroa.5.0..sroa_idx.le = getelementptr inbounds i8, ptr %11, i64 16
  %.sroa.5.0.copyload.le = load ptr, ptr %.sroa.5.0..sroa_idx.le, align 8, !tbaa !13
  %12 = icmp ult i32 %.sroa.415.0.copyload.le, 8
  br i1 %12, label %.thread71.thread, label %.preheader.split.split.us

.thread71.thread:                                 ; preds = %.split.us
  %13 = load ptr, ptr %6, align 8, !tbaa !14
  %14 = getelementptr inbounds i8, ptr %13, i64 48
  %15 = load ptr, ptr %14, align 8, !tbaa !17
  %16 = tail call ptr @sdsempty() #3
  %17 = tail call ptr (ptr, ptr, ...) @sdscatprintf(ptr noundef %16, ptr noundef nonnull @.str) #3
  tail call void %15(ptr noundef %13, i8 noundef zeroext 1, i32 noundef 1, ptr noundef %17) #3
  tail call void %7(ptr noundef null) #3
  br label %.critedge

.preheader.split.split.us:                        ; preds = %.split.us
  %18 = tail call ptr @__caryll_allocate_clean(i64 noundef 16, i64 noundef 116)
  %19 = getelementptr inbounds i8, ptr %.sroa.5.0.copyload.le, i64 4
  %20 = tail call zeroext i16 @read_16u(ptr noundef nonnull %19)
  %.not60 = icmp eq i16 %20, 0
  br i1 %.not60, label %23, label %21

21:                                               ; preds = %.preheader.split.split.us
  %22 = tail call ptr @readAxis(ptr noundef %.sroa.5.0.copyload.le, i32 noundef %.sroa.415.0.copyload.le, i16 noundef zeroext %20)
  store ptr %22, ptr %18, align 8, !tbaa !19
  br label %23

23:                                               ; preds = %21, %.preheader.split.split.us
  %24 = getelementptr inbounds i8, ptr %.sroa.5.0.copyload.le, i64 6
  %25 = tail call zeroext i16 @read_16u(ptr noundef nonnull %24)
  %.not61 = icmp eq i16 %25, 0
  br i1 %.not61, label %.critedge, label %26

26:                                               ; preds = %23
  %27 = tail call ptr @readAxis(ptr noundef %.sroa.5.0.copyload.le, i32 noundef %.sroa.415.0.copyload.le, i16 noundef zeroext %25)
  %28 = getelementptr inbounds i8, ptr %18, i64 8
  store ptr %27, ptr %28, align 8, !tbaa !21
  br label %.critedge

.thread71:                                        ; preds = %10
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %29 = icmp ult i64 %indvars.iv.next, %9
  br i1 %29, label %10, label %.critedge, !llvm.loop !22

.critedge:                                        ; preds = %.thread71, %26, %23, %.thread71.thread, %2
  %30 = phi ptr [ null, %2 ], [ %18, %26 ], [ %18, %23 ], [ null, %.thread71.thread ], [ null, %.thread71 ]
  ret ptr %30
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden ptr @__caryll_allocate_clean(i64 noundef, i64 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @read_16u(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden ptr @readAxis(ptr noundef, i32 noundef, i16 noundef zeroext) local_unnamed_addr #0

declare ptr @sdscatprintf(ptr noundef, ptr noundef, ...) local_unnamed_addr #2

declare ptr @sdsempty() local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"", !7, i64 0, !10, i64 4, !10, i64 6, !10, i64 8, !10, i64 10, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !11, i64 32}
!15 = !{!"", !16, i64 0, !16, i64 1, !16, i64 2, !16, i64 3, !16, i64 4, !16, i64 5, !16, i64 6, !16, i64 7, !16, i64 8, !16, i64 9, !16, i64 10, !16, i64 11, !16, i64 12, !16, i64 13, !16, i64 14, !16, i64 15, !16, i64 16, !16, i64 17, !16, i64 18, !16, i64 19, !16, i64 20, !16, i64 21, !16, i64 22, !11, i64 24, !11, i64 32}
!16 = !{!"_Bool", !8, i64 0}
!17 = !{!18, !11, i64 48}
!18 = !{!"otfcc_ILogger", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88}
!19 = !{!20, !11, i64 0}
!20 = !{!"", !11, i64 0, !11, i64 8}
!21 = !{!20, !11, i64 8}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass