; LLVM IR from DionysiosB/CodeForces :: 0400-0499/476B-DreamoonAndWiFi.ll (Z6myFacti)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_Z6myFacti(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca double, align 8
  %4 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  store double 1.000000e+00, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 2, ptr %4, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %15, %1
  %6 = load i32, ptr %4, align 4, !tbaa !5
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = icmp sle i32 %6, %7
  br i1 %8, label %10, label %9

9:                                                ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %18

10:                                               ; preds = %5
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = sitofp i32 %11 to double
  %13 = load double, ptr %3, align 8, !tbaa !9
  %14 = fmul double %13, %12
  store double %14, ptr %3, align 8, !tbaa !9
  br label %15

15:                                               ; preds = %10
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  store i32 %17, ptr %4, align 4, !tbaa !5
  br label %5, !llvm.loop !11

18:                                               ; preds = %9
  %19 = load double, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret double %19
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef double @_Z6myFacti(i32 noundef %0) local_unnamed_addr #0 {
  %.not6 = icmp slt i32 %0, 2
  br i1 %.not6, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %1
  %2 = add nsw i32 %0, -1
  %3 = add nsw i32 %0, -2
  %xtraiter = and i32 %2, 7
  %4 = icmp ult i32 %3, 7
  br i1 %4, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i32 %2, -8
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %.lcssa.ph = phi double [ poison, %.lr.ph.preheader ], [ %30, %.lr.ph ]
  %.08.unr = phi i32 [ 2, %.lr.ph.preheader ], [ %31, %.lr.ph ]
  %.057.unr = phi double [ 1.000000e+00, %.lr.ph.preheader ], [ %30, %.lr.ph ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %.08.epil = phi i32 [ %7, %.lr.ph.epil ], [ %.08.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.057.epil = phi double [ %6, %.lr.ph.epil ], [ %.057.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i32 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %5 = uitofp nneg i32 %.08.epil to double
  %6 = fmul double %.057.epil, %5
  %7 = add nuw i32 %.08.epil, 1
  %epil.iter.next = add i32 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i32 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !5

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %1
  %.05.lcssa = phi double [ 1.000000e+00, %1 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %6, %.lr.ph.epil ]
  ret double %.05.lcssa

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %.08 = phi i32 [ 2, %.lr.ph.preheader.new ], [ %31, %.lr.ph ]
  %.057 = phi double [ 1.000000e+00, %.lr.ph.preheader.new ], [ %30, %.lr.ph ]
  %niter = phi i32 [ 0, %.lr.ph.preheader.new ], [ %niter.next.7, %.lr.ph ]
  %8 = uitofp nneg i32 %.08 to double
  %9 = fmul double %.057, %8
  %10 = or disjoint i32 %.08, 1
  %11 = uitofp nneg i32 %10 to double
  %12 = fmul double %9, %11
  %13 = add nuw nsw i32 %.08, 2
  %14 = uitofp nneg i32 %13 to double
  %15 = fmul double %12, %14
  %16 = add nuw nsw i32 %.08, 3
  %17 = uitofp nneg i32 %16 to double
  %18 = fmul double %15, %17
  %19 = add nuw nsw i32 %.08, 4
  %20 = uitofp nneg i32 %19 to double
  %21 = fmul double %18, %20
  %22 = add nuw nsw i32 %.08, 5
  %23 = uitofp nneg i32 %22 to double
  %24 = fmul double %21, %23
  %25 = add nuw i32 %.08, 6
  %26 = uitofp nneg i32 %25 to double
  %27 = fmul double %24, %26
  %28 = add nuw i32 %.08, 7
  %29 = uitofp nneg i32 %28 to double
  %30 = fmul double %27, %29
  %31 = add nuw i32 %.08, 8
  %niter.next.7 = add i32 %niter, 8
  %niter.ncmp.7 = icmp eq i32 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !7
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.unroll.disable"}
!7 = distinct !{!7, !8}
!8 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass