; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_opt_compiled_2)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_s(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_hermes0x3A0x3AreadSignedLEB1280x28llvh0x3A0x3AArrayRef0x3Cunsigned0x20char0x3E0x2C0x20unsigned0x20int0x2C0x20long0x20long0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  store i64 0, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #3
  %21 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %21, ptr %12, align 4, !tbaa !9
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.w2c_hermes, ptr %22, i32 0, i32 6
  %24 = load i32, ptr %12, align 4, !tbaa !9
  %25 = zext i32 %24 to i64
  %26 = call i32 @i32_load(ptr noundef %23, i64 noundef %25)
  store i32 %26, ptr %12, align 4, !tbaa !9
  %27 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %27, ptr %13, align 4, !tbaa !9
  %28 = load i32, ptr %13, align 4, !tbaa !9
  %29 = load i32, ptr %12, align 4, !tbaa !9
  %30 = add i32 %29, %28
  store i32 %30, ptr %12, align 4, !tbaa !9
  %31 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %31, ptr %10, align 4, !tbaa !9
  %32 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %32, ptr %6, align 4, !tbaa !9
  store i32 0, ptr %12, align 4, !tbaa !9
  %33 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %33, ptr %7, align 4, !tbaa !9
  br label %34

34:                                               ; preds = %76, %4
  %35 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %35, ptr %12, align 4, !tbaa !9
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.w2c_hermes, ptr %36, i32 0, i32 6
  %38 = load i32, ptr %12, align 4, !tbaa !9
  %39 = zext i32 %38 to i64
  %40 = call i32 @i32_load8_s(ptr noundef %37, i64 noundef %39)
  store i32 %40, ptr %12, align 4, !tbaa !9
  %41 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %41, ptr %9, align 4, !tbaa !9
  store i32 127, ptr %13, align 4, !tbaa !9
  %42 = load i32, ptr %13, align 4, !tbaa !9
  %43 = load i32, ptr %12, align 4, !tbaa !9
  %44 = and i32 %43, %42
  store i32 %44, ptr %12, align 4, !tbaa !9
  %45 = load i32, ptr %12, align 4, !tbaa !9
  %46 = zext i32 %45 to i64
  store i64 %46, ptr %17, align 8, !tbaa !11
  %47 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %47, ptr %13, align 4, !tbaa !9
  %48 = load i32, ptr %13, align 4, !tbaa !9
  %49 = zext i32 %48 to i64
  store i64 %49, ptr %18, align 8, !tbaa !11
  %50 = load i64, ptr %18, align 8, !tbaa !11
  %51 = and i64 %50, 63
  %52 = load i64, ptr %17, align 8, !tbaa !11
  %53 = shl i64 %52, %51
  store i64 %53, ptr %17, align 8, !tbaa !11
  %54 = load i64, ptr %11, align 8, !tbaa !11
  store i64 %54, ptr %18, align 8, !tbaa !11
  %55 = load i64, ptr %18, align 8, !tbaa !11
  %56 = load i64, ptr %17, align 8, !tbaa !11
  %57 = or i64 %56, %55
  store i64 %57, ptr %17, align 8, !tbaa !11
  %58 = load i64, ptr %17, align 8, !tbaa !11
  store i64 %58, ptr %11, align 8, !tbaa !11
  %59 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %59, ptr %12, align 4, !tbaa !9
  store i32 1, ptr %13, align 4, !tbaa !9
  %60 = load i32, ptr %13, align 4, !tbaa !9
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = add i32 %61, %60
  store i32 %62, ptr %12, align 4, !tbaa !9
  %63 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %63, ptr %6, align 4, !tbaa !9
  %64 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %64, ptr %12, align 4, !tbaa !9
  store i32 7, ptr %13, align 4, !tbaa !9
  %65 = load i32, ptr %13, align 4, !tbaa !9
  %66 = load i32, ptr %12, align 4, !tbaa !9
  %67 = add i32 %66, %65
  store i32 %67, ptr %12, align 4, !tbaa !9
  %68 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %68, ptr %7, align 4, !tbaa !9
  %69 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %69, ptr %12, align 4, !tbaa !9
  store i32 0, ptr %13, align 4, !tbaa !9
  %70 = load i32, ptr %12, align 4, !tbaa !9
  %71 = load i32, ptr %13, align 4, !tbaa !9
  %72 = icmp slt i32 %70, %71
  %73 = zext i1 %72 to i32
  store i32 %73, ptr %12, align 4, !tbaa !9
  %74 = load i32, ptr %12, align 4, !tbaa !9
  %75 = icmp ne i32 %74, 0
  br i1 %75, label %76, label %77

76:                                               ; preds = %34
  br label %34

77:                                               ; preds = %34
  %78 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %78, ptr %12, align 4, !tbaa !9
  %79 = load i64, ptr %11, align 8, !tbaa !11
  store i64 %79, ptr %18, align 8, !tbaa !11
  store i64 -1, ptr %19, align 8, !tbaa !11
  %80 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %80, ptr %14, align 4, !tbaa !9
  %81 = load i32, ptr %14, align 4, !tbaa !9
  %82 = zext i32 %81 to i64
  store i64 %82, ptr %20, align 8, !tbaa !11
  %83 = load i64, ptr %20, align 8, !tbaa !11
  %84 = and i64 %83, 63
  %85 = load i64, ptr %19, align 8, !tbaa !11
  %86 = shl i64 %85, %84
  store i64 %86, ptr %19, align 8, !tbaa !11
  store i64 0, ptr %20, align 8, !tbaa !11
  %87 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %87, ptr %15, align 4, !tbaa !9
  store i32 64, ptr %16, align 4, !tbaa !9
  %88 = load i32, ptr %16, align 4, !tbaa !9
  %89 = load i32, ptr %15, align 4, !tbaa !9
  %90 = and i32 %89, %88
  store i32 %90, ptr %15, align 4, !tbaa !9
  %91 = load i32, ptr %15, align 4, !tbaa !9
  %92 = icmp ne i32 %91, 0
  br i1 %92, label %93, label %95

93:                                               ; preds = %77
  %94 = load i64, ptr %19, align 8, !tbaa !11
  br label %97

95:                                               ; preds = %77
  %96 = load i64, ptr %20, align 8, !tbaa !11
  br label %97

97:                                               ; preds = %95, %93
  %98 = phi i64 [ %94, %93 ], [ %96, %95 ]
  store i64 %98, ptr %19, align 8, !tbaa !11
  %99 = load i64, ptr %19, align 8, !tbaa !11
  %100 = load i64, ptr %18, align 8, !tbaa !11
  %101 = or i64 %100, %99
  store i64 %101, ptr %18, align 8, !tbaa !11
  %102 = load ptr, ptr %5, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.w2c_hermes, ptr %102, i32 0, i32 6
  %104 = load i32, ptr %12, align 4, !tbaa !9
  %105 = zext i32 %104 to i64
  %106 = load i64, ptr %18, align 8, !tbaa !11
  call void @i64_store(ptr noundef %103, i64 noundef %105, i64 noundef %106)
  %107 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %107, ptr %12, align 4, !tbaa !9
  %108 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %108, ptr %13, align 4, !tbaa !9
  %109 = load i32, ptr %13, align 4, !tbaa !9
  %110 = load i32, ptr %12, align 4, !tbaa !9
  %111 = sub i32 %110, %109
  store i32 %111, ptr %12, align 4, !tbaa !9
  %112 = load i32, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret i32 %112
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_s(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_hermes0x3A0x3AreadSignedLEB1280x28llvh0x3A0x3AArrayRef0x3Cunsigned0x20char0x3E0x2C0x20unsigned0x20int0x2C0x20long0x20long0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = getelementptr inbounds i8, ptr %0, i64 40
  %6 = zext i32 %1 to i64
  %7 = tail call i32 @i32_load(ptr noundef nonnull %5, i64 noundef %6)
  %8 = add i32 %7, %2
  br label %9

9:                                                ; preds = %9, %4
  %.058 = phi i64 [ 0, %4 ], [ %17, %9 ]
  %.057 = phi i32 [ 0, %4 ], [ %19, %9 ]
  %.0 = phi i32 [ %8, %4 ], [ %18, %9 ]
  %10 = zext i32 %.0 to i64
  %11 = tail call i32 @i32_load8_s(ptr noundef nonnull %5, i64 noundef %10)
  %12 = and i32 %11, 127
  %13 = zext nneg i32 %12 to i64
  %14 = and i32 %.057, 63
  %15 = zext nneg i32 %14 to i64
  %16 = shl i64 %13, %15
  %17 = or i64 %16, %.058
  %18 = add i32 %.0, 1
  %19 = add i32 %.057, 7
  %20 = icmp slt i32 %11, 0
  br i1 %20, label %9, label %21

21:                                               ; preds = %9
  %22 = and i32 %19, 63
  %23 = zext nneg i32 %22 to i64
  %24 = shl nsw i64 -1, %23
  %25 = and i32 %11, 64
  %.not = icmp eq i32 %25, 0
  %26 = select i1 %.not, i64 0, i64 %24
  %27 = or i64 %17, %26
  %28 = zext i32 %3 to i64
  tail call void @i64_store(ptr noundef nonnull %5, i64 noundef %28, i64 noundef %27)
  %29 = sub i32 %18, %8
  ret i32 %29
}

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass