; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_3)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_hermes0x3A0x3Avm0x3A0x3ACardTable0x3A0x3AdirtyCardsForAddressRange0x28void0x20const0x2A0x2C0x20void0x20const0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %15 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %15, ptr %10, align 4, !tbaa !9
  %16 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %16, ptr %11, align 4, !tbaa !9
  %17 = load i32, ptr %10, align 4, !tbaa !9
  %18 = load i32, ptr %11, align 4, !tbaa !9
  %19 = icmp ugt i32 %17, %18
  %20 = zext i1 %19 to i32
  store i32 %20, ptr %10, align 4, !tbaa !9
  %21 = load i32, ptr %10, align 4, !tbaa !9
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %23, label %24

23:                                               ; preds = %4
  br label %109

24:                                               ; preds = %4
  %25 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %25, ptr %10, align 4, !tbaa !9
  store i32 -4194304, ptr %11, align 4, !tbaa !9
  %26 = load i32, ptr %11, align 4, !tbaa !9
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = and i32 %27, %26
  store i32 %28, ptr %10, align 4, !tbaa !9
  store i32 4194816, ptr %11, align 4, !tbaa !9
  %29 = load i32, ptr %11, align 4, !tbaa !9
  %30 = load i32, ptr %10, align 4, !tbaa !9
  %31 = add i32 %30, %29
  store i32 %31, ptr %10, align 4, !tbaa !9
  %32 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %32, ptr %9, align 4, !tbaa !9
  %33 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %33, ptr %11, align 4, !tbaa !9
  %34 = load i32, ptr %10, align 4, !tbaa !9
  %35 = load i32, ptr %11, align 4, !tbaa !9
  %36 = icmp ule i32 %34, %35
  %37 = zext i1 %36 to i32
  store i32 %37, ptr %10, align 4, !tbaa !9
  %38 = load i32, ptr %10, align 4, !tbaa !9
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %41

40:                                               ; preds = %24
  br label %109

41:                                               ; preds = %24
  %42 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %42, ptr %10, align 4, !tbaa !9
  store i32 511, ptr %11, align 4, !tbaa !9
  %43 = load i32, ptr %11, align 4, !tbaa !9
  %44 = load i32, ptr %10, align 4, !tbaa !9
  %45 = add i32 %44, %43
  store i32 %45, ptr %10, align 4, !tbaa !9
  %46 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %46, ptr %8, align 4, !tbaa !9
  %47 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %47, ptr %11, align 4, !tbaa !9
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = load i32, ptr %11, align 4, !tbaa !9
  %50 = icmp ult i32 %48, %49
  %51 = zext i1 %50 to i32
  store i32 %51, ptr %10, align 4, !tbaa !9
  %52 = load i32, ptr %10, align 4, !tbaa !9
  %53 = icmp ne i32 %52, 0
  br i1 %53, label %54, label %55

54:                                               ; preds = %41
  br label %127

55:                                               ; preds = %41
  %56 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %56, ptr %10, align 4, !tbaa !9
  %57 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %57, ptr %11, align 4, !tbaa !9
  %58 = load i32, ptr %10, align 4, !tbaa !9
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = icmp uge i32 %58, %59
  %61 = zext i1 %60 to i32
  store i32 %61, ptr %10, align 4, !tbaa !9
  %62 = load i32, ptr %10, align 4, !tbaa !9
  %63 = icmp ne i32 %62, 0
  br i1 %63, label %64, label %65

64:                                               ; preds = %55
  br label %127

65:                                               ; preds = %55
  %66 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %66, ptr %10, align 4, !tbaa !9
  %67 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %67, ptr %11, align 4, !tbaa !9
  %68 = load i32, ptr %11, align 4, !tbaa !9
  %69 = load i32, ptr %10, align 4, !tbaa !9
  %70 = sub i32 %69, %68
  store i32 %70, ptr %10, align 4, !tbaa !9
  store i32 9, ptr %11, align 4, !tbaa !9
  %71 = load i32, ptr %10, align 4, !tbaa !9
  %72 = load i32, ptr %11, align 4, !tbaa !9
  %73 = and i32 %72, 31
  %74 = ashr i32 %71, %73
  store i32 %74, ptr %10, align 4, !tbaa !9
  %75 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %75, ptr %8, align 4, !tbaa !9
  %76 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %76, ptr %11, align 4, !tbaa !9
  %77 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %77, ptr %12, align 4, !tbaa !9
  %78 = load i32, ptr %12, align 4, !tbaa !9
  %79 = load i32, ptr %11, align 4, !tbaa !9
  %80 = sub i32 %79, %78
  store i32 %80, ptr %11, align 4, !tbaa !9
  store i32 9, ptr %12, align 4, !tbaa !9
  %81 = load i32, ptr %11, align 4, !tbaa !9
  %82 = load i32, ptr %12, align 4, !tbaa !9
  %83 = and i32 %82, 31
  %84 = ashr i32 %81, %83
  store i32 %84, ptr %11, align 4, !tbaa !9
  %85 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %85, ptr %7, align 4, !tbaa !9
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = load i32, ptr %11, align 4, !tbaa !9
  %88 = icmp ugt i32 %86, %87
  %89 = zext i1 %88 to i32
  store i32 %89, ptr %10, align 4, !tbaa !9
  %90 = load i32, ptr %10, align 4, !tbaa !9
  %91 = icmp ne i32 %90, 0
  br i1 %91, label %92, label %108

92:                                               ; preds = %65
  %93 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %93, ptr %10, align 4, !tbaa !9
  %94 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %94, ptr %11, align 4, !tbaa !9
  %95 = load i32, ptr %11, align 4, !tbaa !9
  %96 = load i32, ptr %10, align 4, !tbaa !9
  %97 = add i32 %96, %95
  store i32 %97, ptr %10, align 4, !tbaa !9
  store i32 1, ptr %11, align 4, !tbaa !9
  %98 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %98, ptr %12, align 4, !tbaa !9
  %99 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %99, ptr %13, align 4, !tbaa !9
  %100 = load i32, ptr %13, align 4, !tbaa !9
  %101 = load i32, ptr %12, align 4, !tbaa !9
  %102 = sub i32 %101, %100
  store i32 %102, ptr %12, align 4, !tbaa !9
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = load i32, ptr %10, align 4, !tbaa !9
  %105 = load i32, ptr %11, align 4, !tbaa !9
  %106 = load i32, ptr %12, align 4, !tbaa !9
  %107 = call i32 @w2c_hermes_0x5F_memset(ptr noundef %103, i32 noundef %104, i32 noundef %105, i32 noundef %106)
  store i32 %107, ptr %10, align 4, !tbaa !9
  br label %108

108:                                              ; preds = %92, %65
  br label %145

109:                                              ; preds = %40, %23
  store i32 0, ptr %10, align 4, !tbaa !9
  %110 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %110, ptr %6, align 4, !tbaa !9
  store i32 196978, ptr %11, align 4, !tbaa !9
  %111 = load i32, ptr %11, align 4, !tbaa !9
  %112 = load i32, ptr %10, align 4, !tbaa !9
  %113 = add i32 %112, %111
  store i32 %113, ptr %10, align 4, !tbaa !9
  %114 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %114, ptr %11, align 4, !tbaa !9
  store i32 86311, ptr %12, align 4, !tbaa !9
  %115 = load i32, ptr %12, align 4, !tbaa !9
  %116 = load i32, ptr %11, align 4, !tbaa !9
  %117 = add i32 %116, %115
  store i32 %117, ptr %11, align 4, !tbaa !9
  store i32 300, ptr %12, align 4, !tbaa !9
  %118 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %118, ptr %13, align 4, !tbaa !9
  store i32 19893, ptr %14, align 4, !tbaa !9
  %119 = load i32, ptr %14, align 4, !tbaa !9
  %120 = load i32, ptr %13, align 4, !tbaa !9
  %121 = add i32 %120, %119
  store i32 %121, ptr %13, align 4, !tbaa !9
  %122 = load ptr, ptr %5, align 8, !tbaa !5
  %123 = load i32, ptr %10, align 4, !tbaa !9
  %124 = load i32, ptr %11, align 4, !tbaa !9
  %125 = load i32, ptr %12, align 4, !tbaa !9
  %126 = load i32, ptr %13, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %122, i32 noundef %123, i32 noundef %124, i32 noundef %125, i32 noundef %126)
  call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

127:                                              ; preds = %64, %54
  store i32 0, ptr %10, align 4, !tbaa !9
  %128 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %128, ptr %6, align 4, !tbaa !9
  store i32 196978, ptr %11, align 4, !tbaa !9
  %129 = load i32, ptr %11, align 4, !tbaa !9
  %130 = load i32, ptr %10, align 4, !tbaa !9
  %131 = add i32 %130, %129
  store i32 %131, ptr %10, align 4, !tbaa !9
  %132 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %132, ptr %11, align 4, !tbaa !9
  store i32 86311, ptr %12, align 4, !tbaa !9
  %133 = load i32, ptr %12, align 4, !tbaa !9
  %134 = load i32, ptr %11, align 4, !tbaa !9
  %135 = add i32 %134, %133
  store i32 %135, ptr %11, align 4, !tbaa !9
  store i32 300, ptr %12, align 4, !tbaa !9
  %136 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %136, ptr %13, align 4, !tbaa !9
  store i32 19893, ptr %14, align 4, !tbaa !9
  %137 = load i32, ptr %14, align 4, !tbaa !9
  %138 = load i32, ptr %13, align 4, !tbaa !9
  %139 = add i32 %138, %137
  store i32 %139, ptr %13, align 4, !tbaa !9
  %140 = load ptr, ptr %5, align 8, !tbaa !5
  %141 = load i32, ptr %10, align 4, !tbaa !9
  %142 = load i32, ptr %11, align 4, !tbaa !9
  %143 = load i32, ptr %12, align 4, !tbaa !9
  %144 = load i32, ptr %13, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %140, i32 noundef %141, i32 noundef %142, i32 noundef %143, i32 noundef %144)
  call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

145:                                              ; preds = %108
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret void
}

declare i32 @w2c_hermes_0x5F_memset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_hermes0x3A0x3Avm0x3A0x3ACardTable0x3A0x3AdirtyCardsForAddressRange0x28void0x20const0x2A0x2C0x20void0x20const0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp ugt i32 %1, %2
  br i1 %5, label %22, label %6

6:                                                ; preds = %4
  %7 = and i32 %1, -4194304
  %8 = add i32 %7, 4194816
  %.not = icmp ugt i32 %8, %2
  br i1 %.not, label %9, label %22

9:                                                ; preds = %6
  %10 = add i32 %3, 511
  %11 = icmp uge i32 %10, %1
  %.not89 = icmp ult i32 %10, %8
  %or.cond = and i1 %11, %.not89
  br i1 %or.cond, label %12, label %23

12:                                               ; preds = %9
  %13 = sub i32 %10, %1
  %14 = ashr i32 %13, 9
  %15 = sub i32 %2, %1
  %16 = ashr i32 %15, 9
  %17 = icmp ugt i32 %14, %16
  br i1 %17, label %18, label %24

18:                                               ; preds = %12
  %19 = add i32 %16, %1
  %20 = sub nsw i32 %14, %16
  %21 = tail call i32 @w2c_hermes_0x5F_memset(ptr noundef %0, i32 noundef %19, i32 noundef 1, i32 noundef %20) #3
  br label %24

22:                                               ; preds = %6, %4
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 196978, i32 noundef 86311, i32 noundef 300, i32 noundef 19893) #3
  tail call void @wasm_rt_trap(i32 noundef 5) #4
  unreachable

23:                                               ; preds = %9
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 196978, i32 noundef 86311, i32 noundef 300, i32 noundef 19893) #3
  tail call void @wasm_rt_trap(i32 noundef 5) #4
  unreachable

24:                                               ; preds = %12, %18
  ret void
}

declare i32 @w2c_hermes_0x5F_memset(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass