; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_5)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #2

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x2C0x20hermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x3A0x3AFindAndConstruct0x28hermes0x3A0x3AValue0x2A0x20const0x260x29(ptr noundef %0, i32 noundef %1, i32 noundef %2) #4 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  %21 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %21, ptr %15, align 4, !tbaa !9
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.w2c_hermes, ptr %22, i32 0, i32 6
  %24 = load i32, ptr %15, align 4, !tbaa !9
  %25 = zext i32 %24 to i64
  %26 = add i64 %25, 12
  %27 = call i32 @i32_load(ptr noundef %23, i64 noundef %26)
  store i32 %27, ptr %15, align 4, !tbaa !9
  %28 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %28, ptr %7, align 4, !tbaa !9
  %29 = load i32, ptr %15, align 4, !tbaa !9
  %30 = icmp ne i32 %29, 0
  %31 = xor i1 %30, true
  %32 = zext i1 %31 to i32
  store i32 %32, ptr %15, align 4, !tbaa !9
  %33 = load i32, ptr %15, align 4, !tbaa !9
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %37

35:                                               ; preds = %3
  store i32 0, ptr %15, align 4, !tbaa !9
  %36 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %36, ptr %7, align 4, !tbaa !9
  br label %216

37:                                               ; preds = %3
  %38 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %38, ptr %15, align 4, !tbaa !9
  %39 = load ptr, ptr %4, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.w2c_hermes, ptr %39, i32 0, i32 6
  %41 = load i32, ptr %15, align 4, !tbaa !9
  %42 = zext i32 %41 to i64
  %43 = call i32 @i32_load(ptr noundef %40, i64 noundef %42)
  store i32 %43, ptr %15, align 4, !tbaa !9
  %44 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %44, ptr %9, align 4, !tbaa !9
  store i32 8, ptr %16, align 4, !tbaa !9
  %45 = load i32, ptr %16, align 4, !tbaa !9
  %46 = load i32, ptr %15, align 4, !tbaa !9
  %47 = add i32 %46, %45
  store i32 %47, ptr %15, align 4, !tbaa !9
  %48 = load i32, ptr %15, align 4, !tbaa !9
  switch i32 %48, label %54 [
    i32 0, label %49
    i32 1, label %50
    i32 2, label %51
    i32 3, label %52
    i32 4, label %53
  ]

49:                                               ; preds = %37
  br label %55

50:                                               ; preds = %37
  br label %73

51:                                               ; preds = %37
  br label %73

52:                                               ; preds = %37
  br label %73

53:                                               ; preds = %37
  br label %55

54:                                               ; preds = %37
  br label %73

55:                                               ; preds = %53, %49
  store i32 0, ptr %15, align 4, !tbaa !9
  %56 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %56, ptr %5, align 4, !tbaa !9
  store i32 204136, ptr %16, align 4, !tbaa !9
  %57 = load i32, ptr %16, align 4, !tbaa !9
  %58 = load i32, ptr %15, align 4, !tbaa !9
  %59 = add i32 %58, %57
  store i32 %59, ptr %15, align 4, !tbaa !9
  %60 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %60, ptr %16, align 4, !tbaa !9
  store i32 81389, ptr %17, align 4, !tbaa !9
  %61 = load i32, ptr %17, align 4, !tbaa !9
  %62 = load i32, ptr %16, align 4, !tbaa !9
  %63 = add i32 %62, %61
  store i32 %63, ptr %16, align 4, !tbaa !9
  store i32 597, ptr %17, align 4, !tbaa !9
  %64 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %64, ptr %18, align 4, !tbaa !9
  store i32 48929, ptr %19, align 4, !tbaa !9
  %65 = load i32, ptr %19, align 4, !tbaa !9
  %66 = load i32, ptr %18, align 4, !tbaa !9
  %67 = add i32 %66, %65
  store i32 %67, ptr %18, align 4, !tbaa !9
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = load i32, ptr %15, align 4, !tbaa !9
  %70 = load i32, ptr %16, align 4, !tbaa !9
  %71 = load i32, ptr %17, align 4, !tbaa !9
  %72 = load i32, ptr %18, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %68, i32 noundef %69, i32 noundef %70, i32 noundef %71, i32 noundef %72)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

73:                                               ; preds = %54, %52, %51, %50
  %74 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %74, ptr %15, align 4, !tbaa !9
  %75 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %75, ptr %16, align 4, !tbaa !9
  %76 = load ptr, ptr %4, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.w2c_hermes, ptr %76, i32 0, i32 6
  %78 = load i32, ptr %16, align 4, !tbaa !9
  %79 = zext i32 %78 to i64
  %80 = call i32 @i32_load(ptr noundef %77, i64 noundef %79)
  store i32 %80, ptr %16, align 4, !tbaa !9
  %81 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %81, ptr %13, align 4, !tbaa !9
  %82 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %82, ptr %17, align 4, !tbaa !9
  store i32 1, ptr %18, align 4, !tbaa !9
  %83 = load i32, ptr %18, align 4, !tbaa !9
  %84 = load i32, ptr %17, align 4, !tbaa !9
  %85 = sub i32 %84, %83
  store i32 %85, ptr %17, align 4, !tbaa !9
  %86 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %86, ptr %14, align 4, !tbaa !9
  %87 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %87, ptr %18, align 4, !tbaa !9
  store i32 4, ptr %19, align 4, !tbaa !9
  %88 = load i32, ptr %19, align 4, !tbaa !9
  %89 = and i32 %88, 31
  %90 = load i32, ptr %18, align 4, !tbaa !9
  %91 = lshr i32 %90, %89
  store i32 %91, ptr %18, align 4, !tbaa !9
  %92 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %92, ptr %19, align 4, !tbaa !9
  store i32 9, ptr %20, align 4, !tbaa !9
  %93 = load i32, ptr %20, align 4, !tbaa !9
  %94 = and i32 %93, 31
  %95 = load i32, ptr %19, align 4, !tbaa !9
  %96 = lshr i32 %95, %94
  store i32 %96, ptr %19, align 4, !tbaa !9
  %97 = load i32, ptr %19, align 4, !tbaa !9
  %98 = load i32, ptr %18, align 4, !tbaa !9
  %99 = xor i32 %98, %97
  store i32 %99, ptr %18, align 4, !tbaa !9
  %100 = load i32, ptr %18, align 4, !tbaa !9
  %101 = load i32, ptr %17, align 4, !tbaa !9
  %102 = and i32 %101, %100
  store i32 %102, ptr %17, align 4, !tbaa !9
  %103 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %103, ptr %12, align 4, !tbaa !9
  store i32 3, ptr %18, align 4, !tbaa !9
  %104 = load i32, ptr %18, align 4, !tbaa !9
  %105 = and i32 %104, 31
  %106 = load i32, ptr %17, align 4, !tbaa !9
  %107 = shl i32 %106, %105
  store i32 %107, ptr %17, align 4, !tbaa !9
  %108 = load i32, ptr %17, align 4, !tbaa !9
  %109 = load i32, ptr %16, align 4, !tbaa !9
  %110 = add i32 %109, %108
  store i32 %110, ptr %16, align 4, !tbaa !9
  %111 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %111, ptr %7, align 4, !tbaa !9
  %112 = load ptr, ptr %4, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.w2c_hermes, ptr %112, i32 0, i32 6
  %114 = load i32, ptr %16, align 4, !tbaa !9
  %115 = zext i32 %114 to i64
  %116 = call i32 @i32_load(ptr noundef %113, i64 noundef %115)
  store i32 %116, ptr %16, align 4, !tbaa !9
  %117 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %117, ptr %10, align 4, !tbaa !9
  %118 = load i32, ptr %15, align 4, !tbaa !9
  %119 = load i32, ptr %16, align 4, !tbaa !9
  %120 = icmp eq i32 %118, %119
  %121 = zext i1 %120 to i32
  store i32 %121, ptr %15, align 4, !tbaa !9
  %122 = load i32, ptr %15, align 4, !tbaa !9
  %123 = icmp ne i32 %122, 0
  br i1 %123, label %124, label %125

124:                                              ; preds = %73
  br label %249

125:                                              ; preds = %73
  store i32 1, ptr %15, align 4, !tbaa !9
  %126 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %126, ptr %11, align 4, !tbaa !9
  br label %127

127:                                              ; preds = %214, %125
  %128 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %128, ptr %15, align 4, !tbaa !9
  store i32 -4, ptr %16, align 4, !tbaa !9
  %129 = load i32, ptr %15, align 4, !tbaa !9
  %130 = load i32, ptr %16, align 4, !tbaa !9
  %131 = icmp eq i32 %129, %130
  %132 = zext i1 %131 to i32
  store i32 %132, ptr %15, align 4, !tbaa !9
  %133 = load i32, ptr %15, align 4, !tbaa !9
  %134 = icmp ne i32 %133, 0
  br i1 %134, label %135, label %148

135:                                              ; preds = %127
  %136 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %136, ptr %15, align 4, !tbaa !9
  %137 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %137, ptr %16, align 4, !tbaa !9
  %138 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %138, ptr %17, align 4, !tbaa !9
  %139 = load i32, ptr %17, align 4, !tbaa !9
  %140 = icmp ne i32 %139, 0
  br i1 %140, label %141, label %143

141:                                              ; preds = %135
  %142 = load i32, ptr %15, align 4, !tbaa !9
  br label %145

143:                                              ; preds = %135
  %144 = load i32, ptr %16, align 4, !tbaa !9
  br label %145

145:                                              ; preds = %143, %141
  %146 = phi i32 [ %142, %141 ], [ %144, %143 ]
  store i32 %146, ptr %15, align 4, !tbaa !9
  %147 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %147, ptr %7, align 4, !tbaa !9
  br label %216

148:                                              ; preds = %127
  %149 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %149, ptr %15, align 4, !tbaa !9
  %150 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %150, ptr %16, align 4, !tbaa !9
  %151 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %151, ptr %17, align 4, !tbaa !9
  %152 = load i32, ptr %17, align 4, !tbaa !9
  %153 = icmp ne i32 %152, 0
  br i1 %153, label %154, label %156

154:                                              ; preds = %148
  %155 = load i32, ptr %15, align 4, !tbaa !9
  br label %158

156:                                              ; preds = %148
  %157 = load i32, ptr %16, align 4, !tbaa !9
  br label %158

158:                                              ; preds = %156, %154
  %159 = phi i32 [ %155, %154 ], [ %157, %156 ]
  store i32 %159, ptr %15, align 4, !tbaa !9
  %160 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %160, ptr %16, align 4, !tbaa !9
  %161 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %161, ptr %17, align 4, !tbaa !9
  store i32 -8, ptr %18, align 4, !tbaa !9
  %162 = load i32, ptr %17, align 4, !tbaa !9
  %163 = load i32, ptr %18, align 4, !tbaa !9
  %164 = icmp eq i32 %162, %163
  %165 = zext i1 %164 to i32
  store i32 %165, ptr %17, align 4, !tbaa !9
  %166 = load i32, ptr %17, align 4, !tbaa !9
  %167 = icmp ne i32 %166, 0
  br i1 %167, label %168, label %170

168:                                              ; preds = %158
  %169 = load i32, ptr %15, align 4, !tbaa !9
  br label %172

170:                                              ; preds = %158
  %171 = load i32, ptr %16, align 4, !tbaa !9
  br label %172

172:                                              ; preds = %170, %168
  %173 = phi i32 [ %169, %168 ], [ %171, %170 ]
  store i32 %173, ptr %15, align 4, !tbaa !9
  %174 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %174, ptr %8, align 4, !tbaa !9
  %175 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %175, ptr %15, align 4, !tbaa !9
  %176 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %176, ptr %16, align 4, !tbaa !9
  %177 = load i32, ptr %16, align 4, !tbaa !9
  %178 = load i32, ptr %15, align 4, !tbaa !9
  %179 = add i32 %178, %177
  store i32 %179, ptr %15, align 4, !tbaa !9
  %180 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %180, ptr %7, align 4, !tbaa !9
  %181 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %181, ptr %15, align 4, !tbaa !9
  store i32 1, ptr %16, align 4, !tbaa !9
  %182 = load i32, ptr %16, align 4, !tbaa !9
  %183 = load i32, ptr %15, align 4, !tbaa !9
  %184 = add i32 %183, %182
  store i32 %184, ptr %15, align 4, !tbaa !9
  %185 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %185, ptr %11, align 4, !tbaa !9
  %186 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %186, ptr %15, align 4, !tbaa !9
  %187 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %187, ptr %16, align 4, !tbaa !9
  %188 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %188, ptr %17, align 4, !tbaa !9
  %189 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %189, ptr %18, align 4, !tbaa !9
  %190 = load i32, ptr %18, align 4, !tbaa !9
  %191 = load i32, ptr %17, align 4, !tbaa !9
  %192 = and i32 %191, %190
  store i32 %192, ptr %17, align 4, !tbaa !9
  %193 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %193, ptr %12, align 4, !tbaa !9
  store i32 3, ptr %18, align 4, !tbaa !9
  %194 = load i32, ptr %18, align 4, !tbaa !9
  %195 = and i32 %194, 31
  %196 = load i32, ptr %17, align 4, !tbaa !9
  %197 = shl i32 %196, %195
  store i32 %197, ptr %17, align 4, !tbaa !9
  %198 = load i32, ptr %17, align 4, !tbaa !9
  %199 = load i32, ptr %16, align 4, !tbaa !9
  %200 = add i32 %199, %198
  store i32 %200, ptr %16, align 4, !tbaa !9
  %201 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %201, ptr %7, align 4, !tbaa !9
  %202 = load ptr, ptr %4, align 8, !tbaa !5
  %203 = getelementptr inbounds %struct.w2c_hermes, ptr %202, i32 0, i32 6
  %204 = load i32, ptr %16, align 4, !tbaa !9
  %205 = zext i32 %204 to i64
  %206 = call i32 @i32_load(ptr noundef %203, i64 noundef %205)
  store i32 %206, ptr %16, align 4, !tbaa !9
  %207 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %207, ptr %10, align 4, !tbaa !9
  %208 = load i32, ptr %15, align 4, !tbaa !9
  %209 = load i32, ptr %16, align 4, !tbaa !9
  %210 = icmp ne i32 %208, %209
  %211 = zext i1 %210 to i32
  store i32 %211, ptr %15, align 4, !tbaa !9
  %212 = load i32, ptr %15, align 4, !tbaa !9
  %213 = icmp ne i32 %212, 0
  br i1 %213, label %214, label %215

214:                                              ; preds = %172
  br label %127

215:                                              ; preds = %172
  br label %249

216:                                              ; preds = %145, %35
  %217 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %217, ptr %15, align 4, !tbaa !9
  %218 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %218, ptr %16, align 4, !tbaa !9
  %219 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %219, ptr %17, align 4, !tbaa !9
  %220 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %220, ptr %18, align 4, !tbaa !9
  %221 = load ptr, ptr %4, align 8, !tbaa !5
  %222 = load i32, ptr %15, align 4, !tbaa !9
  %223 = load i32, ptr %16, align 4, !tbaa !9
  %224 = load i32, ptr %17, align 4, !tbaa !9
  %225 = load i32, ptr %18, align 4, !tbaa !9
  %226 = call i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x2C0x20hermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3AValue0x2A0x3E0x28hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x29(ptr noundef %221, i32 noundef %222, i32 noundef %223, i32 noundef %224, i32 noundef %225)
  store i32 %226, ptr %15, align 4, !tbaa !9
  %227 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %227, ptr %7, align 4, !tbaa !9
  %228 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %228, ptr %15, align 4, !tbaa !9
  %229 = load ptr, ptr %4, align 8, !tbaa !5
  %230 = getelementptr inbounds %struct.w2c_hermes, ptr %229, i32 0, i32 6
  %231 = load i32, ptr %15, align 4, !tbaa !9
  %232 = zext i32 %231 to i64
  %233 = call i32 @i32_load(ptr noundef %230, i64 noundef %232)
  store i32 %233, ptr %15, align 4, !tbaa !9
  %234 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %234, ptr %5, align 4, !tbaa !9
  %235 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %235, ptr %15, align 4, !tbaa !9
  store i32 -1, ptr %16, align 4, !tbaa !9
  %236 = load ptr, ptr %4, align 8, !tbaa !5
  %237 = getelementptr inbounds %struct.w2c_hermes, ptr %236, i32 0, i32 6
  %238 = load i32, ptr %15, align 4, !tbaa !9
  %239 = zext i32 %238 to i64
  %240 = add i64 %239, 4
  %241 = load i32, ptr %16, align 4, !tbaa !9
  call void @i32_store(ptr noundef %237, i64 noundef %240, i32 noundef %241)
  %242 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %242, ptr %15, align 4, !tbaa !9
  %243 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %243, ptr %16, align 4, !tbaa !9
  %244 = load ptr, ptr %4, align 8, !tbaa !5
  %245 = getelementptr inbounds %struct.w2c_hermes, ptr %244, i32 0, i32 6
  %246 = load i32, ptr %15, align 4, !tbaa !9
  %247 = zext i32 %246 to i64
  %248 = load i32, ptr %16, align 4, !tbaa !9
  call void @i32_store(ptr noundef %245, i64 noundef %247, i32 noundef %248)
  br label %249

249:                                              ; preds = %216, %215, %124
  %250 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %250, ptr %15, align 4, !tbaa !9
  %251 = load i32, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  ret i32 %251
}

declare i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x2C0x20hermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3AValue0x2A0x3E0x28hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i32_store(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #1

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local i32 @w2c_hermes_llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x2C0x20hermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x3A0x3AFindAndConstruct0x28hermes0x3A0x3AValue0x2A0x20const0x260x29(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #3 {
  %4 = getelementptr inbounds i8, ptr %0, i64 40
  %5 = zext i32 %1 to i64
  %6 = add nuw nsw i64 %5, 12
  %7 = tail call i32 @i32_load(ptr noundef nonnull %4, i64 noundef %6)
  %.not = icmp eq i32 %7, 0
  %.pre = zext i32 %2 to i64
  br i1 %.not, label %._crit_edge, label %8

8:                                                ; preds = %3
  %9 = tail call i32 @i32_load(ptr noundef nonnull %4, i64 noundef %.pre)
  switch i32 %9, label %11 [
    i32 -8, label %10
    i32 -4, label %10
  ]

10:                                               ; preds = %8, %8
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 204136, i32 noundef 81389, i32 noundef 597, i32 noundef 48929) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

11:                                               ; preds = %8
  %12 = tail call i32 @i32_load(ptr noundef nonnull %4, i64 noundef %5)
  %13 = add i32 %7, -1
  %14 = lshr i32 %9, 4
  %15 = lshr i32 %9, 9
  %16 = xor i32 %14, %15
  %17 = and i32 %16, %13
  %18 = shl nuw nsw i32 %17, 3
  %19 = add i32 %12, %18
  %20 = zext i32 %19 to i64
  %21 = tail call i32 @i32_load(ptr noundef nonnull %4, i64 noundef %20)
  %22 = icmp eq i32 %9, %21
  br i1 %22, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %11, %26
  %.0139 = phi i32 [ %34, %26 ], [ %19, %11 ]
  %.0138 = phi i32 [ %29, %26 ], [ 0, %11 ]
  %.0137 = phi i32 [ %36, %26 ], [ %21, %11 ]
  %.0136 = phi i32 [ %31, %26 ], [ 1, %11 ]
  %.0 = phi i32 [ %32, %26 ], [ %17, %11 ]
  %23 = icmp eq i32 %.0137, -4
  %.not145 = icmp eq i32 %.0138, 0
  br i1 %23, label %24, label %26

24:                                               ; preds = %.preheader
  %25 = select i1 %.not145, i32 %.0139, i32 %.0138
  br label %._crit_edge

26:                                               ; preds = %.preheader
  %27 = icmp eq i32 %.0137, -8
  %28 = select i1 %27, i1 %.not145, i1 false
  %29 = select i1 %28, i32 %.0139, i32 %.0138
  %30 = add i32 %.0, %.0136
  %31 = add i32 %.0136, 1
  %32 = and i32 %30, %13
  %33 = shl i32 %32, 3
  %34 = add i32 %33, %12
  %35 = zext i32 %34 to i64
  %36 = tail call i32 @i32_load(ptr noundef nonnull %4, i64 noundef %35)
  %.not144 = icmp eq i32 %9, %36
  br i1 %.not144, label %.loopexit, label %.preheader

._crit_edge:                                      ; preds = %3, %24
  %.1 = phi i32 [ %25, %24 ], [ 0, %3 ]
  %37 = tail call i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x2C0x20hermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3AValue0x2A0x3E0x28hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %2, i32 noundef %.1) #4
  %38 = tail call i32 @i32_load(ptr noundef nonnull %4, i64 noundef %.pre)
  %39 = zext i32 %37 to i64
  %40 = add nuw nsw i64 %39, 4
  tail call void @i32_store(ptr noundef nonnull %4, i64 noundef %40, i32 noundef -1)
  tail call void @i32_store(ptr noundef nonnull %4, i64 noundef %39, i32 noundef %38)
  br label %.loopexit

.loopexit:                                        ; preds = %26, %11, %._crit_edge
  %.2 = phi i32 [ %37, %._crit_edge ], [ %19, %11 ], [ %34, %26 ]
  ret i32 %.2
}

declare i32 @w2c_hermes_llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x20llvh0x3A0x3ADenseMapBase0x3Cllvh0x3A0x3ADenseMap0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x2C0x20hermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x2C0x20llvh0x3A0x3ADenseMapInfo0x3Chermes0x3A0x3AValue0x2A0x3E0x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x3E0x3A0x3AInsertIntoBucketImpl0x3Chermes0x3A0x3AValue0x2A0x3E0x28hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20hermes0x3A0x3AValue0x2A0x20const0x260x2C0x20llvh0x3A0x3Adetail0x3A0x3ADenseMapPair0x3Chermes0x3A0x3AValue0x2A0x2C0x20hermes0x3A0x3ARegister0x3E0x2A0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass