; LLVM IR from caryll/otfcc :: lib/table (VORG)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__caryll_elementinterface_table_VORG = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.otfcc_Packet = type { i32, i16, i16, i16, i16, ptr }
%struct.otfcc_PacketPiece = type { i32, i32, i32, i32, ptr }
%struct.table_VORG = type { i16, double, ptr }
%struct.VORG_entry = type { i16, i16 }
%struct.otfcc_Options = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, ptr, ptr }
%struct.otfcc_ILogger = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }

@table_iVORG = external dso_local constant %struct.__caryll_elementinterface_table_VORG, align 8
@.str = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local ptr @otfcc_readVORG(ptr noundef byval(%struct.otfcc_Packet) align 8 %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %struct.otfcc_PacketPiece, align 8
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i16, align 2
  %14 = alloca ptr, align 8
  %15 = alloca i16, align 2
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %158, %2
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %28

19:                                               ; preds = %16
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %28

22:                                               ; preds = %19
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = getelementptr inbounds %struct.otfcc_Packet, ptr %0, i32 0, i32 1
  %25 = load i16, ptr %24, align 4, !tbaa !11
  %26 = zext i16 %25 to i32
  %27 = icmp slt i32 %23, %26
  br label %28

28:                                               ; preds = %22, %19, %16
  %29 = phi i1 [ false, %19 ], [ false, %16 ], [ %27, %22 ]
  br i1 %29, label %31, label %30

30:                                               ; preds = %28
  store i32 2, ptr %8, align 4
  br label %165

31:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 24, ptr %9) #5
  %32 = getelementptr inbounds %struct.otfcc_Packet, ptr %0, i32 0, i32 5
  %33 = load ptr, ptr %32, align 8, !tbaa !14
  %34 = load i32, ptr %6, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %33, i64 %35
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %9, ptr align 8 %36, i64 24, i1 false), !tbaa.struct !15
  br label %37

37:                                               ; preds = %150, %31
  %38 = load i32, ptr %5, align 4, !tbaa !9
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %41, label %40

40:                                               ; preds = %37
  store i32 5, ptr %8, align 4
  br label %155

41:                                               ; preds = %37
  %42 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %9, i32 0, i32 0
  %43 = load i32, ptr %42, align 8, !tbaa !16
  %44 = icmp eq i32 %43, 1448038983
  br i1 %44, label %45, label %149

45:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 1, ptr %10, align 4, !tbaa !9
  br label %46

46:                                               ; preds = %145, %45
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = icmp ne i32 %47, 0
  br i1 %48, label %50, label %49

49:                                               ; preds = %46
  store i32 8, ptr %8, align 4
  br label %146

50:                                               ; preds = %46
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %51 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %9, i32 0, i32 4
  %52 = load ptr, ptr %51, align 8, !tbaa !18
  store ptr %52, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %53 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %9, i32 0, i32 3
  %54 = load i32, ptr %53, align 4, !tbaa !19
  store i32 %54, ptr %12, align 4, !tbaa !9
  %55 = load i32, ptr %12, align 4, !tbaa !9
  %56 = icmp ult i32 %55, 8
  br i1 %56, label %57, label %58

57:                                               ; preds = %50
  br label %131

58:                                               ; preds = %50
  %59 = load ptr, ptr %11, align 8, !tbaa !5
  %60 = getelementptr inbounds i8, ptr %59, i64 6
  %61 = call zeroext i16 @read_16u(ptr noundef %60)
  store i16 %61, ptr %13, align 2, !tbaa !20
  %62 = load i32, ptr %12, align 4, !tbaa !9
  %63 = load i16, ptr %13, align 2, !tbaa !20
  %64 = zext i16 %63 to i32
  %65 = mul nsw i32 4, %64
  %66 = add nsw i32 8, %65
  %67 = icmp ult i32 %62, %66
  br i1 %67, label %68, label %69

68:                                               ; preds = %58
  br label %131

69:                                               ; preds = %58
  %70 = load ptr, ptr getelementptr inbounds (%struct.__caryll_elementinterface_table_VORG, ptr @table_iVORG, i32 0, i32 6), align 8, !tbaa !21
  %71 = call ptr (...) %70()
  store ptr %71, ptr %14, align 8, !tbaa !5
  %72 = load ptr, ptr %11, align 8, !tbaa !5
  %73 = getelementptr inbounds i8, ptr %72, i64 4
  %74 = call signext i16 @read_16s(ptr noundef %73)
  %75 = sitofp i16 %74 to double
  %76 = load ptr, ptr %14, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.table_VORG, ptr %76, i32 0, i32 1
  store double %75, ptr %77, align 8, !tbaa !23
  %78 = load i16, ptr %13, align 2, !tbaa !20
  %79 = load ptr, ptr %14, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.table_VORG, ptr %79, i32 0, i32 0
  store i16 %78, ptr %80, align 8, !tbaa !26
  %81 = load i16, ptr %13, align 2, !tbaa !20
  %82 = zext i16 %81 to i64
  %83 = mul i64 4, %82
  %84 = call ptr @__caryll_allocate_clean(i64 noundef %83, i64 noundef 22)
  %85 = load ptr, ptr %14, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.table_VORG, ptr %85, i32 0, i32 2
  store ptr %84, ptr %86, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 2, ptr %15) #5
  store i16 0, ptr %15, align 2, !tbaa !20
  br label %87

87:                                               ; preds = %126, %69
  %88 = load i16, ptr %15, align 2, !tbaa !20
  %89 = zext i16 %88 to i32
  %90 = load i16, ptr %13, align 2, !tbaa !20
  %91 = zext i16 %90 to i32
  %92 = icmp slt i32 %89, %91
  br i1 %92, label %94, label %93

93:                                               ; preds = %87
  store i32 12, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %15) #5
  br label %129

94:                                               ; preds = %87
  %95 = load ptr, ptr %11, align 8, !tbaa !5
  %96 = getelementptr inbounds i8, ptr %95, i64 8
  %97 = load i16, ptr %15, align 2, !tbaa !20
  %98 = zext i16 %97 to i32
  %99 = mul nsw i32 4, %98
  %100 = sext i32 %99 to i64
  %101 = getelementptr inbounds i8, ptr %96, i64 %100
  %102 = call zeroext i16 @read_16u(ptr noundef %101)
  %103 = load ptr, ptr %14, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.table_VORG, ptr %103, i32 0, i32 2
  %105 = load ptr, ptr %104, align 8, !tbaa !27
  %106 = load i16, ptr %15, align 2, !tbaa !20
  %107 = zext i16 %106 to i64
  %108 = getelementptr inbounds %struct.VORG_entry, ptr %105, i64 %107
  %109 = getelementptr inbounds %struct.VORG_entry, ptr %108, i32 0, i32 0
  store i16 %102, ptr %109, align 2, !tbaa !28
  %110 = load ptr, ptr %11, align 8, !tbaa !5
  %111 = getelementptr inbounds i8, ptr %110, i64 8
  %112 = load i16, ptr %15, align 2, !tbaa !20
  %113 = zext i16 %112 to i32
  %114 = mul nsw i32 4, %113
  %115 = sext i32 %114 to i64
  %116 = getelementptr inbounds i8, ptr %111, i64 %115
  %117 = getelementptr inbounds i8, ptr %116, i64 2
  %118 = call signext i16 @read_16s(ptr noundef %117)
  %119 = load ptr, ptr %14, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.table_VORG, ptr %119, i32 0, i32 2
  %121 = load ptr, ptr %120, align 8, !tbaa !27
  %122 = load i16, ptr %15, align 2, !tbaa !20
  %123 = zext i16 %122 to i64
  %124 = getelementptr inbounds %struct.VORG_entry, ptr %121, i64 %123
  %125 = getelementptr inbounds %struct.VORG_entry, ptr %124, i32 0, i32 1
  store i16 %118, ptr %125, align 2, !tbaa !30
  br label %126

126:                                              ; preds = %94
  %127 = load i16, ptr %15, align 2, !tbaa !20
  %128 = add i16 %127, 1
  store i16 %128, ptr %15, align 2, !tbaa !20
  br label %87, !llvm.loop !31

129:                                              ; preds = %93
  %130 = load ptr, ptr %14, align 8, !tbaa !5
  store ptr %130, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %142

131:                                              ; preds = %68, %57
  %132 = load ptr, ptr %4, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.otfcc_Options, ptr %132, i32 0, i32 24
  %134 = load ptr, ptr %133, align 8, !tbaa !33
  %135 = getelementptr inbounds %struct.otfcc_ILogger, ptr %134, i32 0, i32 6
  %136 = load ptr, ptr %135, align 8, !tbaa !36
  %137 = load ptr, ptr %4, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.otfcc_Options, ptr %137, i32 0, i32 24
  %139 = load ptr, ptr %138, align 8, !tbaa !33
  %140 = call ptr @sdsempty()
  %141 = call ptr (ptr, ptr, ...) @sdscatprintf(ptr noundef %140, ptr noundef @.str)
  call void %136(ptr noundef %139, i8 noundef zeroext 1, i32 noundef 1, ptr noundef %141)
  store i32 0, ptr %8, align 4
  br label %142

142:                                              ; preds = %131, %129
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  %143 = load i32, ptr %8, align 4
  switch i32 %143, label %146 [
    i32 0, label %144
  ]

144:                                              ; preds = %142
  br label %145

145:                                              ; preds = %144
  store i32 0, ptr %10, align 4, !tbaa !9
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %46, !llvm.loop !38

146:                                              ; preds = %142, %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  %147 = load i32, ptr %8, align 4
  switch i32 %147, label %155 [
    i32 8, label %148
  ]

148:                                              ; preds = %146
  br label %149

149:                                              ; preds = %148, %41
  br label %150

150:                                              ; preds = %149
  %151 = load i32, ptr %5, align 4, !tbaa !9
  %152 = icmp ne i32 %151, 0
  %153 = xor i1 %152, true
  %154 = zext i1 %153 to i32
  store i32 %154, ptr %5, align 4, !tbaa !9
  br label %37, !llvm.loop !39

155:                                              ; preds = %146, %40
  call void @llvm.lifetime.end.p0(i64 24, ptr %9) #5
  %156 = load i32, ptr %8, align 4
  switch i32 %156, label %165 [
    i32 5, label %157
  ]

157:                                              ; preds = %155
  br label %158

158:                                              ; preds = %157
  %159 = load i32, ptr %5, align 4, !tbaa !9
  %160 = icmp ne i32 %159, 0
  %161 = xor i1 %160, true
  %162 = zext i1 %161 to i32
  store i32 %162, ptr %5, align 4, !tbaa !9
  %163 = load i32, ptr %6, align 4, !tbaa !9
  %164 = add nsw i32 %163, 1
  store i32 %164, ptr %6, align 4, !tbaa !9
  br label %16, !llvm.loop !40

165:                                              ; preds = %155, %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  %166 = load i32, ptr %8, align 4
  switch i32 %166, label %170 [
    i32 2, label %167
    i32 1, label %168
  ]

167:                                              ; preds = %165
  store ptr null, ptr %3, align 8
  br label %168

168:                                              ; preds = %167, %165
  %169 = load ptr, ptr %3, align 8
  ret ptr %169

170:                                              ; preds = %165
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @read_16u(ptr noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden signext i16 @read_16s(ptr noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden ptr @__caryll_allocate_clean(i64 noundef, i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare ptr @sdscatprintf(ptr noundef, ptr noundef, ...) #4

declare ptr @sdsempty() #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 4}
!12 = !{!"", !10, i64 0, !13, i64 4, !13, i64 6, !13, i64 8, !13, i64 10, !6, i64 16}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !6, i64 16}
!15 = !{i64 0, i64 4, !9, i64 4, i64 4, !9, i64 8, i64 4, !9, i64 12, i64 4, !9, i64 16, i64 8, !5}
!16 = !{!17, !10, i64 0}
!17 = !{!"", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !6, i64 16}
!18 = !{!17, !6, i64 16}
!19 = !{!17, !10, i64 12}
!20 = !{!13, !13, i64 0}
!21 = !{!22, !6, i64 48}
!22 = !{!"__caryll_elementinterface_table_VORG", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!23 = !{!24, !25, i64 8}
!24 = !{!"", !13, i64 0, !25, i64 8, !6, i64 16}
!25 = !{!"double", !7, i64 0}
!26 = !{!24, !13, i64 0}
!27 = !{!24, !6, i64 16}
!28 = !{!29, !13, i64 0}
!29 = !{!"", !13, i64 0, !13, i64 2}
!30 = !{!29, !13, i64 2}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = !{!34, !6, i64 32}
!34 = !{!"", !35, i64 0, !35, i64 1, !35, i64 2, !35, i64 3, !35, i64 4, !35, i64 5, !35, i64 6, !35, i64 7, !35, i64 8, !35, i64 9, !35, i64 10, !35, i64 11, !35, i64 12, !35, i64 13, !35, i64 14, !35, i64 15, !35, i64 16, !35, i64 17, !35, i64 18, !35, i64 19, !35, i64 20, !35, i64 21, !35, i64 22, !6, i64 24, !6, i64 32}
!35 = !{!"_Bool", !7, i64 0}
!36 = !{!37, !6, i64 48}
!37 = !{!"otfcc_ILogger", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !6, i64 88}
!38 = distinct !{!38, !32}
!39 = distinct !{!39, !32}
!40 = distinct !{!40, !32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__caryll_elementinterface_table_VORG = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.otfcc_Packet = type { i32, i16, i16, i16, i16, ptr }
%struct.otfcc_PacketPiece = type { i32, i32, i32, i32, ptr }
%struct.VORG_entry = type { i16, i16 }

@table_iVORG = external dso_local local_unnamed_addr constant %struct.__caryll_elementinterface_table_VORG, align 8
@.str = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local ptr @otfcc_readVORG(ptr nocapture noundef readonly byval(%struct.otfcc_Packet) align 8 %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 4
  %4 = load i16, ptr %3, align 4
  %5 = icmp eq i16 %4, 0
  br i1 %5, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %6 = getelementptr inbounds i8, ptr %0, i64 16
  %7 = load ptr, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %1, i64 32
  %9 = load ptr, ptr getelementptr inbounds (i8, ptr @table_iVORG, i64 48), align 8
  %10 = zext i16 %4 to i64
  br label %11

11:                                               ; preds = %.lr.ph, %.split94.us
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %.split94.us ]
  %12 = getelementptr inbounds %struct.otfcc_PacketPiece, ptr %7, i64 %indvars.iv
  %.sroa.0.0.copyload = load i32, ptr %12, align 8, !tbaa !12
  %13 = icmp eq i32 %.sroa.0.0.copyload, 1448038983
  br i1 %13, label %.split.us, label %.split94.us

.split.us:                                        ; preds = %11
  %.sroa.425.0..sroa_idx.le = getelementptr inbounds i8, ptr %12, i64 12
  %.sroa.425.0.copyload.le = load i32, ptr %.sroa.425.0..sroa_idx.le, align 4, !tbaa !12
  %.sroa.5.0..sroa_idx.le = getelementptr inbounds i8, ptr %12, i64 16
  %.sroa.5.0.copyload.le = load ptr, ptr %.sroa.5.0..sroa_idx.le, align 8, !tbaa !13
  %14 = getelementptr inbounds i8, ptr %.sroa.5.0.copyload.le, i64 4
  %15 = getelementptr inbounds i8, ptr %.sroa.5.0.copyload.le, i64 8
  %16 = icmp ult i32 %.sroa.425.0.copyload.le, 8
  br i1 %16, label %.critedge.sink.split, label %.preheader.us

.preheader.us:                                    ; preds = %.split.us
  %17 = getelementptr inbounds i8, ptr %.sroa.5.0.copyload.le, i64 6
  %18 = tail call zeroext i16 @read_16u(ptr noundef nonnull %17)
  %19 = zext i16 %18 to i32
  %20 = shl nuw nsw i32 %19, 2
  %21 = add nuw nsw i32 %20, 8
  %22 = icmp ult i32 %.sroa.425.0.copyload.le, %21
  br i1 %22, label %.critedge.sink.split, label %23

23:                                               ; preds = %.preheader.us
  %24 = tail call ptr (...) %9() #3
  %25 = tail call signext i16 @read_16s(ptr noundef nonnull %14)
  %26 = sitofp i16 %25 to double
  %27 = getelementptr inbounds i8, ptr %24, i64 8
  store double %26, ptr %27, align 8, !tbaa !14
  store i16 %18, ptr %24, align 8, !tbaa !17
  %28 = zext i16 %18 to i64
  %29 = shl nuw nsw i64 %28, 2
  %30 = tail call ptr @__caryll_allocate_clean(i64 noundef %29, i64 noundef 22)
  %31 = getelementptr inbounds i8, ptr %24, i64 16
  store ptr %30, ptr %31, align 8, !tbaa !18
  %.not = icmp eq i16 %18, 0
  br i1 %.not, label %.critedge, label %.lr.ph87.us

.lr.ph87.us:                                      ; preds = %23, %.lr.ph87.us
  %indvars.iv106 = phi i64 [ %indvars.iv.next107, %.lr.ph87.us ], [ 0, %23 ]
  %32 = shl nuw nsw i64 %indvars.iv106, 2
  %33 = getelementptr inbounds i8, ptr %15, i64 %32
  %34 = tail call zeroext i16 @read_16u(ptr noundef nonnull %33)
  %35 = load ptr, ptr %31, align 8, !tbaa !18
  %36 = getelementptr inbounds %struct.VORG_entry, ptr %35, i64 %indvars.iv106
  store i16 %34, ptr %36, align 2, !tbaa !19
  %37 = getelementptr inbounds i8, ptr %33, i64 2
  %38 = tail call signext i16 @read_16s(ptr noundef nonnull %37)
  %39 = load ptr, ptr %31, align 8, !tbaa !18
  %40 = getelementptr inbounds %struct.VORG_entry, ptr %39, i64 %indvars.iv106, i32 1
  store i16 %38, ptr %40, align 2, !tbaa !21
  %indvars.iv.next107 = add nuw nsw i64 %indvars.iv106, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next107, %28
  br i1 %exitcond.not, label %.critedge, label %.lr.ph87.us, !llvm.loop !22

.split94.us:                                      ; preds = %11
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not126 = icmp ult i64 %indvars.iv.next, %10
  br i1 %.not126, label %11, label %.critedge, !llvm.loop !24

.critedge.sink.split:                             ; preds = %.preheader.us, %.split.us
  %41 = load ptr, ptr %8, align 8, !tbaa !25
  %42 = getelementptr inbounds i8, ptr %41, i64 48
  %43 = load ptr, ptr %42, align 8, !tbaa !28
  %44 = tail call ptr @sdsempty() #3
  %45 = tail call ptr (ptr, ptr, ...) @sdscatprintf(ptr noundef %44, ptr noundef nonnull @.str) #3
  tail call void %43(ptr noundef %41, i8 noundef zeroext 1, i32 noundef 1, ptr noundef %45) #3
  br label %.critedge

.critedge:                                        ; preds = %.split94.us, %.lr.ph87.us, %.critedge.sink.split, %2, %23
  %spec.select = phi ptr [ %24, %23 ], [ null, %2 ], [ null, %.critedge.sink.split ], [ %24, %.lr.ph87.us ], [ null, %.split94.us ]
  ret ptr %spec.select
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i16 @read_16u(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden signext i16 @read_16s(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden ptr @__caryll_allocate_clean(i64 noundef, i64 noundef) local_unnamed_addr #1

declare ptr @sdscatprintf(ptr noundef, ptr noundef, ...) local_unnamed_addr #2

declare ptr @sdsempty() local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"", !7, i64 0, !10, i64 4, !10, i64 6, !10, i64 8, !10, i64 10, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !16, i64 8}
!15 = !{!"", !10, i64 0, !16, i64 8, !11, i64 16}
!16 = !{!"double", !8, i64 0}
!17 = !{!15, !10, i64 0}
!18 = !{!15, !11, i64 16}
!19 = !{!20, !10, i64 0}
!20 = !{!"", !10, i64 0, !10, i64 2}
!21 = !{!20, !10, i64 2}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = distinct !{!24, !23}
!25 = !{!26, !11, i64 32}
!26 = !{!"", !27, i64 0, !27, i64 1, !27, i64 2, !27, i64 3, !27, i64 4, !27, i64 5, !27, i64 6, !27, i64 7, !27, i64 8, !27, i64 9, !27, i64 10, !27, i64 11, !27, i64 12, !27, i64 13, !27, i64 14, !27, i64 15, !27, i64 16, !27, i64 17, !27, i64 18, !27, i64 19, !27, i64 20, !27, i64 21, !27, i64 22, !11, i64 24, !11, i64 32}
!27 = !{!"_Bool", !8, i64 0}
!28 = !{!29, !11, i64 48}
!29 = !{!"otfcc_ILogger", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass