; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_5)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #1

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_load(ptr noundef, i64 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local i64 @w2c_hermes_llvh0x3A0x3AAPInt0x3A0x3AtcSubtract0x28unsigned0x20long0x20long0x2A0x2C0x20unsigned0x20long0x20long0x20const0x2A0x2C0x20unsigned0x20long0x20long0x2C0x20unsigned0x20int0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i64 noundef %3, i32 noundef %4) #4 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !11
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #5
  store i64 0, ptr %14, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  store i64 0, ptr %15, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #5
  %24 = load i64, ptr %9, align 8, !tbaa !11
  store i64 %24, ptr %21, align 8, !tbaa !11
  store i64 1, ptr %22, align 8, !tbaa !11
  %25 = load i64, ptr %21, align 8, !tbaa !11
  %26 = load i64, ptr %22, align 8, !tbaa !11
  %27 = icmp ule i64 %25, %26
  %28 = zext i1 %27 to i32
  store i32 %28, ptr %16, align 4, !tbaa !9
  %29 = load i32, ptr %16, align 4, !tbaa !9
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %130

31:                                               ; preds = %5
  %32 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %32, ptr %16, align 4, !tbaa !9
  %33 = load i32, ptr %16, align 4, !tbaa !9
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %128

35:                                               ; preds = %31
  br label %36

36:                                               ; preds = %126, %35
  %37 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %37, ptr %16, align 4, !tbaa !9
  %38 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %38, ptr %17, align 4, !tbaa !9
  store i32 3, ptr %18, align 4, !tbaa !9
  %39 = load i32, ptr %18, align 4, !tbaa !9
  %40 = and i32 %39, 31
  %41 = load i32, ptr %17, align 4, !tbaa !9
  %42 = shl i32 %41, %40
  store i32 %42, ptr %17, align 4, !tbaa !9
  %43 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %43, ptr %12, align 4, !tbaa !9
  %44 = load i32, ptr %17, align 4, !tbaa !9
  %45 = load i32, ptr %16, align 4, !tbaa !9
  %46 = add i32 %45, %44
  store i32 %46, ptr %16, align 4, !tbaa !9
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.w2c_hermes, ptr %47, i32 0, i32 6
  %49 = load i32, ptr %16, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = call i64 @i64_load(ptr noundef %48, i64 noundef %50)
  store i64 %51, ptr %21, align 8, !tbaa !11
  %52 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %52, ptr %14, align 8, !tbaa !11
  %53 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %53, ptr %16, align 4, !tbaa !9
  %54 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %54, ptr %17, align 4, !tbaa !9
  %55 = load i32, ptr %17, align 4, !tbaa !9
  %56 = load i32, ptr %16, align 4, !tbaa !9
  %57 = add i32 %56, %55
  store i32 %57, ptr %16, align 4, !tbaa !9
  %58 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %58, ptr %12, align 4, !tbaa !9
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.w2c_hermes, ptr %59, i32 0, i32 6
  %61 = load i32, ptr %16, align 4, !tbaa !9
  %62 = zext i32 %61 to i64
  %63 = call i64 @i64_load(ptr noundef %60, i64 noundef %62)
  store i64 %63, ptr %21, align 8, !tbaa !11
  %64 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %64, ptr %15, align 8, !tbaa !11
  %65 = load i64, ptr %9, align 8, !tbaa !11
  store i64 %65, ptr %21, align 8, !tbaa !11
  store i64 0, ptr %22, align 8, !tbaa !11
  %66 = load i64, ptr %21, align 8, !tbaa !11
  %67 = load i64, ptr %22, align 8, !tbaa !11
  %68 = icmp ne i64 %66, %67
  %69 = zext i1 %68 to i32
  store i32 %69, ptr %16, align 4, !tbaa !9
  %70 = load i32, ptr %16, align 4, !tbaa !9
  %71 = icmp ne i32 %70, 0
  br i1 %71, label %72, label %88

72:                                               ; preds = %36
  %73 = load i64, ptr %15, align 8, !tbaa !11
  store i64 %73, ptr %21, align 8, !tbaa !11
  %74 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %74, ptr %22, align 8, !tbaa !11
  store i64 -1, ptr %23, align 8, !tbaa !11
  %75 = load i64, ptr %23, align 8, !tbaa !11
  %76 = load i64, ptr %22, align 8, !tbaa !11
  %77 = xor i64 %76, %75
  store i64 %77, ptr %22, align 8, !tbaa !11
  %78 = load i64, ptr %22, align 8, !tbaa !11
  %79 = load i64, ptr %21, align 8, !tbaa !11
  %80 = add i64 %79, %78
  store i64 %80, ptr %21, align 8, !tbaa !11
  %81 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %81, ptr %14, align 8, !tbaa !11
  %82 = load i64, ptr %15, align 8, !tbaa !11
  store i64 %82, ptr %22, align 8, !tbaa !11
  %83 = load i64, ptr %21, align 8, !tbaa !11
  %84 = load i64, ptr %22, align 8, !tbaa !11
  %85 = icmp uge i64 %83, %84
  %86 = zext i1 %85 to i32
  store i32 %86, ptr %16, align 4, !tbaa !9
  %87 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %87, ptr %13, align 4, !tbaa !9
  br label %102

88:                                               ; preds = %36
  %89 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %89, ptr %21, align 8, !tbaa !11
  %90 = load i64, ptr %15, align 8, !tbaa !11
  store i64 %90, ptr %22, align 8, !tbaa !11
  %91 = load i64, ptr %21, align 8, !tbaa !11
  %92 = load i64, ptr %22, align 8, !tbaa !11
  %93 = icmp ugt i64 %91, %92
  %94 = zext i1 %93 to i32
  store i32 %94, ptr %16, align 4, !tbaa !9
  %95 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %95, ptr %13, align 4, !tbaa !9
  %96 = load i64, ptr %15, align 8, !tbaa !11
  store i64 %96, ptr %21, align 8, !tbaa !11
  %97 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %97, ptr %22, align 8, !tbaa !11
  %98 = load i64, ptr %22, align 8, !tbaa !11
  %99 = load i64, ptr %21, align 8, !tbaa !11
  %100 = sub i64 %99, %98
  store i64 %100, ptr %21, align 8, !tbaa !11
  %101 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %101, ptr %14, align 8, !tbaa !11
  br label %102

102:                                              ; preds = %88, %72
  %103 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %103, ptr %16, align 4, !tbaa !9
  %104 = load i64, ptr %14, align 8, !tbaa !11
  store i64 %104, ptr %22, align 8, !tbaa !11
  %105 = load ptr, ptr %6, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.w2c_hermes, ptr %105, i32 0, i32 6
  %107 = load i32, ptr %16, align 4, !tbaa !9
  %108 = zext i32 %107 to i64
  %109 = load i64, ptr %22, align 8, !tbaa !11
  call void @i64_store(ptr noundef %106, i64 noundef %108, i64 noundef %109)
  %110 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %110, ptr %16, align 4, !tbaa !9
  %111 = load i32, ptr %16, align 4, !tbaa !9
  %112 = zext i32 %111 to i64
  store i64 %112, ptr %21, align 8, !tbaa !11
  %113 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %113, ptr %9, align 8, !tbaa !11
  %114 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %114, ptr %16, align 4, !tbaa !9
  store i32 1, ptr %17, align 4, !tbaa !9
  %115 = load i32, ptr %17, align 4, !tbaa !9
  %116 = load i32, ptr %16, align 4, !tbaa !9
  %117 = add i32 %116, %115
  store i32 %117, ptr %16, align 4, !tbaa !9
  %118 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %118, ptr %11, align 4, !tbaa !9
  %119 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %119, ptr %17, align 4, !tbaa !9
  %120 = load i32, ptr %16, align 4, !tbaa !9
  %121 = load i32, ptr %17, align 4, !tbaa !9
  %122 = icmp ne i32 %120, %121
  %123 = zext i1 %122 to i32
  store i32 %123, ptr %16, align 4, !tbaa !9
  %124 = load i32, ptr %16, align 4, !tbaa !9
  %125 = icmp ne i32 %124, 0
  br i1 %125, label %126, label %127

126:                                              ; preds = %102
  br label %36

127:                                              ; preds = %102
  br label %128

128:                                              ; preds = %127, %31
  %129 = load i64, ptr %9, align 8, !tbaa !11
  store i64 %129, ptr %21, align 8, !tbaa !11
  br label %147

130:                                              ; preds = %5
  store i32 0, ptr %16, align 4, !tbaa !9
  store i32 111287, ptr %17, align 4, !tbaa !9
  %131 = load i32, ptr %17, align 4, !tbaa !9
  %132 = load i32, ptr %16, align 4, !tbaa !9
  %133 = add i32 %132, %131
  store i32 %133, ptr %16, align 4, !tbaa !9
  %134 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %134, ptr %17, align 4, !tbaa !9
  store i32 54858, ptr %18, align 4, !tbaa !9
  %135 = load i32, ptr %18, align 4, !tbaa !9
  %136 = load i32, ptr %17, align 4, !tbaa !9
  %137 = add i32 %136, %135
  store i32 %137, ptr %17, align 4, !tbaa !9
  store i32 2323, ptr %18, align 4, !tbaa !9
  %138 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %138, ptr %19, align 4, !tbaa !9
  store i32 39502, ptr %20, align 4, !tbaa !9
  %139 = load i32, ptr %20, align 4, !tbaa !9
  %140 = load i32, ptr %19, align 4, !tbaa !9
  %141 = add i32 %140, %139
  store i32 %141, ptr %19, align 4, !tbaa !9
  %142 = load ptr, ptr %6, align 8, !tbaa !5
  %143 = load i32, ptr %16, align 4, !tbaa !9
  %144 = load i32, ptr %17, align 4, !tbaa !9
  %145 = load i32, ptr %18, align 4, !tbaa !9
  %146 = load i32, ptr %19, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %142, i32 noundef %143, i32 noundef %144, i32 noundef %145, i32 noundef %146)
  call void @wasm_rt_trap(i32 noundef 5) #6
  unreachable

147:                                              ; preds = %128
  %148 = load i64, ptr %21, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  ret i64 %148
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #0

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_load(ptr noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local range(i64 0, 2) i64 @w2c_hermes_llvh0x3A0x3AAPInt0x3A0x3AtcSubtract0x28unsigned0x20long0x20long0x2A0x2C0x20unsigned0x20long0x20long0x20const0x2A0x2C0x20unsigned0x20long0x20long0x2C0x20unsigned0x20int0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i64 noundef %3, i32 noundef %4) local_unnamed_addr #3 {
  %6 = icmp ult i64 %3, 2
  br i1 %6, label %7, label %28

7:                                                ; preds = %5
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %7
  %8 = getelementptr inbounds i8, ptr %0, i64 40
  %9 = zext i32 %4 to i64
  br label %10

10:                                               ; preds = %.preheader, %26
  %indvars.iv = phi i64 [ 0, %.preheader ], [ %indvars.iv.next, %26 ]
  %.0 = phi i64 [ %3, %.preheader ], [ %27, %26 ]
  %11 = trunc nuw i64 %indvars.iv to i32
  %12 = shl i32 %11, 3
  %13 = add i32 %12, %2
  %14 = zext i32 %13 to i64
  %15 = tail call i64 @i64_load(ptr noundef nonnull %8, i64 noundef %14)
  %16 = add i32 %12, %1
  %17 = zext i32 %16 to i64
  %18 = tail call i64 @i64_load(ptr noundef nonnull %8, i64 noundef %17)
  %.not84 = icmp eq i64 %.0, 0
  br i1 %.not84, label %23, label %19

19:                                               ; preds = %10
  %20 = xor i64 %15, -1
  %21 = add i64 %18, %20
  %22 = icmp uge i64 %21, %18
  br label %26

23:                                               ; preds = %10
  %24 = icmp ugt i64 %15, %18
  %25 = sub i64 %18, %15
  br label %26

26:                                               ; preds = %23, %19
  %.081.in = phi i1 [ %22, %19 ], [ %24, %23 ]
  %.080 = phi i64 [ %21, %19 ], [ %25, %23 ]
  tail call void @i64_store(ptr noundef nonnull %8, i64 noundef %17, i64 noundef %.080)
  %27 = zext i1 %.081.in to i64
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.not85 = icmp eq i64 %indvars.iv.next, %9
  br i1 %.not85, label %.loopexit, label %10

.loopexit:                                        ; preds = %26, %7
  %.1 = phi i64 [ %3, %7 ], [ %27, %26 ]
  ret i64 %.1

28:                                               ; preds = %5
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 111287, i32 noundef 54858, i32 noundef 2323, i32 noundef 39502) #4
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable
}

attributes #0 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass