; LLVM IR from DionysiosB/CodeForces :: 0001-0099/36D-NewGameWithAChessPiece.ll (Z9firstWinslll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z9firstWinslll(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store i64 %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  %10 = load i64, ptr %6, align 8, !tbaa !5
  %11 = load i64, ptr %5, align 8, !tbaa !5
  %12 = icmp slt i64 %10, %11
  br i1 %12, label %13, label %15

13:                                               ; preds = %3
  %14 = load i64, ptr %6, align 8, !tbaa !5
  br label %17

15:                                               ; preds = %3
  %16 = load i64, ptr %5, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %15, %13
  %18 = phi i64 [ %14, %13 ], [ %16, %15 ]
  store i64 %18, ptr %8, align 8, !tbaa !5
  %19 = load i64, ptr %8, align 8, !tbaa !5
  %20 = load i64, ptr %7, align 8, !tbaa !5
  %21 = add nsw i64 %20, 1
  %22 = srem i64 %19, %21
  %23 = icmp eq i64 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %17
  store i1 true, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %47

25:                                               ; preds = %17
  %26 = load i64, ptr %7, align 8, !tbaa !5
  %27 = icmp eq i64 %26, 1
  br i1 %27, label %35, label %28

28:                                               ; preds = %25
  %29 = load i64, ptr %8, align 8, !tbaa !5
  %30 = load i64, ptr %7, align 8, !tbaa !5
  %31 = add nsw i64 %30, 1
  %32 = sdiv i64 %29, %31
  %33 = srem i64 %32, 2
  %34 = icmp eq i64 %33, 0
  br i1 %34, label %35, label %41

35:                                               ; preds = %28, %25
  %36 = load i64, ptr %6, align 8, !tbaa !5
  %37 = srem i64 %36, 2
  %38 = load i64, ptr %5, align 8, !tbaa !5
  %39 = srem i64 %38, 2
  %40 = icmp ne i64 %37, %39
  store i1 %40, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %47

41:                                               ; preds = %28
  %42 = load i64, ptr %6, align 8, !tbaa !5
  %43 = srem i64 %42, 2
  %44 = load i64, ptr %5, align 8, !tbaa !5
  %45 = srem i64 %44, 2
  %46 = icmp eq i64 %43, %45
  store i1 %46, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %47

47:                                               ; preds = %41, %35, %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %48 = load i1, ptr %4, align 1
  ret i1 %48
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef zeroext i1 @_Z9firstWinslll(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = tail call i64 @llvm.smin.i64(i64 %1, i64 %0)
  %5 = add nsw i64 %2, 1
  %6 = srem i64 %4, %5
  %7 = sdiv i64 %4, %5
  %8 = icmp eq i64 %6, 0
  br i1 %8, label %21, label %9

9:                                                ; preds = %3
  %10 = icmp eq i64 %2, 1
  %11 = and i64 %7, 1
  %12 = icmp eq i64 %11, 0
  %or.cond = or i1 %10, %12
  br i1 %or.cond, label %13, label %17

13:                                               ; preds = %9
  %14 = srem i64 %1, 2
  %15 = srem i64 %0, 2
  %16 = icmp ne i64 %14, %15
  br label %21

17:                                               ; preds = %9
  %18 = srem i64 %1, 2
  %19 = srem i64 %0, 2
  %20 = icmp eq i64 %18, %19
  br label %21

21:                                               ; preds = %3, %17, %13
  %.0 = phi i1 [ %16, %13 ], [ %20, %17 ], [ true, %3 ]
  ret i1 %.0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: DivRemPairsPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass