; LLVM IR from DionysiosB/CodeForces :: 0100-0199/161D-DistanceInTree.ll (Z3dfsxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@count = external dso_local global %"class.std::vector", align 8
@edges = external dso_local global %"class.std::vector", align 8
@k = external dso_local global i64, align 8
@output = external dso_local global i64, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsxx(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !5
  %10 = load i64, ptr %3, align 8, !tbaa !5
  %11 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %10) #3
  %12 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef 0) #3
  store i64 1, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  store i64 0, ptr %5, align 8, !tbaa !5
  br label %13

13:                                               ; preds = %84, %2
  %14 = load i64, ptr %5, align 8, !tbaa !5
  %15 = load i64, ptr %3, align 8, !tbaa !5
  %16 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edges, i64 noundef %15) #3
  %17 = call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #3
  %18 = icmp ult i64 %14, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %13
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  br label %87

20:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %21 = load i64, ptr %3, align 8, !tbaa !5
  %22 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edges, i64 noundef %21) #3
  %23 = load i64, ptr %5, align 8, !tbaa !5
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %23) #3
  %25 = load i64, ptr %24, align 8, !tbaa !5
  store i64 %25, ptr %7, align 8, !tbaa !5
  %26 = load i64, ptr %7, align 8, !tbaa !5
  %27 = load i64, ptr %4, align 8, !tbaa !5
  %28 = icmp eq i64 %26, %27
  br i1 %28, label %29, label %30

29:                                               ; preds = %20
  store i32 4, ptr %6, align 4
  br label %81

30:                                               ; preds = %20
  %31 = load i64, ptr %7, align 8, !tbaa !5
  %32 = load i64, ptr %3, align 8, !tbaa !5
  call void @_Z3dfsxx(i64 noundef %31, i64 noundef %32)
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  store i64 1, ptr %8, align 8, !tbaa !5
  br label %33

33:                                               ; preds = %55, %30
  %34 = load i64, ptr %8, align 8, !tbaa !5
  %35 = load i64, ptr @k, align 8, !tbaa !5
  %36 = icmp sle i64 %34, %35
  br i1 %36, label %38, label %37

37:                                               ; preds = %33
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %58

38:                                               ; preds = %33
  %39 = load i64, ptr %3, align 8, !tbaa !5
  %40 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %39) #3
  %41 = load i64, ptr %8, align 8, !tbaa !5
  %42 = sub nsw i64 %41, 1
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #3
  %44 = load i64, ptr %43, align 8, !tbaa !5
  %45 = load i64, ptr %7, align 8, !tbaa !5
  %46 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %45) #3
  %47 = load i64, ptr @k, align 8, !tbaa !5
  %48 = load i64, ptr %8, align 8, !tbaa !5
  %49 = sub nsw i64 %47, %48
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %49) #3
  %51 = load i64, ptr %50, align 8, !tbaa !5
  %52 = mul nsw i64 %44, %51
  %53 = load i64, ptr @output, align 8, !tbaa !5
  %54 = add nsw i64 %53, %52
  store i64 %54, ptr @output, align 8, !tbaa !5
  br label %55

55:                                               ; preds = %38
  %56 = load i64, ptr %8, align 8, !tbaa !5
  %57 = add nsw i64 %56, 1
  store i64 %57, ptr %8, align 8, !tbaa !5
  br label %33, !llvm.loop !9

58:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  store i64 1, ptr %9, align 8, !tbaa !5
  br label %59

59:                                               ; preds = %77, %58
  %60 = load i64, ptr %9, align 8, !tbaa !5
  %61 = load i64, ptr @k, align 8, !tbaa !5
  %62 = icmp sle i64 %60, %61
  br i1 %62, label %64, label %63

63:                                               ; preds = %59
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  br label %80

64:                                               ; preds = %59
  %65 = load i64, ptr %7, align 8, !tbaa !5
  %66 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %65) #3
  %67 = load i64, ptr %9, align 8, !tbaa !5
  %68 = sub nsw i64 %67, 1
  %69 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %68) #3
  %70 = load i64, ptr %69, align 8, !tbaa !5
  %71 = load i64, ptr %3, align 8, !tbaa !5
  %72 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %71) #3
  %73 = load i64, ptr %9, align 8, !tbaa !5
  %74 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %73) #3
  %75 = load i64, ptr %74, align 8, !tbaa !5
  %76 = add nsw i64 %75, %70
  store i64 %76, ptr %74, align 8, !tbaa !5
  br label %77

77:                                               ; preds = %64
  %78 = load i64, ptr %9, align 8, !tbaa !5
  %79 = add nsw i64 %78, 1
  store i64 %79, ptr %9, align 8, !tbaa !5
  br label %59, !llvm.loop !11

80:                                               ; preds = %63
  store i32 0, ptr %6, align 4
  br label %81

81:                                               ; preds = %80, %29
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  %82 = load i32, ptr %6, align 4
  switch i32 %82, label %88 [
    i32 0, label %83
    i32 4, label %84
  ]

83:                                               ; preds = %81
  br label %84

84:                                               ; preds = %83, %81
  %85 = load i64, ptr %5, align 8, !tbaa !5
  %86 = add nsw i64 %85, 1
  store i64 %86, ptr %5, align 8, !tbaa !5
  br label %13, !llvm.loop !12

87:                                               ; preds = %19
  ret void

88:                                               ; preds = %81
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long long>, std::allocator<std::vector<long long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@count = external dso_local global %"class.std::vector", align 8
@edges = external dso_local global %"class.std::vector", align 8
@k = external dso_local local_unnamed_addr global i64, align 8
@output = external dso_local local_unnamed_addr global i64, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsxx(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %0) #1
  %4 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef 0) #1
  store i64 1, ptr %4, align 8, !tbaa !5
  %5 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edges, i64 noundef %0) #1
  %6 = tail call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #1
  %.not33 = icmp eq i64 %6, 0
  br i1 %.not33, label %._crit_edge, label %.lr.ph32

._crit_edge:                                      ; preds = %.loopexit, %2
  ret void

.lr.ph32:                                         ; preds = %2, %.loopexit
  %.02331 = phi i64 [ %37, %.loopexit ], [ 0, %2 ]
  %7 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edges, i64 noundef %0) #1
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %.02331) #1
  %9 = load i64, ptr %8, align 8, !tbaa !5
  %10 = icmp eq i64 %9, %1
  br i1 %10, label %.loopexit, label %11

11:                                               ; preds = %.lr.ph32
  tail call void @_Z3dfsxx(i64 noundef %9, i64 noundef %0)
  %12 = load i64, ptr @k, align 8, !tbaa !5
  %.not26 = icmp slt i64 %12, 1
  br i1 %.not26, label %.loopexit, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph
  %.not2528 = icmp slt i64 %26, 1
  br i1 %.not2528, label %.loopexit, label %.lr.ph30

.lr.ph:                                           ; preds = %11, %.lr.ph
  %.02227 = phi i64 [ %25, %.lr.ph ], [ 1, %11 ]
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %0) #1
  %14 = add nsw i64 %.02227, -1
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %14) #1
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %9) #1
  %18 = load i64, ptr @k, align 8, !tbaa !5
  %19 = sub nsw i64 %18, %.02227
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %19) #1
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = mul nsw i64 %21, %16
  %23 = load i64, ptr @output, align 8, !tbaa !5
  %24 = add nsw i64 %23, %22
  store i64 %24, ptr @output, align 8, !tbaa !5
  %25 = add nuw nsw i64 %.02227, 1
  %26 = load i64, ptr @k, align 8, !tbaa !5
  %.not.not = icmp slt i64 %.02227, %26
  br i1 %.not.not, label %.lr.ph, label %.preheader, !llvm.loop !9

.lr.ph30:                                         ; preds = %.preheader, %.lr.ph30
  %.029 = phi i64 [ %35, %.lr.ph30 ], [ 1, %.preheader ]
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %9) #1
  %28 = add nsw i64 %.029, -1
  %29 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %28) #1
  %30 = load i64, ptr %29, align 8, !tbaa !5
  %31 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @count, i64 noundef %0) #1
  %32 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %.029) #1
  %33 = load i64, ptr %32, align 8, !tbaa !5
  %34 = add nsw i64 %33, %30
  store i64 %34, ptr %32, align 8, !tbaa !5
  %35 = add nuw nsw i64 %.029, 1
  %36 = load i64, ptr @k, align 8, !tbaa !5
  %.not25.not = icmp slt i64 %.029, %36
  br i1 %.not25.not, label %.lr.ph30, label %.loopexit, !llvm.loop !11

.loopexit:                                        ; preds = %.lr.ph30, %11, %.preheader, %.lr.ph32
  %37 = add nuw nsw i64 %.02331, 1
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @edges, i64 noundef %0) #1
  %39 = tail call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %38) #1
  %40 = icmp ult i64 %37, %39
  br i1 %40, label %.lr.ph32, label %._crit_edge, !llvm.loop !12
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IxSaIxEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass