; LLVM IR from DionysiosB/CodeForces :: 0800-0899/803D-MagazineAd.ll (Z5checkSt6vectorIlSaIlEEll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5checkSt6vectorIlSaIlEEll(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store i64 %2, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  store i64 0, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  store i64 0, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  store i64 0, ptr %10, align 8, !tbaa !9
  br label %12

12:                                               ; preds = %46, %3
  %13 = load i64, ptr %10, align 8, !tbaa !9
  %14 = call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %15 = icmp ult i64 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  store i32 2, ptr %11, align 4
  br label %49

17:                                               ; preds = %12
  %18 = load i64, ptr %10, align 8, !tbaa !9
  %19 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #2
  %20 = load i64, ptr %19, align 8, !tbaa !9
  %21 = load i64, ptr %6, align 8, !tbaa !9
  %22 = icmp sgt i64 %20, %21
  br i1 %22, label %23, label %24

23:                                               ; preds = %17
  store i1 false, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %49

24:                                               ; preds = %17
  %25 = load i64, ptr %9, align 8, !tbaa !9
  %26 = load i64, ptr %7, align 8, !tbaa !9
  %27 = icmp sgt i64 %25, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %24
  store i1 false, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %49

29:                                               ; preds = %24
  %30 = load i64, ptr %8, align 8, !tbaa !9
  %31 = load i64, ptr %10, align 8, !tbaa !9
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %31) #2
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = add nsw i64 %30, %33
  %35 = load i64, ptr %6, align 8, !tbaa !9
  %36 = icmp sgt i64 %34, %35
  br i1 %36, label %37, label %40

37:                                               ; preds = %29
  %38 = load i64, ptr %9, align 8, !tbaa !9
  %39 = add nsw i64 %38, 1
  store i64 %39, ptr %9, align 8, !tbaa !9
  store i64 0, ptr %8, align 8, !tbaa !9
  br label %40

40:                                               ; preds = %37, %29
  %41 = load i64, ptr %10, align 8, !tbaa !9
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %41) #2
  %43 = load i64, ptr %42, align 8, !tbaa !9
  %44 = load i64, ptr %8, align 8, !tbaa !9
  %45 = add nsw i64 %44, %43
  store i64 %45, ptr %8, align 8, !tbaa !9
  br label %46

46:                                               ; preds = %40
  %47 = load i64, ptr %10, align 8, !tbaa !9
  %48 = add nsw i64 %47, 1
  store i64 %48, ptr %10, align 8, !tbaa !9
  br label %12, !llvm.loop !11

49:                                               ; preds = %28, %23, %16
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %50 = load i32, ptr %11, align 4
  switch i32 %50, label %61 [
    i32 2, label %51
  ]

51:                                               ; preds = %49
  %52 = load i64, ptr %8, align 8, !tbaa !9
  %53 = icmp sgt i64 %52, 0
  br i1 %53, label %54, label %57

54:                                               ; preds = %51
  %55 = load i64, ptr %9, align 8, !tbaa !9
  %56 = add nsw i64 %55, 1
  store i64 %56, ptr %9, align 8, !tbaa !9
  br label %57

57:                                               ; preds = %54, %51
  %58 = load i64, ptr %9, align 8, !tbaa !9
  %59 = load i64, ptr %7, align 8, !tbaa !9
  %60 = icmp sle i64 %58, %59
  store i1 %60, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %61

61:                                               ; preds = %57, %49
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %62 = load i1, ptr %4, align 1
  ret i1 %62
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z5checkSt6vectorIlSaIlEEll(ptr noundef nonnull %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not28.not = icmp eq i64 %4, 0
  br i1 %.not28.not, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %9
  %.01731 = phi i64 [ %18, %9 ], [ 0, %3 ]
  %.01830 = phi i64 [ %spec.select24, %9 ], [ 0, %3 ]
  %.01929 = phi i64 [ %17, %9 ], [ 0, %3 ]
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.01731) #1
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = icmp sgt i64 %6, %1
  %8 = icmp sgt i64 %.01830, %2
  %or.cond = select i1 %7, i1 true, i1 %8
  br i1 %or.cond, label %.loopexit, label %9

9:                                                ; preds = %.lr.ph
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.01731) #1
  %11 = load i64, ptr %10, align 8, !tbaa !5
  %12 = add nsw i64 %11, %.01929
  %13 = icmp sgt i64 %12, %1
  %spec.select = select i1 %13, i64 0, i64 %.01929
  %14 = zext i1 %13 to i64
  %spec.select24 = add nuw nsw i64 %.01830, %14
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.01731) #1
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = add nsw i64 %spec.select, %16
  %18 = add nuw nsw i64 %.01731, 1
  %19 = tail call noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not = icmp ult i64 %18, %19
  br i1 %.not, label %.lr.ph, label %.critedge.loopexit, !llvm.loop !9

.critedge.loopexit:                               ; preds = %9
  %20 = icmp sgt i64 %17, 0
  %21 = zext i1 %20 to i64
  %22 = add nuw nsw i64 %spec.select24, %21
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit, %3
  %spec.select25 = phi i64 [ 0, %3 ], [ %22, %.critedge.loopexit ]
  %23 = icmp sle i64 %spec.select25, %2
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %.critedge
  %.122 = phi i1 [ %23, %.critedge ], [ false, %.lr.ph ]
  ret i1 %.122
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIlSaIlEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass