; LLVM IR from buresjan/optim_lbm :: nomad/ext/sgtelib/src/Surrogate_PRS.ll (ZN7SGTELIB13Surrogate_PRS18get_nb_PRS_monomesEii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN7SGTELIB13Surrogate_PRS18get_nb_PRS_monomesEii(i32 noundef %0, i32 noundef %1) #1 align 2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %8 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %8, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 1, ptr %7, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %26, %2
  %10 = load i32, ptr %7, align 4, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = icmp sle i32 %10, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %29

14:                                               ; preds = %9
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = add nsw i32 %16, %15
  store i32 %17, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %6, align 4, !tbaa !5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = add nsw i32 %19, %20
  %22 = mul nsw i32 %18, %21
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  %25 = sdiv i32 %22, %24
  store i32 %25, ptr %6, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %14
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %7, align 4, !tbaa !5
  br label %9, !llvm.loop !9

29:                                               ; preds = %13
  %30 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %30
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @_ZN7SGTELIB13Surrogate_PRS18get_nb_PRS_monomesEii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 align 2 {
  %.not13 = icmp slt i32 %1, 1
  br i1 %.not13, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %2
  %xtraiter = and i32 %1, 1
  %3 = icmp eq i32 %1, 1
  br i1 %3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i32 %1, 2147483646
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %10, %.lr.ph ]
  %.01115.unr = phi i32 [ %0, %.lr.ph.preheader ], [ %14, %.lr.ph ]
  %.01214.unr = phi i32 [ 1, %.lr.ph.preheader ], [ %10, %.lr.ph ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  %4 = add nsw i32 %.01115.unr, %.01214.unr
  %.lcssa = select i1 %lcmp.mod.not, i32 %.lcssa.ph, i32 %4
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %2
  %.012.lcssa = phi i32 [ 1, %2 ], [ %.lcssa, %._crit_edge.loopexit.unr-lcssa ]
  ret i32 %.012.lcssa

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %.016 = phi i32 [ 1, %.lr.ph.preheader.new ], [ %13, %.lr.ph ]
  %.01115 = phi i32 [ %0, %.lr.ph.preheader.new ], [ %14, %.lr.ph ]
  %.01214 = phi i32 [ 1, %.lr.ph.preheader.new ], [ %10, %.lr.ph ]
  %niter = phi i32 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %5 = add nsw i32 %.01115, %.01214
  %6 = add nsw i32 %.016, %0
  %7 = mul nsw i32 %6, %.01115
  %8 = add nuw nsw i32 %.016, 1
  %9 = sdiv i32 %7, %8
  %10 = add nsw i32 %9, %5
  %11 = add nsw i32 %8, %0
  %12 = mul nsw i32 %11, %9
  %13 = add nuw nsw i32 %.016, 2
  %14 = sdiv i32 %12, %13
  %niter.next.1 = add i32 %niter, 2
  %niter.ncmp.1 = icmp eq i32 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !5
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass