; LLVM IR from facebook/hermes :: API/hermes_sandbox/external (hermes_sandbox_impl_compiled_7)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.w2c_hermes = type { ptr, ptr, ptr, i32, i32, i32, %struct.wasm_rt_memory_t, %struct.wasm_rt_funcref_table_t }
%struct.wasm_rt_memory_t = type { ptr, i64, i64, i64, i8 }
%struct.wasm_rt_funcref_table_t = type { ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_u(ptr noundef, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #2

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_load(ptr noundef, i64 noundef) #1

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #4

declare i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AEvacAcceptor0x3Ctrue0x3E0x3A0x3AacceptHeap0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x2A0x2C0x20void0x2A0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #4

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_void0x20hermes0x3A0x3Avm0x3A0x3ASlotVisitor0x3Chermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AEvacAcceptor0x3Ctrue0x3E0x3E0x3A0x3AvisitArrayObjectWithinRange0x3Chermes0x3A0x3Avm0x3A0x3AGCHermesValueBase0x3Chermes0x3A0x3Avm0x3A0x3AHermesValue0x3E0x3E0x28char0x2A0x2C0x20unsigned0x20long0x2C0x20unsigned0x20long0x2C0x20char0x20const0x2A0x2C0x20char0x20const0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #5 {
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i64, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i64, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  %24 = alloca i64, align 8
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store i32 %3, ptr %11, align 4, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #6
  store i64 0, ptr %15, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #6
  %25 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %25, ptr %16, align 4, !tbaa !9
  %26 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %26, ptr %17, align 4, !tbaa !9
  %27 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %27, ptr %18, align 4, !tbaa !9
  %28 = load i32, ptr %18, align 4, !tbaa !9
  %29 = load i32, ptr %17, align 4, !tbaa !9
  %30 = sub i32 %29, %28
  store i32 %30, ptr %17, align 4, !tbaa !9
  %31 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %31, ptr %18, align 4, !tbaa !9
  %32 = load i32, ptr %18, align 4, !tbaa !9
  %33 = icmp eq i32 %32, 0
  %34 = xor i1 %33, true
  %35 = xor i1 %34, true
  %36 = zext i1 %35 to i32
  %37 = sext i32 %36 to i64
  %38 = call i64 @llvm.expect.i64(i64 %37, i64 0)
  %39 = icmp ne i64 %38, 0
  br i1 %39, label %40, label %42

40:                                               ; preds = %7
  call void @wasm_rt_trap(i32 noundef 3) #7
  unreachable

41:                                               ; No predecessors!
  br label %46

42:                                               ; preds = %7
  %43 = load i32, ptr %17, align 4, !tbaa !9
  %44 = load i32, ptr %18, align 4, !tbaa !9
  %45 = urem i32 %43, %44
  br label %46

46:                                               ; preds = %42, %41
  %47 = phi i32 [ 0, %41 ], [ %45, %42 ]
  store i32 %47, ptr %17, align 4, !tbaa !9
  %48 = load i32, ptr %17, align 4, !tbaa !9
  %49 = load i32, ptr %16, align 4, !tbaa !9
  %50 = sub i32 %49, %48
  store i32 %50, ptr %16, align 4, !tbaa !9
  %51 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %51, ptr %13, align 4, !tbaa !9
  %52 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %52, ptr %17, align 4, !tbaa !9
  %53 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %53, ptr %18, align 4, !tbaa !9
  %54 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %54, ptr %19, align 4, !tbaa !9
  %55 = load i32, ptr %18, align 4, !tbaa !9
  %56 = load i32, ptr %19, align 4, !tbaa !9
  %57 = icmp ult i32 %55, %56
  %58 = zext i1 %57 to i32
  store i32 %58, ptr %18, align 4, !tbaa !9
  %59 = load i32, ptr %18, align 4, !tbaa !9
  %60 = icmp ne i32 %59, 0
  br i1 %60, label %61, label %63

61:                                               ; preds = %46
  %62 = load i32, ptr %16, align 4, !tbaa !9
  br label %65

63:                                               ; preds = %46
  %64 = load i32, ptr %17, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %63, %61
  %66 = phi i32 [ %62, %61 ], [ %64, %63 ]
  store i32 %66, ptr %16, align 4, !tbaa !9
  %67 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %67, ptr %13, align 4, !tbaa !9
  %68 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %68, ptr %17, align 4, !tbaa !9
  %69 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %69, ptr %18, align 4, !tbaa !9
  %70 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %70, ptr %19, align 4, !tbaa !9
  %71 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %71, ptr %20, align 4, !tbaa !9
  %72 = load i32, ptr %20, align 4, !tbaa !9
  %73 = load i32, ptr %19, align 4, !tbaa !9
  %74 = mul i32 %73, %72
  store i32 %74, ptr %19, align 4, !tbaa !9
  %75 = load i32, ptr %19, align 4, !tbaa !9
  %76 = load i32, ptr %18, align 4, !tbaa !9
  %77 = add i32 %76, %75
  store i32 %77, ptr %18, align 4, !tbaa !9
  %78 = load i32, ptr %18, align 4, !tbaa !9
  store i32 %78, ptr %10, align 4, !tbaa !9
  %79 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %79, ptr %19, align 4, !tbaa !9
  %80 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %80, ptr %20, align 4, !tbaa !9
  %81 = load i32, ptr %19, align 4, !tbaa !9
  %82 = load i32, ptr %20, align 4, !tbaa !9
  %83 = icmp ugt i32 %81, %82
  %84 = zext i1 %83 to i32
  store i32 %84, ptr %19, align 4, !tbaa !9
  %85 = load i32, ptr %19, align 4, !tbaa !9
  %86 = icmp ne i32 %85, 0
  br i1 %86, label %87, label %89

87:                                               ; preds = %65
  %88 = load i32, ptr %17, align 4, !tbaa !9
  br label %91

89:                                               ; preds = %65
  %90 = load i32, ptr %18, align 4, !tbaa !9
  br label %91

91:                                               ; preds = %89, %87
  %92 = phi i32 [ %88, %87 ], [ %90, %89 ]
  store i32 %92, ptr %17, align 4, !tbaa !9
  %93 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %93, ptr %10, align 4, !tbaa !9
  %94 = load i32, ptr %16, align 4, !tbaa !9
  %95 = load i32, ptr %17, align 4, !tbaa !9
  %96 = icmp ult i32 %94, %95
  %97 = zext i1 %96 to i32
  store i32 %97, ptr %16, align 4, !tbaa !9
  %98 = load i32, ptr %16, align 4, !tbaa !9
  %99 = icmp ne i32 %98, 0
  br i1 %99, label %100, label %203

100:                                              ; preds = %91
  br label %101

101:                                              ; preds = %201, %100
  %102 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %102, ptr %16, align 4, !tbaa !9
  %103 = load ptr, ptr %8, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.w2c_hermes, ptr %103, i32 0, i32 6
  %105 = load i32, ptr %16, align 4, !tbaa !9
  %106 = zext i32 %105 to i64
  %107 = call i64 @i64_load(ptr noundef %104, i64 noundef %106)
  store i64 %107, ptr %21, align 8, !tbaa !11
  %108 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %108, ptr %15, align 8, !tbaa !11
  store i64 -844424930131968, ptr %22, align 8, !tbaa !11
  %109 = load i64, ptr %21, align 8, !tbaa !11
  %110 = load i64, ptr %22, align 8, !tbaa !11
  %111 = icmp uge i64 %109, %110
  %112 = zext i1 %111 to i32
  store i32 %112, ptr %16, align 4, !tbaa !9
  %113 = load i32, ptr %16, align 4, !tbaa !9
  %114 = icmp ne i32 %113, 0
  br i1 %114, label %115, label %187

115:                                              ; preds = %101
  %116 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %116, ptr %16, align 4, !tbaa !9
  %117 = load ptr, ptr %8, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.w2c_hermes, ptr %117, i32 0, i32 6
  %119 = load i32, ptr %16, align 4, !tbaa !9
  %120 = zext i32 %119 to i64
  %121 = call i32 @i32_load(ptr noundef %118, i64 noundef %120)
  store i32 %121, ptr %16, align 4, !tbaa !9
  %122 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %122, ptr %14, align 4, !tbaa !9
  %123 = load i64, ptr %15, align 8, !tbaa !11
  store i64 %123, ptr %22, align 8, !tbaa !11
  %124 = load i64, ptr %22, align 8, !tbaa !11
  %125 = trunc i64 %124 to i32
  store i32 %125, ptr %17, align 4, !tbaa !9
  %126 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %126, ptr %18, align 4, !tbaa !9
  %127 = load ptr, ptr %8, align 8, !tbaa !5
  %128 = load i32, ptr %16, align 4, !tbaa !9
  %129 = load i32, ptr %17, align 4, !tbaa !9
  %130 = load i32, ptr %18, align 4, !tbaa !9
  %131 = call i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AEvacAcceptor0x3Ctrue0x3E0x3A0x3AacceptHeap0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x2A0x2C0x20void0x2A0x29(ptr noundef %127, i32 noundef %128, i32 noundef %129, i32 noundef %130)
  store i32 %131, ptr %16, align 4, !tbaa !9
  %132 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %132, ptr %11, align 4, !tbaa !9
  %133 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %133, ptr %16, align 4, !tbaa !9
  %134 = load ptr, ptr %8, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.w2c_hermes, ptr %134, i32 0, i32 6
  %136 = load i32, ptr %16, align 4, !tbaa !9
  %137 = zext i32 %136 to i64
  %138 = call i64 @i64_load(ptr noundef %135, i64 noundef %137)
  store i64 %138, ptr %21, align 8, !tbaa !11
  %139 = load i64, ptr %21, align 8, !tbaa !11
  store i64 %139, ptr %15, align 8, !tbaa !11
  store i64 -844424930131969, ptr %22, align 8, !tbaa !11
  %140 = load i64, ptr %21, align 8, !tbaa !11
  %141 = load i64, ptr %22, align 8, !tbaa !11
  %142 = icmp ule i64 %140, %141
  %143 = zext i1 %142 to i32
  store i32 %143, ptr %16, align 4, !tbaa !9
  %144 = load i32, ptr %16, align 4, !tbaa !9
  %145 = icmp ne i32 %144, 0
  br i1 %145, label %146, label %147

146:                                              ; preds = %115
  br label %204

147:                                              ; preds = %115
  %148 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %148, ptr %16, align 4, !tbaa !9
  %149 = load ptr, ptr %8, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.w2c_hermes, ptr %149, i32 0, i32 6
  %151 = load i32, ptr %16, align 4, !tbaa !9
  %152 = zext i32 %151 to i64
  %153 = add i64 %152, 12
  %154 = call i32 @i32_load(ptr noundef %150, i64 noundef %153)
  store i32 %154, ptr %16, align 4, !tbaa !9
  %155 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %155, ptr %14, align 4, !tbaa !9
  %156 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %156, ptr %16, align 4, !tbaa !9
  %157 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %157, ptr %17, align 4, !tbaa !9
  %158 = load i32, ptr %17, align 4, !tbaa !9
  %159 = zext i32 %158 to i64
  store i64 %159, ptr %22, align 8, !tbaa !11
  %160 = load i64, ptr %15, align 8, !tbaa !11
  store i64 %160, ptr %23, align 8, !tbaa !11
  store i64 -281474976710656, ptr %24, align 8, !tbaa !11
  %161 = load i64, ptr %24, align 8, !tbaa !11
  %162 = load i64, ptr %23, align 8, !tbaa !11
  %163 = and i64 %162, %161
  store i64 %163, ptr %23, align 8, !tbaa !11
  %164 = load i64, ptr %23, align 8, !tbaa !11
  %165 = load i64, ptr %22, align 8, !tbaa !11
  %166 = or i64 %165, %164
  store i64 %166, ptr %22, align 8, !tbaa !11
  %167 = load ptr, ptr %8, align 8, !tbaa !5
  %168 = getelementptr inbounds %struct.w2c_hermes, ptr %167, i32 0, i32 6
  %169 = load i32, ptr %16, align 4, !tbaa !9
  %170 = zext i32 %169 to i64
  %171 = load i64, ptr %22, align 8, !tbaa !11
  call void @i64_store(ptr noundef %168, i64 noundef %170, i64 noundef %171)
  %172 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %172, ptr %16, align 4, !tbaa !9
  %173 = load ptr, ptr %8, align 8, !tbaa !5
  %174 = getelementptr inbounds %struct.w2c_hermes, ptr %173, i32 0, i32 6
  %175 = load i32, ptr %16, align 4, !tbaa !9
  %176 = zext i32 %175 to i64
  %177 = add i64 %176, 117
  %178 = call i32 @i32_load8_u(ptr noundef %174, i64 noundef %177)
  store i32 %178, ptr %16, align 4, !tbaa !9
  %179 = load i32, ptr %16, align 4, !tbaa !9
  %180 = icmp ne i32 %179, 0
  %181 = xor i1 %180, true
  %182 = zext i1 %181 to i32
  store i32 %182, ptr %16, align 4, !tbaa !9
  %183 = load i32, ptr %16, align 4, !tbaa !9
  %184 = icmp ne i32 %183, 0
  br i1 %184, label %185, label %186

185:                                              ; preds = %147
  br label %222

186:                                              ; preds = %147
  br label %187

187:                                              ; preds = %186, %101
  %188 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %188, ptr %16, align 4, !tbaa !9
  %189 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %189, ptr %17, align 4, !tbaa !9
  %190 = load i32, ptr %17, align 4, !tbaa !9
  %191 = load i32, ptr %16, align 4, !tbaa !9
  %192 = add i32 %191, %190
  store i32 %192, ptr %16, align 4, !tbaa !9
  %193 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %193, ptr %13, align 4, !tbaa !9
  %194 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %194, ptr %17, align 4, !tbaa !9
  %195 = load i32, ptr %16, align 4, !tbaa !9
  %196 = load i32, ptr %17, align 4, !tbaa !9
  %197 = icmp ult i32 %195, %196
  %198 = zext i1 %197 to i32
  store i32 %198, ptr %16, align 4, !tbaa !9
  %199 = load i32, ptr %16, align 4, !tbaa !9
  %200 = icmp ne i32 %199, 0
  br i1 %200, label %201, label %202

201:                                              ; preds = %187
  br label %101

202:                                              ; preds = %187
  br label %203

203:                                              ; preds = %202, %91
  br label %240

204:                                              ; preds = %146
  store i32 0, ptr %16, align 4, !tbaa !9
  %205 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %205, ptr %13, align 4, !tbaa !9
  store i32 118273, ptr %17, align 4, !tbaa !9
  %206 = load i32, ptr %17, align 4, !tbaa !9
  %207 = load i32, ptr %16, align 4, !tbaa !9
  %208 = add i32 %207, %206
  store i32 %208, ptr %16, align 4, !tbaa !9
  %209 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %209, ptr %17, align 4, !tbaa !9
  store i32 83341, ptr %18, align 4, !tbaa !9
  %210 = load i32, ptr %18, align 4, !tbaa !9
  %211 = load i32, ptr %17, align 4, !tbaa !9
  %212 = add i32 %211, %210
  store i32 %212, ptr %17, align 4, !tbaa !9
  store i32 373, ptr %18, align 4, !tbaa !9
  %213 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %213, ptr %19, align 4, !tbaa !9
  store i32 49778, ptr %20, align 4, !tbaa !9
  %214 = load i32, ptr %20, align 4, !tbaa !9
  %215 = load i32, ptr %19, align 4, !tbaa !9
  %216 = add i32 %215, %214
  store i32 %216, ptr %19, align 4, !tbaa !9
  %217 = load ptr, ptr %8, align 8, !tbaa !5
  %218 = load i32, ptr %16, align 4, !tbaa !9
  %219 = load i32, ptr %17, align 4, !tbaa !9
  %220 = load i32, ptr %18, align 4, !tbaa !9
  %221 = load i32, ptr %19, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %217, i32 noundef %218, i32 noundef %219, i32 noundef %220, i32 noundef %221)
  call void @wasm_rt_trap(i32 noundef 5) #7
  unreachable

222:                                              ; preds = %185
  store i32 0, ptr %16, align 4, !tbaa !9
  %223 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %223, ptr %13, align 4, !tbaa !9
  store i32 119101, ptr %17, align 4, !tbaa !9
  %224 = load i32, ptr %17, align 4, !tbaa !9
  %225 = load i32, ptr %16, align 4, !tbaa !9
  %226 = add i32 %225, %224
  store i32 %226, ptr %16, align 4, !tbaa !9
  %227 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %227, ptr %17, align 4, !tbaa !9
  store i32 83995, ptr %18, align 4, !tbaa !9
  %228 = load i32, ptr %18, align 4, !tbaa !9
  %229 = load i32, ptr %17, align 4, !tbaa !9
  %230 = add i32 %229, %228
  store i32 %230, ptr %17, align 4, !tbaa !9
  store i32 22, ptr %18, align 4, !tbaa !9
  %231 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %231, ptr %19, align 4, !tbaa !9
  store i32 109806, ptr %20, align 4, !tbaa !9
  %232 = load i32, ptr %20, align 4, !tbaa !9
  %233 = load i32, ptr %19, align 4, !tbaa !9
  %234 = add i32 %233, %232
  store i32 %234, ptr %19, align 4, !tbaa !9
  %235 = load ptr, ptr %8, align 8, !tbaa !5
  %236 = load i32, ptr %16, align 4, !tbaa !9
  %237 = load i32, ptr %17, align 4, !tbaa !9
  %238 = load i32, ptr %18, align 4, !tbaa !9
  %239 = load i32, ptr %19, align 4, !tbaa !9
  call void @w2c_hermes_0x5F_assert_fail(ptr noundef %235, i32 noundef %236, i32 noundef %237, i32 noundef %238, i32 noundef %239)
  call void @wasm_rt_trap(i32 noundef 5) #7
  unreachable

240:                                              ; preds = %203
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #3 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load8_u(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @i32_load(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: noreturn
declare void @wasm_rt_trap(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @i64_store(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @i64_load(ptr noundef, i64 noundef) local_unnamed_addr #0

declare void @w2c_hermes_0x5F_assert_fail(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AEvacAcceptor0x3Ctrue0x3E0x3A0x3AacceptHeap0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x2A0x2C0x20void0x2A0x29(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @w2c_hermes_void0x20hermes0x3A0x3Avm0x3A0x3ASlotVisitor0x3Chermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AEvacAcceptor0x3Ctrue0x3E0x3E0x3A0x3AvisitArrayObjectWithinRange0x3Chermes0x3A0x3Avm0x3A0x3AGCHermesValueBase0x3Chermes0x3A0x3Avm0x3A0x3AHermesValue0x3E0x3E0x28char0x2A0x2C0x20unsigned0x20long0x2C0x20unsigned0x20long0x2C0x20char0x20const0x2A0x2C0x20char0x20const0x2A0x29(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #3 {
  %8 = icmp eq i32 %4, 0
  br i1 %8, label %9, label %10, !prof !5

9:                                                ; preds = %7
  tail call void @wasm_rt_trap(i32 noundef 3) #5
  unreachable

10:                                               ; preds = %7
  %11 = sub i32 %5, %2
  %12 = urem i32 %11, %4
  %13 = sub i32 %5, %12
  %14 = tail call i32 @llvm.umax.i32(i32 %13, i32 %2)
  %15 = mul i32 %4, %3
  %16 = add i32 %15, %2
  %17 = tail call i32 @llvm.umin.i32(i32 %16, i32 %6)
  %18 = icmp ult i32 %14, %17
  br i1 %18, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %10
  %19 = getelementptr inbounds i8, ptr %0, i64 40
  %20 = zext i32 %1 to i64
  br label %21

21:                                               ; preds = %.preheader, %41
  %.0 = phi i32 [ %42, %41 ], [ %14, %.preheader ]
  %22 = zext i32 %.0 to i64
  %23 = tail call i64 @i64_load(ptr noundef nonnull %19, i64 noundef %22)
  %24 = icmp ugt i64 %23, -844424930131969
  br i1 %24, label %25, label %41

25:                                               ; preds = %21
  %26 = tail call i32 @i32_load(ptr noundef nonnull %19, i64 noundef %20)
  %27 = trunc i64 %23 to i32
  %28 = tail call i32 @w2c_hermes_hermes0x3A0x3Avm0x3A0x3AHadesGC0x3A0x3AEvacAcceptor0x3Ctrue0x3E0x3A0x3AacceptHeap0x28hermes0x3A0x3Avm0x3A0x3AGCCell0x2A0x2C0x20void0x2A0x29(ptr noundef %0, i32 noundef %26, i32 noundef %27, i32 noundef %.0) #6
  %29 = tail call i64 @i64_load(ptr noundef nonnull %19, i64 noundef %22)
  %30 = icmp ult i64 %29, -844424930131968
  br i1 %30, label %44, label %31

31:                                               ; preds = %25
  %32 = zext i32 %26 to i64
  %33 = add nuw nsw i64 %32, 12
  %34 = tail call i32 @i32_load(ptr noundef nonnull %19, i64 noundef %33)
  %35 = zext i32 %28 to i64
  %36 = and i64 %29, -281474976710656
  %37 = or disjoint i64 %36, %35
  tail call void @i64_store(ptr noundef nonnull %19, i64 noundef %22, i64 noundef %37)
  %38 = zext i32 %34 to i64
  %39 = add nuw nsw i64 %38, 117
  %40 = tail call i32 @i32_load8_u(ptr noundef nonnull %19, i64 noundef %39)
  %.not = icmp eq i32 %40, 0
  br i1 %.not, label %45, label %41

41:                                               ; preds = %31, %21
  %42 = add i32 %.0, %4
  %43 = icmp ult i32 %42, %17
  br i1 %43, label %21, label %.loopexit

44:                                               ; preds = %25
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 118273, i32 noundef 83341, i32 noundef 373, i32 noundef 49778) #6
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

45:                                               ; preds = %31
  tail call void @w2c_hermes_0x5F_assert_fail(ptr noundef %0, i32 noundef 119101, i32 noundef 83995, i32 noundef 22, i32 noundef 109806) #6
  tail call void @wasm_rt_trap(i32 noundef 5) #5
  unreachable

.loopexit:                                        ; preds = %41, %10
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #4

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 1, i32 2000}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,LowerExpectIntrinsicPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass