; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code6ld_xorERK3RegN4Insn4TypeEj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Code7tempregEv(ptr noundef nonnull align 8 dereferenceable(200)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code6ld_xorERK3RegN4Insn4TypeEj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3) #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !11
  %12 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  %13 = call noundef zeroext i8 @_ZN4Code7tempregEv(ptr noundef nonnull align 8 dereferenceable(200) %12)
  store i8 %13, ptr %9, align 1, !tbaa !13
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %14)
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %4
  br label %98

18:                                               ; preds = %4
  %19 = load i32, ptr %8, align 4, !tbaa !11
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20)
  %22 = add nsw i32 %19, %21
  %23 = icmp sle i32 %22, 64
  br i1 %23, label %24, label %46

24:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !11
  br label %25

25:                                               ; preds = %42, %24
  %26 = load i32, ptr %10, align 4, !tbaa !11
  %27 = load ptr, ptr %6, align 8, !tbaa !5
  %28 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %27)
  %29 = icmp slt i32 %26, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %45

31:                                               ; preds = %25
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load i8, ptr %9, align 1, !tbaa !13
  %34 = load i32, ptr %8, align 4, !tbaa !11
  %35 = load i32, ptr %10, align 4, !tbaa !11
  %36 = add i32 %34, %35
  %37 = trunc i32 %36 to i8
  call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef %32, i8 noundef zeroext %33, i8 noundef zeroext %37)
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load i32, ptr %10, align 4, !tbaa !11
  %40 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %38, i32 noundef %39)
  %41 = load i8, ptr %9, align 1, !tbaa !13
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 19, i8 noundef zeroext %40, i8 noundef zeroext %41)
  br label %42

42:                                               ; preds = %31
  %43 = load i32, ptr %10, align 4, !tbaa !11
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %10, align 4, !tbaa !11
  br label %25, !llvm.loop !14

45:                                               ; preds = %30
  br label %97

46:                                               ; preds = %18
  %47 = load i32, ptr %7, align 4, !tbaa !9
  %48 = icmp eq i32 %47, 24
  br i1 %48, label %49, label %51

49:                                               ; preds = %46
  %50 = load i32, ptr %8, align 4, !tbaa !11
  call void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %12, i8 noundef zeroext 28, i32 noundef %50)
  br label %53

51:                                               ; preds = %46
  %52 = load i32, ptr %8, align 4, !tbaa !11
  call void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %12, i8 noundef zeroext 30, i32 noundef %52)
  br label %53

53:                                               ; preds = %51, %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !11
  br label %54

54:                                               ; preds = %68, %53
  %55 = load i32, ptr %11, align 4, !tbaa !11
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %56)
  %58 = sub nsw i32 %57, 1
  %59 = icmp slt i32 %55, %58
  br i1 %59, label %61, label %60

60:                                               ; preds = %54
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %71

61:                                               ; preds = %54
  %62 = load i32, ptr %7, align 4, !tbaa !9
  %63 = load i8, ptr %9, align 1, !tbaa !13
  call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef %62, i8 noundef zeroext %63, i8 noundef zeroext -1)
  %64 = load ptr, ptr %6, align 8, !tbaa !5
  %65 = load i32, ptr %11, align 4, !tbaa !11
  %66 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %64, i32 noundef %65)
  %67 = load i8, ptr %9, align 1, !tbaa !13
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 19, i8 noundef zeroext %66, i8 noundef zeroext %67)
  br label %68

68:                                               ; preds = %61
  %69 = load i32, ptr %11, align 4, !tbaa !11
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %11, align 4, !tbaa !11
  br label %54, !llvm.loop !16

71:                                               ; preds = %60
  %72 = load i32, ptr %7, align 4, !tbaa !9
  %73 = load i8, ptr %9, align 1, !tbaa !13
  call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef %72, i8 noundef zeroext %73, i8 noundef zeroext 0)
  %74 = load ptr, ptr %6, align 8, !tbaa !5
  %75 = load ptr, ptr %6, align 8, !tbaa !5
  %76 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %75)
  %77 = sub nsw i32 %76, 1
  %78 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %74, i32 noundef %77)
  %79 = load i8, ptr %9, align 1, !tbaa !13
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 19, i8 noundef zeroext %78, i8 noundef zeroext %79)
  %80 = load i32, ptr %7, align 4, !tbaa !9
  %81 = icmp eq i32 %80, 24
  br i1 %81, label %82, label %89

82:                                               ; preds = %71
  %83 = load i32, ptr %8, align 4, !tbaa !11
  %84 = load ptr, ptr %6, align 8, !tbaa !5
  %85 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %84)
  %86 = add i32 %83, %85
  %87 = sub i32 %86, 1
  %88 = sub i32 0, %87
  call void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %12, i8 noundef zeroext 28, i32 noundef %88)
  br label %96

89:                                               ; preds = %71
  %90 = load i32, ptr %8, align 4, !tbaa !11
  %91 = load ptr, ptr %6, align 8, !tbaa !5
  %92 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %91)
  %93 = add i32 %90, %92
  %94 = sub i32 %93, 1
  %95 = sub i32 0, %94
  call void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %12, i8 noundef zeroext 30, i32 noundef %95)
  br label %96

96:                                               ; preds = %89, %82
  br label %97

97:                                               ; preds = %96, %45
  br label %98

98:                                               ; preds = %97, %17
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN4Insn4TypeE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Code7tempregEv(ptr noundef nonnull align 8 dereferenceable(200)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code6ld_xorERK3RegN4Insn4TypeEj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 align 2 {
  %5 = tail call noundef zeroext i8 @_ZN4Code7tempregEv(ptr noundef nonnull align 8 dereferenceable(200) %0)
  %6 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %7 = icmp eq i32 %6, 0
  br i1 %7, label %.loopexit, label %8

8:                                                ; preds = %4
  %9 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %10 = add nsw i32 %9, %3
  %11 = icmp slt i32 %10, 65
  br i1 %11, label %.preheader, label %20

.preheader:                                       ; preds = %8
  %12 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %13 = icmp sgt i32 %12, 0
  br i1 %13, label %.lr.ph41, label %.loopexit

.lr.ph41:                                         ; preds = %.preheader, %.lr.ph41
  %.03440 = phi i32 [ %17, %.lr.ph41 ], [ 0, %.preheader ]
  %14 = add i32 %.03440, %3
  %15 = trunc i32 %14 to i8
  tail call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %2, i8 noundef zeroext %5, i8 noundef zeroext %15)
  %16 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.03440)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 19, i8 noundef zeroext %16, i8 noundef zeroext %5)
  %17 = add nuw nsw i32 %.03440, 1
  %18 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %19 = icmp slt i32 %17, %18
  br i1 %19, label %.lr.ph41, label %.loopexit, !llvm.loop !5

20:                                               ; preds = %8
  %21 = icmp eq i32 %2, 24
  %. = select i1 %21, i8 28, i8 30
  tail call void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %., i32 noundef %3)
  %22 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %23 = icmp sgt i32 %22, 1
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %20
  tail call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %2, i8 noundef zeroext %5, i8 noundef zeroext 0)
  %24 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %25 = add nsw i32 %24, -1
  %26 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %25)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 19, i8 noundef zeroext %26, i8 noundef zeroext %5)
  %27 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %28 = add i32 %27, %3
  %29 = sub i32 1, %28
  %.43 = select i1 %21, i8 28, i8 30
  tail call void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %.43, i32 noundef %29)
  br label %.loopexit

.lr.ph:                                           ; preds = %20, %.lr.ph
  %.039 = phi i32 [ %31, %.lr.ph ], [ 0, %20 ]
  tail call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %2, i8 noundef zeroext %5, i8 noundef zeroext -1)
  %30 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.039)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 19, i8 noundef zeroext %30, i8 noundef zeroext %5)
  %31 = add nuw nsw i32 %.039, 1
  %32 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %33 = add nsw i32 %32, -1
  %34 = icmp slt i32 %31, %33
  br i1 %34, label %.lr.ph, label %._crit_edge, !llvm.loop !7

.loopexit:                                        ; preds = %.lr.ph41, %._crit_edge, %.preheader, %4
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass