; LLVM IR from ARM-software/Arm-2D :: Helper/Source (arm_2d_helper_pfb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_region_list_item_t = type { ptr, %struct.anon.6, %struct.arm_2d_region_t, %struct.anon.7 }
%struct.anon.6 = type { ptr }
%struct.arm_2d_region_t = type { %union.anon, %union.anon.0 }
%union.anon = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.0 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%struct.anon.7 = type { i8, i8, i16 }

@.str.1 = external hidden unnamed_addr constant [87 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1
@__PRETTY_FUNCTION__.arm_2d_dynamic_dirty_region_change_user_region_index_only = external hidden unnamed_addr constant [101 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @arm_2d_dynamic_dirty_region_change_user_region_index_only(ptr noundef nonnull %0, i8 noundef zeroext %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i8 %1, ptr %4, align 1, !tbaa !9
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = icmp eq ptr null, %5
  br i1 %6, label %7, label %8

7:                                                ; preds = %2
  call void @__assert_fail(ptr noundef @.str.4, ptr noundef @.str.1, i32 noundef 4241, ptr noundef @__PRETTY_FUNCTION__.arm_2d_dynamic_dirty_region_change_user_region_index_only) #2
  unreachable

8:                                                ; preds = %2
  %9 = load i8, ptr %4, align 1, !tbaa !9
  %10 = zext i8 %9 to i32
  %11 = icmp eq i32 255, %10
  br i1 %11, label %12, label %16

12:                                               ; preds = %8
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.arm_2d_region_list_item_t, ptr %13, i32 0, i32 3
  %15 = getelementptr inbounds %struct.anon.7, ptr %14, i32 0, i32 0
  store i8 0, ptr %15, align 8, !tbaa !10
  br label %21

16:                                               ; preds = %8
  %17 = load i8, ptr %4, align 1, !tbaa !9
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.arm_2d_region_list_item_t, ptr %18, i32 0, i32 3
  %20 = getelementptr inbounds %struct.anon.7, ptr %19, i32 0, i32 0
  store i8 %17, ptr %20, align 8, !tbaa !10
  br label %21

21:                                               ; preds = %16, %12
  ret void
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !7, i64 24}
!11 = !{!"arm_2d_region_list_item_t", !6, i64 0, !12, i64 8, !13, i64 16, !14, i64 24}
!12 = !{!"", !6, i64 0}
!13 = !{!"arm_2d_region_t", !7, i64 0, !7, i64 4}
!14 = !{!"", !7, i64 0, !7, i64 1, !7, i64 1, !15, i64 2, !15, i64 2, !15, i64 2, !15, i64 2}
!15 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @arm_2d_dynamic_dirty_region_change_user_region_index_only(ptr nocapture noundef nonnull writeonly %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = icmp eq i8 %1, -1
  %spec.select = select i1 %3, i8 0, i8 %1
  %4 = getelementptr inbounds i8, ptr %0, i64 24
  store i8 %spec.select, ptr %4, align 8
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass