; LLVM IR from tastangh/TI-RSLK-Texas-Instruments-Robotics-System-The-Maze-Edition :: tirslk_maze_1_00_00/Flash (FlashTestMain)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@longtermtest.addr = external hidden global i32, align 4
@longtermtest.data = external hidden global i32, align 4
@longtermtest.errors = external hidden global i32, align 4
@longtermtest.runs = external hidden global i32, align 4
@.str.3 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [12 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @UART0_OutString(ptr noundef) #1

declare void @UART0_OutChar(i8 noundef signext) #1

declare void @UART0_OutUDec(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @longtermtest() #2 {
  %1 = alloca ptr, align 8
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  %3 = load i32, ptr @longtermtest.addr, align 4, !tbaa !5
  %4 = load i32, ptr @longtermtest.data, align 4, !tbaa !5
  %5 = call i32 @Flash_Write(i32 noundef %3, i32 noundef %4)
  %6 = load i32, ptr @longtermtest.addr, align 4, !tbaa !5
  %7 = add i32 %6, 4
  store i32 %7, ptr @longtermtest.addr, align 4, !tbaa !5
  %8 = load i32, ptr @longtermtest.data, align 4, !tbaa !5
  %9 = sub i32 %8, 1
  store i32 %9, ptr @longtermtest.data, align 4, !tbaa !5
  %10 = load i32, ptr @longtermtest.addr, align 4, !tbaa !5
  %11 = icmp ugt i32 %10, 262140
  br i1 %11, label %12, label %47

12:                                               ; preds = %0
  %13 = load i32, ptr @longtermtest.runs, align 4, !tbaa !5
  %14 = add i32 %13, 1
  store i32 %14, ptr @longtermtest.runs, align 4, !tbaa !5
  call void @UART0_OutString(ptr noundef @.str.3)
  %15 = load i32, ptr @longtermtest.runs, align 4, !tbaa !5
  call void @UART0_OutUDec(i32 noundef %15)
  call void @UART0_OutString(ptr noundef @.str.4)
  store ptr inttoptr (i64 131072 to ptr), ptr %1, align 8, !tbaa !9
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %30, %12
  %17 = load ptr, ptr %1, align 8, !tbaa !9
  %18 = icmp ule ptr %17, inttoptr (i64 262140 to ptr)
  br i1 %18, label %19, label %35

19:                                               ; preds = %16
  %20 = load ptr, ptr %1, align 8, !tbaa !9
  %21 = load volatile i32, ptr %20, align 4, !tbaa !5
  %22 = load i32, ptr @longtermtest.data, align 4, !tbaa !5
  %23 = add i32 %22, 32768
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = sub i32 %23, %24
  %26 = icmp ne i32 %21, %25
  br i1 %26, label %27, label %30

27:                                               ; preds = %19
  %28 = load i32, ptr @longtermtest.errors, align 4, !tbaa !5
  %29 = add i32 %28, 1
  store i32 %29, ptr @longtermtest.errors, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %27, %19
  %31 = load ptr, ptr %1, align 8, !tbaa !9
  %32 = getelementptr inbounds i32, ptr %31, i64 1
  store ptr %32, ptr %1, align 8, !tbaa !9
  %33 = load i32, ptr %2, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %2, align 4, !tbaa !5
  br label %16, !llvm.loop !11

35:                                               ; preds = %16
  %36 = load i32, ptr @longtermtest.errors, align 4, !tbaa !5
  call void @UART0_OutUDec(i32 noundef %36)
  call void @UART0_OutString(ptr noundef @.str.5)
  store i32 131072, ptr @longtermtest.addr, align 4, !tbaa !5
  call void @UART0_OutString(ptr noundef @.str.6)
  call void @UART0_OutUHex(i32 noundef 131072)
  call void @UART0_OutString(ptr noundef @.str.7)
  call void @UART0_OutUHex(i32 noundef 262140)
  call void @UART0_OutChar(i8 noundef signext 13)
  call void @UART0_OutChar(i8 noundef signext 10)
  store i32 131072, ptr %2, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %43, %35
  %38 = load i32, ptr %2, align 4, !tbaa !5
  %39 = icmp slt i32 %38, 262140
  br i1 %39, label %40, label %46

40:                                               ; preds = %37
  %41 = load i32, ptr %2, align 4, !tbaa !5
  %42 = call i32 @Flash_Erase(i32 noundef %41)
  br label %43

43:                                               ; preds = %40
  %44 = load i32, ptr %2, align 4, !tbaa !5
  %45 = add nsw i32 %44, 4096
  store i32 %45, ptr %2, align 4, !tbaa !5
  br label %37, !llvm.loop !13

46:                                               ; preds = %37
  br label %47

47:                                               ; preds = %46, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #3
  ret void
}

declare i32 @Flash_Write(i32 noundef, i32 noundef) #1

declare void @UART0_OutUHex(i32 noundef) #1

declare i32 @Flash_Erase(i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@longtermtest.addr = external hidden local_unnamed_addr global i32, align 4
@longtermtest.data = external hidden local_unnamed_addr global i32, align 4
@longtermtest.errors = external hidden local_unnamed_addr global i32, align 4
@longtermtest.runs = external hidden local_unnamed_addr global i32, align 4
@.str.3 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [11 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [12 x i8], align 1

declare void @UART0_OutString(ptr noundef) local_unnamed_addr #0

declare void @UART0_OutChar(i8 noundef signext) local_unnamed_addr #0

declare void @UART0_OutUDec(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @longtermtest() local_unnamed_addr #1 {
  %1 = load i32, ptr @longtermtest.addr, align 4, !tbaa !5
  %2 = load i32, ptr @longtermtest.data, align 4, !tbaa !5
  %3 = tail call i32 @Flash_Write(i32 noundef %1, i32 noundef %2) #2
  %4 = load i32, ptr @longtermtest.addr, align 4, !tbaa !5
  %5 = add i32 %4, 4
  store i32 %5, ptr @longtermtest.addr, align 4, !tbaa !5
  %6 = load i32, ptr @longtermtest.data, align 4, !tbaa !5
  %7 = add i32 %6, -1
  store i32 %7, ptr @longtermtest.data, align 4, !tbaa !5
  %8 = icmp ugt i32 %5, 262140
  br i1 %8, label %9, label %.loopexit

9:                                                ; preds = %0
  %10 = load i32, ptr @longtermtest.runs, align 4, !tbaa !5
  %11 = add i32 %10, 1
  store i32 %11, ptr @longtermtest.runs, align 4, !tbaa !5
  tail call void @UART0_OutString(ptr noundef nonnull @.str.3) #2
  %12 = load i32, ptr @longtermtest.runs, align 4, !tbaa !5
  tail call void @UART0_OutUDec(i32 noundef %12) #2
  tail call void @UART0_OutString(ptr noundef nonnull @.str.4) #2
  %13 = load i32, ptr @longtermtest.data, align 4, !tbaa !5
  %longtermtest.errors.promoted = load i32, ptr @longtermtest.errors, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %9, %20
  %.010 = phi i32 [ 0, %9 ], [ %23, %20 ]
  %.079 = phi ptr [ inttoptr (i64 131072 to ptr), %9 ], [ %22, %20 ]
  %15 = phi i32 [ %longtermtest.errors.promoted, %9 ], [ %21, %20 ]
  %16 = load volatile i32, ptr %.079, align 4, !tbaa !5
  %reass.sub = sub i32 %13, %.010
  %17 = add i32 %reass.sub, 32768
  %.not8 = icmp eq i32 %16, %17
  br i1 %.not8, label %20, label %18

18:                                               ; preds = %14
  %19 = add i32 %15, 1
  store i32 %19, ptr @longtermtest.errors, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %18, %14
  %21 = phi i32 [ %19, %18 ], [ %15, %14 ]
  %22 = getelementptr inbounds i8, ptr %.079, i64 4
  %23 = add nuw nsw i32 %.010, 1
  %.not = icmp ugt ptr %22, inttoptr (i64 262140 to ptr)
  br i1 %.not, label %.loopexit.loopexit, label %14, !llvm.loop !9

.loopexit.loopexit:                               ; preds = %20
  tail call void @UART0_OutUDec(i32 noundef %21) #2
  tail call void @UART0_OutString(ptr noundef nonnull @.str.5) #2
  store i32 131072, ptr @longtermtest.addr, align 4, !tbaa !5
  tail call void @UART0_OutString(ptr noundef nonnull @.str.6) #2
  tail call void @UART0_OutUHex(i32 noundef 131072) #2
  tail call void @UART0_OutString(ptr noundef nonnull @.str.7) #2
  tail call void @UART0_OutUHex(i32 noundef 262140) #2
  tail call void @UART0_OutChar(i8 noundef signext 13) #2
  tail call void @UART0_OutChar(i8 noundef signext 10) #2
  %24 = tail call i32 @Flash_Erase(i32 noundef 131072) #2
  %25 = tail call i32 @Flash_Erase(i32 noundef 135168) #2
  %26 = tail call i32 @Flash_Erase(i32 noundef 139264) #2
  %27 = tail call i32 @Flash_Erase(i32 noundef 143360) #2
  %28 = tail call i32 @Flash_Erase(i32 noundef 147456) #2
  %29 = tail call i32 @Flash_Erase(i32 noundef 151552) #2
  %30 = tail call i32 @Flash_Erase(i32 noundef 155648) #2
  %31 = tail call i32 @Flash_Erase(i32 noundef 159744) #2
  %32 = tail call i32 @Flash_Erase(i32 noundef 163840) #2
  %33 = tail call i32 @Flash_Erase(i32 noundef 167936) #2
  %34 = tail call i32 @Flash_Erase(i32 noundef 172032) #2
  %35 = tail call i32 @Flash_Erase(i32 noundef 176128) #2
  %36 = tail call i32 @Flash_Erase(i32 noundef 180224) #2
  %37 = tail call i32 @Flash_Erase(i32 noundef 184320) #2
  %38 = tail call i32 @Flash_Erase(i32 noundef 188416) #2
  %39 = tail call i32 @Flash_Erase(i32 noundef 192512) #2
  %40 = tail call i32 @Flash_Erase(i32 noundef 196608) #2
  %41 = tail call i32 @Flash_Erase(i32 noundef 200704) #2
  %42 = tail call i32 @Flash_Erase(i32 noundef 204800) #2
  %43 = tail call i32 @Flash_Erase(i32 noundef 208896) #2
  %44 = tail call i32 @Flash_Erase(i32 noundef 212992) #2
  %45 = tail call i32 @Flash_Erase(i32 noundef 217088) #2
  %46 = tail call i32 @Flash_Erase(i32 noundef 221184) #2
  %47 = tail call i32 @Flash_Erase(i32 noundef 225280) #2
  %48 = tail call i32 @Flash_Erase(i32 noundef 229376) #2
  %49 = tail call i32 @Flash_Erase(i32 noundef 233472) #2
  %50 = tail call i32 @Flash_Erase(i32 noundef 237568) #2
  %51 = tail call i32 @Flash_Erase(i32 noundef 241664) #2
  %52 = tail call i32 @Flash_Erase(i32 noundef 245760) #2
  %53 = tail call i32 @Flash_Erase(i32 noundef 249856) #2
  %54 = tail call i32 @Flash_Erase(i32 noundef 253952) #2
  %55 = tail call i32 @Flash_Erase(i32 noundef 258048) #2
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %0
  ret void
}

declare i32 @Flash_Write(i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @UART0_OutUHex(i32 noundef) local_unnamed_addr #0

declare i32 @Flash_Erase(i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass