; LLVM IR from ARM-software/Arm-2D :: Helper/Source/arm_2d_helper.ll_ (arm_2d_helper_time_cos_slider)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [17 x i8], align 1
@__PRETTY_FUNCTION__.__arm_2d_helper_time_cos_slider = external hidden unnamed_addr constant [94 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

declare i64 @arm_2d_helper_get_system_timestamp() #2

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @__arm_2d_helper_time_cos_slider(i32 noundef %0, i32 noundef %1, i64 noundef %2, float noundef %3, ptr noundef nonnull %4, ptr noundef nonnull %5) #3 {
  %7 = alloca i1, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca float, align 4
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca i32, align 4
  %16 = alloca i64, align 8
  %17 = alloca i32, align 4
  %18 = alloca float, align 4
  %19 = alloca float, align 4
  store i32 %0, ptr %8, align 4, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !5
  store i64 %2, ptr %10, align 8, !tbaa !9
  store float %3, ptr %11, align 4, !tbaa !11
  store ptr %4, ptr %12, align 8, !tbaa !13
  store ptr %5, ptr %13, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %20 = call i64 @arm_2d_helper_get_system_timestamp()
  store i64 %20, ptr %14, align 8, !tbaa !9
  %21 = load ptr, ptr %13, align 8, !tbaa !13
  %22 = icmp ne ptr null, %21
  br i1 %22, label %23, label %24

23:                                               ; preds = %6
  br label %25

24:                                               ; preds = %6
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 296, ptr noundef @__PRETTY_FUNCTION__.__arm_2d_helper_time_cos_slider) #5
  unreachable

25:                                               ; preds = %23
  %26 = load ptr, ptr %12, align 8, !tbaa !13
  %27 = icmp ne ptr null, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %25
  br label %30

29:                                               ; preds = %25
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 297, ptr noundef @__PRETTY_FUNCTION__.__arm_2d_helper_time_cos_slider) #5
  unreachable

30:                                               ; preds = %28
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = icmp eq i32 %31, %32
  br i1 %33, label %34, label %37

34:                                               ; preds = %30
  %35 = load i32, ptr %9, align 4, !tbaa !5
  %36 = load ptr, ptr %12, align 8, !tbaa !13
  store i32 %35, ptr %36, align 4, !tbaa !5
  store i1 true, ptr %7, align 1
  store i32 1, ptr %15, align 4
  br label %106

37:                                               ; preds = %30
  %38 = load ptr, ptr %13, align 8, !tbaa !13
  %39 = load i64, ptr %38, align 8, !tbaa !9
  %40 = icmp eq i64 0, %39
  br i1 %40, label %41, label %44

41:                                               ; preds = %37
  %42 = load i64, ptr %14, align 8, !tbaa !9
  %43 = load ptr, ptr %13, align 8, !tbaa !13
  store i64 %42, ptr %43, align 8, !tbaa !9
  br label %44

44:                                               ; preds = %41, %37
  br label %45

45:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  %46 = load i64, ptr %14, align 8, !tbaa !9
  %47 = load ptr, ptr %13, align 8, !tbaa !13
  %48 = load i64, ptr %47, align 8, !tbaa !9
  %49 = sub nsw i64 %46, %48
  store i64 %49, ptr %16, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !5
  %50 = load i64, ptr %16, align 8, !tbaa !9
  %51 = load i64, ptr %10, align 8, !tbaa !9
  %52 = icmp slt i64 %50, %51
  br i1 %52, label %53, label %78

53:                                               ; preds = %45
  %54 = load i32, ptr %9, align 4, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = sub nsw i32 %54, %55
  store i32 %56, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %57 = load i64, ptr %16, align 8, !tbaa !9
  %58 = sitofp i64 %57 to float
  %59 = load i64, ptr %10, align 8, !tbaa !9
  %60 = sitofp i64 %59 to float
  %61 = fdiv float %58, %60
  %62 = fmul float %61, 0x401921FB40000000
  store float %62, ptr %18, align 4, !tbaa !11
  %63 = load float, ptr %18, align 4, !tbaa !11
  %64 = load float, ptr %11, align 4, !tbaa !11
  %65 = fadd float %63, %64
  %66 = call float @arm_cos_f32(float noundef %65)
  %67 = fsub float 0x3FF00068E0000000, %66
  %68 = load i32, ptr %17, align 4, !tbaa !5
  %69 = sitofp i32 %68 to float
  %70 = fmul float %67, %69
  %71 = fptosi float %70 to i32
  store i32 %71, ptr %17, align 4, !tbaa !5
  %72 = load i32, ptr %17, align 4, !tbaa !5
  %73 = ashr i32 %72, 1
  store i32 %73, ptr %17, align 4, !tbaa !5
  %74 = load i32, ptr %8, align 4, !tbaa !5
  %75 = load i32, ptr %17, align 4, !tbaa !5
  %76 = add nsw i32 %74, %75
  %77 = load ptr, ptr %12, align 8, !tbaa !13
  store i32 %76, ptr %77, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  br label %99

78:                                               ; preds = %45
  %79 = load i32, ptr %9, align 4, !tbaa !5
  %80 = load i32, ptr %8, align 4, !tbaa !5
  %81 = sub nsw i32 %79, %80
  store i32 %81, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store float 0x401921FB40000000, ptr %19, align 4, !tbaa !11
  %82 = load float, ptr %19, align 4, !tbaa !11
  %83 = load float, ptr %11, align 4, !tbaa !11
  %84 = fadd float %82, %83
  %85 = call float @arm_cos_f32(float noundef %84)
  %86 = fsub float 0x3FF00068E0000000, %85
  %87 = load i32, ptr %17, align 4, !tbaa !5
  %88 = sitofp i32 %87 to float
  %89 = fmul float %86, %88
  %90 = fptosi float %89 to i32
  store i32 %90, ptr %17, align 4, !tbaa !5
  %91 = load i32, ptr %17, align 4, !tbaa !5
  %92 = ashr i32 %91, 1
  store i32 %92, ptr %17, align 4, !tbaa !5
  %93 = load i32, ptr %8, align 4, !tbaa !5
  %94 = load i32, ptr %17, align 4, !tbaa !5
  %95 = add nsw i32 %93, %94
  %96 = load ptr, ptr %12, align 8, !tbaa !13
  store i32 %95, ptr %96, align 4, !tbaa !5
  %97 = load i64, ptr %14, align 8, !tbaa !9
  %98 = load ptr, ptr %13, align 8, !tbaa !13
  store i64 %97, ptr %98, align 8, !tbaa !9
  store i1 true, ptr %7, align 1
  store i32 1, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  br label %100

99:                                               ; preds = %53
  store i32 0, ptr %15, align 4
  br label %100

100:                                              ; preds = %99, %78
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  %101 = load i32, ptr %15, align 4
  switch i32 %101, label %106 [
    i32 0, label %102
  ]

102:                                              ; preds = %100
  br label %103

103:                                              ; preds = %102
  br label %104

104:                                              ; preds = %103
  br label %105

105:                                              ; preds = %104
  store i1 false, ptr %7, align 1
  store i32 1, ptr %15, align 4
  br label %106

106:                                              ; preds = %105, %100, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  %107 = load i1, ptr %7, align 1
  ret i1 %107
}

declare float @arm_cos_f32(float noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i64 @arm_2d_helper_get_system_timestamp() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @__arm_2d_helper_time_cos_slider(i32 noundef %0, i32 noundef %1, i64 noundef %2, float noundef %3, ptr nocapture noundef nonnull writeonly %4, ptr nocapture noundef nonnull %5) local_unnamed_addr #1 {
  %7 = tail call i64 @arm_2d_helper_get_system_timestamp() #2
  %8 = icmp eq i32 %0, %1
  br i1 %8, label %9, label %10

9:                                                ; preds = %6
  store i32 %0, ptr %4, align 4, !tbaa !5
  br label %40

10:                                               ; preds = %6
  %11 = load i64, ptr %5, align 8, !tbaa !9
  %12 = icmp eq i64 %11, 0
  br i1 %12, label %13, label %14

13:                                               ; preds = %10
  store i64 %7, ptr %5, align 8, !tbaa !9
  br label %14

14:                                               ; preds = %10, %13
  %15 = phi i64 [ %11, %10 ], [ %7, %13 ]
  %16 = sub nsw i64 %7, %15
  %.not = icmp slt i64 %16, %2
  %17 = sub nsw i32 %1, %0
  br i1 %.not, label %18, label %31

18:                                               ; preds = %14
  %19 = sitofp i64 %16 to float
  %20 = sitofp i64 %2 to float
  %21 = fdiv float %19, %20
  %22 = fmul float %21, 0x401921FB40000000
  %23 = fadd float %22, %3
  %24 = tail call float @arm_cos_f32(float noundef %23) #2
  %25 = fsub float 0x3FF00068E0000000, %24
  %26 = sitofp i32 %17 to float
  %27 = fmul float %25, %26
  %28 = fptosi float %27 to i32
  %29 = ashr i32 %28, 1
  %30 = add nsw i32 %29, %0
  store i32 %30, ptr %4, align 4, !tbaa !5
  br label %40

31:                                               ; preds = %14
  %32 = fadd float %3, 0x401921FB40000000
  %33 = tail call float @arm_cos_f32(float noundef %32) #2
  %34 = fsub float 0x3FF00068E0000000, %33
  %35 = sitofp i32 %17 to float
  %36 = fmul float %34, %35
  %37 = fptosi float %36 to i32
  %38 = ashr i32 %37, 1
  %39 = add nsw i32 %38, %0
  store i32 %39, ptr %4, align 4, !tbaa !5
  store i64 %7, ptr %5, align 8, !tbaa !9
  br label %40

40:                                               ; preds = %31, %18, %9
  %.1 = phi i1 [ true, %9 ], [ false, %18 ], [ true, %31 ]
  ret i1 %.1
}

declare float @arm_cos_f32(float noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}


; Effective O3 passes: ConstraintEliminationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass