; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN3RegC2ERKS_hh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3RegC2ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i8 noundef zeroext %2, i8 noundef zeroext %3) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i8 %2, ptr %7, align 1, !tbaa !9
  store i8 %3, ptr %8, align 1, !tbaa !9
  %11 = load ptr, ptr %5, align 8
  %12 = getelementptr inbounds %class.Reg, ptr %11, i32 0, i32 0
  call void @_ZNSt6vectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #2
  %13 = load i8, ptr %7, align 1, !tbaa !9
  %14 = zext i8 %13 to i32
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = invoke noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15)
          to label %17 unwind label %20

17:                                               ; preds = %4
  %18 = icmp sge i32 %14, %16
  br i1 %18, label %19, label %24

19:                                               ; preds = %17
  br label %73

20:                                               ; preds = %54, %43, %36, %28, %4
  %21 = landingpad { ptr, i32 }
          cleanup
  %22 = extractvalue { ptr, i32 } %21, 0
  store ptr %22, ptr %9, align 8
  %23 = extractvalue { ptr, i32 } %21, 1
  store i32 %23, ptr %10, align 4
  call void @_ZNSt6vectorIhSaIhEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #2
  br label %74

24:                                               ; preds = %17
  %25 = load i8, ptr %8, align 1, !tbaa !9
  %26 = zext i8 %25 to i32
  %27 = icmp eq i32 %26, 255
  br i1 %27, label %28, label %36

28:                                               ; preds = %24
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = invoke noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %29)
          to label %31 unwind label %20

31:                                               ; preds = %28
  %32 = load i8, ptr %7, align 1, !tbaa !9
  %33 = zext i8 %32 to i32
  %34 = sub nsw i32 %30, %33
  %35 = trunc i32 %34 to i8
  store i8 %35, ptr %8, align 1, !tbaa !9
  br label %49

36:                                               ; preds = %24
  %37 = load i8, ptr %8, align 1, !tbaa !9
  %38 = zext i8 %37 to i32
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = invoke noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %39)
          to label %41 unwind label %20

41:                                               ; preds = %36
  %42 = icmp sge i32 %38, %40
  br i1 %42, label %43, label %48

43:                                               ; preds = %41
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = invoke noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %44)
          to label %46 unwind label %20

46:                                               ; preds = %43
  %47 = trunc i32 %45 to i8
  store i8 %47, ptr %8, align 1, !tbaa !9
  br label %48

48:                                               ; preds = %46, %41
  br label %49

49:                                               ; preds = %48, %31
  br label %50

50:                                               ; preds = %61, %49
  %51 = load i8, ptr %8, align 1, !tbaa !9
  %52 = zext i8 %51 to i32
  %53 = icmp sgt i32 %52, 0
  br i1 %53, label %54, label %73

54:                                               ; preds = %50
  %55 = getelementptr inbounds %class.Reg, ptr %11, i32 0, i32 0
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %class.Reg, ptr %56, i32 0, i32 0
  %58 = load i8, ptr %7, align 1, !tbaa !9
  %59 = zext i8 %58 to i64
  %60 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #2
  invoke void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %55, ptr noundef nonnull align 1 dereferenceable(1) %60)
          to label %61 unwind label %20

61:                                               ; preds = %54
  %62 = load i8, ptr %7, align 1, !tbaa !9
  %63 = zext i8 %62 to i32
  %64 = add nsw i32 %63, 1
  %65 = sext i32 %64 to i64
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = getelementptr inbounds %class.Reg, ptr %66, i32 0, i32 0
  %68 = call noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %67) #2
  %69 = urem i64 %65, %68
  %70 = trunc i64 %69 to i8
  store i8 %70, ptr %7, align 1, !tbaa !9
  %71 = load i8, ptr %8, align 1, !tbaa !9
  %72 = add i8 %71, -1
  store i8 %72, ptr %8, align 1, !tbaa !9
  br label %50, !llvm.loop !10

73:                                               ; preds = %50, %19
  ret void

74:                                               ; preds = %20
  %75 = load ptr, ptr %9, align 8
  %76 = load i32, ptr %10, align 4
  %77 = insertvalue { ptr, i32 } poison, ptr %75, 0
  %78 = insertvalue { ptr, i32 } %77, i32 %76, 1
  resume { ptr, i32 } %78
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3RegC2ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i8 noundef zeroext %2, i8 noundef zeroext %3) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  tail call void @_ZNSt6vectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %5 = zext i8 %2 to i32
  %6 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %.not = icmp sgt i32 %6, %5
  br i1 %.not, label %9, label %.loopexit

7:                                                ; preds = %.lr.ph
  %8 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZNSt6vectorIhSaIhEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  resume { ptr, i32 } %8

9:                                                ; preds = %4
  %10 = icmp eq i8 %3, -1
  br i1 %10, label %11, label %15

11:                                               ; preds = %9
  %12 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %13 = trunc i32 %12 to i8
  %14 = sub i8 %13, %2
  br label %21

15:                                               ; preds = %9
  %16 = zext i8 %3 to i32
  %17 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %.not19 = icmp sgt i32 %17, %16
  br i1 %.not19, label %21, label %18

18:                                               ; preds = %15
  %19 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %20 = trunc i32 %19 to i8
  br label %21

21:                                               ; preds = %15, %18, %11
  %.016 = phi i8 [ %14, %11 ], [ %20, %18 ], [ %3, %15 ]
  %.not2021 = icmp eq i8 %.016, 0
  br i1 %.not2021, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %21, %24
  %.023 = phi i8 [ %28, %24 ], [ %2, %21 ]
  %.122 = phi i8 [ %29, %24 ], [ %.016, %21 ]
  %22 = zext i8 %.023 to i64
  %23 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %22) #2
  invoke void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 1 dereferenceable(1) %23)
          to label %24 unwind label %7

24:                                               ; preds = %.lr.ph
  %25 = add nuw nsw i64 %22, 1
  %26 = tail call noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #2
  %27 = urem i64 %25, %26
  %28 = trunc i64 %27 to i8
  %29 = add i8 %.122, -1
  %.not20 = icmp eq i8 %29, 0
  br i1 %.not20, label %.loopexit, label %.lr.ph, !llvm.loop !5

.loopexit:                                        ; preds = %24, %21, %4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backERKh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass