; LLVM IR from EdoPro98/SimSiPM :: src/SiPMSensor.ll (ZNK4sipm10SiPMSensor11hitGaussianEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.sipm::pair" = type { i32, i32 }
%"class.sipm::SiPMSensor" = type { %"class.sipm::SiPMProperties", [56 x i8], %"class.sipm::SiPMRandom", i32, i32, i32, i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", %"class.std::vector.8", %"class.sipm::SiPMAnalogSignal", [40 x i8] }
%"class.sipm::SiPMProperties" = type <{ double, double, i32, i32, i32, [4 x i8], double, double, i32, [4 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, float, [4 x i8], double, float, [4 x i8], double, double, %"class.std::map", i32, i8, i8, i8, i8, i8, [7 x i8] }>
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.sipm::SiPMRandom" = type { %"class.sipm::SiPMRng::Xorshift256plus" }
%"class.sipm::SiPMRng::Xorshift256plus" = type <{ [4 x i64], [32 x i8], [65536 x i64], i32, [60 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sipm::SiPMAnalogSignal" = type { %"class.std::vector.8", double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZNK4sipm10SiPMSensor10hitUniformEv(ptr noundef nonnull align 64 dereferenceable(524888)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm4pairIjjEC2Ev(ptr noundef nonnull align 4 dereferenceable(8)) unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZNK4sipm10SiPMSensor11hitGaussianEv(ptr noundef nonnull align 64 dereferenceable(524888) %0) #2 align 2 {
  %2 = alloca %"struct.sipm::pair", align 4
  %3 = alloca ptr, align 8
  %4 = alloca double, align 8
  %5 = alloca double, align 8
  %6 = alloca %"struct.sipm::pair", align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @_ZN4sipm4pairIjjEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %2) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #6
  %8 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %7, i32 0, i32 2
  %9 = call noundef double @_ZN4sipm10SiPMRandom12randGaussianEdd(ptr noundef nonnull align 64 dereferenceable(524416) %8, double noundef 0.000000e+00, double noundef 1.000000e+00) #6
  store double %9, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  %10 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %7, i32 0, i32 2
  %11 = call noundef double @_ZN4sipm10SiPMRandom12randGaussianEdd(ptr noundef nonnull align 64 dereferenceable(524416) %10, double noundef 0.000000e+00, double noundef 1.000000e+00) #6
  store double %11, ptr %5, align 8, !tbaa !9
  %12 = load double, ptr %4, align 8, !tbaa !9
  %13 = call noundef double @_ZSt3absd(double noundef %12)
  %14 = fcmp olt double %13, 1.640000e+00
  br i1 %14, label %15, label %38

15:                                               ; preds = %1
  %16 = load double, ptr %5, align 8, !tbaa !9
  %17 = call noundef double @_ZSt3absd(double noundef %16)
  %18 = fcmp olt double %17, 1.640000e+00
  br i1 %18, label %19, label %38

19:                                               ; preds = %15
  %20 = load double, ptr %4, align 8, !tbaa !9
  %21 = fadd double %20, 1.640000e+00
  %22 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %7, i32 0, i32 0
  %23 = call noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257) %22)
  %24 = uitofp i32 %23 to double
  %25 = fdiv double %24, 3.280000e+00
  %26 = fmul double %21, %25
  %27 = fptoui double %26 to i32
  %28 = getelementptr inbounds %"struct.sipm::pair", ptr %2, i32 0, i32 0
  store i32 %27, ptr %28, align 4, !tbaa !11
  %29 = load double, ptr %5, align 8, !tbaa !9
  %30 = fadd double %29, 1.640000e+00
  %31 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %7, i32 0, i32 0
  %32 = call noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257) %31)
  %33 = uitofp i32 %32 to double
  %34 = fdiv double %33, 3.280000e+00
  %35 = fmul double %30, %34
  %36 = fptoui double %35 to i32
  %37 = getelementptr inbounds %"struct.sipm::pair", ptr %2, i32 0, i32 1
  store i32 %36, ptr %37, align 4, !tbaa !14
  br label %40

38:                                               ; preds = %15, %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  %39 = call i64 @_ZNK4sipm10SiPMSensor10hitUniformEv(ptr noundef nonnull align 64 dereferenceable(524888) %7)
  store i64 %39, ptr %6, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %2, ptr align 4 %6, i64 8, i1 false), !tbaa.struct !15
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  br label %40

40:                                               ; preds = %38, %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #6
  %41 = load i64, ptr %2, align 4
  ret i64 %41
}

; Function Attrs: nounwind
declare noundef double @_ZN4sipm10SiPMRandom12randGaussianEdd(ptr noundef nonnull align 64 dereferenceable(524416), double noundef, double noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3absd(double noundef) #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTSN4sipm4pairIjjEE", !13, i64 0, !13, i64 4}
!13 = !{!"int", !7, i64 0}
!14 = !{!12, !13, i64 4}
!15 = !{i64 0, i64 4, !16, i64 4, i64 4, !16}
!16 = !{!13, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.sipm::pair" = type { i32, i32 }

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZNK4sipm10SiPMSensor10hitUniformEv(ptr noundef nonnull align 64 dereferenceable(524888)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm4pairIjjEC2Ev(ptr noundef nonnull align 4 dereferenceable(8)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZNK4sipm10SiPMSensor11hitGaussianEv(ptr noundef nonnull align 64 dereferenceable(524888) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca %"struct.sipm::pair", align 8
  call void @_ZN4sipm4pairIjjEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %2) #4
  %3 = getelementptr inbounds i8, ptr %0, i64 320
  %4 = call noundef double @_ZN4sipm10SiPMRandom12randGaussianEdd(ptr noundef nonnull align 64 dereferenceable(524416) %3, double noundef 0.000000e+00, double noundef 1.000000e+00) #4
  %5 = call noundef double @_ZN4sipm10SiPMRandom12randGaussianEdd(ptr noundef nonnull align 64 dereferenceable(524416) %3, double noundef 0.000000e+00, double noundef 1.000000e+00) #4
  %6 = call noundef double @_ZSt3absd(double noundef %4)
  %7 = fcmp olt double %6, 1.640000e+00
  br i1 %7, label %8, label %25

8:                                                ; preds = %1
  %9 = call noundef double @_ZSt3absd(double noundef %5)
  %10 = fcmp olt double %9, 1.640000e+00
  br i1 %10, label %11, label %25

11:                                               ; preds = %8
  %12 = fadd double %4, 1.640000e+00
  %13 = call noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %14 = uitofp i32 %13 to double
  %15 = fdiv double %14, 3.280000e+00
  %16 = fmul double %12, %15
  %17 = fptoui double %16 to i32
  store i32 %17, ptr %2, align 8, !tbaa !5
  %18 = fadd double %5, 1.640000e+00
  %19 = call noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %20 = uitofp i32 %19 to double
  %21 = fdiv double %20, 3.280000e+00
  %22 = fmul double %18, %21
  %23 = fptoui double %22 to i32
  %24 = getelementptr inbounds i8, ptr %2, i64 4
  store i32 %23, ptr %24, align 4, !tbaa !10
  %.pre = load i64, ptr %2, align 8
  br label %27

25:                                               ; preds = %8, %1
  %26 = call i64 @_ZNK4sipm10SiPMSensor10hitUniformEv(ptr noundef nonnull align 64 dereferenceable(524888) %0)
  br label %27

27:                                               ; preds = %25, %11
  %28 = phi i64 [ %26, %25 ], [ %.pre, %11 ]
  ret i64 %28
}

; Function Attrs: nounwind
declare noundef double @_ZN4sipm10SiPMRandom12randGaussianEdd(ptr noundef nonnull align 64 dereferenceable(524416), double noundef, double noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3absd(double noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN4sipm4pairIjjEE", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 4}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SROAPass