; LLVM IR from EdoPro98/SimSiPM :: src/SiPMSensor.ll (ZN4sipm10SiPMSensor12addDcrEventsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.sipm::pair" = type { i32, i32 }
%"class.sipm::SiPMSensor" = type { %"class.sipm::SiPMProperties", [56 x i8], %"class.sipm::SiPMRandom", i32, i32, i32, i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", %"class.std::vector.8", %"class.sipm::SiPMAnalogSignal", [40 x i8] }
%"class.sipm::SiPMProperties" = type <{ double, double, i32, i32, i32, [4 x i8], double, double, i32, [4 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, float, [4 x i8], double, float, [4 x i8], double, double, %"class.std::map", i32, i8, i8, i8, i8, i8, [7 x i8] }>
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.sipm::SiPMRandom" = type { %"class.sipm::SiPMRng::Xorshift256plus" }
%"class.sipm::SiPMRng::Xorshift256plus" = type <{ [4 x i64], [32 x i8], [65536 x i64], i32, [60 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sipm::SiPMAnalogSignal" = type { %"class.std::vector.8", double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sipm10SiPMSensor12addDcrEventsEv(ptr noundef nonnull align 64 dereferenceable(524888) %0) #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca double, align 8
  %4 = alloca double, align 8
  %5 = alloca i32, align 4
  %6 = alloca double, align 8
  %7 = alloca %"struct.sipm::pair", align 4
  %8 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %9 = load ptr, ptr %2, align 8
  %10 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 0
  %11 = call noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDcrEv(ptr noundef nonnull align 8 dereferenceable(257) %10)
  %12 = zext i1 %11 to i32
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %1
  br label %59

15:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
  %16 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 0
  %17 = call noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257) %16)
  store double %17, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #5
  %18 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 0
  %19 = call noundef double @_ZNK4sipm14SiPMProperties3dcrEv(ptr noundef nonnull align 8 dereferenceable(257) %18)
  %20 = fdiv double 1.000000e+09, %19
  store double %20, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %21 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 0
  %22 = call noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257) %21)
  store i32 %22, ptr %5, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %23 = load double, ptr %4, align 8, !tbaa !9
  %24 = fmul double -3.000000e+00, %23
  store double %24, ptr %6, align 8, !tbaa !9
  br label %25

25:                                               ; preds = %52, %15
  %26 = load double, ptr %6, align 8, !tbaa !9
  %27 = load double, ptr %3, align 8, !tbaa !9
  %28 = fcmp olt double %26, %27
  br i1 %28, label %29, label %58

29:                                               ; preds = %25
  %30 = load double, ptr %6, align 8, !tbaa !9
  %31 = fcmp ogt double %30, 0.000000e+00
  br i1 %31, label %32, label %52

32:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %33 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 2
  %34 = load i32, ptr %5, align 4, !tbaa !11
  %35 = call i64 @_ZN4sipm10SiPMRandom12randInteger2Ej(ptr noundef nonnull align 64 dereferenceable(524416) %33, i32 noundef %34) #5
  store i64 %35, ptr %7, align 4
  %36 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 11
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %37 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 32) #6
  %38 = load double, ptr %6, align 8, !tbaa !9
  %39 = getelementptr inbounds %"struct.sipm::pair", ptr %7, i32 0, i32 0
  %40 = load i32, ptr %39, align 4, !tbaa !13
  %41 = getelementptr inbounds %"struct.sipm::pair", ptr %7, i32 0, i32 1
  %42 = load i32, ptr %41, align 4, !tbaa !15
  call void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29) %37, double noundef %38, float noundef 1.000000e+00, i32 noundef %40, i32 noundef %42, i8 noundef zeroext 1, ptr noundef null) #5
  store ptr %37, ptr %8, align 8, !tbaa !5
  call void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24) %36, ptr noundef nonnull align 8 dereferenceable(8) %8)
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  %43 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 3
  %44 = load i32, ptr %43, align 64, !tbaa !16
  %45 = add i32 %44, 1
  store i32 %45, ptr %43, align 64, !tbaa !16
  %46 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 5
  %47 = load i32, ptr %46, align 8, !tbaa !47
  %48 = add i32 %47, 1
  store i32 %48, ptr %46, align 8, !tbaa !47
  %49 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 4
  %50 = load i32, ptr %49, align 4, !tbaa !48
  %51 = add i32 %50, 1
  store i32 %51, ptr %49, align 4, !tbaa !48
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  br label %52

52:                                               ; preds = %32, %29
  %53 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %9, i32 0, i32 2
  %54 = load double, ptr %4, align 8, !tbaa !9
  %55 = call noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416) %53, double noundef %54) #5
  %56 = load double, ptr %6, align 8, !tbaa !9
  %57 = fadd double %56, %55
  store double %57, ptr %6, align 8, !tbaa !9
  br label %25, !llvm.loop !49

58:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
  br label %59

59:                                               ; preds = %58, %14
  ret void
}

; Function Attrs: nounwind
declare i64 @_ZN4sipm10SiPMRandom12randInteger2Ej(ptr noundef nonnull align 64 dereferenceable(524416), i32 noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDcrEv(ptr noundef nonnull align 8 dereferenceable(257)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties3dcrEv(ptr noundef nonnull align 8 dereferenceable(257)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) #1 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29), double noundef, float noundef, i32 noundef, i32 noundef, i8 noundef zeroext, ptr noundef) unnamed_addr #3 align 2

; Function Attrs: nounwind
declare noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416), double noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"_ZTSN4sipm4pairIjjEE", !12, i64 0, !12, i64 4}
!15 = !{!14, !12, i64 4}
!16 = !{!17, !12, i64 524736}
!17 = !{!"_ZTSN4sipm10SiPMSensorE", !18, i64 0, !32, i64 320, !12, i64 524736, !12, i64 524740, !12, i64 524744, !12, i64 524748, !12, i64 524752, !12, i64 524756, !34, i64 524760, !34, i64 524784, !38, i64 524808, !42, i64 524832, !46, i64 524856}
!18 = !{!"_ZTSN4sipm14SiPMPropertiesE", !10, i64 0, !10, i64 8, !12, i64 16, !12, i64 20, !19, i64 24, !10, i64 32, !10, i64 40, !12, i64 48, !10, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !10, i64 88, !10, i64 96, !10, i64 104, !10, i64 112, !10, i64 120, !10, i64 128, !10, i64 136, !10, i64 144, !10, i64 152, !20, i64 160, !10, i64 168, !20, i64 176, !10, i64 184, !10, i64 192, !21, i64 200, !30, i64 248, !31, i64 252, !31, i64 253, !31, i64 254, !31, i64 255, !31, i64 256}
!19 = !{!"_ZTSN4sipm14SiPMProperties15HitDistributionE", !7, i64 0}
!20 = !{!"float", !7, i64 0}
!21 = !{!"_ZTSSt3mapIddSt4lessIdESaISt4pairIKddEEE", !22, i64 0}
!22 = !{!"_ZTSSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE", !23, i64 0}
!23 = !{!"_ZTSNSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE13_Rb_tree_implIS6_Lb1EEE", !24, i64 0, !26, i64 8}
!24 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIdEE", !25, i64 0}
!25 = !{!"_ZTSSt4lessIdE"}
!26 = !{!"_ZTSSt15_Rb_tree_header", !27, i64 0, !29, i64 32}
!27 = !{!"_ZTSSt18_Rb_tree_node_base", !28, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!28 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!29 = !{!"long", !7, i64 0}
!30 = !{!"_ZTSN4sipm14SiPMProperties7PdeTypeE", !7, i64 0}
!31 = !{!"bool", !7, i64 0}
!32 = !{!"_ZTSN4sipm10SiPMRandomE", !33, i64 0}
!33 = !{!"_ZTSN4sipm7SiPMRng15Xorshift256plusE", !7, i64 0, !7, i64 64, !12, i64 524352}
!34 = !{!"_ZTSSt6vectorIdSaIdEE", !35, i64 0}
!35 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!38 = !{!"_ZTSSt6vectorIPN4sipm7SiPMHitESaIS2_EE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!42 = !{!"_ZTSSt6vectorIfSaIfEE", !43, i64 0}
!43 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !44, i64 0}
!44 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !45, i64 0}
!45 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!46 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !42, i64 0, !10, i64 24}
!47 = !{!17, !12, i64 524744}
!48 = !{!17, !12, i64 524740}
!49 = distinct !{!49, !50}
!50 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sipm10SiPMSensor12addDcrEventsEv(ptr noundef nonnull align 64 dereferenceable(524888) %0) local_unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = tail call noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDcrEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  br i1 %3, label %4, label %.loopexit

4:                                                ; preds = %1
  %5 = tail call noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %6 = tail call noundef double @_ZNK4sipm14SiPMProperties3dcrEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %7 = fdiv double 1.000000e+09, %6
  %8 = tail call noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %9 = fmul double %7, -3.000000e+00
  %10 = fcmp olt double %9, %5
  br i1 %10, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %4
  %11 = getelementptr inbounds i8, ptr %0, i64 320
  %12 = getelementptr inbounds i8, ptr %0, i64 524808
  %13 = getelementptr inbounds i8, ptr %0, i64 524736
  %14 = getelementptr inbounds i8, ptr %0, i64 524744
  br label %15

15:                                               ; preds = %.lr.ph, %24
  %.08 = phi double [ %9, %.lr.ph ], [ %26, %24 ]
  %16 = fcmp ogt double %.08, 0.000000e+00
  br i1 %16, label %17, label %24

17:                                               ; preds = %15
  %18 = call i64 @_ZN4sipm10SiPMRandom12randInteger2Ej(ptr noundef nonnull align 64 dereferenceable(524416) %11, i32 noundef %8) #5
  %.sroa.0.0.extract.trunc = trunc i64 %18 to i32
  %.sroa.4.0.extract.shift = lshr i64 %18, 32
  %.sroa.4.0.extract.trunc = trunc nuw i64 %.sroa.4.0.extract.shift to i32
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #5
  %19 = call noalias noundef nonnull dereferenceable(32) ptr @_Znwm(i64 noundef 32) #6
  call void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29) %19, double noundef %.08, float noundef 1.000000e+00, i32 noundef %.sroa.0.0.extract.trunc, i32 noundef %.sroa.4.0.extract.trunc, i8 noundef zeroext 1, ptr noundef null) #5
  store ptr %19, ptr %2, align 8, !tbaa !5
  call void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24) %12, ptr noundef nonnull align 8 dereferenceable(8) %2)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #5
  %20 = load i32, ptr %14, align 8, !tbaa !9
  %21 = add i32 %20, 1
  store i32 %21, ptr %14, align 8, !tbaa !9
  %22 = load <2 x i32>, ptr %13, align 64, !tbaa !42
  %23 = add <2 x i32> %22, <i32 1, i32 1>
  store <2 x i32> %23, ptr %13, align 64, !tbaa !42
  br label %24

24:                                               ; preds = %17, %15
  %25 = call noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416) %11, double noundef %7) #5
  %26 = fadd double %.08, %25
  %27 = fcmp olt double %26, %5
  br i1 %27, label %15, label %.loopexit, !llvm.loop !43

.loopexit:                                        ; preds = %24, %4, %1
  ret void
}

; Function Attrs: nounwind
declare i64 @_ZN4sipm10SiPMRandom12randInteger2Ej(ptr noundef nonnull align 64 dereferenceable(524416), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm14SiPMProperties10nSideCellsEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDcrEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties3dcrEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EE9push_backEOS2_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29), double noundef, float noundef, i32 noundef, i32 noundef, i8 noundef zeroext, ptr noundef) unnamed_addr #3 align 2

; Function Attrs: nounwind
declare noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416), double noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 524744}
!10 = !{!"_ZTSN4sipm10SiPMSensorE", !11, i64 0, !27, i64 320, !13, i64 524736, !13, i64 524740, !13, i64 524744, !13, i64 524748, !13, i64 524752, !13, i64 524756, !29, i64 524760, !29, i64 524784, !33, i64 524808, !37, i64 524832, !41, i64 524856}
!11 = !{!"_ZTSN4sipm14SiPMPropertiesE", !12, i64 0, !12, i64 8, !13, i64 16, !13, i64 20, !14, i64 24, !12, i64 32, !12, i64 40, !13, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !12, i64 152, !15, i64 160, !12, i64 168, !15, i64 176, !12, i64 184, !12, i64 192, !16, i64 200, !25, i64 248, !26, i64 252, !26, i64 253, !26, i64 254, !26, i64 255, !26, i64 256}
!12 = !{!"double", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSN4sipm14SiPMProperties15HitDistributionE", !7, i64 0}
!15 = !{!"float", !7, i64 0}
!16 = !{!"_ZTSSt3mapIddSt4lessIdESaISt4pairIKddEEE", !17, i64 0}
!17 = !{!"_ZTSSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE13_Rb_tree_implIS6_Lb1EEE", !19, i64 0, !21, i64 8}
!19 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIdEE", !20, i64 0}
!20 = !{!"_ZTSSt4lessIdE"}
!21 = !{!"_ZTSSt15_Rb_tree_header", !22, i64 0, !24, i64 32}
!22 = !{!"_ZTSSt18_Rb_tree_node_base", !23, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!23 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!"_ZTSN4sipm14SiPMProperties7PdeTypeE", !7, i64 0}
!26 = !{!"bool", !7, i64 0}
!27 = !{!"_ZTSN4sipm10SiPMRandomE", !28, i64 0}
!28 = !{!"_ZTSN4sipm7SiPMRng15Xorshift256plusE", !7, i64 0, !7, i64 64, !13, i64 524352}
!29 = !{!"_ZTSSt6vectorIdSaIdEE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIPN4sipm7SiPMHitESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSSt6vectorIfSaIfEE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !37, i64 0, !12, i64 24}
!42 = !{!13, !13, i64 0}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass