; LLVM IR from EdoPro98/SimSiPM :: src/SiPMAnalogSignal.ll (ZNK4sipm16SiPMAnalogSignal3toaEddd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sipm::SiPMAnalogSignal" = type { %"class.std::vector", double }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_ZNK4sipm16SiPMAnalogSignal3toaEddd(ptr noundef nonnull align 8 dereferenceable(32) %0, double noundef %1, double noundef %2, double noundef %3) #1 align 2 {
  %5 = alloca double, align 8
  %6 = alloca ptr, align 8
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  %9 = alloca double, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca float, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store double %1, ptr %7, align 8, !tbaa !9
  store double %2, ptr %8, align 8, !tbaa !9
  store double %3, ptr %9, align 8, !tbaa !9
  %15 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %16 = load double, ptr %7, align 8, !tbaa !9
  %17 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %15, i32 0, i32 1
  %18 = load double, ptr %17, align 8, !tbaa !11
  %19 = fdiv double %16, %18
  %20 = fptoui double %19 to i32
  store i32 %20, ptr %10, align 4, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %21 = load double, ptr %7, align 8, !tbaa !9
  %22 = load double, ptr %8, align 8, !tbaa !9
  %23 = fadd double %21, %22
  %24 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %15, i32 0, i32 1
  %25 = load double, ptr %24, align 8, !tbaa !11
  %26 = fdiv double %23, %25
  %27 = fptoui double %26 to i32
  store i32 %27, ptr %11, align 4, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %28 = load i32, ptr %10, align 4, !tbaa !17
  store i32 %28, ptr %12, align 4, !tbaa !17
  br label %29

29:                                               ; preds = %81, %4
  %30 = load i32, ptr %12, align 4, !tbaa !17
  %31 = load i32, ptr %11, align 4, !tbaa !17
  %32 = sub i32 %31, 1
  %33 = icmp ult i32 %30, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %29
  store i32 2, ptr %13, align 4
  br label %84

35:                                               ; preds = %29
  %36 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %15, i32 0, i32 0
  %37 = load i32, ptr %12, align 4, !tbaa !17
  %38 = zext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %38) #2
  %40 = load float, ptr %39, align 4, !tbaa !19
  %41 = fpext float %40 to double
  %42 = load double, ptr %9, align 8, !tbaa !9
  %43 = fcmp ogt double %41, %42
  br i1 %43, label %44, label %80

44:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %45 = load double, ptr %9, align 8, !tbaa !9
  %46 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %15, i32 0, i32 0
  %47 = load i32, ptr %12, align 4, !tbaa !17
  %48 = sub i32 %47, 1
  %49 = zext i32 %48 to i64
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %49) #2
  %51 = load float, ptr %50, align 4, !tbaa !19
  %52 = fpext float %51 to double
  %53 = fsub double %45, %52
  %54 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %15, i32 0, i32 0
  %55 = load i32, ptr %12, align 4, !tbaa !17
  %56 = zext i32 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %56) #2
  %58 = load float, ptr %57, align 4, !tbaa !19
  %59 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %15, i32 0, i32 0
  %60 = load i32, ptr %12, align 4, !tbaa !17
  %61 = sub i32 %60, 1
  %62 = zext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %62) #2
  %64 = load float, ptr %63, align 4, !tbaa !19
  %65 = fsub float %58, %64
  %66 = fpext float %65 to double
  %67 = fdiv double %53, %66
  %68 = fptrunc double %67 to float
  store float %68, ptr %14, align 4, !tbaa !19
  %69 = load i32, ptr %12, align 4, !tbaa !17
  %70 = load i32, ptr %10, align 4, !tbaa !17
  %71 = sub i32 %69, %70
  %72 = sub i32 %71, 1
  %73 = uitofp i32 %72 to float
  %74 = load float, ptr %14, align 4, !tbaa !19
  %75 = fadd float %73, %74
  %76 = fpext float %75 to double
  %77 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %15, i32 0, i32 1
  %78 = load double, ptr %77, align 8, !tbaa !11
  %79 = fmul double %76, %78
  store double %79, ptr %5, align 8
  store i32 1, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %84

80:                                               ; preds = %35
  br label %81

81:                                               ; preds = %80
  %82 = load i32, ptr %12, align 4, !tbaa !17
  %83 = add i32 %82, 1
  store i32 %83, ptr %12, align 4, !tbaa !17
  br label %29, !llvm.loop !21

84:                                               ; preds = %44, %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  %85 = load i32, ptr %13, align 4
  switch i32 %85, label %87 [
    i32 2, label %86
  ]

86:                                               ; preds = %84
  store double -1.000000e+00, ptr %5, align 8
  store i32 1, ptr %13, align 4
  br label %87

87:                                               ; preds = %86, %84
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %88 = load double, ptr %5, align 8
  ret double %88
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !10, i64 24}
!12 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !13, i64 0, !10, i64 24}
!13 = !{!"_ZTSSt6vectorIfSaIfEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!18, !18, i64 0}
!18 = !{!"int", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"float", !7, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_ZNK4sipm16SiPMAnalogSignal3toaEddd(ptr noundef nonnull align 8 dereferenceable(32) %0, double noundef %1, double noundef %2, double noundef %3) local_unnamed_addr #0 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 24
  %6 = load double, ptr %5, align 8, !tbaa !5
  %7 = fdiv double %1, %6
  %8 = fptoui double %7 to i32
  %9 = fadd double %1, %2
  %10 = fdiv double %9, %6
  %11 = fptoui double %10 to i32
  %12 = add i32 %11, -1
  %.not22 = icmp ugt i32 %12, %8
  br i1 %.not22, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %4
  %13 = zext i32 %8 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %41
  %indvars.iv = phi i64 [ %13, %.lr.ph.preheader ], [ %indvars.iv.next, %41 ]
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %15 = load float, ptr %14, align 4, !tbaa !15
  %16 = fpext float %15 to double
  %17 = fcmp ogt double %16, %3
  br i1 %17, label %18, label %41

18:                                               ; preds = %.lr.ph
  %19 = trunc nuw i64 %indvars.iv to i32
  %20 = add nuw i64 %indvars.iv, 4294967295
  %21 = and i64 %20, 4294967295
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #1
  %23 = load float, ptr %22, align 4, !tbaa !15
  %24 = fpext float %23 to double
  %25 = fsub double %3, %24
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %27 = load float, ptr %26, align 4, !tbaa !15
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #1
  %29 = load float, ptr %28, align 4, !tbaa !15
  %30 = fsub float %27, %29
  %31 = fpext float %30 to double
  %32 = fdiv double %25, %31
  %33 = fptrunc double %32 to float
  %34 = xor i32 %8, -1
  %35 = add i32 %19, %34
  %36 = uitofp i32 %35 to float
  %37 = fadd float %36, %33
  %38 = fpext float %37 to double
  %39 = load double, ptr %5, align 8, !tbaa !5
  %40 = fmul double %39, %38
  br label %.loopexit

41:                                               ; preds = %.lr.ph
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %12, %lftr.wideiv
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !17

.loopexit:                                        ; preds = %41, %4, %18
  %.1 = phi double [ %40, %18 ], [ -1.000000e+00, %4 ], [ -1.000000e+00, %41 ]
  ret double %.1
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !14, i64 24}
!6 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !7, i64 0, !14, i64 24}
!7 = !{!"_ZTSSt6vectorIfSaIfEE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"double", !12, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"float", !12, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass