; LLVM IR from bjourne/fast_snn_fpga :: src (sim_params_cpu)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.sim_result = type { i32, i64, ptr }
%struct.sim_config = type { i32, ptr, i8, ptr, i32, i32, i8, i32, i32, i8, double, double, double, double, double, double, double, i8, i32, ptr, i32, ptr, ptr, i32, ptr, ptr }
%struct.synapse_index = type { ptr, ptr, i32, i32, i32 }
%struct.spike_sender_ctx = type { i64, ptr, ptr, i64, i32, ptr }

@.str = external hidden unnamed_addr constant [73 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [76 x i8], align 1
@__PRETTY_FUNCTION__.sim_config_run_on_cpu = external hidden unnamed_addr constant [47 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [40 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local ptr @spike_sender_ctx_init(ptr noundef, i64 noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @spike_sender_ctx_free(ptr noundef) #0

; Function Attrs: nounwind
declare void @free(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local void @sim_config_run_on_cpu(ptr dead_on_unwind noalias writable sret(%struct.sim_result) align 8 %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca [7 x ptr], align 16
  %16 = alloca [7 x ptr], align 16
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca double, align 8
  %21 = alloca i64, align 8
  %22 = alloca double, align 8
  %23 = alloca double, align 8
  %24 = alloca double, align 8
  %25 = alloca double, align 8
  %26 = alloca i64, align 8
  %27 = alloca i64, align 8
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i64, align 8
  %33 = alloca ptr, align 8
  %34 = alloca ptr, align 8
  %35 = alloca i32, align 4
  %36 = alloca i64, align 8
  %37 = alloca i64, align 8
  %38 = alloca i64, align 8
  %39 = alloca [2 x i32], align 4
  %40 = alloca i32, align 4
  store ptr %1, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #8
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.sim_config, ptr %41, i32 0, i32 25
  %43 = load ptr, ptr %42, align 8, !tbaa !9
  %44 = getelementptr inbounds %struct.synapse_index, ptr %43, i32 0, i32 3
  %45 = load i32, ptr %44, align 4, !tbaa !14
  %46 = zext i32 %45 to i64
  store i64 %46, ptr %4, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #8
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.sim_config, ptr %47, i32 0, i32 18
  %49 = load i32, ptr %48, align 4, !tbaa !18
  %50 = zext i32 %49 to i64
  store i64 %50, ptr %5, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #8
  store i64 4, ptr %6, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #8
  store i64 8, ptr %7, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #8
  %51 = load ptr, ptr %3, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.sim_config, ptr %51, i32 0, i32 6
  %53 = load i8, ptr %52, align 8, !tbaa !19, !range !20, !noundef !21
  %54 = trunc i8 %53 to i1
  br i1 %54, label %55, label %57

55:                                               ; preds = %2
  %56 = load i64, ptr %7, align 8, !tbaa !16
  br label %59

57:                                               ; preds = %2
  %58 = load i64, ptr %6, align 8, !tbaa !16
  br label %59

59:                                               ; preds = %57, %55
  %60 = phi i64 [ %56, %55 ], [ %58, %57 ]
  store i64 %60, ptr %8, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #8
  %61 = load i64, ptr %5, align 8, !tbaa !16
  %62 = mul i64 64, %61
  %63 = load i64, ptr %6, align 8, !tbaa !16
  %64 = call ptr @aligned_calloc(i64 noundef %62, i64 noundef %63)
  store ptr %64, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #8
  %65 = load i64, ptr %4, align 8, !tbaa !16
  %66 = call ptr @aligned_calloc(i64 noundef %65, i64 noundef 1)
  store ptr %66, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #8
  %67 = load i64, ptr %4, align 8, !tbaa !16
  %68 = load i64, ptr %8, align 8, !tbaa !16
  %69 = call ptr @aligned_calloc(i64 noundef %67, i64 noundef %68)
  store ptr %69, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #8
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.sim_config, ptr %70, i32 0, i32 20
  %72 = load i32, ptr %71, align 8, !tbaa !22
  %73 = zext i32 %72 to i64
  %74 = load i64, ptr %8, align 8, !tbaa !16
  %75 = call ptr @aligned_calloc(i64 noundef %73, i64 noundef %74)
  store ptr %75, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #8
  store i32 0, ptr %13, align 4, !tbaa !23
  br label %76

76:                                               ; preds = %98, %59
  %77 = load i32, ptr %13, align 4, !tbaa !23
  %78 = load ptr, ptr %3, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.sim_config, ptr %78, i32 0, i32 20
  %80 = load i32, ptr %79, align 8, !tbaa !22
  %81 = icmp ult i32 %77, %80
  br i1 %81, label %83, label %82

82:                                               ; preds = %76
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #8
  br label %101

83:                                               ; preds = %76
  %84 = load ptr, ptr %12, align 8, !tbaa !5
  %85 = load i32, ptr %13, align 4, !tbaa !23
  %86 = zext i32 %85 to i64
  %87 = load ptr, ptr %3, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.sim_config, ptr %87, i32 0, i32 21
  %89 = load ptr, ptr %88, align 8, !tbaa !24
  %90 = load i32, ptr %13, align 4, !tbaa !23
  %91 = zext i32 %90 to i64
  %92 = getelementptr inbounds double, ptr %89, i64 %91
  %93 = load double, ptr %92, align 8, !tbaa !25
  %94 = load ptr, ptr %3, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.sim_config, ptr %94, i32 0, i32 6
  %96 = load i8, ptr %95, align 8, !tbaa !19, !range !20, !noundef !21
  %97 = trunc i8 %96 to i1
  call void @mprec_write_double(ptr noundef %84, i64 noundef %86, double noundef %93, i1 noundef zeroext %97)
  br label %98

98:                                               ; preds = %83
  %99 = load i32, ptr %13, align 4, !tbaa !23
  %100 = add i32 %99, 1
  store i32 %100, ptr %13, align 4, !tbaa !23
  br label %76, !llvm.loop !26

101:                                              ; preds = %82
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #8
  %102 = load ptr, ptr %3, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.sim_config, ptr %102, i32 0, i32 25
  %104 = load ptr, ptr %103, align 8, !tbaa !9
  %105 = call ptr @synapse_index_partition_by_delay(ptr noundef %104, i32 noundef 7)
  store ptr %105, ptr %14, align 8, !tbaa !5
  %106 = load ptr, ptr %3, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.sim_config, ptr %106, i32 0, i32 25
  %108 = load ptr, ptr %107, align 8, !tbaa !9
  call void @synapse_index_free(ptr noundef %108)
  %109 = load ptr, ptr %14, align 8, !tbaa !5
  %110 = load ptr, ptr %3, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.sim_config, ptr %110, i32 0, i32 25
  store ptr %109, ptr %111, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 56, ptr %15) #8
  call void @llvm.lifetime.start.p0(i64 56, ptr %16) #8
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #8
  store i32 0, ptr %17, align 4, !tbaa !23
  br label %112

112:                                              ; preds = %149, %101
  %113 = load i32, ptr %17, align 4, !tbaa !23
  %114 = icmp ult i32 %113, 7
  br i1 %114, label %116, label %115

115:                                              ; preds = %112
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #8
  br label %152

116:                                              ; preds = %112
  %117 = call ptr @synced_queue_init(i64 noundef 512)
  %118 = load i32, ptr %17, align 4, !tbaa !23
  %119 = zext i32 %118 to i64
  %120 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 %119
  store ptr %117, ptr %120, align 8, !tbaa !5
  %121 = load ptr, ptr %9, align 8, !tbaa !5
  %122 = load i64, ptr %5, align 8, !tbaa !16
  %123 = load i32, ptr %17, align 4, !tbaa !23
  %124 = zext i32 %123 to i64
  %125 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 %124
  %126 = load ptr, ptr %125, align 8, !tbaa !5
  %127 = load i32, ptr %17, align 4, !tbaa !23
  %128 = load ptr, ptr %3, align 8, !tbaa !5
  %129 = getelementptr inbounds %struct.sim_config, ptr %128, i32 0, i32 25
  %130 = load ptr, ptr %129, align 8, !tbaa !9
  %131 = call ptr @spike_sender_ctx_init(ptr noundef %121, i64 noundef %122, ptr noundef %126, i32 noundef %127, ptr noundef %130)
  %132 = load i32, ptr %17, align 4, !tbaa !23
  %133 = zext i32 %132 to i64
  %134 = getelementptr inbounds [7 x ptr], ptr %16, i64 0, i64 %133
  store ptr %131, ptr %134, align 8, !tbaa !5
  %135 = load i32, ptr %17, align 4, !tbaa !23
  %136 = zext i32 %135 to i64
  %137 = getelementptr inbounds [7 x ptr], ptr %16, i64 0, i64 %136
  %138 = load ptr, ptr %137, align 8, !tbaa !5
  %139 = getelementptr inbounds %struct.spike_sender_ctx, ptr %138, i32 0, i32 0
  %140 = load i32, ptr %17, align 4, !tbaa !23
  %141 = zext i32 %140 to i64
  %142 = getelementptr inbounds [7 x ptr], ptr %16, i64 0, i64 %141
  %143 = load ptr, ptr %142, align 8, !tbaa !5
  %144 = call i32 @pthread_create(ptr noundef %139, ptr noundef null, ptr noundef @spike_sender_run, ptr noundef %143) #8
  %145 = icmp ne i32 %144, 0
  br i1 %145, label %147, label %146

146:                                              ; preds = %116
  br label %148

147:                                              ; preds = %116
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 253, ptr noundef @__PRETTY_FUNCTION__.sim_config_run_on_cpu) #9
  unreachable

148:                                              ; preds = %146
  br label %149

149:                                              ; preds = %148
  %150 = load i32, ptr %17, align 4, !tbaa !23
  %151 = add i32 %150, 1
  store i32 %151, ptr %17, align 4, !tbaa !23
  br label %112, !llvm.loop !28

152:                                              ; preds = %115
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #8
  %153 = load ptr, ptr %3, align 8, !tbaa !5
  %154 = getelementptr inbounds %struct.sim_config, ptr %153, i32 0, i32 0
  %155 = load i32, ptr %154, align 8, !tbaa !29
  %156 = zext i32 %155 to i64
  %157 = load i64, ptr %4, align 8, !tbaa !16
  %158 = mul i64 %156, %157
  %159 = call noalias ptr @calloc(i64 noundef %158, i64 noundef 1) #10
  store ptr %159, ptr %18, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #8
  %160 = load i64, ptr %4, align 8, !tbaa !16
  %161 = load i64, ptr %8, align 8, !tbaa !16
  %162 = call noalias ptr @calloc(i64 noundef %160, i64 noundef %161) #10
  store ptr %162, ptr %19, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #8
  %163 = load ptr, ptr %3, align 8, !tbaa !5
  %164 = getelementptr inbounds %struct.sim_config, ptr %163, i32 0, i32 16
  %165 = load double, ptr %164, align 8, !tbaa !30
  %166 = load ptr, ptr %3, align 8, !tbaa !5
  %167 = getelementptr inbounds %struct.sim_config, ptr %166, i32 0, i32 15
  %168 = load double, ptr %167, align 8, !tbaa !31
  %169 = fsub double %165, %168
  store double %169, ptr %20, align 8, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #8
  store i64 0, ptr %21, align 8, !tbaa !16
  br label %170

170:                                              ; preds = %193, %152
  %171 = load i64, ptr %21, align 8, !tbaa !16
  %172 = load i64, ptr %4, align 8, !tbaa !16
  %173 = icmp ult i64 %171, %172
  br i1 %173, label %175, label %174

174:                                              ; preds = %170
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #8
  br label %196

175:                                              ; preds = %170
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #8
  %176 = load ptr, ptr %3, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.sim_config, ptr %176, i32 0, i32 19
  %178 = load ptr, ptr %177, align 8, !tbaa !32
  %179 = load i64, ptr %21, align 8, !tbaa !16
  %180 = getelementptr inbounds double, ptr %178, i64 %179
  %181 = load double, ptr %180, align 8, !tbaa !25
  %182 = load ptr, ptr %3, align 8, !tbaa !5
  %183 = getelementptr inbounds %struct.sim_config, ptr %182, i32 0, i32 15
  %184 = load double, ptr %183, align 8, !tbaa !31
  %185 = fsub double %181, %184
  store double %185, ptr %22, align 8, !tbaa !25
  %186 = load ptr, ptr %19, align 8, !tbaa !5
  %187 = load i64, ptr %21, align 8, !tbaa !16
  %188 = load double, ptr %22, align 8, !tbaa !25
  %189 = load ptr, ptr %3, align 8, !tbaa !5
  %190 = getelementptr inbounds %struct.sim_config, ptr %189, i32 0, i32 6
  %191 = load i8, ptr %190, align 8, !tbaa !19, !range !20, !noundef !21
  %192 = trunc i8 %191 to i1
  call void @mprec_write_double(ptr noundef %186, i64 noundef %187, double noundef %188, i1 noundef zeroext %192)
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #8
  br label %193

193:                                              ; preds = %175
  %194 = load i64, ptr %21, align 8, !tbaa !16
  %195 = add i64 %194, 1
  store i64 %195, ptr %21, align 8, !tbaa !16
  br label %170, !llvm.loop !33

196:                                              ; preds = %174
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #8
  %197 = load ptr, ptr %3, align 8, !tbaa !5
  %198 = getelementptr inbounds %struct.sim_config, ptr %197, i32 0, i32 12
  %199 = load double, ptr %198, align 8, !tbaa !34
  store double %199, ptr %23, align 8, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 8, ptr %24) #8
  %200 = load ptr, ptr %3, align 8, !tbaa !5
  %201 = getelementptr inbounds %struct.sim_config, ptr %200, i32 0, i32 13
  %202 = load double, ptr %201, align 8, !tbaa !35
  store double %202, ptr %24, align 8, !tbaa !25
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #8
  %203 = load ptr, ptr %3, align 8, !tbaa !5
  %204 = getelementptr inbounds %struct.sim_config, ptr %203, i32 0, i32 14
  %205 = load double, ptr %204, align 8, !tbaa !36
  store double %205, ptr %25, align 8, !tbaa !25
  %206 = call i32 (ptr, ...) @printf(ptr noundef @.str.2, i32 noundef 7)
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #8
  %207 = call i64 (...) @nano_count()
  store i64 %207, ptr %26, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #8
  store i64 0, ptr %27, align 8, !tbaa !16
  br label %208

208:                                              ; preds = %334, %196
  %209 = load i64, ptr %27, align 8, !tbaa !16
  %210 = load ptr, ptr %3, align 8, !tbaa !5
  %211 = getelementptr inbounds %struct.sim_config, ptr %210, i32 0, i32 0
  %212 = load i32, ptr %211, align 8, !tbaa !29
  %213 = zext i32 %212 to i64
  %214 = icmp ult i64 %209, %213
  br i1 %214, label %216, label %215

215:                                              ; preds = %208
  store i32 11, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #8
  br label %337

216:                                              ; preds = %208
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #8
  %217 = load i64, ptr %27, align 8, !tbaa !16
  %218 = or i64 -33554432, %217
  %219 = trunc i64 %218 to i32
  store i32 %219, ptr %29, align 4, !tbaa !23
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #8
  store i32 0, ptr %30, align 4, !tbaa !23
  br label %220

220:                                              ; preds = %234, %216
  %221 = load i32, ptr %30, align 4, !tbaa !23
  %222 = icmp ult i32 %221, 7
  br i1 %222, label %224, label %223

223:                                              ; preds = %220
  store i32 14, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #8
  br label %237

224:                                              ; preds = %220
  %225 = load i32, ptr %30, align 4, !tbaa !23
  %226 = zext i32 %225 to i64
  %227 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 %226
  %228 = load ptr, ptr %227, align 8, !tbaa !5
  %229 = load i32, ptr %29, align 4, !tbaa !23
  call void @synced_queue_add(ptr noundef %228, i32 noundef %229)
  %230 = load i32, ptr %30, align 4, !tbaa !23
  %231 = zext i32 %230 to i64
  %232 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 %231
  %233 = load ptr, ptr %232, align 8, !tbaa !5
  call void @synced_queue_spin_while_nonempty(ptr noundef %233)
  br label %234

234:                                              ; preds = %224
  %235 = load i32, ptr %30, align 4, !tbaa !23
  %236 = add i32 %235, 1
  store i32 %236, ptr %30, align 4, !tbaa !23
  br label %220, !llvm.loop !37

237:                                              ; preds = %223
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #8
  %238 = load i64, ptr %27, align 8, !tbaa !16
  %239 = and i64 %238, 63
  %240 = load i64, ptr %5, align 8, !tbaa !16
  %241 = mul i64 %239, %240
  %242 = trunc i64 %241 to i32
  store i32 %242, ptr %31, align 4, !tbaa !23
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #8
  %243 = load i64, ptr %27, align 8, !tbaa !16
  %244 = load i64, ptr %5, align 8, !tbaa !16
  %245 = mul i64 %243, %244
  store i64 %245, ptr %32, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %33) #8
  %246 = load ptr, ptr %9, align 8, !tbaa !5
  %247 = load i32, ptr %31, align 4, !tbaa !23
  %248 = zext i32 %247 to i64
  %249 = getelementptr inbounds float, ptr %246, i64 %248
  store ptr %249, ptr %33, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %34) #8
  %250 = load ptr, ptr %3, align 8, !tbaa !5
  %251 = getelementptr inbounds %struct.sim_config, ptr %250, i32 0, i32 24
  %252 = load ptr, ptr %251, align 8, !tbaa !38
  %253 = load i64, ptr %32, align 8, !tbaa !16
  %254 = getelementptr inbounds i8, ptr %252, i64 %253
  store ptr %254, ptr %34, align 8, !tbaa !5
  %255 = load ptr, ptr %3, align 8, !tbaa !5
  %256 = getelementptr inbounds %struct.sim_config, ptr %255, i32 0, i32 6
  %257 = load i8, ptr %256, align 8, !tbaa !19, !range !20, !noundef !21
  %258 = trunc i8 %257 to i1
  br i1 %258, label %259, label %291

259:                                              ; preds = %237
  %260 = load i64, ptr %27, align 8, !tbaa !16
  %261 = load i64, ptr %4, align 8, !tbaa !16
  %262 = load ptr, ptr %3, align 8, !tbaa !5
  %263 = getelementptr inbounds %struct.sim_config, ptr %262, i32 0, i32 20
  %264 = load i32, ptr %263, align 8, !tbaa !22
  %265 = load ptr, ptr %3, align 8, !tbaa !5
  %266 = getelementptr inbounds %struct.sim_config, ptr %265, i32 0, i32 17
  %267 = load i8, ptr %266, align 8, !tbaa !39
  %268 = load double, ptr %23, align 8, !tbaa !25
  %269 = load double, ptr %24, align 8, !tbaa !25
  %270 = load double, ptr %25, align 8, !tbaa !25
  %271 = load double, ptr %20, align 8, !tbaa !25
  %272 = load ptr, ptr %3, align 8, !tbaa !5
  %273 = getelementptr inbounds %struct.sim_config, ptr %272, i32 0, i32 22
  %274 = load ptr, ptr %273, align 8, !tbaa !40
  %275 = load ptr, ptr %12, align 8, !tbaa !5
  %276 = load ptr, ptr %19, align 8, !tbaa !5
  %277 = load ptr, ptr %11, align 8, !tbaa !5
  %278 = load ptr, ptr %10, align 8, !tbaa !5
  %279 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 0
  %280 = load ptr, ptr %18, align 8, !tbaa !5
  call void @vm_update_double(i64 noundef %260, i64 noundef %261, i32 noundef %264, i8 noundef zeroext %267, double noundef %268, double noundef %269, double noundef %270, double noundef %271, ptr noundef %274, ptr noundef %275, ptr noundef %276, ptr noundef %277, ptr noundef %278, ptr noundef %279, ptr noundef %280)
  %281 = load i64, ptr %4, align 8, !tbaa !16
  %282 = load ptr, ptr %3, align 8, !tbaa !5
  %283 = getelementptr inbounds %struct.sim_config, ptr %282, i32 0, i32 11
  %284 = load double, ptr %283, align 8, !tbaa !41
  %285 = load ptr, ptr %3, align 8, !tbaa !5
  %286 = getelementptr inbounds %struct.sim_config, ptr %285, i32 0, i32 10
  %287 = load double, ptr %286, align 8, !tbaa !42
  %288 = load ptr, ptr %11, align 8, !tbaa !5
  %289 = load ptr, ptr %34, align 8, !tbaa !5
  %290 = load ptr, ptr %33, align 8, !tbaa !5
  call void @psc_update_double(i64 noundef %281, double noundef %284, double noundef %287, ptr noundef %288, ptr noundef %289, ptr noundef %290)
  br label %330

291:                                              ; preds = %237
  %292 = load i64, ptr %27, align 8, !tbaa !16
  %293 = trunc i64 %292 to i32
  %294 = load i64, ptr %4, align 8, !tbaa !16
  %295 = load ptr, ptr %3, align 8, !tbaa !5
  %296 = getelementptr inbounds %struct.sim_config, ptr %295, i32 0, i32 20
  %297 = load i32, ptr %296, align 8, !tbaa !22
  %298 = load ptr, ptr %3, align 8, !tbaa !5
  %299 = getelementptr inbounds %struct.sim_config, ptr %298, i32 0, i32 17
  %300 = load i8, ptr %299, align 8, !tbaa !39
  %301 = load double, ptr %23, align 8, !tbaa !25
  %302 = fptrunc double %301 to float
  %303 = load double, ptr %24, align 8, !tbaa !25
  %304 = fptrunc double %303 to float
  %305 = load double, ptr %25, align 8, !tbaa !25
  %306 = fptrunc double %305 to float
  %307 = load double, ptr %20, align 8, !tbaa !25
  %308 = fptrunc double %307 to float
  %309 = load ptr, ptr %3, align 8, !tbaa !5
  %310 = getelementptr inbounds %struct.sim_config, ptr %309, i32 0, i32 22
  %311 = load ptr, ptr %310, align 8, !tbaa !40
  %312 = load ptr, ptr %12, align 8, !tbaa !5
  %313 = load ptr, ptr %19, align 8, !tbaa !5
  %314 = load ptr, ptr %11, align 8, !tbaa !5
  %315 = load ptr, ptr %10, align 8, !tbaa !5
  %316 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 0
  %317 = load ptr, ptr %18, align 8, !tbaa !5
  call void @vm_update_single(i32 noundef %293, i64 noundef %294, i32 noundef %297, i8 noundef zeroext %300, float noundef %302, float noundef %304, float noundef %306, float noundef %308, ptr noundef %311, ptr noundef %312, ptr noundef %313, ptr noundef %314, ptr noundef %315, ptr noundef %316, ptr noundef %317)
  %318 = load i64, ptr %4, align 8, !tbaa !16
  %319 = load ptr, ptr %3, align 8, !tbaa !5
  %320 = getelementptr inbounds %struct.sim_config, ptr %319, i32 0, i32 11
  %321 = load double, ptr %320, align 8, !tbaa !41
  %322 = fptrunc double %321 to float
  %323 = load ptr, ptr %3, align 8, !tbaa !5
  %324 = getelementptr inbounds %struct.sim_config, ptr %323, i32 0, i32 10
  %325 = load double, ptr %324, align 8, !tbaa !42
  %326 = fptrunc double %325 to float
  %327 = load ptr, ptr %11, align 8, !tbaa !5
  %328 = load ptr, ptr %34, align 8, !tbaa !5
  %329 = load ptr, ptr %33, align 8, !tbaa !5
  call void @psc_update_single(i64 noundef %318, float noundef %322, float noundef %326, ptr noundef %327, ptr noundef %328, ptr noundef %329)
  br label %330

330:                                              ; preds = %291, %259
  %331 = load ptr, ptr %33, align 8, !tbaa !5
  %332 = load i64, ptr %5, align 8, !tbaa !16
  %333 = mul i64 4, %332
  call void @llvm.memset.p0.i64(ptr align 4 %331, i8 0, i64 %333, i1 false)
  call void @llvm.lifetime.end.p0(i64 8, ptr %34) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %33) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #8
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #8
  br label %334

334:                                              ; preds = %330
  %335 = load i64, ptr %27, align 8, !tbaa !16
  %336 = add i64 %335, 1
  store i64 %336, ptr %27, align 8, !tbaa !16
  br label %208, !llvm.loop !43

337:                                              ; preds = %215
  call void @llvm.lifetime.start.p0(i64 4, ptr %35) #8
  store i32 0, ptr %35, align 4, !tbaa !23
  br label %338

338:                                              ; preds = %358, %337
  %339 = load i32, ptr %35, align 4, !tbaa !23
  %340 = icmp ult i32 %339, 7
  br i1 %340, label %342, label %341

341:                                              ; preds = %338
  store i32 17, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %35) #8
  br label %361

342:                                              ; preds = %338
  %343 = load i32, ptr %35, align 4, !tbaa !23
  %344 = zext i32 %343 to i64
  %345 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 %344
  %346 = load ptr, ptr %345, align 8, !tbaa !5
  call void @synced_queue_add(ptr noundef %346, i32 noundef -16777216)
  %347 = load i32, ptr %35, align 4, !tbaa !23
  %348 = zext i32 %347 to i64
  %349 = getelementptr inbounds [7 x ptr], ptr %16, i64 0, i64 %348
  %350 = load ptr, ptr %349, align 8, !tbaa !5
  %351 = getelementptr inbounds %struct.spike_sender_ctx, ptr %350, i32 0, i32 0
  %352 = load i64, ptr %351, align 8, !tbaa !44
  %353 = call i32 @pthread_join(i64 noundef %352, ptr noundef null)
  %354 = icmp ne i32 %353, 0
  br i1 %354, label %356, label %355

355:                                              ; preds = %342
  br label %357

356:                                              ; preds = %342
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 307, ptr noundef @__PRETTY_FUNCTION__.sim_config_run_on_cpu) #9
  unreachable

357:                                              ; preds = %355
  br label %358

358:                                              ; preds = %357
  %359 = load i32, ptr %35, align 4, !tbaa !23
  %360 = add i32 %359, 1
  store i32 %360, ptr %35, align 4, !tbaa !23
  br label %338, !llvm.loop !46

361:                                              ; preds = %341
  %362 = getelementptr inbounds %struct.sim_result, ptr %0, i32 0, i32 0
  store i32 0, ptr %362, align 8, !tbaa !47
  %363 = getelementptr inbounds %struct.sim_result, ptr %0, i32 0, i32 1
  %364 = call i64 (...) @nano_count()
  %365 = load i64, ptr %26, align 8, !tbaa !16
  %366 = sub i64 %364, %365
  store i64 %366, ptr %363, align 8, !tbaa !49
  %367 = getelementptr inbounds %struct.sim_result, ptr %0, i32 0, i32 2
  store ptr null, ptr %367, align 8, !tbaa !50
  call void @llvm.lifetime.start.p0(i64 8, ptr %36) #8
  store i64 0, ptr %36, align 8, !tbaa !16
  br label %368

368:                                              ; preds = %406, %361
  %369 = load i64, ptr %36, align 8, !tbaa !16
  %370 = load ptr, ptr %3, align 8, !tbaa !5
  %371 = getelementptr inbounds %struct.sim_config, ptr %370, i32 0, i32 0
  %372 = load i32, ptr %371, align 8, !tbaa !29
  %373 = zext i32 %372 to i64
  %374 = icmp ult i64 %369, %373
  br i1 %374, label %376, label %375

375:                                              ; preds = %368
  store i32 20, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %36) #8
  br label %409

376:                                              ; preds = %368
  call void @llvm.lifetime.start.p0(i64 8, ptr %37) #8
  store i64 0, ptr %37, align 8, !tbaa !16
  call void @llvm.lifetime.start.p0(i64 8, ptr %38) #8
  store i64 0, ptr %38, align 8, !tbaa !16
  br label %377

377:                                              ; preds = %396, %376
  %378 = load i64, ptr %38, align 8, !tbaa !16
  %379 = load i64, ptr %4, align 8, !tbaa !16
  %380 = icmp ult i64 %378, %379
  br i1 %380, label %382, label %381

381:                                              ; preds = %377
  store i32 23, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %38) #8
  br label %399

382:                                              ; preds = %377
  %383 = load ptr, ptr %18, align 8, !tbaa !5
  %384 = load i64, ptr %4, align 8, !tbaa !16
  %385 = load i64, ptr %36, align 8, !tbaa !16
  %386 = mul i64 %384, %385
  %387 = load i64, ptr %38, align 8, !tbaa !16
  %388 = add i64 %386, %387
  %389 = getelementptr inbounds i8, ptr %383, i64 %388
  %390 = load i8, ptr %389, align 1, !tbaa !51, !range !20, !noundef !21
  %391 = trunc i8 %390 to i1
  br i1 %391, label %392, label %395

392:                                              ; preds = %382
  %393 = load i64, ptr %37, align 8, !tbaa !16
  %394 = add i64 %393, 1
  store i64 %394, ptr %37, align 8, !tbaa !16
  br label %395

395:                                              ; preds = %392, %382
  br label %396

396:                                              ; preds = %395
  %397 = load i64, ptr %38, align 8, !tbaa !16
  %398 = add i64 %397, 1
  store i64 %398, ptr %38, align 8, !tbaa !16
  br label %377, !llvm.loop !52

399:                                              ; preds = %381
  %400 = load i64, ptr %37, align 8, !tbaa !16
  %401 = getelementptr inbounds %struct.sim_result, ptr %0, i32 0, i32 0
  %402 = load i32, ptr %401, align 8, !tbaa !47
  %403 = zext i32 %402 to i64
  %404 = add i64 %403, %400
  %405 = trunc i64 %404 to i32
  store i32 %405, ptr %401, align 8, !tbaa !47
  call void @llvm.lifetime.end.p0(i64 8, ptr %37) #8
  br label %406

406:                                              ; preds = %399
  %407 = load i64, ptr %36, align 8, !tbaa !16
  %408 = add i64 %407, 1
  store i64 %408, ptr %36, align 8, !tbaa !16
  br label %368, !llvm.loop !53

409:                                              ; preds = %375
  %410 = load ptr, ptr %3, align 8, !tbaa !5
  %411 = getelementptr inbounds %struct.sim_config, ptr %410, i32 0, i32 0
  %412 = load i32, ptr %411, align 8, !tbaa !29
  store i32 %412, ptr %39, align 4, !tbaa !23
  %413 = getelementptr inbounds i32, ptr %39, i64 1
  %414 = load i64, ptr %4, align 8, !tbaa !16
  %415 = trunc i64 %414 to i32
  store i32 %415, ptr %413, align 4, !tbaa !23
  %416 = getelementptr inbounds [2 x i32], ptr %39, i64 0, i64 0
  %417 = load ptr, ptr %18, align 8, !tbaa !5
  %418 = call ptr @npy_init(i8 noundef signext 98, i32 noundef 1, i32 noundef 2, ptr noundef %416, ptr noundef %417, i1 noundef zeroext true)
  %419 = getelementptr inbounds %struct.sim_result, ptr %0, i32 0, i32 2
  store ptr %418, ptr %419, align 8, !tbaa !50
  call void @llvm.lifetime.start.p0(i64 4, ptr %40) #8
  store i32 0, ptr %40, align 4, !tbaa !23
  br label %420

420:                                              ; preds = %433, %409
  %421 = load i32, ptr %40, align 4, !tbaa !23
  %422 = icmp ult i32 %421, 7
  br i1 %422, label %424, label %423

423:                                              ; preds = %420
  store i32 26, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %40) #8
  br label %436

424:                                              ; preds = %420
  %425 = load i32, ptr %40, align 4, !tbaa !23
  %426 = zext i32 %425 to i64
  %427 = getelementptr inbounds [7 x ptr], ptr %16, i64 0, i64 %426
  %428 = load ptr, ptr %427, align 8, !tbaa !5
  call void @spike_sender_ctx_free(ptr noundef %428)
  %429 = load i32, ptr %40, align 4, !tbaa !23
  %430 = zext i32 %429 to i64
  %431 = getelementptr inbounds [7 x ptr], ptr %15, i64 0, i64 %430
  %432 = load ptr, ptr %431, align 8, !tbaa !5
  call void @synced_queue_free(ptr noundef %432)
  br label %433

433:                                              ; preds = %424
  %434 = load i32, ptr %40, align 4, !tbaa !23
  %435 = add i32 %434, 1
  store i32 %435, ptr %40, align 4, !tbaa !23
  br label %420, !llvm.loop !54

436:                                              ; preds = %423
  %437 = load ptr, ptr %12, align 8, !tbaa !5
  call void @free(ptr noundef %437) #8
  %438 = load ptr, ptr %19, align 8, !tbaa !5
  call void @free(ptr noundef %438) #8
  %439 = load ptr, ptr %11, align 8, !tbaa !5
  call void @free(ptr noundef %439) #8
  %440 = load ptr, ptr %10, align 8, !tbaa !5
  call void @free(ptr noundef %440) #8
  %441 = load ptr, ptr %9, align 8, !tbaa !5
  call void @free(ptr noundef %441) #8
  %442 = load ptr, ptr %18, align 8, !tbaa !5
  call void @free(ptr noundef %442) #8
  store i32 1, ptr %28, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %24) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #8
  call void @llvm.lifetime.end.p0(i64 56, ptr %16) #8
  call void @llvm.lifetime.end.p0(i64 56, ptr %15) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #8
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #8
  ret void
}

declare ptr @aligned_calloc(i64 noundef, i64 noundef) #3

declare void @mprec_write_double(ptr noundef, i64 noundef, double noundef, i1 noundef zeroext) #3

declare ptr @synapse_index_partition_by_delay(ptr noundef, i32 noundef) #3

declare void @synapse_index_free(ptr noundef) #3

declare ptr @synced_queue_init(i64 noundef) #3

; Function Attrs: nounwind
declare i32 @pthread_create(ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden ptr @spike_sender_run(ptr noundef) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #4

; Function Attrs: nounwind allocsize(0,1)
declare noalias ptr @calloc(i64 noundef, i64 noundef) #5

declare i32 @printf(ptr noundef, ...) #3

declare i64 @nano_count(...) #3

declare void @synced_queue_add(ptr noundef, i32 noundef) #3

declare void @synced_queue_spin_while_nonempty(ptr noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @vm_update_double(i64 noundef, i64 noundef, i32 noundef, i8 noundef zeroext, double noundef, double noundef, double noundef, double noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #6

; Function Attrs: nounwind uwtable
declare hidden void @psc_update_double(i64 noundef, double noundef, double noundef, ptr noalias noundef, ptr noalias noundef, ptr noalias noundef) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @vm_update_single(i32 noundef, i64 noundef, i32 noundef, i8 noundef zeroext, float noundef, float noundef, float noundef, float noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #6

; Function Attrs: nounwind uwtable
declare hidden void @psc_update_single(i64 noundef, float noundef, float noundef, ptr noalias noundef, ptr noalias noundef, ptr noalias noundef) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #7

declare i32 @pthread_join(i64 noundef, ptr noundef) #3

declare ptr @npy_init(i8 noundef signext, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i1 noundef zeroext) #3

declare void @synced_queue_free(ptr noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind allocsize(0,1) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #8 = { nounwind }
attributes #9 = { noreturn nounwind }
attributes #10 = { nounwind allocsize(0,1) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 168}
!10 = !{!"", !11, i64 0, !6, i64 8, !12, i64 16, !6, i64 24, !11, i64 32, !11, i64 36, !12, i64 40, !11, i64 44, !11, i64 48, !12, i64 52, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96, !13, i64 104, !7, i64 112, !11, i64 116, !6, i64 120, !11, i64 128, !6, i64 136, !6, i64 144, !11, i64 152, !6, i64 160, !6, i64 168}
!11 = !{!"int", !7, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!"double", !7, i64 0}
!14 = !{!15, !11, i64 20}
!15 = !{!"", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 20, !11, i64 24}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!10, !11, i64 116}
!19 = !{!10, !12, i64 40}
!20 = !{i8 0, i8 2}
!21 = !{}
!22 = !{!10, !11, i64 128}
!23 = !{!11, !11, i64 0}
!24 = !{!10, !6, i64 136}
!25 = !{!13, !13, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = distinct !{!28, !27}
!29 = !{!10, !11, i64 0}
!30 = !{!10, !13, i64 104}
!31 = !{!10, !13, i64 96}
!32 = !{!10, !6, i64 120}
!33 = distinct !{!33, !27}
!34 = !{!10, !13, i64 72}
!35 = !{!10, !13, i64 80}
!36 = !{!10, !13, i64 88}
!37 = distinct !{!37, !27}
!38 = !{!10, !6, i64 160}
!39 = !{!10, !7, i64 112}
!40 = !{!10, !6, i64 144}
!41 = !{!10, !13, i64 64}
!42 = !{!10, !13, i64 56}
!43 = distinct !{!43, !27}
!44 = !{!45, !17, i64 0}
!45 = !{!"", !17, i64 0, !6, i64 8, !6, i64 16, !17, i64 24, !11, i64 32, !6, i64 40}
!46 = distinct !{!46, !27}
!47 = !{!48, !11, i64 0}
!48 = !{!"", !11, i64 0, !17, i64 8, !6, i64 16}
!49 = !{!48, !17, i64 8}
!50 = !{!48, !6, i64 16}
!51 = !{!12, !12, i64 0}
!52 = distinct !{!52, !27}
!53 = distinct !{!53, !27}
!54 = distinct !{!54, !27}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.sim_result = type { i32, i64, ptr }

@.str = external hidden unnamed_addr constant [73 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [76 x i8], align 1
@__PRETTY_FUNCTION__.sim_config_run_on_cpu = external hidden unnamed_addr constant [47 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [31 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [40 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local ptr @spike_sender_ctx_init(ptr noundef, i64 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @spike_sender_ctx_free(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @sim_config_run_on_cpu(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.sim_result) align 8 %0, ptr nocapture noundef %1) local_unnamed_addr #0 {
  %3 = alloca [7 x ptr], align 16
  %4 = alloca [2 x i32], align 4
  %5 = getelementptr inbounds i8, ptr %1, i64 168
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %6, i64 20
  %8 = load i32, ptr %7, align 4, !tbaa !13
  %9 = zext i32 %8 to i64
  %10 = getelementptr inbounds i8, ptr %1, i64 116
  %11 = load i32, ptr %10, align 4, !tbaa !15
  %12 = zext i32 %11 to i64
  %13 = getelementptr inbounds i8, ptr %1, i64 40
  %14 = load i8, ptr %13, align 8, !tbaa !16, !range !17, !noundef !18
  %15 = trunc nuw i8 %14 to i1
  %16 = select i1 %15, i64 8, i64 4
  %17 = shl nuw nsw i64 %12, 6
  %18 = tail call ptr @aligned_calloc(i64 noundef %17, i64 noundef 4) #11
  %19 = tail call ptr @aligned_calloc(i64 noundef %9, i64 noundef 1) #11
  %20 = tail call ptr @aligned_calloc(i64 noundef %9, i64 noundef %16) #11
  %21 = getelementptr inbounds i8, ptr %1, i64 128
  %22 = load i32, ptr %21, align 8, !tbaa !19
  %23 = zext i32 %22 to i64
  %24 = tail call ptr @aligned_calloc(i64 noundef %23, i64 noundef %16) #11
  %25 = load i32, ptr %21, align 8, !tbaa !19
  %.not177 = icmp eq i32 %25, 0
  br i1 %.not177, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %26 = getelementptr inbounds i8, ptr %1, i64 136
  br label %34

._crit_edge:                                      ; preds = %34, %2
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = tail call ptr @synapse_index_partition_by_delay(ptr noundef %27, i32 noundef 7) #11
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  tail call void @synapse_index_free(ptr noundef %29) #11
  store ptr %28, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %3) #11
  %30 = tail call ptr @synced_queue_init(i64 noundef 512) #11
  store ptr %30, ptr %3, align 16, !tbaa !20
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = tail call ptr @spike_sender_ctx_init(ptr noundef %18, i64 noundef %12, ptr noundef %30, i32 noundef 0, ptr noundef %31)
  %33 = tail call i32 @pthread_create(ptr noundef %32, ptr noundef null, ptr noundef nonnull @spike_sender_run, ptr noundef %32) #11
  %.not153 = icmp eq i32 %33, 0
  br i1 %.not153, label %43, label %91

34:                                               ; preds = %.lr.ph, %34
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %34 ]
  %35 = load ptr, ptr %26, align 8, !tbaa !21
  %36 = getelementptr inbounds double, ptr %35, i64 %indvars.iv
  %37 = load double, ptr %36, align 8, !tbaa !22
  %38 = load i8, ptr %13, align 8, !tbaa !16, !range !17, !noundef !18
  %39 = trunc nuw i8 %38 to i1
  tail call void @mprec_write_double(ptr noundef %24, i64 noundef %indvars.iv, double noundef %37, i1 noundef zeroext %39) #11
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %40 = load i32, ptr %21, align 8, !tbaa !19
  %41 = zext i32 %40 to i64
  %42 = icmp ult i64 %indvars.iv.next, %41
  br i1 %42, label %34, label %._crit_edge, !llvm.loop !23

43:                                               ; preds = %._crit_edge
  %44 = tail call ptr @synced_queue_init(i64 noundef 512) #11
  %45 = getelementptr inbounds i8, ptr %3, i64 8
  store ptr %44, ptr %45, align 8, !tbaa !20
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = tail call ptr @spike_sender_ctx_init(ptr noundef %18, i64 noundef %12, ptr noundef %44, i32 noundef 1, ptr noundef %46)
  %48 = tail call i32 @pthread_create(ptr noundef %47, ptr noundef null, ptr noundef nonnull @spike_sender_run, ptr noundef %47) #11
  %.not153.1 = icmp eq i32 %48, 0
  br i1 %.not153.1, label %49, label %91

49:                                               ; preds = %43
  %50 = tail call ptr @synced_queue_init(i64 noundef 512) #11
  %51 = getelementptr inbounds i8, ptr %3, i64 16
  store ptr %50, ptr %51, align 16, !tbaa !20
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = tail call ptr @spike_sender_ctx_init(ptr noundef %18, i64 noundef %12, ptr noundef %50, i32 noundef 2, ptr noundef %52)
  %54 = tail call i32 @pthread_create(ptr noundef %53, ptr noundef null, ptr noundef nonnull @spike_sender_run, ptr noundef %53) #11
  %.not153.2 = icmp eq i32 %54, 0
  br i1 %.not153.2, label %55, label %91

55:                                               ; preds = %49
  %56 = tail call ptr @synced_queue_init(i64 noundef 512) #11
  %57 = getelementptr inbounds i8, ptr %3, i64 24
  store ptr %56, ptr %57, align 8, !tbaa !20
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = tail call ptr @spike_sender_ctx_init(ptr noundef %18, i64 noundef %12, ptr noundef %56, i32 noundef 3, ptr noundef %58)
  %60 = tail call i32 @pthread_create(ptr noundef %59, ptr noundef null, ptr noundef nonnull @spike_sender_run, ptr noundef %59) #11
  %.not153.3 = icmp eq i32 %60, 0
  br i1 %.not153.3, label %61, label %91

61:                                               ; preds = %55
  %62 = tail call ptr @synced_queue_init(i64 noundef 512) #11
  %63 = getelementptr inbounds i8, ptr %3, i64 32
  store ptr %62, ptr %63, align 16, !tbaa !20
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = tail call ptr @spike_sender_ctx_init(ptr noundef %18, i64 noundef %12, ptr noundef %62, i32 noundef 4, ptr noundef %64)
  %66 = tail call i32 @pthread_create(ptr noundef %65, ptr noundef null, ptr noundef nonnull @spike_sender_run, ptr noundef %65) #11
  %.not153.4 = icmp eq i32 %66, 0
  br i1 %.not153.4, label %67, label %91

67:                                               ; preds = %61
  %68 = tail call ptr @synced_queue_init(i64 noundef 512) #11
  %69 = getelementptr inbounds i8, ptr %3, i64 40
  store ptr %68, ptr %69, align 8, !tbaa !20
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = tail call ptr @spike_sender_ctx_init(ptr noundef %18, i64 noundef %12, ptr noundef %68, i32 noundef 5, ptr noundef %70)
  %72 = tail call i32 @pthread_create(ptr noundef %71, ptr noundef null, ptr noundef nonnull @spike_sender_run, ptr noundef %71) #11
  %.not153.5 = icmp eq i32 %72, 0
  br i1 %.not153.5, label %73, label %91

73:                                               ; preds = %67
  %74 = tail call ptr @synced_queue_init(i64 noundef 512) #11
  %75 = getelementptr inbounds i8, ptr %3, i64 48
  store ptr %74, ptr %75, align 16, !tbaa !20
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = tail call ptr @spike_sender_ctx_init(ptr noundef %18, i64 noundef %12, ptr noundef %74, i32 noundef 6, ptr noundef %76)
  %78 = tail call i32 @pthread_create(ptr noundef %77, ptr noundef null, ptr noundef nonnull @spike_sender_run, ptr noundef %77) #11
  %.not153.6 = icmp eq i32 %78, 0
  br i1 %.not153.6, label %79, label %91

79:                                               ; preds = %73
  %80 = load i32, ptr %1, align 8, !tbaa !25
  %81 = zext i32 %80 to i64
  %82 = mul nuw i64 %81, %9
  %83 = tail call noalias ptr @calloc(i64 noundef %82, i64 noundef 1) #12
  %84 = tail call noalias ptr @calloc(i64 noundef %9, i64 noundef %16) #12
  %85 = getelementptr inbounds i8, ptr %1, i64 104
  %86 = load double, ptr %85, align 8, !tbaa !26
  %87 = getelementptr inbounds i8, ptr %1, i64 96
  %88 = load double, ptr %87, align 8, !tbaa !27
  %89 = fsub double %86, %88
  %.not178 = icmp eq i32 %8, 0
  br i1 %.not178, label %._crit_edge160, label %.lr.ph159

.lr.ph159:                                        ; preds = %79
  %90 = getelementptr inbounds i8, ptr %1, i64 120
  br label %111

91:                                               ; preds = %73, %67, %61, %55, %49, %43, %._crit_edge
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 253, ptr noundef nonnull @__PRETTY_FUNCTION__.sim_config_run_on_cpu) #13
  unreachable

._crit_edge160:                                   ; preds = %111, %79
  %92 = getelementptr inbounds i8, ptr %1, i64 72
  %93 = load double, ptr %92, align 8, !tbaa !28
  %94 = getelementptr inbounds i8, ptr %1, i64 80
  %95 = load double, ptr %94, align 8, !tbaa !29
  %96 = getelementptr inbounds i8, ptr %1, i64 88
  %97 = load double, ptr %96, align 8, !tbaa !30
  %98 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.2, i32 noundef 7)
  %99 = tail call i64 (...) @nano_count() #11
  %100 = load i32, ptr %1, align 8, !tbaa !25
  %.not179 = icmp eq i32 %100, 0
  br i1 %.not179, label %.preheader154, label %.lr.ph164

.lr.ph164:                                        ; preds = %._crit_edge160
  %101 = getelementptr inbounds i8, ptr %1, i64 160
  %102 = getelementptr inbounds i8, ptr %1, i64 112
  %103 = fptrunc double %93 to float
  %104 = fptrunc double %95 to float
  %105 = fptrunc double %97 to float
  %106 = fptrunc double %89 to float
  %107 = getelementptr inbounds i8, ptr %1, i64 144
  %108 = getelementptr inbounds i8, ptr %1, i64 64
  %109 = getelementptr inbounds i8, ptr %1, i64 56
  %110 = shl nuw nsw i64 %12, 2
  br label %123

111:                                              ; preds = %.lr.ph159, %111
  %.0149157 = phi i64 [ 0, %.lr.ph159 ], [ %119, %111 ]
  %112 = load ptr, ptr %90, align 8, !tbaa !31
  %113 = getelementptr inbounds double, ptr %112, i64 %.0149157
  %114 = load double, ptr %113, align 8, !tbaa !22
  %115 = load double, ptr %87, align 8, !tbaa !27
  %116 = fsub double %114, %115
  %117 = load i8, ptr %13, align 8, !tbaa !16, !range !17, !noundef !18
  %118 = trunc nuw i8 %117 to i1
  tail call void @mprec_write_double(ptr noundef %84, i64 noundef %.0149157, double noundef %116, i1 noundef zeroext %118) #11
  %119 = add nuw nsw i64 %.0149157, 1
  %exitcond.not = icmp eq i64 %119, %9
  br i1 %exitcond.not, label %._crit_edge160, label %111, !llvm.loop !32

.preheader154.loopexit:                           ; preds = %160
  %.pre = load ptr, ptr %3, align 16, !tbaa !20
  br label %.preheader154

.preheader154:                                    ; preds = %.preheader154.loopexit, %._crit_edge160
  %120 = phi ptr [ %.pre, %.preheader154.loopexit ], [ %30, %._crit_edge160 ]
  call void @synced_queue_add(ptr noundef %120, i32 noundef -16777216) #11
  %121 = load i64, ptr %32, align 8, !tbaa !33
  %122 = call i32 @pthread_join(i64 noundef %121, ptr noundef null) #11
  %.not = icmp eq i32 %122, 0
  br i1 %.not, label %165, label %212

123:                                              ; preds = %.lr.ph164, %160
  %.0150162 = phi i64 [ 0, %.lr.ph164 ], [ %161, %160 ]
  %124 = trunc i64 %.0150162 to i32
  %125 = or i32 %124, -33554432
  %126 = load ptr, ptr %3, align 16, !tbaa !20
  call void @synced_queue_add(ptr noundef %126, i32 noundef %125) #11
  %127 = load ptr, ptr %3, align 16, !tbaa !20
  call void @synced_queue_spin_while_nonempty(ptr noundef %127) #11
  %128 = load ptr, ptr %45, align 8, !tbaa !20
  call void @synced_queue_add(ptr noundef %128, i32 noundef %125) #11
  %129 = load ptr, ptr %45, align 8, !tbaa !20
  call void @synced_queue_spin_while_nonempty(ptr noundef %129) #11
  %130 = load ptr, ptr %51, align 16, !tbaa !20
  call void @synced_queue_add(ptr noundef %130, i32 noundef %125) #11
  %131 = load ptr, ptr %51, align 16, !tbaa !20
  call void @synced_queue_spin_while_nonempty(ptr noundef %131) #11
  %132 = load ptr, ptr %57, align 8, !tbaa !20
  call void @synced_queue_add(ptr noundef %132, i32 noundef %125) #11
  %133 = load ptr, ptr %57, align 8, !tbaa !20
  call void @synced_queue_spin_while_nonempty(ptr noundef %133) #11
  %134 = load ptr, ptr %63, align 16, !tbaa !20
  call void @synced_queue_add(ptr noundef %134, i32 noundef %125) #11
  %135 = load ptr, ptr %63, align 16, !tbaa !20
  call void @synced_queue_spin_while_nonempty(ptr noundef %135) #11
  %136 = load ptr, ptr %69, align 8, !tbaa !20
  call void @synced_queue_add(ptr noundef %136, i32 noundef %125) #11
  %137 = load ptr, ptr %69, align 8, !tbaa !20
  call void @synced_queue_spin_while_nonempty(ptr noundef %137) #11
  %138 = load ptr, ptr %75, align 16, !tbaa !20
  call void @synced_queue_add(ptr noundef %138, i32 noundef %125) #11
  %139 = load ptr, ptr %75, align 16, !tbaa !20
  call void @synced_queue_spin_while_nonempty(ptr noundef %139) #11
  %140 = and i32 %124, 63
  %141 = mul i32 %140, %11
  %142 = mul nuw i64 %.0150162, %12
  %143 = zext i32 %141 to i64
  %144 = getelementptr inbounds float, ptr %18, i64 %143
  %145 = load ptr, ptr %101, align 8, !tbaa !36
  %146 = getelementptr inbounds i8, ptr %145, i64 %142
  %147 = load i8, ptr %13, align 8, !tbaa !16, !range !17, !noundef !18
  %148 = trunc nuw i8 %147 to i1
  %149 = load i32, ptr %21, align 8, !tbaa !19
  %150 = load i8, ptr %102, align 8, !tbaa !37
  %151 = load ptr, ptr %107, align 8, !tbaa !38
  br i1 %148, label %152, label %155

152:                                              ; preds = %123
  call void @vm_update_double(i64 noundef %.0150162, i64 noundef %9, i32 noundef %149, i8 noundef zeroext %150, double noundef %93, double noundef %95, double noundef %97, double noundef %89, ptr noundef %151, ptr noundef %24, ptr noundef %84, ptr noundef %20, ptr noundef %19, ptr noundef nonnull %3, ptr noundef %83)
  %153 = load double, ptr %108, align 8, !tbaa !39
  %154 = load double, ptr %109, align 8, !tbaa !40
  call void @psc_update_double(i64 noundef %9, double noundef %153, double noundef %154, ptr noundef %20, ptr noundef %146, ptr noundef %144)
  br label %160

155:                                              ; preds = %123
  call void @vm_update_single(i32 noundef %124, i64 noundef %9, i32 noundef %149, i8 noundef zeroext %150, float noundef %103, float noundef %104, float noundef %105, float noundef %106, ptr noundef %151, ptr noundef %24, ptr noundef %84, ptr noundef %20, ptr noundef %19, ptr noundef nonnull %3, ptr noundef %83)
  %156 = load double, ptr %108, align 8, !tbaa !39
  %157 = fptrunc double %156 to float
  %158 = load double, ptr %109, align 8, !tbaa !40
  %159 = fptrunc double %158 to float
  call void @psc_update_single(i64 noundef %9, float noundef %157, float noundef %159, ptr noundef %20, ptr noundef %146, ptr noundef %144)
  br label %160

160:                                              ; preds = %155, %152
  call void @llvm.memset.p0.i64(ptr align 4 %144, i8 0, i64 %110, i1 false)
  %161 = add nuw nsw i64 %.0150162, 1
  %162 = load i32, ptr %1, align 8, !tbaa !25
  %163 = zext i32 %162 to i64
  %164 = icmp ult i64 %161, %163
  br i1 %164, label %123, label %.preheader154.loopexit, !llvm.loop !41

165:                                              ; preds = %.preheader154
  %166 = load ptr, ptr %45, align 8, !tbaa !20
  call void @synced_queue_add(ptr noundef %166, i32 noundef -16777216) #11
  %167 = load i64, ptr %47, align 8, !tbaa !33
  %168 = call i32 @pthread_join(i64 noundef %167, ptr noundef null) #11
  %.not.1 = icmp eq i32 %168, 0
  br i1 %.not.1, label %169, label %212

169:                                              ; preds = %165
  %170 = load ptr, ptr %51, align 16, !tbaa !20
  call void @synced_queue_add(ptr noundef %170, i32 noundef -16777216) #11
  %171 = load i64, ptr %53, align 8, !tbaa !33
  %172 = call i32 @pthread_join(i64 noundef %171, ptr noundef null) #11
  %.not.2 = icmp eq i32 %172, 0
  br i1 %.not.2, label %173, label %212

173:                                              ; preds = %169
  %174 = load ptr, ptr %57, align 8, !tbaa !20
  call void @synced_queue_add(ptr noundef %174, i32 noundef -16777216) #11
  %175 = load i64, ptr %59, align 8, !tbaa !33
  %176 = call i32 @pthread_join(i64 noundef %175, ptr noundef null) #11
  %.not.3 = icmp eq i32 %176, 0
  br i1 %.not.3, label %177, label %212

177:                                              ; preds = %173
  %178 = load ptr, ptr %63, align 16, !tbaa !20
  call void @synced_queue_add(ptr noundef %178, i32 noundef -16777216) #11
  %179 = load i64, ptr %65, align 8, !tbaa !33
  %180 = call i32 @pthread_join(i64 noundef %179, ptr noundef null) #11
  %.not.4 = icmp eq i32 %180, 0
  br i1 %.not.4, label %181, label %212

181:                                              ; preds = %177
  %182 = load ptr, ptr %69, align 8, !tbaa !20
  call void @synced_queue_add(ptr noundef %182, i32 noundef -16777216) #11
  %183 = load i64, ptr %71, align 8, !tbaa !33
  %184 = call i32 @pthread_join(i64 noundef %183, ptr noundef null) #11
  %.not.5 = icmp eq i32 %184, 0
  br i1 %.not.5, label %185, label %212

185:                                              ; preds = %181
  %186 = load ptr, ptr %75, align 16, !tbaa !20
  call void @synced_queue_add(ptr noundef %186, i32 noundef -16777216) #11
  %187 = load i64, ptr %77, align 8, !tbaa !33
  %188 = call i32 @pthread_join(i64 noundef %187, ptr noundef null) #11
  %.not.6 = icmp eq i32 %188, 0
  br i1 %.not.6, label %189, label %212

189:                                              ; preds = %185
  %190 = getelementptr inbounds i8, ptr %0, i64 8
  %191 = call i64 (...) @nano_count() #11
  %192 = sub i64 %191, %99
  store i64 %192, ptr %190, align 8, !tbaa !42
  %193 = load i32, ptr %1, align 8, !tbaa !25
  %194 = zext i32 %193 to i64
  %.not180 = icmp eq i32 %193, 0
  %brmerge = or i1 %.not180, %.not178
  br i1 %brmerge, label %._crit_edge172, label %.preheader.us.preheader

.preheader.us.preheader:                          ; preds = %189
  %min.iters.check = icmp ult i32 %8, 8
  %n.vec = and i64 %9, 4294967288
  %cmp.n = icmp eq i64 %n.vec, %9
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge169.us
  %.0145171.us = phi i64 [ %211, %._crit_edge169.us ], [ 0, %.preheader.us.preheader ]
  %195 = phi i32 [ %210, %._crit_edge169.us ], [ 0, %.preheader.us.preheader ]
  %196 = mul nuw i64 %.0145171.us, %9
  %197 = getelementptr i8, ptr %83, i64 %196
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.body

vector.body:                                      ; preds = %.preheader.us, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %.preheader.us ]
  %vec.phi = phi <4 x i32> [ %202, %vector.body ], [ zeroinitializer, %.preheader.us ]
  %vec.phi208 = phi <4 x i32> [ %203, %vector.body ], [ zeroinitializer, %.preheader.us ]
  %198 = getelementptr i8, ptr %197, i64 %index
  %199 = getelementptr i8, ptr %198, i64 4
  %wide.load = load <4 x i8>, ptr %198, align 1, !tbaa !44
  %wide.load209 = load <4 x i8>, ptr %199, align 1, !tbaa !44
  %200 = zext <4 x i8> %wide.load to <4 x i32>
  %201 = zext <4 x i8> %wide.load209 to <4 x i32>
  %202 = add <4 x i32> %vec.phi, %200
  %203 = add <4 x i32> %vec.phi208, %201
  %index.next = add nuw i64 %index, 8
  %204 = icmp eq i64 %index.next, %n.vec
  br i1 %204, label %middle.block, label %vector.body, !llvm.loop !45

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %203, %202
  %205 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %._crit_edge169.us, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader.us
  %.0143167.us.ph = phi i64 [ 0, %.preheader.us ], [ %n.vec, %middle.block ]
  %.0144166.us.ph = phi i32 [ 0, %.preheader.us ], [ %205, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %.0143167.us = phi i64 [ %209, %scalar.ph ], [ %.0143167.us.ph, %scalar.ph.preheader ]
  %.0144166.us = phi i32 [ %spec.select.us, %scalar.ph ], [ %.0144166.us.ph, %scalar.ph.preheader ]
  %206 = getelementptr i8, ptr %197, i64 %.0143167.us
  %207 = load i8, ptr %206, align 1, !tbaa !44, !range !17, !noundef !18
  %208 = zext nneg i8 %207 to i32
  %spec.select.us = add i32 %.0144166.us, %208
  %209 = add nuw nsw i64 %.0143167.us, 1
  %exitcond195.not = icmp eq i64 %209, %9
  br i1 %exitcond195.not, label %._crit_edge169.us, label %scalar.ph, !llvm.loop !48

._crit_edge169.us:                                ; preds = %scalar.ph, %middle.block
  %spec.select.us.lcssa = phi i32 [ %205, %middle.block ], [ %spec.select.us, %scalar.ph ]
  %210 = add i32 %195, %spec.select.us.lcssa
  %211 = add nuw nsw i64 %.0145171.us, 1
  %exitcond196.not = icmp eq i64 %211, %194
  br i1 %exitcond196.not, label %._crit_edge172, label %.preheader.us, !llvm.loop !49

212:                                              ; preds = %185, %181, %177, %173, %169, %165, %.preheader154
  call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 307, ptr noundef nonnull @__PRETTY_FUNCTION__.sim_config_run_on_cpu) #13
  unreachable

._crit_edge172:                                   ; preds = %._crit_edge169.us, %189
  %.lcssa170 = phi i32 [ 0, %189 ], [ %210, %._crit_edge169.us ]
  %213 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 %.lcssa170, ptr %0, align 8, !tbaa !50
  store i32 %193, ptr %4, align 4, !tbaa !51
  %214 = getelementptr inbounds i8, ptr %4, i64 4
  store i32 %8, ptr %214, align 4, !tbaa !51
  %215 = call ptr @npy_init(i8 noundef signext 98, i32 noundef 1, i32 noundef 2, ptr noundef nonnull %4, ptr noundef %83, i1 noundef zeroext true) #11
  store ptr %215, ptr %213, align 8, !tbaa !52
  call void @spike_sender_ctx_free(ptr noundef nonnull %32)
  %216 = load ptr, ptr %3, align 16, !tbaa !20
  call void @synced_queue_free(ptr noundef %216) #11
  call void @spike_sender_ctx_free(ptr noundef nonnull %47)
  %217 = load ptr, ptr %45, align 8, !tbaa !20
  call void @synced_queue_free(ptr noundef %217) #11
  call void @spike_sender_ctx_free(ptr noundef nonnull %53)
  %218 = load ptr, ptr %51, align 16, !tbaa !20
  call void @synced_queue_free(ptr noundef %218) #11
  call void @spike_sender_ctx_free(ptr noundef nonnull %59)
  %219 = load ptr, ptr %57, align 8, !tbaa !20
  call void @synced_queue_free(ptr noundef %219) #11
  call void @spike_sender_ctx_free(ptr noundef nonnull %65)
  %220 = load ptr, ptr %63, align 16, !tbaa !20
  call void @synced_queue_free(ptr noundef %220) #11
  call void @spike_sender_ctx_free(ptr noundef nonnull %71)
  %221 = load ptr, ptr %69, align 8, !tbaa !20
  call void @synced_queue_free(ptr noundef %221) #11
  call void @spike_sender_ctx_free(ptr noundef nonnull %77)
  %222 = load ptr, ptr %75, align 16, !tbaa !20
  call void @synced_queue_free(ptr noundef %222) #11
  call void @free(ptr noundef %24) #11
  call void @free(ptr noundef %84) #11
  call void @free(ptr noundef %20) #11
  call void @free(ptr noundef %19) #11
  call void @free(ptr noundef %18) #11
  call void @free(ptr noundef %83) #11
  call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %3) #11
  ret void
}

declare ptr @aligned_calloc(i64 noundef, i64 noundef) local_unnamed_addr #3

declare void @mprec_write_double(ptr noundef, i64 noundef, double noundef, i1 noundef zeroext) local_unnamed_addr #3

declare ptr @synapse_index_partition_by_delay(ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @synapse_index_free(ptr noundef) local_unnamed_addr #3

declare ptr @synced_queue_init(i64 noundef) local_unnamed_addr #3

; Function Attrs: nounwind
declare i32 @pthread_create(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #4

; Function Attrs: nounwind uwtable
declare hidden ptr @spike_sender_run(ptr noundef) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,zeroed") allocsize(0,1) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @calloc(i64 noundef, i64 noundef) local_unnamed_addr #6

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #7

declare i64 @nano_count(...) local_unnamed_addr #3

declare void @synced_queue_add(ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @synced_queue_spin_while_nonempty(ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @vm_update_double(i64 noundef, i64 noundef, i32 noundef, i8 noundef zeroext, double noundef, double noundef, double noundef, double noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #8

; Function Attrs: nounwind uwtable
declare hidden void @psc_update_double(i64 noundef, double noundef, double noundef, ptr noalias noundef, ptr noalias noundef, ptr noalias noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @vm_update_single(i32 noundef, i64 noundef, i32 noundef, i8 noundef zeroext, float noundef, float noundef, float noundef, float noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #8

; Function Attrs: nounwind uwtable
declare hidden void @psc_update_single(i64 noundef, float noundef, float noundef, ptr noalias noundef, ptr noalias noundef, ptr noalias noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #9

declare i32 @pthread_join(i64 noundef, ptr noundef) local_unnamed_addr #3

declare ptr @npy_init(i8 noundef signext, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i1 noundef zeroext) local_unnamed_addr #3

declare void @synced_queue_free(ptr noundef) local_unnamed_addr #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #10

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nofree nounwind willreturn allockind("alloc,zeroed") allocsize(0,1) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #9 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #10 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #11 = { nounwind }
attributes #12 = { nounwind allocsize(0,1) }
attributes #13 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 168}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 16, !10, i64 24, !7, i64 32, !7, i64 36, !11, i64 40, !7, i64 44, !7, i64 48, !11, i64 52, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !8, i64 112, !7, i64 116, !10, i64 120, !7, i64 128, !10, i64 136, !10, i64 144, !7, i64 152, !10, i64 160, !10, i64 168}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"_Bool", !8, i64 0}
!12 = !{!"double", !8, i64 0}
!13 = !{!14, !7, i64 20}
!14 = !{!"", !10, i64 0, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24}
!15 = !{!6, !7, i64 116}
!16 = !{!6, !11, i64 40}
!17 = !{i8 0, i8 2}
!18 = !{}
!19 = !{!6, !7, i64 128}
!20 = !{!10, !10, i64 0}
!21 = !{!6, !10, i64 136}
!22 = !{!12, !12, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = !{!6, !7, i64 0}
!26 = !{!6, !12, i64 104}
!27 = !{!6, !12, i64 96}
!28 = !{!6, !12, i64 72}
!29 = !{!6, !12, i64 80}
!30 = !{!6, !12, i64 88}
!31 = !{!6, !10, i64 120}
!32 = distinct !{!32, !24}
!33 = !{!34, !35, i64 0}
!34 = !{!"", !35, i64 0, !10, i64 8, !10, i64 16, !35, i64 24, !7, i64 32, !10, i64 40}
!35 = !{!"long", !8, i64 0}
!36 = !{!6, !10, i64 160}
!37 = !{!6, !8, i64 112}
!38 = !{!6, !10, i64 144}
!39 = !{!6, !12, i64 64}
!40 = !{!6, !12, i64 56}
!41 = distinct !{!41, !24}
!42 = !{!43, !35, i64 8}
!43 = !{!"", !7, i64 0, !35, i64 8, !10, i64 16}
!44 = !{!11, !11, i64 0}
!45 = distinct !{!45, !24, !46, !47}
!46 = !{!"llvm.loop.isvectorized", i32 1}
!47 = !{!"llvm.loop.unroll.runtime.disable"}
!48 = distinct !{!48, !24, !47, !46}
!49 = distinct !{!49, !24}
!50 = !{!43, !7, i64 0}
!51 = !{!7, !7, i64 0}
!52 = !{!43, !10, i64 16}


; Effective O3 passes: AggressiveInstCombinePass,CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass