; LLVM IR from ERGO-Code/HiGHS :: src/util/HFactor.ll (ZNK7HFactor7ftranFTER11HVectorBaseIdE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HVectorBase = type { i32, i32, %"class.std::vector", %"class.std::vector.10", double, %"class.std::vector.15", %"class.std::vector", ptr, i8, i32, %"class.std::vector", %"class.std::vector.10" }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HFactor = type { double, double, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %struct.RefactorInfo, i32, i32, i32, i32, i32, i32, i32, double, i8, ptr, ptr, ptr, ptr, double, double, i32, double, %"class.std::unique_ptr", %struct.HighsLogOptions, i8, i8, i32, i32, ptr, i32, %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.15", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %class.HVectorBase }
%struct.RefactorInfo = type { i8, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", double }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::unique_ptr" = type { %"struct.std::__uniq_ptr_data" }
%"struct.std::__uniq_ptr_data" = type { %"class.std::__uniq_ptr_impl" }
%"class.std::__uniq_ptr_impl" = type { %"class.std::tuple" }
%"class.std::tuple" = type { %"struct.std::_Tuple_impl" }
%"struct.std::_Tuple_impl" = type { %"struct.std::_Head_base.9" }
%"struct.std::_Head_base.9" = type { ptr }
%struct.HighsLogOptions = type <{ ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::function", ptr, i8, [7 x i8] }>
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }

@.str.52 = external hidden unnamed_addr constant [70 x i8], align 1
@.str.81 = external hidden unnamed_addr constant [18 x i8], align 1
@__PRETTY_FUNCTION__._ZNK7HFactor7ftranFTER11HVectorBaseIdE = external hidden unnamed_addr constant [39 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNKSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK7HFactor7ftranFTER11HVectorBaseIdE(ptr noundef nonnull align 8 dereferenceable(1912) %0, ptr noundef nonnull align 8 dereferenceable(176) %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca double, align 8
  %17 = alloca double, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %21 = load ptr, ptr %3, align 8
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %class.HVectorBase, ptr %22, i32 0, i32 1
  %24 = load i32, ptr %23, align 4, !tbaa !9
  %25 = icmp sge i32 %24, 0
  br i1 %25, label %26, label %27

26:                                               ; preds = %2
  br label %29

27:                                               ; preds = %2
  call void @__assert_fail(ptr noundef @.str.81, ptr noundef @.str.52, i32 noundef 1850, ptr noundef @__PRETTY_FUNCTION__._ZNK7HFactor7ftranFTER11HVectorBaseIdE) #4
  unreachable

28:                                               ; No predecessors!
  br label %29

29:                                               ; preds = %28, %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = getelementptr inbounds %class.HVectorBase, ptr %30, i32 0, i32 1
  %32 = load i32, ptr %31, align 4, !tbaa !9
  store i32 %32, ptr %5, align 4, !tbaa !26
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %class.HVectorBase, ptr %33, i32 0, i32 2
  %35 = call noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %34) #5
  store ptr %35, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %class.HVectorBase, ptr %36, i32 0, i32 3
  %38 = call noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %37) #5
  store ptr %38, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %39 = getelementptr inbounds %class.HFactor, ptr %21, i32 0, i32 84
  %40 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %39) #5
  %41 = trunc i64 %40 to i32
  store i32 %41, ptr %8, align 4, !tbaa !26
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %42 = getelementptr inbounds %class.HFactor, ptr %21, i32 0, i32 84
  %43 = call noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %42) #5
  store ptr %43, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %44 = getelementptr inbounds %class.HFactor, ptr %21, i32 0, i32 85
  %45 = call noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %44) #5
  store ptr %45, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %46 = getelementptr inbounds %class.HFactor, ptr %21, i32 0, i32 86
  %47 = call noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %46) #5
  store ptr %47, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %48 = getelementptr inbounds %class.HFactor, ptr %21, i32 0, i32 87
  %49 = call noundef ptr @_ZNKSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %48) #5
  store ptr %49, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !26
  br label %50

50:                                               ; preds = %135, %29
  %51 = load i32, ptr %13, align 4, !tbaa !26
  %52 = load i32, ptr %8, align 4, !tbaa !26
  %53 = icmp slt i32 %51, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %50
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %138

55:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  %56 = load ptr, ptr %9, align 8, !tbaa !5
  %57 = load i32, ptr %13, align 4, !tbaa !26
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds i32, ptr %56, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !26
  store i32 %60, ptr %15, align 4, !tbaa !26
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  %61 = load ptr, ptr %7, align 8, !tbaa !5
  %62 = load i32, ptr %15, align 4, !tbaa !26
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds double, ptr %61, i64 %63
  %65 = load double, ptr %64, align 8, !tbaa !27
  store double %65, ptr %16, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #5
  %66 = load double, ptr %16, align 8, !tbaa !27
  store double %66, ptr %17, align 8, !tbaa !27
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  %67 = load ptr, ptr %10, align 8, !tbaa !5
  %68 = load i32, ptr %13, align 4, !tbaa !26
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds i32, ptr %67, i64 %69
  %71 = load i32, ptr %70, align 4, !tbaa !26
  store i32 %71, ptr %18, align 4, !tbaa !26
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  %72 = load ptr, ptr %10, align 8, !tbaa !5
  %73 = load i32, ptr %13, align 4, !tbaa !26
  %74 = add nsw i32 %73, 1
  %75 = sext i32 %74 to i64
  %76 = getelementptr inbounds i32, ptr %72, i64 %75
  %77 = load i32, ptr %76, align 4, !tbaa !26
  store i32 %77, ptr %19, align 4, !tbaa !26
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  %78 = load i32, ptr %18, align 4, !tbaa !26
  store i32 %78, ptr %20, align 4, !tbaa !26
  br label %79

79:                                               ; preds = %102, %55
  %80 = load i32, ptr %20, align 4, !tbaa !26
  %81 = load i32, ptr %19, align 4, !tbaa !26
  %82 = icmp slt i32 %80, %81
  br i1 %82, label %84, label %83

83:                                               ; preds = %79
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  br label %105

84:                                               ; preds = %79
  %85 = load ptr, ptr %7, align 8, !tbaa !5
  %86 = load ptr, ptr %11, align 8, !tbaa !5
  %87 = load i32, ptr %20, align 4, !tbaa !26
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds i32, ptr %86, i64 %88
  %90 = load i32, ptr %89, align 4, !tbaa !26
  %91 = sext i32 %90 to i64
  %92 = getelementptr inbounds double, ptr %85, i64 %91
  %93 = load double, ptr %92, align 8, !tbaa !27
  %94 = load ptr, ptr %12, align 8, !tbaa !5
  %95 = load i32, ptr %20, align 4, !tbaa !26
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds double, ptr %94, i64 %96
  %98 = load double, ptr %97, align 8, !tbaa !27
  %99 = load double, ptr %17, align 8, !tbaa !27
  %100 = fneg double %93
  %101 = call double @llvm.fmuladd.f64(double %100, double %98, double %99)
  store double %101, ptr %17, align 8, !tbaa !27
  br label %102

102:                                              ; preds = %84
  %103 = load i32, ptr %20, align 4, !tbaa !26
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %20, align 4, !tbaa !26
  br label %79, !llvm.loop !28

105:                                              ; preds = %83
  %106 = load double, ptr %16, align 8, !tbaa !27
  %107 = fcmp une double %106, 0.000000e+00
  br i1 %107, label %111, label %108

108:                                              ; preds = %105
  %109 = load double, ptr %17, align 8, !tbaa !27
  %110 = fcmp une double %109, 0.000000e+00
  br i1 %110, label %111, label %134

111:                                              ; preds = %108, %105
  %112 = load double, ptr %16, align 8, !tbaa !27
  %113 = fcmp oeq double %112, 0.000000e+00
  br i1 %113, label %114, label %121

114:                                              ; preds = %111
  %115 = load i32, ptr %15, align 4, !tbaa !26
  %116 = load ptr, ptr %6, align 8, !tbaa !5
  %117 = load i32, ptr %5, align 4, !tbaa !26
  %118 = add nsw i32 %117, 1
  store i32 %118, ptr %5, align 4, !tbaa !26
  %119 = sext i32 %117 to i64
  %120 = getelementptr inbounds i32, ptr %116, i64 %119
  store i32 %115, ptr %120, align 4, !tbaa !26
  br label %121

121:                                              ; preds = %114, %111
  %122 = load double, ptr %17, align 8, !tbaa !27
  %123 = call double @llvm.fabs.f64(double %122)
  %124 = fcmp olt double %123, 0x3D06849B86A12B9B
  br i1 %124, label %125, label %126

125:                                              ; preds = %121
  br label %128

126:                                              ; preds = %121
  %127 = load double, ptr %17, align 8, !tbaa !27
  br label %128

128:                                              ; preds = %126, %125
  %129 = phi double [ 1.000000e-50, %125 ], [ %127, %126 ]
  %130 = load ptr, ptr %7, align 8, !tbaa !5
  %131 = load i32, ptr %15, align 4, !tbaa !26
  %132 = sext i32 %131 to i64
  %133 = getelementptr inbounds double, ptr %130, i64 %132
  store double %129, ptr %133, align 8, !tbaa !27
  br label %134

134:                                              ; preds = %128, %108
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  br label %135

135:                                              ; preds = %134
  %136 = load i32, ptr %13, align 4, !tbaa !26
  %137 = add nsw i32 %136, 1
  store i32 %137, ptr %13, align 4, !tbaa !26
  br label %50, !llvm.loop !30

138:                                              ; preds = %54
  %139 = load i32, ptr %5, align 4, !tbaa !26
  %140 = load ptr, ptr %4, align 8, !tbaa !5
  %141 = getelementptr inbounds %class.HVectorBase, ptr %140, i32 0, i32 1
  store i32 %139, ptr %141, align 4, !tbaa !9
  %142 = load i32, ptr %8, align 4, !tbaa !26
  %143 = mul nsw i32 %142, 20
  %144 = load ptr, ptr %10, align 8, !tbaa !5
  %145 = load i32, ptr %8, align 4, !tbaa !26
  %146 = sext i32 %145 to i64
  %147 = getelementptr inbounds i32, ptr %144, i64 %146
  %148 = load i32, ptr %147, align 4, !tbaa !26
  %149 = mul nsw i32 %148, 5
  %150 = add nsw i32 %143, %149
  %151 = sitofp i32 %150 to double
  %152 = load ptr, ptr %4, align 8, !tbaa !5
  %153 = getelementptr inbounds %class.HVectorBase, ptr %152, i32 0, i32 4
  %154 = load double, ptr %153, align 8, !tbaa !31
  %155 = fadd double %154, %151
  store double %155, ptr %153, align 8, !tbaa !31
  %156 = load ptr, ptr %10, align 8, !tbaa !5
  %157 = load i32, ptr %8, align 4, !tbaa !26
  %158 = sext i32 %157 to i64
  %159 = getelementptr inbounds i32, ptr %156, i64 %158
  %160 = load i32, ptr %159, align 4, !tbaa !26
  %161 = load i32, ptr %8, align 4, !tbaa !26
  %162 = add nsw i32 %161, 1
  %163 = sdiv i32 %160, %162
  %164 = icmp slt i32 %163, 5
  br i1 %164, label %165, label %177

165:                                              ; preds = %138
  %166 = load ptr, ptr %10, align 8, !tbaa !5
  %167 = load i32, ptr %8, align 4, !tbaa !26
  %168 = sext i32 %167 to i64
  %169 = getelementptr inbounds i32, ptr %166, i64 %168
  %170 = load i32, ptr %169, align 4, !tbaa !26
  %171 = mul nsw i32 %170, 5
  %172 = sitofp i32 %171 to double
  %173 = load ptr, ptr %4, align 8, !tbaa !5
  %174 = getelementptr inbounds %class.HVectorBase, ptr %173, i32 0, i32 4
  %175 = load double, ptr %174, align 8, !tbaa !31
  %176 = fadd double %175, %172
  store double %176, ptr %174, align 8, !tbaa !31
  br label %177

177:                                              ; preds = %165, %138
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"_ZTS11HVectorBaseIdE", !11, i64 0, !11, i64 4, !12, i64 8, !16, i64 32, !20, i64 56, !21, i64 64, !12, i64 88, !6, i64 112, !25, i64 120, !11, i64 124, !12, i64 128, !16, i64 152}
!11 = !{!"int", !7, i64 0}
!12 = !{!"_ZTSSt6vectorIiSaIiEE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"double", !7, i64 0}
!21 = !{!"_ZTSSt6vectorIcSaIcEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"bool", !7, i64 0}
!26 = !{!11, !11, i64 0}
!27 = !{!20, !20, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = distinct !{!30, !29}
!31 = !{!10, !20, i64 56}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.52 = external hidden unnamed_addr constant [70 x i8], align 1
@.str.81 = external hidden unnamed_addr constant [18 x i8], align 1
@__PRETTY_FUNCTION__._ZNK7HFactor7ftranFTER11HVectorBaseIdE = external hidden unnamed_addr constant [39 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNKSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK7HFactor7ftranFTER11HVectorBaseIdE(ptr noundef nonnull align 8 dereferenceable(1912) %0, ptr noundef nonnull align 8 dereferenceable(176) %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %1, i64 4
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = icmp sgt i32 %4, -1
  br i1 %5, label %7, label %6

6:                                                ; preds = %2
  tail call void @__assert_fail(ptr noundef nonnull @.str.81, ptr noundef nonnull @.str.52, i32 noundef 1850, ptr noundef nonnull @__PRETTY_FUNCTION__._ZNK7HFactor7ftranFTER11HVectorBaseIdE) #3
  unreachable

7:                                                ; preds = %2
  %8 = getelementptr inbounds i8, ptr %1, i64 8
  %9 = tail call noundef ptr @_ZNSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #4
  %10 = getelementptr inbounds i8, ptr %1, i64 32
  %11 = tail call noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #4
  %12 = getelementptr inbounds i8, ptr %0, i64 1640
  %13 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  %14 = trunc i64 %13 to i32
  %15 = tail call noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  %16 = getelementptr inbounds i8, ptr %0, i64 1664
  %17 = tail call noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #4
  %18 = getelementptr inbounds i8, ptr %0, i64 1688
  %19 = tail call noundef ptr @_ZNKSt6vectorIiSaIiEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #4
  %20 = getelementptr inbounds i8, ptr %0, i64 1712
  %21 = tail call noundef ptr @_ZNKSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #4
  %22 = icmp sgt i32 %14, 0
  br i1 %22, label %.lr.ph59.preheader, label %._crit_edge60

.lr.ph59.preheader:                               ; preds = %7
  %wide.trip.count66 = and i64 %13, 2147483647
  br label %.lr.ph59

._crit_edge60:                                    ; preds = %91, %7
  %.049.lcssa = phi i32 [ %4, %7 ], [ %.2, %91 ]
  store i32 %.049.lcssa, ptr %3, align 4, !tbaa !5
  %23 = mul nsw i32 %14, 20
  %sext = shl i64 %13, 32
  %24 = ashr exact i64 %sext, 30
  %25 = getelementptr inbounds i8, ptr %17, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !25
  %27 = mul nsw i32 %26, 5
  %28 = add nsw i32 %27, %23
  %29 = sitofp i32 %28 to double
  %30 = getelementptr inbounds i8, ptr %1, i64 56
  %31 = load double, ptr %30, align 8, !tbaa !26
  %32 = fadd double %31, %29
  %33 = add nsw i32 %14, 1
  %34 = sdiv i32 %26, %33
  %35 = icmp slt i32 %34, 5
  %36 = sitofp i32 %27 to double
  %37 = fadd double %32, %36
  %storemerge = select i1 %35, double %37, double %32
  store double %storemerge, ptr %30, align 8, !tbaa !26
  ret void

.lr.ph59:                                         ; preds = %.lr.ph59.preheader, %91
  %indvars.iv63 = phi i64 [ 0, %.lr.ph59.preheader ], [ %indvars.iv.next64, %91 ]
  %.04957 = phi i32 [ %4, %.lr.ph59.preheader ], [ %.2, %91 ]
  %38 = getelementptr inbounds i32, ptr %15, i64 %indvars.iv63
  %39 = load i32, ptr %38, align 4, !tbaa !25
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds double, ptr %11, i64 %40
  %42 = load double, ptr %41, align 8, !tbaa !27
  %43 = getelementptr inbounds i32, ptr %17, i64 %indvars.iv63
  %44 = load i32, ptr %43, align 4, !tbaa !25
  %indvars.iv.next64 = add nuw nsw i64 %indvars.iv63, 1
  %45 = getelementptr inbounds i32, ptr %17, i64 %indvars.iv.next64
  %46 = load i32, ptr %45, align 4, !tbaa !25
  %47 = icmp slt i32 %44, %46
  br i1 %47, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %.lr.ph59
  %48 = sext i32 %44 to i64
  %wide.trip.count = sext i32 %46 to i64
  %49 = sub nsw i64 %wide.trip.count, %48
  %xtraiter = and i64 %49, 1
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader
  %50 = getelementptr inbounds i32, ptr %19, i64 %48
  %51 = load i32, ptr %50, align 4, !tbaa !25
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds double, ptr %11, i64 %52
  %54 = load double, ptr %53, align 8, !tbaa !27
  %55 = getelementptr inbounds double, ptr %21, i64 %48
  %56 = load double, ptr %55, align 8, !tbaa !27
  %57 = fneg double %54
  %58 = tail call double @llvm.fmuladd.f64(double %57, double %56, double %42)
  %indvars.iv.next.prol = add nsw i64 %48, 1
  br label %.lr.ph.prol.loopexit

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader
  %.lcssa.unr = phi double [ poison, %.lr.ph.preheader ], [ %58, %.lr.ph.prol ]
  %indvars.iv.unr = phi i64 [ %48, %.lr.ph.preheader ], [ %indvars.iv.next.prol, %.lr.ph.prol ]
  %.05154.unr = phi double [ %42, %.lr.ph.preheader ], [ %58, %.lr.ph.prol ]
  %59 = add nsw i64 %wide.trip.count, -1
  %60 = icmp eq i64 %59, %48
  br i1 %60, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %.lr.ph59
  %.051.lcssa = phi double [ %42, %.lr.ph59 ], [ %.lcssa.unr, %.lr.ph.prol.loopexit ], [ %80, %.lr.ph ]
  %61 = fcmp une double %42, 0.000000e+00
  %62 = fcmp une double %.051.lcssa, 0.000000e+00
  %or.cond = select i1 %61, i1 true, i1 %62
  br i1 %or.cond, label %81, label %91

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next.1, %.lr.ph ], [ %indvars.iv.unr, %.lr.ph.prol.loopexit ]
  %.05154 = phi double [ %80, %.lr.ph ], [ %.05154.unr, %.lr.ph.prol.loopexit ]
  %63 = getelementptr inbounds i32, ptr %19, i64 %indvars.iv
  %64 = load i32, ptr %63, align 4, !tbaa !25
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds double, ptr %11, i64 %65
  %67 = load double, ptr %66, align 8, !tbaa !27
  %68 = getelementptr inbounds double, ptr %21, i64 %indvars.iv
  %69 = load double, ptr %68, align 8, !tbaa !27
  %70 = fneg double %67
  %71 = tail call double @llvm.fmuladd.f64(double %70, double %69, double %.05154)
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %72 = getelementptr inbounds i32, ptr %19, i64 %indvars.iv.next
  %73 = load i32, ptr %72, align 4, !tbaa !25
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds double, ptr %11, i64 %74
  %76 = load double, ptr %75, align 8, !tbaa !27
  %77 = getelementptr inbounds double, ptr %21, i64 %indvars.iv.next
  %78 = load double, ptr %77, align 8, !tbaa !27
  %79 = fneg double %76
  %80 = tail call double @llvm.fmuladd.f64(double %79, double %78, double %71)
  %indvars.iv.next.1 = add nsw i64 %indvars.iv, 2
  %exitcond.not.1 = icmp eq i64 %indvars.iv.next.1, %wide.trip.count
  br i1 %exitcond.not.1, label %._crit_edge, label %.lr.ph, !llvm.loop !28

81:                                               ; preds = %._crit_edge
  %82 = fcmp oeq double %42, 0.000000e+00
  br i1 %82, label %83, label %87

83:                                               ; preds = %81
  %84 = add nuw nsw i32 %.04957, 1
  %85 = zext nneg i32 %.04957 to i64
  %86 = getelementptr inbounds i32, ptr %9, i64 %85
  store i32 %39, ptr %86, align 4, !tbaa !25
  br label %87

87:                                               ; preds = %83, %81
  %.1 = phi i32 [ %84, %83 ], [ %.04957, %81 ]
  %88 = tail call double @llvm.fabs.f64(double %.051.lcssa)
  %89 = fcmp olt double %88, 0x3D06849B86A12B9B
  %90 = select i1 %89, double 1.000000e-50, double %.051.lcssa
  store double %90, ptr %41, align 8, !tbaa !27
  br label %91

91:                                               ; preds = %._crit_edge, %87
  %.2 = phi i32 [ %.1, %87 ], [ %.04957, %._crit_edge ]
  %exitcond67.not = icmp eq i64 %indvars.iv.next64, %wide.trip.count66
  br i1 %exitcond67.not, label %._crit_edge60, label %.lr.ph59, !llvm.loop !30
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { noreturn nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"_ZTS11HVectorBaseIdE", !7, i64 0, !7, i64 4, !10, i64 8, !15, i64 32, !19, i64 56, !20, i64 64, !10, i64 88, !14, i64 112, !24, i64 120, !7, i64 124, !10, i64 128, !15, i64 152}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIiSaIiEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTSSt6vectorIdSaIdEE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!19 = !{!"double", !8, i64 0}
!20 = !{!"_ZTSSt6vectorIcSaIcEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!24 = !{!"bool", !8, i64 0}
!25 = !{!7, !7, i64 0}
!26 = !{!6, !19, i64 56}
!27 = !{!19, !19, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = distinct !{!30, !29}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass