; LLVM IR from EdoPro98/SimSiPM :: src/SiPMSensor.ll (ZNK4sipm10SiPMSensor13generateXtHitEPKNS_7SiPMHitE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sipm::SiPMSensor" = type { %"class.sipm::SiPMProperties", [56 x i8], %"class.sipm::SiPMRandom", i32, i32, i32, i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", %"class.std::vector.8", %"class.sipm::SiPMAnalogSignal", [40 x i8] }
%"class.sipm::SiPMProperties" = type <{ double, double, i32, i32, i32, [4 x i8], double, double, i32, [4 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, float, [4 x i8], double, float, [4 x i8], double, double, %"class.std::map", i32, i8, i8, i8, i8, i8, [7 x i8] }>
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.sipm::SiPMRandom" = type { %"class.sipm::SiPMRng::Xorshift256plus" }
%"class.sipm::SiPMRng::Xorshift256plus" = type <{ [4 x i64], [32 x i8], [65536 x i64], i32, [60 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sipm::SiPMAnalogSignal" = type { %"class.std::vector.8", double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZN4sipm10SiPMRandom4RandIdEET_v(ptr noundef nonnull align 64 dereferenceable(524416)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257)) #2 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29), double noundef, float noundef, i32 noundef, i32 noundef, i8 noundef zeroext, ptr noundef) unnamed_addr #2 align 2

; Function Attrs: nounwind
declare noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416), double noundef) #4

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZNK4sipm10SiPMSensor13generateXtHitEPKNS_7SiPMHitE(ptr noundef nonnull align 64 dereferenceable(524888) %0, ptr noundef %1) #5 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca double, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %12 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK4sipm7SiPMHit3rowEv(ptr noundef nonnull align 8 dereferenceable(29) %13) #6
  store i32 %14, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = call noundef i32 @_ZNK4sipm7SiPMHit3colEv(ptr noundef nonnull align 8 dereferenceable(29) %15) #6
  store i32 %16, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #6
  %17 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 0
  %18 = call noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDXtEv(ptr noundef nonnull align 8 dereferenceable(257) %17)
  br i1 %18, label %19, label %25

19:                                               ; preds = %2
  %20 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 0
  %21 = call noundef double @_ZNK4sipm14SiPMProperties3dxtEv(ptr noundef nonnull align 8 dereferenceable(257) %20)
  %22 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 2
  %23 = call noundef double @_ZN4sipm10SiPMRandom4RandIdEET_v(ptr noundef nonnull align 64 dereferenceable(524416) %22) #6
  %24 = fcmp ogt double %21, %23
  br label %25

25:                                               ; preds = %19, %2
  %26 = phi i1 [ false, %2 ], [ %24, %19 ]
  %27 = zext i1 %26 to i8
  store i8 %27, ptr %9, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #6
  %28 = load i8, ptr %9, align 1, !tbaa !11, !range !13, !noundef !14
  %29 = trunc i8 %28 to i1
  %30 = zext i1 %29 to i64
  %31 = select i1 %29, i8 3, i8 2
  store i8 %31, ptr %10, align 1, !tbaa !15
  br label %32

32:                                               ; preds = %56, %25
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 2
  %35 = call noundef i32 @_ZN4sipm10SiPMRandom11randIntegerEj(ptr noundef nonnull align 64 dereferenceable(524416) %34, i32 noundef 3) #6
  %36 = add i32 %33, %35
  %37 = sub i32 %36, 1
  store i32 %37, ptr %5, align 4, !tbaa !9
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 2
  %40 = call noundef i32 @_ZN4sipm10SiPMRandom11randIntegerEj(ptr noundef nonnull align 64 dereferenceable(524416) %39, i32 noundef 3) #6
  %41 = add i32 %38, %40
  %42 = sub i32 %41, 1
  store i32 %42, ptr %6, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %32
  %44 = load i32, ptr %5, align 4, !tbaa !9
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = icmp eq i32 %44, %45
  br i1 %46, label %47, label %51

47:                                               ; preds = %43
  %48 = load i32, ptr %6, align 4, !tbaa !9
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = icmp eq i32 %48, %49
  br i1 %50, label %56, label %51

51:                                               ; preds = %47, %43
  %52 = load i32, ptr %5, align 4, !tbaa !9
  %53 = load i32, ptr %6, align 4, !tbaa !9
  %54 = call noundef zeroext i1 @_ZNK4sipm10SiPMSensor10isInSensorEii(ptr noundef nonnull align 64 dereferenceable(524888) %12, i32 noundef %52, i32 noundef %53) #6
  %55 = xor i1 %54, true
  br label %56

56:                                               ; preds = %51, %47
  %57 = phi i1 [ true, %47 ], [ %55, %51 ]
  br i1 %57, label %32, label %58, !llvm.loop !17

58:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  store double 0.000000e+00, ptr %11, align 8, !tbaa !19
  %59 = load i8, ptr %9, align 1, !tbaa !11, !range !13, !noundef !14
  %60 = trunc i8 %59 to i1
  br i1 %60, label %61, label %76

61:                                               ; preds = %58
  br label %62

62:                                               ; preds = %67, %61
  %63 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 2
  %64 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 0
  %65 = call noundef double @_ZNK4sipm14SiPMProperties6dxtTauEv(ptr noundef nonnull align 8 dereferenceable(257) %64)
  %66 = call noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416) %63, double noundef %65) #6
  store double %66, ptr %11, align 8, !tbaa !19
  br label %67

67:                                               ; preds = %62
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = call noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29) %68) #6
  %70 = load double, ptr %11, align 8, !tbaa !19
  %71 = fadd double %69, %70
  %72 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %12, i32 0, i32 0
  %73 = call noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257) %72)
  %74 = fcmp ogt double %71, %73
  br i1 %74, label %62, label %75, !llvm.loop !21

75:                                               ; preds = %67
  br label %76

76:                                               ; preds = %75, %58
  %77 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 32) #7
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  %79 = call noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29) %78) #6
  %80 = load double, ptr %11, align 8, !tbaa !19
  %81 = fadd double %79, %80
  %82 = load i32, ptr %5, align 4, !tbaa !9
  %83 = load i32, ptr %6, align 4, !tbaa !9
  %84 = load i8, ptr %10, align 1, !tbaa !15
  %85 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29) %77, double noundef %81, float noundef 1.000000e+00, i32 noundef %82, i32 noundef %83, i8 noundef zeroext %84, ptr noundef %85) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  ret ptr %77
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm7SiPMHit3rowEv(ptr noundef nonnull align 8 dereferenceable(29)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm7SiPMHit3colEv(ptr noundef nonnull align 8 dereferenceable(29)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDXtEv(ptr noundef nonnull align 8 dereferenceable(257)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties3dxtEv(ptr noundef nonnull align 8 dereferenceable(257)) #2 align 2

; Function Attrs: nounwind
declare noundef i32 @_ZN4sipm10SiPMRandom11randIntegerEj(ptr noundef nonnull align 64 dereferenceable(524416), i32 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4sipm10SiPMSensor10isInSensorEii(ptr noundef nonnull align 64 dereferenceable(524888), i32 noundef, i32 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties6dxtTauEv(ptr noundef nonnull align 8 dereferenceable(257)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !16, i64 0}
!16 = !{!"_ZTSN4sipm7SiPMHit7HitTypeE", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!20, !20, i64 0}
!20 = !{!"double", !7, i64 0}
!21 = distinct !{!21, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZN4sipm10SiPMRandom4RandIdEET_v(ptr noundef nonnull align 64 dereferenceable(524416)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29), double noundef, float noundef, i32 noundef, i32 noundef, i8 noundef zeroext, ptr noundef) unnamed_addr #1 align 2

; Function Attrs: nounwind
declare noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416), double noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull ptr @_ZNK4sipm10SiPMSensor13generateXtHitEPKNS_7SiPMHitE(ptr noundef nonnull align 64 dereferenceable(524888) %0, ptr noundef nonnull %1) local_unnamed_addr #4 align 2 {
  %3 = tail call noundef i32 @_ZNK4sipm7SiPMHit3rowEv(ptr noundef nonnull align 8 dereferenceable(29) %1) #5
  %4 = tail call noundef i32 @_ZNK4sipm7SiPMHit3colEv(ptr noundef nonnull align 8 dereferenceable(29) %1) #5
  %5 = tail call noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDXtEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  br i1 %5, label %6, label %11

6:                                                ; preds = %2
  %7 = tail call noundef double @_ZNK4sipm14SiPMProperties3dxtEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %8 = getelementptr inbounds i8, ptr %0, i64 320
  %9 = tail call noundef double @_ZN4sipm10SiPMRandom4RandIdEET_v(ptr noundef nonnull align 64 dereferenceable(524416) %8) #5
  %10 = fcmp ogt double %7, %9
  br label %11

11:                                               ; preds = %6, %2
  %12 = phi i1 [ false, %2 ], [ %10, %6 ]
  %13 = getelementptr inbounds i8, ptr %0, i64 320
  %14 = add i32 %3, -1
  %15 = add i32 %4, -1
  br label %.critedge

.critedge:                                        ; preds = %.critedge.backedge, %11
  %16 = tail call noundef i32 @_ZN4sipm10SiPMRandom11randIntegerEj(ptr noundef nonnull align 64 dereferenceable(524416) %13, i32 noundef 3) #5
  %17 = add i32 %14, %16
  %18 = tail call noundef i32 @_ZN4sipm10SiPMRandom11randIntegerEj(ptr noundef nonnull align 64 dereferenceable(524416) %13, i32 noundef 3) #5
  %19 = add i32 %15, %18
  %20 = icmp eq i32 %17, %3
  %21 = icmp eq i32 %19, %4
  %or.cond = and i1 %20, %21
  br i1 %or.cond, label %.critedge.backedge, label %22

22:                                               ; preds = %.critedge
  %23 = tail call noundef zeroext i1 @_ZNK4sipm10SiPMSensor10isInSensorEii(ptr noundef nonnull align 64 dereferenceable(524888) %0, i32 noundef %17, i32 noundef %19) #5
  br i1 %23, label %24, label %.critedge.backedge

.critedge.backedge:                               ; preds = %22, %.critedge
  br label %.critedge, !llvm.loop !5

24:                                               ; preds = %22
  br i1 %12, label %.preheader, label %.loopexit

.preheader:                                       ; preds = %24, %.preheader
  %25 = tail call noundef double @_ZNK4sipm14SiPMProperties6dxtTauEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %26 = tail call noundef double @_ZN4sipm10SiPMRandom15randExponentialEd(ptr noundef nonnull align 64 dereferenceable(524416) %13, double noundef %25) #5
  %27 = tail call noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29) %1) #5
  %28 = fadd double %26, %27
  %29 = tail call noundef double @_ZNK4sipm14SiPMProperties12signalLengthEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %30 = fcmp ogt double %28, %29
  br i1 %30, label %.preheader, label %.loopexit, !llvm.loop !7

.loopexit:                                        ; preds = %.preheader, %24
  %31 = phi i8 [ 2, %24 ], [ 3, %.preheader ]
  %.0 = phi double [ 0.000000e+00, %24 ], [ %26, %.preheader ]
  %32 = tail call noalias noundef nonnull dereferenceable(32) ptr @_Znwm(i64 noundef 32) #6
  %33 = tail call noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29) %1) #5
  %34 = fadd double %.0, %33
  tail call void @_ZN4sipm7SiPMHitC2EdfjjNS0_7HitTypeEPKS0_(ptr noundef nonnull align 8 dereferenceable(29) %32, double noundef %34, float noundef 1.000000e+00, i32 noundef %17, i32 noundef %19, i8 noundef zeroext %31, ptr noundef nonnull %1) #5
  ret ptr %32
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm7SiPMHit3rowEv(ptr noundef nonnull align 8 dereferenceable(29)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm7SiPMHit3colEv(ptr noundef nonnull align 8 dereferenceable(29)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4sipm14SiPMProperties6hasDXtEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties3dxtEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #1 align 2

; Function Attrs: nounwind
declare noundef i32 @_ZN4sipm10SiPMRandom11randIntegerEj(ptr noundef nonnull align 64 dereferenceable(524416), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4sipm10SiPMSensor10isInSensorEii(ptr noundef nonnull align 64 dereferenceable(524888), i32 noundef, i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties6dxtTauEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29)) local_unnamed_addr #1 align 2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass