; LLVM IR from CLASS-SZ/class_sz :: class-sz/tools (r8lib)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @i4_modp(i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @r8vec_rotate(i32 noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca double, align 8
  %13 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = call i32 @i4_modp(i32 noundef %14, i32 noundef %15)
  store i32 %16, ptr %10, align 4, !tbaa !5
  %17 = load i32, ptr %10, align 4, !tbaa !5
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %3
  store i32 1, ptr %13, align 4
  br label %81

20:                                               ; preds = %3
  store i32 0, ptr %9, align 4, !tbaa !5
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %79, %20
  %22 = load i32, ptr %9, align 4, !tbaa !5
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %9, align 4, !tbaa !5
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = load i32, ptr %9, align 4, !tbaa !5
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %27, label %28

27:                                               ; preds = %21
  br label %80

28:                                               ; preds = %21
  %29 = load ptr, ptr %5, align 8, !tbaa !9
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = sub nsw i32 %30, 1
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds double, ptr %29, i64 %32
  %34 = load double, ptr %33, align 8, !tbaa !11
  store double %34, ptr %12, align 8, !tbaa !11
  %35 = load i32, ptr %9, align 4, !tbaa !5
  store i32 %35, ptr %7, align 4, !tbaa !5
  br label %36

36:                                               ; preds = %52, %28
  %37 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %37, ptr %8, align 4, !tbaa !5
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = sub nsw i32 %38, %39
  store i32 %40, ptr %7, align 4, !tbaa !5
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = icmp slt i32 %41, 1
  br i1 %42, label %43, label %47

43:                                               ; preds = %36
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = load i32, ptr %4, align 4, !tbaa !5
  %46 = add nsw i32 %44, %45
  store i32 %46, ptr %7, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %43, %36
  %48 = load i32, ptr %7, align 4, !tbaa !5
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = icmp eq i32 %48, %49
  br i1 %50, label %51, label %52

51:                                               ; preds = %47
  br label %66

52:                                               ; preds = %47
  %53 = load ptr, ptr %5, align 8, !tbaa !9
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = sub nsw i32 %54, 1
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds double, ptr %53, i64 %56
  %58 = load double, ptr %57, align 8, !tbaa !11
  %59 = load ptr, ptr %5, align 8, !tbaa !9
  %60 = load i32, ptr %8, align 4, !tbaa !5
  %61 = sub nsw i32 %60, 1
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds double, ptr %59, i64 %62
  store double %58, ptr %63, align 8, !tbaa !11
  %64 = load i32, ptr %11, align 4, !tbaa !5
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %11, align 4, !tbaa !5
  br label %36

66:                                               ; preds = %51
  %67 = load double, ptr %12, align 8, !tbaa !11
  %68 = load ptr, ptr %5, align 8, !tbaa !9
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = sub nsw i32 %69, 1
  %71 = sext i32 %70 to i64
  %72 = getelementptr inbounds double, ptr %68, i64 %71
  store double %67, ptr %72, align 8, !tbaa !11
  %73 = load i32, ptr %11, align 4, !tbaa !5
  %74 = add nsw i32 %73, 1
  store i32 %74, ptr %11, align 4, !tbaa !5
  %75 = load i32, ptr %4, align 4, !tbaa !5
  %76 = load i32, ptr %11, align 4, !tbaa !5
  %77 = icmp sle i32 %75, %76
  br i1 %77, label %78, label %79

78:                                               ; preds = %66
  br label %80

79:                                               ; preds = %66
  br label %21

80:                                               ; preds = %78, %27
  store i32 1, ptr %13, align 4
  br label %81

81:                                               ; preds = %80, %19
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @i4_modp(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @r8vec_rotate(i32 noundef %0, ptr nocapture noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = tail call i32 @i4_modp(i32 noundef %2, i32 noundef %0)
  %5 = icmp eq i32 %4, 0
  br i1 %5, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %3
  %invariant.gep45 = getelementptr i8, ptr %1, i64 -8
  %smax = tail call i32 @llvm.smax.i32(i32 %0, i32 0)
  %wide.trip.count = zext nneg i32 %smax to i64
  br label %6

6:                                                ; preds = %.preheader, %._crit_edge
  %indvars.iv = phi i64 [ 0, %.preheader ], [ %indvars.iv.next, %._crit_edge ]
  %.027 = phi i32 [ 0, %.preheader ], [ %23, %._crit_edge ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %7

7:                                                ; preds = %6
  %8 = getelementptr inbounds double, ptr %1, i64 %indvars.iv
  %9 = load double, ptr %8, align 8, !tbaa !5
  %10 = trunc nuw i64 %indvars.iv.next to i32
  %11 = sub nsw i32 %10, %4
  %.inv39 = icmp sgt i32 %11, 0
  %12 = select i1 %.inv39, i32 0, i32 %0
  %spec.select40 = add nsw i32 %12, %11
  %13 = zext i32 %spec.select40 to i64
  %14 = icmp eq i64 %indvars.iv.next, %13
  br i1 %14, label %.._crit_edge_crit_edge, label %.lr.ph

.._crit_edge_crit_edge:                           ; preds = %7
  %sext = shl nuw i64 %indvars.iv.next, 32
  %.pre = ashr exact i64 %sext, 32
  br label %._crit_edge

.lr.ph:                                           ; preds = %7, %.lr.ph
  %spec.select43 = phi i32 [ %spec.select, %.lr.ph ], [ %spec.select40, %7 ]
  %.042 = phi i32 [ %spec.select43, %.lr.ph ], [ %10, %7 ]
  %.12841 = phi i32 [ %18, %.lr.ph ], [ %.027, %7 ]
  %15 = sext i32 %spec.select43 to i64
  %gep = getelementptr double, ptr %invariant.gep45, i64 %15
  %16 = load double, ptr %gep, align 8, !tbaa !5
  %17 = sext i32 %.042 to i64
  %gep38 = getelementptr double, ptr %invariant.gep45, i64 %17
  store double %16, ptr %gep38, align 8, !tbaa !5
  %18 = add nsw i32 %.12841, 1
  %19 = sub nsw i32 %spec.select43, %4
  %.inv = icmp sgt i32 %19, 0
  %20 = select i1 %.inv, i32 0, i32 %0
  %spec.select = add nsw i32 %20, %19
  %21 = zext i32 %spec.select to i64
  %22 = icmp eq i64 %indvars.iv.next, %21
  br i1 %22, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.._crit_edge_crit_edge ], [ %15, %.lr.ph ]
  %.128.lcssa = phi i32 [ %.027, %.._crit_edge_crit_edge ], [ %18, %.lr.ph ]
  %gep46 = getelementptr double, ptr %invariant.gep45, i64 %.pre-phi
  store double %9, ptr %gep46, align 8, !tbaa !5
  %23 = add nsw i32 %.128.lcssa, 1
  %.not36 = icmp slt i32 %23, %0
  br i1 %.not36, label %6, label %.loopexit

.loopexit:                                        ; preds = %6, %._crit_edge, %3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass