; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d_alpha_blending)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.10 }
%struct.anon.10 = type { ptr, %struct.anon.11, %struct.anon.12, i16, i16, i16, i16, ptr, %union.anon.13 }
%struct.anon.11 = type { ptr, ptr }
%struct.anon.12 = type { ptr, ptr }
%union.anon.13 = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.67, %struct.anon.68, %union.anon.69, %struct.anon.71, %struct.anon.72, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.14, i64 }
%struct.anon.14 = type { ptr, ptr, %struct.anon.15, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.15 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.16 }
%struct.anon.16 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.67 = type { ptr, ptr }
%struct.anon.68 = type { ptr }
%union.anon.69 = type { %struct.anon.70 }
%struct.anon.70 = type { i32 }
%struct.anon.71 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.48, %union.anon.57, %union.anon.58 }
%union.anon.48 = type { %struct.anon.49 }
%struct.anon.49 = type { i8, %union.arm_2d_color_info_t, %union.anon.50 }
%union.arm_2d_color_info_t = type { %struct.anon.1 }
%struct.anon.1 = type { i8 }
%union.anon.50 = type { i16 }
%union.anon.57 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.3, %union.anon.4 }
%union.anon.3 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.4 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.58 = type { ptr }
%struct.anon.72 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.59, %struct.anon.60 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.59 = type { i32 }
%struct.anon.60 = type { %struct.arm_2d_location_t, %struct.anon.61 }
%struct.anon.61 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.80 = type { %struct.anon.81 }
%struct.anon.81 = type { i8 }
%union.anon.82 = type { %struct.anon.83 }
%struct.anon.83 = type { i8, i8 }
%struct.anon.87 = type { ptr, ptr }
%struct.arm_2d_op_src_msk_t = type { %struct.arm_2d_op_core_t, %struct.anon.36, %struct.anon.37, i32, %struct.anon.38 }
%struct.anon.36 = type { ptr, ptr }
%struct.anon.37 = type { ptr }
%struct.anon.38 = type { ptr, ptr }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@.str.18 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [92 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [17 x i8], align 1
@__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_src_mask = external hidden unnamed_addr constant [179 x i8], align 1
@ARM_2D_OP_TILE_COPY_WITH_SRC_MASK_CCCN888 = external dso_local constant { { { i8 }, %union.anon.80, i8, i8, %union.anon.82, { %struct.anon.87 } } }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

declare ptr @arm_2d_tile_get_root(ptr noundef, ptr noundef, ptr noundef) #2

declare i32 @__arm_mask_validate(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) #2

declare i32 @__arm_2d_op_invoke(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_tile_copy_with_src_mask(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef %4, i32 noundef %5) #3 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store ptr %4, ptr %12, align 8, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !9
  %18 = load ptr, ptr %9, align 8, !tbaa !5
  %19 = icmp ne ptr null, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %6
  br label %22

21:                                               ; preds = %6
  call void @__assert_fail(ptr noundef @.str.18, ptr noundef @.str.19, i32 noundef 552, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_src_mask) #4
  unreachable

22:                                               ; preds = %20
  %23 = load ptr, ptr %10, align 8, !tbaa !5
  %24 = icmp ne ptr null, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  br label %27

26:                                               ; preds = %22
  call void @__assert_fail(ptr noundef @.str.20, ptr noundef @.str.19, i32 noundef 553, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_src_mask) #4
  unreachable

27:                                               ; preds = %25
  %28 = load ptr, ptr %11, align 8, !tbaa !5
  %29 = icmp ne ptr null, %28
  br i1 %29, label %30, label %31

30:                                               ; preds = %27
  br label %32

31:                                               ; preds = %27
  call void @__assert_fail(ptr noundef @.str.21, ptr noundef @.str.19, i32 noundef 554, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_src_mask) #4
  unreachable

32:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #5
  %33 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %33, ptr %14, align 8, !tbaa !5
  %34 = load ptr, ptr %14, align 8, !tbaa !5
  %35 = icmp eq ptr null, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %32
  store ptr getelementptr inbounds (%struct.anon.10, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %14, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %36, %32
  %38 = load i32, ptr %13, align 4, !tbaa !9
  %39 = icmp eq i32 %38, 0
  br i1 %39, label %40, label %66

40:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  %41 = load ptr, ptr %9, align 8, !tbaa !5
  %42 = call ptr @arm_2d_tile_get_root(ptr noundef %41, ptr noundef null, ptr noundef null)
  store ptr %42, ptr %15, align 8, !tbaa !5
  %43 = load ptr, ptr %15, align 8, !tbaa !5
  %44 = icmp eq ptr null, %43
  br i1 %44, label %45, label %46

45:                                               ; preds = %40
  store i32 -2, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %63

46:                                               ; preds = %40
  %47 = load ptr, ptr %15, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %47, i32 0, i32 0
  %49 = load i8, ptr %48, align 8
  %50 = lshr i8 %49, 1
  %51 = and i8 %50, 1
  %52 = icmp ne i8 %51, 0
  br i1 %52, label %53, label %62

53:                                               ; preds = %46
  %54 = load ptr, ptr %15, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %54, i32 0, i32 0
  %56 = getelementptr inbounds %struct.anon.49, ptr %55, i32 0, i32 1
  %57 = load i8, ptr %56, align 1, !tbaa !11
  %58 = zext i8 %57 to i32
  switch i32 %58, label %60 [
    i32 10, label %59
    i32 11, label %59
  ]

59:                                               ; preds = %53, %53
  br label %61

60:                                               ; preds = %53
  store i32 -4, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %63

61:                                               ; preds = %59
  br label %62

62:                                               ; preds = %61, %46
  store i32 0, ptr %16, align 4
  br label %63

63:                                               ; preds = %62, %60, %45
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  %64 = load i32, ptr %16, align 4
  switch i32 %64, label %110 [
    i32 0, label %65
  ]

65:                                               ; preds = %63
  br label %66

66:                                               ; preds = %65, %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  %67 = load ptr, ptr %9, align 8, !tbaa !5
  %68 = load ptr, ptr %10, align 8, !tbaa !5
  %69 = load ptr, ptr %11, align 8, !tbaa !5
  %70 = load i32, ptr %13, align 4, !tbaa !9
  %71 = call i32 @__arm_mask_validate(ptr noundef %67, ptr noundef %68, ptr noundef %69, ptr noundef null, i32 noundef %70)
  store i32 %71, ptr %17, align 4, !tbaa !9
  %72 = load i32, ptr %17, align 4, !tbaa !9
  %73 = icmp slt i32 %72, 0
  br i1 %73, label %74, label %76

74:                                               ; preds = %66
  %75 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %75, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %109

76:                                               ; preds = %66
  %77 = load ptr, ptr %14, align 8, !tbaa !5
  %78 = call zeroext i1 @__arm_2d_op_acquire(ptr noundef %77)
  br i1 %78, label %80, label %79

79:                                               ; preds = %76
  store i32 1, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %109

80:                                               ; preds = %76
  %81 = load ptr, ptr %14, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %81, i32 0, i32 0
  %83 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %82, i32 0, i32 0
  %84 = getelementptr inbounds %struct.anon.14, ptr %83, i32 0, i32 1
  store ptr @ARM_2D_OP_TILE_COPY_WITH_SRC_MASK_CCCN888, ptr %84, align 8, !tbaa !12
  %85 = load ptr, ptr %11, align 8, !tbaa !5
  %86 = load ptr, ptr %14, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %86, i32 0, i32 1
  %88 = getelementptr inbounds %struct.anon.36, ptr %87, i32 0, i32 0
  store ptr %85, ptr %88, align 8, !tbaa !21
  %89 = load ptr, ptr %12, align 8, !tbaa !5
  %90 = load ptr, ptr %14, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %90, i32 0, i32 1
  %92 = getelementptr inbounds %struct.anon.36, ptr %91, i32 0, i32 1
  store ptr %89, ptr %92, align 8, !tbaa !22
  %93 = load ptr, ptr %9, align 8, !tbaa !5
  %94 = load ptr, ptr %14, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %94, i32 0, i32 2
  %96 = getelementptr inbounds %struct.anon.37, ptr %95, i32 0, i32 0
  store ptr %93, ptr %96, align 8, !tbaa !23
  %97 = load i32, ptr %13, align 4, !tbaa !9
  %98 = load ptr, ptr %14, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %98, i32 0, i32 3
  store i32 %97, ptr %99, align 8, !tbaa !24
  %100 = load ptr, ptr %10, align 8, !tbaa !5
  %101 = load ptr, ptr %14, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %101, i32 0, i32 4
  %103 = getelementptr inbounds %struct.anon.38, ptr %102, i32 0, i32 0
  store ptr %100, ptr %103, align 8, !tbaa !25
  %104 = load ptr, ptr %14, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %104, i32 0, i32 4
  %106 = getelementptr inbounds %struct.anon.38, ptr %105, i32 0, i32 1
  store ptr null, ptr %106, align 8, !tbaa !26
  %107 = load ptr, ptr %14, align 8, !tbaa !5
  %108 = call i32 @__arm_2d_op_invoke(ptr noundef %107)
  store i32 %108, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %109

109:                                              ; preds = %80, %79, %74
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  br label %110

110:                                              ; preds = %109, %63
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #5
  %111 = load i32, ptr %7, align 4
  ret i32 %111
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !6, i64 8}
!13 = !{!"arm_2d_op_src_msk_t", !14, i64 0, !19, i64 48, !20, i64 64, !10, i64 72, !19, i64 80}
!14 = !{!"arm_2d_op_core_t", !15, i64 0, !18, i64 40}
!15 = !{!"", !6, i64 0, !6, i64 8, !16, i64 16, !7, i64 17, !7, i64 18, !17, i64 24}
!16 = !{!"", !7, i64 0}
!17 = !{!"arm_2d_op_evt_t", !6, i64 0, !6, i64 8}
!18 = !{!"long", !7, i64 0}
!19 = !{!"", !6, i64 0, !6, i64 8}
!20 = !{!"", !6, i64 0}
!21 = !{!13, !6, i64 48}
!22 = !{!13, !6, i64 56}
!23 = !{!13, !6, i64 64}
!24 = !{!13, !10, i64 72}
!25 = !{!13, !6, i64 80}
!26 = !{!13, !6, i64 88}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.10 }
%struct.anon.10 = type { ptr, %struct.anon.11, %struct.anon.12, i16, i16, i16, i16, ptr, %union.anon.13 }
%struct.anon.11 = type { ptr, ptr }
%struct.anon.12 = type { ptr, ptr }
%union.anon.13 = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.67, %struct.anon.68, %union.anon.69, %struct.anon.71, %struct.anon.72, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.14, i64 }
%struct.anon.14 = type { ptr, ptr, %struct.anon.15, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.15 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.16 }
%struct.anon.16 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.67 = type { ptr, ptr }
%struct.anon.68 = type { ptr }
%union.anon.69 = type { %struct.anon.70 }
%struct.anon.70 = type { i32 }
%struct.anon.71 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.48, %union.anon.57, %union.anon.58 }
%union.anon.48 = type { %struct.anon.49 }
%struct.anon.49 = type { i8, %union.arm_2d_color_info_t, %union.anon.50 }
%union.arm_2d_color_info_t = type { %struct.anon.1 }
%struct.anon.1 = type { i8 }
%union.anon.50 = type { i16 }
%union.anon.57 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.3, %union.anon.4 }
%union.anon.3 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.4 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.58 = type { ptr }
%struct.anon.72 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.59, %struct.anon.60 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.59 = type { i32 }
%struct.anon.60 = type { %struct.arm_2d_location_t, %struct.anon.61 }
%struct.anon.61 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.80 = type { %struct.anon.81 }
%struct.anon.81 = type { i8 }
%union.anon.82 = type { %struct.anon.83 }
%struct.anon.83 = type { i8, i8 }
%struct.anon.87 = type { ptr, ptr }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@ARM_2D_OP_TILE_COPY_WITH_SRC_MASK_CCCN888 = external dso_local constant { { { i8 }, %union.anon.80, i8, i8, %union.anon.82, { %struct.anon.87 } } }, align 8

declare ptr @arm_2d_tile_get_root(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

declare i32 @__arm_mask_validate(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) local_unnamed_addr #0

declare i32 @__arm_2d_op_invoke(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_tile_copy_with_src_mask(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef %4, i32 noundef %5) local_unnamed_addr #1 {
  %7 = icmp eq ptr %0, null
  %spec.store.select = select i1 %7, ptr getelementptr inbounds (i8, ptr @ARM_2D_CTRL, i64 56), ptr %0
  %8 = icmp eq i32 %5, 0
  br i1 %8, label %9, label %19

9:                                                ; preds = %6
  %10 = tail call ptr @arm_2d_tile_get_root(ptr noundef nonnull %1, ptr noundef null, ptr noundef null) #2
  %11 = icmp eq ptr %10, null
  br i1 %11, label %.thread, label %12

12:                                               ; preds = %9
  %13 = load i8, ptr %10, align 8
  %14 = and i8 %13, 2
  %.not = icmp eq i8 %14, 0
  br i1 %.not, label %19, label %15

15:                                               ; preds = %12
  %16 = getelementptr inbounds i8, ptr %10, i64 1
  %17 = load i8, ptr %16, align 1, !tbaa !5
  %18 = and i8 %17, -2
  %switch = icmp eq i8 %18, 10
  br i1 %switch, label %19, label %.thread

19:                                               ; preds = %15, %12, %6
  %20 = tail call i32 @__arm_mask_validate(ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef null, i32 noundef %5) #2
  %21 = icmp slt i32 %20, 0
  br i1 %21, label %.thread, label %22

22:                                               ; preds = %19
  %23 = tail call zeroext i1 @__arm_2d_op_acquire(ptr noundef nonnull %spec.store.select) #2
  br i1 %23, label %24, label %.thread

24:                                               ; preds = %22
  %25 = getelementptr inbounds i8, ptr %spec.store.select, i64 8
  store ptr @ARM_2D_OP_TILE_COPY_WITH_SRC_MASK_CCCN888, ptr %25, align 8, !tbaa !8
  %26 = getelementptr inbounds i8, ptr %spec.store.select, i64 48
  store ptr %3, ptr %26, align 8, !tbaa !19
  %27 = getelementptr inbounds i8, ptr %spec.store.select, i64 56
  store ptr %4, ptr %27, align 8, !tbaa !20
  %28 = getelementptr inbounds i8, ptr %spec.store.select, i64 64
  store ptr %1, ptr %28, align 8, !tbaa !21
  %29 = getelementptr inbounds i8, ptr %spec.store.select, i64 72
  store i32 %5, ptr %29, align 8, !tbaa !22
  %30 = getelementptr inbounds i8, ptr %spec.store.select, i64 80
  store ptr %2, ptr %30, align 8, !tbaa !23
  %31 = getelementptr inbounds i8, ptr %spec.store.select, i64 88
  store ptr null, ptr %31, align 8, !tbaa !24
  %32 = tail call i32 @__arm_2d_op_invoke(ptr noundef nonnull %spec.store.select) #2
  br label %.thread

.thread:                                          ; preds = %15, %9, %24, %19, %22
  %.2 = phi i32 [ %32, %24 ], [ %20, %19 ], [ 1, %22 ], [ -4, %15 ], [ -2, %9 ]
  ret i32 %.2
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !12, i64 8}
!9 = !{!"arm_2d_op_src_msk_t", !10, i64 0, !16, i64 48, !17, i64 64, !18, i64 72, !16, i64 80}
!10 = !{!"arm_2d_op_core_t", !11, i64 0, !15, i64 40}
!11 = !{!"", !12, i64 0, !12, i64 8, !13, i64 16, !6, i64 17, !6, i64 18, !14, i64 24}
!12 = !{!"any pointer", !6, i64 0}
!13 = !{!"", !6, i64 0}
!14 = !{!"arm_2d_op_evt_t", !12, i64 0, !12, i64 8}
!15 = !{!"long", !6, i64 0}
!16 = !{!"", !12, i64 0, !12, i64 8}
!17 = !{!"", !12, i64 0}
!18 = !{!"int", !6, i64 0}
!19 = !{!9, !12, i64 48}
!20 = !{!9, !12, i64 56}
!21 = !{!9, !12, i64 64}
!22 = !{!9, !18, i64 72}
!23 = !{!9, !12, i64 80}
!24 = !{!9, !12, i64 88}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass