; LLVM IR from EdoPro98/SimSiPM :: src/SiPMSensor.ll (ZN4sipm10SiPMSensorC2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sipm::SiPMSensor" = type { %"class.sipm::SiPMProperties", [56 x i8], %"class.sipm::SiPMRandom", i32, i32, i32, i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", %"class.std::vector.8", %"class.sipm::SiPMAnalogSignal", [40 x i8] }
%"class.sipm::SiPMProperties" = type <{ double, double, i32, i32, i32, [4 x i8], double, double, i32, [4 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, float, [4 x i8], double, float, [4 x i8], double, double, %"class.std::map", i32, i8, i8, i8, i8, i8, [7 x i8] }>
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.sipm::SiPMRandom" = type { %"class.sipm::SiPMRng::Xorshift256plus" }
%"class.sipm::SiPMRng::Xorshift256plus" = type <{ [4 x i64], [32 x i8], [65536 x i64], i32, [60 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sipm::SiPMAnalogSignal" = type { %"class.std::vector.8", double }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sipm10SiPMSensorC2Ev(ptr noundef nonnull align 64 dereferenceable(524888) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  %6 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 0
  call void @_ZN4sipm14SiPMPropertiesC1Ev(ptr noundef nonnull align 8 dereferenceable(257) %6)
  %7 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 2
  invoke void @_ZN4sipm10SiPMRandomC2Ev(ptr noundef nonnull align 64 dereferenceable(524416) %7)
          to label %8 unwind label %21

8:                                                ; preds = %1
  %9 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 3
  store i32 0, ptr %9, align 64, !tbaa !9
  %10 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 4
  store i32 0, ptr %10, align 4, !tbaa !42
  %11 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 5
  store i32 0, ptr %11, align 8, !tbaa !43
  %12 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 6
  store i32 0, ptr %12, align 4, !tbaa !44
  %13 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 7
  store i32 0, ptr %13, align 16, !tbaa !45
  %14 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 8
  store i32 0, ptr %14, align 4, !tbaa !46
  %15 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 9
  call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #4
  %16 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 10
  call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #4
  %17 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 11
  call void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %17) #4
  %18 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 12
  call void @_ZNSt6vectorIfSaIfEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #4
  %19 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %5, i32 0, i32 13
  call void @_ZN4sipm16SiPMAnalogSignalC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %19) #4
  invoke void @_ZN4sipm10SiPMSensor11signalShapeEv(ptr noundef nonnull align 64 dereferenceable(524888) %5)
          to label %20 unwind label %25

20:                                               ; preds = %8
  ret void

21:                                               ; preds = %1
  %22 = landingpad { ptr, i32 }
          cleanup
  %23 = extractvalue { ptr, i32 } %22, 0
  store ptr %23, ptr %3, align 8
  %24 = extractvalue { ptr, i32 } %22, 1
  store i32 %24, ptr %4, align 4
  br label %29

25:                                               ; preds = %8
  %26 = landingpad { ptr, i32 }
          cleanup
  %27 = extractvalue { ptr, i32 } %26, 0
  store ptr %27, ptr %3, align 8
  %28 = extractvalue { ptr, i32 } %26, 1
  store i32 %28, ptr %4, align 4
  call void @_ZN4sipm16SiPMAnalogSignalD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %19) #4
  call void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #4
  call void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %17) #4
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %16) #4
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %15) #4
  br label %29

29:                                               ; preds = %25, %21
  call void @_ZN4sipm14SiPMPropertiesD2Ev(ptr noundef nonnull align 8 dereferenceable(257) %6) #4
  br label %30

30:                                               ; preds = %29
  %31 = load ptr, ptr %3, align 8
  %32 = load i32, ptr %4, align 4
  %33 = insertvalue { ptr, i32 } poison, ptr %31, 0
  %34 = insertvalue { ptr, i32 } %33, i32 %32, 1
  resume { ptr, i32 } %34
}

declare void @_ZN4sipm14SiPMPropertiesC1Ev(ptr noundef nonnull align 8 dereferenceable(257)) unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4sipm10SiPMRandomC2Ev(ptr noundef nonnull align 64 dereferenceable(524416)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm16SiPMAnalogSignalC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4sipm10SiPMSensor11signalShapeEv(ptr noundef nonnull align 64 dereferenceable(524888)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm16SiPMAnalogSignalD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm14SiPMPropertiesD2Ev(ptr noundef nonnull align 8 dereferenceable(257)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 524736}
!10 = !{!"_ZTSN4sipm10SiPMSensorE", !11, i64 0, !27, i64 320, !13, i64 524736, !13, i64 524740, !13, i64 524744, !13, i64 524748, !13, i64 524752, !13, i64 524756, !29, i64 524760, !29, i64 524784, !33, i64 524808, !37, i64 524832, !41, i64 524856}
!11 = !{!"_ZTSN4sipm14SiPMPropertiesE", !12, i64 0, !12, i64 8, !13, i64 16, !13, i64 20, !14, i64 24, !12, i64 32, !12, i64 40, !13, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !12, i64 128, !12, i64 136, !12, i64 144, !12, i64 152, !15, i64 160, !12, i64 168, !15, i64 176, !12, i64 184, !12, i64 192, !16, i64 200, !25, i64 248, !26, i64 252, !26, i64 253, !26, i64 254, !26, i64 255, !26, i64 256}
!12 = !{!"double", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSN4sipm14SiPMProperties15HitDistributionE", !7, i64 0}
!15 = !{!"float", !7, i64 0}
!16 = !{!"_ZTSSt3mapIddSt4lessIdESaISt4pairIKddEEE", !17, i64 0}
!17 = !{!"_ZTSSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE", !18, i64 0}
!18 = !{!"_ZTSNSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE13_Rb_tree_implIS6_Lb1EEE", !19, i64 0, !21, i64 8}
!19 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIdEE", !20, i64 0}
!20 = !{!"_ZTSSt4lessIdE"}
!21 = !{!"_ZTSSt15_Rb_tree_header", !22, i64 0, !24, i64 32}
!22 = !{!"_ZTSSt18_Rb_tree_node_base", !23, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!23 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!24 = !{!"long", !7, i64 0}
!25 = !{!"_ZTSN4sipm14SiPMProperties7PdeTypeE", !7, i64 0}
!26 = !{!"bool", !7, i64 0}
!27 = !{!"_ZTSN4sipm10SiPMRandomE", !28, i64 0}
!28 = !{!"_ZTSN4sipm7SiPMRng15Xorshift256plusE", !7, i64 0, !7, i64 64, !13, i64 524352}
!29 = !{!"_ZTSSt6vectorIdSaIdEE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIPN4sipm7SiPMHitESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSSt6vectorIfSaIfEE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !37, i64 0, !12, i64 24}
!42 = !{!10, !13, i64 524740}
!43 = !{!10, !13, i64 524744}
!44 = !{!10, !13, i64 524748}
!45 = !{!10, !13, i64 524752}
!46 = !{!10, !13, i64 524756}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sipm10SiPMSensorC2Ev(ptr noundef nonnull align 64 dereferenceable(524888) %0) unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  tail call void @_ZN4sipm14SiPMPropertiesC1Ev(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %2 = getelementptr inbounds i8, ptr %0, i64 320
  invoke void @_ZN4sipm10SiPMRandomC2Ev(ptr noundef nonnull align 64 dereferenceable(524416) %2)
          to label %3 unwind label %11

3:                                                ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 524736
  %5 = getelementptr inbounds i8, ptr %0, i64 524760
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 64 dereferenceable(24) %4, i8 0, i64 24, i1 false)
  tail call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #5
  %6 = getelementptr inbounds i8, ptr %0, i64 524784
  tail call void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  %7 = getelementptr inbounds i8, ptr %0, i64 524808
  tail call void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  %8 = getelementptr inbounds i8, ptr %0, i64 524832
  tail call void @_ZNSt6vectorIfSaIfEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #5
  %9 = getelementptr inbounds i8, ptr %0, i64 524856
  tail call void @_ZN4sipm16SiPMAnalogSignalC2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #5
  invoke void @_ZN4sipm10SiPMSensor11signalShapeEv(ptr noundef nonnull align 64 dereferenceable(524888) %0)
          to label %10 unwind label %13

10:                                               ; preds = %3
  ret void

11:                                               ; preds = %1
  %12 = landingpad { ptr, i32 }
          cleanup
  br label %15

13:                                               ; preds = %3
  %14 = landingpad { ptr, i32 }
          cleanup
  tail call void @_ZN4sipm16SiPMAnalogSignalD2Ev(ptr noundef nonnull align 8 dereferenceable(32) %9) #5
  tail call void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %8) #5
  tail call void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #5
  tail call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  tail call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #5
  br label %15

15:                                               ; preds = %13, %11
  %.pn = phi { ptr, i32 } [ %14, %13 ], [ %12, %11 ]
  tail call void @_ZN4sipm14SiPMPropertiesD2Ev(ptr noundef nonnull align 8 dereferenceable(257) %0) #5
  resume { ptr, i32 } %.pn
}

declare void @_ZN4sipm14SiPMPropertiesC1Ev(ptr noundef nonnull align 8 dereferenceable(257)) unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4sipm10SiPMRandomC2Ev(ptr noundef nonnull align 64 dereferenceable(524416)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm16SiPMAnalogSignalC2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4sipm10SiPMSensor11signalShapeEv(ptr noundef nonnull align 64 dereferenceable(524888)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm16SiPMAnalogSignalD2Ev(ptr noundef nonnull align 8 dereferenceable(32)) unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIfSaIfEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN4sipm14SiPMPropertiesD2Ev(ptr noundef nonnull align 8 dereferenceable(257)) unnamed_addr #3 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass