; LLVM IR from ERGO-Code/HiGHS :: src/simplex/HSimplexNlaProductForm.ll (ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ProductFormUpdate = type { i8, i32, i32, %"class.std::vector", %"class.std::vector.3", %"class.std::vector", %"class.std::vector", %"class.std::vector.3" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HVectorBase = type { i32, i32, %"class.std::vector", %"class.std::vector.3", double, %"class.std::vector.8", %"class.std::vector", ptr, i8, i32, %"class.std::vector", %"class.std::vector.3" }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.52 = external hidden unnamed_addr constant [88 x i8], align 1
@.str.53 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.54 = external hidden unnamed_addr constant [40 x i8], align 1
@__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE = external hidden unnamed_addr constant [47 x i8], align 1
@.str.55 = external hidden unnamed_addr constant [22 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE(ptr noundef nonnull align 8 dereferenceable(136) %0, ptr noundef nonnull align 8 dereferenceable(176) %1) #3 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca double, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %14 = load ptr, ptr %3, align 8
  %15 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 0
  %16 = load i8, ptr %15, align 8, !tbaa !9, !range !21, !noundef !22
  %17 = trunc i8 %16 to i1
  br i1 %17, label %19, label %18

18:                                               ; preds = %2
  br label %204

19:                                               ; preds = %2
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %class.HVectorBase, ptr %20, i32 0, i32 0
  %22 = load i32, ptr %21, align 8, !tbaa !23
  %23 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 1
  %24 = load i32, ptr %23, align 4, !tbaa !30
  %25 = icmp eq i32 %22, %24
  br i1 %25, label %26, label %27

26:                                               ; preds = %19
  br label %29

27:                                               ; preds = %19
  call void @__assert_fail(ptr noundef @.str.53, ptr noundef @.str.52, i32 noundef 84, ptr noundef @__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE) #4
  unreachable

28:                                               ; No predecessors!
  br label %29

29:                                               ; preds = %28, %26
  %30 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 5
  %31 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %30) #5
  %32 = trunc i64 %31 to i32
  %33 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 2
  %34 = load i32, ptr %33, align 8, !tbaa !31
  %35 = add nsw i32 %34, 1
  %36 = icmp eq i32 %32, %35
  br i1 %36, label %37, label %38

37:                                               ; preds = %29
  br label %40

38:                                               ; preds = %29
  call void @__assert_fail(ptr noundef @.str.54, ptr noundef @.str.52, i32 noundef 85, ptr noundef @__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE) #4
  unreachable

39:                                               ; No predecessors!
  br label %40

40:                                               ; preds = %39, %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %class.HVectorBase, ptr %41, i32 0, i32 5
  store ptr %42, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !32
  br label %43

43:                                               ; preds = %60, %40
  %44 = load i32, ptr %6, align 4, !tbaa !32
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = getelementptr inbounds %class.HVectorBase, ptr %45, i32 0, i32 1
  %47 = load i32, ptr %46, align 4, !tbaa !33
  %48 = icmp slt i32 %44, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %63

50:                                               ; preds = %43
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = load ptr, ptr %4, align 8, !tbaa !5
  %53 = getelementptr inbounds %class.HVectorBase, ptr %52, i32 0, i32 2
  %54 = load i32, ptr %6, align 4, !tbaa !32
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55) #5
  %57 = load i32, ptr %56, align 4, !tbaa !32
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %58) #5
  store i8 1, ptr %59, align 1, !tbaa !34
  br label %60

60:                                               ; preds = %50
  %61 = load i32, ptr %6, align 4, !tbaa !32
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %6, align 4, !tbaa !32
  br label %43, !llvm.loop !35

63:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !32
  br label %64

64:                                               ; preds = %179, %63
  %65 = load i32, ptr %7, align 4, !tbaa !32
  %66 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 2
  %67 = load i32, ptr %66, align 8, !tbaa !31
  %68 = icmp slt i32 %65, %67
  br i1 %68, label %70, label %69

69:                                               ; preds = %64
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %182

70:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  %71 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 3
  %72 = load i32, ptr %7, align 4, !tbaa !32
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %73) #5
  %75 = load i32, ptr %74, align 4, !tbaa !32
  store i32 %75, ptr %9, align 4, !tbaa !32
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %76 = load ptr, ptr %4, align 8, !tbaa !5
  %77 = getelementptr inbounds %class.HVectorBase, ptr %76, i32 0, i32 3
  %78 = load i32, ptr %9, align 4, !tbaa !32
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #5
  %81 = load double, ptr %80, align 8, !tbaa !37
  store double %81, ptr %10, align 8, !tbaa !37
  %82 = load double, ptr %10, align 8, !tbaa !37
  %83 = call double @llvm.fabs.f64(double %82)
  %84 = fcmp ogt double %83, 0x3D06849B86A12B9B
  br i1 %84, label %85, label %172

85:                                               ; preds = %70
  %86 = load ptr, ptr %5, align 8, !tbaa !5
  %87 = load i32, ptr %9, align 4, !tbaa !32
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %88) #5
  %90 = load i8, ptr %89, align 1, !tbaa !34
  %91 = icmp ne i8 %90, 0
  br i1 %91, label %92, label %93

92:                                               ; preds = %85
  br label %95

93:                                               ; preds = %85
  call void @__assert_fail(ptr noundef @.str.55, ptr noundef @.str.52, i32 noundef 97, ptr noundef @__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE) #4
  unreachable

94:                                               ; No predecessors!
  br label %95

95:                                               ; preds = %94, %92
  %96 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 4
  %97 = load i32, ptr %7, align 4, !tbaa !32
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %98) #5
  %100 = load double, ptr %99, align 8, !tbaa !37
  %101 = load double, ptr %10, align 8, !tbaa !37
  %102 = fdiv double %101, %100
  store double %102, ptr %10, align 8, !tbaa !37
  %103 = load double, ptr %10, align 8, !tbaa !37
  %104 = load ptr, ptr %4, align 8, !tbaa !5
  %105 = getelementptr inbounds %class.HVectorBase, ptr %104, i32 0, i32 3
  %106 = load i32, ptr %9, align 4, !tbaa !32
  %107 = sext i32 %106 to i64
  %108 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %107) #5
  store double %103, ptr %108, align 8, !tbaa !37
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %109 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 5
  %110 = load i32, ptr %7, align 4, !tbaa !32
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %111) #5
  %113 = load i32, ptr %112, align 4, !tbaa !32
  store i32 %113, ptr %11, align 4, !tbaa !32
  br label %114

114:                                              ; preds = %168, %95
  %115 = load i32, ptr %11, align 4, !tbaa !32
  %116 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 5
  %117 = load i32, ptr %7, align 4, !tbaa !32
  %118 = add nsw i32 %117, 1
  %119 = sext i32 %118 to i64
  %120 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %116, i64 noundef %119) #5
  %121 = load i32, ptr %120, align 4, !tbaa !32
  %122 = icmp slt i32 %115, %121
  br i1 %122, label %124, label %123

123:                                              ; preds = %114
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %171

124:                                              ; preds = %114
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %125 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 6
  %126 = load i32, ptr %11, align 4, !tbaa !32
  %127 = sext i32 %126 to i64
  %128 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %125, i64 noundef %127) #5
  %129 = load i32, ptr %128, align 4, !tbaa !32
  store i32 %129, ptr %12, align 4, !tbaa !32
  %130 = load double, ptr %10, align 8, !tbaa !37
  %131 = getelementptr inbounds %struct.ProductFormUpdate, ptr %14, i32 0, i32 7
  %132 = load i32, ptr %11, align 4, !tbaa !32
  %133 = sext i32 %132 to i64
  %134 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %131, i64 noundef %133) #5
  %135 = load double, ptr %134, align 8, !tbaa !37
  %136 = load ptr, ptr %4, align 8, !tbaa !5
  %137 = getelementptr inbounds %class.HVectorBase, ptr %136, i32 0, i32 3
  %138 = load i32, ptr %12, align 4, !tbaa !32
  %139 = sext i32 %138 to i64
  %140 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %137, i64 noundef %139) #5
  %141 = load double, ptr %140, align 8, !tbaa !37
  %142 = fneg double %130
  %143 = call double @llvm.fmuladd.f64(double %142, double %135, double %141)
  store double %143, ptr %140, align 8, !tbaa !37
  %144 = load ptr, ptr %5, align 8, !tbaa !5
  %145 = load i32, ptr %12, align 4, !tbaa !32
  %146 = sext i32 %145 to i64
  %147 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %144, i64 noundef %146) #5
  %148 = load i8, ptr %147, align 1, !tbaa !34
  %149 = icmp ne i8 %148, 0
  br i1 %149, label %150, label %151

150:                                              ; preds = %124
  store i32 10, ptr %8, align 4
  br label %165

151:                                              ; preds = %124
  %152 = load ptr, ptr %5, align 8, !tbaa !5
  %153 = load i32, ptr %12, align 4, !tbaa !32
  %154 = sext i32 %153 to i64
  %155 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %152, i64 noundef %154) #5
  store i8 1, ptr %155, align 1, !tbaa !34
  %156 = load i32, ptr %12, align 4, !tbaa !32
  %157 = load ptr, ptr %4, align 8, !tbaa !5
  %158 = getelementptr inbounds %class.HVectorBase, ptr %157, i32 0, i32 2
  %159 = load ptr, ptr %4, align 8, !tbaa !5
  %160 = getelementptr inbounds %class.HVectorBase, ptr %159, i32 0, i32 1
  %161 = load i32, ptr %160, align 4, !tbaa !33
  %162 = add nsw i32 %161, 1
  store i32 %162, ptr %160, align 4, !tbaa !33
  %163 = sext i32 %161 to i64
  %164 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %158, i64 noundef %163) #5
  store i32 %156, ptr %164, align 4, !tbaa !32
  store i32 0, ptr %8, align 4
  br label %165

165:                                              ; preds = %151, %150
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  %166 = load i32, ptr %8, align 4
  switch i32 %166, label %205 [
    i32 0, label %167
    i32 10, label %168
  ]

167:                                              ; preds = %165
  br label %168

168:                                              ; preds = %167, %165
  %169 = load i32, ptr %11, align 4, !tbaa !32
  %170 = add nsw i32 %169, 1
  store i32 %170, ptr %11, align 4, !tbaa !32
  br label %114, !llvm.loop !38

171:                                              ; preds = %123
  br label %178

172:                                              ; preds = %70
  %173 = load ptr, ptr %4, align 8, !tbaa !5
  %174 = getelementptr inbounds %class.HVectorBase, ptr %173, i32 0, i32 3
  %175 = load i32, ptr %9, align 4, !tbaa !32
  %176 = sext i32 %175 to i64
  %177 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %174, i64 noundef %176) #5
  store double 0.000000e+00, ptr %177, align 8, !tbaa !37
  br label %178

178:                                              ; preds = %172, %171
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %179

179:                                              ; preds = %178
  %180 = load i32, ptr %7, align 4, !tbaa !32
  %181 = add nsw i32 %180, 1
  store i32 %181, ptr %7, align 4, !tbaa !32
  br label %64, !llvm.loop !39

182:                                              ; preds = %69
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !32
  br label %183

183:                                              ; preds = %200, %182
  %184 = load i32, ptr %13, align 4, !tbaa !32
  %185 = load ptr, ptr %4, align 8, !tbaa !5
  %186 = getelementptr inbounds %class.HVectorBase, ptr %185, i32 0, i32 1
  %187 = load i32, ptr %186, align 4, !tbaa !33
  %188 = icmp slt i32 %184, %187
  br i1 %188, label %190, label %189

189:                                              ; preds = %183
  store i32 11, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %203

190:                                              ; preds = %183
  %191 = load ptr, ptr %5, align 8, !tbaa !5
  %192 = load ptr, ptr %4, align 8, !tbaa !5
  %193 = getelementptr inbounds %class.HVectorBase, ptr %192, i32 0, i32 2
  %194 = load i32, ptr %13, align 4, !tbaa !32
  %195 = sext i32 %194 to i64
  %196 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %193, i64 noundef %195) #5
  %197 = load i32, ptr %196, align 4, !tbaa !32
  %198 = sext i32 %197 to i64
  %199 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %191, i64 noundef %198) #5
  store i8 0, ptr %199, align 1, !tbaa !34
  br label %200

200:                                              ; preds = %190
  %201 = load i32, ptr %13, align 4, !tbaa !32
  %202 = add nsw i32 %201, 1
  store i32 %202, ptr %13, align 4, !tbaa !32
  br label %183, !llvm.loop !40

203:                                              ; preds = %189
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  br label %204

204:                                              ; preds = %203, %18
  ret void

205:                                              ; preds = %165
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"_ZTS17ProductFormUpdate", !11, i64 0, !12, i64 4, !12, i64 8, !13, i64 16, !17, i64 40, !13, i64 64, !13, i64 88, !17, i64 112}
!11 = !{!"bool", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{i8 0, i8 2}
!22 = !{}
!23 = !{!24, !12, i64 0}
!24 = !{!"_ZTS11HVectorBaseIdE", !12, i64 0, !12, i64 4, !13, i64 8, !17, i64 32, !25, i64 56, !26, i64 64, !13, i64 88, !6, i64 112, !11, i64 120, !12, i64 124, !13, i64 128, !17, i64 152}
!25 = !{!"double", !7, i64 0}
!26 = !{!"_ZTSSt6vectorIcSaIcEE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!30 = !{!10, !12, i64 4}
!31 = !{!10, !12, i64 8}
!32 = !{!12, !12, i64 0}
!33 = !{!24, !12, i64 4}
!34 = !{!7, !7, i64 0}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}
!37 = !{!25, !25, i64 0}
!38 = distinct !{!38, !36}
!39 = distinct !{!39, !36}
!40 = distinct !{!40, !36}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.52 = external hidden unnamed_addr constant [88 x i8], align 1
@.str.53 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.54 = external hidden unnamed_addr constant [40 x i8], align 1
@__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE = external hidden unnamed_addr constant [47 x i8], align 1
@.str.55 = external hidden unnamed_addr constant [22 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE(ptr noundef nonnull align 8 dereferenceable(136) %0, ptr noundef nonnull align 8 dereferenceable(176) %1) local_unnamed_addr #2 align 2 {
  %3 = load i8, ptr %0, align 8, !tbaa !5, !range !20, !noundef !21
  %4 = trunc nuw i8 %3 to i1
  br i1 %4, label %5, label %.loopexit

5:                                                ; preds = %2
  %6 = load i32, ptr %1, align 8, !tbaa !22
  %7 = getelementptr inbounds i8, ptr %0, i64 4
  %8 = load i32, ptr %7, align 4, !tbaa !29
  %9 = icmp eq i32 %6, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str.53, ptr noundef nonnull @.str.52, i32 noundef 84, ptr noundef nonnull @__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE) #3
  unreachable

11:                                               ; preds = %5
  %12 = getelementptr inbounds i8, ptr %0, i64 64
  %13 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  %14 = trunc i64 %13 to i32
  %15 = getelementptr inbounds i8, ptr %0, i64 8
  %16 = load i32, ptr %15, align 8, !tbaa !30
  %17 = add nsw i32 %16, 1
  %18 = icmp eq i32 %17, %14
  br i1 %18, label %20, label %19

19:                                               ; preds = %11
  tail call void @__assert_fail(ptr noundef nonnull @.str.54, ptr noundef nonnull @.str.52, i32 noundef 85, ptr noundef nonnull @__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE) #3
  unreachable

20:                                               ; preds = %11
  %21 = getelementptr inbounds i8, ptr %1, i64 64
  %22 = getelementptr inbounds i8, ptr %1, i64 4
  %23 = load i32, ptr %22, align 4, !tbaa !31
  %24 = icmp sgt i32 %23, 0
  br i1 %24, label %.lr.ph, label %.preheader50

.lr.ph:                                           ; preds = %20
  %25 = getelementptr inbounds i8, ptr %1, i64 8
  br label %35

.preheader50.loopexit:                            ; preds = %35
  %.pre = load i32, ptr %15, align 8, !tbaa !30
  br label %.preheader50

.preheader50:                                     ; preds = %.preheader50.loopexit, %20
  %26 = phi i32 [ %40, %.preheader50.loopexit ], [ %23, %20 ]
  %27 = phi i32 [ %.pre, %.preheader50.loopexit ], [ %16, %20 ]
  %28 = icmp sgt i32 %27, 0
  br i1 %28, label %.lr.ph55, label %.preheader

.lr.ph55:                                         ; preds = %.preheader50
  %29 = getelementptr inbounds i8, ptr %0, i64 16
  %30 = getelementptr inbounds i8, ptr %1, i64 32
  %31 = getelementptr inbounds i8, ptr %0, i64 40
  %32 = getelementptr inbounds i8, ptr %0, i64 88
  %33 = getelementptr inbounds i8, ptr %0, i64 112
  %34 = getelementptr inbounds i8, ptr %1, i64 8
  br label %46

35:                                               ; preds = %.lr.ph, %35
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %35 ]
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %indvars.iv) #4
  %37 = load i32, ptr %36, align 4, !tbaa !32
  %38 = sext i32 %37 to i64
  %39 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %38) #4
  store i8 1, ptr %39, align 1, !tbaa !33
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %40 = load i32, ptr %22, align 4, !tbaa !31
  %41 = sext i32 %40 to i64
  %42 = icmp slt i64 %indvars.iv.next, %41
  br i1 %42, label %35, label %.preheader50.loopexit, !llvm.loop !34

.preheader.loopexit:                              ; preds = %.loopexit49
  %.pre68 = load i32, ptr %22, align 4, !tbaa !31
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %.preheader50
  %43 = phi i32 [ %.pre68, %.preheader.loopexit ], [ %26, %.preheader50 ]
  %44 = icmp sgt i32 %43, 0
  br i1 %44, label %.lr.ph57, label %.loopexit

.lr.ph57:                                         ; preds = %.preheader
  %45 = getelementptr inbounds i8, ptr %1, i64 8
  br label %98

46:                                               ; preds = %.lr.ph55, %.loopexit49
  %indvars.iv62 = phi i64 [ 0, %.lr.ph55 ], [ %indvars.iv.next63.pre-phi, %.loopexit49 ]
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %indvars.iv62) #4
  %48 = load i32, ptr %47, align 4, !tbaa !32
  %49 = sext i32 %48 to i64
  %50 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %49) #4
  %51 = load double, ptr %50, align 8, !tbaa !36
  %52 = tail call double @llvm.fabs.f64(double %51)
  %53 = fcmp ogt double %52, 0x3D06849B86A12B9B
  br i1 %53, label %54, label %93

54:                                               ; preds = %46
  %55 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %49) #4
  %56 = load i8, ptr %55, align 1, !tbaa !33
  %.not = icmp eq i8 %56, 0
  br i1 %.not, label %57, label %58

57:                                               ; preds = %54
  tail call void @__assert_fail(ptr noundef nonnull @.str.55, ptr noundef nonnull @.str.52, i32 noundef 97, ptr noundef nonnull @__PRETTY_FUNCTION__._ZNK17ProductFormUpdate5ftranER11HVectorBaseIdE) #3
  unreachable

58:                                               ; preds = %54
  %59 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %indvars.iv62) #4
  %60 = load double, ptr %59, align 8, !tbaa !36
  %61 = fdiv double %51, %60
  %62 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %49) #4
  store double %61, ptr %62, align 8, !tbaa !36
  %63 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %indvars.iv62) #4
  %64 = load i32, ptr %63, align 4, !tbaa !32
  %65 = add nuw nsw i64 %indvars.iv62, 1
  %66 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %65) #4
  %67 = load i32, ptr %66, align 4, !tbaa !32
  %68 = icmp slt i32 %64, %67
  br i1 %68, label %.lr.ph53, label %.loopexit49

.lr.ph53:                                         ; preds = %58
  %69 = fneg double %61
  %70 = sext i32 %64 to i64
  br label %71

71:                                               ; preds = %.lr.ph53, %88
  %indvars.iv59 = phi i64 [ %70, %.lr.ph53 ], [ %indvars.iv.next60, %88 ]
  %72 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %indvars.iv59) #4
  %73 = load i32, ptr %72, align 4, !tbaa !32
  %74 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %indvars.iv59) #4
  %75 = load double, ptr %74, align 8, !tbaa !36
  %76 = sext i32 %73 to i64
  %77 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %76) #4
  %78 = load double, ptr %77, align 8, !tbaa !36
  %79 = tail call double @llvm.fmuladd.f64(double %69, double %75, double %78)
  store double %79, ptr %77, align 8, !tbaa !36
  %80 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %76) #4
  %81 = load i8, ptr %80, align 1, !tbaa !33
  %.not48 = icmp eq i8 %81, 0
  br i1 %.not48, label %82, label %88

82:                                               ; preds = %71
  %83 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %76) #4
  store i8 1, ptr %83, align 1, !tbaa !33
  %84 = load i32, ptr %22, align 4, !tbaa !31
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %22, align 4, !tbaa !31
  %86 = sext i32 %84 to i64
  %87 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %86) #4
  store i32 %73, ptr %87, align 4, !tbaa !32
  br label %88

88:                                               ; preds = %71, %82
  %indvars.iv.next60 = add nsw i64 %indvars.iv59, 1
  %89 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %65) #4
  %90 = load i32, ptr %89, align 4, !tbaa !32
  %91 = sext i32 %90 to i64
  %92 = icmp slt i64 %indvars.iv.next60, %91
  br i1 %92, label %71, label %.loopexit49, !llvm.loop !37

93:                                               ; preds = %46
  %94 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %49) #4
  store double 0.000000e+00, ptr %94, align 8, !tbaa !36
  %.pre69 = add nuw nsw i64 %indvars.iv62, 1
  br label %.loopexit49

.loopexit49:                                      ; preds = %88, %58, %93
  %indvars.iv.next63.pre-phi = phi i64 [ %65, %58 ], [ %.pre69, %93 ], [ %65, %88 ]
  %95 = load i32, ptr %15, align 8, !tbaa !30
  %96 = sext i32 %95 to i64
  %97 = icmp slt i64 %indvars.iv.next63.pre-phi, %96
  br i1 %97, label %46, label %.preheader.loopexit, !llvm.loop !38

98:                                               ; preds = %.lr.ph57, %98
  %indvars.iv65 = phi i64 [ 0, %.lr.ph57 ], [ %indvars.iv.next66, %98 ]
  %99 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %indvars.iv65) #4
  %100 = load i32, ptr %99, align 4, !tbaa !32
  %101 = sext i32 %100 to i64
  %102 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %101) #4
  store i8 0, ptr %102, align 1, !tbaa !33
  %indvars.iv.next66 = add nuw nsw i64 %indvars.iv65, 1
  %103 = load i32, ptr %22, align 4, !tbaa !31
  %104 = sext i32 %103 to i64
  %105 = icmp slt i64 %indvars.iv.next66, %104
  br i1 %105, label %98, label %.loopexit, !llvm.loop !39

.loopexit:                                        ; preds = %98, %.preheader, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS17ProductFormUpdate", !7, i64 0, !10, i64 4, !10, i64 8, !11, i64 16, !16, i64 40, !11, i64 64, !11, i64 88, !16, i64 112}
!7 = !{!"bool", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_ZTSSt6vectorIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!20 = !{i8 0, i8 2}
!21 = !{}
!22 = !{!23, !10, i64 0}
!23 = !{!"_ZTS11HVectorBaseIdE", !10, i64 0, !10, i64 4, !11, i64 8, !16, i64 32, !24, i64 56, !25, i64 64, !11, i64 88, !15, i64 112, !7, i64 120, !10, i64 124, !11, i64 128, !16, i64 152}
!24 = !{!"double", !8, i64 0}
!25 = !{!"_ZTSSt6vectorIcSaIcEE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!29 = !{!6, !10, i64 4}
!30 = !{!6, !10, i64 8}
!31 = !{!23, !10, i64 4}
!32 = !{!10, !10, i64 0}
!33 = !{!8, !8, i64 0}
!34 = distinct !{!34, !35}
!35 = !{!"llvm.loop.mustprogress"}
!36 = !{!24, !24, i64 0}
!37 = distinct !{!37, !35}
!38 = distinct !{!38, !35}
!39 = distinct !{!39, !35}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass