; LLVM IR from chronoxor/CppBenchmark :: source/benchmark/settings.ll (ZN12CppBenchmark8Settings9PairRangeEiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.CppBenchmark::Settings" = type <{ i32, i8, [3 x i8], i64, i64, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %"class.std::tuple", i8, [7 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::tuple<int, int>, std::allocator<std::tuple<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::tuple<int, int>, std::allocator<std::tuple<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::tuple<int, int>, std::allocator<std::tuple<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::tuple<int, int>, std::allocator<std::tuple<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::tuple<int, int, int>, std::allocator<std::tuple<int, int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::tuple<int, int, int>, std::allocator<std::tuple<int, int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::tuple<int, int, int>, std::allocator<std::tuple<int, int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::tuple<int, int, int>, std::allocator<std::tuple<int, int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::tuple" = type { %"struct.std::_Tuple_impl" }
%"struct.std::_Tuple_impl" = type { %"struct.std::_Tuple_impl.10", %"struct.std::_Head_base.13" }
%"struct.std::_Tuple_impl.10" = type { %"struct.std::_Tuple_impl.11", %"struct.std::_Head_base.12" }
%"struct.std::_Tuple_impl.11" = type { %"struct.std::_Head_base" }
%"struct.std::_Head_base" = type { i32 }
%"struct.std::_Head_base.12" = type { i64 }
%"struct.std::_Head_base.13" = type { i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorISt5tupleIJiiiEESaIS1_EE12emplace_backIJRiS5_iEEERS1_DpOT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(121) ptr @_ZN12CppBenchmark8Settings9PairRangeEiiii(ptr noundef nonnull align 8 dereferenceable(121) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  %15 = load ptr, ptr %6, align 8
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp sge i32 %16, 0
  br i1 %17, label %18, label %62

18:                                               ; preds = %5
  %19 = load i32, ptr %8, align 4, !tbaa !9
  %20 = icmp sge i32 %19, 0
  br i1 %20, label %21, label %62

21:                                               ; preds = %18
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = icmp sge i32 %22, 0
  br i1 %23, label %24, label %62

24:                                               ; preds = %21
  %25 = load i32, ptr %10, align 4, !tbaa !9
  %26 = icmp sge i32 %25, 0
  br i1 %26, label %27, label %62

27:                                               ; preds = %24
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = icmp sgt i32 %28, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %8) #3
  br label %32

32:                                               ; preds = %31, %27
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = load i32, ptr %10, align 4, !tbaa !9
  %35 = icmp sgt i32 %33, %34
  br i1 %35, label %36, label %37

36:                                               ; preds = %32
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %10) #3
  br label %37

37:                                               ; preds = %36, %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %38 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %38, ptr %11, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %58, %37
  %40 = load i32, ptr %11, align 4, !tbaa !9
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = icmp sle i32 %40, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %39
  store i32 2, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %61

44:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %45 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %45, ptr %13, align 4, !tbaa !9
  br label %46

46:                                               ; preds = %54, %44
  %47 = load i32, ptr %13, align 4, !tbaa !9
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = icmp sle i32 %47, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %46
  store i32 5, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %57

51:                                               ; preds = %46
  %52 = getelementptr inbounds %"class.CppBenchmark::Settings", ptr %15, i32 0, i32 7
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 -1, ptr %14, align 4, !tbaa !9
  %53 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorISt5tupleIJiiiEESaIS1_EE12emplace_backIJRiS5_iEEERS1_DpOT_(ptr noundef nonnull align 8 dereferenceable(24) %52, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull align 4 dereferenceable(4) %14)
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %54

54:                                               ; preds = %51
  %55 = load i32, ptr %13, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %13, align 4, !tbaa !9
  br label %46, !llvm.loop !11

57:                                               ; preds = %50
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %11, align 4, !tbaa !9
  br label %39, !llvm.loop !13

61:                                               ; preds = %43
  br label %62

62:                                               ; preds = %61, %24, %21, %18, %5
  ret ptr %15
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorISt5tupleIJiiiEESaIS1_EE12emplace_backIJRiS5_iEEERS1_DpOT_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(121) ptr @_ZN12CppBenchmark8Settings9PairRangeEiiii(ptr noundef nonnull returned align 8 dereferenceable(121) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #2 align 2 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  store i32 %4, ptr %9, align 4, !tbaa !5
  %13 = or i32 %2, %1
  %14 = or i32 %13, %3
  %15 = or i32 %14, %4
  %or.cond5 = icmp sgt i32 %15, -1
  br i1 %or.cond5, label %16, label %41

16:                                               ; preds = %5
  %17 = icmp sgt i32 %1, %2
  br i1 %17, label %18, label %19

18:                                               ; preds = %16
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %7) #3
  br label %19

19:                                               ; preds = %18, %16
  %20 = icmp sgt i32 %3, %4
  br i1 %20, label %21, label %22

21:                                               ; preds = %19
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %9) #3
  br label %22

22:                                               ; preds = %21, %19
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #3
  %23 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %23, ptr %10, align 4, !tbaa !5
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %.not10 = icmp sgt i32 %23, %24
  br i1 %.not10, label %._crit_edge13, label %.lr.ph12

.lr.ph12:                                         ; preds = %22
  %25 = getelementptr inbounds i8, ptr %0, i64 72
  %26 = load i32, ptr %8, align 4, !tbaa !5
  %27 = load i32, ptr %9, align 4, !tbaa !5
  %28 = icmp sgt i32 %26, %27
  br i1 %28, label %._crit_edge13, label %.lr.ph12.split

._crit_edge13:                                    ; preds = %._crit_edge, %.lr.ph12, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #3
  br label %41

.lr.ph12.split:                                   ; preds = %.lr.ph12, %._crit_edge
  %29 = phi i32 [ %33, %._crit_edge ], [ %24, %.lr.ph12 ]
  %30 = phi i32 [ %36, %._crit_edge ], [ %23, %.lr.ph12 ]
  %31 = phi i32 [ %35, %._crit_edge ], [ %27, %.lr.ph12 ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %11) #3
  %32 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %32, ptr %11, align 4, !tbaa !5
  %.not89 = icmp sgt i32 %32, %31
  br i1 %.not89, label %._crit_edge, label %.lr.ph

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %.pre = load i32, ptr %10, align 4, !tbaa !5
  %.pre14 = load i32, ptr %7, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph12.split
  %33 = phi i32 [ %.pre14, %._crit_edge.loopexit ], [ %29, %.lr.ph12.split ]
  %34 = phi i32 [ %.pre, %._crit_edge.loopexit ], [ %30, %.lr.ph12.split ]
  %35 = phi i32 [ %40, %._crit_edge.loopexit ], [ %31, %.lr.ph12.split ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #3
  %36 = add nsw i32 %34, 1
  store i32 %36, ptr %10, align 4, !tbaa !5
  %.not.not = icmp slt i32 %34, %33
  br i1 %.not.not, label %.lr.ph12.split, label %._crit_edge13, !llvm.loop !9

.lr.ph:                                           ; preds = %.lr.ph12.split, %.lr.ph
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %12) #3
  store i32 -1, ptr %12, align 4, !tbaa !5
  %37 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZNSt6vectorISt5tupleIJiiiEESaIS1_EE12emplace_backIJRiS5_iEEERS1_DpOT_(ptr noundef nonnull align 8 dereferenceable(24) %25, ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %12)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %12) #3
  %38 = load i32, ptr %11, align 4, !tbaa !5
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %11, align 4, !tbaa !5
  %40 = load i32, ptr %9, align 4, !tbaa !5
  %.not8.not = icmp slt i32 %38, %40
  br i1 %.not8.not, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !12

41:                                               ; preds = %._crit_edge13, %5
  ret ptr %0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalDCEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass