; LLVM IR from ERGO-Code/HiGHS :: src/util/HighsUtils.ll (Z17updateScatterDataddR16HighsScatterData)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.HighsScatterData = type <{ i32, i32, i32, [4 x i8], %"class.std::vector.3", %"class.std::vector.3", i8, [7 x i8], double, double, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8] }>
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z17updateScatterDataddR16HighsScatterData(double noundef %0, double noundef %1, ptr noundef nonnull align 8 dereferenceable(156) %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  %7 = alloca ptr, align 8
  store double %0, ptr %5, align 8, !tbaa !5
  store double %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  %8 = load double, ptr %5, align 8, !tbaa !5
  %9 = fcmp ole double %8, 0.000000e+00
  br i1 %9, label %13, label %10

10:                                               ; preds = %3
  %11 = load double, ptr %6, align 8, !tbaa !5
  %12 = fcmp ole double %11, 0.000000e+00
  br i1 %12, label %13, label %14

13:                                               ; preds = %10, %3
  store i1 false, ptr %4, align 1
  br label %50

14:                                               ; preds = %10
  %15 = load ptr, ptr %7, align 8, !tbaa !9
  %16 = getelementptr inbounds %struct.HighsScatterData, ptr %15, i32 0, i32 1
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %16, align 4, !tbaa !11
  %19 = load ptr, ptr %7, align 8, !tbaa !9
  %20 = getelementptr inbounds %struct.HighsScatterData, ptr %19, i32 0, i32 2
  %21 = load i32, ptr %20, align 8, !tbaa !19
  %22 = add nsw i32 %21, 1
  store i32 %22, ptr %20, align 8, !tbaa !19
  %23 = load ptr, ptr %7, align 8, !tbaa !9
  %24 = getelementptr inbounds %struct.HighsScatterData, ptr %23, i32 0, i32 2
  %25 = load i32, ptr %24, align 8, !tbaa !19
  %26 = load ptr, ptr %7, align 8, !tbaa !9
  %27 = getelementptr inbounds %struct.HighsScatterData, ptr %26, i32 0, i32 0
  %28 = load i32, ptr %27, align 8, !tbaa !20
  %29 = icmp eq i32 %25, %28
  br i1 %29, label %30, label %33

30:                                               ; preds = %14
  %31 = load ptr, ptr %7, align 8, !tbaa !9
  %32 = getelementptr inbounds %struct.HighsScatterData, ptr %31, i32 0, i32 2
  store i32 0, ptr %32, align 8, !tbaa !19
  br label %33

33:                                               ; preds = %30, %14
  %34 = load double, ptr %5, align 8, !tbaa !5
  %35 = load ptr, ptr %7, align 8, !tbaa !9
  %36 = getelementptr inbounds %struct.HighsScatterData, ptr %35, i32 0, i32 4
  %37 = load ptr, ptr %7, align 8, !tbaa !9
  %38 = getelementptr inbounds %struct.HighsScatterData, ptr %37, i32 0, i32 2
  %39 = load i32, ptr %38, align 8, !tbaa !19
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %40) #1
  store double %34, ptr %41, align 8, !tbaa !5
  %42 = load double, ptr %6, align 8, !tbaa !5
  %43 = load ptr, ptr %7, align 8, !tbaa !9
  %44 = getelementptr inbounds %struct.HighsScatterData, ptr %43, i32 0, i32 5
  %45 = load ptr, ptr %7, align 8, !tbaa !9
  %46 = getelementptr inbounds %struct.HighsScatterData, ptr %45, i32 0, i32 2
  %47 = load i32, ptr %46, align 8, !tbaa !19
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %48) #1
  store double %42, ptr %49, align 8, !tbaa !5
  store i1 true, ptr %4, align 1
  br label %50

50:                                               ; preds = %33, %13
  %51 = load i1, ptr %4, align 1
  ret i1 %51
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !13, i64 4}
!12 = !{!"_ZTS16HighsScatterData", !13, i64 0, !13, i64 4, !13, i64 8, !14, i64 16, !14, i64 40, !18, i64 64, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96, !6, i64 104, !6, i64 112, !13, i64 120, !13, i64 124, !13, i64 128, !13, i64 132, !13, i64 136, !13, i64 140, !13, i64 144, !13, i64 148, !13, i64 152}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!18 = !{!"bool", !7, i64 0}
!19 = !{!12, !13, i64 8}
!20 = !{!12, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z17updateScatterDataddR16HighsScatterData(double noundef %0, double noundef %1, ptr noundef nonnull align 8 dereferenceable(156) %2) local_unnamed_addr #0 {
  %4 = fcmp ugt double %0, 0.000000e+00
  %5 = fcmp ugt double %1, 0.000000e+00
  %or.cond.not = and i1 %4, %5
  br i1 %or.cond.not, label %6, label %22

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %2, i64 4
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = add nsw i32 %8, 1
  store i32 %9, ptr %7, align 4, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %2, i64 8
  %11 = load i32, ptr %10, align 8, !tbaa !17
  %12 = add nsw i32 %11, 1
  %13 = load i32, ptr %2, align 8, !tbaa !18
  %14 = icmp eq i32 %12, %13
  %spec.store.select = select i1 %14, i32 0, i32 %12
  store i32 %spec.store.select, ptr %10, align 8
  %15 = getelementptr inbounds i8, ptr %2, i64 16
  %16 = sext i32 %spec.store.select to i64
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %16) #1
  store double %0, ptr %17, align 8, !tbaa !19
  %18 = getelementptr inbounds i8, ptr %2, i64 40
  %19 = load i32, ptr %10, align 8, !tbaa !17
  %20 = sext i32 %19 to i64
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %20) #1
  store double %1, ptr %21, align 8, !tbaa !19
  br label %22

22:                                               ; preds = %3, %6
  ret i1 %or.cond.not
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"_ZTS16HighsScatterData", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16, !10, i64 40, !15, i64 64, !16, i64 72, !16, i64 80, !16, i64 88, !16, i64 96, !16, i64 104, !16, i64 112, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIdSaIdEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"bool", !8, i64 0}
!16 = !{!"double", !8, i64 0}
!17 = !{!6, !7, i64 8}
!18 = !{!6, !7, i64 0}
!19 = !{!16, !16, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass