; LLVM IR from jrl-umi3218/mc_rtc :: 3rd-party/qhull/src/libqhull (qset)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.qhmemT = type { i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.setT = type { i32, [1 x %union.setelemT] }
%union.setelemT = type { ptr }

@qhmem = external global %struct.qhmemT, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @qh_setnew(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %7 = load i32, ptr %2, align 4, !tbaa !5
  %8 = icmp ne i32 %7, 0
  br i1 %8, label %12, label %9

9:                                                ; preds = %1
  %10 = load i32, ptr %2, align 4, !tbaa !5
  %11 = add nsw i32 %10, 1
  store i32 %11, ptr %2, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %9, %1
  %13 = load i32, ptr %2, align 4, !tbaa !5
  %14 = mul nsw i32 %13, 8
  %15 = add nsw i32 16, %14
  store i32 %15, ptr %5, align 4, !tbaa !5
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = icmp sgt i32 %16, 0
  br i1 %17, label %18, label %46

18:                                               ; preds = %12
  %19 = load i32, ptr %5, align 4, !tbaa !5
  %20 = load i32, ptr getelementptr inbounds (%struct.qhmemT, ptr @qhmem, i32 0, i32 4), align 8, !tbaa !9
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %46

22:                                               ; preds = %18
  %23 = load ptr, ptr %6, align 8, !tbaa !12
  %24 = load i32, ptr %5, align 4, !tbaa !5
  %25 = call ptr @qh_memalloc(i32 noundef %24)
  store ptr %25, ptr %3, align 8, !tbaa !12
  %26 = load ptr, ptr getelementptr inbounds (%struct.qhmemT, ptr @qhmem, i32 0, i32 7), align 8, !tbaa !13
  %27 = load ptr, ptr getelementptr inbounds (%struct.qhmemT, ptr @qhmem, i32 0, i32 8), align 8, !tbaa !14
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds i32, ptr %27, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds i32, ptr %26, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  store i32 %34, ptr %4, align 4, !tbaa !5
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = load i32, ptr %5, align 4, !tbaa !5
  %37 = icmp sgt i32 %35, %36
  br i1 %37, label %38, label %45

38:                                               ; preds = %22
  %39 = load i32, ptr %4, align 4, !tbaa !5
  %40 = load i32, ptr %5, align 4, !tbaa !5
  %41 = sub nsw i32 %39, %40
  %42 = sdiv i32 %41, 8
  %43 = load i32, ptr %2, align 4, !tbaa !5
  %44 = add nsw i32 %43, %42
  store i32 %44, ptr %2, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %38, %22
  br label %49

46:                                               ; preds = %18, %12
  %47 = load i32, ptr %5, align 4, !tbaa !5
  %48 = call ptr @qh_memalloc(i32 noundef %47)
  store ptr %48, ptr %3, align 8, !tbaa !12
  br label %49

49:                                               ; preds = %46, %45
  %50 = load i32, ptr %2, align 4, !tbaa !5
  %51 = load ptr, ptr %3, align 8, !tbaa !12
  %52 = getelementptr inbounds %struct.setT, ptr %51, i32 0, i32 0
  store i32 %50, ptr %52, align 8, !tbaa !15
  %53 = load ptr, ptr %3, align 8, !tbaa !12
  %54 = getelementptr inbounds %struct.setT, ptr %53, i32 0, i32 1
  %55 = load i32, ptr %2, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [1 x %union.setelemT], ptr %54, i64 0, i64 %56
  store i32 1, ptr %57, align 8, !tbaa !17
  %58 = load ptr, ptr %3, align 8, !tbaa !12
  %59 = getelementptr inbounds %struct.setT, ptr %58, i32 0, i32 1
  %60 = getelementptr inbounds [1 x %union.setelemT], ptr %59, i64 0, i64 0
  store ptr null, ptr %60, align 8, !tbaa !17
  %61 = load ptr, ptr %3, align 8, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret ptr %61
}

declare ptr @qh_memalloc(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"qhmemT", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !6, i64 64, !11, i64 72, !11, i64 80, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 32}
!14 = !{!10, !11, i64 40}
!15 = !{!16, !6, i64 0}
!16 = !{!"setT", !6, i64 0, !7, i64 8}
!17 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.qhmemT = type { i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%union.setelemT = type { ptr }

@qhmem = external local_unnamed_addr global %struct.qhmemT, align 8

; Function Attrs: nounwind uwtable
define dso_local ptr @qh_setnew(i32 noundef %0) local_unnamed_addr #0 {
  %spec.select = tail call i32 @llvm.umax.i32(i32 %0, i32 1)
  %2 = shl nsw i32 %spec.select, 3
  %3 = add nsw i32 %2, 16
  %4 = icmp slt i32 %spec.select, -1
  %5 = load i32, ptr getelementptr inbounds (i8, ptr @qhmem, i64 16), align 8
  %.not24 = icmp sgt i32 %3, %5
  %or.cond = select i1 %4, i1 true, i1 %.not24
  %6 = tail call ptr @qh_memalloc(i32 noundef %3) #3
  br i1 %or.cond, label %21, label %7

7:                                                ; preds = %1
  %8 = load ptr, ptr getelementptr inbounds (i8, ptr @qhmem, i64 32), align 8, !tbaa !5
  %9 = load ptr, ptr getelementptr inbounds (i8, ptr @qhmem, i64 40), align 8, !tbaa !11
  %10 = zext nneg i32 %3 to i64
  %11 = getelementptr inbounds i32, ptr %9, i64 %10
  %12 = load i32, ptr %11, align 4, !tbaa !12
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds i32, ptr %8, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !12
  %16 = icmp sgt i32 %15, %3
  br i1 %16, label %17, label %21

17:                                               ; preds = %7
  %18 = sub nsw i32 %15, %3
  %19 = sdiv i32 %18, 8
  %20 = add nsw i32 %19, %spec.select
  br label %21

21:                                               ; preds = %1, %7, %17
  %.1 = phi i32 [ %20, %17 ], [ %spec.select, %7 ], [ %spec.select, %1 ]
  store i32 %.1, ptr %6, align 8, !tbaa !13
  %22 = getelementptr inbounds i8, ptr %6, i64 8
  %23 = sext i32 %.1 to i64
  %24 = getelementptr inbounds [1 x %union.setelemT], ptr %22, i64 0, i64 %23
  store i32 1, ptr %24, align 8, !tbaa !15
  store ptr null, ptr %22, align 8, !tbaa !15
  ret ptr %6
}

declare ptr @qh_memalloc(i32 noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 32}
!6 = !{!"qhmemT", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !7, i64 64, !10, i64 72, !10, i64 80, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 40}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"setT", !7, i64 0, !8, i64 8}
!15 = !{!8, !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass