; LLVM IR from ARM-software/Arm-2D :: Acceleration/Arm/ACI/arm_2d_rgb565_aci_fvp_plugin (arm_2d_rgb565_aci_fvp)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z27arm_mix_unpack_red_uint16x2PtPKtb(ptr noundef %0, ptr noundef %1, i1 noundef zeroext %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %9 = zext i1 %2 to i8
  store i8 %9, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 2, ptr %7, align 4, !tbaa !11
  br label %10

10:                                               ; preds = %37, %3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds i16, ptr %11, i32 1
  store ptr %12, ptr %5, align 8, !tbaa !5
  %13 = load i16, ptr %11, align 2, !tbaa !13
  %14 = zext i16 %13 to i32
  %15 = ashr i32 %14, 11
  %16 = trunc i32 %15 to i8
  store i8 %16, ptr %8, align 1, !tbaa !15
  %17 = load i8, ptr %8, align 1, !tbaa !15
  %18 = zext i8 %17 to i32
  %19 = shl i32 %18, 3
  %20 = trunc i32 %19 to i8
  store i8 %20, ptr %8, align 1, !tbaa !15
  %21 = load i8, ptr %6, align 1, !tbaa !9, !range !16, !noundef !17
  %22 = trunc i8 %21 to i1
  br i1 %22, label %23, label %26

23:                                               ; preds = %10
  %24 = load i8, ptr %8, align 1, !tbaa !15
  %25 = zext i8 %24 to i32
  br label %30

26:                                               ; preds = %10
  %27 = load i8, ptr %8, align 1, !tbaa !15
  %28 = zext i8 %27 to i32
  %29 = shl i32 %28, 8
  br label %30

30:                                               ; preds = %26, %23
  %31 = phi i32 [ %25, %23 ], [ %29, %26 ]
  %32 = trunc i32 %31 to i16
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds i16, ptr %33, i32 1
  store ptr %34, ptr %4, align 8, !tbaa !5
  store i16 %32, ptr %33, align 2, !tbaa !13
  %35 = load i32, ptr %7, align 4, !tbaa !11
  %36 = sub nsw i32 %35, 1
  store i32 %36, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  br label %37

37:                                               ; preds = %30
  %38 = load i32, ptr %7, align 4, !tbaa !11
  %39 = icmp sgt i32 %38, 0
  br i1 %39, label %10, label %40, !llvm.loop !18

40:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_Z27arm_mix_unpack_red_uint16x2PtPKtb(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i1 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %1, i64 2
  %5 = load i16, ptr %1, align 2, !tbaa !5
  br i1 %2, label %.split.us.preheader, label %.split.preheader

.split.preheader:                                 ; preds = %3
  %6 = and i16 %5, -2048
  %7 = getelementptr inbounds i8, ptr %0, i64 2
  store i16 %6, ptr %0, align 2, !tbaa !5
  %8 = load i16, ptr %4, align 2, !tbaa !5
  %9 = and i16 %8, -2048
  store i16 %9, ptr %7, align 2, !tbaa !5
  br label %.split10.us

.split.us.preheader:                              ; preds = %3
  %10 = lshr i16 %5, 8
  %11 = and i16 %10, 248
  %12 = getelementptr inbounds i8, ptr %0, i64 2
  store i16 %11, ptr %0, align 2, !tbaa !5
  %13 = load i16, ptr %4, align 2, !tbaa !5
  %14 = lshr i16 %13, 8
  %15 = and i16 %14, 248
  store i16 %15, ptr %12, align 2, !tbaa !5
  br label %.split10.us

.split10.us:                                      ; preds = %.split.preheader, %.split.us.preheader
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LoopInstSimplifyPass,LoopSimplifyCFGPass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass