; LLVM IR from ERGO-Code/HiGHS :: src/simplex/HSimplex.ll (Z25appendNonbasicColsToBasisR7HighsLpR12SimplexBasisi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HighsLp = type { i32, i32, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %class.HighsSparseMatrix, i32, double, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i32, %"class.std::vector.18", %"class.std::vector.18", %"class.std::vector.23", %struct.HighsNameHash, %struct.HighsNameHash, i32, i32, %struct.HighsScale, i8, i8, i32, i8, %struct.HighsLpMods }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HighsSparseMatrix = type { i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.13" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsNameHash = type { %"class.std::unordered_map" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%struct.HighsScale = type { i32, i8, i32, i32, double, %"class.std::vector.13", %"class.std::vector.13" }
%struct.HighsLpMods = type { %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.23", %"class.std::vector", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13" }
%struct.SimplexBasis = type { %"class.std::vector", %"class.std::vector.3", %"class.std::vector.3", i64, i32, i32, %"class.std::__cxx11::basic_string" }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.53 = external hidden unnamed_addr constant [74 x i8], align 1
@.str.55 = external hidden unnamed_addr constant [26 x i8], align 1
@__PRETTY_FUNCTION__._Z25appendNonbasicColsToBasisR7HighsLpR12SimplexBasisi = external hidden unnamed_addr constant [68 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

declare noundef zeroext i1 @_Z16highs_isInfinityd(double noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z25appendNonbasicColsToBasisR7HighsLpR12SimplexBasisi(ptr noundef nonnull align 8 dereferenceable(920) %0, ptr noundef nonnull align 8 dereferenceable(120) %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca double, align 8
  %13 = alloca double, align 8
  %14 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %15 = load i32, ptr %6, align 4, !tbaa !9
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %17, label %18

17:                                               ; preds = %3
  br label %178

18:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #6
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %class.HighsLp, ptr %19, i32 0, i32 0
  %21 = load i32, ptr %20, align 8, !tbaa !11
  %22 = load i32, ptr %6, align 4, !tbaa !9
  %23 = add nsw i32 %21, %22
  store i32 %23, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %class.HighsLp, ptr %25, i32 0, i32 1
  %27 = load i32, ptr %26, align 4, !tbaa !45
  %28 = add nsw i32 %24, %27
  store i32 %28, ptr %8, align 4, !tbaa !9
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.SimplexBasis, ptr %29, i32 0, i32 1
  %31 = load i32, ptr %8, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %32)
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.SimplexBasis, ptr %33, i32 0, i32 2
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %class.HighsLp, ptr %37, i32 0, i32 1
  %39 = load i32, ptr %38, align 4, !tbaa !45
  %40 = sub nsw i32 %39, 1
  store i32 %40, ptr %9, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %101, %18
  %42 = load i32, ptr %9, align 4, !tbaa !9
  %43 = icmp sge i32 %42, 0
  br i1 %43, label %45, label %44

44:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  br label %104

45:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.SimplexBasis, ptr %46, i32 0, i32 0
  %48 = load i32, ptr %9, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %49) #6
  %51 = load i32, ptr %50, align 4, !tbaa !9
  store i32 %51, ptr %10, align 4, !tbaa !9
  %52 = load i32, ptr %10, align 4, !tbaa !9
  %53 = load ptr, ptr %4, align 8, !tbaa !5
  %54 = getelementptr inbounds %class.HighsLp, ptr %53, i32 0, i32 0
  %55 = load i32, ptr %54, align 8, !tbaa !11
  %56 = icmp sge i32 %52, %55
  br i1 %56, label %57, label %66

57:                                               ; preds = %45
  %58 = load i32, ptr %6, align 4, !tbaa !9
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.SimplexBasis, ptr %59, i32 0, i32 0
  %61 = load i32, ptr %9, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #6
  %64 = load i32, ptr %63, align 4, !tbaa !9
  %65 = add nsw i32 %64, %58
  store i32 %65, ptr %63, align 4, !tbaa !9
  br label %66

66:                                               ; preds = %57, %45
  %67 = load ptr, ptr %5, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.SimplexBasis, ptr %67, i32 0, i32 1
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  %70 = getelementptr inbounds %class.HighsLp, ptr %69, i32 0, i32 0
  %71 = load i32, ptr %70, align 8, !tbaa !11
  %72 = load i32, ptr %9, align 4, !tbaa !9
  %73 = add nsw i32 %71, %72
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %74) #6
  %76 = load i8, ptr %75, align 1, !tbaa !46
  %77 = load ptr, ptr %5, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.SimplexBasis, ptr %77, i32 0, i32 1
  %79 = load i32, ptr %7, align 4, !tbaa !9
  %80 = load i32, ptr %9, align 4, !tbaa !9
  %81 = add nsw i32 %79, %80
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %82) #6
  store i8 %76, ptr %83, align 1, !tbaa !46
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.SimplexBasis, ptr %84, i32 0, i32 2
  %86 = load ptr, ptr %4, align 8, !tbaa !5
  %87 = getelementptr inbounds %class.HighsLp, ptr %86, i32 0, i32 0
  %88 = load i32, ptr %87, align 8, !tbaa !11
  %89 = load i32, ptr %9, align 4, !tbaa !9
  %90 = add nsw i32 %88, %89
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %91) #6
  %93 = load i8, ptr %92, align 1, !tbaa !46
  %94 = load ptr, ptr %5, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.SimplexBasis, ptr %94, i32 0, i32 2
  %96 = load i32, ptr %7, align 4, !tbaa !9
  %97 = load i32, ptr %9, align 4, !tbaa !9
  %98 = add nsw i32 %96, %97
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %95, i64 noundef %99) #6
  store i8 %93, ptr %100, align 1, !tbaa !46
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  br label %101

101:                                              ; preds = %66
  %102 = load i32, ptr %9, align 4, !tbaa !9
  %103 = add nsw i32 %102, -1
  store i32 %103, ptr %9, align 4, !tbaa !9
  br label %41, !llvm.loop !47

104:                                              ; preds = %44
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #6
  %105 = load ptr, ptr %4, align 8, !tbaa !5
  %106 = getelementptr inbounds %class.HighsLp, ptr %105, i32 0, i32 0
  %107 = load i32, ptr %106, align 8, !tbaa !11
  store i32 %107, ptr %11, align 4, !tbaa !9
  br label %108

108:                                              ; preds = %174, %104
  %109 = load i32, ptr %11, align 4, !tbaa !9
  %110 = load i32, ptr %7, align 4, !tbaa !9
  %111 = icmp slt i32 %109, %110
  br i1 %111, label %113, label %112

112:                                              ; preds = %108
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #6
  br label %177

113:                                              ; preds = %108
  %114 = load ptr, ptr %5, align 8, !tbaa !5
  %115 = getelementptr inbounds %struct.SimplexBasis, ptr %114, i32 0, i32 1
  %116 = load i32, ptr %11, align 4, !tbaa !9
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %117) #6
  store i8 1, ptr %118, align 1, !tbaa !46
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %119 = load ptr, ptr %4, align 8, !tbaa !5
  %120 = getelementptr inbounds %class.HighsLp, ptr %119, i32 0, i32 3
  %121 = load i32, ptr %11, align 4, !tbaa !9
  %122 = sext i32 %121 to i64
  %123 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %120, i64 noundef %122) #6
  %124 = load double, ptr %123, align 8, !tbaa !49
  store double %124, ptr %12, align 8, !tbaa !49
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  %125 = load ptr, ptr %4, align 8, !tbaa !5
  %126 = getelementptr inbounds %class.HighsLp, ptr %125, i32 0, i32 4
  %127 = load i32, ptr %11, align 4, !tbaa !9
  %128 = sext i32 %127 to i64
  %129 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %126, i64 noundef %128) #6
  %130 = load double, ptr %129, align 8, !tbaa !49
  store double %130, ptr %13, align 8, !tbaa !49
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #6
  store i8 -99, ptr %14, align 1, !tbaa !46
  %131 = load double, ptr %12, align 8, !tbaa !49
  %132 = load double, ptr %13, align 8, !tbaa !49
  %133 = fcmp oeq double %131, %132
  br i1 %133, label %134, label %135

134:                                              ; preds = %113
  store i8 0, ptr %14, align 1, !tbaa !46
  br label %160

135:                                              ; preds = %113
  %136 = load double, ptr %12, align 8, !tbaa !49
  %137 = fneg double %136
  %138 = call noundef zeroext i1 @_Z16highs_isInfinityd(double noundef %137)
  br i1 %138, label %153, label %139

139:                                              ; preds = %135
  %140 = load double, ptr %13, align 8, !tbaa !49
  %141 = call noundef zeroext i1 @_Z16highs_isInfinityd(double noundef %140)
  br i1 %141, label %151, label %142

142:                                              ; preds = %139
  %143 = load double, ptr %12, align 8, !tbaa !49
  %144 = call double @llvm.fabs.f64(double %143)
  %145 = load double, ptr %13, align 8, !tbaa !49
  %146 = call double @llvm.fabs.f64(double %145)
  %147 = fcmp olt double %144, %146
  br i1 %147, label %148, label %149

148:                                              ; preds = %142
  store i8 1, ptr %14, align 1, !tbaa !46
  br label %150

149:                                              ; preds = %142
  store i8 -1, ptr %14, align 1, !tbaa !46
  br label %150

150:                                              ; preds = %149, %148
  br label %152

151:                                              ; preds = %139
  store i8 1, ptr %14, align 1, !tbaa !46
  br label %152

152:                                              ; preds = %151, %150
  br label %159

153:                                              ; preds = %135
  %154 = load double, ptr %13, align 8, !tbaa !49
  %155 = call noundef zeroext i1 @_Z16highs_isInfinityd(double noundef %154)
  br i1 %155, label %157, label %156

156:                                              ; preds = %153
  store i8 -1, ptr %14, align 1, !tbaa !46
  br label %158

157:                                              ; preds = %153
  store i8 0, ptr %14, align 1, !tbaa !46
  br label %158

158:                                              ; preds = %157, %156
  br label %159

159:                                              ; preds = %158, %152
  br label %160

160:                                              ; preds = %159, %134
  %161 = load i8, ptr %14, align 1, !tbaa !46
  %162 = sext i8 %161 to i32
  %163 = icmp ne i32 %162, -99
  br i1 %163, label %164, label %165

164:                                              ; preds = %160
  br label %167

165:                                              ; preds = %160
  call void @__assert_fail(ptr noundef @.str.55, ptr noundef @.str.53, i32 noundef 118, ptr noundef @__PRETTY_FUNCTION__._Z25appendNonbasicColsToBasisR7HighsLpR12SimplexBasisi) #7
  unreachable

166:                                              ; No predecessors!
  br label %167

167:                                              ; preds = %166, %164
  %168 = load i8, ptr %14, align 1, !tbaa !46
  %169 = load ptr, ptr %5, align 8, !tbaa !5
  %170 = getelementptr inbounds %struct.SimplexBasis, ptr %169, i32 0, i32 2
  %171 = load i32, ptr %11, align 4, !tbaa !9
  %172 = sext i32 %171 to i64
  %173 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %170, i64 noundef %172) #6
  store i8 %168, ptr %173, align 1, !tbaa !46
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  br label %174

174:                                              ; preds = %167
  %175 = load i32, ptr %11, align 4, !tbaa !9
  %176 = add nsw i32 %175, 1
  store i32 %176, ptr %11, align 4, !tbaa !9
  br label %108, !llvm.loop !50

177:                                              ; preds = %112
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #6
  br label %178

178:                                              ; preds = %177, %17
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTS7HighsLp", !10, i64 0, !10, i64 4, !13, i64 8, !13, i64 32, !13, i64 56, !13, i64 80, !13, i64 104, !17, i64 128, !23, i64 240, !24, i64 248, !25, i64 256, !25, i64 288, !10, i64 320, !10, i64 324, !28, i64 328, !28, i64 352, !32, i64 376, !36, i64 400, !36, i64 456, !10, i64 512, !10, i64 516, !42, i64 520, !43, i64 592, !43, i64 593, !10, i64 596, !43, i64 600, !44, i64 608}
!13 = !{!"_ZTSSt6vectorIdSaIdEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTS17HighsSparseMatrix", !18, i64 0, !10, i64 4, !10, i64 8, !19, i64 16, !19, i64 40, !19, i64 64, !13, i64 88}
!18 = !{!"_ZTS12MatrixFormat", !7, i64 0}
!19 = !{!"_ZTSSt6vectorIiSaIiEE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTS8ObjSense", !7, i64 0}
!24 = !{!"double", !7, i64 0}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !26, i64 0, !27, i64 8, !7, i64 16}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!27 = !{!"long", !7, i64 0}
!28 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{!"_ZTS13HighsNameHash", !37, i64 0}
!37 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !38, i64 0}
!38 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !27, i64 8, !39, i64 16, !27, i64 24, !40, i64 32, !6, i64 48}
!39 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!40 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !41, i64 0, !27, i64 8}
!41 = !{!"float", !7, i64 0}
!42 = !{!"_ZTS10HighsScale", !10, i64 0, !43, i64 4, !10, i64 8, !10, i64 12, !24, i64 16, !13, i64 24, !13, i64 48}
!43 = !{!"bool", !7, i64 0}
!44 = !{!"_ZTS11HighsLpMods", !19, i64 0, !19, i64 24, !13, i64 48, !13, i64 72, !32, i64 96, !19, i64 120, !13, i64 144, !19, i64 168, !13, i64 192, !19, i64 216, !13, i64 240, !13, i64 264, !13, i64 288}
!45 = !{!12, !10, i64 4}
!46 = !{!7, !7, i64 0}
!47 = distinct !{!47, !48}
!48 = !{!"llvm.loop.mustprogress"}
!49 = !{!24, !24, i64 0}
!50 = distinct !{!50, !48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

declare noundef zeroext i1 @_Z16highs_isInfinityd(double noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z25appendNonbasicColsToBasisR7HighsLpR12SimplexBasisi(ptr noundef nonnull align 8 dereferenceable(920) %0, ptr noundef nonnull align 8 dereferenceable(120) %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %2, 0
  br i1 %4, label %.loopexit, label %5

5:                                                ; preds = %3
  %6 = load i32, ptr %0, align 8, !tbaa !5
  %7 = add nsw i32 %6, %2
  %8 = getelementptr inbounds i8, ptr %0, i64 4
  %9 = load i32, ptr %8, align 4, !tbaa !43
  %10 = add nsw i32 %7, %9
  %11 = getelementptr inbounds i8, ptr %1, i64 24
  %12 = sext i32 %10 to i64
  tail call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %12)
  %13 = getelementptr inbounds i8, ptr %1, i64 48
  tail call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %12)
  %14 = load i32, ptr %8, align 4, !tbaa !43
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %5
  %16 = zext nneg i32 %14 to i64
  %17 = sext i32 %7 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %30, %5
  %18 = load i32, ptr %0, align 8, !tbaa !5
  %19 = icmp slt i32 %18, %7
  br i1 %19, label %.lr.ph61, label %.loopexit

.lr.ph61:                                         ; preds = %._crit_edge
  %20 = getelementptr inbounds i8, ptr %0, i64 32
  %21 = getelementptr inbounds i8, ptr %0, i64 56
  %22 = sext i32 %18 to i64
  br label %45

.lr.ph:                                           ; preds = %.lr.ph.preheader, %30
  %indvars.iv = phi i64 [ %16, %.lr.ph.preheader ], [ %indvars.iv.next, %30 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next) #4
  %24 = load i32, ptr %23, align 4, !tbaa !44
  %25 = load i32, ptr %0, align 8, !tbaa !5
  %.not = icmp slt i32 %24, %25
  br i1 %.not, label %30, label %26

26:                                               ; preds = %.lr.ph
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next) #4
  %28 = load i32, ptr %27, align 4, !tbaa !44
  %29 = add nsw i32 %28, %2
  store i32 %29, ptr %27, align 4, !tbaa !44
  %.pre = load i32, ptr %0, align 8, !tbaa !5
  br label %30

30:                                               ; preds = %26, %.lr.ph
  %31 = phi i32 [ %.pre, %26 ], [ %25, %.lr.ph ]
  %32 = sext i32 %31 to i64
  %33 = add nsw i64 %indvars.iv.next, %32
  %34 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %33) #4
  %35 = load i8, ptr %34, align 1, !tbaa !45
  %36 = add nsw i64 %indvars.iv.next, %17
  %37 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %36) #4
  store i8 %35, ptr %37, align 1, !tbaa !45
  %38 = load i32, ptr %0, align 8, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = add nsw i64 %indvars.iv.next, %39
  %41 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %40) #4
  %42 = load i8, ptr %41, align 1, !tbaa !45
  %43 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %36) #4
  store i8 %42, ptr %43, align 1, !tbaa !45
  %44 = icmp ugt i64 %indvars.iv, 1
  br i1 %44, label %.lr.ph, label %._crit_edge, !llvm.loop !46

45:                                               ; preds = %.lr.ph61, %62
  %indvars.iv63 = phi i64 [ %22, %.lr.ph61 ], [ %indvars.iv.next64, %62 ]
  %46 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %indvars.iv63) #4
  store i8 1, ptr %46, align 1, !tbaa !45
  %47 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv63) #4
  %48 = load double, ptr %47, align 8, !tbaa !48
  %49 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv63) #4
  %50 = load double, ptr %49, align 8, !tbaa !48
  %51 = fcmp oeq double %48, %50
  br i1 %51, label %62, label %52

52:                                               ; preds = %45
  %53 = fneg double %48
  %54 = tail call noundef zeroext i1 @_Z16highs_isInfinityd(double noundef %53)
  %55 = tail call noundef zeroext i1 @_Z16highs_isInfinityd(double noundef %50)
  br i1 %54, label %61, label %56

56:                                               ; preds = %52
  br i1 %55, label %62, label %57

57:                                               ; preds = %56
  %58 = tail call double @llvm.fabs.f64(double %48)
  %59 = tail call double @llvm.fabs.f64(double %50)
  %60 = fcmp olt double %58, %59
  %. = select i1 %60, i8 1, i8 -1
  br label %62

61:                                               ; preds = %52
  %not. = xor i1 %55, true
  %.56 = sext i1 %not. to i8
  br label %62

62:                                               ; preds = %45, %57, %56, %61
  %.0 = phi i8 [ 0, %45 ], [ %., %57 ], [ 1, %56 ], [ %.56, %61 ]
  %63 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %indvars.iv63) #4
  store i8 %.0, ptr %63, align 1, !tbaa !45
  %indvars.iv.next64 = add nsw i64 %indvars.iv63, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next64 to i32
  %exitcond.not = icmp eq i32 %7, %lftr.wideiv
  br i1 %exitcond.not, label %.loopexit, label %45, !llvm.loop !49

.loopexit:                                        ; preds = %62, %._crit_edge, %3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS7HighsLp", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 32, !10, i64 56, !10, i64 80, !10, i64 104, !15, i64 128, !21, i64 240, !22, i64 248, !23, i64 256, !23, i64 288, !7, i64 320, !7, i64 324, !26, i64 328, !26, i64 352, !30, i64 376, !34, i64 400, !34, i64 456, !7, i64 512, !7, i64 516, !40, i64 520, !41, i64 592, !41, i64 593, !7, i64 596, !41, i64 600, !42, i64 608}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIdSaIdEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTS17HighsSparseMatrix", !16, i64 0, !7, i64 4, !7, i64 8, !17, i64 16, !17, i64 40, !17, i64 64, !10, i64 88}
!16 = !{!"_ZTS12MatrixFormat", !8, i64 0}
!17 = !{!"_ZTSSt6vectorIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!21 = !{!"_ZTS8ObjSense", !8, i64 0}
!22 = !{!"double", !8, i64 0}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !8, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!25 = !{!"long", !8, i64 0}
!26 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!30 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!34 = !{!"_ZTS13HighsNameHash", !35, i64 0}
!35 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !36, i64 0}
!36 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !14, i64 0, !25, i64 8, !37, i64 16, !25, i64 24, !38, i64 32, !14, i64 48}
!37 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !14, i64 0}
!38 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !39, i64 0, !25, i64 8}
!39 = !{!"float", !8, i64 0}
!40 = !{!"_ZTS10HighsScale", !7, i64 0, !41, i64 4, !7, i64 8, !7, i64 12, !22, i64 16, !10, i64 24, !10, i64 48}
!41 = !{!"bool", !8, i64 0}
!42 = !{!"_ZTS11HighsLpMods", !17, i64 0, !17, i64 24, !10, i64 48, !10, i64 72, !30, i64 96, !17, i64 120, !10, i64 144, !17, i64 168, !10, i64 192, !17, i64 216, !10, i64 240, !10, i64 264, !10, i64 288}
!43 = !{!6, !7, i64 4}
!44 = !{!7, !7, i64 0}
!45 = !{!8, !8, i64 0}
!46 = distinct !{!46, !47}
!47 = !{!"llvm.loop.mustprogress"}
!48 = !{!22, !22, i64 0}
!49 = distinct !{!49, !47}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass