; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code10releaseRegERK3Reg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Code = type { %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector", i32, i32, i32, i32, [16 x i8], i32, i32, i32, %"class.std::__cxx11::basic_string", %"class.std::map" }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon.13 }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon.13 = type { i64, [8 x i8] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %7

7:                                                ; preds = %23, %2
  %8 = load i32, ptr %5, align 4, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %9)
  %11 = icmp slt i32 %8, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %26

13:                                               ; preds = %7
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %14, i32 noundef %15)
  %17 = zext i8 %16 to i32
  %18 = shl i32 1, %17
  %19 = xor i32 %18, -1
  %20 = getelementptr inbounds %class.Code, ptr %6, i32 0, i32 3
  %21 = load i32, ptr %20, align 8, !tbaa !11
  %22 = and i32 %21, %19
  store i32 %22, ptr %20, align 8, !tbaa !11
  br label %23

23:                                               ; preds = %13
  %24 = load i32, ptr %5, align 4, !tbaa !9
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %5, align 4, !tbaa !9
  br label %7, !llvm.loop !37

26:                                               ; preds = %12
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 72}
!12 = !{!"_ZTS4Code", !13, i64 0, !17, i64 24, !21, i64 48, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !7, i64 88, !10, i64 104, !25, i64 108, !10, i64 112, !26, i64 120, !29, i64 152}
!13 = !{!"_ZTSSt6vectorI4InsnSaIS0_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseI4InsnSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSSt6vectorIhSaIhEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"_ZTSN4Code12PrologueTypeE", !7, i64 0}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !27, i64 0, !28, i64 8, !7, i64 16}
!27 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!28 = !{!"long", !7, i64 0}
!29 = !{!"_ZTSSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEE", !30, i64 0}
!30 = !{!"_ZTSSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE", !31, i64 0}
!31 = !{!"_ZTSNSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE13_Rb_tree_implIS7_Lb1EEE", !32, i64 0, !34, i64 8}
!32 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIhEE", !33, i64 0}
!33 = !{!"_ZTSSt4lessIhE"}
!34 = !{!"_ZTSSt15_Rb_tree_header", !35, i64 0, !28, i64 32}
!35 = !{!"_ZTSSt18_Rb_tree_node_base", !36, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!36 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code10releaseRegERK3Reg(ptr nocapture noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 72
  br label %6

._crit_edge:                                      ; preds = %6, %2
  ret void

6:                                                ; preds = %.lr.ph, %6
  %.05 = phi i32 [ 0, %.lr.ph ], [ %13, %6 ]
  %7 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.05)
  %8 = zext nneg i8 %7 to i32
  %9 = shl nuw i32 1, %8
  %10 = xor i32 %9, -1
  %11 = load i32, ptr %5, align 8, !tbaa !5
  %12 = and i32 %11, %10
  store i32 %12, ptr %5, align 8, !tbaa !5
  %13 = add nuw nsw i32 %.05, 1
  %14 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %6, label %._crit_edge, !llvm.loop !35
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !22, i64 72}
!6 = !{!"_ZTS4Code", !7, i64 0, !14, i64 24, !18, i64 48, !22, i64 72, !22, i64 76, !22, i64 80, !22, i64 84, !12, i64 88, !22, i64 104, !23, i64 108, !22, i64 112, !24, i64 120, !27, i64 152}
!7 = !{!"_ZTSSt6vectorI4InsnSaIS0_EE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseI4InsnSaIS0_EE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"_ZTSSt6vectorIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!18 = !{!"_ZTSSt6vectorIhSaIhEE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!22 = !{!"int", !12, i64 0}
!23 = !{!"_ZTSN4Code12PrologueTypeE", !12, i64 0}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !25, i64 0, !26, i64 8, !12, i64 16}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !11, i64 0}
!26 = !{!"long", !12, i64 0}
!27 = !{!"_ZTSSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEE", !28, i64 0}
!28 = !{!"_ZTSSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE", !29, i64 0}
!29 = !{!"_ZTSNSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE13_Rb_tree_implIS7_Lb1EEE", !30, i64 0, !32, i64 8}
!30 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIhEE", !31, i64 0}
!31 = !{!"_ZTSSt4lessIhE"}
!32 = !{!"_ZTSSt15_Rb_tree_header", !33, i64 0, !26, i64 32}
!33 = !{!"_ZTSSt18_Rb_tree_node_base", !34, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!34 = !{!"_ZTSSt14_Rb_tree_color", !12, i64 0}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass