; LLVM IR from ERGO-Code/HiGHS :: src/qpsolver/basis.ll (ZN5Basis5btranERK8QpVectorbi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QpVector = type { i32, i32, %"class.std::vector", %"class.std::vector.8" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HVectorBase = type { i32, i32, %"class.std::vector", %"class.std::vector.8", double, %"class.std::vector.13", %"class.std::vector", ptr, i8, i32, %"class.std::vector", %"class.std::vector.8" }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Basis = type <{ %class.HVectorBase, %struct.QpVector, %struct.QpVector, ptr, %class.HFactor, i32, [4 x i8], %struct.MatrixBase, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::map", %"class.std::vector", %struct.QpVector, %struct.QpVector, i32, i32, %class.HVectorBase, %class.HVectorBase, i8, [7 x i8] }>
%class.HFactor = type { double, double, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %struct.RefactorInfo, i32, i32, i32, i32, i32, i32, i32, double, i8, ptr, ptr, ptr, ptr, double, double, i32, double, %"class.std::unique_ptr", %struct.HighsLogOptions, i8, i8, i32, i32, ptr, i32, %"class.std::vector", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", %"class.std::vector.8", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.8", %class.HVectorBase }
%struct.RefactorInfo = type { i8, %"class.std::vector", %"class.std::vector", %"class.std::vector.15", double }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::unique_ptr" = type { %"struct.std::__uniq_ptr_data" }
%"struct.std::__uniq_ptr_data" = type { %"class.std::__uniq_ptr_impl" }
%"class.std::__uniq_ptr_impl" = type { %"class.std::tuple" }
%"class.std::tuple" = type { %"struct.std::_Tuple_impl" }
%"struct.std::_Tuple_impl" = type { %"struct.std::_Head_base.21" }
%"struct.std::_Head_base.21" = type { ptr }
%struct.HighsLogOptions = type <{ ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::function", ptr, i8, [7 x i8] }>
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%struct.MatrixBase = type { i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector.8" }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<int, std::pair<const int, BasisStatus>, std::_Select1st<std::pair<const int, BasisStatus>>, std::less<int>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<int, std::pair<const int, BasisStatus>, std::_Select1st<std::pair<const int, BasisStatus>>, std::less<int>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

declare void @_ZNK7HFactor9btranCallER11HVectorBaseIdEdP15HighsTimerClock(ptr noundef nonnull align 8 dereferenceable(1912), ptr noundef nonnull align 8 dereferenceable(176), double noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5Basis8hvec2vecERK11HVectorBaseIdE(ptr dead_on_unwind noalias writable sret(%struct.QpVector) align 8, ptr noundef nonnull align 8 dereferenceable(2913), ptr noundef nonnull align 8 dereferenceable(176)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(176) ptr @_ZN5Basis8vec2hvecERK8QpVector(ptr noundef nonnull align 8 dereferenceable(2913), ptr noundef nonnull align 8 dereferenceable(56)) #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN11HVectorBaseIdEC2ERKS0_(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #5 align 2

declare void @_ZN11HVectorBaseIdE4copyIdEEvPKS_IT_E(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5Basis5btranERK8QpVectorbi(ptr dead_on_unwind noalias writable sret(%struct.QpVector) align 8 %0, ptr noundef nonnull align 8 dereferenceable(2913) %1, ptr noundef nonnull align 8 dereferenceable(56) %2, i1 noundef zeroext %3, i32 noundef %4) #4 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca %class.HVectorBase, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %6, align 8
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  %15 = zext i1 %3 to i8
  store i8 %15, ptr %9, align 1, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !11
  %16 = load ptr, ptr %7, align 8
  call void @llvm.lifetime.start.p0(i64 176, ptr %11) #6
  %17 = load ptr, ptr %8, align 8, !tbaa !5
  %18 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZN5Basis8vec2hvecERK8QpVector(ptr noundef nonnull align 8 dereferenceable(2913) %16, ptr noundef nonnull align 8 dereferenceable(56) %17)
  call void @_ZN11HVectorBaseIdEC2ERKS0_(ptr noundef nonnull align 8 dereferenceable(176) %11, ptr noundef nonnull align 8 dereferenceable(176) %18)
  %19 = getelementptr inbounds %class.Basis, ptr %16, i32 0, i32 4
  invoke void @_ZNK7HFactor9btranCallER11HVectorBaseIdEdP15HighsTimerClock(ptr noundef nonnull align 8 dereferenceable(1912) %19, ptr noundef nonnull align 8 dereferenceable(176) %11, double noundef 1.000000e+00, ptr noundef null)
          to label %20 unwind label %32

20:                                               ; preds = %5
  %21 = load i8, ptr %9, align 1, !tbaa !9, !range !13, !noundef !14
  %22 = trunc i8 %21 to i1
  br i1 %22, label %23, label %73

23:                                               ; preds = %20
  %24 = getelementptr inbounds %class.Basis, ptr %16, i32 0, i32 17
  invoke void @_ZN11HVectorBaseIdE4copyIdEEvPKS_IT_E(ptr noundef nonnull align 8 dereferenceable(176) %24, ptr noundef %11)
          to label %25 unwind label %32

25:                                               ; preds = %23
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  store i32 0, ptr %14, align 4, !tbaa !11
  br label %26

26:                                               ; preds = %57, %25
  %27 = load i32, ptr %14, align 4, !tbaa !11
  %28 = getelementptr inbounds %class.HVectorBase, ptr %11, i32 0, i32 9
  %29 = load i32, ptr %28, align 4, !tbaa !15
  %30 = icmp slt i32 %27, %29
  br i1 %30, label %36, label %31

31:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  br label %60

32:                                               ; preds = %73, %23, %5
  %33 = landingpad { ptr, i32 }
          cleanup
  %34 = extractvalue { ptr, i32 } %33, 0
  store ptr %34, ptr %12, align 8
  %35 = extractvalue { ptr, i32 } %33, 1
  store i32 %35, ptr %13, align 4
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %11) #6
  call void @llvm.lifetime.end.p0(i64 176, ptr %11) #6
  br label %75

36:                                               ; preds = %26
  %37 = getelementptr inbounds %class.HVectorBase, ptr %11, i32 0, i32 10
  %38 = load i32, ptr %14, align 4, !tbaa !11
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %39) #6
  %41 = load i32, ptr %40, align 4, !tbaa !11
  %42 = getelementptr inbounds %class.Basis, ptr %16, i32 0, i32 17
  %43 = getelementptr inbounds %class.HVectorBase, ptr %42, i32 0, i32 10
  %44 = load i32, ptr %14, align 4, !tbaa !11
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #6
  store i32 %41, ptr %46, align 4, !tbaa !11
  %47 = getelementptr inbounds %class.HVectorBase, ptr %11, i32 0, i32 11
  %48 = load i32, ptr %14, align 4, !tbaa !11
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %49) #6
  %51 = load double, ptr %50, align 8, !tbaa !30
  %52 = getelementptr inbounds %class.Basis, ptr %16, i32 0, i32 17
  %53 = getelementptr inbounds %class.HVectorBase, ptr %52, i32 0, i32 11
  %54 = load i32, ptr %14, align 4, !tbaa !11
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55) #6
  store double %51, ptr %56, align 8, !tbaa !30
  br label %57

57:                                               ; preds = %36
  %58 = load i32, ptr %14, align 4, !tbaa !11
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %14, align 4, !tbaa !11
  br label %26, !llvm.loop !31

60:                                               ; preds = %31
  %61 = getelementptr inbounds %class.HVectorBase, ptr %11, i32 0, i32 9
  %62 = load i32, ptr %61, align 4, !tbaa !15
  %63 = getelementptr inbounds %class.Basis, ptr %16, i32 0, i32 17
  %64 = getelementptr inbounds %class.HVectorBase, ptr %63, i32 0, i32 9
  store i32 %62, ptr %64, align 4, !tbaa !33
  %65 = getelementptr inbounds %class.HVectorBase, ptr %11, i32 0, i32 8
  %66 = load i8, ptr %65, align 8, !tbaa !61, !range !13, !noundef !14
  %67 = trunc i8 %66 to i1
  %68 = getelementptr inbounds %class.Basis, ptr %16, i32 0, i32 17
  %69 = getelementptr inbounds %class.HVectorBase, ptr %68, i32 0, i32 8
  %70 = zext i1 %67 to i8
  store i8 %70, ptr %69, align 8, !tbaa !62
  %71 = load i32, ptr %10, align 4, !tbaa !11
  %72 = getelementptr inbounds %class.Basis, ptr %16, i32 0, i32 15
  store i32 %71, ptr %72, align 8, !tbaa !63
  br label %73

73:                                               ; preds = %60, %20
  invoke void @_ZN5Basis8hvec2vecERK11HVectorBaseIdE(ptr dead_on_unwind writable sret(%struct.QpVector) align 8 %0, ptr noundef nonnull align 8 dereferenceable(2913) %16, ptr noundef nonnull align 8 dereferenceable(176) %11)
          to label %74 unwind label %32

74:                                               ; preds = %73
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %11) #6
  call void @llvm.lifetime.end.p0(i64 176, ptr %11) #6
  ret void

75:                                               ; preds = %32
  %76 = load ptr, ptr %12, align 8
  %77 = load i32, ptr %13, align 4
  %78 = insertvalue { ptr, i32 } poison, ptr %76, 0
  %79 = insertvalue { ptr, i32 } %78, i32 %77, 1
  resume { ptr, i32 } %79
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !12, i64 124}
!16 = !{!"_ZTS11HVectorBaseIdE", !12, i64 0, !12, i64 4, !17, i64 8, !21, i64 32, !25, i64 56, !26, i64 64, !17, i64 88, !6, i64 112, !10, i64 120, !12, i64 124, !17, i64 128, !21, i64 152}
!17 = !{!"_ZTSSt6vectorIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSSt6vectorIdSaIdEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"double", !7, i64 0}
!26 = !{!"_ZTSSt6vectorIcSaIcEE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!30 = !{!25, !25, i64 0}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}
!33 = !{!34, !12, i64 2684}
!34 = !{!"_ZTS5Basis", !16, i64 0, !35, i64 176, !35, i64 232, !6, i64 288, !36, i64 296, !12, i64 2208, !51, i64 2216, !17, i64 2296, !17, i64 2320, !17, i64 2344, !52, i64 2368, !17, i64 2416, !35, i64 2440, !35, i64 2496, !12, i64 2552, !12, i64 2556, !16, i64 2560, !16, i64 2736, !10, i64 2912}
!35 = !{!"_ZTS8QpVector", !12, i64 0, !12, i64 4, !17, i64 8, !21, i64 32}
!36 = !{!"_ZTS7HFactor", !25, i64 0, !25, i64 8, !12, i64 16, !17, i64 24, !17, i64 48, !17, i64 72, !37, i64 96, !12, i64 184, !12, i64 188, !12, i64 192, !12, i64 196, !12, i64 200, !12, i64 204, !12, i64 208, !25, i64 216, !10, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !25, i64 264, !25, i64 272, !12, i64 280, !25, i64 288, !42, i64 296, !48, i64 304, !10, i64 400, !10, i64 401, !12, i64 404, !12, i64 408, !6, i64 416, !12, i64 424, !17, i64 432, !21, i64 456, !17, i64 480, !17, i64 504, !17, i64 528, !21, i64 552, !17, i64 576, !17, i64 600, !17, i64 624, !17, i64 648, !17, i64 672, !17, i64 696, !17, i64 720, !21, i64 744, !21, i64 768, !17, i64 792, !17, i64 816, !17, i64 840, !17, i64 864, !17, i64 888, !17, i64 912, !26, i64 936, !21, i64 960, !17, i64 984, !17, i64 1008, !17, i64 1032, !17, i64 1056, !17, i64 1080, !17, i64 1104, !17, i64 1128, !17, i64 1152, !17, i64 1176, !17, i64 1200, !21, i64 1224, !17, i64 1248, !17, i64 1272, !21, i64 1296, !17, i64 1320, !17, i64 1344, !21, i64 1368, !12, i64 1392, !12, i64 1396, !17, i64 1400, !17, i64 1424, !17, i64 1448, !21, i64 1472, !17, i64 1496, !17, i64 1520, !17, i64 1544, !17, i64 1568, !21, i64 1592, !21, i64 1616, !17, i64 1640, !17, i64 1664, !17, i64 1688, !21, i64 1712, !16, i64 1736}
!37 = !{!"_ZTS12RefactorInfo", !10, i64 0, !17, i64 8, !17, i64 32, !38, i64 56, !25, i64 80}
!38 = !{!"_ZTSSt6vectorIaSaIaEE", !39, i64 0}
!39 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!42 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !43, i64 0}
!43 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !44, i64 0}
!44 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !45, i64 0}
!45 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !46, i64 0}
!46 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !47, i64 0}
!47 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !6, i64 0}
!48 = !{!"_ZTS15HighsLogOptions", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !49, i64 48, !6, i64 80, !10, i64 88}
!49 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !50, i64 0, !6, i64 24}
!50 = !{!"_ZTSSt14_Function_base", !7, i64 0, !6, i64 16}
!51 = !{!"_ZTS10MatrixBase", !12, i64 0, !12, i64 4, !17, i64 8, !17, i64 32, !21, i64 56}
!52 = !{!"_ZTSSt3mapIi11BasisStatusSt4lessIiESaISt4pairIKiS0_EEE", !53, i64 0}
!53 = !{!"_ZTSSt8_Rb_treeIiSt4pairIKi11BasisStatusESt10_Select1stIS3_ESt4lessIiESaIS3_EE", !54, i64 0}
!54 = !{!"_ZTSNSt8_Rb_treeIiSt4pairIKi11BasisStatusESt10_Select1stIS3_ESt4lessIiESaIS3_EE13_Rb_tree_implIS7_Lb1EEE", !55, i64 0, !57, i64 8}
!55 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIiEE", !56, i64 0}
!56 = !{!"_ZTSSt4lessIiE"}
!57 = !{!"_ZTSSt15_Rb_tree_header", !58, i64 0, !60, i64 32}
!58 = !{!"_ZTSSt18_Rb_tree_node_base", !59, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!59 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!60 = !{!"long", !7, i64 0}
!61 = !{!16, !10, i64 120}
!62 = !{!34, !10, i64 2680}
!63 = !{!34, !12, i64 2552}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QpVector = type { i32, i32, %"class.std::vector", %"class.std::vector.8" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HVectorBase = type { i32, i32, %"class.std::vector", %"class.std::vector.8", double, %"class.std::vector.13", %"class.std::vector", ptr, i8, i32, %"class.std::vector", %"class.std::vector.8" }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

declare void @_ZNK7HFactor9btranCallER11HVectorBaseIdEdP15HighsTimerClock(ptr noundef nonnull align 8 dereferenceable(1912), ptr noundef nonnull align 8 dereferenceable(176), double noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5Basis8hvec2vecERK11HVectorBaseIdE(ptr dead_on_unwind noalias writable sret(%struct.QpVector) align 8, ptr noundef nonnull align 8 dereferenceable(2913), ptr noundef nonnull align 8 dereferenceable(176)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(176) ptr @_ZN5Basis8vec2hvecERK8QpVector(ptr noundef nonnull align 8 dereferenceable(2913), ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZN11HVectorBaseIdEC2ERKS0_(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #5 align 2

declare void @_ZN11HVectorBaseIdE4copyIdEEvPKS_IT_E(ptr noundef nonnull align 8 dereferenceable(176), ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5Basis5btranERK8QpVectorbi(ptr dead_on_unwind noalias writable sret(%struct.QpVector) align 8 %0, ptr noundef nonnull align 8 dereferenceable(2913) %1, ptr noundef nonnull align 8 dereferenceable(56) %2, i1 noundef zeroext %3, i32 noundef %4) local_unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %6 = alloca %class.HVectorBase, align 8
  call void @llvm.lifetime.start.p0(i64 176, ptr nonnull %6) #6
  %7 = tail call noundef nonnull align 8 dereferenceable(176) ptr @_ZN5Basis8vec2hvecERK8QpVector(ptr noundef nonnull align 8 dereferenceable(2913) %1, ptr noundef nonnull align 8 dereferenceable(56) %2)
  call void @_ZN11HVectorBaseIdEC2ERKS0_(ptr noundef nonnull align 8 dereferenceable(176) %6, ptr noundef nonnull align 8 dereferenceable(176) %7)
  %8 = getelementptr inbounds i8, ptr %1, i64 296
  invoke void @_ZNK7HFactor9btranCallER11HVectorBaseIdEdP15HighsTimerClock(ptr noundef nonnull align 8 dereferenceable(1912) %8, ptr noundef nonnull align 8 dereferenceable(176) %6, double noundef 1.000000e+00, ptr noundef null)
          to label %9 unwind label %24

9:                                                ; preds = %5
  br i1 %3, label %10, label %36

10:                                               ; preds = %9
  %11 = getelementptr inbounds i8, ptr %1, i64 2560
  invoke void @_ZN11HVectorBaseIdE4copyIdEEvPKS_IT_E(ptr noundef nonnull align 8 dereferenceable(176) %11, ptr noundef nonnull %6)
          to label %.preheader unwind label %24

.preheader:                                       ; preds = %10
  %12 = getelementptr inbounds i8, ptr %6, i64 124
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp sgt i32 %13, 0
  br i1 %14, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader
  %15 = getelementptr inbounds i8, ptr %6, i64 128
  %16 = getelementptr inbounds i8, ptr %1, i64 2688
  %17 = getelementptr inbounds i8, ptr %6, i64 152
  %18 = getelementptr inbounds i8, ptr %1, i64 2712
  br label %26

._crit_edge:                                      ; preds = %26, %.preheader
  %.lcssa = phi i32 [ %13, %.preheader ], [ %33, %26 ]
  %19 = getelementptr inbounds i8, ptr %1, i64 2684
  store i32 %.lcssa, ptr %19, align 4, !tbaa !25
  %20 = getelementptr inbounds i8, ptr %6, i64 120
  %21 = load i8, ptr %20, align 8, !tbaa !53, !range !54, !noundef !55
  %22 = getelementptr inbounds i8, ptr %1, i64 2680
  store i8 %21, ptr %22, align 8, !tbaa !56
  %23 = getelementptr inbounds i8, ptr %1, i64 2552
  store i32 %4, ptr %23, align 8, !tbaa !57
  br label %36

24:                                               ; preds = %36, %10, %5
  %25 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %6) #6
  call void @llvm.lifetime.end.p0(i64 176, ptr nonnull %6) #6
  resume { ptr, i32 } %25

26:                                               ; preds = %.lr.ph, %26
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %26 ]
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %indvars.iv) #6
  %28 = load i32, ptr %27, align 4, !tbaa !58
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv) #6
  store i32 %28, ptr %29, align 4, !tbaa !58
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %indvars.iv) #6
  %31 = load double, ptr %30, align 8, !tbaa !59
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %indvars.iv) #6
  store double %31, ptr %32, align 8, !tbaa !59
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %33 = load i32, ptr %12, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = icmp slt i64 %indvars.iv.next, %34
  br i1 %35, label %26, label %._crit_edge, !llvm.loop !60

36:                                               ; preds = %._crit_edge, %9
  invoke void @_ZN5Basis8hvec2vecERK11HVectorBaseIdE(ptr dead_on_unwind writable sret(%struct.QpVector) align 8 %0, ptr noundef nonnull align 8 dereferenceable(2913) %1, ptr noundef nonnull align 8 dereferenceable(176) %6)
          to label %37 unwind label %24

37:                                               ; preds = %36
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %6) #6
  call void @llvm.lifetime.end.p0(i64 176, ptr nonnull %6) #6
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 124}
!6 = !{!"_ZTS11HVectorBaseIdE", !7, i64 0, !7, i64 4, !10, i64 8, !15, i64 32, !19, i64 56, !20, i64 64, !10, i64 88, !14, i64 112, !24, i64 120, !7, i64 124, !10, i64 128, !15, i64 152}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIiSaIiEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTSSt6vectorIdSaIdEE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!19 = !{!"double", !8, i64 0}
!20 = !{!"_ZTSSt6vectorIcSaIcEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!24 = !{!"bool", !8, i64 0}
!25 = !{!26, !7, i64 2684}
!26 = !{!"_ZTS5Basis", !6, i64 0, !27, i64 176, !27, i64 232, !14, i64 288, !28, i64 296, !7, i64 2208, !43, i64 2216, !10, i64 2296, !10, i64 2320, !10, i64 2344, !44, i64 2368, !10, i64 2416, !27, i64 2440, !27, i64 2496, !7, i64 2552, !7, i64 2556, !6, i64 2560, !6, i64 2736, !24, i64 2912}
!27 = !{!"_ZTS8QpVector", !7, i64 0, !7, i64 4, !10, i64 8, !15, i64 32}
!28 = !{!"_ZTS7HFactor", !19, i64 0, !19, i64 8, !7, i64 16, !10, i64 24, !10, i64 48, !10, i64 72, !29, i64 96, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !19, i64 216, !24, i64 224, !14, i64 232, !14, i64 240, !14, i64 248, !14, i64 256, !19, i64 264, !19, i64 272, !7, i64 280, !19, i64 288, !34, i64 296, !40, i64 304, !24, i64 400, !24, i64 401, !7, i64 404, !7, i64 408, !14, i64 416, !7, i64 424, !10, i64 432, !15, i64 456, !10, i64 480, !10, i64 504, !10, i64 528, !15, i64 552, !10, i64 576, !10, i64 600, !10, i64 624, !10, i64 648, !10, i64 672, !10, i64 696, !10, i64 720, !15, i64 744, !15, i64 768, !10, i64 792, !10, i64 816, !10, i64 840, !10, i64 864, !10, i64 888, !10, i64 912, !20, i64 936, !15, i64 960, !10, i64 984, !10, i64 1008, !10, i64 1032, !10, i64 1056, !10, i64 1080, !10, i64 1104, !10, i64 1128, !10, i64 1152, !10, i64 1176, !10, i64 1200, !15, i64 1224, !10, i64 1248, !10, i64 1272, !15, i64 1296, !10, i64 1320, !10, i64 1344, !15, i64 1368, !7, i64 1392, !7, i64 1396, !10, i64 1400, !10, i64 1424, !10, i64 1448, !15, i64 1472, !10, i64 1496, !10, i64 1520, !10, i64 1544, !10, i64 1568, !15, i64 1592, !15, i64 1616, !10, i64 1640, !10, i64 1664, !10, i64 1688, !15, i64 1712, !6, i64 1736}
!29 = !{!"_ZTS12RefactorInfo", !24, i64 0, !10, i64 8, !10, i64 32, !30, i64 56, !19, i64 80}
!30 = !{!"_ZTSSt6vectorIaSaIaEE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!34 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !35, i64 0}
!35 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !36, i64 0}
!36 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !37, i64 0}
!37 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !38, i64 0}
!38 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !39, i64 0}
!39 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !14, i64 0}
!40 = !{!"_ZTS15HighsLogOptions", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !41, i64 48, !14, i64 80, !24, i64 88}
!41 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !42, i64 0, !14, i64 24}
!42 = !{!"_ZTSSt14_Function_base", !8, i64 0, !14, i64 16}
!43 = !{!"_ZTS10MatrixBase", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 32, !15, i64 56}
!44 = !{!"_ZTSSt3mapIi11BasisStatusSt4lessIiESaISt4pairIKiS0_EEE", !45, i64 0}
!45 = !{!"_ZTSSt8_Rb_treeIiSt4pairIKi11BasisStatusESt10_Select1stIS3_ESt4lessIiESaIS3_EE", !46, i64 0}
!46 = !{!"_ZTSNSt8_Rb_treeIiSt4pairIKi11BasisStatusESt10_Select1stIS3_ESt4lessIiESaIS3_EE13_Rb_tree_implIS7_Lb1EEE", !47, i64 0, !49, i64 8}
!47 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIiEE", !48, i64 0}
!48 = !{!"_ZTSSt4lessIiE"}
!49 = !{!"_ZTSSt15_Rb_tree_header", !50, i64 0, !52, i64 32}
!50 = !{!"_ZTSSt18_Rb_tree_node_base", !51, i64 0, !14, i64 8, !14, i64 16, !14, i64 24}
!51 = !{!"_ZTSSt14_Rb_tree_color", !8, i64 0}
!52 = !{!"long", !8, i64 0}
!53 = !{!6, !24, i64 120}
!54 = !{i8 0, i8 2}
!55 = !{}
!56 = !{!26, !24, i64 2680}
!57 = !{!26, !7, i64 2552}
!58 = !{!7, !7, i64 0}
!59 = !{!19, !19, i64 0}
!60 = distinct !{!60, !61}
!61 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass