; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/BasicMathFunctions (arm_dot_prod_q31)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_dot_prod_q31(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  store i64 0, ptr %10, align 8, !tbaa !11
  %11 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %11, ptr %9, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %15, %4
  %13 = load i32, ptr %9, align 4, !tbaa !9
  %14 = icmp ugt i32 %13, 0
  br i1 %14, label %15, label %30

15:                                               ; preds = %12
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = getelementptr inbounds i32, ptr %16, i32 1
  store ptr %17, ptr %5, align 8, !tbaa !5
  %18 = load i32, ptr %16, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = getelementptr inbounds i32, ptr %20, i32 1
  store ptr %21, ptr %6, align 8, !tbaa !5
  %22 = load i32, ptr %20, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = mul nsw i64 %19, %23
  %25 = ashr i64 %24, 14
  %26 = load i64, ptr %10, align 8, !tbaa !11
  %27 = add nsw i64 %26, %25
  store i64 %27, ptr %10, align 8, !tbaa !11
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = add i32 %28, -1
  store i32 %29, ptr %9, align 4, !tbaa !9
  br label %12, !llvm.loop !13

30:                                               ; preds = %12
  %31 = load i64, ptr %10, align 8, !tbaa !11
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  store i64 %31, ptr %32, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @arm_dot_prod_q31(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %.not10 = icmp eq i32 %2, 0
  br i1 %.not10, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %xtraiter = and i32 %2, 3
  %5 = icmp ult i32 %2, 4
  br i1 %5, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i32 %2, -4
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %.014 = phi i64 [ 0, %.lr.ph.preheader.new ], [ %41, %.lr.ph ]
  %.0812 = phi ptr [ %0, %.lr.ph.preheader.new ], [ %33, %.lr.ph ]
  %.0911 = phi ptr [ %1, %.lr.ph.preheader.new ], [ %36, %.lr.ph ]
  %niter = phi i32 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %6 = getelementptr inbounds i8, ptr %.0812, i64 4
  %7 = load i32, ptr %.0812, align 4, !tbaa !5
  %8 = sext i32 %7 to i64
  %9 = getelementptr inbounds i8, ptr %.0911, i64 4
  %10 = load i32, ptr %.0911, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = mul nsw i64 %11, %8
  %13 = ashr i64 %12, 14
  %14 = add nsw i64 %13, %.014
  %15 = getelementptr inbounds i8, ptr %.0812, i64 8
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds i8, ptr %.0911, i64 8
  %19 = load i32, ptr %9, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = mul nsw i64 %20, %17
  %22 = ashr i64 %21, 14
  %23 = add nsw i64 %22, %14
  %24 = getelementptr inbounds i8, ptr %.0812, i64 12
  %25 = load i32, ptr %15, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds i8, ptr %.0911, i64 12
  %28 = load i32, ptr %18, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = mul nsw i64 %29, %26
  %31 = ashr i64 %30, 14
  %32 = add nsw i64 %31, %23
  %33 = getelementptr inbounds i8, ptr %.0812, i64 16
  %34 = load i32, ptr %24, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds i8, ptr %.0911, i64 16
  %37 = load i32, ptr %27, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = mul nsw i64 %38, %35
  %40 = ashr i64 %39, 14
  %41 = add nsw i64 %40, %32
  %niter.next.3 = add i32 %niter, 4
  %niter.ncmp.3 = icmp eq i32 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %.lcssa.ph = phi i64 [ poison, %.lr.ph.preheader ], [ %41, %.lr.ph ]
  %.014.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %41, %.lr.ph ]
  %.0812.unr = phi ptr [ %0, %.lr.ph.preheader ], [ %33, %.lr.ph ]
  %.0911.unr = phi ptr [ %1, %.lr.ph.preheader ], [ %36, %.lr.ph ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %.014.epil = phi i64 [ %50, %.lr.ph.epil ], [ %.014.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.0812.epil = phi ptr [ %42, %.lr.ph.epil ], [ %.0812.unr, %._crit_edge.loopexit.unr-lcssa ]
  %.0911.epil = phi ptr [ %45, %.lr.ph.epil ], [ %.0911.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i32 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %42 = getelementptr inbounds i8, ptr %.0812.epil, i64 4
  %43 = load i32, ptr %.0812.epil, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds i8, ptr %.0911.epil, i64 4
  %46 = load i32, ptr %.0911.epil, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = mul nsw i64 %47, %44
  %49 = ashr i64 %48, 14
  %50 = add nsw i64 %49, %.014.epil
  %epil.iter.next = add i32 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i32 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !11

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %4
  %.0.lcssa = phi i64 [ 0, %4 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %50, %.lr.ph.epil ]
  store i64 %.0.lcssa, ptr %3, align 8, !tbaa !13
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.unroll.disable"}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass