; LLVM IR from onnx/onnx-mlir :: src/Support (SmallFPConversion)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@om_f32_to_f16.bias_mul = external hidden constant i32, align 4
@om_f32_to_f16.sub_rnd = external hidden constant i32, align 4
@om_f32_to_f16.sub_mul = external hidden constant i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i16 @om_f32_to_f16(float noundef %0) #2 {
  %2 = alloca float, align 4
  %3 = alloca float, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = alloca float, align 4
  %8 = alloca float, align 4
  %9 = alloca i8, align 1
  %10 = alloca float, align 4
  %11 = alloca float, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store float %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %3, ptr align 4 @om_f32_to_f16.bias_mul, i64 4, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %4, ptr align 4 %2, i64 4, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %14 = load i32, ptr %4, align 4, !tbaa !9
  %15 = and i32 %14, -2147483648
  store i32 %15, ptr %5, align 4, !tbaa !9
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = load i32, ptr %4, align 4, !tbaa !9
  %18 = xor i32 %17, %16
  store i32 %18, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  %19 = load i32, ptr %4, align 4, !tbaa !9
  %20 = icmp ult i32 2139095040, %19
  %21 = zext i1 %20 to i8
  store i8 %21, ptr %6, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %7, ptr align 4 @om_f32_to_f16.sub_rnd, i64 4, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 @om_f32_to_f16.sub_mul, i64 4, i1 false)
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = icmp ult i32 %22, 947912704
  %24 = zext i1 %23 to i8
  store i8 %24, ptr %9, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 4 %4, i64 4, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %25 = load float, ptr %10, align 4, !tbaa !5
  store float %25, ptr %11, align 4, !tbaa !5
  %26 = load float, ptr %7, align 4, !tbaa !5
  %27 = load float, ptr %11, align 4, !tbaa !5
  %28 = fmul float %27, %26
  store float %28, ptr %11, align 4, !tbaa !5
  %29 = load float, ptr %8, align 4, !tbaa !5
  %30 = load float, ptr %11, align 4, !tbaa !5
  %31 = fmul float %30, %29
  store float %31, ptr %11, align 4, !tbaa !5
  %32 = load float, ptr %3, align 4, !tbaa !5
  %33 = load float, ptr %10, align 4, !tbaa !5
  %34 = fmul float %33, %32
  store float %34, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 %10, i64 4, i1 false)
  %35 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %35, ptr %4, align 4, !tbaa !9
  %36 = load i32, ptr %4, align 4, !tbaa !9
  %37 = lshr i32 %36, 13
  %38 = and i32 %37, 1
  %39 = load i32, ptr %4, align 4, !tbaa !9
  %40 = add i32 %39, %38
  store i32 %40, ptr %4, align 4, !tbaa !9
  %41 = load i32, ptr %4, align 4, !tbaa !9
  %42 = add i32 %41, 4095
  store i32 %42, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 4 %11, i64 4, i1 false)
  %43 = load i8, ptr %9, align 1, !tbaa !11, !range !13, !noundef !14
  %44 = trunc i8 %43 to i1
  br i1 %44, label %45, label %47

45:                                               ; preds = %1
  %46 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %46, ptr %4, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %45, %1
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  %48 = load i32, ptr %4, align 4, !tbaa !9
  %49 = lshr i32 %48, 13
  store i32 %49, ptr %4, align 4, !tbaa !9
  %50 = load i32, ptr %4, align 4, !tbaa !9
  %51 = icmp ult i32 31744, %50
  br i1 %51, label %52, label %53

52:                                               ; preds = %47
  store i32 31744, ptr %4, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %52, %47
  %54 = load i8, ptr %6, align 1, !tbaa !11, !range !13, !noundef !14
  %55 = trunc i8 %54 to i1
  br i1 %55, label %56, label %57

56:                                               ; preds = %53
  store i32 32256, ptr %4, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %56, %53
  %58 = load i32, ptr %5, align 4, !tbaa !9
  %59 = lshr i32 %58, 16
  %60 = load i32, ptr %4, align 4, !tbaa !9
  %61 = or i32 %60, %59
  store i32 %61, ptr %4, align 4, !tbaa !9
  %62 = load i32, ptr %4, align 4, !tbaa !9
  %63 = trunc i32 %62 to i16
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i16 %63
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@om_f32_to_f16.bias_mul = external hidden local_unnamed_addr constant i32, align 4
@om_f32_to_f16.sub_rnd = external hidden local_unnamed_addr constant i32, align 4
@om_f32_to_f16.sub_mul = external hidden local_unnamed_addr constant i32, align 4

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local zeroext i16 @om_f32_to_f16(float noundef %0) local_unnamed_addr #0 {
  %.0.copyload = load float, ptr @om_f32_to_f16.bias_mul, align 4
  %2 = tail call float @llvm.fabs.f32(float %0)
  %3 = bitcast float %2 to i32
  %4 = icmp ult i32 %3, 947912704
  %5 = fmul float %2, %.0.copyload
  %6 = bitcast float %5 to i32
  %7 = lshr i32 %6, 13
  %8 = and i32 %7, 1
  %9 = add i32 %6, 4095
  %10 = add i32 %9, %8
  br i1 %4, label %11, label %15

11:                                               ; preds = %1
  %.0.copyload13 = load float, ptr @om_f32_to_f16.sub_rnd, align 4
  %12 = fmul float %2, %.0.copyload13
  %.0.copyload11 = load float, ptr @om_f32_to_f16.sub_mul, align 4
  %13 = fmul float %12, %.0.copyload11
  %14 = bitcast float %13 to i32
  br label %15

15:                                               ; preds = %11, %1
  %.0 = phi i32 [ %14, %11 ], [ %10, %1 ]
  %16 = icmp ugt i32 %3, 2139095040
  %17 = bitcast float %0 to i32
  %18 = lshr i32 %.0, 13
  %spec.store.select = tail call i32 @llvm.umin.i32(i32 %18, i32 31744)
  %spec.store.select1 = select i1 %16, i32 32256, i32 %spec.store.select
  %19 = lshr i32 %17, 16
  %20 = and i32 %19, 32768
  %21 = or disjoint i32 %spec.store.select1, %20
  %22 = trunc nuw i32 %21 to i16
  ret i16 %22
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass