; LLVM IR from ARM-software/Arm-2D :: Library/Source/arm_2d_draw.ll_ (arm_2d_c8bit_sw_draw_pattern)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon }
%struct.anon = type { ptr, %struct.anon.0, %struct.anon.1, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.0 = type { ptr, ptr }
%struct.anon.1 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.59, %struct.anon.60, %union.anon.61, %struct.anon.63, %struct.anon.64, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.2, i64 }
%struct.anon.2 = type { ptr, ptr, %struct.anon.3, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.3 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.4 }
%struct.anon.4 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.59 = type { ptr, ptr }
%struct.anon.60 = type { ptr }
%union.anon.61 = type { %struct.anon.62 }
%struct.anon.62 = type { i32 }
%struct.anon.63 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.36, %union.anon.47, %union.anon.50 }
%union.anon.36 = type { %struct.anon.37 }
%struct.anon.37 = type { i8, %union.arm_2d_color_info_t, %union.anon.40 }
%union.arm_2d_color_info_t = type { %struct.anon.38 }
%struct.anon.38 = type { i8 }
%union.anon.40 = type { i16 }
%union.anon.47 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.48, %union.anon.49 }
%union.anon.48 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.49 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.50 = type { ptr }
%struct.anon.64 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.51, %struct.anon.52 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.51 = type { i32 }
%struct.anon.52 = type { %struct.arm_2d_location_t, %struct.anon.53 }
%struct.anon.53 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%struct.__arm_2d_sub_task_t = type { %struct.anon.84 }
%struct.anon.84 = type <{ ptr, ptr, i8, i32, [3 x i8], %union.anon.85 }>
%union.anon.85 = type { %struct.__arm_2d_param_copy_orig_msk_t }
%struct.__arm_2d_param_copy_orig_msk_t = type { %union.anon.88, %struct.__arm_2d_tile_param_t, %struct.__arm_2d_tile_param_t }
%union.anon.88 = type { %struct.__arm_2d_param_copy_orig_t }
%struct.__arm_2d_param_copy_orig_t = type { %union.anon.87, %struct.__arm_2d_tile_param_t }
%union.anon.87 = type { %struct.__arm_2d_param_copy_t }
%struct.__arm_2d_param_copy_t = type { %struct.__arm_2d_tile_param_t, %struct.__arm_2d_tile_param_t, %struct.arm_2d_size_t }
%struct.__arm_2d_tile_param_t = type { ptr, i32, i16, %union.arm_2d_color_info_t, i8, %struct.arm_2d_region_t, %struct.arm_2d_region_t, ptr }
%struct.arm_2d_op_drw_patn_t = type { %struct.arm_2d_op_core_t, %struct.anon.27, %struct.anon.28, i32, %union.anon.29, %union.anon.30 }
%struct.anon.27 = type { ptr, ptr }
%struct.anon.28 = type { ptr }
%union.anon.29 = type { i32 }
%union.anon.30 = type { i32 }
%struct.anon.73 = type { %union.arm_2d_color_info_t, %union.anon.74, i8, i8, %union.anon.76, %union.anon.80 }
%union.anon.74 = type { %struct.anon.75 }
%struct.anon.75 = type { i8 }
%union.anon.76 = type { %struct.anon.77 }
%struct.anon.77 = type { i8, i8 }
%union.anon.80 = type { [2 x ptr] }

@.str.1 = external hidden unnamed_addr constant [82 x i8], align 1
@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@.str.2 = external hidden unnamed_addr constant [62 x i8], align 1
@__PRETTY_FUNCTION__.__arm_2d_c8bit_sw_draw_pattern = external hidden unnamed_addr constant [67 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @__arm_2d_impl_c8bit_draw_pattern(ptr noalias noundef, i32 noundef, i16 noundef signext, ptr noalias noundef, i16 noundef signext, ptr noalias noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @__arm_2d_c8bit_sw_draw_pattern(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %7, i32 0, i32 0
  %9 = getelementptr inbounds %struct.anon.84, ptr %8, i32 0, i32 1
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  store ptr %10, ptr %4, align 8, !tbaa !5
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = icmp eq ptr null, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %1
  store ptr getelementptr inbounds (%struct.anon, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %4, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %13, %1
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %15, i32 0, i32 0
  %17 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %16, i32 0, i32 0
  %18 = getelementptr inbounds %struct.anon.2, ptr %17, i32 0, i32 1
  %19 = load ptr, ptr %18, align 8, !tbaa !12
  %20 = getelementptr inbounds %struct.anon.73, ptr %19, i32 0, i32 0
  %21 = load i8, ptr %20, align 8
  %22 = lshr i8 %21, 1
  %23 = and i8 %22, 7
  %24 = zext i8 %23 to i32
  %25 = icmp eq i32 3, %24
  br i1 %25, label %26, label %27

26:                                               ; preds = %14
  br label %28

27:                                               ; preds = %14
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 589, ptr noundef @__PRETTY_FUNCTION__.__arm_2d_c8bit_sw_draw_pattern) #4
  unreachable

28:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %29, i32 0, i32 3
  %31 = load i32, ptr %30, align 8, !tbaa !22
  store i32 %31, ptr %5, align 4, !tbaa !23
  %32 = load i32, ptr %5, align 4, !tbaa !23
  %33 = and i32 %32, 12
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %28
  store i32 -4, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %82

36:                                               ; preds = %28
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %37, i32 0, i32 0
  %39 = getelementptr inbounds %struct.anon.84, ptr %38, i32 0, i32 5
  %40 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %39, i32 0, i32 0
  %41 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %40, i32 0, i32 0
  %42 = load ptr, ptr %41, align 8, !tbaa !24
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %43, i32 0, i32 0
  %45 = getelementptr inbounds %struct.anon.84, ptr %44, i32 0, i32 5
  %46 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %45, i32 0, i32 0
  %47 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %46, i32 0, i32 1
  %48 = load i32, ptr %47, align 8, !tbaa !24
  %49 = load ptr, ptr %3, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %49, i32 0, i32 0
  %51 = getelementptr inbounds %struct.anon.84, ptr %50, i32 0, i32 5
  %52 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %51, i32 0, i32 0
  %53 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %52, i32 0, i32 2
  %54 = load i16, ptr %53, align 4, !tbaa !24
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %55, i32 0, i32 0
  %57 = getelementptr inbounds %struct.anon.84, ptr %56, i32 0, i32 5
  %58 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %57, i32 0, i32 1
  %59 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %58, i32 0, i32 0
  %60 = load ptr, ptr %59, align 8, !tbaa !24
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %61, i32 0, i32 0
  %63 = getelementptr inbounds %struct.anon.84, ptr %62, i32 0, i32 5
  %64 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %63, i32 0, i32 1
  %65 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %64, i32 0, i32 2
  %66 = load i16, ptr %65, align 4, !tbaa !24
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %67, i32 0, i32 0
  %69 = getelementptr inbounds %struct.anon.84, ptr %68, i32 0, i32 5
  %70 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %69, i32 0, i32 2
  %71 = load i32, ptr %5, align 4, !tbaa !23
  %72 = trunc i32 %71 to i8
  %73 = load ptr, ptr %4, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %73, i32 0, i32 4
  %75 = load i16, ptr %74, align 4, !tbaa !24
  %76 = trunc i16 %75 to i8
  %77 = load ptr, ptr %4, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %77, i32 0, i32 5
  %79 = load i16, ptr %78, align 8, !tbaa !24
  %80 = trunc i16 %79 to i8
  call void @__arm_2d_impl_c8bit_draw_pattern(ptr noundef %42, i32 noundef %48, i16 noundef signext %54, ptr noundef %60, i16 noundef signext %66, ptr noundef %70, i8 noundef zeroext %72, i8 noundef zeroext %76, i8 noundef zeroext %80)
  br label %81

81:                                               ; preds = %36
  store i32 0, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %82

82:                                               ; preds = %81, %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %83 = load i32, ptr %2, align 4
  ret i32 %83
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"__arm_2d_sub_task_t", !11, i64 0}
!11 = !{!"", !6, i64 0, !6, i64 8, !7, i64 16, !7, i64 17, !7, i64 24}
!12 = !{!13, !6, i64 8}
!13 = !{!"arm_2d_op_drw_patn_t", !14, i64 0, !19, i64 48, !20, i64 64, !21, i64 72, !7, i64 76, !7, i64 80}
!14 = !{!"arm_2d_op_core_t", !15, i64 0, !18, i64 40}
!15 = !{!"", !6, i64 0, !6, i64 8, !16, i64 16, !7, i64 17, !7, i64 18, !17, i64 24}
!16 = !{!"", !7, i64 0}
!17 = !{!"arm_2d_op_evt_t", !6, i64 0, !6, i64 8}
!18 = !{!"long", !7, i64 0}
!19 = !{!"", !6, i64 0, !6, i64 8}
!20 = !{!"", !6, i64 0}
!21 = !{!"int", !7, i64 0}
!22 = !{!13, !21, i64 72}
!23 = !{!21, !21, i64 0}
!24 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon }
%struct.anon = type { ptr, %struct.anon.0, %struct.anon.1, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.0 = type { ptr, ptr }
%struct.anon.1 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.59, %struct.anon.60, %union.anon.61, %struct.anon.63, %struct.anon.64, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.2, i64 }
%struct.anon.2 = type { ptr, ptr, %struct.anon.3, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.3 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.4 }
%struct.anon.4 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.59 = type { ptr, ptr }
%struct.anon.60 = type { ptr }
%union.anon.61 = type { %struct.anon.62 }
%struct.anon.62 = type { i32 }
%struct.anon.63 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.36, %union.anon.47, %union.anon.50 }
%union.anon.36 = type { %struct.anon.37 }
%struct.anon.37 = type { i8, %union.arm_2d_color_info_t, %union.anon.40 }
%union.arm_2d_color_info_t = type { %struct.anon.38 }
%struct.anon.38 = type { i8 }
%union.anon.40 = type { i16 }
%union.anon.47 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.48, %union.anon.49 }
%union.anon.48 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.49 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.50 = type { ptr }
%struct.anon.64 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.51, %struct.anon.52 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.51 = type { i32 }
%struct.anon.52 = type { %struct.arm_2d_location_t, %struct.anon.53 }
%struct.anon.53 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }

@.str.1 = external hidden unnamed_addr constant [82 x i8], align 1
@ARM_2D_CTRL = external local_unnamed_addr global %struct.__arm_2d_op_control, align 8
@.str.2 = external hidden unnamed_addr constant [62 x i8], align 1
@__PRETTY_FUNCTION__.__arm_2d_c8bit_sw_draw_pattern = external hidden unnamed_addr constant [67 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @__arm_2d_impl_c8bit_draw_pattern(ptr noalias noundef, i32 noundef, i16 noundef signext, ptr noalias noundef, i16 noundef signext, ptr noalias noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 -4, 1) i32 @__arm_2d_c8bit_sw_draw_pattern(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = icmp eq ptr %3, null
  %spec.store.select = select i1 %4, ptr getelementptr inbounds (i8, ptr @ARM_2D_CTRL, i64 56), ptr %3
  %5 = getelementptr inbounds i8, ptr %spec.store.select, i64 8
  %6 = load ptr, ptr %5, align 8, !tbaa !11
  %7 = load i8, ptr %6, align 8
  %8 = and i8 %7, 14
  %9 = icmp eq i8 %8, 6
  br i1 %9, label %11, label %10

10:                                               ; preds = %1
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 589, ptr noundef nonnull @__PRETTY_FUNCTION__.__arm_2d_c8bit_sw_draw_pattern) #2
  unreachable

11:                                               ; preds = %1
  %12 = getelementptr inbounds i8, ptr %spec.store.select, i64 72
  %13 = load i32, ptr %12, align 8, !tbaa !21
  %14 = and i32 %13, 12
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %15, label %34

15:                                               ; preds = %11
  %16 = getelementptr inbounds i8, ptr %0, i64 24
  %17 = load ptr, ptr %16, align 8, !tbaa !22
  %18 = getelementptr inbounds i8, ptr %0, i64 32
  %19 = load i32, ptr %18, align 8, !tbaa !22
  %20 = getelementptr inbounds i8, ptr %0, i64 36
  %21 = load i16, ptr %20, align 4, !tbaa !22
  %22 = getelementptr inbounds i8, ptr %0, i64 64
  %23 = load ptr, ptr %22, align 8, !tbaa !22
  %24 = getelementptr inbounds i8, ptr %0, i64 76
  %25 = load i16, ptr %24, align 4, !tbaa !22
  %26 = getelementptr inbounds i8, ptr %0, i64 104
  %27 = trunc i32 %13 to i8
  %28 = getelementptr inbounds i8, ptr %spec.store.select, i64 76
  %29 = load i16, ptr %28, align 4, !tbaa !22
  %30 = trunc i16 %29 to i8
  %31 = getelementptr inbounds i8, ptr %spec.store.select, i64 80
  %32 = load i16, ptr %31, align 8, !tbaa !22
  %33 = trunc i16 %32 to i8
  tail call void @__arm_2d_impl_c8bit_draw_pattern(ptr noundef %17, i32 noundef %19, i16 noundef signext %21, ptr noundef %23, i16 noundef signext %25, ptr noundef nonnull %26, i8 noundef zeroext %27, i8 noundef zeroext %30, i8 noundef zeroext %33)
  br label %34

34:                                               ; preds = %11, %15
  %.0 = phi i32 [ 0, %15 ], [ -4, %11 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"__arm_2d_sub_task_t", !7, i64 0}
!7 = !{!"", !8, i64 0, !8, i64 8, !9, i64 16, !9, i64 17, !9, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"arm_2d_op_drw_patn_t", !13, i64 0, !18, i64 48, !19, i64 64, !20, i64 72, !9, i64 76, !9, i64 80}
!13 = !{!"arm_2d_op_core_t", !14, i64 0, !17, i64 40}
!14 = !{!"", !8, i64 0, !8, i64 8, !15, i64 16, !9, i64 17, !9, i64 18, !16, i64 24}
!15 = !{!"", !9, i64 0}
!16 = !{!"arm_2d_op_evt_t", !8, i64 0, !8, i64 8}
!17 = !{!"long", !9, i64 0}
!18 = !{!"", !8, i64 0, !8, i64 8}
!19 = !{!"", !8, i64 0}
!20 = !{!"int", !9, i64 0}
!21 = !{!12, !20, i64 72}
!22 = !{!9, !9, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass