; LLVM IR from tastangh/TI-RSLK-Texas-Instruments-Robotics-System-The-Maze-Edition :: tirslk_maze_1_00_00/inc (FlashProgram)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @IsInBank0(i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @IsInBank1(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @Flash_Erase(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = call i32 @IsInBank0(i32 noundef %8)
  %10 = icmp ne i32 %9, 0
  br i1 %10, label %14, label %11

11:                                               ; preds = %1
  %12 = call i32 @IsInBank1(i32 noundef ptrtoint (ptr @Flash_Erase to i32))
  %13 = icmp ne i32 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %11, %1
  store i32 1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %130

15:                                               ; preds = %11
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = call i32 @EraseAddrValid(i32 noundef %16)
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %129

19:                                               ; preds = %15
  store volatile i32 32, ptr inttoptr (i64 1073811704 to ptr), align 4, !tbaa !5
  %20 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %21 = or i32 %20, 524288
  store volatile i32 %21, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = sub i32 %22, 131072
  %24 = lshr i32 %23, 12
  %25 = shl i32 1, %24
  store i32 %25, ptr %5, align 4, !tbaa !5
  %26 = load volatile i32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %27 = load i32, ptr %5, align 4, !tbaa !5
  %28 = and i32 %26, %27
  store i32 %28, ptr %4, align 4, !tbaa !5
  %29 = load volatile i32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = xor i32 %30, -1
  %32 = and i32 %29, %31
  store volatile i32 %32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %33 = load i32, ptr %3, align 4, !tbaa !5
  store volatile i32 %33, ptr inttoptr (i64 1073811620 to ptr), align 4, !tbaa !5
  %34 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %35 = and i32 %34, -13
  %36 = or i32 %35, 0
  store volatile i32 %36, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %37 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %38 = and i32 %37, -3
  store volatile i32 %38, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  store i32 0, ptr %6, align 4, !tbaa !5
  %39 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %40 = or i32 %39, 1
  store volatile i32 %40, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  br label %41

41:                                               ; preds = %45, %19
  %42 = load volatile i32, ptr inttoptr (i64 1073811696 to ptr), align 4, !tbaa !5
  %43 = and i32 %42, 32
  %44 = icmp eq i32 %43, 0
  br i1 %44, label %45, label %46

45:                                               ; preds = %41
  br label %41, !llvm.loop !9

46:                                               ; preds = %41
  %47 = load i32, ptr %6, align 4, !tbaa !5
  %48 = add i32 %47, 1
  store i32 %48, ptr %6, align 4, !tbaa !5
  br label %49

49:                                               ; preds = %120, %46
  %50 = load i32, ptr %6, align 4, !tbaa !5
  %51 = icmp ugt i32 %50, 50
  br i1 %51, label %52, label %60

52:                                               ; preds = %49
  store volatile i32 33, ptr inttoptr (i64 1073811704 to ptr), align 4, !tbaa !5
  %53 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %54 = or i32 %53, 524288
  store volatile i32 %54, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %55 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %56 = or i32 %55, 8388608
  store volatile i32 %56, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %57 = load volatile i32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %58 = load i32, ptr %4, align 4, !tbaa !5
  %59 = or i32 %57, %58
  store volatile i32 %59, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  store i32 1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %130

60:                                               ; preds = %49
  %61 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %62 = or i32 %61, 8388608
  store volatile i32 %62, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = sub i32 %63, 0
  store volatile i32 %64, ptr inttoptr (i64 1073811492 to ptr), align 4, !tbaa !5
  store volatile i32 4096, ptr inttoptr (i64 1073811496 to ptr), align 4, !tbaa !5
  %65 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %66 = and i32 %65, -71
  %67 = or i32 %66, 16
  %68 = or i32 %67, 8
  %69 = or i32 %68, 0
  store volatile i32 %69, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  store volatile i32 0, ptr inttoptr (i64 1073811516 to ptr), align 4, !tbaa !5
  store volatile i32 0, ptr inttoptr (i64 1073811520 to ptr), align 4, !tbaa !5
  store volatile i32 1, ptr inttoptr (i64 1073811704 to ptr), align 4, !tbaa !5
  store volatile i32 20484, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  br label %70

70:                                               ; preds = %74, %60
  %71 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %72 = and i32 %71, 983040
  %73 = icmp ne i32 %72, 262144
  br i1 %73, label %74, label %75

74:                                               ; preds = %70
  br label %70, !llvm.loop !11

75:                                               ; preds = %70
  %76 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %77 = or i32 %76, 1
  store volatile i32 %77, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  br label %78

78:                                               ; preds = %82, %75
  %79 = load volatile i32, ptr inttoptr (i64 1073811696 to ptr), align 4, !tbaa !5
  %80 = and i32 %79, 1
  %81 = icmp eq i32 %80, 0
  br i1 %81, label %82, label %83

82:                                               ; preds = %78
  br label %78, !llvm.loop !12

83:                                               ; preds = %78
  %84 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %85 = or i32 %84, 8388608
  store volatile i32 %85, ptr inttoptr (i64 1073811488 to ptr), align 4, !tbaa !5
  %86 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %87 = and i32 %86, -16
  %88 = or i32 %87, 0
  store volatile i32 %88, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  br label %89

89:                                               ; preds = %93, %83
  %90 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %91 = and i32 %90, 983040
  %92 = icmp ne i32 %91, 0
  br i1 %92, label %93, label %94

93:                                               ; preds = %89
  br label %89, !llvm.loop !13

94:                                               ; preds = %89
  %95 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %96 = and i32 %95, -61441
  %97 = or i32 %96, 8192
  store volatile i32 %97, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %98 = load volatile i32, ptr inttoptr (i64 1073811520 to ptr), align 4, !tbaa !5
  %99 = icmp ugt i32 %98, 0
  br i1 %99, label %100, label %119

100:                                              ; preds = %94
  store volatile i32 32, ptr inttoptr (i64 1073811704 to ptr), align 4, !tbaa !5
  %101 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %102 = or i32 %101, 524288
  store volatile i32 %102, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %103 = load i32, ptr %3, align 4, !tbaa !5
  store volatile i32 %103, ptr inttoptr (i64 1073811620 to ptr), align 4, !tbaa !5
  %104 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %105 = and i32 %104, -13
  %106 = or i32 %105, 0
  store volatile i32 %106, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %107 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %108 = and i32 %107, -3
  store volatile i32 %108, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %109 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %110 = or i32 %109, 1
  store volatile i32 %110, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  br label %111

111:                                              ; preds = %115, %100
  %112 = load volatile i32, ptr inttoptr (i64 1073811696 to ptr), align 4, !tbaa !5
  %113 = and i32 %112, 32
  %114 = icmp eq i32 %113, 0
  br i1 %114, label %115, label %116

115:                                              ; preds = %111
  br label %111, !llvm.loop !14

116:                                              ; preds = %111
  %117 = load i32, ptr %6, align 4, !tbaa !5
  %118 = add i32 %117, 1
  store i32 %118, ptr %6, align 4, !tbaa !5
  br label %119

119:                                              ; preds = %116, %94
  br label %120

120:                                              ; preds = %119
  %121 = load volatile i32, ptr inttoptr (i64 1073811520 to ptr), align 4, !tbaa !5
  %122 = icmp ugt i32 %121, 0
  br i1 %122, label %49, label %123, !llvm.loop !15

123:                                              ; preds = %120
  store volatile i32 33, ptr inttoptr (i64 1073811704 to ptr), align 4, !tbaa !5
  %124 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %125 = or i32 %124, 524288
  store volatile i32 %125, ptr inttoptr (i64 1073811616 to ptr), align 4, !tbaa !5
  %126 = load volatile i32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %127 = load i32, ptr %4, align 4, !tbaa !5
  %128 = or i32 %126, %127
  store volatile i32 %128, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  store i32 0, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %130

129:                                              ; preds = %15
  store i32 1, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %130

130:                                              ; preds = %129, %123, %52, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %131 = load i32, ptr %2, align 4
  ret i32 %131
}

; Function Attrs: nounwind uwtable
declare hidden i32 @EraseAddrValid(i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare hidden i32 @IsInBank0(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @IsInBank1(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @Flash_Erase(i32 noundef %0) #0 {
  %2 = tail call i32 @IsInBank0(i32 noundef %0)
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %3, label %83

3:                                                ; preds = %1
  %4 = tail call i32 @IsInBank1(i32 noundef ptrtoint (ptr @Flash_Erase to i32))
  %.not15 = icmp eq i32 %4, 0
  br i1 %.not15, label %5, label %83

5:                                                ; preds = %3
  %6 = tail call i32 @EraseAddrValid(i32 noundef %0)
  %.not16 = icmp eq i32 %6, 0
  br i1 %.not16, label %83, label %7

7:                                                ; preds = %5
  store volatile i32 32, ptr inttoptr (i64 1073811704 to ptr), align 8, !tbaa !5
  %8 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %9 = or i32 %8, 524288
  store volatile i32 %9, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %10 = add i32 %0, -131072
  %11 = lshr i32 %10, 12
  %12 = shl nuw i32 1, %11
  %13 = load volatile i32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %14 = load volatile i32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %15 = xor i32 %12, -1
  %16 = and i32 %14, %15
  store volatile i32 %16, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  store volatile i32 %0, ptr inttoptr (i64 1073811620 to ptr), align 4, !tbaa !5
  %17 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %18 = and i32 %17, -13
  store volatile i32 %18, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %19 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %20 = and i32 %19, -3
  store volatile i32 %20, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %21 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %22 = or i32 %21, 1
  store volatile i32 %22, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  br label %23

23:                                               ; preds = %23, %7
  %24 = load volatile i32, ptr inttoptr (i64 1073811696 to ptr), align 16, !tbaa !5
  %25 = and i32 %24, 32
  %26 = icmp eq i32 %25, 0
  br i1 %26, label %23, label %.preheader.preheader, !llvm.loop !9

.preheader.preheader:                             ; preds = %23
  %27 = and i32 %13, %12
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %76
  %.0 = phi i32 [ %.1, %76 ], [ 1, %.preheader.preheader ]
  %28 = icmp ugt i32 %.0, 50
  br i1 %28, label %29, label %32

29:                                               ; preds = %.preheader
  store volatile i32 33, ptr inttoptr (i64 1073811704 to ptr), align 8, !tbaa !5
  %30 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %31 = or i32 %30, 524288
  store volatile i32 %31, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  br label %.sink.split

32:                                               ; preds = %.preheader
  %33 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  %34 = or i32 %33, 8388608
  store volatile i32 %34, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  store volatile i32 %0, ptr inttoptr (i64 1073811492 to ptr), align 4, !tbaa !5
  store volatile i32 4096, ptr inttoptr (i64 1073811496 to ptr), align 8, !tbaa !5
  %35 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  %36 = and i32 %35, -95
  %37 = or disjoint i32 %36, 24
  store volatile i32 %37, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  store volatile i32 0, ptr inttoptr (i64 1073811516 to ptr), align 4, !tbaa !5
  store volatile i32 0, ptr inttoptr (i64 1073811520 to ptr), align 64, !tbaa !5
  store volatile i32 1, ptr inttoptr (i64 1073811704 to ptr), align 8, !tbaa !5
  store volatile i32 20484, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  br label %38

38:                                               ; preds = %38, %32
  %39 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %40 = and i32 %39, 983040
  %.not17 = icmp eq i32 %40, 262144
  br i1 %.not17, label %41, label %38, !llvm.loop !11

41:                                               ; preds = %38
  %42 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  %43 = or i32 %42, 1
  store volatile i32 %43, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  br label %44

44:                                               ; preds = %44, %41
  %45 = load volatile i32, ptr inttoptr (i64 1073811696 to ptr), align 16, !tbaa !5
  %46 = and i32 %45, 1
  %47 = icmp eq i32 %46, 0
  br i1 %47, label %44, label %48, !llvm.loop !12

48:                                               ; preds = %44
  %49 = load volatile i32, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  %50 = or i32 %49, 8388608
  store volatile i32 %50, ptr inttoptr (i64 1073811488 to ptr), align 32, !tbaa !5
  %51 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %52 = and i32 %51, -16
  store volatile i32 %52, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  br label %53

53:                                               ; preds = %53, %48
  %54 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %55 = and i32 %54, 983040
  %.not18 = icmp eq i32 %55, 0
  br i1 %.not18, label %56, label %53, !llvm.loop !13

56:                                               ; preds = %53
  %57 = load volatile i32, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %58 = and i32 %57, -61441
  %59 = or disjoint i32 %58, 8192
  store volatile i32 %59, ptr inttoptr (i64 1073811476 to ptr), align 4, !tbaa !5
  %60 = load volatile i32, ptr inttoptr (i64 1073811520 to ptr), align 64, !tbaa !5
  %.not19 = icmp eq i32 %60, 0
  br i1 %.not19, label %76, label %61

61:                                               ; preds = %56
  store volatile i32 32, ptr inttoptr (i64 1073811704 to ptr), align 8, !tbaa !5
  %62 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %63 = or i32 %62, 524288
  store volatile i32 %63, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  store volatile i32 %0, ptr inttoptr (i64 1073811620 to ptr), align 4, !tbaa !5
  %64 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %65 = and i32 %64, -13
  store volatile i32 %65, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %66 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %67 = and i32 %66, -3
  store volatile i32 %67, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %68 = load volatile i32, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  %69 = or i32 %68, 1
  store volatile i32 %69, ptr inttoptr (i64 1073811616 to ptr), align 32, !tbaa !5
  br label %70

70:                                               ; preds = %70, %61
  %71 = load volatile i32, ptr inttoptr (i64 1073811696 to ptr), align 16, !tbaa !5
  %72 = and i32 %71, 32
  %73 = icmp eq i32 %72, 0
  br i1 %73, label %70, label %74, !llvm.loop !14

74:                                               ; preds = %70
  %75 = add nuw nsw i32 %.0, 1
  br label %76

76:                                               ; preds = %56, %74
  %.1 = phi i32 [ %75, %74 ], [ %.0, %56 ]
  %77 = load volatile i32, ptr inttoptr (i64 1073811520 to ptr), align 64, !tbaa !5
  %.not20 = icmp eq i32 %77, 0
  br i1 %.not20, label %78, label %.preheader, !llvm.loop !15

78:                                               ; preds = %76
  store volatile i32 33, ptr inttoptr (i64 1073811704 to ptr), align 8, !tbaa !5
  br label %.sink.split

.sink.split:                                      ; preds = %29, %78
  %.sink = phi ptr [ inttoptr (i64 1073811616 to ptr), %78 ], [ inttoptr (i64 1073811488 to ptr), %29 ]
  %.sink24 = phi i32 [ 524288, %78 ], [ 8388608, %29 ]
  %.014.ph = phi i32 [ 0, %78 ], [ 1, %29 ]
  %79 = load volatile i32, ptr %.sink, align 32, !tbaa !5
  %80 = or i32 %79, %.sink24
  store volatile i32 %80, ptr %.sink, align 32, !tbaa !5
  %81 = load volatile i32, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  %82 = or i32 %81, %27
  store volatile i32 %82, ptr inttoptr (i64 1073811652 to ptr), align 4, !tbaa !5
  br label %83

83:                                               ; preds = %.sink.split, %5, %1, %3
  %.014 = phi i32 [ 1, %3 ], [ 1, %1 ], [ 1, %5 ], [ %.014.ph, %.sink.split ]
  ret i32 %.014
}

; Function Attrs: nounwind uwtable
declare hidden i32 @EraseAddrValid(i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass