; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/FastMathFunctions (arm_divide_q15)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_divide_q15(i16 noundef signext %0, i16 noundef signext %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i16, align 2
  %11 = alloca i32, align 4
  %12 = alloca i16, align 2
  %13 = alloca i32, align 4
  store i16 %0, ptr %6, align 2, !tbaa !5
  store i16 %1, ptr %7, align 2, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #3
  store i16 0, ptr %10, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #3
  %14 = load ptr, ptr %9, align 8, !tbaa !9
  store i16 0, ptr %14, align 2, !tbaa !5
  %15 = load i16, ptr %6, align 2, !tbaa !5
  %16 = sext i16 %15 to i32
  %17 = ashr i32 %16, 15
  %18 = load i16, ptr %7, align 2, !tbaa !5
  %19 = sext i16 %18 to i32
  %20 = ashr i32 %19, 15
  %21 = xor i32 %17, %20
  %22 = trunc i32 %21 to i16
  store i16 %22, ptr %10, align 2, !tbaa !5
  %23 = load i16, ptr %7, align 2, !tbaa !5
  %24 = sext i16 %23 to i32
  %25 = icmp eq i32 %24, 0
  br i1 %25, label %26, label %34

26:                                               ; preds = %4
  %27 = load i16, ptr %10, align 2, !tbaa !5
  %28 = icmp ne i16 %27, 0
  br i1 %28, label %29, label %31

29:                                               ; preds = %26
  %30 = load ptr, ptr %8, align 8, !tbaa !9
  store i16 -32768, ptr %30, align 2, !tbaa !5
  br label %33

31:                                               ; preds = %26
  %32 = load ptr, ptr %8, align 8, !tbaa !9
  store i16 32767, ptr %32, align 2, !tbaa !5
  br label %33

33:                                               ; preds = %31, %29
  store i32 -4, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %75

34:                                               ; preds = %4
  %35 = load i16, ptr %6, align 2, !tbaa !5
  %36 = sext i16 %35 to i32
  %37 = call i32 @llvm.abs.i32(i32 %36, i1 true)
  %38 = trunc i32 %37 to i16
  store i16 %38, ptr %6, align 2, !tbaa !5
  %39 = load i16, ptr %7, align 2, !tbaa !5
  %40 = sext i16 %39 to i32
  %41 = call i32 @llvm.abs.i32(i32 %40, i1 true)
  %42 = trunc i32 %41 to i16
  store i16 %42, ptr %7, align 2, !tbaa !5
  %43 = load i16, ptr %6, align 2, !tbaa !5
  %44 = sext i16 %43 to i32
  %45 = shl i32 %44, 15
  %46 = load i16, ptr %7, align 2, !tbaa !5
  %47 = sext i16 %46 to i32
  %48 = sdiv i32 %45, %47
  store i32 %48, ptr %11, align 4, !tbaa !11
  %49 = load i32, ptr %11, align 4, !tbaa !11
  %50 = call i32 @llvm.ctlz.i32(i32 %49, i1 true)
  %51 = trunc i32 %50 to i8
  %52 = zext i8 %51 to i32
  %53 = sub nsw i32 17, %52
  %54 = trunc i32 %53 to i16
  store i16 %54, ptr %12, align 2, !tbaa !5
  %55 = load i16, ptr %12, align 2, !tbaa !5
  %56 = sext i16 %55 to i32
  %57 = icmp sgt i32 %56, 0
  br i1 %57, label %58, label %65

58:                                               ; preds = %34
  %59 = load i16, ptr %12, align 2, !tbaa !5
  %60 = load ptr, ptr %9, align 8, !tbaa !9
  store i16 %59, ptr %60, align 2, !tbaa !5
  %61 = load i32, ptr %11, align 4, !tbaa !11
  %62 = load i16, ptr %12, align 2, !tbaa !5
  %63 = sext i16 %62 to i32
  %64 = ashr i32 %61, %63
  store i32 %64, ptr %11, align 4, !tbaa !11
  br label %65

65:                                               ; preds = %58, %34
  %66 = load i16, ptr %10, align 2, !tbaa !5
  %67 = icmp ne i16 %66, 0
  br i1 %67, label %68, label %71

68:                                               ; preds = %65
  %69 = load i32, ptr %11, align 4, !tbaa !11
  %70 = sub nsw i32 0, %69
  store i32 %70, ptr %11, align 4, !tbaa !11
  br label %71

71:                                               ; preds = %68, %65
  %72 = load i32, ptr %11, align 4, !tbaa !11
  %73 = trunc i32 %72 to i16
  %74 = load ptr, ptr %8, align 8, !tbaa !9
  store i16 %73, ptr %74, align 2, !tbaa !5
  store i32 0, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %75

75:                                               ; preds = %71, %33
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #3
  %76 = load i32, ptr %5, align 4
  ret i32 %76
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.ctlz.i32(i32, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local range(i32 -4, 1) i32 @arm_divide_q15(i16 noundef signext %0, i16 noundef signext %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  store i16 0, ptr %3, align 2, !tbaa !5
  %5 = xor i16 %1, %0
  %6 = icmp eq i16 %1, 0
  br i1 %6, label %7, label %8

7:                                                ; preds = %4
  %.not24 = icmp sgt i16 %0, -1
  %. = select i1 %.not24, i16 32767, i16 -32768
  br label %25

8:                                                ; preds = %4
  %9 = tail call i16 @llvm.abs.i16(i16 %0, i1 false)
  %10 = tail call i16 @llvm.abs.i16(i16 %1, i1 false)
  %11 = sext i16 %9 to i32
  %12 = shl nsw i32 %11, 15
  %13 = sext i16 %10 to i32
  %14 = sdiv i32 %12, %13
  %15 = icmp ugt i32 %14, 32767
  br i1 %15, label %16, label %22

16:                                               ; preds = %8
  %17 = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 %14, i1 true)
  %18 = trunc nuw nsw i32 %17 to i16
  %19 = sub nuw nsw i16 17, %18
  store i16 %19, ptr %3, align 2, !tbaa !5
  %20 = zext nneg i16 %19 to i32
  %21 = ashr i32 %14, %20
  br label %22

22:                                               ; preds = %16, %8
  %.021 = phi i32 [ %21, %16 ], [ %14, %8 ]
  %23 = sub nsw i32 0, %.021
  %.not26 = icmp slt i16 %5, 0
  %spec.select = select i1 %.not26, i32 %23, i32 %.021
  %24 = trunc i32 %spec.select to i16
  br label %25

25:                                               ; preds = %22, %7
  %storemerge25 = phi i16 [ %., %7 ], [ %24, %22 ]
  %.0 = phi i32 [ -4, %7 ], [ 0, %22 ]
  store i16 %storemerge25, ptr %2, align 2, !tbaa !5
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.ctlz.i32(i32, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i16 @llvm.abs.i16(i16, i1 immarg) #2

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass