; LLVM IR from ARM-software/Arm-2D :: Helper/Source/arm_2d_helper_pfb.ll_ (arm_2d_helper_pfb_is_region_active1)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_tile_t = type { %union.anon.8, %union.anon.19, %union.anon.20 }
%union.anon.8 = type { %struct.anon.9 }
%struct.anon.9 = type { i8, %union.arm_2d_color_info_t, %union.anon.12 }
%union.arm_2d_color_info_t = type { %struct.anon.10 }
%struct.anon.10 = type { i8 }
%union.anon.12 = type { i16 }
%union.anon.19 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon, %union.anon.0 }
%union.anon = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.0 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.20 = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef, ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @__arm_2d_helper_pfb_is_region_active1(ptr noundef %0, ptr noundef nonnull %1, i1 noundef zeroext %2, ptr noundef nonnull %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  %12 = zext i1 %2 to i8
  store i8 %12, ptr %7, align 1, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  %16 = call zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef %13, ptr noundef %14, ptr noundef %15)
  %17 = zext i1 %16 to i8
  store i8 %17, ptr %9, align 1, !tbaa !9
  br label %18

18:                                               ; preds = %4
  %19 = load i8, ptr %9, align 1, !tbaa !9, !range !11, !noundef !12
  %20 = trunc i8 %19 to i1
  br i1 %20, label %21, label %22

21:                                               ; preds = %18
  br label %66

22:                                               ; preds = %18
  %23 = load ptr, ptr %8, align 8, !tbaa !5
  %24 = icmp eq ptr null, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  br label %66

26:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %27 = load ptr, ptr %8, align 8, !tbaa !5
  %28 = load ptr, ptr %27, align 8, !tbaa !5
  store ptr %28, ptr %10, align 8, !tbaa !5
  %29 = load ptr, ptr %10, align 8, !tbaa !5
  %30 = icmp eq ptr null, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %26
  store i32 2, ptr %11, align 4
  br label %62

32:                                               ; preds = %26
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %33, i32 0, i32 0
  %35 = load i8, ptr %34, align 8
  %36 = lshr i8 %35, 5
  %37 = zext i8 %36 to i32
  %38 = icmp ne i32 %37, 1
  br i1 %38, label %39, label %40

39:                                               ; preds = %32
  store i32 2, ptr %11, align 4
  br label %62

40:                                               ; preds = %32
  %41 = load ptr, ptr %10, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %41, i32 0, i32 0
  %43 = getelementptr inbounds %struct.anon.9, ptr %42, i32 0, i32 2
  %44 = load i8, ptr %43, align 2
  %45 = and i8 %44, 1
  %46 = icmp ne i8 %45, 0
  br i1 %46, label %61, label %47

47:                                               ; preds = %40
  %48 = load i8, ptr %7, align 1, !tbaa !9, !range !11, !noundef !12
  %49 = trunc i8 %48 to i1
  br i1 %49, label %50, label %59

50:                                               ; preds = %47
  %51 = load ptr, ptr %10, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %51, i32 0, i32 0
  %53 = getelementptr inbounds %struct.anon.9, ptr %52, i32 0, i32 2
  %54 = load i8, ptr %53, align 2
  %55 = lshr i8 %54, 1
  %56 = and i8 %55, 1
  %57 = zext i8 %56 to i32
  %58 = icmp ne i32 %57, 0
  br i1 %58, label %60, label %59

59:                                               ; preds = %50, %47
  store i32 2, ptr %11, align 4
  br label %62

60:                                               ; preds = %50
  br label %61

61:                                               ; preds = %60, %40
  store i8 1, ptr %9, align 1, !tbaa !9
  store i32 0, ptr %11, align 4
  br label %62

62:                                               ; preds = %61, %59, %39, %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %63 = load i32, ptr %11, align 4
  switch i32 %63, label %69 [
    i32 0, label %64
    i32 2, label %66
  ]

64:                                               ; preds = %62
  br label %65

65:                                               ; preds = %64
  br label %66

66:                                               ; preds = %65, %62, %25, %21
  %67 = load i8, ptr %9, align 1, !tbaa !9, !range !11, !noundef !12
  %68 = trunc i8 %67 to i1
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  ret i1 %68

69:                                               ; preds = %62
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @__arm_2d_helper_pfb_is_region_active1(ptr noundef %0, ptr noundef nonnull %1, i1 noundef zeroext %2, ptr noundef nonnull %3) local_unnamed_addr #0 {
  %5 = tail call zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %3)
  br i1 %5, label %18, label %6

6:                                                ; preds = %4
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = icmp eq ptr %7, null
  br i1 %8, label %18, label %9

9:                                                ; preds = %6
  %10 = load i8, ptr %7, align 8
  %.mask = and i8 %10, -32
  %.not = icmp eq i8 %.mask, 32
  br i1 %.not, label %11, label %18

11:                                               ; preds = %9
  %12 = getelementptr inbounds i8, ptr %7, i64 2
  %13 = load i8, ptr %12, align 2
  %14 = and i8 %13, 1
  %.not13 = icmp eq i8 %14, 0
  br i1 %.not13, label %15, label %17

15:                                               ; preds = %11
  %16 = and i8 %13, 2
  %.not14 = icmp ne i8 %16, 0
  %or.cond.not = and i1 %.not14, %2
  br i1 %or.cond.not, label %17, label %18

17:                                               ; preds = %15, %11
  br label %18

18:                                               ; preds = %17, %6, %9, %15, %4
  %.1 = phi i1 [ true, %4 ], [ true, %17 ], [ false, %6 ], [ false, %9 ], [ false, %15 ]
  ret i1 %.1
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass