; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/BSP/Components/lis3dsh (lis3dsh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LIS3DSH_InterruptConfigTypeDef = type { i8, i8, i8, i8, i8, i8, i8 }

; Function Attrs: nounwind uwtable
define dso_local void @LIS3DSH_Click_IntConfig() #0 {
  %1 = alloca i8, align 1
  %2 = alloca %struct.LIS3DSH_InterruptConfigTypeDef, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #3
  store i8 0, ptr %1, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 7, ptr %2) #3
  call void @ACCELERO_IO_ITConfig()
  %3 = getelementptr inbounds %struct.LIS3DSH_InterruptConfigTypeDef, ptr %2, i32 0, i32 1
  store i8 0, ptr %3, align 1, !tbaa !8
  %4 = getelementptr inbounds %struct.LIS3DSH_InterruptConfigTypeDef, ptr %2, i32 0, i32 0
  store i8 0, ptr %4, align 1, !tbaa !10
  %5 = getelementptr inbounds %struct.LIS3DSH_InterruptConfigTypeDef, ptr %2, i32 0, i32 2
  store i8 64, ptr %5, align 1, !tbaa !11
  %6 = getelementptr inbounds %struct.LIS3DSH_InterruptConfigTypeDef, ptr %2, i32 0, i32 3
  store i8 0, ptr %6, align 1, !tbaa !12
  %7 = getelementptr inbounds %struct.LIS3DSH_InterruptConfigTypeDef, ptr %2, i32 0, i32 5
  store i8 1, ptr %7, align 1, !tbaa !13
  %8 = getelementptr inbounds %struct.LIS3DSH_InterruptConfigTypeDef, ptr %2, i32 0, i32 6
  store i8 0, ptr %8, align 1, !tbaa !14
  call void @LIS3DSH_InterruptConfig(ptr noundef %2)
  store i8 3, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 82, i16 noundef zeroext 1)
  store i8 -56, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 84, i16 noundef zeroext 1)
  store i8 69, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 86, i16 noundef zeroext 1)
  store i8 -4, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 90, i16 noundef zeroext 1)
  store i8 -95, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 91, i16 noundef zeroext 1)
  store i8 1, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 92, i16 noundef zeroext 1)
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 123, i16 noundef zeroext 1)
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 96, i16 noundef zeroext 1)
  store i8 6, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 97, i16 noundef zeroext 1)
  store i8 40, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 98, i16 noundef zeroext 1)
  store i8 17, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef %1, i8 noundef zeroext 99, i16 noundef zeroext 1)
  call void @llvm.lifetime.end.p0(i64 7, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @ACCELERO_IO_Write(ptr noundef, i8 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @LIS3DSH_InterruptConfig(ptr noundef) #0

declare void @ACCELERO_IO_ITConfig() #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 1}
!9 = !{!"", !6, i64 0, !6, i64 1, !6, i64 2, !6, i64 3, !6, i64 4, !6, i64 5, !6, i64 6}
!10 = !{!9, !6, i64 0}
!11 = !{!9, !6, i64 2}
!12 = !{!9, !6, i64 3}
!13 = !{!9, !6, i64 5}
!14 = !{!9, !6, i64 6}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LIS3DSH_InterruptConfigTypeDef = type { i8, i8, i8, i8, i8, i8, i8 }

; Function Attrs: nounwind uwtable
define dso_local void @LIS3DSH_Click_IntConfig() local_unnamed_addr #0 {
  %1 = alloca i8, align 1
  %2 = alloca %struct.LIS3DSH_InterruptConfigTypeDef, align 4
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) #3
  call void @llvm.lifetime.start.p0(i64 7, ptr nonnull %2) #3
  tail call void @ACCELERO_IO_ITConfig() #3
  store <4 x i8> <i8 0, i8 0, i8 64, i8 0>, ptr %2, align 4, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %2, i64 5
  store i8 1, ptr %3, align 1, !tbaa !8
  %4 = getelementptr inbounds i8, ptr %2, i64 6
  store i8 0, ptr %4, align 2, !tbaa !10
  call void @LIS3DSH_InterruptConfig(ptr noundef nonnull %2)
  store i8 3, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 82, i16 noundef zeroext 1) #3
  store i8 -56, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 84, i16 noundef zeroext 1) #3
  store i8 69, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 86, i16 noundef zeroext 1) #3
  store i8 -4, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 90, i16 noundef zeroext 1) #3
  store i8 -95, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 91, i16 noundef zeroext 1) #3
  store i8 1, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 92, i16 noundef zeroext 1) #3
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 123, i16 noundef zeroext 1) #3
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 96, i16 noundef zeroext 1) #3
  store i8 6, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 97, i16 noundef zeroext 1) #3
  store i8 40, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 98, i16 noundef zeroext 1) #3
  store i8 17, ptr %1, align 1, !tbaa !5
  call void @ACCELERO_IO_Write(ptr noundef nonnull %1, i8 noundef zeroext 99, i16 noundef zeroext 1) #3
  call void @llvm.lifetime.end.p0(i64 7, ptr nonnull %2) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @ACCELERO_IO_Write(ptr noundef, i8 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @LIS3DSH_InterruptConfig(ptr noundef) local_unnamed_addr #0

declare void @ACCELERO_IO_ITConfig() local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 5}
!9 = !{!"", !6, i64 0, !6, i64 1, !6, i64 2, !6, i64 3, !6, i64 4, !6, i64 5, !6, i64 6}
!10 = !{!9, !6, i64 6}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,TailCallElimPass