; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code17allocateSparePairEb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Code = type { %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector", i32, i32, i32, i32, [16 x i8], i32, i32, i32, %"class.std::__cxx11::basic_string", %"class.std::map" }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon.13 }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon.13 = type { i64, [8 x i8] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i8 @_ZN4Code17allocateSparePairEb(ptr noundef nonnull align 8 dereferenceable(200) %0, i1 noundef zeroext %1) #0 align 2 {
  %3 = alloca i8, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  %10 = zext i1 %1 to i8
  store i8 %10, ptr %5, align 1, !tbaa !9
  %11 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !11
  br label %12

12:                                               ; preds = %95, %2
  %13 = load i32, ptr %6, align 4, !tbaa !11
  %14 = zext i32 %13 to i64
  %15 = getelementptr inbounds %class.Code, ptr %11, i32 0, i32 2
  %16 = call noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15) #2
  %17 = sub i64 %16, 1
  %18 = icmp ult i64 %14, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %12
  store i32 2, ptr %7, align 4
  br label %98

20:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %21 = getelementptr inbounds %class.Code, ptr %11, i32 0, i32 2
  %22 = load i32, ptr %6, align 4, !tbaa !11
  %23 = zext i32 %22 to i64
  %24 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23) #2
  %25 = load i8, ptr %24, align 1, !tbaa !13
  store i8 %25, ptr %8, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %26 = getelementptr inbounds %class.Code, ptr %11, i32 0, i32 2
  %27 = load i32, ptr %6, align 4, !tbaa !11
  %28 = add i32 %27, 1
  %29 = zext i32 %28 to i64
  %30 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %29) #2
  %31 = load i8, ptr %30, align 1, !tbaa !13
  store i8 %31, ptr %9, align 1, !tbaa !13
  %32 = load i8, ptr %8, align 1, !tbaa !13
  %33 = zext i8 %32 to i32
  %34 = srem i32 %33, 2
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %43, label %36

36:                                               ; preds = %20
  %37 = load i8, ptr %9, align 1, !tbaa !13
  %38 = zext i8 %37 to i32
  %39 = load i8, ptr %8, align 1, !tbaa !13
  %40 = zext i8 %39 to i32
  %41 = add nsw i32 %40, 1
  %42 = icmp ne i32 %38, %41
  br i1 %42, label %43, label %44

43:                                               ; preds = %36, %20
  store i32 4, ptr %7, align 4
  br label %93

44:                                               ; preds = %36
  %45 = getelementptr inbounds %class.Code, ptr %11, i32 0, i32 3
  %46 = load i32, ptr %45, align 8, !tbaa !14
  %47 = load i8, ptr %8, align 1, !tbaa !13
  %48 = zext i8 %47 to i32
  %49 = shl i32 1, %48
  %50 = and i32 %46, %49
  %51 = icmp ne i32 %50, 0
  br i1 %51, label %52, label %53

52:                                               ; preds = %44
  store i32 4, ptr %7, align 4
  br label %93

53:                                               ; preds = %44
  %54 = getelementptr inbounds %class.Code, ptr %11, i32 0, i32 3
  %55 = load i32, ptr %54, align 8, !tbaa !14
  %56 = load i8, ptr %9, align 1, !tbaa !13
  %57 = zext i8 %56 to i32
  %58 = shl i32 1, %57
  %59 = and i32 %55, %58
  %60 = icmp ne i32 %59, 0
  br i1 %60, label %61, label %62

61:                                               ; preds = %53
  store i32 4, ptr %7, align 4
  br label %93

62:                                               ; preds = %53
  %63 = load i8, ptr %5, align 1, !tbaa !9, !range !40, !noundef !41
  %64 = trunc i8 %63 to i1
  br i1 %64, label %65, label %70

65:                                               ; preds = %62
  %66 = load i8, ptr %8, align 1, !tbaa !13
  %67 = zext i8 %66 to i32
  %68 = icmp slt i32 %67, 16
  br i1 %68, label %69, label %70

69:                                               ; preds = %65
  store i32 4, ptr %7, align 4
  br label %93

70:                                               ; preds = %65, %62
  %71 = load i8, ptr %8, align 1, !tbaa !13
  %72 = zext i8 %71 to i32
  %73 = shl i32 1, %72
  %74 = load i8, ptr %9, align 1, !tbaa !13
  %75 = zext i8 %74 to i32
  %76 = shl i32 1, %75
  %77 = or i32 %73, %76
  %78 = getelementptr inbounds %class.Code, ptr %11, i32 0, i32 3
  %79 = load i32, ptr %78, align 8, !tbaa !14
  %80 = or i32 %79, %77
  store i32 %80, ptr %78, align 8, !tbaa !14
  %81 = load i8, ptr %8, align 1, !tbaa !13
  %82 = zext i8 %81 to i32
  %83 = shl i32 1, %82
  %84 = load i8, ptr %9, align 1, !tbaa !13
  %85 = zext i8 %84 to i32
  %86 = shl i32 1, %85
  %87 = or i32 %83, %86
  %88 = xor i32 %87, -1
  %89 = getelementptr inbounds %class.Code, ptr %11, i32 0, i32 5
  %90 = load i32, ptr %89, align 8, !tbaa !42
  %91 = and i32 %90, %88
  store i32 %91, ptr %89, align 8, !tbaa !42
  %92 = load i8, ptr %8, align 1, !tbaa !13
  store i8 %92, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %93

93:                                               ; preds = %70, %69, %61, %52, %43
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  %94 = load i32, ptr %7, align 4
  switch i32 %94, label %98 [
    i32 4, label %95
  ]

95:                                               ; preds = %93
  %96 = load i32, ptr %6, align 4, !tbaa !11
  %97 = add i32 %96, 1
  store i32 %97, ptr %6, align 4, !tbaa !11
  br label %12, !llvm.loop !43

98:                                               ; preds = %93, %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %99 = load i32, ptr %7, align 4
  switch i32 %99, label %103 [
    i32 2, label %100
    i32 1, label %101
  ]

100:                                              ; preds = %98
  store i8 -1, ptr %3, align 1
  br label %101

101:                                              ; preds = %100, %98
  %102 = load i8, ptr %3, align 1
  ret i8 %102

103:                                              ; preds = %98
  unreachable
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = !{!15, !12, i64 72}
!15 = !{!"_ZTS4Code", !16, i64 0, !20, i64 24, !24, i64 48, !12, i64 72, !12, i64 76, !12, i64 80, !12, i64 84, !7, i64 88, !12, i64 104, !28, i64 108, !12, i64 112, !29, i64 120, !32, i64 152}
!16 = !{!"_ZTSSt6vectorI4InsnSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseI4InsnSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIiSaIiEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSSt6vectorIhSaIhEE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!"_ZTSN4Code12PrologueTypeE", !7, i64 0}
!29 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !30, i64 0, !31, i64 8, !7, i64 16}
!30 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!31 = !{!"long", !7, i64 0}
!32 = !{!"_ZTSSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEE", !33, i64 0}
!33 = !{!"_ZTSSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE", !34, i64 0}
!34 = !{!"_ZTSNSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE13_Rb_tree_implIS7_Lb1EEE", !35, i64 0, !37, i64 8}
!35 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIhEE", !36, i64 0}
!36 = !{!"_ZTSSt4lessIhE"}
!37 = !{!"_ZTSSt15_Rb_tree_header", !38, i64 0, !31, i64 32}
!38 = !{!"_ZTSSt18_Rb_tree_node_base", !39, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!39 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!40 = !{i8 0, i8 2}
!41 = !{}
!42 = !{!15, !12, i64 80}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i8 @_ZN4Code17allocateSparePairEb(ptr noundef nonnull align 8 dereferenceable(200) %0, i1 noundef zeroext %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 48
  %4 = tail call noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #1
  %.not3338.not = icmp eq i64 %4, 1
  br i1 %.not3338.not, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 72
  br label %6

6:                                                ; preds = %.lr.ph, %33
  %7 = phi i64 [ 0, %.lr.ph ], [ %11, %33 ]
  %.02139 = phi i32 [ 0, %.lr.ph ], [ %10, %33 ]
  %8 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %7) #1
  %9 = load i8, ptr %8, align 1, !tbaa !5
  %10 = add i32 %.02139, 1
  %11 = zext i32 %10 to i64
  %12 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIhSaIhEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %11) #1
  %13 = zext i8 %9 to i32
  %14 = and i32 %13, 1
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %15, label %33

15:                                               ; preds = %6
  %16 = load i8, ptr %12, align 1, !tbaa !5
  %17 = zext i8 %16 to i32
  %18 = or disjoint i32 %13, 1
  %.not26 = icmp eq i32 %18, %17
  br i1 %.not26, label %19, label %33

19:                                               ; preds = %15
  %20 = load i32, ptr %5, align 8, !tbaa !8
  %21 = shl nuw i32 1, %13
  %22 = and i32 %20, %21
  %.not27 = icmp eq i32 %22, 0
  br i1 %.not27, label %23, label %33

23:                                               ; preds = %19
  %24 = shl nuw i32 1, %17
  %25 = and i32 %20, %24
  %.not28 = icmp ne i32 %25, 0
  %26 = icmp ult i8 %9, 16
  %or.cond = select i1 %1, i1 %26, i1 false
  %or.cond29 = select i1 %.not28, i1 true, i1 %or.cond
  br i1 %or.cond29, label %33, label %.thread

.thread:                                          ; preds = %23
  %27 = or i32 %24, %21
  %28 = or i32 %20, %27
  store i32 %28, ptr %5, align 8, !tbaa !8
  %29 = xor i32 %27, -1
  %30 = getelementptr inbounds i8, ptr %0, i64 80
  %31 = load i32, ptr %30, align 8, !tbaa !36
  %32 = and i32 %31, %29
  store i32 %32, ptr %30, align 8, !tbaa !36
  br label %.loopexit

33:                                               ; preds = %23, %19, %6, %15
  %34 = tail call noundef i64 @_ZNKSt6vectorIhSaIhEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #1
  %35 = add i64 %34, -1
  %.not33 = icmp ugt i64 %35, %11
  br i1 %.not33, label %6, label %.loopexit, !llvm.loop !37

.loopexit:                                        ; preds = %33, %2, %.thread
  %spec.select = phi i8 [ %9, %.thread ], [ -1, %2 ], [ -1, %33 ]
  ret i8 %spec.select
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !23, i64 72}
!9 = !{!"_ZTS4Code", !10, i64 0, !15, i64 24, !19, i64 48, !23, i64 72, !23, i64 76, !23, i64 80, !23, i64 84, !6, i64 88, !23, i64 104, !24, i64 108, !23, i64 112, !25, i64 120, !28, i64 152}
!10 = !{!"_ZTSSt6vectorI4InsnSaIS0_EE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseI4InsnSaIS0_EE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !6, i64 0}
!15 = !{!"_ZTSSt6vectorIiSaIiEE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!19 = !{!"_ZTSSt6vectorIhSaIhEE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!23 = !{!"int", !6, i64 0}
!24 = !{!"_ZTSN4Code12PrologueTypeE", !6, i64 0}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !26, i64 0, !27, i64 8, !6, i64 16}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!27 = !{!"long", !6, i64 0}
!28 = !{!"_ZTSSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEE", !29, i64 0}
!29 = !{!"_ZTSSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE", !30, i64 0}
!30 = !{!"_ZTSNSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE13_Rb_tree_implIS7_Lb1EEE", !31, i64 0, !33, i64 8}
!31 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIhEE", !32, i64 0}
!32 = !{!"_ZTSSt4lessIhE"}
!33 = !{!"_ZTSSt15_Rb_tree_header", !34, i64 0, !27, i64 32}
!34 = !{!"_ZTSSt18_Rb_tree_node_base", !35, i64 0, !14, i64 8, !14, i64 16, !14, i64 24}
!35 = !{!"_ZTSSt14_Rb_tree_color", !6, i64 0}
!36 = !{!9, !23, i64 80}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass