; LLVM IR from ERGO-Code/HiGHS :: src/util/HFactorUtils.ll (ZN7HFactor9reportAsmEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HFactor = type { double, double, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %struct.RefactorInfo, i32, i32, i32, i32, i32, i32, i32, double, i8, ptr, ptr, ptr, ptr, double, double, i32, double, %"class.std::unique_ptr", %struct.HighsLogOptions, i8, i8, i32, i32, ptr, i32, %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.15", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %"class.std::vector.10", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.10", %class.HVectorBase }
%struct.RefactorInfo = type { i8, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", double }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::unique_ptr" = type { %"struct.std::__uniq_ptr_data" }
%"struct.std::__uniq_ptr_data" = type { %"class.std::__uniq_ptr_impl" }
%"class.std::__uniq_ptr_impl" = type { %"class.std::tuple" }
%"class.std::tuple" = type { %"struct.std::_Tuple_impl" }
%"struct.std::_Tuple_impl" = type { %"struct.std::_Head_base.9" }
%"struct.std::_Head_base.9" = type { ptr }
%struct.HighsLogOptions = type <{ ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::function", ptr, i8, [7 x i8] }>
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HVectorBase = type { i32, i32, %"class.std::vector", %"class.std::vector.10", double, %"class.std::vector.15", %"class.std::vector", ptr, i8, i32, %"class.std::vector", %"class.std::vector.10" }

@.str.10 = external hidden unnamed_addr constant [1 x i8], align 1
@.str.85 = external hidden unnamed_addr constant [54 x i8], align 1
@.str.86 = external hidden unnamed_addr constant [61 x i8], align 1
@.str.87 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @printf(ptr noundef, ...) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7HFactor9reportAsmEv(ptr noundef nonnull align 8 dereferenceable(1912) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca double, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca double, align 8
  %12 = alloca i32, align 4
  %13 = alloca double, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %14 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %115, %1
  %16 = load i32, ptr %3, align 4, !tbaa !9
  %17 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 11
  %18 = load i32, ptr %17, align 8, !tbaa !11
  %19 = icmp sle i32 %16, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %15
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  br label %118

21:                                               ; preds = %15
  %22 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 55
  %23 = load i32, ptr %3, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %24) #5
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = icmp slt i32 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %21
  br label %115

29:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %30 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 55
  %31 = load i32, ptr %3, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %32) #5
  %34 = load i32, ptr %33, align 4, !tbaa !9
  store i32 %34, ptr %5, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %108, %29
  %36 = load i32, ptr %5, align 4, !tbaa !9
  %37 = icmp ne i32 %36, -1
  br i1 %37, label %39, label %38

38:                                               ; preds = %35
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %114

39:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %40 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 46
  %41 = load i32, ptr %5, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #5
  %44 = load double, ptr %43, align 8, !tbaa !42
  store double %44, ptr %6, align 8, !tbaa !42
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %45 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 40
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %47) #5
  %49 = load i32, ptr %48, align 4, !tbaa !9
  store i32 %49, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 41
  %52 = load i32, ptr %5, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %53) #5
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = add nsw i32 %50, %55
  store i32 %56, ptr %8, align 4, !tbaa !9
  %57 = load i32, ptr %5, align 4, !tbaa !9
  %58 = load i32, ptr %3, align 4, !tbaa !9
  %59 = load double, ptr %6, align 8, !tbaa !42
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = load i32, ptr %8, align 4, !tbaa !9
  %62 = call i32 (ptr, ...) @printf(ptr noundef @.str.85, i32 noundef %57, i32 noundef %58, double noundef %59, i32 noundef %60, i32 noundef %61)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  %63 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %63, ptr %9, align 4, !tbaa !9
  br label %64

64:                                               ; preds = %104, %39
  %65 = load i32, ptr %9, align 4, !tbaa !9
  %66 = load i32, ptr %8, align 4, !tbaa !9
  %67 = icmp slt i32 %65, %66
  br i1 %67, label %69, label %68

68:                                               ; preds = %64
  store i32 8, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %107

69:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %70 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 44
  %71 = load i32, ptr %9, align 4, !tbaa !9
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %72) #5
  %74 = load i32, ptr %73, align 4, !tbaa !9
  store i32 %74, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %75 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 45
  %76 = load i32, ptr %9, align 4, !tbaa !9
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %77) #5
  %79 = load double, ptr %78, align 8, !tbaa !42
  store double %79, ptr %11, align 8, !tbaa !42
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %80 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 48
  %81 = load i32, ptr %10, align 4, !tbaa !9
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %82) #5
  %84 = load i32, ptr %83, align 4, !tbaa !9
  store i32 %84, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  %85 = load i32, ptr %3, align 4, !tbaa !9
  %86 = sub nsw i32 %85, 1
  %87 = sitofp i32 %86 to double
  %88 = fmul double 1.000000e+00, %87
  %89 = load i32, ptr %12, align 4, !tbaa !9
  %90 = sub nsw i32 %89, 1
  %91 = sitofp i32 %90 to double
  %92 = fmul double %88, %91
  store double %92, ptr %13, align 8, !tbaa !42
  %93 = load i32, ptr %10, align 4, !tbaa !9
  %94 = load i32, ptr %12, align 4, !tbaa !9
  %95 = load double, ptr %13, align 8, !tbaa !42
  %96 = load double, ptr %11, align 8, !tbaa !42
  %97 = load double, ptr %11, align 8, !tbaa !42
  %98 = call noundef double @_ZSt3absd(double noundef %97)
  %99 = load double, ptr %6, align 8, !tbaa !42
  %100 = fcmp oge double %98, %99
  %101 = zext i1 %100 to i64
  %102 = select i1 %100, ptr @.str.87, ptr @.str.10
  %103 = call i32 (ptr, ...) @printf(ptr noundef @.str.86, i32 noundef %93, i32 noundef %94, double noundef %95, double noundef %96, ptr noundef %102)
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %104

104:                                              ; preds = %69
  %105 = load i32, ptr %9, align 4, !tbaa !9
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %9, align 4, !tbaa !9
  br label %64, !llvm.loop !43

107:                                              ; preds = %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  br label %108

108:                                              ; preds = %107
  %109 = getelementptr inbounds %class.HFactor, ptr %14, i32 0, i32 56
  %110 = load i32, ptr %5, align 4, !tbaa !9
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %111) #5
  %113 = load i32, ptr %112, align 4, !tbaa !9
  store i32 %113, ptr %5, align 4, !tbaa !9
  br label %35, !llvm.loop !45

114:                                              ; preds = %38
  br label %115

115:                                              ; preds = %114, %28
  %116 = load i32, ptr %3, align 4, !tbaa !9
  %117 = add nsw i32 %116, 1
  store i32 %117, ptr %3, align 4, !tbaa !9
  br label %15, !llvm.loop !46

118:                                              ; preds = %20
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3absd(double noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 200}
!12 = !{!"_ZTS7HFactor", !13, i64 0, !13, i64 8, !10, i64 16, !14, i64 24, !14, i64 48, !14, i64 72, !18, i64 96, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !13, i64 216, !19, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !13, i64 264, !13, i64 272, !10, i64 280, !13, i64 288, !24, i64 296, !30, i64 304, !19, i64 400, !19, i64 401, !10, i64 404, !10, i64 408, !6, i64 416, !10, i64 424, !14, i64 432, !33, i64 456, !14, i64 480, !14, i64 504, !14, i64 528, !33, i64 552, !14, i64 576, !14, i64 600, !14, i64 624, !14, i64 648, !14, i64 672, !14, i64 696, !14, i64 720, !33, i64 744, !33, i64 768, !14, i64 792, !14, i64 816, !14, i64 840, !14, i64 864, !14, i64 888, !14, i64 912, !37, i64 936, !33, i64 960, !14, i64 984, !14, i64 1008, !14, i64 1032, !14, i64 1056, !14, i64 1080, !14, i64 1104, !14, i64 1128, !14, i64 1152, !14, i64 1176, !14, i64 1200, !33, i64 1224, !14, i64 1248, !14, i64 1272, !33, i64 1296, !14, i64 1320, !14, i64 1344, !33, i64 1368, !10, i64 1392, !10, i64 1396, !14, i64 1400, !14, i64 1424, !14, i64 1448, !33, i64 1472, !14, i64 1496, !14, i64 1520, !14, i64 1544, !14, i64 1568, !33, i64 1592, !33, i64 1616, !14, i64 1640, !14, i64 1664, !14, i64 1688, !33, i64 1712, !41, i64 1736}
!13 = !{!"double", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTS12RefactorInfo", !19, i64 0, !14, i64 8, !14, i64 32, !20, i64 56, !13, i64 80}
!19 = !{!"bool", !7, i64 0}
!20 = !{!"_ZTSSt6vectorIaSaIaEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !26, i64 0}
!26 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !27, i64 0}
!27 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !28, i64 0}
!28 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !29, i64 0}
!29 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !6, i64 0}
!30 = !{!"_ZTS15HighsLogOptions", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !31, i64 48, !6, i64 80, !19, i64 88}
!31 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !32, i64 0, !6, i64 24}
!32 = !{!"_ZTSSt14_Function_base", !7, i64 0, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIdSaIdEE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!"_ZTSSt6vectorIcSaIcEE", !38, i64 0}
!38 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !40, i64 0}
!40 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!41 = !{!"_ZTS11HVectorBaseIdE", !10, i64 0, !10, i64 4, !14, i64 8, !33, i64 32, !13, i64 56, !37, i64 64, !14, i64 88, !6, i64 112, !19, i64 120, !10, i64 124, !14, i64 128, !33, i64 152}
!42 = !{!13, !13, i64 0}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}
!45 = distinct !{!45, !44}
!46 = distinct !{!46, !44}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.10 = external hidden unnamed_addr constant [1 x i8], align 1
@.str.85 = external hidden unnamed_addr constant [54 x i8], align 1
@.str.86 = external hidden unnamed_addr constant [61 x i8], align 1
@.str.87 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN7HFactor9reportAsmEv(ptr noundef nonnull align 8 dereferenceable(1912) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 200
  %3 = load i32, ptr %2, align 8, !tbaa !5
  %.not39 = icmp slt i32 %3, 1
  br i1 %.not39, label %._crit_edge44, label %.lr.ph43

.lr.ph43:                                         ; preds = %1
  %4 = getelementptr inbounds i8, ptr %0, i64 984
  %5 = getelementptr inbounds i8, ptr %0, i64 768
  %6 = getelementptr inbounds i8, ptr %0, i64 624
  %7 = getelementptr inbounds i8, ptr %0, i64 648
  %8 = getelementptr inbounds i8, ptr %0, i64 720
  %9 = getelementptr inbounds i8, ptr %0, i64 744
  %10 = getelementptr inbounds i8, ptr %0, i64 816
  %11 = getelementptr inbounds i8, ptr %0, i64 1008
  br label %12

._crit_edge44:                                    ; preds = %.loopexit, %1
  ret void

12:                                               ; preds = %.lr.ph43, %.loopexit
  %indvars.iv46 = phi i64 [ 1, %.lr.ph43 ], [ %indvars.iv.next47, %.loopexit ]
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv46) #3
  %14 = load i32, ptr %13, align 4, !tbaa !40
  %15 = icmp slt i32 %14, 0
  br i1 %15, label %.loopexit, label %16

16:                                               ; preds = %12
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %indvars.iv46) #3
  %.03034 = load i32, ptr %17, align 4, !tbaa !40
  %.not3235 = icmp eq i32 %.03034, -1
  br i1 %.not3235, label %.loopexit, label %.lr.ph38

.lr.ph38:                                         ; preds = %16
  %18 = trunc i64 %indvars.iv46 to i32
  %19 = add i32 %18, -1
  %20 = sitofp i32 %19 to double
  %21 = trunc nuw nsw i64 %indvars.iv46 to i32
  br label %22

22:                                               ; preds = %.lr.ph38, %._crit_edge
  %.03036 = phi i32 [ %.03034, %.lr.ph38 ], [ %.030, %._crit_edge ]
  %23 = sext i32 %.03036 to i64
  %24 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %23) #3
  %25 = load double, ptr %24, align 8, !tbaa !41
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %23) #3
  %27 = load i32, ptr %26, align 4, !tbaa !40
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %23) #3
  %29 = load i32, ptr %28, align 4, !tbaa !40
  %30 = add nsw i32 %29, %27
  %31 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.85, i32 noundef %.03036, i32 noundef %21, double noundef %25, i32 noundef %27, i32 noundef %30)
  %32 = icmp sgt i32 %29, 0
  br i1 %32, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %22
  %33 = sext i32 %27 to i64
  %34 = sext i32 %30 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %22
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %23) #3
  %.030 = load i32, ptr %35, align 4, !tbaa !40
  %.not32 = icmp eq i32 %.030, -1
  br i1 %.not32, label %.loopexit, label %22, !llvm.loop !42

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %33, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv) #3
  %37 = load i32, ptr %36, align 4, !tbaa !40
  %38 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv) #3
  %39 = load double, ptr %38, align 8, !tbaa !41
  %40 = sext i32 %37 to i64
  %41 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %40) #3
  %42 = load i32, ptr %41, align 4, !tbaa !40
  %43 = add nsw i32 %42, -1
  %44 = sitofp i32 %43 to double
  %45 = fmul double %20, %44
  %46 = tail call noundef double @_ZSt3absd(double noundef %39)
  %47 = fcmp oge double %46, %25
  %48 = select i1 %47, ptr @.str.87, ptr @.str.10
  %49 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.86, i32 noundef %37, i32 noundef %42, double noundef %45, double noundef %39, ptr noundef nonnull %48)
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %50 = icmp slt i64 %indvars.iv.next, %34
  br i1 %50, label %.lr.ph, label %._crit_edge, !llvm.loop !44

.loopexit:                                        ; preds = %._crit_edge, %16, %12
  %indvars.iv.next47 = add nuw nsw i64 %indvars.iv46, 1
  %51 = load i32, ptr %2, align 8, !tbaa !5
  %52 = sext i32 %51 to i64
  %.not.not = icmp slt i64 %indvars.iv46, %52
  br i1 %.not.not, label %12, label %._crit_edge44, !llvm.loop !45
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3absd(double noundef) local_unnamed_addr #2

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 200}
!6 = !{!"_ZTS7HFactor", !7, i64 0, !7, i64 8, !10, i64 16, !11, i64 24, !11, i64 48, !11, i64 72, !16, i64 96, !10, i64 184, !10, i64 188, !10, i64 192, !10, i64 196, !10, i64 200, !10, i64 204, !10, i64 208, !7, i64 216, !17, i64 224, !15, i64 232, !15, i64 240, !15, i64 248, !15, i64 256, !7, i64 264, !7, i64 272, !10, i64 280, !7, i64 288, !22, i64 296, !28, i64 304, !17, i64 400, !17, i64 401, !10, i64 404, !10, i64 408, !15, i64 416, !10, i64 424, !11, i64 432, !31, i64 456, !11, i64 480, !11, i64 504, !11, i64 528, !31, i64 552, !11, i64 576, !11, i64 600, !11, i64 624, !11, i64 648, !11, i64 672, !11, i64 696, !11, i64 720, !31, i64 744, !31, i64 768, !11, i64 792, !11, i64 816, !11, i64 840, !11, i64 864, !11, i64 888, !11, i64 912, !35, i64 936, !31, i64 960, !11, i64 984, !11, i64 1008, !11, i64 1032, !11, i64 1056, !11, i64 1080, !11, i64 1104, !11, i64 1128, !11, i64 1152, !11, i64 1176, !11, i64 1200, !31, i64 1224, !11, i64 1248, !11, i64 1272, !31, i64 1296, !11, i64 1320, !11, i64 1344, !31, i64 1368, !10, i64 1392, !10, i64 1396, !11, i64 1400, !11, i64 1424, !11, i64 1448, !31, i64 1472, !11, i64 1496, !11, i64 1520, !11, i64 1544, !11, i64 1568, !31, i64 1592, !31, i64 1616, !11, i64 1640, !11, i64 1664, !11, i64 1688, !31, i64 1712, !39, i64 1736}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_ZTSSt6vectorIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!"_ZTS12RefactorInfo", !17, i64 0, !11, i64 8, !11, i64 32, !18, i64 56, !7, i64 80}
!17 = !{!"bool", !8, i64 0}
!18 = !{!"_ZTSSt6vectorIaSaIaEE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!22 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !24, i64 0}
!24 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !26, i64 0}
!26 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !27, i64 0}
!27 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !15, i64 0}
!28 = !{!"_ZTS15HighsLogOptions", !15, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !15, i64 32, !15, i64 40, !29, i64 48, !15, i64 80, !17, i64 88}
!29 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !30, i64 0, !15, i64 24}
!30 = !{!"_ZTSSt14_Function_base", !8, i64 0, !15, i64 16}
!31 = !{!"_ZTSSt6vectorIdSaIdEE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!35 = !{!"_ZTSSt6vectorIcSaIcEE", !36, i64 0}
!36 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !15, i64 0, !15, i64 8, !15, i64 16}
!39 = !{!"_ZTS11HVectorBaseIdE", !10, i64 0, !10, i64 4, !11, i64 8, !31, i64 32, !7, i64 56, !35, i64 64, !11, i64 88, !15, i64 112, !17, i64 120, !10, i64 124, !11, i64 128, !31, i64 152}
!40 = !{!10, !10, i64 0}
!41 = !{!7, !7, i64 0}
!42 = distinct !{!42, !43}
!43 = !{!"llvm.loop.mustprogress"}
!44 = distinct !{!44, !43}
!45 = distinct !{!45, !43}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass