; LLVM IR from ARM-software/Arm-2D :: Library/Source/arm_2d.ll_ (arm_2d_rgb32_sw_tile_copy_with_colour_keying_and_only)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.49 }
%struct.anon.49 = type { ptr, %struct.anon.50, %struct.anon.51, i16, i16, i16, i16, ptr, %union.anon.52 }
%struct.anon.50 = type { ptr, ptr }
%struct.anon.51 = type { ptr, ptr }
%union.anon.52 = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.86, %struct.anon.87, %union.anon.88, %struct.anon.90, %struct.anon.91, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon, i64 }
%struct.anon = type { ptr, ptr, %struct.anon.0, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.0 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.1 }
%struct.anon.1 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.86 = type { ptr, ptr }
%struct.anon.87 = type { ptr }
%union.anon.88 = type { %struct.anon.89 }
%struct.anon.89 = type { i32 }
%struct.anon.90 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.24, %union.anon.33, %union.anon.36 }
%union.anon.24 = type { %struct.anon.25 }
%struct.anon.25 = type { i8, %union.arm_2d_color_info_t, %union.anon.26 }
%union.arm_2d_color_info_t = type { %struct.anon.3 }
%struct.anon.3 = type { i8 }
%union.anon.26 = type { i16 }
%union.anon.33 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.34, %union.anon.35 }
%union.anon.34 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.35 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.36 = type { ptr }
%struct.anon.91 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.78, %struct.anon.79 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.78 = type { i32 }
%struct.anon.79 = type { %struct.arm_2d_location_t, %struct.anon.80 }
%struct.anon.80 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%struct.__arm_2d_sub_task_t = type { %struct.anon.41 }
%struct.anon.41 = type <{ ptr, ptr, i8, i32, [3 x i8], %union.anon.42 }>
%union.anon.42 = type { %struct.__arm_2d_param_copy_orig_msk_t }
%struct.__arm_2d_param_copy_orig_msk_t = type { %union.anon.45, %struct.__arm_2d_tile_param_t, %struct.__arm_2d_tile_param_t }
%union.anon.45 = type { %struct.__arm_2d_param_copy_orig_t }
%struct.__arm_2d_param_copy_orig_t = type { %union.anon.44, %struct.__arm_2d_tile_param_t }
%union.anon.44 = type { %struct.__arm_2d_param_copy_t }
%struct.__arm_2d_param_copy_t = type { %struct.__arm_2d_tile_param_t, %struct.__arm_2d_tile_param_t, %struct.arm_2d_size_t }
%struct.__arm_2d_tile_param_t = type { ptr, i32, i16, %union.arm_2d_color_info_t, i8, %struct.arm_2d_region_t, %struct.arm_2d_region_t, ptr }
%struct.arm_2d_op_cp_cl_key_t = type { %struct.arm_2d_op_core_t, %struct.anon.97, %struct.anon.98, i32, %union.anon.99 }
%struct.anon.97 = type { ptr, ptr }
%struct.anon.98 = type { ptr }
%union.anon.99 = type { i32 }
%struct.anon.2 = type { %union.arm_2d_color_info_t, %union.anon, i8, i8, %union.anon.6, %union.anon.10 }
%union.anon = type { %struct.anon.5 }
%struct.anon.5 = type { i8 }
%union.anon.6 = type { %struct.anon.7 }
%struct.anon.7 = type { i8, i8 }
%union.anon.10 = type { [2 x ptr] }

@ARM_2D_CTRL = external dso_local global %struct.__arm_2d_op_control, section ".bss.noinit", align 8
@.str.34 = external hidden unnamed_addr constant [131 x i8], align 1
@.str.35 = external hidden unnamed_addr constant [61 x i8], align 1
@__PRETTY_FUNCTION__.__arm_2d_rgb32_sw_tile_copy_with_colour_keying_and_only = external hidden unnamed_addr constant [92 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @__arm_2d_impl_rgb32_cl_key_copy(ptr noalias noundef, i16 noundef signext, ptr noalias noundef, i16 noundef signext, ptr noalias noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @__arm_2d_rgb32_sw_tile_copy_with_colour_keying_and_only(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %4 = load ptr, ptr %2, align 8, !tbaa !5
  %5 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %4, i32 0, i32 0
  %6 = getelementptr inbounds %struct.anon.41, ptr %5, i32 0, i32 1
  %7 = load ptr, ptr %6, align 8, !tbaa !9
  store ptr %7, ptr %3, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = icmp eq ptr null, %8
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store ptr getelementptr inbounds (%struct.anon.49, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %3, align 8, !tbaa !5
  br label %11

11:                                               ; preds = %10, %1
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.arm_2d_op_cp_cl_key_t, ptr %12, i32 0, i32 0
  %14 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %13, i32 0, i32 0
  %15 = getelementptr inbounds %struct.anon, ptr %14, i32 0, i32 1
  %16 = load ptr, ptr %15, align 8, !tbaa !12
  %17 = getelementptr inbounds %struct.anon.2, ptr %16, i32 0, i32 0
  %18 = load i8, ptr %17, align 8
  %19 = lshr i8 %18, 1
  %20 = and i8 %19, 7
  %21 = zext i8 %20 to i32
  %22 = icmp eq i32 5, %21
  br i1 %22, label %23, label %24

23:                                               ; preds = %11
  br label %25

24:                                               ; preds = %11
  call void @__assert_fail(ptr noundef @.str.35, ptr noundef @.str.34, i32 noundef 143, ptr noundef @__PRETTY_FUNCTION__.__arm_2d_rgb32_sw_tile_copy_with_colour_keying_and_only) #4
  unreachable

25:                                               ; preds = %23
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %26, i32 0, i32 0
  %28 = getelementptr inbounds %struct.anon.41, ptr %27, i32 0, i32 5
  %29 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %28, i32 0, i32 0
  %30 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %29, i32 0, i32 0
  %31 = load ptr, ptr %30, align 8, !tbaa !22
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %32, i32 0, i32 0
  %34 = getelementptr inbounds %struct.anon.41, ptr %33, i32 0, i32 5
  %35 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %34, i32 0, i32 0
  %36 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %35, i32 0, i32 2
  %37 = load i16, ptr %36, align 4, !tbaa !22
  %38 = load ptr, ptr %2, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %38, i32 0, i32 0
  %40 = getelementptr inbounds %struct.anon.41, ptr %39, i32 0, i32 5
  %41 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %40, i32 0, i32 1
  %42 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %41, i32 0, i32 0
  %43 = load ptr, ptr %42, align 8, !tbaa !22
  %44 = load ptr, ptr %2, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %struct.anon.41, ptr %45, i32 0, i32 5
  %47 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %46, i32 0, i32 1
  %48 = getelementptr inbounds %struct.__arm_2d_tile_param_t, ptr %47, i32 0, i32 2
  %49 = load i16, ptr %48, align 4, !tbaa !22
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.__arm_2d_sub_task_t, ptr %50, i32 0, i32 0
  %52 = getelementptr inbounds %struct.anon.41, ptr %51, i32 0, i32 5
  %53 = getelementptr inbounds %struct.__arm_2d_param_copy_t, ptr %52, i32 0, i32 2
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.arm_2d_op_cp_cl_key_t, ptr %54, i32 0, i32 4
  %56 = load i32, ptr %55, align 4, !tbaa !22
  call void @__arm_2d_impl_rgb32_cl_key_copy(ptr noundef %31, i16 noundef signext %37, ptr noundef %43, i16 noundef signext %49, ptr noundef %53, i32 noundef %56)
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret i32 0
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"__arm_2d_sub_task_t", !11, i64 0}
!11 = !{!"", !6, i64 0, !6, i64 8, !7, i64 16, !7, i64 17, !7, i64 24}
!12 = !{!13, !6, i64 8}
!13 = !{!"arm_2d_op_cp_cl_key_t", !14, i64 0, !19, i64 48, !20, i64 64, !21, i64 72, !7, i64 76}
!14 = !{!"arm_2d_op_core_t", !15, i64 0, !18, i64 40}
!15 = !{!"", !6, i64 0, !6, i64 8, !16, i64 16, !7, i64 17, !7, i64 18, !17, i64 24}
!16 = !{!"", !7, i64 0}
!17 = !{!"arm_2d_op_evt_t", !6, i64 0, !6, i64 8}
!18 = !{!"long", !7, i64 0}
!19 = !{!"", !6, i64 0, !6, i64 8}
!20 = !{!"", !6, i64 0}
!21 = !{!"int", !7, i64 0}
!22 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.49 }
%struct.anon.49 = type { ptr, %struct.anon.50, %struct.anon.51, i16, i16, i16, i16, ptr, %union.anon.52 }
%struct.anon.50 = type { ptr, ptr }
%struct.anon.51 = type { ptr, ptr }
%union.anon.52 = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.86, %struct.anon.87, %union.anon.88, %struct.anon.90, %struct.anon.91, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon, i64 }
%struct.anon = type { ptr, ptr, %struct.anon.0, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.0 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.1 }
%struct.anon.1 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.86 = type { ptr, ptr }
%struct.anon.87 = type { ptr }
%union.anon.88 = type { %struct.anon.89 }
%struct.anon.89 = type { i32 }
%struct.anon.90 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.24, %union.anon.33, %union.anon.36 }
%union.anon.24 = type { %struct.anon.25 }
%struct.anon.25 = type { i8, %union.arm_2d_color_info_t, %union.anon.26 }
%union.arm_2d_color_info_t = type { %struct.anon.3 }
%struct.anon.3 = type { i8 }
%union.anon.26 = type { i16 }
%union.anon.33 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.34, %union.anon.35 }
%union.anon.34 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.35 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.36 = type { ptr }
%struct.anon.91 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.78, %struct.anon.79 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.78 = type { i32 }
%struct.anon.79 = type { %struct.arm_2d_location_t, %struct.anon.80 }
%struct.anon.80 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }

@ARM_2D_CTRL = external dso_local local_unnamed_addr global %struct.__arm_2d_op_control, section ".bss.noinit", align 8
@.str.34 = external hidden unnamed_addr constant [131 x i8], align 1
@.str.35 = external hidden unnamed_addr constant [61 x i8], align 1
@__PRETTY_FUNCTION__.__arm_2d_rgb32_sw_tile_copy_with_colour_keying_and_only = external hidden unnamed_addr constant [92 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @__arm_2d_impl_rgb32_cl_key_copy(ptr noalias noundef, i16 noundef signext, ptr noalias noundef, i16 noundef signext, ptr noalias noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @__arm_2d_rgb32_sw_tile_copy_with_colour_keying_and_only(ptr noundef %0) local_unnamed_addr #1 {
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %4 = icmp eq ptr %3, null
  %spec.store.select = select i1 %4, ptr getelementptr inbounds (i8, ptr @ARM_2D_CTRL, i64 56), ptr %3
  %5 = getelementptr inbounds i8, ptr %spec.store.select, i64 8
  %6 = load ptr, ptr %5, align 8, !tbaa !11
  %7 = load i8, ptr %6, align 8
  %8 = and i8 %7, 14
  %9 = icmp eq i8 %8, 10
  br i1 %9, label %11, label %10

10:                                               ; preds = %1
  tail call void @__assert_fail(ptr noundef nonnull @.str.35, ptr noundef nonnull @.str.34, i32 noundef 143, ptr noundef nonnull @__PRETTY_FUNCTION__.__arm_2d_rgb32_sw_tile_copy_with_colour_keying_and_only) #2
  unreachable

11:                                               ; preds = %1
  %12 = getelementptr inbounds i8, ptr %0, i64 24
  %13 = load ptr, ptr %12, align 8, !tbaa !21
  %14 = getelementptr inbounds i8, ptr %0, i64 36
  %15 = load i16, ptr %14, align 4, !tbaa !21
  %16 = getelementptr inbounds i8, ptr %0, i64 64
  %17 = load ptr, ptr %16, align 8, !tbaa !21
  %18 = getelementptr inbounds i8, ptr %0, i64 76
  %19 = load i16, ptr %18, align 4, !tbaa !21
  %20 = getelementptr inbounds i8, ptr %0, i64 104
  %21 = getelementptr inbounds i8, ptr %spec.store.select, i64 76
  %22 = load i32, ptr %21, align 4, !tbaa !21
  tail call void @__arm_2d_impl_rgb32_cl_key_copy(ptr noundef %13, i16 noundef signext %15, ptr noundef %17, i16 noundef signext %19, ptr noundef nonnull %20, i32 noundef %22)
  ret i32 0
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"__arm_2d_sub_task_t", !7, i64 0}
!7 = !{!"", !8, i64 0, !8, i64 8, !9, i64 16, !9, i64 17, !9, i64 24}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"arm_2d_op_cp_cl_key_t", !13, i64 0, !18, i64 48, !19, i64 64, !20, i64 72, !9, i64 76}
!13 = !{!"arm_2d_op_core_t", !14, i64 0, !17, i64 40}
!14 = !{!"", !8, i64 0, !8, i64 8, !15, i64 16, !9, i64 17, !9, i64 18, !16, i64 24}
!15 = !{!"", !9, i64 0}
!16 = !{!"arm_2d_op_evt_t", !8, i64 0, !8, i64 8}
!17 = !{!"long", !9, i64 0}
!18 = !{!"", !8, i64 0, !8, i64 8}
!19 = !{!"", !8, i64 0}
!20 = !{!"int", !9, i64 0}
!21 = !{!9, !9, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass