; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code7compareERK3RegS2_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code11allocateRegEj(ptr dead_on_unwind noalias writable sret(%class.Reg) align 8, ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code7compareERK3RegS2_(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  %11 = alloca %class.Reg, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %14 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15)
  store i32 %16, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 14, ptr %9, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  store i8 1, ptr %10, align 1, !tbaa !13
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17)
  %19 = load i32, ptr %8, align 4, !tbaa !9
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %21, label %24

21:                                               ; preds = %3
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %22)
  store i32 %23, ptr %8, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %21, %3
  %25 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %14, i32 noundef 128)
  br i1 %25, label %26, label %46

26:                                               ; preds = %24
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %28)
  %30 = icmp slt i32 %27, %29
  br i1 %30, label %36, label %31

31:                                               ; preds = %26
  %32 = load i32, ptr %8, align 4, !tbaa !9
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %33)
  %35 = icmp slt i32 %32, %34
  br i1 %35, label %36, label %46

36:                                               ; preds = %31, %26
  call void @llvm.lifetime.start.p0(i64 24, ptr %11) #3
  call void @_ZN4Code11allocateRegEj(ptr dead_on_unwind writable sret(%class.Reg) align 8 %11, ptr noundef nonnull align 8 dereferenceable(200) %14, i32 noundef 1)
  %37 = invoke noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %11, i32 noundef 0)
          to label %38 unwind label %42

38:                                               ; preds = %36
  store i8 %37, ptr %10, align 1, !tbaa !13
  %39 = load i8, ptr %10, align 1, !tbaa !13
  invoke void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200) %14, i8 noundef zeroext %39, i1 noundef zeroext true)
          to label %40 unwind label %42

40:                                               ; preds = %38
  invoke void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200) %14, ptr noundef nonnull align 8 dereferenceable(24) %11)
          to label %41 unwind label %42

41:                                               ; preds = %40
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #3
  br label %46

42:                                               ; preds = %40, %38, %36
  %43 = landingpad { ptr, i32 }
          cleanup
  %44 = extractvalue { ptr, i32 } %43, 0
  store ptr %44, ptr %12, align 8
  %45 = extractvalue { ptr, i32 } %43, 1
  store i32 %45, ptr %13, align 4
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %91

46:                                               ; preds = %41, %31, %24
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %59, %46
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = icmp slt i32 %48, %49
  br i1 %50, label %51, label %62

51:                                               ; preds = %47
  %52 = load i32, ptr %9, align 4, !tbaa !11
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = load i32, ptr %7, align 4, !tbaa !9
  %55 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %53, i32 noundef %54)
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = load i32, ptr %7, align 4, !tbaa !9
  %58 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %56, i32 noundef %57)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %14, i32 noundef %52, i8 noundef zeroext %55, i8 noundef zeroext %58)
  store i32 15, ptr %9, align 4, !tbaa !11
  br label %59

59:                                               ; preds = %51
  %60 = load i32, ptr %7, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %7, align 4, !tbaa !9
  br label %47, !llvm.loop !14

62:                                               ; preds = %47
  br label %63

63:                                               ; preds = %68, %62
  %64 = load i32, ptr %7, align 4, !tbaa !9
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %65)
  %67 = icmp slt i32 %64, %66
  br i1 %67, label %68, label %76

68:                                               ; preds = %63
  %69 = load i32, ptr %9, align 4, !tbaa !11
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = load i32, ptr %7, align 4, !tbaa !9
  %72 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %70, i32 noundef %71)
  %73 = load i8, ptr %10, align 1, !tbaa !13
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %14, i32 noundef %69, i8 noundef zeroext %72, i8 noundef zeroext %73)
  store i32 15, ptr %9, align 4, !tbaa !11
  %74 = load i32, ptr %7, align 4, !tbaa !9
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %7, align 4, !tbaa !9
  br label %63, !llvm.loop !16

76:                                               ; preds = %63
  br label %77

77:                                               ; preds = %82, %76
  %78 = load i32, ptr %7, align 4, !tbaa !9
  %79 = load ptr, ptr %6, align 8, !tbaa !5
  %80 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %79)
  %81 = icmp slt i32 %78, %80
  br i1 %81, label %82, label %90

82:                                               ; preds = %77
  %83 = load i32, ptr %9, align 4, !tbaa !11
  %84 = load i8, ptr %10, align 1, !tbaa !13
  %85 = load ptr, ptr %6, align 8, !tbaa !5
  %86 = load i32, ptr %7, align 4, !tbaa !9
  %87 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %85, i32 noundef %86)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %14, i32 noundef %83, i8 noundef zeroext %84, i8 noundef zeroext %87)
  store i32 15, ptr %9, align 4, !tbaa !11
  %88 = load i32, ptr %7, align 4, !tbaa !9
  %89 = add nsw i32 %88, 1
  store i32 %89, ptr %7, align 4, !tbaa !9
  br label %77, !llvm.loop !17

90:                                               ; preds = %77
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void

91:                                               ; preds = %42
  %92 = load ptr, ptr %12, align 8
  %93 = load i32, ptr %13, align 4
  %94 = insertvalue { ptr, i32 } poison, ptr %92, 0
  %95 = insertvalue { ptr, i32 } %94, i32 %93, 1
  resume { ptr, i32 } %95
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i1 noundef zeroext) #2 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTSN4Insn4TypeE", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code11allocateRegEj(ptr dead_on_unwind noalias writable sret(%class.Reg) align 8, ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code7compareERK3RegS2_(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca %class.Reg, align 8
  %5 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %6 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %7 = icmp slt i32 %6, %5
  br i1 %7, label %8, label %10

8:                                                ; preds = %3
  %9 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  br label %10

10:                                               ; preds = %8, %3
  %.033 = phi i32 [ %9, %8 ], [ %5, %3 ]
  %11 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 128)
  br i1 %11, label %12, label %25

12:                                               ; preds = %10
  %13 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %14 = icmp slt i32 %.033, %13
  br i1 %14, label %18, label %15

15:                                               ; preds = %12
  %16 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %17 = icmp slt i32 %.033, %16
  br i1 %17, label %18, label %25

18:                                               ; preds = %15, %12
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
  call void @_ZN4Code11allocateRegEj(ptr dead_on_unwind nonnull writable sret(%class.Reg) align 8 %4, ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 1)
  %19 = invoke noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %4, i32 noundef 0)
          to label %20 unwind label %23

20:                                               ; preds = %18
  invoke void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %19, i1 noundef zeroext true)
          to label %21 unwind label %23

21:                                               ; preds = %20
  invoke void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %4)
          to label %22 unwind label %23

22:                                               ; preds = %21
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
  br label %25

23:                                               ; preds = %21, %20, %18
  %24 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
  resume { ptr, i32 } %24

25:                                               ; preds = %22, %15, %10
  %.034 = phi i8 [ %19, %22 ], [ 1, %15 ], [ 1, %10 ]
  %26 = icmp sgt i32 %.033, 0
  br i1 %26, label %.lr.ph.preheader, label %.preheader39

.lr.ph.preheader:                                 ; preds = %25
  %27 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 0)
  %28 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 0)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 14, i8 noundef zeroext %27, i8 noundef zeroext %28)
  %exitcond.peel.not = icmp eq i32 %.033, 1
  br i1 %exitcond.peel.not, label %.preheader39, label %.lr.ph

.preheader39:                                     ; preds = %.lr.ph, %.lr.ph.preheader, %25
  %.035.lcssa = phi i32 [ 14, %25 ], [ 15, %.lr.ph.preheader ], [ 15, %.lr.ph ]
  %.0.lcssa = phi i32 [ 0, %25 ], [ 1, %.lr.ph.preheader ], [ %.033, %.lr.ph ]
  %29 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %30 = icmp slt i32 %.0.lcssa, %29
  br i1 %30, label %.lr.ph45.preheader, label %.preheader

.lr.ph45.preheader:                               ; preds = %.preheader39
  %31 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.0.lcssa)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %.035.lcssa, i8 noundef zeroext %31, i8 noundef zeroext %.034)
  %32 = add nuw nsw i32 %.0.lcssa, 1
  %33 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %.lr.ph45, label %.preheader

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.041 = phi i32 [ %37, %.lr.ph ], [ 1, %.lr.ph.preheader ]
  %35 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.041)
  %36 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.041)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 15, i8 noundef zeroext %35, i8 noundef zeroext %36)
  %37 = add nuw nsw i32 %.041, 1
  %exitcond.not = icmp eq i32 %37, %.033
  br i1 %exitcond.not, label %.preheader39, label %.lr.ph, !llvm.loop !5

.preheader:                                       ; preds = %.lr.ph45, %.lr.ph45.preheader, %.preheader39
  %.136.lcssa = phi i32 [ %.035.lcssa, %.preheader39 ], [ 15, %.lr.ph45.preheader ], [ 15, %.lr.ph45 ]
  %.1.lcssa = phi i32 [ %.0.lcssa, %.preheader39 ], [ %32, %.lr.ph45.preheader ], [ %45, %.lr.ph45 ]
  %38 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %39 = icmp slt i32 %.1.lcssa, %38
  br i1 %39, label %.lr.ph50.preheader, label %._crit_edge

.lr.ph50.preheader:                               ; preds = %.preheader
  %40 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.1.lcssa)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %.136.lcssa, i8 noundef zeroext %.034, i8 noundef zeroext %40)
  %41 = add nuw nsw i32 %.1.lcssa, 1
  %42 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %43 = icmp slt i32 %41, %42
  br i1 %43, label %.lr.ph50, label %._crit_edge

.lr.ph45:                                         ; preds = %.lr.ph45.preheader, %.lr.ph45
  %.144 = phi i32 [ %45, %.lr.ph45 ], [ %32, %.lr.ph45.preheader ]
  %44 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.144)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 15, i8 noundef zeroext %44, i8 noundef zeroext %.034)
  %45 = add nuw nsw i32 %.144, 1
  %46 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %47 = icmp slt i32 %45, %46
  br i1 %47, label %.lr.ph45, label %.preheader, !llvm.loop !8

.lr.ph50:                                         ; preds = %.lr.ph50.preheader, %.lr.ph50
  %.249 = phi i32 [ %49, %.lr.ph50 ], [ %41, %.lr.ph50.preheader ]
  %48 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.249)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 15, i8 noundef zeroext %.034, i8 noundef zeroext %48)
  %49 = add nuw nsw i32 %.249, 1
  %50 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %51 = icmp slt i32 %49, %50
  br i1 %51, label %.lr.ph50, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph50, %.lr.ph50.preheader, %.preheader
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!"llvm.loop.peeled.count", i32 1}
!8 = distinct !{!8, !6, !7}
!9 = distinct !{!9, !6, !7}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass