; LLVM IR from chdb-io/chdb :: base/poco/Foundation/src/Unicode.ll (ZN4Poco7Unicode7toLowerEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ucd_record = type { i8, i8, i8, i8, i32 }

@_pcre_ucd_records = external global [0 x %struct.ucd_record], align 4
@_pcre_ucd_stage2 = external constant [0 x i16], align 2
@_pcre_ucd_stage1 = external constant [0 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN4Poco7Unicode7toLowerEi(i32 noundef %0) #0 align 2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  %4 = load i32, ptr %3, align 4, !tbaa !5
  %5 = call noundef zeroext i1 @_ZN4Poco7Unicode7isUpperEi(i32 noundef %4)
  br i1 %5, label %6, label %27

6:                                                ; preds = %1
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = sdiv i32 %8, 128
  %10 = sext i32 %9 to i64
  %11 = getelementptr inbounds [0 x i8], ptr @_pcre_ucd_stage1, i64 0, i64 %10
  %12 = load i8, ptr %11, align 1, !tbaa !9
  %13 = zext i8 %12 to i32
  %14 = mul nsw i32 %13, 128
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = srem i32 %15, 128
  %17 = add nsw i32 %14, %16
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [0 x i16], ptr @_pcre_ucd_stage2, i64 0, i64 %18
  %20 = load i16, ptr %19, align 2, !tbaa !10
  %21 = zext i16 %20 to i32
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds %struct.ucd_record, ptr @_pcre_ucd_records, i64 %22
  %24 = getelementptr inbounds %struct.ucd_record, ptr %23, i32 0, i32 4
  %25 = load i32, ptr %24, align 4, !tbaa !12
  %26 = add nsw i32 %7, %25
  store i32 %26, ptr %2, align 4
  br label %29

27:                                               ; preds = %1
  %28 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %28, ptr %2, align 4
  br label %29

29:                                               ; preds = %27, %6
  %30 = load i32, ptr %2, align 4
  ret i32 %30
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Poco7Unicode7isUpperEi(i32 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !6, i64 4}
!13 = !{!"_ZTS10ucd_record", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !6, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ucd_record = type { i8, i8, i8, i8, i32 }

@_pcre_ucd_records = external local_unnamed_addr global [0 x %struct.ucd_record], align 4
@_pcre_ucd_stage2 = external local_unnamed_addr constant [0 x i16], align 2
@_pcre_ucd_stage1 = external local_unnamed_addr constant [0 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN4Poco7Unicode7toLowerEi(i32 noundef %0) local_unnamed_addr #0 align 2 {
  %2 = tail call noundef zeroext i1 @_ZN4Poco7Unicode7isUpperEi(i32 noundef %0)
  br i1 %2, label %3, label %19

3:                                                ; preds = %1
  %4 = sdiv i32 %0, 128
  %5 = sext i32 %4 to i64
  %6 = getelementptr inbounds [0 x i8], ptr @_pcre_ucd_stage1, i64 0, i64 %5
  %7 = load i8, ptr %6, align 1, !tbaa !5
  %8 = zext i8 %7 to i32
  %9 = shl nuw nsw i32 %8, 7
  %10 = srem i32 %0, 128
  %11 = add nsw i32 %9, %10
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [0 x i16], ptr @_pcre_ucd_stage2, i64 0, i64 %12
  %14 = load i16, ptr %13, align 2, !tbaa !8
  %15 = zext i16 %14 to i64
  %16 = getelementptr inbounds %struct.ucd_record, ptr @_pcre_ucd_records, i64 %15, i32 4
  %17 = load i32, ptr %16, align 4, !tbaa !10
  %18 = add nsw i32 %17, %0
  br label %19

19:                                               ; preds = %1, %3
  %.0 = phi i32 [ %18, %3 ], [ %0, %1 ]
  ret i32 %.0
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN4Poco7Unicode7isUpperEi(i32 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"short", !6, i64 0}
!10 = !{!11, !12, i64 4}
!11 = !{!"_ZTS10ucd_record", !6, i64 0, !6, i64 1, !6, i64 2, !6, i64 3, !12, i64 4}
!12 = !{!"int", !6, i64 0}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass