; LLVM IR from ERGO-Code/HiGHS :: src/lp_data/HighsInterface.ll (ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HVectorBase = type { i32, i32, %"class.std::vector.13", %"class.std::vector", double, %"class.std::vector.103", %"class.std::vector.13", ptr, i8, i32, %"class.std::vector.13", %"class.std::vector" }
%"class.std::vector.103" = type { %"struct.std::_Vector_base.104" }
%"struct.std::_Vector_base.104" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Highs = type { ptr, %struct.HighsSolution, %struct.HighsBasis, %struct.ICrashInfo, %class.HighsModel, %"class.std::vector.33", %class.HighsModel, %class.HighsTimer, %struct.HighsCallback, %class.HighsOptions, %class.HighsInfo, %struct.HighsRanging, %class.HighsIis, %"class.std::vector.57", i32, i32, i8, double, %"class.std::vector", %"class.std::vector", %class.HighsSparseMatrix, %class.HEkk, %struct.HighsPresolveLog, i32, i8, i32, i8, %class.PresolveComponent }
%struct.HighsSolution = type { i8, i8, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector" }
%struct.HighsBasis = type { i8, i8, i8, i8, i32, i32, %"class.std::__cxx11::basic_string", %"class.std::vector.3", %"class.std::vector.3" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<HighsBasisStatus, std::allocator<HighsBasisStatus>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsBasisStatus, std::allocator<HighsBasisStatus>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsBasisStatus, std::allocator<HighsBasisStatus>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsBasisStatus, std::allocator<HighsBasisStatus>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.ICrashInfo = type { i32, double, double, double, double, double, %"class.std::vector.8", %"class.std::vector", double }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<ICrashIterationDetails, std::allocator<ICrashIterationDetails>>::_Vector_impl" }
%"struct.std::_Vector_base<ICrashIterationDetails, std::allocator<ICrashIterationDetails>>::_Vector_impl" = type { %"struct.std::_Vector_base<ICrashIterationDetails, std::allocator<ICrashIterationDetails>>::_Vector_impl_data" }
%"struct.std::_Vector_base<ICrashIterationDetails, std::allocator<ICrashIterationDetails>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.33" = type { %"struct.std::_Vector_base.34" }
%"struct.std::_Vector_base.34" = type { %"struct.std::_Vector_base<HighsLinearObjective, std::allocator<HighsLinearObjective>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsLinearObjective, std::allocator<HighsLinearObjective>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsLinearObjective, std::allocator<HighsLinearObjective>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsLinearObjective, std::allocator<HighsLinearObjective>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HighsModel = type { %class.HighsLp, %class.HighsHessian }
%class.HighsLp = type { i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %class.HighsSparseMatrix, i32, double, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i32, %"class.std::vector.18", %"class.std::vector.18", %"class.std::vector.23", %struct.HighsNameHash, %struct.HighsNameHash, i32, i32, %struct.HighsScale, i8, i8, i32, i8, %struct.HighsLpMods }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsNameHash = type { %"class.std::unordered_map" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%struct.HighsScale = type { i32, i8, i32, i32, double, %"class.std::vector", %"class.std::vector" }
%struct.HighsLpMods = type { %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector", %"class.std::vector.23", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector", %"class.std::vector", %"class.std::vector" }
%class.HighsHessian = type { i32, i32, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector" }
%class.HighsTimer = type <{ ptr, double, i32, [4 x i8], %"class.std::vector.13", %"class.std::vector", %"class.std::vector", %"class.std::vector.18", i32, i32, i32, [4 x i8] }>
%struct.HighsCallback = type { %"class.std::function", ptr, ptr, %"class.std::vector.38", %struct.HighsCallbackDataOut, %struct.HighsCallbackDataIn }
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%"class.std::vector.38" = type { %"struct.std::_Bvector_base" }
%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl" = type { %"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" }
%"struct.std::_Bvector_base<std::allocator<bool>>::_Bvector_impl_data" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", ptr }
%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] }
%"struct.std::_Bit_iterator_base.base" = type <{ ptr, i32 }>
%struct.HighsCallbackDataOut = type { i32, double, i32, i32, i32, double, i64, i64, double, double, double, ptr, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }
%struct.HighsCallbackDataIn = type { i32, ptr }
%class.HighsOptions = type <{ %struct.HighsOptionsStruct, %"class.std::vector.42", i32, [4 x i8] }>
%struct.HighsOptionsStruct = type { ptr, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", double, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, %"class.std::__cxx11::basic_string", double, double, double, double, double, double, double, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %"class.std::__cxx11::basic_string", i8, i8, i8, i32, i32, %"class.std::__cxx11::basic_string", i8, i8, i8, i32, i8, i8, i32, i32, double, i32, i32, i32, i8, i32, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, double, double, double, double, double, double, double, double, double, double, double, i8, i8, i8, i8, i32, double, i8, i8, %"class.std::__cxx11::basic_string", double, i32, i32, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, double, double, double, double, i8, i8, %"class.std::__cxx11::basic_string", i8, i32, %struct.HighsLogOptions }
%struct.HighsLogOptions = type <{ ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::function", ptr, i8, [7 x i8] }>
%"class.std::vector.42" = type { %"struct.std::_Vector_base.43" }
%"struct.std::_Vector_base.43" = type { %"struct.std::_Vector_base<OptionRecord *, std::allocator<OptionRecord *>>::_Vector_impl" }
%"struct.std::_Vector_base<OptionRecord *, std::allocator<OptionRecord *>>::_Vector_impl" = type { %"struct.std::_Vector_base<OptionRecord *, std::allocator<OptionRecord *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<OptionRecord *, std::allocator<OptionRecord *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HighsInfo = type { ptr, %struct.HighsInfoStruct, %"class.std::vector.47" }
%struct.HighsInfoStruct = type { i8, i64, i32, i32, i32, i32, i32, i32, i32, i32, double, double, double, double, i32, double, double, i32, double, double, double, double, double }
%"class.std::vector.47" = type { %"struct.std::_Vector_base.48" }
%"struct.std::_Vector_base.48" = type { %"struct.std::_Vector_base<InfoRecord *, std::allocator<InfoRecord *>>::_Vector_impl" }
%"struct.std::_Vector_base<InfoRecord *, std::allocator<InfoRecord *>>::_Vector_impl" = type { %"struct.std::_Vector_base<InfoRecord *, std::allocator<InfoRecord *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<InfoRecord *, std::allocator<InfoRecord *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsRanging = type { i8, %struct.HighsRangingRecord, %struct.HighsRangingRecord, %struct.HighsRangingRecord, %struct.HighsRangingRecord, %struct.HighsRangingRecord, %struct.HighsRangingRecord }
%struct.HighsRangingRecord = type { %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13" }
%class.HighsIis = type { i8, i32, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.52" }
%"class.std::vector.52" = type { %"struct.std::_Vector_base.53" }
%"struct.std::_Vector_base.53" = type { %"struct.std::_Vector_base<HighsIisInfo, std::allocator<HighsIisInfo>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsIisInfo, std::allocator<HighsIisInfo>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsIisInfo, std::allocator<HighsIisInfo>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsIisInfo, std::allocator<HighsIisInfo>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.57" = type { %"struct.std::_Vector_base.58" }
%"struct.std::_Vector_base.58" = type { %"struct.std::_Vector_base<HighsObjectiveSolution, std::allocator<HighsObjectiveSolution>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsObjectiveSolution, std::allocator<HighsObjectiveSolution>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsObjectiveSolution, std::allocator<HighsObjectiveSolution>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsObjectiveSolution, std::allocator<HighsObjectiveSolution>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HighsSparseMatrix = type { i32, i32, i32, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector" }
%class.HEkk = type { ptr, ptr, ptr, %class.HighsSimplexAnalysis, %class.HighsLp, %"class.std::__cxx11::basic_string", %struct.HighsSimplexStatus, [3 x i8], %struct.HighsSimplexInfo, i32, %struct.SimplexBasis, %class.HighsHashTable, %class.HighsRandom, %"class.std::vector", %"class.std::vector", i8, %class.HighsSparseMatrix, %class.HighsSparseMatrix, %class.HSimplexNla, %struct.HotStart, double, double, double, i32, i32, i32, i32, i8, i8, i32, i32, i32, %"class.std::vector.13", %"class.std::vector", %struct.HighsRayRecord, %struct.HighsRayRecord, i32, i32, i32, double, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", double, double, double, i32, i32, i8, i32, i8, i8, i8, i8, double, %"class.std::vector.105", %"class.std::vector", %struct.HighsSimplexStats }
%class.HighsSimplexAnalysis = type { ptr, %"class.std::vector.62", %"class.std::vector.62", ptr, i32, i32, i32, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", %struct.HighsLogOptions, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, %"class.std::__cxx11::basic_string", double, double, double, double, double, double, double, double, double, double, double, double, i32, i32, double, double, i32, double, double, i32, double, double, double, double, double, double, double, double, double, double, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8], %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, double, double, i32, double, double, i32, i32, double, double, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.67", %"class.std::unique_ptr", i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, i32, i32, double, double, double, i8, double, double, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, i32, i32, [10 x %"struct.HighsSimplexAnalysis::AnIterOpRec"], i32, i32, [22 x %"struct.HighsSimplexAnalysis::AnIterTraceRec"], [12 x i32], [3 x i32], [4 x i8], %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution }
%"class.std::vector.62" = type { %"struct.std::_Vector_base.63" }
%"struct.std::_Vector_base.63" = type { %"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.67" = type { %"struct.std::_Vector_base.68" }
%"struct.std::_Vector_base.68" = type { %"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl" }
%"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl" = type { %"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::unique_ptr" = type { %"struct.std::__uniq_ptr_data" }
%"struct.std::__uniq_ptr_data" = type { %"class.std::__uniq_ptr_impl" }
%"class.std::__uniq_ptr_impl" = type { %"class.std::tuple" }
%"class.std::tuple" = type { %"struct.std::_Tuple_impl" }
%"struct.std::_Tuple_impl" = type { %"struct.std::_Head_base.73" }
%"struct.std::_Head_base.73" = type { ptr }
%"struct.HighsSimplexAnalysis::AnIterOpRec" = type { double, double, i32, i32, i32, i32, double, i32, %"class.std::__cxx11::basic_string", %struct.HighsValueDistribution }
%"struct.HighsSimplexAnalysis::AnIterTraceRec" = type { double, double, [10 x double], double, i32, i32, i32 }
%struct.HighsValueDistribution = type <{ %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i32, i32, [4 x i8], double, double, %"class.std::vector", %"class.std::vector.13", i32, [4 x i8] }>
%struct.HighsSimplexStatus = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
%struct.HighsSimplexInfo = type <{ %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", i32, i32, i8, i8, [6 x i8], %struct.SimplexBasis, i32, i32, i32, [4 x i8], %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", i32, i32, i32, i32, double, double, double, double, i32, i32, double, double, double, double, double, double, double, double, double, double, i8, [7 x i8], double, double, i32, [4 x i8], double, double, double, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, [4 x i8], double, double, i32, [4 x i8], double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, double, double, double, i32, [4 x i8] }>
%struct.SimplexBasis = type { %"class.std::vector.13", %"class.std::vector.74", %"class.std::vector.74", i64, i32, i32, %"class.std::__cxx11::basic_string" }
%"class.std::vector.74" = type { %"struct.std::_Vector_base.75" }
%"struct.std::_Vector_base.75" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HighsHashTable = type { %"class.std::unique_ptr.79", %"class.std::unique_ptr.87", i64, i64, i64 }
%"class.std::unique_ptr.79" = type { %"struct.std::__uniq_ptr_data.80" }
%"struct.std::__uniq_ptr_data.80" = type { %"class.std::__uniq_ptr_impl.81" }
%"class.std::__uniq_ptr_impl.81" = type { %"class.std::tuple.82" }
%"class.std::tuple.82" = type { %"struct.std::_Tuple_impl.83" }
%"struct.std::_Tuple_impl.83" = type { %"struct.std::_Head_base.86" }
%"struct.std::_Head_base.86" = type { ptr }
%"class.std::unique_ptr.87" = type { %"struct.std::__uniq_ptr_data.88" }
%"struct.std::__uniq_ptr_data.88" = type { %"class.std::__uniq_ptr_impl.89" }
%"class.std::__uniq_ptr_impl.89" = type { %"class.std::tuple.90" }
%"class.std::tuple.90" = type { %"struct.std::_Tuple_impl.91" }
%"struct.std::_Tuple_impl.91" = type { %"struct.std::_Head_base.94" }
%"struct.std::_Head_base.94" = type { ptr }
%class.HighsRandom = type { i64 }
%class.HSimplexNla = type { ptr, ptr, ptr, ptr, ptr, ptr, %class.HFactor, i8, double, %struct.ProductFormUpdate, %struct.SimplexIterate }
%class.HFactor = type { double, double, i32, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %struct.RefactorInfo, i32, i32, i32, i32, i32, i32, i32, double, i8, ptr, ptr, ptr, ptr, double, double, i32, double, %"class.std::unique_ptr.95", %struct.HighsLogOptions, i8, i8, i32, i32, ptr, i32, %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.103", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", i32, i32, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %class.HVectorBase }
%struct.RefactorInfo = type { i8, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.74", double }
%"class.std::unique_ptr.95" = type { %"struct.std::__uniq_ptr_data.96" }
%"struct.std::__uniq_ptr_data.96" = type { %"class.std::__uniq_ptr_impl.97" }
%"class.std::__uniq_ptr_impl.97" = type { %"class.std::tuple.98" }
%"class.std::tuple.98" = type { %"struct.std::_Tuple_impl.99" }
%"struct.std::_Tuple_impl.99" = type { %"struct.std::_Head_base.102" }
%"struct.std::_Head_base.102" = type { ptr }
%struct.ProductFormUpdate = type { i8, i32, i32, %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector" }
%struct.SimplexIterate = type { i8, %struct.SimplexBasis, %struct.InvertibleRepresentation, %"class.std::vector" }
%struct.InvertibleRepresentation = type { %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector" }
%struct.HotStart = type { i8, %struct.RefactorInfo, %"class.std::vector.74" }
%struct.HighsRayRecord = type { i32, i32, %"class.std::vector" }
%"class.std::vector.105" = type { %"struct.std::_Vector_base.106" }
%"struct.std::_Vector_base.106" = type { %"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsSimplexStats = type { i8, i32, i32, i32, i32, double, double, double, double }
%struct.HighsPresolveLog = type { %"class.std::vector.110" }
%"class.std::vector.110" = type { %"struct.std::_Vector_base.111" }
%"struct.std::_Vector_base.111" = type { %"struct.std::_Vector_base<HighsPresolveRuleLog, std::allocator<HighsPresolveRuleLog>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsPresolveRuleLog, std::allocator<HighsPresolveRuleLog>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsPresolveRuleLog, std::allocator<HighsPresolveRuleLog>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsPresolveRuleLog, std::allocator<HighsPresolveRuleLog>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.PresolveComponent = type { %class.HighsComponent.base, %struct.PresolveComponentInfo, %struct.PresolveComponentData, ptr, ptr, i32, i32 }
%class.HighsComponent.base = type <{ ptr, %struct.HighsComponentInfo, %struct.HighsComponentData, %struct.HighsComponentOptions }>
%struct.HighsComponentInfo = type { i8 }
%struct.HighsComponentData = type { i8 }
%struct.HighsComponentOptions = type { i8 }
%struct.PresolveComponentInfo = type { ptr, %struct.HighsComponentInfo, i32, i32, i32, double, double }
%struct.PresolveComponentData = type { ptr, %struct.HighsComponentData, %class.HighsLp, %"class.presolve::HighsPostsolveStack", %struct.HighsSolution, %struct.HighsBasis, %struct.HighsPresolveLog }
%"class.presolve::HighsPostsolveStack" = type { i64, double, double, double, double, %class.HighsDataStack, %"class.std::vector.115", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.120", %"class.std::vector.125", %"class.std::vector.125", i32, i32 }
%class.HighsDataStack = type { %"class.std::vector.103", i64 }
%"class.std::vector.115" = type { %"struct.std::_Vector_base.116" }
%"struct.std::_Vector_base.116" = type { %"struct.std::_Vector_base<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>, std::allocator<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>, std::allocator<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>, std::allocator<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>, std::allocator<std::pair<presolve::HighsPostsolveStack::ReductionType, unsigned long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.120" = type { %"struct.std::_Vector_base.121" }
%"struct.std::_Vector_base.121" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.125" = type { %"struct.std::_Vector_base.126" }
%"struct.std::_Vector_base.126" = type { %"struct.std::_Vector_base<presolve::HighsPostsolveStack::Nonzero, std::allocator<presolve::HighsPostsolveStack::Nonzero>>::_Vector_impl" }
%"struct.std::_Vector_base<presolve::HighsPostsolveStack::Nonzero, std::allocator<presolve::HighsPostsolveStack::Nonzero>>::_Vector_impl" = type { %"struct.std::_Vector_base<presolve::HighsPostsolveStack::Nonzero, std::allocator<presolve::HighsPostsolveStack::Nonzero>>::_Vector_impl_data" }
%"struct.std::_Vector_base<presolve::HighsPostsolveStack::Nonzero, std::allocator<presolve::HighsPostsolveStack::Nonzero>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.78 = external hidden unnamed_addr constant [80 x i8], align 1
@.str.138 = external hidden unnamed_addr constant [33 x i8], align 1
@__PRETTY_FUNCTION__._ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b = external hidden unnamed_addr constant [103 x i8], align 1
@.str.139 = external hidden unnamed_addr constant [14 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b(ptr noundef nonnull align 8 dereferenceable(20928) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i1 noundef zeroext %5) #3 align 2 personality ptr @__gxx_personality_v0 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i8, align 1
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %class.HVectorBase, align 8
  %19 = alloca ptr, align 8
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca double, align 8
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  %27 = alloca i32, align 4
  %28 = alloca i32, align 4
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store ptr %4, ptr %12, align 8, !tbaa !5
  %32 = zext i1 %5 to i8
  store i8 %32, ptr %13, align 1, !tbaa !9
  %33 = load ptr, ptr %8, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  store i32 0, ptr %14, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #6
  %34 = getelementptr inbounds %class.Highs, ptr %33, i32 0, i32 4
  %35 = getelementptr inbounds %class.HighsModel, ptr %34, i32 0, i32 0
  store ptr %35, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #6
  %36 = load ptr, ptr %15, align 8, !tbaa !5
  %37 = getelementptr inbounds %class.HighsLp, ptr %36, i32 0, i32 1
  %38 = load i32, ptr %37, align 4, !tbaa !13
  store i32 %38, ptr %16, align 4, !tbaa !47
  %39 = load i32, ptr %16, align 4, !tbaa !47
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %43

41:                                               ; preds = %6
  %42 = load i32, ptr %14, align 4, !tbaa !11
  store i32 %42, ptr %7, align 4
  store i32 1, ptr %17, align 4
  br label %282

43:                                               ; preds = %6
  %44 = getelementptr inbounds %class.Highs, ptr %33, i32 0, i32 21
  %45 = getelementptr inbounds %class.HEkk, ptr %44, i32 0, i32 6
  %46 = getelementptr inbounds %struct.HighsSimplexStatus, ptr %45, i32 0, i32 8
  %47 = load i8, ptr %46, align 8, !tbaa !48, !range !197, !noundef !198
  %48 = trunc i8 %47 to i1
  br i1 %48, label %49, label %50

49:                                               ; preds = %43
  br label %52

50:                                               ; preds = %43
  call void @__assert_fail(ptr noundef @.str.138, ptr noundef @.str.78, i32 noundef 1523, ptr noundef @__PRETTY_FUNCTION__._ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b) #7
  unreachable

51:                                               ; No predecessors!
  br label %52

52:                                               ; preds = %51, %49
  %53 = getelementptr inbounds %class.Highs, ptr %33, i32 0, i32 21
  %54 = load ptr, ptr %15, align 8, !tbaa !5
  call void @_ZN4HEkk27setNlaPointersForLpAndScaleERK7HighsLp(ptr noundef nonnull align 8 dereferenceable(14568) %53, ptr noundef nonnull align 8 dereferenceable(920) %54)
  %55 = load ptr, ptr %15, align 8, !tbaa !5
  %56 = getelementptr inbounds %class.HighsLp, ptr %55, i32 0, i32 23
  %57 = load i8, ptr %56, align 1, !tbaa !199, !range !197, !noundef !198
  %58 = trunc i8 %57 to i1
  %59 = xor i1 %58, true
  br i1 %59, label %60, label %61

60:                                               ; preds = %52
  br label %63

61:                                               ; preds = %52
  call void @__assert_fail(ptr noundef @.str.139, ptr noundef @.str.78, i32 noundef 1526, ptr noundef @__PRETTY_FUNCTION__._ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b) #7
  unreachable

62:                                               ; No predecessors!
  br label %63

63:                                               ; preds = %62, %60
  call void @llvm.lifetime.start.p0(i64 176, ptr %18) #6
  call void @_ZN11HVectorBaseIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(176) %18) #6
  %64 = load i32, ptr %16, align 4, !tbaa !47
  invoke void @_ZN11HVectorBaseIdE5setupEi(ptr noundef nonnull align 8 dereferenceable(176) %18, i32 noundef %64)
          to label %65 unwind label %72

65:                                               ; preds = %63
  invoke void @_ZN11HVectorBaseIdE5clearEv(ptr noundef nonnull align 8 dereferenceable(176) %18)
          to label %66 unwind label %72

66:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #6
  store i32 0, ptr %21, align 4, !tbaa !47
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #6
  store i32 0, ptr %22, align 4, !tbaa !47
  br label %67

67:                                               ; preds = %100, %66
  %68 = load i32, ptr %22, align 4, !tbaa !47
  %69 = load i32, ptr %16, align 4, !tbaa !47
  %70 = icmp slt i32 %68, %69
  br i1 %70, label %76, label %71

71:                                               ; preds = %67
  store i32 2, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #6
  br label %103

72:                                               ; preds = %65, %63
  %73 = landingpad { ptr, i32 }
          cleanup
  %74 = extractvalue { ptr, i32 } %73, 0
  store ptr %74, ptr %19, align 8
  %75 = extractvalue { ptr, i32 } %73, 1
  store i32 %75, ptr %20, align 4
  br label %281

76:                                               ; preds = %67
  %77 = load ptr, ptr %9, align 8, !tbaa !5
  %78 = load i32, ptr %22, align 4, !tbaa !47
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #6
  %81 = load double, ptr %80, align 8, !tbaa !200
  %82 = fcmp une double %81, 0.000000e+00
  br i1 %82, label %83, label %99

83:                                               ; preds = %76
  %84 = load i32, ptr %22, align 4, !tbaa !47
  %85 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 2
  %86 = load i32, ptr %21, align 4, !tbaa !47
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %21, align 4, !tbaa !47
  %88 = sext i32 %86 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %88) #6
  store i32 %84, ptr %89, align 4, !tbaa !47
  %90 = load ptr, ptr %9, align 8, !tbaa !5
  %91 = load i32, ptr %22, align 4, !tbaa !47
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %92) #6
  %94 = load double, ptr %93, align 8, !tbaa !200
  %95 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 3
  %96 = load i32, ptr %22, align 4, !tbaa !47
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %95, i64 noundef %97) #6
  store double %94, ptr %98, align 8, !tbaa !200
  br label %99

99:                                               ; preds = %83, %76
  br label %100

100:                                              ; preds = %99
  %101 = load i32, ptr %22, align 4, !tbaa !47
  %102 = add nsw i32 %101, 1
  store i32 %102, ptr %22, align 4, !tbaa !47
  br label %67, !llvm.loop !201

103:                                              ; preds = %71
  %104 = load i32, ptr %21, align 4, !tbaa !47
  %105 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 1
  store i32 %104, ptr %105, align 4, !tbaa !203
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #6
  store double 1.000000e+00, ptr %23, align 8, !tbaa !200
  %106 = load i8, ptr %13, align 1, !tbaa !9, !range !197, !noundef !198
  %107 = trunc i8 %106 to i1
  br i1 %107, label %108, label %115

108:                                              ; preds = %103
  %109 = getelementptr inbounds %class.Highs, ptr %33, i32 0, i32 21
  invoke void @_ZN4HEkk5btranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568) %109, ptr noundef nonnull align 8 dereferenceable(176) %18, double noundef 1.000000e+00)
          to label %110 unwind label %111

110:                                              ; preds = %108
  br label %118

111:                                              ; preds = %115, %108
  %112 = landingpad { ptr, i32 }
          cleanup
  %113 = extractvalue { ptr, i32 } %112, 0
  store ptr %113, ptr %19, align 8
  %114 = extractvalue { ptr, i32 } %112, 1
  store i32 %114, ptr %20, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #6
  br label %281

115:                                              ; preds = %103
  %116 = getelementptr inbounds %class.Highs, ptr %33, i32 0, i32 21
  invoke void @_ZN4HEkk5ftranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568) %116, ptr noundef nonnull align 8 dereferenceable(176) %18, double noundef 1.000000e+00)
          to label %117 unwind label %111

117:                                              ; preds = %115
  br label %118

118:                                              ; preds = %117, %110
  %119 = load ptr, ptr %12, align 8, !tbaa !5
  %120 = icmp eq ptr %119, null
  br i1 %120, label %121, label %187

121:                                              ; preds = %118
  %122 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 1
  %123 = load i32, ptr %122, align 4, !tbaa !203
  %124 = load i32, ptr %16, align 4, !tbaa !47
  %125 = icmp sgt i32 %123, %124
  br i1 %125, label %126, label %146

126:                                              ; preds = %121
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #6
  store i32 0, ptr %24, align 4, !tbaa !47
  br label %127

127:                                              ; preds = %142, %126
  %128 = load i32, ptr %24, align 4, !tbaa !47
  %129 = load i32, ptr %16, align 4, !tbaa !47
  %130 = icmp slt i32 %128, %129
  br i1 %130, label %132, label %131

131:                                              ; preds = %127
  store i32 5, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #6
  br label %145

132:                                              ; preds = %127
  %133 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 3
  %134 = load i32, ptr %24, align 4, !tbaa !47
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %133, i64 noundef %135) #6
  %137 = load double, ptr %136, align 8, !tbaa !200
  %138 = load ptr, ptr %10, align 8, !tbaa !5
  %139 = load i32, ptr %24, align 4, !tbaa !47
  %140 = sext i32 %139 to i64
  %141 = getelementptr inbounds double, ptr %138, i64 %140
  store double %137, ptr %141, align 8, !tbaa !200
  br label %142

142:                                              ; preds = %132
  %143 = load i32, ptr %24, align 4, !tbaa !47
  %144 = add nsw i32 %143, 1
  store i32 %144, ptr %24, align 4, !tbaa !47
  br label %127, !llvm.loop !204

145:                                              ; preds = %131
  br label %186

146:                                              ; preds = %121
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #6
  store i32 0, ptr %25, align 4, !tbaa !47
  br label %147

147:                                              ; preds = %157, %146
  %148 = load i32, ptr %25, align 4, !tbaa !47
  %149 = load i32, ptr %16, align 4, !tbaa !47
  %150 = icmp slt i32 %148, %149
  br i1 %150, label %152, label %151

151:                                              ; preds = %147
  store i32 8, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #6
  br label %160

152:                                              ; preds = %147
  %153 = load ptr, ptr %10, align 8, !tbaa !5
  %154 = load i32, ptr %25, align 4, !tbaa !47
  %155 = sext i32 %154 to i64
  %156 = getelementptr inbounds double, ptr %153, i64 %155
  store double 0.000000e+00, ptr %156, align 8, !tbaa !200
  br label %157

157:                                              ; preds = %152
  %158 = load i32, ptr %25, align 4, !tbaa !47
  %159 = add nsw i32 %158, 1
  store i32 %159, ptr %25, align 4, !tbaa !47
  br label %147, !llvm.loop !205

160:                                              ; preds = %151
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #6
  store i32 0, ptr %26, align 4, !tbaa !47
  br label %161

161:                                              ; preds = %182, %160
  %162 = load i32, ptr %26, align 4, !tbaa !47
  %163 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 1
  %164 = load i32, ptr %163, align 4, !tbaa !203
  %165 = icmp slt i32 %162, %164
  br i1 %165, label %167, label %166

166:                                              ; preds = %161
  store i32 11, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #6
  br label %185

167:                                              ; preds = %161
  call void @llvm.lifetime.start.p0(i64 4, ptr %27) #6
  %168 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 2
  %169 = load i32, ptr %26, align 4, !tbaa !47
  %170 = sext i32 %169 to i64
  %171 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %168, i64 noundef %170) #6
  %172 = load i32, ptr %171, align 4, !tbaa !47
  store i32 %172, ptr %27, align 4, !tbaa !47
  %173 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 3
  %174 = load i32, ptr %27, align 4, !tbaa !47
  %175 = sext i32 %174 to i64
  %176 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %173, i64 noundef %175) #6
  %177 = load double, ptr %176, align 8, !tbaa !200
  %178 = load ptr, ptr %10, align 8, !tbaa !5
  %179 = load i32, ptr %27, align 4, !tbaa !47
  %180 = sext i32 %179 to i64
  %181 = getelementptr inbounds double, ptr %178, i64 %180
  store double %177, ptr %181, align 8, !tbaa !200
  call void @llvm.lifetime.end.p0(i64 4, ptr %27) #6
  br label %182

182:                                              ; preds = %167
  %183 = load i32, ptr %26, align 4, !tbaa !47
  %184 = add nsw i32 %183, 1
  store i32 %184, ptr %26, align 4, !tbaa !47
  br label %161, !llvm.loop !206

185:                                              ; preds = %166
  br label %186

186:                                              ; preds = %185, %145
  br label %280

187:                                              ; preds = %118
  %188 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 1
  %189 = load i32, ptr %188, align 4, !tbaa !203
  %190 = load i32, ptr %16, align 4, !tbaa !47
  %191 = icmp sgt i32 %189, %190
  br i1 %191, label %192, label %231

192:                                              ; preds = %187
  store ptr null, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %28) #6
  store i32 0, ptr %28, align 4, !tbaa !47
  br label %193

193:                                              ; preds = %227, %192
  %194 = load i32, ptr %28, align 4, !tbaa !47
  %195 = load i32, ptr %16, align 4, !tbaa !47
  %196 = icmp slt i32 %194, %195
  br i1 %196, label %198, label %197

197:                                              ; preds = %193
  store i32 14, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %28) #6
  br label %230

198:                                              ; preds = %193
  %199 = load ptr, ptr %10, align 8, !tbaa !5
  %200 = load i32, ptr %28, align 4, !tbaa !47
  %201 = sext i32 %200 to i64
  %202 = getelementptr inbounds double, ptr %199, i64 %201
  store double 0.000000e+00, ptr %202, align 8, !tbaa !200
  %203 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 3
  %204 = load i32, ptr %28, align 4, !tbaa !47
  %205 = sext i32 %204 to i64
  %206 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %203, i64 noundef %205) #6
  %207 = load double, ptr %206, align 8, !tbaa !200
  %208 = fcmp une double %207, 0.000000e+00
  br i1 %208, label %209, label %226

209:                                              ; preds = %198
  %210 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 3
  %211 = load i32, ptr %28, align 4, !tbaa !47
  %212 = sext i32 %211 to i64
  %213 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %210, i64 noundef %212) #6
  %214 = load double, ptr %213, align 8, !tbaa !200
  %215 = load ptr, ptr %10, align 8, !tbaa !5
  %216 = load i32, ptr %28, align 4, !tbaa !47
  %217 = sext i32 %216 to i64
  %218 = getelementptr inbounds double, ptr %215, i64 %217
  store double %214, ptr %218, align 8, !tbaa !200
  %219 = load i32, ptr %28, align 4, !tbaa !47
  %220 = load ptr, ptr %12, align 8, !tbaa !5
  %221 = load ptr, ptr %11, align 8, !tbaa !5
  %222 = getelementptr inbounds i32, ptr %221, i32 1
  store ptr %222, ptr %11, align 8, !tbaa !5
  %223 = load i32, ptr %221, align 4, !tbaa !47
  %224 = sext i32 %223 to i64
  %225 = getelementptr inbounds i32, ptr %220, i64 %224
  store i32 %219, ptr %225, align 4, !tbaa !47
  br label %226

226:                                              ; preds = %209, %198
  br label %227

227:                                              ; preds = %226
  %228 = load i32, ptr %28, align 4, !tbaa !47
  %229 = add nsw i32 %228, 1
  store i32 %229, ptr %28, align 4, !tbaa !47
  br label %193, !llvm.loop !207

230:                                              ; preds = %197
  br label %279

231:                                              ; preds = %187
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #6
  store i32 0, ptr %29, align 4, !tbaa !47
  br label %232

232:                                              ; preds = %242, %231
  %233 = load i32, ptr %29, align 4, !tbaa !47
  %234 = load i32, ptr %16, align 4, !tbaa !47
  %235 = icmp slt i32 %233, %234
  br i1 %235, label %237, label %236

236:                                              ; preds = %232
  store i32 17, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #6
  br label %245

237:                                              ; preds = %232
  %238 = load ptr, ptr %10, align 8, !tbaa !5
  %239 = load i32, ptr %29, align 4, !tbaa !47
  %240 = sext i32 %239 to i64
  %241 = getelementptr inbounds double, ptr %238, i64 %240
  store double 0.000000e+00, ptr %241, align 8, !tbaa !200
  br label %242

242:                                              ; preds = %237
  %243 = load i32, ptr %29, align 4, !tbaa !47
  %244 = add nsw i32 %243, 1
  store i32 %244, ptr %29, align 4, !tbaa !47
  br label %232, !llvm.loop !208

245:                                              ; preds = %236
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #6
  store i32 0, ptr %30, align 4, !tbaa !47
  br label %246

246:                                              ; preds = %272, %245
  %247 = load i32, ptr %30, align 4, !tbaa !47
  %248 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 1
  %249 = load i32, ptr %248, align 4, !tbaa !203
  %250 = icmp slt i32 %247, %249
  br i1 %250, label %252, label %251

251:                                              ; preds = %246
  store i32 20, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #6
  br label %275

252:                                              ; preds = %246
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #6
  %253 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 2
  %254 = load i32, ptr %30, align 4, !tbaa !47
  %255 = sext i32 %254 to i64
  %256 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %253, i64 noundef %255) #6
  %257 = load i32, ptr %256, align 4, !tbaa !47
  store i32 %257, ptr %31, align 4, !tbaa !47
  %258 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 3
  %259 = load i32, ptr %31, align 4, !tbaa !47
  %260 = sext i32 %259 to i64
  %261 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %258, i64 noundef %260) #6
  %262 = load double, ptr %261, align 8, !tbaa !200
  %263 = load ptr, ptr %10, align 8, !tbaa !5
  %264 = load i32, ptr %31, align 4, !tbaa !47
  %265 = sext i32 %264 to i64
  %266 = getelementptr inbounds double, ptr %263, i64 %265
  store double %262, ptr %266, align 8, !tbaa !200
  %267 = load i32, ptr %31, align 4, !tbaa !47
  %268 = load ptr, ptr %12, align 8, !tbaa !5
  %269 = load i32, ptr %30, align 4, !tbaa !47
  %270 = sext i32 %269 to i64
  %271 = getelementptr inbounds i32, ptr %268, i64 %270
  store i32 %267, ptr %271, align 4, !tbaa !47
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #6
  br label %272

272:                                              ; preds = %252
  %273 = load i32, ptr %30, align 4, !tbaa !47
  %274 = add nsw i32 %273, 1
  store i32 %274, ptr %30, align 4, !tbaa !47
  br label %246, !llvm.loop !209

275:                                              ; preds = %251
  %276 = getelementptr inbounds %class.HVectorBase, ptr %18, i32 0, i32 1
  %277 = load i32, ptr %276, align 4, !tbaa !203
  %278 = load ptr, ptr %11, align 8, !tbaa !5
  store i32 %277, ptr %278, align 4, !tbaa !47
  br label %279

279:                                              ; preds = %275, %230
  br label %280

280:                                              ; preds = %279, %186
  store i32 0, ptr %7, align 4
  store i32 1, ptr %17, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #6
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %18) #6
  call void @llvm.lifetime.end.p0(i64 176, ptr %18) #6
  br label %282

281:                                              ; preds = %111, %72
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %18) #6
  call void @llvm.lifetime.end.p0(i64 176, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  br label %284

282:                                              ; preds = %280, %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  %283 = load i32, ptr %7, align 4
  ret i32 %283

284:                                              ; preds = %281
  %285 = load ptr, ptr %19, align 8
  %286 = load i32, ptr %20, align 4
  %287 = insertvalue { ptr, i32 } poison, ptr %285, 0
  %288 = insertvalue { ptr, i32 } %287, i32 %286, 1
  resume { ptr, i32 } %288
}

declare void @_ZN4HEkk27setNlaPointersForLpAndScaleERK7HighsLp(ptr noundef nonnull align 8 dereferenceable(14568), ptr noundef nonnull align 8 dereferenceable(920)) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11HVectorBaseIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #5 align 2

declare void @_ZN11HVectorBaseIdE5setupEi(ptr noundef nonnull align 8 dereferenceable(176), i32 noundef) #4

declare void @_ZN11HVectorBaseIdE5clearEv(ptr noundef nonnull align 8 dereferenceable(176)) #4

declare void @_ZN4HEkk5btranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568), ptr noundef nonnull align 8 dereferenceable(176), double noundef) #4

declare void @_ZN4HEkk5ftranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568), ptr noundef nonnull align 8 dereferenceable(176), double noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #5 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS11HighsStatus", !7, i64 0}
!13 = !{!14, !15, i64 4}
!14 = !{!"_ZTS7HighsLp", !15, i64 0, !15, i64 4, !16, i64 8, !16, i64 32, !16, i64 56, !16, i64 80, !16, i64 104, !20, i64 128, !26, i64 240, !27, i64 248, !28, i64 256, !28, i64 288, !15, i64 320, !15, i64 324, !31, i64 328, !31, i64 352, !35, i64 376, !39, i64 400, !39, i64 456, !15, i64 512, !15, i64 516, !45, i64 520, !10, i64 592, !10, i64 593, !15, i64 596, !10, i64 600, !46, i64 608}
!15 = !{!"int", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTS17HighsSparseMatrix", !21, i64 0, !15, i64 4, !15, i64 8, !22, i64 16, !22, i64 40, !22, i64 64, !16, i64 88}
!21 = !{!"_ZTS12MatrixFormat", !7, i64 0}
!22 = !{!"_ZTSSt6vectorIiSaIiEE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!"_ZTS8ObjSense", !7, i64 0}
!27 = !{!"double", !7, i64 0}
!28 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !29, i64 0, !30, i64 8, !7, i64 16}
!29 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!30 = !{!"long", !7, i64 0}
!31 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!35 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !36, i64 0}
!36 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!39 = !{!"_ZTS13HighsNameHash", !40, i64 0}
!40 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !41, i64 0}
!41 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !30, i64 8, !42, i64 16, !30, i64 24, !43, i64 32, !6, i64 48}
!42 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!43 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !44, i64 0, !30, i64 8}
!44 = !{!"float", !7, i64 0}
!45 = !{!"_ZTS10HighsScale", !15, i64 0, !10, i64 4, !15, i64 8, !15, i64 12, !27, i64 16, !16, i64 24, !16, i64 48}
!46 = !{!"_ZTS11HighsLpMods", !22, i64 0, !22, i64 24, !16, i64 48, !16, i64 72, !35, i64 96, !22, i64 120, !16, i64 144, !22, i64 168, !16, i64 192, !22, i64 216, !16, i64 240, !16, i64 264, !16, i64 288}
!47 = !{!15, !15, i64 0}
!48 = !{!49, !10, i64 14416}
!49 = !{!"_ZTS5Highs", !50, i64 8, !51, i64 112, !56, i64 208, !61, i64 312, !64, i64 1312, !61, i64 1336, !68, i64 2336, !69, i64 2472, !80, i64 2728, !87, i64 3752, !93, i64 3936, !95, i64 4520, !100, i64 4648, !104, i64 4672, !105, i64 4676, !10, i64 4680, !27, i64 4688, !16, i64 4696, !16, i64 4720, !20, i64 4744, !106, i64 4856, !170, i64 19424, !15, i64 19448, !10, i64 19452, !15, i64 19456, !10, i64 19460, !175, i64 19464}
!50 = !{!"_ZTS13HighsSolution", !10, i64 0, !10, i64 1, !16, i64 8, !16, i64 32, !16, i64 56, !16, i64 80}
!51 = !{!"_ZTS10HighsBasis", !10, i64 0, !10, i64 1, !10, i64 2, !10, i64 3, !15, i64 4, !15, i64 8, !28, i64 16, !52, i64 48, !52, i64 72}
!52 = !{!"_ZTSSt6vectorI16HighsBasisStatusSaIS0_EE", !53, i64 0}
!53 = !{!"_ZTSSt12_Vector_baseI16HighsBasisStatusSaIS0_EE", !54, i64 0}
!54 = !{!"_ZTSNSt12_Vector_baseI16HighsBasisStatusSaIS0_EE12_Vector_implE", !55, i64 0}
!55 = !{!"_ZTSNSt12_Vector_baseI16HighsBasisStatusSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!56 = !{!"_ZTS10ICrashInfo", !15, i64 0, !27, i64 8, !27, i64 16, !27, i64 24, !27, i64 32, !27, i64 40, !57, i64 48, !16, i64 72, !27, i64 96}
!57 = !{!"_ZTSSt6vectorI22ICrashIterationDetailsSaIS0_EE", !58, i64 0}
!58 = !{!"_ZTSSt12_Vector_baseI22ICrashIterationDetailsSaIS0_EE", !59, i64 0}
!59 = !{!"_ZTSNSt12_Vector_baseI22ICrashIterationDetailsSaIS0_EE12_Vector_implE", !60, i64 0}
!60 = !{!"_ZTSNSt12_Vector_baseI22ICrashIterationDetailsSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!61 = !{!"_ZTS10HighsModel", !14, i64 0, !62, i64 920}
!62 = !{!"_ZTS12HighsHessian", !15, i64 0, !63, i64 4, !22, i64 8, !22, i64 32, !16, i64 56}
!63 = !{!"_ZTS13HessianFormat", !7, i64 0}
!64 = !{!"_ZTSSt6vectorI20HighsLinearObjectiveSaIS0_EE", !65, i64 0}
!65 = !{!"_ZTSSt12_Vector_baseI20HighsLinearObjectiveSaIS0_EE", !66, i64 0}
!66 = !{!"_ZTSNSt12_Vector_baseI20HighsLinearObjectiveSaIS0_EE12_Vector_implE", !67, i64 0}
!67 = !{!"_ZTSNSt12_Vector_baseI20HighsLinearObjectiveSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!68 = !{!"_ZTS10HighsTimer", !27, i64 8, !15, i64 16, !22, i64 24, !16, i64 48, !16, i64 72, !31, i64 96, !15, i64 120, !15, i64 124, !15, i64 128}
!69 = !{!"_ZTS13HighsCallback", !70, i64 0, !6, i64 32, !6, i64 40, !72, i64 48, !78, i64 88, !79, i64 240}
!70 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !71, i64 0, !6, i64 24}
!71 = !{!"_ZTSSt14_Function_base", !7, i64 0, !6, i64 16}
!72 = !{!"_ZTSSt6vectorIbSaIbEE", !73, i64 0}
!73 = !{!"_ZTSSt13_Bvector_baseISaIbEE", !74, i64 0}
!74 = !{!"_ZTSNSt13_Bvector_baseISaIbEE13_Bvector_implE", !75, i64 0}
!75 = !{!"_ZTSNSt13_Bvector_baseISaIbEE18_Bvector_impl_dataE", !76, i64 0, !76, i64 16, !6, i64 32}
!76 = !{!"_ZTSSt13_Bit_iterator", !77, i64 0}
!77 = !{!"_ZTSSt18_Bit_iterator_base", !6, i64 0, !15, i64 8}
!78 = !{!"_ZTS20HighsCallbackDataOut", !15, i64 0, !27, i64 8, !15, i64 16, !15, i64 20, !15, i64 24, !27, i64 32, !30, i64 40, !30, i64 48, !27, i64 56, !27, i64 64, !27, i64 72, !6, i64 80, !15, i64 88, !15, i64 92, !15, i64 96, !6, i64 104, !6, i64 112, !6, i64 120, !6, i64 128, !6, i64 136, !15, i64 144}
!79 = !{!"_ZTS19HighsCallbackDataIn", !15, i64 0, !6, i64 8}
!80 = !{!"_ZTS12HighsOptions", !81, i64 0, !83, i64 992, !15, i64 1016}
!81 = !{!"_ZTS18HighsOptionsStruct", !28, i64 8, !28, i64 40, !28, i64 72, !28, i64 104, !27, i64 136, !28, i64 144, !28, i64 176, !15, i64 208, !28, i64 216, !27, i64 248, !27, i64 256, !27, i64 264, !27, i64 272, !27, i64 280, !27, i64 288, !27, i64 296, !27, i64 304, !27, i64 312, !27, i64 320, !27, i64 328, !15, i64 336, !15, i64 340, !15, i64 344, !15, i64 348, !15, i64 352, !15, i64 356, !15, i64 360, !15, i64 364, !15, i64 368, !15, i64 372, !15, i64 376, !15, i64 380, !15, i64 384, !15, i64 388, !28, i64 392, !10, i64 424, !10, i64 425, !10, i64 426, !15, i64 428, !15, i64 432, !28, i64 440, !10, i64 472, !10, i64 473, !10, i64 474, !15, i64 476, !10, i64 480, !10, i64 481, !15, i64 484, !15, i64 488, !27, i64 496, !15, i64 504, !15, i64 508, !15, i64 512, !10, i64 516, !15, i64 520, !10, i64 524, !10, i64 525, !10, i64 526, !10, i64 527, !10, i64 528, !10, i64 529, !10, i64 530, !15, i64 532, !15, i64 536, !15, i64 540, !15, i64 544, !15, i64 548, !15, i64 552, !15, i64 556, !15, i64 560, !15, i64 564, !15, i64 568, !15, i64 572, !15, i64 576, !15, i64 580, !15, i64 584, !15, i64 588, !10, i64 592, !10, i64 593, !10, i64 594, !10, i64 595, !27, i64 600, !27, i64 608, !27, i64 616, !27, i64 624, !27, i64 632, !27, i64 640, !27, i64 648, !27, i64 656, !27, i64 664, !27, i64 672, !27, i64 680, !10, i64 688, !10, i64 689, !10, i64 690, !10, i64 691, !15, i64 692, !27, i64 696, !10, i64 704, !10, i64 705, !28, i64 712, !27, i64 744, !15, i64 752, !15, i64 756, !10, i64 760, !10, i64 761, !10, i64 762, !10, i64 763, !15, i64 764, !15, i64 768, !15, i64 772, !15, i64 776, !15, i64 780, !15, i64 784, !15, i64 788, !15, i64 792, !15, i64 796, !15, i64 800, !15, i64 804, !27, i64 808, !27, i64 816, !27, i64 824, !27, i64 832, !27, i64 840, !10, i64 848, !10, i64 849, !28, i64 856, !10, i64 888, !15, i64 892, !82, i64 896}
!82 = !{!"_ZTS15HighsLogOptions", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !70, i64 48, !6, i64 80, !10, i64 88}
!83 = !{!"_ZTSSt6vectorIP12OptionRecordSaIS1_EE", !84, i64 0}
!84 = !{!"_ZTSSt12_Vector_baseIP12OptionRecordSaIS1_EE", !85, i64 0}
!85 = !{!"_ZTSNSt12_Vector_baseIP12OptionRecordSaIS1_EE12_Vector_implE", !86, i64 0}
!86 = !{!"_ZTSNSt12_Vector_baseIP12OptionRecordSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!87 = !{!"_ZTS9HighsInfo", !88, i64 8, !89, i64 160}
!88 = !{!"_ZTS15HighsInfoStruct", !10, i64 0, !30, i64 8, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !27, i64 48, !27, i64 56, !27, i64 64, !27, i64 72, !15, i64 80, !27, i64 88, !27, i64 96, !15, i64 104, !27, i64 112, !27, i64 120, !27, i64 128, !27, i64 136, !27, i64 144}
!89 = !{!"_ZTSSt6vectorIP10InfoRecordSaIS1_EE", !90, i64 0}
!90 = !{!"_ZTSSt12_Vector_baseIP10InfoRecordSaIS1_EE", !91, i64 0}
!91 = !{!"_ZTSNSt12_Vector_baseIP10InfoRecordSaIS1_EE12_Vector_implE", !92, i64 0}
!92 = !{!"_ZTSNSt12_Vector_baseIP10InfoRecordSaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!93 = !{!"_ZTS12HighsRanging", !10, i64 0, !94, i64 8, !94, i64 104, !94, i64 200, !94, i64 296, !94, i64 392, !94, i64 488}
!94 = !{!"_ZTS18HighsRangingRecord", !16, i64 0, !16, i64 24, !22, i64 48, !22, i64 72}
!95 = !{!"_ZTS8HighsIis", !10, i64 0, !15, i64 4, !22, i64 8, !22, i64 32, !22, i64 56, !22, i64 80, !96, i64 104}
!96 = !{!"_ZTSSt6vectorI12HighsIisInfoSaIS0_EE", !97, i64 0}
!97 = !{!"_ZTSSt12_Vector_baseI12HighsIisInfoSaIS0_EE", !98, i64 0}
!98 = !{!"_ZTSNSt12_Vector_baseI12HighsIisInfoSaIS0_EE12_Vector_implE", !99, i64 0}
!99 = !{!"_ZTSNSt12_Vector_baseI12HighsIisInfoSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!100 = !{!"_ZTSSt6vectorI22HighsObjectiveSolutionSaIS0_EE", !101, i64 0}
!101 = !{!"_ZTSSt12_Vector_baseI22HighsObjectiveSolutionSaIS0_EE", !102, i64 0}
!102 = !{!"_ZTSNSt12_Vector_baseI22HighsObjectiveSolutionSaIS0_EE12_Vector_implE", !103, i64 0}
!103 = !{!"_ZTSNSt12_Vector_baseI22HighsObjectiveSolutionSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!104 = !{!"_ZTS19HighsPresolveStatus", !7, i64 0}
!105 = !{!"_ZTS16HighsModelStatus", !7, i64 0}
!106 = !{!"_ZTS4HEkk", !6, i64 0, !6, i64 8, !6, i64 16, !107, i64 24, !14, i64 8600, !28, i64 9520, !124, i64 9552, !125, i64 9568, !105, i64 10608, !126, i64 10616, !131, i64 10736, !144, i64 10776, !16, i64 10784, !16, i64 10808, !10, i64 10832, !20, i64 10840, !20, i64 10952, !145, i64 11064, !162, i64 13928, !27, i64 14048, !27, i64 14056, !27, i64 14064, !15, i64 14072, !15, i64 14076, !15, i64 14080, !15, i64 14084, !10, i64 14088, !10, i64 14089, !163, i64 14092, !15, i64 14096, !15, i64 14100, !22, i64 14104, !16, i64 14128, !164, i64 14152, !164, i64 14184, !15, i64 14216, !15, i64 14220, !15, i64 14224, !27, i64 14232, !16, i64 14240, !16, i64 14264, !16, i64 14288, !16, i64 14312, !16, i64 14336, !22, i64 14360, !22, i64 14384, !27, i64 14408, !27, i64 14416, !27, i64 14424, !15, i64 14432, !15, i64 14436, !10, i64 14440, !15, i64 14444, !10, i64 14448, !10, i64 14449, !10, i64 14450, !10, i64 14451, !27, i64 14456, !165, i64 14464, !16, i64 14488, !169, i64 14512}
!107 = !{!"_ZTS20HighsSimplexAnalysis", !6, i64 0, !108, i64 8, !108, i64 32, !6, i64 56, !15, i64 64, !15, i64 68, !15, i64 72, !28, i64 80, !28, i64 112, !82, i64 144, !10, i64 240, !10, i64 241, !10, i64 242, !10, i64 243, !10, i64 244, !10, i64 245, !10, i64 246, !15, i64 248, !112, i64 252, !15, i64 256, !15, i64 260, !15, i64 264, !15, i64 268, !15, i64 272, !15, i64 276, !15, i64 280, !28, i64 288, !27, i64 320, !27, i64 328, !27, i64 336, !27, i64 344, !27, i64 352, !27, i64 360, !27, i64 368, !27, i64 376, !27, i64 384, !27, i64 392, !27, i64 400, !27, i64 408, !15, i64 416, !15, i64 420, !27, i64 424, !27, i64 432, !15, i64 440, !27, i64 448, !27, i64 456, !15, i64 464, !27, i64 472, !27, i64 480, !27, i64 488, !27, i64 496, !27, i64 504, !27, i64 512, !27, i64 520, !27, i64 528, !27, i64 536, !27, i64 544, !15, i64 552, !27, i64 560, !15, i64 568, !15, i64 572, !15, i64 576, !15, i64 580, !15, i64 584, !15, i64 588, !15, i64 592, !15, i64 596, !15, i64 600, !113, i64 608, !113, i64 760, !113, i64 912, !113, i64 1064, !113, i64 1216, !113, i64 1368, !113, i64 1520, !113, i64 1672, !113, i64 1824, !113, i64 1976, !15, i64 2128, !15, i64 2132, !15, i64 2136, !15, i64 2140, !27, i64 2144, !27, i64 2152, !15, i64 2160, !15, i64 2164, !15, i64 2168, !15, i64 2172, !15, i64 2176, !27, i64 2184, !27, i64 2192, !15, i64 2200, !27, i64 2208, !27, i64 2216, !15, i64 2224, !15, i64 2228, !27, i64 2232, !27, i64 2240, !16, i64 2248, !16, i64 2272, !16, i64 2296, !16, i64 2320, !114, i64 2344, !118, i64 2368, !15, i64 2376, !15, i64 2380, !15, i64 2384, !15, i64 2388, !27, i64 2392, !27, i64 2400, !27, i64 2408, !27, i64 2416, !27, i64 2424, !27, i64 2432, !27, i64 2440, !27, i64 2448, !27, i64 2456, !27, i64 2464, !15, i64 2472, !15, i64 2476, !27, i64 2480, !27, i64 2488, !27, i64 2496, !10, i64 2504, !27, i64 2512, !27, i64 2520, !15, i64 2528, !15, i64 2532, !15, i64 2536, !15, i64 2540, !15, i64 2544, !27, i64 2552, !27, i64 2560, !27, i64 2568, !27, i64 2576, !27, i64 2584, !27, i64 2592, !27, i64 2600, !27, i64 2608, !27, i64 2616, !15, i64 2624, !15, i64 2628, !7, i64 2632, !15, i64 4952, !15, i64 4956, !7, i64 4960, !7, i64 7600, !7, i64 7648, !113, i64 7664, !113, i64 7816, !113, i64 7968, !113, i64 8120, !113, i64 8272, !113, i64 8424}
!108 = !{!"_ZTSSt6vectorI15HighsTimerClockSaIS0_EE", !109, i64 0}
!109 = !{!"_ZTSSt12_Vector_baseI15HighsTimerClockSaIS0_EE", !110, i64 0}
!110 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE12_Vector_implE", !111, i64 0}
!111 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!112 = !{!"_ZTS14EdgeWeightMode", !7, i64 0}
!113 = !{!"_ZTS22HighsValueDistribution", !28, i64 0, !28, i64 32, !15, i64 64, !15, i64 68, !15, i64 72, !27, i64 80, !27, i64 88, !16, i64 96, !22, i64 120, !15, i64 144}
!114 = !{!"_ZTSSt6vectorI17TranStageAnalysisSaIS0_EE", !115, i64 0}
!115 = !{!"_ZTSSt12_Vector_baseI17TranStageAnalysisSaIS0_EE", !116, i64 0}
!116 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE12_Vector_implE", !117, i64 0}
!117 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!118 = !{!"_ZTSSt10unique_ptrINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !119, i64 0}
!119 = !{!"_ZTSSt15__uniq_ptr_dataINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_ELb1ELb1EE", !120, i64 0}
!120 = !{!"_ZTSSt15__uniq_ptr_implINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !121, i64 0}
!121 = !{!"_ZTSSt5tupleIJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !122, i64 0}
!122 = !{!"_ZTSSt11_Tuple_implILm0EJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !123, i64 0}
!123 = !{!"_ZTSSt10_Head_baseILm0EPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEELb0EE", !6, i64 0}
!124 = !{!"_ZTS18HighsSimplexStatus", !10, i64 0, !10, i64 1, !10, i64 2, !10, i64 3, !10, i64 4, !10, i64 5, !10, i64 6, !10, i64 7, !10, i64 8, !10, i64 9, !10, i64 10, !10, i64 11, !10, i64 12}
!125 = !{!"_ZTS16HighsSimplexInfo", !16, i64 0, !16, i64 24, !16, i64 48, !16, i64 72, !16, i64 96, !16, i64 120, !16, i64 144, !16, i64 168, !16, i64 192, !16, i64 216, !16, i64 240, !16, i64 264, !16, i64 288, !22, i64 312, !22, i64 336, !22, i64 360, !22, i64 384, !16, i64 408, !15, i64 432, !15, i64 436, !10, i64 440, !10, i64 441, !126, i64 448, !15, i64 568, !15, i64 572, !15, i64 576, !16, i64 584, !16, i64 608, !16, i64 632, !16, i64 656, !15, i64 680, !15, i64 684, !15, i64 688, !15, i64 692, !27, i64 696, !27, i64 704, !27, i64 712, !27, i64 720, !15, i64 728, !15, i64 732, !27, i64 736, !27, i64 744, !27, i64 752, !27, i64 760, !27, i64 768, !27, i64 776, !27, i64 784, !27, i64 792, !27, i64 800, !27, i64 808, !10, i64 816, !27, i64 824, !27, i64 832, !15, i64 840, !27, i64 848, !27, i64 856, !27, i64 864, !10, i64 872, !10, i64 873, !10, i64 874, !10, i64 875, !10, i64 876, !10, i64 877, !10, i64 878, !10, i64 879, !10, i64 880, !10, i64 881, !10, i64 882, !10, i64 883, !10, i64 884, !10, i64 885, !10, i64 886, !15, i64 888, !27, i64 896, !27, i64 904, !15, i64 912, !27, i64 920, !27, i64 928, !15, i64 936, !15, i64 940, !15, i64 944, !15, i64 948, !15, i64 952, !15, i64 956, !15, i64 960, !15, i64 964, !15, i64 968, !15, i64 972, !15, i64 976, !15, i64 980, !15, i64 984, !15, i64 988, !15, i64 992, !15, i64 996, !27, i64 1000, !27, i64 1008, !27, i64 1016, !27, i64 1024, !15, i64 1032}
!126 = !{!"_ZTS12SimplexBasis", !22, i64 0, !127, i64 24, !127, i64 48, !30, i64 72, !15, i64 80, !15, i64 84, !28, i64 88}
!127 = !{!"_ZTSSt6vectorIaSaIaEE", !128, i64 0}
!128 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !129, i64 0}
!129 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !130, i64 0}
!130 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!131 = !{!"_ZTS14HighsHashTableImvE", !132, i64 0, !138, i64 8, !30, i64 16, !30, i64 24, !30, i64 32}
!132 = !{!"_ZTSSt10unique_ptrI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !133, i64 0}
!133 = !{!"_ZTSSt15__uniq_ptr_dataI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterELb1ELb1EE", !134, i64 0}
!134 = !{!"_ZTSSt15__uniq_ptr_implI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !135, i64 0}
!135 = !{!"_ZTSSt5tupleIJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !136, i64 0}
!136 = !{!"_ZTSSt11_Tuple_implILm0EJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !137, i64 0}
!137 = !{!"_ZTSSt10_Head_baseILm0EP19HighsHashTableEntryImvELb0EE", !6, i64 0}
!138 = !{!"_ZTSSt10unique_ptrIA_hSt14default_deleteIS0_EE", !139, i64 0}
!139 = !{!"_ZTSSt15__uniq_ptr_dataIhSt14default_deleteIA_hELb1ELb1EE", !140, i64 0}
!140 = !{!"_ZTSSt15__uniq_ptr_implIhSt14default_deleteIA_hEE", !141, i64 0}
!141 = !{!"_ZTSSt5tupleIJPhSt14default_deleteIA_hEEE", !142, i64 0}
!142 = !{!"_ZTSSt11_Tuple_implILm0EJPhSt14default_deleteIA_hEEE", !143, i64 0}
!143 = !{!"_ZTSSt10_Head_baseILm0EPhLb0EE", !6, i64 0}
!144 = !{!"_ZTS11HighsRandom", !30, i64 0}
!145 = !{!"_ZTS11HSimplexNla", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !146, i64 48, !10, i64 1960, !27, i64 1968, !159, i64 1976, !160, i64 2112}
!146 = !{!"_ZTS7HFactor", !27, i64 0, !27, i64 8, !15, i64 16, !22, i64 24, !22, i64 48, !22, i64 72, !147, i64 96, !15, i64 184, !15, i64 188, !15, i64 192, !15, i64 196, !15, i64 200, !15, i64 204, !15, i64 208, !27, i64 216, !10, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !27, i64 264, !27, i64 272, !15, i64 280, !27, i64 288, !148, i64 296, !82, i64 304, !10, i64 400, !10, i64 401, !15, i64 404, !15, i64 408, !6, i64 416, !15, i64 424, !22, i64 432, !16, i64 456, !22, i64 480, !22, i64 504, !22, i64 528, !16, i64 552, !22, i64 576, !22, i64 600, !22, i64 624, !22, i64 648, !22, i64 672, !22, i64 696, !22, i64 720, !16, i64 744, !16, i64 768, !22, i64 792, !22, i64 816, !22, i64 840, !22, i64 864, !22, i64 888, !22, i64 912, !154, i64 936, !16, i64 960, !22, i64 984, !22, i64 1008, !22, i64 1032, !22, i64 1056, !22, i64 1080, !22, i64 1104, !22, i64 1128, !22, i64 1152, !22, i64 1176, !22, i64 1200, !16, i64 1224, !22, i64 1248, !22, i64 1272, !16, i64 1296, !22, i64 1320, !22, i64 1344, !16, i64 1368, !15, i64 1392, !15, i64 1396, !22, i64 1400, !22, i64 1424, !22, i64 1448, !16, i64 1472, !22, i64 1496, !22, i64 1520, !22, i64 1544, !22, i64 1568, !16, i64 1592, !16, i64 1616, !22, i64 1640, !22, i64 1664, !22, i64 1688, !16, i64 1712, !158, i64 1736}
!147 = !{!"_ZTS12RefactorInfo", !10, i64 0, !22, i64 8, !22, i64 32, !127, i64 56, !27, i64 80}
!148 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !149, i64 0}
!149 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !150, i64 0}
!150 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !151, i64 0}
!151 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !152, i64 0}
!152 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !153, i64 0}
!153 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !6, i64 0}
!154 = !{!"_ZTSSt6vectorIcSaIcEE", !155, i64 0}
!155 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !156, i64 0}
!156 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !157, i64 0}
!157 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!158 = !{!"_ZTS11HVectorBaseIdE", !15, i64 0, !15, i64 4, !22, i64 8, !16, i64 32, !27, i64 56, !154, i64 64, !22, i64 88, !6, i64 112, !10, i64 120, !15, i64 124, !22, i64 128, !16, i64 152}
!159 = !{!"_ZTS17ProductFormUpdate", !10, i64 0, !15, i64 4, !15, i64 8, !22, i64 16, !16, i64 40, !22, i64 64, !22, i64 88, !16, i64 112}
!160 = !{!"_ZTS14SimplexIterate", !10, i64 0, !126, i64 8, !161, i64 128, !16, i64 728}
!161 = !{!"_ZTS24InvertibleRepresentation", !22, i64 0, !22, i64 24, !22, i64 48, !22, i64 72, !16, i64 96, !22, i64 120, !22, i64 144, !16, i64 168, !22, i64 192, !22, i64 216, !16, i64 240, !22, i64 264, !22, i64 288, !22, i64 312, !16, i64 336, !22, i64 360, !22, i64 384, !22, i64 408, !22, i64 432, !16, i64 456, !22, i64 480, !22, i64 504, !16, i64 528, !22, i64 552, !16, i64 576}
!162 = !{!"_ZTS8HotStart", !10, i64 0, !147, i64 8, !127, i64 96}
!163 = !{!"_ZTS16SimplexAlgorithm", !7, i64 0}
!164 = !{!"_ZTS14HighsRayRecord", !15, i64 0, !15, i64 4, !16, i64 8}
!165 = !{!"_ZTSSt6vectorI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !166, i64 0}
!166 = !{!"_ZTSSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !167, i64 0}
!167 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE12_Vector_implE", !168, i64 0}
!168 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!169 = !{!"_ZTS17HighsSimplexStats", !10, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !27, i64 24, !27, i64 32, !27, i64 40, !27, i64 48}
!170 = !{!"_ZTS16HighsPresolveLog", !171, i64 0}
!171 = !{!"_ZTSSt6vectorI20HighsPresolveRuleLogSaIS0_EE", !172, i64 0}
!172 = !{!"_ZTSSt12_Vector_baseI20HighsPresolveRuleLogSaIS0_EE", !173, i64 0}
!173 = !{!"_ZTSNSt12_Vector_baseI20HighsPresolveRuleLogSaIS0_EE12_Vector_implE", !174, i64 0}
!174 = !{!"_ZTSNSt12_Vector_baseI20HighsPresolveRuleLogSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!175 = !{!"_ZTS17PresolveComponent", !176, i64 0, !180, i64 16, !181, i64 56, !6, i64 1440, !6, i64 1448, !104, i64 1456, !196, i64 1460}
!176 = !{!"_ZTS14HighsComponent", !177, i64 8, !178, i64 9, !179, i64 10}
!177 = !{!"_ZTS18HighsComponentInfo", !10, i64 0}
!178 = !{!"_ZTS18HighsComponentData", !10, i64 0}
!179 = !{!"_ZTS21HighsComponentOptions", !10, i64 0}
!180 = !{!"_ZTS21PresolveComponentInfo", !177, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !27, i64 24, !27, i64 32}
!181 = !{!"_ZTS21PresolveComponentData", !178, i64 8, !14, i64 16, !182, i64 936, !50, i64 1160, !51, i64 1264, !170, i64 1360}
!182 = !{!"_ZTSN8presolve19HighsPostsolveStackE", !30, i64 0, !27, i64 8, !27, i64 16, !27, i64 24, !27, i64 32, !183, i64 40, !184, i64 72, !22, i64 96, !22, i64 120, !188, i64 144, !192, i64 168, !192, i64 192, !15, i64 216, !15, i64 220}
!183 = !{!"_ZTS14HighsDataStack", !154, i64 0, !30, i64 24}
!184 = !{!"_ZTSSt6vectorISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE", !185, i64 0}
!185 = !{!"_ZTSSt12_Vector_baseISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE", !186, i64 0}
!186 = !{!"_ZTSNSt12_Vector_baseISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE12_Vector_implE", !187, i64 0}
!187 = !{!"_ZTSNSt12_Vector_baseISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!188 = !{!"_ZTSSt6vectorIhSaIhEE", !189, i64 0}
!189 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !190, i64 0}
!190 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !191, i64 0}
!191 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!192 = !{!"_ZTSSt6vectorIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE", !193, i64 0}
!193 = !{!"_ZTSSt12_Vector_baseIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE", !194, i64 0}
!194 = !{!"_ZTSNSt12_Vector_baseIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE12_Vector_implE", !195, i64 0}
!195 = !{!"_ZTSNSt12_Vector_baseIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!196 = !{!"_ZTS20HighsPostsolveStatus", !7, i64 0}
!197 = !{i8 0, i8 2}
!198 = !{}
!199 = !{!14, !10, i64 593}
!200 = !{!27, !27, i64 0}
!201 = distinct !{!201, !202}
!202 = !{!"llvm.loop.mustprogress"}
!203 = !{!158, !15, i64 4}
!204 = distinct !{!204, !202}
!205 = distinct !{!205, !202}
!206 = distinct !{!206, !202}
!207 = distinct !{!207, !202}
!208 = distinct !{!208, !202}
!209 = distinct !{!209, !202}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HVectorBase = type { i32, i32, %"class.std::vector.13", %"class.std::vector", double, %"class.std::vector.103", %"class.std::vector.13", ptr, i8, i32, %"class.std::vector.13", %"class.std::vector" }
%"class.std::vector.103" = type { %"struct.std::_Vector_base.104" }
%"struct.std::_Vector_base.104" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.78 = external hidden unnamed_addr constant [80 x i8], align 1
@.str.138 = external hidden unnamed_addr constant [33 x i8], align 1
@__PRETTY_FUNCTION__._ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b = external hidden unnamed_addr constant [103 x i8], align 1
@.str.139 = external hidden unnamed_addr constant [14 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b(ptr noundef nonnull align 8 dereferenceable(20928) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3, ptr noundef writeonly %4, i1 noundef zeroext %5) local_unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %7 = alloca %class.HVectorBase, align 8
  %8 = getelementptr inbounds i8, ptr %0, i64 312
  %9 = getelementptr inbounds i8, ptr %0, i64 316
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %106, label %12

12:                                               ; preds = %6
  %13 = getelementptr inbounds i8, ptr %0, i64 4856
  %14 = getelementptr inbounds i8, ptr %0, i64 14416
  %15 = load i8, ptr %14, align 8, !tbaa !43, !range !192, !noundef !193
  %16 = trunc nuw i8 %15 to i1
  br i1 %16, label %18, label %17

17:                                               ; preds = %12
  tail call void @__assert_fail(ptr noundef nonnull @.str.138, ptr noundef nonnull @.str.78, i32 noundef 1523, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b) #7
  unreachable

18:                                               ; preds = %12
  tail call void @_ZN4HEkk27setNlaPointersForLpAndScaleERK7HighsLp(ptr noundef nonnull align 8 dereferenceable(14568) %13, ptr noundef nonnull align 8 dereferenceable(920) %8)
  %19 = getelementptr inbounds i8, ptr %0, i64 905
  %20 = load i8, ptr %19, align 1, !tbaa !194, !range !192, !noundef !193
  %21 = trunc nuw i8 %20 to i1
  br i1 %21, label %22, label %23

22:                                               ; preds = %18
  tail call void @__assert_fail(ptr noundef nonnull @.str.139, ptr noundef nonnull @.str.78, i32 noundef 1526, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN5Highs19basisSolveInterfaceERKSt6vectorIdSaIdEEPdPiS6_b) #7
  unreachable

23:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 176, ptr nonnull %7) #8
  call void @_ZN11HVectorBaseIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(176) %7) #8
  invoke void @_ZN11HVectorBaseIdE5setupEi(ptr noundef nonnull align 8 dereferenceable(176) %7, i32 noundef %10)
          to label %24 unwind label %29

24:                                               ; preds = %23
  invoke void @_ZN11HVectorBaseIdE5clearEv(ptr noundef nonnull align 8 dereferenceable(176) %7)
          to label %.preheader90 unwind label %29

.preheader90:                                     ; preds = %24
  %25 = icmp sgt i32 %10, 0
  br i1 %25, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader90
  %26 = getelementptr inbounds i8, ptr %7, i64 8
  %27 = getelementptr inbounds i8, ptr %7, i64 32
  %wide.trip.count = zext nneg i32 %10 to i64
  br label %31

._crit_edge:                                      ; preds = %43, %.preheader90
  %.076.lcssa = phi i32 [ 0, %.preheader90 ], [ %.177, %43 ]
  %28 = getelementptr inbounds i8, ptr %7, i64 4
  store i32 %.076.lcssa, ptr %28, align 4, !tbaa !195
  br i1 %5, label %44, label %47

29:                                               ; preds = %24, %23
  %30 = landingpad { ptr, i32 }
          cleanup
  br label %105

31:                                               ; preds = %.lr.ph, %43
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %43 ]
  %.07691 = phi i32 [ 0, %.lr.ph ], [ %.177, %43 ]
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #8
  %33 = load double, ptr %32, align 8, !tbaa !196
  %34 = fcmp une double %33, 0.000000e+00
  br i1 %34, label %35, label %43

35:                                               ; preds = %31
  %36 = add nsw i32 %.07691, 1
  %37 = sext i32 %.07691 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %37) #8
  %39 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %39, ptr %38, align 4, !tbaa !197
  %40 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #8
  %41 = load double, ptr %40, align 8, !tbaa !196
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv) #8
  store double %41, ptr %42, align 8, !tbaa !196
  br label %43

43:                                               ; preds = %31, %35
  %.177 = phi i32 [ %36, %35 ], [ %.07691, %31 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %31, !llvm.loop !198

44:                                               ; preds = %._crit_edge
  invoke void @_ZN4HEkk5btranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568) %13, ptr noundef nonnull align 8 dereferenceable(176) %7, double noundef 1.000000e+00)
          to label %48 unwind label %45

45:                                               ; preds = %47, %44
  %46 = landingpad { ptr, i32 }
          cleanup
  br label %105

47:                                               ; preds = %._crit_edge
  invoke void @_ZN4HEkk5ftranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568) %13, ptr noundef nonnull align 8 dereferenceable(176) %7, double noundef 1.000000e+00)
          to label %48 unwind label %45

48:                                               ; preds = %47, %44
  %49 = icmp eq ptr %4, null
  %50 = load i32, ptr %28, align 4, !tbaa !195
  %51 = icmp sgt i32 %50, %10
  br i1 %49, label %52, label %73

52:                                               ; preds = %48
  br i1 %51, label %.preheader, label %.preheader85

.preheader85:                                     ; preds = %52
  br i1 %25, label %.lr.ph103.preheader, label %.preheader83

.lr.ph103.preheader:                              ; preds = %.preheader85
  %53 = zext nneg i32 %10 to i64
  %54 = shl nuw nsw i64 %53, 3
  call void @llvm.memset.p0.i64(ptr align 8 %2, i8 0, i64 %54, i1 false), !tbaa !196
  br label %.preheader83

.preheader:                                       ; preds = %52
  br i1 %25, label %.lr.ph107, label %.loopexit

.lr.ph107:                                        ; preds = %.preheader
  %55 = getelementptr inbounds i8, ptr %7, i64 32
  %wide.trip.count132 = zext nneg i32 %10 to i64
  br label %56

56:                                               ; preds = %.lr.ph107, %56
  %indvars.iv129 = phi i64 [ 0, %.lr.ph107 ], [ %indvars.iv.next130, %56 ]
  %57 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %indvars.iv129) #8
  %58 = load double, ptr %57, align 8, !tbaa !196
  %59 = getelementptr inbounds double, ptr %2, i64 %indvars.iv129
  store double %58, ptr %59, align 8, !tbaa !196
  %indvars.iv.next130 = add nuw nsw i64 %indvars.iv129, 1
  %exitcond133.not = icmp eq i64 %indvars.iv.next130, %wide.trip.count132
  br i1 %exitcond133.not, label %.loopexit, label %56, !llvm.loop !200

.preheader83:                                     ; preds = %.lr.ph103.preheader, %.preheader85
  %60 = icmp sgt i32 %50, 0
  br i1 %60, label %.lr.ph105, label %.loopexit

.lr.ph105:                                        ; preds = %.preheader83
  %61 = getelementptr inbounds i8, ptr %7, i64 8
  %62 = getelementptr inbounds i8, ptr %7, i64 32
  br label %63

63:                                               ; preds = %.lr.ph105, %63
  %indvars.iv126 = phi i64 [ 0, %.lr.ph105 ], [ %indvars.iv.next127, %63 ]
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %indvars.iv126) #8
  %65 = load i32, ptr %64, align 4, !tbaa !197
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %66) #8
  %68 = load double, ptr %67, align 8, !tbaa !196
  %69 = getelementptr inbounds double, ptr %2, i64 %66
  store double %68, ptr %69, align 8, !tbaa !196
  %indvars.iv.next127 = add nuw nsw i64 %indvars.iv126, 1
  %70 = load i32, ptr %28, align 4, !tbaa !195
  %71 = sext i32 %70 to i64
  %72 = icmp slt i64 %indvars.iv.next127, %71
  br i1 %72, label %63, label %.loopexit, !llvm.loop !201

73:                                               ; preds = %48
  br i1 %51, label %.preheader86, label %.preheader89

.preheader89:                                     ; preds = %73
  br i1 %25, label %.lr.ph94.preheader, label %.preheader88

.lr.ph94.preheader:                               ; preds = %.preheader89
  %74 = zext nneg i32 %10 to i64
  %75 = shl nuw nsw i64 %74, 3
  call void @llvm.memset.p0.i64(ptr align 8 %2, i8 0, i64 %75, i1 false), !tbaa !196
  br label %.preheader88

.preheader86:                                     ; preds = %73
  br i1 %25, label %.lr.ph101, label %.loopexit

.lr.ph101:                                        ; preds = %.preheader86
  %76 = getelementptr inbounds i8, ptr %7, i64 32
  %wide.trip.count121 = zext nneg i32 %10 to i64
  br label %77

77:                                               ; preds = %.lr.ph101, %90
  %indvars.iv118 = phi i64 [ 0, %.lr.ph101 ], [ %indvars.iv.next119, %90 ]
  %.07199 = phi ptr [ null, %.lr.ph101 ], [ %.1, %90 ]
  %78 = getelementptr inbounds double, ptr %2, i64 %indvars.iv118
  store double 0.000000e+00, ptr %78, align 8, !tbaa !196
  %79 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %indvars.iv118) #8
  %80 = load double, ptr %79, align 8, !tbaa !196
  %81 = fcmp une double %80, 0.000000e+00
  br i1 %81, label %82, label %90

82:                                               ; preds = %77
  %83 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %indvars.iv118) #8
  %84 = load double, ptr %83, align 8, !tbaa !196
  store double %84, ptr %78, align 8, !tbaa !196
  %85 = getelementptr inbounds i8, ptr %.07199, i64 4
  %86 = load i32, ptr %.07199, align 4, !tbaa !197
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds i32, ptr %4, i64 %87
  %89 = trunc nuw nsw i64 %indvars.iv118 to i32
  store i32 %89, ptr %88, align 4, !tbaa !197
  br label %90

90:                                               ; preds = %77, %82
  %.1 = phi ptr [ %85, %82 ], [ %.07199, %77 ]
  %indvars.iv.next119 = add nuw nsw i64 %indvars.iv118, 1
  %exitcond122.not = icmp eq i64 %indvars.iv.next119, %wide.trip.count121
  br i1 %exitcond122.not, label %.loopexit, label %77, !llvm.loop !202

.preheader88:                                     ; preds = %.lr.ph94.preheader, %.preheader89
  %91 = icmp sgt i32 %50, 0
  br i1 %91, label %.lr.ph96, label %._crit_edge97

.lr.ph96:                                         ; preds = %.preheader88
  %92 = getelementptr inbounds i8, ptr %7, i64 8
  %93 = getelementptr inbounds i8, ptr %7, i64 32
  br label %94

._crit_edge97:                                    ; preds = %94, %.preheader88
  %.lcssa = phi i32 [ %50, %.preheader88 ], [ %102, %94 ]
  store i32 %.lcssa, ptr %3, align 4, !tbaa !197
  br label %.loopexit

94:                                               ; preds = %.lr.ph96, %94
  %indvars.iv115 = phi i64 [ 0, %.lr.ph96 ], [ %indvars.iv.next116, %94 ]
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %indvars.iv115) #8
  %96 = load i32, ptr %95, align 4, !tbaa !197
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %97) #8
  %99 = load double, ptr %98, align 8, !tbaa !196
  %100 = getelementptr inbounds double, ptr %2, i64 %97
  store double %99, ptr %100, align 8, !tbaa !196
  %101 = getelementptr inbounds i32, ptr %4, i64 %indvars.iv115
  store i32 %96, ptr %101, align 4, !tbaa !197
  %indvars.iv.next116 = add nuw nsw i64 %indvars.iv115, 1
  %102 = load i32, ptr %28, align 4, !tbaa !195
  %103 = sext i32 %102 to i64
  %104 = icmp slt i64 %indvars.iv.next116, %103
  br i1 %104, label %94, label %._crit_edge97, !llvm.loop !203

.loopexit:                                        ; preds = %90, %63, %56, %.preheader86, %.preheader83, %.preheader, %._crit_edge97
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %7) #8
  call void @llvm.lifetime.end.p0(i64 176, ptr nonnull %7) #8
  br label %106

105:                                              ; preds = %45, %29
  %.pn = phi { ptr, i32 } [ %46, %45 ], [ %30, %29 ]
  call void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176) %7) #8
  call void @llvm.lifetime.end.p0(i64 176, ptr nonnull %7) #8
  resume { ptr, i32 } %.pn

106:                                              ; preds = %6, %.loopexit
  ret i32 0
}

declare void @_ZN4HEkk27setNlaPointersForLpAndScaleERK7HighsLp(ptr noundef nonnull align 8 dereferenceable(14568), ptr noundef nonnull align 8 dereferenceable(920)) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11HVectorBaseIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #5 align 2

declare void @_ZN11HVectorBaseIdE5setupEi(ptr noundef nonnull align 8 dereferenceable(176), i32 noundef) local_unnamed_addr #4

declare void @_ZN11HVectorBaseIdE5clearEv(ptr noundef nonnull align 8 dereferenceable(176)) local_unnamed_addr #4

declare void @_ZN4HEkk5btranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568), ptr noundef nonnull align 8 dereferenceable(176), double noundef) local_unnamed_addr #4

declare void @_ZN4HEkk5ftranER11HVectorBaseIdEd(ptr noundef nonnull align 8 dereferenceable(14568), ptr noundef nonnull align 8 dereferenceable(176), double noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN11HVectorBaseIdED2Ev(ptr noundef nonnull align 8 dereferenceable(176)) unnamed_addr #5 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"_ZTS7HighsLp", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 32, !10, i64 56, !10, i64 80, !10, i64 104, !15, i64 128, !21, i64 240, !22, i64 248, !23, i64 256, !23, i64 288, !7, i64 320, !7, i64 324, !26, i64 328, !26, i64 352, !30, i64 376, !34, i64 400, !34, i64 456, !7, i64 512, !7, i64 516, !40, i64 520, !41, i64 592, !41, i64 593, !7, i64 596, !41, i64 600, !42, i64 608}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIdSaIdEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTS17HighsSparseMatrix", !16, i64 0, !7, i64 4, !7, i64 8, !17, i64 16, !17, i64 40, !17, i64 64, !10, i64 88}
!16 = !{!"_ZTS12MatrixFormat", !8, i64 0}
!17 = !{!"_ZTSSt6vectorIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!21 = !{!"_ZTS8ObjSense", !8, i64 0}
!22 = !{!"double", !8, i64 0}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !8, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!25 = !{!"long", !8, i64 0}
!26 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!30 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!34 = !{!"_ZTS13HighsNameHash", !35, i64 0}
!35 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !36, i64 0}
!36 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !14, i64 0, !25, i64 8, !37, i64 16, !25, i64 24, !38, i64 32, !14, i64 48}
!37 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !14, i64 0}
!38 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !39, i64 0, !25, i64 8}
!39 = !{!"float", !8, i64 0}
!40 = !{!"_ZTS10HighsScale", !7, i64 0, !41, i64 4, !7, i64 8, !7, i64 12, !22, i64 16, !10, i64 24, !10, i64 48}
!41 = !{!"bool", !8, i64 0}
!42 = !{!"_ZTS11HighsLpMods", !17, i64 0, !17, i64 24, !10, i64 48, !10, i64 72, !30, i64 96, !17, i64 120, !10, i64 144, !17, i64 168, !10, i64 192, !17, i64 216, !10, i64 240, !10, i64 264, !10, i64 288}
!43 = !{!44, !41, i64 14416}
!44 = !{!"_ZTS5Highs", !45, i64 8, !46, i64 112, !51, i64 208, !56, i64 312, !59, i64 1312, !56, i64 1336, !63, i64 2336, !64, i64 2472, !75, i64 2728, !82, i64 3752, !88, i64 3936, !90, i64 4520, !95, i64 4648, !99, i64 4672, !100, i64 4676, !41, i64 4680, !22, i64 4688, !10, i64 4696, !10, i64 4720, !15, i64 4744, !101, i64 4856, !165, i64 19424, !7, i64 19448, !41, i64 19452, !7, i64 19456, !41, i64 19460, !170, i64 19464}
!45 = !{!"_ZTS13HighsSolution", !41, i64 0, !41, i64 1, !10, i64 8, !10, i64 32, !10, i64 56, !10, i64 80}
!46 = !{!"_ZTS10HighsBasis", !41, i64 0, !41, i64 1, !41, i64 2, !41, i64 3, !7, i64 4, !7, i64 8, !23, i64 16, !47, i64 48, !47, i64 72}
!47 = !{!"_ZTSSt6vectorI16HighsBasisStatusSaIS0_EE", !48, i64 0}
!48 = !{!"_ZTSSt12_Vector_baseI16HighsBasisStatusSaIS0_EE", !49, i64 0}
!49 = !{!"_ZTSNSt12_Vector_baseI16HighsBasisStatusSaIS0_EE12_Vector_implE", !50, i64 0}
!50 = !{!"_ZTSNSt12_Vector_baseI16HighsBasisStatusSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!51 = !{!"_ZTS10ICrashInfo", !7, i64 0, !22, i64 8, !22, i64 16, !22, i64 24, !22, i64 32, !22, i64 40, !52, i64 48, !10, i64 72, !22, i64 96}
!52 = !{!"_ZTSSt6vectorI22ICrashIterationDetailsSaIS0_EE", !53, i64 0}
!53 = !{!"_ZTSSt12_Vector_baseI22ICrashIterationDetailsSaIS0_EE", !54, i64 0}
!54 = !{!"_ZTSNSt12_Vector_baseI22ICrashIterationDetailsSaIS0_EE12_Vector_implE", !55, i64 0}
!55 = !{!"_ZTSNSt12_Vector_baseI22ICrashIterationDetailsSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!56 = !{!"_ZTS10HighsModel", !6, i64 0, !57, i64 920}
!57 = !{!"_ZTS12HighsHessian", !7, i64 0, !58, i64 4, !17, i64 8, !17, i64 32, !10, i64 56}
!58 = !{!"_ZTS13HessianFormat", !8, i64 0}
!59 = !{!"_ZTSSt6vectorI20HighsLinearObjectiveSaIS0_EE", !60, i64 0}
!60 = !{!"_ZTSSt12_Vector_baseI20HighsLinearObjectiveSaIS0_EE", !61, i64 0}
!61 = !{!"_ZTSNSt12_Vector_baseI20HighsLinearObjectiveSaIS0_EE12_Vector_implE", !62, i64 0}
!62 = !{!"_ZTSNSt12_Vector_baseI20HighsLinearObjectiveSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!63 = !{!"_ZTS10HighsTimer", !22, i64 8, !7, i64 16, !17, i64 24, !10, i64 48, !10, i64 72, !26, i64 96, !7, i64 120, !7, i64 124, !7, i64 128}
!64 = !{!"_ZTS13HighsCallback", !65, i64 0, !14, i64 32, !14, i64 40, !67, i64 48, !73, i64 88, !74, i64 240}
!65 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !66, i64 0, !14, i64 24}
!66 = !{!"_ZTSSt14_Function_base", !8, i64 0, !14, i64 16}
!67 = !{!"_ZTSSt6vectorIbSaIbEE", !68, i64 0}
!68 = !{!"_ZTSSt13_Bvector_baseISaIbEE", !69, i64 0}
!69 = !{!"_ZTSNSt13_Bvector_baseISaIbEE13_Bvector_implE", !70, i64 0}
!70 = !{!"_ZTSNSt13_Bvector_baseISaIbEE18_Bvector_impl_dataE", !71, i64 0, !71, i64 16, !14, i64 32}
!71 = !{!"_ZTSSt13_Bit_iterator", !72, i64 0}
!72 = !{!"_ZTSSt18_Bit_iterator_base", !14, i64 0, !7, i64 8}
!73 = !{!"_ZTS20HighsCallbackDataOut", !7, i64 0, !22, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !22, i64 32, !25, i64 40, !25, i64 48, !22, i64 56, !22, i64 64, !22, i64 72, !14, i64 80, !7, i64 88, !7, i64 92, !7, i64 96, !14, i64 104, !14, i64 112, !14, i64 120, !14, i64 128, !14, i64 136, !7, i64 144}
!74 = !{!"_ZTS19HighsCallbackDataIn", !7, i64 0, !14, i64 8}
!75 = !{!"_ZTS12HighsOptions", !76, i64 0, !78, i64 992, !7, i64 1016}
!76 = !{!"_ZTS18HighsOptionsStruct", !23, i64 8, !23, i64 40, !23, i64 72, !23, i64 104, !22, i64 136, !23, i64 144, !23, i64 176, !7, i64 208, !23, i64 216, !22, i64 248, !22, i64 256, !22, i64 264, !22, i64 272, !22, i64 280, !22, i64 288, !22, i64 296, !22, i64 304, !22, i64 312, !22, i64 320, !22, i64 328, !7, i64 336, !7, i64 340, !7, i64 344, !7, i64 348, !7, i64 352, !7, i64 356, !7, i64 360, !7, i64 364, !7, i64 368, !7, i64 372, !7, i64 376, !7, i64 380, !7, i64 384, !7, i64 388, !23, i64 392, !41, i64 424, !41, i64 425, !41, i64 426, !7, i64 428, !7, i64 432, !23, i64 440, !41, i64 472, !41, i64 473, !41, i64 474, !7, i64 476, !41, i64 480, !41, i64 481, !7, i64 484, !7, i64 488, !22, i64 496, !7, i64 504, !7, i64 508, !7, i64 512, !41, i64 516, !7, i64 520, !41, i64 524, !41, i64 525, !41, i64 526, !41, i64 527, !41, i64 528, !41, i64 529, !41, i64 530, !7, i64 532, !7, i64 536, !7, i64 540, !7, i64 544, !7, i64 548, !7, i64 552, !7, i64 556, !7, i64 560, !7, i64 564, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !7, i64 588, !41, i64 592, !41, i64 593, !41, i64 594, !41, i64 595, !22, i64 600, !22, i64 608, !22, i64 616, !22, i64 624, !22, i64 632, !22, i64 640, !22, i64 648, !22, i64 656, !22, i64 664, !22, i64 672, !22, i64 680, !41, i64 688, !41, i64 689, !41, i64 690, !41, i64 691, !7, i64 692, !22, i64 696, !41, i64 704, !41, i64 705, !23, i64 712, !22, i64 744, !7, i64 752, !7, i64 756, !41, i64 760, !41, i64 761, !41, i64 762, !41, i64 763, !7, i64 764, !7, i64 768, !7, i64 772, !7, i64 776, !7, i64 780, !7, i64 784, !7, i64 788, !7, i64 792, !7, i64 796, !7, i64 800, !7, i64 804, !22, i64 808, !22, i64 816, !22, i64 824, !22, i64 832, !22, i64 840, !41, i64 848, !41, i64 849, !23, i64 856, !41, i64 888, !7, i64 892, !77, i64 896}
!77 = !{!"_ZTS15HighsLogOptions", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !65, i64 48, !14, i64 80, !41, i64 88}
!78 = !{!"_ZTSSt6vectorIP12OptionRecordSaIS1_EE", !79, i64 0}
!79 = !{!"_ZTSSt12_Vector_baseIP12OptionRecordSaIS1_EE", !80, i64 0}
!80 = !{!"_ZTSNSt12_Vector_baseIP12OptionRecordSaIS1_EE12_Vector_implE", !81, i64 0}
!81 = !{!"_ZTSNSt12_Vector_baseIP12OptionRecordSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!82 = !{!"_ZTS9HighsInfo", !83, i64 8, !84, i64 160}
!83 = !{!"_ZTS15HighsInfoStruct", !41, i64 0, !25, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !22, i64 48, !22, i64 56, !22, i64 64, !22, i64 72, !7, i64 80, !22, i64 88, !22, i64 96, !7, i64 104, !22, i64 112, !22, i64 120, !22, i64 128, !22, i64 136, !22, i64 144}
!84 = !{!"_ZTSSt6vectorIP10InfoRecordSaIS1_EE", !85, i64 0}
!85 = !{!"_ZTSSt12_Vector_baseIP10InfoRecordSaIS1_EE", !86, i64 0}
!86 = !{!"_ZTSNSt12_Vector_baseIP10InfoRecordSaIS1_EE12_Vector_implE", !87, i64 0}
!87 = !{!"_ZTSNSt12_Vector_baseIP10InfoRecordSaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!88 = !{!"_ZTS12HighsRanging", !41, i64 0, !89, i64 8, !89, i64 104, !89, i64 200, !89, i64 296, !89, i64 392, !89, i64 488}
!89 = !{!"_ZTS18HighsRangingRecord", !10, i64 0, !10, i64 24, !17, i64 48, !17, i64 72}
!90 = !{!"_ZTS8HighsIis", !41, i64 0, !7, i64 4, !17, i64 8, !17, i64 32, !17, i64 56, !17, i64 80, !91, i64 104}
!91 = !{!"_ZTSSt6vectorI12HighsIisInfoSaIS0_EE", !92, i64 0}
!92 = !{!"_ZTSSt12_Vector_baseI12HighsIisInfoSaIS0_EE", !93, i64 0}
!93 = !{!"_ZTSNSt12_Vector_baseI12HighsIisInfoSaIS0_EE12_Vector_implE", !94, i64 0}
!94 = !{!"_ZTSNSt12_Vector_baseI12HighsIisInfoSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!95 = !{!"_ZTSSt6vectorI22HighsObjectiveSolutionSaIS0_EE", !96, i64 0}
!96 = !{!"_ZTSSt12_Vector_baseI22HighsObjectiveSolutionSaIS0_EE", !97, i64 0}
!97 = !{!"_ZTSNSt12_Vector_baseI22HighsObjectiveSolutionSaIS0_EE12_Vector_implE", !98, i64 0}
!98 = !{!"_ZTSNSt12_Vector_baseI22HighsObjectiveSolutionSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!99 = !{!"_ZTS19HighsPresolveStatus", !8, i64 0}
!100 = !{!"_ZTS16HighsModelStatus", !8, i64 0}
!101 = !{!"_ZTS4HEkk", !14, i64 0, !14, i64 8, !14, i64 16, !102, i64 24, !6, i64 8600, !23, i64 9520, !119, i64 9552, !120, i64 9568, !100, i64 10608, !121, i64 10616, !126, i64 10736, !139, i64 10776, !10, i64 10784, !10, i64 10808, !41, i64 10832, !15, i64 10840, !15, i64 10952, !140, i64 11064, !157, i64 13928, !22, i64 14048, !22, i64 14056, !22, i64 14064, !7, i64 14072, !7, i64 14076, !7, i64 14080, !7, i64 14084, !41, i64 14088, !41, i64 14089, !158, i64 14092, !7, i64 14096, !7, i64 14100, !17, i64 14104, !10, i64 14128, !159, i64 14152, !159, i64 14184, !7, i64 14216, !7, i64 14220, !7, i64 14224, !22, i64 14232, !10, i64 14240, !10, i64 14264, !10, i64 14288, !10, i64 14312, !10, i64 14336, !17, i64 14360, !17, i64 14384, !22, i64 14408, !22, i64 14416, !22, i64 14424, !7, i64 14432, !7, i64 14436, !41, i64 14440, !7, i64 14444, !41, i64 14448, !41, i64 14449, !41, i64 14450, !41, i64 14451, !22, i64 14456, !160, i64 14464, !10, i64 14488, !164, i64 14512}
!102 = !{!"_ZTS20HighsSimplexAnalysis", !14, i64 0, !103, i64 8, !103, i64 32, !14, i64 56, !7, i64 64, !7, i64 68, !7, i64 72, !23, i64 80, !23, i64 112, !77, i64 144, !41, i64 240, !41, i64 241, !41, i64 242, !41, i64 243, !41, i64 244, !41, i64 245, !41, i64 246, !7, i64 248, !107, i64 252, !7, i64 256, !7, i64 260, !7, i64 264, !7, i64 268, !7, i64 272, !7, i64 276, !7, i64 280, !23, i64 288, !22, i64 320, !22, i64 328, !22, i64 336, !22, i64 344, !22, i64 352, !22, i64 360, !22, i64 368, !22, i64 376, !22, i64 384, !22, i64 392, !22, i64 400, !22, i64 408, !7, i64 416, !7, i64 420, !22, i64 424, !22, i64 432, !7, i64 440, !22, i64 448, !22, i64 456, !7, i64 464, !22, i64 472, !22, i64 480, !22, i64 488, !22, i64 496, !22, i64 504, !22, i64 512, !22, i64 520, !22, i64 528, !22, i64 536, !22, i64 544, !7, i64 552, !22, i64 560, !7, i64 568, !7, i64 572, !7, i64 576, !7, i64 580, !7, i64 584, !7, i64 588, !7, i64 592, !7, i64 596, !7, i64 600, !108, i64 608, !108, i64 760, !108, i64 912, !108, i64 1064, !108, i64 1216, !108, i64 1368, !108, i64 1520, !108, i64 1672, !108, i64 1824, !108, i64 1976, !7, i64 2128, !7, i64 2132, !7, i64 2136, !7, i64 2140, !22, i64 2144, !22, i64 2152, !7, i64 2160, !7, i64 2164, !7, i64 2168, !7, i64 2172, !7, i64 2176, !22, i64 2184, !22, i64 2192, !7, i64 2200, !22, i64 2208, !22, i64 2216, !7, i64 2224, !7, i64 2228, !22, i64 2232, !22, i64 2240, !10, i64 2248, !10, i64 2272, !10, i64 2296, !10, i64 2320, !109, i64 2344, !113, i64 2368, !7, i64 2376, !7, i64 2380, !7, i64 2384, !7, i64 2388, !22, i64 2392, !22, i64 2400, !22, i64 2408, !22, i64 2416, !22, i64 2424, !22, i64 2432, !22, i64 2440, !22, i64 2448, !22, i64 2456, !22, i64 2464, !7, i64 2472, !7, i64 2476, !22, i64 2480, !22, i64 2488, !22, i64 2496, !41, i64 2504, !22, i64 2512, !22, i64 2520, !7, i64 2528, !7, i64 2532, !7, i64 2536, !7, i64 2540, !7, i64 2544, !22, i64 2552, !22, i64 2560, !22, i64 2568, !22, i64 2576, !22, i64 2584, !22, i64 2592, !22, i64 2600, !22, i64 2608, !22, i64 2616, !7, i64 2624, !7, i64 2628, !8, i64 2632, !7, i64 4952, !7, i64 4956, !8, i64 4960, !8, i64 7600, !8, i64 7648, !108, i64 7664, !108, i64 7816, !108, i64 7968, !108, i64 8120, !108, i64 8272, !108, i64 8424}
!103 = !{!"_ZTSSt6vectorI15HighsTimerClockSaIS0_EE", !104, i64 0}
!104 = !{!"_ZTSSt12_Vector_baseI15HighsTimerClockSaIS0_EE", !105, i64 0}
!105 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE12_Vector_implE", !106, i64 0}
!106 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!107 = !{!"_ZTS14EdgeWeightMode", !8, i64 0}
!108 = !{!"_ZTS22HighsValueDistribution", !23, i64 0, !23, i64 32, !7, i64 64, !7, i64 68, !7, i64 72, !22, i64 80, !22, i64 88, !10, i64 96, !17, i64 120, !7, i64 144}
!109 = !{!"_ZTSSt6vectorI17TranStageAnalysisSaIS0_EE", !110, i64 0}
!110 = !{!"_ZTSSt12_Vector_baseI17TranStageAnalysisSaIS0_EE", !111, i64 0}
!111 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE12_Vector_implE", !112, i64 0}
!112 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!113 = !{!"_ZTSSt10unique_ptrINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !114, i64 0}
!114 = !{!"_ZTSSt15__uniq_ptr_dataINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_ELb1ELb1EE", !115, i64 0}
!115 = !{!"_ZTSSt15__uniq_ptr_implINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !116, i64 0}
!116 = !{!"_ZTSSt5tupleIJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !117, i64 0}
!117 = !{!"_ZTSSt11_Tuple_implILm0EJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !118, i64 0}
!118 = !{!"_ZTSSt10_Head_baseILm0EPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEELb0EE", !14, i64 0}
!119 = !{!"_ZTS18HighsSimplexStatus", !41, i64 0, !41, i64 1, !41, i64 2, !41, i64 3, !41, i64 4, !41, i64 5, !41, i64 6, !41, i64 7, !41, i64 8, !41, i64 9, !41, i64 10, !41, i64 11, !41, i64 12}
!120 = !{!"_ZTS16HighsSimplexInfo", !10, i64 0, !10, i64 24, !10, i64 48, !10, i64 72, !10, i64 96, !10, i64 120, !10, i64 144, !10, i64 168, !10, i64 192, !10, i64 216, !10, i64 240, !10, i64 264, !10, i64 288, !17, i64 312, !17, i64 336, !17, i64 360, !17, i64 384, !10, i64 408, !7, i64 432, !7, i64 436, !41, i64 440, !41, i64 441, !121, i64 448, !7, i64 568, !7, i64 572, !7, i64 576, !10, i64 584, !10, i64 608, !10, i64 632, !10, i64 656, !7, i64 680, !7, i64 684, !7, i64 688, !7, i64 692, !22, i64 696, !22, i64 704, !22, i64 712, !22, i64 720, !7, i64 728, !7, i64 732, !22, i64 736, !22, i64 744, !22, i64 752, !22, i64 760, !22, i64 768, !22, i64 776, !22, i64 784, !22, i64 792, !22, i64 800, !22, i64 808, !41, i64 816, !22, i64 824, !22, i64 832, !7, i64 840, !22, i64 848, !22, i64 856, !22, i64 864, !41, i64 872, !41, i64 873, !41, i64 874, !41, i64 875, !41, i64 876, !41, i64 877, !41, i64 878, !41, i64 879, !41, i64 880, !41, i64 881, !41, i64 882, !41, i64 883, !41, i64 884, !41, i64 885, !41, i64 886, !7, i64 888, !22, i64 896, !22, i64 904, !7, i64 912, !22, i64 920, !22, i64 928, !7, i64 936, !7, i64 940, !7, i64 944, !7, i64 948, !7, i64 952, !7, i64 956, !7, i64 960, !7, i64 964, !7, i64 968, !7, i64 972, !7, i64 976, !7, i64 980, !7, i64 984, !7, i64 988, !7, i64 992, !7, i64 996, !22, i64 1000, !22, i64 1008, !22, i64 1016, !22, i64 1024, !7, i64 1032}
!121 = !{!"_ZTS12SimplexBasis", !17, i64 0, !122, i64 24, !122, i64 48, !25, i64 72, !7, i64 80, !7, i64 84, !23, i64 88}
!122 = !{!"_ZTSSt6vectorIaSaIaEE", !123, i64 0}
!123 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !124, i64 0}
!124 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !125, i64 0}
!125 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!126 = !{!"_ZTS14HighsHashTableImvE", !127, i64 0, !133, i64 8, !25, i64 16, !25, i64 24, !25, i64 32}
!127 = !{!"_ZTSSt10unique_ptrI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !128, i64 0}
!128 = !{!"_ZTSSt15__uniq_ptr_dataI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterELb1ELb1EE", !129, i64 0}
!129 = !{!"_ZTSSt15__uniq_ptr_implI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !130, i64 0}
!130 = !{!"_ZTSSt5tupleIJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !131, i64 0}
!131 = !{!"_ZTSSt11_Tuple_implILm0EJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !132, i64 0}
!132 = !{!"_ZTSSt10_Head_baseILm0EP19HighsHashTableEntryImvELb0EE", !14, i64 0}
!133 = !{!"_ZTSSt10unique_ptrIA_hSt14default_deleteIS0_EE", !134, i64 0}
!134 = !{!"_ZTSSt15__uniq_ptr_dataIhSt14default_deleteIA_hELb1ELb1EE", !135, i64 0}
!135 = !{!"_ZTSSt15__uniq_ptr_implIhSt14default_deleteIA_hEE", !136, i64 0}
!136 = !{!"_ZTSSt5tupleIJPhSt14default_deleteIA_hEEE", !137, i64 0}
!137 = !{!"_ZTSSt11_Tuple_implILm0EJPhSt14default_deleteIA_hEEE", !138, i64 0}
!138 = !{!"_ZTSSt10_Head_baseILm0EPhLb0EE", !14, i64 0}
!139 = !{!"_ZTS11HighsRandom", !25, i64 0}
!140 = !{!"_ZTS11HSimplexNla", !14, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !14, i64 32, !14, i64 40, !141, i64 48, !41, i64 1960, !22, i64 1968, !154, i64 1976, !155, i64 2112}
!141 = !{!"_ZTS7HFactor", !22, i64 0, !22, i64 8, !7, i64 16, !17, i64 24, !17, i64 48, !17, i64 72, !142, i64 96, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204, !7, i64 208, !22, i64 216, !41, i64 224, !14, i64 232, !14, i64 240, !14, i64 248, !14, i64 256, !22, i64 264, !22, i64 272, !7, i64 280, !22, i64 288, !143, i64 296, !77, i64 304, !41, i64 400, !41, i64 401, !7, i64 404, !7, i64 408, !14, i64 416, !7, i64 424, !17, i64 432, !10, i64 456, !17, i64 480, !17, i64 504, !17, i64 528, !10, i64 552, !17, i64 576, !17, i64 600, !17, i64 624, !17, i64 648, !17, i64 672, !17, i64 696, !17, i64 720, !10, i64 744, !10, i64 768, !17, i64 792, !17, i64 816, !17, i64 840, !17, i64 864, !17, i64 888, !17, i64 912, !149, i64 936, !10, i64 960, !17, i64 984, !17, i64 1008, !17, i64 1032, !17, i64 1056, !17, i64 1080, !17, i64 1104, !17, i64 1128, !17, i64 1152, !17, i64 1176, !17, i64 1200, !10, i64 1224, !17, i64 1248, !17, i64 1272, !10, i64 1296, !17, i64 1320, !17, i64 1344, !10, i64 1368, !7, i64 1392, !7, i64 1396, !17, i64 1400, !17, i64 1424, !17, i64 1448, !10, i64 1472, !17, i64 1496, !17, i64 1520, !17, i64 1544, !17, i64 1568, !10, i64 1592, !10, i64 1616, !17, i64 1640, !17, i64 1664, !17, i64 1688, !10, i64 1712, !153, i64 1736}
!142 = !{!"_ZTS12RefactorInfo", !41, i64 0, !17, i64 8, !17, i64 32, !122, i64 56, !22, i64 80}
!143 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !144, i64 0}
!144 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !145, i64 0}
!145 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !146, i64 0}
!146 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !147, i64 0}
!147 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !148, i64 0}
!148 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !14, i64 0}
!149 = !{!"_ZTSSt6vectorIcSaIcEE", !150, i64 0}
!150 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !151, i64 0}
!151 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !152, i64 0}
!152 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!153 = !{!"_ZTS11HVectorBaseIdE", !7, i64 0, !7, i64 4, !17, i64 8, !10, i64 32, !22, i64 56, !149, i64 64, !17, i64 88, !14, i64 112, !41, i64 120, !7, i64 124, !17, i64 128, !10, i64 152}
!154 = !{!"_ZTS17ProductFormUpdate", !41, i64 0, !7, i64 4, !7, i64 8, !17, i64 16, !10, i64 40, !17, i64 64, !17, i64 88, !10, i64 112}
!155 = !{!"_ZTS14SimplexIterate", !41, i64 0, !121, i64 8, !156, i64 128, !10, i64 728}
!156 = !{!"_ZTS24InvertibleRepresentation", !17, i64 0, !17, i64 24, !17, i64 48, !17, i64 72, !10, i64 96, !17, i64 120, !17, i64 144, !10, i64 168, !17, i64 192, !17, i64 216, !10, i64 240, !17, i64 264, !17, i64 288, !17, i64 312, !10, i64 336, !17, i64 360, !17, i64 384, !17, i64 408, !17, i64 432, !10, i64 456, !17, i64 480, !17, i64 504, !10, i64 528, !17, i64 552, !10, i64 576}
!157 = !{!"_ZTS8HotStart", !41, i64 0, !142, i64 8, !122, i64 96}
!158 = !{!"_ZTS16SimplexAlgorithm", !8, i64 0}
!159 = !{!"_ZTS14HighsRayRecord", !7, i64 0, !7, i64 4, !10, i64 8}
!160 = !{!"_ZTSSt6vectorI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !161, i64 0}
!161 = !{!"_ZTSSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !162, i64 0}
!162 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE12_Vector_implE", !163, i64 0}
!163 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!164 = !{!"_ZTS17HighsSimplexStats", !41, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !22, i64 24, !22, i64 32, !22, i64 40, !22, i64 48}
!165 = !{!"_ZTS16HighsPresolveLog", !166, i64 0}
!166 = !{!"_ZTSSt6vectorI20HighsPresolveRuleLogSaIS0_EE", !167, i64 0}
!167 = !{!"_ZTSSt12_Vector_baseI20HighsPresolveRuleLogSaIS0_EE", !168, i64 0}
!168 = !{!"_ZTSNSt12_Vector_baseI20HighsPresolveRuleLogSaIS0_EE12_Vector_implE", !169, i64 0}
!169 = !{!"_ZTSNSt12_Vector_baseI20HighsPresolveRuleLogSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!170 = !{!"_ZTS17PresolveComponent", !171, i64 0, !175, i64 16, !176, i64 56, !14, i64 1440, !14, i64 1448, !99, i64 1456, !191, i64 1460}
!171 = !{!"_ZTS14HighsComponent", !172, i64 8, !173, i64 9, !174, i64 10}
!172 = !{!"_ZTS18HighsComponentInfo", !41, i64 0}
!173 = !{!"_ZTS18HighsComponentData", !41, i64 0}
!174 = !{!"_ZTS21HighsComponentOptions", !41, i64 0}
!175 = !{!"_ZTS21PresolveComponentInfo", !172, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !22, i64 24, !22, i64 32}
!176 = !{!"_ZTS21PresolveComponentData", !173, i64 8, !6, i64 16, !177, i64 936, !45, i64 1160, !46, i64 1264, !165, i64 1360}
!177 = !{!"_ZTSN8presolve19HighsPostsolveStackE", !25, i64 0, !22, i64 8, !22, i64 16, !22, i64 24, !22, i64 32, !178, i64 40, !179, i64 72, !17, i64 96, !17, i64 120, !183, i64 144, !187, i64 168, !187, i64 192, !7, i64 216, !7, i64 220}
!178 = !{!"_ZTS14HighsDataStack", !149, i64 0, !25, i64 24}
!179 = !{!"_ZTSSt6vectorISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE", !180, i64 0}
!180 = !{!"_ZTSSt12_Vector_baseISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE", !181, i64 0}
!181 = !{!"_ZTSNSt12_Vector_baseISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE12_Vector_implE", !182, i64 0}
!182 = !{!"_ZTSNSt12_Vector_baseISt4pairIN8presolve19HighsPostsolveStack13ReductionTypeEmESaIS4_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!183 = !{!"_ZTSSt6vectorIhSaIhEE", !184, i64 0}
!184 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !185, i64 0}
!185 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !186, i64 0}
!186 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!187 = !{!"_ZTSSt6vectorIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE", !188, i64 0}
!188 = !{!"_ZTSSt12_Vector_baseIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE", !189, i64 0}
!189 = !{!"_ZTSNSt12_Vector_baseIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE12_Vector_implE", !190, i64 0}
!190 = !{!"_ZTSNSt12_Vector_baseIN8presolve19HighsPostsolveStack7NonzeroESaIS2_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!191 = !{!"_ZTS20HighsPostsolveStatus", !8, i64 0}
!192 = !{i8 0, i8 2}
!193 = !{}
!194 = !{!6, !41, i64 593}
!195 = !{!153, !7, i64 4}
!196 = !{!22, !22, i64 0}
!197 = !{!7, !7, i64 0}
!198 = distinct !{!198, !199}
!199 = !{!"llvm.loop.mustprogress"}
!200 = distinct !{!200, !199}
!201 = distinct !{!201, !199}
!202 = distinct !{!202, !199}
!203 = distinct !{!203, !199}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass