; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/InterpolationFunctions (arm_bilinear_interp_f32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_bilinear_interp_instance_f32 = type { i16, i16, ptr }

; Function Attrs: nounwind uwtable
define dso_local float @arm_bilinear_interp_f32(ptr noundef %0, float noundef %1, float noundef %2) #0 {
  %4 = alloca float, align 4
  %5 = alloca ptr, align 8
  %6 = alloca float, align 4
  %7 = alloca float, align 4
  %8 = alloca float, align 4
  %9 = alloca float, align 4
  %10 = alloca float, align 4
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca float, align 4
  %18 = alloca float, align 4
  %19 = alloca float, align 4
  %20 = alloca float, align 4
  %21 = alloca float, align 4
  %22 = alloca float, align 4
  %23 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store float %1, ptr %6, align 4, !tbaa !9
  store float %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.arm_bilinear_interp_instance_f32, ptr %24, i32 0, i32 2
  %26 = load ptr, ptr %25, align 8, !tbaa !11
  store ptr %26, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  %27 = load float, ptr %6, align 4, !tbaa !9
  %28 = fptosi float %27 to i32
  store i32 %28, ptr %14, align 4, !tbaa !14
  %29 = load float, ptr %7, align 4, !tbaa !9
  %30 = fptosi float %29 to i32
  store i32 %30, ptr %15, align 4, !tbaa !14
  %31 = load i32, ptr %14, align 4, !tbaa !14
  %32 = icmp slt i32 %31, 0
  br i1 %32, label %52, label %33

33:                                               ; preds = %3
  %34 = load i32, ptr %14, align 4, !tbaa !14
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.arm_bilinear_interp_instance_f32, ptr %35, i32 0, i32 1
  %37 = load i16, ptr %36, align 2, !tbaa !16
  %38 = zext i16 %37 to i32
  %39 = sub nsw i32 %38, 2
  %40 = icmp sgt i32 %34, %39
  br i1 %40, label %52, label %41

41:                                               ; preds = %33
  %42 = load i32, ptr %15, align 4, !tbaa !14
  %43 = icmp slt i32 %42, 0
  br i1 %43, label %52, label %44

44:                                               ; preds = %41
  %45 = load i32, ptr %15, align 4, !tbaa !14
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.arm_bilinear_interp_instance_f32, ptr %46, i32 0, i32 0
  %48 = load i16, ptr %47, align 8, !tbaa !17
  %49 = zext i16 %48 to i32
  %50 = sub nsw i32 %49, 2
  %51 = icmp sgt i32 %45, %50
  br i1 %51, label %52, label %53

52:                                               ; preds = %44, %41, %33, %3
  store float 0.000000e+00, ptr %4, align 4
  store i32 1, ptr %23, align 4
  br label %128

53:                                               ; preds = %44
  %54 = load i32, ptr %14, align 4, !tbaa !14
  %55 = load i32, ptr %15, align 4, !tbaa !14
  %56 = load ptr, ptr %5, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.arm_bilinear_interp_instance_f32, ptr %56, i32 0, i32 1
  %58 = load i16, ptr %57, align 2, !tbaa !16
  %59 = zext i16 %58 to i32
  %60 = mul nsw i32 %55, %59
  %61 = add nsw i32 %54, %60
  store i32 %61, ptr %16, align 4, !tbaa !14
  %62 = load ptr, ptr %13, align 8, !tbaa !5
  %63 = load i32, ptr %16, align 4, !tbaa !14
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds float, ptr %62, i64 %64
  %66 = load float, ptr %65, align 4, !tbaa !9
  store float %66, ptr %9, align 4, !tbaa !9
  %67 = load ptr, ptr %13, align 8, !tbaa !5
  %68 = load i32, ptr %16, align 4, !tbaa !14
  %69 = add nsw i32 %68, 1
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds float, ptr %67, i64 %70
  %72 = load float, ptr %71, align 4, !tbaa !9
  store float %72, ptr %10, align 4, !tbaa !9
  %73 = load i32, ptr %14, align 4, !tbaa !14
  %74 = load i32, ptr %15, align 4, !tbaa !14
  %75 = add nsw i32 %74, 1
  %76 = load ptr, ptr %5, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.arm_bilinear_interp_instance_f32, ptr %76, i32 0, i32 1
  %78 = load i16, ptr %77, align 2, !tbaa !16
  %79 = zext i16 %78 to i32
  %80 = mul nsw i32 %75, %79
  %81 = add nsw i32 %73, %80
  store i32 %81, ptr %16, align 4, !tbaa !14
  %82 = load ptr, ptr %13, align 8, !tbaa !5
  %83 = load i32, ptr %16, align 4, !tbaa !14
  %84 = sext i32 %83 to i64
  %85 = getelementptr inbounds float, ptr %82, i64 %84
  %86 = load float, ptr %85, align 4, !tbaa !9
  store float %86, ptr %11, align 4, !tbaa !9
  %87 = load ptr, ptr %13, align 8, !tbaa !5
  %88 = load i32, ptr %16, align 4, !tbaa !14
  %89 = add nsw i32 %88, 1
  %90 = sext i32 %89 to i64
  %91 = getelementptr inbounds float, ptr %87, i64 %90
  %92 = load float, ptr %91, align 4, !tbaa !9
  store float %92, ptr %12, align 4, !tbaa !9
  %93 = load float, ptr %9, align 4, !tbaa !9
  store float %93, ptr %19, align 4, !tbaa !9
  %94 = load float, ptr %10, align 4, !tbaa !9
  %95 = load float, ptr %9, align 4, !tbaa !9
  %96 = fsub float %94, %95
  store float %96, ptr %20, align 4, !tbaa !9
  %97 = load float, ptr %11, align 4, !tbaa !9
  %98 = load float, ptr %9, align 4, !tbaa !9
  %99 = fsub float %97, %98
  store float %99, ptr %21, align 4, !tbaa !9
  %100 = load float, ptr %9, align 4, !tbaa !9
  %101 = load float, ptr %10, align 4, !tbaa !9
  %102 = fsub float %100, %101
  %103 = load float, ptr %11, align 4, !tbaa !9
  %104 = fsub float %102, %103
  %105 = load float, ptr %12, align 4, !tbaa !9
  %106 = fadd float %104, %105
  store float %106, ptr %22, align 4, !tbaa !9
  %107 = load float, ptr %6, align 4, !tbaa !9
  %108 = load i32, ptr %14, align 4, !tbaa !14
  %109 = sitofp i32 %108 to float
  %110 = fsub float %107, %109
  store float %110, ptr %17, align 4, !tbaa !9
  %111 = load float, ptr %7, align 4, !tbaa !9
  %112 = load i32, ptr %15, align 4, !tbaa !14
  %113 = sitofp i32 %112 to float
  %114 = fsub float %111, %113
  store float %114, ptr %18, align 4, !tbaa !9
  %115 = load float, ptr %19, align 4, !tbaa !9
  %116 = load float, ptr %20, align 4, !tbaa !9
  %117 = load float, ptr %17, align 4, !tbaa !9
  %118 = call float @llvm.fmuladd.f32(float %116, float %117, float %115)
  %119 = load float, ptr %21, align 4, !tbaa !9
  %120 = load float, ptr %18, align 4, !tbaa !9
  %121 = call float @llvm.fmuladd.f32(float %119, float %120, float %118)
  %122 = load float, ptr %22, align 4, !tbaa !9
  %123 = load float, ptr %17, align 4, !tbaa !9
  %124 = fmul float %122, %123
  %125 = load float, ptr %18, align 4, !tbaa !9
  %126 = call float @llvm.fmuladd.f32(float %124, float %125, float %121)
  store float %126, ptr %8, align 4, !tbaa !9
  %127 = load float, ptr %8, align 4, !tbaa !9
  store float %127, ptr %4, align 4
  store i32 1, ptr %23, align 4
  br label %128

128:                                              ; preds = %53, %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %129 = load float, ptr %4, align 4
  ret float %129
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"", !13, i64 0, !13, i64 2, !6, i64 8}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!12, !13, i64 2}
!17 = !{!12, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local float @arm_bilinear_interp_f32(ptr nocapture noundef readonly %0, float noundef %1, float noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %6 = fptosi float %1 to i32
  %7 = fptosi float %2 to i32
  %8 = icmp slt i32 %6, 0
  br i1 %8, label %50, label %9

9:                                                ; preds = %3
  %10 = getelementptr inbounds i8, ptr %0, i64 2
  %11 = load i16, ptr %10, align 2, !tbaa !11
  %12 = zext i16 %11 to i32
  %13 = add nsw i32 %12, -2
  %14 = icmp slt i32 %13, %6
  %15 = icmp slt i32 %7, 0
  %or.cond = select i1 %14, i1 true, i1 %15
  br i1 %or.cond, label %50, label %16

16:                                               ; preds = %9
  %17 = load i16, ptr %0, align 8, !tbaa !12
  %18 = zext i16 %17 to i32
  %19 = add nsw i32 %18, -2
  %20 = icmp slt i32 %19, %7
  br i1 %20, label %50, label %21

21:                                               ; preds = %16
  %22 = mul nuw nsw i32 %12, %7
  %23 = add nuw nsw i32 %22, %6
  %24 = zext nneg i32 %23 to i64
  %25 = getelementptr inbounds float, ptr %5, i64 %24
  %26 = load float, ptr %25, align 4, !tbaa !13
  %27 = getelementptr inbounds i8, ptr %25, i64 4
  %28 = load float, ptr %27, align 4, !tbaa !13
  %29 = add nuw nsw i32 %7, 1
  %30 = mul nuw nsw i32 %29, %12
  %31 = add nuw nsw i32 %30, %6
  %32 = zext nneg i32 %31 to i64
  %33 = getelementptr inbounds float, ptr %5, i64 %32
  %34 = load float, ptr %33, align 4, !tbaa !13
  %35 = getelementptr inbounds i8, ptr %33, i64 4
  %36 = load float, ptr %35, align 4, !tbaa !13
  %37 = fsub float %28, %26
  %38 = fsub float %34, %26
  %39 = fsub float %26, %28
  %40 = fsub float %39, %34
  %41 = fadd float %40, %36
  %42 = uitofp nneg i32 %6 to float
  %43 = fsub float %1, %42
  %44 = uitofp nneg i32 %7 to float
  %45 = fsub float %2, %44
  %46 = tail call float @llvm.fmuladd.f32(float %37, float %43, float %26)
  %47 = tail call float @llvm.fmuladd.f32(float %38, float %45, float %46)
  %48 = fmul float %43, %41
  %49 = tail call float @llvm.fmuladd.f32(float %48, float %45, float %47)
  br label %50

50:                                               ; preds = %3, %9, %16, %21
  %.0 = phi float [ %49, %21 ], [ 0.000000e+00, %16 ], [ 0.000000e+00, %9 ], [ 0.000000e+00, %3 ]
  ret float %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 2, !10, i64 8}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 2}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"float", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass