; LLVM IR from ARM-software/Arm-2D :: Acceleration/Arm/ACI/arm_2d_rgb565_aci_fvp_plugin (arm_2d_rgb565_aci_fvp)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z23arm_pack_rgb16_uint16x2PtS_PKtS1_b(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i1 noundef zeroext %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  %12 = alloca i16, align 2
  %13 = alloca i16, align 2
  %14 = alloca i16, align 2
  %15 = alloca i16, align 2
  %16 = alloca i16, align 2
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  %17 = zext i1 %4 to i8
  store i8 %17, ptr %10, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #2
  store i16 248, ptr %12, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #2
  store i16 252, ptr %13, align 2, !tbaa !11
  store i32 2, ptr %11, align 4, !tbaa !13
  br label %18

18:                                               ; preds = %70, %5
  call void @llvm.lifetime.start.p0(i64 2, ptr %14) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %15) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %16) #2
  %19 = load ptr, ptr %9, align 8, !tbaa !5
  %20 = load i16, ptr %19, align 2, !tbaa !11
  store i16 %20, ptr %14, align 2, !tbaa !11
  %21 = load ptr, ptr %8, align 8, !tbaa !5
  %22 = load i16, ptr %21, align 2, !tbaa !11
  store i16 %22, ptr %16, align 2, !tbaa !11
  %23 = load ptr, ptr %7, align 8, !tbaa !5
  %24 = load i16, ptr %23, align 2, !tbaa !11
  store i16 %24, ptr %15, align 2, !tbaa !11
  %25 = load i8, ptr %10, align 1, !tbaa !9, !range !15, !noundef !16
  %26 = trunc i8 %25 to i1
  br i1 %26, label %40, label %27

27:                                               ; preds = %18
  %28 = load i16, ptr %14, align 2, !tbaa !11
  %29 = zext i16 %28 to i32
  %30 = ashr i32 %29, 8
  %31 = trunc i32 %30 to i16
  store i16 %31, ptr %14, align 2, !tbaa !11
  %32 = load i16, ptr %16, align 2, !tbaa !11
  %33 = zext i16 %32 to i32
  %34 = ashr i32 %33, 8
  %35 = trunc i32 %34 to i16
  store i16 %35, ptr %16, align 2, !tbaa !11
  %36 = load i16, ptr %15, align 2, !tbaa !11
  %37 = zext i16 %36 to i32
  %38 = ashr i32 %37, 8
  %39 = trunc i32 %38 to i16
  store i16 %39, ptr %15, align 2, !tbaa !11
  br label %40

40:                                               ; preds = %27, %18
  %41 = load i16, ptr %15, align 2, !tbaa !11
  %42 = zext i16 %41 to i32
  %43 = ashr i32 %42, 3
  %44 = load i16, ptr %16, align 2, !tbaa !11
  %45 = zext i16 %44 to i32
  %46 = load i16, ptr %13, align 2, !tbaa !11
  %47 = zext i16 %46 to i32
  %48 = and i32 %45, %47
  %49 = shl i32 %48, 3
  %50 = or i32 %43, %49
  %51 = load i16, ptr %14, align 2, !tbaa !11
  %52 = zext i16 %51 to i32
  %53 = load i16, ptr %12, align 2, !tbaa !11
  %54 = zext i16 %53 to i32
  %55 = and i32 %52, %54
  %56 = shl i32 %55, 8
  %57 = or i32 %50, %56
  %58 = trunc i32 %57 to i16
  %59 = load ptr, ptr %6, align 8, !tbaa !5
  store i16 %58, ptr %59, align 2, !tbaa !11
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds i16, ptr %60, i32 1
  store ptr %61, ptr %6, align 8, !tbaa !5
  %62 = load ptr, ptr %9, align 8, !tbaa !5
  %63 = getelementptr inbounds i16, ptr %62, i32 1
  store ptr %63, ptr %9, align 8, !tbaa !5
  %64 = load ptr, ptr %8, align 8, !tbaa !5
  %65 = getelementptr inbounds i16, ptr %64, i32 1
  store ptr %65, ptr %8, align 8, !tbaa !5
  %66 = load ptr, ptr %7, align 8, !tbaa !5
  %67 = getelementptr inbounds i16, ptr %66, i32 1
  store ptr %67, ptr %7, align 8, !tbaa !5
  %68 = load i32, ptr %11, align 4, !tbaa !13
  %69 = sub nsw i32 %68, 1
  store i32 %69, ptr %11, align 4, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 2, ptr %16) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %14) #2
  br label %70

70:                                               ; preds = %40
  %71 = load i32, ptr %11, align 4, !tbaa !13
  %72 = icmp sgt i32 %71, 0
  br i1 %72, label %18, label %73, !llvm.loop !17

73:                                               ; preds = %70
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_Z23arm_pack_rgb16_uint16x2PtS_PKtS1_b(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3, i1 noundef zeroext %4) local_unnamed_addr #0 {
  %6 = load i16, ptr %3, align 2, !tbaa !5
  %7 = load i16, ptr %2, align 2, !tbaa !5
  %8 = load i16, ptr %1, align 2, !tbaa !5
  br i1 %4, label %.split.us.preheader, label %.split.preheader

.split.preheader:                                 ; preds = %5
  %9 = lshr i16 %8, 11
  %10 = lshr i16 %7, 5
  %11 = and i16 %10, 2016
  %12 = and i16 %6, -2048
  %13 = or disjoint i16 %11, %12
  %14 = or disjoint i16 %13, %9
  store i16 %14, ptr %0, align 2, !tbaa !5
  %15 = getelementptr inbounds i8, ptr %3, i64 2
  %16 = getelementptr inbounds i8, ptr %2, i64 2
  %17 = getelementptr inbounds i8, ptr %1, i64 2
  %18 = load i16, ptr %15, align 2, !tbaa !5
  %19 = load i16, ptr %16, align 2, !tbaa !5
  %20 = load i16, ptr %17, align 2, !tbaa !5
  %21 = lshr i16 %20, 11
  %22 = lshr i16 %19, 5
  br label %.split27.us

.split.us.preheader:                              ; preds = %5
  %23 = lshr i16 %8, 3
  %24 = shl i16 %7, 3
  %25 = and i16 %24, 2016
  %26 = shl i16 %6, 8
  %27 = and i16 %26, -2048
  %28 = or disjoint i16 %25, %27
  %29 = or i16 %28, %23
  store i16 %29, ptr %0, align 2, !tbaa !5
  %30 = getelementptr inbounds i8, ptr %3, i64 2
  %31 = getelementptr inbounds i8, ptr %2, i64 2
  %32 = getelementptr inbounds i8, ptr %1, i64 2
  %33 = load i16, ptr %30, align 2, !tbaa !5
  %34 = load i16, ptr %31, align 2, !tbaa !5
  %35 = load i16, ptr %32, align 2, !tbaa !5
  %36 = lshr i16 %35, 3
  %37 = shl i16 %34, 3
  %38 = shl i16 %33, 8
  br label %.split27.us

.split27.us:                                      ; preds = %.split.preheader, %.split.us.preheader
  %.sink33 = phi i16 [ %18, %.split.preheader ], [ %38, %.split.us.preheader ]
  %.sink.in = phi i16 [ %22, %.split.preheader ], [ %37, %.split.us.preheader ]
  %.sink31 = phi i16 [ %21, %.split.preheader ], [ %36, %.split.us.preheader ]
  %.sink29 = getelementptr inbounds i8, ptr %0, i64 2
  %.sink = and i16 %.sink.in, 2016
  %39 = and i16 %.sink33, -2048
  %40 = or disjoint i16 %.sink, %39
  %41 = or i16 %40, %.sink31
  store i16 %41, ptr %.sink29, align 2, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LoopInstSimplifyPass,LoopSimplifyCFGPass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass