; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d_transform)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_location_t = type { i16, i16 }
%struct.arm_2d_point_float_t = type { float, float }

; Function Attrs: nounwind uwtable
declare dso_local i32 @arm_2dp_cccn888_tile_transform_xy_with_src_mask_prepare(ptr noundef, ptr noundef nonnull, ptr noundef nonnull, <2 x float>, float noundef, float noundef, float noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_tile_transform_with_src_mask_prepare(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, i32 %3, float noundef %4, float noundef %5) #0 {
  %7 = alloca %struct.arm_2d_location_t, align 2
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  %13 = alloca %struct.arm_2d_point_float_t, align 4
  store i32 %3, ptr %7, align 2
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store float %4, ptr %11, align 4, !tbaa !9
  store float %5, ptr %12, align 4, !tbaa !9
  %14 = load ptr, ptr %8, align 8, !tbaa !5
  %15 = load ptr, ptr %9, align 8, !tbaa !5
  %16 = load ptr, ptr %10, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.arm_2d_point_float_t, ptr %13, i32 0, i32 0
  %18 = getelementptr inbounds %struct.arm_2d_location_t, ptr %7, i32 0, i32 0
  %19 = load i16, ptr %18, align 2, !tbaa !11
  %20 = sitofp i16 %19 to float
  store float %20, ptr %17, align 4, !tbaa !14
  %21 = getelementptr inbounds %struct.arm_2d_point_float_t, ptr %13, i32 0, i32 1
  %22 = getelementptr inbounds %struct.arm_2d_location_t, ptr %7, i32 0, i32 1
  %23 = load i16, ptr %22, align 2, !tbaa !16
  %24 = sitofp i16 %23 to float
  store float %24, ptr %21, align 4, !tbaa !17
  %25 = load float, ptr %11, align 4, !tbaa !9
  %26 = load float, ptr %12, align 4, !tbaa !9
  %27 = load float, ptr %12, align 4, !tbaa !9
  %28 = load <2 x float>, ptr %13, align 4
  %29 = call i32 @arm_2dp_cccn888_tile_transform_xy_with_src_mask_prepare(ptr noundef %14, ptr noundef %15, ptr noundef %16, <2 x float> %28, float noundef %25, float noundef %26, float noundef %27)
  ret i32 %29
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"float", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"arm_2d_location_t", !13, i64 0, !13, i64 2}
!13 = !{!"short", !7, i64 0}
!14 = !{!15, !10, i64 0}
!15 = !{!"arm_2d_point_float_t", !10, i64 0, !10, i64 4}
!16 = !{!12, !13, i64 2}
!17 = !{!15, !10, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @arm_2dp_cccn888_tile_transform_xy_with_src_mask_prepare(ptr noundef, ptr noundef nonnull, ptr noundef nonnull, <2 x float>, float noundef, float noundef, float noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_tile_transform_with_src_mask_prepare(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, i32 %3, float noundef %4, float noundef %5) local_unnamed_addr #0 {
  %.sroa.2.0.extract.shift = lshr i32 %3, 16
  %7 = insertelement <2 x i32> poison, i32 %3, i64 0
  %8 = insertelement <2 x i32> %7, i32 %.sroa.2.0.extract.shift, i64 1
  %9 = trunc <2 x i32> %8 to <2 x i16>
  %10 = sitofp <2 x i16> %9 to <2 x float>
  %11 = tail call i32 @arm_2dp_cccn888_tile_transform_xy_with_src_mask_prepare(ptr noundef %0, ptr noundef %1, ptr noundef %2, <2 x float> %10, float noundef %4, float noundef %5, float noundef %5)
  ret i32 %11
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InstCombinePass,SLPVectorizerPass,SROAPass,TailCallElimPass