; LLVM IR from tastangh/TI-RSLK-Texas-Instruments-Robotics-System-The-Maze-Edition :: tirslk_maze_1_00_00/Flash (FlashTestMain)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [47 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @UART0_OutString(ptr noundef) #1

declare void @UART0_OutChar(i8 noundef signext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @isletter(i8 noundef signext) #2

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @touppercase(i8 noundef signext) #2

; Function Attrs: nounwind uwtable
define dso_local void @getnewscore() #2 {
  %1 = alloca i8, align 1
  %2 = alloca i8, align 1
  %3 = alloca i8, align 1
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @UART0_OutString(ptr noundef @.str.1)
  %5 = call signext i8 @UART0_InChar()
  store i8 %5, ptr %1, align 1, !tbaa !5
  br label %6

6:                                                ; preds = %11, %0
  %7 = load i8, ptr %1, align 1, !tbaa !5
  %8 = call i32 @isletter(i8 noundef signext %7)
  %9 = icmp ne i32 %8, 0
  %10 = xor i1 %9, true
  br i1 %10, label %11, label %13

11:                                               ; preds = %6
  %12 = call signext i8 @UART0_InChar()
  store i8 %12, ptr %1, align 1, !tbaa !5
  br label %6, !llvm.loop !8

13:                                               ; preds = %6
  %14 = load i8, ptr %1, align 1, !tbaa !5
  %15 = call signext i8 @touppercase(i8 noundef signext %14)
  store i8 %15, ptr %1, align 1, !tbaa !5
  %16 = load i8, ptr %1, align 1, !tbaa !5
  call void @UART0_OutChar(i8 noundef signext %16)
  %17 = call signext i8 @UART0_InChar()
  store i8 %17, ptr %2, align 1, !tbaa !5
  br label %18

18:                                               ; preds = %23, %13
  %19 = load i8, ptr %2, align 1, !tbaa !5
  %20 = call i32 @isletter(i8 noundef signext %19)
  %21 = icmp ne i32 %20, 0
  %22 = xor i1 %21, true
  br i1 %22, label %23, label %25

23:                                               ; preds = %18
  %24 = call signext i8 @UART0_InChar()
  store i8 %24, ptr %2, align 1, !tbaa !5
  br label %18, !llvm.loop !10

25:                                               ; preds = %18
  %26 = load i8, ptr %2, align 1, !tbaa !5
  %27 = call signext i8 @touppercase(i8 noundef signext %26)
  store i8 %27, ptr %2, align 1, !tbaa !5
  %28 = load i8, ptr %2, align 1, !tbaa !5
  call void @UART0_OutChar(i8 noundef signext %28)
  %29 = call signext i8 @UART0_InChar()
  store i8 %29, ptr %3, align 1, !tbaa !5
  br label %30

30:                                               ; preds = %35, %25
  %31 = load i8, ptr %3, align 1, !tbaa !5
  %32 = call i32 @isletter(i8 noundef signext %31)
  %33 = icmp ne i32 %32, 0
  %34 = xor i1 %33, true
  br i1 %34, label %35, label %37

35:                                               ; preds = %30
  %36 = call signext i8 @UART0_InChar()
  store i8 %36, ptr %3, align 1, !tbaa !5
  br label %30, !llvm.loop !11

37:                                               ; preds = %30
  %38 = load i8, ptr %3, align 1, !tbaa !5
  %39 = call signext i8 @touppercase(i8 noundef signext %38)
  store i8 %39, ptr %3, align 1, !tbaa !5
  %40 = load i8, ptr %3, align 1, !tbaa !5
  call void @UART0_OutChar(i8 noundef signext %40)
  call void @UART0_OutString(ptr noundef @.str.2)
  %41 = call i32 @UART0_InUDec()
  store i32 %41, ptr %4, align 4, !tbaa !12
  call void @UART0_OutChar(i8 noundef signext 13)
  call void @UART0_OutChar(i8 noundef signext 10)
  %42 = load i8, ptr %1, align 1, !tbaa !5
  %43 = load i8, ptr %2, align 1, !tbaa !5
  %44 = load i8, ptr %3, align 1, !tbaa !5
  %45 = load i32, ptr %4, align 4, !tbaa !12
  call void @Scoreboard_Record(i8 noundef signext %42, i8 noundef signext %43, i8 noundef signext %44, i32 noundef %45)
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #3
  ret void
}

declare signext i8 @UART0_InChar() #1

declare i32 @UART0_InUDec() #1

declare void @Scoreboard_Record(i8 noundef signext, i8 noundef signext, i8 noundef signext, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = distinct !{!10, !9}
!11 = distinct !{!11, !9}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [47 x i8], align 1

declare void @UART0_OutString(ptr noundef) local_unnamed_addr #0

declare void @UART0_OutChar(i8 noundef signext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @isletter(i8 noundef signext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local signext i8 @touppercase(i8 noundef signext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @getnewscore() local_unnamed_addr #1 {
  tail call void @UART0_OutString(ptr noundef nonnull @.str.1) #2
  %1 = tail call signext i8 @UART0_InChar() #2
  %2 = tail call i32 @isletter(i8 noundef signext %1)
  %.not17 = icmp eq i32 %2, 0
  br i1 %.not17, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %0, %.lr.ph
  %3 = tail call signext i8 @UART0_InChar() #2
  %4 = tail call i32 @isletter(i8 noundef signext %3)
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %0
  %.0.lcssa = phi i8 [ %1, %0 ], [ %3, %.lr.ph ]
  %5 = tail call signext i8 @touppercase(i8 noundef signext %.0.lcssa)
  tail call void @UART0_OutChar(i8 noundef signext %5) #2
  %6 = tail call signext i8 @UART0_InChar() #2
  %7 = tail call i32 @isletter(i8 noundef signext %6)
  %.not1518 = icmp eq i32 %7, 0
  br i1 %.not1518, label %.lr.ph20, label %._crit_edge21

.lr.ph20:                                         ; preds = %._crit_edge, %.lr.ph20
  %8 = tail call signext i8 @UART0_InChar() #2
  %9 = tail call i32 @isletter(i8 noundef signext %8)
  %.not15 = icmp eq i32 %9, 0
  br i1 %.not15, label %.lr.ph20, label %._crit_edge21, !llvm.loop !7

._crit_edge21:                                    ; preds = %.lr.ph20, %._crit_edge
  %.014.lcssa = phi i8 [ %6, %._crit_edge ], [ %8, %.lr.ph20 ]
  %10 = tail call signext i8 @touppercase(i8 noundef signext %.014.lcssa)
  tail call void @UART0_OutChar(i8 noundef signext %10) #2
  %11 = tail call signext i8 @UART0_InChar() #2
  %12 = tail call i32 @isletter(i8 noundef signext %11)
  %.not1623 = icmp eq i32 %12, 0
  br i1 %.not1623, label %.lr.ph25, label %._crit_edge26

.lr.ph25:                                         ; preds = %._crit_edge21, %.lr.ph25
  %13 = tail call signext i8 @UART0_InChar() #2
  %14 = tail call i32 @isletter(i8 noundef signext %13)
  %.not16 = icmp eq i32 %14, 0
  br i1 %.not16, label %.lr.ph25, label %._crit_edge26, !llvm.loop !8

._crit_edge26:                                    ; preds = %.lr.ph25, %._crit_edge21
  %.013.lcssa = phi i8 [ %11, %._crit_edge21 ], [ %13, %.lr.ph25 ]
  %15 = tail call signext i8 @touppercase(i8 noundef signext %.013.lcssa)
  tail call void @UART0_OutChar(i8 noundef signext %15) #2
  tail call void @UART0_OutString(ptr noundef nonnull @.str.2) #2
  %16 = tail call i32 @UART0_InUDec() #2
  tail call void @UART0_OutChar(i8 noundef signext 13) #2
  tail call void @UART0_OutChar(i8 noundef signext 10) #2
  tail call void @Scoreboard_Record(i8 noundef signext %5, i8 noundef signext %10, i8 noundef signext %15, i32 noundef %16) #2
  ret void
}

declare signext i8 @UART0_InChar() local_unnamed_addr #0

declare i32 @UART0_InUDec() local_unnamed_addr #0

declare void @Scoreboard_Record(i8 noundef signext, i8 noundef signext, i8 noundef signext, i32 noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass