; LLVM IR from ARM-software/Arm-2D :: Helper/Source (arm_2d_helper_control)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_region_t = type { %union.anon, %union.anon.0 }
%union.anon = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.0 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%struct.arm_2d_control_node_t = type { %struct.anon, %struct.arm_2d_region_t }
%struct.anon = type { ptr, ptr, ptr }

; Function Attrs: nounwind uwtable
define dso_local ptr @arm_2d_helper_control_get_absolute_region(ptr noundef nonnull %0, ptr noundef nonnull %1, i1 noundef zeroext %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca %struct.arm_2d_region_t, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  %11 = zext i1 %2 to i8
  store i8 %11, ptr %7, align 1, !tbaa !9
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = icmp eq ptr null, %12
  br i1 %13, label %17, label %14

14:                                               ; preds = %3
  %15 = load ptr, ptr %6, align 8, !tbaa !5
  %16 = icmp eq ptr null, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %14, %3
  store ptr null, ptr %4, align 8
  br label %79

18:                                               ; preds = %14
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.arm_2d_control_node_t, ptr %20, i32 0, i32 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %19, ptr align 8 %21, i64 8, i1 false), !tbaa.struct !11
  br label %22

22:                                               ; preds = %76, %18
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.arm_2d_control_node_t, ptr %23, i32 0, i32 0
  %25 = getelementptr inbounds %struct.anon, ptr %24, i32 0, i32 1
  %26 = load ptr, ptr %25, align 8, !tbaa !13
  store ptr %26, ptr %8, align 8, !tbaa !5
  %27 = load ptr, ptr %8, align 8, !tbaa !5
  %28 = icmp eq ptr null, %27
  br i1 %28, label %29, label %30

29:                                               ; preds = %22
  store i32 2, ptr %9, align 4
  br label %73

30:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %31 = getelementptr inbounds %struct.arm_2d_region_t, ptr %10, i32 0, i32 0
  call void @llvm.memset.p0.i64(ptr align 2 %31, i8 0, i64 4, i1 false)
  %32 = getelementptr inbounds %struct.arm_2d_region_t, ptr %10, i32 0, i32 1
  %33 = load ptr, ptr %8, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.arm_2d_control_node_t, ptr %33, i32 0, i32 1
  %35 = getelementptr inbounds %struct.arm_2d_region_t, ptr %34, i32 0, i32 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %32, ptr align 4 %35, i64 4, i1 false), !tbaa.struct !17
  %36 = load i8, ptr %7, align 1, !tbaa !9, !range !20, !noundef !21
  %37 = trunc i8 %36 to i1
  br i1 %37, label %38, label %44

38:                                               ; preds = %30
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = call zeroext i1 @arm_2d_region_intersect(ptr noundef %39, ptr noundef %10, ptr noundef %40)
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  store ptr null, ptr %4, align 8
  store i32 1, ptr %9, align 4
  br label %72

43:                                               ; preds = %38
  br label %44

44:                                               ; preds = %43, %30
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.arm_2d_control_node_t, ptr %45, i32 0, i32 1
  %47 = getelementptr inbounds %struct.arm_2d_region_t, ptr %46, i32 0, i32 0
  %48 = getelementptr inbounds %struct.arm_2d_location_t, ptr %47, i32 0, i32 0
  %49 = load i16, ptr %48, align 8, !tbaa !12
  %50 = sext i16 %49 to i32
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.arm_2d_region_t, ptr %51, i32 0, i32 0
  %53 = getelementptr inbounds %struct.arm_2d_location_t, ptr %52, i32 0, i32 0
  %54 = load i16, ptr %53, align 2, !tbaa !12
  %55 = sext i16 %54 to i32
  %56 = add nsw i32 %55, %50
  %57 = trunc i32 %56 to i16
  store i16 %57, ptr %53, align 2, !tbaa !12
  %58 = load ptr, ptr %8, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.arm_2d_control_node_t, ptr %58, i32 0, i32 1
  %60 = getelementptr inbounds %struct.arm_2d_region_t, ptr %59, i32 0, i32 0
  %61 = getelementptr inbounds %struct.arm_2d_location_t, ptr %60, i32 0, i32 1
  %62 = load i16, ptr %61, align 2, !tbaa !12
  %63 = sext i16 %62 to i32
  %64 = load ptr, ptr %6, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.arm_2d_region_t, ptr %64, i32 0, i32 0
  %66 = getelementptr inbounds %struct.arm_2d_location_t, ptr %65, i32 0, i32 1
  %67 = load i16, ptr %66, align 2, !tbaa !12
  %68 = sext i16 %67 to i32
  %69 = add nsw i32 %68, %63
  %70 = trunc i32 %69 to i16
  store i16 %70, ptr %66, align 2, !tbaa !12
  %71 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %71, ptr %5, align 8, !tbaa !5
  store i32 0, ptr %9, align 4
  br label %72

72:                                               ; preds = %44, %42
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  br label %73

73:                                               ; preds = %72, %29
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  %74 = load i32, ptr %9, align 4
  switch i32 %74, label %81 [
    i32 0, label %75
    i32 2, label %77
    i32 1, label %79
  ]

75:                                               ; preds = %73
  br label %76

76:                                               ; preds = %75
  br i1 true, label %22, label %77

77:                                               ; preds = %76, %73
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %78, ptr %4, align 8
  br label %79

79:                                               ; preds = %77, %73, %17
  %80 = load ptr, ptr %4, align 8
  ret ptr %80

81:                                               ; preds = %73
  unreachable
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

declare zeroext i1 @arm_2d_region_intersect(ptr noundef, ptr noundef, ptr noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{i64 0, i64 4, !12, i64 4, i64 4, !12}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !6, i64 8}
!14 = !{!"arm_2d_control_node_t", !15, i64 0, !16, i64 24}
!15 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16}
!16 = !{!"arm_2d_region_t", !7, i64 0, !7, i64 4}
!17 = !{i64 0, i64 2, !18, i64 2, i64 2, !18}
!18 = !{!19, !19, i64 0}
!19 = !{!"short", !7, i64 0}
!20 = !{i8 0, i8 2}
!21 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_region_t = type { %union.anon, %union.anon.0 }
%union.anon = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.0 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @arm_2d_helper_control_get_absolute_region(ptr nocapture noundef nonnull readonly %0, ptr noundef nonnull %1, i1 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = alloca %struct.arm_2d_region_t, align 4
  %5 = getelementptr inbounds i8, ptr %0, i64 24
  %6 = load i64, ptr %5, align 8
  store i64 %6, ptr %1, align 2
  %7 = getelementptr inbounds i8, ptr %0, i64 8
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  %9 = icmp eq ptr %8, null
  br i1 %9, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %3
  %10 = getelementptr inbounds i8, ptr %4, i64 4
  %11 = getelementptr inbounds i8, ptr %1, i64 2
  br i1 %2, label %.lr.ph.split.us, label %.lr.ph.split.preheader

.lr.ph.split.preheader:                           ; preds = %.lr.ph
  %12 = trunc i64 %6 to i16
  %13 = lshr i64 %6, 16
  %14 = trunc i64 %13 to i16
  br label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %19
  %15 = phi ptr [ %29, %19 ], [ %8, %.lr.ph ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  store i32 0, ptr %4, align 4
  %16 = getelementptr inbounds i8, ptr %15, i64 28
  %17 = load i32, ptr %16, align 4
  store i32 %17, ptr %10, align 4
  %18 = call zeroext i1 @arm_2d_region_intersect(ptr noundef nonnull %1, ptr noundef nonnull %4, ptr noundef nonnull %1) #3
  br i1 %18, label %19, label %.thread26

19:                                               ; preds = %.lr.ph.split.us
  %20 = getelementptr inbounds i8, ptr %15, i64 24
  %21 = load i16, ptr %20, align 8, !tbaa !12
  %22 = load i16, ptr %1, align 2, !tbaa !12
  %23 = add i16 %22, %21
  store i16 %23, ptr %1, align 2, !tbaa !12
  %24 = getelementptr inbounds i8, ptr %15, i64 26
  %25 = load i16, ptr %24, align 2, !tbaa !12
  %26 = load i16, ptr %11, align 2, !tbaa !12
  %27 = add i16 %26, %25
  store i16 %27, ptr %11, align 2, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  %28 = getelementptr inbounds i8, ptr %15, i64 8
  %29 = load ptr, ptr %28, align 8, !tbaa !5
  %30 = icmp eq ptr %29, null
  br i1 %30, label %.loopexit, label %.lr.ph.split.us

.lr.ph.split:                                     ; preds = %.lr.ph.split.preheader, %.lr.ph.split
  %31 = phi i16 [ %39, %.lr.ph.split ], [ %14, %.lr.ph.split.preheader ]
  %32 = phi i16 [ %36, %.lr.ph.split ], [ %12, %.lr.ph.split.preheader ]
  %33 = phi ptr [ %41, %.lr.ph.split ], [ %8, %.lr.ph.split.preheader ]
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
  %34 = getelementptr inbounds i8, ptr %33, i64 24
  %35 = load i16, ptr %34, align 8, !tbaa !12
  %36 = add i16 %32, %35
  store i16 %36, ptr %1, align 2, !tbaa !12
  %37 = getelementptr inbounds i8, ptr %33, i64 26
  %38 = load i16, ptr %37, align 2, !tbaa !12
  %39 = add i16 %31, %38
  store i16 %39, ptr %11, align 2, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  %40 = getelementptr inbounds i8, ptr %33, i64 8
  %41 = load ptr, ptr %40, align 8, !tbaa !5
  %42 = icmp eq ptr %41, null
  br i1 %42, label %.loopexit, label %.lr.ph.split

.thread26:                                        ; preds = %.lr.ph.split.us
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph.split, %19, %3, %.thread26
  %.3 = phi ptr [ null, %.thread26 ], [ %1, %3 ], [ %1, %19 ], [ %1, %.lr.ph.split ]
  ret ptr %.3
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare zeroext i1 @arm_2d_region_intersect(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"arm_2d_control_node_t", !7, i64 0, !11, i64 24}
!7 = !{!"", !8, i64 0, !8, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"arm_2d_region_t", !9, i64 0, !9, i64 4}
!12 = !{!9, !9, i64 0}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass