; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_region_t = type { %union.anon.34, %union.anon.35 }
%union.anon.34 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.35 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%struct.arm_2d_tile_t = type { %union.anon.24, %union.anon.33, %union.anon.36 }
%union.anon.24 = type { %struct.anon.25 }
%struct.anon.25 = type { i8, %union.arm_2d_color_info_t, %union.anon.26 }
%union.arm_2d_color_info_t = type { %struct.anon.3 }
%struct.anon.3 = type { i8 }
%union.anon.26 = type { i16 }
%union.anon.33 = type { %struct.arm_2d_region_t }
%union.anon.36 = type { ptr }

@.str.7 = external hidden unnamed_addr constant [94 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [21 x i8], align 1
@__PRETTY_FUNCTION__.arm_2d_tile_generate_child = external hidden unnamed_addr constant [114 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [17 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @arm_2d_region_intersect(ptr noundef nonnull, ptr noundef nonnull, ptr noundef) #4

; Function Attrs: nounwind uwtable
define dso_local ptr @arm_2d_tile_generate_child(ptr noundef nonnull %0, ptr noundef nonnull %1, ptr noundef nonnull %2, i1 noundef zeroext %3) #4 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca %struct.arm_2d_region_t, align 2
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  %12 = zext i1 %3 to i8
  store i8 %12, ptr %9, align 1, !tbaa !9
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp ne ptr null, %13
  br i1 %14, label %15, label %16

15:                                               ; preds = %4
  br label %17

16:                                               ; preds = %4
  call void @__assert_fail(ptr noundef @.str.20, ptr noundef @.str.7, i32 noundef 818, ptr noundef @__PRETTY_FUNCTION__.arm_2d_tile_generate_child) #5
  unreachable

17:                                               ; preds = %15
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = icmp ne ptr null, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %17
  br label %22

21:                                               ; preds = %17
  call void @__assert_fail(ptr noundef @.str.21, ptr noundef @.str.7, i32 noundef 819, ptr noundef @__PRETTY_FUNCTION__.arm_2d_tile_generate_child) #5
  unreachable

22:                                               ; preds = %20
  %23 = load ptr, ptr %8, align 8, !tbaa !5
  %24 = icmp ne ptr null, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  br label %27

26:                                               ; preds = %22
  call void @__assert_fail(ptr noundef @.str.11, ptr noundef @.str.7, i32 noundef 820, ptr noundef @__PRETTY_FUNCTION__.arm_2d_tile_generate_child) #5
  unreachable

27:                                               ; preds = %25
  %28 = load ptr, ptr %8, align 8, !tbaa !5
  call void @llvm.memset.p0.i64(ptr align 8 %28, i8 0, i64 24, i1 false)
  %29 = load ptr, ptr %8, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %29, i32 0, i32 1
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %30, ptr align 2 %31, i64 8, i1 false), !tbaa.struct !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #6
  %32 = getelementptr inbounds %struct.arm_2d_region_t, ptr %10, i32 0, i32 0
  call void @llvm.memset.p0.i64(ptr align 2 %32, i8 0, i64 4, i1 false)
  %33 = getelementptr inbounds %struct.arm_2d_region_t, ptr %10, i32 0, i32 1
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %34, i32 0, i32 1
  %36 = getelementptr inbounds %struct.arm_2d_region_t, ptr %35, i32 0, i32 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %33, ptr align 4 %36, i64 4, i1 false), !tbaa.struct !13
  %37 = load i8, ptr %9, align 1, !tbaa !9, !range !16, !noundef !17
  %38 = trunc i8 %37 to i1
  br i1 %38, label %39, label %47

39:                                               ; preds = %27
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %40, i32 0, i32 1
  %42 = load ptr, ptr %8, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %42, i32 0, i32 1
  %44 = call zeroext i1 @arm_2d_region_intersect(ptr noundef %10, ptr noundef %41, ptr noundef %43)
  br i1 %44, label %46, label %45

45:                                               ; preds = %39
  store ptr null, ptr %5, align 8
  store i32 1, ptr %11, align 4
  br label %77

46:                                               ; preds = %39
  br label %53

47:                                               ; preds = %27
  %48 = load ptr, ptr %8, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %48, i32 0, i32 1
  %50 = call zeroext i1 @arm_2d_region_intersect(ptr noundef %10, ptr noundef %49, ptr noundef null)
  br i1 %50, label %52, label %51

51:                                               ; preds = %47
  store ptr null, ptr %5, align 8
  store i32 1, ptr %11, align 4
  br label %77

52:                                               ; preds = %47
  br label %53

53:                                               ; preds = %52, %46
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %54, i32 0, i32 0
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %56, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %55, ptr align 8 %57, i64 4, i1 false), !tbaa.struct !18
  %58 = load ptr, ptr %8, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %58, i32 0, i32 0
  %60 = load i8, ptr %59, align 8
  %61 = and i8 %60, -2
  %62 = or i8 %61, 0
  store i8 %62, ptr %59, align 8
  %63 = load ptr, ptr %8, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %63, i32 0, i32 0
  %65 = load i8, ptr %64, align 8
  %66 = and i8 %65, -17
  %67 = or i8 %66, 0
  store i8 %67, ptr %64, align 8
  %68 = load ptr, ptr %8, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %68, i32 0, i32 0
  %70 = load i8, ptr %69, align 8
  %71 = and i8 %70, -5
  %72 = or i8 %71, 0
  store i8 %72, ptr %69, align 8
  %73 = load ptr, ptr %6, align 8, !tbaa !5
  %74 = load ptr, ptr %8, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %74, i32 0, i32 2
  store ptr %73, ptr %75, align 8, !tbaa !12
  %76 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %76, ptr %5, align 8
  store i32 1, ptr %11, align 4
  br label %77

77:                                               ; preds = %53, %51, %45
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #6
  %78 = load ptr, ptr %5, align 8
  ret ptr %78
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{i64 0, i64 4, !12, i64 4, i64 4, !12}
!12 = !{!7, !7, i64 0}
!13 = !{i64 0, i64 2, !14, i64 2, i64 2, !14}
!14 = !{!15, !15, i64 0}
!15 = !{!"short", !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = !{i64 0, i64 1, !12, i64 1, i64 1, !12, i64 2, i64 2, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_region_t = type { %union.anon.34, %union.anon.35 }
%union.anon.34 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.35 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @arm_2d_region_intersect(ptr noundef nonnull, ptr noundef nonnull, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @arm_2d_tile_generate_child(ptr noundef nonnull %0, ptr nocapture noundef nonnull readonly %1, ptr noundef nonnull %2, i1 noundef zeroext %3) local_unnamed_addr #2 {
  %5 = alloca %struct.arm_2d_region_t, align 4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %2, i8 0, i64 24, i1 false)
  %6 = getelementptr inbounds i8, ptr %2, i64 4
  %7 = load i64, ptr %1, align 2
  store i64 %7, ptr %6, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  store i32 0, ptr %5, align 4
  %8 = getelementptr inbounds i8, ptr %5, i64 4
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  %10 = load i32, ptr %9, align 4
  store i32 %10, ptr %8, align 4
  br i1 %3, label %11, label %13

11:                                               ; preds = %4
  %12 = call zeroext i1 @arm_2d_region_intersect(ptr noundef %5, ptr noundef %6, ptr noundef nonnull %6)
  br i1 %12, label %15, label %20

13:                                               ; preds = %4
  %14 = call zeroext i1 @arm_2d_region_intersect(ptr noundef %5, ptr noundef %6, ptr noundef null)
  br i1 %14, label %15, label %20

15:                                               ; preds = %13, %11
  %16 = load i32, ptr %0, align 8
  store i32 %16, ptr %2, align 8
  %17 = trunc i32 %16 to i8
  %18 = and i8 %17, -22
  store i8 %18, ptr %2, align 8
  %19 = getelementptr inbounds i8, ptr %2, i64 16
  store ptr %0, ptr %19, align 8, !tbaa !5
  br label %20

20:                                               ; preds = %13, %11, %15
  %.0 = phi ptr [ %2, %15 ], [ null, %11 ], [ null, %13 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  ret ptr %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass