; LLVM IR from ARM-software/Arm-2D :: Helper/Source (arm_2d_helper)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.arm_2d_color_info_t = type { %struct.anon.4 }
%struct.anon.4 = type { i8 }
%union.arm_2d_colour_t = type { i32 }

@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [15 x i8], align 1
@__PRETTY_FUNCTION__.arm_2d_helper_fill_tile_colour = external hidden unnamed_addr constant [97 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

declare zeroext i1 @arm_2d_op_wait_async(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @arm_2d_helper_fill_tile_colour(ptr noundef nonnull %0, i8 %1, i32 %2) #2 {
  %4 = alloca %union.arm_2d_color_info_t, align 1
  %5 = alloca %union.arm_2d_colour_t, align 4
  %6 = alloca ptr, align 8
  %7 = getelementptr inbounds %union.arm_2d_color_info_t, ptr %4, i32 0, i32 0
  %8 = getelementptr inbounds %struct.anon.4, ptr %7, i32 0, i32 0
  store i8 %1, ptr %8, align 1
  %9 = getelementptr inbounds %union.arm_2d_colour_t, ptr %5, i32 0, i32 0
  store i32 %2, ptr %9, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = icmp ne ptr null, %10
  br i1 %11, label %12, label %13

12:                                               ; preds = %3
  br label %14

13:                                               ; preds = %3
  call void @__assert_fail(ptr noundef @.str.10, ptr noundef @.str.1, i32 noundef 1101, ptr noundef @__PRETTY_FUNCTION__.arm_2d_helper_fill_tile_colour) #3
  unreachable

14:                                               ; preds = %12
  %15 = load i8, ptr %4, align 1
  %16 = lshr i8 %15, 1
  %17 = and i8 %16, 7
  %18 = zext i8 %17 to i32
  switch i32 %18, label %32 [
    i32 3, label %19
    i32 4, label %23
    i32 5, label %28
  ]

19:                                               ; preds = %14
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = load i8, ptr %5, align 4, !tbaa !9
  %22 = call i32 @arm_2dp_c8bit_fill_colour(ptr noundef null, ptr noundef %20, ptr noundef null, i8 noundef zeroext %21)
  br label %33

23:                                               ; preds = %14
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = load i16, ptr %5, align 4, !tbaa !9
  %26 = zext i16 %25 to i64
  %27 = call i32 @arm_2dp_rgb16_fill_colour(ptr noundef null, ptr noundef %24, ptr noundef null, i64 noundef %26)
  br label %33

28:                                               ; preds = %14
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = call i32 @arm_2dp_rgb32_fill_colour(ptr noundef null, ptr noundef %29, ptr noundef null, i32 noundef %30)
  br label %33

32:                                               ; preds = %14
  call void @__assert_fail(ptr noundef @.str.11, ptr noundef @.str.1, i32 noundef 1115, ptr noundef @__PRETTY_FUNCTION__.arm_2d_helper_fill_tile_colour) #3
  unreachable

33:                                               ; preds = %28, %23, %19
  %34 = call zeroext i1 @arm_2d_op_wait_async(ptr noundef null)
  ret void
}

declare i32 @arm_2dp_c8bit_fill_colour(ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext) #1

declare i32 @arm_2dp_rgb16_fill_colour(ptr noundef, ptr noundef, ptr noundef, i64 noundef) #1

declare i32 @arm_2dp_rgb32_fill_colour(ptr noundef, ptr noundef, ptr noundef, i32 noundef) #1

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@__PRETTY_FUNCTION__.arm_2d_helper_fill_tile_colour = external hidden unnamed_addr constant [97 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [6 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

declare zeroext i1 @arm_2d_op_wait_async(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @arm_2d_helper_fill_tile_colour(ptr noundef nonnull %0, i8 %1, i32 %2) local_unnamed_addr #2 {
  %4 = lshr i8 %1, 1
  %5 = and i8 %4, 7
  switch i8 %5, label %12 [
    i8 3, label %6
    i8 4, label %8
    i8 5, label %10
  ]

6:                                                ; preds = %3
  %.sroa.0.sroa.0.0.extract.trunc = trunc i32 %2 to i8
  %7 = tail call i32 @arm_2dp_c8bit_fill_colour(ptr noundef null, ptr noundef nonnull %0, ptr noundef null, i8 noundef zeroext %.sroa.0.sroa.0.0.extract.trunc) #3
  br label %13

8:                                                ; preds = %3
  %.sroa.0.sroa.0.0.insert.insert14 = and i32 %2, 65535
  %.sroa.0.sroa.0.0.insert.insert = zext nneg i32 %.sroa.0.sroa.0.0.insert.insert14 to i64
  %9 = tail call i32 @arm_2dp_rgb16_fill_colour(ptr noundef null, ptr noundef nonnull %0, ptr noundef null, i64 noundef %.sroa.0.sroa.0.0.insert.insert) #3
  br label %13

10:                                               ; preds = %3
  %11 = tail call i32 @arm_2dp_rgb32_fill_colour(ptr noundef null, ptr noundef nonnull %0, ptr noundef null, i32 noundef %2) #3
  br label %13

12:                                               ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str.11, ptr noundef nonnull @.str.1, i32 noundef 1115, ptr noundef nonnull @__PRETTY_FUNCTION__.arm_2d_helper_fill_tile_colour) #4
  unreachable

13:                                               ; preds = %10, %8, %6
  %14 = tail call zeroext i1 @arm_2d_op_wait_async(ptr noundef null) #3
  ret void
}

declare i32 @arm_2dp_c8bit_fill_colour(ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

declare i32 @arm_2dp_rgb16_fill_colour(ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1

declare i32 @arm_2dp_rgb32_fill_colour(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass