; LLVM IR from DimitrisJim/leetcode_solutions :: C/Algorithms (122)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @maxProfit(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 1, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %49, %2
  %12 = load i32, ptr %8, align 4, !tbaa !9
  %13 = load i32, ptr %4, align 4, !tbaa !9
  %14 = icmp slt i32 %12, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %52

16:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds i32, ptr %17, i64 %19
  %21 = getelementptr inbounds i32, ptr %20, i64 -1
  %22 = load i32, ptr %21, align 4, !tbaa !9
  store i32 %22, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds i32, ptr %23, i64 %25
  %27 = load i32, ptr %26, align 4, !tbaa !9
  store i32 %27, ptr %10, align 4, !tbaa !9
  %28 = load i32, ptr %6, align 4, !tbaa !9
  %29 = icmp eq i32 %28, 1
  br i1 %29, label %30, label %37

30:                                               ; preds = %16
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %34, label %36

34:                                               ; preds = %30
  %35 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %35, ptr %7, align 4, !tbaa !9
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %34, %30
  br label %48

37:                                               ; preds = %16
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = load i32, ptr %10, align 4, !tbaa !9
  %40 = icmp sgt i32 %38, %39
  br i1 %40, label %41, label %47

41:                                               ; preds = %37
  %42 = load i32, ptr %9, align 4, !tbaa !9
  %43 = load i32, ptr %7, align 4, !tbaa !9
  %44 = sub nsw i32 %42, %43
  %45 = load i32, ptr %5, align 4, !tbaa !9
  %46 = add nsw i32 %45, %44
  store i32 %46, ptr %5, align 4, !tbaa !9
  store i32 0, ptr %7, align 4, !tbaa !9
  store i32 1, ptr %6, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %41, %37
  br label %48

48:                                               ; preds = %47, %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %8, align 4, !tbaa !9
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %8, align 4, !tbaa !9
  br label %11, !llvm.loop !11

52:                                               ; preds = %15
  %53 = load i32, ptr %6, align 4, !tbaa !9
  %54 = icmp eq i32 %53, 0
  br i1 %54, label %55, label %66

55:                                               ; preds = %52
  %56 = load i32, ptr %5, align 4, !tbaa !9
  %57 = load ptr, ptr %3, align 8, !tbaa !5
  %58 = load i32, ptr %4, align 4, !tbaa !9
  %59 = add nsw i32 %58, -1
  store i32 %59, ptr %4, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds i32, ptr %57, i64 %60
  %62 = load i32, ptr %61, align 4, !tbaa !9
  %63 = add nsw i32 %56, %62
  %64 = load i32, ptr %7, align 4, !tbaa !9
  %65 = sub nsw i32 %63, %64
  br label %68

66:                                               ; preds = %52
  %67 = load i32, ptr %5, align 4, !tbaa !9
  br label %68

68:                                               ; preds = %66, %55
  %69 = phi i32 [ %65, %55 ], [ %67, %66 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %69
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define dso_local i32 @maxProfit(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 1
  br i1 %3, label %.lr.ph.preheader, label %._crit_edge.thread51

.lr.ph.preheader:                                 ; preds = %2
  %wide.trip.count = zext nneg i32 %1 to i64
  br label %.lr.ph.outer

.lr.ph.outer:                                     ; preds = %.thread, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ %indvars.iv.next45, %.thread ], [ 1, %.lr.ph.preheader ]
  %.033.ph = phi i32 [ %16, %.thread ], [ 0, %.lr.ph.preheader ]
  br label %.lr.ph

._crit_edge:                                      ; preds = %14
  %4 = icmp eq i32 %.125, 0
  br i1 %4, label %17, label %._crit_edge.thread51

.lr.ph:                                           ; preds = %.lr.ph.outer, %14
  %indvars.iv = phi i64 [ %indvars.iv.next, %14 ], [ %indvars.iv.ph, %.lr.ph.outer ]
  %.022.neg34 = phi i32 [ %.022.neg, %14 ], [ 0, %.lr.ph.outer ]
  %.02231 = phi i32 [ %.123, %14 ], [ 0, %.lr.ph.outer ]
  %.02430 = phi i32 [ %.125, %14 ], [ 1, %.lr.ph.outer ]
  %5 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %6 = getelementptr inbounds i8, ptr %5, i64 -4
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = load i32, ptr %5, align 4, !tbaa !5
  %9 = icmp eq i32 %.02430, 1
  br i1 %9, label %10, label %12

10:                                               ; preds = %.lr.ph
  %11 = icmp sge i32 %7, %8
  %spec.select = zext i1 %11 to i32
  %spec.select29 = select i1 %11, i32 %.02231, i32 %7
  br label %14

12:                                               ; preds = %.lr.ph
  %13 = icmp sgt i32 %7, %8
  br i1 %13, label %.thread, label %14

14:                                               ; preds = %10, %12
  %.125 = phi i32 [ 0, %12 ], [ %spec.select, %10 ]
  %.123 = phi i32 [ %.02231, %12 ], [ %spec.select29, %10 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %.022.neg = sub i32 0, %.123
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

.thread:                                          ; preds = %12
  %15 = add i32 %.033.ph, %.022.neg34
  %16 = add i32 %15, %7
  %indvars.iv.next45 = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not47 = icmp eq i64 %indvars.iv.next45, %wide.trip.count
  br i1 %exitcond.not47, label %._crit_edge.thread51, label %.lr.ph.outer, !llvm.loop !9

17:                                               ; preds = %._crit_edge
  %18 = zext nneg i32 %1 to i64
  %19 = getelementptr i32, ptr %0, i64 %18
  %20 = getelementptr i8, ptr %19, i64 -4
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = sub i32 %.033.ph, %.123
  %23 = add i32 %22, %21
  br label %._crit_edge.thread51

._crit_edge.thread51:                             ; preds = %.thread, %2, %._crit_edge, %17
  %24 = phi i32 [ %23, %17 ], [ %.033.ph, %._crit_edge ], [ 0, %2 ], [ %16, %.thread ]
  ret i32 %24
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass