; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/StatisticsFunctions (arm_rms_q15)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_rms_q15(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i16, align 2
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  store i64 0, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #4
  %10 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %10, ptr %7, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %14, %3
  %12 = load i32, ptr %7, align 4, !tbaa !9
  %13 = icmp ugt i32 %12, 0
  br i1 %13, label %14, label %28

14:                                               ; preds = %11
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds i16, ptr %15, i32 1
  store ptr %16, ptr %4, align 8, !tbaa !5
  %17 = load i16, ptr %15, align 2, !tbaa !13
  store i16 %17, ptr %9, align 2, !tbaa !13
  %18 = load i16, ptr %9, align 2, !tbaa !13
  %19 = sext i16 %18 to i32
  %20 = load i16, ptr %9, align 2, !tbaa !13
  %21 = sext i16 %20 to i32
  %22 = mul nsw i32 %19, %21
  %23 = sext i32 %22 to i64
  %24 = load i64, ptr %8, align 8, !tbaa !11
  %25 = add nsw i64 %24, %23
  store i64 %25, ptr %8, align 8, !tbaa !11
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = add i32 %26, -1
  store i32 %27, ptr %7, align 4, !tbaa !9
  br label %11, !llvm.loop !15

28:                                               ; preds = %11
  %29 = load i64, ptr %8, align 8, !tbaa !11
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = zext i32 %30 to i64
  %32 = sdiv i64 %29, %31
  %33 = ashr i64 %32, 15
  %34 = trunc i64 %33 to i32
  %35 = call i32 @__SSAT(i32 noundef %34, i32 noundef 16)
  %36 = trunc i32 %35 to i16
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = call i32 @arm_sqrt_q15(i16 noundef signext %36, ptr noundef %37)
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @arm_sqrt_q15(i16 noundef signext, ptr noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_rms_q15(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
  %.not11 = icmp eq i32 %1, 0
  br i1 %.not11, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %3
  %4 = zext i32 %1 to i64
  %min.iters.check = icmp ult i32 %1, 4
  br i1 %min.iters.check, label %.lr.ph.preheader20, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %4, 4294967292
  %5 = shl nuw nsw i64 %n.vec, 1
  %ind.end = getelementptr i8, ptr %0, i64 %5
  %.cast = trunc nuw i64 %n.vec to i32
  %ind.end15 = sub i32 %1, %.cast
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <2 x i64> [ zeroinitializer, %vector.ph ], [ %13, %vector.body ]
  %vec.phi17 = phi <2 x i64> [ zeroinitializer, %vector.ph ], [ %14, %vector.body ]
  %offset.idx = shl i64 %index, 1
  %next.gep = getelementptr i8, ptr %0, i64 %offset.idx
  %6 = getelementptr i8, ptr %next.gep, i64 4
  %wide.load = load <2 x i16>, ptr %next.gep, align 2, !tbaa !5
  %wide.load19 = load <2 x i16>, ptr %6, align 2, !tbaa !5
  %7 = sext <2 x i16> %wide.load to <2 x i32>
  %8 = sext <2 x i16> %wide.load19 to <2 x i32>
  %9 = mul nsw <2 x i32> %7, %7
  %10 = mul nsw <2 x i32> %8, %8
  %11 = zext nneg <2 x i32> %9 to <2 x i64>
  %12 = zext nneg <2 x i32> %10 to <2 x i64>
  %13 = add <2 x i64> %vec.phi, %11
  %14 = add <2 x i64> %vec.phi17, %12
  %index.next = add nuw i64 %index, 4
  %15 = icmp eq i64 %index.next, %n.vec
  br i1 %15, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <2 x i64> %14, %13
  %16 = tail call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %bin.rdx)
  %cmp.n = icmp eq i64 %n.vec, %4
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader20

.lr.ph.preheader20:                               ; preds = %middle.block, %.lr.ph.preheader
  %.014.ph = phi ptr [ %0, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  %.0913.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %16, %middle.block ]
  %.01012.ph = phi i32 [ %1, %.lr.ph.preheader ], [ %ind.end15, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader20, %.lr.ph
  %.014 = phi ptr [ %17, %.lr.ph ], [ %.014.ph, %.lr.ph.preheader20 ]
  %.0913 = phi i64 [ %22, %.lr.ph ], [ %.0913.ph, %.lr.ph.preheader20 ]
  %.01012 = phi i32 [ %23, %.lr.ph ], [ %.01012.ph, %.lr.ph.preheader20 ]
  %17 = getelementptr inbounds i8, ptr %.014, i64 2
  %18 = load i16, ptr %.014, align 2, !tbaa !5
  %19 = sext i16 %18 to i32
  %20 = mul nsw i32 %19, %19
  %21 = zext nneg i32 %20 to i64
  %22 = add nuw nsw i64 %.0913, %21
  %23 = add i32 %.01012, -1
  %.not = icmp eq i32 %23, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %3
  %.09.lcssa = phi i64 [ 0, %3 ], [ %16, %middle.block ], [ %22, %.lr.ph ]
  %24 = zext i32 %1 to i64
  %25 = udiv i64 %.09.lcssa, %24
  %26 = lshr i64 %25, 15
  %27 = trunc i64 %26 to i32
  %28 = tail call i32 @__SSAT(i32 noundef %27, i32 noundef 16)
  %29 = trunc i32 %28 to i16
  %30 = tail call i32 @arm_sqrt_q15(i16 noundef signext %29, ptr noundef %2) #4
  ret void
}

declare i32 @arm_sqrt_q15(i16 noundef signext, ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass