; LLVM IR from ARM-software/Arm-2D :: examples/[template][bare-metal][STM32F746G-Discovery]/project/mdk/RTE (line)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.0 }
%struct.anon.0 = type { ptr, %struct.anon.1, %struct.anon.2, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.1 = type { ptr, ptr }
%struct.anon.2 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.60, %struct.anon.61, %union.anon.62, %struct.anon.64, %struct.anon.65, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.3, i64 }
%struct.anon.3 = type { ptr, ptr, %struct.anon.4, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.4 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.5 }
%struct.anon.5 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.60 = type { ptr, ptr }
%struct.anon.61 = type { ptr }
%union.anon.62 = type { %struct.anon.63 }
%struct.anon.63 = type { i32 }
%struct.anon.64 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.37, %union.anon.48, %union.anon.51 }
%union.anon.37 = type { %struct.anon.38 }
%struct.anon.38 = type { i8, %union.arm_2d_color_info_t, %union.anon.41 }
%union.arm_2d_color_info_t = type { %struct.anon.39 }
%struct.anon.39 = type { i8 }
%union.anon.41 = type { i16 }
%union.anon.48 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.49, %union.anon.50 }
%union.anon.49 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.50 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.51 = type { ptr }
%struct.anon.65 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.52, %struct.anon.53 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.52 = type { i32 }
%struct.anon.53 = type { %struct.arm_2d_location_t, %struct.anon.54 }
%struct.anon.54 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.75 = type { %struct.anon.76 }
%struct.anon.76 = type { i8 }
%union.anon.77 = type { %struct.anon.78 }
%struct.anon.78 = type { i8, i8 }
%struct.anon.84 = type { ptr }
%union.arm_2d_color_rgb565_t = type { i16 }
%struct.arm_2d_user_draw_line_descriptor_t = type { %union.anon.72, %struct.arm_2d_user_draw_line_api_params_t, %struct.arm_2d_region_t, %union.anon.73, i8, i8, i16 }
%union.anon.72 = type { %struct.arm_2d_op_t }
%struct.arm_2d_op_t = type { %struct.arm_2d_op_core_t, %struct.anon.6 }
%struct.anon.6 = type { ptr, ptr }
%struct.arm_2d_user_draw_line_api_params_t = type { %struct.arm_2d_location_t, %struct.arm_2d_location_t }
%union.anon.73 = type { i32 }

@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [167 x i8], align 1
@__PRETTY_FUNCTION__.arm_2dp_rgb565_user_draw_line = external hidden unnamed_addr constant [205 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [17 x i8], align 1
@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@ARM_2D_OP_USER_DRAW_LINE = external dso_local constant { { { i8 }, %union.anon.75, i8, i8, %union.anon.77, { %struct.anon.84, [8 x i8] } } }, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_rgb565_user_draw_line(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, i16 %4, i8 noundef zeroext %5) #0 {
  %7 = alloca i32, align 4
  %8 = alloca %union.arm_2d_color_rgb565_t, align 2
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i8, align 1
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = getelementptr inbounds %union.arm_2d_color_rgb565_t, ptr %8, i32 0, i32 0
  store i16 %4, ptr %17, align 2
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store ptr %2, ptr %11, align 8, !tbaa !5
  store ptr %3, ptr %12, align 8, !tbaa !5
  store i8 %5, ptr %13, align 1, !tbaa !9
  %18 = load ptr, ptr %10, align 8, !tbaa !5
  %19 = icmp ne ptr null, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %6
  br label %22

21:                                               ; preds = %6
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 205, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_rgb565_user_draw_line) #5
  unreachable

22:                                               ; preds = %20
  %23 = load ptr, ptr %12, align 8, !tbaa !5
  %24 = icmp ne ptr null, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  br label %27

26:                                               ; preds = %22
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 206, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_rgb565_user_draw_line) #5
  unreachable

27:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #6
  %28 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %28, ptr %14, align 8, !tbaa !5
  %29 = load ptr, ptr %14, align 8, !tbaa !5
  %30 = icmp eq ptr null, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  store ptr getelementptr inbounds (%struct.anon.0, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %14, align 8, !tbaa !5
  br label %32

32:                                               ; preds = %31, %27
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  %34 = call i32 @arm_2d_target_tile_is_new_frame(ptr noundef %33)
  switch i32 %34, label %63 [
    i32 0, label %64
    i32 1, label %35
    i32 -2, label %62
  ]

35:                                               ; preds = %32
  br label %36

36:                                               ; preds = %35
  %37 = load ptr, ptr %14, align 8, !tbaa !5
  %38 = call zeroext i1 @arm_2d_op_wait_async(ptr noundef %37)
  br i1 %38, label %40, label %39

39:                                               ; preds = %36
  store i32 -10, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %84

40:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #6
  %41 = load ptr, ptr %14, align 8, !tbaa !5
  %42 = load ptr, ptr %10, align 8, !tbaa !5
  %43 = load ptr, ptr %11, align 8, !tbaa !5
  %44 = load ptr, ptr %12, align 8, !tbaa !5
  %45 = call i32 @arm_2dp_rgb565_user_draw_line_prepare(ptr noundef %41, ptr noundef %42, ptr noundef %43, ptr noundef %44)
  store i32 %45, ptr %16, align 4, !tbaa !10
  %46 = load i32, ptr %16, align 4, !tbaa !10
  %47 = icmp ne i32 0, %46
  br i1 %47, label %48, label %50

48:                                               ; preds = %40
  %49 = load i32, ptr %16, align 4, !tbaa !10
  store i32 %49, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %57

50:                                               ; preds = %40
  %51 = load i8, ptr %13, align 1, !tbaa !9
  %52 = load ptr, ptr %14, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.arm_2d_user_draw_line_descriptor_t, ptr %52, i32 0, i32 4
  store i8 %51, ptr %53, align 4, !tbaa !12
  %54 = load i16, ptr %8, align 2, !tbaa !9
  %55 = load ptr, ptr %14, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.arm_2d_user_draw_line_descriptor_t, ptr %55, i32 0, i32 6
  store i16 %54, ptr %56, align 2, !tbaa !19
  store i32 0, ptr %15, align 4
  br label %57

57:                                               ; preds = %50, %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  %58 = load i32, ptr %15, align 4
  switch i32 %58, label %84 [
    i32 0, label %59
  ]

59:                                               ; preds = %57
  br label %60

60:                                               ; preds = %59
  br label %61

61:                                               ; preds = %60
  br label %64

62:                                               ; preds = %32
  br label %63

63:                                               ; preds = %62, %32
  store i32 -2, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %84

64:                                               ; preds = %61, %32
  %65 = load ptr, ptr %14, align 8, !tbaa !5
  %66 = call zeroext i1 @__arm_2d_op_acquire(ptr noundef %65)
  br i1 %66, label %68, label %67

67:                                               ; preds = %64
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %84

68:                                               ; preds = %64
  %69 = load ptr, ptr %14, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.arm_2d_user_draw_line_descriptor_t, ptr %69, i32 0, i32 0
  %71 = getelementptr inbounds %struct.arm_2d_op_t, ptr %70, i32 0, i32 0
  %72 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %71, i32 0, i32 0
  %73 = getelementptr inbounds %struct.anon.3, ptr %72, i32 0, i32 1
  store ptr @ARM_2D_OP_USER_DRAW_LINE, ptr %73, align 8, !tbaa !9
  %74 = load ptr, ptr %10, align 8, !tbaa !5
  %75 = load ptr, ptr %14, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.arm_2d_user_draw_line_descriptor_t, ptr %75, i32 0, i32 0
  %77 = getelementptr inbounds %struct.arm_2d_op_t, ptr %76, i32 0, i32 1
  %78 = getelementptr inbounds %struct.anon.6, ptr %77, i32 0, i32 0
  store ptr %74, ptr %78, align 8, !tbaa !9
  %79 = load ptr, ptr %14, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.arm_2d_user_draw_line_descriptor_t, ptr %79, i32 0, i32 1
  %81 = load ptr, ptr %12, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %80, ptr align 2 %81, i64 8, i1 false), !tbaa.struct !20
  %82 = load ptr, ptr %14, align 8, !tbaa !5
  %83 = call i32 @__arm_2d_op_invoke(ptr noundef %82)
  store i32 %83, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %84

84:                                               ; preds = %68, %67, %63, %57, %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #6
  %85 = load i32, ptr %7, align 4
  ret i32 %85
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @arm_2d_target_tile_is_new_frame(ptr noundef) #3

declare zeroext i1 @arm_2d_op_wait_async(ptr noundef) #3

; Function Attrs: nounwind uwtable
declare hidden i32 @arm_2dp_rgb565_user_draw_line_prepare(ptr noundef, ptr noundef, ptr noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

declare i32 @__arm_2d_op_invoke(ptr noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !7, i64 84}
!13 = !{!"arm_2d_user_draw_line_descriptor_t", !7, i64 0, !14, i64 64, !17, i64 72, !7, i64 80, !7, i64 84, !18, i64 85, !16, i64 86}
!14 = !{!"arm_2d_user_draw_line_api_params_t", !15, i64 0, !15, i64 4}
!15 = !{!"arm_2d_location_t", !16, i64 0, !16, i64 2}
!16 = !{!"short", !7, i64 0}
!17 = !{!"arm_2d_region_t", !7, i64 0, !7, i64 4}
!18 = !{!"_Bool", !7, i64 0}
!19 = !{!13, !16, i64 86}
!20 = !{i64 0, i64 2, !21, i64 2, i64 2, !21, i64 4, i64 2, !21, i64 6, i64 2, !21}
!21 = !{!16, !16, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.0 }
%struct.anon.0 = type { ptr, %struct.anon.1, %struct.anon.2, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.1 = type { ptr, ptr }
%struct.anon.2 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.60, %struct.anon.61, %union.anon.62, %struct.anon.64, %struct.anon.65, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.3, i64 }
%struct.anon.3 = type { ptr, ptr, %struct.anon.4, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.4 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.5 }
%struct.anon.5 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.60 = type { ptr, ptr }
%struct.anon.61 = type { ptr }
%union.anon.62 = type { %struct.anon.63 }
%struct.anon.63 = type { i32 }
%struct.anon.64 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.37, %union.anon.48, %union.anon.51 }
%union.anon.37 = type { %struct.anon.38 }
%struct.anon.38 = type { i8, %union.arm_2d_color_info_t, %union.anon.41 }
%union.arm_2d_color_info_t = type { %struct.anon.39 }
%struct.anon.39 = type { i8 }
%union.anon.41 = type { i16 }
%union.anon.48 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.49, %union.anon.50 }
%union.anon.49 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.50 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.51 = type { ptr }
%struct.anon.65 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.52, %struct.anon.53 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.52 = type { i32 }
%struct.anon.53 = type { %struct.arm_2d_location_t, %struct.anon.54 }
%struct.anon.54 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.75 = type { %struct.anon.76 }
%struct.anon.76 = type { i8 }
%union.anon.77 = type { %struct.anon.78 }
%struct.anon.78 = type { i8, i8 }
%struct.anon.84 = type { ptr }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@ARM_2D_OP_USER_DRAW_LINE = external dso_local constant { { { i8 }, %union.anon.75, i8, i8, %union.anon.77, { %struct.anon.84, [8 x i8] } } }, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_rgb565_user_draw_line(ptr noundef %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, i16 %4, i8 noundef zeroext %5) local_unnamed_addr #0 {
  %7 = icmp eq ptr %0, null
  %spec.store.select = select i1 %7, ptr getelementptr inbounds (i8, ptr @ARM_2D_CTRL, i64 56), ptr %0
  %8 = tail call i32 @arm_2d_target_tile_is_new_frame(ptr noundef nonnull %1) #2
  switch i32 %8, label %.critedge [
    i32 0, label %16
    i32 1, label %9
  ]

9:                                                ; preds = %6
  %10 = tail call zeroext i1 @arm_2d_op_wait_async(ptr noundef nonnull %spec.store.select) #2
  br i1 %10, label %11, label %.critedge

11:                                               ; preds = %9
  %12 = tail call i32 @arm_2dp_rgb565_user_draw_line_prepare(ptr noundef nonnull %spec.store.select, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3)
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %13, label %.critedge

13:                                               ; preds = %11
  %14 = getelementptr inbounds i8, ptr %spec.store.select, i64 84
  store i8 %5, ptr %14, align 4, !tbaa !5
  %15 = getelementptr inbounds i8, ptr %spec.store.select, i64 86
  store i16 %4, ptr %15, align 2, !tbaa !14
  br label %16

16:                                               ; preds = %13, %6
  %17 = tail call zeroext i1 @__arm_2d_op_acquire(ptr noundef nonnull %spec.store.select) #2
  br i1 %17, label %18, label %.critedge

18:                                               ; preds = %16
  %19 = getelementptr inbounds i8, ptr %spec.store.select, i64 8
  store ptr @ARM_2D_OP_USER_DRAW_LINE, ptr %19, align 8, !tbaa !15
  %20 = getelementptr inbounds i8, ptr %spec.store.select, i64 48
  store ptr %1, ptr %20, align 8, !tbaa !15
  %21 = getelementptr inbounds i8, ptr %spec.store.select, i64 64
  %22 = load i64, ptr %3, align 2
  store i64 %22, ptr %21, align 8
  %23 = tail call i32 @__arm_2d_op_invoke(ptr noundef nonnull %spec.store.select) #2
  br label %.critedge

.critedge:                                        ; preds = %11, %16, %6, %9, %18
  %.1 = phi i32 [ %23, %18 ], [ -10, %9 ], [ -2, %6 ], [ 1, %16 ], [ %12, %11 ]
  ret i32 %.1
}

declare i32 @arm_2d_target_tile_is_new_frame(ptr noundef) local_unnamed_addr #1

declare zeroext i1 @arm_2d_op_wait_async(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden i32 @arm_2dp_rgb565_user_draw_line_prepare(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #0

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) local_unnamed_addr #1

declare i32 @__arm_2d_op_invoke(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 84}
!6 = !{!"arm_2d_user_draw_line_descriptor_t", !7, i64 0, !9, i64 64, !12, i64 72, !7, i64 80, !7, i64 84, !13, i64 85, !11, i64 86}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"arm_2d_user_draw_line_api_params_t", !10, i64 0, !10, i64 4}
!10 = !{!"arm_2d_location_t", !11, i64 0, !11, i64 2}
!11 = !{!"short", !7, i64 0}
!12 = !{!"arm_2d_region_t", !7, i64 0, !7, i64 4}
!13 = !{!"_Bool", !7, i64 0}
!14 = !{!6, !11, i64 86}
!15 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass