; LLVM IR from Saikat2407/DSA_Hacktoberfest2023 :: c++/heap_sort.ll (Z7heapifyRSt6vectorIiSaIiEEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4swapRiS_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7heapifyRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %6 = load i32, ptr %4, align 4, !tbaa !9
  %7 = sdiv i32 %6, 2
  store i32 %7, ptr %5, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %87, %2
  %9 = load i32, ptr %5, align 4, !tbaa !9
  %10 = icmp sge i32 %9, 1
  br i1 %10, label %12, label %11

11:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %90

12:                                               ; preds = %8
  %13 = load i32, ptr %5, align 4, !tbaa !9
  %14 = mul nsw i32 2, %13
  %15 = load i32, ptr %4, align 4, !tbaa !9
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %17, label %58

17:                                               ; preds = %12
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = load i32, ptr %5, align 4, !tbaa !9
  %20 = mul nsw i32 2, %19
  %21 = sub nsw i32 %20, 1
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %22) #2
  %24 = load i32, ptr %23, align 4, !tbaa !9
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = mul nsw i32 2, %26
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %28) #2
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %31 = icmp slt i32 %24, %30
  br i1 %31, label %32, label %58

32:                                               ; preds = %17
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = load i32, ptr %5, align 4, !tbaa !9
  %35 = mul nsw i32 2, %34
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %36) #2
  %38 = load i32, ptr %37, align 4, !tbaa !9
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = sub nsw i32 %40, 1
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %42) #2
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = icmp sgt i32 %38, %44
  br i1 %45, label %46, label %57

46:                                               ; preds = %32
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = load i32, ptr %5, align 4, !tbaa !9
  %49 = mul nsw i32 2, %48
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %50) #2
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = load i32, ptr %5, align 4, !tbaa !9
  %54 = sub nsw i32 %53, 1
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %55) #2
  call void @_Z4swapRiS_(ptr noundef nonnull align 4 dereferenceable(4) %51, ptr noundef nonnull align 4 dereferenceable(4) %56)
  br label %57

57:                                               ; preds = %46, %32
  br label %86

58:                                               ; preds = %17, %12
  %59 = load ptr, ptr %3, align 8, !tbaa !5
  %60 = load i32, ptr %5, align 4, !tbaa !9
  %61 = mul nsw i32 2, %60
  %62 = sub nsw i32 %61, 1
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %63) #2
  %65 = load i32, ptr %64, align 4, !tbaa !9
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = load i32, ptr %5, align 4, !tbaa !9
  %68 = sub nsw i32 %67, 1
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %69) #2
  %71 = load i32, ptr %70, align 4, !tbaa !9
  %72 = icmp sgt i32 %65, %71
  br i1 %72, label %73, label %85

73:                                               ; preds = %58
  %74 = load ptr, ptr %3, align 8, !tbaa !5
  %75 = load i32, ptr %5, align 4, !tbaa !9
  %76 = mul nsw i32 2, %75
  %77 = sub nsw i32 %76, 1
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %78) #2
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  %81 = load i32, ptr %5, align 4, !tbaa !9
  %82 = sub nsw i32 %81, 1
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %83) #2
  call void @_Z4swapRiS_(ptr noundef nonnull align 4 dereferenceable(4) %79, ptr noundef nonnull align 4 dereferenceable(4) %84)
  br label %85

85:                                               ; preds = %73, %58
  br label %86

86:                                               ; preds = %85, %57
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %5, align 4, !tbaa !9
  %89 = add nsw i32 %88, -1
  store i32 %89, ptr %5, align 4, !tbaa !9
  br label %8, !llvm.loop !11

90:                                               ; preds = %11
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4swapRiS_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z7heapifyRSt6vectorIiSaIiEEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 1
  br i1 %3, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %2
  %4 = lshr i32 %1, 1
  %5 = zext nneg i32 %4 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %32, %2
  ret void

.lr.ph:                                           ; preds = %.lr.ph.preheader, %32
  %indvars.iv = phi i64 [ %5, %.lr.ph.preheader ], [ %indvars.iv.next.pre-phi, %32 ]
  %6 = shl nuw nsw i64 %indvars.iv, 1
  %7 = trunc nuw i64 %6 to i32
  %8 = icmp slt i32 %7, %1
  %9 = add nuw i64 %6, 4294967295
  %10 = and i64 %9, 4294967295
  br i1 %8, label %11, label %.lr.ph._crit_edge

11:                                               ; preds = %.lr.ph
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #1
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %6) #1
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp slt i32 %13, %15
  br i1 %16, label %17, label %.lr.ph._crit_edge

17:                                               ; preds = %11
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %6) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = add nsw i64 %indvars.iv, -1
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %20) #1
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = icmp sgt i32 %19, %22
  br i1 %23, label %.sink.split, label %32

.lr.ph._crit_edge:                                ; preds = %.lr.ph, %11
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %10) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = add nsw i64 %indvars.iv, -1
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %26) #1
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = icmp sgt i32 %25, %28
  br i1 %29, label %.sink.split, label %32

.sink.split:                                      ; preds = %.lr.ph._crit_edge, %17
  %.sink31 = phi i64 [ %6, %17 ], [ %10, %.lr.ph._crit_edge ]
  %.sink30 = phi i64 [ %20, %17 ], [ %26, %.lr.ph._crit_edge ]
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.sink31) #1
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.sink30) #1
  tail call void @_Z4swapRiS_(ptr noundef nonnull align 4 dereferenceable(4) %30, ptr noundef nonnull align 4 dereferenceable(4) %31)
  br label %32

32:                                               ; preds = %.sink.split, %17, %.lr.ph._crit_edge
  %indvars.iv.next.pre-phi = phi i64 [ %20, %17 ], [ %26, %.lr.ph._crit_edge ], [ %.sink30, %.sink.split ]
  %33 = icmp sgt i64 %indvars.iv, 1
  br i1 %33, label %.lr.ph, label %._crit_edge, !llvm.loop !9
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass