; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/StatisticsFunctions (arm_absmax_q31)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_absmax_q31(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = load i32, ptr %13, align 4, !tbaa !9
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %16, label %19

16:                                               ; preds = %4
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = load i32, ptr %17, align 4, !tbaa !9
  br label %30

19:                                               ; preds = %4
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = load i32, ptr %20, align 4, !tbaa !9
  %22 = icmp eq i32 %21, -2147483648
  br i1 %22, label %23, label %24

23:                                               ; preds = %19
  br label %28

24:                                               ; preds = %19
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = sub nsw i32 0, %26
  br label %28

28:                                               ; preds = %24, %23
  %29 = phi i32 [ 2147483647, %23 ], [ %27, %24 ]
  br label %30

30:                                               ; preds = %28, %16
  %31 = phi i32 [ %18, %16 ], [ %29, %28 ]
  store i32 %31, ptr %10, align 4, !tbaa !9
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds i32, ptr %32, i32 1
  store ptr %33, ptr %5, align 8, !tbaa !5
  %34 = load i32, ptr %6, align 4, !tbaa !9
  %35 = sub i32 %34, 1
  store i32 %35, ptr %11, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %69, %30
  %37 = load i32, ptr %11, align 4, !tbaa !9
  %38 = icmp ugt i32 %37, 0
  br i1 %38, label %39, label %72

39:                                               ; preds = %36
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = load i32, ptr %40, align 4, !tbaa !9
  %42 = icmp sgt i32 %41, 0
  br i1 %42, label %43, label %46

43:                                               ; preds = %39
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = load i32, ptr %44, align 4, !tbaa !9
  br label %57

46:                                               ; preds = %39
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = load i32, ptr %47, align 4, !tbaa !9
  %49 = icmp eq i32 %48, -2147483648
  br i1 %49, label %50, label %51

50:                                               ; preds = %46
  br label %55

51:                                               ; preds = %46
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = sub nsw i32 0, %53
  br label %55

55:                                               ; preds = %51, %50
  %56 = phi i32 [ 2147483647, %50 ], [ %54, %51 ]
  br label %57

57:                                               ; preds = %55, %43
  %58 = phi i32 [ %45, %43 ], [ %56, %55 ]
  store i32 %58, ptr %9, align 4, !tbaa !9
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds i32, ptr %59, i32 1
  store ptr %60, ptr %5, align 8, !tbaa !5
  %61 = load i32, ptr %10, align 4, !tbaa !9
  %62 = load i32, ptr %9, align 4, !tbaa !9
  %63 = icmp slt i32 %61, %62
  br i1 %63, label %64, label %69

64:                                               ; preds = %57
  %65 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %65, ptr %10, align 4, !tbaa !9
  %66 = load i32, ptr %6, align 4, !tbaa !9
  %67 = load i32, ptr %11, align 4, !tbaa !9
  %68 = sub i32 %66, %67
  store i32 %68, ptr %12, align 4, !tbaa !9
  br label %69

69:                                               ; preds = %64, %57
  %70 = load i32, ptr %11, align 4, !tbaa !9
  %71 = add i32 %70, -1
  store i32 %71, ptr %11, align 4, !tbaa !9
  br label %36, !llvm.loop !11

72:                                               ; preds = %36
  %73 = load i32, ptr %10, align 4, !tbaa !9
  %74 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 %73, ptr %74, align 4, !tbaa !9
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 %75, ptr %76, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @arm_absmax_q31(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %5 = load i32, ptr %0, align 4, !tbaa !5
  %6 = icmp sgt i32 %5, 0
  %7 = icmp eq i32 %5, -2147483648
  %8 = sub nsw i32 0, %5
  %spec.select = select i1 %7, i32 2147483647, i32 %8
  %9 = select i1 %6, i32 %5, i32 %spec.select
  %.02133 = add i32 %1, -1
  %.not34 = icmp eq i32 %.02133, 0
  br i1 %.not34, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %xtraiter = and i32 %.02133, 1
  %10 = icmp eq i32 %1, 2
  br i1 %10, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i32 %.02133, -2
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %.02138 = phi i32 [ %.02133, %.lr.ph.preheader.new ], [ %.021.1, %.lr.ph ]
  %.037 = phi i32 [ 0, %.lr.ph.preheader.new ], [ %spec.select32.1, %.lr.ph ]
  %.02236 = phi i32 [ %9, %.lr.ph.preheader.new ], [ %spec.select31.1, %.lr.ph ]
  %.pn35 = phi ptr [ %0, %.lr.ph.preheader.new ], [ %.024.1, %.lr.ph ]
  %niter = phi i32 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %.024 = getelementptr inbounds i8, ptr %.pn35, i64 4
  %11 = load i32, ptr %.024, align 4, !tbaa !5
  %12 = icmp sgt i32 %11, 0
  %13 = icmp eq i32 %11, -2147483648
  %14 = sub nsw i32 0, %11
  %spec.select30 = select i1 %13, i32 2147483647, i32 %14
  %15 = select i1 %12, i32 %11, i32 %spec.select30
  %16 = icmp slt i32 %.02236, %15
  %17 = sub i32 %1, %.02138
  %spec.select31 = tail call i32 @llvm.smax.i32(i32 %.02236, i32 %15)
  %spec.select32 = select i1 %16, i32 %17, i32 %.037
  %.021 = add i32 %.02138, -1
  %.024.1 = getelementptr inbounds i8, ptr %.pn35, i64 8
  %18 = load i32, ptr %.024.1, align 4, !tbaa !5
  %19 = icmp sgt i32 %18, 0
  %20 = icmp eq i32 %18, -2147483648
  %21 = sub nsw i32 0, %18
  %spec.select30.1 = select i1 %20, i32 2147483647, i32 %21
  %22 = select i1 %19, i32 %18, i32 %spec.select30.1
  %23 = icmp slt i32 %spec.select31, %22
  %24 = sub i32 %1, %.021
  %spec.select31.1 = tail call i32 @llvm.smax.i32(i32 %spec.select31, i32 %22)
  %spec.select32.1 = select i1 %23, i32 %24, i32 %spec.select32
  %.021.1 = add i32 %.02138, -2
  %niter.next.1 = add i32 %niter, 2
  %niter.ncmp.1 = icmp eq i32 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %spec.select31.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select31.1, %.lr.ph ]
  %spec.select32.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select32.1, %.lr.ph ]
  %.02138.unr = phi i32 [ %.02133, %.lr.ph.preheader ], [ %.021.1, %.lr.ph ]
  %.037.unr = phi i32 [ 0, %.lr.ph.preheader ], [ %spec.select32.1, %.lr.ph ]
  %.02236.unr = phi i32 [ %9, %.lr.ph.preheader ], [ %spec.select31.1, %.lr.ph ]
  %.pn35.unr = phi ptr [ %0, %.lr.ph.preheader ], [ %.024.1, %.lr.ph ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %.024.epil = getelementptr inbounds i8, ptr %.pn35.unr, i64 4
  %25 = load i32, ptr %.024.epil, align 4, !tbaa !5
  %26 = icmp sgt i32 %25, 0
  %27 = icmp eq i32 %25, -2147483648
  %28 = sub nsw i32 0, %25
  %spec.select30.epil = select i1 %27, i32 2147483647, i32 %28
  %29 = select i1 %26, i32 %25, i32 %spec.select30.epil
  %30 = icmp slt i32 %.02236.unr, %29
  %31 = sub i32 %1, %.02138.unr
  %spec.select31.epil = tail call i32 @llvm.smax.i32(i32 %.02236.unr, i32 %29)
  %spec.select32.epil = select i1 %30, i32 %31, i32 %.037.unr
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.epil, %._crit_edge.loopexit.unr-lcssa, %4
  %.022.lcssa = phi i32 [ %9, %4 ], [ %spec.select31.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select31.epil, %.lr.ph.epil ]
  %.0.lcssa = phi i32 [ 0, %4 ], [ %spec.select32.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select32.epil, %.lr.ph.epil ]
  store i32 %.022.lcssa, ptr %2, align 4, !tbaa !5
  store i32 %.0.lcssa, ptr %3, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass