; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code6logandERK3Regy)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i1 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code6logandERK3Regy(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i64 %2, ptr %6, align 8, !tbaa !9
  %10 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !11
  br label %11

11:                                               ; preds = %55, %3
  %12 = load i32, ptr %7, align 4, !tbaa !11
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13)
  %15 = icmp slt i32 %12, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %58

17:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %18 = load i64, ptr %6, align 8, !tbaa !9
  %19 = trunc i64 %18 to i8
  store i8 %19, ptr %8, align 1, !tbaa !13
  %20 = load i8, ptr %8, align 1, !tbaa !13
  %21 = zext i8 %20 to i32
  %22 = icmp eq i32 %21, 0
  br i1 %22, label %23, label %27

23:                                               ; preds = %17
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = load i32, ptr %7, align 4, !tbaa !11
  %26 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %24, i32 noundef %25)
  call void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200) %10, i8 noundef zeroext %26, i1 noundef zeroext true)
  br label %52

27:                                               ; preds = %17
  %28 = load i8, ptr %8, align 1, !tbaa !13
  %29 = zext i8 %28 to i32
  %30 = icmp eq i32 %29, 255
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  br label %51

32:                                               ; preds = %27
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !11
  %35 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %33, i32 noundef %34)
  %36 = zext i8 %35 to i32
  %37 = icmp sge i32 %36, 16
  br i1 %37, label %38, label %43

38:                                               ; preds = %32
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = load i32, ptr %7, align 4, !tbaa !11
  %41 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %39, i32 noundef %40)
  %42 = load i8, ptr %8, align 1, !tbaa !13
  call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %10, i32 noundef 4, i8 noundef zeroext %41, i8 noundef zeroext %42)
  br label %50

43:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  %44 = load i8, ptr %8, align 1, !tbaa !13
  %45 = call noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200) %10, i8 noundef zeroext %44)
  store i8 %45, ptr %9, align 1, !tbaa !13
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !11
  %48 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %46, i32 noundef %47)
  %49 = load i8, ptr %9, align 1, !tbaa !13
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %10, i32 noundef 3, i8 noundef zeroext %48, i8 noundef zeroext %49)
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  br label %50

50:                                               ; preds = %43, %38
  br label %51

51:                                               ; preds = %50, %31
  br label %52

52:                                               ; preds = %51, %23
  %53 = load i64, ptr %6, align 8, !tbaa !9
  %54 = lshr i64 %53, 8
  store i64 %54, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  br label %55

55:                                               ; preds = %52
  %56 = load i32, ptr %7, align 4, !tbaa !11
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %7, align 4, !tbaa !11
  br label %11, !llvm.loop !14

58:                                               ; preds = %16
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code6logandERK3Regy(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %2) local_unnamed_addr #1 align 2 {
  %4 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %17, %3
  ret void

.lr.ph:                                           ; preds = %3, %17
  %.021 = phi i64 [ %18, %17 ], [ %2, %3 ]
  %.01820 = phi i32 [ %19, %17 ], [ 0, %3 ]
  %6 = trunc i64 %.021 to i8
  switch i8 %6, label %9 [
    i8 0, label %7
    i8 -1, label %17
  ]

7:                                                ; preds = %.lr.ph
  %8 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.01820)
  tail call void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %8, i1 noundef zeroext true)
  br label %17

9:                                                ; preds = %.lr.ph
  %10 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.01820)
  %11 = icmp ugt i8 %10, 15
  br i1 %11, label %12, label %14

12:                                               ; preds = %9
  %13 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.01820)
  tail call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 4, i8 noundef zeroext %13, i8 noundef zeroext %6)
  br label %17

14:                                               ; preds = %9
  %15 = tail call noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %6)
  %16 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.01820)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 3, i8 noundef zeroext %16, i8 noundef zeroext %15)
  br label %17

17:                                               ; preds = %.lr.ph, %14, %12, %7
  %18 = lshr i64 %.021, 8
  %19 = add nuw nsw i32 %.01820, 1
  %20 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %.lr.ph, label %._crit_edge, !llvm.loop !5
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass