; LLVM IR from ERGO-Code/HiGHS :: src/util/HighsSort.ll (Z15increasingSetOkRKSt6vectorIiSaIiEEiib)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z15increasingSetOkRKSt6vectorIiSaIiEEiib(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i1 noundef zeroext %3) #1 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  %16 = zext i1 %3 to i8
  store i8 %16, ptr %9, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #2
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #2
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = icmp sle i32 %20, %21
  %23 = zext i1 %22 to i8
  store i8 %23, ptr %11, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %24 = load i8, ptr %11, align 1, !tbaa !11, !range !13, !noundef !14
  %25 = trunc i8 %24 to i1
  br i1 %25, label %26, label %35

26:                                               ; preds = %4
  %27 = load i8, ptr %9, align 1, !tbaa !11, !range !13, !noundef !14
  %28 = trunc i8 %27 to i1
  br i1 %28, label %29, label %32

29:                                               ; preds = %26
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = sub nsw i32 %30, 1
  store i32 %31, ptr %12, align 4, !tbaa !9
  br label %34

32:                                               ; preds = %26
  %33 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %33, ptr %12, align 4, !tbaa !9
  br label %34

34:                                               ; preds = %32, %29
  br label %36

35:                                               ; preds = %4
  store i32 -2147483647, ptr %12, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %35, %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %37

37:                                               ; preds = %75, %36
  %38 = load i32, ptr %13, align 4, !tbaa !9
  %39 = load i32, ptr %10, align 4, !tbaa !9
  %40 = icmp slt i32 %38, %39
  br i1 %40, label %42, label %41

41:                                               ; preds = %37
  store i32 2, ptr %14, align 4
  br label %78

42:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = load i32, ptr %13, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !9
  store i32 %47, ptr %15, align 4, !tbaa !9
  %48 = load i8, ptr %9, align 1, !tbaa !11, !range !13, !noundef !14
  %49 = trunc i8 %48 to i1
  br i1 %49, label %50, label %56

50:                                               ; preds = %42
  %51 = load i32, ptr %15, align 4, !tbaa !9
  %52 = load i32, ptr %12, align 4, !tbaa !9
  %53 = icmp sle i32 %51, %52
  br i1 %53, label %54, label %55

54:                                               ; preds = %50
  store i1 false, ptr %5, align 1
  store i32 1, ptr %14, align 4
  br label %72

55:                                               ; preds = %50
  br label %62

56:                                               ; preds = %42
  %57 = load i32, ptr %15, align 4, !tbaa !9
  %58 = load i32, ptr %12, align 4, !tbaa !9
  %59 = icmp slt i32 %57, %58
  br i1 %59, label %60, label %61

60:                                               ; preds = %56
  store i1 false, ptr %5, align 1
  store i32 1, ptr %14, align 4
  br label %72

61:                                               ; preds = %56
  br label %62

62:                                               ; preds = %61, %55
  %63 = load i8, ptr %11, align 1, !tbaa !11, !range !13, !noundef !14
  %64 = trunc i8 %63 to i1
  br i1 %64, label %65, label %70

65:                                               ; preds = %62
  %66 = load i32, ptr %15, align 4, !tbaa !9
  %67 = load i32, ptr %8, align 4, !tbaa !9
  %68 = icmp sgt i32 %66, %67
  br i1 %68, label %69, label %70

69:                                               ; preds = %65
  store i1 false, ptr %5, align 1
  store i32 1, ptr %14, align 4
  br label %72

70:                                               ; preds = %65, %62
  %71 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %71, ptr %12, align 4, !tbaa !9
  store i32 0, ptr %14, align 4
  br label %72

72:                                               ; preds = %70, %69, %60, %54
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  %73 = load i32, ptr %14, align 4
  switch i32 %73, label %78 [
    i32 0, label %74
  ]

74:                                               ; preds = %72
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %13, align 4, !tbaa !9
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %13, align 4, !tbaa !9
  br label %37, !llvm.loop !15

78:                                               ; preds = %72, %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  %79 = load i32, ptr %14, align 4
  switch i32 %79, label %81 [
    i32 2, label %80
  ]

80:                                               ; preds = %78
  store i1 true, ptr %5, align 1
  store i32 1, ptr %14, align 4
  br label %81

81:                                               ; preds = %80, %78
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %82 = load i1, ptr %5, align 1
  ret i1 %82
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z15increasingSetOkRKSt6vectorIiSaIiEEiib(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i1 noundef zeroext %3) local_unnamed_addr #0 {
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %6 = trunc i64 %5 to i32
  %.not = icmp sgt i32 %1, %2
  %7 = sext i1 %3 to i32
  %spec.select = add nsw i32 %7, %1
  %.not3339 = icmp slt i32 %6, 1
  br i1 %.not3339, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %4
  br i1 %3, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph
  br i1 %.not, label %.lr.ph.split.us.split.us, label %.lr.ph.split.us.split.preheader

.lr.ph.split.us.split.preheader:                  ; preds = %.lr.ph.split.us
  %8 = and i64 %5, 2147483647
  %wide.trip.count82 = and i64 %5, 2147483647
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %.not32.us101 = icmp sle i32 %10, %spec.select
  %.not69102 = icmp sgt i32 %10, %2
  %or.cond103 = or i1 %.not32.us101, %.not69102
  br i1 %or.cond103, label %.critedge, label %.lr.ph105

.lr.ph.split.us.split.us:                         ; preds = %.lr.ph.split.us
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %.not32.us.us64 = icmp sgt i32 %12, -2147483647
  br i1 %.not32.us.us64, label %.lr.ph66.preheader, label %.critedge

.lr.ph66.preheader:                               ; preds = %.lr.ph.split.us.split.us
  %13 = and i64 %5, 2147483647
  %14 = add i64 %5, 4294967295
  %wide.trip.count87 = and i64 %14, 4294967295
  br label %.lr.ph66

15:                                               ; preds = %.lr.ph66
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next85) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %.not32.us.us = icmp sgt i32 %17, %18
  br i1 %.not32.us.us, label %.lr.ph66, label %.critedge.loopexit, !llvm.loop !9

.lr.ph66:                                         ; preds = %.lr.ph66.preheader, %15
  %indvars.iv84 = phi i64 [ 0, %.lr.ph66.preheader ], [ %indvars.iv.next85, %15 ]
  %18 = phi i32 [ %12, %.lr.ph66.preheader ], [ %17, %15 ]
  %indvars.iv.next85 = add nuw nsw i64 %indvars.iv84, 1
  %exitcond88 = icmp eq i64 %indvars.iv84, %wide.trip.count87
  br i1 %exitcond88, label %.critedge.loopexit, label %15, !llvm.loop !9

.lr.ph.split.us.split:                            ; preds = %.lr.ph105
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next81) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %.not32.us = icmp sle i32 %20, %21
  %.not69 = icmp sgt i32 %20, %2
  %or.cond = or i1 %.not32.us, %.not69
  br i1 %or.cond, label %.critedge.loopexit108, label %.lr.ph105, !llvm.loop !9

.lr.ph105:                                        ; preds = %.lr.ph.split.us.split.preheader, %.lr.ph.split.us.split
  %21 = phi i32 [ %20, %.lr.ph.split.us.split ], [ %10, %.lr.ph.split.us.split.preheader ]
  %indvars.iv80104 = phi i64 [ %indvars.iv.next81, %.lr.ph.split.us.split ], [ 0, %.lr.ph.split.us.split.preheader ]
  %indvars.iv.next81 = add nuw nsw i64 %indvars.iv80104, 1
  %exitcond83 = icmp eq i64 %indvars.iv.next81, %wide.trip.count82
  br i1 %exitcond83, label %.critedge.loopexit108, label %.lr.ph.split.us.split, !llvm.loop !9

.lr.ph.split:                                     ; preds = %.lr.ph
  br i1 %.not, label %.lr.ph.split.split.us, label %.lr.ph.split.split.preheader

.lr.ph.split.split.preheader:                     ; preds = %.lr.ph.split
  %22 = and i64 %5, 2147483647
  %wide.trip.count = and i64 %5, 2147483647
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp slt i32 %24, %spec.select
  %.not6896 = icmp sgt i32 %24, %2
  %or.cond7497 = or i1 %25, %.not6896
  br i1 %or.cond7497, label %.critedge, label %.lr.ph99

.lr.ph.split.split.us:                            ; preds = %.lr.ph.split
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp eq i32 %27, -2147483648
  br i1 %28, label %.critedge, label %.lr.ph60.preheader

.lr.ph60.preheader:                               ; preds = %.lr.ph.split.split.us
  %29 = and i64 %5, 2147483647
  %30 = add i64 %5, 4294967295
  %wide.trip.count78 = and i64 %30, 4294967295
  br label %.lr.ph60

31:                                               ; preds = %.lr.ph60
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next76) #1
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = icmp slt i32 %33, %35
  br i1 %34, label %.critedge.loopexit90, label %.lr.ph60, !llvm.loop !9

.lr.ph60:                                         ; preds = %.lr.ph60.preheader, %31
  %indvars.iv75 = phi i64 [ 0, %.lr.ph60.preheader ], [ %indvars.iv.next76, %31 ]
  %35 = phi i32 [ %27, %.lr.ph60.preheader ], [ %33, %31 ]
  %indvars.iv.next76 = add nuw nsw i64 %indvars.iv75, 1
  %exitcond79 = icmp eq i64 %indvars.iv75, %wide.trip.count78
  br i1 %exitcond79, label %.critedge.loopexit90, label %31, !llvm.loop !9

.lr.ph99:                                         ; preds = %.lr.ph.split.split.preheader, %.lr.ph.split.split
  %36 = phi i32 [ %38, %.lr.ph.split.split ], [ %24, %.lr.ph.split.split.preheader ]
  %indvars.iv98 = phi i64 [ %indvars.iv.next, %.lr.ph.split.split ], [ 0, %.lr.ph.split.split.preheader ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv98, 1
  %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond, label %.critedge.loopexit109, label %.lr.ph.split.split, !llvm.loop !9

.lr.ph.split.split:                               ; preds = %.lr.ph99
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next) #1
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = icmp slt i32 %38, %36
  %.not68 = icmp sgt i32 %38, %2
  %or.cond74 = or i1 %39, %.not68
  br i1 %or.cond74, label %.critedge.loopexit109, label %.lr.ph99, !llvm.loop !9

.critedge.loopexit:                               ; preds = %15, %.lr.ph66
  %.not33.us.us.le = icmp uge i64 %indvars.iv.next85, %13
  br label %.critedge

.critedge.loopexit90:                             ; preds = %31, %.lr.ph60
  %.not33.us54.le = icmp uge i64 %indvars.iv.next76, %29
  br label %.critedge

.critedge.loopexit108:                            ; preds = %.lr.ph105, %.lr.ph.split.us.split
  %.not33.us.le = icmp uge i64 %indvars.iv.next81, %8
  br label %.critedge

.critedge.loopexit109:                            ; preds = %.lr.ph99, %.lr.ph.split.split
  %.not33.le = icmp uge i64 %indvars.iv.next, %22
  br label %.critedge

.critedge:                                        ; preds = %.critedge.loopexit109, %.critedge.loopexit108, %.lr.ph.split.split.preheader, %.lr.ph.split.us.split.preheader, %.critedge.loopexit90, %.critedge.loopexit, %.lr.ph.split.us.split.us, %.lr.ph.split.split.us, %4
  %.not33.lcssa = phi i1 [ true, %4 ], [ false, %.lr.ph.split.split.us ], [ false, %.lr.ph.split.us.split.us ], [ %.not33.us.us.le, %.critedge.loopexit ], [ %.not33.us54.le, %.critedge.loopexit90 ], [ false, %.lr.ph.split.us.split.preheader ], [ false, %.lr.ph.split.split.preheader ], [ %.not33.us.le, %.critedge.loopexit108 ], [ %.not33.le, %.critedge.loopexit109 ]
  ret i1 %.not33.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass