; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d_alpha_blending)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.10 }
%struct.anon.10 = type { ptr, %struct.anon.11, %struct.anon.12, i16, i16, i16, i16, ptr, %union.anon.13 }
%struct.anon.11 = type { ptr, ptr }
%struct.anon.12 = type { ptr, ptr }
%union.anon.13 = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.67, %struct.anon.68, %union.anon.69, %struct.anon.71, %struct.anon.72, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.14, i64 }
%struct.anon.14 = type { ptr, ptr, %struct.anon.15, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.15 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.16 }
%struct.anon.16 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.67 = type { ptr, ptr }
%struct.anon.68 = type { ptr }
%union.anon.69 = type { %struct.anon.70 }
%struct.anon.70 = type { i32 }
%struct.anon.71 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.48, %union.anon.57, %union.anon.58 }
%union.anon.48 = type { %struct.anon.49 }
%struct.anon.49 = type { i8, %union.arm_2d_color_info_t, %union.anon.50 }
%union.arm_2d_color_info_t = type { %struct.anon.1 }
%struct.anon.1 = type { i8 }
%union.anon.50 = type { i16 }
%union.anon.57 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.3, %union.anon.4 }
%union.anon.3 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.4 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.58 = type { ptr }
%struct.anon.72 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.59, %struct.anon.60 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.59 = type { i32 }
%struct.anon.60 = type { %struct.arm_2d_location_t, %struct.anon.61 }
%struct.anon.61 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.80 = type { %struct.anon.81 }
%struct.anon.81 = type { i8 }
%union.anon.82 = type { %struct.anon.83 }
%struct.anon.83 = type { i8, i8 }
%struct.anon.87 = type { ptr, ptr }
%struct.arm_2d_op_src_msk_t = type { %struct.arm_2d_op_core_t, %struct.anon.36, %struct.anon.37, i32, %struct.anon.38 }
%struct.anon.36 = type { ptr, ptr }
%struct.anon.37 = type { ptr }
%struct.anon.38 = type { ptr, ptr }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@.str.18 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [92 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [18 x i8], align 1
@__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_des_mask = external hidden unnamed_addr constant [179 x i8], align 1
@ARM_2D_OP_TILE_COPY_WITH_DES_MASK_CCCN888 = external dso_local constant { { { i8 }, %union.anon.80, i8, i8, %union.anon.82, { %struct.anon.87 } } }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

declare i32 @__arm_mask_validate(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) #2

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) #2

declare i32 @__arm_2d_op_invoke(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_tile_copy_with_des_mask(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef %4, i32 noundef %5) #3 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store ptr %2, ptr %10, align 8, !tbaa !5
  store ptr %3, ptr %11, align 8, !tbaa !5
  store ptr %4, ptr %12, align 8, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !9
  %17 = load ptr, ptr %9, align 8, !tbaa !5
  %18 = icmp ne ptr null, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %6
  br label %21

20:                                               ; preds = %6
  call void @__assert_fail(ptr noundef @.str.18, ptr noundef @.str.19, i32 noundef 866, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_des_mask) #4
  unreachable

21:                                               ; preds = %19
  %22 = load ptr, ptr %10, align 8, !tbaa !5
  %23 = icmp ne ptr null, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %21
  br label %26

25:                                               ; preds = %21
  call void @__assert_fail(ptr noundef @.str.21, ptr noundef @.str.19, i32 noundef 867, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_des_mask) #4
  unreachable

26:                                               ; preds = %24
  %27 = load ptr, ptr %11, align 8, !tbaa !5
  %28 = icmp ne ptr null, %27
  br i1 %28, label %29, label %30

29:                                               ; preds = %26
  br label %31

30:                                               ; preds = %26
  call void @__assert_fail(ptr noundef @.str.22, ptr noundef @.str.19, i32 noundef 868, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_cccn888_tile_copy_with_des_mask) #4
  unreachable

31:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #5
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %32, ptr %14, align 8, !tbaa !5
  %33 = load ptr, ptr %14, align 8, !tbaa !5
  %34 = icmp eq ptr null, %33
  br i1 %34, label %35, label %36

35:                                               ; preds = %31
  store ptr getelementptr inbounds (%struct.anon.10, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %14, align 8, !tbaa !5
  br label %36

36:                                               ; preds = %35, %31
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = load ptr, ptr %10, align 8, !tbaa !5
  %39 = load ptr, ptr %11, align 8, !tbaa !5
  %40 = load i32, ptr %13, align 4, !tbaa !9
  %41 = call i32 @__arm_mask_validate(ptr noundef %37, ptr noundef null, ptr noundef %38, ptr noundef %39, i32 noundef %40)
  store i32 %41, ptr %15, align 4, !tbaa !9
  %42 = load i32, ptr %15, align 4, !tbaa !9
  %43 = icmp slt i32 %42, 0
  br i1 %43, label %44, label %46

44:                                               ; preds = %36
  %45 = load i32, ptr %15, align 4, !tbaa !9
  store i32 %45, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %79

46:                                               ; preds = %36
  %47 = load ptr, ptr %14, align 8, !tbaa !5
  %48 = call zeroext i1 @__arm_2d_op_acquire(ptr noundef %47)
  br i1 %48, label %50, label %49

49:                                               ; preds = %46
  store i32 1, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %79

50:                                               ; preds = %46
  %51 = load ptr, ptr %14, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %51, i32 0, i32 0
  %53 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %52, i32 0, i32 0
  %54 = getelementptr inbounds %struct.anon.14, ptr %53, i32 0, i32 1
  store ptr @ARM_2D_OP_TILE_COPY_WITH_DES_MASK_CCCN888, ptr %54, align 8, !tbaa !11
  %55 = load ptr, ptr %10, align 8, !tbaa !5
  %56 = load ptr, ptr %14, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %56, i32 0, i32 1
  %58 = getelementptr inbounds %struct.anon.36, ptr %57, i32 0, i32 0
  store ptr %55, ptr %58, align 8, !tbaa !20
  %59 = load ptr, ptr %12, align 8, !tbaa !5
  %60 = load ptr, ptr %14, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %60, i32 0, i32 1
  %62 = getelementptr inbounds %struct.anon.36, ptr %61, i32 0, i32 1
  store ptr %59, ptr %62, align 8, !tbaa !21
  %63 = load ptr, ptr %9, align 8, !tbaa !5
  %64 = load ptr, ptr %14, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %64, i32 0, i32 2
  %66 = getelementptr inbounds %struct.anon.37, ptr %65, i32 0, i32 0
  store ptr %63, ptr %66, align 8, !tbaa !22
  %67 = load i32, ptr %13, align 4, !tbaa !9
  %68 = load ptr, ptr %14, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %68, i32 0, i32 3
  store i32 %67, ptr %69, align 8, !tbaa !23
  %70 = load ptr, ptr %14, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %70, i32 0, i32 4
  %72 = getelementptr inbounds %struct.anon.38, ptr %71, i32 0, i32 0
  store ptr null, ptr %72, align 8, !tbaa !24
  %73 = load ptr, ptr %11, align 8, !tbaa !5
  %74 = load ptr, ptr %14, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.arm_2d_op_src_msk_t, ptr %74, i32 0, i32 4
  %76 = getelementptr inbounds %struct.anon.38, ptr %75, i32 0, i32 1
  store ptr %73, ptr %76, align 8, !tbaa !25
  %77 = load ptr, ptr %14, align 8, !tbaa !5
  %78 = call i32 @__arm_2d_op_invoke(ptr noundef %77)
  store i32 %78, ptr %7, align 4
  store i32 1, ptr %16, align 4
  br label %79

79:                                               ; preds = %50, %49, %44
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #5
  %80 = load i32, ptr %7, align 4
  ret i32 %80
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"arm_2d_op_src_msk_t", !13, i64 0, !18, i64 48, !19, i64 64, !10, i64 72, !18, i64 80}
!13 = !{!"arm_2d_op_core_t", !14, i64 0, !17, i64 40}
!14 = !{!"", !6, i64 0, !6, i64 8, !15, i64 16, !7, i64 17, !7, i64 18, !16, i64 24}
!15 = !{!"", !7, i64 0}
!16 = !{!"arm_2d_op_evt_t", !6, i64 0, !6, i64 8}
!17 = !{!"long", !7, i64 0}
!18 = !{!"", !6, i64 0, !6, i64 8}
!19 = !{!"", !6, i64 0}
!20 = !{!12, !6, i64 48}
!21 = !{!12, !6, i64 56}
!22 = !{!12, !6, i64 64}
!23 = !{!12, !10, i64 72}
!24 = !{!12, !6, i64 80}
!25 = !{!12, !6, i64 88}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon.10 }
%struct.anon.10 = type { ptr, %struct.anon.11, %struct.anon.12, i16, i16, i16, i16, ptr, %union.anon.13 }
%struct.anon.11 = type { ptr, ptr }
%struct.anon.12 = type { ptr, ptr }
%union.anon.13 = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.67, %struct.anon.68, %union.anon.69, %struct.anon.71, %struct.anon.72, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.14, i64 }
%struct.anon.14 = type { ptr, ptr, %struct.anon.15, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.15 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.16 }
%struct.anon.16 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.67 = type { ptr, ptr }
%struct.anon.68 = type { ptr }
%union.anon.69 = type { %struct.anon.70 }
%struct.anon.70 = type { i32 }
%struct.anon.71 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.48, %union.anon.57, %union.anon.58 }
%union.anon.48 = type { %struct.anon.49 }
%struct.anon.49 = type { i8, %union.arm_2d_color_info_t, %union.anon.50 }
%union.arm_2d_color_info_t = type { %struct.anon.1 }
%struct.anon.1 = type { i8 }
%union.anon.50 = type { i16 }
%union.anon.57 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.3, %union.anon.4 }
%union.anon.3 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.4 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.58 = type { ptr }
%struct.anon.72 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.59, %struct.anon.60 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.59 = type { i32 }
%struct.anon.60 = type { %struct.arm_2d_location_t, %struct.anon.61 }
%struct.anon.61 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.80 = type { %struct.anon.81 }
%struct.anon.81 = type { i8 }
%union.anon.82 = type { %struct.anon.83 }
%struct.anon.83 = type { i8, i8 }
%struct.anon.87 = type { ptr, ptr }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@ARM_2D_OP_TILE_COPY_WITH_DES_MASK_CCCN888 = external dso_local constant { { { i8 }, %union.anon.80, i8, i8, %union.anon.82, { %struct.anon.87 } } }, align 8

declare i32 @__arm_mask_validate(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #0

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) local_unnamed_addr #0

declare i32 @__arm_2d_op_invoke(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_tile_copy_with_des_mask(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef %4, i32 noundef %5) local_unnamed_addr #1 {
  %7 = icmp eq ptr %0, null
  %spec.store.select = select i1 %7, ptr getelementptr inbounds (i8, ptr @ARM_2D_CTRL, i64 56), ptr %0
  %8 = tail call i32 @__arm_mask_validate(ptr noundef nonnull %1, ptr noundef null, ptr noundef nonnull %2, ptr noundef nonnull %3, i32 noundef %5) #2
  %9 = icmp slt i32 %8, 0
  br i1 %9, label %21, label %10

10:                                               ; preds = %6
  %11 = tail call zeroext i1 @__arm_2d_op_acquire(ptr noundef nonnull %spec.store.select) #2
  br i1 %11, label %12, label %21

12:                                               ; preds = %10
  %13 = getelementptr inbounds i8, ptr %spec.store.select, i64 8
  store ptr @ARM_2D_OP_TILE_COPY_WITH_DES_MASK_CCCN888, ptr %13, align 8, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %spec.store.select, i64 48
  store ptr %2, ptr %14, align 8, !tbaa !18
  %15 = getelementptr inbounds i8, ptr %spec.store.select, i64 56
  store ptr %4, ptr %15, align 8, !tbaa !19
  %16 = getelementptr inbounds i8, ptr %spec.store.select, i64 64
  store ptr %1, ptr %16, align 8, !tbaa !20
  %17 = getelementptr inbounds i8, ptr %spec.store.select, i64 72
  store i32 %5, ptr %17, align 8, !tbaa !21
  %18 = getelementptr inbounds i8, ptr %spec.store.select, i64 80
  store ptr null, ptr %18, align 8, !tbaa !22
  %19 = getelementptr inbounds i8, ptr %spec.store.select, i64 88
  store ptr %3, ptr %19, align 8, !tbaa !23
  %20 = tail call i32 @__arm_2d_op_invoke(ptr noundef nonnull %spec.store.select) #2
  br label %21

21:                                               ; preds = %10, %6, %12
  %.0 = phi i32 [ %20, %12 ], [ %8, %6 ], [ 1, %10 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 8}
!6 = !{!"arm_2d_op_src_msk_t", !7, i64 0, !15, i64 48, !16, i64 64, !17, i64 72, !15, i64 80}
!7 = !{!"arm_2d_op_core_t", !8, i64 0, !14, i64 40}
!8 = !{!"", !9, i64 0, !9, i64 8, !12, i64 16, !10, i64 17, !10, i64 18, !13, i64 24}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"", !10, i64 0}
!13 = !{!"arm_2d_op_evt_t", !9, i64 0, !9, i64 8}
!14 = !{!"long", !10, i64 0}
!15 = !{!"", !9, i64 0, !9, i64 8}
!16 = !{!"", !9, i64 0}
!17 = !{!"int", !10, i64 0}
!18 = !{!6, !9, i64 48}
!19 = !{!6, !9, i64 56}
!20 = !{!6, !9, i64 64}
!21 = !{!6, !17, i64 72}
!22 = !{!6, !9, i64 80}
!23 = !{!6, !9, i64 88}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass