; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_scratch_mem_t = type { %union.anon.92, i64 }
%union.anon.92 = type { %union.anon.93 }
%union.anon.93 = type { %struct.anon.94 }
%struct.anon.94 = type { i32 }

@.str.1 = external hidden unnamed_addr constant [94 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [6 x i8], align 1
@__PRETTY_FUNCTION__.arm_2d_scratch_memory_new = external hidden unnamed_addr constant [121 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @arm_2d_scratch_memory_new(ptr noundef nonnull %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i16 noundef zeroext %3, i32 noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i16, align 2
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i16 %1, ptr %8, align 2, !tbaa !9
  store i16 %2, ptr %9, align 2, !tbaa !9
  store i16 %3, ptr %10, align 2, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %14 = load i16, ptr %8, align 2, !tbaa !9
  %15 = zext i16 %14 to i64
  %16 = load i16, ptr %9, align 2, !tbaa !9
  %17 = zext i16 %16 to i64
  %18 = mul i64 %15, %17
  store i64 %18, ptr %12, align 8, !tbaa !13
  br label %19

19:                                               ; preds = %5
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = icmp eq ptr null, %20
  br i1 %21, label %22, label %23

22:                                               ; preds = %19
  call void @__assert_fail(ptr noundef @.str.4, ptr noundef @.str.1, i32 noundef 2445, ptr noundef @__PRETTY_FUNCTION__.arm_2d_scratch_memory_new) #4
  unreachable

23:                                               ; preds = %19
  %24 = load i64, ptr %12, align 8, !tbaa !13
  %25 = icmp eq i64 0, %24
  br i1 %25, label %26, label %27

26:                                               ; preds = %23
  br label %91

27:                                               ; preds = %23
  br label %28

28:                                               ; preds = %27
  %29 = load i64, ptr %12, align 8, !tbaa !13
  %30 = add i64 %29, 3
  %31 = and i64 %30, -4
  store i64 %31, ptr %12, align 8, !tbaa !13
  %32 = load i64, ptr %12, align 8, !tbaa !13
  %33 = add i64 %32, 4
  %34 = trunc i64 %33 to i32
  %35 = load i16, ptr %10, align 2, !tbaa !9
  %36 = trunc i16 %35 to i8
  %37 = load i32, ptr %11, align 4, !tbaa !11
  %38 = call ptr @__arm_2d_allocate_scratch_memory(i32 noundef %34, i8 noundef zeroext %36, i32 noundef %37)
  %39 = ptrtoint ptr %38 to i64
  %40 = load ptr, ptr %7, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %40, i32 0, i32 1
  store i64 %39, ptr %41, align 8, !tbaa !15
  %42 = load i64, ptr %12, align 8, !tbaa !13
  %43 = trunc i64 %42 to i32
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %44, i32 0, i32 0
  %46 = load i32, ptr %45, align 8
  %47 = and i32 %43, 16777215
  %48 = and i32 %46, -16777216
  %49 = or i32 %48, %47
  store i32 %49, ptr %45, align 8
  %50 = load i16, ptr %10, align 2, !tbaa !9
  %51 = zext i16 %50 to i32
  %52 = load ptr, ptr %7, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %52, i32 0, i32 0
  %54 = load i32, ptr %53, align 8
  %55 = and i32 %51, 7
  %56 = shl i32 %55, 27
  %57 = and i32 %54, -939524097
  %58 = or i32 %57, %56
  store i32 %58, ptr %53, align 8
  %59 = load i16, ptr %8, align 2, !tbaa !9
  %60 = zext i16 %59 to i32
  %61 = load ptr, ptr %7, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %61, i32 0, i32 0
  %63 = load i32, ptr %62, align 8
  %64 = and i32 %60, 7
  %65 = shl i32 %64, 24
  %66 = and i32 %63, -117440513
  %67 = or i32 %66, %65
  store i32 %67, ptr %62, align 8
  %68 = load i32, ptr %11, align 4, !tbaa !11
  %69 = load ptr, ptr %7, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %69, i32 0, i32 0
  %71 = load i32, ptr %70, align 8
  %72 = and i32 %68, 3
  %73 = shl i32 %72, 30
  %74 = and i32 %71, 1073741823
  %75 = or i32 %74, %73
  store i32 %75, ptr %70, align 8
  %76 = load ptr, ptr %7, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %76, i32 0, i32 1
  %78 = load i64, ptr %77, align 8, !tbaa !15
  %79 = inttoptr i64 %78 to ptr
  %80 = icmp ne ptr null, %79
  br i1 %80, label %81, label %88

81:                                               ; preds = %28
  %82 = load ptr, ptr %7, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %82, i32 0, i32 1
  %84 = load i64, ptr %83, align 8, !tbaa !15
  %85 = load i64, ptr %12, align 8, !tbaa !13
  %86 = add i64 %84, %85
  %87 = inttoptr i64 %86 to ptr
  store volatile i32 -889320754, ptr %87, align 4, !tbaa !11
  br label %88

88:                                               ; preds = %81, %28
  %89 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %89, ptr %6, align 8
  store i32 1, ptr %13, align 4
  br label %92

90:                                               ; No predecessors!
  br label %91

91:                                               ; preds = %90, %26
  store ptr null, ptr %6, align 8
  store i32 1, ptr %13, align 4
  br label %92

92:                                               ; preds = %91, %88
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  %93 = load ptr, ptr %6, align 8
  ret ptr %93
}

; Function Attrs: nounwind uwtable
declare dso_local ptr @__arm_2d_allocate_scratch_memory(i32 noundef, i8 noundef zeroext, i32 noundef) #2

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!16, !14, i64 8}
!16 = !{!"arm_2d_scratch_mem_t", !7, i64 0, !14, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @arm_2d_scratch_memory_new(ptr noundef nonnull writeonly %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i16 noundef zeroext %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = zext i16 %1 to i64
  %7 = zext i16 %2 to i64
  %8 = mul nuw nsw i64 %7, %6
  %9 = icmp eq i64 %8, 0
  br i1 %9, label %34, label %10

10:                                               ; preds = %5
  %11 = add nuw nsw i64 %8, 3
  %12 = and i64 %11, 8589934588
  %13 = trunc nuw i64 %12 to i32
  %14 = add nuw i32 %13, 4
  %15 = trunc i16 %3 to i8
  %16 = tail call ptr @__arm_2d_allocate_scratch_memory(i32 noundef %14, i8 noundef zeroext %15, i32 noundef %4)
  %17 = ptrtoint ptr %16 to i64
  %18 = getelementptr inbounds i8, ptr %0, i64 8
  store i64 %17, ptr %18, align 8, !tbaa !5
  %19 = trunc nuw i64 %11 to i32
  %20 = and i32 %19, 16777212
  %21 = and i16 %3, 7
  %22 = zext nneg i16 %21 to i32
  %23 = shl nuw nsw i32 %22, 27
  %24 = or disjoint i32 %20, %23
  %25 = and i16 %1, 7
  %26 = zext nneg i16 %25 to i32
  %27 = shl nuw nsw i32 %26, 24
  %28 = or disjoint i32 %24, %27
  %29 = shl i32 %4, 30
  %30 = or disjoint i32 %28, %29
  store i32 %30, ptr %0, align 8
  %.not = icmp eq ptr %16, null
  br i1 %.not, label %34, label %31

31:                                               ; preds = %10
  %32 = add i64 %12, %17
  %33 = inttoptr i64 %32 to ptr
  store volatile i32 -889320754, ptr %33, align 4, !tbaa !10
  br label %34

34:                                               ; preds = %5, %10, %31
  %.0 = phi ptr [ %0, %31 ], [ %0, %10 ], [ null, %5 ]
  ret ptr %.0
}

; Function Attrs: nounwind uwtable
declare dso_local ptr @__arm_2d_allocate_scratch_memory(i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 8}
!6 = !{!"arm_2d_scratch_mem_t", !7, i64 0, !9, i64 8}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"long", !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass