; LLVM IR from PX4/sapog :: bootloader/bootloader/src (uavcan)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.uavcan_protocol_t = type <{ %union.anon, %union.anon.1 }>
%union.anon = type { %struct.can_id_t }
%struct.can_id_t = type { %union.anon.0 }
%union.anon.0 = type { i32 }
%union.anon.1 = type { %struct.can_tail_t }
%struct.can_tail_t = type { %union.anon.2 }
%union.anon.2 = type { i8 }
%struct.dsdl_t = type <{ %struct.uavcan_protocol_t, i16, i8, i8, i8 }>

@uavcan_tx_allocation_message.transfer_id = external hidden global i8, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden ptr @load_dsdl_protocol(i32 noundef, i32 noundef, ptr noundef, i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @uavcan_tx(ptr noundef, ptr noundef, i64 noundef, i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @uavcan_tx_allocation_message(i8 noundef zeroext %0, i64 noundef %1, ptr noundef %2, i8 noundef zeroext %3, i16 noundef zeroext %4) #1 {
  %6 = alloca i8, align 1
  %7 = alloca i64, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca i16, align 2
  %11 = alloca %struct.uavcan_protocol_t, align 1
  %12 = alloca ptr, align 8
  %13 = alloca [8 x i8], align 1
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  store i8 %0, ptr %6, align 1, !tbaa !5
  store i64 %1, ptr %7, align 8, !tbaa !8
  store ptr %2, ptr %8, align 8, !tbaa !10
  store i8 %3, ptr %9, align 1, !tbaa !5
  store i16 %4, ptr %10, align 2, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 5, ptr %11) #4
  %16 = load i8, ptr @uavcan_tx_allocation_message.transfer_id, align 1, !tbaa !5
  %17 = add i8 %16, 1
  store i8 %17, ptr @uavcan_tx_allocation_message.transfer_id, align 1, !tbaa !5
  %18 = getelementptr inbounds %struct.uavcan_protocol_t, ptr %11, i32 0, i32 1
  %19 = load i8, ptr %18, align 1
  %20 = and i8 %16, 31
  %21 = and i8 %19, -32
  %22 = or i8 %21, %20
  store i8 %22, ptr %18, align 1
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %23 = call ptr @load_dsdl_protocol(i32 noundef 4, i32 noundef 0, ptr noundef %11, i8 noundef zeroext 0)
  store ptr %23, ptr %12, align 8, !tbaa !10
  %24 = load i16, ptr %10, align 2, !tbaa !12
  %25 = zext i16 %24 to i32
  %26 = getelementptr inbounds %struct.uavcan_protocol_t, ptr %11, i32 0, i32 0
  %27 = load i32, ptr %26, align 1
  %28 = and i32 %25, 16383
  %29 = shl i32 %28, 10
  %30 = and i32 %27, -16776193
  %31 = or i32 %30, %29
  store i32 %31, ptr %26, align 1
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  store i64 6, ptr %14, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %32 = load i64, ptr %7, align 8, !tbaa !8
  %33 = load i8, ptr %9, align 1, !tbaa !5
  %34 = zext i8 %33 to i64
  %35 = sub i64 %32, %34
  store i64 %35, ptr %15, align 8, !tbaa !8
  %36 = load i64, ptr %14, align 8, !tbaa !8
  %37 = load i64, ptr %15, align 8, !tbaa !8
  %38 = icmp ugt i64 %36, %37
  br i1 %38, label %39, label %41

39:                                               ; preds = %5
  %40 = load i64, ptr %15, align 8, !tbaa !8
  store i64 %40, ptr %14, align 8, !tbaa !8
  br label %41

41:                                               ; preds = %39, %5
  %42 = load i8, ptr %6, align 1, !tbaa !5
  %43 = zext i8 %42 to i32
  %44 = shl i32 %43, 1
  %45 = and i32 %44, 254
  %46 = load i8, ptr %9, align 1, !tbaa !5
  %47 = zext i8 %46 to i32
  %48 = icmp ne i32 %47, 0
  %49 = zext i1 %48 to i64
  %50 = select i1 %48, i32 0, i32 1
  %51 = or i32 %45, %50
  %52 = trunc i32 %51 to i8
  %53 = getelementptr inbounds [8 x i8], ptr %13, i64 0, i64 0
  store i8 %52, ptr %53, align 1, !tbaa !5
  %54 = getelementptr inbounds [8 x i8], ptr %13, i64 0, i64 1
  %55 = load ptr, ptr %8, align 8, !tbaa !10
  %56 = load i8, ptr %9, align 1, !tbaa !5
  %57 = zext i8 %56 to i64
  %58 = getelementptr inbounds i8, ptr %55, i64 %57
  %59 = load i64, ptr %14, align 8, !tbaa !8
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %54, ptr align 1 %58, i64 %59, i1 false)
  %60 = load i64, ptr %14, align 8, !tbaa !8
  %61 = add i64 %60, 1
  store i64 %61, ptr %14, align 8, !tbaa !8
  %62 = getelementptr inbounds [8 x i8], ptr %13, i64 0, i64 0
  %63 = load i64, ptr %14, align 8, !tbaa !8
  %64 = load ptr, ptr %12, align 8, !tbaa !10
  %65 = getelementptr inbounds %struct.dsdl_t, ptr %64, i32 0, i32 4
  %66 = load i8, ptr %65, align 1
  %67 = and i8 %66, 3
  %68 = call i32 @uavcan_tx(ptr noundef %11, ptr noundef %62, i64 noundef %63, i8 noundef zeroext %67)
  %69 = load ptr, ptr %12, align 8, !tbaa !10
  %70 = getelementptr inbounds %struct.dsdl_t, ptr %69, i32 0, i32 4
  %71 = load i8, ptr %70, align 1
  %72 = and i8 %71, 3
  call void @can_cancel_on_error(i8 noundef zeroext %72)
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 5, ptr %11) #4
  ret void
}

declare void @can_cancel_on_error(i8 noundef zeroext) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"long", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.uavcan_protocol_t = type <{ %union.anon, %union.anon.1 }>
%union.anon = type { %struct.can_id_t }
%struct.can_id_t = type { %union.anon.0 }
%union.anon.0 = type { i32 }
%union.anon.1 = type { %struct.can_tail_t }
%struct.can_tail_t = type { %union.anon.2 }
%union.anon.2 = type { i8 }

@uavcan_tx_allocation_message.transfer_id = external hidden local_unnamed_addr global i8, align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden ptr @load_dsdl_protocol(i32 noundef, i32 noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @uavcan_tx(ptr noundef, ptr noundef, i64 noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nounwind uwtable
define dso_local void @uavcan_tx_allocation_message(i8 noundef zeroext %0, i64 noundef %1, ptr nocapture noundef readonly %2, i8 noundef zeroext %3, i16 noundef zeroext %4) local_unnamed_addr #1 {
  %6 = alloca %struct.uavcan_protocol_t, align 4
  %7 = alloca [8 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 5, ptr nonnull %6) #5
  %8 = load i8, ptr @uavcan_tx_allocation_message.transfer_id, align 1, !tbaa !5
  %9 = add i8 %8, 1
  store i8 %9, ptr @uavcan_tx_allocation_message.transfer_id, align 1, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %6, i64 4
  %11 = and i8 %8, 31
  store i8 %11, ptr %10, align 4
  %12 = call ptr @load_dsdl_protocol(i32 noundef 4, i32 noundef 0, ptr noundef nonnull %6, i8 noundef zeroext 0)
  %13 = load i32, ptr %6, align 4
  %14 = and i16 %4, 16383
  %15 = zext nneg i16 %14 to i32
  %16 = shl nuw nsw i32 %15, 10
  %17 = and i32 %13, -16776193
  %18 = or disjoint i32 %17, %16
  store i32 %18, ptr %6, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #5
  %19 = zext i8 %3 to i64
  %20 = sub i64 %1, %19
  %spec.select = call i64 @llvm.umin.i64(i64 %20, i64 6)
  %21 = shl i8 %0, 1
  %.not = icmp eq i8 %3, 0
  %22 = zext i1 %.not to i8
  %23 = or disjoint i8 %21, %22
  store i8 %23, ptr %7, align 1, !tbaa !5
  %24 = getelementptr inbounds i8, ptr %7, i64 1
  %25 = getelementptr inbounds i8, ptr %2, i64 %19
  call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %24, ptr align 1 %25, i64 %spec.select, i1 false)
  %26 = add nuw nsw i64 %spec.select, 1
  %27 = getelementptr inbounds i8, ptr %12, i64 9
  %28 = load i8, ptr %27, align 1
  %29 = and i8 %28, 3
  %30 = call i32 @uavcan_tx(ptr noundef nonnull %6, ptr noundef nonnull %7, i64 noundef %26, i8 noundef zeroext %29)
  %31 = load i8, ptr %27, align 1
  %32 = and i8 %31, 3
  call void @can_cancel_on_error(i8 noundef zeroext %32) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #5
  call void @llvm.lifetime.end.p0(i64 5, ptr nonnull %6) #5
  ret void
}

declare void @can_cancel_on_error(i8 noundef zeroext) local_unnamed_addr #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass