; LLVM IR from ERGO-Code/HiGHS :: src/simplex/HSimplex.ll (Z22appendBasicRowsToBasisR7HighsLpR12SimplexBasisi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HighsLp = type { i32, i32, %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13", %class.HighsSparseMatrix, i32, double, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i32, %"class.std::vector.18", %"class.std::vector.18", %"class.std::vector.23", %struct.HighsNameHash, %struct.HighsNameHash, i32, i32, %struct.HighsScale, i8, i8, i32, i8, %struct.HighsLpMods }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HighsSparseMatrix = type { i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.13" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.18" = type { %"struct.std::_Vector_base.19" }
%"struct.std::_Vector_base.19" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.23" = type { %"struct.std::_Vector_base.24" }
%"struct.std::_Vector_base.24" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsNameHash = type { %"class.std::unordered_map" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%struct.HighsScale = type { i32, i8, i32, i32, double, %"class.std::vector.13", %"class.std::vector.13" }
%struct.HighsLpMods = type { %"class.std::vector", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.23", %"class.std::vector", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector", %"class.std::vector.13", %"class.std::vector.13", %"class.std::vector.13" }
%struct.SimplexBasis = type { %"class.std::vector", %"class.std::vector.3", %"class.std::vector.3", i64, i32, i32, %"class.std::__cxx11::basic_string" }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z22appendBasicRowsToBasisR7HighsLpR12SimplexBasisi(ptr noundef nonnull align 8 dereferenceable(920) %0, ptr noundef nonnull align 8 dereferenceable(120) %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %13

12:                                               ; preds = %3
  br label %77

13:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %class.HighsLp, ptr %14, i32 0, i32 1
  %16 = load i32, ptr %15, align 4, !tbaa !11
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = add nsw i32 %16, %17
  store i32 %18, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %class.HighsLp, ptr %19, i32 0, i32 0
  %21 = load i32, ptr %20, align 8, !tbaa !45
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = add nsw i32 %21, %22
  store i32 %23, ptr %8, align 4, !tbaa !9
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.SimplexBasis, ptr %24, i32 0, i32 1
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27)
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.SimplexBasis, ptr %28, i32 0, i32 2
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %31)
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.SimplexBasis, ptr %32, i32 0, i32 0
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %35)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %class.HighsLp, ptr %36, i32 0, i32 1
  %38 = load i32, ptr %37, align 4, !tbaa !11
  store i32 %38, ptr %9, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %73, %13
  %40 = load i32, ptr %9, align 4, !tbaa !9
  %41 = load i32, ptr %7, align 4, !tbaa !9
  %42 = icmp slt i32 %40, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %76

44:                                               ; preds = %39
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.SimplexBasis, ptr %45, i32 0, i32 1
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = getelementptr inbounds %class.HighsLp, ptr %47, i32 0, i32 0
  %49 = load i32, ptr %48, align 8, !tbaa !45
  %50 = load i32, ptr %9, align 4, !tbaa !9
  %51 = add nsw i32 %49, %50
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %52) #3
  store i8 0, ptr %53, align 1, !tbaa !46
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.SimplexBasis, ptr %54, i32 0, i32 2
  %56 = load ptr, ptr %4, align 8, !tbaa !5
  %57 = getelementptr inbounds %class.HighsLp, ptr %56, i32 0, i32 0
  %58 = load i32, ptr %57, align 8, !tbaa !45
  %59 = load i32, ptr %9, align 4, !tbaa !9
  %60 = add nsw i32 %58, %59
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %61) #3
  store i8 0, ptr %62, align 1, !tbaa !46
  %63 = load ptr, ptr %4, align 8, !tbaa !5
  %64 = getelementptr inbounds %class.HighsLp, ptr %63, i32 0, i32 0
  %65 = load i32, ptr %64, align 8, !tbaa !45
  %66 = load i32, ptr %9, align 4, !tbaa !9
  %67 = add nsw i32 %65, %66
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.SimplexBasis, ptr %68, i32 0, i32 0
  %70 = load i32, ptr %9, align 4, !tbaa !9
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #3
  store i32 %67, ptr %72, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %44
  %74 = load i32, ptr %9, align 4, !tbaa !9
  %75 = add nsw i32 %74, 1
  store i32 %75, ptr %9, align 4, !tbaa !9
  br label %39, !llvm.loop !47

76:                                               ; preds = %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %77

77:                                               ; preds = %76, %12
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 4}
!12 = !{!"_ZTS7HighsLp", !10, i64 0, !10, i64 4, !13, i64 8, !13, i64 32, !13, i64 56, !13, i64 80, !13, i64 104, !17, i64 128, !23, i64 240, !24, i64 248, !25, i64 256, !25, i64 288, !10, i64 320, !10, i64 324, !28, i64 328, !28, i64 352, !32, i64 376, !36, i64 400, !36, i64 456, !10, i64 512, !10, i64 516, !42, i64 520, !43, i64 592, !43, i64 593, !10, i64 596, !43, i64 600, !44, i64 608}
!13 = !{!"_ZTSSt6vectorIdSaIdEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTS17HighsSparseMatrix", !18, i64 0, !10, i64 4, !10, i64 8, !19, i64 16, !19, i64 40, !19, i64 64, !13, i64 88}
!18 = !{!"_ZTS12MatrixFormat", !7, i64 0}
!19 = !{!"_ZTSSt6vectorIiSaIiEE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!"_ZTS8ObjSense", !7, i64 0}
!24 = !{!"double", !7, i64 0}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !26, i64 0, !27, i64 8, !7, i64 16}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!27 = !{!"long", !7, i64 0}
!28 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!36 = !{!"_ZTS13HighsNameHash", !37, i64 0}
!37 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !38, i64 0}
!38 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !27, i64 8, !39, i64 16, !27, i64 24, !40, i64 32, !6, i64 48}
!39 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!40 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !41, i64 0, !27, i64 8}
!41 = !{!"float", !7, i64 0}
!42 = !{!"_ZTS10HighsScale", !10, i64 0, !43, i64 4, !10, i64 8, !10, i64 12, !24, i64 16, !13, i64 24, !13, i64 48}
!43 = !{!"bool", !7, i64 0}
!44 = !{!"_ZTS11HighsLpMods", !19, i64 0, !19, i64 24, !13, i64 48, !13, i64 72, !32, i64 96, !19, i64 120, !13, i64 144, !19, i64 168, !13, i64 192, !19, i64 216, !13, i64 240, !13, i64 264, !13, i64 288}
!45 = !{!12, !10, i64 0}
!46 = !{!7, !7, i64 0}
!47 = distinct !{!47, !48}
!48 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z22appendBasicRowsToBasisR7HighsLpR12SimplexBasisi(ptr nocapture noundef nonnull readonly align 8 dereferenceable(920) %0, ptr noundef nonnull align 8 dereferenceable(120) %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %2, 0
  br i1 %4, label %.loopexit, label %5

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %0, i64 4
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = add nsw i32 %7, %2
  %9 = load i32, ptr %0, align 8, !tbaa !43
  %10 = add nsw i32 %9, %8
  %11 = getelementptr inbounds i8, ptr %1, i64 24
  %12 = sext i32 %10 to i64
  tail call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %12)
  %13 = getelementptr inbounds i8, ptr %1, i64 48
  tail call void @_ZNSt6vectorIaSaIaEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %12)
  %14 = sext i32 %8 to i64
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %14)
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = icmp slt i32 %15, %8
  br i1 %16, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %5
  %17 = sext i32 %15 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %17, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %18 = load i32, ptr %0, align 8, !tbaa !43
  %19 = sext i32 %18 to i64
  %20 = add nsw i64 %indvars.iv, %19
  %21 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %20) #2
  store i8 0, ptr %21, align 1, !tbaa !44
  %22 = load i32, ptr %0, align 8, !tbaa !43
  %23 = sext i32 %22 to i64
  %24 = add nsw i64 %indvars.iv, %23
  %25 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIaSaIaEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %24) #2
  store i8 0, ptr %25, align 1, !tbaa !44
  %26 = load i32, ptr %0, align 8, !tbaa !43
  %27 = trunc nsw i64 %indvars.iv to i32
  %28 = add nsw i32 %26, %27
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv) #2
  store i32 %28, ptr %29, align 4, !tbaa !45
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %8, %lftr.wideiv
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !46

.loopexit:                                        ; preds = %.lr.ph, %5, %3
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"_ZTS7HighsLp", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 32, !10, i64 56, !10, i64 80, !10, i64 104, !15, i64 128, !21, i64 240, !22, i64 248, !23, i64 256, !23, i64 288, !7, i64 320, !7, i64 324, !26, i64 328, !26, i64 352, !30, i64 376, !34, i64 400, !34, i64 456, !7, i64 512, !7, i64 516, !40, i64 520, !41, i64 592, !41, i64 593, !7, i64 596, !41, i64 600, !42, i64 608}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIdSaIdEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTS17HighsSparseMatrix", !16, i64 0, !7, i64 4, !7, i64 8, !17, i64 16, !17, i64 40, !17, i64 64, !10, i64 88}
!16 = !{!"_ZTS12MatrixFormat", !8, i64 0}
!17 = !{!"_ZTSSt6vectorIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!21 = !{!"_ZTS8ObjSense", !8, i64 0}
!22 = !{!"double", !8, i64 0}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !24, i64 0, !25, i64 8, !8, i64 16}
!24 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !14, i64 0}
!25 = !{!"long", !8, i64 0}
!26 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !27, i64 0}
!27 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!30 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !31, i64 0}
!31 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!34 = !{!"_ZTS13HighsNameHash", !35, i64 0}
!35 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !36, i64 0}
!36 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !14, i64 0, !25, i64 8, !37, i64 16, !25, i64 24, !38, i64 32, !14, i64 48}
!37 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !14, i64 0}
!38 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !39, i64 0, !25, i64 8}
!39 = !{!"float", !8, i64 0}
!40 = !{!"_ZTS10HighsScale", !7, i64 0, !41, i64 4, !7, i64 8, !7, i64 12, !22, i64 16, !10, i64 24, !10, i64 48}
!41 = !{!"bool", !8, i64 0}
!42 = !{!"_ZTS11HighsLpMods", !17, i64 0, !17, i64 24, !10, i64 48, !10, i64 72, !30, i64 96, !17, i64 120, !10, i64 144, !17, i64 168, !10, i64 192, !17, i64 216, !10, i64 240, !10, i64 264, !10, i64 288}
!43 = !{!6, !7, i64 0}
!44 = !{!8, !8, i64 0}
!45 = !{!7, !7, i64 0}
!46 = distinct !{!46, !47}
!47 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass