; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/TransformFunctions (arm_cfft_radix4_init_f32)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_cfft_radix4_instance_f32 = type { i16, i8, i8, ptr, ptr, i16, i16, float }

@twiddleCoef_4096 = external constant [8192 x float], align 16
@armBitRevTable = external constant [1024 x i16], align 16

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_cfft_radix4_init_f32(ptr noundef %0, i16 noundef zeroext %1, i8 noundef zeroext %2, i8 noundef zeroext %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i16, align 2
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i16 %1, ptr %6, align 2, !tbaa !9
  store i8 %2, ptr %7, align 1, !tbaa !11
  store i8 %3, ptr %8, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 -1, ptr %9, align 4, !tbaa !12
  store i32 0, ptr %9, align 4, !tbaa !12
  %10 = load i16, ptr %6, align 2, !tbaa !9
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %11, i32 0, i32 0
  store i16 %10, ptr %12, align 8, !tbaa !14
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %13, i32 0, i32 3
  store ptr @twiddleCoef_4096, ptr %14, align 8, !tbaa !17
  %15 = load i8, ptr %7, align 1, !tbaa !11
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %16, i32 0, i32 1
  store i8 %15, ptr %17, align 2, !tbaa !18
  %18 = load i8, ptr %8, align 1, !tbaa !11
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %19, i32 0, i32 2
  store i8 %18, ptr %20, align 1, !tbaa !19
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %21, i32 0, i32 0
  %23 = load i16, ptr %22, align 8, !tbaa !14
  %24 = zext i16 %23 to i32
  switch i32 %24, label %70 [
    i32 4096, label %25
    i32 1024, label %34
    i32 256, label %43
    i32 64, label %52
    i32 16, label %61
  ]

25:                                               ; preds = %4
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %26, i32 0, i32 5
  store i16 1, ptr %27, align 8, !tbaa !20
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %28, i32 0, i32 6
  store i16 1, ptr %29, align 2, !tbaa !21
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %30, i32 0, i32 4
  store ptr @armBitRevTable, ptr %31, align 8, !tbaa !22
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %32, i32 0, i32 7
  store float 0x3F30000000000000, ptr %33, align 4, !tbaa !23
  br label %71

34:                                               ; preds = %4
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %35, i32 0, i32 5
  store i16 4, ptr %36, align 8, !tbaa !20
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %37, i32 0, i32 6
  store i16 4, ptr %38, align 2, !tbaa !21
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %39, i32 0, i32 4
  store ptr getelementptr inbounds ([1024 x i16], ptr @armBitRevTable, i64 0, i64 3), ptr %40, align 8, !tbaa !22
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %41, i32 0, i32 7
  store float 0x3F50000000000000, ptr %42, align 4, !tbaa !23
  br label %71

43:                                               ; preds = %4
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %44, i32 0, i32 5
  store i16 16, ptr %45, align 8, !tbaa !20
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %46, i32 0, i32 6
  store i16 16, ptr %47, align 2, !tbaa !21
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %48, i32 0, i32 4
  store ptr getelementptr inbounds ([1024 x i16], ptr @armBitRevTable, i64 0, i64 15), ptr %49, align 8, !tbaa !22
  %50 = load ptr, ptr %5, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %50, i32 0, i32 7
  store float 3.906250e-03, ptr %51, align 4, !tbaa !23
  br label %71

52:                                               ; preds = %4
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %53, i32 0, i32 5
  store i16 64, ptr %54, align 8, !tbaa !20
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %55, i32 0, i32 6
  store i16 64, ptr %56, align 2, !tbaa !21
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %57, i32 0, i32 4
  store ptr getelementptr inbounds ([1024 x i16], ptr @armBitRevTable, i64 0, i64 63), ptr %58, align 8, !tbaa !22
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %59, i32 0, i32 7
  store float 1.562500e-02, ptr %60, align 4, !tbaa !23
  br label %71

61:                                               ; preds = %4
  %62 = load ptr, ptr %5, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %62, i32 0, i32 5
  store i16 256, ptr %63, align 8, !tbaa !20
  %64 = load ptr, ptr %5, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %64, i32 0, i32 6
  store i16 256, ptr %65, align 2, !tbaa !21
  %66 = load ptr, ptr %5, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %66, i32 0, i32 4
  store ptr getelementptr inbounds ([1024 x i16], ptr @armBitRevTable, i64 0, i64 255), ptr %67, align 8, !tbaa !22
  %68 = load ptr, ptr %5, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.arm_cfft_radix4_instance_f32, ptr %68, i32 0, i32 7
  store float 6.250000e-02, ptr %69, align 4, !tbaa !23
  br label %71

70:                                               ; preds = %4
  store i32 -1, ptr %9, align 4, !tbaa !12
  br label %71

71:                                               ; preds = %70, %61, %52, %43, %34, %25
  %72 = load i32, ptr %9, align 4, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret i32 %72
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!15, !10, i64 0}
!15 = !{!"", !10, i64 0, !7, i64 2, !7, i64 3, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 26, !16, i64 28}
!16 = !{!"float", !7, i64 0}
!17 = !{!15, !6, i64 8}
!18 = !{!15, !7, i64 2}
!19 = !{!15, !7, i64 3}
!20 = !{!15, !10, i64 24}
!21 = !{!15, !10, i64 26}
!22 = !{!15, !6, i64 16}
!23 = !{!15, !16, i64 28}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@twiddleCoef_4096 = external constant [8192 x float], align 16
@armBitRevTable = external constant [1024 x i16], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local range(i32 -1, 1) i32 @arm_cfft_radix4_init_f32(ptr nocapture noundef writeonly %0, i16 noundef zeroext %1, i8 noundef zeroext %2, i8 noundef zeroext %3) local_unnamed_addr #0 {
  store i16 %1, ptr %0, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr @twiddleCoef_4096, ptr %5, align 8, !tbaa !12
  %6 = getelementptr inbounds i8, ptr %0, i64 2
  store i8 %2, ptr %6, align 2, !tbaa !13
  %7 = getelementptr inbounds i8, ptr %0, i64 3
  store i8 %3, ptr %7, align 1, !tbaa !14
  switch i16 %1, label %16 [
    i16 4096, label %.sink.split
    i16 1024, label %8
    i16 256, label %9
    i16 64, label %10
    i16 16, label %11
  ]

8:                                                ; preds = %4
  br label %.sink.split

9:                                                ; preds = %4
  br label %.sink.split

10:                                               ; preds = %4
  br label %.sink.split

11:                                               ; preds = %4
  br label %.sink.split

.sink.split:                                      ; preds = %4, %8, %9, %10, %11
  %.sink33 = phi i16 [ 256, %11 ], [ 64, %10 ], [ 16, %9 ], [ 4, %8 ], [ 1, %4 ]
  %.sink29 = phi ptr [ getelementptr inbounds (i8, ptr @armBitRevTable, i64 510), %11 ], [ getelementptr inbounds (i8, ptr @armBitRevTable, i64 126), %10 ], [ getelementptr inbounds (i8, ptr @armBitRevTable, i64 30), %9 ], [ getelementptr inbounds (i8, ptr @armBitRevTable, i64 6), %8 ], [ @armBitRevTable, %4 ]
  %.sink = phi float [ 6.250000e-02, %11 ], [ 1.562500e-02, %10 ], [ 3.906250e-03, %9 ], [ 0x3F50000000000000, %8 ], [ 0x3F30000000000000, %4 ]
  %12 = getelementptr inbounds i8, ptr %0, i64 24
  store i16 %.sink33, ptr %12, align 8, !tbaa !15
  %13 = getelementptr inbounds i8, ptr %0, i64 26
  store i16 %.sink33, ptr %13, align 2, !tbaa !16
  %14 = getelementptr inbounds i8, ptr %0, i64 16
  store ptr %.sink29, ptr %14, align 8, !tbaa !17
  %15 = getelementptr inbounds i8, ptr %0, i64 28
  store float %.sink, ptr %15, align 4, !tbaa !18
  br label %16

16:                                               ; preds = %.sink.split, %4
  %.0 = phi i32 [ -1, %4 ], [ 0, %.sink.split ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !8, i64 2, !8, i64 3, !10, i64 8, !10, i64 16, !7, i64 24, !7, i64 26, !11, i64 28}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"float", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !8, i64 2}
!14 = !{!6, !8, i64 3}
!15 = !{!6, !7, i64 24}
!16 = !{!6, !7, i64 26}
!17 = !{!6, !10, i64 16}
!18 = !{!6, !11, i64 28}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass