; LLVM IR from ARM-software/Arm-2D :: Helper/Source/arm_2d_helper_list.ll_ (arm_2d_list_core_need_redraw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_list_core_t = type { %struct.anon, %struct.anon.0, %struct.anon.22 }
%struct.anon = type { %struct.__arm_2d_list_core_cfg_t }
%struct.__arm_2d_list_core_cfg_t = type { %struct.arm_2d_size_t, ptr, %union.anon, ptr, ptr, ptr, i32, ptr, i16, i16, i16, i16, ptr }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon = type { ptr }
%struct.anon.0 = type { %struct.anon.1, %struct.anon.19 }
%struct.anon.1 = type { %struct.arm_2d_tile_t, %struct.arm_2d_tile_t, %struct.__arm_2d_list_work_area_t, i8, %union.anon.17 }
%struct.arm_2d_tile_t = type { %union.anon.2, %union.anon.13, %union.anon.16 }
%union.anon.2 = type { %struct.anon.3 }
%struct.anon.3 = type { i8, %union.arm_2d_color_info_t, %union.anon.6 }
%union.arm_2d_color_info_t = type { %struct.anon.4 }
%struct.anon.4 = type { i8 }
%union.anon.6 = type { i16 }
%union.anon.13 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.14, %union.anon.15 }
%union.anon.14 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.15 = type { %struct.arm_2d_size_t }
%union.anon.16 = type { ptr }
%struct.__arm_2d_list_work_area_t = type { ptr, %struct.arm_2d_region_t, %struct.arm_2d_list_item_param_t, i32 }
%struct.arm_2d_list_item_param_t = type { i8, i8, i16 }
%union.anon.17 = type { %struct.anon.18 }
%struct.anon.18 = type { i16 }
%struct.anon.19 = type { %struct.arm_2d_tile_t, i64, i64, %struct.arm_2d_helper_pi_slider_t, %struct.anon.20, i16, i8, i8, %struct.anon.21 }
%struct.arm_2d_helper_pi_slider_t = type { [40 x i8] }
%struct.anon.20 = type { i32, i32, i32, %struct.arm_2d_region_t }
%struct.anon.21 = type { i16, i32 }
%struct.anon.22 = type { i8, i8, i16, i32, %union.anon.23 }
%union.anon.23 = type { %struct.anon.24 }
%struct.anon.24 = type { i16, i16, i16, i16 }

@.str = external hidden unnamed_addr constant [15 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [88 x i8], align 1
@__PRETTY_FUNCTION__.__arm_2d_list_core_need_redraw = external hidden unnamed_addr constant [68 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @__arm_2d_list_core_need_redraw(ptr noundef nonnull %0, i1 noundef zeroext %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %8 = zext i1 %1 to i8
  store i8 %8, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 0, ptr %5, align 1, !tbaa !9
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = icmp ne ptr null, %9
  br i1 %10, label %11, label %12

11:                                               ; preds = %2
  br label %13

12:                                               ; preds = %2
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 761, ptr noundef @__PRETTY_FUNCTION__.__arm_2d_list_core_need_redraw) #4
  unreachable

13:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store ptr null, ptr %7, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %39, %13
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = getelementptr inbounds i32, ptr %15, i32 1
  store ptr %16, ptr %7, align 8, !tbaa !5
  %17 = icmp eq ptr %15, null
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %40

19:                                               ; preds = %14
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.__arm_2d_list_core_t, ptr %20, i32 0, i32 1
  %22 = getelementptr inbounds %struct.anon.0, ptr %21, i32 0, i32 1
  %23 = getelementptr inbounds %struct.anon.19, ptr %22, i32 0, i32 7
  %24 = load i8, ptr %23, align 1
  %25 = lshr i8 %24, 1
  %26 = and i8 %25, 1
  %27 = icmp ne i8 %26, 0
  %28 = zext i1 %27 to i8
  store i8 %28, ptr %5, align 1, !tbaa !9
  %29 = load i8, ptr %4, align 1, !tbaa !9, !range !13, !noundef !14
  %30 = trunc i8 %29 to i1
  br i1 %30, label %31, label %39

31:                                               ; preds = %19
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.__arm_2d_list_core_t, ptr %32, i32 0, i32 1
  %34 = getelementptr inbounds %struct.anon.0, ptr %33, i32 0, i32 1
  %35 = getelementptr inbounds %struct.anon.19, ptr %34, i32 0, i32 7
  %36 = load i8, ptr %35, align 1
  %37 = and i8 %36, -3
  %38 = or i8 %37, 0
  store i8 %38, ptr %35, align 1
  br label %39

39:                                               ; preds = %31, %19
  br label %14, !llvm.loop !15

40:                                               ; preds = %18
  %41 = load i8, ptr %5, align 1, !tbaa !9, !range !13, !noundef !14
  %42 = trunc i8 %41 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i1 %42
}

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local zeroext i1 @__arm_2d_list_core_need_redraw(ptr nocapture noundef nonnull %0, i1 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 263
  %.promoted = load i8, ptr %3, align 1
  br i1 %1, label %.split.us, label %.split

.split.us:                                        ; preds = %2
  %4 = and i8 %.promoted, -3
  store i8 %4, ptr %3, align 1
  br label %.split

.split:                                           ; preds = %2, %.split.us
  %5 = and i8 %.promoted, 2
  %6 = icmp ne i8 %5, 0
  ret i1 %6
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass