; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/FilteringFunctions (arm_conv_partial_opt_q15)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_conv_partial_opt_q15(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, i32 noundef %5, i32 noundef %6, ptr noundef %7, ptr noundef %8) #0 {
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca i64, align 8
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca ptr, align 8
  %26 = alloca ptr, align 8
  %27 = alloca ptr, align 8
  %28 = alloca ptr, align 8
  %29 = alloca i32, align 4
  %30 = alloca i32, align 4
  %31 = alloca i32, align 4
  %32 = alloca i32, align 4
  %33 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store i32 %1, ptr %11, align 4, !tbaa !9
  store ptr %2, ptr %12, align 8, !tbaa !5
  store i32 %3, ptr %13, align 4, !tbaa !9
  store ptr %4, ptr %14, align 8, !tbaa !5
  store i32 %5, ptr %15, align 4, !tbaa !9
  store i32 %6, ptr %16, align 4, !tbaa !9
  store ptr %7, ptr %17, align 8, !tbaa !5
  store ptr %8, ptr %18, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #4
  %34 = load ptr, ptr %14, align 8, !tbaa !5
  store ptr %34, ptr %19, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #4
  %35 = load ptr, ptr %17, align 8, !tbaa !5
  store ptr %35, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #4
  %36 = load ptr, ptr %18, align 8, !tbaa !5
  store ptr %36, ptr %21, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %25) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %29) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %30) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %31) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %32) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %33) #4
  %37 = load i32, ptr %15, align 4, !tbaa !9
  %38 = load i32, ptr %16, align 4, !tbaa !9
  %39 = add i32 %37, %38
  %40 = load i32, ptr %11, align 4, !tbaa !9
  %41 = load i32, ptr %13, align 4, !tbaa !9
  %42 = sub i32 %41, 1
  %43 = add i32 %40, %42
  %44 = icmp ugt i32 %39, %43
  br i1 %44, label %45, label %46

45:                                               ; preds = %9
  store i32 -1, ptr %33, align 4, !tbaa !9
  br label %168

46:                                               ; preds = %9
  %47 = load i32, ptr %11, align 4, !tbaa !9
  %48 = load i32, ptr %13, align 4, !tbaa !9
  %49 = icmp uge i32 %47, %48
  br i1 %49, label %50, label %53

50:                                               ; preds = %46
  %51 = load ptr, ptr %10, align 8, !tbaa !5
  store ptr %51, ptr %25, align 8, !tbaa !5
  %52 = load ptr, ptr %12, align 8, !tbaa !5
  store ptr %52, ptr %26, align 8, !tbaa !5
  br label %59

53:                                               ; preds = %46
  %54 = load ptr, ptr %12, align 8, !tbaa !5
  store ptr %54, ptr %25, align 8, !tbaa !5
  %55 = load ptr, ptr %10, align 8, !tbaa !5
  store ptr %55, ptr %26, align 8, !tbaa !5
  %56 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %56, ptr %29, align 4, !tbaa !9
  %57 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %57, ptr %13, align 4, !tbaa !9
  %58 = load i32, ptr %29, align 4, !tbaa !9
  store i32 %58, ptr %11, align 4, !tbaa !9
  br label %59

59:                                               ; preds = %53, %50
  %60 = load ptr, ptr %18, align 8, !tbaa !5
  store ptr %60, ptr %28, align 8, !tbaa !5
  %61 = load ptr, ptr %18, align 8, !tbaa !5
  %62 = load i32, ptr %13, align 4, !tbaa !9
  %63 = zext i32 %62 to i64
  %64 = getelementptr inbounds i16, ptr %61, i64 %63
  %65 = getelementptr inbounds i16, ptr %64, i64 -1
  store ptr %65, ptr %21, align 8, !tbaa !5
  %66 = load ptr, ptr %26, align 8, !tbaa !5
  store ptr %66, ptr %27, align 8, !tbaa !5
  %67 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %67, ptr %30, align 4, !tbaa !9
  br label %68

68:                                               ; preds = %71, %59
  %69 = load i32, ptr %30, align 4, !tbaa !9
  %70 = icmp ugt i32 %69, 0
  br i1 %70, label %71, label %79

71:                                               ; preds = %68
  %72 = load ptr, ptr %27, align 8, !tbaa !5
  %73 = getelementptr inbounds i16, ptr %72, i32 1
  store ptr %73, ptr %27, align 8, !tbaa !5
  %74 = load i16, ptr %72, align 2, !tbaa !11
  %75 = load ptr, ptr %21, align 8, !tbaa !5
  %76 = getelementptr inbounds i16, ptr %75, i32 -1
  store ptr %76, ptr %21, align 8, !tbaa !5
  store i16 %74, ptr %75, align 2, !tbaa !11
  %77 = load i32, ptr %30, align 4, !tbaa !9
  %78 = add i32 %77, -1
  store i32 %78, ptr %30, align 4, !tbaa !9
  br label %68, !llvm.loop !13

79:                                               ; preds = %68
  %80 = load ptr, ptr %17, align 8, !tbaa !5
  store ptr %80, ptr %20, align 8, !tbaa !5
  %81 = load ptr, ptr %20, align 8, !tbaa !5
  %82 = load i32, ptr %13, align 4, !tbaa !9
  %83 = sub i32 %82, 1
  call void @arm_fill_q15(i16 noundef signext 0, ptr noundef %81, i32 noundef %83)
  %84 = load i32, ptr %13, align 4, !tbaa !9
  %85 = sub i32 %84, 1
  %86 = load ptr, ptr %20, align 8, !tbaa !5
  %87 = zext i32 %85 to i64
  %88 = getelementptr inbounds i16, ptr %86, i64 %87
  store ptr %88, ptr %20, align 8, !tbaa !5
  %89 = load ptr, ptr %25, align 8, !tbaa !5
  %90 = load ptr, ptr %20, align 8, !tbaa !5
  %91 = load i32, ptr %11, align 4, !tbaa !9
  call void @arm_copy_q15(ptr noundef %89, ptr noundef %90, i32 noundef %91)
  %92 = load i32, ptr %11, align 4, !tbaa !9
  %93 = load ptr, ptr %20, align 8, !tbaa !5
  %94 = zext i32 %92 to i64
  %95 = getelementptr inbounds i16, ptr %93, i64 %94
  store ptr %95, ptr %20, align 8, !tbaa !5
  %96 = load ptr, ptr %20, align 8, !tbaa !5
  %97 = load i32, ptr %13, align 4, !tbaa !9
  %98 = sub i32 %97, 1
  call void @arm_fill_q15(i16 noundef signext 0, ptr noundef %96, i32 noundef %98)
  %99 = load i32, ptr %13, align 4, !tbaa !9
  %100 = sub i32 %99, 1
  %101 = load ptr, ptr %20, align 8, !tbaa !5
  %102 = zext i32 %100 to i64
  %103 = getelementptr inbounds i16, ptr %101, i64 %102
  store ptr %103, ptr %20, align 8, !tbaa !5
  %104 = load ptr, ptr %28, align 8, !tbaa !5
  store ptr %104, ptr %26, align 8, !tbaa !5
  %105 = load i32, ptr %15, align 4, !tbaa !9
  %106 = load ptr, ptr %17, align 8, !tbaa !5
  %107 = zext i32 %105 to i64
  %108 = getelementptr inbounds i16, ptr %106, i64 %107
  store ptr %108, ptr %17, align 8, !tbaa !5
  %109 = load ptr, ptr %14, align 8, !tbaa !5
  %110 = load i32, ptr %15, align 4, !tbaa !9
  %111 = zext i32 %110 to i64
  %112 = getelementptr inbounds i16, ptr %109, i64 %111
  store ptr %112, ptr %19, align 8, !tbaa !5
  %113 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %113, ptr %31, align 4, !tbaa !9
  br label %114

114:                                              ; preds = %154, %79
  %115 = load i32, ptr %31, align 4, !tbaa !9
  %116 = icmp ugt i32 %115, 0
  br i1 %116, label %117, label %167

117:                                              ; preds = %114
  %118 = load ptr, ptr %17, align 8, !tbaa !5
  store ptr %118, ptr %20, align 8, !tbaa !5
  store i64 0, ptr %22, align 8, !tbaa !15
  %119 = load i32, ptr %13, align 4, !tbaa !9
  %120 = lshr i32 %119, 1
  store i32 %120, ptr %32, align 4, !tbaa !9
  br label %121

121:                                              ; preds = %124, %117
  %122 = load i32, ptr %32, align 4, !tbaa !9
  %123 = icmp ugt i32 %122, 0
  br i1 %123, label %124, label %133

124:                                              ; preds = %121
  %125 = call i32 @read_q15x2_ia(ptr noundef %20)
  store i32 %125, ptr %23, align 4, !tbaa !9
  %126 = call i32 @read_q15x2_ia(ptr noundef %26)
  store i32 %126, ptr %24, align 4, !tbaa !9
  %127 = load i32, ptr %23, align 4, !tbaa !9
  %128 = load i32, ptr %24, align 4, !tbaa !9
  %129 = load i64, ptr %22, align 8, !tbaa !15
  %130 = call i64 @__SMLALD(i32 noundef %127, i32 noundef %128, i64 noundef %129)
  store i64 %130, ptr %22, align 8, !tbaa !15
  %131 = load i32, ptr %32, align 4, !tbaa !9
  %132 = add i32 %131, -1
  store i32 %132, ptr %32, align 4, !tbaa !9
  br label %121, !llvm.loop !17

133:                                              ; preds = %121
  %134 = load i32, ptr %13, align 4, !tbaa !9
  %135 = and i32 %134, 1
  store i32 %135, ptr %32, align 4, !tbaa !9
  br label %136

136:                                              ; preds = %139, %133
  %137 = load i32, ptr %32, align 4, !tbaa !9
  %138 = icmp ugt i32 %137, 0
  br i1 %138, label %139, label %154

139:                                              ; preds = %136
  %140 = load ptr, ptr %20, align 8, !tbaa !5
  %141 = getelementptr inbounds i16, ptr %140, i32 1
  store ptr %141, ptr %20, align 8, !tbaa !5
  %142 = load i16, ptr %140, align 2, !tbaa !11
  %143 = sext i16 %142 to i32
  %144 = load ptr, ptr %26, align 8, !tbaa !5
  %145 = getelementptr inbounds i16, ptr %144, i32 1
  store ptr %145, ptr %26, align 8, !tbaa !5
  %146 = load i16, ptr %144, align 2, !tbaa !11
  %147 = sext i16 %146 to i32
  %148 = mul nsw i32 %143, %147
  %149 = sext i32 %148 to i64
  %150 = load i64, ptr %22, align 8, !tbaa !15
  %151 = add nsw i64 %150, %149
  store i64 %151, ptr %22, align 8, !tbaa !15
  %152 = load i32, ptr %32, align 4, !tbaa !9
  %153 = add i32 %152, -1
  store i32 %153, ptr %32, align 4, !tbaa !9
  br label %136, !llvm.loop !18

154:                                              ; preds = %136
  %155 = load i32, ptr %31, align 4, !tbaa !9
  %156 = add i32 %155, -1
  store i32 %156, ptr %31, align 4, !tbaa !9
  %157 = load i64, ptr %22, align 8, !tbaa !15
  %158 = ashr i64 %157, 15
  %159 = trunc i64 %158 to i32
  %160 = call i32 @__SSAT(i32 noundef %159, i32 noundef 16)
  %161 = trunc i32 %160 to i16
  %162 = load ptr, ptr %19, align 8, !tbaa !5
  %163 = getelementptr inbounds i16, ptr %162, i32 1
  store ptr %163, ptr %19, align 8, !tbaa !5
  store i16 %161, ptr %162, align 2, !tbaa !11
  %164 = load ptr, ptr %28, align 8, !tbaa !5
  store ptr %164, ptr %26, align 8, !tbaa !5
  %165 = load ptr, ptr %17, align 8, !tbaa !5
  %166 = getelementptr inbounds i16, ptr %165, i64 1
  store ptr %166, ptr %17, align 8, !tbaa !5
  br label %114, !llvm.loop !19

167:                                              ; preds = %114
  store i32 0, ptr %33, align 4, !tbaa !9
  br label %168

168:                                              ; preds = %167, %45
  %169 = load i32, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %33) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %32) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %31) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %30) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %29) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #4
  ret i32 %169
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_fill_q15(i16 noundef signext, ptr noundef, i32 noundef) #2

declare void @arm_copy_q15(ptr noundef, ptr noundef, i32 noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @read_q15x2_ia(ptr noundef) #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i64 @__SMLALD(i32 noundef, i32 noundef, i64 noundef) #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}
!19 = distinct !{!19, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @arm_conv_partial_opt_q15(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr nocapture noundef writeonly %4, i32 noundef %5, i32 noundef %6, ptr noundef %7, ptr noundef %8) local_unnamed_addr #0 {
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %11) #5
  %12 = add i32 %6, %5
  %13 = add i32 %1, -1
  %14 = add i32 %13, %3
  %15 = icmp ugt i32 %12, %14
  br i1 %15, label %.loopexit, label %16

16:                                               ; preds = %9
  %.not = icmp ult i32 %1, %3
  %.75 = select i1 %.not, ptr %2, ptr %0
  %.76 = tail call i32 @llvm.umin.i32(i32 %1, i32 %3)
  %.77 = tail call i32 @llvm.umax.i32(i32 %1, i32 %3)
  %.not7178 = icmp eq i32 %.76, 0
  br i1 %.not7178, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %16
  %. = select i1 %.not, ptr %0, ptr %2
  %17 = zext i32 %.76 to i64
  %18 = getelementptr i16, ptr %8, i64 %17
  %min.iters.check = icmp ult i32 %.76, 24
  br i1 %min.iters.check, label %.lr.ph.preheader122, label %vector.memcheck

vector.memcheck:                                  ; preds = %.lr.ph.preheader
  %19 = shl nuw nsw i64 %17, 1
  %20 = add nsw i64 %19, -2
  %21 = add i32 %.76, -1
  %22 = zext i32 %21 to i64
  %23 = shl nuw nsw i64 %22, 1
  %24 = sub nsw i64 %20, %23
  %scevgep = getelementptr i8, ptr %8, i64 %24
  %25 = getelementptr i8, ptr %., i64 %23
  %scevgep109 = getelementptr i8, ptr %25, i64 2
  %bound0 = icmp ult ptr %scevgep, %scevgep109
  %bound1 = icmp ult ptr %., %18
  %found.conflict = and i1 %bound0, %bound1
  br i1 %found.conflict, label %.lr.ph.preheader122, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %17, 4294967280
  %.cast = trunc nuw i64 %n.vec to i32
  %ind.end = sub i32 %.76, %.cast
  %26 = shl nuw nsw i64 %n.vec, 1
  %ind.end110 = getelementptr i8, ptr %., i64 %26
  %27 = mul nsw i64 %n.vec, -2
  %ind.end112 = getelementptr i8, ptr %18, i64 %27
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %offset.idx = shl i64 %index, 1
  %next.gep = getelementptr i8, ptr %., i64 %offset.idx
  %offset.idx115 = mul i64 %index, -2
  %next.gep116 = getelementptr i8, ptr %18, i64 %offset.idx115
  %28 = getelementptr i8, ptr %next.gep, i64 16
  %wide.load = load <8 x i16>, ptr %next.gep, align 2, !tbaa !5, !alias.scope !9
  %wide.load118 = load <8 x i16>, ptr %28, align 2, !tbaa !5, !alias.scope !9
  %29 = getelementptr inbounds i8, ptr %next.gep116, i64 -16
  %30 = getelementptr inbounds i8, ptr %next.gep116, i64 -32
  %reverse = shufflevector <8 x i16> %wide.load, <8 x i16> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
  store <8 x i16> %reverse, ptr %29, align 2, !tbaa !5, !alias.scope !12, !noalias !9
  %reverse119 = shufflevector <8 x i16> %wide.load118, <8 x i16> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
  store <8 x i16> %reverse119, ptr %30, align 2, !tbaa !5, !alias.scope !12, !noalias !9
  %index.next = add nuw i64 %index, 16
  %31 = icmp eq i64 %index.next, %n.vec
  br i1 %31, label %middle.block, label %vector.body, !llvm.loop !14

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %17
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader122

.lr.ph.preheader122:                              ; preds = %middle.block, %vector.memcheck, %.lr.ph.preheader
  %.05781.ph = phi i32 [ %.76, %vector.memcheck ], [ %.76, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  %.06080.ph = phi ptr [ %., %vector.memcheck ], [ %., %.lr.ph.preheader ], [ %ind.end110, %middle.block ]
  %.pn79.ph = phi ptr [ %18, %vector.memcheck ], [ %18, %.lr.ph.preheader ], [ %ind.end112, %middle.block ]
  %32 = add i32 %.05781.ph, -1
  %xtraiter = and i32 %.05781.ph, 7
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader122, %.lr.ph.prol
  %.05781.prol = phi i32 [ %35, %.lr.ph.prol ], [ %.05781.ph, %.lr.ph.preheader122 ]
  %.06080.prol = phi ptr [ %33, %.lr.ph.prol ], [ %.06080.ph, %.lr.ph.preheader122 ]
  %.pn79.prol = phi ptr [ %.066.prol, %.lr.ph.prol ], [ %.pn79.ph, %.lr.ph.preheader122 ]
  %prol.iter = phi i32 [ %prol.iter.next, %.lr.ph.prol ], [ 0, %.lr.ph.preheader122 ]
  %.066.prol = getelementptr inbounds i8, ptr %.pn79.prol, i64 -2
  %33 = getelementptr inbounds i8, ptr %.06080.prol, i64 2
  %34 = load i16, ptr %.06080.prol, align 2, !tbaa !5
  store i16 %34, ptr %.066.prol, align 2, !tbaa !5
  %35 = add i32 %.05781.prol, -1
  %prol.iter.next = add i32 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i32 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol, !llvm.loop !18

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader122
  %.05781.unr = phi i32 [ %.05781.ph, %.lr.ph.preheader122 ], [ %35, %.lr.ph.prol ]
  %.06080.unr = phi ptr [ %.06080.ph, %.lr.ph.preheader122 ], [ %33, %.lr.ph.prol ]
  %.pn79.unr = phi ptr [ %.pn79.ph, %.lr.ph.preheader122 ], [ %.066.prol, %.lr.ph.prol ]
  %36 = icmp ult i32 %32, 7
  br i1 %36, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.05781 = phi i32 [ %53, %.lr.ph ], [ %.05781.unr, %.lr.ph.prol.loopexit ]
  %.06080 = phi ptr [ %51, %.lr.ph ], [ %.06080.unr, %.lr.ph.prol.loopexit ]
  %.pn79 = phi ptr [ %.066.7, %.lr.ph ], [ %.pn79.unr, %.lr.ph.prol.loopexit ]
  %.066 = getelementptr inbounds i8, ptr %.pn79, i64 -2
  %37 = getelementptr inbounds i8, ptr %.06080, i64 2
  %38 = load i16, ptr %.06080, align 2, !tbaa !5
  store i16 %38, ptr %.066, align 2, !tbaa !5
  %.066.1 = getelementptr inbounds i8, ptr %.pn79, i64 -4
  %39 = getelementptr inbounds i8, ptr %.06080, i64 4
  %40 = load i16, ptr %37, align 2, !tbaa !5
  store i16 %40, ptr %.066.1, align 2, !tbaa !5
  %.066.2 = getelementptr inbounds i8, ptr %.pn79, i64 -6
  %41 = getelementptr inbounds i8, ptr %.06080, i64 6
  %42 = load i16, ptr %39, align 2, !tbaa !5
  store i16 %42, ptr %.066.2, align 2, !tbaa !5
  %.066.3 = getelementptr inbounds i8, ptr %.pn79, i64 -8
  %43 = getelementptr inbounds i8, ptr %.06080, i64 8
  %44 = load i16, ptr %41, align 2, !tbaa !5
  store i16 %44, ptr %.066.3, align 2, !tbaa !5
  %.066.4 = getelementptr inbounds i8, ptr %.pn79, i64 -10
  %45 = getelementptr inbounds i8, ptr %.06080, i64 10
  %46 = load i16, ptr %43, align 2, !tbaa !5
  store i16 %46, ptr %.066.4, align 2, !tbaa !5
  %.066.5 = getelementptr inbounds i8, ptr %.pn79, i64 -12
  %47 = getelementptr inbounds i8, ptr %.06080, i64 12
  %48 = load i16, ptr %45, align 2, !tbaa !5
  store i16 %48, ptr %.066.5, align 2, !tbaa !5
  %.066.6 = getelementptr inbounds i8, ptr %.pn79, i64 -14
  %49 = getelementptr inbounds i8, ptr %.06080, i64 14
  %50 = load i16, ptr %47, align 2, !tbaa !5
  store i16 %50, ptr %.066.6, align 2, !tbaa !5
  %.066.7 = getelementptr inbounds i8, ptr %.pn79, i64 -16
  %51 = getelementptr inbounds i8, ptr %.06080, i64 16
  %52 = load i16, ptr %49, align 2, !tbaa !5
  store i16 %52, ptr %.066.7, align 2, !tbaa !5
  %53 = add i32 %.05781, -8
  %.not71.7 = icmp eq i32 %53, 0
  br i1 %.not71.7, label %._crit_edge, label %.lr.ph, !llvm.loop !20

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %middle.block, %16
  %54 = add i32 %.76, -1
  tail call void @arm_fill_q15(i16 noundef signext 0, ptr noundef %7, i32 noundef %54) #5
  %55 = zext i32 %54 to i64
  %56 = getelementptr inbounds i16, ptr %7, i64 %55
  tail call void @arm_copy_q15(ptr noundef %.75, ptr noundef %56, i32 noundef %.77) #5
  %57 = zext i32 %.77 to i64
  %58 = getelementptr inbounds i16, ptr %56, i64 %57
  tail call void @arm_fill_q15(i16 noundef signext 0, ptr noundef %58, i32 noundef %54) #5
  store ptr %8, ptr %11, align 8, !tbaa !21
  %59 = zext i32 %5 to i64
  %60 = getelementptr inbounds i16, ptr %7, i64 %59
  %61 = getelementptr inbounds i16, ptr %4, i64 %59
  %.not7298 = icmp eq i32 %6, 0
  br i1 %.not7298, label %.loopexit, label %.lr.ph102

.lr.ph102:                                        ; preds = %._crit_edge
  %62 = lshr i32 %.76, 1
  %.not7382 = icmp ult i32 %.76, 2
  %63 = and i32 %.76, 1
  %.not7489 = icmp eq i32 %63, 0
  br i1 %.not7382, label %.lr.ph102.split.us, label %.lr.ph86

.lr.ph102.split.us:                               ; preds = %.lr.ph102
  br i1 %.not7489, label %.lr.ph102.split.us.split.us, label %.lr.ph92.us

.lr.ph102.split.us.split.us:                      ; preds = %.lr.ph102.split.us, %.lr.ph102.split.us.split.us
  %.056101.us.us = phi i32 [ %64, %.lr.ph102.split.us.split.us ], [ %6, %.lr.ph102.split.us ]
  %.06399.us.us = phi ptr [ %67, %.lr.ph102.split.us.split.us ], [ %61, %.lr.ph102.split.us ]
  %64 = add i32 %.056101.us.us, -1
  %65 = tail call i32 @__SSAT(i32 noundef 0, i32 noundef 16)
  %66 = trunc i32 %65 to i16
  %67 = getelementptr inbounds i8, ptr %.06399.us.us, i64 2
  store i16 %66, ptr %.06399.us.us, align 2, !tbaa !5
  %.not72.us.us = icmp eq i32 %64, 0
  br i1 %.not72.us.us, label %.loopexit, label %.lr.ph102.split.us.split.us, !llvm.loop !23

.lr.ph92.us:                                      ; preds = %.lr.ph102.split.us, %.lr.ph92.us
  %.056101.us = phi i32 [ %74, %.lr.ph92.us ], [ %6, %.lr.ph102.split.us ]
  %.062100.us = phi ptr [ %68, %.lr.ph92.us ], [ %60, %.lr.ph102.split.us ]
  %.06399.us = phi ptr [ %79, %.lr.ph92.us ], [ %61, %.lr.ph102.split.us ]
  %68 = getelementptr inbounds i8, ptr %.062100.us, i64 2
  %69 = load i16, ptr %.062100.us, align 2, !tbaa !5
  %70 = sext i16 %69 to i64
  %71 = load i16, ptr %8, align 2, !tbaa !5
  %72 = sext i16 %71 to i64
  %73 = mul nsw i64 %72, %70
  %74 = add i32 %.056101.us, -1
  %75 = lshr i64 %73, 15
  %76 = trunc i64 %75 to i32
  %77 = tail call i32 @__SSAT(i32 noundef %76, i32 noundef 16)
  %78 = trunc i32 %77 to i16
  %79 = getelementptr inbounds i8, ptr %.06399.us, i64 2
  store i16 %78, ptr %.06399.us, align 2, !tbaa !5
  %.not72.us = icmp eq i32 %74, 0
  br i1 %.not72.us, label %.loopexit, label %.lr.ph92.us, !llvm.loop !23

.lr.ph86:                                         ; preds = %.lr.ph102, %93
  %.056101 = phi i32 [ %94, %93 ], [ %6, %.lr.ph102 ]
  %.062100 = phi ptr [ %100, %93 ], [ %60, %.lr.ph102 ]
  %.06399 = phi ptr [ %99, %93 ], [ %61, %.lr.ph102 ]
  store ptr %.062100, ptr %10, align 8, !tbaa !21
  br label %80

80:                                               ; preds = %.lr.ph86, %80
  %.05584 = phi i32 [ %62, %.lr.ph86 ], [ %84, %80 ]
  %.06483 = phi i64 [ 0, %.lr.ph86 ], [ %83, %80 ]
  %81 = call i32 @read_q15x2_ia(ptr noundef nonnull %10)
  %82 = call i32 @read_q15x2_ia(ptr noundef nonnull %11)
  %83 = call i64 @__SMLALD(i32 noundef %81, i32 noundef %82, i64 noundef %.06483)
  %84 = add nsw i32 %.05584, -1
  %.not73 = icmp eq i32 %84, 0
  br i1 %.not73, label %._crit_edge87, label %80, !llvm.loop !24

._crit_edge87:                                    ; preds = %80
  br i1 %.not7489, label %93, label %.lr.ph92

.lr.ph92:                                         ; preds = %._crit_edge87
  %.promoted88 = load ptr, ptr %11, align 8, !tbaa !21
  %.promoted = load ptr, ptr %10, align 8, !tbaa !21
  %85 = getelementptr inbounds i8, ptr %.promoted, i64 2
  %86 = load i16, ptr %.promoted, align 2, !tbaa !5
  %87 = sext i16 %86 to i64
  %88 = getelementptr inbounds i8, ptr %.promoted88, i64 2
  %89 = load i16, ptr %.promoted88, align 2, !tbaa !5
  %90 = sext i16 %89 to i64
  %91 = mul nsw i64 %90, %87
  %92 = add nsw i64 %91, %83
  store ptr %85, ptr %10, align 8, !tbaa !21
  store ptr %88, ptr %11, align 8, !tbaa !21
  br label %93

93:                                               ; preds = %.lr.ph92, %._crit_edge87
  %.165.lcssa = phi i64 [ %92, %.lr.ph92 ], [ %83, %._crit_edge87 ]
  %94 = add i32 %.056101, -1
  %95 = lshr i64 %.165.lcssa, 15
  %96 = trunc i64 %95 to i32
  %97 = call i32 @__SSAT(i32 noundef %96, i32 noundef 16)
  %98 = trunc i32 %97 to i16
  %99 = getelementptr inbounds i8, ptr %.06399, i64 2
  store i16 %98, ptr %.06399, align 2, !tbaa !5
  store ptr %8, ptr %11, align 8, !tbaa !21
  %100 = getelementptr inbounds i8, ptr %.062100, i64 2
  %.not72 = icmp eq i32 %94, 0
  br i1 %.not72, label %.loopexit, label %.lr.ph86, !llvm.loop !23

.loopexit:                                        ; preds = %93, %.lr.ph92.us, %.lr.ph102.split.us.split.us, %._crit_edge, %9
  %.0 = phi i32 [ -1, %9 ], [ 0, %._crit_edge ], [ 0, %.lr.ph102.split.us.split.us ], [ 0, %.lr.ph92.us ], [ 0, %93 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %11) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #5
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @arm_fill_q15(i16 noundef signext, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @arm_copy_q15(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @read_q15x2_ia(ptr noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i64 @__SMLALD(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__SSAT(i32 noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10}
!10 = distinct !{!10, !11}
!11 = distinct !{!11, !"LVerDomain"}
!12 = !{!13}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !15, !16, !17}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!"llvm.loop.isvectorized", i32 1}
!17 = !{!"llvm.loop.unroll.runtime.disable"}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.unroll.disable"}
!20 = distinct !{!20, !15, !16}
!21 = !{!22, !22, i64 0}
!22 = !{!"any pointer", !7, i64 0}
!23 = distinct !{!23, !15}
!24 = distinct !{!24, !15}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass