; LLVM IR from FedericaPaoli1/stm32-speech-recognition-and-traduction :: Drivers/CMSIS/DSP/Source/StatisticsFunctions (arm_max_q31)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @arm_max_q31(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = getelementptr inbounds i32, ptr %13, i32 1
  store ptr %14, ptr %5, align 8, !tbaa !5
  %15 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %15, ptr %10, align 4, !tbaa !9
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = sub i32 %16, 1
  store i32 %17, ptr %11, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %33, %4
  %19 = load i32, ptr %11, align 4, !tbaa !9
  %20 = icmp ugt i32 %19, 0
  br i1 %20, label %21, label %36

21:                                               ; preds = %18
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds i32, ptr %22, i32 1
  store ptr %23, ptr %5, align 8, !tbaa !5
  %24 = load i32, ptr %22, align 4, !tbaa !9
  store i32 %24, ptr %9, align 4, !tbaa !9
  %25 = load i32, ptr %10, align 4, !tbaa !9
  %26 = load i32, ptr %9, align 4, !tbaa !9
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %28, label %33

28:                                               ; preds = %21
  %29 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %29, ptr %10, align 4, !tbaa !9
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = load i32, ptr %11, align 4, !tbaa !9
  %32 = sub i32 %30, %31
  store i32 %32, ptr %12, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %28, %21
  %34 = load i32, ptr %11, align 4, !tbaa !9
  %35 = add i32 %34, -1
  store i32 %35, ptr %11, align 4, !tbaa !9
  br label %18, !llvm.loop !11

36:                                               ; preds = %18
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 %37, ptr %38, align 4, !tbaa !9
  %39 = load i32, ptr %12, align 4, !tbaa !9
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  store i32 %39, ptr %40, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @arm_max_q31(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %5 = load i32, ptr %0, align 4, !tbaa !5
  %.01319 = add i32 %1, -1
  %.not20 = icmp eq i32 %.01319, 0
  br i1 %.not20, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %xtraiter = and i32 %.01319, 1
  %6 = icmp eq i32 %1, 2
  br i1 %6, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i32 %.01319, -2
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %.01324 = phi i32 [ %.01319, %.lr.ph.preheader.new ], [ %.013.1, %.lr.ph ]
  %.023 = phi i32 [ 0, %.lr.ph.preheader.new ], [ %spec.select18.1, %.lr.ph ]
  %.01422 = phi i32 [ %5, %.lr.ph.preheader.new ], [ %spec.select.1, %.lr.ph ]
  %.pn21 = phi ptr [ %0, %.lr.ph.preheader.new ], [ %.016.1, %.lr.ph ]
  %niter = phi i32 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %.016 = getelementptr inbounds i8, ptr %.pn21, i64 4
  %7 = load i32, ptr %.016, align 4, !tbaa !5
  %8 = icmp slt i32 %.01422, %7
  %9 = sub i32 %1, %.01324
  %spec.select = tail call i32 @llvm.smax.i32(i32 %.01422, i32 %7)
  %spec.select18 = select i1 %8, i32 %9, i32 %.023
  %.013 = add i32 %.01324, -1
  %.016.1 = getelementptr inbounds i8, ptr %.pn21, i64 8
  %10 = load i32, ptr %.016.1, align 4, !tbaa !5
  %11 = icmp slt i32 %spec.select, %10
  %12 = sub i32 %1, %.013
  %spec.select.1 = tail call i32 @llvm.smax.i32(i32 %spec.select, i32 %10)
  %spec.select18.1 = select i1 %11, i32 %12, i32 %spec.select18
  %.013.1 = add i32 %.01324, -2
  %niter.next.1 = add i32 %niter, 2
  %niter.ncmp.1 = icmp eq i32 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %spec.select.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select.1, %.lr.ph ]
  %spec.select18.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select18.1, %.lr.ph ]
  %.01324.unr = phi i32 [ %.01319, %.lr.ph.preheader ], [ %.013.1, %.lr.ph ]
  %.023.unr = phi i32 [ 0, %.lr.ph.preheader ], [ %spec.select18.1, %.lr.ph ]
  %.01422.unr = phi i32 [ %5, %.lr.ph.preheader ], [ %spec.select.1, %.lr.ph ]
  %.pn21.unr = phi ptr [ %0, %.lr.ph.preheader ], [ %.016.1, %.lr.ph ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %.016.epil = getelementptr inbounds i8, ptr %.pn21.unr, i64 4
  %13 = load i32, ptr %.016.epil, align 4, !tbaa !5
  %14 = icmp slt i32 %.01422.unr, %13
  %15 = sub i32 %1, %.01324.unr
  %spec.select.epil = tail call i32 @llvm.smax.i32(i32 %.01422.unr, i32 %13)
  %spec.select18.epil = select i1 %14, i32 %15, i32 %.023.unr
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.epil, %._crit_edge.loopexit.unr-lcssa, %4
  %.014.lcssa = phi i32 [ %5, %4 ], [ %spec.select.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select.epil, %.lr.ph.epil ]
  %.0.lcssa = phi i32 [ 0, %4 ], [ %spec.select18.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %spec.select18.epil, %.lr.ph.epil ]
  store i32 %.014.lcssa, ptr %2, align 4, !tbaa !5
  store i32 %.0.lcssa, ptr %3, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { nofree norecurse nosync nounwind memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass