; LLVM IR from ERGO-Code/HiGHS :: src/util/HighsSparseMatrix.ll (ZN17HighsSparseMatrix17assessIndexBoundsERK15HighsLogOptions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HighsSparseMatrix = type { i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.3" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.90 = external hidden unnamed_addr constant [56 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK17HighsSparseMatrix9isColwiseEv(ptr noundef nonnull align 8 dereferenceable(112)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK17HighsSparseMatrix5numNzEv(ptr noundef nonnull align 8 dereferenceable(112)) #2 align 2

declare void @_Z12highsLogUserRK15HighsLogOptions12HighsLogTypePKcz(ptr noundef nonnull align 8 dereferenceable(89), i32 noundef, ptr noundef, ...) #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN17HighsSparseMatrix17assessIndexBoundsERK15HighsLogOptions(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(89) %1) #2 align 2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %11 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %12 = call noundef zeroext i1 @_ZNK17HighsSparseMatrix9isColwiseEv(ptr noundef nonnull align 8 dereferenceable(112) %11)
  br i1 %12, label %13, label %16

13:                                               ; preds = %2
  %14 = getelementptr inbounds %class.HighsSparseMatrix, ptr %11, i32 0, i32 2
  %15 = load i32, ptr %14, align 8, !tbaa !9
  store i32 %15, ptr %6, align 4, !tbaa !21
  br label %19

16:                                               ; preds = %2
  %17 = getelementptr inbounds %class.HighsSparseMatrix, ptr %11, i32 0, i32 1
  %18 = load i32, ptr %17, align 4, !tbaa !22
  store i32 %18, ptr %6, align 4, !tbaa !21
  br label %19

19:                                               ; preds = %16, %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %20 = call noundef i32 @_ZNK17HighsSparseMatrix5numNzEv(ptr noundef nonnull align 8 dereferenceable(112) %11)
  store i32 %20, ptr %8, align 4, !tbaa !21
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 1, ptr %9, align 4, !tbaa !21
  br label %21

21:                                               ; preds = %51, %19
  %22 = load i32, ptr %9, align 4, !tbaa !21
  %23 = load i32, ptr %8, align 4, !tbaa !21
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  store i32 2, ptr %10, align 4
  br label %54

26:                                               ; preds = %21
  %27 = getelementptr inbounds %class.HighsSparseMatrix, ptr %11, i32 0, i32 5
  %28 = load i32, ptr %9, align 4, !tbaa !21
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %29) #4
  %31 = load i32, ptr %30, align 4, !tbaa !21
  %32 = icmp slt i32 %31, 0
  br i1 %32, label %41, label %33

33:                                               ; preds = %26
  %34 = getelementptr inbounds %class.HighsSparseMatrix, ptr %11, i32 0, i32 5
  %35 = load i32, ptr %9, align 4, !tbaa !21
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #4
  %38 = load i32, ptr %37, align 4, !tbaa !21
  %39 = load i32, ptr %6, align 4, !tbaa !21
  %40 = icmp sge i32 %38, %39
  br i1 %40, label %41, label %50

41:                                               ; preds = %33, %26
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load i32, ptr %9, align 4, !tbaa !21
  %44 = getelementptr inbounds %class.HighsSparseMatrix, ptr %11, i32 0, i32 5
  %45 = load i32, ptr %9, align 4, !tbaa !21
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %46) #4
  %48 = load i32, ptr %47, align 4, !tbaa !21
  %49 = load i32, ptr %6, align 4, !tbaa !21
  call void (ptr, i32, ptr, ...) @_Z12highsLogUserRK15HighsLogOptions12HighsLogTypePKcz(ptr noundef nonnull align 8 dereferenceable(89) %42, i32 noundef 5, ptr noundef @.str.90, i32 noundef %43, i32 noundef %48, i32 noundef %49)
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %54

50:                                               ; preds = %33
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %9, align 4, !tbaa !21
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %9, align 4, !tbaa !21
  br label %21, !llvm.loop !23

54:                                               ; preds = %41, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %55 = load i32, ptr %10, align 4
  switch i32 %55, label %57 [
    i32 2, label %56
  ]

56:                                               ; preds = %54
  store i32 0, ptr %3, align 4
  store i32 1, ptr %10, align 4
  br label %57

57:                                               ; preds = %56, %54
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %58 = load i32, ptr %3, align 4
  ret i32 %58
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"_ZTS17HighsSparseMatrix", !11, i64 0, !12, i64 4, !12, i64 8, !13, i64 16, !13, i64 40, !13, i64 64, !17, i64 88}
!11 = !{!"_ZTS12MatrixFormat", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!12, !12, i64 0}
!22 = !{!10, !12, i64 4}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.90 = external hidden unnamed_addr constant [56 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK17HighsSparseMatrix9isColwiseEv(ptr noundef nonnull align 8 dereferenceable(112)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZNK17HighsSparseMatrix5numNzEv(ptr noundef nonnull align 8 dereferenceable(112)) local_unnamed_addr #1 align 2

declare void @_Z12highsLogUserRK15HighsLogOptions12HighsLogTypePKcz(ptr noundef nonnull align 8 dereferenceable(89), i32 noundef, ptr noundef, ...) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 -1, 1) i32 @_ZN17HighsSparseMatrix17assessIndexBoundsERK15HighsLogOptions(ptr noundef nonnull align 8 dereferenceable(112) %0, ptr noundef nonnull align 8 dereferenceable(89) %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef zeroext i1 @_ZNK17HighsSparseMatrix9isColwiseEv(ptr noundef nonnull align 8 dereferenceable(112) %0)
  %.014.in.v = select i1 %3, i64 8, i64 4
  %.014.in = getelementptr inbounds i8, ptr %0, i64 %.014.in.v
  %.014 = load i32, ptr %.014.in, align 4, !tbaa !5
  %4 = tail call noundef i32 @_ZNK17HighsSparseMatrix5numNzEv(ptr noundef nonnull align 8 dereferenceable(112) %0)
  %.not1520 = icmp sgt i32 %4, 1
  br i1 %.not1520, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 64
  %6 = zext nneg i32 %4 to i64
  %wide.trip.count = zext nneg i32 %4 to i64
  %7 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef 1) #3
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = icmp slt i32 %8, 0
  br i1 %9, label %._crit_edge, label %.lr.ph34

10:                                               ; preds = %19
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv.next) #3
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = icmp slt i32 %12, 0
  br i1 %13, label %._crit_edge, label %.lr.ph34, !llvm.loop !9

.lr.ph34:                                         ; preds = %.lr.ph, %10
  %.not152233 = phi i1 [ %.not15, %10 ], [ true, %.lr.ph ]
  %indvars.iv32 = phi i64 [ %indvars.iv.next, %10 ], [ 1, %.lr.ph ]
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv32) #3
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %.not = icmp slt i32 %15, %.014
  br i1 %.not, label %19, label %._crit_edge

._crit_edge:                                      ; preds = %10, %.lr.ph34, %.lr.ph
  %indvars.iv.lcssa = phi i64 [ 1, %.lr.ph ], [ %indvars.iv.next, %10 ], [ %indvars.iv32, %.lr.ph34 ]
  %.not1522.lcssa = phi i1 [ true, %.lr.ph ], [ %.not15, %10 ], [ %.not152233, %.lr.ph34 ]
  %16 = trunc nuw nsw i64 %indvars.iv.lcssa to i32
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv.lcssa) #3
  %18 = load i32, ptr %17, align 4, !tbaa !5
  tail call void (ptr, i32, ptr, ...) @_Z12highsLogUserRK15HighsLogOptions12HighsLogTypePKcz(ptr noundef nonnull align 8 dereferenceable(89) %1, i32 noundef 5, ptr noundef nonnull @.str.90, i32 noundef %16, i32 noundef %18, i32 noundef %.014)
  br label %.loopexit

19:                                               ; preds = %.lr.ph34
  %indvars.iv.next = add nuw nsw i64 %indvars.iv32, 1
  %.not15 = icmp ult i64 %indvars.iv.next, %6
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %10, !llvm.loop !9

.loopexit:                                        ; preds = %19, %2, %._crit_edge
  %.not1517 = phi i1 [ %.not1522.lcssa, %._crit_edge ], [ false, %2 ], [ %.not15, %19 ]
  %spec.select = sext i1 %.not1517 to i32
  ret i32 %spec.select
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass