; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code4moveERK3RegS2_b)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i1 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code4moveERK3RegS2_b(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i1 noundef zeroext %3) #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %11 = zext i1 %3 to i8
  store i8 %11, ptr %8, align 1, !tbaa !9
  %12 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13)
  store i32 %14, ptr %10, align 4, !tbaa !11
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15)
  %17 = load i32, ptr %10, align 4, !tbaa !11
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %19, label %22

19:                                               ; preds = %4
  %20 = load ptr, ptr %7, align 8, !tbaa !5
  %21 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20)
  store i32 %21, ptr %10, align 4, !tbaa !11
  br label %22

22:                                               ; preds = %19, %4
  store i32 0, ptr %9, align 4, !tbaa !11
  br label %23

23:                                               ; preds = %91, %22
  %24 = load i32, ptr %9, align 4, !tbaa !11
  %25 = load i32, ptr %10, align 4, !tbaa !11
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %27, label %94

27:                                               ; preds = %23
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = load i32, ptr %9, align 4, !tbaa !11
  %30 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %28, i32 noundef %29)
  %31 = zext i8 %30 to i32
  %32 = load ptr, ptr %7, align 8, !tbaa !5
  %33 = load i32, ptr %9, align 4, !tbaa !11
  %34 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %32, i32 noundef %33)
  %35 = zext i8 %34 to i32
  %36 = icmp eq i32 %31, %35
  br i1 %36, label %37, label %38

37:                                               ; preds = %27
  br label %91

38:                                               ; preds = %27
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = load i32, ptr %9, align 4, !tbaa !11
  %41 = call noundef zeroext i1 @_ZL9isRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %39, i32 noundef %40)
  br i1 %41, label %42, label %57

42:                                               ; preds = %38
  %43 = load ptr, ptr %7, align 8, !tbaa !5
  %44 = load i32, ptr %9, align 4, !tbaa !11
  %45 = call noundef zeroext i1 @_ZL9isRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %43, i32 noundef %44)
  br i1 %45, label %46, label %57

46:                                               ; preds = %42
  %47 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 1)
  br i1 %47, label %48, label %57

48:                                               ; preds = %46
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = load i32, ptr %9, align 4, !tbaa !11
  %51 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %49, i32 noundef %50)
  %52 = load ptr, ptr %7, align 8, !tbaa !5
  %53 = load i32, ptr %9, align 4, !tbaa !11
  %54 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %52, i32 noundef %53)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 35, i8 noundef zeroext %51, i8 noundef zeroext %54)
  %55 = load i32, ptr %9, align 4, !tbaa !11
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %9, align 4, !tbaa !11
  br label %90

57:                                               ; preds = %46, %42, %38
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  %59 = load i32, ptr %9, align 4, !tbaa !11
  %60 = call noundef zeroext i1 @_ZL12isRevRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %58, i32 noundef %59)
  br i1 %60, label %61, label %82

61:                                               ; preds = %57
  %62 = load ptr, ptr %7, align 8, !tbaa !5
  %63 = load i32, ptr %9, align 4, !tbaa !11
  %64 = call noundef zeroext i1 @_ZL12isRevRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %62, i32 noundef %63)
  br i1 %64, label %65, label %82

65:                                               ; preds = %61
  %66 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 1)
  br i1 %66, label %67, label %82

67:                                               ; preds = %65
  %68 = load ptr, ptr %6, align 8, !tbaa !5
  %69 = load i32, ptr %9, align 4, !tbaa !11
  %70 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %68, i32 noundef %69)
  %71 = zext i8 %70 to i32
  %72 = sub nsw i32 %71, 1
  %73 = trunc i32 %72 to i8
  %74 = load ptr, ptr %7, align 8, !tbaa !5
  %75 = load i32, ptr %9, align 4, !tbaa !11
  %76 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %74, i32 noundef %75)
  %77 = zext i8 %76 to i32
  %78 = sub nsw i32 %77, 1
  %79 = trunc i32 %78 to i8
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 35, i8 noundef zeroext %73, i8 noundef zeroext %79)
  %80 = load i32, ptr %9, align 4, !tbaa !11
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %9, align 4, !tbaa !11
  br label %89

82:                                               ; preds = %65, %61, %57
  %83 = load ptr, ptr %6, align 8, !tbaa !5
  %84 = load i32, ptr %9, align 4, !tbaa !11
  %85 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %83, i32 noundef %84)
  %86 = load ptr, ptr %7, align 8, !tbaa !5
  %87 = load i32, ptr %9, align 4, !tbaa !11
  %88 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %86, i32 noundef %87)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %12, i32 noundef 34, i8 noundef zeroext %85, i8 noundef zeroext %88)
  br label %89

89:                                               ; preds = %82, %67
  br label %90

90:                                               ; preds = %89, %48
  br label %91

91:                                               ; preds = %90, %37
  %92 = load i32, ptr %9, align 4, !tbaa !11
  %93 = add nsw i32 %92, 1
  store i32 %93, ptr %9, align 4, !tbaa !11
  br label %23, !llvm.loop !13

94:                                               ; preds = %23
  br label %95

95:                                               ; preds = %105, %94
  %96 = load i32, ptr %9, align 4, !tbaa !11
  %97 = load ptr, ptr %6, align 8, !tbaa !5
  %98 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %97)
  %99 = icmp slt i32 %96, %98
  br i1 %99, label %100, label %103

100:                                              ; preds = %95
  %101 = load i8, ptr %8, align 1, !tbaa !9, !range !15, !noundef !16
  %102 = trunc i8 %101 to i1
  br label %103

103:                                              ; preds = %100, %95
  %104 = phi i1 [ false, %95 ], [ %102, %100 ]
  br i1 %104, label %105, label %111

105:                                              ; preds = %103
  %106 = load ptr, ptr %6, align 8, !tbaa !5
  %107 = load i32, ptr %9, align 4, !tbaa !11
  %108 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %106, i32 noundef %107)
  call void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200) %12, i8 noundef zeroext %108, i1 noundef zeroext true)
  %109 = load i32, ptr %9, align 4, !tbaa !11
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %9, align 4, !tbaa !11
  br label %95, !llvm.loop !17

111:                                              ; preds = %103
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @_ZL9isRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @_ZL12isRevRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext, i1 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code4moveERK3RegS2_b(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2, i1 noundef zeroext %3) local_unnamed_addr #1 align 2 {
  %5 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %6 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %7 = icmp slt i32 %6, %5
  br i1 %7, label %8, label %10

8:                                                ; preds = %4
  %9 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  br label %10

10:                                               ; preds = %8, %4
  %.0 = phi i32 [ %9, %8 ], [ %5, %4 ]
  %11 = icmp sgt i32 %.0, 0
  br i1 %11, label %.lr.ph, label %.preheader

.preheader:                                       ; preds = %43, %10
  %.039.lcssa = phi i32 [ 0, %10 ], [ %44, %43 ]
  %12 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %13 = icmp slt i32 %.039.lcssa, %12
  %14 = and i1 %13, %3
  br i1 %14, label %.lr.ph43.split, label %._crit_edge

.lr.ph:                                           ; preds = %10, %43
  %.03941 = phi i32 [ %44, %43 ], [ 0, %10 ]
  %15 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.03941)
  %16 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.03941)
  %17 = icmp eq i8 %15, %16
  br i1 %17, label %43, label %18

18:                                               ; preds = %.lr.ph
  %19 = tail call noundef zeroext i1 @_ZL9isRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.03941)
  br i1 %19, label %20, label %28

20:                                               ; preds = %18
  %21 = tail call noundef zeroext i1 @_ZL9isRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.03941)
  br i1 %21, label %22, label %28

22:                                               ; preds = %20
  %23 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 1)
  br i1 %23, label %24, label %28

24:                                               ; preds = %22
  %25 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.03941)
  %26 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.03941)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 35, i8 noundef zeroext %25, i8 noundef zeroext %26)
  %27 = add nsw i32 %.03941, 1
  br label %43

28:                                               ; preds = %22, %20, %18
  %29 = tail call noundef zeroext i1 @_ZL12isRevRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.03941)
  br i1 %29, label %30, label %40

30:                                               ; preds = %28
  %31 = tail call noundef zeroext i1 @_ZL12isRevRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.03941)
  br i1 %31, label %32, label %40

32:                                               ; preds = %30
  %33 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 1)
  br i1 %33, label %34, label %40

34:                                               ; preds = %32
  %35 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.03941)
  %36 = add i8 %35, -1
  %37 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.03941)
  %38 = add i8 %37, -1
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 35, i8 noundef zeroext %36, i8 noundef zeroext %38)
  %39 = add nsw i32 %.03941, 1
  br label %43

40:                                               ; preds = %32, %30, %28
  %41 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.03941)
  %42 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.03941)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 34, i8 noundef zeroext %41, i8 noundef zeroext %42)
  br label %43

43:                                               ; preds = %24, %40, %34, %.lr.ph
  %.1 = phi i32 [ %.03941, %.lr.ph ], [ %27, %24 ], [ %39, %34 ], [ %.03941, %40 ]
  %44 = add nsw i32 %.1, 1
  %45 = icmp slt i32 %44, %.0
  br i1 %45, label %.lr.ph, label %.preheader, !llvm.loop !5

.lr.ph43.split:                                   ; preds = %.preheader, %.lr.ph43.split
  %.242 = phi i32 [ %47, %.lr.ph43.split ], [ %.039.lcssa, %.preheader ]
  %46 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.242)
  tail call void @_ZN4Code7zeroregEhb(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %46, i1 noundef zeroext true)
  %47 = add nsw i32 %.242, 1
  %48 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %49 = icmp slt i32 %47, %48
  br i1 %49, label %.lr.ph43.split, label %._crit_edge, !llvm.loop !7

._crit_edge:                                      ; preds = %.lr.ph43.split, %.preheader
  ret void
}

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @_ZL9isRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
declare hidden noundef zeroext i1 @_ZL12isRevRegPairRK3Regi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass