; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code3rolERK3Regj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code5bitopEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %9 = load ptr, ptr %4, align 8
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %16, label %12

12:                                               ; preds = %3
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13)
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %12, %3
  br label %130

17:                                               ; preds = %12
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = icmp eq i32 %18, 1
  br i1 %19, label %20, label %47

20:                                               ; preds = %17
  %21 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 128)
  br i1 %21, label %47, label %22

22:                                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %23

23:                                               ; preds = %41, %22
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %25)
  %27 = icmp slt i32 %24, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %44

29:                                               ; preds = %23
  %30 = load i32, ptr %7, align 4, !tbaa !9
  %31 = icmp eq i32 %30, 0
  br i1 %31, label %32, label %36

32:                                               ; preds = %29
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !9
  %35 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %33, i32 noundef %34)
  call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 32, i8 noundef zeroext %35)
  br label %40

36:                                               ; preds = %29
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %37, i32 noundef %38)
  call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 46, i8 noundef zeroext %39)
  br label %40

40:                                               ; preds = %36, %32
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %7, align 4, !tbaa !9
  br label %23, !llvm.loop !11

44:                                               ; preds = %28
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %45, i32 noundef 0)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 0, i8 noundef zeroext %46, i8 noundef zeroext 1)
  br label %129

47:                                               ; preds = %20, %17
  %48 = load i32, ptr %6, align 4, !tbaa !9
  %49 = icmp eq i32 %48, 1
  br i1 %49, label %50, label %80

50:                                               ; preds = %47
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  %53 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %52)
  %54 = sub nsw i32 %53, 1
  %55 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %51, i32 noundef %54)
  call void @_ZN4Code5bitopEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 7, i8 noundef zeroext %55, i8 noundef zeroext 7)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %56

56:                                               ; preds = %74, %50
  %57 = load i32, ptr %8, align 4, !tbaa !9
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %58)
  %60 = icmp slt i32 %57, %59
  br i1 %60, label %62, label %61

61:                                               ; preds = %56
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %77

62:                                               ; preds = %56
  %63 = load i32, ptr %8, align 4, !tbaa !9
  %64 = icmp eq i32 %63, 0
  br i1 %64, label %65, label %69

65:                                               ; preds = %62
  %66 = load ptr, ptr %5, align 8, !tbaa !5
  %67 = load i32, ptr %8, align 4, !tbaa !9
  %68 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %66, i32 noundef %67)
  call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 32, i8 noundef zeroext %68)
  br label %73

69:                                               ; preds = %62
  %70 = load ptr, ptr %5, align 8, !tbaa !5
  %71 = load i32, ptr %8, align 4, !tbaa !9
  %72 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %70, i32 noundef %71)
  call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 46, i8 noundef zeroext %72)
  br label %73

73:                                               ; preds = %69, %65
  br label %74

74:                                               ; preds = %73
  %75 = load i32, ptr %8, align 4, !tbaa !9
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %8, align 4, !tbaa !9
  br label %56, !llvm.loop !13

77:                                               ; preds = %61
  %78 = load ptr, ptr %5, align 8, !tbaa !5
  %79 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %78, i32 noundef 0)
  call void @_ZN4Code5bitopEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 6, i8 noundef zeroext %79, i8 noundef zeroext 0)
  br label %128

80:                                               ; preds = %47
  %81 = load i32, ptr %6, align 4, !tbaa !9
  %82 = urem i32 %81, 8
  %83 = icmp eq i32 %82, 0
  br i1 %83, label %84, label %88

84:                                               ; preds = %80
  %85 = load ptr, ptr %5, align 8, !tbaa !5
  %86 = load i32, ptr %6, align 4, !tbaa !9
  %87 = udiv i32 %86, 8
  call void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %9, ptr noundef nonnull align 8 dereferenceable(24) %85, i32 noundef %87)
  br label %127

88:                                               ; preds = %80
  %89 = load i32, ptr %6, align 4, !tbaa !9
  %90 = icmp eq i32 %89, 4
  br i1 %90, label %91, label %98

91:                                               ; preds = %88
  %92 = load ptr, ptr %5, align 8, !tbaa !5
  %93 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %92)
  %94 = icmp eq i32 %93, 1
  br i1 %94, label %95, label %98

95:                                               ; preds = %91
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %96, i32 noundef 0)
  call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 56, i8 noundef zeroext %97)
  br label %126

98:                                               ; preds = %91, %88
  %99 = load i32, ptr %6, align 4, !tbaa !9
  %100 = urem i32 %99, 8
  %101 = icmp ule i32 %100, 4
  br i1 %101, label %102, label %116

102:                                              ; preds = %98
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = load i32, ptr %6, align 4, !tbaa !9
  %105 = udiv i32 %104, 8
  call void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %9, ptr noundef nonnull align 8 dereferenceable(24) %103, i32 noundef %105)
  %106 = load i32, ptr %6, align 4, !tbaa !9
  %107 = and i32 %106, 7
  store i32 %107, ptr %6, align 4, !tbaa !9
  br label %108

108:                                              ; preds = %111, %102
  %109 = load i32, ptr %6, align 4, !tbaa !9
  %110 = icmp ugt i32 %109, 0
  br i1 %110, label %111, label %115

111:                                              ; preds = %108
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  call void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %9, ptr noundef nonnull align 8 dereferenceable(24) %112, i32 noundef 1)
  %113 = load i32, ptr %6, align 4, !tbaa !9
  %114 = add i32 %113, -1
  store i32 %114, ptr %6, align 4, !tbaa !9
  br label %108, !llvm.loop !14

115:                                              ; preds = %108
  br label %125

116:                                              ; preds = %98
  %117 = load ptr, ptr %5, align 8, !tbaa !5
  %118 = load i32, ptr %6, align 4, !tbaa !9
  %119 = udiv i32 %118, 8
  %120 = add i32 %119, 1
  call void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %9, ptr noundef nonnull align 8 dereferenceable(24) %117, i32 noundef %120)
  %121 = load ptr, ptr %5, align 8, !tbaa !5
  %122 = load i32, ptr %6, align 4, !tbaa !9
  %123 = urem i32 %122, 8
  %124 = sub i32 8, %123
  call void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %9, ptr noundef nonnull align 8 dereferenceable(24) %121, i32 noundef %124)
  br label %125

125:                                              ; preds = %116, %115
  br label %126

126:                                              ; preds = %125, %95
  br label %127

127:                                              ; preds = %126, %84
  br label %128

128:                                              ; preds = %127, %77
  br label %129

129:                                              ; preds = %128, %44
  br label %130

130:                                              ; preds = %129, %16
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code5bitopEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2) local_unnamed_addr #1 align 2 {
  %4 = icmp eq i32 %2, 0
  br i1 %4, label %.loopexit, label %5

5:                                                ; preds = %3
  %6 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %7 = icmp eq i32 %6, 0
  br i1 %7, label %.loopexit, label %8

8:                                                ; preds = %5
  %9 = icmp eq i32 %2, 1
  br i1 %9, label %10, label %.critedge

10:                                               ; preds = %8
  %11 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 128)
  %12 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  br i1 %11, label %23, label %.preheader

.preheader:                                       ; preds = %10
  %13 = icmp sgt i32 %12, 0
  br i1 %13, label %14, label %._crit_edge

14:                                               ; preds = %.preheader
  %15 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 0)
  tail call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 32, i8 noundef zeroext %15)
  %16 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %17 = icmp sgt i32 %16, 1
  br i1 %17, label %.lr.ph.peel.next, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.peel.next, %14, %.preheader
  %18 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 0)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 0, i8 noundef zeroext %18, i8 noundef zeroext 1)
  br label %.loopexit

.lr.ph.peel.next:                                 ; preds = %14, %.lr.ph.peel.next
  %.04146 = phi i32 [ %20, %.lr.ph.peel.next ], [ 1, %14 ]
  %19 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.04146)
  tail call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 46, i8 noundef zeroext %19)
  %20 = add nuw nsw i32 %.04146, 1
  %21 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %.lr.ph.peel.next, label %._crit_edge, !llvm.loop !5

23:                                               ; preds = %10
  %24 = add nsw i32 %12, -1
  %25 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %24)
  tail call void @_ZN4Code5bitopEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 7, i8 noundef zeroext %25, i8 noundef zeroext 7)
  %26 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %27 = icmp sgt i32 %26, 0
  br i1 %27, label %28, label %._crit_edge50

28:                                               ; preds = %23
  %29 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 0)
  tail call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 32, i8 noundef zeroext %29)
  %30 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %31 = icmp sgt i32 %30, 1
  br i1 %31, label %.lr.ph49.peel.next, label %._crit_edge50

._crit_edge50:                                    ; preds = %.lr.ph49.peel.next, %28, %23
  %32 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 0)
  tail call void @_ZN4Code5bitopEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 6, i8 noundef zeroext %32, i8 noundef zeroext 0)
  br label %.loopexit

.lr.ph49.peel.next:                               ; preds = %28, %.lr.ph49.peel.next
  %.047 = phi i32 [ %34, %.lr.ph49.peel.next ], [ 1, %28 ]
  %33 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.047)
  tail call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 46, i8 noundef zeroext %33)
  %34 = add nuw nsw i32 %.047, 1
  %35 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %36 = icmp slt i32 %34, %35
  br i1 %36, label %.lr.ph49.peel.next, label %._crit_edge50, !llvm.loop !8

.critedge:                                        ; preds = %8
  %37 = and i32 %2, 7
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %39, label %41

39:                                               ; preds = %.critedge
  %40 = lshr exact i32 %2, 3
  tail call void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %40)
  br label %.loopexit

41:                                               ; preds = %.critedge
  %42 = icmp eq i32 %2, 4
  br i1 %42, label %43, label %48

43:                                               ; preds = %41
  %44 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %45 = icmp eq i32 %44, 1
  br i1 %45, label %46, label %.thread

46:                                               ; preds = %43
  %47 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 0)
  tail call void @_ZN4Code6oneregEN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 56, i8 noundef zeroext %47)
  br label %.loopexit

48:                                               ; preds = %41
  %49 = icmp ult i32 %37, 5
  br i1 %49, label %.thread, label %53

.thread:                                          ; preds = %43, %48
  %50 = lshr i32 %2, 3
  tail call void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %50)
  br label %51

51:                                               ; preds = %.thread, %51
  %.04245 = phi i32 [ %37, %.thread ], [ %52, %51 ]
  tail call void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 1)
  %52 = add nsw i32 %.04245, -1
  %.not = icmp eq i32 %52, 0
  br i1 %.not, label %.loopexit, label %51, !llvm.loop !9

53:                                               ; preds = %48
  %54 = lshr i32 %2, 3
  %55 = add nuw nsw i32 %54, 1
  tail call void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %55)
  %56 = sub nuw nsw i32 8, %37
  tail call void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %56)
  br label %.loopexit

.loopexit:                                        ; preds = %51, %._crit_edge, %39, %53, %46, %._crit_edge50, %3, %5
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code9rol_bytesERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!"llvm.loop.peeled.count", i32 1}
!8 = distinct !{!8, !6, !7}
!9 = distinct !{!9, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass