; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d_draw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon }
%struct.anon = type { ptr, %struct.anon.0, %struct.anon.1, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.0 = type { ptr, ptr }
%struct.anon.1 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.59, %struct.anon.60, %union.anon.61, %struct.anon.63, %struct.anon.64, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.2, i64 }
%struct.anon.2 = type { ptr, ptr, %struct.anon.3, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.3 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.4 }
%struct.anon.4 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.59 = type { ptr, ptr }
%struct.anon.60 = type { ptr }
%union.anon.61 = type { %struct.anon.62 }
%struct.anon.62 = type { i32 }
%struct.anon.63 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.36, %union.anon.47, %union.anon.50 }
%union.anon.36 = type { %struct.anon.37 }
%struct.anon.37 = type { i8, %union.arm_2d_color_info_t, %union.anon.40 }
%union.arm_2d_color_info_t = type { %struct.anon.38 }
%struct.anon.38 = type { i8 }
%union.anon.40 = type { i16 }
%union.anon.47 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.48, %union.anon.49 }
%union.anon.48 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.49 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.50 = type { ptr }
%struct.anon.64 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.51, %struct.anon.52 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.51 = type { i32 }
%struct.anon.52 = type { %struct.arm_2d_location_t, %struct.anon.53 }
%struct.anon.53 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.74 = type { %struct.anon.75 }
%struct.anon.75 = type { i8 }
%union.anon.76 = type { %struct.anon.77 }
%struct.anon.77 = type { i8, i8 }
%struct.anon.81 = type { ptr, ptr }
%struct.arm_2d_op_drw_patn_t = type { %struct.arm_2d_op_core_t, %struct.anon.27, %struct.anon.28, i32, %union.anon.29, %union.anon.30 }
%struct.anon.27 = type { ptr, ptr }
%struct.anon.28 = type { ptr }
%union.anon.29 = type { i32 }
%union.anon.30 = type { i32 }

@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [82 x i8], align 1
@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@.str.5 = external hidden unnamed_addr constant [18 x i8], align 1
@__PRETTY_FUNCTION__.arm_2dp_c8bit_draw_pattern = external hidden unnamed_addr constant [163 x i8], align 1
@ARM_2D_OP_DRAW_PATTERN_C8BIT = external dso_local constant { { { i8 }, %union.anon.74, i8, i8, %union.anon.76, { %struct.anon.81 } } }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) #2

declare i32 @__arm_2d_op_invoke(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_c8bit_draw_pattern(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef %3, i32 noundef %4, i8 noundef zeroext %5, i8 noundef zeroext %6) #3 {
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i8, align 1
  %15 = alloca i8, align 1
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store ptr %2, ptr %11, align 8, !tbaa !5
  store ptr %3, ptr %12, align 8, !tbaa !5
  store i32 %4, ptr %13, align 4, !tbaa !9
  store i8 %5, ptr %14, align 1, !tbaa !11
  store i8 %6, ptr %15, align 1, !tbaa !11
  %18 = load ptr, ptr %10, align 8, !tbaa !5
  %19 = icmp ne ptr null, %18
  br i1 %19, label %20, label %21

20:                                               ; preds = %7
  br label %22

21:                                               ; preds = %7
  call void @__assert_fail(ptr noundef @.str.5, ptr noundef @.str.1, i32 noundef 445, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_c8bit_draw_pattern) #4
  unreachable

22:                                               ; preds = %20
  %23 = load ptr, ptr %11, align 8, !tbaa !5
  %24 = icmp ne ptr null, %23
  br i1 %24, label %25, label %26

25:                                               ; preds = %22
  br label %27

26:                                               ; preds = %22
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 446, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_c8bit_draw_pattern) #4
  unreachable

27:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  %28 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %28, ptr %16, align 8, !tbaa !5
  %29 = load ptr, ptr %16, align 8, !tbaa !5
  %30 = icmp eq ptr null, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  store ptr getelementptr inbounds (%struct.anon, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %16, align 8, !tbaa !5
  br label %32

32:                                               ; preds = %31, %27
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = and i32 %33, 112
  %35 = icmp eq i32 %34, 32
  br i1 %35, label %36, label %37

36:                                               ; preds = %32
  store i32 0, ptr %8, align 4
  store i32 1, ptr %17, align 4
  br label %69

37:                                               ; preds = %32
  %38 = load ptr, ptr %16, align 8, !tbaa !5
  %39 = call zeroext i1 @__arm_2d_op_acquire(ptr noundef %38)
  br i1 %39, label %41, label %40

40:                                               ; preds = %37
  store i32 1, ptr %8, align 4
  store i32 1, ptr %17, align 4
  br label %69

41:                                               ; preds = %37
  %42 = load ptr, ptr %16, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %42, i32 0, i32 0
  %44 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %43, i32 0, i32 0
  %45 = getelementptr inbounds %struct.anon.2, ptr %44, i32 0, i32 1
  store ptr @ARM_2D_OP_DRAW_PATTERN_C8BIT, ptr %45, align 8, !tbaa !12
  %46 = load ptr, ptr %11, align 8, !tbaa !5
  %47 = load ptr, ptr %16, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %47, i32 0, i32 1
  %49 = getelementptr inbounds %struct.anon.27, ptr %48, i32 0, i32 0
  store ptr %46, ptr %49, align 8, !tbaa !21
  %50 = load ptr, ptr %12, align 8, !tbaa !5
  %51 = load ptr, ptr %16, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %51, i32 0, i32 1
  %53 = getelementptr inbounds %struct.anon.27, ptr %52, i32 0, i32 1
  store ptr %50, ptr %53, align 8, !tbaa !22
  %54 = load ptr, ptr %10, align 8, !tbaa !5
  %55 = load ptr, ptr %16, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %55, i32 0, i32 2
  %57 = getelementptr inbounds %struct.anon.28, ptr %56, i32 0, i32 0
  store ptr %54, ptr %57, align 8, !tbaa !23
  %58 = load i32, ptr %13, align 4, !tbaa !9
  %59 = load ptr, ptr %16, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %59, i32 0, i32 3
  store i32 %58, ptr %60, align 8, !tbaa !24
  %61 = load i8, ptr %14, align 1, !tbaa !11
  %62 = load ptr, ptr %16, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %62, i32 0, i32 4
  store i8 %61, ptr %63, align 4, !tbaa !11
  %64 = load i8, ptr %15, align 1, !tbaa !11
  %65 = load ptr, ptr %16, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.arm_2d_op_drw_patn_t, ptr %65, i32 0, i32 5
  store i8 %64, ptr %66, align 8, !tbaa !11
  %67 = load ptr, ptr %16, align 8, !tbaa !5
  %68 = call i32 @__arm_2d_op_invoke(ptr noundef %67)
  store i32 %68, ptr %8, align 4
  store i32 1, ptr %17, align 4
  br label %69

69:                                               ; preds = %41, %40, %36
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  %70 = load i32, ptr %8, align 4
  ret i32 %70
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !6, i64 8}
!13 = !{!"arm_2d_op_drw_patn_t", !14, i64 0, !19, i64 48, !20, i64 64, !10, i64 72, !7, i64 76, !7, i64 80}
!14 = !{!"arm_2d_op_core_t", !15, i64 0, !18, i64 40}
!15 = !{!"", !6, i64 0, !6, i64 8, !16, i64 16, !7, i64 17, !7, i64 18, !17, i64 24}
!16 = !{!"", !7, i64 0}
!17 = !{!"arm_2d_op_evt_t", !6, i64 0, !6, i64 8}
!18 = !{!"long", !7, i64 0}
!19 = !{!"", !6, i64 0, !6, i64 8}
!20 = !{!"", !6, i64 0}
!21 = !{!13, !6, i64 48}
!22 = !{!13, !6, i64 56}
!23 = !{!13, !6, i64 64}
!24 = !{!13, !10, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon }
%struct.anon = type { ptr, %struct.anon.0, %struct.anon.1, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.0 = type { ptr, ptr }
%struct.anon.1 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.59, %struct.anon.60, %union.anon.61, %struct.anon.63, %struct.anon.64, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.2, i64 }
%struct.anon.2 = type { ptr, ptr, %struct.anon.3, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.3 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.4 }
%struct.anon.4 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.59 = type { ptr, ptr }
%struct.anon.60 = type { ptr }
%union.anon.61 = type { %struct.anon.62 }
%struct.anon.62 = type { i32 }
%struct.anon.63 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.36, %union.anon.47, %union.anon.50 }
%union.anon.36 = type { %struct.anon.37 }
%struct.anon.37 = type { i8, %union.arm_2d_color_info_t, %union.anon.40 }
%union.arm_2d_color_info_t = type { %struct.anon.38 }
%struct.anon.38 = type { i8 }
%union.anon.40 = type { i16 }
%union.anon.47 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.48, %union.anon.49 }
%union.anon.48 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.49 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.50 = type { ptr }
%struct.anon.64 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.51, %struct.anon.52 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.51 = type { i32 }
%struct.anon.52 = type { %struct.arm_2d_location_t, %struct.anon.53 }
%struct.anon.53 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.74 = type { %struct.anon.75 }
%struct.anon.75 = type { i8 }
%union.anon.76 = type { %struct.anon.77 }
%struct.anon.77 = type { i8, i8 }
%struct.anon.81 = type { ptr, ptr }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@ARM_2D_OP_DRAW_PATTERN_C8BIT = external dso_local constant { { { i8 }, %union.anon.74, i8, i8, %union.anon.76, { %struct.anon.81 } } }, align 8

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) local_unnamed_addr #0

declare i32 @__arm_2d_op_invoke(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_c8bit_draw_pattern(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef %3, i32 noundef %4, i8 noundef zeroext %5, i8 noundef zeroext %6) local_unnamed_addr #1 {
  %8 = icmp eq ptr %0, null
  %spec.store.select = select i1 %8, ptr getelementptr inbounds (i8, ptr @ARM_2D_CTRL, i64 56), ptr %0
  %9 = and i32 %4, 112
  %10 = icmp eq i32 %9, 32
  br i1 %10, label %22, label %11

11:                                               ; preds = %7
  %12 = tail call zeroext i1 @__arm_2d_op_acquire(ptr noundef nonnull %spec.store.select) #2
  br i1 %12, label %13, label %22

13:                                               ; preds = %11
  %14 = getelementptr inbounds i8, ptr %spec.store.select, i64 8
  store ptr @ARM_2D_OP_DRAW_PATTERN_C8BIT, ptr %14, align 8, !tbaa !5
  %15 = getelementptr inbounds i8, ptr %spec.store.select, i64 48
  store ptr %2, ptr %15, align 8, !tbaa !18
  %16 = getelementptr inbounds i8, ptr %spec.store.select, i64 56
  store ptr %3, ptr %16, align 8, !tbaa !19
  %17 = getelementptr inbounds i8, ptr %spec.store.select, i64 64
  store ptr %1, ptr %17, align 8, !tbaa !20
  %18 = getelementptr inbounds i8, ptr %spec.store.select, i64 72
  store i32 %4, ptr %18, align 8, !tbaa !21
  %19 = getelementptr inbounds i8, ptr %spec.store.select, i64 76
  store i8 %5, ptr %19, align 4, !tbaa !22
  %20 = getelementptr inbounds i8, ptr %spec.store.select, i64 80
  store i8 %6, ptr %20, align 8, !tbaa !22
  %21 = tail call i32 @__arm_2d_op_invoke(ptr noundef nonnull %spec.store.select) #2
  br label %22

22:                                               ; preds = %11, %7, %13
  %.0 = phi i32 [ %21, %13 ], [ 0, %7 ], [ 1, %11 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 8}
!6 = !{!"arm_2d_op_drw_patn_t", !7, i64 0, !15, i64 48, !16, i64 64, !17, i64 72, !10, i64 76, !10, i64 80}
!7 = !{!"arm_2d_op_core_t", !8, i64 0, !14, i64 40}
!8 = !{!"", !9, i64 0, !9, i64 8, !12, i64 16, !10, i64 17, !10, i64 18, !13, i64 24}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"", !10, i64 0}
!13 = !{!"arm_2d_op_evt_t", !9, i64 0, !9, i64 8}
!14 = !{!"long", !10, i64 0}
!15 = !{!"", !9, i64 0, !9, i64 8}
!16 = !{!"", !9, i64 0}
!17 = !{!"int", !10, i64 0}
!18 = !{!6, !9, i64 48}
!19 = !{!6, !9, i64 56}
!20 = !{!6, !9, i64 64}
!21 = !{!6, !17, i64 72}
!22 = !{!10, !10, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass