; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code31prologue_permutation_with_countEPKcj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Code = type { %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector", i32, i32, i32, i32, [16 x i8], i32, i32, i32, %"class.std::__cxx11::basic_string", %"class.std::map" }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon.13 }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon.13 = type { i64, [8 x i8] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backEOh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code20prologue_permutationEPKcj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef, i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code31prologue_permutation_with_countEPKcj(ptr dead_on_unwind noalias writable sret(%class.Reg) align 8 %0, ptr noundef nonnull align 8 dereferenceable(200) %1, ptr noundef %2, i32 noundef %3) #2 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i1, align 1
  %10 = alloca i8, align 1
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  %13 = load ptr, ptr %6, align 8
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = load i32, ptr %8, align 4, !tbaa !9
  call void @_ZN4Code20prologue_permutationEPKcj(ptr noundef nonnull align 8 dereferenceable(200) %13, ptr noundef %14, i32 noundef %15)
  %16 = getelementptr inbounds %class.Code, ptr %13, i32 0, i32 3
  %17 = load i32, ptr %16, align 8, !tbaa !11
  %18 = or i32 %17, 4194304
  store i32 %18, ptr %16, align 8, !tbaa !11
  %19 = getelementptr inbounds %class.Code, ptr %13, i32 0, i32 4
  %20 = load i32, ptr %19, align 4, !tbaa !37
  %21 = or i32 %20, 4194304
  store i32 %21, ptr %19, align 4, !tbaa !37
  store i1 false, ptr %9, align 1
  call void @_ZN3RegC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0)
  %22 = getelementptr inbounds %class.Reg, ptr %0, i32 0, i32 0
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  store i8 22, ptr %10, align 1, !tbaa !38
  invoke void @_ZNSt6vectorIhSaIhEE9push_backEOh(ptr noundef nonnull align 8 dereferenceable(24) %22, ptr noundef nonnull align 1 dereferenceable(1) %10)
          to label %23 unwind label %25

23:                                               ; preds = %4
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  store i1 true, ptr %9, align 1
  %24 = load i1, ptr %9, align 1
  br i1 %24, label %30, label %29

25:                                               ; preds = %4
  %26 = landingpad { ptr, i32 }
          cleanup
  %27 = extractvalue { ptr, i32 } %26, 0
  store ptr %27, ptr %11, align 8
  %28 = extractvalue { ptr, i32 } %26, 1
  store i32 %28, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  br label %31

29:                                               ; preds = %23
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  br label %30

30:                                               ; preds = %29, %23
  ret void

31:                                               ; preds = %25
  %32 = load ptr, ptr %11, align 8
  %33 = load i32, ptr %12, align 4
  %34 = insertvalue { ptr, i32 } poison, ptr %32, 0
  %35 = insertvalue { ptr, i32 } %34, i32 %33, 1
  resume { ptr, i32 } %35
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 72}
!12 = !{!"_ZTS4Code", !13, i64 0, !17, i64 24, !21, i64 48, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !7, i64 88, !10, i64 104, !25, i64 108, !10, i64 112, !26, i64 120, !29, i64 152}
!13 = !{!"_ZTSSt6vectorI4InsnSaIS0_EE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseI4InsnSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI4InsnSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSSt6vectorIhSaIhEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"_ZTSN4Code12PrologueTypeE", !7, i64 0}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !27, i64 0, !28, i64 8, !7, i64 16}
!27 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!28 = !{!"long", !7, i64 0}
!29 = !{!"_ZTSSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEE", !30, i64 0}
!30 = !{!"_ZTSSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE", !31, i64 0}
!31 = !{!"_ZTSNSt8_Rb_treeIhSt4pairIKh4SboxESt10_Select1stIS3_ESt4lessIhESaIS3_EE13_Rb_tree_implIS7_Lb1EEE", !32, i64 0, !34, i64 8}
!32 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIhEE", !33, i64 0}
!33 = !{!"_ZTSSt4lessIhE"}
!34 = !{!"_ZTSSt15_Rb_tree_header", !35, i64 0, !28, i64 32}
!35 = !{!"_ZTSSt18_Rb_tree_node_base", !36, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!36 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!37 = !{!12, !10, i64 76}
!38 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE9push_backEOh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code20prologue_permutationEPKcj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef, i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code31prologue_permutation_with_countEPKcj(ptr dead_on_unwind noalias writable sret(%class.Reg) align 8 %0, ptr noundef nonnull align 8 dereferenceable(200) %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca i8, align 1
  tail call void @_ZN4Code20prologue_permutationEPKcj(ptr noundef nonnull align 8 dereferenceable(200) %1, ptr noundef %2, i32 noundef %3)
  %6 = getelementptr inbounds i8, ptr %1, i64 72
  %7 = load <2 x i32>, ptr %6, align 8, !tbaa !5
  %8 = or <2 x i32> %7, <i32 4194304, i32 4194304>
  store <2 x i32> %8, ptr %6, align 8, !tbaa !5
  tail call void @_ZN3RegC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0)
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #3
  store i8 22, ptr %5, align 1, !tbaa !9
  invoke void @_ZNSt6vectorIhSaIhEE9push_backEOh(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 1 dereferenceable(1) %5)
          to label %9 unwind label %10

9:                                                ; preds = %4
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #3
  ret void

10:                                               ; preds = %4
  %11 = landingpad { ptr, i32 }
          cleanup
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #3
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  resume { ptr, i32 } %11
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass