; LLVM IR from ARM-software/Arm-2D :: Helper/Source/arm_2d_helper_pfb.ll_ (arm_2d_helper_pfb_is_region_active0)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.arm_2d_tile_t = type { %union.anon.8, %union.anon.19, %union.anon.20 }
%union.anon.8 = type { %struct.anon.9 }
%struct.anon.9 = type { i8, %union.arm_2d_color_info_t, %union.anon.12 }
%union.arm_2d_color_info_t = type { %struct.anon.10 }
%struct.anon.10 = type { i8 }
%union.anon.12 = type { i16 }
%union.anon.19 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon, %union.anon.0 }
%union.anon = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.0 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.20 = type { ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef, ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @__arm_2d_helper_pfb_is_region_active0(ptr noundef %0, ptr noundef nonnull %1, i1 noundef zeroext %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %9 = zext i1 %2 to i8
  store i8 %9, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  store ptr null, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = call zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef %10, ptr noundef %11, ptr noundef %7)
  %13 = zext i1 %12 to i8
  store i8 %13, ptr %8, align 1, !tbaa !9
  br label %14

14:                                               ; preds = %3
  %15 = load i8, ptr %8, align 1, !tbaa !9, !range !11, !noundef !12
  %16 = trunc i8 %15 to i1
  br i1 %16, label %17, label %18

17:                                               ; preds = %14
  br label %53

18:                                               ; preds = %14
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = icmp eq ptr null, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %18
  br label %53

22:                                               ; preds = %18
  %23 = load ptr, ptr %7, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %23, i32 0, i32 0
  %25 = load i8, ptr %24, align 8
  %26 = lshr i8 %25, 5
  %27 = zext i8 %26 to i32
  %28 = icmp ne i32 %27, 1
  br i1 %28, label %29, label %30

29:                                               ; preds = %22
  br label %53

30:                                               ; preds = %22
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %31, i32 0, i32 0
  %33 = getelementptr inbounds %struct.anon.9, ptr %32, i32 0, i32 2
  %34 = load i8, ptr %33, align 2
  %35 = and i8 %34, 1
  %36 = icmp ne i8 %35, 0
  br i1 %36, label %51, label %37

37:                                               ; preds = %30
  %38 = load i8, ptr %6, align 1, !tbaa !9, !range !11, !noundef !12
  %39 = trunc i8 %38 to i1
  br i1 %39, label %40, label %49

40:                                               ; preds = %37
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %41, i32 0, i32 0
  %43 = getelementptr inbounds %struct.anon.9, ptr %42, i32 0, i32 2
  %44 = load i8, ptr %43, align 2
  %45 = lshr i8 %44, 1
  %46 = and i8 %45, 1
  %47 = zext i8 %46 to i32
  %48 = icmp ne i32 %47, 0
  br i1 %48, label %50, label %49

49:                                               ; preds = %40, %37
  br label %53

50:                                               ; preds = %40
  br label %51

51:                                               ; preds = %50, %30
  store i8 1, ptr %8, align 1, !tbaa !9
  br label %52

52:                                               ; preds = %51
  br label %53

53:                                               ; preds = %52, %49, %29, %21, %17
  %54 = load i8, ptr %8, align 1, !tbaa !9, !range !11, !noundef !12
  %55 = trunc i8 %54 to i1
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  ret i1 %55
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @__arm_2d_helper_pfb_is_region_active0(ptr noundef %0, ptr noundef nonnull %1, i1 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = alloca ptr, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #2
  store ptr null, ptr %4, align 8, !tbaa !5
  %5 = call zeroext i1 @arm_2d_helper_pfb_is_region_being_drawing(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %4)
  %6 = load ptr, ptr %4, align 8
  %7 = icmp eq ptr %6, null
  %or.cond = select i1 %5, i1 true, i1 %7
  br i1 %or.cond, label %17, label %8

8:                                                ; preds = %3
  %9 = load i8, ptr %6, align 8
  %.mask = and i8 %9, -32
  %.not = icmp eq i8 %.mask, 32
  br i1 %.not, label %10, label %17

10:                                               ; preds = %8
  %11 = getelementptr inbounds i8, ptr %6, i64 2
  %12 = load i8, ptr %11, align 2
  %13 = and i8 %12, 1
  %.not6 = icmp eq i8 %13, 0
  br i1 %.not6, label %14, label %16

14:                                               ; preds = %10
  %15 = and i8 %12, 2
  %.not7 = icmp ne i8 %15, 0
  %or.cond9.not = and i1 %.not7, %2
  br i1 %or.cond9.not, label %16, label %17

16:                                               ; preds = %14, %10
  br label %17

17:                                               ; preds = %14, %8, %3, %16
  %.0.shrunk = phi i1 [ %5, %3 ], [ false, %8 ], [ true, %16 ], [ false, %14 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #2
  ret i1 %.0.shrunk
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass