; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d_draw)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon }
%struct.anon = type { ptr, %struct.anon.0, %struct.anon.1, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.0 = type { ptr, ptr }
%struct.anon.1 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.59, %struct.anon.60, %union.anon.61, %struct.anon.63, %struct.anon.64, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.2, i64 }
%struct.anon.2 = type { ptr, ptr, %struct.anon.3, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.3 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.4 }
%struct.anon.4 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.59 = type { ptr, ptr }
%struct.anon.60 = type { ptr }
%union.anon.61 = type { %struct.anon.62 }
%struct.anon.62 = type { i32 }
%struct.anon.63 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.36, %union.anon.47, %union.anon.50 }
%union.anon.36 = type { %struct.anon.37 }
%struct.anon.37 = type { i8, %union.arm_2d_color_info_t, %union.anon.40 }
%union.arm_2d_color_info_t = type { %struct.anon.38 }
%struct.anon.38 = type { i8 }
%union.anon.40 = type { i16 }
%union.anon.47 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.48, %union.anon.49 }
%union.anon.48 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.49 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.50 = type { ptr }
%struct.anon.64 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.51, %struct.anon.52 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.51 = type { i32 }
%struct.anon.52 = type { %struct.arm_2d_location_t, %struct.anon.53 }
%struct.anon.53 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.74 = type { %struct.anon.75 }
%struct.anon.75 = type { i8 }
%union.anon.76 = type { %struct.anon.77 }
%struct.anon.77 = type { i8, i8 }
%struct.anon.83 = type { ptr }
%struct.arm_2d_op_drw_pt_t = type { %struct.arm_2d_op_core_t, %struct.anon.71, %union.anon.72, i8, %struct.arm_2d_region_t }
%struct.anon.71 = type { ptr, ptr }
%union.anon.72 = type { i32 }

@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [82 x i8], align 1
@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@__PRETTY_FUNCTION__.arm_2dp_rgb565_draw_point = external hidden unnamed_addr constant [133 x i8], align 1
@ARM_2D_OP_DRAW_POINT_RGB16 = external dso_local constant { { { i8 }, %union.anon.74, i8, i8, %union.anon.76, { %struct.anon.83, [8 x i8] } } }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare i32 @__arm_2d_op_invoke(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_rgb565_draw_point(ptr noundef %0, ptr noundef nonnull %1, i32 %2, i64 noundef %3, i8 noundef zeroext %4) #4 {
  %6 = alloca i32, align 4
  %7 = alloca %struct.arm_2d_location_t, align 2
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca i8, align 1
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca %struct.arm_2d_size_t, align 2
  store i32 %2, ptr %7, align 2
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store i64 %3, ptr %10, align 8, !tbaa !9
  store i8 %4, ptr %11, align 1, !tbaa !11
  %15 = load ptr, ptr %9, align 8, !tbaa !5
  %16 = icmp ne ptr null, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %5
  br label %19

18:                                               ; preds = %5
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 164, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_rgb565_draw_point) #5
  unreachable

19:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %20 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %20, ptr %12, align 8, !tbaa !5
  %21 = load ptr, ptr %12, align 8, !tbaa !5
  %22 = icmp eq ptr null, %21
  br i1 %22, label %23, label %24

23:                                               ; preds = %19
  store ptr getelementptr inbounds (%struct.anon, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %12, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %23, %19
  %25 = load i8, ptr %11, align 1, !tbaa !11
  %26 = zext i8 %25 to i32
  %27 = icmp eq i32 0, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %24
  store i32 0, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %71

29:                                               ; preds = %24
  %30 = load ptr, ptr %12, align 8, !tbaa !5
  %31 = call zeroext i1 @__arm_2d_op_acquire(ptr noundef %30)
  br i1 %31, label %33, label %32

32:                                               ; preds = %29
  store i32 1, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %71

33:                                               ; preds = %29
  %34 = load ptr, ptr %12, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %34, i32 0, i32 4
  %36 = getelementptr inbounds %struct.arm_2d_region_t, ptr %35, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %36, ptr align 2 %7, i64 4, i1 false), !tbaa.struct !12
  %37 = load ptr, ptr %12, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %37, i32 0, i32 4
  %39 = getelementptr inbounds %struct.arm_2d_region_t, ptr %38, i32 0, i32 1
  %40 = getelementptr inbounds %struct.arm_2d_size_t, ptr %14, i32 0, i32 0
  store i16 1, ptr %40, align 2, !tbaa !15
  %41 = getelementptr inbounds %struct.arm_2d_size_t, ptr %14, i32 0, i32 1
  store i16 1, ptr %41, align 2, !tbaa !17
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %39, ptr align 2 %14, i64 4, i1 false), !tbaa.struct !12
  %42 = load ptr, ptr %12, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %42, i32 0, i32 0
  %44 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %43, i32 0, i32 0
  %45 = getelementptr inbounds %struct.anon.2, ptr %44, i32 0, i32 1
  store ptr @ARM_2D_OP_DRAW_POINT_RGB16, ptr %45, align 8, !tbaa !18
  %46 = load ptr, ptr %12, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %46, i32 0, i32 0
  %48 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %47, i32 0, i32 0
  %49 = getelementptr inbounds %struct.anon.2, ptr %48, i32 0, i32 2
  %50 = load i8, ptr %49, align 8
  %51 = and i8 %50, -4
  %52 = or i8 %51, 2
  store i8 %52, ptr %49, align 8
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  %54 = load ptr, ptr %12, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %54, i32 0, i32 1
  %56 = getelementptr inbounds %struct.anon.71, ptr %55, i32 0, i32 0
  store ptr %53, ptr %56, align 8, !tbaa !26
  %57 = load ptr, ptr %12, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %57, i32 0, i32 4
  %59 = load ptr, ptr %12, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %59, i32 0, i32 1
  %61 = getelementptr inbounds %struct.anon.71, ptr %60, i32 0, i32 1
  store ptr %58, ptr %61, align 8, !tbaa !27
  %62 = load i64, ptr %10, align 8, !tbaa !9
  %63 = trunc i64 %62 to i16
  %64 = load ptr, ptr %12, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %64, i32 0, i32 2
  store i16 %63, ptr %65, align 8, !tbaa !11
  %66 = load i8, ptr %11, align 1, !tbaa !11
  %67 = load ptr, ptr %12, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.arm_2d_op_drw_pt_t, ptr %67, i32 0, i32 3
  store i8 %66, ptr %68, align 4, !tbaa !28
  %69 = load ptr, ptr %12, align 8, !tbaa !5
  %70 = call i32 @__arm_2d_op_invoke(ptr noundef %69)
  store i32 %70, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %71

71:                                               ; preds = %33, %32, %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  %72 = load i32, ptr %6, align 4
  ret i32 %72
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{i64 0, i64 2, !13, i64 2, i64 2, !13}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"arm_2d_size_t", !14, i64 0, !14, i64 2}
!17 = !{!16, !14, i64 2}
!18 = !{!19, !6, i64 8}
!19 = !{!"arm_2d_op_drw_pt_t", !20, i64 0, !24, i64 48, !7, i64 64, !7, i64 68, !25, i64 70}
!20 = !{!"arm_2d_op_core_t", !21, i64 0, !10, i64 40}
!21 = !{!"", !6, i64 0, !6, i64 8, !22, i64 16, !7, i64 17, !7, i64 18, !23, i64 24}
!22 = !{!"", !7, i64 0}
!23 = !{!"arm_2d_op_evt_t", !6, i64 0, !6, i64 8}
!24 = !{!"", !6, i64 0, !6, i64 8}
!25 = !{!"arm_2d_region_t", !7, i64 0, !7, i64 4}
!26 = !{!19, !6, i64 48}
!27 = !{!19, !6, i64 56}
!28 = !{!19, !7, i64 68}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon }
%struct.anon = type { ptr, %struct.anon.0, %struct.anon.1, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.0 = type { ptr, ptr }
%struct.anon.1 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.59, %struct.anon.60, %union.anon.61, %struct.anon.63, %struct.anon.64, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.2, i64 }
%struct.anon.2 = type { ptr, ptr, %struct.anon.3, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.3 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.4 }
%struct.anon.4 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.59 = type { ptr, ptr }
%struct.anon.60 = type { ptr }
%union.anon.61 = type { %struct.anon.62 }
%struct.anon.62 = type { i32 }
%struct.anon.63 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.36, %union.anon.47, %union.anon.50 }
%union.anon.36 = type { %struct.anon.37 }
%struct.anon.37 = type { i8, %union.arm_2d_color_info_t, %union.anon.40 }
%union.arm_2d_color_info_t = type { %struct.anon.38 }
%struct.anon.38 = type { i8 }
%union.anon.40 = type { i16 }
%union.anon.47 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.48, %union.anon.49 }
%union.anon.48 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.49 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.50 = type { ptr }
%struct.anon.64 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.51, %struct.anon.52 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.51 = type { i32 }
%struct.anon.52 = type { %struct.arm_2d_location_t, %struct.anon.53 }
%struct.anon.53 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.74 = type { %struct.anon.75 }
%struct.anon.75 = type { i8 }
%union.anon.76 = type { %struct.anon.77 }
%struct.anon.77 = type { i8, i8 }
%struct.anon.83 = type { ptr }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@ARM_2D_OP_DRAW_POINT_RGB16 = external dso_local constant { { { i8 }, %union.anon.74, i8, i8, %union.anon.76, { %struct.anon.83, [8 x i8] } } }, align 8

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) local_unnamed_addr #0

declare i32 @__arm_2d_op_invoke(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_rgb565_draw_point(ptr noundef %0, ptr noundef nonnull %1, i32 %2, i64 noundef %3, i8 noundef zeroext %4) local_unnamed_addr #1 {
  %6 = icmp eq ptr %0, null
  %spec.store.select = select i1 %6, ptr getelementptr inbounds (i8, ptr @ARM_2D_CTRL, i64 56), ptr %0
  %7 = icmp eq i8 %4, 0
  br i1 %7, label %24, label %8

8:                                                ; preds = %5
  %9 = tail call zeroext i1 @__arm_2d_op_acquire(ptr noundef nonnull %spec.store.select) #2
  br i1 %9, label %10, label %24

10:                                               ; preds = %8
  %11 = getelementptr inbounds i8, ptr %spec.store.select, i64 70
  store i32 %2, ptr %11, align 2
  %12 = getelementptr inbounds i8, ptr %spec.store.select, i64 74
  store i16 1, ptr %12, align 2, !tbaa !5
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %spec.store.select, i64 76
  store i16 1, ptr %.sroa.2.0..sroa_idx, align 2, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %spec.store.select, i64 8
  store ptr @ARM_2D_OP_DRAW_POINT_RGB16, ptr %13, align 8, !tbaa !9
  %14 = getelementptr inbounds i8, ptr %spec.store.select, i64 16
  %15 = load i8, ptr %14, align 8
  %16 = and i8 %15, -4
  %17 = or disjoint i8 %16, 2
  store i8 %17, ptr %14, align 8
  %18 = getelementptr inbounds i8, ptr %spec.store.select, i64 48
  store ptr %1, ptr %18, align 8, !tbaa !19
  %19 = getelementptr inbounds i8, ptr %spec.store.select, i64 56
  store ptr %11, ptr %19, align 8, !tbaa !20
  %20 = trunc i64 %3 to i16
  %21 = getelementptr inbounds i8, ptr %spec.store.select, i64 64
  store i16 %20, ptr %21, align 8, !tbaa !21
  %22 = getelementptr inbounds i8, ptr %spec.store.select, i64 68
  store i8 %4, ptr %22, align 4, !tbaa !22
  %23 = tail call i32 @__arm_2d_op_invoke(ptr noundef nonnull %spec.store.select) #2
  br label %24

24:                                               ; preds = %8, %5, %10
  %.0 = phi i32 [ %23, %10 ], [ 0, %5 ], [ 1, %8 ]
  ret i32 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 8}
!10 = !{!"arm_2d_op_drw_pt_t", !11, i64 0, !17, i64 48, !7, i64 64, !7, i64 68, !18, i64 70}
!11 = !{!"arm_2d_op_core_t", !12, i64 0, !16, i64 40}
!12 = !{!"", !13, i64 0, !13, i64 8, !14, i64 16, !7, i64 17, !7, i64 18, !15, i64 24}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"", !7, i64 0}
!15 = !{!"arm_2d_op_evt_t", !13, i64 0, !13, i64 8}
!16 = !{!"long", !7, i64 0}
!17 = !{!"", !13, i64 0, !13, i64 8}
!18 = !{!"arm_2d_region_t", !7, i64 0, !7, i64 4}
!19 = !{!10, !13, i64 48}
!20 = !{!10, !13, i64 56}
!21 = !{!7, !7, i64 0}
!22 = !{!10, !7, i64 68}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass