; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code7add_ptrEhi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %1, i32 noundef %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !10
  %9 = load ptr, ptr %4, align 8
  %10 = load i32, ptr %6, align 4, !tbaa !10
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %13

12:                                               ; preds = %3
  br label %78

13:                                               ; preds = %3
  %14 = load i32, ptr %6, align 4, !tbaa !10
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %16, label %25

16:                                               ; preds = %13
  %17 = load i32, ptr %6, align 4, !tbaa !10
  %18 = icmp sle i32 %17, 63
  br i1 %18, label %19, label %25

19:                                               ; preds = %16
  %20 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 1)
  br i1 %20, label %21, label %25

21:                                               ; preds = %19
  %22 = load i8, ptr %5, align 1, !tbaa !9
  %23 = load i32, ptr %6, align 4, !tbaa !10
  %24 = trunc i32 %23 to i8
  call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 2, i8 noundef zeroext %22, i8 noundef zeroext %24)
  br label %77

25:                                               ; preds = %19, %16, %13
  %26 = load i32, ptr %6, align 4, !tbaa !10
  %27 = icmp slt i32 %26, 0
  br i1 %27, label %28, label %38

28:                                               ; preds = %25
  %29 = load i32, ptr %6, align 4, !tbaa !10
  %30 = icmp sge i32 %29, -63
  br i1 %30, label %31, label %38

31:                                               ; preds = %28
  %32 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 1)
  br i1 %32, label %33, label %38

33:                                               ; preds = %31
  %34 = load i8, ptr %5, align 1, !tbaa !9
  %35 = load i32, ptr %6, align 4, !tbaa !10
  %36 = sub nsw i32 0, %35
  %37 = trunc i32 %36 to i8
  call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 52, i8 noundef zeroext %34, i8 noundef zeroext %37)
  br label %76

38:                                               ; preds = %31, %28, %25
  %39 = load i32, ptr %6, align 4, !tbaa !10
  %40 = sub nsw i32 0, %39
  store i32 %40, ptr %6, align 4, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  %41 = load i32, ptr %6, align 4, !tbaa !10
  %42 = trunc i32 %41 to i8
  store i8 %42, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %43 = load i32, ptr %6, align 4, !tbaa !10
  %44 = ashr i32 %43, 8
  %45 = trunc i32 %44 to i8
  store i8 %45, ptr %8, align 1, !tbaa !9
  %46 = load i8, ptr %7, align 1, !tbaa !9
  %47 = zext i8 %46 to i32
  %48 = icmp ne i32 %47, 0
  br i1 %48, label %49, label %69

49:                                               ; preds = %38
  %50 = load i8, ptr %5, align 1, !tbaa !9
  %51 = load i8, ptr %7, align 1, !tbaa !9
  call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 51, i8 noundef zeroext %50, i8 noundef zeroext %51)
  %52 = load i8, ptr %8, align 1, !tbaa !9
  %53 = zext i8 %52 to i32
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %57, label %55

55:                                               ; preds = %49
  %56 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 128)
  br i1 %56, label %57, label %63

57:                                               ; preds = %55, %49
  %58 = load i8, ptr %5, align 1, !tbaa !9
  %59 = zext i8 %58 to i32
  %60 = add nsw i32 %59, 1
  %61 = trunc i32 %60 to i8
  %62 = load i8, ptr %8, align 1, !tbaa !9
  call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 50, i8 noundef zeroext %61, i8 noundef zeroext %62)
  br label %68

63:                                               ; preds = %55
  %64 = load i8, ptr %5, align 1, !tbaa !9
  %65 = zext i8 %64 to i32
  %66 = add nsw i32 %65, 1
  %67 = trunc i32 %66 to i8
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 48, i8 noundef zeroext %67, i8 noundef zeroext 1)
  br label %68

68:                                               ; preds = %63, %57
  br label %75

69:                                               ; preds = %38
  %70 = load i8, ptr %5, align 1, !tbaa !9
  %71 = zext i8 %70 to i32
  %72 = add nsw i32 %71, 1
  %73 = trunc i32 %72 to i8
  %74 = load i8, ptr %8, align 1, !tbaa !9
  call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 51, i8 noundef zeroext %73, i8 noundef zeroext %74)
  br label %75

75:                                               ; preds = %69, %68
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  br label %76

76:                                               ; preds = %75, %33
  br label %77

77:                                               ; preds = %76, %21
  br label %78

78:                                               ; preds = %77, %12
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code7add_ptrEhi(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = icmp eq i32 %2, 0
  br i1 %4, label %31, label %5

5:                                                ; preds = %3
  %or.cond = icmp ult i32 %2, 64
  br i1 %or.cond, label %6, label %10

6:                                                ; preds = %5
  %7 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 1)
  br i1 %7, label %8, label %.thread

8:                                                ; preds = %6
  %9 = trunc nuw nsw i32 %2 to i8
  tail call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 2, i8 noundef zeroext %1, i8 noundef zeroext %9)
  br label %31

10:                                               ; preds = %5
  %or.cond3 = icmp ugt i32 %2, -64
  br i1 %or.cond3, label %11, label %.thread

11:                                               ; preds = %10
  %12 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 1)
  br i1 %12, label %13, label %.thread

13:                                               ; preds = %11
  %14 = trunc i32 %2 to i8
  %15 = sub nsw i8 0, %14
  tail call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 52, i8 noundef zeroext %1, i8 noundef zeroext %15)
  br label %31

.thread:                                          ; preds = %6, %11, %10
  %16 = sub nsw i32 0, %2
  %17 = lshr i32 %16, 8
  %18 = trunc i32 %17 to i8
  %19 = and i32 %16, 255
  %.not = icmp eq i32 %19, 0
  br i1 %.not, label %29, label %20

20:                                               ; preds = %.thread
  %21 = trunc i32 %16 to i8
  tail call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 51, i8 noundef zeroext %1, i8 noundef zeroext %21)
  %22 = and i32 %16, 65280
  %.not24 = icmp eq i32 %22, 0
  br i1 %.not24, label %23, label %25

23:                                               ; preds = %20
  %24 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 128)
  br i1 %24, label %25, label %27

25:                                               ; preds = %23, %20
  %26 = add i8 %1, 1
  tail call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 50, i8 noundef zeroext %26, i8 noundef zeroext %18)
  br label %31

27:                                               ; preds = %23
  %28 = add i8 %1, 1
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 48, i8 noundef zeroext %28, i8 noundef zeroext 1)
  br label %31

29:                                               ; preds = %.thread
  %30 = add i8 %1, 1
  tail call void @_ZN4Code6immregEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 51, i8 noundef zeroext %30, i8 noundef zeroext %18)
  br label %31

31:                                               ; preds = %29, %27, %25, %8, %13, %3
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass