; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code3addERK3RegS2_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code3addERK3RegS2_(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %9 = load ptr, ptr %4, align 8
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10)
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %14

13:                                               ; preds = %3
  br label %61

14:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %58, %14
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17)
  %19 = icmp slt i32 %16, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %61

21:                                               ; preds = %15
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %31

24:                                               ; preds = %21
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %25, i32 noundef %26)
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %28, i32 noundef %29)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 1, i8 noundef zeroext %27, i8 noundef zeroext %30)
  br label %57

31:                                               ; preds = %21
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %33)
  %35 = icmp slt i32 %32, %34
  br i1 %35, label %36, label %43

36:                                               ; preds = %31
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %37, i32 noundef %38)
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = load i32, ptr %7, align 4, !tbaa !9
  %42 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %40, i32 noundef %41)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 0, i8 noundef zeroext %39, i8 noundef zeroext %42)
  br label %56

43:                                               ; preds = %31
  %44 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 128)
  br i1 %44, label %49, label %45

45:                                               ; preds = %43
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !9
  %48 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %46, i32 noundef %47)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 0, i8 noundef zeroext %48, i8 noundef zeroext 1)
  br label %55

49:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %50 = call noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200) %9, i8 noundef zeroext 0)
  store i8 %50, ptr %8, align 1, !tbaa !11
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = load i32, ptr %7, align 4, !tbaa !9
  %53 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %51, i32 noundef %52)
  %54 = load i8, ptr %8, align 1, !tbaa !11
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 0, i8 noundef zeroext %53, i8 noundef zeroext %54)
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  br label %55

55:                                               ; preds = %49, %45
  br label %56

56:                                               ; preds = %55, %36
  br label %57

57:                                               ; preds = %56, %24
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %7, align 4, !tbaa !9
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %7, align 4, !tbaa !9
  br label %15, !llvm.loop !12

61:                                               ; preds = %20, %13
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200), i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code3addERK3RegS2_(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #1 align 2 {
  %4 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %5 = icmp eq i32 %4, 0
  br i1 %5, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %3
  %6 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %8, label %.loopexit

8:                                                ; preds = %.preheader
  %9 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef 0)
  %10 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef 0)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 1, i8 noundef zeroext %9, i8 noundef zeroext %10)
  %11 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %12 = icmp sgt i32 %11, 1
  br i1 %12, label %.lr.ph.peel.next, label %.loopexit

.lr.ph.peel.next:                                 ; preds = %8, %25
  %.020 = phi i32 [ %26, %25 ], [ 1, %8 ]
  %13 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %14 = icmp slt i32 %.020, %13
  br i1 %14, label %15, label %18

15:                                               ; preds = %.lr.ph.peel.next
  %16 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.020)
  %17 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.020)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 0, i8 noundef zeroext %16, i8 noundef zeroext %17)
  br label %25

18:                                               ; preds = %.lr.ph.peel.next
  %19 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 128)
  br i1 %19, label %22, label %20

20:                                               ; preds = %18
  %21 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.020)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 0, i8 noundef zeroext %21, i8 noundef zeroext 1)
  br label %25

22:                                               ; preds = %18
  %23 = tail call noundef zeroext i8 @_ZN4Code7immtempEh(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext 0)
  %24 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.020)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 0, i8 noundef zeroext %24, i8 noundef zeroext %23)
  br label %25

25:                                               ; preds = %20, %22, %15
  %26 = add nuw nsw i32 %.020, 1
  %27 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %.lr.ph.peel.next, label %.loopexit, !llvm.loop !5

.loopexit:                                        ; preds = %25, %8, %.preheader, %3
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6, !7}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass