; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code4swapERK3RegS2_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code4swapERK3RegS2_(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %9 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %10 = load ptr, ptr %5, align 8, !tbaa !5
  %11 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10)
  store i32 %11, ptr %7, align 4, !tbaa !9
  %12 = load i32, ptr %7, align 4, !tbaa !9
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13)
  %15 = icmp sgt i32 %12, %14
  br i1 %15, label %16, label %19

16:                                               ; preds = %3
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17)
  store i32 %18, ptr %7, align 4, !tbaa !9
  br label %19

19:                                               ; preds = %16, %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %60, %19
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %63

25:                                               ; preds = %20
  %26 = call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 64)
  br i1 %26, label %27, label %46

27:                                               ; preds = %25
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %28, i32 noundef %29)
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = load i32, ptr %8, align 4, !tbaa !9
  %33 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %31, i32 noundef %32)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 19, i8 noundef zeroext %30, i8 noundef zeroext %33)
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %34, i32 noundef %35)
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %37, i32 noundef %38)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 19, i8 noundef zeroext %36, i8 noundef zeroext %39)
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %40, i32 noundef %41)
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = load i32, ptr %8, align 4, !tbaa !9
  %45 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %43, i32 noundef %44)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 19, i8 noundef zeroext %42, i8 noundef zeroext %45)
  br label %59

46:                                               ; preds = %25
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = load i32, ptr %8, align 4, !tbaa !9
  %49 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %47, i32 noundef %48)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 34, i8 noundef zeroext 0, i8 noundef zeroext %49)
  %50 = load ptr, ptr %5, align 8, !tbaa !5
  %51 = load i32, ptr %8, align 4, !tbaa !9
  %52 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %50, i32 noundef %51)
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %53, i32 noundef %54)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 34, i8 noundef zeroext %52, i8 noundef zeroext %55)
  %56 = load ptr, ptr %6, align 8, !tbaa !5
  %57 = load i32, ptr %8, align 4, !tbaa !9
  %58 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %56, i32 noundef %57)
  call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %9, i32 noundef 34, i8 noundef zeroext %58, i8 noundef zeroext 0)
  br label %59

59:                                               ; preds = %46, %27
  br label %60

60:                                               ; preds = %59
  %61 = load i32, ptr %8, align 4, !tbaa !9
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %8, align 4, !tbaa !9
  br label %20, !llvm.loop !11

63:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code4swapERK3RegS2_(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #1 align 2 {
  %4 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %5 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %6 = icmp sgt i32 %4, %5
  br i1 %6, label %7, label %9

7:                                                ; preds = %3
  %8 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  br label %9

9:                                                ; preds = %7, %3
  %.027 = phi i32 [ %8, %7 ], [ %4, %3 ]
  %10 = icmp sgt i32 %.027, 0
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %23, %9
  ret void

.lr.ph:                                           ; preds = %9, %23
  %.029 = phi i32 [ %24, %23 ], [ 0, %9 ]
  %11 = tail call noundef zeroext i1 @_ZNK4Code7hasFlagENS_4FlagE(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 64)
  %12 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.029)
  br i1 %11, label %13, label %19

13:                                               ; preds = %.lr.ph
  %14 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.029)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 19, i8 noundef zeroext %12, i8 noundef zeroext %14)
  %15 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.029)
  %16 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.029)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 19, i8 noundef zeroext %15, i8 noundef zeroext %16)
  %17 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.029)
  %18 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.029)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 19, i8 noundef zeroext %17, i8 noundef zeroext %18)
  br label %23

19:                                               ; preds = %.lr.ph
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 34, i8 noundef zeroext 0, i8 noundef zeroext %12)
  %20 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.029)
  %21 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.029)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 34, i8 noundef zeroext %20, i8 noundef zeroext %21)
  %22 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %2, i32 noundef %.029)
  tail call void @_ZN4Code6tworegEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 34, i8 noundef zeroext %22, i8 noundef zeroext 0)
  br label %23

23:                                               ; preds = %13, %19
  %24 = add nuw nsw i32 %.029, 1
  %exitcond.not = icmp eq i32 %24, %.027
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass