; LLVM IR from rweather/lightweight-crypto :: src/genavr/algorithm_gift128.ll (ZN12Gift128State14inv_rotate_keyER4Codei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Gift128State = type <{ %class.Reg, %class.Reg, %class.Reg, %class.Reg, %class.Reg, %class.Reg, i8, [7 x i8] }>

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7stlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i8 noundef zeroext) #2 align 2

declare void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #3

declare void @_ZN3RegC1ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24), i8 noundef zeroext, i8 noundef zeroext) unnamed_addr #3

declare void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7ldlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN12Gift128State14inv_rotate_keyER4Codei(ptr noundef nonnull align 8 dereferenceable(145) %0, ptr noundef nonnull align 8 dereferenceable(200) %1, i32 noundef %2) #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %class.Reg, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca %class.Reg, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %13 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = srem i32 %14, 4
  switch i32 %15, label %17 [
    i32 0, label %16
    i32 1, label %18
    i32 2, label %19
    i32 3, label %20
  ]

16:                                               ; preds = %3
  br label %17

17:                                               ; preds = %16, %3
  store i32 12, ptr %7, align 4, !tbaa !9
  store i32 8, ptr %8, align 4, !tbaa !9
  br label %21

18:                                               ; preds = %3
  store i32 8, ptr %7, align 4, !tbaa !9
  store i32 4, ptr %8, align 4, !tbaa !9
  br label %21

19:                                               ; preds = %3
  store i32 4, ptr %7, align 4, !tbaa !9
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %21

20:                                               ; preds = %3
  store i32 0, ptr %7, align 4, !tbaa !9
  store i32 12, ptr %8, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %20, %19, %18, %17
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %class.Gift128State, ptr %13, i32 0, i32 4
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = trunc i32 %24 to i8
  call void @_ZN4Code7stlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200) %22, ptr noundef nonnull align 8 dereferenceable(24) %23, i8 noundef zeroext %25)
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = getelementptr inbounds %class.Gift128State, ptr %13, i32 0, i32 4
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = trunc i32 %28 to i8
  call void @_ZN4Code7ldlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200) %26, ptr noundef nonnull align 8 dereferenceable(24) %27, i8 noundef zeroext %29)
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 24, ptr %9) #4
  %31 = getelementptr inbounds %class.Gift128State, ptr %13, i32 0, i32 4
  call void @_ZN3RegC1ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24) %9, ptr noundef nonnull align 8 dereferenceable(24) %31, i8 noundef zeroext 0, i8 noundef zeroext 2)
  invoke void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %30, ptr noundef nonnull align 8 dereferenceable(24) %9, i32 noundef 4)
          to label %32 unwind label %36

32:                                               ; preds = %21
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %9) #4
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 24, ptr %12) #4
  %34 = getelementptr inbounds %class.Gift128State, ptr %13, i32 0, i32 4
  call void @_ZN3RegC1ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24) %12, ptr noundef nonnull align 8 dereferenceable(24) %34, i8 noundef zeroext 2, i8 noundef zeroext 2)
  invoke void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %33, ptr noundef nonnull align 8 dereferenceable(24) %12, i32 noundef 2)
          to label %35 unwind label %40

35:                                               ; preds = %32
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  ret void

36:                                               ; preds = %21
  %37 = landingpad { ptr, i32 }
          cleanup
  %38 = extractvalue { ptr, i32 } %37, 0
  store ptr %38, ptr %10, align 8
  %39 = extractvalue { ptr, i32 } %37, 1
  store i32 %39, ptr %11, align 4
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %9) #4
  br label %44

40:                                               ; preds = %32
  %41 = landingpad { ptr, i32 }
          cleanup
  %42 = extractvalue { ptr, i32 } %41, 0
  store ptr %42, ptr %10, align 8
  %43 = extractvalue { ptr, i32 } %41, 1
  store i32 %43, ptr %11, align 4
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #4
  br label %44

44:                                               ; preds = %40, %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %45

45:                                               ; preds = %44
  %46 = load ptr, ptr %10, align 8
  %47 = load i32, ptr %11, align 4
  %48 = insertvalue { ptr, i32 } poison, ptr %46, 0
  %49 = insertvalue { ptr, i32 } %48, i32 %47, 1
  resume { ptr, i32 } %49
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7stlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i8 noundef zeroext) local_unnamed_addr #2 align 2

declare void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #3

declare void @_ZN3RegC1ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24), i8 noundef zeroext, i8 noundef zeroext) unnamed_addr #3

declare void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code7ldlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i8 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN12Gift128State14inv_rotate_keyER4Codei(ptr noundef nonnull align 8 dereferenceable(145) %0, ptr noundef nonnull align 8 dereferenceable(200) %1, i32 noundef %2) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca %class.Reg, align 8
  %5 = alloca %class.Reg, align 8
  %6 = srem i32 %2, 4
  %7 = icmp ult i32 %6, 4
  %switch.idx.cast = trunc nuw nsw i32 %6 to i8
  %8 = shl nuw nsw i8 %switch.idx.cast, 2
  %switch.offset = sub nuw nsw i8 12, %8
  %switch.shiftamt = shl nuw nsw i32 %6, 3
  %switch.downshift = lshr i32 201327624, %switch.shiftamt
  %switch.masked = trunc i32 %switch.downshift to i8
  %.011 = select i1 %7, i8 %switch.offset, i8 12
  %.010 = select i1 %7, i8 %switch.masked, i8 8
  %9 = getelementptr inbounds i8, ptr %0, i64 96
  tail call void @_ZN4Code7stlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200) %1, ptr noundef nonnull align 8 dereferenceable(24) %9, i8 noundef zeroext %.010)
  tail call void @_ZN4Code7ldlocalERK3Regh(ptr noundef nonnull align 8 dereferenceable(200) %1, ptr noundef nonnull align 8 dereferenceable(24) %9, i8 noundef zeroext %.011)
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #4
  call void @_ZN3RegC1ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 8 dereferenceable(24) %9, i8 noundef zeroext 0, i8 noundef zeroext 2)
  invoke void @_ZN4Code3rorERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %1, ptr noundef nonnull align 8 dereferenceable(24) %4, i32 noundef 4)
          to label %10 unwind label %12

10:                                               ; preds = %3
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4
  call void @_ZN3RegC1ERKS_hh(ptr noundef nonnull align 8 dereferenceable(24) %5, ptr noundef nonnull align 8 dereferenceable(24) %9, i8 noundef zeroext 2, i8 noundef zeroext 2)
  invoke void @_ZN4Code3rolERK3Regj(ptr noundef nonnull align 8 dereferenceable(200) %1, ptr noundef nonnull align 8 dereferenceable(24) %5, i32 noundef 2)
          to label %11 unwind label %14

11:                                               ; preds = %10
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  ret void

12:                                               ; preds = %3
  %13 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4
  br label %16

14:                                               ; preds = %10
  %15 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  br label %16

16:                                               ; preds = %14, %12
  %.pn = phi { ptr, i32 } [ %15, %14 ], [ %13, %12 ]
  resume { ptr, i32 } %.pn
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass