; LLVM IR from ERGO-Code/HiGHS :: src/mip/HighsConflictPool.ll (ZN17HighsConflictPool12performAgingEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HighsConflictPool = type { i32, i32, %"class.std::vector", %"class.std::vector.6", %"class.std::vector.11", %"class.std::vector.16", %"class.std::vector.21", %"class.std::set.26", %"class.std::vector", %"class.std::vector.32" }
%"class.std::vector.6" = type { %"struct.std::_Vector_base.7" }
%"struct.std::_Vector_base.7" = type { %"struct.std::_Vector_base<short, std::allocator<short>>::_Vector_impl" }
%"struct.std::_Vector_base<short, std::allocator<short>>::_Vector_impl" = type { %"struct.std::_Vector_base<short, std::allocator<short>>::_Vector_impl_data" }
%"struct.std::_Vector_base<short, std::allocator<short>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.11" = type { %"struct.std::_Vector_base.12" }
%"struct.std::_Vector_base.12" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.16" = type { %"struct.std::_Vector_base.17" }
%"struct.std::_Vector_base.17" = type { %"struct.std::_Vector_base<HighsDomainChange, std::allocator<HighsDomainChange>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsDomainChange, std::allocator<HighsDomainChange>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsDomainChange, std::allocator<HighsDomainChange>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsDomainChange, std::allocator<HighsDomainChange>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.21" = type { %"struct.std::_Vector_base.22" }
%"struct.std::_Vector_base.22" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<int, int>, std::allocator<std::pair<int, int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::set.26" = type { %"class.std::_Rb_tree.27" }
%"class.std::_Rb_tree.27" = type { %"struct.std::_Rb_tree<std::pair<int, int>, std::pair<int, int>, std::_Identity<std::pair<int, int>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<std::pair<int, int>, std::pair<int, int>, std::_Identity<std::pair<int, int>>, std::less<std::pair<int, int>>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.32" = type { %"struct.std::_Vector_base.33" }
%"struct.std::_Vector_base.33" = type { %"struct.std::_Vector_base<HighsDomain::ConflictPoolPropagation *, std::allocator<HighsDomain::ConflictPoolPropagation *>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsDomain::ConflictPoolPropagation *, std::allocator<HighsDomain::ConflictPoolPropagation *>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsDomain::ConflictPoolPropagation *, std::allocator<HighsDomain::ConflictPoolPropagation *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsDomain::ConflictPoolPropagation *, std::allocator<HighsDomain::ConflictPoolPropagation *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt4pairIiiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17HighsConflictPool14removeConflictEi(ptr noundef nonnull align 8 dereferenceable(224), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17HighsConflictPool12performAgingEv(ptr noundef nonnull align 8 dereferenceable(224) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  %8 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 6
  %9 = call noundef i64 @_ZNKSt6vectorISt4pairIiiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #3
  %10 = trunc i64 %9 to i32
  store i32 %10, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %11 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 0
  %12 = load i32, ptr %11, align 8, !tbaa !11
  store i32 %12, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %13 = call noundef i32 @_ZNK17HighsConflictPool15getNumConflictsEv(ptr noundef nonnull align 8 dereferenceable(224) %7)
  store i32 %13, ptr %5, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %24, %1
  %15 = load i32, ptr %4, align 4, !tbaa !9
  %16 = icmp sgt i32 %15, 5
  br i1 %16, label %17, label %22

17:                                               ; preds = %14
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 1
  %20 = load i32, ptr %19, align 4, !tbaa !46
  %21 = icmp sgt i32 %18, %20
  br label %22

22:                                               ; preds = %17, %14
  %23 = phi i1 [ false, %14 ], [ %21, %17 ]
  br i1 %23, label %24, label %34

24:                                               ; preds = %22
  %25 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 2
  %26 = load i32, ptr %4, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %27) #3
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = sub nsw i32 %30, %29
  store i32 %31, ptr %5, align 4, !tbaa !9
  %32 = load i32, ptr %4, align 4, !tbaa !9
  %33 = add nsw i32 %32, -1
  store i32 %33, ptr %4, align 4, !tbaa !9
  br label %14, !llvm.loop !47

34:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %94, %34
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = load i32, ptr %3, align 4, !tbaa !9
  %38 = icmp ne i32 %36, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %97

40:                                               ; preds = %35
  %41 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 3
  %42 = load i32, ptr %6, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #3
  %45 = load i16, ptr %44, align 2, !tbaa !49
  %46 = sext i16 %45 to i32
  %47 = icmp slt i32 %46, 0
  br i1 %47, label %48, label %49

48:                                               ; preds = %40
  br label %94

49:                                               ; preds = %40
  %50 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 2
  %51 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 3
  %52 = load i32, ptr %6, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %53) #3
  %55 = load i16, ptr %54, align 2, !tbaa !49
  %56 = sext i16 %55 to i64
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %56) #3
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = sub nsw i32 %58, 1
  store i32 %59, ptr %57, align 4, !tbaa !9
  %60 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 3
  %61 = load i32, ptr %6, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #3
  %64 = load i16, ptr %63, align 2, !tbaa !49
  %65 = sext i16 %64 to i32
  %66 = add nsw i32 %65, 1
  %67 = trunc i32 %66 to i16
  store i16 %67, ptr %63, align 2, !tbaa !49
  %68 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 3
  %69 = load i32, ptr %6, align 4, !tbaa !9
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %70) #3
  %72 = load i16, ptr %71, align 2, !tbaa !49
  %73 = sext i16 %72 to i32
  %74 = load i32, ptr %4, align 4, !tbaa !9
  %75 = icmp sgt i32 %73, %74
  br i1 %75, label %76, label %82

76:                                               ; preds = %49
  %77 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 3
  %78 = load i32, ptr %6, align 4, !tbaa !9
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #3
  store i16 -1, ptr %80, align 2, !tbaa !49
  %81 = load i32, ptr %6, align 4, !tbaa !9
  call void @_ZN17HighsConflictPool14removeConflictEi(ptr noundef nonnull align 8 dereferenceable(224) %7, i32 noundef %81)
  br label %93

82:                                               ; preds = %49
  %83 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 2
  %84 = getelementptr inbounds %class.HighsConflictPool, ptr %7, i32 0, i32 3
  %85 = load i32, ptr %6, align 4, !tbaa !9
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %86) #3
  %88 = load i16, ptr %87, align 2, !tbaa !49
  %89 = sext i16 %88 to i64
  %90 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %89) #3
  %91 = load i32, ptr %90, align 4, !tbaa !9
  %92 = add nsw i32 %91, 1
  store i32 %92, ptr %90, align 4, !tbaa !9
  br label %93

93:                                               ; preds = %82, %76
  br label %94

94:                                               ; preds = %93, %48
  %95 = load i32, ptr %6, align 4, !tbaa !9
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %6, align 4, !tbaa !9
  br label %35, !llvm.loop !51

97:                                               ; preds = %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK17HighsConflictPool15getNumConflictsEv(ptr noundef nonnull align 8 dereferenceable(224)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTS17HighsConflictPool", !10, i64 0, !10, i64 4, !13, i64 8, !17, i64 32, !21, i64 56, !25, i64 80, !29, i64 104, !33, i64 128, !13, i64 176, !42, i64 200}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorIsSaIsEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIsSaIsEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIsSaIsEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIsSaIsEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSSt6vectorIjSaIjEE", !22, i64 0}
!22 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"_ZTSSt6vectorI17HighsDomainChangeSaIS0_EE", !26, i64 0}
!26 = !{!"_ZTSSt12_Vector_baseI17HighsDomainChangeSaIS0_EE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseI17HighsDomainChangeSaIS0_EE12_Vector_implE", !28, i64 0}
!28 = !{!"_ZTSNSt12_Vector_baseI17HighsDomainChangeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!29 = !{!"_ZTSSt6vectorISt4pairIiiESaIS1_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseISt4pairIiiESaIS1_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt3setISt4pairIiiESt4lessIS1_ESaIS1_EE", !34, i64 0}
!34 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE", !35, i64 0}
!35 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE13_Rb_tree_implIS5_Lb1EEE", !36, i64 0, !38, i64 8}
!36 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessISt4pairIiiEEE", !37, i64 0}
!37 = !{!"_ZTSSt4lessISt4pairIiiEE"}
!38 = !{!"_ZTSSt15_Rb_tree_header", !39, i64 0, !41, i64 32}
!39 = !{!"_ZTSSt18_Rb_tree_node_base", !40, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!40 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!41 = !{!"long", !7, i64 0}
!42 = !{!"_ZTSSt6vectorIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE", !43, i64 0}
!43 = !{!"_ZTSSt12_Vector_baseIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE", !44, i64 0}
!44 = !{!"_ZTSNSt12_Vector_baseIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE12_Vector_implE", !45, i64 0}
!45 = !{!"_ZTSNSt12_Vector_baseIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!46 = !{!12, !10, i64 4}
!47 = distinct !{!47, !48}
!48 = !{!"llvm.loop.mustprogress"}
!49 = !{!50, !50, i64 0}
!50 = !{!"short", !7, i64 0}
!51 = distinct !{!51, !48}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt4pairIiiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17HighsConflictPool14removeConflictEi(ptr noundef nonnull align 8 dereferenceable(224), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17HighsConflictPool12performAgingEv(ptr noundef nonnull align 8 dereferenceable(224) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 104
  %3 = tail call noundef i64 @_ZNKSt6vectorISt4pairIiiESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %4 = load i32, ptr %0, align 8, !tbaa !5
  %5 = tail call noundef i32 @_ZNK17HighsConflictPool15getNumConflictsEv(ptr noundef nonnull align 8 dereferenceable(224) %0)
  %6 = getelementptr inbounds i8, ptr %0, i64 4
  %7 = icmp sgt i32 %4, 5
  %8 = load i32, ptr %6, align 4
  %9 = icmp sgt i32 %5, %8
  %or.cond20 = select i1 %7, i1 %9, i1 false
  br i1 %or.cond20, label %.lr.ph, label %.critedge.preheader

.lr.ph:                                           ; preds = %1
  %10 = getelementptr inbounds i8, ptr %0, i64 8
  %11 = zext nneg i32 %4 to i64
  br label %17

.critedge.preheader.loopexit:                     ; preds = %17
  %12 = trunc nuw nsw i64 %indvars.iv.next to i32
  br label %.critedge.preheader

.critedge.preheader:                              ; preds = %.critedge.preheader.loopexit, %1
  %.017.lcssa = phi i32 [ %4, %1 ], [ %12, %.critedge.preheader.loopexit ]
  %13 = and i64 %3, 4294967295
  %.not23 = icmp eq i64 %13, 0
  br i1 %.not23, label %.critedge._crit_edge, label %.lr.ph25

.lr.ph25:                                         ; preds = %.critedge.preheader
  %14 = getelementptr inbounds i8, ptr %0, i64 32
  %15 = getelementptr inbounds i8, ptr %0, i64 8
  %16 = and i64 %3, 4294967295
  br label %24

17:                                               ; preds = %.lr.ph, %17
  %indvars.iv = phi i64 [ %11, %.lr.ph ], [ %indvars.iv.next, %17 ]
  %.01622 = phi i32 [ %5, %.lr.ph ], [ %20, %17 ]
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %indvars.iv) #2
  %19 = load i32, ptr %18, align 4, !tbaa !44
  %20 = sub nsw i32 %.01622, %19
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %21 = icmp ugt i64 %indvars.iv, 6
  %22 = load i32, ptr %6, align 4
  %23 = icmp sgt i32 %20, %22
  %or.cond = select i1 %21, i1 %23, i1 false
  br i1 %or.cond, label %17, label %.critedge.preheader.loopexit, !llvm.loop !45

.critedge._crit_edge:                             ; preds = %.critedge, %.critedge.preheader
  ret void

24:                                               ; preds = %.lr.ph25, %.critedge
  %indvars.iv27 = phi i64 [ 0, %.lr.ph25 ], [ %indvars.iv.next28, %.critedge ]
  %25 = tail call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv27) #2
  %26 = load i16, ptr %25, align 2, !tbaa !47
  %27 = icmp slt i16 %26, 0
  br i1 %27, label %.critedge, label %28

28:                                               ; preds = %24
  %29 = tail call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv27) #2
  %30 = load i16, ptr %29, align 2, !tbaa !47
  %31 = sext i16 %30 to i64
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %31) #2
  %33 = load i32, ptr %32, align 4, !tbaa !44
  %34 = add nsw i32 %33, -1
  store i32 %34, ptr %32, align 4, !tbaa !44
  %35 = tail call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv27) #2
  %36 = load i16, ptr %35, align 2, !tbaa !47
  %37 = add i16 %36, 1
  store i16 %37, ptr %35, align 2, !tbaa !47
  %38 = tail call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv27) #2
  %39 = load i16, ptr %38, align 2, !tbaa !47
  %40 = sext i16 %39 to i32
  %41 = icmp slt i32 %.017.lcssa, %40
  %42 = tail call noundef nonnull align 2 dereferenceable(2) ptr @_ZNSt6vectorIsSaIsEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv27) #2
  br i1 %41, label %43, label %45

43:                                               ; preds = %28
  store i16 -1, ptr %42, align 2, !tbaa !47
  %44 = trunc nuw nsw i64 %indvars.iv27 to i32
  tail call void @_ZN17HighsConflictPool14removeConflictEi(ptr noundef nonnull align 8 dereferenceable(224) %0, i32 noundef %44)
  br label %.critedge

45:                                               ; preds = %28
  %46 = load i16, ptr %42, align 2, !tbaa !47
  %47 = sext i16 %46 to i64
  %48 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %47) #2
  %49 = load i32, ptr %48, align 4, !tbaa !44
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %48, align 4, !tbaa !44
  br label %.critedge

.critedge:                                        ; preds = %43, %45, %24
  %indvars.iv.next28 = add nuw nsw i64 %indvars.iv27, 1
  %.not = icmp eq i64 %indvars.iv.next28, %16
  br i1 %.not, label %.critedge._crit_edge, label %24, !llvm.loop !49
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK17HighsConflictPool15getNumConflictsEv(ptr noundef nonnull align 8 dereferenceable(224)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS17HighsConflictPool", !7, i64 0, !7, i64 4, !10, i64 8, !15, i64 32, !19, i64 56, !23, i64 80, !27, i64 104, !31, i64 128, !10, i64 176, !40, i64 200}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIiSaIiEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTSSt6vectorIsSaIsEE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIsSaIsEE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIsSaIsEE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIsSaIsEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!19 = !{!"_ZTSSt6vectorIjSaIjEE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!23 = !{!"_ZTSSt6vectorI17HighsDomainChangeSaIS0_EE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseI17HighsDomainChangeSaIS0_EE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseI17HighsDomainChangeSaIS0_EE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseI17HighsDomainChangeSaIS0_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!27 = !{!"_ZTSSt6vectorISt4pairIiiESaIS1_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseISt4pairIiiESaIS1_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseISt4pairIiiESaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!31 = !{!"_ZTSSt3setISt4pairIiiESt4lessIS1_ESaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSSt8_Rb_treeISt4pairIiiES1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE", !33, i64 0}
!33 = !{!"_ZTSNSt8_Rb_treeISt4pairIiiES1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE13_Rb_tree_implIS5_Lb1EEE", !34, i64 0, !36, i64 8}
!34 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessISt4pairIiiEEE", !35, i64 0}
!35 = !{!"_ZTSSt4lessISt4pairIiiEE"}
!36 = !{!"_ZTSSt15_Rb_tree_header", !37, i64 0, !39, i64 32}
!37 = !{!"_ZTSSt18_Rb_tree_node_base", !38, i64 0, !14, i64 8, !14, i64 16, !14, i64 24}
!38 = !{!"_ZTSSt14_Rb_tree_color", !8, i64 0}
!39 = !{!"long", !8, i64 0}
!40 = !{!"_ZTSSt6vectorIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE", !41, i64 0}
!41 = !{!"_ZTSSt12_Vector_baseIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE", !42, i64 0}
!42 = !{!"_ZTSNSt12_Vector_baseIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE12_Vector_implE", !43, i64 0}
!43 = !{!"_ZTSNSt12_Vector_baseIPN11HighsDomain23ConflictPoolPropagationESaIS2_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!44 = !{!7, !7, i64 0}
!45 = distinct !{!45, !46}
!46 = !{!"llvm.loop.mustprogress"}
!47 = !{!48, !48, i64 0}
!48 = !{!"short", !8, i64 0}
!49 = distinct !{!49, !46}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass