; LLVM IR from CLASS-SZ/class_sz :: class-sz/tools (r8lib)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@r8vec_direct_product2.contig = external hidden global i32, align 4
@r8vec_direct_product2.rep = external hidden global i32, align 4
@r8vec_direct_product2.skip = external hidden global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @r8vec_direct_product2(i32 noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  store ptr %5, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %34

19:                                               ; preds = %6
  store i32 1, ptr @r8vec_direct_product2.contig, align 4, !tbaa !5
  store i32 1, ptr @r8vec_direct_product2.skip, align 4, !tbaa !5
  %20 = load i32, ptr %11, align 4, !tbaa !5
  store i32 %20, ptr @r8vec_direct_product2.rep, align 4, !tbaa !5
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %30, %19
  %22 = load i32, ptr %13, align 4, !tbaa !5
  %23 = load i32, ptr %11, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %33

25:                                               ; preds = %21
  %26 = load ptr, ptr %12, align 8, !tbaa !9
  %27 = load i32, ptr %13, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds double, ptr %26, i64 %28
  store double 1.000000e+00, ptr %29, align 8, !tbaa !11
  br label %30

30:                                               ; preds = %25
  %31 = load i32, ptr %13, align 4, !tbaa !5
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %13, align 4, !tbaa !5
  br label %21, !llvm.loop !13

33:                                               ; preds = %21
  br label %34

34:                                               ; preds = %33, %6
  %35 = load i32, ptr @r8vec_direct_product2.rep, align 4, !tbaa !5
  %36 = load i32, ptr %8, align 4, !tbaa !5
  %37 = sdiv i32 %35, %36
  store i32 %37, ptr @r8vec_direct_product2.rep, align 4, !tbaa !5
  %38 = load i32, ptr @r8vec_direct_product2.skip, align 4, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = mul nsw i32 %38, %39
  store i32 %40, ptr @r8vec_direct_product2.skip, align 4, !tbaa !5
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %41

41:                                               ; preds = %89, %34
  %42 = load i32, ptr %14, align 4, !tbaa !5
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = icmp slt i32 %42, %43
  br i1 %44, label %45, label %92

45:                                               ; preds = %41
  %46 = load i32, ptr %14, align 4, !tbaa !5
  %47 = load i32, ptr @r8vec_direct_product2.contig, align 4, !tbaa !5
  %48 = mul nsw i32 %46, %47
  %49 = add nsw i32 0, %48
  store i32 %49, ptr %16, align 4, !tbaa !5
  store i32 1, ptr %15, align 4, !tbaa !5
  br label %50

50:                                               ; preds = %85, %45
  %51 = load i32, ptr %15, align 4, !tbaa !5
  %52 = load i32, ptr @r8vec_direct_product2.rep, align 4, !tbaa !5
  %53 = icmp sle i32 %51, %52
  br i1 %53, label %54, label %88

54:                                               ; preds = %50
  %55 = load i32, ptr %16, align 4, !tbaa !5
  store i32 %55, ptr %13, align 4, !tbaa !5
  br label %56

56:                                               ; preds = %78, %54
  %57 = load i32, ptr %13, align 4, !tbaa !5
  %58 = load i32, ptr %16, align 4, !tbaa !5
  %59 = load i32, ptr @r8vec_direct_product2.contig, align 4, !tbaa !5
  %60 = add nsw i32 %58, %59
  %61 = icmp slt i32 %57, %60
  br i1 %61, label %62, label %81

62:                                               ; preds = %56
  %63 = load ptr, ptr %12, align 8, !tbaa !9
  %64 = load i32, ptr %13, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds double, ptr %63, i64 %65
  %67 = load double, ptr %66, align 8, !tbaa !11
  %68 = load ptr, ptr %9, align 8, !tbaa !9
  %69 = load i32, ptr %14, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds double, ptr %68, i64 %70
  %72 = load double, ptr %71, align 8, !tbaa !11
  %73 = fmul double %67, %72
  %74 = load ptr, ptr %12, align 8, !tbaa !9
  %75 = load i32, ptr %13, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = getelementptr inbounds double, ptr %74, i64 %76
  store double %73, ptr %77, align 8, !tbaa !11
  br label %78

78:                                               ; preds = %62
  %79 = load i32, ptr %13, align 4, !tbaa !5
  %80 = add nsw i32 %79, 1
  store i32 %80, ptr %13, align 4, !tbaa !5
  br label %56, !llvm.loop !15

81:                                               ; preds = %56
  %82 = load i32, ptr %16, align 4, !tbaa !5
  %83 = load i32, ptr @r8vec_direct_product2.skip, align 4, !tbaa !5
  %84 = add nsw i32 %82, %83
  store i32 %84, ptr %16, align 4, !tbaa !5
  br label %85

85:                                               ; preds = %81
  %86 = load i32, ptr %15, align 4, !tbaa !5
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %15, align 4, !tbaa !5
  br label %50, !llvm.loop !16

88:                                               ; preds = %50
  br label %89

89:                                               ; preds = %88
  %90 = load i32, ptr %14, align 4, !tbaa !5
  %91 = add nsw i32 %90, 1
  store i32 %91, ptr %14, align 4, !tbaa !5
  br label %41, !llvm.loop !17

92:                                               ; preds = %41
  %93 = load i32, ptr @r8vec_direct_product2.contig, align 4, !tbaa !5
  %94 = load i32, ptr %8, align 4, !tbaa !5
  %95 = mul nsw i32 %93, %94
  store i32 %95, ptr @r8vec_direct_product2.contig, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@r8vec_direct_product2.contig = external hidden local_unnamed_addr global i32, align 4
@r8vec_direct_product2.rep = external hidden local_unnamed_addr global i32, align 4
@r8vec_direct_product2.skip = external hidden local_unnamed_addr global i32, align 4

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable
define dso_local void @r8vec_direct_product2(i32 noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2, i32 noundef %3, i32 noundef %4, ptr nocapture noundef %5) local_unnamed_addr #0 {
  %7 = icmp eq i32 %0, 0
  br i1 %7, label %8, label %..loopexit_crit_edge

..loopexit_crit_edge:                             ; preds = %6
  %.pre = load i32, ptr @r8vec_direct_product2.rep, align 4, !tbaa !5
  %.pre57 = load i32, ptr @r8vec_direct_product2.skip, align 4, !tbaa !5
  %.pre58.pre = load i32, ptr @r8vec_direct_product2.contig, align 4, !tbaa !5
  br label %.loopexit

8:                                                ; preds = %6
  %9 = icmp sgt i32 %4, 0
  br i1 %9, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %8
  %wide.trip.count = zext nneg i32 %4 to i64
  %min.iters.check = icmp ult i32 %4, 4
  br i1 %min.iters.check, label %.lr.ph.preheader80, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %wide.trip.count, 2147483644
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %10 = getelementptr inbounds double, ptr %5, i64 %index
  %11 = getelementptr inbounds i8, ptr %10, i64 16
  store <2 x double> <double 1.000000e+00, double 1.000000e+00>, ptr %10, align 8, !tbaa !9
  store <2 x double> <double 1.000000e+00, double 1.000000e+00>, ptr %11, align 8, !tbaa !9
  %index.next = add nuw i64 %index, 4
  %12 = icmp eq i64 %index.next, %n.vec
  br i1 %12, label %middle.block, label %vector.body, !llvm.loop !11

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %.loopexit, label %.lr.ph.preheader80

.lr.ph.preheader80:                               ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader80, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader80 ]
  %13 = getelementptr inbounds double, ptr %5, i64 %indvars.iv
  store double 1.000000e+00, ptr %13, align 8, !tbaa !9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !15

.loopexit:                                        ; preds = %.lr.ph, %middle.block, %..loopexit_crit_edge, %8
  %.pre58 = phi i32 [ %.pre58.pre, %..loopexit_crit_edge ], [ 1, %8 ], [ 1, %middle.block ], [ 1, %.lr.ph ]
  %14 = phi i32 [ %.pre57, %..loopexit_crit_edge ], [ 1, %8 ], [ 1, %middle.block ], [ 1, %.lr.ph ]
  %15 = phi i32 [ %.pre, %..loopexit_crit_edge ], [ %4, %8 ], [ %4, %middle.block ], [ %4, %.lr.ph ]
  %16 = sdiv i32 %15, %1
  store i32 %16, ptr @r8vec_direct_product2.rep, align 4, !tbaa !5
  %17 = mul i32 %14, %1
  store i32 %17, ptr @r8vec_direct_product2.skip, align 4, !tbaa !5
  %18 = icmp slt i32 %1, 1
  %.not33 = icmp slt i32 %16, 1
  %or.cond = select i1 %18, i1 true, i1 %.not33
  br i1 %or.cond, label %._crit_edge40, label %.preheader.lr.ph.preheader

.preheader.lr.ph.preheader:                       ; preds = %.loopexit
  %19 = sext i32 %17 to i64
  %20 = sext i32 %.pre58 to i64
  %wide.trip.count55 = zext nneg i32 %1 to i64
  %21 = icmp sgt i32 %.pre58, 0
  %22 = shl nsw i64 %19, 3
  %invariant.gep = getelementptr i8, ptr %2, i64 8
  %invariant.gep81 = getelementptr i8, ptr %5, i64 8
  br label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %.preheader.lr.ph.preheader, %._crit_edge36
  %indvars.iv52 = phi i64 [ 0, %.preheader.lr.ph.preheader ], [ %indvars.iv.next53, %._crit_edge36 ]
  %indvars.iv43 = phi i32 [ 0, %.preheader.lr.ph.preheader ], [ %indvars.iv.next44, %._crit_edge36 ]
  %23 = sext i32 %indvars.iv43 to i64
  %24 = add nsw i64 %20, %23
  %25 = add nsw i64 %23, 1
  %26 = sext i32 %indvars.iv43 to i64
  %27 = shl nsw i64 %26, 3
  %28 = add nsw i64 %20, %26
  %29 = add nsw i64 %26, 1
  %30 = xor i64 %26, -1
  %31 = shl nuw nsw i64 %indvars.iv52, 3
  %scevgep62 = getelementptr i8, ptr %2, i64 %31
  %gep = getelementptr i8, ptr %invariant.gep, i64 %31
  %32 = sext i32 %indvars.iv43 to i64
  %33 = getelementptr inbounds double, ptr %2, i64 %indvars.iv52
  %34 = getelementptr i8, ptr %5, i64 %27
  %gep82 = getelementptr i8, ptr %invariant.gep81, i64 %27
  br label %.preheader

.preheader:                                       ; preds = %.preheader.lr.ph, %._crit_edge
  %indvar = phi i64 [ 0, %.preheader.lr.ph ], [ %indvar.next, %._crit_edge ]
  %indvars.iv45 = phi i64 [ %32, %.preheader.lr.ph ], [ %indvars.iv.next46, %._crit_edge ]
  %.02634 = phi i32 [ 1, %.preheader.lr.ph ], [ %62, %._crit_edge ]
  %35 = mul i64 %indvar, %19
  %36 = add i64 %24, %35
  %37 = add i64 %25, %35
  %smax64 = tail call i64 @llvm.smax.i64(i64 %36, i64 %37)
  %38 = mul i64 %indvar, %19
  %39 = add i64 %38, %23
  %40 = sub i64 %smax64, %39
  %41 = mul i64 %22, %indvar
  %scevgep = getelementptr i8, ptr %34, i64 %41
  %scevgep60 = getelementptr i8, ptr %gep82, i64 %41
  %42 = mul i64 %indvar, %19
  %43 = add i64 %28, %42
  %44 = add i64 %29, %42
  %smax = tail call i64 @llvm.smax.i64(i64 %43, i64 %44)
  %45 = mul i64 %indvar, %19
  %46 = sub i64 %30, %45
  %47 = add i64 %smax, %46
  %48 = shl i64 %47, 3
  %scevgep61 = getelementptr i8, ptr %scevgep60, i64 %48
  %49 = add nsw i64 %indvars.iv45, %20
  br i1 %21, label %.lr.ph32.preheader, label %._crit_edge

.lr.ph32.preheader:                               ; preds = %.preheader
  %min.iters.check67 = icmp ult i64 %40, 4
  br i1 %min.iters.check67, label %.lr.ph32.preheader79, label %vector.memcheck

vector.memcheck:                                  ; preds = %.lr.ph32.preheader
  %bound0 = icmp ult ptr %scevgep, %gep
  %bound1 = icmp ult ptr %scevgep62, %scevgep61
  %found.conflict = and i1 %bound0, %bound1
  br i1 %found.conflict, label %.lr.ph32.preheader79, label %vector.ph68

vector.ph68:                                      ; preds = %vector.memcheck
  %n.vec70 = and i64 %40, -4
  %ind.end = add i64 %indvars.iv45, %n.vec70
  %50 = getelementptr double, ptr %5, i64 %indvars.iv45
  %51 = load double, ptr %33, align 8, !tbaa !9, !alias.scope !16
  %broadcast.splatinsert75 = insertelement <2 x double> poison, double %51, i64 0
  %broadcast.splat76 = shufflevector <2 x double> %broadcast.splatinsert75, <2 x double> poison, <2 x i32> zeroinitializer
  br label %vector.body72

vector.body72:                                    ; preds = %vector.body72, %vector.ph68
  %index73 = phi i64 [ 0, %vector.ph68 ], [ %index.next77, %vector.body72 ]
  %52 = getelementptr double, ptr %50, i64 %index73
  %53 = getelementptr inbounds i8, ptr %52, i64 16
  %wide.load = load <2 x double>, ptr %52, align 8, !tbaa !9, !alias.scope !19, !noalias !16
  %wide.load74 = load <2 x double>, ptr %53, align 8, !tbaa !9, !alias.scope !19, !noalias !16
  %54 = fmul <2 x double> %wide.load, %broadcast.splat76
  %55 = fmul <2 x double> %wide.load74, %broadcast.splat76
  store <2 x double> %54, ptr %52, align 8, !tbaa !9, !alias.scope !19, !noalias !16
  store <2 x double> %55, ptr %53, align 8, !tbaa !9, !alias.scope !19, !noalias !16
  %index.next77 = add nuw i64 %index73, 4
  %56 = icmp eq i64 %index.next77, %n.vec70
  br i1 %56, label %middle.block65, label %vector.body72, !llvm.loop !21

middle.block65:                                   ; preds = %vector.body72
  %cmp.n78 = icmp eq i64 %40, %n.vec70
  br i1 %cmp.n78, label %._crit_edge, label %.lr.ph32.preheader79

.lr.ph32.preheader79:                             ; preds = %middle.block65, %vector.memcheck, %.lr.ph32.preheader
  %indvars.iv47.ph = phi i64 [ %indvars.iv45, %vector.memcheck ], [ %indvars.iv45, %.lr.ph32.preheader ], [ %ind.end, %middle.block65 ]
  br label %.lr.ph32

.lr.ph32:                                         ; preds = %.lr.ph32.preheader79, %.lr.ph32
  %indvars.iv47 = phi i64 [ %indvars.iv.next48, %.lr.ph32 ], [ %indvars.iv47.ph, %.lr.ph32.preheader79 ]
  %57 = getelementptr inbounds double, ptr %5, i64 %indvars.iv47
  %58 = load double, ptr %57, align 8, !tbaa !9
  %59 = load double, ptr %33, align 8, !tbaa !9
  %60 = fmul double %58, %59
  store double %60, ptr %57, align 8, !tbaa !9
  %indvars.iv.next48 = add nsw i64 %indvars.iv47, 1
  %61 = icmp slt i64 %indvars.iv.next48, %49
  br i1 %61, label %.lr.ph32, label %._crit_edge, !llvm.loop !22

._crit_edge:                                      ; preds = %.lr.ph32, %middle.block65, %.preheader
  %indvars.iv.next46 = add nsw i64 %indvars.iv45, %19
  %62 = add nuw i32 %.02634, 1
  %exitcond51.not = icmp eq i32 %.02634, %16
  %indvar.next = add i64 %indvar, 1
  br i1 %exitcond51.not, label %._crit_edge36, label %.preheader, !llvm.loop !23

._crit_edge36:                                    ; preds = %._crit_edge
  %indvars.iv.next53 = add nuw nsw i64 %indvars.iv52, 1
  %indvars.iv.next44 = add i32 %indvars.iv43, %.pre58
  %exitcond56.not = icmp eq i64 %indvars.iv.next53, %wide.trip.count55
  br i1 %exitcond56.not, label %._crit_edge40, label %.preheader.lr.ph, !llvm.loop !24

._crit_edge40:                                    ; preds = %._crit_edge36, %.loopexit
  %63 = mul nsw i32 %.pre58, %1
  store i32 %63, ptr @r8vec_direct_product2.contig, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smax.i64(i64, i64) #1

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = distinct !{!11, !12, !13, !14}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!"llvm.loop.isvectorized", i32 1}
!14 = !{!"llvm.loop.unroll.runtime.disable"}
!15 = distinct !{!15, !12, !14, !13}
!16 = !{!17}
!17 = distinct !{!17, !18}
!18 = distinct !{!18, !"LVerDomain"}
!19 = !{!20}
!20 = distinct !{!20, !18}
!21 = distinct !{!21, !12, !13, !14}
!22 = distinct !{!22, !12, !13}
!23 = distinct !{!23, !12}
!24 = distinct !{!24, !12}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass