; LLVM IR from EdoPro98/SimSiPM :: src/SiPMAnalogSignal.ll (ZNK4sipm16SiPMAnalogSignal3topEddd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sipm::SiPMAnalogSignal" = type { %"class.std::vector", double }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_ZNK4sipm16SiPMAnalogSignal3topEddd(ptr noundef nonnull align 8 dereferenceable(32) %0, double noundef %1, double noundef %2, double noundef %3) #1 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca float, align 4
  %12 = alloca double, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store double %1, ptr %6, align 8, !tbaa !9
  store double %2, ptr %7, align 8, !tbaa !9
  store double %3, ptr %8, align 8, !tbaa !9
  %14 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %15 = load double, ptr %6, align 8, !tbaa !9
  %16 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %14, i32 0, i32 1
  %17 = load double, ptr %16, align 8, !tbaa !11
  %18 = fdiv double %15, %17
  %19 = fptoui double %18 to i32
  store i32 %19, ptr %9, align 4, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %20 = load double, ptr %6, align 8, !tbaa !9
  %21 = load double, ptr %7, align 8, !tbaa !9
  %22 = fadd double %20, %21
  %23 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %14, i32 0, i32 1
  %24 = load double, ptr %23, align 8, !tbaa !11
  %25 = fdiv double %22, %24
  %26 = fptoui double %25 to i32
  store i32 %26, ptr %10, align 4, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store float -1.000000e+00, ptr %11, align 4, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #2
  store double -1.000000e+00, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %27 = load i32, ptr %9, align 4, !tbaa !17
  store i32 %27, ptr %13, align 4, !tbaa !17
  br label %28

28:                                               ; preds = %55, %4
  %29 = load i32, ptr %13, align 4, !tbaa !17
  %30 = load i32, ptr %10, align 4, !tbaa !17
  %31 = icmp ult i32 %29, %30
  br i1 %31, label %33, label %32

32:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %58

33:                                               ; preds = %28
  %34 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %14, i32 0, i32 0
  %35 = load i32, ptr %13, align 4, !tbaa !17
  %36 = zext i32 %35 to i64
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #2
  %38 = load float, ptr %37, align 4, !tbaa !19
  %39 = load float, ptr %11, align 4, !tbaa !19
  %40 = fcmp ogt float %38, %39
  br i1 %40, label %41, label %54

41:                                               ; preds = %33
  %42 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %14, i32 0, i32 0
  %43 = load i32, ptr %13, align 4, !tbaa !17
  %44 = zext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #2
  %46 = load float, ptr %45, align 4, !tbaa !19
  store float %46, ptr %11, align 4, !tbaa !19
  %47 = load i32, ptr %13, align 4, !tbaa !17
  %48 = load i32, ptr %9, align 4, !tbaa !17
  %49 = sub i32 %47, %48
  %50 = uitofp i32 %49 to double
  %51 = getelementptr inbounds %"class.sipm::SiPMAnalogSignal", ptr %14, i32 0, i32 1
  %52 = load double, ptr %51, align 8, !tbaa !11
  %53 = fmul double %50, %52
  store double %53, ptr %12, align 8, !tbaa !9
  br label %54

54:                                               ; preds = %41, %33
  br label %55

55:                                               ; preds = %54
  %56 = load i32, ptr %13, align 4, !tbaa !17
  %57 = add i32 %56, 1
  store i32 %57, ptr %13, align 4, !tbaa !17
  br label %28, !llvm.loop !21

58:                                               ; preds = %32
  %59 = load double, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret double %59
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !10, i64 24}
!12 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !13, i64 0, !10, i64 24}
!13 = !{!"_ZTSSt6vectorIfSaIfEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!18, !18, i64 0}
!18 = !{!"int", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"float", !7, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef double @_ZNK4sipm16SiPMAnalogSignal3topEddd(ptr noundef nonnull align 8 dereferenceable(32) %0, double noundef %1, double noundef %2, double noundef %3) local_unnamed_addr #0 align 2 {
  %5 = getelementptr inbounds i8, ptr %0, i64 24
  %6 = load double, ptr %5, align 8, !tbaa !5
  %7 = fadd double %1, %2
  %8 = insertelement <2 x double> poison, double %1, i64 0
  %9 = insertelement <2 x double> %8, double %7, i64 1
  %10 = insertelement <2 x double> poison, double %6, i64 0
  %11 = shufflevector <2 x double> %10, <2 x double> poison, <2 x i32> zeroinitializer
  %12 = fdiv <2 x double> %9, %11
  %13 = fptoui <2 x double> %12 to <2 x i32>
  %14 = extractelement <2 x i32> %13, i64 0
  %15 = extractelement <2 x i32> %13, i64 1
  %16 = icmp ult i32 %14, %15
  br i1 %16, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %4
  %17 = zext i32 %14 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %29, %4
  %.013.lcssa = phi double [ -1.000000e+00, %4 ], [ %.1, %29 ]
  ret double %.013.lcssa

.lr.ph:                                           ; preds = %.lr.ph.preheader, %29
  %indvars.iv = phi i64 [ %17, %.lr.ph.preheader ], [ %indvars.iv.next, %29 ]
  %.01317 = phi double [ -1.000000e+00, %.lr.ph.preheader ], [ %.1, %29 ]
  %.01416 = phi float [ -1.000000e+00, %.lr.ph.preheader ], [ %.115, %29 ]
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %19 = load float, ptr %18, align 4, !tbaa !15
  %20 = fcmp ogt float %19, %.01416
  br i1 %20, label %21, label %29

21:                                               ; preds = %.lr.ph
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNKSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %23 = load float, ptr %22, align 4, !tbaa !15
  %24 = trunc i64 %indvars.iv to i32
  %25 = sub i32 %24, %14
  %26 = uitofp i32 %25 to double
  %27 = load double, ptr %5, align 8, !tbaa !5
  %28 = fmul double %27, %26
  br label %29

29:                                               ; preds = %.lr.ph, %21
  %.115 = phi float [ %23, %21 ], [ %.01416, %.lr.ph ]
  %.1 = phi double [ %28, %21 ], [ %.01317, %.lr.ph ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %15, %lftr.wideiv
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !17
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !14, i64 24}
!6 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !7, i64 0, !14, i64 24}
!7 = !{!"_ZTSSt6vectorIfSaIfEE", !8, i64 0}
!8 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !9, i64 0}
!9 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C++ TBAA"}
!14 = !{!"double", !12, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"float", !12, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass