; LLVM IR from PX4/sapog :: bootloader/bootloader/src (uavcan)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.uavcan_protocol_t = type <{ %union.anon, %union.anon.1 }>
%union.anon = type { %struct.can_id_t }
%struct.can_id_t = type { %union.anon.0 }
%union.anon.0 = type { i32 }
%union.anon.1 = type { %struct.can_tail_t }
%struct.can_tail_t = type { %union.anon.2 }
%union.anon.2 = type { i8 }
%struct.dsdl_t = type <{ %struct.uavcan_protocol_t, i16, i8, i8, i8 }>

; Function Attrs: nounwind uwtable
define dso_local i32 @uavcan_tx_dsdl(i32 noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca [8 x i8], align 1
  %12 = alloca i32, align 4
  %13 = alloca i16, align 2
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !9
  store i64 %3, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %17 = load i32, ptr %6, align 4, !tbaa !5
  %18 = load ptr, ptr %7, align 8, !tbaa !9
  %19 = load ptr, ptr %7, align 8, !tbaa !9
  %20 = getelementptr inbounds %struct.uavcan_protocol_t, ptr %19, i32 0, i32 0
  %21 = load i32, ptr %20, align 1
  %22 = and i32 %21, 127
  %23 = trunc i32 %22 to i8
  %24 = call ptr @load_dsdl_protocol(i32 noundef %17, i32 noundef 0, ptr noundef %18, i8 noundef zeroext %23)
  store ptr %24, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !5
  %25 = load i64, ptr %9, align 8, !tbaa !11
  %26 = icmp ugt i64 %25, 7
  br i1 %26, label %27, label %42

27:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #3
  %28 = load ptr, ptr %10, align 8, !tbaa !9
  %29 = getelementptr inbounds %struct.dsdl_t, ptr %28, i32 0, i32 1
  %30 = load i16, ptr %29, align 1, !tbaa !13
  %31 = load i64, ptr %9, align 8, !tbaa !11
  %32 = load ptr, ptr %8, align 8, !tbaa !9
  %33 = call zeroext i16 @crc16_signature(i16 noundef zeroext %30, i64 noundef %31, ptr noundef %32)
  store i16 %33, ptr %13, align 2, !tbaa !17
  %34 = load i16, ptr %13, align 2, !tbaa !17
  %35 = trunc i16 %34 to i8
  %36 = getelementptr inbounds [8 x i8], ptr %11, i64 0, i64 0
  store i8 %35, ptr %36, align 1, !tbaa !18
  %37 = load i16, ptr %13, align 2, !tbaa !17
  %38 = zext i16 %37 to i32
  %39 = ashr i32 %38, 8
  %40 = trunc i32 %39 to i8
  %41 = getelementptr inbounds [8 x i8], ptr %11, i64 0, i64 1
  store i8 %40, ptr %41, align 1, !tbaa !18
  store i32 2, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #3
  br label %42

42:                                               ; preds = %27, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %119, %42
  %44 = load i32, ptr %14, align 4, !tbaa !5
  %45 = zext i32 %44 to i64
  %46 = load i64, ptr %9, align 8, !tbaa !11
  %47 = icmp ult i64 %45, %46
  br i1 %47, label %48, label %122

48:                                               ; preds = %43
  %49 = load ptr, ptr %8, align 8, !tbaa !9
  %50 = load i32, ptr %14, align 4, !tbaa !5
  %51 = zext i32 %50 to i64
  %52 = getelementptr inbounds i8, ptr %49, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !18
  %54 = load i32, ptr %12, align 4, !tbaa !5
  %55 = add i32 %54, 1
  store i32 %55, ptr %12, align 4, !tbaa !5
  %56 = zext i32 %54 to i64
  %57 = getelementptr inbounds [8 x i8], ptr %11, i64 0, i64 %56
  store i8 %53, ptr %57, align 1, !tbaa !18
  %58 = load i32, ptr %14, align 4, !tbaa !5
  %59 = zext i32 %58 to i64
  %60 = load i64, ptr %9, align 8, !tbaa !11
  %61 = sub i64 %60, 1
  %62 = icmp eq i64 %59, %61
  %63 = zext i1 %62 to i32
  %64 = trunc i32 %63 to i8
  %65 = load ptr, ptr %7, align 8, !tbaa !9
  %66 = getelementptr inbounds %struct.uavcan_protocol_t, ptr %65, i32 0, i32 1
  %67 = load i8, ptr %66, align 1
  %68 = and i8 %64, 1
  %69 = shl i8 %68, 6
  %70 = and i8 %67, -65
  %71 = or i8 %70, %69
  store i8 %71, ptr %66, align 1
  %72 = load i32, ptr %12, align 4, !tbaa !5
  %73 = icmp eq i32 %72, 7
  br i1 %73, label %82, label %74

74:                                               ; preds = %48
  %75 = load ptr, ptr %7, align 8, !tbaa !9
  %76 = getelementptr inbounds %struct.uavcan_protocol_t, ptr %75, i32 0, i32 1
  %77 = load i8, ptr %76, align 1
  %78 = lshr i8 %77, 6
  %79 = and i8 %78, 1
  %80 = zext i8 %79 to i32
  %81 = icmp ne i32 %80, 0
  br i1 %81, label %82, label %118

82:                                               ; preds = %74, %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  %83 = load ptr, ptr %7, align 8, !tbaa !9
  %84 = getelementptr inbounds [8 x i8], ptr %11, i64 0, i64 0
  %85 = load i32, ptr %12, align 4, !tbaa !5
  %86 = zext i32 %85 to i64
  %87 = load ptr, ptr %10, align 8, !tbaa !9
  %88 = getelementptr inbounds %struct.dsdl_t, ptr %87, i32 0, i32 4
  %89 = load i8, ptr %88, align 1
  %90 = and i8 %89, 3
  %91 = call i32 @uavcan_tx(ptr noundef %83, ptr noundef %84, i64 noundef %86, i8 noundef zeroext %90)
  store i32 %91, ptr %15, align 4, !tbaa !5
  %92 = load i32, ptr %15, align 4, !tbaa !5
  %93 = icmp ne i32 %92, 0
  br i1 %93, label %94, label %96

94:                                               ; preds = %82
  %95 = load i32, ptr %15, align 4, !tbaa !5
  store i32 %95, ptr %5, align 4
  store i32 1, ptr %16, align 4
  br label %115

96:                                               ; preds = %82
  %97 = load ptr, ptr %7, align 8, !tbaa !9
  %98 = getelementptr inbounds %struct.uavcan_protocol_t, ptr %97, i32 0, i32 1
  %99 = load i8, ptr %98, align 1
  %100 = lshr i8 %99, 5
  %101 = and i8 %100, 1
  %102 = zext i8 %101 to i32
  %103 = xor i32 %102, 1
  %104 = trunc i32 %103 to i8
  %105 = load i8, ptr %98, align 1
  %106 = and i8 %104, 1
  %107 = shl i8 %106, 5
  %108 = and i8 %105, -33
  %109 = or i8 %108, %107
  store i8 %109, ptr %98, align 1
  %110 = load ptr, ptr %7, align 8, !tbaa !9
  %111 = getelementptr inbounds %struct.uavcan_protocol_t, ptr %110, i32 0, i32 1
  %112 = load i8, ptr %111, align 1
  %113 = and i8 %112, 127
  %114 = or i8 %113, 0
  store i8 %114, ptr %111, align 1
  store i32 0, ptr %12, align 4, !tbaa !5
  store i32 0, ptr %16, align 4
  br label %115

115:                                              ; preds = %96, %94
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  %116 = load i32, ptr %16, align 4
  switch i32 %116, label %123 [
    i32 0, label %117
  ]

117:                                              ; preds = %115
  br label %118

118:                                              ; preds = %117, %74
  br label %119

119:                                              ; preds = %118
  %120 = load i32, ptr %14, align 4, !tbaa !5
  %121 = add i32 %120, 1
  store i32 %121, ptr %14, align 4, !tbaa !5
  br label %43, !llvm.loop !19

122:                                              ; preds = %43
  store i32 0, ptr %5, align 4
  store i32 1, ptr %16, align 4
  br label %123

123:                                              ; preds = %122, %115
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %124 = load i32, ptr %5, align 4
  ret i32 %124
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden ptr @load_dsdl_protocol(i32 noundef, i32 noundef, ptr noundef, i8 noundef zeroext) #0

declare zeroext i16 @crc16_signature(i16 noundef zeroext, i64 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @uavcan_tx(ptr noundef, ptr noundef, i64 noundef, i8 noundef zeroext) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !16, i64 5}
!14 = !{!"dsdl_t", !15, i64 0, !16, i64 5, !7, i64 7, !7, i64 8, !7, i64 9, !7, i64 9}
!15 = !{!"uavcan_protocol_t", !7, i64 0, !7, i64 4}
!16 = !{!"short", !7, i64 0}
!17 = !{!16, !16, i64 0}
!18 = !{!7, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @uavcan_tx_dsdl(i32 noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #0 {
  %5 = alloca [8 x i8], align 1
  %6 = load i32, ptr %1, align 1
  %7 = trunc i32 %6 to i8
  %8 = and i8 %7, 127
  %9 = tail call ptr @load_dsdl_protocol(i32 noundef %0, i32 noundef 0, ptr noundef nonnull %1, i8 noundef zeroext %8)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
  %10 = icmp ugt i64 %3, 7
  br i1 %10, label %.thread47, label %18

.thread47:                                        ; preds = %4
  %11 = getelementptr inbounds i8, ptr %9, i64 5
  %12 = load i16, ptr %11, align 1, !tbaa !5
  %13 = tail call zeroext i16 @crc16_signature(i16 noundef zeroext %12, i64 noundef %3, ptr noundef %2) #3
  %14 = trunc i16 %13 to i8
  store i8 %14, ptr %5, align 1, !tbaa !11
  %15 = lshr i16 %13, 8
  %16 = trunc nuw i16 %15 to i8
  %17 = getelementptr inbounds i8, ptr %5, i64 1
  store i8 %16, ptr %17, align 1, !tbaa !11
  br label %.lr.ph

18:                                               ; preds = %4
  %.not46 = icmp eq i64 %3, 0
  br i1 %.not46, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.thread47, %18
  %.03050 = phi i32 [ 2, %.thread47 ], [ 0, %18 ]
  %19 = add i64 %3, -1
  %20 = getelementptr inbounds i8, ptr %1, i64 4
  %21 = getelementptr inbounds i8, ptr %9, i64 9
  %.pre = load i8, ptr %20, align 1
  br label %22

22:                                               ; preds = %.lr.ph, %42
  %23 = phi i8 [ %.pre, %.lr.ph ], [ %43, %42 ]
  %24 = phi i64 [ 0, %.lr.ph ], [ %45, %42 ]
  %.02943 = phi i32 [ 0, %.lr.ph ], [ %44, %42 ]
  %.13142 = phi i32 [ %.03050, %.lr.ph ], [ %.333, %42 ]
  %25 = getelementptr inbounds i8, ptr %2, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !11
  %27 = add i32 %.13142, 1
  %28 = zext i32 %.13142 to i64
  %29 = getelementptr inbounds [8 x i8], ptr %5, i64 0, i64 %28
  store i8 %26, ptr %29, align 1, !tbaa !11
  %.not = icmp eq i64 %19, %24
  %30 = select i1 %.not, i8 64, i8 0
  %31 = and i8 %23, -65
  %32 = or disjoint i8 %31, %30
  store i8 %32, ptr %20, align 1
  %33 = icmp eq i32 %27, 7
  %brmerge = or i1 %33, %.not
  br i1 %brmerge, label %34, label %42

34:                                               ; preds = %22
  %35 = zext i32 %27 to i64
  %36 = load i8, ptr %21, align 1
  %37 = and i8 %36, 3
  %38 = call i32 @uavcan_tx(ptr noundef nonnull %1, ptr noundef nonnull %5, i64 noundef %35, i8 noundef zeroext %37)
  %.not39 = icmp eq i32 %38, 0
  br i1 %.not39, label %.thread, label %._crit_edge

.thread:                                          ; preds = %34
  %39 = load i8, ptr %20, align 1
  %40 = and i8 %39, 127
  %41 = xor i8 %40, 32
  store i8 %41, ptr %20, align 1
  br label %42

42:                                               ; preds = %.thread, %22
  %43 = phi i8 [ %32, %22 ], [ %41, %.thread ]
  %.333 = phi i32 [ %27, %22 ], [ 0, %.thread ]
  %44 = add i32 %.02943, 1
  %45 = zext i32 %44 to i64
  %46 = icmp ult i64 %45, %3
  br i1 %46, label %22, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %42, %34, %18
  %.3 = phi i32 [ 0, %18 ], [ %38, %34 ], [ 0, %42 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
  ret i32 %.3
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden ptr @load_dsdl_protocol(i32 noundef, i32 noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #0

declare zeroext i16 @crc16_signature(i16 noundef zeroext, i64 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @uavcan_tx(ptr noundef, ptr noundef, i64 noundef, i8 noundef zeroext) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 5}
!6 = !{!"dsdl_t", !7, i64 0, !10, i64 5, !8, i64 7, !8, i64 8, !8, i64 9, !8, i64 9}
!7 = !{!"uavcan_protocol_t", !8, i64 0, !8, i64 4}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!8, !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass