; LLVM IR from SelfishOlex/MiniAudioO3DE :: MiniAudio/Code/Source/Clients (MiniAudioImplementation)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ma_slot_allocator = type { ptr, ptr, i32, i32, i32, ptr }
%struct.ma_slot_allocator_group = type { i32 }

@.str.6 = external hidden unnamed_addr constant [104 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [15 x i8], align 1
@__PRETTY_FUNCTION__.ma_slot_allocator_alloc = external hidden unnamed_addr constant [68 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local i32 @ma_slot_allocator_alloc(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 2, ptr %7, align 4, !tbaa !9
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = icmp eq ptr %17, null
  br i1 %18, label %22, label %19

19:                                               ; preds = %2
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = icmp eq ptr %20, null
  br i1 %21, label %22, label %23

22:                                               ; preds = %19, %2
  store i32 -2, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %139

23:                                               ; preds = %19
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %135, %23
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = icmp ult i32 %25, 2
  br i1 %26, label %27, label %138

27:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %28

28:                                               ; preds = %118, %27
  %29 = load i32, ptr %9, align 4, !tbaa !9
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = call noundef i32 @_ZL32ma_slot_allocator_group_capacityPK17ma_slot_allocator(ptr noundef %30)
  %32 = icmp ult i32 %29, %31
  br i1 %32, label %33, label %121

33:                                               ; preds = %28
  br label %34

34:                                               ; preds = %116, %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.ma_slot_allocator, ptr %35, i32 0, i32 0
  %37 = load ptr, ptr %36, align 8, !tbaa !11
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %37, i64 %39
  %41 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %40, i32 0, i32 0
  %42 = load atomic i32, ptr %41 seq_cst, align 4
  store i32 %42, ptr %13, align 4
  %43 = load i32, ptr %13, align 4, !tbaa !9
  store i32 %43, ptr %10, align 4, !tbaa !9
  %44 = load i32, ptr %10, align 4, !tbaa !9
  %45 = icmp eq i32 %44, -1
  br i1 %45, label %46, label %47

46:                                               ; preds = %34
  store i32 8, ptr %8, align 4
  br label %114

47:                                               ; preds = %34
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = xor i32 %48, -1
  %50 = call noundef i32 @_ZL9ma_ffs_32j(i32 noundef %49)
  store i32 %50, ptr %12, align 4, !tbaa !9
  %51 = load i32, ptr %12, align 4, !tbaa !9
  %52 = icmp ult i32 %51, 32
  br i1 %52, label %53, label %54

53:                                               ; preds = %47
  br label %56

54:                                               ; preds = %47
  call void @__assert_fail(ptr noundef @.str.7, ptr noundef @.str.6, i32 noundef 16474, ptr noundef @__PRETTY_FUNCTION__.ma_slot_allocator_alloc) #6
  unreachable

55:                                               ; No predecessors!
  br label %56

56:                                               ; preds = %55, %53
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = load i32, ptr %12, align 4, !tbaa !9
  %59 = shl i32 1, %58
  %60 = or i32 %57, %59
  store i32 %60, ptr %11, align 4, !tbaa !9
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.ma_slot_allocator, ptr %61, i32 0, i32 0
  %63 = load ptr, ptr %62, align 8, !tbaa !11
  %64 = load i32, ptr %9, align 4, !tbaa !9
  %65 = zext i32 %64 to i64
  %66 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %63, i64 %65
  %67 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %66, i32 0, i32 0
  %68 = load i32, ptr %10, align 4, !tbaa !9
  %69 = load i32, ptr %11, align 4, !tbaa !9
  %70 = cmpxchg ptr %67, i32 %68, i32 %69 seq_cst seq_cst, align 4
  %71 = extractvalue { i32, i1 } %70, 0
  %72 = load i32, ptr %10, align 4, !tbaa !9
  %73 = icmp eq i32 %71, %72
  br i1 %73, label %74, label %113

74:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.ma_slot_allocator, ptr %75, i32 0, i32 2
  store i32 1, ptr %15, align 4, !tbaa !9
  %77 = load i32, ptr %15, align 4
  %78 = atomicrmw add ptr %76, i32 %77 seq_cst, align 8
  store i32 %78, ptr %16, align 4
  %79 = load i32, ptr %16, align 4, !tbaa !9
  %80 = load i32, ptr %9, align 4, !tbaa !9
  %81 = shl i32 %80, 5
  %82 = load i32, ptr %12, align 4, !tbaa !9
  %83 = add i32 %81, %82
  store i32 %83, ptr %14, align 4, !tbaa !9
  %84 = load i32, ptr %14, align 4, !tbaa !9
  %85 = load ptr, ptr %4, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.ma_slot_allocator, ptr %85, i32 0, i32 3
  %87 = load i32, ptr %86, align 4, !tbaa !13
  %88 = icmp uge i32 %84, %87
  br i1 %88, label %89, label %90

89:                                               ; preds = %74
  store i32 -4, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %112

90:                                               ; preds = %74
  %91 = load ptr, ptr %4, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.ma_slot_allocator, ptr %91, i32 0, i32 1
  %93 = load ptr, ptr %92, align 8, !tbaa !14
  %94 = load i32, ptr %14, align 4, !tbaa !9
  %95 = zext i32 %94 to i64
  %96 = getelementptr inbounds i32, ptr %93, i64 %95
  %97 = load i32, ptr %96, align 4, !tbaa !9
  %98 = add i32 %97, 1
  store i32 %98, ptr %96, align 4, !tbaa !9
  %99 = load ptr, ptr %4, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.ma_slot_allocator, ptr %99, i32 0, i32 1
  %101 = load ptr, ptr %100, align 8, !tbaa !14
  %102 = load i32, ptr %14, align 4, !tbaa !9
  %103 = zext i32 %102 to i64
  %104 = getelementptr inbounds i32, ptr %101, i64 %103
  %105 = load i32, ptr %104, align 4, !tbaa !9
  %106 = zext i32 %105 to i64
  %107 = shl i64 %106, 32
  %108 = load i32, ptr %14, align 4, !tbaa !9
  %109 = zext i32 %108 to i64
  %110 = or i64 %107, %109
  %111 = load ptr, ptr %5, align 8, !tbaa !5
  store i64 %110, ptr %111, align 8, !tbaa !15
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %112

112:                                              ; preds = %90, %89
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %114

113:                                              ; preds = %56
  store i32 0, ptr %8, align 4
  br label %114

114:                                              ; preds = %113, %112, %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  %115 = load i32, ptr %8, align 4
  switch i32 %115, label %132 [
    i32 0, label %116
    i32 8, label %117
  ]

116:                                              ; preds = %114
  br label %34, !llvm.loop !17

117:                                              ; preds = %114
  br label %118

118:                                              ; preds = %117
  %119 = load i32, ptr %9, align 4, !tbaa !9
  %120 = add i32 %119, 1
  store i32 %120, ptr %9, align 4, !tbaa !9
  br label %28, !llvm.loop !19

121:                                              ; preds = %28
  %122 = load ptr, ptr %4, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.ma_slot_allocator, ptr %122, i32 0, i32 2
  %124 = load i32, ptr %123, align 8, !tbaa !20
  %125 = load ptr, ptr %4, align 8, !tbaa !5
  %126 = getelementptr inbounds %struct.ma_slot_allocator, ptr %125, i32 0, i32 3
  %127 = load i32, ptr %126, align 4, !tbaa !13
  %128 = icmp ult i32 %124, %127
  br i1 %128, label %129, label %130

129:                                              ; preds = %121
  call void @_ZL8ma_yieldv()
  br label %131

130:                                              ; preds = %121
  store i32 -4, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %132

131:                                              ; preds = %129
  store i32 0, ptr %8, align 4
  br label %132

132:                                              ; preds = %131, %130, %114
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  %133 = load i32, ptr %8, align 4
  switch i32 %133, label %139 [
    i32 0, label %134
  ]

134:                                              ; preds = %132
  br label %135

135:                                              ; preds = %134
  %136 = load i32, ptr %6, align 4, !tbaa !9
  %137 = add i32 %136, 1
  store i32 %137, ptr %6, align 4, !tbaa !9
  br label %24, !llvm.loop !21

138:                                              ; preds = %24
  store i32 -4, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %139

139:                                              ; preds = %138, %132, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  %140 = load i32, ptr %3, align 4
  ret i32 %140
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL32ma_slot_allocator_group_capacityPK17ma_slot_allocator(ptr noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL9ma_ffs_32j(i32 noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden void @_ZL8ma_yieldv() #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS17ma_slot_allocator", !6, i64 0, !6, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !6, i64 32}
!13 = !{!12, !10, i64 20}
!14 = !{!12, !6, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"long long", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = !{!12, !10, i64 16}
!21 = distinct !{!21, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ma_slot_allocator_group = type { i32 }

@.str.6 = external hidden unnamed_addr constant [104 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [15 x i8], align 1
@__PRETTY_FUNCTION__.ma_slot_allocator_alloc = external hidden unnamed_addr constant [68 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @ma_slot_allocator_alloc(ptr noundef %0, ptr noundef writeonly %1) local_unnamed_addr #1 {
  %3 = icmp eq ptr %0, null
  %4 = icmp eq ptr %1, null
  %or.cond = or i1 %3, %4
  br i1 %or.cond, label %.thread55, label %.preheader60

.preheader60:                                     ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  %6 = getelementptr inbounds i8, ptr %0, i64 20
  %7 = tail call noundef i32 @_ZL32ma_slot_allocator_group_capacityPK17ma_slot_allocator(ptr noundef nonnull %0)
  %.not66 = icmp eq i32 %7, 0
  br i1 %.not66, label %._crit_edge, label %.preheader

.preheader:                                       ; preds = %.preheader60, %39
  %indvars.iv = phi i64 [ %indvars.iv.next, %39 ], [ 0, %.preheader60 ]
  br label %8

8:                                                ; preds = %.preheader, %17
  %9 = load ptr, ptr %0, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %9, i64 %indvars.iv
  %11 = load atomic i32, ptr %10 seq_cst, align 4
  %12 = icmp eq i32 %11, -1
  br i1 %12, label %39, label %13

13:                                               ; preds = %8
  %14 = xor i32 %11, -1
  %15 = tail call noundef i32 @_ZL9ma_ffs_32j(i32 noundef %14)
  %16 = icmp ult i32 %15, 32
  br i1 %16, label %17, label %.loopexit

.loopexit:                                        ; preds = %13, %52
  tail call void @__assert_fail(ptr noundef nonnull @.str.7, ptr noundef nonnull @.str.6, i32 noundef 16474, ptr noundef nonnull @__PRETTY_FUNCTION__.ma_slot_allocator_alloc) #3
  unreachable

17:                                               ; preds = %13
  %18 = shl nuw i32 1, %15
  %19 = or i32 %18, %11
  %20 = load ptr, ptr %0, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %20, i64 %indvars.iv
  %22 = cmpxchg ptr %21, i32 %11, i32 %19 seq_cst seq_cst, align 4
  %23 = extractvalue { i32, i1 } %22, 1
  br i1 %23, label %.loopexit71, label %8

.loopexit71:                                      ; preds = %17, %56
  %.04264.lcssa68.wide = phi i64 [ %indvars.iv.1, %56 ], [ %indvars.iv, %17 ]
  %.lcssa67 = phi i32 [ %54, %56 ], [ %15, %17 ]
  %24 = trunc nuw i64 %.04264.lcssa68.wide to i32
  %25 = atomicrmw add ptr %5, i32 1 seq_cst, align 8
  %26 = shl i32 %24, 5
  %27 = or disjoint i32 %.lcssa67, %26
  %28 = load i32, ptr %6, align 4, !tbaa !11
  %.not = icmp ult i32 %27, %28
  br i1 %.not, label %29, label %.thread55

29:                                               ; preds = %.loopexit71
  %30 = getelementptr inbounds i8, ptr %0, i64 8
  %31 = load ptr, ptr %30, align 8, !tbaa !12
  %32 = zext i32 %27 to i64
  %33 = getelementptr inbounds i32, ptr %31, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !13
  %35 = add i32 %34, 1
  store i32 %35, ptr %33, align 4, !tbaa !13
  %36 = zext i32 %35 to i64
  %37 = shl nuw i64 %36, 32
  %38 = or disjoint i64 %37, %32
  store i64 %38, ptr %1, align 8, !tbaa !14
  br label %.thread55

39:                                               ; preds = %8
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %40 = tail call noundef i32 @_ZL32ma_slot_allocator_group_capacityPK17ma_slot_allocator(ptr noundef nonnull %0)
  %41 = zext i32 %40 to i64
  %42 = icmp ult i64 %indvars.iv.next, %41
  br i1 %42, label %.preheader, label %._crit_edge, !llvm.loop !16

._crit_edge:                                      ; preds = %39, %.preheader60
  %43 = load i32, ptr %5, align 8, !tbaa !18
  %44 = load i32, ptr %6, align 4, !tbaa !11
  %45 = icmp ult i32 %43, %44
  br i1 %45, label %.preheader59.1, label %.thread55

.preheader59.1:                                   ; preds = %._crit_edge
  tail call void @_ZL8ma_yieldv()
  %46 = tail call noundef i32 @_ZL32ma_slot_allocator_group_capacityPK17ma_slot_allocator(ptr noundef nonnull %0)
  %.not66.1 = icmp eq i32 %46, 0
  br i1 %.not66.1, label %._crit_edge.1, label %.preheader.1

.preheader.1:                                     ; preds = %.preheader59.1, %63
  %indvars.iv.1 = phi i64 [ %indvars.iv.next.1, %63 ], [ 0, %.preheader59.1 ]
  br label %47

47:                                               ; preds = %56, %.preheader.1
  %48 = load ptr, ptr %0, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %48, i64 %indvars.iv.1
  %50 = load atomic i32, ptr %49 seq_cst, align 4
  %51 = icmp eq i32 %50, -1
  br i1 %51, label %63, label %52

52:                                               ; preds = %47
  %53 = xor i32 %50, -1
  %54 = tail call noundef i32 @_ZL9ma_ffs_32j(i32 noundef %53)
  %55 = icmp ult i32 %54, 32
  br i1 %55, label %56, label %.loopexit

56:                                               ; preds = %52
  %57 = shl nuw i32 1, %54
  %58 = or i32 %57, %50
  %59 = load ptr, ptr %0, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.ma_slot_allocator_group, ptr %59, i64 %indvars.iv.1
  %61 = cmpxchg ptr %60, i32 %50, i32 %58 seq_cst seq_cst, align 4
  %62 = extractvalue { i32, i1 } %61, 1
  br i1 %62, label %.loopexit71, label %47

63:                                               ; preds = %47
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv.1, 1
  %64 = tail call noundef i32 @_ZL32ma_slot_allocator_group_capacityPK17ma_slot_allocator(ptr noundef nonnull %0)
  %65 = zext i32 %64 to i64
  %66 = icmp ult i64 %indvars.iv.next.1, %65
  br i1 %66, label %.preheader.1, label %._crit_edge.1, !llvm.loop !16

._crit_edge.1:                                    ; preds = %63, %.preheader59.1
  %67 = load i32, ptr %5, align 8, !tbaa !18
  %68 = load i32, ptr %6, align 4, !tbaa !11
  %69 = icmp ult i32 %67, %68
  br i1 %69, label %70, label %.thread55

70:                                               ; preds = %._crit_edge.1
  tail call void @_ZL8ma_yieldv()
  br label %.thread55

.thread55:                                        ; preds = %._crit_edge, %._crit_edge.1, %70, %29, %.loopexit71, %2
  %.6 = phi i32 [ -2, %2 ], [ -4, %.loopexit71 ], [ 0, %29 ], [ -4, %70 ], [ -4, %._crit_edge.1 ], [ -4, %._crit_edge ]
  ret i32 %.6
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL32ma_slot_allocator_group_capacityPK17ma_slot_allocator(ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL9ma_ffs_32j(i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden void @_ZL8ma_yieldv() local_unnamed_addr #2

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS17ma_slot_allocator", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !7, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 20}
!12 = !{!6, !7, i64 8}
!13 = !{!10, !10, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long long", !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!6, !10, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass