; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code5ld_stERK3RegN4Insn4TypeEh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code5ld_stERK3RegN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i8 noundef zeroext %3) #2 align 2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i8 %3, ptr %8, align 1, !tbaa !11
  %11 = load ptr, ptr %5, align 8
  %12 = load i8, ptr %8, align 1, !tbaa !11
  %13 = zext i8 %12 to i32
  %14 = icmp eq i32 %13, 254
  br i1 %14, label %15, label %32

15:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16)
  %18 = sub nsw i32 %17, 1
  store i32 %18, ptr %9, align 4, !tbaa !12
  br label %19

19:                                               ; preds = %28, %15
  %20 = load i32, ptr %9, align 4, !tbaa !12
  %21 = icmp sge i32 %20, 0
  br i1 %21, label %23, label %22

22:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %31

23:                                               ; preds = %19
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = load i32, ptr %9, align 4, !tbaa !12
  %27 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %25, i32 noundef %26)
  call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %11, i32 noundef %24, i8 noundef zeroext %27, i8 noundef zeroext -2)
  br label %28

28:                                               ; preds = %23
  %29 = load i32, ptr %9, align 4, !tbaa !12
  %30 = add nsw i32 %29, -1
  store i32 %30, ptr %9, align 4, !tbaa !12
  br label %19, !llvm.loop !14

31:                                               ; preds = %22
  br label %58

32:                                               ; preds = %4
  %33 = load i8, ptr %8, align 1, !tbaa !11
  %34 = zext i8 %33 to i32
  %35 = icmp eq i32 %34, 255
  br i1 %35, label %36, label %52

36:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !12
  br label %37

37:                                               ; preds = %48, %36
  %38 = load i32, ptr %10, align 4, !tbaa !12
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %39)
  %41 = icmp slt i32 %38, %40
  br i1 %41, label %43, label %42

42:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %51

43:                                               ; preds = %37
  %44 = load i32, ptr %7, align 4, !tbaa !9
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i32, ptr %10, align 4, !tbaa !12
  %47 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %45, i32 noundef %46)
  call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %11, i32 noundef %44, i8 noundef zeroext %47, i8 noundef zeroext -1)
  br label %48

48:                                               ; preds = %43
  %49 = load i32, ptr %10, align 4, !tbaa !12
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %10, align 4, !tbaa !12
  br label %37, !llvm.loop !16

51:                                               ; preds = %42
  br label %57

52:                                               ; preds = %32
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = load i32, ptr %7, align 4, !tbaa !9
  %55 = load i8, ptr %8, align 1, !tbaa !11
  %56 = zext i8 %55 to i32
  call void @_ZN4Code10ld_st_longERK3RegN4Insn4TypeEj(ptr noundef nonnull align 8 dereferenceable(200) %11, ptr noundef nonnull align 8 dereferenceable(24) %53, i32 noundef %54, i32 noundef %56)
  br label %57

57:                                               ; preds = %52, %51
  br label %58

58:                                               ; preds = %57, %31
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code10ld_st_longERK3RegN4Insn4TypeEj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) #2 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_ZTSN4Insn4TypeE", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200), i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code5ld_stERK3RegN4Insn4TypeEh(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i8 noundef zeroext %3) local_unnamed_addr #1 align 2 {
  switch i8 %3, label %16 [
    i8 -2, label %7
    i8 -1, label %.preheader
  ]

.preheader:                                       ; preds = %4
  %5 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %.lr.ph, label %.loopexit

7:                                                ; preds = %4
  %8 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph22, label %.loopexit

.lr.ph22:                                         ; preds = %7, %.lr.ph22
  %.017.in21 = phi i32 [ %.017, %.lr.ph22 ], [ %8, %7 ]
  %.017 = add nsw i32 %.017.in21, -1
  %10 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.017)
  tail call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %2, i8 noundef zeroext %10, i8 noundef zeroext -2)
  %11 = icmp ugt i32 %.017.in21, 1
  br i1 %11, label %.lr.ph22, label %.loopexit, !llvm.loop !5

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %.020 = phi i32 [ %13, %.lr.ph ], [ 0, %.preheader ]
  %12 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %.020)
  tail call void @_ZN4Code6memoryEN4Insn4TypeEhh(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %2, i8 noundef zeroext %12, i8 noundef zeroext -1)
  %13 = add nuw nsw i32 %.020, 1
  %14 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1)
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %.lr.ph, label %.loopexit, !llvm.loop !7

16:                                               ; preds = %4
  %17 = zext i8 %3 to i32
  tail call void @_ZN4Code10ld_st_longERK3RegN4Insn4TypeEj(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, i32 noundef %17)
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %.lr.ph22, %.preheader, %7, %16
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code10ld_st_longERK3RegN4Insn4TypeEj(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24), i32 noundef, i32 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass