; LLVM IR from EdoPro98/SimSiPM :: src/SiPMSensor.ll (ZN4sipm10SiPMSensor14generateSignalEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.24" = type { %"struct.std::_Vector_base.25" }
%"struct.std::_Vector_base.25" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.26" = type { i8 }
%"class.sipm::SiPMSensor" = type { %"class.sipm::SiPMProperties", [56 x i8], %"class.sipm::SiPMRandom", i32, i32, i32, i32, i32, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector.3", %"class.std::vector.8", %"class.sipm::SiPMAnalogSignal", [40 x i8] }
%"class.sipm::SiPMProperties" = type <{ double, double, i32, i32, i32, [4 x i8], double, double, i32, [4 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, float, [4 x i8], double, float, [4 x i8], double, double, %"class.std::map", i32, i8, i8, i8, i8, i8, [7 x i8] }>
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<double, std::pair<const double, double>, std::_Select1st<std::pair<const double, double>>, std::less<double>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
%"class.sipm::SiPMRandom" = type { %"class.sipm::SiPMRng::Xorshift256plus" }
%"class.sipm::SiPMRng::Xorshift256plus" = type <{ [4 x i64], [32 x i8], [65536 x i64], i32, [60 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl" = type { %"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<sipm::SiPMHit *, std::allocator<sipm::SiPMHit *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl" = type { %"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" }
%"struct.std::_Vector_base<float, std::allocator<float>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.sipm::SiPMAnalogSignal" = type { %"class.std::vector.8", double }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm14SiPMProperties13nSignalPointsEv(ptr noundef nonnull align 8 dereferenceable(257)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties8samplingEv(ptr noundef nonnull align 8 dereferenceable(257)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sipm10SiPMSensor14generateSignalEv(ptr noundef nonnull align 64 dereferenceable(524888) %0) #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca float, align 4
  %5 = alloca %"class.std::vector.24", align 8
  %6 = alloca %"class.std::allocator.26", align 1
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca float, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %18 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %19 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 0
  %20 = call noundef i32 @_ZNK4sipm14SiPMProperties13nSignalPointsEv(ptr noundef nonnull align 8 dereferenceable(257) %19)
  store i32 %20, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %21 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 0
  %22 = call noundef double @_ZNK4sipm14SiPMProperties8samplingEv(ptr noundef nonnull align 8 dereferenceable(257) %21)
  %23 = fdiv double 1.000000e+00, %22
  %24 = fptrunc double %23 to float
  store float %24, ptr %4, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 24, ptr %5) #4
  %25 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 3
  %26 = load i32, ptr %25, align 64, !tbaa !13
  %27 = zext i32 %26 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  call void @_ZNSaIjEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #4
  invoke void @_ZNSt6vectorIjSaIjEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %27, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %28 unwind label %35

28:                                               ; preds = %1
  call void @_ZNSt15__new_allocatorIjED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %29

29:                                               ; preds = %54, %28
  %30 = load i32, ptr %9, align 4, !tbaa !9
  %31 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 3
  %32 = load i32, ptr %31, align 64, !tbaa !13
  %33 = icmp ult i32 %30, %32
  br i1 %33, label %39, label %34

34:                                               ; preds = %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %57

35:                                               ; preds = %1
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %7, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %8, align 4
  call void @_ZNSt15__new_allocatorIjED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  br label %117

39:                                               ; preds = %29
  %40 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 11
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = zext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #4
  %44 = load ptr, ptr %43, align 8, !tbaa !5
  %45 = call noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29) %44) #4
  %46 = load float, ptr %4, align 4, !tbaa !11
  %47 = fpext float %46 to double
  %48 = fmul double %45, %47
  %49 = call double @llvm.floor.f64(double %48)
  %50 = fptoui double %49 to i32
  %51 = load i32, ptr %9, align 4, !tbaa !9
  %52 = zext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %52) #4
  store i32 %50, ptr %53, align 4, !tbaa !9
  br label %54

54:                                               ; preds = %39
  %55 = load i32, ptr %9, align 4, !tbaa !9
  %56 = add i32 %55, 1
  store i32 %56, ptr %9, align 4, !tbaa !9
  br label %29, !llvm.loop !44

57:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %58

58:                                               ; preds = %113, %57
  %59 = load i32, ptr %10, align 4, !tbaa !9
  %60 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 3
  %61 = load i32, ptr %60, align 64, !tbaa !13
  %62 = icmp ult i32 %59, %61
  br i1 %62, label %64, label %63

63:                                               ; preds = %58
  store i32 5, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %116

64:                                               ; preds = %58
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = zext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %66) #4
  %68 = load i32, ptr %67, align 4, !tbaa !9
  store i32 %68, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %69 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 11
  %70 = load i32, ptr %10, align 4, !tbaa !9
  %71 = zext i32 %70 to i64
  %72 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #4
  %73 = load ptr, ptr %72, align 8, !tbaa !5
  %74 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZN4sipm7SiPMHit9amplitudeEv(ptr noundef nonnull align 8 dereferenceable(29) %73)
          to label %75 unwind label %92

75:                                               ; preds = %64
  %76 = load float, ptr %74, align 4, !tbaa !11
  store float %76, ptr %13, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %77 = load i32, ptr %3, align 4, !tbaa !9
  %78 = load i32, ptr %12, align 4, !tbaa !9
  %79 = sub i32 %77, %78
  store i32 %79, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %80 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 13
  %81 = call noundef ptr @_ZN4sipm16SiPMAnalogSignal4dataEv(ptr noundef nonnull align 8 dereferenceable(32) %80) #4
  %82 = load i32, ptr %12, align 4, !tbaa !9
  %83 = zext i32 %82 to i64
  %84 = getelementptr inbounds float, ptr %81, i64 %83
  store ptr %84, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  %85 = getelementptr inbounds %"class.sipm::SiPMSensor", ptr %18, i32 0, i32 12
  %86 = call noundef ptr @_ZNSt6vectorIfSaIfEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %85) #4
  store ptr %86, ptr %16, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %87

87:                                               ; preds = %109, %75
  %88 = load i32, ptr %17, align 4, !tbaa !9
  %89 = load i32, ptr %14, align 4, !tbaa !9
  %90 = icmp ult i32 %88, %89
  br i1 %90, label %96, label %91

91:                                               ; preds = %87
  store i32 8, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %112

92:                                               ; preds = %64
  %93 = landingpad { ptr, i32 }
          cleanup
  %94 = extractvalue { ptr, i32 } %93, 0
  store ptr %94, ptr %7, align 8
  %95 = extractvalue { ptr, i32 } %93, 1
  store i32 %95, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @_ZNSt6vectorIjSaIjEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  br label %117

96:                                               ; preds = %87
  %97 = load ptr, ptr %16, align 8, !tbaa !5
  %98 = load i32, ptr %17, align 4, !tbaa !9
  %99 = zext i32 %98 to i64
  %100 = getelementptr inbounds float, ptr %97, i64 %99
  %101 = load float, ptr %100, align 4, !tbaa !11
  %102 = load float, ptr %13, align 4, !tbaa !11
  %103 = load ptr, ptr %15, align 8, !tbaa !5
  %104 = load i32, ptr %17, align 4, !tbaa !9
  %105 = zext i32 %104 to i64
  %106 = getelementptr inbounds float, ptr %103, i64 %105
  %107 = load float, ptr %106, align 4, !tbaa !11
  %108 = call float @llvm.fmuladd.f32(float %101, float %102, float %107)
  store float %108, ptr %106, align 4, !tbaa !11
  br label %109

109:                                              ; preds = %96
  %110 = load i32, ptr %17, align 4, !tbaa !9
  %111 = add i32 %110, 1
  store i32 %111, ptr %17, align 4, !tbaa !9
  br label %87, !llvm.loop !46

112:                                              ; preds = %91
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %113

113:                                              ; preds = %112
  %114 = load i32, ptr %10, align 4, !tbaa !9
  %115 = add i32 %114, 1
  store i32 %115, ptr %10, align 4, !tbaa !9
  br label %58, !llvm.loop !47

116:                                              ; preds = %63
  call void @_ZNSt6vectorIjSaIjEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret void

117:                                              ; preds = %92, %35
  call void @llvm.lifetime.end.p0(i64 24, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %118

118:                                              ; preds = %117
  %119 = load ptr, ptr %7, align 8
  %120 = load i32, ptr %8, align 4
  %121 = insertvalue { ptr, i32 } poison, ptr %119, 0
  %122 = insertvalue { ptr, i32 } %121, i32 %120, 1
  resume { ptr, i32 } %122
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4sipm7SiPMHit9amplitudeEv(ptr noundef nonnull align 8 dereferenceable(29)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIjEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.floor.f64(double) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4sipm16SiPMAnalogSignal4dataEv(ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIfSaIfEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIjED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !10, i64 524736}
!14 = !{!"_ZTSN4sipm10SiPMSensorE", !15, i64 0, !29, i64 320, !10, i64 524736, !10, i64 524740, !10, i64 524744, !10, i64 524748, !10, i64 524752, !10, i64 524756, !31, i64 524760, !31, i64 524784, !35, i64 524808, !39, i64 524832, !43, i64 524856}
!15 = !{!"_ZTSN4sipm14SiPMPropertiesE", !16, i64 0, !16, i64 8, !10, i64 16, !10, i64 20, !17, i64 24, !16, i64 32, !16, i64 40, !10, i64 48, !16, i64 56, !16, i64 64, !16, i64 72, !16, i64 80, !16, i64 88, !16, i64 96, !16, i64 104, !16, i64 112, !16, i64 120, !16, i64 128, !16, i64 136, !16, i64 144, !16, i64 152, !12, i64 160, !16, i64 168, !12, i64 176, !16, i64 184, !16, i64 192, !18, i64 200, !27, i64 248, !28, i64 252, !28, i64 253, !28, i64 254, !28, i64 255, !28, i64 256}
!16 = !{!"double", !7, i64 0}
!17 = !{!"_ZTSN4sipm14SiPMProperties15HitDistributionE", !7, i64 0}
!18 = !{!"_ZTSSt3mapIddSt4lessIdESaISt4pairIKddEEE", !19, i64 0}
!19 = !{!"_ZTSSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE", !20, i64 0}
!20 = !{!"_ZTSNSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE13_Rb_tree_implIS6_Lb1EEE", !21, i64 0, !23, i64 8}
!21 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIdEE", !22, i64 0}
!22 = !{!"_ZTSSt4lessIdE"}
!23 = !{!"_ZTSSt15_Rb_tree_header", !24, i64 0, !26, i64 32}
!24 = !{!"_ZTSSt18_Rb_tree_node_base", !25, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!25 = !{!"_ZTSSt14_Rb_tree_color", !7, i64 0}
!26 = !{!"long", !7, i64 0}
!27 = !{!"_ZTSN4sipm14SiPMProperties7PdeTypeE", !7, i64 0}
!28 = !{!"bool", !7, i64 0}
!29 = !{!"_ZTSN4sipm10SiPMRandomE", !30, i64 0}
!30 = !{!"_ZTSN4sipm7SiPMRng15Xorshift256plusE", !7, i64 0, !7, i64 64, !10, i64 524352}
!31 = !{!"_ZTSSt6vectorIdSaIdEE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!35 = !{!"_ZTSSt6vectorIPN4sipm7SiPMHitESaIS2_EE", !36, i64 0}
!36 = !{!"_ZTSSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE12_Vector_implE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!39 = !{!"_ZTSSt6vectorIfSaIfEE", !40, i64 0}
!40 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !41, i64 0}
!41 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !42, i64 0}
!42 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!43 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !39, i64 0, !16, i64 24}
!44 = distinct !{!44, !45}
!45 = !{!"llvm.loop.mustprogress"}
!46 = distinct !{!46, !45}
!47 = distinct !{!47, !45}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.24" = type { %"struct.std::_Vector_base.25" }
%"struct.std::_Vector_base.25" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator.26" = type { i8 }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK4sipm14SiPMProperties13nSignalPointsEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm14SiPMProperties8samplingEv(ptr noundef nonnull align 8 dereferenceable(257)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4sipm10SiPMSensor14generateSignalEv(ptr noundef nonnull align 64 dereferenceable(524888) %0) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %2 = alloca %"class.std::vector.24", align 8
  %3 = alloca %"class.std::allocator.26", align 1
  %4 = tail call noundef i32 @_ZNK4sipm14SiPMProperties13nSignalPointsEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %5 = tail call noundef double @_ZNK4sipm14SiPMProperties8samplingEv(ptr noundef nonnull align 8 dereferenceable(257) %0)
  %6 = fdiv double 1.000000e+00, %5
  %7 = fptrunc double %6 to float
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %2) #5
  %8 = getelementptr inbounds i8, ptr %0, i64 524736
  %9 = load i32, ptr %8, align 64, !tbaa !5
  %10 = zext i32 %9 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #5
  call void @_ZNSaIjEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #5
  invoke void @_ZNSt6vectorIjSaIjEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %10, ptr noundef nonnull align 1 dereferenceable(1) %3)
          to label %11 unwind label %19

11:                                               ; preds = %1
  call void @_ZNSt15__new_allocatorIjED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #5
  %12 = load i32, ptr %8, align 64, !tbaa !5
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %._crit_edge29, label %.lr.ph

.lr.ph:                                           ; preds = %11
  %13 = getelementptr inbounds i8, ptr %0, i64 524808
  %14 = fpext float %7 to double
  br label %21

.preheader:                                       ; preds = %21
  %15 = icmp eq i32 %29, 0
  br i1 %15, label %._crit_edge29, label %.lr.ph28

.lr.ph28:                                         ; preds = %.preheader
  %16 = getelementptr inbounds i8, ptr %0, i64 524808
  %17 = getelementptr inbounds i8, ptr %0, i64 524856
  %18 = getelementptr inbounds i8, ptr %0, i64 524832
  br label %32

19:                                               ; preds = %1
  %20 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIjED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %3) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  resume { ptr, i32 } %20

21:                                               ; preds = %.lr.ph, %21
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %21 ]
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %indvars.iv) #5
  %23 = load ptr, ptr %22, align 8, !tbaa !41
  %24 = call noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29) %23) #5
  %25 = fmul double %24, %14
  %26 = call double @llvm.floor.f64(double %25)
  %27 = fptoui double %26 to i32
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #5
  store i32 %27, ptr %28, align 4, !tbaa !42
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %29 = load i32, ptr %8, align 64, !tbaa !5
  %30 = zext i32 %29 to i64
  %31 = icmp ult i64 %indvars.iv.next, %30
  br i1 %31, label %21, label %.preheader, !llvm.loop !43

._crit_edge29:                                    ; preds = %._crit_edge, %11, %.preheader
  call void @_ZNSt6vectorIjSaIjEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %2) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %2) #5
  ret void

32:                                               ; preds = %.lr.ph28, %._crit_edge
  %indvars.iv36 = phi i64 [ 0, %.lr.ph28 ], [ %indvars.iv.next37, %._crit_edge ]
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv36) #5
  %34 = load i32, ptr %33, align 4, !tbaa !42
  %35 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv36) #5
  %36 = load ptr, ptr %35, align 8, !tbaa !41
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN4sipm7SiPMHit9amplitudeEv(ptr noundef nonnull align 8 dereferenceable(29) %36)
  %38 = load float, ptr %37, align 4, !tbaa !45
  %39 = call noundef ptr @_ZN4sipm16SiPMAnalogSignal4dataEv(ptr noundef nonnull align 8 dereferenceable(32) %17) #5
  %40 = zext i32 %34 to i64
  %41 = getelementptr float, ptr %39, i64 %40
  %42 = call noundef ptr @_ZNSt6vectorIfSaIfEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #5
  %.not31 = icmp eq i32 %4, %34
  br i1 %.not31, label %._crit_edge, label %.lr.ph26.preheader

.lr.ph26.preheader:                               ; preds = %32
  %43 = sub i32 %4, %34
  %wide.trip.count = zext i32 %43 to i64
  %min.iters.check = icmp ult i32 %43, 8
  br i1 %min.iters.check, label %.lr.ph26.preheader44, label %vector.memcheck

.lr.ph26.preheader44:                             ; preds = %middle.block, %vector.memcheck, %.lr.ph26.preheader
  %indvars.iv33.ph = phi i64 [ 0, %vector.memcheck ], [ 0, %.lr.ph26.preheader ], [ %n.vec, %middle.block ]
  %xtraiter = and i64 %wide.trip.count, 1
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph26.prol.loopexit, label %.lr.ph26.prol

.lr.ph26.prol:                                    ; preds = %.lr.ph26.preheader44
  %44 = getelementptr inbounds float, ptr %42, i64 %indvars.iv33.ph
  %45 = load float, ptr %44, align 4, !tbaa !45
  %46 = getelementptr inbounds float, ptr %41, i64 %indvars.iv33.ph
  %47 = load float, ptr %46, align 4, !tbaa !45
  %48 = call float @llvm.fmuladd.f32(float %45, float %38, float %47)
  store float %48, ptr %46, align 4, !tbaa !45
  %indvars.iv.next34.prol = or disjoint i64 %indvars.iv33.ph, 1
  br label %.lr.ph26.prol.loopexit

.lr.ph26.prol.loopexit:                           ; preds = %.lr.ph26.prol, %.lr.ph26.preheader44
  %indvars.iv33.unr = phi i64 [ %indvars.iv33.ph, %.lr.ph26.preheader44 ], [ %indvars.iv.next34.prol, %.lr.ph26.prol ]
  %49 = add nsw i64 %wide.trip.count, -1
  %50 = icmp eq i64 %indvars.iv33.ph, %49
  br i1 %50, label %._crit_edge, label %.lr.ph26

vector.memcheck:                                  ; preds = %.lr.ph26.preheader
  %51 = shl nuw nsw i64 %wide.trip.count, 2
  %52 = add nuw nsw i64 %40, %wide.trip.count
  %53 = shl nuw nsw i64 %52, 2
  %scevgep = getelementptr i8, ptr %39, i64 %53
  %scevgep40 = getelementptr i8, ptr %42, i64 %51
  %bound0 = icmp ult ptr %41, %scevgep40
  %bound1 = icmp ult ptr %42, %scevgep
  %found.conflict = and i1 %bound0, %bound1
  br i1 %found.conflict, label %.lr.ph26.preheader44, label %vector.ph

vector.ph:                                        ; preds = %vector.memcheck
  %n.vec = and i64 %wide.trip.count, 4294967288
  %broadcast.splatinsert = insertelement <4 x float> poison, float %38, i64 0
  %broadcast.splat = shufflevector <4 x float> %broadcast.splatinsert, <4 x float> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %54 = getelementptr inbounds float, ptr %42, i64 %index
  %55 = getelementptr inbounds i8, ptr %54, i64 16
  %wide.load = load <4 x float>, ptr %54, align 4, !tbaa !45, !alias.scope !46
  %wide.load41 = load <4 x float>, ptr %55, align 4, !tbaa !45, !alias.scope !46
  %56 = getelementptr inbounds float, ptr %41, i64 %index
  %57 = getelementptr inbounds i8, ptr %56, i64 16
  %wide.load42 = load <4 x float>, ptr %56, align 4, !tbaa !45, !alias.scope !49, !noalias !46
  %wide.load43 = load <4 x float>, ptr %57, align 4, !tbaa !45, !alias.scope !49, !noalias !46
  %58 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %broadcast.splat, <4 x float> %wide.load42)
  %59 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load41, <4 x float> %broadcast.splat, <4 x float> %wide.load43)
  store <4 x float> %58, ptr %56, align 4, !tbaa !45, !alias.scope !49, !noalias !46
  store <4 x float> %59, ptr %57, align 4, !tbaa !45, !alias.scope !49, !noalias !46
  %index.next = add nuw i64 %index, 8
  %60 = icmp eq i64 %index.next, %n.vec
  br i1 %60, label %middle.block, label %vector.body, !llvm.loop !51

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph26.preheader44

._crit_edge:                                      ; preds = %.lr.ph26.prol.loopexit, %.lr.ph26, %middle.block, %32
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  %61 = load i32, ptr %8, align 64, !tbaa !5
  %62 = zext i32 %61 to i64
  %63 = icmp ult i64 %indvars.iv.next37, %62
  br i1 %63, label %32, label %._crit_edge29, !llvm.loop !54

.lr.ph26:                                         ; preds = %.lr.ph26.prol.loopexit, %.lr.ph26
  %indvars.iv33 = phi i64 [ %indvars.iv.next34.1, %.lr.ph26 ], [ %indvars.iv33.unr, %.lr.ph26.prol.loopexit ]
  %64 = getelementptr inbounds float, ptr %42, i64 %indvars.iv33
  %65 = load float, ptr %64, align 4, !tbaa !45
  %66 = getelementptr inbounds float, ptr %41, i64 %indvars.iv33
  %67 = load float, ptr %66, align 4, !tbaa !45
  %68 = call float @llvm.fmuladd.f32(float %65, float %38, float %67)
  store float %68, ptr %66, align 4, !tbaa !45
  %indvars.iv.next34 = add nuw nsw i64 %indvars.iv33, 1
  %69 = getelementptr inbounds float, ptr %42, i64 %indvars.iv.next34
  %70 = load float, ptr %69, align 4, !tbaa !45
  %71 = getelementptr inbounds float, ptr %41, i64 %indvars.iv.next34
  %72 = load float, ptr %71, align 4, !tbaa !45
  %73 = call float @llvm.fmuladd.f32(float %70, float %38, float %72)
  store float %73, ptr %71, align 4, !tbaa !45
  %indvars.iv.next34.1 = add nuw nsw i64 %indvars.iv33, 2
  %exitcond.not.1 = icmp eq i64 %indvars.iv.next34.1, %wide.trip.count
  br i1 %exitcond.not.1, label %._crit_edge, label %.lr.ph26, !llvm.loop !55
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK4sipm7SiPMHit4timeEv(ptr noundef nonnull align 8 dereferenceable(29)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN4sipm7SiPMHitESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN4sipm7SiPMHit9amplitudeEv(ptr noundef nonnull align 8 dereferenceable(29)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIjEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.floor.f64(double) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN4sipm16SiPMAnalogSignal4dataEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIfSaIfEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIjSaIjEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIjED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 524736}
!6 = !{!"_ZTSN4sipm10SiPMSensorE", !7, i64 0, !26, i64 320, !11, i64 524736, !11, i64 524740, !11, i64 524744, !11, i64 524748, !11, i64 524752, !11, i64 524756, !28, i64 524760, !28, i64 524784, !32, i64 524808, !36, i64 524832, !40, i64 524856}
!7 = !{!"_ZTSN4sipm14SiPMPropertiesE", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 20, !12, i64 24, !8, i64 32, !8, i64 40, !11, i64 48, !8, i64 56, !8, i64 64, !8, i64 72, !8, i64 80, !8, i64 88, !8, i64 96, !8, i64 104, !8, i64 112, !8, i64 120, !8, i64 128, !8, i64 136, !8, i64 144, !8, i64 152, !13, i64 160, !8, i64 168, !13, i64 176, !8, i64 184, !8, i64 192, !14, i64 200, !24, i64 248, !25, i64 252, !25, i64 253, !25, i64 254, !25, i64 255, !25, i64 256}
!8 = !{!"double", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"_ZTSN4sipm14SiPMProperties15HitDistributionE", !9, i64 0}
!13 = !{!"float", !9, i64 0}
!14 = !{!"_ZTSSt3mapIddSt4lessIdESaISt4pairIKddEEE", !15, i64 0}
!15 = !{!"_ZTSSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE", !16, i64 0}
!16 = !{!"_ZTSNSt8_Rb_treeIdSt4pairIKddESt10_Select1stIS2_ESt4lessIdESaIS2_EE13_Rb_tree_implIS6_Lb1EEE", !17, i64 0, !19, i64 8}
!17 = !{!"_ZTSSt20_Rb_tree_key_compareISt4lessIdEE", !18, i64 0}
!18 = !{!"_ZTSSt4lessIdE"}
!19 = !{!"_ZTSSt15_Rb_tree_header", !20, i64 0, !23, i64 32}
!20 = !{!"_ZTSSt18_Rb_tree_node_base", !21, i64 0, !22, i64 8, !22, i64 16, !22, i64 24}
!21 = !{!"_ZTSSt14_Rb_tree_color", !9, i64 0}
!22 = !{!"any pointer", !9, i64 0}
!23 = !{!"long", !9, i64 0}
!24 = !{!"_ZTSN4sipm14SiPMProperties7PdeTypeE", !9, i64 0}
!25 = !{!"bool", !9, i64 0}
!26 = !{!"_ZTSN4sipm10SiPMRandomE", !27, i64 0}
!27 = !{!"_ZTSN4sipm7SiPMRng15Xorshift256plusE", !9, i64 0, !9, i64 64, !11, i64 524352}
!28 = !{!"_ZTSSt6vectorIdSaIdEE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !22, i64 0, !22, i64 8, !22, i64 16}
!32 = !{!"_ZTSSt6vectorIPN4sipm7SiPMHitESaIS2_EE", !33, i64 0}
!33 = !{!"_ZTSSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE12_Vector_implE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPN4sipm7SiPMHitESaIS2_EE17_Vector_impl_dataE", !22, i64 0, !22, i64 8, !22, i64 16}
!36 = !{!"_ZTSSt6vectorIfSaIfEE", !37, i64 0}
!37 = !{!"_ZTSSt12_Vector_baseIfSaIfEE", !38, i64 0}
!38 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE12_Vector_implE", !39, i64 0}
!39 = !{!"_ZTSNSt12_Vector_baseIfSaIfEE17_Vector_impl_dataE", !22, i64 0, !22, i64 8, !22, i64 16}
!40 = !{!"_ZTSN4sipm16SiPMAnalogSignalE", !36, i64 0, !8, i64 24}
!41 = !{!22, !22, i64 0}
!42 = !{!11, !11, i64 0}
!43 = distinct !{!43, !44}
!44 = !{!"llvm.loop.mustprogress"}
!45 = !{!13, !13, i64 0}
!46 = !{!47}
!47 = distinct !{!47, !48}
!48 = distinct !{!48, !"LVerDomain"}
!49 = !{!50}
!50 = distinct !{!50, !48}
!51 = distinct !{!51, !44, !52, !53}
!52 = !{!"llvm.loop.isvectorized", i32 1}
!53 = !{!"llvm.loop.unroll.runtime.disable"}
!54 = distinct !{!54, !44}
!55 = distinct !{!55, !44, !52}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass