; LLVM IR from ARM-software/Arm-2D :: Library/Source (arm_2d_filter)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__arm_2d_op_control = type { %struct.anon }
%struct.anon = type { ptr, %struct.anon.0, %struct.anon.1, i16, i16, i16, i16, ptr, %union.anon }
%struct.anon.0 = type { ptr, ptr }
%struct.anon.1 = type { ptr, ptr }
%union.anon = type { %struct.arm_2d_op_trans_msk_opa_t }
%struct.arm_2d_op_trans_msk_opa_t = type { %struct.arm_2d_op_core_t, %struct.anon.59, %struct.anon.60, %union.anon.61, %struct.anon.63, %struct.anon.64, %struct.__arm_2d_transform_info_t, i8 }
%struct.arm_2d_op_core_t = type { %struct.anon.2, i64 }
%struct.anon.2 = type { ptr, ptr, %struct.anon.3, i8, %union.arm_2d_op_status_t, %struct.arm_2d_op_evt_t }
%struct.anon.3 = type { i8 }
%union.arm_2d_op_status_t = type { %struct.anon.4 }
%struct.anon.4 = type { i16 }
%struct.arm_2d_op_evt_t = type { ptr, ptr }
%struct.anon.59 = type { ptr, ptr }
%struct.anon.60 = type { ptr }
%union.anon.61 = type { %struct.anon.62 }
%struct.anon.62 = type { i32 }
%struct.anon.63 = type { ptr, %struct.arm_2d_tile_t }
%struct.arm_2d_tile_t = type { %union.anon.36, %union.anon.47, %union.anon.50 }
%union.anon.36 = type { %struct.anon.37 }
%struct.anon.37 = type { i8, %union.arm_2d_color_info_t, %union.anon.40 }
%union.arm_2d_color_info_t = type { %struct.anon.38 }
%struct.anon.38 = type { i8 }
%union.anon.40 = type { i16 }
%union.anon.47 = type { %struct.arm_2d_region_t }
%struct.arm_2d_region_t = type { %union.anon.48, %union.anon.49 }
%union.anon.48 = type { %struct.arm_2d_location_t }
%struct.arm_2d_location_t = type { i16, i16 }
%union.anon.49 = type { %struct.arm_2d_size_t }
%struct.arm_2d_size_t = type { i16, i16 }
%union.anon.50 = type { ptr }
%struct.anon.64 = type { ptr, ptr }
%struct.__arm_2d_transform_info_t = type { float, float, float, %struct.arm_2d_point_float_t, %union.anon.51, %struct.anon.52 }
%struct.arm_2d_point_float_t = type { float, float }
%union.anon.51 = type { i32 }
%struct.anon.52 = type { %struct.arm_2d_location_t, %struct.anon.53 }
%struct.anon.53 = type { %struct.arm_2d_region_t, %struct.arm_2d_tile_t }
%union.anon.81 = type { %struct.anon.82 }
%struct.anon.82 = type { i8 }
%union.anon.83 = type { %struct.anon.84 }
%struct.anon.84 = type { i8, i8 }
%struct.anon.90 = type { ptr }
%struct.arm_2d_filter_iir_blur_descriptor_t = type { %struct.anon.71, %struct.arm_2d_scratch_mem_t }
%struct.anon.71 = type { %union.anon.72, %union.anon.73, i8 }
%union.anon.72 = type { %struct.arm_2d_op_t }
%struct.arm_2d_op_t = type { %struct.arm_2d_op_core_t, %struct.anon.5 }
%struct.anon.5 = type { ptr, ptr }
%union.anon.73 = type { i8 }
%struct.arm_2d_scratch_mem_t = type { %union.anon.75, i64 }
%union.anon.75 = type { %union.anon.76 }
%union.anon.76 = type { %struct.anon.77 }
%struct.anon.77 = type { i32 }

@ARM_2D_CTRL = external global %struct.__arm_2d_op_control, align 8
@.str = external hidden unnamed_addr constant [17 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [95 x i8], align 1
@__PRETTY_FUNCTION__.arm_2dp_cccn888_filter_iir_blur = external hidden unnamed_addr constant [141 x i8], align 1
@ARM_2D_OP_FILTER_IIR_BLUR_CCCN888 = external dso_local constant { { { i8 }, %union.anon.81, i8, i8, %union.anon.83, { %struct.anon.90, [8 x i8] } } }, align 8

; Function Attrs: nounwind uwtable
declare dso_local void @arm_2dp_filter_iir_blur_mode_set(ptr noundef nonnull, i8 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

declare i32 @arm_2d_target_tile_is_new_frame(ptr noundef) #3

declare zeroext i1 @arm_2d_op_wait_async(ptr noundef) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

declare ptr @arm_2d_scratch_memory_new(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i32 noundef) #3

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) #3

declare i32 @__arm_2d_op_invoke(ptr noundef) #3

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_filter_iir_blur(ptr noundef nonnull %0, ptr noundef nonnull %1, ptr noundef %2, i8 noundef zeroext %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca %struct.arm_2d_size_t, align 2
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i8 %3, ptr %9, align 1, !tbaa !9
  %13 = load ptr, ptr %7, align 8, !tbaa !5
  %14 = icmp ne ptr null, %13
  br i1 %14, label %15, label %16

15:                                               ; preds = %4
  br label %17

16:                                               ; preds = %4
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 836, ptr noundef @__PRETTY_FUNCTION__.arm_2dp_cccn888_filter_iir_blur) #5
  unreachable

17:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #6
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %18, ptr %10, align 8, !tbaa !5
  %19 = load ptr, ptr %10, align 8, !tbaa !5
  %20 = icmp eq ptr null, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %17
  store ptr getelementptr inbounds (%struct.anon, ptr @ARM_2D_CTRL, i32 0, i32 8), ptr %10, align 8, !tbaa !5
  br label %22

22:                                               ; preds = %21, %17
  %23 = load ptr, ptr %7, align 8, !tbaa !5
  %24 = call i32 @arm_2d_target_tile_is_new_frame(ptr noundef %23)
  switch i32 %24, label %90 [
    i32 0, label %91
    i32 1, label %25
    i32 -2, label %89
  ]

25:                                               ; preds = %22
  br label %26

26:                                               ; preds = %25
  %27 = load ptr, ptr %10, align 8, !tbaa !5
  %28 = call zeroext i1 @arm_2d_op_wait_async(ptr noundef %27)
  br i1 %28, label %30, label %29

29:                                               ; preds = %26
  store i32 -10, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %103

30:                                               ; preds = %26
  %31 = load ptr, ptr %10, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.arm_2d_filter_iir_blur_descriptor_t, ptr %31, i32 0, i32 0
  %33 = getelementptr inbounds %struct.anon.71, ptr %32, i32 0, i32 0
  %34 = getelementptr inbounds %struct.arm_2d_op_t, ptr %33, i32 0, i32 0
  %35 = getelementptr inbounds %struct.arm_2d_op_core_t, ptr %34, i32 0, i32 0
  %36 = getelementptr inbounds %struct.anon.2, ptr %35, i32 0, i32 1
  store ptr @ARM_2D_OP_FILTER_IIR_BLUR_CCCN888, ptr %36, align 8, !tbaa !9
  %37 = load ptr, ptr %7, align 8, !tbaa !5
  %38 = load ptr, ptr %10, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.arm_2d_filter_iir_blur_descriptor_t, ptr %38, i32 0, i32 0
  %40 = getelementptr inbounds %struct.anon.71, ptr %39, i32 0, i32 0
  %41 = getelementptr inbounds %struct.arm_2d_op_t, ptr %40, i32 0, i32 1
  %42 = getelementptr inbounds %struct.anon.5, ptr %41, i32 0, i32 0
  store ptr %37, ptr %42, align 8, !tbaa !9
  %43 = load ptr, ptr %8, align 8, !tbaa !5
  %44 = load ptr, ptr %10, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.arm_2d_filter_iir_blur_descriptor_t, ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %struct.anon.71, ptr %45, i32 0, i32 0
  %47 = getelementptr inbounds %struct.arm_2d_op_t, ptr %46, i32 0, i32 1
  %48 = getelementptr inbounds %struct.anon.5, ptr %47, i32 0, i32 1
  store ptr %43, ptr %48, align 8, !tbaa !9
  %49 = load i8, ptr %9, align 1, !tbaa !9
  %50 = load ptr, ptr %10, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.arm_2d_filter_iir_blur_descriptor_t, ptr %50, i32 0, i32 0
  %52 = getelementptr inbounds %struct.anon.71, ptr %51, i32 0, i32 2
  store i8 %49, ptr %52, align 1, !tbaa !10
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  %53 = load ptr, ptr %7, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.arm_2d_tile_t, ptr %53, i32 0, i32 1
  %55 = getelementptr inbounds %struct.arm_2d_region_t, ptr %54, i32 0, i32 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %12, ptr align 4 %55, i64 4, i1 false), !tbaa.struct !15
  %56 = load ptr, ptr %8, align 8, !tbaa !5
  %57 = icmp ne ptr null, %56
  br i1 %57, label %58, label %61

58:                                               ; preds = %30
  %59 = load ptr, ptr %8, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.arm_2d_region_t, ptr %59, i32 0, i32 1
  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %12, ptr align 2 %60, i64 4, i1 false), !tbaa.struct !15
  br label %61

61:                                               ; preds = %58, %30
  %62 = load ptr, ptr %10, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.arm_2d_filter_iir_blur_descriptor_t, ptr %62, i32 0, i32 1
  %64 = getelementptr inbounds %struct.arm_2d_scratch_mem_t, ptr %63, i32 0, i32 1
  %65 = load i64, ptr %64, align 8, !tbaa !18
  %66 = inttoptr i64 %65 to ptr
  %67 = icmp ne ptr null, %66
  br i1 %67, label %68, label %69

68:                                               ; preds = %61
  store i32 3, ptr %11, align 4
  br label %84

69:                                               ; preds = %61
  %70 = load ptr, ptr %10, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.arm_2d_filter_iir_blur_descriptor_t, ptr %70, i32 0, i32 1
  %72 = getelementptr inbounds %struct.arm_2d_size_t, ptr %12, i32 0, i32 1
  %73 = load i16, ptr %72, align 2, !tbaa !19
  %74 = sext i16 %73 to i32
  %75 = getelementptr inbounds %struct.arm_2d_size_t, ptr %12, i32 0, i32 0
  %76 = load i16, ptr %75, align 2, !tbaa !21
  %77 = sext i16 %76 to i32
  %78 = add nsw i32 %74, %77
  %79 = trunc i32 %78 to i16
  %80 = call ptr @arm_2d_scratch_memory_new(ptr noundef %71, i16 noundef zeroext 6, i16 noundef zeroext %79, i16 noundef zeroext 2, i32 noundef 2)
  %81 = icmp eq ptr null, %80
  br i1 %81, label %82, label %83

82:                                               ; preds = %69
  store i32 -9, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %84

83:                                               ; preds = %69
  store i32 0, ptr %11, align 4
  br label %84

84:                                               ; preds = %83, %82, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  %85 = load i32, ptr %11, align 4
  switch i32 %85, label %103 [
    i32 0, label %86
    i32 3, label %88
  ]

86:                                               ; preds = %84
  br label %87

87:                                               ; preds = %86
  br label %88

88:                                               ; preds = %87, %84
  br label %91

89:                                               ; preds = %22
  br label %90

90:                                               ; preds = %89, %22
  store i32 -2, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %103

91:                                               ; preds = %88, %22
  %92 = load ptr, ptr %10, align 8, !tbaa !5
  %93 = call zeroext i1 @__arm_2d_op_acquire(ptr noundef %92)
  br i1 %93, label %95, label %94

94:                                               ; preds = %91
  store i32 1, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %103

95:                                               ; preds = %91
  %96 = load ptr, ptr %10, align 8, !tbaa !5
  %97 = load ptr, ptr %10, align 8, !tbaa !5
  %98 = getelementptr inbounds %struct.arm_2d_filter_iir_blur_descriptor_t, ptr %97, i32 0, i32 0
  %99 = getelementptr inbounds %struct.anon.71, ptr %98, i32 0, i32 1
  %100 = load i8, ptr %99, align 8, !tbaa !9
  call void @arm_2dp_filter_iir_blur_mode_set(ptr noundef %96, i8 noundef zeroext %100)
  %101 = load ptr, ptr %10, align 8, !tbaa !5
  %102 = call i32 @__arm_2d_op_invoke(ptr noundef %101)
  store i32 %102, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %103

103:                                              ; preds = %95, %94, %90, %84, %29
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #6
  %104 = load i32, ptr %5, align 4
  ret i32 %104
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !7, i64 65}
!11 = !{!"arm_2d_filter_iir_blur_descriptor_t", !12, i64 0, !13, i64 72}
!12 = !{!"", !7, i64 0, !7, i64 64, !7, i64 65}
!13 = !{!"arm_2d_scratch_mem_t", !7, i64 0, !14, i64 8}
!14 = !{!"long", !7, i64 0}
!15 = !{i64 0, i64 2, !16, i64 2, i64 2, !16}
!16 = !{!17, !17, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = !{!11, !14, i64 80}
!19 = !{!20, !17, i64 2}
!20 = !{!"arm_2d_size_t", !17, i64 0, !17, i64 2}
!21 = !{!20, !17, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.anon.81 = type { %struct.anon.82 }
%struct.anon.82 = type { i8 }
%union.anon.83 = type { %struct.anon.84 }
%struct.anon.84 = type { i8, i8 }
%struct.anon.90 = type { ptr }

@ARM_2D_OP_FILTER_IIR_BLUR_CCCN888 = external dso_local constant { { { i8 }, %union.anon.81, i8, i8, %union.anon.83, { %struct.anon.90, [8 x i8] } } }, align 8

; Function Attrs: nounwind uwtable
declare dso_local void @arm_2dp_filter_iir_blur_mode_set(ptr noundef nonnull, i8 noundef zeroext) local_unnamed_addr #0

declare i32 @arm_2d_target_tile_is_new_frame(ptr noundef) local_unnamed_addr #1

declare zeroext i1 @arm_2d_op_wait_async(ptr noundef) local_unnamed_addr #1

declare ptr @arm_2d_scratch_memory_new(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i32 noundef) local_unnamed_addr #1

declare zeroext i1 @__arm_2d_op_acquire(ptr noundef) local_unnamed_addr #1

declare i32 @__arm_2d_op_invoke(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @arm_2dp_cccn888_filter_iir_blur(ptr noundef nonnull %0, ptr noundef nonnull %1, ptr noundef %2, i8 noundef zeroext %3) local_unnamed_addr #0 {
  %5 = tail call i32 @arm_2d_target_tile_is_new_frame(ptr noundef nonnull %1) #2
  switch i32 %5, label %27 [
    i32 0, label %.thread
    i32 1, label %6
  ]

6:                                                ; preds = %4
  %7 = tail call zeroext i1 @arm_2d_op_wait_async(ptr noundef nonnull %0) #2
  br i1 %7, label %8, label %27

8:                                                ; preds = %6
  %9 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr @ARM_2D_OP_FILTER_IIR_BLUR_CCCN888, ptr %9, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr %1, ptr %10, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 56
  store ptr %2, ptr %11, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %0, i64 65
  store i8 %3, ptr %12, align 1, !tbaa !8
  %13 = getelementptr inbounds i8, ptr %0, i64 80
  %14 = load i64, ptr %13, align 8, !tbaa !13
  %.not27 = icmp eq i64 %14, 0
  br i1 %.not27, label %15, label %.thread

15:                                               ; preds = %8
  %.not = icmp eq ptr %2, null
  %16 = getelementptr inbounds i8, ptr %1, i64 8
  %17 = getelementptr inbounds i8, ptr %2, i64 4
  %.sroa.0.0.in = select i1 %.not, ptr %16, ptr %17
  %.sroa.5.0..sroa_idx = getelementptr inbounds i8, ptr %1, i64 10
  %.sroa.5.0..sroa_idx2 = getelementptr inbounds i8, ptr %2, i64 6
  %.sroa.5.0.in = select i1 %.not, ptr %.sroa.5.0..sroa_idx, ptr %.sroa.5.0..sroa_idx2
  %18 = getelementptr inbounds i8, ptr %0, i64 72
  %.sroa.0.0 = load i16, ptr %.sroa.0.0.in, align 2, !tbaa !14
  %.sroa.5.0 = load i16, ptr %.sroa.5.0.in, align 2, !tbaa !14
  %19 = add i16 %.sroa.5.0, %.sroa.0.0
  %20 = tail call ptr @arm_2d_scratch_memory_new(ptr noundef nonnull %18, i16 noundef zeroext 6, i16 noundef zeroext %19, i16 noundef zeroext 2, i32 noundef 2) #2
  %21 = icmp eq ptr %20, null
  br i1 %21, label %27, label %.thread

.thread:                                          ; preds = %15, %8, %4
  %22 = tail call zeroext i1 @__arm_2d_op_acquire(ptr noundef nonnull %0) #2
  br i1 %22, label %23, label %27

23:                                               ; preds = %.thread
  %24 = getelementptr inbounds i8, ptr %0, i64 64
  %25 = load i8, ptr %24, align 8, !tbaa !5
  tail call void @arm_2dp_filter_iir_blur_mode_set(ptr noundef %0, i8 noundef zeroext %25)
  %26 = tail call i32 @__arm_2d_op_invoke(ptr noundef nonnull %0) #2
  br label %27

27:                                               ; preds = %15, %.thread, %4, %6, %23
  %.1 = phi i32 [ %26, %23 ], [ -10, %6 ], [ -2, %4 ], [ 1, %.thread ], [ -9, %15 ]
  ret i32 %.1
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 65}
!9 = !{!"arm_2d_filter_iir_blur_descriptor_t", !10, i64 0, !11, i64 72}
!10 = !{!"", !6, i64 0, !6, i64 64, !6, i64 65}
!11 = !{!"arm_2d_scratch_mem_t", !6, i64 0, !12, i64 8}
!12 = !{!"long", !6, i64 0}
!13 = !{!9, !12, i64 80}
!14 = !{!15, !15, i64 0}
!15 = !{!"short", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass