; LLVM IR from ERGO-Code/HiGHS :: src/simplex/HEkkDualRHS.ll (ZN11HEkkDualRHS16createInfeasListEd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.HEkkDualRHS = type { ptr, double, i32, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", i32, i32, i32, i32, i32, %"class.std::vector.0", ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl" = type { %"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<char, std::allocator<char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HEkk = type { ptr, ptr, ptr, %class.HighsSimplexAnalysis, %class.HighsLp, %"class.std::__cxx11::basic_string", %struct.HighsSimplexStatus, [3 x i8], %struct.HighsSimplexInfo, i32, %struct.SimplexBasis, %class.HighsHashTable, %class.HighsRandom, %"class.std::vector.5", %"class.std::vector.5", i8, %class.HighsSparseMatrix, %class.HighsSparseMatrix, %class.HSimplexNla, %struct.HotStart, double, double, double, i32, i32, i32, i32, i8, i8, i32, i32, i32, %"class.std::vector.0", %"class.std::vector.5", %struct.HighsRayRecord, %struct.HighsRayRecord, i32, i32, i32, double, %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", double, double, double, i32, i32, i8, i32, i8, i8, i8, i8, double, %"class.std::vector.66", %"class.std::vector.5", %struct.HighsSimplexStats }
%class.HighsSimplexAnalysis = type { ptr, %"class.std::vector.10", %"class.std::vector.10", ptr, i32, i32, i32, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", %struct.HighsLogOptions, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, %"class.std::__cxx11::basic_string", double, double, double, double, double, double, double, double, double, double, double, double, i32, i32, double, double, i32, double, double, i32, double, double, double, double, double, double, double, double, double, double, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8], %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, i32, i32, i32, i32, double, double, i32, i32, i32, i32, i32, double, double, i32, double, double, i32, i32, double, double, %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.15", %"class.std::unique_ptr", i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, double, i32, i32, double, double, double, i8, double, double, i32, i32, i32, i32, i32, double, double, double, double, double, double, double, double, double, i32, i32, [10 x %"struct.HighsSimplexAnalysis::AnIterOpRec"], i32, i32, [22 x %"struct.HighsSimplexAnalysis::AnIterTraceRec"], [12 x i32], [3 x i32], [4 x i8], %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution, %struct.HighsValueDistribution }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsTimerClock, std::allocator<HighsTimerClock>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsLogOptions = type <{ ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::function", ptr, i8, [7 x i8] }>
%"class.std::function" = type { %"class.std::_Function_base", ptr }
%"class.std::_Function_base" = type { %"union.std::_Any_data", ptr }
%"union.std::_Any_data" = type { %"union.std::_Nocopy_types" }
%"union.std::_Nocopy_types" = type { { i64, i64 } }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl" }
%"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl" = type { %"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl_data" }
%"struct.std::_Vector_base<TranStageAnalysis, std::allocator<TranStageAnalysis>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::unique_ptr" = type { %"struct.std::__uniq_ptr_data" }
%"struct.std::__uniq_ptr_data" = type { %"class.std::__uniq_ptr_impl" }
%"class.std::__uniq_ptr_impl" = type { %"class.std::tuple" }
%"class.std::tuple" = type { %"struct.std::_Tuple_impl" }
%"struct.std::_Tuple_impl" = type { %"struct.std::_Head_base.21" }
%"struct.std::_Head_base.21" = type { ptr }
%"struct.HighsSimplexAnalysis::AnIterOpRec" = type { double, double, i32, i32, i32, i32, double, i32, %"class.std::__cxx11::basic_string", %struct.HighsValueDistribution }
%"struct.HighsSimplexAnalysis::AnIterTraceRec" = type { double, double, [10 x double], double, i32, i32, i32 }
%struct.HighsValueDistribution = type <{ %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i32, i32, [4 x i8], double, double, %"class.std::vector.5", %"class.std::vector.0", i32, [4 x i8] }>
%class.HighsLp = type { i32, i32, %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %class.HighsSparseMatrix, i32, double, %"class.std::__cxx11::basic_string", %"class.std::__cxx11::basic_string", i32, i32, %"class.std::vector.22", %"class.std::vector.22", %"class.std::vector.27", %struct.HighsNameHash, %struct.HighsNameHash, i32, i32, %struct.HighsScale, i8, i8, i32, i8, %struct.HighsLpMods }
%"class.std::vector.22" = type { %"struct.std::_Vector_base.23" }
%"struct.std::_Vector_base.23" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::__cxx11::basic_string<char>, std::allocator<std::__cxx11::basic_string<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.27" = type { %"struct.std::_Vector_base.28" }
%"struct.std::_Vector_base.28" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsVarType, std::allocator<HighsVarType>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsNameHash = type { %"class.std::unordered_map" }
%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%struct.HighsScale = type { i32, i8, i32, i32, double, %"class.std::vector.5", %"class.std::vector.5" }
%struct.HighsLpMods = type { %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.27", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%struct.HighsSimplexStatus = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
%struct.HighsSimplexInfo = type <{ %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", i32, i32, i8, i8, [6 x i8], %struct.SimplexBasis, i32, i32, i32, [4 x i8], %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5", i32, i32, i32, i32, double, double, double, double, i32, i32, double, double, double, double, double, double, double, double, double, double, i8, [7 x i8], double, double, i32, [4 x i8], double, double, double, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, [4 x i8], double, double, i32, [4 x i8], double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double, double, double, double, i32, [4 x i8] }>
%struct.SimplexBasis = type { %"class.std::vector.0", %"class.std::vector.37", %"class.std::vector.37", i64, i32, i32, %"class.std::__cxx11::basic_string" }
%"class.std::vector.37" = type { %"struct.std::_Vector_base.38" }
%"struct.std::_Vector_base.38" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl" = type { %"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<signed char, std::allocator<signed char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.HighsHashTable = type { %"class.std::unique_ptr.42", %"class.std::unique_ptr.50", i64, i64, i64 }
%"class.std::unique_ptr.42" = type { %"struct.std::__uniq_ptr_data.43" }
%"struct.std::__uniq_ptr_data.43" = type { %"class.std::__uniq_ptr_impl.44" }
%"class.std::__uniq_ptr_impl.44" = type { %"class.std::tuple.45" }
%"class.std::tuple.45" = type { %"struct.std::_Tuple_impl.46" }
%"struct.std::_Tuple_impl.46" = type { %"struct.std::_Head_base.49" }
%"struct.std::_Head_base.49" = type { ptr }
%"class.std::unique_ptr.50" = type { %"struct.std::__uniq_ptr_data.51" }
%"struct.std::__uniq_ptr_data.51" = type { %"class.std::__uniq_ptr_impl.52" }
%"class.std::__uniq_ptr_impl.52" = type { %"class.std::tuple.53" }
%"class.std::tuple.53" = type { %"struct.std::_Tuple_impl.54" }
%"struct.std::_Tuple_impl.54" = type { %"struct.std::_Head_base.57" }
%"struct.std::_Head_base.57" = type { ptr }
%class.HighsRandom = type { i64 }
%class.HighsSparseMatrix = type { i32, i32, i32, %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5" }
%class.HSimplexNla = type { ptr, ptr, ptr, ptr, ptr, ptr, %class.HFactor, i8, double, %struct.ProductFormUpdate, %struct.SimplexIterate }
%class.HFactor = type { double, double, i32, %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %struct.RefactorInfo, i32, i32, i32, i32, i32, i32, i32, double, i8, ptr, ptr, ptr, ptr, double, double, i32, double, %"class.std::unique_ptr.58", %struct.HighsLogOptions, i8, i8, i32, i32, ptr, i32, %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", i32, i32, %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %class.HVectorBase }
%struct.RefactorInfo = type { i8, %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.37", double }
%"class.std::unique_ptr.58" = type { %"struct.std::__uniq_ptr_data.59" }
%"struct.std::__uniq_ptr_data.59" = type { %"class.std::__uniq_ptr_impl.60" }
%"class.std::__uniq_ptr_impl.60" = type { %"class.std::tuple.61" }
%"class.std::tuple.61" = type { %"struct.std::_Tuple_impl.62" }
%"struct.std::_Tuple_impl.62" = type { %"struct.std::_Head_base.65" }
%"struct.std::_Head_base.65" = type { ptr }
%class.HVectorBase = type { i32, i32, %"class.std::vector.0", %"class.std::vector.5", double, %"class.std::vector", %"class.std::vector.0", ptr, i8, i32, %"class.std::vector.0", %"class.std::vector.5" }
%struct.ProductFormUpdate = type { i8, i32, i32, %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5" }
%struct.SimplexIterate = type { i8, %struct.SimplexBasis, %struct.InvertibleRepresentation, %"class.std::vector.5" }
%struct.InvertibleRepresentation = type { %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.0", %"class.std::vector.5" }
%struct.HotStart = type { i8, %struct.RefactorInfo, %"class.std::vector.37" }
%struct.HighsRayRecord = type { i32, i32, %"class.std::vector.5" }
%"class.std::vector.66" = type { %"struct.std::_Vector_base.67" }
%"struct.std::_Vector_base.67" = type { %"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl" }
%"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl" = type { %"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl_data" }
%"struct.std::_Vector_base<HighsSimplexBadBasisChangeRecord, std::allocator<HighsSimplexBadBasisChangeRecord>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.HighsSimplexStats = type { i8, i32, i32, i32, i32, double, double, double, double }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11HEkkDualRHS16createInfeasListEd(ptr noundef nonnull align 8 dereferenceable(152) %0, double noundef %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca double, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca double, align 8
  %11 = alloca double, align 8
  %12 = alloca i32, align 4
  %13 = alloca double, align 8
  %14 = alloca double, align 8
  %15 = alloca double, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca double, align 8
  %19 = alloca double, align 8
  %20 = alloca double, align 8
  %21 = alloca double, align 8
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store double %1, ptr %4, align 8, !tbaa !9
  %27 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %28 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 0
  %29 = load ptr, ptr %28, align 8, !tbaa !11
  %30 = getelementptr inbounds %class.HEkk, ptr %29, i32 0, i32 4
  %31 = getelementptr inbounds %class.HighsLp, ptr %30, i32 0, i32 1
  %32 = load i32, ptr %31, align 4, !tbaa !26
  store i32 %32, ptr %5, align 4, !tbaa !115
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %33 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 0
  %34 = load ptr, ptr %33, align 8, !tbaa !11
  %35 = getelementptr inbounds %class.HEkk, ptr %34, i32 0, i32 14
  %36 = call noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #5
  store ptr %36, ptr %6, align 8, !tbaa !5
  %37 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 3
  %38 = call noundef ptr @_ZNSt6vectorIcSaIcEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %37) #5
  %39 = load i32, ptr %5, align 4, !tbaa !115
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !115
  %40 = call noundef ptr @_ZSt6fill_nIPciiET_S1_T0_RKT1_(ptr noundef %38, i32 noundef %39, ptr noundef nonnull align 4 dereferenceable(4) %7)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  %41 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  store i32 0, ptr %41, align 8, !tbaa !116
  %42 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 1
  store double 0.000000e+00, ptr %42, align 8, !tbaa !117
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !115
  br label %43

43:                                               ; preds = %68, %2
  %44 = load i32, ptr %8, align 4, !tbaa !115
  %45 = load i32, ptr %5, align 4, !tbaa !115
  %46 = icmp slt i32 %44, %45
  br i1 %46, label %48, label %47

47:                                               ; preds = %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  br label %71

48:                                               ; preds = %43
  %49 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 5
  %50 = load i32, ptr %8, align 4, !tbaa !115
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #5
  %53 = load double, ptr %52, align 8, !tbaa !9
  %54 = fcmp une double %53, 0.000000e+00
  br i1 %54, label %55, label %67

55:                                               ; preds = %48
  %56 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 3
  %57 = load i32, ptr %8, align 4, !tbaa !115
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58) #5
  store i8 1, ptr %59, align 1, !tbaa !118
  %60 = load i32, ptr %8, align 4, !tbaa !115
  %61 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 4
  %62 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %63 = load i32, ptr %62, align 8, !tbaa !116
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %62, align 8, !tbaa !116
  %65 = sext i32 %63 to i64
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %65) #5
  store i32 %60, ptr %66, align 4, !tbaa !115
  br label %67

67:                                               ; preds = %55, %48
  br label %68

68:                                               ; preds = %67
  %69 = load i32, ptr %8, align 4, !tbaa !115
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %8, align 4, !tbaa !115
  br label %43, !llvm.loop !119

71:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %72 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 0
  %73 = load ptr, ptr %72, align 8, !tbaa !11
  %74 = getelementptr inbounds %class.HEkk, ptr %73, i32 0, i32 13
  store ptr %74, ptr %9, align 8, !tbaa !5
  %75 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %76 = load i32, ptr %75, align 8, !tbaa !116
  %77 = sitofp i32 %76 to double
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %78 = load i32, ptr %5, align 4, !tbaa !115
  %79 = sitofp i32 %78 to double
  %80 = fmul double %79, 1.000000e-02
  store double %80, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  store double 5.000000e+02, ptr %11, align 8, !tbaa !9
  %81 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %10, ptr noundef nonnull align 8 dereferenceable(8) %11)
  %82 = load double, ptr %81, align 8, !tbaa !9
  %83 = fcmp ogt double %77, %82
  br i1 %83, label %84, label %87

84:                                               ; preds = %71
  %85 = load double, ptr %4, align 8, !tbaa !9
  %86 = fcmp olt double %85, 5.000000e-02
  br label %87

87:                                               ; preds = %84, %71
  %88 = phi i1 [ false, %71 ], [ %86, %84 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  br i1 %88, label %89, label %260

89:                                               ; preds = %87
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  %90 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %91 = load i32, ptr %90, align 8, !tbaa !116
  %92 = sitofp i32 %91 to double
  %93 = fmul double %92, 1.000000e-03
  store double %93, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #5
  store double 5.000000e+02, ptr %14, align 8, !tbaa !9
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %13, ptr noundef nonnull align 8 dereferenceable(8) %14)
  %95 = load double, ptr %94, align 8, !tbaa !9
  %96 = fptosi double %95 to i32
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  store i32 %96, ptr %12, align 4, !tbaa !115
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  store double 0.000000e+00, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store i32 0, ptr %16, align 4, !tbaa !115
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  store i32 0, ptr %17, align 4, !tbaa !115
  br label %97

97:                                               ; preds = %135, %89
  %98 = load i32, ptr %16, align 4, !tbaa !115
  %99 = load i32, ptr %5, align 4, !tbaa !115
  %100 = icmp slt i32 %98, %99
  br i1 %100, label %102, label %101

101:                                              ; preds = %97
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  br label %138

102:                                              ; preds = %97
  %103 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 3
  %104 = load i32, ptr %16, align 4, !tbaa !115
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %103, i64 noundef %105) #5
  %107 = load i8, ptr %106, align 1, !tbaa !118
  %108 = icmp ne i8 %107, 0
  br i1 %108, label %109, label %134

109:                                              ; preds = %102
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #5
  %110 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 5
  %111 = load i32, ptr %16, align 4, !tbaa !115
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %112) #5
  %114 = load double, ptr %113, align 8, !tbaa !9
  %115 = load ptr, ptr %9, align 8, !tbaa !5
  %116 = load i32, ptr %16, align 4, !tbaa !115
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %117) #5
  %119 = load double, ptr %118, align 8, !tbaa !9
  %120 = fdiv double %114, %119
  store double %120, ptr %18, align 8, !tbaa !9
  %121 = load double, ptr %15, align 8, !tbaa !9
  %122 = load double, ptr %18, align 8, !tbaa !9
  %123 = fcmp olt double %121, %122
  br i1 %123, label %124, label %126

124:                                              ; preds = %109
  %125 = load double, ptr %18, align 8, !tbaa !9
  store double %125, ptr %15, align 8, !tbaa !9
  br label %126

126:                                              ; preds = %124, %109
  %127 = load double, ptr %18, align 8, !tbaa !9
  %128 = fneg double %127
  %129 = load ptr, ptr %6, align 8, !tbaa !5
  %130 = load i32, ptr %17, align 4, !tbaa !115
  %131 = add nsw i32 %130, 1
  store i32 %131, ptr %17, align 4, !tbaa !115
  %132 = sext i32 %130 to i64
  %133 = getelementptr inbounds double, ptr %129, i64 %132
  store double %128, ptr %133, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #5
  br label %134

134:                                              ; preds = %126, %102
  br label %135

135:                                              ; preds = %134
  %136 = load i32, ptr %16, align 4, !tbaa !115
  %137 = add nsw i32 %136, 1
  store i32 %137, ptr %16, align 4, !tbaa !115
  br label %97, !llvm.loop !121

138:                                              ; preds = %101
  %139 = load ptr, ptr %6, align 8, !tbaa !5
  %140 = load ptr, ptr %6, align 8, !tbaa !5
  %141 = load i32, ptr %12, align 4, !tbaa !115
  %142 = sext i32 %141 to i64
  %143 = getelementptr inbounds double, ptr %140, i64 %142
  %144 = load ptr, ptr %6, align 8, !tbaa !5
  %145 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %146 = load i32, ptr %145, align 8, !tbaa !116
  %147 = sext i32 %146 to i64
  %148 = getelementptr inbounds double, ptr %144, i64 %147
  call void @_ZSt11nth_elementIPdEvT_S1_S1_(ptr noundef %139, ptr noundef %143, ptr noundef %148)
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #5
  %149 = load ptr, ptr %6, align 8, !tbaa !5
  %150 = load i32, ptr %12, align 4, !tbaa !115
  %151 = sext i32 %150 to i64
  %152 = getelementptr inbounds double, ptr %149, i64 %151
  %153 = load double, ptr %152, align 8, !tbaa !9
  %154 = fneg double %153
  store double %154, ptr %19, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #5
  %155 = load double, ptr %15, align 8, !tbaa !9
  %156 = fmul double %155, 9.999900e-01
  store double %156, ptr %20, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  %157 = load double, ptr %19, align 8, !tbaa !9
  %158 = fmul double %157, 1.000010e+00
  store double %158, ptr %21, align 8, !tbaa !9
  %159 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %20, ptr noundef nonnull align 8 dereferenceable(8) %21)
  %160 = load double, ptr %159, align 8, !tbaa !9
  %161 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 1
  store double %160, ptr %161, align 8, !tbaa !117
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #5
  %162 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 3
  %163 = call noundef ptr @_ZNSt6vectorIcSaIcEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %162) #5
  %164 = load i32, ptr %5, align 4, !tbaa !115
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #5
  store i32 0, ptr %22, align 4, !tbaa !115
  %165 = call noundef ptr @_ZSt6fill_nIPciiET_S1_T0_RKT1_(ptr noundef %163, i32 noundef %164, ptr noundef nonnull align 4 dereferenceable(4) %22)
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #5
  %166 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  store i32 0, ptr %166, align 8, !tbaa !116
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #5
  store i32 0, ptr %23, align 4, !tbaa !115
  br label %167

167:                                              ; preds = %200, %138
  %168 = load i32, ptr %23, align 4, !tbaa !115
  %169 = load i32, ptr %5, align 4, !tbaa !115
  %170 = icmp slt i32 %168, %169
  br i1 %170, label %172, label %171

171:                                              ; preds = %167
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #5
  br label %203

172:                                              ; preds = %167
  %173 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 5
  %174 = load i32, ptr %23, align 4, !tbaa !115
  %175 = sext i32 %174 to i64
  %176 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %173, i64 noundef %175) #5
  %177 = load double, ptr %176, align 8, !tbaa !9
  %178 = load ptr, ptr %9, align 8, !tbaa !5
  %179 = load i32, ptr %23, align 4, !tbaa !115
  %180 = sext i32 %179 to i64
  %181 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %178, i64 noundef %180) #5
  %182 = load double, ptr %181, align 8, !tbaa !9
  %183 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 1
  %184 = load double, ptr %183, align 8, !tbaa !117
  %185 = fmul double %182, %184
  %186 = fcmp oge double %177, %185
  br i1 %186, label %187, label %199

187:                                              ; preds = %172
  %188 = load i32, ptr %23, align 4, !tbaa !115
  %189 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 4
  %190 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %191 = load i32, ptr %190, align 8, !tbaa !116
  %192 = add nsw i32 %191, 1
  store i32 %192, ptr %190, align 8, !tbaa !116
  %193 = sext i32 %191 to i64
  %194 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %189, i64 noundef %193) #5
  store i32 %188, ptr %194, align 4, !tbaa !115
  %195 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 3
  %196 = load i32, ptr %23, align 4, !tbaa !115
  %197 = sext i32 %196 to i64
  %198 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %195, i64 noundef %197) #5
  store i8 1, ptr %198, align 1, !tbaa !118
  br label %199

199:                                              ; preds = %187, %172
  br label %200

200:                                              ; preds = %199
  %201 = load i32, ptr %23, align 4, !tbaa !115
  %202 = add nsw i32 %201, 1
  store i32 %202, ptr %23, align 4, !tbaa !115
  br label %167, !llvm.loop !122

203:                                              ; preds = %171
  %204 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %205 = load i32, ptr %204, align 8, !tbaa !116
  %206 = sitofp i32 %205 to double
  %207 = load i32, ptr %12, align 4, !tbaa !115
  %208 = sitofp i32 %207 to double
  %209 = fmul double %208, 1.500000e+00
  %210 = fcmp ogt double %206, %209
  br i1 %210, label %211, label %259

211:                                              ; preds = %203
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #5
  %212 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %213 = load i32, ptr %212, align 8, !tbaa !116
  store i32 %213, ptr %24, align 4, !tbaa !115
  %214 = load i32, ptr %12, align 4, !tbaa !115
  %215 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  store i32 %214, ptr %215, align 8, !tbaa !116
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #5
  %216 = load i32, ptr %12, align 4, !tbaa !115
  store i32 %216, ptr %25, align 4, !tbaa !115
  br label %217

217:                                              ; preds = %255, %211
  %218 = load i32, ptr %25, align 4, !tbaa !115
  %219 = load i32, ptr %24, align 4, !tbaa !115
  %220 = icmp slt i32 %218, %219
  br i1 %220, label %222, label %221

221:                                              ; preds = %217
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #5
  br label %258

222:                                              ; preds = %217
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #5
  %223 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 4
  %224 = load i32, ptr %25, align 4, !tbaa !115
  %225 = sext i32 %224 to i64
  %226 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %223, i64 noundef %225) #5
  %227 = load i32, ptr %226, align 4, !tbaa !115
  store i32 %227, ptr %26, align 4, !tbaa !115
  %228 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 5
  %229 = load i32, ptr %26, align 4, !tbaa !115
  %230 = sext i32 %229 to i64
  %231 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %228, i64 noundef %230) #5
  %232 = load double, ptr %231, align 8, !tbaa !9
  %233 = load ptr, ptr %9, align 8, !tbaa !5
  %234 = load i32, ptr %26, align 4, !tbaa !115
  %235 = sext i32 %234 to i64
  %236 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %233, i64 noundef %235) #5
  %237 = load double, ptr %236, align 8, !tbaa !9
  %238 = load double, ptr %19, align 8, !tbaa !9
  %239 = fmul double %237, %238
  %240 = fcmp ogt double %232, %239
  br i1 %240, label %241, label %249

241:                                              ; preds = %222
  %242 = load i32, ptr %26, align 4, !tbaa !115
  %243 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 4
  %244 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %245 = load i32, ptr %244, align 8, !tbaa !116
  %246 = add nsw i32 %245, 1
  store i32 %246, ptr %244, align 8, !tbaa !116
  %247 = sext i32 %245 to i64
  %248 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %243, i64 noundef %247) #5
  store i32 %242, ptr %248, align 4, !tbaa !115
  br label %254

249:                                              ; preds = %222
  %250 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 3
  %251 = load i32, ptr %26, align 4, !tbaa !115
  %252 = sext i32 %251 to i64
  %253 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %250, i64 noundef %252) #5
  store i8 0, ptr %253, align 1, !tbaa !118
  br label %254

254:                                              ; preds = %249, %241
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #5
  br label %255

255:                                              ; preds = %254
  %256 = load i32, ptr %25, align 4, !tbaa !115
  %257 = add nsw i32 %256, 1
  store i32 %257, ptr %25, align 4, !tbaa !115
  br label %217, !llvm.loop !123

258:                                              ; preds = %221
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #5
  br label %259

259:                                              ; preds = %258, %203
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %260

260:                                              ; preds = %259, %87
  %261 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  %262 = load i32, ptr %261, align 8, !tbaa !116
  %263 = sitofp i32 %262 to double
  %264 = load i32, ptr %5, align 4, !tbaa !115
  %265 = sitofp i32 %264 to double
  %266 = fmul double 2.000000e-01, %265
  %267 = fcmp ogt double %263, %266
  br i1 %267, label %268, label %273

268:                                              ; preds = %260
  %269 = load i32, ptr %5, align 4, !tbaa !115
  %270 = sub nsw i32 0, %269
  %271 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 2
  store i32 %270, ptr %271, align 8, !tbaa !116
  %272 = getelementptr inbounds %class.HEkkDualRHS, ptr %27, i32 0, i32 1
  store double 0.000000e+00, ptr %272, align 8, !tbaa !117
  br label %273

273:                                              ; preds = %268, %260
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZSt6fill_nIPciiET_S1_T0_RKT1_(ptr noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIcSaIcEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt11nth_elementIPdEvT_S1_S1_(ptr noundef, ptr noundef, ptr noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"_ZTS11HEkkDualRHS", !6, i64 0, !10, i64 8, !13, i64 16, !14, i64 24, !18, i64 48, !22, i64 72, !13, i64 96, !13, i64 100, !13, i64 104, !13, i64 108, !13, i64 112, !18, i64 120, !6, i64 144}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTSSt6vectorIcSaIcEE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSSt6vectorIiSaIiEE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIdSaIdEE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!27, !13, i64 8604}
!27 = !{!"_ZTS4HEkk", !6, i64 0, !6, i64 8, !6, i64 16, !28, i64 24, !52, i64 8600, !33, i64 9520, !72, i64 9552, !73, i64 9568, !79, i64 10608, !74, i64 10616, !80, i64 10736, !93, i64 10776, !22, i64 10784, !22, i64 10808, !39, i64 10832, !53, i64 10840, !53, i64 10952, !94, i64 11064, !107, i64 13928, !10, i64 14048, !10, i64 14056, !10, i64 14064, !13, i64 14072, !13, i64 14076, !13, i64 14080, !13, i64 14084, !39, i64 14088, !39, i64 14089, !108, i64 14092, !13, i64 14096, !13, i64 14100, !18, i64 14104, !22, i64 14128, !109, i64 14152, !109, i64 14184, !13, i64 14216, !13, i64 14220, !13, i64 14224, !10, i64 14232, !22, i64 14240, !22, i64 14264, !22, i64 14288, !22, i64 14312, !22, i64 14336, !18, i64 14360, !18, i64 14384, !10, i64 14408, !10, i64 14416, !10, i64 14424, !13, i64 14432, !13, i64 14436, !39, i64 14440, !13, i64 14444, !39, i64 14448, !39, i64 14449, !39, i64 14450, !39, i64 14451, !10, i64 14456, !110, i64 14464, !22, i64 14488, !114, i64 14512}
!28 = !{!"_ZTS20HighsSimplexAnalysis", !6, i64 0, !29, i64 8, !29, i64 32, !6, i64 56, !13, i64 64, !13, i64 68, !13, i64 72, !33, i64 80, !33, i64 112, !36, i64 144, !39, i64 240, !39, i64 241, !39, i64 242, !39, i64 243, !39, i64 244, !39, i64 245, !39, i64 246, !13, i64 248, !40, i64 252, !13, i64 256, !13, i64 260, !13, i64 264, !13, i64 268, !13, i64 272, !13, i64 276, !13, i64 280, !33, i64 288, !10, i64 320, !10, i64 328, !10, i64 336, !10, i64 344, !10, i64 352, !10, i64 360, !10, i64 368, !10, i64 376, !10, i64 384, !10, i64 392, !10, i64 400, !10, i64 408, !13, i64 416, !13, i64 420, !10, i64 424, !10, i64 432, !13, i64 440, !10, i64 448, !10, i64 456, !13, i64 464, !10, i64 472, !10, i64 480, !10, i64 488, !10, i64 496, !10, i64 504, !10, i64 512, !10, i64 520, !10, i64 528, !10, i64 536, !10, i64 544, !13, i64 552, !10, i64 560, !13, i64 568, !13, i64 572, !13, i64 576, !13, i64 580, !13, i64 584, !13, i64 588, !13, i64 592, !13, i64 596, !13, i64 600, !41, i64 608, !41, i64 760, !41, i64 912, !41, i64 1064, !41, i64 1216, !41, i64 1368, !41, i64 1520, !41, i64 1672, !41, i64 1824, !41, i64 1976, !13, i64 2128, !13, i64 2132, !13, i64 2136, !13, i64 2140, !10, i64 2144, !10, i64 2152, !13, i64 2160, !13, i64 2164, !13, i64 2168, !13, i64 2172, !13, i64 2176, !10, i64 2184, !10, i64 2192, !13, i64 2200, !10, i64 2208, !10, i64 2216, !13, i64 2224, !13, i64 2228, !10, i64 2232, !10, i64 2240, !22, i64 2248, !22, i64 2272, !22, i64 2296, !22, i64 2320, !42, i64 2344, !46, i64 2368, !13, i64 2376, !13, i64 2380, !13, i64 2384, !13, i64 2388, !10, i64 2392, !10, i64 2400, !10, i64 2408, !10, i64 2416, !10, i64 2424, !10, i64 2432, !10, i64 2440, !10, i64 2448, !10, i64 2456, !10, i64 2464, !13, i64 2472, !13, i64 2476, !10, i64 2480, !10, i64 2488, !10, i64 2496, !39, i64 2504, !10, i64 2512, !10, i64 2520, !13, i64 2528, !13, i64 2532, !13, i64 2536, !13, i64 2540, !13, i64 2544, !10, i64 2552, !10, i64 2560, !10, i64 2568, !10, i64 2576, !10, i64 2584, !10, i64 2592, !10, i64 2600, !10, i64 2608, !10, i64 2616, !13, i64 2624, !13, i64 2628, !7, i64 2632, !13, i64 4952, !13, i64 4956, !7, i64 4960, !7, i64 7600, !7, i64 7648, !41, i64 7664, !41, i64 7816, !41, i64 7968, !41, i64 8120, !41, i64 8272, !41, i64 8424}
!29 = !{!"_ZTSSt6vectorI15HighsTimerClockSaIS0_EE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseI15HighsTimerClockSaIS0_EE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !34, i64 0, !35, i64 8, !7, i64 16}
!34 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!35 = !{!"long", !7, i64 0}
!36 = !{!"_ZTS15HighsLogOptions", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !37, i64 48, !6, i64 80, !39, i64 88}
!37 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !38, i64 0, !6, i64 24}
!38 = !{!"_ZTSSt14_Function_base", !7, i64 0, !6, i64 16}
!39 = !{!"bool", !7, i64 0}
!40 = !{!"_ZTS14EdgeWeightMode", !7, i64 0}
!41 = !{!"_ZTS22HighsValueDistribution", !33, i64 0, !33, i64 32, !13, i64 64, !13, i64 68, !13, i64 72, !10, i64 80, !10, i64 88, !22, i64 96, !18, i64 120, !13, i64 144}
!42 = !{!"_ZTSSt6vectorI17TranStageAnalysisSaIS0_EE", !43, i64 0}
!43 = !{!"_ZTSSt12_Vector_baseI17TranStageAnalysisSaIS0_EE", !44, i64 0}
!44 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE12_Vector_implE", !45, i64 0}
!45 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!46 = !{!"_ZTSSt10unique_ptrINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !47, i64 0}
!47 = !{!"_ZTSSt15__uniq_ptr_dataINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_ELb1ELb1EE", !48, i64 0}
!48 = !{!"_ZTSSt15__uniq_ptr_implINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !49, i64 0}
!49 = !{!"_ZTSSt5tupleIJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !50, i64 0}
!50 = !{!"_ZTSSt11_Tuple_implILm0EJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !51, i64 0}
!51 = !{!"_ZTSSt10_Head_baseILm0EPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEELb0EE", !6, i64 0}
!52 = !{!"_ZTS7HighsLp", !13, i64 0, !13, i64 4, !22, i64 8, !22, i64 32, !22, i64 56, !22, i64 80, !22, i64 104, !53, i64 128, !55, i64 240, !10, i64 248, !33, i64 256, !33, i64 288, !13, i64 320, !13, i64 324, !56, i64 328, !56, i64 352, !60, i64 376, !64, i64 400, !64, i64 456, !13, i64 512, !13, i64 516, !70, i64 520, !39, i64 592, !39, i64 593, !13, i64 596, !39, i64 600, !71, i64 608}
!53 = !{!"_ZTS17HighsSparseMatrix", !54, i64 0, !13, i64 4, !13, i64 8, !18, i64 16, !18, i64 40, !18, i64 64, !22, i64 88}
!54 = !{!"_ZTS12MatrixFormat", !7, i64 0}
!55 = !{!"_ZTS8ObjSense", !7, i64 0}
!56 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !57, i64 0}
!57 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !58, i64 0}
!58 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !59, i64 0}
!59 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!60 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !61, i64 0}
!61 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !62, i64 0}
!62 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !63, i64 0}
!63 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!64 = !{!"_ZTS13HighsNameHash", !65, i64 0}
!65 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !66, i64 0}
!66 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !6, i64 0, !35, i64 8, !67, i64 16, !35, i64 24, !68, i64 32, !6, i64 48}
!67 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !6, i64 0}
!68 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !69, i64 0, !35, i64 8}
!69 = !{!"float", !7, i64 0}
!70 = !{!"_ZTS10HighsScale", !13, i64 0, !39, i64 4, !13, i64 8, !13, i64 12, !10, i64 16, !22, i64 24, !22, i64 48}
!71 = !{!"_ZTS11HighsLpMods", !18, i64 0, !18, i64 24, !22, i64 48, !22, i64 72, !60, i64 96, !18, i64 120, !22, i64 144, !18, i64 168, !22, i64 192, !18, i64 216, !22, i64 240, !22, i64 264, !22, i64 288}
!72 = !{!"_ZTS18HighsSimplexStatus", !39, i64 0, !39, i64 1, !39, i64 2, !39, i64 3, !39, i64 4, !39, i64 5, !39, i64 6, !39, i64 7, !39, i64 8, !39, i64 9, !39, i64 10, !39, i64 11, !39, i64 12}
!73 = !{!"_ZTS16HighsSimplexInfo", !22, i64 0, !22, i64 24, !22, i64 48, !22, i64 72, !22, i64 96, !22, i64 120, !22, i64 144, !22, i64 168, !22, i64 192, !22, i64 216, !22, i64 240, !22, i64 264, !22, i64 288, !18, i64 312, !18, i64 336, !18, i64 360, !18, i64 384, !22, i64 408, !13, i64 432, !13, i64 436, !39, i64 440, !39, i64 441, !74, i64 448, !13, i64 568, !13, i64 572, !13, i64 576, !22, i64 584, !22, i64 608, !22, i64 632, !22, i64 656, !13, i64 680, !13, i64 684, !13, i64 688, !13, i64 692, !10, i64 696, !10, i64 704, !10, i64 712, !10, i64 720, !13, i64 728, !13, i64 732, !10, i64 736, !10, i64 744, !10, i64 752, !10, i64 760, !10, i64 768, !10, i64 776, !10, i64 784, !10, i64 792, !10, i64 800, !10, i64 808, !39, i64 816, !10, i64 824, !10, i64 832, !13, i64 840, !10, i64 848, !10, i64 856, !10, i64 864, !39, i64 872, !39, i64 873, !39, i64 874, !39, i64 875, !39, i64 876, !39, i64 877, !39, i64 878, !39, i64 879, !39, i64 880, !39, i64 881, !39, i64 882, !39, i64 883, !39, i64 884, !39, i64 885, !39, i64 886, !13, i64 888, !10, i64 896, !10, i64 904, !13, i64 912, !10, i64 920, !10, i64 928, !13, i64 936, !13, i64 940, !13, i64 944, !13, i64 948, !13, i64 952, !13, i64 956, !13, i64 960, !13, i64 964, !13, i64 968, !13, i64 972, !13, i64 976, !13, i64 980, !13, i64 984, !13, i64 988, !13, i64 992, !13, i64 996, !10, i64 1000, !10, i64 1008, !10, i64 1016, !10, i64 1024, !13, i64 1032}
!74 = !{!"_ZTS12SimplexBasis", !18, i64 0, !75, i64 24, !75, i64 48, !35, i64 72, !13, i64 80, !13, i64 84, !33, i64 88}
!75 = !{!"_ZTSSt6vectorIaSaIaEE", !76, i64 0}
!76 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !77, i64 0}
!77 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !78, i64 0}
!78 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!79 = !{!"_ZTS16HighsModelStatus", !7, i64 0}
!80 = !{!"_ZTS14HighsHashTableImvE", !81, i64 0, !87, i64 8, !35, i64 16, !35, i64 24, !35, i64 32}
!81 = !{!"_ZTSSt10unique_ptrI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !82, i64 0}
!82 = !{!"_ZTSSt15__uniq_ptr_dataI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterELb1ELb1EE", !83, i64 0}
!83 = !{!"_ZTSSt15__uniq_ptr_implI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !84, i64 0}
!84 = !{!"_ZTSSt5tupleIJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !85, i64 0}
!85 = !{!"_ZTSSt11_Tuple_implILm0EJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !86, i64 0}
!86 = !{!"_ZTSSt10_Head_baseILm0EP19HighsHashTableEntryImvELb0EE", !6, i64 0}
!87 = !{!"_ZTSSt10unique_ptrIA_hSt14default_deleteIS0_EE", !88, i64 0}
!88 = !{!"_ZTSSt15__uniq_ptr_dataIhSt14default_deleteIA_hELb1ELb1EE", !89, i64 0}
!89 = !{!"_ZTSSt15__uniq_ptr_implIhSt14default_deleteIA_hEE", !90, i64 0}
!90 = !{!"_ZTSSt5tupleIJPhSt14default_deleteIA_hEEE", !91, i64 0}
!91 = !{!"_ZTSSt11_Tuple_implILm0EJPhSt14default_deleteIA_hEEE", !92, i64 0}
!92 = !{!"_ZTSSt10_Head_baseILm0EPhLb0EE", !6, i64 0}
!93 = !{!"_ZTS11HighsRandom", !35, i64 0}
!94 = !{!"_ZTS11HSimplexNla", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !95, i64 48, !39, i64 1960, !10, i64 1968, !104, i64 1976, !105, i64 2112}
!95 = !{!"_ZTS7HFactor", !10, i64 0, !10, i64 8, !13, i64 16, !18, i64 24, !18, i64 48, !18, i64 72, !96, i64 96, !13, i64 184, !13, i64 188, !13, i64 192, !13, i64 196, !13, i64 200, !13, i64 204, !13, i64 208, !10, i64 216, !39, i64 224, !6, i64 232, !6, i64 240, !6, i64 248, !6, i64 256, !10, i64 264, !10, i64 272, !13, i64 280, !10, i64 288, !97, i64 296, !36, i64 304, !39, i64 400, !39, i64 401, !13, i64 404, !13, i64 408, !6, i64 416, !13, i64 424, !18, i64 432, !22, i64 456, !18, i64 480, !18, i64 504, !18, i64 528, !22, i64 552, !18, i64 576, !18, i64 600, !18, i64 624, !18, i64 648, !18, i64 672, !18, i64 696, !18, i64 720, !22, i64 744, !22, i64 768, !18, i64 792, !18, i64 816, !18, i64 840, !18, i64 864, !18, i64 888, !18, i64 912, !14, i64 936, !22, i64 960, !18, i64 984, !18, i64 1008, !18, i64 1032, !18, i64 1056, !18, i64 1080, !18, i64 1104, !18, i64 1128, !18, i64 1152, !18, i64 1176, !18, i64 1200, !22, i64 1224, !18, i64 1248, !18, i64 1272, !22, i64 1296, !18, i64 1320, !18, i64 1344, !22, i64 1368, !13, i64 1392, !13, i64 1396, !18, i64 1400, !18, i64 1424, !18, i64 1448, !22, i64 1472, !18, i64 1496, !18, i64 1520, !18, i64 1544, !18, i64 1568, !22, i64 1592, !22, i64 1616, !18, i64 1640, !18, i64 1664, !18, i64 1688, !22, i64 1712, !103, i64 1736}
!96 = !{!"_ZTS12RefactorInfo", !39, i64 0, !18, i64 8, !18, i64 32, !75, i64 56, !10, i64 80}
!97 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !98, i64 0}
!98 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !99, i64 0}
!99 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !100, i64 0}
!100 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !101, i64 0}
!101 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !102, i64 0}
!102 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !6, i64 0}
!103 = !{!"_ZTS11HVectorBaseIdE", !13, i64 0, !13, i64 4, !18, i64 8, !22, i64 32, !10, i64 56, !14, i64 64, !18, i64 88, !6, i64 112, !39, i64 120, !13, i64 124, !18, i64 128, !22, i64 152}
!104 = !{!"_ZTS17ProductFormUpdate", !39, i64 0, !13, i64 4, !13, i64 8, !18, i64 16, !22, i64 40, !18, i64 64, !18, i64 88, !22, i64 112}
!105 = !{!"_ZTS14SimplexIterate", !39, i64 0, !74, i64 8, !106, i64 128, !22, i64 728}
!106 = !{!"_ZTS24InvertibleRepresentation", !18, i64 0, !18, i64 24, !18, i64 48, !18, i64 72, !22, i64 96, !18, i64 120, !18, i64 144, !22, i64 168, !18, i64 192, !18, i64 216, !22, i64 240, !18, i64 264, !18, i64 288, !18, i64 312, !22, i64 336, !18, i64 360, !18, i64 384, !18, i64 408, !18, i64 432, !22, i64 456, !18, i64 480, !18, i64 504, !22, i64 528, !18, i64 552, !22, i64 576}
!107 = !{!"_ZTS8HotStart", !39, i64 0, !96, i64 8, !75, i64 96}
!108 = !{!"_ZTS16SimplexAlgorithm", !7, i64 0}
!109 = !{!"_ZTS14HighsRayRecord", !13, i64 0, !13, i64 4, !22, i64 8}
!110 = !{!"_ZTSSt6vectorI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !111, i64 0}
!111 = !{!"_ZTSSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !112, i64 0}
!112 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE12_Vector_implE", !113, i64 0}
!113 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!114 = !{!"_ZTS17HighsSimplexStats", !39, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48}
!115 = !{!13, !13, i64 0}
!116 = !{!12, !13, i64 16}
!117 = !{!12, !10, i64 8}
!118 = !{!7, !7, i64 0}
!119 = distinct !{!119, !120}
!120 = !{!"llvm.loop.mustprogress"}
!121 = distinct !{!121, !120}
!122 = distinct !{!122, !120}
!123 = distinct !{!123, !120}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN11HEkkDualRHS16createInfeasListEd(ptr noundef nonnull align 8 dereferenceable(152) %0, double noundef %1) local_unnamed_addr #2 align 2 {
  %3 = alloca i32, align 4
  %4 = alloca double, align 8
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  %9 = alloca double, align 8
  %10 = alloca i32, align 4
  %11 = load ptr, ptr %0, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %11, i64 8604
  %13 = load i32, ptr %12, align 4, !tbaa !24
  %14 = getelementptr inbounds i8, ptr %11, i64 10808
  %15 = tail call noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #5
  %16 = getelementptr inbounds i8, ptr %0, i64 24
  %17 = tail call noundef ptr @_ZNSt6vectorIcSaIcEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  store i32 0, ptr %3, align 4, !tbaa !113
  %18 = call noundef ptr @_ZSt6fill_nIPciiET_S1_T0_RKT1_(ptr noundef %17, i32 noundef %13, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  %19 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 0, ptr %19, align 8, !tbaa !114
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  store double 0.000000e+00, ptr %20, align 8, !tbaa !115
  %21 = icmp sgt i32 %13, 0
  br i1 %21, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2
  %22 = getelementptr inbounds i8, ptr %0, i64 72
  %23 = getelementptr inbounds i8, ptr %0, i64 48
  %wide.trip.count = zext nneg i32 %13 to i64
  br label %35

._crit_edge.loopexit:                             ; preds = %46
  %.pre = load i32, ptr %19, align 8, !tbaa !114
  %24 = sitofp i32 %.pre to double
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %2
  %25 = phi double [ %24, %._crit_edge.loopexit ], [ 0.000000e+00, %2 ]
  %26 = load ptr, ptr %0, align 8, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %26, i64 10784
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  %28 = sitofp i32 %13 to double
  %29 = fmul double %28, 1.000000e-02
  store double %29, ptr %4, align 8, !tbaa !116
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  store double 5.000000e+02, ptr %5, align 8, !tbaa !116
  %30 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %31 = load double, ptr %30, align 8, !tbaa !116
  %32 = fcmp olt double %31, %25
  %33 = fcmp olt double %1, 5.000000e-02
  %34 = and i1 %33, %32
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  %.pre93 = load i32, ptr %19, align 8, !tbaa !114
  br i1 %34, label %47, label %.loopexit

35:                                               ; preds = %.lr.ph, %46
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %46 ]
  %36 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %indvars.iv) #5
  %37 = load double, ptr %36, align 8, !tbaa !116
  %38 = fcmp une double %37, 0.000000e+00
  br i1 %38, label %39, label %46

39:                                               ; preds = %35
  %40 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv) #5
  store i8 1, ptr %40, align 1, !tbaa !117
  %41 = load i32, ptr %19, align 8, !tbaa !114
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr %19, align 8, !tbaa !114
  %43 = sext i32 %41 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %43) #5
  %45 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %45, ptr %44, align 4, !tbaa !113
  br label %46

46:                                               ; preds = %35, %39
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %35, !llvm.loop !118

47:                                               ; preds = %._crit_edge
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #5
  %48 = sitofp i32 %.pre93 to double
  %49 = fmul double %48, 1.000000e-03
  store double %49, ptr %6, align 8, !tbaa !116
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #5
  store double 5.000000e+02, ptr %7, align 8, !tbaa !116
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %6, ptr noundef nonnull align 8 dereferenceable(8) %7)
  %51 = load double, ptr %50, align 8, !tbaa !116
  %52 = fptosi double %51 to i32
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #5
  br i1 %21, label %.lr.ph67, label %._crit_edge68

.lr.ph67:                                         ; preds = %47
  %53 = getelementptr inbounds i8, ptr %0, i64 72
  %wide.trip.count80 = zext nneg i32 %13 to i64
  br label %69

._crit_edge68.loopexit:                           ; preds = %83
  %54 = fmul double %.2, 9.999900e-01
  br label %._crit_edge68

._crit_edge68:                                    ; preds = %._crit_edge68.loopexit, %47
  %.055.lcssa = phi double [ 0.000000e+00, %47 ], [ %54, %._crit_edge68.loopexit ]
  %55 = sext i32 %52 to i64
  %56 = getelementptr inbounds double, ptr %15, i64 %55
  %57 = load i32, ptr %19, align 8, !tbaa !114
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds double, ptr %15, i64 %58
  call void @_ZSt11nth_elementIPdEvT_S1_S1_(ptr noundef %15, ptr noundef %56, ptr noundef %59)
  %60 = load double, ptr %56, align 8, !tbaa !116
  %61 = fneg double %60
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #5
  store double %.055.lcssa, ptr %8, align 8, !tbaa !116
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #5
  %62 = fmul double %60, -1.000010e+00
  store double %62, ptr %9, align 8, !tbaa !116
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull align 8 dereferenceable(8) %9)
  %64 = load double, ptr %63, align 8, !tbaa !116
  store double %64, ptr %20, align 8, !tbaa !115
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #5
  %65 = call noundef ptr @_ZNSt6vectorIcSaIcEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #5
  store i32 0, ptr %10, align 4, !tbaa !113
  %66 = call noundef ptr @_ZSt6fill_nIPciiET_S1_T0_RKT1_(ptr noundef %65, i32 noundef %13, ptr noundef nonnull align 4 dereferenceable(4) %10)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #5
  store i32 0, ptr %19, align 8, !tbaa !114
  br i1 %21, label %.lr.ph71, label %._crit_edge72

.lr.ph71:                                         ; preds = %._crit_edge68
  %67 = getelementptr inbounds i8, ptr %0, i64 72
  %68 = getelementptr inbounds i8, ptr %0, i64 48
  %wide.trip.count85 = zext nneg i32 %13 to i64
  br label %89

69:                                               ; preds = %.lr.ph67, %83
  %indvars.iv77 = phi i64 [ 0, %.lr.ph67 ], [ %indvars.iv.next78, %83 ]
  %.05565 = phi double [ 0.000000e+00, %.lr.ph67 ], [ %.2, %83 ]
  %.05863 = phi i32 [ 0, %.lr.ph67 ], [ %.159, %83 ]
  %70 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv77) #5
  %71 = load i8, ptr %70, align 1, !tbaa !117
  %.not = icmp eq i8 %71, 0
  br i1 %.not, label %83, label %72

72:                                               ; preds = %69
  %73 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %indvars.iv77) #5
  %74 = load double, ptr %73, align 8, !tbaa !116
  %75 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv77) #5
  %76 = load double, ptr %75, align 8, !tbaa !116
  %77 = fdiv double %74, %76
  %78 = fcmp olt double %.05565, %77
  %.1 = select i1 %78, double %77, double %.05565
  %79 = fneg double %77
  %80 = add nsw i32 %.05863, 1
  %81 = sext i32 %.05863 to i64
  %82 = getelementptr inbounds double, ptr %15, i64 %81
  store double %79, ptr %82, align 8, !tbaa !116
  br label %83

83:                                               ; preds = %69, %72
  %.159 = phi i32 [ %80, %72 ], [ %.05863, %69 ]
  %.2 = phi double [ %.1, %72 ], [ %.05565, %69 ]
  %indvars.iv.next78 = add nuw nsw i64 %indvars.iv77, 1
  %exitcond81.not = icmp eq i64 %indvars.iv.next78, %wide.trip.count80
  br i1 %exitcond81.not, label %._crit_edge68.loopexit, label %69, !llvm.loop !120

._crit_edge72.loopexit:                           ; preds = %104
  %.pre91 = load i32, ptr %19, align 8, !tbaa !114
  br label %._crit_edge72

._crit_edge72:                                    ; preds = %._crit_edge72.loopexit, %._crit_edge68
  %84 = phi i32 [ %.pre91, %._crit_edge72.loopexit ], [ 0, %._crit_edge68 ]
  %85 = sitofp i32 %84 to double
  %86 = sitofp i32 %52 to double
  %87 = fmul double %86, 1.500000e+00
  %88 = fcmp olt double %87, %85
  br i1 %88, label %105, label %.loopexit

89:                                               ; preds = %.lr.ph71, %104
  %indvars.iv82 = phi i64 [ 0, %.lr.ph71 ], [ %indvars.iv.next83, %104 ]
  %90 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %indvars.iv82) #5
  %91 = load double, ptr %90, align 8, !tbaa !116
  %92 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv82) #5
  %93 = load double, ptr %92, align 8, !tbaa !116
  %94 = load double, ptr %20, align 8, !tbaa !115
  %95 = fmul double %93, %94
  %96 = fcmp ult double %91, %95
  br i1 %96, label %104, label %97

97:                                               ; preds = %89
  %98 = load i32, ptr %19, align 8, !tbaa !114
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %19, align 8, !tbaa !114
  %100 = sext i32 %98 to i64
  %101 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %100) #5
  %102 = trunc nuw nsw i64 %indvars.iv82 to i32
  store i32 %102, ptr %101, align 4, !tbaa !113
  %103 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv82) #5
  store i8 1, ptr %103, align 1, !tbaa !117
  br label %104

104:                                              ; preds = %89, %97
  %indvars.iv.next83 = add nuw nsw i64 %indvars.iv82, 1
  %exitcond86.not = icmp eq i64 %indvars.iv.next83, %wide.trip.count85
  br i1 %exitcond86.not, label %._crit_edge72.loopexit, label %89, !llvm.loop !121

105:                                              ; preds = %._crit_edge72
  store i32 %52, ptr %19, align 8, !tbaa !114
  %106 = icmp sgt i32 %84, %52
  br i1 %106, label %.lr.ph75, label %.loopexit

.lr.ph75:                                         ; preds = %105
  %107 = getelementptr inbounds i8, ptr %0, i64 48
  %108 = getelementptr inbounds i8, ptr %0, i64 72
  br label %109

109:                                              ; preds = %.lr.ph75, %126
  %indvars.iv87 = phi i64 [ %55, %.lr.ph75 ], [ %indvars.iv.next88, %126 ]
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %indvars.iv87) #5
  %111 = load i32, ptr %110, align 4, !tbaa !113
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %108, i64 noundef %112) #5
  %114 = load double, ptr %113, align 8, !tbaa !116
  %115 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %112) #5
  %116 = load double, ptr %115, align 8, !tbaa !116
  %117 = fmul double %116, %61
  %118 = fcmp ogt double %114, %117
  br i1 %118, label %119, label %124

119:                                              ; preds = %109
  %120 = load i32, ptr %19, align 8, !tbaa !114
  %121 = add nsw i32 %120, 1
  store i32 %121, ptr %19, align 8, !tbaa !114
  %122 = sext i32 %120 to i64
  %123 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %122) #5
  store i32 %111, ptr %123, align 4, !tbaa !113
  br label %126

124:                                              ; preds = %109
  %125 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %112) #5
  store i8 0, ptr %125, align 1, !tbaa !117
  br label %126

126:                                              ; preds = %124, %119
  %indvars.iv.next88 = add nsw i64 %indvars.iv87, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next88 to i32
  %exitcond90.not = icmp eq i32 %84, %lftr.wideiv
  br i1 %exitcond90.not, label %.loopexit.loopexit, label %109, !llvm.loop !122

.loopexit.loopexit:                               ; preds = %126
  %.pre92 = load i32, ptr %19, align 8, !tbaa !114
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %105, %._crit_edge72, %._crit_edge
  %127 = phi i32 [ %.pre92, %.loopexit.loopexit ], [ %52, %105 ], [ %84, %._crit_edge72 ], [ %.pre93, %._crit_edge ]
  %128 = sitofp i32 %127 to double
  %129 = fmul double %28, 2.000000e-01
  %130 = fcmp olt double %129, %128
  br i1 %130, label %131, label %133

131:                                              ; preds = %.loopexit
  %132 = sub nsw i32 0, %13
  store i32 %132, ptr %19, align 8, !tbaa !114
  store double 0.000000e+00, ptr %20, align 8, !tbaa !115
  br label %133

133:                                              ; preds = %131, %.loopexit
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIdSaIdEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef ptr @_ZSt6fill_nIPciiET_S1_T0_RKT1_(ptr noundef, i32 noundef, ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIcSaIcEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_ZSt11nth_elementIPdEvT_S1_S1_(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIdERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS11HEkkDualRHS", !7, i64 0, !10, i64 8, !11, i64 16, !12, i64 24, !16, i64 48, !20, i64 72, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !16, i64 120, !7, i64 144}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"double", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!"_ZTSSt6vectorIcSaIcEE", !13, i64 0}
!13 = !{!"_ZTSSt12_Vector_baseIcSaIcEE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE12_Vector_implE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIcSaIcEE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!16 = !{!"_ZTSSt6vectorIiSaIiEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!20 = !{!"_ZTSSt6vectorIdSaIdEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!24 = !{!25, !11, i64 8604}
!25 = !{!"_ZTS4HEkk", !7, i64 0, !7, i64 8, !7, i64 16, !26, i64 24, !50, i64 8600, !31, i64 9520, !70, i64 9552, !71, i64 9568, !77, i64 10608, !72, i64 10616, !78, i64 10736, !91, i64 10776, !20, i64 10784, !20, i64 10808, !37, i64 10832, !51, i64 10840, !51, i64 10952, !92, i64 11064, !105, i64 13928, !10, i64 14048, !10, i64 14056, !10, i64 14064, !11, i64 14072, !11, i64 14076, !11, i64 14080, !11, i64 14084, !37, i64 14088, !37, i64 14089, !106, i64 14092, !11, i64 14096, !11, i64 14100, !16, i64 14104, !20, i64 14128, !107, i64 14152, !107, i64 14184, !11, i64 14216, !11, i64 14220, !11, i64 14224, !10, i64 14232, !20, i64 14240, !20, i64 14264, !20, i64 14288, !20, i64 14312, !20, i64 14336, !16, i64 14360, !16, i64 14384, !10, i64 14408, !10, i64 14416, !10, i64 14424, !11, i64 14432, !11, i64 14436, !37, i64 14440, !11, i64 14444, !37, i64 14448, !37, i64 14449, !37, i64 14450, !37, i64 14451, !10, i64 14456, !108, i64 14464, !20, i64 14488, !112, i64 14512}
!26 = !{!"_ZTS20HighsSimplexAnalysis", !7, i64 0, !27, i64 8, !27, i64 32, !7, i64 56, !11, i64 64, !11, i64 68, !11, i64 72, !31, i64 80, !31, i64 112, !34, i64 144, !37, i64 240, !37, i64 241, !37, i64 242, !37, i64 243, !37, i64 244, !37, i64 245, !37, i64 246, !11, i64 248, !38, i64 252, !11, i64 256, !11, i64 260, !11, i64 264, !11, i64 268, !11, i64 272, !11, i64 276, !11, i64 280, !31, i64 288, !10, i64 320, !10, i64 328, !10, i64 336, !10, i64 344, !10, i64 352, !10, i64 360, !10, i64 368, !10, i64 376, !10, i64 384, !10, i64 392, !10, i64 400, !10, i64 408, !11, i64 416, !11, i64 420, !10, i64 424, !10, i64 432, !11, i64 440, !10, i64 448, !10, i64 456, !11, i64 464, !10, i64 472, !10, i64 480, !10, i64 488, !10, i64 496, !10, i64 504, !10, i64 512, !10, i64 520, !10, i64 528, !10, i64 536, !10, i64 544, !11, i64 552, !10, i64 560, !11, i64 568, !11, i64 572, !11, i64 576, !11, i64 580, !11, i64 584, !11, i64 588, !11, i64 592, !11, i64 596, !11, i64 600, !39, i64 608, !39, i64 760, !39, i64 912, !39, i64 1064, !39, i64 1216, !39, i64 1368, !39, i64 1520, !39, i64 1672, !39, i64 1824, !39, i64 1976, !11, i64 2128, !11, i64 2132, !11, i64 2136, !11, i64 2140, !10, i64 2144, !10, i64 2152, !11, i64 2160, !11, i64 2164, !11, i64 2168, !11, i64 2172, !11, i64 2176, !10, i64 2184, !10, i64 2192, !11, i64 2200, !10, i64 2208, !10, i64 2216, !11, i64 2224, !11, i64 2228, !10, i64 2232, !10, i64 2240, !20, i64 2248, !20, i64 2272, !20, i64 2296, !20, i64 2320, !40, i64 2344, !44, i64 2368, !11, i64 2376, !11, i64 2380, !11, i64 2384, !11, i64 2388, !10, i64 2392, !10, i64 2400, !10, i64 2408, !10, i64 2416, !10, i64 2424, !10, i64 2432, !10, i64 2440, !10, i64 2448, !10, i64 2456, !10, i64 2464, !11, i64 2472, !11, i64 2476, !10, i64 2480, !10, i64 2488, !10, i64 2496, !37, i64 2504, !10, i64 2512, !10, i64 2520, !11, i64 2528, !11, i64 2532, !11, i64 2536, !11, i64 2540, !11, i64 2544, !10, i64 2552, !10, i64 2560, !10, i64 2568, !10, i64 2576, !10, i64 2584, !10, i64 2592, !10, i64 2600, !10, i64 2608, !10, i64 2616, !11, i64 2624, !11, i64 2628, !8, i64 2632, !11, i64 4952, !11, i64 4956, !8, i64 4960, !8, i64 7600, !8, i64 7648, !39, i64 7664, !39, i64 7816, !39, i64 7968, !39, i64 8120, !39, i64 8272, !39, i64 8424}
!27 = !{!"_ZTSSt6vectorI15HighsTimerClockSaIS0_EE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseI15HighsTimerClockSaIS0_EE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseI15HighsTimerClockSaIS0_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!31 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !32, i64 0, !33, i64 8, !8, i64 16}
!32 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !7, i64 0}
!33 = !{!"long", !8, i64 0}
!34 = !{!"_ZTS15HighsLogOptions", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !35, i64 48, !7, i64 80, !37, i64 88}
!35 = !{!"_ZTSSt8functionIFviRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEPK20HighsCallbackDataOutP19HighsCallbackDataInPvEE", !36, i64 0, !7, i64 24}
!36 = !{!"_ZTSSt14_Function_base", !8, i64 0, !7, i64 16}
!37 = !{!"bool", !8, i64 0}
!38 = !{!"_ZTS14EdgeWeightMode", !8, i64 0}
!39 = !{!"_ZTS22HighsValueDistribution", !31, i64 0, !31, i64 32, !11, i64 64, !11, i64 68, !11, i64 72, !10, i64 80, !10, i64 88, !20, i64 96, !16, i64 120, !11, i64 144}
!40 = !{!"_ZTSSt6vectorI17TranStageAnalysisSaIS0_EE", !41, i64 0}
!41 = !{!"_ZTSSt12_Vector_baseI17TranStageAnalysisSaIS0_EE", !42, i64 0}
!42 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE12_Vector_implE", !43, i64 0}
!43 = !{!"_ZTSNSt12_Vector_baseI17TranStageAnalysisSaIS0_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!44 = !{!"_ZTSSt10unique_ptrINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !45, i64 0}
!45 = !{!"_ZTSSt15__uniq_ptr_dataINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_ELb1ELb1EE", !46, i64 0}
!46 = !{!"_ZTSSt15__uniq_ptr_implINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EE", !47, i64 0}
!47 = !{!"_ZTSSt5tupleIJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !48, i64 0}
!48 = !{!"_ZTSSt11_Tuple_implILm0EJPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEESt14default_deleteIS5_EEE", !49, i64 0}
!49 = !{!"_ZTSSt10_Head_baseILm0EPNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEELb0EE", !7, i64 0}
!50 = !{!"_ZTS7HighsLp", !11, i64 0, !11, i64 4, !20, i64 8, !20, i64 32, !20, i64 56, !20, i64 80, !20, i64 104, !51, i64 128, !53, i64 240, !10, i64 248, !31, i64 256, !31, i64 288, !11, i64 320, !11, i64 324, !54, i64 328, !54, i64 352, !58, i64 376, !62, i64 400, !62, i64 456, !11, i64 512, !11, i64 516, !68, i64 520, !37, i64 592, !37, i64 593, !11, i64 596, !37, i64 600, !69, i64 608}
!51 = !{!"_ZTS17HighsSparseMatrix", !52, i64 0, !11, i64 4, !11, i64 8, !16, i64 16, !16, i64 40, !16, i64 64, !20, i64 88}
!52 = !{!"_ZTS12MatrixFormat", !8, i64 0}
!53 = !{!"_ZTS8ObjSense", !8, i64 0}
!54 = !{!"_ZTSSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !55, i64 0}
!55 = !{!"_ZTSSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE", !56, i64 0}
!56 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_Vector_implE", !57, i64 0}
!57 = !{!"_ZTSNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!58 = !{!"_ZTSSt6vectorI12HighsVarTypeSaIS0_EE", !59, i64 0}
!59 = !{!"_ZTSSt12_Vector_baseI12HighsVarTypeSaIS0_EE", !60, i64 0}
!60 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE12_Vector_implE", !61, i64 0}
!61 = !{!"_ZTSNSt12_Vector_baseI12HighsVarTypeSaIS0_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!62 = !{!"_ZTS13HighsNameHash", !63, i64 0}
!63 = !{!"_ZTSSt13unordered_mapINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEiSt4hashIS5_ESt8equal_toIS5_ESaISt4pairIKS5_iEEE", !64, i64 0}
!64 = !{!"_ZTSSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_iESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE", !7, i64 0, !33, i64 8, !65, i64 16, !33, i64 24, !66, i64 32, !7, i64 48}
!65 = !{!"_ZTSNSt8__detail15_Hash_node_baseE", !7, i64 0}
!66 = !{!"_ZTSNSt8__detail20_Prime_rehash_policyE", !67, i64 0, !33, i64 8}
!67 = !{!"float", !8, i64 0}
!68 = !{!"_ZTS10HighsScale", !11, i64 0, !37, i64 4, !11, i64 8, !11, i64 12, !10, i64 16, !20, i64 24, !20, i64 48}
!69 = !{!"_ZTS11HighsLpMods", !16, i64 0, !16, i64 24, !20, i64 48, !20, i64 72, !58, i64 96, !16, i64 120, !20, i64 144, !16, i64 168, !20, i64 192, !16, i64 216, !20, i64 240, !20, i64 264, !20, i64 288}
!70 = !{!"_ZTS18HighsSimplexStatus", !37, i64 0, !37, i64 1, !37, i64 2, !37, i64 3, !37, i64 4, !37, i64 5, !37, i64 6, !37, i64 7, !37, i64 8, !37, i64 9, !37, i64 10, !37, i64 11, !37, i64 12}
!71 = !{!"_ZTS16HighsSimplexInfo", !20, i64 0, !20, i64 24, !20, i64 48, !20, i64 72, !20, i64 96, !20, i64 120, !20, i64 144, !20, i64 168, !20, i64 192, !20, i64 216, !20, i64 240, !20, i64 264, !20, i64 288, !16, i64 312, !16, i64 336, !16, i64 360, !16, i64 384, !20, i64 408, !11, i64 432, !11, i64 436, !37, i64 440, !37, i64 441, !72, i64 448, !11, i64 568, !11, i64 572, !11, i64 576, !20, i64 584, !20, i64 608, !20, i64 632, !20, i64 656, !11, i64 680, !11, i64 684, !11, i64 688, !11, i64 692, !10, i64 696, !10, i64 704, !10, i64 712, !10, i64 720, !11, i64 728, !11, i64 732, !10, i64 736, !10, i64 744, !10, i64 752, !10, i64 760, !10, i64 768, !10, i64 776, !10, i64 784, !10, i64 792, !10, i64 800, !10, i64 808, !37, i64 816, !10, i64 824, !10, i64 832, !11, i64 840, !10, i64 848, !10, i64 856, !10, i64 864, !37, i64 872, !37, i64 873, !37, i64 874, !37, i64 875, !37, i64 876, !37, i64 877, !37, i64 878, !37, i64 879, !37, i64 880, !37, i64 881, !37, i64 882, !37, i64 883, !37, i64 884, !37, i64 885, !37, i64 886, !11, i64 888, !10, i64 896, !10, i64 904, !11, i64 912, !10, i64 920, !10, i64 928, !11, i64 936, !11, i64 940, !11, i64 944, !11, i64 948, !11, i64 952, !11, i64 956, !11, i64 960, !11, i64 964, !11, i64 968, !11, i64 972, !11, i64 976, !11, i64 980, !11, i64 984, !11, i64 988, !11, i64 992, !11, i64 996, !10, i64 1000, !10, i64 1008, !10, i64 1016, !10, i64 1024, !11, i64 1032}
!72 = !{!"_ZTS12SimplexBasis", !16, i64 0, !73, i64 24, !73, i64 48, !33, i64 72, !11, i64 80, !11, i64 84, !31, i64 88}
!73 = !{!"_ZTSSt6vectorIaSaIaEE", !74, i64 0}
!74 = !{!"_ZTSSt12_Vector_baseIaSaIaEE", !75, i64 0}
!75 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE12_Vector_implE", !76, i64 0}
!76 = !{!"_ZTSNSt12_Vector_baseIaSaIaEE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!77 = !{!"_ZTS16HighsModelStatus", !8, i64 0}
!78 = !{!"_ZTS14HighsHashTableImvE", !79, i64 0, !85, i64 8, !33, i64 16, !33, i64 24, !33, i64 32}
!79 = !{!"_ZTSSt10unique_ptrI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !80, i64 0}
!80 = !{!"_ZTSSt15__uniq_ptr_dataI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterELb1ELb1EE", !81, i64 0}
!81 = !{!"_ZTSSt15__uniq_ptr_implI19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEE", !82, i64 0}
!82 = !{!"_ZTSSt5tupleIJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !83, i64 0}
!83 = !{!"_ZTSSt11_Tuple_implILm0EJP19HighsHashTableEntryImvEN14HighsHashTableImvE12OpNewDeleterEEE", !84, i64 0}
!84 = !{!"_ZTSSt10_Head_baseILm0EP19HighsHashTableEntryImvELb0EE", !7, i64 0}
!85 = !{!"_ZTSSt10unique_ptrIA_hSt14default_deleteIS0_EE", !86, i64 0}
!86 = !{!"_ZTSSt15__uniq_ptr_dataIhSt14default_deleteIA_hELb1ELb1EE", !87, i64 0}
!87 = !{!"_ZTSSt15__uniq_ptr_implIhSt14default_deleteIA_hEE", !88, i64 0}
!88 = !{!"_ZTSSt5tupleIJPhSt14default_deleteIA_hEEE", !89, i64 0}
!89 = !{!"_ZTSSt11_Tuple_implILm0EJPhSt14default_deleteIA_hEEE", !90, i64 0}
!90 = !{!"_ZTSSt10_Head_baseILm0EPhLb0EE", !7, i64 0}
!91 = !{!"_ZTS11HighsRandom", !33, i64 0}
!92 = !{!"_ZTS11HSimplexNla", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !93, i64 48, !37, i64 1960, !10, i64 1968, !102, i64 1976, !103, i64 2112}
!93 = !{!"_ZTS7HFactor", !10, i64 0, !10, i64 8, !11, i64 16, !16, i64 24, !16, i64 48, !16, i64 72, !94, i64 96, !11, i64 184, !11, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !11, i64 204, !11, i64 208, !10, i64 216, !37, i64 224, !7, i64 232, !7, i64 240, !7, i64 248, !7, i64 256, !10, i64 264, !10, i64 272, !11, i64 280, !10, i64 288, !95, i64 296, !34, i64 304, !37, i64 400, !37, i64 401, !11, i64 404, !11, i64 408, !7, i64 416, !11, i64 424, !16, i64 432, !20, i64 456, !16, i64 480, !16, i64 504, !16, i64 528, !20, i64 552, !16, i64 576, !16, i64 600, !16, i64 624, !16, i64 648, !16, i64 672, !16, i64 696, !16, i64 720, !20, i64 744, !20, i64 768, !16, i64 792, !16, i64 816, !16, i64 840, !16, i64 864, !16, i64 888, !16, i64 912, !12, i64 936, !20, i64 960, !16, i64 984, !16, i64 1008, !16, i64 1032, !16, i64 1056, !16, i64 1080, !16, i64 1104, !16, i64 1128, !16, i64 1152, !16, i64 1176, !16, i64 1200, !20, i64 1224, !16, i64 1248, !16, i64 1272, !20, i64 1296, !16, i64 1320, !16, i64 1344, !20, i64 1368, !11, i64 1392, !11, i64 1396, !16, i64 1400, !16, i64 1424, !16, i64 1448, !20, i64 1472, !16, i64 1496, !16, i64 1520, !16, i64 1544, !16, i64 1568, !20, i64 1592, !20, i64 1616, !16, i64 1640, !16, i64 1664, !16, i64 1688, !20, i64 1712, !101, i64 1736}
!94 = !{!"_ZTS12RefactorInfo", !37, i64 0, !16, i64 8, !16, i64 32, !73, i64 56, !10, i64 80}
!95 = !{!"_ZTSSt10unique_ptrIN7HFactor7LogDataESt14default_deleteIS1_EE", !96, i64 0}
!96 = !{!"_ZTSSt15__uniq_ptr_dataIN7HFactor7LogDataESt14default_deleteIS1_ELb1ELb1EE", !97, i64 0}
!97 = !{!"_ZTSSt15__uniq_ptr_implIN7HFactor7LogDataESt14default_deleteIS1_EE", !98, i64 0}
!98 = !{!"_ZTSSt5tupleIJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !99, i64 0}
!99 = !{!"_ZTSSt11_Tuple_implILm0EJPN7HFactor7LogDataESt14default_deleteIS1_EEE", !100, i64 0}
!100 = !{!"_ZTSSt10_Head_baseILm0EPN7HFactor7LogDataELb0EE", !7, i64 0}
!101 = !{!"_ZTS11HVectorBaseIdE", !11, i64 0, !11, i64 4, !16, i64 8, !20, i64 32, !10, i64 56, !12, i64 64, !16, i64 88, !7, i64 112, !37, i64 120, !11, i64 124, !16, i64 128, !20, i64 152}
!102 = !{!"_ZTS17ProductFormUpdate", !37, i64 0, !11, i64 4, !11, i64 8, !16, i64 16, !20, i64 40, !16, i64 64, !16, i64 88, !20, i64 112}
!103 = !{!"_ZTS14SimplexIterate", !37, i64 0, !72, i64 8, !104, i64 128, !20, i64 728}
!104 = !{!"_ZTS24InvertibleRepresentation", !16, i64 0, !16, i64 24, !16, i64 48, !16, i64 72, !20, i64 96, !16, i64 120, !16, i64 144, !20, i64 168, !16, i64 192, !16, i64 216, !20, i64 240, !16, i64 264, !16, i64 288, !16, i64 312, !20, i64 336, !16, i64 360, !16, i64 384, !16, i64 408, !16, i64 432, !20, i64 456, !16, i64 480, !16, i64 504, !20, i64 528, !16, i64 552, !20, i64 576}
!105 = !{!"_ZTS8HotStart", !37, i64 0, !94, i64 8, !73, i64 96}
!106 = !{!"_ZTS16SimplexAlgorithm", !8, i64 0}
!107 = !{!"_ZTS14HighsRayRecord", !11, i64 0, !11, i64 4, !20, i64 8}
!108 = !{!"_ZTSSt6vectorI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !109, i64 0}
!109 = !{!"_ZTSSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE", !110, i64 0}
!110 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE12_Vector_implE", !111, i64 0}
!111 = !{!"_ZTSNSt12_Vector_baseI32HighsSimplexBadBasisChangeRecordSaIS0_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!112 = !{!"_ZTS17HighsSimplexStats", !37, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48}
!113 = !{!11, !11, i64 0}
!114 = !{!6, !11, i64 16}
!115 = !{!6, !10, i64 8}
!116 = !{!10, !10, i64 0}
!117 = !{!8, !8, i64 0}
!118 = distinct !{!118, !119}
!119 = !{!"llvm.loop.mustprogress"}
!120 = distinct !{!120, !119}
!121 = distinct !{!121, !119}
!122 = distinct !{!122, !119}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass