; LLVM IR from ERGO-Code/HiGHS :: src/lp_data (HighsInterface)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.78 = external hidden unnamed_addr constant [80 x i8], align 1
@.str.100 = external hidden unnamed_addr constant [21 x i8], align 1
@__PRETTY_FUNCTION__._Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni = external hidden unnamed_addr constant [119 x i8], align 1
@.str.101 = external hidden unnamed_addr constant [48 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI16HighsBasisStatusSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 1 dereferenceable(1) %1, ptr noundef nonnull align 1 dereferenceable(1) %2, ptr noundef nonnull align 8 dereferenceable(80) %3, i32 noundef %4) #3 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !9
  %23 = load ptr, ptr %9, align 8, !tbaa !5
  %24 = call noundef zeroext i1 @_Z2okRK20HighsIndexCollection(ptr noundef nonnull align 8 dereferenceable(80) %23)
  br i1 %24, label %25, label %26

25:                                               ; preds = %5
  br label %28

26:                                               ; preds = %5
  call void @__assert_fail(ptr noundef @.str.100, ptr noundef @.str.78, i32 noundef 678, ptr noundef @__PRETTY_FUNCTION__._Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni) #5
  unreachable

27:                                               ; No predecessors!
  br label %28

28:                                               ; preds = %27, %25
  %29 = load i32, ptr %10, align 4, !tbaa !9
  %30 = sext i32 %29 to i64
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = call noundef i64 @_ZNKSt6vectorI16HighsBasisStatusSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %31) #6
  %33 = icmp eq i64 %30, %32
  br i1 %33, label %34, label %35

34:                                               ; preds = %28
  br label %37

35:                                               ; preds = %28
  call void @__assert_fail(ptr noundef @.str.101, ptr noundef @.str.78, i32 noundef 679, ptr noundef @__PRETTY_FUNCTION__._Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni) #5
  unreachable

36:                                               ; No predecessors!
  br label %37

37:                                               ; preds = %36, %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  %38 = load ptr, ptr %9, align 8, !tbaa !5
  call void @_Z6limitsRK20HighsIndexCollectionRiS2_(ptr noundef nonnull align 8 dereferenceable(80) %38, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %39 = load i32, ptr %11, align 4, !tbaa !9
  %40 = load i32, ptr %12, align 4, !tbaa !9
  %41 = icmp sgt i32 %39, %40
  br i1 %41, label %42, label %43

42:                                               ; preds = %37
  store i32 1, ptr %13, align 4
  br label %124

43:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #6
  store i32 -1, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #6
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #6
  store i32 0, ptr %19, align 4, !tbaa !9
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 0, ptr %44, align 1, !tbaa !11
  %45 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 0, ptr %45, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #6
  %46 = load i32, ptr %11, align 4, !tbaa !9
  store i32 %46, ptr %20, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %116, %43
  %48 = load i32, ptr %20, align 4, !tbaa !9
  %49 = load i32, ptr %12, align 4, !tbaa !9
  %50 = icmp sle i32 %48, %49
  br i1 %50, label %52, label %51

51:                                               ; preds = %47
  store i32 2, ptr %13, align 4
  br label %119

52:                                               ; preds = %47
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  call void @_Z16updateOutInIndexRK20HighsIndexCollectionRiS2_S2_S2_S2_(ptr noundef nonnull align 8 dereferenceable(80) %53, ptr noundef nonnull align 4 dereferenceable(4) %14, ptr noundef nonnull align 4 dereferenceable(4) %15, ptr noundef nonnull align 4 dereferenceable(4) %16, ptr noundef nonnull align 4 dereferenceable(4) %17, ptr noundef nonnull align 4 dereferenceable(4) %18)
  %54 = load i32, ptr %20, align 4, !tbaa !9
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = icmp eq i32 %54, %55
  br i1 %56, label %57, label %59

57:                                               ; preds = %52
  %58 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %58, ptr %19, align 4, !tbaa !9
  br label %59

59:                                               ; preds = %57, %52
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #6
  %60 = load i32, ptr %14, align 4, !tbaa !9
  store i32 %60, ptr %21, align 4, !tbaa !9
  br label %61

61:                                               ; preds = %78, %59
  %62 = load i32, ptr %21, align 4, !tbaa !9
  %63 = load i32, ptr %15, align 4, !tbaa !9
  %64 = icmp sle i32 %62, %63
  br i1 %64, label %66, label %65

65:                                               ; preds = %61
  store i32 5, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #6
  br label %81

66:                                               ; preds = %61
  %67 = load ptr, ptr %6, align 8, !tbaa !5
  %68 = load i32, ptr %21, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #6
  %71 = load i8, ptr %70, align 1, !tbaa !13
  %72 = icmp eq i8 %71, 1
  br i1 %72, label %73, label %75

73:                                               ; preds = %66
  %74 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 1, ptr %74, align 1, !tbaa !11
  br label %77

75:                                               ; preds = %66
  %76 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 1, ptr %76, align 1, !tbaa !11
  br label %77

77:                                               ; preds = %75, %73
  br label %78

78:                                               ; preds = %77
  %79 = load i32, ptr %21, align 4, !tbaa !9
  %80 = add nsw i32 %79, 1
  store i32 %80, ptr %21, align 4, !tbaa !9
  br label %61, !llvm.loop !15

81:                                               ; preds = %65
  %82 = load i32, ptr %15, align 4, !tbaa !9
  %83 = load i32, ptr %10, align 4, !tbaa !9
  %84 = sub nsw i32 %83, 1
  %85 = icmp sge i32 %82, %84
  br i1 %85, label %86, label %87

86:                                               ; preds = %81
  store i32 2, ptr %13, align 4
  br label %119

87:                                               ; preds = %81
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #6
  %88 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %88, ptr %22, align 4, !tbaa !9
  br label %89

89:                                               ; preds = %106, %87
  %90 = load i32, ptr %22, align 4, !tbaa !9
  %91 = load i32, ptr %17, align 4, !tbaa !9
  %92 = icmp sle i32 %90, %91
  br i1 %92, label %94, label %93

93:                                               ; preds = %89
  store i32 8, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #6
  br label %109

94:                                               ; preds = %89
  %95 = load ptr, ptr %6, align 8, !tbaa !5
  %96 = load i32, ptr %22, align 4, !tbaa !9
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %95, i64 noundef %97) #6
  %99 = load i8, ptr %98, align 1, !tbaa !13
  %100 = load ptr, ptr %6, align 8, !tbaa !5
  %101 = load i32, ptr %19, align 4, !tbaa !9
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %102) #6
  store i8 %99, ptr %103, align 1, !tbaa !13
  %104 = load i32, ptr %19, align 4, !tbaa !9
  %105 = add nsw i32 %104, 1
  store i32 %105, ptr %19, align 4, !tbaa !9
  br label %106

106:                                              ; preds = %94
  %107 = load i32, ptr %22, align 4, !tbaa !9
  %108 = add nsw i32 %107, 1
  store i32 %108, ptr %22, align 4, !tbaa !9
  br label %89, !llvm.loop !17

109:                                              ; preds = %93
  %110 = load i32, ptr %17, align 4, !tbaa !9
  %111 = load i32, ptr %10, align 4, !tbaa !9
  %112 = sub nsw i32 %111, 1
  %113 = icmp sge i32 %110, %112
  br i1 %113, label %114, label %115

114:                                              ; preds = %109
  store i32 2, ptr %13, align 4
  br label %119

115:                                              ; preds = %109
  br label %116

116:                                              ; preds = %115
  %117 = load i32, ptr %20, align 4, !tbaa !9
  %118 = add nsw i32 %117, 1
  store i32 %118, ptr %20, align 4, !tbaa !9
  br label %47, !llvm.loop !18

119:                                              ; preds = %114, %86, %51
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #6
  br label %120

120:                                              ; preds = %119
  %121 = load ptr, ptr %6, align 8, !tbaa !5
  %122 = load i32, ptr %19, align 4, !tbaa !9
  %123 = sext i32 %122 to i64
  call void @_ZNSt6vectorI16HighsBasisStatusSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %121, i64 noundef %123)
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  store i32 0, ptr %13, align 4
  br label %124

124:                                              ; preds = %120, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #6
  %125 = load i32, ptr %13, align 4
  switch i32 %125, label %127 [
    i32 0, label %126
    i32 1, label %126
  ]

126:                                              ; preds = %124, %124
  ret void

127:                                              ; preds = %124
  unreachable
}

declare noundef zeroext i1 @_Z2okRK20HighsIndexCollection(ptr noundef nonnull align 8 dereferenceable(80)) #4

declare void @_Z6limitsRK20HighsIndexCollectionRiS2_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

declare void @_Z16updateOutInIndexRK20HighsIndexCollectionRiS2_S2_S2_S2_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI16HighsBasisStatusSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS16HighsBasisStatus", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.78 = external hidden unnamed_addr constant [80 x i8], align 1
@.str.100 = external hidden unnamed_addr constant [21 x i8], align 1
@__PRETTY_FUNCTION__._Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni = external hidden unnamed_addr constant [119 x i8], align 1
@.str.101 = external hidden unnamed_addr constant [48 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI16HighsBasisStatusSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr nocapture noundef nonnull writeonly align 1 dereferenceable(1) %1, ptr nocapture noundef nonnull writeonly align 1 dereferenceable(1) %2, ptr noundef nonnull align 8 dereferenceable(80) %3, i32 noundef %4) local_unnamed_addr #3 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = tail call noundef zeroext i1 @_Z2okRK20HighsIndexCollection(ptr noundef nonnull align 8 dereferenceable(80) %3)
  br i1 %13, label %15, label %14

14:                                               ; preds = %5
  tail call void @__assert_fail(ptr noundef nonnull @.str.100, ptr noundef nonnull @.str.78, i32 noundef 678, ptr noundef nonnull @__PRETTY_FUNCTION__._Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni) #5
  unreachable

15:                                               ; preds = %5
  %16 = sext i32 %4 to i64
  %17 = tail call noundef i64 @_ZNKSt6vectorI16HighsBasisStatusSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #6
  %18 = icmp eq i64 %17, %16
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  tail call void @__assert_fail(ptr noundef nonnull @.str.101, ptr noundef nonnull @.str.78, i32 noundef 679, ptr noundef nonnull @__PRETTY_FUNCTION__._Z18deleteBasisEntriesRSt6vectorI16HighsBasisStatusSaIS0_EERbS4_RK20HighsIndexCollectioni) #5
  unreachable

20:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #6
  call void @_Z6limitsRK20HighsIndexCollectionRiS2_(ptr noundef nonnull align 8 dereferenceable(80) %3, ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull align 4 dereferenceable(4) %7)
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = icmp sgt i32 %21, %22
  br i1 %23, label %50, label %.lr.ph51.preheader

.lr.ph51.preheader:                               ; preds = %20
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %11) #6
  store i32 -1, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %12) #6
  store i32 0, ptr %12, align 4, !tbaa !5
  store i8 0, ptr %1, align 1, !tbaa !9
  store i8 0, ptr %2, align 1, !tbaa !9
  %24 = add nsw i32 %4, -1
  br label %.lr.ph51

25:                                               ; preds = %._crit_edge44
  %26 = add nsw i32 %.02749, 1
  %27 = load i32, ptr %7, align 4, !tbaa !5
  %.not.not = icmp slt i32 %.02749, %27
  br i1 %.not.not, label %.lr.ph51, label %._crit_edge52, !llvm.loop !11

.lr.ph51:                                         ; preds = %.lr.ph51.preheader, %25
  %.02749 = phi i32 [ %26, %25 ], [ %21, %.lr.ph51.preheader ]
  %.02848 = phi i32 [ %.2.lcssa, %25 ], [ 0, %.lr.ph51.preheader ]
  call void @_Z16updateOutInIndexRK20HighsIndexCollectionRiS2_S2_S2_S2_(ptr noundef nonnull align 8 dereferenceable(80) %3, ptr noundef nonnull align 4 dereferenceable(4) %8, ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull align 4 dereferenceable(4) %10, ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %28 = load i32, ptr %6, align 4, !tbaa !5
  %29 = icmp eq i32 %.02749, %28
  %30 = load i32, ptr %8, align 4
  %spec.select = select i1 %29, i32 %30, i32 %.02848
  %31 = load i32, ptr %9, align 4, !tbaa !5
  %.not3237 = icmp sgt i32 %30, %31
  br i1 %.not3237, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.lr.ph51
  %32 = sext i32 %30 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph51
  %.lcssa = phi i32 [ %31, %.lr.ph51 ], [ %36, %.lr.ph ]
  %.not33 = icmp slt i32 %.lcssa, %24
  br i1 %.not33, label %38, label %._crit_edge52

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %32, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %33 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #6
  %34 = load i8, ptr %33, align 1, !tbaa !13
  %35 = icmp eq i8 %34, 1
  %. = select i1 %35, ptr %1, ptr %2
  store i8 1, ptr %., align 1, !tbaa !9
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %36 = load i32, ptr %9, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %.not32.not = icmp slt i64 %indvars.iv, %37
  br i1 %.not32.not, label %.lr.ph, label %._crit_edge, !llvm.loop !15

38:                                               ; preds = %._crit_edge
  %39 = load i32, ptr %10, align 4, !tbaa !5
  %40 = load i32, ptr %11, align 4, !tbaa !5
  %.not3439 = icmp sgt i32 %39, %40
  br i1 %.not3439, label %._crit_edge44, label %.lr.ph43.preheader

.lr.ph43.preheader:                               ; preds = %38
  %41 = sext i32 %39 to i64
  %42 = sext i32 %spec.select to i64
  br label %.lr.ph43

._crit_edge44.loopexit:                           ; preds = %.lr.ph43
  %43 = trunc nsw i64 %indvars.iv.next65 to i32
  br label %._crit_edge44

._crit_edge44:                                    ; preds = %._crit_edge44.loopexit, %38
  %.2.lcssa = phi i32 [ %spec.select, %38 ], [ %43, %._crit_edge44.loopexit ]
  %.lcssa36 = phi i32 [ %40, %38 ], [ %47, %._crit_edge44.loopexit ]
  %.not35 = icmp slt i32 %.lcssa36, %24
  br i1 %.not35, label %25, label %._crit_edge52

.lr.ph43:                                         ; preds = %.lr.ph43.preheader, %.lr.ph43
  %indvars.iv64 = phi i64 [ %42, %.lr.ph43.preheader ], [ %indvars.iv.next65, %.lr.ph43 ]
  %indvars.iv62 = phi i64 [ %41, %.lr.ph43.preheader ], [ %indvars.iv.next63, %.lr.ph43 ]
  %44 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv62) #6
  %45 = load i8, ptr %44, align 1, !tbaa !13
  %46 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv64) #6
  store i8 %45, ptr %46, align 1, !tbaa !13
  %indvars.iv.next65 = add nsw i64 %indvars.iv64, 1
  %indvars.iv.next63 = add nsw i64 %indvars.iv62, 1
  %47 = load i32, ptr %11, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %.not34.not = icmp slt i64 %indvars.iv62, %48
  br i1 %.not34.not, label %.lr.ph43, label %._crit_edge44.loopexit, !llvm.loop !16

._crit_edge52:                                    ; preds = %25, %._crit_edge, %._crit_edge44
  %.3.ph = phi i32 [ %.2.lcssa, %25 ], [ %spec.select, %._crit_edge ], [ %.2.lcssa, %._crit_edge44 ]
  %49 = sext i32 %.3.ph to i64
  call void @_ZNSt6vectorI16HighsBasisStatusSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %49)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %12) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #6
  br label %50

50:                                               ; preds = %20, %._crit_edge52
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #6
  ret void
}

declare noundef zeroext i1 @_Z2okRK20HighsIndexCollection(ptr noundef nonnull align 8 dereferenceable(80)) local_unnamed_addr #4

declare void @_Z6limitsRK20HighsIndexCollectionRiS2_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #4

declare void @_Z16updateOutInIndexRK20HighsIndexCollectionRiS2_S2_S2_S2_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorI16HighsBasisStatusSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI16HighsBasisStatusSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { noreturn nounwind }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTS16HighsBasisStatus", !7, i64 0}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass