; LLVM IR from rweather/lightweight-crypto :: src/genavr/code.ll (ZN4Code10sbox_setupEhRK4SboxRK3Reg)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Insn = type <{ i32, i8, i8, [2 x i8] }>
%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Code = type { %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector", i32, i32, i32, i32, [16 x i8], i32, i32, i32, %"class.std::__cxx11::basic_string", %"class.std::map" }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl" = type { %"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Insn, std::allocator<Insn>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon.13 }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon.13 = type { i64, [8 x i8] }
%"class.std::map" = type { %"class.std::_Rb_tree" }
%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" }
%"struct.std::_Rb_tree<unsigned char, std::pair<const unsigned char, Sbox>, std::_Select1st<std::pair<const unsigned char, Sbox>>, std::less<unsigned char>>::_Rb_tree_impl" = type { [8 x i8], %"struct.std::_Rb_tree_header" }
%"struct.std::_Rb_tree_header" = type { %"struct.std::_Rb_tree_node_base", i64 }
%"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Insn4reg2ENS_4TypeEhh(ptr dead_on_unwind noalias writable sret(%class.Insn) align 4, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code15allocateHighRegEj(ptr dead_on_unwind noalias writable sret(%class.Reg) align 8, ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code10sbox_setupEhRK4SboxRK3Reg(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3) #0 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca %class.Reg, align 8
  %10 = alloca %class.Insn, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca %class.Insn, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  %14 = load ptr, ptr %5, align 8
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  %16 = call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %15)
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %23, label %18

18:                                               ; preds = %4
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %19, i32 noundef 0)
  %21 = zext i8 %20 to i32
  %22 = icmp slt i32 %21, 16
  br i1 %22, label %23, label %45

23:                                               ; preds = %18, %4
  call void @llvm.lifetime.start.p0(i64 24, ptr %9) #3
  call void @_ZN4Code15allocateHighRegEj(ptr dead_on_unwind writable sret(%class.Reg) align 8 %9, ptr noundef nonnull align 8 dereferenceable(200) %14, i32 noundef 1)
  %24 = getelementptr inbounds %class.Code, ptr %14, i32 0, i32 0
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %25 = invoke noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %9, i32 noundef 0)
          to label %26 unwind label %31

26:                                               ; preds = %23
  %27 = load i8, ptr %6, align 1, !tbaa !9
  invoke void @_ZN4Insn4reg2ENS_4TypeEhh(ptr dead_on_unwind writable sret(%class.Insn) align 4 %10, i32 noundef 28, i8 noundef zeroext %25, i8 noundef zeroext %27)
          to label %28 unwind label %31

28:                                               ; preds = %26
  invoke void @_ZNSt6vectorI4InsnSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24) %24, ptr noundef nonnull align 4 dereferenceable(6) %10)
          to label %29 unwind label %35

29:                                               ; preds = %28
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  invoke void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200) %14, ptr noundef nonnull align 8 dereferenceable(24) %9)
          to label %30 unwind label %40

30:                                               ; preds = %29
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %9) #3
  br label %55

31:                                               ; preds = %26, %23
  %32 = landingpad { ptr, i32 }
          cleanup
  %33 = extractvalue { ptr, i32 } %32, 0
  store ptr %33, ptr %11, align 8
  %34 = extractvalue { ptr, i32 } %32, 1
  store i32 %34, ptr %12, align 4
  br label %39

35:                                               ; preds = %28
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %11, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %12, align 4
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %10) #3
  br label %39

39:                                               ; preds = %35, %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  br label %44

40:                                               ; preds = %29
  %41 = landingpad { ptr, i32 }
          cleanup
  %42 = extractvalue { ptr, i32 } %41, 0
  store ptr %42, ptr %11, align 8
  %43 = extractvalue { ptr, i32 } %41, 1
  store i32 %43, ptr %12, align 4
  br label %44

44:                                               ; preds = %40, %39
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %9) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %9) #3
  br label %60

45:                                               ; preds = %18
  %46 = getelementptr inbounds %class.Code, ptr %14, i32 0, i32 0
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %47 = load ptr, ptr %8, align 8, !tbaa !5
  %48 = call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %47, i32 noundef 0)
  %49 = load i8, ptr %6, align 1, !tbaa !9
  call void @_ZN4Insn4reg2ENS_4TypeEhh(ptr dead_on_unwind writable sret(%class.Insn) align 4 %13, i32 noundef 28, i8 noundef zeroext %48, i8 noundef zeroext %49)
  invoke void @_ZNSt6vectorI4InsnSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24) %46, ptr noundef nonnull align 4 dereferenceable(6) %13)
          to label %50 unwind label %51

50:                                               ; preds = %45
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %55

51:                                               ; preds = %45
  %52 = landingpad { ptr, i32 }
          cleanup
  %53 = extractvalue { ptr, i32 } %52, 0
  store ptr %53, ptr %11, align 8
  %54 = extractvalue { ptr, i32 } %52, 1
  store i32 %54, ptr %12, align 4
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %60

55:                                               ; preds = %50, %30
  %56 = load ptr, ptr %7, align 8, !tbaa !5
  %57 = getelementptr inbounds %class.Code, ptr %14, i32 0, i32 12
  %58 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) %57, ptr noundef nonnull align 1 dereferenceable(1) %6)
  %59 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN4SboxaSERKS_(ptr noundef nonnull align 8 dereferenceable(24) %58, ptr noundef nonnull align 8 dereferenceable(24) %56)
  ret void

60:                                               ; preds = %51, %44
  %61 = load ptr, ptr %11, align 8
  %62 = load i32, ptr %12, align 4
  %63 = insertvalue { ptr, i32 } poison, ptr %61, 0
  %64 = insertvalue { ptr, i32 } %63, i32 %62, 1
  resume { ptr, i32 } %64
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4InsnSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(6)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 1 dereferenceable(1)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN4SboxaSERKS_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Insn = type <{ i32, i8, i8, [2 x i8] }>
%class.Reg = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Insn4reg2ENS_4TypeEhh(ptr dead_on_unwind noalias writable sret(%class.Insn) align 4, i32 noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code15allocateHighRegEj(ptr dead_on_unwind noalias writable sret(%class.Reg) align 8, ptr noundef nonnull align 8 dereferenceable(200), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4Code10sbox_setupEhRK4SboxRK3Reg(ptr noundef nonnull align 8 dereferenceable(200) %0, i8 noundef zeroext %1, ptr noundef nonnull align 8 dereferenceable(24) %2, ptr noundef nonnull align 8 dereferenceable(24) %3) local_unnamed_addr #0 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca i8, align 1
  %6 = alloca %class.Reg, align 8
  %7 = alloca %class.Insn, align 4
  %8 = alloca %class.Insn, align 4
  store i8 %1, ptr %5, align 1, !tbaa !5
  %9 = tail call noundef i32 @_ZNK3Reg4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3)
  %10 = icmp eq i32 %9, 0
  br i1 %10, label %14, label %11

11:                                               ; preds = %4
  %12 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 0)
  %13 = icmp ult i8 %12, 16
  br i1 %13, label %14, label %28

14:                                               ; preds = %11, %4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3
  call void @_ZN4Code15allocateHighRegEj(ptr dead_on_unwind nonnull writable sret(%class.Reg) align 8 %6, ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef 1)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
  %15 = invoke noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %6, i32 noundef 0)
          to label %16 unwind label %20

16:                                               ; preds = %14
  invoke void @_ZN4Insn4reg2ENS_4TypeEhh(ptr dead_on_unwind nonnull writable sret(%class.Insn) align 4 %7, i32 noundef 28, i8 noundef zeroext %15, i8 noundef zeroext %1)
          to label %17 unwind label %20

17:                                               ; preds = %16
  invoke void @_ZNSt6vectorI4InsnSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(6) %7)
          to label %18 unwind label %22

18:                                               ; preds = %17
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
  invoke void @_ZN4Code10releaseRegERK3Reg(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %6)
          to label %19 unwind label %25

19:                                               ; preds = %18
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
  br label %33

20:                                               ; preds = %16, %14
  %21 = landingpad { ptr, i32 }
          cleanup
  br label %24

22:                                               ; preds = %17
  %23 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %7) #3
  br label %24

24:                                               ; preds = %22, %20
  %.pn = phi { ptr, i32 } [ %23, %22 ], [ %21, %20 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
  br label %27

25:                                               ; preds = %18
  %26 = landingpad { ptr, i32 }
          cleanup
  br label %27

27:                                               ; preds = %25, %24
  %.pn10 = phi { ptr, i32 } [ %26, %25 ], [ %.pn, %24 ]
  call void @_ZN3RegD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
  br label %37

28:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %8) #3
  %29 = tail call noundef zeroext i8 @_ZNK3Reg3regEi(ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef 0)
  call void @_ZN4Insn4reg2ENS_4TypeEhh(ptr dead_on_unwind nonnull writable sret(%class.Insn) align 4 %8, i32 noundef 28, i8 noundef zeroext %29, i8 noundef zeroext %1)
  invoke void @_ZNSt6vectorI4InsnSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 4 dereferenceable(6) %8)
          to label %30 unwind label %31

30:                                               ; preds = %28
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
  br label %33

31:                                               ; preds = %28
  %32 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6) %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %8) #3
  br label %37

33:                                               ; preds = %30, %19
  %34 = getelementptr inbounds i8, ptr %0, i64 152
  %35 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48) %34, ptr noundef nonnull align 1 dereferenceable(1) %5)
  %36 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZN4SboxaSERKS_(ptr noundef nonnull align 8 dereferenceable(24) %35, ptr noundef nonnull align 8 dereferenceable(24) %2)
  ret void

37:                                               ; preds = %31, %27
  %.pn10.pn = phi { ptr, i32 } [ %.pn10, %27 ], [ %32, %31 ]
  resume { ptr, i32 } %.pn10.pn
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI4InsnSaIS0_EE9push_backEOS0_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(6)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4InsnD2Ev(ptr noundef nonnull align 4 dereferenceable(6)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt3mapIh4SboxSt4lessIhESaISt4pairIKhS0_EEEixERS4_(ptr noundef nonnull align 8 dereferenceable(48), ptr noundef nonnull align 1 dereferenceable(1)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZN4SboxaSERKS_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,TailCallElimPass