; LLVM IR from ARM-software/Arm-2D :: examples/common/platform/mps2 (stdout_USART)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CMSDK_UART_TypeDef = type { i32, i32, i32, %union.anon, i32 }
%union.anon = type { i32 }

; Function Attrs: nounwind uwtable
define dso_local void @uart_config(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  store volatile i32 0, ptr getelementptr inbounds (%struct.CMSDK_UART_TypeDef, ptr inttoptr (i64 1073758208 to ptr), i32 0, i32 2), align 4, !tbaa !9
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = zext i32 %3 to i64
  %5 = udiv i64 %4, 115200
  %6 = trunc i64 %5 to i32
  store volatile i32 %6, ptr getelementptr inbounds (%struct.CMSDK_UART_TypeDef, ptr inttoptr (i64 1073758208 to ptr), i32 0, i32 4), align 4, !tbaa !11
  store volatile i32 3, ptr getelementptr inbounds (%struct.CMSDK_UART_TypeDef, ptr inttoptr (i64 1073758208 to ptr), i32 0, i32 2), align 4, !tbaa !9
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !7, i64 12, !6, i64 16}
!11 = !{!10, !6, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @uart_config(i32 noundef %0) local_unnamed_addr #0 {
  store volatile i32 0, ptr inttoptr (i64 1073758216 to ptr), align 8, !tbaa !5
  %2 = udiv i32 %0, 115200
  store volatile i32 %2, ptr inttoptr (i64 1073758224 to ptr), align 16, !tbaa !10
  store volatile i32 3, ptr inttoptr (i64 1073758216 to ptr), align 8, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !8, i64 12, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 16}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass