; LLVM IR from ARM-software/Arm-2D :: Acceleration/Arm/ACI/arm_2d_rgb565_aci_fvp_plugin (arm_2d_rgb565_aci_fvp)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ACIVCX2DecodeInfo = type { i8, i32, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z28arm_mix_unpack_blue_uint16x2PtPKtb(ptr noundef, ptr noundef, i1 noundef zeroext) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z29arm_mix_unpack_green_uint16x2PtPKtb(ptr noundef, ptr noundef, i1 noundef zeroext) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z27arm_mix_unpack_red_uint16x2PtPKtb(ptr noundef, ptr noundef, i1 noundef zeroext) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN21arm_2d_rgb565_aci_fvp18exec_vcx2_beatwiseEPK17ACIVCX2DecodeInfojjhhPj(ptr noundef nonnull align 8 dereferenceable(240) %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i8 noundef zeroext %4, i8 noundef zeroext %5, ptr noundef %6) #2 align 2 {
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i8, align 1
  %14 = alloca i8, align 1
  %15 = alloca ptr, align 8
  %16 = alloca i8, align 1
  %17 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store i32 %2, ptr %11, align 4, !tbaa !9
  store i32 %3, ptr %12, align 4, !tbaa !9
  store i8 %4, ptr %13, align 1, !tbaa !11
  store i8 %5, ptr %14, align 1, !tbaa !11
  store ptr %6, ptr %15, align 8, !tbaa !5
  %18 = load ptr, ptr %9, align 8
  %19 = load ptr, ptr %10, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.ACIVCX2DecodeInfo, ptr %19, i32 0, i32 1
  %21 = load i32, ptr %20, align 4, !tbaa !12
  %22 = call noundef zeroext i1 @_ZN21arm_2d_rgb565_aci_fvp21isCDECoprocessorValidEj(ptr noundef nonnull align 8 dereferenceable(240) %18, i32 noundef %21)
  br i1 %22, label %24, label %23

23:                                               ; preds = %7
  store i32 100, ptr %8, align 4
  br label %54

24:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #3
  %25 = load ptr, ptr %10, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.ACIVCX2DecodeInfo, ptr %25, i32 0, i32 2
  %27 = load i32, ptr %26, align 4, !tbaa !15
  %28 = and i32 %27, 64
  %29 = icmp ugt i32 %28, 0
  %30 = zext i1 %29 to i64
  %31 = select i1 %29, i1 false, i1 true
  %32 = zext i1 %31 to i8
  store i8 %32, ptr %16, align 1, !tbaa !16
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.ACIVCX2DecodeInfo, ptr %33, i32 0, i32 2
  %35 = load i32, ptr %34, align 4, !tbaa !15
  %36 = and i32 %35, 15
  switch i32 %36, label %52 [
    i32 4, label %37
    i32 2, label %42
    i32 1, label %47
  ]

37:                                               ; preds = %24
  %38 = load i8, ptr %16, align 1, !tbaa !16, !range !17, !noundef !18
  %39 = trunc i8 %38 to i1
  call void @_Z27arm_mix_unpack_red_uint16x2PtPKtb(ptr noundef %11, ptr noundef %12, i1 noundef zeroext %39)
  %40 = load i32, ptr %11, align 4, !tbaa !9
  %41 = load ptr, ptr %15, align 8, !tbaa !5
  store i32 %40, ptr %41, align 4, !tbaa !9
  store i32 0, ptr %8, align 4
  store i32 1, ptr %17, align 4
  br label %53

42:                                               ; preds = %24
  %43 = load i8, ptr %16, align 1, !tbaa !16, !range !17, !noundef !18
  %44 = trunc i8 %43 to i1
  call void @_Z29arm_mix_unpack_green_uint16x2PtPKtb(ptr noundef %11, ptr noundef %12, i1 noundef zeroext %44)
  %45 = load i32, ptr %11, align 4, !tbaa !9
  %46 = load ptr, ptr %15, align 8, !tbaa !5
  store i32 %45, ptr %46, align 4, !tbaa !9
  store i32 0, ptr %8, align 4
  store i32 1, ptr %17, align 4
  br label %53

47:                                               ; preds = %24
  %48 = load i8, ptr %16, align 1, !tbaa !16, !range !17, !noundef !18
  %49 = trunc i8 %48 to i1
  call void @_Z28arm_mix_unpack_blue_uint16x2PtPKtb(ptr noundef %11, ptr noundef %12, i1 noundef zeroext %49)
  %50 = load i32, ptr %11, align 4, !tbaa !9
  %51 = load ptr, ptr %15, align 8, !tbaa !5
  store i32 %50, ptr %51, align 4, !tbaa !9
  store i32 0, ptr %8, align 4
  store i32 1, ptr %17, align 4
  br label %53

52:                                               ; preds = %24
  store i32 100, ptr %8, align 4
  store i32 1, ptr %17, align 4
  br label %53

53:                                               ; preds = %52, %47, %42, %37
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #3
  br label %54

54:                                               ; preds = %53, %23
  %55 = load i32, ptr %8, align 4
  ret i32 %55
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN21arm_2d_rgb565_aci_fvp21isCDECoprocessorValidEj(ptr noundef nonnull align 8 dereferenceable(240), i32 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 4}
!13 = !{!"_ZTS17ACIVCX2DecodeInfo", !14, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"bool", !7, i64 0}
!15 = !{!13, !10, i64 8}
!16 = !{!14, !14, i64 0}
!17 = !{i8 0, i8 2}
!18 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z28arm_mix_unpack_blue_uint16x2PtPKtb(ptr noundef, ptr noundef, i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z29arm_mix_unpack_green_uint16x2PtPKtb(ptr noundef, ptr noundef, i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z27arm_mix_unpack_red_uint16x2PtPKtb(ptr noundef, ptr noundef, i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 101) i32 @_ZN21arm_2d_rgb565_aci_fvp18exec_vcx2_beatwiseEPK17ACIVCX2DecodeInfojjhhPj(ptr noundef nonnull align 8 dereferenceable(240) %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3, i8 noundef zeroext %4, i8 noundef zeroext %5, ptr nocapture noundef writeonly %6) local_unnamed_addr #1 align 2 {
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %1, i64 4
  %11 = load i32, ptr %10, align 4, !tbaa !9
  %12 = tail call noundef zeroext i1 @_ZN21arm_2d_rgb565_aci_fvp21isCDECoprocessorValidEj(ptr noundef nonnull align 8 dereferenceable(240) %0, i32 noundef %11)
  br i1 %12, label %13, label %21

13:                                               ; preds = %7
  %14 = getelementptr inbounds i8, ptr %1, i64 8
  %15 = load i32, ptr %14, align 4, !tbaa !12
  %16 = and i32 %15, 64
  %.not = icmp eq i32 %16, 0
  %17 = and i32 %15, 15
  switch i32 %17, label %21 [
    i32 4, label %18
    i32 2, label %19
    i32 1, label %20
  ]

18:                                               ; preds = %13
  call void @_Z27arm_mix_unpack_red_uint16x2PtPKtb(ptr noundef nonnull %8, ptr noundef nonnull %9, i1 noundef zeroext %.not)
  br label %.sink.split

19:                                               ; preds = %13
  call void @_Z29arm_mix_unpack_green_uint16x2PtPKtb(ptr noundef nonnull %8, ptr noundef nonnull %9, i1 noundef zeroext %.not)
  br label %.sink.split

20:                                               ; preds = %13
  call void @_Z28arm_mix_unpack_blue_uint16x2PtPKtb(ptr noundef nonnull %8, ptr noundef nonnull %9, i1 noundef zeroext %.not)
  br label %.sink.split

.sink.split:                                      ; preds = %20, %19, %18
  %.sink = load i32, ptr %8, align 4, !tbaa !5
  store i32 %.sink, ptr %6, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %.sink.split, %13, %7
  %.1 = phi i32 [ 100, %7 ], [ 100, %13 ], [ 0, %.sink.split ]
  ret i32 %.1
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZN21arm_2d_rgb565_aci_fvp21isCDECoprocessorValidEj(ptr noundef nonnull align 8 dereferenceable(240), i32 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"_ZTS17ACIVCX2DecodeInfo", !11, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16}
!11 = !{!"bool", !7, i64 0}
!12 = !{!10, !6, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass