; LLVM IR from buresjan/optim_lbm :: nomad/ext/sgtelib/src/Kernel.ll (ZN7SGTELIB6kernelENS_8kernel_tEdNS_6MatrixE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.SGTELIB::Matrix" = type { ptr, %"class.std::__cxx11::basic_string", i32, i32, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_ZN7SGTELIB6kernelENS_8kernel_tEdd(i32 noundef, double noundef, double noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7SGTELIB6kernelENS_8kernel_tEdNS_6MatrixE(ptr dead_on_unwind noalias writable sret(%"class.SGTELIB::Matrix") align 8 %0, i32 noundef %1, double noundef %2, ptr noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca double, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8
  store i32 %1, ptr %6, align 4, !tbaa !5
  store double %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %13 = call noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_rowsEv(ptr noundef nonnull align 8 dereferenceable(56) %3)
  store i32 %13, ptr %9, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %14 = call noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_colsEv(ptr noundef nonnull align 8 dereferenceable(56) %3)
  store i32 %14, ptr %10, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %11, align 4, !tbaa !13
  br label %15

15:                                               ; preds = %37, %4
  %16 = load i32, ptr %11, align 4, !tbaa !13
  %17 = load i32, ptr %9, align 4, !tbaa !13
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %19, label %40

19:                                               ; preds = %15
  store i32 0, ptr %12, align 4, !tbaa !13
  br label %20

20:                                               ; preds = %33, %19
  %21 = load i32, ptr %12, align 4, !tbaa !13
  %22 = load i32, ptr %10, align 4, !tbaa !13
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %24, label %36

24:                                               ; preds = %20
  %25 = load i32, ptr %11, align 4, !tbaa !13
  %26 = load i32, ptr %12, align 4, !tbaa !13
  %27 = load i32, ptr %6, align 4, !tbaa !5
  %28 = load double, ptr %7, align 8, !tbaa !9
  %29 = load i32, ptr %11, align 4, !tbaa !13
  %30 = load i32, ptr %12, align 4, !tbaa !13
  %31 = call noundef double @_ZNK7SGTELIB6Matrix3getEii(ptr noundef nonnull align 8 dereferenceable(56) %3, i32 noundef %29, i32 noundef %30)
  %32 = call noundef double @_ZN7SGTELIB6kernelENS_8kernel_tEdd(i32 noundef %27, double noundef %28, double noundef %31)
  call void @_ZN7SGTELIB6Matrix3setEiid(ptr noundef nonnull align 8 dereferenceable(56) %3, i32 noundef %25, i32 noundef %26, double noundef %32)
  br label %33

33:                                               ; preds = %24
  %34 = load i32, ptr %12, align 4, !tbaa !13
  %35 = add nsw i32 %34, 1
  store i32 %35, ptr %12, align 4, !tbaa !13
  br label %20, !llvm.loop !15

36:                                               ; preds = %20
  br label %37

37:                                               ; preds = %36
  %38 = load i32, ptr %11, align 4, !tbaa !13
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %11, align 4, !tbaa !13
  br label %15, !llvm.loop !17

40:                                               ; preds = %15
  call void @_ZN7SGTELIB6MatrixC1ERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_rowsEv(ptr noundef nonnull align 8 dereferenceable(56)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_colsEv(ptr noundef nonnull align 8 dereferenceable(56)) #2 align 2

declare void @_ZN7SGTELIB6Matrix3setEiid(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef, i32 noundef, double noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK7SGTELIB6Matrix3getEii(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef, i32 noundef) #2 align 2

declare void @_ZN7SGTELIB6MatrixC1ERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"_ZTSN7SGTELIB8kernel_tE", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.SGTELIB::Matrix" = type { ptr, %"class.std::__cxx11::basic_string", i32, i32, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

; Function Attrs: mustprogress uwtable
declare dso_local noundef double @_ZN7SGTELIB6kernelENS_8kernel_tEdd(i32 noundef, double noundef, double noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN7SGTELIB6kernelENS_8kernel_tEdNS_6MatrixE(ptr dead_on_unwind noalias writable sret(%"class.SGTELIB::Matrix") align 8 %0, i32 noundef %1, double noundef %2, ptr noundef nonnull %3) local_unnamed_addr #0 {
  %5 = tail call noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_rowsEv(ptr noundef nonnull align 8 dereferenceable(56) %3)
  %6 = tail call noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_colsEv(ptr noundef nonnull align 8 dereferenceable(56) %3)
  %7 = icmp sgt i32 %5, 0
  %8 = icmp sgt i32 %6, 0
  %or.cond = and i1 %7, %8
  br i1 %or.cond, label %.preheader.us, label %._crit_edge14

.preheader.us:                                    ; preds = %4, %._crit_edge.us
  %.01113.us = phi i32 [ %13, %._crit_edge.us ], [ 0, %4 ]
  br label %9

9:                                                ; preds = %.preheader.us, %9
  %.012.us = phi i32 [ 0, %.preheader.us ], [ %12, %9 ]
  %10 = tail call noundef double @_ZNK7SGTELIB6Matrix3getEii(ptr noundef nonnull align 8 dereferenceable(56) %3, i32 noundef %.01113.us, i32 noundef %.012.us)
  %11 = tail call noundef double @_ZN7SGTELIB6kernelENS_8kernel_tEdd(i32 noundef %1, double noundef %2, double noundef %10)
  tail call void @_ZN7SGTELIB6Matrix3setEiid(ptr noundef nonnull align 8 dereferenceable(56) %3, i32 noundef %.01113.us, i32 noundef %.012.us, double noundef %11)
  %12 = add nuw nsw i32 %.012.us, 1
  %exitcond.not = icmp eq i32 %12, %6
  br i1 %exitcond.not, label %._crit_edge.us, label %9, !llvm.loop !5

._crit_edge.us:                                   ; preds = %9
  %13 = add nuw nsw i32 %.01113.us, 1
  %exitcond16.not = icmp eq i32 %13, %5
  br i1 %exitcond16.not, label %._crit_edge14, label %.preheader.us, !llvm.loop !7

._crit_edge14:                                    ; preds = %._crit_edge.us, %4
  tail call void @_ZN7SGTELIB6MatrixC1ERKS0_(ptr noundef nonnull align 8 dereferenceable(56) %0, ptr noundef nonnull align 8 dereferenceable(56) %3)
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_rowsEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK7SGTELIB6Matrix11get_nb_colsEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #1 align 2

declare void @_ZN7SGTELIB6Matrix3setEiid(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef, i32 noundef, double noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZNK7SGTELIB6Matrix3getEii(ptr noundef nonnull align 8 dereferenceable(56), i32 noundef, i32 noundef) local_unnamed_addr #1 align 2

declare void @_ZN7SGTELIB6MatrixC1ERKS0_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass