; LLVM IR from JessonYue/LeetCodeLearning :: Array/caiweixiong/cpp/Homework_005.ll (ZN12Homework_0055mergeERSt6vectorIiSaIiEEiS3_i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN12Homework_0055mergeERSt6vectorIiSaIiEEiS3_i(ptr noundef nonnull align 1 dereferenceable(1) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %4) #0 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !9
  %17 = load ptr, ptr %6, align 8
  %18 = load ptr, ptr %9, align 8, !tbaa !5
  %19 = call noundef zeroext i1 @_ZNKSt6vectorIiSaIiEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #2
  br i1 %19, label %20, label %21

20:                                               ; preds = %5
  br label %97

21:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = load i32, ptr %10, align 4, !tbaa !9
  %24 = add nsw i32 %22, %23
  store i32 %24, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  store i32 0, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %25 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %25, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %84, %21
  %27 = load i32, ptr %12, align 4, !tbaa !9
  %28 = load i32, ptr %11, align 4, !tbaa !9
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %30, label %34

30:                                               ; preds = %26
  %31 = load i32, ptr %13, align 4, !tbaa !9
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = icmp slt i32 %31, %32
  br label %34

34:                                               ; preds = %30, %26
  %35 = phi i1 [ false, %26 ], [ %33, %30 ]
  br i1 %35, label %36, label %96

36:                                               ; preds = %34
  br label %37

37:                                               ; preds = %54, %36
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  %39 = load i32, ptr %12, align 4, !tbaa !9
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40) #2
  %42 = load i32, ptr %41, align 4, !tbaa !9
  %43 = load ptr, ptr %9, align 8, !tbaa !5
  %44 = load i32, ptr %13, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #2
  %47 = load i32, ptr %46, align 4, !tbaa !9
  %48 = icmp sle i32 %42, %47
  br i1 %48, label %49, label %52

49:                                               ; preds = %37
  %50 = load i32, ptr %14, align 4, !tbaa !9
  %51 = icmp ne i32 %50, 0
  br label %52

52:                                               ; preds = %49, %37
  %53 = phi i1 [ false, %37 ], [ %51, %49 ]
  br i1 %53, label %54, label %59

54:                                               ; preds = %52
  %55 = load i32, ptr %12, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %12, align 4, !tbaa !9
  %57 = load i32, ptr %14, align 4, !tbaa !9
  %58 = add nsw i32 %57, -1
  store i32 %58, ptr %14, align 4, !tbaa !9
  br label %37, !llvm.loop !11

59:                                               ; preds = %52
  %60 = load i32, ptr %12, align 4, !tbaa !9
  %61 = load i32, ptr %14, align 4, !tbaa !9
  %62 = add nsw i32 %60, %61
  store i32 %62, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  %63 = load i32, ptr %15, align 4, !tbaa !9
  %64 = sub nsw i32 %63, 1
  store i32 %64, ptr %16, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %71, %59
  %66 = load i32, ptr %16, align 4, !tbaa !9
  %67 = load i32, ptr %12, align 4, !tbaa !9
  %68 = icmp sge i32 %66, %67
  br i1 %68, label %70, label %69

69:                                               ; preds = %65
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  br label %84

70:                                               ; preds = %65
  br label %71

71:                                               ; preds = %70
  %72 = load ptr, ptr %7, align 8, !tbaa !5
  %73 = load i32, ptr %16, align 4, !tbaa !9
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %74) #2
  %76 = load i32, ptr %75, align 4, !tbaa !9
  %77 = load ptr, ptr %7, align 8, !tbaa !5
  %78 = load i32, ptr %16, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %80) #2
  store i32 %76, ptr %81, align 4, !tbaa !9
  %82 = load i32, ptr %16, align 4, !tbaa !9
  %83 = add nsw i32 %82, -1
  store i32 %83, ptr %16, align 4, !tbaa !9
  br label %65, !llvm.loop !13

84:                                               ; preds = %69
  %85 = load ptr, ptr %9, align 8, !tbaa !5
  %86 = load i32, ptr %13, align 4, !tbaa !9
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %13, align 4, !tbaa !9
  %88 = sext i32 %86 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %88) #2
  %90 = load i32, ptr %89, align 4, !tbaa !9
  %91 = load ptr, ptr %7, align 8, !tbaa !5
  %92 = load i32, ptr %12, align 4, !tbaa !9
  %93 = add nsw i32 %92, 1
  store i32 %93, ptr %12, align 4, !tbaa !9
  %94 = sext i32 %92 to i64
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %94) #2
  store i32 %90, ptr %95, align 4, !tbaa !9
  br label %26, !llvm.loop !14

96:                                               ; preds = %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  br label %97

97:                                               ; preds = %96, %20
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6vectorIiSaIiEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN12Homework_0055mergeERSt6vectorIiSaIiEEiS3_i(ptr nocapture noundef nonnull readnone align 1 dereferenceable(1) %0, ptr noundef nonnull align 8 dereferenceable(24) %1, i32 noundef %2, ptr noundef nonnull align 8 dereferenceable(24) %3, i32 noundef %4) local_unnamed_addr #0 align 2 {
  %6 = tail call noundef zeroext i1 @_ZNKSt6vectorIiSaIiEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #1
  br i1 %6, label %.loopexit, label %7

7:                                                ; preds = %5
  %8 = add nsw i32 %4, %2
  %9 = icmp sgt i32 %8, 0
  %10 = icmp sgt i32 %4, 0
  %11 = and i1 %9, %10
  br i1 %11, label %.preheader.preheader, label %.loopexit

.preheader.preheader:                             ; preds = %7
  %12 = zext nneg i32 %4 to i64
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %._crit_edge43
  %indvars.iv53 = phi i64 [ 0, %.preheader.preheader ], [ %indvars.iv.next54, %._crit_edge43 ]
  %.02946 = phi i32 [ %2, %.preheader.preheader ], [ %.1.lcssa, %._crit_edge43 ]
  %.03144 = phi i32 [ 0, %.preheader.preheader ], [ %35, %._crit_edge43 ]
  %13 = sext i32 %.03144 to i64
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %13) #1
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv53) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp sle i32 %15, %17
  %19 = icmp ne i32 %.02946, 0
  %20 = and i1 %18, %19
  br i1 %20, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %13, %.preheader ]
  %.135 = phi i32 [ %21, %.lr.ph ], [ %.02946, %.preheader ]
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %21 = add nsw i32 %.135, -1
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv53) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = icmp sle i32 %23, %25
  %27 = icmp ne i32 %21, 0
  %28 = select i1 %26, i1 %27, i1 false
  br i1 %28, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %29 = trunc nsw i64 %indvars.iv.next to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %.132.lcssa = phi i32 [ %.03144, %.preheader ], [ %29, %._crit_edge.loopexit ]
  %.1.lcssa = phi i32 [ %.02946, %.preheader ], [ %21, %._crit_edge.loopexit ]
  %.lcssa33 = phi i64 [ %13, %.preheader ], [ %indvars.iv.next, %._crit_edge.loopexit ]
  %.not.not39 = icmp sgt i32 %.1.lcssa, 0
  br i1 %.not.not39, label %.lr.ph42.preheader, label %._crit_edge43

.lr.ph42.preheader:                               ; preds = %._crit_edge
  %30 = add i32 %.1.lcssa, %.132.lcssa
  %31 = sext i32 %30 to i64
  %32 = sext i32 %.132.lcssa to i64
  br label %.lr.ph42

._crit_edge43:                                    ; preds = %.lr.ph42, %._crit_edge
  %indvars.iv.next54 = add nuw nsw i64 %indvars.iv53, 1
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv53) #1
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = add nsw i32 %.132.lcssa, 1
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %.lcssa33) #1
  store i32 %34, ptr %36, align 4, !tbaa !5
  %37 = icmp slt i32 %35, %8
  %38 = icmp ult i64 %indvars.iv.next54, %12
  %39 = select i1 %37, i1 %38, i1 false
  br i1 %39, label %.preheader, label %.loopexit, !llvm.loop !11

.lr.ph42:                                         ; preds = %.lr.ph42.preheader, %.lr.ph42
  %indvars.iv50 = phi i64 [ %31, %.lr.ph42.preheader ], [ %indvars.iv.next51, %.lr.ph42 ]
  %indvars.iv.next51 = add nsw i64 %indvars.iv50, -1
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv.next51) #1
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv50) #1
  store i32 %41, ptr %42, align 4, !tbaa !5
  %.not.not = icmp sgt i64 %indvars.iv.next51, %32
  br i1 %.not.not, label %.lr.ph42, label %._crit_edge43, !llvm.loop !12

.loopexit:                                        ; preds = %._crit_edge43, %7, %5
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6vectorIiSaIiEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass