; LLVM IR from tum-i4/obfuscation-benchmarks :: tigress-generated-programs (RandomFunc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @RandomFunc(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1 x i64], align 8
  %6 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #2
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds i64, ptr %7, i64 0
  %9 = load i64, ptr %8, align 8, !tbaa !9
  %10 = sub i64 %9, 51238316
  %11 = sub i64 %10, 339126204
  %12 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  store i64 %11, ptr %12, align 8, !tbaa !9
  %13 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %14 = load i64, ptr %13, align 8, !tbaa !9
  %15 = lshr i64 %14, 3
  %16 = and i64 %15, 1
  %17 = icmp ne i64 %16, 0
  br i1 %17, label %18, label %44

18:                                               ; preds = %2
  %19 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %20 = load i64, ptr %19, align 8, !tbaa !9
  %21 = and i64 %20, 1
  %22 = icmp ne i64 %21, 0
  br i1 %22, label %23, label %31

23:                                               ; preds = %18
  %24 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %25 = load i64, ptr %24, align 8, !tbaa !9
  %26 = and i64 %25, 31
  %27 = shl i64 %26, 4
  %28 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %29 = load i64, ptr %28, align 8, !tbaa !9
  %30 = or i64 %29, %27
  store i64 %30, ptr %28, align 8, !tbaa !9
  br label %43

31:                                               ; preds = %18
  %32 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %33 = getelementptr inbounds i8, ptr %32, i64 7
  %34 = load i8, ptr %33, align 1, !tbaa !11
  store i8 %34, ptr %6, align 1, !tbaa !11
  %35 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %36 = getelementptr inbounds i8, ptr %35, i64 6
  %37 = load i8, ptr %36, align 1, !tbaa !11
  %38 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %39 = getelementptr inbounds i8, ptr %38, i64 7
  store i8 %37, ptr %39, align 1, !tbaa !11
  %40 = load i8, ptr %6, align 1, !tbaa !11
  %41 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %42 = getelementptr inbounds i8, ptr %41, i64 6
  store i8 %40, ptr %42, align 1, !tbaa !11
  br label %43

43:                                               ; preds = %31, %23
  br label %67

44:                                               ; preds = %2
  %45 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %46 = load i64, ptr %45, align 8, !tbaa !9
  %47 = and i64 %46, 1
  %48 = icmp ne i64 %47, 0
  br i1 %48, label %49, label %60

49:                                               ; preds = %44
  %50 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %51 = load i64, ptr %50, align 8, !tbaa !9
  %52 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %53 = load i64, ptr %52, align 8, !tbaa !9
  %54 = add i64 %51, %53
  %55 = and i64 %54, 7
  %56 = shl i64 %55, 2
  %57 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %58 = load i64, ptr %57, align 8, !tbaa !9
  %59 = or i64 %58, %56
  store i64 %59, ptr %57, align 8, !tbaa !9
  br label %66

60:                                               ; preds = %44
  %61 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %62 = load i64, ptr %61, align 8, !tbaa !9
  %63 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %64 = load i64, ptr %63, align 8, !tbaa !9
  %65 = add i64 %64, %62
  store i64 %65, ptr %63, align 8, !tbaa !9
  br label %66

66:                                               ; preds = %60, %49
  br label %67

67:                                               ; preds = %66, %43
  %68 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %69 = load i64, ptr %68, align 8, !tbaa !9
  %70 = mul i64 %69, 1237873311
  %71 = load ptr, ptr %4, align 8, !tbaa !5
  %72 = getelementptr inbounds i64, ptr %71, i64 0
  store i64 %70, ptr %72, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @RandomFunc(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = load i64, ptr %0, align 8, !tbaa !5
  %4 = add i64 %3, -390364520
  %.sroa.17.0.extract.shift = lshr i64 %4, 48
  %.sroa.19.0.extract.shift = lshr i64 %4, 56
  %5 = and i64 %4, 8
  %.not = icmp eq i64 %5, 0
  %6 = and i64 %3, 1
  %.not167 = icmp eq i64 %6, 0
  br i1 %.not, label %14, label %7

7:                                                ; preds = %2
  br i1 %.not167, label %12, label %8

8:                                                ; preds = %7
  %9 = shl i64 %4, 4
  %10 = and i64 %9, 496
  %11 = or i64 %10, %4
  br label %21

12:                                               ; preds = %7
  %13 = and i64 %.sroa.17.0.extract.shift, 255
  br label %21

14:                                               ; preds = %2
  br i1 %.not167, label %19, label %15

15:                                               ; preds = %14
  %16 = shl i64 %3, 3
  %17 = and i64 %16, 24
  %18 = or i64 %17, %4
  br label %21

19:                                               ; preds = %14
  %20 = shl i64 %4, 1
  %.sroa.17.0.extract.shift93 = lshr i64 %20, 48
  %.sroa.19.0.extract.shift149 = lshr i64 %20, 56
  br label %21

21:                                               ; preds = %15, %19, %8, %12
  %.sroa.19.0.in = phi i64 [ %.sroa.19.0.extract.shift, %8 ], [ %13, %12 ], [ %.sroa.19.0.extract.shift, %15 ], [ %.sroa.19.0.extract.shift149, %19 ]
  %.sroa.17.0.in = phi i64 [ %.sroa.17.0.extract.shift, %8 ], [ %.sroa.19.0.extract.shift, %12 ], [ %.sroa.17.0.extract.shift, %15 ], [ %.sroa.17.0.extract.shift93, %19 ]
  %.sroa.0.sroa.0.0.in = phi i64 [ %11, %8 ], [ %4, %12 ], [ %18, %15 ], [ %20, %19 ]
  %.sroa.19.0.insert.shift153 = shl nuw i64 %.sroa.19.0.in, 56
  %.sroa.17.0.insert.ext96 = shl nuw i64 %.sroa.17.0.in, 48
  %.sroa.17.0.insert.shift97 = and i64 %.sroa.17.0.insert.ext96, 71776119061217280
  %.sroa.17.0.insert.insert99 = or disjoint i64 %.sroa.17.0.insert.shift97, %.sroa.19.0.insert.shift153
  %.sroa.0.0.insert.ext41 = and i64 %.sroa.0.sroa.0.0.in, 281474976710655
  %.sroa.0.0.insert.insert43 = or disjoint i64 %.sroa.17.0.insert.insert99, %.sroa.0.0.insert.ext41
  %22 = mul i64 %.sroa.0.0.insert.insert43, 1237873311
  store i64 %22, ptr %1, align 8, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass