; LLVM IR from vss2sn/cvrp :: src/genetic_algorithm.ll (ZN10GASolution9MakeValidEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.GASolution = type <{ %class.Solution, i32, i32, i64, %"class.std::vector.10", i64, %"class.std::vector.15", %"class.std::vector.15", i32, [4 x i8] }>
%class.Solution = type { ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %struct.Node, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl" }
%"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl" = type { %"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.Node = type <{ i32, i32, i32, i32, i8, [3 x i8] }>
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10GASolution9MakeValidEi(ptr noundef nonnull align 8 dereferenceable(204) %0, i32 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %11 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %78, %2
  %13 = load i32, ptr %5, align 4, !tbaa !9
  %14 = sext i32 %13 to i64
  %15 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 5
  %16 = load i64, ptr %15, align 8, !tbaa !11
  %17 = sub i64 %16, 1
  %18 = icmp ult i64 %14, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %81

20:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %21 = getelementptr inbounds %class.Solution, ptr %11, i32 0, i32 5
  %22 = load i32, ptr %21, align 4, !tbaa !37
  store i32 %22, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %23 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 7
  %24 = load i32, ptr %4, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #2
  %27 = load i32, ptr %5, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #2
  %30 = load i32, ptr %29, align 4, !tbaa !9
  store i32 %30, ptr %7, align 4, !tbaa !9
  br label %31

31:                                               ; preds = %43, %20
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 7
  %34 = load i32, ptr %4, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %35) #2
  %37 = load i32, ptr %5, align 4, !tbaa !9
  %38 = add nsw i32 %37, 1
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %39) #2
  %41 = load i32, ptr %40, align 4, !tbaa !9
  %42 = icmp slt i32 %32, %41
  br i1 %42, label %43, label %61

43:                                               ; preds = %31
  %44 = getelementptr inbounds %class.Solution, ptr %11, i32 0, i32 1
  %45 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 6
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %47) #2
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50) #2
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %53) #2
  %55 = getelementptr inbounds %struct.Node, ptr %54, i32 0, i32 3
  %56 = load i32, ptr %55, align 4, !tbaa !38
  %57 = load i32, ptr %6, align 4, !tbaa !9
  %58 = sub nsw i32 %57, %56
  store i32 %58, ptr %6, align 4, !tbaa !9
  %59 = load i32, ptr %7, align 4, !tbaa !9
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %7, align 4, !tbaa !9
  br label %31, !llvm.loop !39

61:                                               ; preds = %31
  %62 = load i32, ptr %6, align 4, !tbaa !9
  %63 = icmp slt i32 %62, 0
  br i1 %63, label %64, label %77

64:                                               ; preds = %61
  %65 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 7
  %66 = load i32, ptr %4, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %67) #2
  %69 = load i32, ptr %5, align 4, !tbaa !9
  %70 = add nsw i32 %69, 1
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %71) #2
  %73 = load i32, ptr %72, align 4, !tbaa !9
  %74 = add nsw i32 %73, -1
  store i32 %74, ptr %72, align 4, !tbaa !9
  %75 = load i32, ptr %5, align 4, !tbaa !9
  %76 = add nsw i32 %75, -1
  store i32 %76, ptr %5, align 4, !tbaa !9
  br label %77

77:                                               ; preds = %64, %61
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %78

78:                                               ; preds = %77
  %79 = load i32, ptr %5, align 4, !tbaa !9
  %80 = add nsw i32 %79, 1
  store i32 %80, ptr %5, align 4, !tbaa !9
  br label %12, !llvm.loop !41

81:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %82 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 5
  %83 = load i64, ptr %82, align 8, !tbaa !11
  %84 = trunc i64 %83 to i32
  store i32 %84, ptr %8, align 4, !tbaa !9
  br label %85

85:                                               ; preds = %148, %81
  %86 = load i32, ptr %8, align 4, !tbaa !9
  %87 = icmp sgt i32 %86, 1
  br i1 %87, label %89, label %88

88:                                               ; preds = %85
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %151

89:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %90 = getelementptr inbounds %class.Solution, ptr %11, i32 0, i32 5
  %91 = load i32, ptr %90, align 4, !tbaa !37
  store i32 %91, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %92 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 7
  %93 = load i32, ptr %4, align 4, !tbaa !9
  %94 = sext i32 %93 to i64
  %95 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %94) #2
  %96 = load i32, ptr %8, align 4, !tbaa !9
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %95, i64 noundef %97) #2
  %99 = load i32, ptr %98, align 4, !tbaa !9
  %100 = sub nsw i32 %99, 1
  store i32 %100, ptr %10, align 4, !tbaa !9
  br label %101

101:                                              ; preds = %113, %89
  %102 = load i32, ptr %10, align 4, !tbaa !9
  %103 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 7
  %104 = load i32, ptr %4, align 4, !tbaa !9
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %103, i64 noundef %105) #2
  %107 = load i32, ptr %8, align 4, !tbaa !9
  %108 = sub nsw i32 %107, 1
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %109) #2
  %111 = load i32, ptr %110, align 4, !tbaa !9
  %112 = icmp sge i32 %102, %111
  br i1 %112, label %113, label %131

113:                                              ; preds = %101
  %114 = getelementptr inbounds %class.Solution, ptr %11, i32 0, i32 1
  %115 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 6
  %116 = load i32, ptr %4, align 4, !tbaa !9
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %117) #2
  %119 = load i32, ptr %10, align 4, !tbaa !9
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %118, i64 noundef %120) #2
  %122 = load i32, ptr %121, align 4, !tbaa !9
  %123 = sext i32 %122 to i64
  %124 = call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %114, i64 noundef %123) #2
  %125 = getelementptr inbounds %struct.Node, ptr %124, i32 0, i32 3
  %126 = load i32, ptr %125, align 4, !tbaa !38
  %127 = load i32, ptr %9, align 4, !tbaa !9
  %128 = sub nsw i32 %127, %126
  store i32 %128, ptr %9, align 4, !tbaa !9
  %129 = load i32, ptr %10, align 4, !tbaa !9
  %130 = add nsw i32 %129, -1
  store i32 %130, ptr %10, align 4, !tbaa !9
  br label %101, !llvm.loop !42

131:                                              ; preds = %101
  %132 = load i32, ptr %9, align 4, !tbaa !9
  %133 = icmp slt i32 %132, 0
  br i1 %133, label %134, label %147

134:                                              ; preds = %131
  %135 = getelementptr inbounds %class.GASolution, ptr %11, i32 0, i32 7
  %136 = load i32, ptr %4, align 4, !tbaa !9
  %137 = sext i32 %136 to i64
  %138 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %135, i64 noundef %137) #2
  %139 = load i32, ptr %8, align 4, !tbaa !9
  %140 = sub nsw i32 %139, 1
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef %141) #2
  %143 = load i32, ptr %142, align 4, !tbaa !9
  %144 = add nsw i32 %143, 1
  store i32 %144, ptr %142, align 4, !tbaa !9
  %145 = load i32, ptr %8, align 4, !tbaa !9
  %146 = add nsw i32 %145, 1
  store i32 %146, ptr %8, align 4, !tbaa !9
  br label %147

147:                                              ; preds = %134, %131
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %148

148:                                              ; preds = %147
  %149 = load i32, ptr %8, align 4, !tbaa !9
  %150 = add nsw i32 %149, -1
  store i32 %150, ptr %8, align 4, !tbaa !9
  br label %85, !llvm.loop !43

151:                                              ; preds = %88
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !28, i64 144}
!12 = !{!"_ZTS10GASolution", !13, i64 0, !10, i64 104, !10, i64 108, !28, i64 112, !29, i64 120, !28, i64 144, !33, i64 152, !33, i64 176, !10, i64 200}
!13 = !{!"_ZTS8Solution", !14, i64 8, !18, i64 32, !22, i64 56, !26, i64 80, !10, i64 100}
!14 = !{!"_ZTSSt6vectorI4NodeSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseI4NodeSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSSt6vectorI7VehicleSaIS0_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseI7VehicleSaIS0_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!"_ZTS4Node", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !27, i64 16}
!27 = !{!"bool", !7, i64 0}
!28 = !{!"long", !7, i64 0}
!29 = !{!"_ZTSSt6vectorIdSaIdEE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIS_IiSaIiEESaIS1_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!13, !10, i64 100}
!38 = !{!26, !10, i64 12}
!39 = distinct !{!39, !40}
!40 = !{!"llvm.loop.mustprogress"}
!41 = distinct !{!41, !40}
!42 = distinct !{!42, !40}
!43 = distinct !{!43, !40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10GASolution9MakeValidEi(ptr noundef nonnull align 8 dereferenceable(204) %0, i32 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 144
  %4 = load i64, ptr %3, align 8, !tbaa !5
  %.not = icmp eq i64 %4, 1
  br i1 %.not, label %._crit_edge58, label %.lr.ph44

.lr.ph44:                                         ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 100
  %6 = getelementptr inbounds i8, ptr %0, i64 176
  %7 = sext i32 %1 to i64
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  %9 = getelementptr inbounds i8, ptr %0, i64 152
  br label %17

._crit_edge45:                                    ; preds = %49
  %10 = trunc i64 %50 to i32
  %11 = icmp sgt i32 %10, 1
  br i1 %11, label %.lr.ph57, label %._crit_edge58

.lr.ph57:                                         ; preds = %._crit_edge45
  %12 = getelementptr inbounds i8, ptr %0, i64 100
  %13 = getelementptr inbounds i8, ptr %0, i64 176
  %14 = sext i32 %1 to i64
  %15 = getelementptr inbounds i8, ptr %0, i64 8
  %16 = getelementptr inbounds i8, ptr %0, i64 152
  br label %53

17:                                               ; preds = %.lr.ph44, %49
  %18 = phi i64 [ 0, %.lr.ph44 ], [ %.pre-phi68, %49 ]
  %.03442 = phi i32 [ 0, %.lr.ph44 ], [ %.pre-phi66, %49 ]
  %19 = load i32, ptr %5, align 4, !tbaa !35
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %7) #1
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %18) #1
  %22 = load i32, ptr %21, align 4, !tbaa !36
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %7) #1
  %24 = add nsw i32 %.03442, 1
  %25 = sext i32 %24 to i64
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #1
  %27 = load i32, ptr %26, align 4, !tbaa !36
  %28 = icmp slt i32 %22, %27
  br i1 %28, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %17
  %29 = sext i32 %22 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %29, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.03339 = phi i32 [ %19, %.lr.ph.preheader ], [ %37, %.lr.ph ]
  %30 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %7) #1
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %indvars.iv) #1
  %32 = load i32, ptr %31, align 4, !tbaa !36
  %33 = sext i32 %32 to i64
  %34 = tail call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %33) #1
  %35 = getelementptr inbounds i8, ptr %34, i64 12
  %36 = load i32, ptr %35, align 4, !tbaa !37
  %37 = sub nsw i32 %.03339, %36
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %7) #1
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %25) #1
  %40 = load i32, ptr %39, align 4, !tbaa !36
  %41 = sext i32 %40 to i64
  %42 = icmp slt i64 %indvars.iv.next, %41
  br i1 %42, label %.lr.ph, label %._crit_edge, !llvm.loop !38

._crit_edge:                                      ; preds = %.lr.ph, %17
  %.033.lcssa = phi i32 [ %19, %17 ], [ %37, %.lr.ph ]
  %43 = icmp slt i32 %.033.lcssa, 0
  br i1 %43, label %44, label %49

44:                                               ; preds = %._crit_edge
  %45 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %7) #1
  %46 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %25) #1
  %47 = load i32, ptr %46, align 4, !tbaa !36
  %48 = add nsw i32 %47, -1
  store i32 %48, ptr %46, align 4, !tbaa !36
  %.pre67 = sext i32 %.03442 to i64
  br label %49

49:                                               ; preds = %44, %._crit_edge
  %.pre-phi68 = phi i64 [ %.pre67, %44 ], [ %25, %._crit_edge ]
  %.pre-phi66 = phi i32 [ %.03442, %44 ], [ %24, %._crit_edge ]
  %50 = load i64, ptr %3, align 8, !tbaa !5
  %51 = add i64 %50, -1
  %52 = icmp ugt i64 %51, %.pre-phi68
  br i1 %52, label %17, label %._crit_edge45, !llvm.loop !40

._crit_edge58:                                    ; preds = %84, %2, %._crit_edge45
  ret void

53:                                               ; preds = %.lr.ph57, %84
  %.03155 = phi i32 [ %10, %.lr.ph57 ], [ %.pre-phi, %84 ]
  %54 = load i32, ptr %12, align 4, !tbaa !35
  %55 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %14) #1
  %56 = zext nneg i32 %.03155 to i64
  %57 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %56) #1
  %58 = load i32, ptr %57, align 4, !tbaa !36
  %59 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %14) #1
  %60 = add nsw i32 %.03155, -1
  %61 = zext nneg i32 %60 to i64
  %62 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %61) #1
  %63 = load i32, ptr %62, align 4, !tbaa !36
  %.not.not47 = icmp sgt i32 %58, %63
  br i1 %.not.not47, label %.lr.ph51.preheader, label %._crit_edge52

.lr.ph51.preheader:                               ; preds = %53
  %64 = sext i32 %58 to i64
  br label %.lr.ph51

.lr.ph51:                                         ; preds = %.lr.ph51.preheader, %.lr.ph51
  %indvars.iv62 = phi i64 [ %64, %.lr.ph51.preheader ], [ %indvars.iv.next63, %.lr.ph51 ]
  %.03048 = phi i32 [ %54, %.lr.ph51.preheader ], [ %72, %.lr.ph51 ]
  %indvars.iv.next63 = add nsw i64 %indvars.iv62, -1
  %65 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %14) #1
  %66 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %indvars.iv.next63) #1
  %67 = load i32, ptr %66, align 4, !tbaa !36
  %68 = sext i32 %67 to i64
  %69 = tail call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %68) #1
  %70 = getelementptr inbounds i8, ptr %69, i64 12
  %71 = load i32, ptr %70, align 4, !tbaa !37
  %72 = sub nsw i32 %.03048, %71
  %73 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %14) #1
  %74 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %61) #1
  %75 = load i32, ptr %74, align 4, !tbaa !36
  %76 = sext i32 %75 to i64
  %.not.not = icmp sgt i64 %indvars.iv.next63, %76
  br i1 %.not.not, label %.lr.ph51, label %._crit_edge52, !llvm.loop !41

._crit_edge52:                                    ; preds = %.lr.ph51, %53
  %.030.lcssa = phi i32 [ %54, %53 ], [ %72, %.lr.ph51 ]
  %77 = icmp slt i32 %.030.lcssa, 0
  br i1 %77, label %78, label %84

78:                                               ; preds = %._crit_edge52
  %79 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %14) #1
  %80 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %61) #1
  %81 = load i32, ptr %80, align 4, !tbaa !36
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %80, align 4, !tbaa !36
  %83 = add nuw nsw i32 %.03155, 1
  br label %84

84:                                               ; preds = %78, %._crit_edge52
  %.pre-phi = phi i32 [ %.03155, %78 ], [ %60, %._crit_edge52 ]
  %.1 = phi i32 [ %83, %78 ], [ %.03155, %._crit_edge52 ]
  %85 = icmp sgt i32 %.1, 2
  br i1 %85, label %53, label %._crit_edge58, !llvm.loop !42
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !26, i64 144}
!6 = !{!"_ZTS10GASolution", !7, i64 0, !24, i64 104, !24, i64 108, !26, i64 112, !27, i64 120, !26, i64 144, !31, i64 152, !31, i64 176, !24, i64 200}
!7 = !{!"_ZTS8Solution", !8, i64 8, !15, i64 32, !19, i64 56, !23, i64 80, !24, i64 100}
!8 = !{!"_ZTSSt6vectorI4NodeSaIS0_EE", !9, i64 0}
!9 = !{!"_ZTSSt12_Vector_baseI4NodeSaIS0_EE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE12_Vector_implE", !11, i64 0}
!11 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !13, i64 0}
!13 = !{!"omnipotent char", !14, i64 0}
!14 = !{!"Simple C++ TBAA"}
!15 = !{!"_ZTSSt6vectorI7VehicleSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseI7VehicleSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!19 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!23 = !{!"_ZTS4Node", !24, i64 0, !24, i64 4, !24, i64 8, !24, i64 12, !25, i64 16}
!24 = !{!"int", !13, i64 0}
!25 = !{!"bool", !13, i64 0}
!26 = !{!"long", !13, i64 0}
!27 = !{!"_ZTSSt6vectorIdSaIdEE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!31 = !{!"_ZTSSt6vectorIS_IiSaIiEESaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!35 = !{!7, !24, i64 100}
!36 = !{!24, !24, i64 0}
!37 = !{!23, !24, i64 12}
!38 = distinct !{!38, !39}
!39 = !{!"llvm.loop.mustprogress"}
!40 = distinct !{!40, !39}
!41 = distinct !{!41, !39}
!42 = distinct !{!42, !39}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass