; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (pcf8591)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pcf8591_read.str = external hidden constant [31 x i8], align 4
@mAddress = external hidden global i32, align 4
@pcf8591_read.str.1 = external hidden constant [25 x i8], align 4
@pcf8591_read.str.2 = external hidden constant [24 x i8], align 4
@pcf8591_read.str.3 = external hidden constant [24 x i8], align 4
@mVoltage = external hidden global float, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @pcf8591_read(i32 noundef %0, i32 noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca [4 x i8], align 1
  %11 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = icmp ne i32 %12, -1
  br i1 %13, label %14, label %28

14:                                               ; preds = %3
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = icmp ne i32 %15, -1
  br i1 %16, label %17, label %28

17:                                               ; preds = %14
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = load i32, ptr %6, align 4, !tbaa !5
  %20 = call i32 @dh_i2c_init(i32 noundef %18, i32 noundef %19)
  store i32 %20, ptr %8, align 4, !tbaa !5
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %27

22:                                               ; preds = %17
  br label %23

23:                                               ; preds = %22
  call void (ptr, ...) @dhdebug_ram(ptr noundef @pcf8591_read.str)
  br label %24

24:                                               ; preds = %23
  br label %25

25:                                               ; preds = %24
  %26 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %26, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %82

27:                                               ; preds = %17
  br label %28

28:                                               ; preds = %27, %14, %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %29 = getelementptr inbounds [4 x i8], ptr %10, i64 0, i64 0
  store i8 69, ptr %29, align 1, !tbaa !11
  %30 = load i32, ptr @mAddress, align 4, !tbaa !5
  %31 = getelementptr inbounds [4 x i8], ptr %10, i64 0, i64 0
  %32 = call i32 @dh_i2c_write(i32 noundef %30, ptr noundef %31, i32 noundef 1, i32 noundef 1)
  store i32 %32, ptr %8, align 4, !tbaa !5
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %39

34:                                               ; preds = %28
  br label %35

35:                                               ; preds = %34
  call void (ptr, ...) @dhdebug_ram(ptr noundef @pcf8591_read.str.1)
  br label %36

36:                                               ; preds = %35
  br label %37

37:                                               ; preds = %36
  %38 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %38, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %81

39:                                               ; preds = %28
  %40 = load i32, ptr @mAddress, align 4, !tbaa !5
  %41 = getelementptr inbounds [4 x i8], ptr %10, i64 0, i64 0
  %42 = call i32 @dh_i2c_read(i32 noundef %40, ptr noundef %41, i32 noundef 4)
  store i32 %42, ptr %8, align 4, !tbaa !5
  %43 = icmp ne i32 %42, 0
  br i1 %43, label %44, label %49

44:                                               ; preds = %39
  br label %45

45:                                               ; preds = %44
  call void (ptr, ...) @dhdebug_ram(ptr noundef @pcf8591_read.str.2)
  br label %46

46:                                               ; preds = %45
  br label %47

47:                                               ; preds = %46
  %48 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %48, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %81

49:                                               ; preds = %39
  call void @ets_delay_us(i32 noundef 250)
  %50 = load i32, ptr @mAddress, align 4, !tbaa !5
  %51 = getelementptr inbounds [4 x i8], ptr %10, i64 0, i64 0
  %52 = call i32 @dh_i2c_read(i32 noundef %50, ptr noundef %51, i32 noundef 4)
  store i32 %52, ptr %8, align 4, !tbaa !5
  %53 = icmp ne i32 %52, 0
  br i1 %53, label %54, label %59

54:                                               ; preds = %49
  br label %55

55:                                               ; preds = %54
  call void (ptr, ...) @dhdebug_ram(ptr noundef @pcf8591_read.str.3)
  br label %56

56:                                               ; preds = %55
  br label %57

57:                                               ; preds = %56
  %58 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %58, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %81

59:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !5
  br label %60

60:                                               ; preds = %77, %59
  %61 = load i32, ptr %11, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = icmp ult i64 %62, 4
  br i1 %63, label %64, label %80

64:                                               ; preds = %60
  %65 = load float, ptr @mVoltage, align 4, !tbaa !12
  %66 = load i32, ptr %11, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds [4 x i8], ptr %10, i64 0, i64 %67
  %69 = load i8, ptr %68, align 1, !tbaa !11
  %70 = uitofp i8 %69 to float
  %71 = fmul float %65, %70
  %72 = fdiv float %71, 2.550000e+02
  %73 = load ptr, ptr %7, align 8, !tbaa !9
  %74 = load i32, ptr %11, align 4, !tbaa !5
  %75 = sext i32 %74 to i64
  %76 = getelementptr inbounds float, ptr %73, i64 %75
  store float %72, ptr %76, align 4, !tbaa !12
  br label %77

77:                                               ; preds = %64
  %78 = load i32, ptr %11, align 4, !tbaa !5
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %11, align 4, !tbaa !5
  br label %60, !llvm.loop !14

80:                                               ; preds = %60
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %81

81:                                               ; preds = %80, %57, %47, %37
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %82

82:                                               ; preds = %81, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %83 = load i32, ptr %4, align 4
  ret i32 %83
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) #2

declare void @dhdebug_ram(ptr noundef, ...) #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) #2

declare void @ets_delay_us(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"float", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pcf8591_read.str = external hidden constant [31 x i8], align 4
@mAddress = external hidden local_unnamed_addr global i32, align 4
@pcf8591_read.str.1 = external hidden constant [25 x i8], align 4
@pcf8591_read.str.2 = external hidden constant [24 x i8], align 4
@pcf8591_read.str.3 = external hidden constant [24 x i8], align 4
@mVoltage = external hidden local_unnamed_addr global float, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @pcf8591_read(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = alloca [4 x i8], align 1
  %5 = icmp ne i32 %0, -1
  %6 = icmp ne i32 %1, -1
  %or.cond = and i1 %5, %6
  br i1 %or.cond, label %7, label %10

7:                                                ; preds = %3
  %8 = tail call i32 @dh_i2c_init(i32 noundef %0, i32 noundef %1) #3
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %10, label %9

9:                                                ; preds = %7
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @pcf8591_read.str) #3
  br label %42

10:                                               ; preds = %7, %3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  store i8 69, ptr %4, align 1, !tbaa !5
  %11 = load i32, ptr @mAddress, align 4, !tbaa !8
  %12 = call i32 @dh_i2c_write(i32 noundef %11, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 1) #3
  %.not22 = icmp eq i32 %12, 0
  br i1 %.not22, label %14, label %13

13:                                               ; preds = %10
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @pcf8591_read.str.1) #3
  br label %.loopexit

14:                                               ; preds = %10
  %15 = load i32, ptr @mAddress, align 4, !tbaa !8
  %16 = call i32 @dh_i2c_read(i32 noundef %15, ptr noundef nonnull %4, i32 noundef 4) #3
  %.not23 = icmp eq i32 %16, 0
  br i1 %.not23, label %18, label %17

17:                                               ; preds = %14
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @pcf8591_read.str.2) #3
  br label %.loopexit

18:                                               ; preds = %14
  call void @ets_delay_us(i32 noundef 250) #3
  %19 = load i32, ptr @mAddress, align 4, !tbaa !8
  %20 = call i32 @dh_i2c_read(i32 noundef %19, ptr noundef nonnull %4, i32 noundef 4) #3
  %.not24 = icmp eq i32 %20, 0
  br i1 %.not24, label %.preheader.preheader, label %41

.preheader.preheader:                             ; preds = %18
  %21 = load float, ptr @mVoltage, align 4, !tbaa !10
  %22 = load i8, ptr %4, align 1, !tbaa !5
  %23 = uitofp i8 %22 to float
  %24 = fmul float %21, %23
  %25 = fdiv float %24, 2.550000e+02
  store float %25, ptr %2, align 4, !tbaa !10
  %26 = load float, ptr @mVoltage, align 4, !tbaa !10
  %27 = getelementptr inbounds i8, ptr %4, i64 1
  %28 = getelementptr inbounds i8, ptr %2, i64 4
  %29 = load <2 x i8>, ptr %27, align 1, !tbaa !5
  %30 = uitofp <2 x i8> %29 to <2 x float>
  %31 = insertelement <2 x float> poison, float %26, i64 0
  %32 = shufflevector <2 x float> %31, <2 x float> poison, <2 x i32> zeroinitializer
  %33 = fmul <2 x float> %32, %30
  %34 = fdiv <2 x float> %33, <float 2.550000e+02, float 2.550000e+02>
  store <2 x float> %34, ptr %28, align 4, !tbaa !10
  %35 = getelementptr inbounds i8, ptr %4, i64 3
  %36 = load i8, ptr %35, align 1, !tbaa !5
  %37 = uitofp i8 %36 to float
  %38 = fmul float %26, %37
  %39 = fdiv float %38, 2.550000e+02
  %40 = getelementptr inbounds i8, ptr %2, i64 12
  store float %39, ptr %40, align 4, !tbaa !10
  br label %.loopexit

41:                                               ; preds = %18
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @pcf8591_read.str.3) #3
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader.preheader, %41, %17, %13
  %.014 = phi i32 [ %12, %13 ], [ %16, %17 ], [ %20, %41 ], [ 0, %.preheader.preheader ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  br label %42

42:                                               ; preds = %.loopexit, %9
  %.1 = phi i32 [ %8, %9 ], [ %.014, %.loopexit ]
  ret i32 %.1
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare void @ets_delay_us(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"float", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass