; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1868/main.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector.0", align 8
@dir = external dso_local global i8, align 1
@lef = external dso_local global i8, align 1
@up = external dso_local global i8, align 1
@down = external dso_local global i8, align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5printv() #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %6 = trunc i64 %5 to i32
  %7 = sub nsw i32 %6, 1
  %8 = sext i32 %7 to i64
  %9 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %8) #2
  %10 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %11 = trunc i64 %10 to i32
  %12 = sext i32 %11 to i64
  %13 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %12) #2
  %14 = load i8, ptr %13, align 1, !tbaa !9
  %15 = sext i8 %14 to i32
  %16 = icmp ne i32 %15, 88
  br i1 %16, label %17, label %202

17:                                               ; preds = %2
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %19) #2
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %22) #2
  store i32 1, ptr %23, align 4, !tbaa !5
  call void @_Z5printv()
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %25) #2
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #2
  store i8 79, ptr %29, align 1, !tbaa !9
  %30 = load i8, ptr @dir, align 1, !tbaa !10, !range !12, !noundef !13
  %31 = trunc i8 %30 to i1
  br i1 %31, label %59, label %32

32:                                               ; preds = %17
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  %35 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %36 = trunc i64 %35 to i32
  %37 = icmp slt i32 %34, %36
  br i1 %37, label %38, label %59

38:                                               ; preds = %32
  %39 = load i32, ptr %3, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %40) #2
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %44) #2
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %59, label %48

48:                                               ; preds = %38
  %49 = load i32, ptr %3, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %50) #2
  %52 = load i32, ptr %4, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %54) #2
  store i8 88, ptr %55, align 1, !tbaa !9
  store i8 0, ptr @up, align 1, !tbaa !10
  store i8 1, ptr @dir, align 1, !tbaa !10
  %56 = load i32, ptr %3, align 4, !tbaa !5
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  call void @_Z3dfsii(i32 noundef %56, i32 noundef %58)
  br label %59

59:                                               ; preds = %48, %38, %32, %17
  %60 = load i8, ptr @dir, align 1, !tbaa !10, !range !12, !noundef !13
  %61 = trunc i8 %60 to i1
  br i1 %61, label %73, label %62

62:                                               ; preds = %59
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %65) #2
  %67 = load i32, ptr %4, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %68) #2
  store i8 88, ptr %69, align 1, !tbaa !9
  %70 = load i32, ptr %3, align 4, !tbaa !5
  %71 = add nsw i32 %70, 1
  %72 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %71, i32 noundef %72)
  br label %73

73:                                               ; preds = %62, %59
  %74 = load i8, ptr @up, align 1, !tbaa !10, !range !12, !noundef !13
  %75 = trunc i8 %74 to i1
  br i1 %75, label %101, label %76

76:                                               ; preds = %73
  %77 = load i32, ptr %3, align 4, !tbaa !5
  %78 = sub nsw i32 %77, 1
  %79 = icmp sge i32 %78, 0
  br i1 %79, label %80, label %101

80:                                               ; preds = %76
  %81 = load i32, ptr %3, align 4, !tbaa !5
  %82 = sub nsw i32 %81, 1
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %83) #2
  %85 = load i32, ptr %4, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %86) #2
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = icmp ne i32 %88, 0
  br i1 %89, label %101, label %90

90:                                               ; preds = %80
  %91 = load i32, ptr %3, align 4, !tbaa !5
  %92 = sub nsw i32 %91, 1
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %93) #2
  %95 = load i32, ptr %4, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %94, i64 noundef %96) #2
  store i8 88, ptr %97, align 1, !tbaa !9
  store i8 1, ptr @up, align 1, !tbaa !10
  store i8 0, ptr @lef, align 1, !tbaa !10
  %98 = load i32, ptr %3, align 4, !tbaa !5
  %99 = sub nsw i32 %98, 1
  %100 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %99, i32 noundef %100)
  br label %101

101:                                              ; preds = %90, %80, %76, %73
  %102 = load i8, ptr @up, align 1, !tbaa !10, !range !12, !noundef !13
  %103 = trunc i8 %102 to i1
  br i1 %103, label %115, label %104

104:                                              ; preds = %101
  %105 = load i32, ptr %3, align 4, !tbaa !5
  %106 = sext i32 %105 to i64
  %107 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %106) #2
  %108 = load i32, ptr %4, align 4, !tbaa !5
  %109 = add nsw i32 %108, 1
  %110 = sext i32 %109 to i64
  %111 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %110) #2
  store i8 88, ptr %111, align 1, !tbaa !9
  %112 = load i32, ptr %3, align 4, !tbaa !5
  %113 = load i32, ptr %4, align 4, !tbaa !5
  %114 = add nsw i32 %113, 1
  call void @_Z3dfsii(i32 noundef %112, i32 noundef %114)
  br label %115

115:                                              ; preds = %104, %101
  %116 = load i8, ptr @lef, align 1, !tbaa !10, !range !12, !noundef !13
  %117 = trunc i8 %116 to i1
  br i1 %117, label %143, label %118

118:                                              ; preds = %115
  %119 = load i32, ptr %4, align 4, !tbaa !5
  %120 = sub nsw i32 %119, 1
  %121 = icmp sge i32 %120, 0
  br i1 %121, label %122, label %143

122:                                              ; preds = %118
  %123 = load i32, ptr %3, align 4, !tbaa !5
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %124) #2
  %126 = load i32, ptr %4, align 4, !tbaa !5
  %127 = sub nsw i32 %126, 1
  %128 = sext i32 %127 to i64
  %129 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %125, i64 noundef %128) #2
  %130 = load i32, ptr %129, align 4, !tbaa !5
  %131 = icmp ne i32 %130, 0
  br i1 %131, label %143, label %132

132:                                              ; preds = %122
  %133 = load i32, ptr %3, align 4, !tbaa !5
  %134 = sext i32 %133 to i64
  %135 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %134) #2
  %136 = load i32, ptr %4, align 4, !tbaa !5
  %137 = sub nsw i32 %136, 1
  %138 = sext i32 %137 to i64
  %139 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %135, i64 noundef %138) #2
  store i8 88, ptr %139, align 1, !tbaa !9
  store i8 0, ptr @down, align 1, !tbaa !10
  store i8 1, ptr @lef, align 1, !tbaa !10
  %140 = load i32, ptr %3, align 4, !tbaa !5
  %141 = load i32, ptr %4, align 4, !tbaa !5
  %142 = sub nsw i32 %141, 1
  call void @_Z3dfsii(i32 noundef %140, i32 noundef %142)
  br label %143

143:                                              ; preds = %132, %122, %118, %115
  %144 = load i8, ptr @lef, align 1, !tbaa !10, !range !12, !noundef !13
  %145 = trunc i8 %144 to i1
  br i1 %145, label %157, label %146

146:                                              ; preds = %143
  %147 = load i32, ptr %3, align 4, !tbaa !5
  %148 = sub nsw i32 %147, 1
  %149 = sext i32 %148 to i64
  %150 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %149) #2
  %151 = load i32, ptr %4, align 4, !tbaa !5
  %152 = sext i32 %151 to i64
  %153 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %150, i64 noundef %152) #2
  store i8 88, ptr %153, align 1, !tbaa !9
  %154 = load i32, ptr %3, align 4, !tbaa !5
  %155 = sub nsw i32 %154, 1
  %156 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %155, i32 noundef %156)
  br label %157

157:                                              ; preds = %146, %143
  %158 = load i8, ptr @down, align 1, !tbaa !10, !range !12, !noundef !13
  %159 = trunc i8 %158 to i1
  br i1 %159, label %187, label %160

160:                                              ; preds = %157
  %161 = load i32, ptr %3, align 4, !tbaa !5
  %162 = add nsw i32 %161, 1
  %163 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %164 = trunc i64 %163 to i32
  %165 = icmp slt i32 %162, %164
  br i1 %165, label %166, label %187

166:                                              ; preds = %160
  %167 = load i32, ptr %3, align 4, !tbaa !5
  %168 = add nsw i32 %167, 1
  %169 = sext i32 %168 to i64
  %170 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %169) #2
  %171 = load i32, ptr %4, align 4, !tbaa !5
  %172 = sext i32 %171 to i64
  %173 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %170, i64 noundef %172) #2
  %174 = load i32, ptr %173, align 4, !tbaa !5
  %175 = icmp ne i32 %174, 0
  br i1 %175, label %187, label %176

176:                                              ; preds = %166
  %177 = load i32, ptr %3, align 4, !tbaa !5
  %178 = add nsw i32 %177, 1
  %179 = sext i32 %178 to i64
  %180 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %179) #2
  %181 = load i32, ptr %4, align 4, !tbaa !5
  %182 = sext i32 %181 to i64
  %183 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %180, i64 noundef %182) #2
  store i8 88, ptr %183, align 1, !tbaa !9
  store i8 0, ptr @dir, align 1, !tbaa !10
  store i8 1, ptr @down, align 1, !tbaa !10
  %184 = load i32, ptr %3, align 4, !tbaa !5
  %185 = add nsw i32 %184, 1
  %186 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %185, i32 noundef %186)
  br label %187

187:                                              ; preds = %176, %166, %160, %157
  %188 = load i8, ptr @down, align 1, !tbaa !10, !range !12, !noundef !13
  %189 = trunc i8 %188 to i1
  br i1 %189, label %201, label %190

190:                                              ; preds = %187
  %191 = load i32, ptr %3, align 4, !tbaa !5
  %192 = sext i32 %191 to i64
  %193 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %192) #2
  %194 = load i32, ptr %4, align 4, !tbaa !5
  %195 = sub nsw i32 %194, 1
  %196 = sext i32 %195 to i64
  %197 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %193, i64 noundef %196) #2
  store i8 88, ptr %197, align 1, !tbaa !9
  %198 = load i32, ptr %3, align 4, !tbaa !5
  %199 = load i32, ptr %4, align 4, !tbaa !5
  %200 = sub nsw i32 %199, 1
  call void @_Z3dfsii(i32 noundef %198, i32 noundef %200)
  br label %201

201:                                              ; preds = %190, %187
  br label %202

202:                                              ; preds = %201, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !7, i64 0}
!12 = !{i8 0, i8 2}
!13 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector.0", align 8
@dir = external dso_local local_unnamed_addr global i8, align 1
@lef = external dso_local local_unnamed_addr global i8, align 1
@up = external dso_local local_unnamed_addr global i8, align 1
@down = external dso_local local_unnamed_addr global i8, align 1

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5printv() local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = add nsw i32 %0, 1
  %5 = sext i32 %4 to i64
  %6 = add nsw i32 %0, -1
  %7 = icmp slt i32 %0, 1
  %8 = zext nneg i32 %6 to i64
  %9 = sext i32 %6 to i64
  %10 = sext i32 %1 to i64
  br label %tailrecurse

tailrecurse:                                      ; preds = %104, %2
  %indvars.iv = phi i64 [ %indvars.iv.next, %104 ], [ %10, %2 ]
  %11 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %12 = shl i64 %11, 32
  %sext = add i64 %12, -4294967296
  %13 = ashr exact i64 %sext, 32
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %13) #2
  %15 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %sext51 = shl i64 %15, 32
  %16 = ashr exact i64 %sext51, 32
  %17 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %16) #2
  %18 = load i8, ptr %17, align 1, !tbaa !5
  %.not = icmp eq i8 %18, 88
  br i1 %.not, label %107, label %19

19:                                               ; preds = %tailrecurse
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #2
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv) #2
  store i32 1, ptr %21, align 4, !tbaa !8
  tail call void @_Z5printv()
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #2
  %23 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %indvars.iv) #2
  store i8 79, ptr %23, align 1, !tbaa !5
  %24 = load i8, ptr @dir, align 1, !tbaa !10, !range !12, !noundef !13
  %25 = trunc nuw i8 %24 to i1
  br i1 %25, label %39, label %26

26:                                               ; preds = %19
  %27 = add nsw i64 %indvars.iv, 1
  %28 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %sext59 = shl i64 %28, 32
  %29 = ashr exact i64 %sext59, 32
  %30 = icmp slt i64 %27, %29
  br i1 %30, label %31, label %39

31:                                               ; preds = %26
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #2
  %33 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %27) #2
  %34 = load i32, ptr %33, align 4, !tbaa !8
  %.not52 = icmp eq i32 %34, 0
  br i1 %.not52, label %35, label %39

35:                                               ; preds = %31
  %36 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #2
  %37 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %27) #2
  store i8 88, ptr %37, align 1, !tbaa !5
  store i8 0, ptr @up, align 1, !tbaa !10
  store i8 1, ptr @dir, align 1, !tbaa !10
  %38 = trunc nsw i64 %27 to i32
  tail call void @_Z3dfsii(i32 noundef %0, i32 noundef %38)
  br label %39

39:                                               ; preds = %35, %31, %26, %19
  %40 = load i8, ptr @dir, align 1, !tbaa !10, !range !12, !noundef !13
  %41 = trunc nuw i8 %40 to i1
  br i1 %41, label %46, label %42

42:                                               ; preds = %39
  %43 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %5) #2
  %44 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %indvars.iv) #2
  store i8 88, ptr %44, align 1, !tbaa !5
  %45 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %4, i32 noundef %45)
  br label %46

46:                                               ; preds = %42, %39
  %47 = load i8, ptr @up, align 1, !tbaa !10, !range !12, !noundef !13
  %48 = trunc nuw i8 %47 to i1
  %brmerge = or i1 %7, %48
  br i1 %brmerge, label %57, label %49

49:                                               ; preds = %46
  %50 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %8) #2
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %indvars.iv) #2
  %52 = load i32, ptr %51, align 4, !tbaa !8
  %.not53 = icmp eq i32 %52, 0
  br i1 %.not53, label %53, label %57

53:                                               ; preds = %49
  %54 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %8) #2
  %55 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %indvars.iv) #2
  store i8 88, ptr %55, align 1, !tbaa !5
  store i8 1, ptr @up, align 1, !tbaa !10
  store i8 0, ptr @lef, align 1, !tbaa !10
  %56 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %6, i32 noundef %56)
  br label %57

57:                                               ; preds = %46, %53, %49
  %58 = load i8, ptr @up, align 1, !tbaa !10, !range !12, !noundef !13
  %59 = trunc nuw i8 %58 to i1
  br i1 %59, label %65, label %60

60:                                               ; preds = %57
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #2
  %62 = add nsw i64 %indvars.iv, 1
  %63 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %62) #2
  store i8 88, ptr %63, align 1, !tbaa !5
  %64 = trunc nsw i64 %62 to i32
  tail call void @_Z3dfsii(i32 noundef %0, i32 noundef %64)
  br label %65

65:                                               ; preds = %60, %57
  %66 = load i8, ptr @lef, align 1, !tbaa !10, !range !12, !noundef !13
  %67 = trunc nuw i8 %66 to i1
  br i1 %67, label %79, label %68

68:                                               ; preds = %65
  %69 = add nsw i64 %indvars.iv, -1
  %70 = icmp sgt i64 %indvars.iv, 0
  br i1 %70, label %71, label %79

71:                                               ; preds = %68
  %72 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #2
  %73 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %69) #2
  %74 = load i32, ptr %73, align 4, !tbaa !8
  %.not54 = icmp eq i32 %74, 0
  br i1 %.not54, label %75, label %79

75:                                               ; preds = %71
  %76 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #2
  %77 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %69) #2
  store i8 88, ptr %77, align 1, !tbaa !5
  store i8 0, ptr @down, align 1, !tbaa !10
  store i8 1, ptr @lef, align 1, !tbaa !10
  %78 = trunc nsw i64 %69 to i32
  tail call void @_Z3dfsii(i32 noundef %0, i32 noundef %78)
  br label %79

79:                                               ; preds = %75, %71, %68, %65
  %80 = load i8, ptr @lef, align 1, !tbaa !10, !range !12, !noundef !13
  %81 = trunc nuw i8 %80 to i1
  br i1 %81, label %86, label %82

82:                                               ; preds = %79
  %83 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %9) #2
  %84 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %indvars.iv) #2
  store i8 88, ptr %84, align 1, !tbaa !5
  %85 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %6, i32 noundef %85)
  br label %86

86:                                               ; preds = %82, %79
  %87 = load i8, ptr @down, align 1, !tbaa !10, !range !12, !noundef !13
  %88 = trunc nuw i8 %87 to i1
  br i1 %88, label %101, label %89

89:                                               ; preds = %86
  %90 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %91 = trunc i64 %90 to i32
  %92 = icmp slt i32 %4, %91
  br i1 %92, label %93, label %101

93:                                               ; preds = %89
  %94 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %5) #2
  %95 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %94, i64 noundef %indvars.iv) #2
  %96 = load i32, ptr %95, align 4, !tbaa !8
  %.not55 = icmp eq i32 %96, 0
  br i1 %.not55, label %97, label %101

97:                                               ; preds = %93
  %98 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %5) #2
  %99 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %indvars.iv) #2
  store i8 88, ptr %99, align 1, !tbaa !5
  store i8 0, ptr @dir, align 1, !tbaa !10
  store i8 1, ptr @down, align 1, !tbaa !10
  %100 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %4, i32 noundef %100)
  br label %101

101:                                              ; preds = %97, %93, %89, %86
  %102 = load i8, ptr @down, align 1, !tbaa !10, !range !12, !noundef !13
  %103 = trunc nuw i8 %102 to i1
  br i1 %103, label %107, label %104

104:                                              ; preds = %101
  %105 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #2
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %106 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %indvars.iv.next) #2
  store i8 88, ptr %106, align 1, !tbaa !5
  br label %tailrecurse

107:                                              ; preds = %101, %tailrecurse
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !6, i64 0}
!12 = !{i8 0, i8 2}
!13 = !{}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,LICMPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass