; LLVM IR from turi-code/SFrame :: oss_src/graphlab/scheduler/sweep_scheduler.ll (ZN8graphlab15sweep_scheduler8get_nextEmRm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.graphlab::sweep_scheduler" = type { %"class.graphlab::ischeduler", i64, i64, i8, %"class.graphlab::atomic", i64, i64, %"class.std::vector.8", %"class.graphlab::dense_bitset", %"class.std::__cxx11::basic_string" }
%"class.graphlab::ischeduler" = type { ptr }
%"class.graphlab::atomic" = type { %"class.graphlab::graphlab_impl::atomic_impl" }
%"class.graphlab::graphlab_impl::atomic_impl" = type { i64 }
%"class.std::vector.8" = type { %"struct.std::_Vector_base.9" }
%"struct.std::_Vector_base.9" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.graphlab::dense_bitset" = type { ptr, i64, i64 }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN8graphlab15sweep_scheduler8get_nextEmRm(ptr noundef nonnull align 8 dereferenceable(136) %0, i64 noundef %1, ptr noundef nonnull align 8 dereferenceable(8) %2) unnamed_addr #2 align 2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  %14 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #6
  %15 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 2
  %16 = load i64, ptr %15, align 8, !tbaa !11
  %17 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 1
  %18 = load i64, ptr %17, align 8, !tbaa !24
  %19 = udiv i64 %16, %18
  %20 = add i64 %19, 1
  store i64 %20, ptr %8, align 8, !tbaa !9
  %21 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 3
  %22 = load i8, ptr %21, align 8, !tbaa !25, !range !26, !noundef !27
  %23 = trunc i8 %22 to i1
  br i1 %23, label %24, label %34

24:                                               ; preds = %3
  %25 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 4
  %26 = call noundef i64 @_ZNK8graphlab13graphlab_impl11atomic_implImLb1EEcvmEv(ptr noundef nonnull align 8 dereferenceable(8) %25)
  %27 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 2
  %28 = load i64, ptr %27, align 8, !tbaa !11
  %29 = udiv i64 %26, %28
  %30 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 5
  %31 = load i64, ptr %30, align 8, !tbaa !28
  %32 = icmp uge i64 %29, %31
  br i1 %32, label %33, label %34

33:                                               ; preds = %24
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %81

34:                                               ; preds = %24, %3
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #6
  %35 = load i64, ptr %6, align 8, !tbaa !9
  %36 = call noundef i64 @_ZN8graphlab15sweep_scheduler17get_and_inc_indexEm(ptr noundef nonnull align 8 dereferenceable(136) %14, i64 noundef %35)
  store i64 %36, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  store i64 0, ptr %11, align 8, !tbaa !9
  br label %37

37:                                               ; preds = %73, %34
  %38 = load i64, ptr %11, align 8, !tbaa !9
  %39 = load i64, ptr %8, align 8, !tbaa !9
  %40 = icmp ule i64 %38, %39
  br i1 %40, label %42, label %41

41:                                               ; preds = %37
  store i32 2, ptr %9, align 4
  br label %78

42:                                               ; preds = %37
  %43 = load i64, ptr %10, align 8, !tbaa !9
  %44 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 2
  %45 = load i64, ptr %44, align 8, !tbaa !11
  %46 = icmp uge i64 %43, %45
  %47 = zext i1 %46 to i64
  %48 = call i64 @llvm.expect.i64(i64 %47, i64 0)
  %49 = icmp ne i64 %48, 0
  br i1 %49, label %50, label %51

50:                                               ; preds = %42
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %78

51:                                               ; preds = %42
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %52 = load i64, ptr %10, align 8, !tbaa !9
  %53 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 6
  %54 = load i64, ptr %53, align 8, !tbaa !29
  %55 = mul i64 %52, %54
  %56 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 2
  %57 = load i64, ptr %56, align 8, !tbaa !11
  %58 = urem i64 %55, %57
  store i64 %58, ptr %12, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #6
  %59 = getelementptr inbounds %"class.graphlab::sweep_scheduler", ptr %14, i32 0, i32 8
  %60 = load i64, ptr %12, align 8, !tbaa !9
  %61 = call noundef zeroext i1 @_ZN8graphlab12dense_bitset9clear_bitEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %60)
  %62 = zext i1 %61 to i8
  store i8 %62, ptr %13, align 1, !tbaa !30
  br label %63

63:                                               ; preds = %51
  %64 = load i8, ptr %13, align 1, !tbaa !30, !range !26, !noundef !27
  %65 = trunc i8 %64 to i1
  br i1 %65, label %66, label %69

66:                                               ; preds = %63
  %67 = load i64, ptr %12, align 8, !tbaa !9
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  store i64 %67, ptr %68, align 8, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %70

69:                                               ; preds = %63
  store i32 0, ptr %9, align 4
  br label %70

70:                                               ; preds = %69, %66
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  %71 = load i32, ptr %9, align 4
  switch i32 %71, label %78 [
    i32 0, label %72
  ]

72:                                               ; preds = %70
  br label %73

73:                                               ; preds = %72
  %74 = load i64, ptr %6, align 8, !tbaa !9
  %75 = call noundef i64 @_ZN8graphlab15sweep_scheduler17get_and_inc_indexEm(ptr noundef nonnull align 8 dereferenceable(136) %14, i64 noundef %74)
  store i64 %75, ptr %10, align 8, !tbaa !9
  %76 = load i64, ptr %11, align 8, !tbaa !9
  %77 = add i64 %76, 1
  store i64 %77, ptr %11, align 8, !tbaa !9
  br label %37, !llvm.loop !31

78:                                               ; preds = %70, %50, %41
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #6
  %79 = load i32, ptr %9, align 4
  switch i32 %79, label %81 [
    i32 2, label %80
  ]

80:                                               ; preds = %78
  store i32 1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %81

81:                                               ; preds = %80, %78, %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #6
  %82 = load i32, ptr %4, align 4
  ret i32 %82
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK8graphlab13graphlab_impl11atomic_implImLb1EEcvmEv(ptr noundef nonnull align 8 dereferenceable(8)) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZN8graphlab15sweep_scheduler17get_and_inc_indexEm(ptr noundef nonnull align 8 dereferenceable(136), i64 noundef) #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN8graphlab12dense_bitset9clear_bitEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #5 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"_ZTSN8graphlab15sweep_schedulerE", !13, i64 0, !10, i64 8, !10, i64 16, !14, i64 24, !15, i64 32, !10, i64 40, !10, i64 48, !17, i64 56, !21, i64 80, !22, i64 104}
!13 = !{!"_ZTSN8graphlab10ischedulerE"}
!14 = !{!"bool", !7, i64 0}
!15 = !{!"_ZTSN8graphlab6atomicImEE", !16, i64 0}
!16 = !{!"_ZTSN8graphlab13graphlab_impl11atomic_implImLb1EEE", !10, i64 0}
!17 = !{!"_ZTSSt6vectorImSaImEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseImSaImEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSN8graphlab12dense_bitsetE", !6, i64 0, !10, i64 8, !10, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !23, i64 0, !10, i64 8, !7, i64 16}
!23 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!24 = !{!12, !10, i64 8}
!25 = !{!12, !14, i64 24}
!26 = !{i8 0, i8 2}
!27 = !{}
!28 = !{!12, !10, i64 40}
!29 = !{!12, !10, i64 48}
!30 = !{!14, !14, i64 0}
!31 = distinct !{!31, !32}
!32 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN8graphlab15sweep_scheduler8get_nextEmRm(ptr noundef nonnull align 8 dereferenceable(136) %0, i64 noundef %1, ptr nocapture noundef nonnull writeonly align 8 dereferenceable(8) %2) unnamed_addr #0 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  %7 = load i64, ptr %6, align 8, !tbaa !22
  %8 = udiv i64 %5, %7
  %9 = add i64 %8, 1
  %10 = getelementptr inbounds i8, ptr %0, i64 24
  %11 = load i8, ptr %10, align 8, !tbaa !23, !range !24, !noundef !25
  %12 = trunc nuw i8 %11 to i1
  br i1 %12, label %13, label %20

13:                                               ; preds = %3
  %14 = getelementptr inbounds i8, ptr %0, i64 32
  %15 = tail call noundef i64 @_ZNK8graphlab13graphlab_impl11atomic_implImLb1EEcvmEv(ptr noundef nonnull align 8 dereferenceable(8) %14)
  %16 = load i64, ptr %4, align 8, !tbaa !5
  %17 = udiv i64 %15, %16
  %18 = getelementptr inbounds i8, ptr %0, i64 40
  %19 = load i64, ptr %18, align 8, !tbaa !26
  %.not = icmp ult i64 %17, %19
  br i1 %.not, label %20, label %.loopexit

20:                                               ; preds = %13, %3
  %21 = tail call noundef i64 @_ZN8graphlab15sweep_scheduler17get_and_inc_indexEm(ptr noundef nonnull align 8 dereferenceable(136) %0, i64 noundef %1)
  %22 = getelementptr inbounds i8, ptr %0, i64 48
  %23 = getelementptr inbounds i8, ptr %0, i64 80
  br label %24

24:                                               ; preds = %20, %.critedge
  %.01723 = phi i64 [ 0, %20 ], [ %33, %.critedge ]
  %.01822 = phi i64 [ %21, %20 ], [ %32, %.critedge ]
  %25 = load i64, ptr %4, align 8, !tbaa !5
  %.not21 = icmp ult i64 %.01822, %25
  br i1 %.not21, label %26, label %.loopexit, !prof !27

26:                                               ; preds = %24
  %27 = load i64, ptr %22, align 8, !tbaa !28
  %28 = mul i64 %27, %.01822
  %29 = urem i64 %28, %25
  %30 = tail call noundef zeroext i1 @_ZN8graphlab12dense_bitset9clear_bitEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %29)
  br i1 %30, label %31, label %.critedge

31:                                               ; preds = %26
  store i64 %29, ptr %2, align 8, !tbaa !29
  br label %.loopexit

.critedge:                                        ; preds = %26
  %32 = tail call noundef i64 @_ZN8graphlab15sweep_scheduler17get_and_inc_indexEm(ptr noundef nonnull align 8 dereferenceable(136) %0, i64 noundef %1)
  %33 = add i64 %.01723, 1
  %.not20 = icmp ugt i64 %33, %9
  br i1 %.not20, label %.loopexit, label %24, !llvm.loop !30

.loopexit:                                        ; preds = %.critedge, %24, %31, %13
  %.3 = phi i32 [ 1, %13 ], [ 0, %31 ], [ 1, %24 ], [ 1, %.critedge ]
  ret i32 %.3
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK8graphlab13graphlab_impl11atomic_implImLb1EEcvmEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZN8graphlab15sweep_scheduler17get_and_inc_indexEm(ptr noundef nonnull align 8 dereferenceable(136), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN8graphlab12dense_bitset9clear_bitEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 16}
!6 = !{!"_ZTSN8graphlab15sweep_schedulerE", !7, i64 0, !8, i64 8, !8, i64 16, !11, i64 24, !12, i64 32, !8, i64 40, !8, i64 48, !14, i64 56, !19, i64 80, !20, i64 104}
!7 = !{!"_ZTSN8graphlab10ischedulerE"}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"bool", !9, i64 0}
!12 = !{!"_ZTSN8graphlab6atomicImEE", !13, i64 0}
!13 = !{!"_ZTSN8graphlab13graphlab_impl11atomic_implImLb1EEE", !8, i64 0}
!14 = !{!"_ZTSSt6vectorImSaImEE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseImSaImEE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseImSaImEE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseImSaImEE17_Vector_impl_dataE", !18, i64 0, !18, i64 8, !18, i64 16}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!"_ZTSN8graphlab12dense_bitsetE", !18, i64 0, !8, i64 8, !8, i64 16}
!20 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !21, i64 0, !8, i64 8, !9, i64 16}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !18, i64 0}
!22 = !{!6, !8, i64 8}
!23 = !{!6, !11, i64 24}
!24 = !{i8 0, i8 2}
!25 = !{}
!26 = !{!6, !8, i64 40}
!27 = !{!"branch_weights", !"expected", i32 2000, i32 1}
!28 = !{!6, !8, i64 48}
!29 = !{!8, !8, i64 0}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LowerExpectIntrinsicPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass