; LLVM IR from tum-i4/obfuscation-benchmarks :: tigress-generated-programs (RandomFunc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @RandomFunc(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1 x i32], align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds i32, ptr %9, i64 0
  %11 = load i32, ptr %10, align 4, !tbaa !9
  %12 = zext i32 %11 to i64
  %13 = add i64 %12, 51238316
  %14 = add i64 %13, 274866410
  %15 = trunc i64 %14 to i32
  %16 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 0
  store i32 %15, ptr %16, align 4, !tbaa !9
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %67, %2
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = zext i32 %18 to i64
  %20 = icmp ult i64 %19, 1
  br i1 %20, label %21, label %72

21:                                               ; preds = %17
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %26, %21
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = zext i32 %23 to i64
  %25 = icmp ult i64 %24, 1
  br i1 %25, label %26, label %67

26:                                               ; preds = %22
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = zext i32 %27 to i64
  %29 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %28
  %30 = getelementptr inbounds i8, ptr %29, i64 1
  %31 = load i8, ptr %30, align 1, !tbaa !11
  store i8 %31, ptr %8, align 1, !tbaa !11
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = zext i32 %32 to i64
  %34 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %33
  %35 = getelementptr inbounds i8, ptr %34, i64 0
  %36 = load i8, ptr %35, align 1, !tbaa !11
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = zext i32 %37 to i64
  %39 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %38
  %40 = getelementptr inbounds i8, ptr %39, i64 1
  store i8 %36, ptr %40, align 1, !tbaa !11
  %41 = load i8, ptr %8, align 1, !tbaa !11
  %42 = load i32, ptr %7, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  %44 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %43
  %45 = getelementptr inbounds i8, ptr %44, i64 0
  store i8 %41, ptr %45, align 1, !tbaa !11
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = zext i32 %46 to i64
  %48 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %47
  %49 = getelementptr inbounds i8, ptr %48, i64 3
  %50 = load i8, ptr %49, align 1, !tbaa !11
  store i8 %50, ptr %8, align 1, !tbaa !11
  %51 = load i32, ptr %7, align 4, !tbaa !9
  %52 = zext i32 %51 to i64
  %53 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %52
  %54 = getelementptr inbounds i8, ptr %53, i64 1
  %55 = load i8, ptr %54, align 1, !tbaa !11
  %56 = load i32, ptr %7, align 4, !tbaa !9
  %57 = zext i32 %56 to i64
  %58 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %57
  %59 = getelementptr inbounds i8, ptr %58, i64 3
  store i8 %55, ptr %59, align 1, !tbaa !11
  %60 = load i8, ptr %8, align 1, !tbaa !11
  %61 = load i32, ptr %7, align 4, !tbaa !9
  %62 = zext i32 %61 to i64
  %63 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 %62
  %64 = getelementptr inbounds i8, ptr %63, i64 1
  store i8 %60, ptr %64, align 1, !tbaa !11
  %65 = load i32, ptr %6, align 4, !tbaa !9
  %66 = add i32 %65, 1
  store i32 %66, ptr %6, align 4, !tbaa !9
  br label %22, !llvm.loop !12

67:                                               ; preds = %22
  %68 = load i32, ptr %7, align 4, !tbaa !9
  %69 = zext i32 %68 to i64
  %70 = add i64 %69, 2
  %71 = trunc i64 %70 to i32
  store i32 %71, ptr %7, align 4, !tbaa !9
  br label %17, !llvm.loop !14

72:                                               ; preds = %17
  %73 = getelementptr inbounds [1 x i32], ptr %5, i64 0, i64 0
  %74 = load i32, ptr %73, align 4, !tbaa !9
  %75 = zext i32 %74 to i64
  %76 = add i64 %75, 334155543
  %77 = trunc i64 %76 to i32
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  %79 = getelementptr inbounds i32, ptr %78, i64 0
  store i32 %77, ptr %79, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @RandomFunc(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
.critedge:
  %2 = load i32, ptr %0, align 4, !tbaa !5
  %3 = add i32 %2, 326104726
  %.sroa.6.0.extract.shift = lshr i32 %3, 8
  %.sroa.920.0.insert.ext = shl i32 %3, 24
  %.sroa.9.0.insert.ext = and i32 %3, 16711680
  %4 = lshr i32 %3, 16
  %.sroa.6.0.insert.shift = and i32 %4, 65280
  %.sroa.0.0.insert.ext = and i32 %.sroa.6.0.extract.shift, 255
  %.sroa.9.0.insert.insert = add nuw nsw i32 %.sroa.9.0.insert.ext, 334155543
  %.sroa.6.0.insert.insert = add i32 %.sroa.9.0.insert.insert, %.sroa.920.0.insert.ext
  %.sroa.0.0.insert.insert = add nuw nsw i32 %.sroa.6.0.insert.insert, %.sroa.0.0.insert.ext
  %5 = add i32 %.sroa.0.0.insert.insert, %.sroa.6.0.insert.shift
  store i32 %5, ptr %1, align 4, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass