; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1500/main.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@lazy = external dso_local global %"class.std::vector", align 8
@st = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4lefti(i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5righti(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6middleii(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #3 {
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %16) #4
  %18 = load i64, ptr %17, align 8, !tbaa !9
  %19 = icmp ne i64 %18, 0
  br i1 %19, label %20, label %64

20:                                               ; preds = %5
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %22) #4
  %24 = load i64, ptr %23, align 8, !tbaa !9
  %25 = load i32, ptr %9, align 4, !tbaa !5
  %26 = load i32, ptr %8, align 4, !tbaa !5
  %27 = sub nsw i32 %25, %26
  %28 = add nsw i32 %27, 1
  %29 = sext i32 %28 to i64
  %30 = mul nsw i64 %24, %29
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %32) #4
  %34 = load i64, ptr %33, align 8, !tbaa !9
  %35 = add nsw i64 %34, %30
  store i64 %35, ptr %33, align 8, !tbaa !9
  %36 = load i32, ptr %8, align 4, !tbaa !5
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = icmp ne i32 %36, %37
  br i1 %38, label %39, label %60

39:                                               ; preds = %20
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %41) #4
  %43 = load i64, ptr %42, align 8, !tbaa !9
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = call noundef i32 @_Z4lefti(i32 noundef %44)
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %46) #4
  %48 = load i64, ptr %47, align 8, !tbaa !9
  %49 = add nsw i64 %48, %43
  store i64 %49, ptr %47, align 8, !tbaa !9
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %51) #4
  %53 = load i64, ptr %52, align 8, !tbaa !9
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = call noundef i32 @_Z5righti(i32 noundef %54)
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %56) #4
  %58 = load i64, ptr %57, align 8, !tbaa !9
  %59 = add nsw i64 %58, %53
  store i64 %59, ptr %57, align 8, !tbaa !9
  br label %60

60:                                               ; preds = %39, %20
  %61 = load i32, ptr %7, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %62) #4
  store i64 0, ptr %63, align 8, !tbaa !9
  br label %64

64:                                               ; preds = %60, %5
  %65 = load i32, ptr %8, align 4, !tbaa !5
  %66 = load i32, ptr %9, align 4, !tbaa !5
  %67 = icmp sgt i32 %65, %66
  br i1 %67, label %76, label %68

68:                                               ; preds = %64
  %69 = load i32, ptr %8, align 4, !tbaa !5
  %70 = load i32, ptr %11, align 4, !tbaa !5
  %71 = icmp sgt i32 %69, %70
  br i1 %71, label %76, label %72

72:                                               ; preds = %68
  %73 = load i32, ptr %9, align 4, !tbaa !5
  %74 = load i32, ptr %10, align 4, !tbaa !5
  %75 = icmp slt i32 %73, %74
  br i1 %75, label %76, label %77

76:                                               ; preds = %72, %68, %64
  store i64 0, ptr %6, align 8
  br label %112

77:                                               ; preds = %72
  %78 = load i32, ptr %10, align 4, !tbaa !5
  %79 = load i32, ptr %8, align 4, !tbaa !5
  %80 = icmp sle i32 %78, %79
  br i1 %80, label %81, label %90

81:                                               ; preds = %77
  %82 = load i32, ptr %9, align 4, !tbaa !5
  %83 = load i32, ptr %11, align 4, !tbaa !5
  %84 = icmp sle i32 %82, %83
  br i1 %84, label %85, label %90

85:                                               ; preds = %81
  %86 = load i32, ptr %7, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %87) #4
  %89 = load i64, ptr %88, align 8, !tbaa !9
  store i64 %89, ptr %6, align 8
  br label %112

90:                                               ; preds = %81, %77
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %91 = load i32, ptr %8, align 4, !tbaa !5
  %92 = load i32, ptr %9, align 4, !tbaa !5
  %93 = call noundef i32 @_Z6middleii(i32 noundef %91, i32 noundef %92)
  store i32 %93, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #4
  %94 = load i32, ptr %7, align 4, !tbaa !5
  %95 = call noundef i32 @_Z4lefti(i32 noundef %94)
  %96 = load i32, ptr %8, align 4, !tbaa !5
  %97 = load i32, ptr %12, align 4, !tbaa !5
  %98 = load i32, ptr %10, align 4, !tbaa !5
  %99 = load i32, ptr %11, align 4, !tbaa !5
  %100 = call noundef i64 @_Z5queryiiiii(i32 noundef %95, i32 noundef %96, i32 noundef %97, i32 noundef %98, i32 noundef %99)
  store i64 %100, ptr %13, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %101 = load i32, ptr %7, align 4, !tbaa !5
  %102 = call noundef i32 @_Z5righti(i32 noundef %101)
  %103 = load i32, ptr %12, align 4, !tbaa !5
  %104 = add nsw i32 %103, 1
  %105 = load i32, ptr %9, align 4, !tbaa !5
  %106 = load i32, ptr %10, align 4, !tbaa !5
  %107 = load i32, ptr %11, align 4, !tbaa !5
  %108 = call noundef i64 @_Z5queryiiiii(i32 noundef %102, i32 noundef %104, i32 noundef %105, i32 noundef %106, i32 noundef %107)
  store i64 %108, ptr %14, align 8, !tbaa !9
  %109 = load i64, ptr %13, align 8, !tbaa !9
  %110 = load i64, ptr %14, align 8, !tbaa !9
  %111 = add nsw i64 %109, %110
  store i64 %111, ptr %6, align 8
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %112

112:                                              ; preds = %90, %85, %76
  %113 = load i64, ptr %6, align 8
  ret i64 %113
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@lazy = external dso_local global %"class.std::vector", align 8
@st = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4lefti(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5righti(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6middleii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %invariant.smin = tail call i32 @llvm.smin.i32(i32 %2, i32 %4)
  %6 = add i32 %2, 1
  %7 = icmp slt i32 %2, %3
  %.not44 = icmp sgt i32 %2, %4
  br label %tailrecurse

tailrecurse:                                      ; preds = %42, %5
  %accumulator.tr = phi i64 [ 0, %5 ], [ %48, %42 ]
  %.tr = phi i32 [ %0, %5 ], [ %46, %42 ]
  %.tr47 = phi i32 [ %1, %5 ], [ %47, %42 ]
  %8 = sext i32 %.tr to i64
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #3
  %10 = load i64, ptr %9, align 8, !tbaa !5
  %.not = icmp eq i64 %10, 0
  br i1 %.not, label %37, label %11

11:                                               ; preds = %tailrecurse
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #3
  %13 = load i64, ptr %12, align 8, !tbaa !5
  %14 = sub i32 %6, %.tr47
  %15 = sext i32 %14 to i64
  %16 = mul nsw i64 %13, %15
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %8) #3
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = add nsw i64 %18, %16
  store i64 %19, ptr %17, align 8, !tbaa !5
  %.not42 = icmp eq i32 %.tr47, %2
  br i1 %.not42, label %35, label %20

20:                                               ; preds = %11
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #3
  %22 = load i64, ptr %21, align 8, !tbaa !5
  %23 = tail call noundef i32 @_Z4lefti(i32 noundef %.tr)
  %24 = sext i32 %23 to i64
  %25 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %24) #3
  %26 = load i64, ptr %25, align 8, !tbaa !5
  %27 = add nsw i64 %26, %22
  store i64 %27, ptr %25, align 8, !tbaa !5
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #3
  %29 = load i64, ptr %28, align 8, !tbaa !5
  %30 = tail call noundef i32 @_Z5righti(i32 noundef %.tr)
  %31 = sext i32 %30 to i64
  %32 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %31) #3
  %33 = load i64, ptr %32, align 8, !tbaa !5
  %34 = add nsw i64 %33, %29
  store i64 %34, ptr %32, align 8, !tbaa !5
  br label %35

35:                                               ; preds = %20, %11
  %36 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #3
  store i64 0, ptr %36, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %35, %tailrecurse
  %or.cond = icmp sgt i32 %.tr47, %invariant.smin
  %or.cond45 = or i1 %7, %or.cond
  br i1 %or.cond45, label %.loopexit, label %38

38:                                               ; preds = %37
  %.not43 = icmp slt i32 %.tr47, %3
  %or.cond46 = or i1 %.not44, %.not43
  br i1 %or.cond46, label %42, label %39

39:                                               ; preds = %38
  %40 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %8) #3
  %41 = load i64, ptr %40, align 8, !tbaa !5
  br label %.loopexit

42:                                               ; preds = %38
  %43 = tail call noundef i32 @_Z6middleii(i32 noundef %.tr47, i32 noundef %2)
  %44 = tail call noundef i32 @_Z4lefti(i32 noundef %.tr)
  %45 = tail call noundef i64 @_Z5queryiiiii(i32 noundef %44, i32 noundef %.tr47, i32 noundef %43, i32 noundef %3, i32 noundef %4)
  %46 = tail call noundef i32 @_Z5righti(i32 noundef %.tr)
  %47 = add nsw i32 %43, 1
  %48 = add nsw i64 %45, %accumulator.tr
  br label %tailrecurse

.loopexit:                                        ; preds = %37, %39
  %.0 = phi i64 [ %41, %39 ], [ 0, %37 ]
  %accumulator.ret.tr = add nsw i64 %.0, %accumulator.tr
  ret i64 %accumulator.ret.tr
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass