; LLVM IR from devicehive/esp8266-firmware :: esp-utils/common/serialport_posix.ll (ZN10SerialPort12write_nativeEPKvj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.SerialPort = type <{ ptr, i32, i8, i8, [2 x i8], ptr, i32, i8, [3 x i8], i32, [256 x i8], [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN10SerialPort12write_nativeEPKvj(ptr noundef nonnull align 8 dereferenceable(292) %0, ptr noundef %1, i32 noundef %2) #1 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %9 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  store i64 0, ptr %8, align 8, !tbaa !11
  br label %10

10:                                               ; preds = %39, %3
  %11 = getelementptr inbounds %class.SerialPort, ptr %9, i32 0, i32 1
  %12 = load i32, ptr %11, align 8, !tbaa !13
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = load i64, ptr %8, align 8, !tbaa !11
  %15 = getelementptr inbounds i8, ptr %13, i64 %14
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = zext i32 %16 to i64
  %18 = load i64, ptr %8, align 8, !tbaa !11
  %19 = sub i64 %17, %18
  %20 = call i64 @write(i32 noundef %12, ptr noundef %15, i64 noundef %19)
  store i64 %20, ptr %7, align 8, !tbaa !11
  %21 = load i64, ptr %7, align 8, !tbaa !11
  %22 = load i64, ptr %8, align 8, !tbaa !11
  %23 = add i64 %22, %21
  store i64 %23, ptr %8, align 8, !tbaa !11
  %24 = load i64, ptr %7, align 8, !tbaa !11
  %25 = icmp ne i64 %24, 0
  br i1 %25, label %26, label %30

26:                                               ; preds = %10
  %27 = getelementptr inbounds %class.SerialPort, ptr %9, i32 0, i32 1
  %28 = load i32, ptr %27, align 8, !tbaa !13
  %29 = call i32 @tcdrain(i32 noundef %28)
  br label %30

30:                                               ; preds = %26, %10
  br label %31

31:                                               ; preds = %30
  %32 = load i64, ptr %7, align 8, !tbaa !11
  %33 = icmp sgt i64 %32, 0
  br i1 %33, label %34, label %39

34:                                               ; preds = %31
  %35 = load i64, ptr %8, align 8, !tbaa !11
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = zext i32 %36 to i64
  %38 = icmp ult i64 %35, %37
  br label %39

39:                                               ; preds = %34, %31
  %40 = phi i1 [ false, %31 ], [ %38, %34 ]
  br i1 %40, label %10, label %41, !llvm.loop !16

41:                                               ; preds = %39
  %42 = load i64, ptr %8, align 8, !tbaa !11
  %43 = trunc i64 %42 to i32
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret i32 %43
}

declare i64 @write(i32 noundef, ptr noundef, i64 noundef) #2

declare i32 @tcdrain(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !10, i64 8}
!14 = !{!"_ZTS10SerialPort", !10, i64 8, !15, i64 12, !15, i64 13, !6, i64 16, !10, i64 24, !15, i64 28, !10, i64 32, !7, i64 36}
!15 = !{!"bool", !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN10SerialPort12write_nativeEPKvj(ptr nocapture noundef nonnull readonly align 8 dereferenceable(292) %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = zext i32 %2 to i64
  br label %6

6:                                                ; preds = %12, %3
  %.0 = phi i64 [ 0, %3 ], [ %11, %12 ]
  %7 = load i32, ptr %4, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %1, i64 %.0
  %9 = sub nsw i64 %5, %.0
  %10 = tail call i64 @write(i32 noundef %7, ptr noundef %8, i64 noundef %9)
  %11 = add i64 %10, %.0
  %.not = icmp eq i64 %10, 0
  br i1 %.not, label %.thread, label %12

12:                                               ; preds = %6
  %13 = load i32, ptr %4, align 8, !tbaa !5
  %14 = tail call i32 @tcdrain(i32 noundef %13)
  %15 = icmp sgt i64 %10, 0
  %16 = icmp ult i64 %11, %5
  %17 = and i1 %15, %16
  br i1 %17, label %6, label %.thread, !llvm.loop !12

.thread:                                          ; preds = %6, %12
  %18 = trunc i64 %11 to i32
  ret i32 %18
}

; Function Attrs: nofree
declare noundef i64 @write(i32 noundef, ptr nocapture noundef readonly, i64 noundef) local_unnamed_addr #1

declare i32 @tcdrain(i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS10SerialPort", !7, i64 8, !10, i64 12, !10, i64 13, !11, i64 16, !7, i64 24, !10, i64 28, !7, i64 32, !8, i64 36}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass