; LLVM IR from tomoyasuzuki/kvmm :: uart (emulate_uart_portr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.uart = type { i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, ptr }
%struct.vcpu = type { i32, ptr, %struct.kvm_sregs, %struct.kvm_regs }
%struct.kvm_sregs = type { %struct.kvm_segment, %struct.kvm_segment, %struct.kvm_segment, %struct.kvm_segment, %struct.kvm_segment, %struct.kvm_segment, %struct.kvm_segment, %struct.kvm_segment, %struct.kvm_dtable, %struct.kvm_dtable, i64, i64, i64, i64, i64, i64, i64, [4 x i64] }
%struct.kvm_segment = type { i64, i32, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
%struct.kvm_dtable = type { i64, i16, [3 x i16] }
%struct.kvm_regs = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }
%struct.kvm_run = type { i8, i8, [6 x i8], i32, i8, i8, i16, i64, i64, %union.anon, i64, i64, %union.anon.27 }
%union.anon = type { %struct.anon.12 }
%struct.anon.12 = type { [32 x i64] }
%union.anon.27 = type { %struct.kvm_sync_regs, [1528 x i8] }
%struct.kvm_sync_regs = type { %struct.kvm_regs, %struct.kvm_sregs, %struct.kvm_vcpu_events }
%struct.kvm_vcpu_events = type { %struct.anon.28, %struct.anon.29, %struct.anon.30, i32, i32, %struct.anon.31, [27 x i8], i8, i64 }
%struct.anon.28 = type { i8, i8, i8, i8, i32 }
%struct.anon.29 = type { i8, i8, i8, i8 }
%struct.anon.30 = type { i8, i8, i8, i8 }
%struct.anon.31 = type { i8, i8, i8, i8 }
%struct.anon.2 = type { i8, i8, i16, i32, i64 }

@uart = external dso_local global ptr, align 8

; Function Attrs: nounwind uwtable
declare dso_local void @set_uart_data_reg() #0

; Function Attrs: nounwind uwtable
declare dso_local void @clear_uart_data_reg() #0

; Function Attrs: nounwind uwtable
define dso_local void @emulate_uart_portr(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load i32, ptr %4, align 4, !tbaa !9
  switch i32 %5, label %53 [
    i32 1016, label %6
    i32 1021, label %39
  ]

6:                                                ; preds = %2
  call void @set_uart_data_reg()
  %7 = load ptr, ptr @uart, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.uart, ptr %7, i32 0, i32 0
  %9 = load i8, ptr %8, align 8, !tbaa !11
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.vcpu, ptr %10, i32 0, i32 1
  %12 = load ptr, ptr %11, align 8, !tbaa !13
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.vcpu, ptr %13, i32 0, i32 1
  %15 = load ptr, ptr %14, align 8, !tbaa !13
  %16 = getelementptr inbounds %struct.kvm_run, ptr %15, i32 0, i32 9
  %17 = getelementptr inbounds %struct.anon.2, ptr %16, i32 0, i32 4
  %18 = load i64, ptr %17, align 8, !tbaa !21
  %19 = getelementptr inbounds i8, ptr %12, i64 %18
  store i8 %9, ptr %19, align 1, !tbaa !21
  call void @clear_uart_data_reg()
  %20 = load ptr, ptr @uart, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.uart, ptr %20, i32 0, i32 9
  %22 = load i32, ptr %21, align 4, !tbaa !22
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %31

24:                                               ; preds = %6
  %25 = load ptr, ptr @uart, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.uart, ptr %25, i32 0, i32 5
  %27 = load i8, ptr %26, align 1, !tbaa !23
  %28 = zext i8 %27 to i32
  %29 = and i32 %28, -2
  %30 = trunc i32 %29 to i8
  store i8 %30, ptr %26, align 1, !tbaa !23
  br label %38

31:                                               ; preds = %6
  %32 = load ptr, ptr @uart, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.uart, ptr %32, i32 0, i32 5
  %34 = load i8, ptr %33, align 1, !tbaa !23
  %35 = zext i8 %34 to i32
  %36 = or i32 %35, 1
  %37 = trunc i32 %36 to i8
  store i8 %37, ptr %33, align 1, !tbaa !23
  br label %38

38:                                               ; preds = %31, %24
  br label %54

39:                                               ; preds = %2
  %40 = load ptr, ptr @uart, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.uart, ptr %40, i32 0, i32 5
  %42 = load i8, ptr %41, align 1, !tbaa !23
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.vcpu, ptr %43, i32 0, i32 1
  %45 = load ptr, ptr %44, align 8, !tbaa !13
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.vcpu, ptr %46, i32 0, i32 1
  %48 = load ptr, ptr %47, align 8, !tbaa !13
  %49 = getelementptr inbounds %struct.kvm_run, ptr %48, i32 0, i32 9
  %50 = getelementptr inbounds %struct.anon.2, ptr %49, i32 0, i32 4
  %51 = load i64, ptr %50, align 8, !tbaa !21
  %52 = getelementptr inbounds i8, ptr %45, i64 %51
  store i8 %42, ptr %52, align 1, !tbaa !21
  br label %54

53:                                               ; preds = %2
  br label %54

54:                                               ; preds = %53, %39, %38
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"uart", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 6, !7, i64 7, !10, i64 8, !10, i64 12, !6, i64 16}
!13 = !{!14, !6, i64 8}
!14 = !{!"vcpu", !10, i64 0, !6, i64 8, !15, i64 16, !20, i64 328}
!15 = !{!"kvm_sregs", !16, i64 0, !16, i64 24, !16, i64 48, !16, i64 72, !16, i64 96, !16, i64 120, !16, i64 144, !16, i64 168, !19, i64 192, !19, i64 208, !17, i64 224, !17, i64 232, !17, i64 240, !17, i64 248, !17, i64 256, !17, i64 264, !17, i64 272, !7, i64 280}
!16 = !{!"kvm_segment", !17, i64 0, !10, i64 8, !18, i64 12, !7, i64 14, !7, i64 15, !7, i64 16, !7, i64 17, !7, i64 18, !7, i64 19, !7, i64 20, !7, i64 21, !7, i64 22, !7, i64 23}
!17 = !{!"long long", !7, i64 0}
!18 = !{!"short", !7, i64 0}
!19 = !{!"kvm_dtable", !17, i64 0, !18, i64 8, !7, i64 10}
!20 = !{!"kvm_regs", !17, i64 0, !17, i64 8, !17, i64 16, !17, i64 24, !17, i64 32, !17, i64 40, !17, i64 48, !17, i64 56, !17, i64 64, !17, i64 72, !17, i64 80, !17, i64 88, !17, i64 96, !17, i64 104, !17, i64 112, !17, i64 120, !17, i64 128, !17, i64 136}
!21 = !{!7, !7, i64 0}
!22 = !{!12, !10, i64 12}
!23 = !{!12, !7, i64 5}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@uart = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
declare dso_local void @set_uart_data_reg() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @clear_uart_data_reg() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @emulate_uart_portr(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 {
  switch i32 %1, label %30 [
    i32 1016, label %3
    i32 1021, label %21
  ]

3:                                                ; preds = %2
  tail call void @set_uart_data_reg()
  %4 = load ptr, ptr @uart, align 8, !tbaa !5
  %5 = load i8, ptr %4, align 8, !tbaa !9
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  %7 = load ptr, ptr %6, align 8, !tbaa !12
  %8 = getelementptr inbounds i8, ptr %7, i64 40
  %9 = load i64, ptr %8, align 8, !tbaa !20
  %10 = getelementptr inbounds i8, ptr %7, i64 %9
  store i8 %5, ptr %10, align 1, !tbaa !20
  tail call void @clear_uart_data_reg()
  %11 = load ptr, ptr @uart, align 8, !tbaa !5
  %12 = getelementptr inbounds i8, ptr %11, i64 12
  %13 = load i32, ptr %12, align 4, !tbaa !21
  %14 = icmp eq i32 %13, 0
  %15 = getelementptr inbounds i8, ptr %11, i64 5
  %16 = load i8, ptr %15, align 1, !tbaa !22
  br i1 %14, label %17, label %19

17:                                               ; preds = %3
  %18 = and i8 %16, -2
  store i8 %18, ptr %15, align 1, !tbaa !22
  br label %30

19:                                               ; preds = %3
  %20 = or i8 %16, 1
  store i8 %20, ptr %15, align 1, !tbaa !22
  br label %30

21:                                               ; preds = %2
  %22 = load ptr, ptr @uart, align 8, !tbaa !5
  %23 = getelementptr inbounds i8, ptr %22, i64 5
  %24 = load i8, ptr %23, align 1, !tbaa !22
  %25 = getelementptr inbounds i8, ptr %0, i64 8
  %26 = load ptr, ptr %25, align 8, !tbaa !12
  %27 = getelementptr inbounds i8, ptr %26, i64 40
  %28 = load i64, ptr %27, align 8, !tbaa !20
  %29 = getelementptr inbounds i8, ptr %26, i64 %28
  store i8 %24, ptr %29, align 1, !tbaa !20
  br label %30

30:                                               ; preds = %2, %17, %19, %21
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 0}
!10 = !{!"uart", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !7, i64 4, !7, i64 5, !7, i64 6, !7, i64 7, !11, i64 8, !11, i64 12, !6, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !6, i64 8}
!13 = !{!"vcpu", !11, i64 0, !6, i64 8, !14, i64 16, !19, i64 328}
!14 = !{!"kvm_sregs", !15, i64 0, !15, i64 24, !15, i64 48, !15, i64 72, !15, i64 96, !15, i64 120, !15, i64 144, !15, i64 168, !18, i64 192, !18, i64 208, !16, i64 224, !16, i64 232, !16, i64 240, !16, i64 248, !16, i64 256, !16, i64 264, !16, i64 272, !7, i64 280}
!15 = !{!"kvm_segment", !16, i64 0, !11, i64 8, !17, i64 12, !7, i64 14, !7, i64 15, !7, i64 16, !7, i64 17, !7, i64 18, !7, i64 19, !7, i64 20, !7, i64 21, !7, i64 22, !7, i64 23}
!16 = !{!"long long", !7, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = !{!"kvm_dtable", !16, i64 0, !17, i64 8, !7, i64 10}
!19 = !{!"kvm_regs", !16, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !16, i64 48, !16, i64 56, !16, i64 64, !16, i64 72, !16, i64 80, !16, i64 88, !16, i64 96, !16, i64 104, !16, i64 112, !16, i64 120, !16, i64 128, !16, i64 136}
!20 = !{!7, !7, i64 0}
!21 = !{!10, !11, i64 12}
!22 = !{!10, !7, i64 5}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass