; LLVM IR from devicehive/esp8266-firmware :: esp-utils/common/serialport_posix.ll (ZN10SerialPort6setDtrEb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.SerialPort = type <{ ptr, i32, i8, i8, [2 x i8], ptr, i32, i8, [3 x i8], i32, [256 x i8], [4 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10SerialPort6setDtrEb(ptr noundef nonnull align 8 dereferenceable(292) %0, i1 noundef zeroext %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %6 = zext i1 %1 to i8
  store i8 %6, ptr %4, align 1, !tbaa !9
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %8 = getelementptr inbounds %class.SerialPort, ptr %7, i32 0, i32 1
  %9 = load i32, ptr %8, align 8, !tbaa !11
  %10 = call i32 (i32, i64, ...) @ioctl(i32 noundef %9, i64 noundef 21525, ptr noundef %5) #3
  %11 = icmp ne i32 %10, -1
  br i1 %11, label %12, label %25

12:                                               ; preds = %2
  %13 = load i8, ptr %4, align 1, !tbaa !9, !range !14, !noundef !15
  %14 = trunc i8 %13 to i1
  br i1 %14, label %15, label %18

15:                                               ; preds = %12
  %16 = load i32, ptr %5, align 4, !tbaa !16
  %17 = or i32 %16, 2
  store i32 %17, ptr %5, align 4, !tbaa !16
  br label %21

18:                                               ; preds = %12
  %19 = load i32, ptr %5, align 4, !tbaa !16
  %20 = and i32 %19, -3
  store i32 %20, ptr %5, align 4, !tbaa !16
  br label %21

21:                                               ; preds = %18, %15
  %22 = getelementptr inbounds %class.SerialPort, ptr %7, i32 0, i32 1
  %23 = load i32, ptr %22, align 8, !tbaa !11
  %24 = call i32 (i32, i64, ...) @ioctl(i32 noundef %23, i64 noundef 21528, ptr noundef %5) #3
  br label %25

25:                                               ; preds = %21, %2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"_ZTS10SerialPort", !13, i64 8, !10, i64 12, !10, i64 13, !6, i64 16, !13, i64 24, !10, i64 28, !13, i64 32, !7, i64 36}
!13 = !{!"int", !7, i64 0}
!14 = !{i8 0, i8 2}
!15 = !{}
!16 = !{!13, !13, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i32 @ioctl(i32 noundef, i64 noundef, ...) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10SerialPort6setDtrEb(ptr nocapture noundef nonnull readonly align 8 dereferenceable(292) %0, i1 noundef zeroext %1) local_unnamed_addr #2 align 2 {
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  %5 = load i32, ptr %4, align 8, !tbaa !5
  %6 = call i32 (i32, i64, ...) @ioctl(i32 noundef %5, i64 noundef 21525, ptr noundef nonnull %3) #3
  %.not = icmp eq i32 %6, -1
  br i1 %.not, label %12, label %7

7:                                                ; preds = %2
  %8 = load i32, ptr %3, align 4
  %9 = and i32 %8, -3
  %masksel = select i1 %1, i32 2, i32 0
  %storemerge = or disjoint i32 %9, %masksel
  store i32 %storemerge, ptr %3, align 4, !tbaa !12
  %10 = load i32, ptr %4, align 8, !tbaa !5
  %11 = call i32 (i32, i64, ...) @ioctl(i32 noundef %10, i64 noundef 21528, ptr noundef nonnull %3) #3
  br label %12

12:                                               ; preds = %7, %2
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  ret void
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS10SerialPort", !7, i64 8, !10, i64 12, !10, i64 13, !11, i64 16, !7, i64 24, !10, i64 28, !7, i64 32, !8, i64 36}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass