; LLVM IR from AnneLivia/Competitive-Programming :: Algorithms/Sort/ShellSort/main.ll (Z10shellSort2RSt6vectorIiSaIiEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10shellSort2RSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  %9 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #2
  %10 = trunc i64 %9 to i32
  %11 = sdiv i32 %10, 2
  store i32 %11, ptr %3, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %74, %1
  %13 = load i32, ptr %3, align 4, !tbaa !9
  %14 = icmp sgt i32 %13, 0
  br i1 %14, label %16, label %15

15:                                               ; preds = %12
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %77

16:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %17 = load i32, ptr %3, align 4, !tbaa !9
  store i32 %17, ptr %5, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %70, %16
  %19 = load i32, ptr %5, align 4, !tbaa !9
  %20 = load ptr, ptr %2, align 8, !tbaa !5
  %21 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #2
  %22 = trunc i64 %21 to i32
  %23 = icmp slt i32 %19, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %18
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %73

25:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = load i32, ptr %5, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #2
  %30 = load i32, ptr %29, align 4, !tbaa !9
  store i32 %30, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %31 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %31, ptr %7, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %60, %25
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = load i32, ptr %3, align 4, !tbaa !9
  %35 = icmp sge i32 %33, %34
  br i1 %35, label %36, label %46

36:                                               ; preds = %32
  %37 = load i32, ptr %6, align 4, !tbaa !9
  %38 = load ptr, ptr %2, align 8, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = load i32, ptr %3, align 4, !tbaa !9
  %41 = sub nsw i32 %39, %40
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %42) #2
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = icmp slt i32 %37, %44
  br label %46

46:                                               ; preds = %36, %32
  %47 = phi i1 [ false, %32 ], [ %45, %36 ]
  br i1 %47, label %48, label %64

48:                                               ; preds = %46
  %49 = load ptr, ptr %2, align 8, !tbaa !5
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = load i32, ptr %3, align 4, !tbaa !9
  %52 = sub nsw i32 %50, %51
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %53) #2
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = load ptr, ptr %2, align 8, !tbaa !5
  %57 = load i32, ptr %7, align 4, !tbaa !9
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58) #2
  store i32 %55, ptr %59, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %48
  %61 = load i32, ptr %3, align 4, !tbaa !9
  %62 = load i32, ptr %7, align 4, !tbaa !9
  %63 = sub nsw i32 %62, %61
  store i32 %63, ptr %7, align 4, !tbaa !9
  br label %32, !llvm.loop !11

64:                                               ; preds = %46
  %65 = load i32, ptr %6, align 4, !tbaa !9
  %66 = load ptr, ptr %2, align 8, !tbaa !5
  %67 = load i32, ptr %7, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %68) #2
  store i32 %65, ptr %69, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %70

70:                                               ; preds = %64
  %71 = load i32, ptr %5, align 4, !tbaa !9
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %5, align 4, !tbaa !9
  br label %18, !llvm.loop !13

73:                                               ; preds = %24
  br label %74

74:                                               ; preds = %73
  %75 = load i32, ptr %3, align 4, !tbaa !9
  %76 = sdiv i32 %75, 2
  store i32 %76, ptr %3, align 4, !tbaa !9
  br label %12, !llvm.loop !14

77:                                               ; preds = %15
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10shellSort2RSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %3 = trunc i64 %2 to i32
  %4 = icmp sgt i32 %3, 1
  br i1 %4, label %.preheader, label %._crit_edge34

.preheader:                                       ; preds = %1, %._crit_edge
  %.02533.in = phi i32 [ %.02533, %._crit_edge ], [ %3, %1 ]
  %.02533 = lshr i32 %.02533.in, 1
  %5 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %6 = trunc i64 %5 to i32
  %7 = icmp slt i32 %.02533, %6
  br i1 %7, label %.lr.ph32.preheader, label %._crit_edge

.lr.ph32.preheader:                               ; preds = %.preheader
  %8 = zext nneg i32 %.02533 to i64
  br label %.lr.ph32

._crit_edge34:                                    ; preds = %._crit_edge, %1
  ret void

._crit_edge:                                      ; preds = %.critedge, %.preheader
  %.not35 = icmp ult i32 %.02533.in, 4
  br i1 %.not35, label %._crit_edge34, label %.preheader, !llvm.loop !5

.lr.ph32:                                         ; preds = %.lr.ph32.preheader, %.critedge
  %indvars.iv = phi i64 [ %8, %.lr.ph32.preheader ], [ %indvars.iv.next, %.critedge ]
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %10 = load i32, ptr %9, align 4, !tbaa !7
  %11 = trunc nuw i64 %indvars.iv to i32
  %.not27 = icmp sgt i32 %.02533, %11
  br i1 %.not27, label %.critedge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph32, %17
  %.028 = phi i32 [ %12, %17 ], [ %11, %.lr.ph32 ]
  %12 = sub nsw i32 %.028, %.02533
  %13 = sext i32 %12 to i64
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %13) #1
  %15 = load i32, ptr %14, align 4, !tbaa !7
  %16 = icmp slt i32 %10, %15
  br i1 %16, label %17, label %.critedge

17:                                               ; preds = %.lr.ph
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %13) #1
  %19 = load i32, ptr %18, align 4, !tbaa !7
  %20 = zext nneg i32 %.028 to i64
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %20) #1
  store i32 %19, ptr %21, align 4, !tbaa !7
  %.not = icmp slt i32 %12, %.02533
  br i1 %.not, label %.critedge, label %.lr.ph, !llvm.loop !11

.critedge:                                        ; preds = %.lr.ph, %17, %.lr.ph32
  %.0.lcssa = phi i32 [ %11, %.lr.ph32 ], [ %12, %17 ], [ %.028, %.lr.ph ]
  %22 = sext i32 %.0.lcssa to i64
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #1
  store i32 %10, ptr %23, align 4, !tbaa !7
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %24 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %25 = trunc i64 %24 to i32
  %26 = trunc nuw i64 %indvars.iv.next to i32
  %27 = icmp slt i32 %26, %25
  br i1 %27, label %.lr.ph32, label %._crit_edge, !llvm.loop !12
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}
!12 = distinct !{!12, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass