; LLVM IR from AnneLivia/Competitive-Programming :: Algorithms/Sort/ShellSort/main.ll (Z10shellsort1RSt6vectorIiSaIiEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10shellsort1RSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 1, ptr %3, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %15, %1
  %9 = load i32, ptr %3, align 4, !tbaa !9
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #3
  %12 = trunc i64 %11 to i32
  %13 = sdiv i32 %12, 3
  %14 = icmp slt i32 %9, %13
  br i1 %14, label %15, label %19

15:                                               ; preds = %8
  %16 = load i32, ptr %3, align 4, !tbaa !9
  %17 = mul nsw i32 3, %16
  %18 = add nsw i32 %17, 1
  store i32 %18, ptr %3, align 4, !tbaa !9
  br label %8, !llvm.loop !11

19:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %20 = load i32, ptr %3, align 4, !tbaa !9
  store i32 %20, ptr %4, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %77, %19
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = icmp sgt i32 %22, 0
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  store i32 4, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %81

25:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %26 = load i32, ptr %3, align 4, !tbaa !9
  store i32 %26, ptr %6, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %72, %25
  %28 = load i32, ptr %6, align 4, !tbaa !9
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %29) #3
  %31 = trunc i64 %30 to i32
  %32 = icmp slt i32 %28, %31
  br i1 %32, label %34, label %33

33:                                               ; preds = %27
  store i32 7, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %76

34:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %35 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %35, ptr %7, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %67, %34
  %37 = load i32, ptr %7, align 4, !tbaa !9
  %38 = icmp sgt i32 %37, 0
  br i1 %38, label %39, label %53

39:                                               ; preds = %36
  %40 = load ptr, ptr %2, align 8, !tbaa !5
  %41 = load i32, ptr %7, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #3
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = load ptr, ptr %2, align 8, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !9
  %47 = load i32, ptr %3, align 4, !tbaa !9
  %48 = sub nsw i32 %46, %47
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %49) #3
  %51 = load i32, ptr %50, align 4, !tbaa !9
  %52 = icmp slt i32 %44, %51
  br label %53

53:                                               ; preds = %39, %36
  %54 = phi i1 [ false, %36 ], [ %52, %39 ]
  br i1 %54, label %56, label %55

55:                                               ; preds = %53
  store i32 10, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %71

56:                                               ; preds = %53
  %57 = load ptr, ptr %2, align 8, !tbaa !5
  %58 = load i32, ptr %7, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #3
  %61 = load ptr, ptr %2, align 8, !tbaa !5
  %62 = load i32, ptr %7, align 4, !tbaa !9
  %63 = load i32, ptr %3, align 4, !tbaa !9
  %64 = sub nsw i32 %62, %63
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %65) #3
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %60, ptr noundef nonnull align 4 dereferenceable(4) %66) #3
  br label %67

67:                                               ; preds = %56
  %68 = load i32, ptr %3, align 4, !tbaa !9
  %69 = load i32, ptr %7, align 4, !tbaa !9
  %70 = sub nsw i32 %69, %68
  store i32 %70, ptr %7, align 4, !tbaa !9
  br label %36, !llvm.loop !13

71:                                               ; preds = %55
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr %3, align 4, !tbaa !9
  %74 = load i32, ptr %6, align 4, !tbaa !9
  %75 = add nsw i32 %74, %73
  store i32 %75, ptr %6, align 4, !tbaa !9
  br label %27, !llvm.loop !14

76:                                               ; preds = %33
  br label %77

77:                                               ; preds = %76
  %78 = load i32, ptr %3, align 4, !tbaa !9
  %79 = add nsw i32 %78, -1
  store i32 %79, ptr %3, align 4, !tbaa !9
  %80 = sdiv i32 %79, 3
  store i32 %80, ptr %3, align 4, !tbaa !9
  store i32 %80, ptr %4, align 4, !tbaa !9
  br label %21, !llvm.loop !15

81:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10shellsort1RSt6vectorIiSaIiEE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %3 = trunc i64 %2 to i32
  %4 = icmp sgt i32 %3, 5
  br i1 %4, label %.lr.ph, label %.preheader27.preheader

.preheader28:                                     ; preds = %.lr.ph
  %5 = icmp sgt i32 %.02629, -1
  br i1 %5, label %.preheader27.preheader, label %._crit_edge35

.preheader27.preheader:                           ; preds = %1, %.preheader28
  %.02534.ph = phi i32 [ 1, %1 ], [ %7, %.preheader28 ]
  br label %.preheader27

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.02629 = phi i32 [ %7, %.lr.ph ], [ 1, %1 ]
  %6 = mul nsw i32 %.02629, 3
  %7 = add nsw i32 %6, 1
  %8 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %9 = trunc i64 %8 to i32
  %10 = sdiv i32 %9, 3
  %11 = icmp slt i32 %7, %10
  br i1 %11, label %.lr.ph, label %.preheader28, !llvm.loop !5

.preheader27:                                     ; preds = %.preheader27.preheader, %._crit_edge
  %.02534 = phi i32 [ %16, %._crit_edge ], [ %.02534.ph, %.preheader27.preheader ]
  %12 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %13 = trunc i64 %12 to i32
  %14 = icmp slt i32 %.02534, %13
  br i1 %14, label %.lr.ph31.preheader, label %._crit_edge

._crit_edge35:                                    ; preds = %._crit_edge, %.preheader28
  ret void

.lr.ph31.preheader:                               ; preds = %.preheader27, %.critedge
  %.02433 = phi i32 [ %26, %.critedge ], [ %.02534, %.preheader27 ]
  br label %.lr.ph31

._crit_edge:                                      ; preds = %.critedge, %.preheader27
  %15 = add nsw i32 %.02534, -1
  %16 = udiv i32 %15, 3
  %17 = icmp sgt i32 %.02534, 3
  br i1 %17, label %.preheader27, label %._crit_edge35, !llvm.loop !7

.lr.ph31:                                         ; preds = %.lr.ph31.preheader, %30
  %.030 = phi i32 [ %21, %30 ], [ %.02433, %.lr.ph31.preheader ]
  %18 = zext nneg i32 %.030 to i64
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #2
  %20 = load i32, ptr %19, align 4, !tbaa !8
  %21 = sub nsw i32 %.030, %.02534
  %22 = sext i32 %21 to i64
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #2
  %24 = load i32, ptr %23, align 4, !tbaa !8
  %25 = icmp slt i32 %20, %24
  br i1 %25, label %30, label %.critedge

.critedge:                                        ; preds = %.lr.ph31, %30
  %26 = add nuw nsw i32 %.02433, %.02534
  %27 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %28 = trunc i64 %27 to i32
  %29 = icmp slt i32 %26, %28
  br i1 %29, label %.lr.ph31.preheader, label %._crit_edge, !llvm.loop !12

30:                                               ; preds = %.lr.ph31
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) #2
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #2
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %31, ptr noundef nonnull align 4 dereferenceable(4) %32) #2
  %33 = icmp sgt i32 %21, 0
  br i1 %33, label %.lr.ph31, label %.critedge, !llvm.loop !13
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = distinct !{!12, !6}
!13 = distinct !{!13, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass