; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (pcf8574)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mAddress = external hidden global i32, align 4
@pcf8574_write.str = external hidden constant [25 x i8], align 4

; Function Attrs: nounwind uwtable
declare dso_local i32 @pcf8574_read(i32 noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @dhdebug_ram(ptr noundef, ...) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @pcf8574_write(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i8, align 1
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  %14 = load i32, ptr %8, align 4, !tbaa !5
  %15 = load i32, ptr %9, align 4, !tbaa !5
  %16 = and i32 %14, %15
  %17 = icmp ne i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %4
  store i32 2, ptr %5, align 4
  br label %46

19:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = call i32 @pcf8574_read(i32 noundef %20, i32 noundef %21, ptr noundef %11)
  store i32 %22, ptr %10, align 4, !tbaa !5
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %26

24:                                               ; preds = %19
  %25 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %25, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %45

26:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #3
  %27 = load i32, ptr %11, align 4, !tbaa !5
  %28 = load i32, ptr %8, align 4, !tbaa !5
  %29 = or i32 %27, %28
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = xor i32 %30, -1
  %32 = and i32 %29, %31
  %33 = and i32 %32, 255
  %34 = trunc i32 %33 to i8
  store i8 %34, ptr %13, align 1, !tbaa !9
  %35 = load i32, ptr @mAddress, align 4, !tbaa !5
  %36 = call i32 @dh_i2c_write(i32 noundef %35, ptr noundef %13, i32 noundef 1, i32 noundef 1)
  store i32 %36, ptr %10, align 4, !tbaa !5
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %43

38:                                               ; preds = %26
  br label %39

39:                                               ; preds = %38
  call void (ptr, ...) @dhdebug_ram(ptr noundef @pcf8574_write.str)
  br label %40

40:                                               ; preds = %39
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %42, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %44

43:                                               ; preds = %26
  store i32 0, ptr %5, align 4
  store i32 1, ptr %12, align 4
  br label %44

44:                                               ; preds = %43, %41
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #3
  br label %45

45:                                               ; preds = %44, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %46

46:                                               ; preds = %45, %18
  %47 = load i32, ptr %5, align 4
  ret i32 %47
}

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mAddress = external hidden local_unnamed_addr global i32, align 4
@pcf8574_write.str = external hidden constant [25 x i8], align 4

; Function Attrs: nounwind uwtable
declare dso_local i32 @pcf8574_read(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @pcf8574_write(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = and i32 %3, %2
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %8, label %21

8:                                                ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %9 = call i32 @pcf8574_read(i32 noundef %0, i32 noundef %1, ptr noundef nonnull %5)
  %.not11 = icmp eq i32 %9, 0
  br i1 %.not11, label %10, label %20

10:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #3
  %11 = load i32, ptr %5, align 4, !tbaa !5
  %12 = or i32 %11, %2
  %13 = xor i32 %3, -1
  %14 = and i32 %12, %13
  %15 = trunc i32 %14 to i8
  store i8 %15, ptr %6, align 1, !tbaa !9
  %16 = load i32, ptr @mAddress, align 4, !tbaa !5
  %17 = call i32 @dh_i2c_write(i32 noundef %16, ptr noundef nonnull %6, i32 noundef 1, i32 noundef 1) #3
  %.not12 = icmp eq i32 %17, 0
  br i1 %.not12, label %19, label %18

18:                                               ; preds = %10
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @pcf8574_write.str) #3
  br label %19

19:                                               ; preds = %10, %18
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #3
  br label %20

20:                                               ; preds = %8, %19
  %.1 = phi i32 [ %17, %19 ], [ %9, %8 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  br label %21

21:                                               ; preds = %4, %20
  %.2 = phi i32 [ %.1, %20 ], [ 2, %4 ]
  ret i32 %.2
}

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass