; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/2436/main.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector", align 8
@p1 = external dso_local global i32, align 4
@p2 = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %6) #2
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %9) #2
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %20, label %13

13:                                               ; preds = %2
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %15) #2
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %18) #2
  store i32 1, ptr %19, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %13, %2
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %22) #2
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp eq i32 %27, 1
  br i1 %28, label %29, label %151

29:                                               ; preds = %20
  %30 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %30, ptr @p1, align 4, !tbaa !5
  %31 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %31, ptr @p2, align 4, !tbaa !5
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = sub nsw i32 %32, 1
  %34 = icmp sge i32 %33, 1
  br i1 %34, label %35, label %59

35:                                               ; preds = %29
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = sub nsw i32 %36, 1
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %38) #2
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #2
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = icmp eq i32 %43, 1
  br i1 %44, label %45, label %59

45:                                               ; preds = %35
  %46 = load i32, ptr %3, align 4, !tbaa !5
  %47 = sub nsw i32 %46, 1
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %48) #2
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #2
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %59, label %55

55:                                               ; preds = %45
  %56 = load i32, ptr %3, align 4, !tbaa !5
  %57 = sub nsw i32 %56, 1
  %58 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %57, i32 noundef %58)
  br label %59

59:                                               ; preds = %55, %45, %35, %29
  %60 = load i32, ptr %3, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  %62 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %63 = trunc i64 %62 to i32
  %64 = icmp slt i32 %61, %63
  br i1 %64, label %65, label %89

65:                                               ; preds = %59
  %66 = load i32, ptr %3, align 4, !tbaa !5
  %67 = add nsw i32 %66, 1
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %68) #2
  %70 = load i32, ptr %4, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #2
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = icmp eq i32 %73, 1
  br i1 %74, label %75, label %89

75:                                               ; preds = %65
  %76 = load i32, ptr %3, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %78) #2
  %80 = load i32, ptr %4, align 4, !tbaa !5
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %81) #2
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = icmp ne i32 %83, 0
  br i1 %84, label %89, label %85

85:                                               ; preds = %75
  %86 = load i32, ptr %3, align 4, !tbaa !5
  %87 = add nsw i32 %86, 1
  %88 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %87, i32 noundef %88)
  br label %89

89:                                               ; preds = %85, %75, %65, %59
  %90 = load i32, ptr %4, align 4, !tbaa !5
  %91 = sub nsw i32 %90, 1
  %92 = icmp sge i32 %91, 1
  br i1 %92, label %93, label %117

93:                                               ; preds = %89
  %94 = load i32, ptr %3, align 4, !tbaa !5
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %95) #2
  %97 = load i32, ptr %4, align 4, !tbaa !5
  %98 = sub nsw i32 %97, 1
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %99) #2
  %101 = load i32, ptr %100, align 4, !tbaa !5
  %102 = icmp eq i32 %101, 1
  br i1 %102, label %103, label %117

103:                                              ; preds = %93
  %104 = load i32, ptr %3, align 4, !tbaa !5
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %105) #2
  %107 = load i32, ptr %4, align 4, !tbaa !5
  %108 = sub nsw i32 %107, 1
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %109) #2
  %111 = load i32, ptr %110, align 4, !tbaa !5
  %112 = icmp ne i32 %111, 0
  br i1 %112, label %117, label %113

113:                                              ; preds = %103
  %114 = load i32, ptr %3, align 4, !tbaa !5
  %115 = load i32, ptr %4, align 4, !tbaa !5
  %116 = sub nsw i32 %115, 1
  call void @_Z3dfsii(i32 noundef %114, i32 noundef %116)
  br label %117

117:                                              ; preds = %113, %103, %93, %89
  %118 = load i32, ptr %4, align 4, !tbaa !5
  %119 = add nsw i32 %118, 1
  %120 = load i32, ptr %3, align 4, !tbaa !5
  %121 = sext i32 %120 to i64
  %122 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %121) #2
  %123 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %122) #2
  %124 = trunc i64 %123 to i32
  %125 = icmp slt i32 %119, %124
  br i1 %125, label %126, label %150

126:                                              ; preds = %117
  %127 = load i32, ptr %3, align 4, !tbaa !5
  %128 = sext i32 %127 to i64
  %129 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %128) #2
  %130 = load i32, ptr %4, align 4, !tbaa !5
  %131 = add nsw i32 %130, 1
  %132 = sext i32 %131 to i64
  %133 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %129, i64 noundef %132) #2
  %134 = load i32, ptr %133, align 4, !tbaa !5
  %135 = icmp eq i32 %134, 1
  br i1 %135, label %136, label %150

136:                                              ; preds = %126
  %137 = load i32, ptr %3, align 4, !tbaa !5
  %138 = sext i32 %137 to i64
  %139 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %138) #2
  %140 = load i32, ptr %4, align 4, !tbaa !5
  %141 = add nsw i32 %140, 1
  %142 = sext i32 %141 to i64
  %143 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %139, i64 noundef %142) #2
  %144 = load i32, ptr %143, align 4, !tbaa !5
  %145 = icmp ne i32 %144, 0
  br i1 %145, label %150, label %146

146:                                              ; preds = %136
  %147 = load i32, ptr %3, align 4, !tbaa !5
  %148 = load i32, ptr %4, align 4, !tbaa !5
  %149 = add nsw i32 %148, 1
  call void @_Z3dfsii(i32 noundef %147, i32 noundef %149)
  br label %150

150:                                              ; preds = %146, %136, %126, %117
  br label %151

151:                                              ; preds = %150, %20
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector", align 8
@p1 = external dso_local local_unnamed_addr global i32, align 4
@p2 = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = add nsw i32 %0, -1
  %5 = icmp sgt i32 %0, 1
  %6 = zext nneg i32 %4 to i64
  %7 = add nsw i32 %0, 1
  %8 = sext i32 %7 to i64
  %9 = sext i32 %1 to i64
  br label %tailrecurse

tailrecurse:                                      ; preds = %71, %2
  %indvars.iv = phi i64 [ %indvars.iv.next, %71 ], [ %9, %2 ]
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #1
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %indvars.iv) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %13, label %16

13:                                               ; preds = %tailrecurse
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #1
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv) #1
  store i32 1, ptr %15, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %13, %tailrecurse
  %17 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %indvars.iv) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = icmp eq i32 %19, 1
  br i1 %20, label %21, label %75

21:                                               ; preds = %16
  store i32 %0, ptr @p1, align 4, !tbaa !5
  %22 = trunc nsw i64 %indvars.iv to i32
  store i32 %22, ptr @p2, align 4, !tbaa !5
  br i1 %5, label %23, label %33

23:                                               ; preds = %21
  %24 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %6) #1
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %indvars.iv) #1
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = icmp eq i32 %26, 1
  br i1 %27, label %28, label %33

28:                                               ; preds = %23
  %29 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %6) #1
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %indvars.iv) #1
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %.not40 = icmp eq i32 %31, 0
  br i1 %.not40, label %32, label %33

32:                                               ; preds = %28
  tail call void @_Z3dfsii(i32 noundef %4, i32 noundef %22)
  br label %33

33:                                               ; preds = %32, %28, %23, %21
  %34 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %35 = trunc i64 %34 to i32
  %36 = icmp slt i32 %7, %35
  br i1 %36, label %37, label %47

37:                                               ; preds = %33
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %8) #1
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %indvars.iv) #1
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = icmp eq i32 %40, 1
  br i1 %41, label %42, label %47

42:                                               ; preds = %37
  %43 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %8) #1
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %indvars.iv) #1
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %.not41 = icmp eq i32 %45, 0
  br i1 %.not41, label %46, label %47

46:                                               ; preds = %42
  tail call void @_Z3dfsii(i32 noundef %7, i32 noundef %22)
  br label %47

47:                                               ; preds = %46, %42, %37, %33
  %48 = add nsw i64 %indvars.iv, -1
  %49 = icmp sgt i64 %indvars.iv, 1
  br i1 %49, label %50, label %61

50:                                               ; preds = %47
  %51 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %48) #1
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = icmp eq i32 %53, 1
  br i1 %54, label %55, label %61

55:                                               ; preds = %50
  %56 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #1
  %57 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %48) #1
  %58 = load i32, ptr %57, align 4, !tbaa !5
  %.not42 = icmp eq i32 %58, 0
  br i1 %.not42, label %59, label %61

59:                                               ; preds = %55
  %60 = trunc nsw i64 %48 to i32
  tail call void @_Z3dfsii(i32 noundef %0, i32 noundef %60)
  br label %61

61:                                               ; preds = %59, %55, %50, %47
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %62 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %63 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %62) #1
  %sext = shl i64 %63, 32
  %64 = ashr exact i64 %sext, 32
  %65 = icmp slt i64 %indvars.iv.next, %64
  br i1 %65, label %66, label %75

66:                                               ; preds = %61
  %67 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %68 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %indvars.iv.next) #1
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = icmp eq i32 %69, 1
  br i1 %70, label %71, label %75

71:                                               ; preds = %66
  %72 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #1
  %73 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %indvars.iv.next) #1
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %.not43 = icmp eq i32 %74, 0
  br i1 %.not43, label %tailrecurse, label %75

75:                                               ; preds = %61, %66, %71, %16
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,LICMPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass