; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@MFRC522_MIFARE_OpenUidBackdoor.str = external hidden constant [90 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.44 = external hidden constant [13 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.45 = external hidden constant [62 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.46 = external hidden constant [74 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.47 = external hidden constant [15 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.48 = external hidden constant [62 x i8], align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_TransceiveData(ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PICC_HaltA() #1

; Function Attrs: nounwind uwtable
declare dso_local ptr @MFRC522_GetStatusCodeName(i32 noundef) #1

declare void @dhdebug_ram(ptr noundef, ...) #2

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @MFRC522_MIFARE_OpenUidBackdoor(i8 noundef zeroext %0) #1 {
  %2 = alloca i8, align 1
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca [32 x i8], align 16
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i8 %0, ptr %3, align 1, !tbaa !5
  %10 = call i32 @MFRC522_PICC_HaltA()
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #3
  store i8 64, ptr %4, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 7, ptr %5, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %11 = getelementptr inbounds [32 x i8], ptr %6, i64 0, i64 0
  %12 = call i32 @MFRC522_PCD_TransceiveData(ptr noundef %4, i8 noundef zeroext 1, ptr noundef %11, ptr noundef %7, ptr noundef %5, i8 noundef zeroext 0, i8 noundef zeroext 0)
  store i32 %12, ptr %8, align 4, !tbaa !8
  %13 = load i32, ptr %8, align 4, !tbaa !8
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %28

15:                                               ; preds = %1
  %16 = load i8, ptr %3, align 1, !tbaa !5
  %17 = icmp ne i8 %16, 0
  br i1 %17, label %18, label %27

18:                                               ; preds = %15
  br label %19

19:                                               ; preds = %18
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_OpenUidBackdoor.str)
  br label %20

20:                                               ; preds = %19
  br label %21

21:                                               ; preds = %20
  br label %22

22:                                               ; preds = %21
  %23 = load i32, ptr %8, align 4, !tbaa !8
  %24 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %23)
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_OpenUidBackdoor.str.44, ptr noundef %24)
  br label %25

25:                                               ; preds = %22
  br label %26

26:                                               ; preds = %25
  br label %27

27:                                               ; preds = %26, %15
  store i8 0, ptr %2, align 1
  store i32 1, ptr %9, align 4
  br label %91

28:                                               ; preds = %1
  %29 = load i8, ptr %7, align 1, !tbaa !5
  %30 = zext i8 %29 to i32
  %31 = icmp ne i32 %30, 1
  br i1 %31, label %37, label %32

32:                                               ; preds = %28
  %33 = getelementptr inbounds [32 x i8], ptr %6, i64 0, i64 0
  %34 = load i8, ptr %33, align 16, !tbaa !5
  %35 = zext i8 %34 to i32
  %36 = icmp ne i32 %35, 10
  br i1 %36, label %37, label %50

37:                                               ; preds = %32, %28
  %38 = load i8, ptr %3, align 1, !tbaa !5
  %39 = icmp ne i8 %38, 0
  br i1 %39, label %40, label %49

40:                                               ; preds = %37
  br label %41

41:                                               ; preds = %40
  %42 = getelementptr inbounds [32 x i8], ptr %6, i64 0, i64 0
  %43 = load i8, ptr %42, align 16, !tbaa !5
  %44 = zext i8 %43 to i32
  %45 = load i8, ptr %5, align 1, !tbaa !5
  %46 = zext i8 %45 to i32
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_OpenUidBackdoor.str.45, i32 noundef %44, i32 noundef %46)
  br label %47

47:                                               ; preds = %41
  br label %48

48:                                               ; preds = %47
  br label %49

49:                                               ; preds = %48, %37
  store i8 0, ptr %2, align 1
  store i32 1, ptr %9, align 4
  br label %91

50:                                               ; preds = %32
  store i8 67, ptr %4, align 1, !tbaa !5
  store i8 8, ptr %5, align 1, !tbaa !5
  %51 = getelementptr inbounds [32 x i8], ptr %6, i64 0, i64 0
  %52 = call i32 @MFRC522_PCD_TransceiveData(ptr noundef %4, i8 noundef zeroext 1, ptr noundef %51, ptr noundef %7, ptr noundef %5, i8 noundef zeroext 0, i8 noundef zeroext 0)
  store i32 %52, ptr %8, align 4, !tbaa !8
  %53 = load i32, ptr %8, align 4, !tbaa !8
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %68

55:                                               ; preds = %50
  %56 = load i8, ptr %3, align 1, !tbaa !5
  %57 = icmp ne i8 %56, 0
  br i1 %57, label %58, label %67

58:                                               ; preds = %55
  br label %59

59:                                               ; preds = %58
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_OpenUidBackdoor.str.46)
  br label %60

60:                                               ; preds = %59
  br label %61

61:                                               ; preds = %60
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %8, align 4, !tbaa !8
  %64 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %63)
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_OpenUidBackdoor.str.47, ptr noundef %64)
  br label %65

65:                                               ; preds = %62
  br label %66

66:                                               ; preds = %65
  br label %67

67:                                               ; preds = %66, %55
  store i8 0, ptr %2, align 1
  store i32 1, ptr %9, align 4
  br label %91

68:                                               ; preds = %50
  %69 = load i8, ptr %7, align 1, !tbaa !5
  %70 = zext i8 %69 to i32
  %71 = icmp ne i32 %70, 1
  br i1 %71, label %77, label %72

72:                                               ; preds = %68
  %73 = getelementptr inbounds [32 x i8], ptr %6, i64 0, i64 0
  %74 = load i8, ptr %73, align 16, !tbaa !5
  %75 = zext i8 %74 to i32
  %76 = icmp ne i32 %75, 10
  br i1 %76, label %77, label %90

77:                                               ; preds = %72, %68
  %78 = load i8, ptr %3, align 1, !tbaa !5
  %79 = icmp ne i8 %78, 0
  br i1 %79, label %80, label %89

80:                                               ; preds = %77
  br label %81

81:                                               ; preds = %80
  %82 = getelementptr inbounds [32 x i8], ptr %6, i64 0, i64 0
  %83 = load i8, ptr %82, align 16, !tbaa !5
  %84 = zext i8 %83 to i32
  %85 = load i8, ptr %5, align 1, !tbaa !5
  %86 = zext i8 %85 to i32
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_OpenUidBackdoor.str.48, i32 noundef %84, i32 noundef %86)
  br label %87

87:                                               ; preds = %81
  br label %88

88:                                               ; preds = %87
  br label %89

89:                                               ; preds = %88, %77
  store i8 0, ptr %2, align 1
  store i32 1, ptr %9, align 4
  br label %91

90:                                               ; preds = %72
  store i8 1, ptr %2, align 1
  store i32 1, ptr %9, align 4
  br label %91

91:                                               ; preds = %90, %89, %67, %49, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 32, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #3
  %92 = load i8, ptr %2, align 1
  ret i8 %92
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@MFRC522_MIFARE_OpenUidBackdoor.str = external hidden constant [90 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.44 = external hidden constant [13 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.45 = external hidden constant [62 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.46 = external hidden constant [74 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.47 = external hidden constant [15 x i8], align 4
@MFRC522_MIFARE_OpenUidBackdoor.str.48 = external hidden constant [62 x i8], align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_TransceiveData(ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PICC_HaltA() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local ptr @MFRC522_GetStatusCodeName(i32 noundef) local_unnamed_addr #1

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @MFRC522_MIFARE_OpenUidBackdoor(i8 noundef zeroext %0) local_unnamed_addr #1 {
  %2 = alloca i8, align 1
  %3 = alloca i8, align 1
  %4 = alloca [32 x i8], align 16
  %5 = alloca i8, align 1
  %6 = tail call i32 @MFRC522_PICC_HaltA()
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2) #3
  store i8 64, ptr %2, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3
  store i8 7, ptr %3, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %4) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #3
  %7 = call i32 @MFRC522_PCD_TransceiveData(ptr noundef nonnull %2, i8 noundef zeroext 1, ptr noundef nonnull %4, ptr noundef nonnull %5, ptr noundef nonnull %3, i8 noundef zeroext 0, i8 noundef zeroext 0)
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %11, label %8

8:                                                ; preds = %1
  %.not22 = icmp eq i8 %0, 0
  br i1 %.not22, label %36, label %9

9:                                                ; preds = %8
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_OpenUidBackdoor.str) #3
  %10 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %7)
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_OpenUidBackdoor.str.44, ptr noundef %10) #3
  br label %36

11:                                               ; preds = %1
  %12 = load i8, ptr %5, align 1, !tbaa !5
  %13 = icmp ne i8 %12, 1
  %14 = load i8, ptr %4, align 16
  %15 = zext i8 %14 to i32
  %16 = icmp ne i8 %14, 10
  %or.cond = select i1 %13, i1 true, i1 %16
  br i1 %or.cond, label %17, label %21

17:                                               ; preds = %11
  %.not21 = icmp eq i8 %0, 0
  br i1 %.not21, label %36, label %18

18:                                               ; preds = %17
  %19 = load i8, ptr %3, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_OpenUidBackdoor.str.45, i32 noundef %15, i32 noundef %20) #3
  br label %36

21:                                               ; preds = %11
  store i8 67, ptr %2, align 1, !tbaa !5
  store i8 8, ptr %3, align 1, !tbaa !5
  %22 = call i32 @MFRC522_PCD_TransceiveData(ptr noundef nonnull %2, i8 noundef zeroext 1, ptr noundef nonnull %4, ptr noundef nonnull %5, ptr noundef nonnull %3, i8 noundef zeroext 0, i8 noundef zeroext 0)
  %.not18 = icmp eq i32 %22, 0
  br i1 %.not18, label %26, label %23

23:                                               ; preds = %21
  %.not20 = icmp eq i8 %0, 0
  br i1 %.not20, label %36, label %24

24:                                               ; preds = %23
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_OpenUidBackdoor.str.46) #3
  %25 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %22)
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_OpenUidBackdoor.str.47, ptr noundef %25) #3
  br label %36

26:                                               ; preds = %21
  %27 = load i8, ptr %5, align 1, !tbaa !5
  %28 = icmp ne i8 %27, 1
  %29 = load i8, ptr %4, align 16
  %30 = zext i8 %29 to i32
  %31 = icmp ne i8 %29, 10
  %or.cond7 = select i1 %28, i1 true, i1 %31
  br i1 %or.cond7, label %32, label %36

32:                                               ; preds = %26
  %.not19 = icmp eq i8 %0, 0
  br i1 %.not19, label %36, label %33

33:                                               ; preds = %32
  %34 = load i8, ptr %3, align 1, !tbaa !5
  %35 = zext i8 %34 to i32
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_OpenUidBackdoor.str.48, i32 noundef %30, i32 noundef %35) #3
  br label %36

36:                                               ; preds = %26, %32, %33, %23, %24, %17, %18, %8, %9
  %.0 = phi i8 [ 0, %9 ], [ 0, %8 ], [ 0, %18 ], [ 0, %17 ], [ 0, %24 ], [ 0, %23 ], [ 0, %33 ], [ 0, %32 ], [ 1, %26 ]
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2) #3
  ret i8 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass