; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI (2369)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 7, ptr %3, align 4, !tbaa !5
  %5 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %6 = load i32, ptr %2, align 4, !tbaa !5
  %7 = icmp sgt i32 %6, 10
  br i1 %7, label %8, label %43

8:                                                ; preds = %0
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 11, ptr %4, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %39, %8
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = load i32, ptr %2, align 4, !tbaa !5
  %12 = icmp sle i32 %10, %11
  br i1 %12, label %13, label %42

13:                                               ; preds = %9
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = icmp sge i32 %14, 10
  br i1 %15, label %16, label %22

16:                                               ; preds = %13
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = icmp sle i32 %17, 30
  br i1 %18, label %19, label %22

19:                                               ; preds = %16
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr %3, align 4, !tbaa !5
  br label %39

22:                                               ; preds = %16, %13
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = icmp sge i32 %23, 31
  br i1 %24, label %25, label %31

25:                                               ; preds = %22
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = icmp sle i32 %26, 100
  br i1 %27, label %28, label %31

28:                                               ; preds = %25
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = add nsw i32 %29, 2
  store i32 %30, ptr %3, align 4, !tbaa !5
  br label %38

31:                                               ; preds = %25, %22
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = icmp sge i32 %32, 101
  br i1 %33, label %34, label %37

34:                                               ; preds = %31
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = add nsw i32 %35, 5
  store i32 %36, ptr %3, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %34, %31
  br label %38

38:                                               ; preds = %37, %28
  br label %39

39:                                               ; preds = %38, %19
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %4, align 4, !tbaa !5
  br label %9, !llvm.loop !9

42:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %43

43:                                               ; preds = %42, %0
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %44)
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %45, ptr noundef @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #6
  %2 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, 10
  br i1 %4, label %.preheader.preheader, label %.loopexit

.preheader.preheader:                             ; preds = %0
  %5 = add nsw i32 %3, -10
  %min.iters.check = icmp ult i32 %5, 8
  br i1 %min.iters.check, label %.preheader.preheader24, label %vector.ph

vector.ph:                                        ; preds = %.preheader.preheader
  %n.vec = and i32 %5, -8
  %ind.end = add i32 %n.vec, 11
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.ind = phi <4 x i32> [ <i32 11, i32 12, i32 13, i32 14>, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ <i32 7, i32 0, i32 0, i32 0>, %vector.ph ], [ %predphi20, %vector.body ]
  %vec.phi18 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %predphi21, %vector.body ]
  %6 = add <4 x i32> %vec.ind, <i32 -10, i32 -10, i32 -10, i32 -10>
  %.not22 = icmp ult <4 x i32> %6, <i32 91, i32 91, i32 91, i32 91>
  %7 = add <4 x i32> %vec.ind, <i32 -6, i32 -6, i32 -6, i32 -6>
  %.not23 = icmp ult <4 x i32> %7, <i32 91, i32 91, i32 91, i32 91>
  %8 = icmp ugt <4 x i32> %vec.ind, <i32 100, i32 100, i32 100, i32 100>
  %9 = add <4 x i32> %vec.ind, <i32 -97, i32 -97, i32 -97, i32 -97>
  %10 = icmp ult <4 x i32> %9, <i32 -101, i32 -101, i32 -101, i32 -101>
  %11 = add <4 x i32> %vec.phi, <i32 5, i32 5, i32 5, i32 5>
  %12 = add <4 x i32> %vec.phi18, <i32 5, i32 5, i32 5, i32 5>
  %13 = select <4 x i1> %8, <4 x i32> %11, <4 x i32> %vec.phi
  %14 = select <4 x i1> %10, <4 x i32> %12, <4 x i32> %vec.phi18
  %15 = add <4 x i32> %vec.ind, <i32 -31, i32 -31, i32 -31, i32 -31>
  %16 = icmp ult <4 x i32> %15, <i32 70, i32 70, i32 70, i32 70>
  %17 = add <4 x i32> %vec.ind, <i32 -27, i32 -27, i32 -27, i32 -27>
  %18 = icmp ult <4 x i32> %17, <i32 70, i32 70, i32 70, i32 70>
  %predphi.v = select <4 x i1> %16, <4 x i32> <i32 2, i32 2, i32 2, i32 2>, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
  %predphi = add <4 x i32> %vec.phi, %predphi.v
  %predphi19.v = select <4 x i1> %18, <4 x i32> <i32 2, i32 2, i32 2, i32 2>, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
  %predphi19 = add <4 x i32> %vec.phi18, %predphi19.v
  %predphi20 = select <4 x i1> %.not22, <4 x i32> %predphi, <4 x i32> %13
  %predphi21 = select <4 x i1> %.not23, <4 x i32> %predphi19, <4 x i32> %14
  %index.next = add nuw i32 %index, 8
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 8, i32 8, i32 8, i32 8>
  %19 = icmp eq i32 %index.next, %n.vec
  br i1 %19, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %predphi21, %predphi20
  %20 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %5, %n.vec
  br i1 %cmp.n, label %.loopexit, label %.preheader.preheader24

.preheader.preheader24:                           ; preds = %middle.block, %.preheader.preheader
  %.016.ph = phi i32 [ 11, %.preheader.preheader ], [ %ind.end, %middle.block ]
  %.01415.ph = phi i32 [ 7, %.preheader.preheader ], [ %20, %middle.block ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader24, %31
  %.016 = phi i32 [ %32, %31 ], [ %.016.ph, %.preheader.preheader24 ]
  %.01415 = phi i32 [ %.1, %31 ], [ %.01415.ph, %.preheader.preheader24 ]
  %21 = add nsw i32 %.016, -10
  %or.cond = icmp ult i32 %21, 21
  br i1 %or.cond, label %22, label %24

22:                                               ; preds = %.preheader
  %23 = add nsw i32 %.01415, 1
  br label %31

24:                                               ; preds = %.preheader
  %25 = add nsw i32 %.016, -31
  %or.cond3 = icmp ult i32 %25, 70
  br i1 %or.cond3, label %26, label %28

26:                                               ; preds = %24
  %27 = add nsw i32 %.01415, 2
  br label %31

28:                                               ; preds = %24
  %29 = icmp ugt i32 %.016, 100
  %30 = add nsw i32 %.01415, 5
  %spec.select = select i1 %29, i32 %30, i32 %.01415
  br label %31

31:                                               ; preds = %28, %26, %22
  %.1 = phi i32 [ %23, %22 ], [ %27, %26 ], [ %spec.select, %28 ]
  %32 = add nuw i32 %.016, 1
  %exitcond.not = icmp eq i32 %.016, %3
  br i1 %exitcond.not, label %.loopexit, label %.preheader, !llvm.loop !13

.loopexit:                                        ; preds = %31, %middle.block, %0
  %.2 = phi i32 [ 7, %0 ], [ %20, %middle.block ], [ %.1, %31 ]
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %.2)
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8) %33, ptr noundef nonnull @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #6
  ret i32 0
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEPFRSoS_E(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #3 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_(ptr noundef nonnull align 8 dereferenceable(8)) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #5

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,SROAPass,SimplifyCFGPass