; LLVM IR from Ryuk17/SpeechAlgorithms :: WebRTC_AEC/src (echo_cancellation)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.aecpc_t = type { i32, i32, i32, i32, float, i16, i32, i32, i32, i16, i16, i32, i16, i16, i16, i16, i32, i32, i32, i16, ptr, i32, i32, i32, float, ptr, i32, i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @WebRtcAec_Process(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i16 noundef signext %5, i16 noundef signext %6, i32 noundef %7) #1 {
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i16, align 2
  %16 = alloca i16, align 2
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store ptr %2, ptr %12, align 8, !tbaa !5
  store ptr %3, ptr %13, align 8, !tbaa !5
  store ptr %4, ptr %14, align 8, !tbaa !5
  store i16 %5, ptr %15, align 2, !tbaa !9
  store i16 %6, ptr %16, align 2, !tbaa !9
  store i32 %7, ptr %17, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #3
  %21 = load ptr, ptr %10, align 8, !tbaa !5
  store ptr %21, ptr %18, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  store i32 0, ptr %19, align 4, !tbaa !11
  %22 = load ptr, ptr %11, align 8, !tbaa !5
  %23 = icmp eq ptr %22, null
  br i1 %23, label %24, label %27

24:                                               ; preds = %8
  %25 = load ptr, ptr %18, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.aecpc_t, ptr %25, i32 0, i32 26
  store i32 12003, ptr %26, align 8, !tbaa !13
  store i32 -1, ptr %9, align 4
  store i32 1, ptr %20, align 4
  br label %109

27:                                               ; preds = %8
  %28 = load ptr, ptr %13, align 8, !tbaa !5
  %29 = icmp eq ptr %28, null
  br i1 %29, label %30, label %33

30:                                               ; preds = %27
  %31 = load ptr, ptr %18, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.aecpc_t, ptr %31, i32 0, i32 26
  store i32 12003, ptr %32, align 8, !tbaa !13
  store i32 -1, ptr %9, align 4
  store i32 1, ptr %20, align 4
  br label %109

33:                                               ; preds = %27
  %34 = load ptr, ptr %18, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.aecpc_t, ptr %34, i32 0, i32 9
  %36 = load i16, ptr %35, align 4, !tbaa !16
  %37 = sext i16 %36 to i32
  %38 = icmp ne i32 %37, 42
  br i1 %38, label %39, label %42

39:                                               ; preds = %33
  %40 = load ptr, ptr %18, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.aecpc_t, ptr %40, i32 0, i32 26
  store i32 12002, ptr %41, align 8, !tbaa !13
  store i32 -1, ptr %9, align 4
  store i32 1, ptr %20, align 4
  br label %109

42:                                               ; preds = %33
  %43 = load i16, ptr %15, align 2, !tbaa !9
  %44 = sext i16 %43 to i32
  %45 = icmp ne i32 %44, 80
  br i1 %45, label %46, label %53

46:                                               ; preds = %42
  %47 = load i16, ptr %15, align 2, !tbaa !9
  %48 = sext i16 %47 to i32
  %49 = icmp ne i32 %48, 160
  br i1 %49, label %50, label %53

50:                                               ; preds = %46
  %51 = load ptr, ptr %18, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.aecpc_t, ptr %51, i32 0, i32 26
  store i32 12004, ptr %52, align 8, !tbaa !13
  store i32 -1, ptr %9, align 4
  store i32 1, ptr %20, align 4
  br label %109

53:                                               ; preds = %46, %42
  %54 = load ptr, ptr %18, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.aecpc_t, ptr %54, i32 0, i32 1
  %56 = load i32, ptr %55, align 4, !tbaa !17
  %57 = icmp eq i32 %56, 32000
  br i1 %57, label %58, label %64

58:                                               ; preds = %53
  %59 = load ptr, ptr %12, align 8, !tbaa !5
  %60 = icmp eq ptr %59, null
  br i1 %60, label %61, label %64

61:                                               ; preds = %58
  %62 = load ptr, ptr %18, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.aecpc_t, ptr %62, i32 0, i32 26
  store i32 12003, ptr %63, align 8, !tbaa !13
  store i32 -1, ptr %9, align 4
  store i32 1, ptr %20, align 4
  br label %109

64:                                               ; preds = %58, %53
  %65 = load i16, ptr %16, align 2, !tbaa !9
  %66 = sext i16 %65 to i32
  %67 = icmp slt i32 %66, 0
  br i1 %67, label %68, label %71

68:                                               ; preds = %64
  store i16 0, ptr %16, align 2, !tbaa !9
  %69 = load ptr, ptr %18, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.aecpc_t, ptr %69, i32 0, i32 26
  store i32 12050, ptr %70, align 8, !tbaa !13
  store i32 -1, ptr %19, align 4, !tbaa !11
  br label %79

71:                                               ; preds = %64
  %72 = load i16, ptr %16, align 2, !tbaa !9
  %73 = sext i16 %72 to i32
  %74 = icmp sgt i32 %73, 500
  br i1 %74, label %75, label %78

75:                                               ; preds = %71
  %76 = load ptr, ptr %18, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.aecpc_t, ptr %76, i32 0, i32 26
  store i32 12050, ptr %77, align 8, !tbaa !13
  store i32 -1, ptr %19, align 4, !tbaa !11
  br label %78

78:                                               ; preds = %75, %71
  br label %79

79:                                               ; preds = %78, %68
  %80 = load ptr, ptr %18, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.aecpc_t, ptr %80, i32 0, i32 28
  %82 = load ptr, ptr %81, align 8, !tbaa !18
  %83 = call i32 @WebRtcAec_delay_correction_enabled(ptr noundef %82)
  %84 = icmp ne i32 %83, 0
  br i1 %84, label %85, label %94

85:                                               ; preds = %79
  %86 = load ptr, ptr %18, align 8, !tbaa !5
  %87 = load ptr, ptr %11, align 8, !tbaa !5
  %88 = load ptr, ptr %12, align 8, !tbaa !5
  %89 = load ptr, ptr %13, align 8, !tbaa !5
  %90 = load ptr, ptr %14, align 8, !tbaa !5
  %91 = load i16, ptr %15, align 2, !tbaa !9
  %92 = load i16, ptr %16, align 2, !tbaa !9
  %93 = load i32, ptr %17, align 4, !tbaa !11
  call void @ProcessExtended(ptr noundef %86, ptr noundef %87, ptr noundef %88, ptr noundef %89, ptr noundef %90, i16 noundef signext %91, i16 noundef signext %92, i32 noundef %93)
  br label %107

94:                                               ; preds = %79
  %95 = load ptr, ptr %18, align 8, !tbaa !5
  %96 = load ptr, ptr %11, align 8, !tbaa !5
  %97 = load ptr, ptr %12, align 8, !tbaa !5
  %98 = load ptr, ptr %13, align 8, !tbaa !5
  %99 = load ptr, ptr %14, align 8, !tbaa !5
  %100 = load i16, ptr %15, align 2, !tbaa !9
  %101 = load i16, ptr %16, align 2, !tbaa !9
  %102 = load i32, ptr %17, align 4, !tbaa !11
  %103 = call i32 @ProcessNormal(ptr noundef %95, ptr noundef %96, ptr noundef %97, ptr noundef %98, ptr noundef %99, i16 noundef signext %100, i16 noundef signext %101, i32 noundef %102)
  %104 = icmp ne i32 %103, 0
  br i1 %104, label %105, label %106

105:                                              ; preds = %94
  store i32 -1, ptr %19, align 4, !tbaa !11
  br label %106

106:                                              ; preds = %105, %94
  br label %107

107:                                              ; preds = %106, %85
  %108 = load i32, ptr %19, align 4, !tbaa !11
  store i32 %108, ptr %9, align 4
  store i32 1, ptr %20, align 4
  br label %109

109:                                              ; preds = %107, %61, %50, %39, %30, %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #3
  %110 = load i32, ptr %9, align 4
  ret i32 %110
}

declare i32 @WebRtcAec_delay_correction_enabled(ptr noundef) #2

; Function Attrs: nounwind uwtable
declare hidden void @ProcessExtended(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i16 noundef signext, i16 noundef signext, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden i32 @ProcessNormal(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i16 noundef signext, i16 noundef signext, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 104}
!14 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !15, i64 16, !10, i64 20, !12, i64 24, !12, i64 28, !12, i64 32, !10, i64 36, !10, i64 38, !12, i64 40, !10, i64 44, !10, i64 46, !10, i64 48, !10, i64 50, !12, i64 52, !12, i64 56, !12, i64 60, !10, i64 64, !6, i64 72, !12, i64 80, !12, i64 84, !12, i64 88, !15, i64 92, !6, i64 96, !12, i64 104, !12, i64 108, !6, i64 112}
!15 = !{!"float", !7, i64 0}
!16 = !{!14, !10, i64 36}
!17 = !{!14, !12, i64 4}
!18 = !{!14, !6, i64 112}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @WebRtcAec_Process(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i16 noundef signext %5, i16 noundef signext %6, i32 noundef %7) local_unnamed_addr #0 {
  %9 = icmp eq ptr %1, null
  br i1 %9, label %10, label %12

10:                                               ; preds = %8
  %11 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12003, ptr %11, align 8, !tbaa !5
  br label %43

12:                                               ; preds = %8
  %13 = icmp eq ptr %3, null
  br i1 %13, label %14, label %16

14:                                               ; preds = %12
  %15 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12003, ptr %15, align 8, !tbaa !5
  br label %43

16:                                               ; preds = %12
  %17 = getelementptr inbounds i8, ptr %0, i64 36
  %18 = load i16, ptr %17, align 4, !tbaa !13
  %.not = icmp eq i16 %18, 42
  br i1 %.not, label %21, label %19

19:                                               ; preds = %16
  %20 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12002, ptr %20, align 8, !tbaa !5
  br label %43

21:                                               ; preds = %16
  switch i16 %5, label %22 [
    i16 160, label %24
    i16 80, label %24
  ]

22:                                               ; preds = %21
  %23 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12004, ptr %23, align 8, !tbaa !5
  br label %43

24:                                               ; preds = %21, %21
  %25 = getelementptr inbounds i8, ptr %0, i64 4
  %26 = load i32, ptr %25, align 4, !tbaa !14
  %27 = icmp eq i32 %26, 32000
  %28 = icmp eq ptr %2, null
  %or.cond4 = and i1 %28, %27
  br i1 %or.cond4, label %29, label %31

29:                                               ; preds = %24
  %30 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12003, ptr %30, align 8, !tbaa !5
  br label %43

31:                                               ; preds = %24
  %32 = icmp slt i16 %6, 0
  br i1 %32, label %.sink.split, label %33

33:                                               ; preds = %31
  %34 = icmp ugt i16 %6, 500
  br i1 %34, label %.sink.split, label %36

.sink.split:                                      ; preds = %33, %31
  %.040.ph = phi i16 [ 0, %31 ], [ %6, %33 ]
  %35 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12050, ptr %35, align 8, !tbaa !5
  br label %36

36:                                               ; preds = %.sink.split, %33
  %.040 = phi i16 [ %6, %33 ], [ %.040.ph, %.sink.split ]
  %.0 = phi i32 [ 0, %33 ], [ -1, %.sink.split ]
  %37 = getelementptr inbounds i8, ptr %0, i64 112
  %38 = load ptr, ptr %37, align 8, !tbaa !15
  %39 = tail call i32 @WebRtcAec_delay_correction_enabled(ptr noundef %38) #2
  %.not44 = icmp eq i32 %39, 0
  br i1 %.not44, label %41, label %40

40:                                               ; preds = %36
  tail call void @ProcessExtended(ptr noundef nonnull %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, ptr noundef %4, i16 noundef signext %5, i16 noundef signext %.040, i32 noundef %7)
  br label %43

41:                                               ; preds = %36
  %42 = tail call i32 @ProcessNormal(ptr noundef nonnull %0, ptr noundef nonnull %1, ptr noundef %2, ptr noundef nonnull %3, ptr noundef %4, i16 noundef signext %5, i16 noundef signext %.040, i32 noundef %7)
  %.not45 = icmp eq i32 %42, 0
  %spec.select = select i1 %.not45, i32 %.0, i32 -1
  br label %43

43:                                               ; preds = %41, %40, %29, %22, %19, %14, %10
  %.039 = phi i32 [ -1, %10 ], [ -1, %14 ], [ -1, %19 ], [ -1, %22 ], [ -1, %29 ], [ %.0, %40 ], [ %spec.select, %41 ]
  ret i32 %.039
}

declare i32 @WebRtcAec_delay_correction_enabled(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @ProcessExtended(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i16 noundef signext, i16 noundef signext, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @ProcessNormal(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i16 noundef signext, i16 noundef signext, i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 104}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !11, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !11, i64 36, !11, i64 38, !7, i64 40, !11, i64 44, !11, i64 46, !11, i64 48, !11, i64 50, !7, i64 52, !7, i64 56, !7, i64 60, !11, i64 64, !12, i64 72, !7, i64 80, !7, i64 84, !7, i64 88, !10, i64 92, !12, i64 96, !7, i64 104, !7, i64 108, !12, i64 112}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"float", !8, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !11, i64 36}
!14 = !{!6, !7, i64 4}
!15 = !{!6, !12, i64 112}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass