; LLVM IR from romerojosh/zefr :: src/hexas.ll (ZN5Hexas10calc_shapeER8mdvectorIdEPKd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.7" = type { %"struct.std::_Vector_base.8" }
%"struct.std::_Vector_base.8" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Elements = type { ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x i8], %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %"class.std::vector.0", %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector.5, %class.mdvector.5, %class.mdvector.5, %class.mdvector.5, %class.mdvector.5, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, i32, %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector", %"class.std::vector.7", %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, i64, i64, i64, i64, i64, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdview, %class.mdview, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, %class.mdvector, i32, [4 x i8], %class.mdvector, %class.mdvector, i32, ptr, %"class.std::vector.7", %class.mdvector.5, %class.mdvector, %class.mdvector, %class.mdvector }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.mdview = type { %class.mdvector.12, %class.mdvector.5, i32, [4 x i8] }
%class.mdvector.12 = type <{ i32, [4 x i8], i64, i64, %"struct.std::array", %"struct.std::array", %"class.std::vector.13", ptr, i8, [7 x i8] }>
%"struct.std::array" = type { [6 x i32] }
%"class.std::vector.13" = type { %"struct.std::_Vector_base.14" }
%"struct.std::_Vector_base.14" = type { %"struct.std::_Vector_base<double *, std::allocator<double *>>::_Vector_impl" }
%"struct.std::_Vector_base<double *, std::allocator<double *>>::_Vector_impl" = type { %"struct.std::_Vector_base<double *, std::allocator<double *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double *, std::allocator<double *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.mdvector.5 = type <{ i32, [4 x i8], i64, i64, %"struct.std::array", %"struct.std::array", %"class.std::vector.0", ptr, i8, [7 x i8] }>
%class.mdvector = type <{ i32, [4 x i8], i64, i64, %"struct.std::array", %"struct.std::array", %"class.std::vector", ptr, i8, [7 x i8] }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN8mdvectorIdEclEj(ptr noundef nonnull align 8 dereferenceable(105), i32 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5Hexas10calc_shapeER8mdvectorIdEPKd(ptr noundef nonnull align 8 dereferenceable(13968) %0, ptr noundef nonnull align 8 dereferenceable(105) %1, ptr noundef %2) unnamed_addr #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca double, align 8
  %8 = alloca double, align 8
  %9 = alloca double, align 8
  %10 = alloca double, align 8
  %11 = alloca i32, align 4
  %12 = alloca %"class.std::vector.7", align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %19 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = getelementptr inbounds double, ptr %20, i64 0
  %22 = load double, ptr %21, align 8, !tbaa !9
  store double %22, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #6
  %23 = load ptr, ptr %6, align 8, !tbaa !5
  %24 = getelementptr inbounds double, ptr %23, i64 1
  %25 = load double, ptr %24, align 8, !tbaa !9
  store double %25, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #6
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds double, ptr %26, i64 2
  %28 = load double, ptr %27, align 8, !tbaa !9
  store double %28, ptr %9, align 8, !tbaa !9
  %29 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 81
  %30 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %29) #6
  %31 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %32 = load i32, ptr %31, align 8, !tbaa !11
  %33 = zext i32 %32 to i64
  %34 = icmp ne i64 %30, %33
  br i1 %34, label %35, label %64

35:                                               ; preds = %3
  %36 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 81
  %37 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %38 = load i32, ptr %37, align 8, !tbaa !11
  %39 = zext i32 %38 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %39)
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #6
  %40 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %41 = load i32, ptr %40, align 8, !tbaa !11
  %42 = sub i32 %41, 1
  %43 = uitofp i32 %42 to double
  %44 = fdiv double 2.000000e+00, %43
  store double %44, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #6
  store i32 0, ptr %11, align 4, !tbaa !38
  br label %45

45:                                               ; preds = %60, %35
  %46 = load i32, ptr %11, align 4, !tbaa !38
  %47 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %48 = load i32, ptr %47, align 8, !tbaa !11
  %49 = icmp ult i32 %46, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #6
  br label %63

51:                                               ; preds = %45
  %52 = load i32, ptr %11, align 4, !tbaa !38
  %53 = sitofp i32 %52 to double
  %54 = load double, ptr %10, align 8, !tbaa !9
  %55 = call double @llvm.fmuladd.f64(double %53, double %54, double -1.000000e+00)
  %56 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 81
  %57 = load i32, ptr %11, align 4, !tbaa !38
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58) #6
  store double %55, ptr %59, align 8, !tbaa !9
  br label %60

60:                                               ; preds = %51
  %61 = load i32, ptr %11, align 4, !tbaa !38
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %11, align 4, !tbaa !38
  br label %45, !llvm.loop !39

63:                                               ; preds = %50
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #6
  br label %64

64:                                               ; preds = %63, %3
  %65 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 88
  %66 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %65) #6
  %67 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 19
  %68 = load i32, ptr %67, align 8, !tbaa !41
  %69 = zext i32 %68 to i64
  %70 = icmp ne i64 %66, %69
  br i1 %70, label %71, label %76

71:                                               ; preds = %64
  call void @llvm.lifetime.start.p0(i64 24, ptr %12) #6
  %72 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 19
  %73 = load i32, ptr %72, align 8, !tbaa !41
  call void @_Z22structured_to_gmsh_hexj(ptr dead_on_unwind writable sret(%"class.std::vector.7") align 8 %12, i32 noundef %73)
  %74 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 88
  %75 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIiSaIiEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %74, ptr noundef nonnull align 8 dereferenceable(24) %12) #6
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #6
  br label %76

76:                                               ; preds = %71, %64
  %77 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 82
  %78 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %77) #6
  %79 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %80 = load i32, ptr %79, align 8, !tbaa !11
  %81 = zext i32 %80 to i64
  %82 = icmp ult i64 %78, %81
  br i1 %82, label %97, label %83

83:                                               ; preds = %76
  %84 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 83
  %85 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %84) #6
  %86 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %87 = load i32, ptr %86, align 8, !tbaa !11
  %88 = zext i32 %87 to i64
  %89 = icmp ult i64 %85, %88
  br i1 %89, label %97, label %90

90:                                               ; preds = %83
  %91 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 84
  %92 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %91) #6
  %93 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %94 = load i32, ptr %93, align 8, !tbaa !11
  %95 = zext i32 %94 to i64
  %96 = icmp ult i64 %92, %95
  br i1 %96, label %97, label %110

97:                                               ; preds = %90, %83, %76
  %98 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 82
  %99 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %100 = load i32, ptr %99, align 8, !tbaa !11
  %101 = zext i32 %100 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %101)
  %102 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 83
  %103 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %104 = load i32, ptr %103, align 8, !tbaa !11
  %105 = zext i32 %104 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %102, i64 noundef %105)
  %106 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 84
  %107 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %108 = load i32, ptr %107, align 8, !tbaa !11
  %109 = zext i32 %108 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %109)
  br label %110

110:                                              ; preds = %97, %90
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  store i32 0, ptr %13, align 4, !tbaa !38
  br label %111

111:                                              ; preds = %142, %110
  %112 = load i32, ptr %13, align 4, !tbaa !38
  %113 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %114 = load i32, ptr %113, align 8, !tbaa !11
  %115 = icmp ult i32 %112, %114
  br i1 %115, label %117, label %116

116:                                              ; preds = %111
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  br label %145

117:                                              ; preds = %111
  %118 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 81
  %119 = load double, ptr %7, align 8, !tbaa !9
  %120 = load i32, ptr %13, align 4, !tbaa !38
  %121 = call noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24) %118, double noundef %119, i32 noundef %120)
  %122 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 82
  %123 = load i32, ptr %13, align 4, !tbaa !38
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %122, i64 noundef %124) #6
  store double %121, ptr %125, align 8, !tbaa !9
  %126 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 81
  %127 = load double, ptr %8, align 8, !tbaa !9
  %128 = load i32, ptr %13, align 4, !tbaa !38
  %129 = call noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24) %126, double noundef %127, i32 noundef %128)
  %130 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 83
  %131 = load i32, ptr %13, align 4, !tbaa !38
  %132 = sext i32 %131 to i64
  %133 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %130, i64 noundef %132) #6
  store double %129, ptr %133, align 8, !tbaa !9
  %134 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 81
  %135 = load double, ptr %9, align 8, !tbaa !9
  %136 = load i32, ptr %13, align 4, !tbaa !38
  %137 = call noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24) %134, double noundef %135, i32 noundef %136)
  %138 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 84
  %139 = load i32, ptr %13, align 4, !tbaa !38
  %140 = sext i32 %139 to i64
  %141 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef %140) #6
  store double %137, ptr %141, align 8, !tbaa !9
  br label %142

142:                                              ; preds = %117
  %143 = load i32, ptr %13, align 4, !tbaa !38
  %144 = add nsw i32 %143, 1
  store i32 %144, ptr %13, align 4, !tbaa !38
  br label %111, !llvm.loop !42

145:                                              ; preds = %116
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  store i32 0, ptr %14, align 4, !tbaa !38
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #6
  store i32 0, ptr %15, align 4, !tbaa !38
  br label %146

146:                                              ; preds = %201, %145
  %147 = load i32, ptr %15, align 4, !tbaa !38
  %148 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %149 = load i32, ptr %148, align 8, !tbaa !11
  %150 = icmp ult i32 %147, %149
  br i1 %150, label %152, label %151

151:                                              ; preds = %146
  store i32 8, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  br label %204

152:                                              ; preds = %146
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #6
  store i32 0, ptr %17, align 4, !tbaa !38
  br label %153

153:                                              ; preds = %197, %152
  %154 = load i32, ptr %17, align 4, !tbaa !38
  %155 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %156 = load i32, ptr %155, align 8, !tbaa !11
  %157 = icmp ult i32 %154, %156
  br i1 %157, label %159, label %158

158:                                              ; preds = %153
  store i32 11, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #6
  br label %200

159:                                              ; preds = %153
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #6
  store i32 0, ptr %18, align 4, !tbaa !38
  br label %160

160:                                              ; preds = %193, %159
  %161 = load i32, ptr %18, align 4, !tbaa !38
  %162 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 80
  %163 = load i32, ptr %162, align 8, !tbaa !11
  %164 = icmp ult i32 %161, %163
  br i1 %164, label %166, label %165

165:                                              ; preds = %160
  store i32 14, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  br label %196

166:                                              ; preds = %160
  %167 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 82
  %168 = load i32, ptr %18, align 4, !tbaa !38
  %169 = sext i32 %168 to i64
  %170 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %167, i64 noundef %169) #6
  %171 = load double, ptr %170, align 8, !tbaa !9
  %172 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 83
  %173 = load i32, ptr %17, align 4, !tbaa !38
  %174 = sext i32 %173 to i64
  %175 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %172, i64 noundef %174) #6
  %176 = load double, ptr %175, align 8, !tbaa !9
  %177 = fmul double %171, %176
  %178 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 84
  %179 = load i32, ptr %15, align 4, !tbaa !38
  %180 = sext i32 %179 to i64
  %181 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %178, i64 noundef %180) #6
  %182 = load double, ptr %181, align 8, !tbaa !9
  %183 = fmul double %177, %182
  %184 = load ptr, ptr %5, align 8, !tbaa !5
  %185 = getelementptr inbounds %class.Elements, ptr %19, i32 0, i32 88
  %186 = load i32, ptr %14, align 4, !tbaa !38
  %187 = sext i32 %186 to i64
  %188 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %185, i64 noundef %187) #6
  %189 = load i32, ptr %188, align 4, !tbaa !38
  %190 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN8mdvectorIdEclEj(ptr noundef nonnull align 8 dereferenceable(105) %184, i32 noundef %189)
  store double %183, ptr %190, align 8, !tbaa !9
  %191 = load i32, ptr %14, align 4, !tbaa !38
  %192 = add nsw i32 %191, 1
  store i32 %192, ptr %14, align 4, !tbaa !38
  br label %193

193:                                              ; preds = %166
  %194 = load i32, ptr %18, align 4, !tbaa !38
  %195 = add nsw i32 %194, 1
  store i32 %195, ptr %18, align 4, !tbaa !38
  br label %160, !llvm.loop !43

196:                                              ; preds = %165
  br label %197

197:                                              ; preds = %196
  %198 = load i32, ptr %17, align 4, !tbaa !38
  %199 = add nsw i32 %198, 1
  store i32 %199, ptr %17, align 4, !tbaa !38
  br label %153, !llvm.loop !44

200:                                              ; preds = %158
  br label %201

201:                                              ; preds = %200
  %202 = load i32, ptr %15, align 4, !tbaa !38
  %203 = add nsw i32 %202, 1
  store i32 %203, ptr %15, align 4, !tbaa !38
  br label %146, !llvm.loop !45

204:                                              ; preds = %151
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

declare void @_Z22structured_to_gmsh_hexj(ptr dead_on_unwind writable sret(%"class.std::vector.7") align 8, i32 noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIiSaIiEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24), double noundef, i32 noundef) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !14, i64 6048}
!12 = !{!"_ZTS8Elements", !6, i64 8, !6, i64 16, !13, i64 24, !14, i64 28, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44, !14, i64 48, !14, i64 52, !14, i64 56, !14, i64 60, !14, i64 64, !14, i64 68, !14, i64 72, !14, i64 76, !14, i64 80, !14, i64 84, !14, i64 88, !14, i64 92, !14, i64 96, !15, i64 104, !15, i64 216, !15, i64 328, !15, i64 440, !23, i64 552, !15, i64 576, !15, i64 688, !15, i64 800, !15, i64 912, !15, i64 1024, !27, i64 1136, !27, i64 1248, !27, i64 1360, !27, i64 1472, !27, i64 1584, !18, i64 1696, !18, i64 1720, !18, i64 1744, !18, i64 1768, !15, i64 1792, !15, i64 1904, !15, i64 2016, !15, i64 2128, !15, i64 2240, !15, i64 2352, !15, i64 2464, !15, i64 2576, !15, i64 2688, !15, i64 2800, !15, i64 2912, !15, i64 3024, !15, i64 3136, !15, i64 3248, !15, i64 3360, !15, i64 3472, !15, i64 3584, !15, i64 3696, !15, i64 3808, !15, i64 3920, !15, i64 4032, !15, i64 4144, !15, i64 4256, !15, i64 4368, !15, i64 4480, !15, i64 4592, !15, i64 4704, !15, i64 4816, !15, i64 4928, !15, i64 5040, !15, i64 5152, !15, i64 5264, !15, i64 5376, !15, i64 5488, !15, i64 5600, !15, i64 5712, !15, i64 5824, !15, i64 5936, !14, i64 6048, !18, i64 6056, !18, i64 6080, !18, i64 6104, !18, i64 6128, !18, i64 6152, !18, i64 6176, !18, i64 6200, !28, i64 6224, !15, i64 6248, !15, i64 6360, !15, i64 6472, !15, i64 6584, !15, i64 6696, !15, i64 6808, !15, i64 6920, !15, i64 7032, !15, i64 7144, !16, i64 7256, !16, i64 7264, !16, i64 7272, !16, i64 7280, !16, i64 7288, !15, i64 7296, !15, i64 7408, !15, i64 7520, !15, i64 7632, !15, i64 7744, !15, i64 7856, !15, i64 7968, !15, i64 8080, !15, i64 8192, !15, i64 8304, !15, i64 8416, !15, i64 8528, !15, i64 8640, !15, i64 8752, !15, i64 8864, !15, i64 8976, !15, i64 9088, !15, i64 9200, !15, i64 9312, !15, i64 9424, !15, i64 9536, !15, i64 9648, !15, i64 9760, !15, i64 9872, !15, i64 9984, !15, i64 10096, !15, i64 10208, !15, i64 10320, !15, i64 10432, !15, i64 10544, !15, i64 10656, !15, i64 10768, !15, i64 10880, !15, i64 10992, !15, i64 11104, !15, i64 11216, !15, i64 11328, !15, i64 11440, !15, i64 11552, !15, i64 11664, !15, i64 11776, !15, i64 11888, !15, i64 12000, !32, i64 12112, !32, i64 12344, !15, i64 12576, !15, i64 12688, !15, i64 12800, !15, i64 12912, !15, i64 13024, !15, i64 13136, !14, i64 13248, !15, i64 13256, !15, i64 13368, !14, i64 13480, !6, i64 13488, !28, i64 13496, !27, i64 13520, !15, i64 13632, !15, i64 13744, !15, i64 13856}
!13 = !{!"_ZTS8ELE_TYPE", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"_ZTS8mdvectorIdE", !14, i64 0, !16, i64 8, !16, i64 16, !17, i64 24, !17, i64 48, !18, i64 72, !6, i64 96, !22, i64 104}
!16 = !{!"long", !7, i64 0}
!17 = !{!"_ZTSSt5arrayIjLm6EE", !7, i64 0}
!18 = !{!"_ZTSSt6vectorIdSaIdEE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"bool", !7, i64 0}
!23 = !{!"_ZTSSt6vectorIjSaIjEE", !24, i64 0}
!24 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!27 = !{!"_ZTS8mdvectorIjE", !14, i64 0, !16, i64 8, !16, i64 16, !17, i64 24, !17, i64 48, !23, i64 72, !6, i64 96, !22, i64 104}
!28 = !{!"_ZTSSt6vectorIiSaIiEE", !29, i64 0}
!29 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!32 = !{!"_ZTS6mdviewIdE", !33, i64 0, !27, i64 112, !14, i64 224}
!33 = !{!"_ZTS8mdvectorIPdE", !14, i64 0, !16, i64 8, !16, i64 16, !17, i64 24, !17, i64 48, !34, i64 72, !6, i64 96, !22, i64 104}
!34 = !{!"_ZTSSt6vectorIPdSaIS0_EE", !35, i64 0}
!35 = !{!"_ZTSSt12_Vector_baseIPdSaIS0_EE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPdSaIS0_EE12_Vector_implE", !37, i64 0}
!37 = !{!"_ZTSNSt12_Vector_baseIPdSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!38 = !{!14, !14, i64 0}
!39 = distinct !{!39, !40}
!40 = !{!"llvm.loop.mustprogress"}
!41 = !{!12, !14, i64 88}
!42 = distinct !{!42, !40}
!43 = distinct !{!43, !40}
!44 = distinct !{!44, !40}
!45 = distinct !{!45, !40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.7" = type { %"struct.std::_Vector_base.8" }
%"struct.std::_Vector_base.8" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN8mdvectorIdEclEj(ptr noundef nonnull align 8 dereferenceable(105), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN5Hexas10calc_shapeER8mdvectorIdEPKd(ptr noundef nonnull align 8 dereferenceable(13968) %0, ptr noundef nonnull align 8 dereferenceable(105) %1, ptr nocapture noundef readonly %2) unnamed_addr #2 align 2 {
  %4 = alloca %"class.std::vector.7", align 8
  %5 = load double, ptr %2, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %2, i64 8
  %7 = load double, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %2, i64 16
  %9 = load double, ptr %8, align 8, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %0, i64 6056
  %11 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #6
  %12 = getelementptr inbounds i8, ptr %0, i64 6048
  %13 = load i32, ptr %12, align 8, !tbaa !9
  %14 = zext i32 %13 to i64
  %.not = icmp eq i64 %11, %14
  br i1 %.not, label %.loopexit, label %15

15:                                               ; preds = %3
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %14)
  %16 = load i32, ptr %12, align 8, !tbaa !9
  %17 = add i32 %16, -1
  %18 = uitofp i32 %17 to double
  %19 = fdiv double 2.000000e+00, %18
  %.not53 = icmp eq i32 %16, 0
  br i1 %.not53, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %15, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %15 ]
  %20 = trunc nuw nsw i64 %indvars.iv to i32
  %21 = uitofp nneg i32 %20 to double
  %22 = tail call double @llvm.fmuladd.f64(double %21, double %19, double -1.000000e+00)
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %indvars.iv) #6
  store double %22, ptr %23, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %24 = load i32, ptr %12, align 8, !tbaa !9
  %25 = zext i32 %24 to i64
  %26 = icmp ult i64 %indvars.iv.next, %25
  br i1 %26, label %.lr.ph, label %.loopexit, !llvm.loop !37

.loopexit:                                        ; preds = %.lr.ph, %15, %3
  %27 = getelementptr inbounds i8, ptr %0, i64 6224
  %28 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %27) #6
  %29 = getelementptr inbounds i8, ptr %0, i64 88
  %30 = load i32, ptr %29, align 8, !tbaa !39
  %31 = zext i32 %30 to i64
  %.not37 = icmp eq i64 %28, %31
  br i1 %.not37, label %34, label %32

32:                                               ; preds = %.loopexit
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #6
  call void @_Z22structured_to_gmsh_hexj(ptr dead_on_unwind nonnull writable sret(%"class.std::vector.7") align 8 %4, i32 noundef %30)
  %33 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIiSaIiEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24) %27, ptr noundef nonnull align 8 dereferenceable(24) %4) #6
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %4) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #6
  br label %34

34:                                               ; preds = %32, %.loopexit
  %35 = getelementptr inbounds i8, ptr %0, i64 6080
  %36 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %35) #6
  %37 = load i32, ptr %12, align 8, !tbaa !9
  %38 = zext i32 %37 to i64
  %39 = icmp ult i64 %36, %38
  br i1 %39, label %52, label %40

40:                                               ; preds = %34
  %41 = getelementptr inbounds i8, ptr %0, i64 6104
  %42 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %41) #6
  %43 = load i32, ptr %12, align 8, !tbaa !9
  %44 = zext i32 %43 to i64
  %45 = icmp ult i64 %42, %44
  br i1 %45, label %52, label %46

46:                                               ; preds = %40
  %47 = getelementptr inbounds i8, ptr %0, i64 6128
  %48 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %47) #6
  %49 = load i32, ptr %12, align 8, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = icmp ult i64 %48, %50
  br i1 %51, label %52, label %59

52:                                               ; preds = %46, %40, %34
  %.pre-phi = phi i64 [ %50, %46 ], [ %44, %40 ], [ %38, %34 ]
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %.pre-phi)
  %53 = getelementptr inbounds i8, ptr %0, i64 6104
  %54 = load i32, ptr %12, align 8, !tbaa !9
  %55 = zext i32 %54 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55)
  %56 = getelementptr inbounds i8, ptr %0, i64 6128
  %57 = load i32, ptr %12, align 8, !tbaa !9
  %58 = zext i32 %57 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58)
  %.pre = load i32, ptr %12, align 8, !tbaa !9
  br label %59

59:                                               ; preds = %52, %46
  %60 = phi i32 [ %.pre, %52 ], [ %49, %46 ]
  %.not54 = icmp eq i32 %60, 0
  br i1 %.not54, label %._crit_edge52, label %.lr.ph42

.lr.ph42:                                         ; preds = %59
  %61 = getelementptr inbounds i8, ptr %0, i64 6104
  %62 = getelementptr inbounds i8, ptr %0, i64 6128
  br label %65

.preheader39:                                     ; preds = %65
  %.not55 = icmp eq i32 %73, 0
  br i1 %.not55, label %._crit_edge52, label %.preheader38.preheader

.preheader38.preheader:                           ; preds = %.preheader39
  %63 = getelementptr inbounds i8, ptr %0, i64 6104
  %64 = getelementptr inbounds i8, ptr %0, i64 6128
  br label %.preheader38

65:                                               ; preds = %.lr.ph42, %65
  %indvars.iv63 = phi i64 [ 0, %.lr.ph42 ], [ %indvars.iv.next64, %65 ]
  %66 = trunc nuw nsw i64 %indvars.iv63 to i32
  %67 = call noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24) %10, double noundef %5, i32 noundef %66)
  %68 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %indvars.iv63) #6
  store double %67, ptr %68, align 8, !tbaa !5
  %69 = call noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24) %10, double noundef %7, i32 noundef %66)
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %indvars.iv63) #6
  store double %69, ptr %70, align 8, !tbaa !5
  %71 = call noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24) %10, double noundef %9, i32 noundef %66)
  %72 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %indvars.iv63) #6
  store double %71, ptr %72, align 8, !tbaa !5
  %indvars.iv.next64 = add nuw nsw i64 %indvars.iv63, 1
  %73 = load i32, ptr %12, align 8, !tbaa !9
  %74 = zext i32 %73 to i64
  %75 = icmp ult i64 %indvars.iv.next64, %74
  br i1 %75, label %65, label %.preheader39, !llvm.loop !40

.preheader38:                                     ; preds = %.preheader38.preheader, %._crit_edge48
  %76 = phi i32 [ %73, %.preheader38.preheader ], [ %80, %._crit_edge48 ]
  %indvars.iv76 = phi i64 [ 0, %.preheader38.preheader ], [ %indvars.iv.next77, %._crit_edge48 ]
  %.03350 = phi i32 [ 0, %.preheader38.preheader ], [ %.1.lcssa, %._crit_edge48 ]
  %.not57 = icmp eq i32 %76, 0
  br i1 %.not57, label %._crit_edge48, label %.preheader

._crit_edge52:                                    ; preds = %._crit_edge48, %59, %.preheader39
  ret void

.preheader:                                       ; preds = %.preheader38, %._crit_edge
  %77 = phi i32 [ %84, %._crit_edge ], [ %76, %.preheader38 ]
  %78 = phi i32 [ %85, %._crit_edge ], [ 1, %.preheader38 ]
  %indvars.iv73 = phi i64 [ %indvars.iv.next74, %._crit_edge ], [ 0, %.preheader38 ]
  %.146 = phi i32 [ %.2.lcssa, %._crit_edge ], [ %.03350, %.preheader38 ]
  %.not59 = icmp eq i32 %78, 0
  br i1 %.not59, label %._crit_edge, label %.lr.ph45

.lr.ph45:                                         ; preds = %.preheader
  %79 = sext i32 %.146 to i64
  br label %88

._crit_edge48:                                    ; preds = %._crit_edge, %.preheader38
  %80 = phi i32 [ 0, %.preheader38 ], [ %84, %._crit_edge ]
  %.1.lcssa = phi i32 [ %.03350, %.preheader38 ], [ %.2.lcssa, %._crit_edge ]
  %indvars.iv.next77 = add nuw nsw i64 %indvars.iv76, 1
  %81 = zext i32 %80 to i64
  %82 = icmp ult i64 %indvars.iv.next77, %81
  br i1 %82, label %.preheader38, label %._crit_edge52, !llvm.loop !41

._crit_edge.loopexit:                             ; preds = %88
  %83 = trunc nsw i64 %indvars.iv.next69 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %.preheader, %._crit_edge.loopexit
  %84 = phi i32 [ %100, %._crit_edge.loopexit ], [ %77, %.preheader ]
  %85 = phi i32 [ %100, %._crit_edge.loopexit ], [ 0, %.preheader ]
  %.2.lcssa = phi i32 [ %83, %._crit_edge.loopexit ], [ %.146, %.preheader ]
  %indvars.iv.next74 = add nuw nsw i64 %indvars.iv73, 1
  %86 = zext i32 %85 to i64
  %87 = icmp ult i64 %indvars.iv.next74, %86
  br i1 %87, label %.preheader, label %._crit_edge48, !llvm.loop !43

88:                                               ; preds = %.lr.ph45, %88
  %indvars.iv68 = phi i64 [ %79, %.lr.ph45 ], [ %indvars.iv.next69, %88 ]
  %indvars.iv66 = phi i64 [ 0, %.lr.ph45 ], [ %indvars.iv.next67, %88 ]
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %indvars.iv66) #6
  %90 = load double, ptr %89, align 8, !tbaa !5
  %91 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %indvars.iv73) #6
  %92 = load double, ptr %91, align 8, !tbaa !5
  %93 = fmul double %90, %92
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %indvars.iv76) #6
  %95 = load double, ptr %94, align 8, !tbaa !5
  %96 = fmul double %93, %95
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %indvars.iv68) #6
  %98 = load i32, ptr %97, align 4, !tbaa !44
  %99 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN8mdvectorIdEclEj(ptr noundef nonnull align 8 dereferenceable(105) %1, i32 noundef %98)
  store double %96, ptr %99, align 8, !tbaa !5
  %indvars.iv.next69 = add nsw i64 %indvars.iv68, 1
  %indvars.iv.next67 = add nuw nsw i64 %indvars.iv66, 1
  %100 = load i32, ptr %12, align 8, !tbaa !9
  %101 = zext i32 %100 to i64
  %102 = icmp ult i64 %indvars.iv.next67, %101
  br i1 %102, label %88, label %._crit_edge.loopexit, !llvm.loop !45
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

declare void @_Z22structured_to_gmsh_hexj(ptr dead_on_unwind writable sret(%"class.std::vector.7") align 8, i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIiSaIiEEaSEOS1_(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef double @_ZL8LagrangeRKSt6vectorIdSaIdEEdj(ptr noundef nonnull align 8 dereferenceable(24), double noundef, i32 noundef) local_unnamed_addr #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 6048}
!10 = !{!"_ZTS8Elements", !11, i64 8, !11, i64 16, !12, i64 24, !13, i64 28, !13, i64 32, !13, i64 36, !13, i64 40, !13, i64 44, !13, i64 48, !13, i64 52, !13, i64 56, !13, i64 60, !13, i64 64, !13, i64 68, !13, i64 72, !13, i64 76, !13, i64 80, !13, i64 84, !13, i64 88, !13, i64 92, !13, i64 96, !14, i64 104, !14, i64 216, !14, i64 328, !14, i64 440, !22, i64 552, !14, i64 576, !14, i64 688, !14, i64 800, !14, i64 912, !14, i64 1024, !26, i64 1136, !26, i64 1248, !26, i64 1360, !26, i64 1472, !26, i64 1584, !17, i64 1696, !17, i64 1720, !17, i64 1744, !17, i64 1768, !14, i64 1792, !14, i64 1904, !14, i64 2016, !14, i64 2128, !14, i64 2240, !14, i64 2352, !14, i64 2464, !14, i64 2576, !14, i64 2688, !14, i64 2800, !14, i64 2912, !14, i64 3024, !14, i64 3136, !14, i64 3248, !14, i64 3360, !14, i64 3472, !14, i64 3584, !14, i64 3696, !14, i64 3808, !14, i64 3920, !14, i64 4032, !14, i64 4144, !14, i64 4256, !14, i64 4368, !14, i64 4480, !14, i64 4592, !14, i64 4704, !14, i64 4816, !14, i64 4928, !14, i64 5040, !14, i64 5152, !14, i64 5264, !14, i64 5376, !14, i64 5488, !14, i64 5600, !14, i64 5712, !14, i64 5824, !14, i64 5936, !13, i64 6048, !17, i64 6056, !17, i64 6080, !17, i64 6104, !17, i64 6128, !17, i64 6152, !17, i64 6176, !17, i64 6200, !27, i64 6224, !14, i64 6248, !14, i64 6360, !14, i64 6472, !14, i64 6584, !14, i64 6696, !14, i64 6808, !14, i64 6920, !14, i64 7032, !14, i64 7144, !15, i64 7256, !15, i64 7264, !15, i64 7272, !15, i64 7280, !15, i64 7288, !14, i64 7296, !14, i64 7408, !14, i64 7520, !14, i64 7632, !14, i64 7744, !14, i64 7856, !14, i64 7968, !14, i64 8080, !14, i64 8192, !14, i64 8304, !14, i64 8416, !14, i64 8528, !14, i64 8640, !14, i64 8752, !14, i64 8864, !14, i64 8976, !14, i64 9088, !14, i64 9200, !14, i64 9312, !14, i64 9424, !14, i64 9536, !14, i64 9648, !14, i64 9760, !14, i64 9872, !14, i64 9984, !14, i64 10096, !14, i64 10208, !14, i64 10320, !14, i64 10432, !14, i64 10544, !14, i64 10656, !14, i64 10768, !14, i64 10880, !14, i64 10992, !14, i64 11104, !14, i64 11216, !14, i64 11328, !14, i64 11440, !14, i64 11552, !14, i64 11664, !14, i64 11776, !14, i64 11888, !14, i64 12000, !31, i64 12112, !31, i64 12344, !14, i64 12576, !14, i64 12688, !14, i64 12800, !14, i64 12912, !14, i64 13024, !14, i64 13136, !13, i64 13248, !14, i64 13256, !14, i64 13368, !13, i64 13480, !11, i64 13488, !27, i64 13496, !26, i64 13520, !14, i64 13632, !14, i64 13744, !14, i64 13856}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"_ZTS8ELE_TYPE", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_ZTS8mdvectorIdE", !13, i64 0, !15, i64 8, !15, i64 16, !16, i64 24, !16, i64 48, !17, i64 72, !11, i64 96, !21, i64 104}
!15 = !{!"long", !7, i64 0}
!16 = !{!"_ZTSSt5arrayIjLm6EE", !7, i64 0}
!17 = !{!"_ZTSSt6vectorIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!21 = !{!"bool", !7, i64 0}
!22 = !{!"_ZTSSt6vectorIjSaIjEE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseIjSaIjEE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseIjSaIjEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!26 = !{!"_ZTS8mdvectorIjE", !13, i64 0, !15, i64 8, !15, i64 16, !16, i64 24, !16, i64 48, !22, i64 72, !11, i64 96, !21, i64 104}
!27 = !{!"_ZTSSt6vectorIiSaIiEE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!31 = !{!"_ZTS6mdviewIdE", !32, i64 0, !26, i64 112, !13, i64 224}
!32 = !{!"_ZTS8mdvectorIPdE", !13, i64 0, !15, i64 8, !15, i64 16, !16, i64 24, !16, i64 48, !33, i64 72, !11, i64 96, !21, i64 104}
!33 = !{!"_ZTSSt6vectorIPdSaIS0_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseIPdSaIS0_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseIPdSaIS0_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseIPdSaIS0_EE17_Vector_impl_dataE", !11, i64 0, !11, i64 8, !11, i64 16}
!37 = distinct !{!37, !38}
!38 = !{!"llvm.loop.mustprogress"}
!39 = !{!10, !13, i64 88}
!40 = distinct !{!40, !38}
!41 = distinct !{!41, !38, !42}
!42 = !{!"llvm.loop.unswitch.partial.disable"}
!43 = distinct !{!43, !38, !42}
!44 = !{!13, !13, i64 0}
!45 = distinct !{!45, !38}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass