; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/Toca do Saci (OBI2016)/main.ll (Z4pathii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@grid = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@cont = external dso_local global i32, align 4
@row = external dso_local global [4 x i32], align 16
@col = external dso_local global [4 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z4pathii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %9) #3
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %12) #3
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp ne i32 %14, 2
  br i1 %15, label %16, label %94

16:                                               ; preds = %2
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %18) #3
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %21) #3
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp ne i32 %23, 0
  br i1 %24, label %94, label %25

25:                                               ; preds = %16
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %27) #3
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30) #3
  store i32 1, ptr %31, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %32

32:                                               ; preds = %90, %25
  %33 = load i32, ptr %5, align 4, !tbaa !5
  %34 = icmp slt i32 %33, 4
  br i1 %34, label %36, label %35

35:                                               ; preds = %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %93

36:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = load i32, ptr %5, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [4 x i32], ptr @row, i64 0, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = add nsw i32 %37, %41
  store i32 %42, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [4 x i32], ptr @col, i64 0, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = add nsw i32 %43, %47
  store i32 %48, ptr %7, align 4, !tbaa !5
  %49 = load i32, ptr %6, align 4, !tbaa !5
  %50 = icmp sge i32 %49, 0
  br i1 %50, label %51, label %89

51:                                               ; preds = %36
  %52 = load i32, ptr %7, align 4, !tbaa !5
  %53 = icmp sge i32 %52, 0
  br i1 %53, label %54, label %89

54:                                               ; preds = %51
  %55 = load i32, ptr %6, align 4, !tbaa !5
  %56 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @grid) #3
  %57 = trunc i64 %56 to i32
  %58 = icmp slt i32 %55, %57
  br i1 %58, label %59, label %89

59:                                               ; preds = %54
  %60 = load i32, ptr %7, align 4, !tbaa !5
  %61 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef 0) #3
  %62 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %61) #3
  %63 = trunc i64 %62 to i32
  %64 = icmp slt i32 %60, %63
  br i1 %64, label %65, label %89

65:                                               ; preds = %59
  %66 = load i32, ptr %6, align 4, !tbaa !5
  %67 = sext i32 %66 to i64
  %68 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %67) #3
  %69 = load i32, ptr %7, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %70) #3
  %72 = load i32, ptr %71, align 4, !tbaa !5
  %73 = icmp ne i32 %72, 0
  br i1 %73, label %88, label %74

74:                                               ; preds = %65
  %75 = load i32, ptr %6, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %76) #3
  %78 = load i32, ptr %7, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #3
  %81 = load i32, ptr %80, align 4, !tbaa !5
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %83, label %88

83:                                               ; preds = %74
  %84 = load i32, ptr @cont, align 4, !tbaa !5
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr @cont, align 4, !tbaa !5
  %86 = load i32, ptr %6, align 4, !tbaa !5
  %87 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z4pathii(i32 noundef %86, i32 noundef %87)
  br label %88

88:                                               ; preds = %83, %74, %65
  br label %89

89:                                               ; preds = %88, %59, %54, %51, %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %90

90:                                               ; preds = %89
  %91 = load i32, ptr %5, align 4, !tbaa !5
  %92 = add nsw i32 %91, 1
  store i32 %92, ptr %5, align 4, !tbaa !5
  br label %32, !llvm.loop !9

93:                                               ; preds = %35
  br label %94

94:                                               ; preds = %93, %16, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@grid = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@cont = external dso_local local_unnamed_addr global i32, align 4
@row = external dso_local local_unnamed_addr global [4 x i32], align 16
@col = external dso_local local_unnamed_addr global [4 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z4pathii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  br label %tailrecurse

tailrecurse:                                      ; preds = %127, %2
  %.tr = phi i32 [ %0, %2 ], [ %103, %127 ]
  %.tr30 = phi i32 [ %1, %2 ], [ %105, %127 ]
  %3 = sext i32 %.tr to i64
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %3) #1
  %5 = sext i32 %.tr30 to i64
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5) #1
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %.not = icmp eq i32 %7, 2
  br i1 %.not, label %.loopexit, label %8

8:                                                ; preds = %tailrecurse
  %9 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %5) #1
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %.not25 = icmp eq i32 %11, 0
  br i1 %.not25, label %12, label %.loopexit

12:                                               ; preds = %8
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %5) #1
  store i32 1, ptr %14, align 4, !tbaa !5
  %15 = load i32, ptr @row, align 16, !tbaa !5
  %16 = add nsw i32 %15, %.tr
  %17 = load i32, ptr @col, align 16, !tbaa !5
  %18 = add nsw i32 %17, %.tr30
  %19 = icmp sgt i32 %16, -1
  %20 = icmp sgt i32 %18, -1
  %or.cond = select i1 %19, i1 %20, i1 false
  br i1 %or.cond, label %21, label %43

21:                                               ; preds = %12
  %22 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @grid) #1
  %23 = trunc i64 %22 to i32
  %24 = icmp slt i32 %16, %23
  br i1 %24, label %25, label %43

25:                                               ; preds = %21
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef 0) #1
  %27 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %26) #1
  %28 = trunc i64 %27 to i32
  %29 = icmp slt i32 %18, %28
  br i1 %29, label %30, label %43

30:                                               ; preds = %25
  %31 = zext nneg i32 %16 to i64
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %31) #1
  %33 = zext nneg i32 %18 to i64
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %33) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %.not26 = icmp eq i32 %35, 0
  br i1 %.not26, label %36, label %43

36:                                               ; preds = %30
  %37 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %31) #1
  %38 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %33) #1
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %.not27 = icmp eq i32 %39, 0
  br i1 %.not27, label %43, label %40

40:                                               ; preds = %36
  %41 = load i32, ptr @cont, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr @cont, align 4, !tbaa !5
  tail call void @_Z4pathii(i32 noundef %16, i32 noundef %18)
  br label %43

43:                                               ; preds = %30, %36, %40, %25, %21, %12
  %44 = load i32, ptr getelementptr inbounds (i8, ptr @row, i64 4), align 4, !tbaa !5
  %45 = add nsw i32 %44, %.tr
  %46 = load i32, ptr getelementptr inbounds (i8, ptr @col, i64 4), align 4, !tbaa !5
  %47 = add nsw i32 %46, %.tr30
  %48 = icmp sgt i32 %45, -1
  %49 = icmp sgt i32 %47, -1
  %or.cond.1 = select i1 %48, i1 %49, i1 false
  br i1 %or.cond.1, label %50, label %72

50:                                               ; preds = %43
  %51 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @grid) #1
  %52 = trunc i64 %51 to i32
  %53 = icmp slt i32 %45, %52
  br i1 %53, label %54, label %72

54:                                               ; preds = %50
  %55 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef 0) #1
  %56 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %55) #1
  %57 = trunc i64 %56 to i32
  %58 = icmp slt i32 %47, %57
  br i1 %58, label %59, label %72

59:                                               ; preds = %54
  %60 = zext nneg i32 %45 to i64
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %60) #1
  %62 = zext nneg i32 %47 to i64
  %63 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %62) #1
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %.not26.1 = icmp eq i32 %64, 0
  br i1 %.not26.1, label %65, label %72

65:                                               ; preds = %59
  %66 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %60) #1
  %67 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %62) #1
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %.not27.1 = icmp eq i32 %68, 0
  br i1 %.not27.1, label %72, label %69

69:                                               ; preds = %65
  %70 = load i32, ptr @cont, align 4, !tbaa !5
  %71 = add nsw i32 %70, 1
  store i32 %71, ptr @cont, align 4, !tbaa !5
  tail call void @_Z4pathii(i32 noundef %45, i32 noundef %47)
  br label %72

72:                                               ; preds = %69, %65, %59, %54, %50, %43
  %73 = load i32, ptr getelementptr inbounds (i8, ptr @row, i64 8), align 8, !tbaa !5
  %74 = add nsw i32 %73, %.tr
  %75 = load i32, ptr getelementptr inbounds (i8, ptr @col, i64 8), align 8, !tbaa !5
  %76 = add nsw i32 %75, %.tr30
  %77 = icmp sgt i32 %74, -1
  %78 = icmp sgt i32 %76, -1
  %or.cond.2 = select i1 %77, i1 %78, i1 false
  br i1 %or.cond.2, label %79, label %101

79:                                               ; preds = %72
  %80 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @grid) #1
  %81 = trunc i64 %80 to i32
  %82 = icmp slt i32 %74, %81
  br i1 %82, label %83, label %101

83:                                               ; preds = %79
  %84 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef 0) #1
  %85 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %84) #1
  %86 = trunc i64 %85 to i32
  %87 = icmp slt i32 %76, %86
  br i1 %87, label %88, label %101

88:                                               ; preds = %83
  %89 = zext nneg i32 %74 to i64
  %90 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %89) #1
  %91 = zext nneg i32 %76 to i64
  %92 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %91) #1
  %93 = load i32, ptr %92, align 4, !tbaa !5
  %.not26.2 = icmp eq i32 %93, 0
  br i1 %.not26.2, label %94, label %101

94:                                               ; preds = %88
  %95 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %89) #1
  %96 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %95, i64 noundef %91) #1
  %97 = load i32, ptr %96, align 4, !tbaa !5
  %.not27.2 = icmp eq i32 %97, 0
  br i1 %.not27.2, label %101, label %98

98:                                               ; preds = %94
  %99 = load i32, ptr @cont, align 4, !tbaa !5
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr @cont, align 4, !tbaa !5
  tail call void @_Z4pathii(i32 noundef %74, i32 noundef %76)
  br label %101

101:                                              ; preds = %98, %94, %88, %83, %79, %72
  %102 = load i32, ptr getelementptr inbounds (i8, ptr @row, i64 12), align 4, !tbaa !5
  %103 = add nsw i32 %102, %.tr
  %104 = load i32, ptr getelementptr inbounds (i8, ptr @col, i64 12), align 4, !tbaa !5
  %105 = add nsw i32 %104, %.tr30
  %106 = icmp sgt i32 %103, -1
  %107 = icmp sgt i32 %105, -1
  %or.cond.3 = select i1 %106, i1 %107, i1 false
  br i1 %or.cond.3, label %108, label %.loopexit

108:                                              ; preds = %101
  %109 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @grid) #1
  %110 = trunc i64 %109 to i32
  %111 = icmp slt i32 %103, %110
  br i1 %111, label %112, label %.loopexit

112:                                              ; preds = %108
  %113 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef 0) #1
  %114 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %113) #1
  %115 = trunc i64 %114 to i32
  %116 = icmp slt i32 %105, %115
  br i1 %116, label %117, label %.loopexit

117:                                              ; preds = %112
  %118 = zext nneg i32 %103 to i64
  %119 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %118) #1
  %120 = zext nneg i32 %105 to i64
  %121 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %119, i64 noundef %120) #1
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %.not26.3 = icmp eq i32 %122, 0
  br i1 %.not26.3, label %123, label %.loopexit

123:                                              ; preds = %117
  %124 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %118) #1
  %125 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %124, i64 noundef %120) #1
  %126 = load i32, ptr %125, align 4, !tbaa !5
  %.not27.3 = icmp eq i32 %126, 0
  br i1 %.not27.3, label %.loopexit, label %127

127:                                              ; preds = %123
  %128 = load i32, ptr @cont, align 4, !tbaa !5
  %129 = add nsw i32 %128, 1
  store i32 %129, ptr @cont, align 4, !tbaa !5
  br label %tailrecurse

.loopexit:                                        ; preds = %101, %108, %112, %117, %123, %8, %tailrecurse
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass