; LLVM IR from tum-i4/obfuscation-benchmarks :: tigress-generated-programs (RandomFunc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @RandomFunc(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1 x i64], align 8
  %6 = alloca i8, align 1
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds i64, ptr %9, i64 0
  %11 = load i64, ptr %10, align 8, !tbaa !9
  %12 = add i64 %11, 1373777115
  %13 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  store i64 %12, ptr %13, align 8, !tbaa !9
  %14 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %15 = load i64, ptr %14, align 8, !tbaa !9
  %16 = and i64 %15, 1
  %17 = icmp ne i64 %16, 0
  br i1 %17, label %18, label %115

18:                                               ; preds = %2
  %19 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %20 = load i64, ptr %19, align 8, !tbaa !9
  %21 = lshr i64 %20, 2
  %22 = and i64 %21, 1
  %23 = icmp ne i64 %22, 0
  br i1 %23, label %24, label %84

24:                                               ; preds = %18
  %25 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %26 = load i64, ptr %25, align 8, !tbaa !9
  %27 = lshr i64 %26, 3
  %28 = and i64 %27, 1
  %29 = icmp ne i64 %28, 0
  br i1 %29, label %30, label %49

30:                                               ; preds = %24
  %31 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %32 = load i64, ptr %31, align 8, !tbaa !9
  %33 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %34 = load i64, ptr %33, align 8, !tbaa !9
  %35 = lshr i64 %34, 2
  %36 = and i64 %35, 7
  %37 = or i64 %36, 1
  %38 = shl i64 %32, %37
  %39 = and i64 %38, 15
  %40 = shl i64 %39, 2
  %41 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %42 = load i64, ptr %41, align 8, !tbaa !9
  %43 = or i64 %42, %40
  store i64 %43, ptr %41, align 8, !tbaa !9
  %44 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %45 = load i64, ptr %44, align 8, !tbaa !9
  %46 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %47 = load i64, ptr %46, align 8, !tbaa !9
  %48 = add i64 %47, %45
  store i64 %48, ptr %46, align 8, !tbaa !9
  br label %83

49:                                               ; preds = %24
  %50 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %51 = getelementptr inbounds i8, ptr %50, i64 7
  %52 = load i8, ptr %51, align 1, !tbaa !11
  store i8 %52, ptr %6, align 1, !tbaa !11
  %53 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %54 = getelementptr inbounds i8, ptr %53, i64 5
  %55 = load i8, ptr %54, align 1, !tbaa !11
  %56 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %57 = getelementptr inbounds i8, ptr %56, i64 7
  store i8 %55, ptr %57, align 1, !tbaa !11
  %58 = load i8, ptr %6, align 1, !tbaa !11
  %59 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %60 = getelementptr inbounds i8, ptr %59, i64 5
  store i8 %58, ptr %60, align 1, !tbaa !11
  %61 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %62 = getelementptr inbounds i8, ptr %61, i64 4
  %63 = load i8, ptr %62, align 1, !tbaa !11
  store i8 %63, ptr %6, align 1, !tbaa !11
  %64 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %65 = getelementptr inbounds i8, ptr %64, i64 0
  %66 = load i8, ptr %65, align 1, !tbaa !11
  %67 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %68 = getelementptr inbounds i8, ptr %67, i64 4
  store i8 %66, ptr %68, align 1, !tbaa !11
  %69 = load i8, ptr %6, align 1, !tbaa !11
  %70 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %71 = getelementptr inbounds i8, ptr %70, i64 0
  store i8 %69, ptr %71, align 1, !tbaa !11
  %72 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %73 = getelementptr inbounds i16, ptr %72, i64 2
  %74 = load i16, ptr %73, align 2, !tbaa !12
  store i16 %74, ptr %7, align 2, !tbaa !12
  %75 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %76 = getelementptr inbounds i16, ptr %75, i64 0
  %77 = load i16, ptr %76, align 2, !tbaa !12
  %78 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %79 = getelementptr inbounds i16, ptr %78, i64 2
  store i16 %77, ptr %79, align 2, !tbaa !12
  %80 = load i16, ptr %7, align 2, !tbaa !12
  %81 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %82 = getelementptr inbounds i16, ptr %81, i64 0
  store i16 %80, ptr %82, align 2, !tbaa !12
  br label %83

83:                                               ; preds = %49, %30
  br label %114

84:                                               ; preds = %18
  %85 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %86 = load i64, ptr %85, align 8, !tbaa !9
  %87 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %88 = load i64, ptr %87, align 8, !tbaa !9
  %89 = add i64 %86, %88
  %90 = and i64 %89, 15
  %91 = shl i64 %90, 2
  %92 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %93 = load i64, ptr %92, align 8, !tbaa !9
  %94 = or i64 %93, %91
  store i64 %94, ptr %92, align 8, !tbaa !9
  %95 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %96 = load i64, ptr %95, align 8, !tbaa !9
  %97 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %98 = load i64, ptr %97, align 8, !tbaa !9
  %99 = lshr i64 %98, 1
  %100 = and i64 %99, 15
  %101 = or i64 %100, 1
  %102 = shl i64 %96, %101
  %103 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %104 = load i64, ptr %103, align 8, !tbaa !9
  %105 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %106 = load i64, ptr %105, align 8, !tbaa !9
  %107 = lshr i64 %106, 1
  %108 = and i64 %107, 15
  %109 = or i64 %108, 1
  %110 = sub i64 64, %109
  %111 = lshr i64 %104, %110
  %112 = or i64 %102, %111
  %113 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  store i64 %112, ptr %113, align 8, !tbaa !9
  br label %114

114:                                              ; preds = %84, %83
  br label %134

115:                                              ; preds = %2
  %116 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %117 = getelementptr inbounds i16, ptr %116, i64 0
  %118 = load i16, ptr %117, align 2, !tbaa !12
  store i16 %118, ptr %8, align 2, !tbaa !12
  %119 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %120 = getelementptr inbounds i16, ptr %119, i64 3
  %121 = load i16, ptr %120, align 2, !tbaa !12
  %122 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %123 = getelementptr inbounds i16, ptr %122, i64 0
  store i16 %121, ptr %123, align 2, !tbaa !12
  %124 = load i16, ptr %8, align 2, !tbaa !12
  %125 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %126 = getelementptr inbounds i16, ptr %125, i64 3
  store i16 %124, ptr %126, align 2, !tbaa !12
  %127 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %128 = load i64, ptr %127, align 8, !tbaa !9
  %129 = and i64 %128, 31
  %130 = shl i64 %129, 3
  %131 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %132 = load i64, ptr %131, align 8, !tbaa !9
  %133 = or i64 %132, %130
  store i64 %133, ptr %131, align 8, !tbaa !9
  br label %134

134:                                              ; preds = %115, %114
  %135 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %136 = load i64, ptr %135, align 8, !tbaa !9
  %137 = or i64 %136, -2305843009200337861
  %138 = load ptr, ptr %4, align 8, !tbaa !5
  %139 = getelementptr inbounds i64, ptr %138, i64 0
  store i64 %137, ptr %139, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @RandomFunc(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = load i64, ptr %0, align 8, !tbaa !5
  %4 = add i64 %3, 1373777115
  %.sroa.32.0.extract.shift = lshr i64 %4, 16
  %.sroa.32175.0.extract.shift = lshr i64 %4, 32
  %.sroa.32175.sroa.30.0.extract.shift813 = lshr i64 %4, 40
  %.sroa.38.0.extract.shift = lshr i64 %4, 48
  %.sroa.0.0.insert.ext = and i64 %4, 65535
  %5 = and i64 %4, 1
  %.not = icmp eq i64 %5, 0
  br i1 %.not, label %25, label %6

6:                                                ; preds = %2
  %7 = lshr i64 %4, 2
  %8 = and i64 %4, 4
  %.not821 = icmp eq i64 %8, 0
  br i1 %.not821, label %18, label %9

9:                                                ; preds = %6
  %10 = and i64 %4, 8
  %.not831 = icmp eq i64 %10, 0
  br i1 %.not831, label %17, label %11

11:                                               ; preds = %9
  %12 = and i64 %7, 7
  %13 = shl nuw nsw i64 %.sroa.0.0.insert.ext, %12
  %14 = shl nuw nsw i64 %13, 2
  %15 = and i64 %14, 32
  %.sroa.0.sroa.0.0.insert.insert683 = or i64 %15, %4
  %.sroa.32175.sroa.30.0.insert.ext595 = shl nuw nsw i64 %.sroa.32175.sroa.30.0.extract.shift813, 8
  %.sroa.32175.sroa.0.0.insert.ext529 = and i64 %.sroa.32175.0.extract.shift, 255
  %.sroa.32175.sroa.30.0.insert.ext595.masked = and i64 %.sroa.32175.sroa.30.0.insert.ext595, 65280
  %.sroa.32175.0.insert.ext204 = or disjoint i64 %.sroa.32175.sroa.30.0.insert.ext595.masked, %.sroa.32175.sroa.0.0.insert.ext529
  %.sroa.32175.0.insert.shift205 = shl nuw nsw i64 %.sroa.32175.0.insert.ext204, 32
  %16 = and i64 %4, 9223090566172966912
  %.sroa.32.0.insert.insert111 = or disjoint i64 %.sroa.32175.0.insert.shift205, %16
  %.sroa.0.sroa.0.0.extract.trunc687 = shl i64 %.sroa.0.sroa.0.0.insert.insert683, 1
  %.sroa.0.sroa.32.0.extract.shift763840 = lshr i64 %4, 7
  %.sroa.0.0.insert.insert31 = lshr i64 %4, 15
  %.sroa.32175.0.extract.shift213 = lshr i64 %.sroa.32.0.insert.insert111, 31
  %.sroa.32175.sroa.30.0.extract.shift603841 = lshr i64 %.sroa.32175.0.insert.ext204, 7
  %.sroa.38.0.extract.shift310 = lshr i64 %.sroa.32.0.insert.insert111, 47
  %.sroa.38.sroa.28.0.extract.shift459842 = lshr i64 %4, 55
  br label %28

17:                                               ; preds = %9
  %.sroa.32175.sroa.30.0.extract.shift655832 = lshr i64 %4, 8
  %.sroa.0.sroa.32.0.extract.shift833 = lshr i64 %4, 56
  br label %28

18:                                               ; preds = %6
  %.sroa.0.sroa.0.0.insert.ext662 = shl i64 %4, 3
  %19 = and i64 %.sroa.0.sroa.0.0.insert.ext662, 24
  %.sroa.32175.sroa.30.0.insert.ext619 = shl nuw nsw i64 %.sroa.32175.sroa.30.0.extract.shift813, 8
  %.sroa.32175.sroa.0.0.insert.ext546 = and i64 %.sroa.32175.0.extract.shift, 255
  %.sroa.32175.sroa.30.0.insert.ext619.masked = and i64 %.sroa.32175.sroa.30.0.insert.ext619, 65280
  %.sroa.32175.0.insert.ext233 = or disjoint i64 %.sroa.32175.sroa.30.0.insert.ext619.masked, %.sroa.32175.sroa.0.0.insert.ext546
  %.sroa.32175.0.insert.shift234 = shl nuw nsw i64 %.sroa.32175.0.insert.ext233, 32
  %20 = and i64 %4, -281470681808896
  %.sroa.32.0.insert.insert140 = or disjoint i64 %.sroa.32175.0.insert.shift234, %20
  %.masked = and i64 %4, 65531
  %.sroa.0.0.insert.ext51 = or i64 %19, %.masked
  %.sroa.0.0.insert.insert53 = or disjoint i64 %.sroa.0.0.insert.ext51, %.sroa.32.0.insert.insert140
  %21 = lshr i64 %.sroa.0.0.insert.ext51, 1
  %22 = and i64 %21, 12
  %23 = or disjoint i64 %22, 1
  %24 = tail call i64 @llvm.fshl.i64(i64 %.sroa.0.0.insert.insert53, i64 %.sroa.0.0.insert.insert53, i64 %23)
  %.sroa.0.sroa.32.0.extract.shift795827 = lshr i64 %24, 8
  %.sroa.32.0.extract.shift156 = lshr i64 %24, 16
  %.sroa.32175.0.extract.shift252 = lshr i64 %24, 32
  %.sroa.32175.sroa.30.0.extract.shift635828 = lshr i64 %24, 40
  %.sroa.38.0.extract.shift349 = lshr i64 %24, 48
  %sum.shift829 = lshr i64 %24, 56
  br label %28

25:                                               ; preds = %2
  %26 = shl nuw nsw i64 %.sroa.38.0.extract.shift, 3
  %27 = or i64 %26, %.sroa.38.0.extract.shift
  %sum.shift = lshr i64 %4, 56
  %.sroa.38.sroa.28.0.extract.shift501820 = lshr i64 %4, 8
  br label %28

28:                                               ; preds = %18, %17, %11, %25
  %.sroa.32175.sroa.0.0.in = phi i64 [ %.sroa.32175.0.extract.shift213, %11 ], [ %.sroa.32175.0.extract.shift, %17 ], [ %.sroa.32175.0.extract.shift252, %18 ], [ %.sroa.32175.0.extract.shift, %25 ]
  %.sroa.38.sroa.28.0.in = phi i64 [ %.sroa.38.sroa.28.0.extract.shift459842, %11 ], [ %.sroa.32175.sroa.30.0.extract.shift813, %17 ], [ %sum.shift829, %18 ], [ %.sroa.38.sroa.28.0.extract.shift501820, %25 ]
  %.sroa.38.sroa.0.0.in = phi i64 [ %.sroa.38.0.extract.shift310, %11 ], [ %.sroa.38.0.extract.shift, %17 ], [ %.sroa.38.0.extract.shift349, %18 ], [ %4, %25 ]
  %.sroa.32.0.in = phi i64 [ %.sroa.0.0.insert.insert31, %11 ], [ %.sroa.32.0.extract.shift, %17 ], [ %.sroa.32.0.extract.shift156, %18 ], [ %.sroa.32.0.extract.shift, %25 ]
  %.sroa.32175.sroa.30.0.in = phi i64 [ %.sroa.32175.sroa.30.0.extract.shift603841, %11 ], [ %.sroa.32175.sroa.30.0.extract.shift655832, %17 ], [ %.sroa.32175.sroa.30.0.extract.shift635828, %18 ], [ %.sroa.32175.sroa.30.0.extract.shift813, %25 ]
  %.sroa.0.sroa.0.0 = phi i64 [ %.sroa.0.sroa.0.0.extract.trunc687, %11 ], [ %4, %17 ], [ %24, %18 ], [ %27, %25 ]
  %.sroa.0.sroa.32.0.in = phi i64 [ %.sroa.0.sroa.32.0.extract.shift763840, %11 ], [ %.sroa.0.sroa.32.0.extract.shift833, %17 ], [ %.sroa.0.sroa.32.0.extract.shift795827, %18 ], [ %sum.shift, %25 ]
  %.sroa.0.sroa.32.0.insert.ext807 = shl i64 %.sroa.0.sroa.32.0.in, 8
  %.sroa.0.sroa.0.0.insert.ext718 = and i64 %.sroa.0.sroa.0.0, 196
  %.sroa.32175.sroa.30.0.insert.ext647 = shl nuw i64 %.sroa.32175.sroa.30.0.in, 8
  %.sroa.32175.sroa.0.0.insert.ext566 = and i64 %.sroa.32175.sroa.0.0.in, 255
  %.sroa.38.sroa.28.0.insert.ext503 = shl nuw i64 %.sroa.38.sroa.28.0.in, 8
  %.sroa.38.sroa.0.0.insert.ext422 = and i64 %.sroa.38.sroa.0.0.in, 255
  %.sroa.38.sroa.28.0.insert.ext503.masked = and i64 %.sroa.38.sroa.28.0.insert.ext503, 65280
  %.sroa.38.0.insert.ext364 = or disjoint i64 %.sroa.38.sroa.28.0.insert.ext503.masked, %.sroa.38.sroa.0.0.insert.ext422
  %.sroa.38.0.insert.shift365 = shl nuw i64 %.sroa.38.0.insert.ext364, 48
  %.sroa.32175.sroa.30.0.insert.ext647.masked = and i64 %.sroa.32175.sroa.30.0.insert.ext647, 65280
  %.sroa.32175.0.insert.ext267 = or disjoint i64 %.sroa.32175.sroa.30.0.insert.ext647.masked, %.sroa.32175.sroa.0.0.insert.ext566
  %.sroa.32175.0.insert.shift268 = shl nuw nsw i64 %.sroa.32175.0.insert.ext267, 32
  %.sroa.32175.0.insert.insert270 = or disjoint i64 %.sroa.32175.0.insert.shift268, %.sroa.38.0.insert.shift365
  %.sroa.32.0.insert.ext171 = shl i64 %.sroa.32.0.in, 16
  %.sroa.32.0.insert.shift172 = and i64 %.sroa.32.0.insert.ext171, 4281597952
  %.sroa.32.0.insert.insert174 = or disjoint i64 %.sroa.32175.0.insert.insert270, %.sroa.32.0.insert.shift172
  %.sroa.0.sroa.32.0.insert.ext807.masked = and i64 %.sroa.0.sroa.32.0.insert.ext807, 13056
  %.sroa.0.0.insert.ext77 = or disjoint i64 %.sroa.0.sroa.0.0.insert.ext718, %.sroa.0.sroa.32.0.insert.ext807.masked
  %.sroa.0.0.insert.insert79 = or disjoint i64 %.sroa.32.0.insert.insert174, %.sroa.0.0.insert.ext77
  %29 = or i64 %.sroa.0.0.insert.insert79, -2305843009200337861
  store i64 %29, ptr %1, align 8, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.fshl.i64(i64, i64, i64) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass