; LLVM IR from devparthgarg/Data-Structures-and-Algorithms :: 06. Searching/14 Check if there exists a Triplet with Given Condition (14a)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z9isTripletSt6vectorIiSaIiEE(ptr noundef %0) #0 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %12 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %13 = trunc i64 %12 to i32
  store i32 %13, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %97, %1
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = load i32, ptr %4, align 4, !tbaa !9
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 2, ptr %6, align 4
  br label %100

19:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr %7, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %91, %19
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = load i32, ptr %4, align 4, !tbaa !9
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %22
  store i32 5, ptr %6, align 4
  br label %94

27:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %8, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %85, %27
  %31 = load i32, ptr %8, align 4, !tbaa !9
  %32 = load i32, ptr %4, align 4, !tbaa !9
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 8, ptr %6, align 4
  br label %88

35:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %36 = load i32, ptr %5, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %37) #2
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %41) #2
  %43 = load i32, ptr %42, align 4, !tbaa !9
  %44 = mul nsw i32 %39, %43
  store i32 %44, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %45 = load i32, ptr %7, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %46) #2
  %48 = load i32, ptr %47, align 4, !tbaa !9
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %50) #2
  %52 = load i32, ptr %51, align 4, !tbaa !9
  %53 = mul nsw i32 %48, %52
  store i32 %53, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %55) #2
  %57 = load i32, ptr %56, align 4, !tbaa !9
  %58 = load i32, ptr %8, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %59) #2
  %61 = load i32, ptr %60, align 4, !tbaa !9
  %62 = mul nsw i32 %57, %61
  store i32 %62, ptr %11, align 4, !tbaa !9
  %63 = load i32, ptr %9, align 4, !tbaa !9
  %64 = load i32, ptr %10, align 4, !tbaa !9
  %65 = add nsw i32 %63, %64
  %66 = load i32, ptr %11, align 4, !tbaa !9
  %67 = icmp eq i32 %65, %66
  br i1 %67, label %80, label %68

68:                                               ; preds = %35
  %69 = load i32, ptr %10, align 4, !tbaa !9
  %70 = load i32, ptr %11, align 4, !tbaa !9
  %71 = add nsw i32 %69, %70
  %72 = load i32, ptr %9, align 4, !tbaa !9
  %73 = icmp eq i32 %71, %72
  br i1 %73, label %80, label %74

74:                                               ; preds = %68
  %75 = load i32, ptr %11, align 4, !tbaa !9
  %76 = load i32, ptr %9, align 4, !tbaa !9
  %77 = add nsw i32 %75, %76
  %78 = load i32, ptr %10, align 4, !tbaa !9
  %79 = icmp eq i32 %77, %78
  br i1 %79, label %80, label %81

80:                                               ; preds = %74, %68, %35
  store i1 true, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %82

81:                                               ; preds = %74
  store i32 0, ptr %6, align 4
  br label %82

82:                                               ; preds = %81, %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  %83 = load i32, ptr %6, align 4
  switch i32 %83, label %88 [
    i32 0, label %84
  ]

84:                                               ; preds = %82
  br label %85

85:                                               ; preds = %84
  %86 = load i32, ptr %8, align 4, !tbaa !9
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %8, align 4, !tbaa !9
  br label %30, !llvm.loop !11

88:                                               ; preds = %82, %34
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %89 = load i32, ptr %6, align 4
  switch i32 %89, label %94 [
    i32 8, label %90
  ]

90:                                               ; preds = %88
  br label %91

91:                                               ; preds = %90
  %92 = load i32, ptr %7, align 4, !tbaa !9
  %93 = add nsw i32 %92, 1
  store i32 %93, ptr %7, align 4, !tbaa !9
  br label %22, !llvm.loop !13

94:                                               ; preds = %88, %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  %95 = load i32, ptr %6, align 4
  switch i32 %95, label %100 [
    i32 5, label %96
  ]

96:                                               ; preds = %94
  br label %97

97:                                               ; preds = %96
  %98 = load i32, ptr %5, align 4, !tbaa !9
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %5, align 4, !tbaa !9
  br label %14, !llvm.loop !14

100:                                              ; preds = %94, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  %101 = load i32, ptr %6, align 4
  switch i32 %101, label %103 [
    i32 2, label %102
  ]

102:                                              ; preds = %100
  store i1 false, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %103

103:                                              ; preds = %102, %100
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %104 = load i1, ptr %2, align 1
  ret i1 %104
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z9isTripletSt6vectorIiSaIiEE(ptr noundef nonnull %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %3 = trunc i64 %2 to i32
  %.not4361 = icmp sgt i32 %3, 0
  br i1 %.not4361, label %.lr.ph64.preheader, label %.critedge53

.lr.ph64.preheader:                               ; preds = %1
  %4 = and i64 %2, 2147483647
  %wide.trip.count79 = and i64 %2, 2147483647
  br label %.lr.ph64

.critedge51.loopexit:                             ; preds = %.critedge49.loopexit, %.lr.ph64
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %indvars.iv.next73 = add nuw nsw i64 %indvars.iv72, 1
  %exitcond80.not = icmp eq i64 %indvars.iv.next78, %wide.trip.count79
  br i1 %exitcond80.not, label %.critedge53, label %.lr.ph64, !llvm.loop !5

.lr.ph64:                                         ; preds = %.lr.ph64.preheader, %.critedge51.loopexit
  %indvars.iv77 = phi i64 [ 0, %.lr.ph64.preheader ], [ %indvars.iv.next78, %.critedge51.loopexit ]
  %indvars.iv72 = phi i64 [ 1, %.lr.ph64.preheader ], [ %indvars.iv.next73, %.critedge51.loopexit ]
  %indvars.iv = phi i64 [ 2, %.lr.ph64.preheader ], [ %indvars.iv.next, %.critedge51.loopexit ]
  %.not4363 = phi i1 [ true, %.lr.ph64.preheader ], [ %.not4459, %.critedge51.loopexit ]
  %indvars.iv.next78 = add nuw nsw i64 %indvars.iv77, 1
  %.not4459 = icmp ult i64 %indvars.iv.next78, %4
  br i1 %.not4459, label %.lr.ph, label %.critedge51.loopexit

.critedge49.loopexit:                             ; preds = %6, %.lr.ph
  %indvars.iv.next68 = add nuw nsw i64 %indvars.iv67, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next75, %wide.trip.count79
  br i1 %exitcond.not, label %.critedge51.loopexit, label %.lr.ph, !llvm.loop !7

.lr.ph:                                           ; preds = %.lr.ph64, %.critedge49.loopexit
  %indvars.iv74 = phi i64 [ %indvars.iv.next75, %.critedge49.loopexit ], [ %indvars.iv72, %.lr.ph64 ]
  %indvars.iv67 = phi i64 [ %indvars.iv.next68, %.critedge49.loopexit ], [ %indvars.iv, %.lr.ph64 ]
  %indvars.iv.next75 = add nuw nsw i64 %indvars.iv74, 1
  %5 = trunc nuw i64 %indvars.iv.next75 to i32
  %.not57 = icmp slt i32 %5, %3
  br i1 %.not57, label %.critedge, label %.critedge49.loopexit

6:                                                ; preds = %.critedge
  %indvars.iv.next70 = add nuw nsw i64 %indvars.iv69, 1
  %7 = trunc nuw i64 %indvars.iv.next70 to i32
  %.not = icmp slt i32 %7, %3
  br i1 %.not, label %.critedge, label %.critedge49.loopexit, !llvm.loop !8

.critedge:                                        ; preds = %.lr.ph, %6
  %indvars.iv69 = phi i64 [ %indvars.iv.next70, %6 ], [ %indvars.iv67, %.lr.ph ]
  %8 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv77) #1
  %9 = load i32, ptr %8, align 4, !tbaa !9
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv77) #1
  %11 = load i32, ptr %10, align 4, !tbaa !9
  %12 = mul nsw i32 %11, %9
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv74) #1
  %14 = load i32, ptr %13, align 4, !tbaa !9
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv74) #1
  %16 = load i32, ptr %15, align 4, !tbaa !9
  %17 = mul nsw i32 %16, %14
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv69) #1
  %19 = load i32, ptr %18, align 4, !tbaa !9
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv69) #1
  %21 = load i32, ptr %20, align 4, !tbaa !9
  %22 = mul nsw i32 %21, %19
  %23 = add nsw i32 %17, %12
  %24 = icmp eq i32 %23, %22
  %25 = add nsw i32 %22, %17
  %26 = icmp eq i32 %25, %12
  %or.cond = select i1 %24, i1 true, i1 %26
  %27 = add nsw i32 %22, %12
  %28 = icmp eq i32 %27, %17
  %or.cond47 = select i1 %or.cond, i1 true, i1 %28
  br i1 %or.cond47, label %.critedge53, label %6

.critedge53:                                      ; preds = %.critedge51.loopexit, %.critedge, %1
  %.not4356 = phi i1 [ false, %1 ], [ %.not4363, %.critedge ], [ %.not4459, %.critedge51.loopexit ]
  ret i1 %.not4356
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass