; LLVM IR from devicehive/esp8266-firmware :: esp-utils/common/serialport.ll (ZN10SerialPort18waitTransmitionEndEj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.SerialPort = type <{ ptr, i32, i8, i8, [2 x i8], ptr, i32, i8, [3 x i8], i32, [256 x i8], [4 x i8] }>

declare void @_ZN10SerialPort5sleepEj(ptr noundef nonnull align 8 dereferenceable(292), i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10SerialPort18waitTransmitionEndEj(ptr noundef nonnull align 8 dereferenceable(292) %0, i32 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %5 = load ptr, ptr %3, align 8
  br label %6

6:                                                ; preds = %13, %2
  %7 = call noundef i32 @_ZN10SerialPort7getTickEv()
  %8 = getelementptr inbounds %class.SerialPort, ptr %5, i32 0, i32 9
  %9 = load i32, ptr %8, align 8, !tbaa !11
  %10 = sub i32 %7, %9
  %11 = load i32, ptr %4, align 4, !tbaa !9
  %12 = icmp ult i32 %10, %11
  br i1 %12, label %13, label %14

13:                                               ; preds = %6
  call void @_ZN10SerialPort5sleepEj(ptr noundef nonnull align 8 dereferenceable(292) %5, i32 noundef 10)
  br label %6, !llvm.loop !14

14:                                               ; preds = %6
  ret void
}

declare noundef i32 @_ZN10SerialPort7getTickEv() #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 32}
!12 = !{!"_ZTS10SerialPort", !10, i64 8, !13, i64 12, !13, i64 13, !6, i64 16, !10, i64 24, !13, i64 28, !10, i64 32, !7, i64 36}
!13 = !{!"bool", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare void @_ZN10SerialPort5sleepEj(ptr noundef nonnull align 8 dereferenceable(292), i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10SerialPort18waitTransmitionEndEj(ptr noundef nonnull align 8 dereferenceable(292) %0, i32 noundef %1) local_unnamed_addr #1 align 2 {
  %3 = tail call noundef i32 @_ZN10SerialPort7getTickEv()
  %4 = getelementptr inbounds i8, ptr %0, i64 32
  %5 = load i32, ptr %4, align 8, !tbaa !5
  %6 = sub i32 %3, %5
  %7 = icmp ult i32 %6, %1
  br i1 %7, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2, %.lr.ph
  tail call void @_ZN10SerialPort5sleepEj(ptr noundef nonnull align 8 dereferenceable(292) %0, i32 noundef 10)
  %8 = tail call noundef i32 @_ZN10SerialPort7getTickEv()
  %9 = load i32, ptr %4, align 8, !tbaa !5
  %10 = sub i32 %8, %9
  %11 = icmp ult i32 %10, %1
  br i1 %11, label %.lr.ph, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph, %2
  ret void
}

declare noundef i32 @_ZN10SerialPort7getTickEv() local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 32}
!6 = !{!"_ZTS10SerialPort", !7, i64 8, !10, i64 12, !10, i64 13, !11, i64 16, !7, i64 24, !10, i64 28, !7, i64 32, !8, i64 36}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"bool", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass