; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1855/main.ll (Z3dfsiic)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@grid = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8
@largura = external dso_local global i32, align 4
@altura = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3dfsiic(i32 noundef %0, i32 noundef %1, i8 noundef signext %2) #0 {
  %4 = alloca i1, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i8 %2, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  store i8 0, ptr %8, align 1, !tbaa !10
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %11) #3
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %14) #3
  %16 = load i8, ptr %15, align 1, !tbaa !9
  %17 = sext i8 %16 to i32
  %18 = icmp eq i32 %17, 42
  br i1 %18, label %19, label %20

19:                                               ; preds = %3
  store i1 true, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %223

20:                                               ; preds = %3
  %21 = load i32, ptr %5, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %22) #3
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #3
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp ne i32 %27, 0
  br i1 %28, label %29, label %40

29:                                               ; preds = %20
  %30 = load i32, ptr %5, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %31) #3
  %33 = load i32, ptr %6, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %34) #3
  %36 = load i8, ptr %35, align 1, !tbaa !9
  %37 = sext i8 %36 to i32
  %38 = icmp ne i32 %37, 46
  br i1 %38, label %39, label %40

39:                                               ; preds = %29
  store i1 false, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %223

40:                                               ; preds = %29, %20
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %42) #3
  %44 = load i32, ptr %6, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #3
  store i32 1, ptr %46, align 4, !tbaa !5
  br label %47

47:                                               ; preds = %40
  %48 = load i8, ptr %7, align 1, !tbaa !9
  %49 = sext i8 %48 to i32
  %50 = icmp eq i32 %49, 62
  br i1 %50, label %51, label %90

51:                                               ; preds = %47
  %52 = load i32, ptr %6, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  %54 = load i32, ptr @largura, align 4, !tbaa !5
  %55 = icmp slt i32 %53, %54
  br i1 %55, label %56, label %89

56:                                               ; preds = %51
  %57 = load i32, ptr %5, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %58) #3
  %60 = load i32, ptr %6, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %62) #3
  %64 = load i8, ptr %63, align 1, !tbaa !9
  %65 = sext i8 %64 to i32
  %66 = icmp eq i32 %65, 46
  br i1 %66, label %67, label %74

67:                                               ; preds = %56
  %68 = load i32, ptr %5, align 4, !tbaa !5
  %69 = load i32, ptr %6, align 4, !tbaa !5
  %70 = add nsw i32 %69, 1
  %71 = load i8, ptr %7, align 1, !tbaa !9
  %72 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %68, i32 noundef %70, i8 noundef signext %71)
  %73 = zext i1 %72 to i8
  store i8 %73, ptr %8, align 1, !tbaa !10
  br label %88

74:                                               ; preds = %56
  %75 = load i32, ptr %5, align 4, !tbaa !5
  %76 = load i32, ptr %6, align 4, !tbaa !5
  %77 = add nsw i32 %76, 1
  %78 = load i32, ptr %5, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %79) #3
  %81 = load i32, ptr %6, align 4, !tbaa !5
  %82 = add nsw i32 %81, 1
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %83) #3
  %85 = load i8, ptr %84, align 1, !tbaa !9
  %86 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %75, i32 noundef %77, i8 noundef signext %85)
  %87 = zext i1 %86 to i8
  store i8 %87, ptr %8, align 1, !tbaa !10
  br label %88

88:                                               ; preds = %74, %67
  br label %89

89:                                               ; preds = %88, %51
  br label %220

90:                                               ; preds = %47
  %91 = load i8, ptr %7, align 1, !tbaa !9
  %92 = sext i8 %91 to i32
  %93 = icmp eq i32 %92, 118
  br i1 %93, label %94, label %133

94:                                               ; preds = %90
  %95 = load i32, ptr %5, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  %97 = load i32, ptr @altura, align 4, !tbaa !5
  %98 = icmp slt i32 %96, %97
  br i1 %98, label %99, label %132

99:                                               ; preds = %94
  %100 = load i32, ptr %5, align 4, !tbaa !5
  %101 = add nsw i32 %100, 1
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %102) #3
  %104 = load i32, ptr %6, align 4, !tbaa !5
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %103, i64 noundef %105) #3
  %107 = load i8, ptr %106, align 1, !tbaa !9
  %108 = sext i8 %107 to i32
  %109 = icmp eq i32 %108, 46
  br i1 %109, label %110, label %117

110:                                              ; preds = %99
  %111 = load i32, ptr %5, align 4, !tbaa !5
  %112 = add nsw i32 %111, 1
  %113 = load i32, ptr %6, align 4, !tbaa !5
  %114 = load i8, ptr %7, align 1, !tbaa !9
  %115 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %112, i32 noundef %113, i8 noundef signext %114)
  %116 = zext i1 %115 to i8
  store i8 %116, ptr %8, align 1, !tbaa !10
  br label %131

117:                                              ; preds = %99
  %118 = load i32, ptr %5, align 4, !tbaa !5
  %119 = add nsw i32 %118, 1
  %120 = load i32, ptr %6, align 4, !tbaa !5
  %121 = load i32, ptr %5, align 4, !tbaa !5
  %122 = add nsw i32 %121, 1
  %123 = sext i32 %122 to i64
  %124 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %123) #3
  %125 = load i32, ptr %6, align 4, !tbaa !5
  %126 = sext i32 %125 to i64
  %127 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %124, i64 noundef %126) #3
  %128 = load i8, ptr %127, align 1, !tbaa !9
  %129 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %119, i32 noundef %120, i8 noundef signext %128)
  %130 = zext i1 %129 to i8
  store i8 %130, ptr %8, align 1, !tbaa !10
  br label %131

131:                                              ; preds = %117, %110
  br label %132

132:                                              ; preds = %131, %94
  br label %219

133:                                              ; preds = %90
  %134 = load i8, ptr %7, align 1, !tbaa !9
  %135 = sext i8 %134 to i32
  %136 = icmp eq i32 %135, 60
  br i1 %136, label %137, label %175

137:                                              ; preds = %133
  %138 = load i32, ptr %6, align 4, !tbaa !5
  %139 = sub nsw i32 %138, 1
  %140 = icmp sge i32 %139, 0
  br i1 %140, label %141, label %174

141:                                              ; preds = %137
  %142 = load i32, ptr %5, align 4, !tbaa !5
  %143 = sext i32 %142 to i64
  %144 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %143) #3
  %145 = load i32, ptr %6, align 4, !tbaa !5
  %146 = sub nsw i32 %145, 1
  %147 = sext i32 %146 to i64
  %148 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %144, i64 noundef %147) #3
  %149 = load i8, ptr %148, align 1, !tbaa !9
  %150 = sext i8 %149 to i32
  %151 = icmp eq i32 %150, 46
  br i1 %151, label %152, label %159

152:                                              ; preds = %141
  %153 = load i32, ptr %5, align 4, !tbaa !5
  %154 = load i32, ptr %6, align 4, !tbaa !5
  %155 = sub nsw i32 %154, 1
  %156 = load i8, ptr %7, align 1, !tbaa !9
  %157 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %153, i32 noundef %155, i8 noundef signext %156)
  %158 = zext i1 %157 to i8
  store i8 %158, ptr %8, align 1, !tbaa !10
  br label %173

159:                                              ; preds = %141
  %160 = load i32, ptr %5, align 4, !tbaa !5
  %161 = load i32, ptr %6, align 4, !tbaa !5
  %162 = sub nsw i32 %161, 1
  %163 = load i32, ptr %5, align 4, !tbaa !5
  %164 = sext i32 %163 to i64
  %165 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %164) #3
  %166 = load i32, ptr %6, align 4, !tbaa !5
  %167 = sub nsw i32 %166, 1
  %168 = sext i32 %167 to i64
  %169 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %165, i64 noundef %168) #3
  %170 = load i8, ptr %169, align 1, !tbaa !9
  %171 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %160, i32 noundef %162, i8 noundef signext %170)
  %172 = zext i1 %171 to i8
  store i8 %172, ptr %8, align 1, !tbaa !10
  br label %173

173:                                              ; preds = %159, %152
  br label %174

174:                                              ; preds = %173, %137
  br label %218

175:                                              ; preds = %133
  %176 = load i8, ptr %7, align 1, !tbaa !9
  %177 = sext i8 %176 to i32
  %178 = icmp eq i32 %177, 94
  br i1 %178, label %179, label %217

179:                                              ; preds = %175
  %180 = load i32, ptr %5, align 4, !tbaa !5
  %181 = sub nsw i32 %180, 1
  %182 = icmp sge i32 %181, 0
  br i1 %182, label %183, label %216

183:                                              ; preds = %179
  %184 = load i32, ptr %5, align 4, !tbaa !5
  %185 = sub nsw i32 %184, 1
  %186 = sext i32 %185 to i64
  %187 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %186) #3
  %188 = load i32, ptr %6, align 4, !tbaa !5
  %189 = sext i32 %188 to i64
  %190 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %187, i64 noundef %189) #3
  %191 = load i8, ptr %190, align 1, !tbaa !9
  %192 = sext i8 %191 to i32
  %193 = icmp eq i32 %192, 46
  br i1 %193, label %194, label %201

194:                                              ; preds = %183
  %195 = load i32, ptr %5, align 4, !tbaa !5
  %196 = sub nsw i32 %195, 1
  %197 = load i32, ptr %6, align 4, !tbaa !5
  %198 = load i8, ptr %7, align 1, !tbaa !9
  %199 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %196, i32 noundef %197, i8 noundef signext %198)
  %200 = zext i1 %199 to i8
  store i8 %200, ptr %8, align 1, !tbaa !10
  br label %215

201:                                              ; preds = %183
  %202 = load i32, ptr %5, align 4, !tbaa !5
  %203 = sub nsw i32 %202, 1
  %204 = load i32, ptr %6, align 4, !tbaa !5
  %205 = load i32, ptr %5, align 4, !tbaa !5
  %206 = sub nsw i32 %205, 1
  %207 = sext i32 %206 to i64
  %208 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %207) #3
  %209 = load i32, ptr %6, align 4, !tbaa !5
  %210 = sext i32 %209 to i64
  %211 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %208, i64 noundef %210) #3
  %212 = load i8, ptr %211, align 1, !tbaa !9
  %213 = call noundef zeroext i1 @_Z3dfsiic(i32 noundef %203, i32 noundef %204, i8 noundef signext %212)
  %214 = zext i1 %213 to i8
  store i8 %214, ptr %8, align 1, !tbaa !10
  br label %215

215:                                              ; preds = %201, %194
  br label %216

216:                                              ; preds = %215, %179
  br label %217

217:                                              ; preds = %216, %175
  br label %218

218:                                              ; preds = %217, %174
  br label %219

219:                                              ; preds = %218, %132
  br label %220

220:                                              ; preds = %219, %89
  %221 = load i8, ptr %8, align 1, !tbaa !10, !range !12, !noundef !13
  %222 = trunc i8 %221 to i1
  store i1 %222, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %223

223:                                              ; preds = %220, %39, %19
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %224 = load i1, ptr %4, align 1
  ret i1 %224
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"bool", !7, i64 0}
!12 = !{i8 0, i8 2}
!13 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@grid = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8
@largura = external dso_local local_unnamed_addr global i32, align 4
@altura = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3dfsiic(i32 noundef %0, i32 noundef %1, i8 noundef signext %2) local_unnamed_addr #0 {
  %4 = sext i32 %0 to i64
  %5 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %4) #1
  %6 = sext i32 %1 to i64
  %7 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %6) #1
  %8 = load i8, ptr %7, align 1, !tbaa !5
  %9 = icmp eq i8 %8, 42
  br i1 %9, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %tailrecurse.backedge
  %10 = phi i64 [ %37, %tailrecurse.backedge ], [ %6, %3 ]
  %11 = phi i64 [ %35, %tailrecurse.backedge ], [ %4, %3 ]
  %.tr6164 = phi i8 [ %.tr61.be, %tailrecurse.backedge ], [ %2, %3 ]
  %.tr6063 = phi i32 [ %.tr60.be, %tailrecurse.backedge ], [ %1, %3 ]
  %.tr62 = phi i32 [ %.tr.be, %tailrecurse.backedge ], [ %0, %3 ]
  %12 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %11) #1
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %10) #1
  %14 = load i32, ptr %13, align 4, !tbaa !8
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %19, label %15

15:                                               ; preds = %.lr.ph
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %11) #1
  %17 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %10) #1
  %18 = load i8, ptr %17, align 1, !tbaa !5
  %.not59 = icmp eq i8 %18, 46
  br i1 %.not59, label %19, label %._crit_edge

19:                                               ; preds = %15, %.lr.ph
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %11) #1
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %10) #1
  store i32 1, ptr %21, align 4, !tbaa !8
  switch i8 %.tr6164, label %._crit_edge [
    i8 62, label %22
    i8 118, label %41
    i8 60, label %51
    i8 94, label %60
  ]

22:                                               ; preds = %19
  %23 = add nsw i32 %.tr6063, 1
  %24 = load i32, ptr @largura, align 4, !tbaa !8
  %25 = icmp slt i32 %23, %24
  br i1 %25, label %26, label %._crit_edge

26:                                               ; preds = %22
  %27 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %11) #1
  %28 = sext i32 %23 to i64
  %29 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %28) #1
  %30 = load i8, ptr %29, align 1, !tbaa !5
  %31 = icmp eq i8 %30, 46
  br i1 %31, label %tailrecurse.backedge, label %tailrecurse.backedge.sink.split

tailrecurse.backedge.sink.split:                  ; preds = %26, %62, %53, %45
  %.sink = phi i64 [ %46, %45 ], [ %11, %53 ], [ %64, %62 ], [ %11, %26 ]
  %.sink77 = phi i64 [ %10, %45 ], [ %56, %53 ], [ %10, %62 ], [ %28, %26 ]
  %.tr.be.ph = phi i32 [ %42, %45 ], [ %.tr62, %53 ], [ %63, %62 ], [ %.tr62, %26 ]
  %.tr60.be.ph = phi i32 [ %.tr6063, %45 ], [ %54, %53 ], [ %.tr6063, %62 ], [ %23, %26 ]
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %.sink) #1
  %33 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %.sink77) #1
  %34 = load i8, ptr %33, align 1, !tbaa !5
  br label %tailrecurse.backedge

tailrecurse.backedge:                             ; preds = %tailrecurse.backedge.sink.split, %26, %45, %53, %62
  %.tr.be = phi i32 [ %.tr62, %26 ], [ %42, %45 ], [ %.tr62, %53 ], [ %63, %62 ], [ %.tr.be.ph, %tailrecurse.backedge.sink.split ]
  %.tr60.be = phi i32 [ %23, %26 ], [ %.tr6063, %45 ], [ %54, %53 ], [ %.tr6063, %62 ], [ %.tr60.be.ph, %tailrecurse.backedge.sink.split ]
  %.tr61.be = phi i8 [ 62, %26 ], [ 118, %45 ], [ 60, %53 ], [ 94, %62 ], [ %34, %tailrecurse.backedge.sink.split ]
  %35 = sext i32 %.tr.be to i64
  %36 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %35) #1
  %37 = sext i32 %.tr60.be to i64
  %38 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %37) #1
  %39 = load i8, ptr %38, align 1, !tbaa !5
  %40 = icmp eq i8 %39, 42
  br i1 %40, label %._crit_edge, label %.lr.ph

41:                                               ; preds = %19
  %42 = add nsw i32 %.tr62, 1
  %43 = load i32, ptr @altura, align 4, !tbaa !8
  %44 = icmp slt i32 %42, %43
  br i1 %44, label %45, label %._crit_edge

45:                                               ; preds = %41
  %46 = sext i32 %42 to i64
  %47 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %46) #1
  %48 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %10) #1
  %49 = load i8, ptr %48, align 1, !tbaa !5
  %50 = icmp eq i8 %49, 46
  br i1 %50, label %tailrecurse.backedge, label %tailrecurse.backedge.sink.split

51:                                               ; preds = %19
  %52 = icmp sgt i32 %.tr6063, 0
  br i1 %52, label %53, label %._crit_edge

53:                                               ; preds = %51
  %54 = add nsw i32 %.tr6063, -1
  %55 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %11) #1
  %56 = zext nneg i32 %54 to i64
  %57 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %56) #1
  %58 = load i8, ptr %57, align 1, !tbaa !5
  %59 = icmp eq i8 %58, 46
  br i1 %59, label %tailrecurse.backedge, label %tailrecurse.backedge.sink.split

60:                                               ; preds = %19
  %61 = icmp sgt i32 %.tr62, 0
  br i1 %61, label %62, label %._crit_edge

62:                                               ; preds = %60
  %63 = add nsw i32 %.tr62, -1
  %64 = zext nneg i32 %63 to i64
  %65 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %64) #1
  %66 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %10) #1
  %67 = load i8, ptr %66, align 1, !tbaa !5
  %68 = icmp eq i8 %67, 46
  br i1 %68, label %tailrecurse.backedge, label %tailrecurse.backedge.sink.split

._crit_edge:                                      ; preds = %tailrecurse.backedge, %15, %19, %41, %60, %51, %22, %3
  %.053 = phi i1 [ true, %3 ], [ false, %22 ], [ false, %51 ], [ false, %60 ], [ false, %41 ], [ false, %19 ], [ false, %15 ], [ true, %tailrecurse.backedge ]
  ret i1 %.053
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass