; LLVM IR from Ryuk17/SpeechAlgorithms :: WebRTC_AGC/src (agc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.WebRtcAgcConfig = type { i16, i16, i8 }
%struct.LegacyAgc = type { i32, i16, i16, i16, i8, %struct.WebRtcAgcConfig, %struct.WebRtcAgcConfig, i16, i16, i32, i32, i32, i32, i32, i32, i32, i16, i16, [8 x i32], i32, i32, i32, i32, i32, i32, [10 x i32], [2 x [5 x i32]], [2 x [10 x i32]], i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, %struct.AgcVad, %struct.DigitalAgc, i16 }
%struct.AgcVad = type { [8 x i32], i16, i16, i16, i16, i32, i16, i16, i32, i16 }
%struct.DigitalAgc = type { i32, i32, i32, [32 x i32], i16, i16, %struct.AgcVad, %struct.AgcVad }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @WebRtcAgc_CalculateGainTable(ptr noundef, i16 noundef signext, i16 noundef signext, i8 noundef zeroext, i16 noundef signext) #1

; Function Attrs: nounwind uwtable
declare dso_local void @WebRtcAgc_UpdateAgcThresholds(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @WebRtcAgc_set_config(ptr noundef %0, i48 %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca %struct.WebRtcAgcConfig, align 2
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store i48 %1, ptr %4, align 2
  store ptr %0, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %8, ptr %6, align 8, !tbaa !5
  %9 = load ptr, ptr %6, align 8, !tbaa !5
  %10 = icmp eq ptr %9, null
  br i1 %10, label %11, label %12

11:                                               ; preds = %2
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %112

12:                                               ; preds = %2
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.LegacyAgc, ptr %13, i32 0, i32 7
  %15 = load i16, ptr %14, align 4, !tbaa !9
  %16 = sext i16 %15 to i32
  %17 = icmp ne i32 %16, 42
  br i1 %17, label %18, label %21

18:                                               ; preds = %12
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.LegacyAgc, ptr %19, i32 0, i32 8
  store i16 18002, ptr %20, align 2, !tbaa !16
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %112

21:                                               ; preds = %12
  %22 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 2
  %23 = load i8, ptr %22, align 2, !tbaa !17
  %24 = zext i8 %23 to i32
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %34

26:                                               ; preds = %21
  %27 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 2
  %28 = load i8, ptr %27, align 2, !tbaa !17
  %29 = zext i8 %28 to i32
  %30 = icmp ne i32 %29, 1
  br i1 %30, label %31, label %34

31:                                               ; preds = %26
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.LegacyAgc, ptr %32, i32 0, i32 8
  store i16 18004, ptr %33, align 2, !tbaa !16
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %112

34:                                               ; preds = %26, %21
  %35 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 2
  %36 = load i8, ptr %35, align 2, !tbaa !17
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.LegacyAgc, ptr %37, i32 0, i32 4
  store i8 %36, ptr %38, align 2, !tbaa !18
  %39 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 1
  %40 = load i16, ptr %39, align 2, !tbaa !19
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.LegacyAgc, ptr %41, i32 0, i32 1
  store i16 %40, ptr %42, align 4, !tbaa !20
  %43 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 0
  %44 = load i16, ptr %43, align 2, !tbaa !21
  %45 = sext i16 %44 to i32
  %46 = icmp slt i32 %45, 0
  br i1 %46, label %52, label %47

47:                                               ; preds = %34
  %48 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 0
  %49 = load i16, ptr %48, align 2, !tbaa !21
  %50 = sext i16 %49 to i32
  %51 = icmp sgt i32 %50, 31
  br i1 %51, label %52, label %55

52:                                               ; preds = %47, %34
  %53 = load ptr, ptr %6, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.LegacyAgc, ptr %53, i32 0, i32 8
  store i16 18004, ptr %54, align 2, !tbaa !16
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %112

55:                                               ; preds = %47
  %56 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 0
  %57 = load i16, ptr %56, align 2, !tbaa !21
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.LegacyAgc, ptr %58, i32 0, i32 2
  store i16 %57, ptr %59, align 2, !tbaa !22
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.LegacyAgc, ptr %60, i32 0, i32 3
  %62 = load i16, ptr %61, align 4, !tbaa !23
  %63 = sext i16 %62 to i32
  %64 = icmp eq i32 %63, 3
  br i1 %64, label %65, label %75

65:                                               ; preds = %55
  %66 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 0
  %67 = load i16, ptr %66, align 2, !tbaa !21
  %68 = sext i16 %67 to i32
  %69 = load ptr, ptr %6, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.LegacyAgc, ptr %69, i32 0, i32 1
  %71 = load i16, ptr %70, align 4, !tbaa !20
  %72 = sext i16 %71 to i32
  %73 = add nsw i32 %72, %68
  %74 = trunc i32 %73 to i16
  store i16 %74, ptr %70, align 4, !tbaa !20
  br label %75

75:                                               ; preds = %65, %55
  %76 = load ptr, ptr %6, align 8, !tbaa !5
  call void @WebRtcAgc_UpdateAgcThresholds(ptr noundef %76)
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.LegacyAgc, ptr %77, i32 0, i32 55
  %79 = getelementptr inbounds %struct.DigitalAgc, ptr %78, i32 0, i32 3
  %80 = getelementptr inbounds [32 x i32], ptr %79, i64 0, i64 0
  %81 = load ptr, ptr %6, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.LegacyAgc, ptr %81, i32 0, i32 1
  %83 = load i16, ptr %82, align 4, !tbaa !20
  %84 = load ptr, ptr %6, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.LegacyAgc, ptr %84, i32 0, i32 2
  %86 = load i16, ptr %85, align 2, !tbaa !22
  %87 = load ptr, ptr %6, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.LegacyAgc, ptr %87, i32 0, i32 4
  %89 = load i8, ptr %88, align 2, !tbaa !18
  %90 = load ptr, ptr %6, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.LegacyAgc, ptr %90, i32 0, i32 17
  %92 = load i16, ptr %91, align 2, !tbaa !24
  %93 = call i32 @WebRtcAgc_CalculateGainTable(ptr noundef %80, i16 noundef signext %83, i16 noundef signext %86, i8 noundef zeroext %89, i16 noundef signext %92)
  %94 = icmp eq i32 %93, -1
  br i1 %94, label %95, label %96

95:                                               ; preds = %75
  store i32 -1, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %112

96:                                               ; preds = %75
  %97 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 1
  %98 = load i16, ptr %97, align 2, !tbaa !19
  %99 = load ptr, ptr %6, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.LegacyAgc, ptr %99, i32 0, i32 6
  %101 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %100, i32 0, i32 1
  store i16 %98, ptr %101, align 2, !tbaa !25
  %102 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 2
  %103 = load i8, ptr %102, align 2, !tbaa !17
  %104 = load ptr, ptr %6, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.LegacyAgc, ptr %104, i32 0, i32 6
  %106 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %105, i32 0, i32 2
  store i8 %103, ptr %106, align 2, !tbaa !26
  %107 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %4, i32 0, i32 0
  %108 = load i16, ptr %107, align 2, !tbaa !21
  %109 = load ptr, ptr %6, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.LegacyAgc, ptr %109, i32 0, i32 6
  %111 = getelementptr inbounds %struct.WebRtcAgcConfig, ptr %110, i32 0, i32 0
  store i16 %108, ptr %111, align 2, !tbaa !27
  store i32 0, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %112

112:                                              ; preds = %96, %95, %52, %31, %18, %11
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %113 = load i32, ptr %3, align 4
  ret i32 %113
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 24}
!10 = !{!"", !11, i64 0, !12, i64 4, !12, i64 6, !12, i64 8, !7, i64 10, !13, i64 12, !13, i64 18, !12, i64 24, !12, i64 26, !11, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !11, i64 52, !12, i64 56, !12, i64 58, !7, i64 60, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !11, i64 112, !7, i64 116, !7, i64 156, !7, i64 196, !12, i64 276, !12, i64 278, !12, i64 280, !12, i64 282, !12, i64 284, !12, i64 286, !12, i64 288, !12, i64 290, !12, i64 292, !12, i64 294, !12, i64 296, !12, i64 298, !12, i64 300, !12, i64 302, !11, i64 304, !12, i64 308, !11, i64 312, !11, i64 316, !11, i64 320, !11, i64 324, !11, i64 328, !11, i64 332, !11, i64 336, !11, i64 340, !11, i64 344, !12, i64 348, !14, i64 352, !15, i64 408, !12, i64 664}
!11 = !{!"int", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !12, i64 0, !12, i64 2, !7, i64 4}
!14 = !{!"", !7, i64 0, !12, i64 32, !12, i64 34, !12, i64 36, !12, i64 38, !11, i64 40, !12, i64 44, !12, i64 46, !11, i64 48, !12, i64 52}
!15 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !7, i64 12, !12, i64 140, !12, i64 142, !14, i64 144, !14, i64 200}
!16 = !{!10, !12, i64 26}
!17 = !{!13, !7, i64 4}
!18 = !{!10, !7, i64 10}
!19 = !{!13, !12, i64 2}
!20 = !{!10, !12, i64 4}
!21 = !{!13, !12, i64 0}
!22 = !{!10, !12, i64 6}
!23 = !{!10, !12, i64 8}
!24 = !{!10, !12, i64 58}
!25 = !{!10, !12, i64 20}
!26 = !{!10, !7, i64 22}
!27 = !{!10, !12, i64 18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @WebRtcAgc_CalculateGainTable(ptr noundef, i16 noundef signext, i16 noundef signext, i8 noundef zeroext, i16 noundef signext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @WebRtcAgc_UpdateAgcThresholds(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @WebRtcAgc_set_config(ptr noundef %0, i48 %1) local_unnamed_addr #0 {
  %.sroa.0.0.extract.trunc = trunc i48 %1 to i16
  %.sroa.6.0.extract.shift = lshr i48 %1, 16
  %.sroa.6.0.extract.trunc = trunc i48 %.sroa.6.0.extract.shift to i16
  %.sroa.8.0.extract.shift = lshr i48 %1, 32
  %.sroa.8.0.extract.trunc = trunc i48 %.sroa.8.0.extract.shift to i8
  %3 = icmp eq ptr %0, null
  br i1 %3, label %38, label %4

4:                                                ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 24
  %6 = load i16, ptr %5, align 4, !tbaa !5
  %.not = icmp eq i16 %6, 42
  br i1 %.not, label %9, label %7

7:                                                ; preds = %4
  %8 = getelementptr inbounds i8, ptr %0, i64 26
  store i16 18002, ptr %8, align 2, !tbaa !14
  br label %38

9:                                                ; preds = %4
  %10 = and i48 %1, 1090921693184
  %or.cond.not = icmp eq i48 %10, 0
  br i1 %or.cond.not, label %13, label %11

11:                                               ; preds = %9
  %12 = getelementptr inbounds i8, ptr %0, i64 26
  store i16 18004, ptr %12, align 2, !tbaa !14
  br label %38

13:                                               ; preds = %9
  %14 = getelementptr inbounds i8, ptr %0, i64 10
  store i8 %.sroa.8.0.extract.trunc, ptr %14, align 2, !tbaa !15
  %15 = getelementptr inbounds i8, ptr %0, i64 4
  store i16 %.sroa.6.0.extract.trunc, ptr %15, align 4, !tbaa !16
  %or.cond7 = icmp ugt i16 %.sroa.0.0.extract.trunc, 31
  br i1 %or.cond7, label %16, label %18

16:                                               ; preds = %13
  %17 = getelementptr inbounds i8, ptr %0, i64 26
  store i16 18004, ptr %17, align 2, !tbaa !14
  br label %38

18:                                               ; preds = %13
  %19 = getelementptr inbounds i8, ptr %0, i64 6
  store i16 %.sroa.0.0.extract.trunc, ptr %19, align 2, !tbaa !17
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  %21 = load i16, ptr %20, align 4, !tbaa !18
  %22 = icmp eq i16 %21, 3
  br i1 %22, label %23, label %25

23:                                               ; preds = %18
  %24 = add i16 %.sroa.6.0.extract.trunc, %.sroa.0.0.extract.trunc
  store i16 %24, ptr %15, align 4, !tbaa !16
  br label %25

25:                                               ; preds = %23, %18
  tail call void @WebRtcAgc_UpdateAgcThresholds(ptr noundef nonnull %0)
  %26 = getelementptr inbounds i8, ptr %0, i64 420
  %27 = load i16, ptr %15, align 4, !tbaa !16
  %28 = load i16, ptr %19, align 2, !tbaa !17
  %29 = load i8, ptr %14, align 2, !tbaa !15
  %30 = getelementptr inbounds i8, ptr %0, i64 58
  %31 = load i16, ptr %30, align 2, !tbaa !19
  %32 = tail call i32 @WebRtcAgc_CalculateGainTable(ptr noundef nonnull %26, i16 noundef signext %27, i16 noundef signext %28, i8 noundef zeroext %29, i16 noundef signext %31)
  %33 = icmp eq i32 %32, -1
  br i1 %33, label %38, label %34

34:                                               ; preds = %25
  %35 = getelementptr inbounds i8, ptr %0, i64 18
  %36 = getelementptr inbounds i8, ptr %0, i64 20
  store i16 %.sroa.6.0.extract.trunc, ptr %36, align 2, !tbaa !20
  %37 = getelementptr inbounds i8, ptr %0, i64 22
  store i8 %.sroa.8.0.extract.trunc, ptr %37, align 2, !tbaa !21
  store i16 %.sroa.0.0.extract.trunc, ptr %35, align 2, !tbaa !22
  br label %38

38:                                               ; preds = %25, %2, %34, %16, %11, %7
  %.0 = phi i32 [ -1, %7 ], [ -1, %11 ], [ -1, %16 ], [ 0, %34 ], [ -1, %2 ], [ -1, %25 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"", !7, i64 0, !10, i64 4, !10, i64 6, !10, i64 8, !8, i64 10, !11, i64 12, !11, i64 18, !10, i64 24, !10, i64 26, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !7, i64 52, !10, i64 56, !10, i64 58, !8, i64 60, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !8, i64 116, !8, i64 156, !8, i64 196, !10, i64 276, !10, i64 278, !10, i64 280, !10, i64 282, !10, i64 284, !10, i64 286, !10, i64 288, !10, i64 290, !10, i64 292, !10, i64 294, !10, i64 296, !10, i64 298, !10, i64 300, !10, i64 302, !7, i64 304, !10, i64 308, !7, i64 312, !7, i64 316, !7, i64 320, !7, i64 324, !7, i64 328, !7, i64 332, !7, i64 336, !7, i64 340, !7, i64 344, !10, i64 348, !12, i64 352, !13, i64 408, !10, i64 664}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"", !10, i64 0, !10, i64 2, !8, i64 4}
!12 = !{!"", !8, i64 0, !10, i64 32, !10, i64 34, !10, i64 36, !10, i64 38, !7, i64 40, !10, i64 44, !10, i64 46, !7, i64 48, !10, i64 52}
!13 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !8, i64 12, !10, i64 140, !10, i64 142, !12, i64 144, !12, i64 200}
!14 = !{!6, !10, i64 26}
!15 = !{!6, !8, i64 10}
!16 = !{!6, !10, i64 4}
!17 = !{!6, !10, i64 6}
!18 = !{!6, !10, i64 8}
!19 = !{!6, !10, i64 58}
!20 = !{!6, !10, i64 20}
!21 = !{!6, !8, i64 22}
!22 = !{!6, !10, i64 18}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass