; LLVM IR from Ryuk17/SpeechAlgorithms :: WebRTC_AEC/src (echo_cancellation)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.AecConfig = type { i16, i16, i16, i32 }
%struct.aecpc_t = type { i32, i32, i32, i32, float, i16, i32, i32, i32, i16, i16, i32, i16, i16, i16, i16, i32, i32, i32, i16, ptr, i32, i32, i32, float, ptr, i32, i32, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @WebRtcAec_set_config(ptr noundef %0, i64 %1, i32 %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca %struct.AecConfig, align 4
  %6 = alloca { i64, i32 }, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = getelementptr inbounds { i64, i32 }, ptr %6, i32 0, i32 0
  store i64 %1, ptr %10, align 4
  %11 = getelementptr inbounds { i64, i32 }, ptr %6, i32 0, i32 1
  store i32 %2, ptr %11, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 %6, i64 12, i1 false)
  store ptr %0, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %12 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %12, ptr %8, align 8, !tbaa !5
  %13 = load ptr, ptr %8, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.aecpc_t, ptr %13, i32 0, i32 9
  %15 = load i16, ptr %14, align 4, !tbaa !9
  %16 = sext i16 %15 to i32
  %17 = icmp ne i32 %16, 42
  br i1 %17, label %18, label %21

18:                                               ; preds = %3
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.aecpc_t, ptr %19, i32 0, i32 26
  store i32 12002, ptr %20, align 8, !tbaa !14
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %92

21:                                               ; preds = %3
  %22 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 1
  %23 = load i16, ptr %22, align 2, !tbaa !15
  %24 = sext i16 %23 to i32
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %34

26:                                               ; preds = %21
  %27 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 1
  %28 = load i16, ptr %27, align 2, !tbaa !15
  %29 = sext i16 %28 to i32
  %30 = icmp ne i32 %29, 1
  br i1 %30, label %31, label %34

31:                                               ; preds = %26
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.aecpc_t, ptr %32, i32 0, i32 26
  store i32 12004, ptr %33, align 8, !tbaa !14
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %92

34:                                               ; preds = %26, %21
  %35 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 1
  %36 = load i16, ptr %35, align 2, !tbaa !15
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.aecpc_t, ptr %37, i32 0, i32 5
  store i16 %36, ptr %38, align 4, !tbaa !17
  %39 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 0
  %40 = load i16, ptr %39, align 4, !tbaa !18
  %41 = sext i16 %40 to i32
  %42 = icmp ne i32 %41, 0
  br i1 %42, label %43, label %56

43:                                               ; preds = %34
  %44 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 0
  %45 = load i16, ptr %44, align 4, !tbaa !18
  %46 = sext i16 %45 to i32
  %47 = icmp ne i32 %46, 1
  br i1 %47, label %48, label %56

48:                                               ; preds = %43
  %49 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 0
  %50 = load i16, ptr %49, align 4, !tbaa !18
  %51 = sext i16 %50 to i32
  %52 = icmp ne i32 %51, 2
  br i1 %52, label %53, label %56

53:                                               ; preds = %48
  %54 = load ptr, ptr %8, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.aecpc_t, ptr %54, i32 0, i32 26
  store i32 12004, ptr %55, align 8, !tbaa !14
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %92

56:                                               ; preds = %48, %43, %34
  %57 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 2
  %58 = load i16, ptr %57, align 4, !tbaa !19
  %59 = sext i16 %58 to i32
  %60 = icmp ne i32 %59, 0
  br i1 %60, label %61, label %69

61:                                               ; preds = %56
  %62 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 2
  %63 = load i16, ptr %62, align 4, !tbaa !19
  %64 = sext i16 %63 to i32
  %65 = icmp ne i32 %64, 1
  br i1 %65, label %66, label %69

66:                                               ; preds = %61
  %67 = load ptr, ptr %8, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.aecpc_t, ptr %67, i32 0, i32 26
  store i32 12004, ptr %68, align 8, !tbaa !14
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %92

69:                                               ; preds = %61, %56
  %70 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 3
  %71 = load i32, ptr %70, align 4, !tbaa !20
  %72 = icmp ne i32 %71, 0
  br i1 %72, label %73, label %80

73:                                               ; preds = %69
  %74 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 3
  %75 = load i32, ptr %74, align 4, !tbaa !20
  %76 = icmp ne i32 %75, 1
  br i1 %76, label %77, label %80

77:                                               ; preds = %73
  %78 = load ptr, ptr %8, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.aecpc_t, ptr %78, i32 0, i32 26
  store i32 12004, ptr %79, align 8, !tbaa !14
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %92

80:                                               ; preds = %73, %69
  %81 = load ptr, ptr %8, align 8, !tbaa !5
  %82 = getelementptr inbounds %struct.aecpc_t, ptr %81, i32 0, i32 28
  %83 = load ptr, ptr %82, align 8, !tbaa !21
  %84 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 0
  %85 = load i16, ptr %84, align 4, !tbaa !18
  %86 = sext i16 %85 to i32
  %87 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 2
  %88 = load i16, ptr %87, align 4, !tbaa !19
  %89 = sext i16 %88 to i32
  %90 = getelementptr inbounds %struct.AecConfig, ptr %5, i32 0, i32 3
  %91 = load i32, ptr %90, align 4, !tbaa !20
  call void @WebRtcAec_SetConfigCore(ptr noundef %83, i32 noundef %86, i32 noundef %89, i32 noundef %91)
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %92

92:                                               ; preds = %80, %77, %66, %53, %31, %18
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  %93 = load i32, ptr %4, align 4
  ret i32 %93
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @WebRtcAec_SetConfigCore(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 36}
!10 = !{!"", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !12, i64 16, !13, i64 20, !11, i64 24, !11, i64 28, !11, i64 32, !13, i64 36, !13, i64 38, !11, i64 40, !13, i64 44, !13, i64 46, !13, i64 48, !13, i64 50, !11, i64 52, !11, i64 56, !11, i64 60, !13, i64 64, !6, i64 72, !11, i64 80, !11, i64 84, !11, i64 88, !12, i64 92, !6, i64 96, !11, i64 104, !11, i64 108, !6, i64 112}
!11 = !{!"int", !7, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!10, !11, i64 104}
!15 = !{!16, !13, i64 2}
!16 = !{!"", !13, i64 0, !13, i64 2, !13, i64 4, !11, i64 8}
!17 = !{!10, !13, i64 20}
!18 = !{!16, !13, i64 0}
!19 = !{!16, !13, i64 4}
!20 = !{!16, !11, i64 8}
!21 = !{!10, !6, i64 112}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @WebRtcAec_set_config(ptr nocapture noundef %0, i64 %1, i32 %2) local_unnamed_addr #0 {
  %.sroa.027.0.extract.trunc = trunc i64 %1 to i32
  %.sroa.5.0.extract.shift = lshr i64 %1, 16
  %.sroa.5.0.extract.trunc = trunc i64 %.sroa.5.0.extract.shift to i16
  %4 = getelementptr inbounds i8, ptr %0, i64 36
  %5 = load i16, ptr %4, align 4, !tbaa !5
  %.not = icmp eq i16 %5, 42
  br i1 %.not, label %8, label %6

6:                                                ; preds = %3
  %7 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12002, ptr %7, align 8, !tbaa !13
  br label %28

8:                                                ; preds = %3
  %or.cond = icmp ugt i16 %.sroa.5.0.extract.trunc, 1
  br i1 %or.cond, label %9, label %11

9:                                                ; preds = %8
  %10 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12004, ptr %10, align 8, !tbaa !13
  br label %28

11:                                               ; preds = %8
  %12 = getelementptr inbounds i8, ptr %0, i64 20
  store i16 %.sroa.5.0.extract.trunc, ptr %12, align 4, !tbaa !14
  %sext = shl i32 %.sroa.027.0.extract.trunc, 16
  %13 = ashr exact i32 %sext, 16
  %or.cond11 = icmp ugt i32 %sext, 131072
  br i1 %or.cond11, label %14, label %16

14:                                               ; preds = %11
  %15 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12004, ptr %15, align 8, !tbaa !13
  br label %28

16:                                               ; preds = %11
  %tr.sh.diff = trunc i64 %.sroa.5.0.extract.shift to i32
  %17 = ashr i32 %tr.sh.diff, 16
  %18 = icmp ugt i32 %tr.sh.diff, 65535
  %19 = icmp ne i32 %17, 1
  %or.cond15 = and i1 %18, %19
  br i1 %or.cond15, label %20, label %22

20:                                               ; preds = %16
  %21 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12004, ptr %21, align 8, !tbaa !13
  br label %28

22:                                               ; preds = %16
  %or.cond18 = icmp ugt i32 %2, 1
  br i1 %or.cond18, label %23, label %25

23:                                               ; preds = %22
  %24 = getelementptr inbounds i8, ptr %0, i64 104
  store i32 12004, ptr %24, align 8, !tbaa !13
  br label %28

25:                                               ; preds = %22
  %26 = getelementptr inbounds i8, ptr %0, i64 112
  %27 = load ptr, ptr %26, align 8, !tbaa !15
  tail call void @WebRtcAec_SetConfigCore(ptr noundef %27, i32 noundef %13, i32 noundef %17, i32 noundef %2) #2
  br label %28

28:                                               ; preds = %25, %23, %20, %14, %9, %6
  %.0 = phi i32 [ -1, %6 ], [ -1, %9 ], [ -1, %14 ], [ -1, %20 ], [ -1, %23 ], [ 0, %25 ]
  ret i32 %.0
}

declare void @WebRtcAec_SetConfigCore(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 36}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !11, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !11, i64 36, !11, i64 38, !7, i64 40, !11, i64 44, !11, i64 46, !11, i64 48, !11, i64 50, !7, i64 52, !7, i64 56, !7, i64 60, !11, i64 64, !12, i64 72, !7, i64 80, !7, i64 84, !7, i64 88, !10, i64 92, !12, i64 96, !7, i64 104, !7, i64 108, !12, i64 112}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"float", !8, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !7, i64 104}
!14 = !{!6, !11, i64 20}
!15 = !{!6, !12, i64 112}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass