; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.MFRC522_Uid = type { i8, [10 x i8], i8 }

@MFRC522_PICC_DumpDetailsToSerial.str = external hidden constant [10 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.26 = external hidden constant [14 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.27 = external hidden constant [13 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.28 = external hidden constant [13 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.29 = external hidden constant [14 x i8], align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PICC_GetType(i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
declare dso_local ptr @MFRC522_PICC_GetTypeName(i32 noundef) #1

declare void @dhdebug_ram(ptr noundef, ...) #2

; Function Attrs: nounwind uwtable
define dso_local void @MFRC522_PICC_DumpDetailsToSerial(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  br label %5

5:                                                ; preds = %1
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_PICC_DumpDetailsToSerial.str)
  br label %6

6:                                                ; preds = %5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #3
  store i8 0, ptr %3, align 1, !tbaa !9
  br label %7

7:                                                ; preds = %47, %6
  %8 = load i8, ptr %3, align 1, !tbaa !9
  %9 = zext i8 %8 to i32
  %10 = load ptr, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.MFRC522_Uid, ptr %10, i32 0, i32 0
  %12 = load i8, ptr %11, align 1, !tbaa !10
  %13 = zext i8 %12 to i32
  %14 = icmp slt i32 %9, %13
  br i1 %14, label %15, label %50

15:                                               ; preds = %7
  %16 = load ptr, ptr %2, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.MFRC522_Uid, ptr %16, i32 0, i32 1
  %18 = load i8, ptr %3, align 1, !tbaa !9
  %19 = zext i8 %18 to i64
  %20 = getelementptr inbounds [10 x i8], ptr %17, i64 0, i64 %19
  %21 = load i8, ptr %20, align 1, !tbaa !9
  %22 = zext i8 %21 to i32
  %23 = icmp slt i32 %22, 16
  br i1 %23, label %24, label %35

24:                                               ; preds = %15
  br label %25

25:                                               ; preds = %24
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.MFRC522_Uid, ptr %26, i32 0, i32 1
  %28 = load i8, ptr %3, align 1, !tbaa !9
  %29 = zext i8 %28 to i64
  %30 = getelementptr inbounds [10 x i8], ptr %27, i64 0, i64 %29
  %31 = load i8, ptr %30, align 1, !tbaa !9
  %32 = zext i8 %31 to i32
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_PICC_DumpDetailsToSerial.str.26, i32 noundef %32)
  br label %33

33:                                               ; preds = %25
  br label %34

34:                                               ; preds = %33
  br label %46

35:                                               ; preds = %15
  br label %36

36:                                               ; preds = %35
  %37 = load ptr, ptr %2, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.MFRC522_Uid, ptr %37, i32 0, i32 1
  %39 = load i8, ptr %3, align 1, !tbaa !9
  %40 = zext i8 %39 to i64
  %41 = getelementptr inbounds [10 x i8], ptr %38, i64 0, i64 %40
  %42 = load i8, ptr %41, align 1, !tbaa !9
  %43 = zext i8 %42 to i32
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_PICC_DumpDetailsToSerial.str.27, i32 noundef %43)
  br label %44

44:                                               ; preds = %36
  br label %45

45:                                               ; preds = %44
  br label %46

46:                                               ; preds = %45, %34
  br label %47

47:                                               ; preds = %46
  %48 = load i8, ptr %3, align 1, !tbaa !9
  %49 = add i8 %48, 1
  store i8 %49, ptr %3, align 1, !tbaa !9
  br label %7, !llvm.loop !12

50:                                               ; preds = %7
  br label %51

51:                                               ; preds = %50
  %52 = load ptr, ptr %2, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.MFRC522_Uid, ptr %52, i32 0, i32 2
  %54 = load i8, ptr %53, align 1, !tbaa !14
  %55 = zext i8 %54 to i32
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_PICC_DumpDetailsToSerial.str.28, i32 noundef %55)
  br label %56

56:                                               ; preds = %51
  br label %57

57:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %58 = load ptr, ptr %2, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.MFRC522_Uid, ptr %58, i32 0, i32 2
  %60 = load i8, ptr %59, align 1, !tbaa !14
  %61 = call i32 @MFRC522_PICC_GetType(i8 noundef zeroext %60)
  store i32 %61, ptr %4, align 4, !tbaa !15
  br label %62

62:                                               ; preds = %57
  %63 = load i32, ptr %4, align 4, !tbaa !15
  %64 = call ptr @MFRC522_PICC_GetTypeName(i32 noundef %63)
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_PICC_DumpDetailsToSerial.str.29, ptr noundef %64)
  br label %65

65:                                               ; preds = %62
  br label %66

66:                                               ; preds = %65
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !7, i64 0}
!11 = !{!"", !7, i64 0, !7, i64 1, !7, i64 11}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!11, !7, i64 11}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@MFRC522_PICC_DumpDetailsToSerial.str = external hidden constant [10 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.26 = external hidden constant [14 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.27 = external hidden constant [13 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.28 = external hidden constant [13 x i8], align 4
@MFRC522_PICC_DumpDetailsToSerial.str.29 = external hidden constant [14 x i8], align 4

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PICC_GetType(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local ptr @MFRC522_PICC_GetTypeName(i32 noundef) local_unnamed_addr #0

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @MFRC522_PICC_DumpDetailsToSerial(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_PICC_DumpDetailsToSerial.str) #2
  %2 = load i8, ptr %0, align 1, !tbaa !5
  %.not = icmp eq i8 %2, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %1
  %3 = getelementptr inbounds i8, ptr %0, i64 1
  br label %4

4:                                                ; preds = %.lr.ph, %4
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %4 ]
  %5 = getelementptr inbounds [10 x i8], ptr %3, i64 0, i64 %indvars.iv
  %6 = load i8, ptr %5, align 1, !tbaa !9
  %7 = zext i8 %6 to i32
  %8 = icmp ult i8 %6, 16
  %MFRC522_PICC_DumpDetailsToSerial.str.26.MFRC522_PICC_DumpDetailsToSerial.str.27 = select i1 %8, ptr @MFRC522_PICC_DumpDetailsToSerial.str.26, ptr @MFRC522_PICC_DumpDetailsToSerial.str.27
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull %MFRC522_PICC_DumpDetailsToSerial.str.26.MFRC522_PICC_DumpDetailsToSerial.str.27, i32 noundef %7) #2
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %9 = load i8, ptr %0, align 1, !tbaa !5
  %10 = zext i8 %9 to i64
  %11 = icmp ult i64 %indvars.iv.next, %10
  br i1 %11, label %4, label %._crit_edge, !llvm.loop !10

._crit_edge:                                      ; preds = %4, %1
  %12 = getelementptr inbounds i8, ptr %0, i64 11
  %13 = load i8, ptr %12, align 1, !tbaa !12
  %14 = zext i8 %13 to i32
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_PICC_DumpDetailsToSerial.str.28, i32 noundef %14) #2
  %15 = load i8, ptr %12, align 1, !tbaa !12
  %16 = tail call i32 @MFRC522_PICC_GetType(i8 noundef zeroext %15)
  %17 = tail call ptr @MFRC522_PICC_GetTypeName(i32 noundef %16)
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_PICC_DumpDetailsToSerial.str.29, ptr noundef %17) #2
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 1, !7, i64 11}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!6, !7, i64 11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass