; LLVM IR from tum-i4/obfuscation-benchmarks :: tigress-generated-programs (RandomFunc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @RandomFunc(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1 x i64], align 8
  %6 = alloca i8, align 1
  %7 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds i64, ptr %8, i64 0
  %10 = load i64, ptr %9, align 8, !tbaa !9
  %11 = sub i64 %10, 51238316
  %12 = sub i64 %11, 339126204
  %13 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  store i64 %12, ptr %13, align 8, !tbaa !9
  %14 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %15 = load i64, ptr %14, align 8, !tbaa !9
  %16 = lshr i64 %15, 3
  %17 = and i64 %16, 1
  %18 = icmp ne i64 %17, 0
  br i1 %18, label %19, label %91

19:                                               ; preds = %2
  %20 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %21 = load i64, ptr %20, align 8, !tbaa !9
  %22 = and i64 %21, 1
  %23 = icmp ne i64 %22, 0
  br i1 %23, label %24, label %71

24:                                               ; preds = %19
  %25 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %26 = load i64, ptr %25, align 8, !tbaa !9
  %27 = and i64 %26, 1
  %28 = icmp ne i64 %27, 0
  br i1 %28, label %29, label %59

29:                                               ; preds = %24
  %30 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %31 = getelementptr inbounds i8, ptr %30, i64 6
  %32 = load i8, ptr %31, align 1, !tbaa !11
  store i8 %32, ptr %6, align 1, !tbaa !11
  %33 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %34 = getelementptr inbounds i8, ptr %33, i64 5
  %35 = load i8, ptr %34, align 1, !tbaa !11
  %36 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %37 = getelementptr inbounds i8, ptr %36, i64 6
  store i8 %35, ptr %37, align 1, !tbaa !11
  %38 = load i8, ptr %6, align 1, !tbaa !11
  %39 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %40 = getelementptr inbounds i8, ptr %39, i64 5
  store i8 %38, ptr %40, align 1, !tbaa !11
  %41 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %42 = getelementptr inbounds i8, ptr %41, i64 5
  %43 = load i8, ptr %42, align 1, !tbaa !11
  store i8 %43, ptr %6, align 1, !tbaa !11
  %44 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %45 = getelementptr inbounds i8, ptr %44, i64 2
  %46 = load i8, ptr %45, align 1, !tbaa !11
  %47 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %48 = getelementptr inbounds i8, ptr %47, i64 5
  store i8 %46, ptr %48, align 1, !tbaa !11
  %49 = load i8, ptr %6, align 1, !tbaa !11
  %50 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %51 = getelementptr inbounds i8, ptr %50, i64 2
  store i8 %49, ptr %51, align 1, !tbaa !11
  %52 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %53 = load i64, ptr %52, align 8, !tbaa !9
  %54 = and i64 %53, 31
  %55 = shl i64 %54, 4
  %56 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %57 = load i64, ptr %56, align 8, !tbaa !9
  %58 = or i64 %57, %55
  store i64 %58, ptr %56, align 8, !tbaa !9
  br label %70

59:                                               ; preds = %24
  %60 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %61 = load i64, ptr %60, align 8, !tbaa !9
  %62 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %63 = load i64, ptr %62, align 8, !tbaa !9
  %64 = add i64 %63, %61
  store i64 %64, ptr %62, align 8, !tbaa !9
  %65 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %66 = load i64, ptr %65, align 8, !tbaa !9
  %67 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %68 = load i64, ptr %67, align 8, !tbaa !9
  %69 = add i64 %68, %66
  store i64 %69, ptr %67, align 8, !tbaa !9
  br label %70

70:                                               ; preds = %59, %29
  br label %90

71:                                               ; preds = %19
  %72 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %73 = load i64, ptr %72, align 8, !tbaa !9
  %74 = and i64 %73, 31
  %75 = shl i64 %74, 4
  %76 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %77 = load i64, ptr %76, align 8, !tbaa !9
  %78 = or i64 %77, %75
  store i64 %78, ptr %76, align 8, !tbaa !9
  %79 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %80 = getelementptr inbounds i16, ptr %79, i64 1
  %81 = load i16, ptr %80, align 2, !tbaa !12
  store i16 %81, ptr %7, align 2, !tbaa !12
  %82 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %83 = getelementptr inbounds i16, ptr %82, i64 2
  %84 = load i16, ptr %83, align 2, !tbaa !12
  %85 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %86 = getelementptr inbounds i16, ptr %85, i64 1
  store i16 %84, ptr %86, align 2, !tbaa !12
  %87 = load i16, ptr %7, align 2, !tbaa !12
  %88 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %89 = getelementptr inbounds i16, ptr %88, i64 2
  store i16 %87, ptr %89, align 2, !tbaa !12
  br label %90

90:                                               ; preds = %71, %70
  br label %97

91:                                               ; preds = %2
  %92 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %93 = load i64, ptr %92, align 8, !tbaa !9
  %94 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %95 = load i64, ptr %94, align 8, !tbaa !9
  %96 = mul i64 %95, %93
  store i64 %96, ptr %94, align 8, !tbaa !9
  br label %97

97:                                               ; preds = %91, %90
  %98 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %99 = load i64, ptr %98, align 8, !tbaa !9
  %100 = add i64 %99, 309316150
  %101 = add i64 %100, 8026621712
  %102 = load ptr, ptr %4, align 8, !tbaa !5
  %103 = getelementptr inbounds i64, ptr %102, i64 0
  store i64 %101, ptr %103, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @RandomFunc(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = load i64, ptr %0, align 8, !tbaa !5
  %4 = add i64 %3, -390364520
  %.sroa.22.0.extract.shift = lshr i64 %4, 16
  %.sroa.26.0.extract.shift = lshr i64 %4, 32
  %.sroa.26.sroa.24.0.extract.shift599 = lshr i64 %4, 40
  %.sroa.32.0.extract.shift = lshr i64 %4, 48
  %5 = and i64 %4, 8
  %.not = icmp eq i64 %5, 0
  br i1 %.not, label %15, label %6

6:                                                ; preds = %2
  %7 = and i64 %3, 1
  %.not602 = icmp eq i64 %7, 0
  %8 = shl i64 %4, 4
  %sum.shift = lshr i64 %4, 24
  br i1 %.not602, label %12, label %9

9:                                                ; preds = %6
  %10 = and i64 %8, 496
  %11 = or i64 %10, %4
  br label %18

12:                                               ; preds = %6
  %13 = and i64 %8, 480
  %14 = or i64 %13, %4
  br label %18

15:                                               ; preds = %2
  %.sroa.26.sroa.0.0.insert.ext = and i64 %.sroa.26.0.extract.shift, 255
  %.sroa.26.sroa.24.0.insert.ext = shl nuw nsw i64 %.sroa.26.sroa.24.0.extract.shift599, 8
  %.sroa.26.sroa.24.0.insert.ext.masked = and i64 %.sroa.26.sroa.24.0.insert.ext, 65280
  %.sroa.26.0.insert.ext = or disjoint i64 %.sroa.26.sroa.24.0.insert.ext.masked, %.sroa.26.sroa.0.0.insert.ext
  %.sroa.26.0.insert.shift = shl nuw nsw i64 %.sroa.26.0.insert.ext, 32
  %16 = and i64 %4, -281470681743369
  %.sroa.0.0.insert.insert = or disjoint i64 %.sroa.26.0.insert.shift, %16
  %17 = mul i64 %.sroa.0.0.insert.insert, %.sroa.0.0.insert.insert
  %.sroa.22.0.extract.shift128 = lshr i64 %17, 16
  %.sroa.22.sroa.26.0.extract.shift585600 = lshr i64 %17, 24
  %.sroa.26.0.extract.shift204 = lshr i64 %17, 32
  %.sroa.26.sroa.24.0.extract.shift469601 = lshr i64 %17, 40
  %.sroa.32.0.extract.shift283 = lshr i64 %17, 48
  br label %18

18:                                               ; preds = %12, %9, %15
  %.sroa.26.sroa.24.0.in = phi i64 [ %.sroa.22.0.extract.shift, %9 ], [ %sum.shift, %12 ], [ %.sroa.26.sroa.24.0.extract.shift469601, %15 ]
  %.sroa.26.sroa.0.0.in = phi i64 [ %.sroa.26.0.extract.shift, %9 ], [ %.sroa.22.0.extract.shift, %12 ], [ %.sroa.26.0.extract.shift204, %15 ]
  %.sroa.34.0.in.in = phi i64 [ %4, %9 ], [ %4, %12 ], [ %17, %15 ]
  %.sroa.32.0.in = phi i64 [ %.sroa.26.sroa.24.0.extract.shift599, %9 ], [ %.sroa.32.0.extract.shift, %12 ], [ %.sroa.32.0.extract.shift283, %15 ]
  %.sroa.0.0.in = phi i64 [ %11, %9 ], [ %14, %12 ], [ %17, %15 ]
  %.sroa.22.sroa.0.0.in = phi i64 [ %.sroa.32.0.extract.shift, %9 ], [ %.sroa.26.0.extract.shift, %12 ], [ %.sroa.22.0.extract.shift128, %15 ]
  %.sroa.22.sroa.26.0.in = phi i64 [ %sum.shift, %9 ], [ %.sroa.26.sroa.24.0.extract.shift599, %12 ], [ %.sroa.22.sroa.26.0.extract.shift585600, %15 ]
  %.sroa.34.0.in = and i64 %.sroa.34.0.in.in, -72057594037927936
  %.sroa.22.sroa.26.0.insert.ext587 = shl nuw nsw i64 %.sroa.22.sroa.26.0.in, 8
  %.sroa.22.sroa.0.0.insert.ext522 = and i64 %.sroa.22.sroa.0.0.in, 255
  %.sroa.26.sroa.24.0.insert.ext471 = shl nuw nsw i64 %.sroa.26.sroa.24.0.in, 8
  %.sroa.26.sroa.0.0.insert.ext406 = and i64 %.sroa.26.sroa.0.0.in, 255
  %.sroa.32.0.insert.ext286 = shl i64 %.sroa.32.0.in, 48
  %.sroa.32.0.insert.shift287 = and i64 %.sroa.32.0.insert.ext286, 71776119061217280
  %.sroa.32.0.insert.insert289 = or disjoint i64 %.sroa.34.0.in, %.sroa.32.0.insert.shift287
  %.sroa.26.sroa.24.0.insert.ext471.masked = and i64 %.sroa.26.sroa.24.0.insert.ext471, 65280
  %.sroa.26.0.insert.ext207 = or disjoint i64 %.sroa.26.sroa.24.0.insert.ext471.masked, %.sroa.26.sroa.0.0.insert.ext406
  %.sroa.26.0.insert.shift208 = shl nuw nsw i64 %.sroa.26.0.insert.ext207, 32
  %.sroa.22.sroa.26.0.insert.ext587.masked = and i64 %.sroa.22.sroa.26.0.insert.ext587, 65280
  %.sroa.22.0.insert.ext131 = or disjoint i64 %.sroa.22.sroa.26.0.insert.ext587.masked, %.sroa.22.sroa.0.0.insert.ext522
  %.sroa.22.0.insert.shift132 = shl nuw nsw i64 %.sroa.22.0.insert.ext131, 16
  %.sroa.0.0.insert.ext57 = and i64 %.sroa.0.0.in, 65535
  %.sroa.26.0.insert.insert210 = add nuw nsw i64 %.sroa.26.0.insert.shift208, 8335937862
  %.sroa.22.0.insert.insert134 = add nuw nsw i64 %.sroa.26.0.insert.insert210, %.sroa.0.0.insert.ext57
  %.sroa.0.0.insert.insert59 = add i64 %.sroa.22.0.insert.insert134, %.sroa.32.0.insert.insert289
  %19 = add i64 %.sroa.0.0.insert.insert59, %.sroa.22.0.insert.shift132
  store i64 %19, ptr %1, align 8, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass