; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/Caixa de Moedas/main.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@st = external dso_local global %"class.std::vector", align 8
@lazy = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6golefti(i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7gorighti(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #3 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %16) #4
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %57

20:                                               ; preds = %5
  %21 = load i32, ptr %9, align 4, !tbaa !5
  %22 = load i32, ptr %8, align 4, !tbaa !5
  %23 = sub nsw i32 %21, %22
  %24 = add nsw i32 %23, 1
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %26) #4
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = mul nsw i32 %24, %28
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %31) #4
  store i32 %29, ptr %32, align 4, !tbaa !5
  %33 = load i32, ptr %8, align 4, !tbaa !5
  %34 = load i32, ptr %9, align 4, !tbaa !5
  %35 = icmp ne i32 %33, %34
  br i1 %35, label %36, label %53

36:                                               ; preds = %20
  %37 = load i32, ptr %7, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %38) #4
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = load i32, ptr %7, align 4, !tbaa !5
  %42 = call noundef i32 @_Z6golefti(i32 noundef %41)
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %43) #4
  store i32 %40, ptr %44, align 4, !tbaa !5
  %45 = load i32, ptr %7, align 4, !tbaa !5
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %46) #4
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = call noundef i32 @_Z7gorighti(i32 noundef %49)
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %51) #4
  store i32 %48, ptr %52, align 4, !tbaa !5
  br label %53

53:                                               ; preds = %36, %20
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %55) #4
  store i32 0, ptr %56, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %53, %5
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = load i32, ptr %9, align 4, !tbaa !5
  %60 = icmp sgt i32 %58, %59
  br i1 %60, label %69, label %61

61:                                               ; preds = %57
  %62 = load i32, ptr %9, align 4, !tbaa !5
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = icmp slt i32 %62, %63
  br i1 %64, label %69, label %65

65:                                               ; preds = %61
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = load i32, ptr %11, align 4, !tbaa !5
  %68 = icmp sgt i32 %66, %67
  br i1 %68, label %69, label %70

69:                                               ; preds = %65, %61, %57
  store i32 0, ptr %6, align 4
  br label %106

70:                                               ; preds = %65
  %71 = load i32, ptr %10, align 4, !tbaa !5
  %72 = load i32, ptr %8, align 4, !tbaa !5
  %73 = icmp sle i32 %71, %72
  br i1 %73, label %74, label %83

74:                                               ; preds = %70
  %75 = load i32, ptr %9, align 4, !tbaa !5
  %76 = load i32, ptr %11, align 4, !tbaa !5
  %77 = icmp sle i32 %75, %76
  br i1 %77, label %78, label %83

78:                                               ; preds = %74
  %79 = load i32, ptr %7, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %80) #4
  %82 = load i32, ptr %81, align 4, !tbaa !5
  store i32 %82, ptr %6, align 4
  br label %106

83:                                               ; preds = %74, %70
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %84 = load i32, ptr %8, align 4, !tbaa !5
  %85 = load i32, ptr %9, align 4, !tbaa !5
  %86 = add nsw i32 %84, %85
  %87 = ashr i32 %86, 1
  store i32 %87, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %88 = load i32, ptr %7, align 4, !tbaa !5
  %89 = call noundef i32 @_Z6golefti(i32 noundef %88)
  %90 = load i32, ptr %8, align 4, !tbaa !5
  %91 = load i32, ptr %12, align 4, !tbaa !5
  %92 = load i32, ptr %10, align 4, !tbaa !5
  %93 = load i32, ptr %11, align 4, !tbaa !5
  %94 = call noundef i32 @_Z5queryiiiii(i32 noundef %89, i32 noundef %90, i32 noundef %91, i32 noundef %92, i32 noundef %93)
  store i32 %94, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %95 = load i32, ptr %7, align 4, !tbaa !5
  %96 = call noundef i32 @_Z7gorighti(i32 noundef %95)
  %97 = load i32, ptr %12, align 4, !tbaa !5
  %98 = add nsw i32 %97, 1
  %99 = load i32, ptr %9, align 4, !tbaa !5
  %100 = load i32, ptr %10, align 4, !tbaa !5
  %101 = load i32, ptr %11, align 4, !tbaa !5
  %102 = call noundef i32 @_Z5queryiiiii(i32 noundef %96, i32 noundef %98, i32 noundef %99, i32 noundef %100, i32 noundef %101)
  store i32 %102, ptr %14, align 4, !tbaa !5
  %103 = load i32, ptr %13, align 4, !tbaa !5
  %104 = load i32, ptr %14, align 4, !tbaa !5
  %105 = add nsw i32 %103, %104
  store i32 %105, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %106

106:                                              ; preds = %83, %78, %69
  %107 = load i32, ptr %6, align 4
  ret i32 %107
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@st = external dso_local global %"class.std::vector", align 8
@lazy = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6golefti(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7gorighti(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = add i32 %2, 1
  %7 = icmp slt i32 %2, %3
  %.not44 = icmp sgt i32 %2, %4
  br label %tailrecurse

tailrecurse:                                      ; preds = %37, %5
  %accumulator.tr = phi i32 [ 0, %5 ], [ %44, %37 ]
  %.tr = phi i32 [ %0, %5 ], [ %42, %37 ]
  %.tr47 = phi i32 [ %1, %5 ], [ %43, %37 ]
  %8 = sext i32 %.tr to i64
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #2
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %.not = icmp eq i32 %10, 0
  br i1 %.not, label %30, label %11

11:                                               ; preds = %tailrecurse
  %12 = sub i32 %6, %.tr47
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #2
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = mul nsw i32 %14, %12
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %8) #2
  store i32 %15, ptr %16, align 4, !tbaa !5
  %.not42 = icmp eq i32 %.tr47, %2
  br i1 %.not42, label %28, label %17

17:                                               ; preds = %11
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #2
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = tail call noundef i32 @_Z6golefti(i32 noundef %.tr)
  %21 = sext i32 %20 to i64
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %21) #2
  store i32 %19, ptr %22, align 4, !tbaa !5
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #2
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = tail call noundef i32 @_Z7gorighti(i32 noundef %.tr)
  %26 = sext i32 %25 to i64
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %26) #2
  store i32 %24, ptr %27, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %17, %11
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %8) #2
  store i32 0, ptr %29, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %28, %tailrecurse
  %31 = icmp sgt i32 %.tr47, %2
  %or.cond = or i1 %7, %31
  %32 = icmp sgt i32 %.tr47, %4
  %or.cond45 = or i1 %32, %or.cond
  br i1 %or.cond45, label %.loopexit, label %33

33:                                               ; preds = %30
  %.not43 = icmp slt i32 %.tr47, %3
  %or.cond46 = or i1 %.not44, %.not43
  br i1 %or.cond46, label %37, label %34

34:                                               ; preds = %33
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %8) #2
  %36 = load i32, ptr %35, align 4, !tbaa !5
  br label %.loopexit

37:                                               ; preds = %33
  %38 = add nsw i32 %.tr47, %2
  %39 = ashr i32 %38, 1
  %40 = tail call noundef i32 @_Z6golefti(i32 noundef %.tr)
  %41 = tail call noundef i32 @_Z5queryiiiii(i32 noundef %40, i32 noundef %.tr47, i32 noundef %39, i32 noundef %3, i32 noundef %4)
  %42 = tail call noundef i32 @_Z7gorighti(i32 noundef %.tr)
  %43 = add nsw i32 %39, 1
  %44 = add nsw i32 %41, %accumulator.tr
  br label %tailrecurse

.loopexit:                                        ; preds = %30, %34
  %.0 = phi i32 [ %36, %34 ], [ 0, %30 ]
  %accumulator.ret.tr = add nsw i32 %.0, %accumulator.tr
  ret i32 %accumulator.ret.tr
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass