; LLVM IR from ggml-org/ggml :: src/ggml-cpu (vec)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @ggml_vec_silu_f32(i32 noundef %0, ptr noundef %1, ptr noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store ptr %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %24, %3
  %9 = load i32, ptr %7, align 4, !tbaa !5
  %10 = add nsw i32 %9, 3
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = icmp slt i32 %10, %11
  br i1 %12, label %13, label %27

13:                                               ; preds = %8
  %14 = load ptr, ptr %5, align 8, !tbaa !9
  %15 = load i32, ptr %7, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds float, ptr %14, i64 %16
  %18 = load ptr, ptr %6, align 8, !tbaa !9
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds float, ptr %18, i64 %20
  %22 = call noundef <4 x float> @_ZL12_mm_loadu_psPKf(ptr noundef %21)
  %23 = call noundef <4 x float> @_ZL11ggml_v_siluDv4_f(<4 x float> noundef %22)
  call void @_ZL13_mm_storeu_psPfDv4_f(ptr noundef %17, <4 x float> noundef %23)
  br label %24

24:                                               ; preds = %13
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = add nsw i32 %25, 4
  store i32 %26, ptr %7, align 4, !tbaa !5
  br label %8, !llvm.loop !11

27:                                               ; preds = %8
  br label %28

28:                                               ; preds = %43, %27
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = icmp slt i32 %29, %30
  br i1 %31, label %32, label %46

32:                                               ; preds = %28
  %33 = load ptr, ptr %6, align 8, !tbaa !9
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds float, ptr %33, i64 %35
  %37 = load float, ptr %36, align 4, !tbaa !13
  %38 = call noundef float @_ZL13ggml_silu_f32f(float noundef %37)
  %39 = load ptr, ptr %5, align 8, !tbaa !9
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds float, ptr %39, i64 %41
  store float %38, ptr %42, align 4, !tbaa !13
  br label %43

43:                                               ; preds = %32
  %44 = load i32, ptr %7, align 4, !tbaa !5
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %7, align 4, !tbaa !5
  br label %28, !llvm.loop !15

46:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden void @_ZL13_mm_storeu_psPfDv4_f(ptr noundef, <4 x float> noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef <4 x float> @_ZL11ggml_v_siluDv4_f(<4 x float> noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <4 x float> @_ZL12_mm_loadu_psPKf(ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef float @_ZL13ggml_silu_f32f(float noundef) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @ggml_vec_silu_f32(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
  %4 = icmp sgt i32 %0, 3
  br i1 %4, label %.lr.ph, label %.preheader

.preheader.loopexit:                              ; preds = %.lr.ph
  %5 = trunc nuw i64 %indvars.iv.next to i32
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %3
  %.0.lcssa = phi i32 [ 0, %3 ], [ %5, %.preheader.loopexit ]
  %6 = icmp slt i32 %.0.lcssa, %0
  br i1 %6, label %.lr.ph15.preheader, label %._crit_edge

.lr.ph15.preheader:                               ; preds = %.preheader
  %7 = zext i32 %.0.lcssa to i64
  br label %.lr.ph15

.lr.ph:                                           ; preds = %3, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %3 ]
  %8 = getelementptr inbounds float, ptr %1, i64 %indvars.iv
  %9 = getelementptr inbounds float, ptr %2, i64 %indvars.iv
  %10 = tail call noundef <4 x float> @_ZL12_mm_loadu_psPKf(ptr noundef %9)
  %11 = tail call noundef <4 x float> @_ZL11ggml_v_siluDv4_f(<4 x float> noundef %10)
  tail call void @_ZL13_mm_storeu_psPfDv4_f(ptr noundef %8, <4 x float> noundef %11)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
  %12 = trunc i64 %indvars.iv.next to i32
  %13 = or disjoint i32 %12, 3
  %14 = icmp slt i32 %13, %0
  br i1 %14, label %.lr.ph, label %.preheader.loopexit, !llvm.loop !5

.lr.ph15:                                         ; preds = %.lr.ph15.preheader, %.lr.ph15
  %indvars.iv17 = phi i64 [ %7, %.lr.ph15.preheader ], [ %indvars.iv.next18, %.lr.ph15 ]
  %15 = getelementptr inbounds float, ptr %2, i64 %indvars.iv17
  %16 = load float, ptr %15, align 4, !tbaa !7
  %17 = tail call noundef float @_ZL13ggml_silu_f32f(float noundef %16)
  %18 = getelementptr inbounds float, ptr %1, i64 %indvars.iv17
  store float %17, ptr %18, align 4, !tbaa !7
  %indvars.iv.next18 = add nuw nsw i64 %indvars.iv17, 1
  %19 = trunc nuw i64 %indvars.iv.next18 to i32
  %20 = icmp slt i32 %19, %0
  br i1 %20, label %.lr.ph15, label %._crit_edge, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph15, %.preheader
  ret void
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden void @_ZL13_mm_storeu_psPfDv4_f(ptr noundef, <4 x float> noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef <4 x float> @_ZL11ggml_v_siluDv4_f(<4 x float> noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <4 x float> @_ZL12_mm_loadu_psPKf(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef float @_ZL13ggml_silu_f32f(float noundef) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"float", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass