; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1583/main.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8
@n = external dso_local global i32, align 4
@m = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %6) #2
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %9) #2
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %188, label %13

13:                                               ; preds = %2
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %15) #2
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %18) #2
  store i32 1, ptr %19, align 4, !tbaa !5
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %21) #2
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %24) #2
  store i8 84, ptr %25, align 1, !tbaa !9
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = add nsw i32 %26, 1
  %28 = load i32, ptr @n, align 4, !tbaa !5
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %30, label %66

30:                                               ; preds = %13
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = add nsw i32 %31, 1
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %33) #2
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #2
  %38 = load i8, ptr %37, align 1, !tbaa !9
  %39 = sext i8 %38 to i32
  %40 = icmp eq i32 %39, 65
  br i1 %40, label %52, label %41

41:                                               ; preds = %30
  %42 = load i32, ptr %3, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %44) #2
  %46 = load i32, ptr %4, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %47) #2
  %49 = load i8, ptr %48, align 1, !tbaa !9
  %50 = sext i8 %49 to i32
  %51 = icmp eq i32 %50, 84
  br i1 %51, label %52, label %66

52:                                               ; preds = %41, %30
  %53 = load i32, ptr %3, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %55) #2
  %57 = load i32, ptr %4, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %58) #2
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %66, label %62

62:                                               ; preds = %52
  %63 = load i32, ptr %3, align 4, !tbaa !5
  %64 = add nsw i32 %63, 1
  %65 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %64, i32 noundef %65)
  br label %66

66:                                               ; preds = %62, %52, %41, %13
  %67 = load i32, ptr %3, align 4, !tbaa !5
  %68 = sub nsw i32 %67, 1
  %69 = icmp sge i32 %68, 0
  br i1 %69, label %70, label %106

70:                                               ; preds = %66
  %71 = load i32, ptr %3, align 4, !tbaa !5
  %72 = sub nsw i32 %71, 1
  %73 = sext i32 %72 to i64
  %74 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %73) #2
  %75 = load i32, ptr %4, align 4, !tbaa !5
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #2
  %78 = load i8, ptr %77, align 1, !tbaa !9
  %79 = sext i8 %78 to i32
  %80 = icmp eq i32 %79, 65
  br i1 %80, label %92, label %81

81:                                               ; preds = %70
  %82 = load i32, ptr %3, align 4, !tbaa !5
  %83 = sub nsw i32 %82, 1
  %84 = sext i32 %83 to i64
  %85 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %84) #2
  %86 = load i32, ptr %4, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %87) #2
  %89 = load i8, ptr %88, align 1, !tbaa !9
  %90 = sext i8 %89 to i32
  %91 = icmp eq i32 %90, 84
  br i1 %91, label %92, label %106

92:                                               ; preds = %81, %70
  %93 = load i32, ptr %3, align 4, !tbaa !5
  %94 = sub nsw i32 %93, 1
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %95) #2
  %97 = load i32, ptr %4, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %98) #2
  %100 = load i32, ptr %99, align 4, !tbaa !5
  %101 = icmp ne i32 %100, 0
  br i1 %101, label %106, label %102

102:                                              ; preds = %92
  %103 = load i32, ptr %3, align 4, !tbaa !5
  %104 = sub nsw i32 %103, 1
  %105 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %104, i32 noundef %105)
  br label %106

106:                                              ; preds = %102, %92, %81, %66
  %107 = load i32, ptr %4, align 4, !tbaa !5
  %108 = add nsw i32 %107, 1
  %109 = load i32, ptr @m, align 4, !tbaa !5
  %110 = icmp slt i32 %108, %109
  br i1 %110, label %111, label %147

111:                                              ; preds = %106
  %112 = load i32, ptr %3, align 4, !tbaa !5
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %113) #2
  %115 = load i32, ptr %4, align 4, !tbaa !5
  %116 = add nsw i32 %115, 1
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %114, i64 noundef %117) #2
  %119 = load i8, ptr %118, align 1, !tbaa !9
  %120 = sext i8 %119 to i32
  %121 = icmp eq i32 %120, 65
  br i1 %121, label %133, label %122

122:                                              ; preds = %111
  %123 = load i32, ptr %3, align 4, !tbaa !5
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %124) #2
  %126 = load i32, ptr %4, align 4, !tbaa !5
  %127 = add nsw i32 %126, 1
  %128 = sext i32 %127 to i64
  %129 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %125, i64 noundef %128) #2
  %130 = load i8, ptr %129, align 1, !tbaa !9
  %131 = sext i8 %130 to i32
  %132 = icmp eq i32 %131, 84
  br i1 %132, label %133, label %147

133:                                              ; preds = %122, %111
  %134 = load i32, ptr %3, align 4, !tbaa !5
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %135) #2
  %137 = load i32, ptr %4, align 4, !tbaa !5
  %138 = add nsw i32 %137, 1
  %139 = sext i32 %138 to i64
  %140 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %136, i64 noundef %139) #2
  %141 = load i32, ptr %140, align 4, !tbaa !5
  %142 = icmp ne i32 %141, 0
  br i1 %142, label %147, label %143

143:                                              ; preds = %133
  %144 = load i32, ptr %3, align 4, !tbaa !5
  %145 = load i32, ptr %4, align 4, !tbaa !5
  %146 = add nsw i32 %145, 1
  call void @_Z3dfsii(i32 noundef %144, i32 noundef %146)
  br label %147

147:                                              ; preds = %143, %133, %122, %106
  %148 = load i32, ptr %4, align 4, !tbaa !5
  %149 = sub nsw i32 %148, 1
  %150 = icmp sge i32 %149, 0
  br i1 %150, label %151, label %187

151:                                              ; preds = %147
  %152 = load i32, ptr %3, align 4, !tbaa !5
  %153 = sext i32 %152 to i64
  %154 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %153) #2
  %155 = load i32, ptr %4, align 4, !tbaa !5
  %156 = sub nsw i32 %155, 1
  %157 = sext i32 %156 to i64
  %158 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %154, i64 noundef %157) #2
  %159 = load i8, ptr %158, align 1, !tbaa !9
  %160 = sext i8 %159 to i32
  %161 = icmp eq i32 %160, 65
  br i1 %161, label %173, label %162

162:                                              ; preds = %151
  %163 = load i32, ptr %3, align 4, !tbaa !5
  %164 = sext i32 %163 to i64
  %165 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %164) #2
  %166 = load i32, ptr %4, align 4, !tbaa !5
  %167 = sub nsw i32 %166, 1
  %168 = sext i32 %167 to i64
  %169 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %165, i64 noundef %168) #2
  %170 = load i8, ptr %169, align 1, !tbaa !9
  %171 = sext i8 %170 to i32
  %172 = icmp eq i32 %171, 84
  br i1 %172, label %173, label %187

173:                                              ; preds = %162, %151
  %174 = load i32, ptr %3, align 4, !tbaa !5
  %175 = sext i32 %174 to i64
  %176 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %175) #2
  %177 = load i32, ptr %4, align 4, !tbaa !5
  %178 = sub nsw i32 %177, 1
  %179 = sext i32 %178 to i64
  %180 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %176, i64 noundef %179) #2
  %181 = load i32, ptr %180, align 4, !tbaa !5
  %182 = icmp ne i32 %181, 0
  br i1 %182, label %187, label %183

183:                                              ; preds = %173
  %184 = load i32, ptr %3, align 4, !tbaa !5
  %185 = load i32, ptr %4, align 4, !tbaa !5
  %186 = sub nsw i32 %185, 1
  call void @_Z3dfsii(i32 noundef %184, i32 noundef %186)
  br label %187

187:                                              ; preds = %183, %173, %162, %147
  br label %188

188:                                              ; preds = %187, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8
@n = external dso_local local_unnamed_addr global i32, align 4
@m = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = add nsw i32 %0, 1
  %5 = sext i32 %4 to i64
  %6 = add nsw i32 %0, -1
  %7 = icmp sgt i32 %0, 0
  %8 = zext nneg i32 %6 to i64
  %9 = sext i32 %1 to i64
  br label %tailrecurse

tailrecurse:                                      ; preds = %86, %2
  %indvars.iv = phi i64 [ %indvars.iv.next, %86 ], [ %9, %2 ]
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %indvars.iv) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %13, label %90

13:                                               ; preds = %tailrecurse
  %14 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %15 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %indvars.iv) #1
  store i32 1, ptr %15, align 4, !tbaa !5
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %17 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv) #1
  store i8 84, ptr %17, align 1, !tbaa !9
  %18 = load i32, ptr @n, align 4, !tbaa !5
  %19 = icmp slt i32 %4, %18
  br i1 %19, label %20, label %36

20:                                               ; preds = %13
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %5) #1
  %22 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv) #1
  %23 = load i8, ptr %22, align 1, !tbaa !9
  %24 = icmp eq i8 %23, 65
  br i1 %24, label %30, label %25

25:                                               ; preds = %20
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %5) #1
  %27 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %indvars.iv) #1
  %28 = load i8, ptr %27, align 1, !tbaa !9
  %29 = icmp eq i8 %28, 84
  br i1 %29, label %30, label %36

30:                                               ; preds = %25, %20
  %31 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %5) #1
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %indvars.iv) #1
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %.not45 = icmp eq i32 %33, 0
  br i1 %.not45, label %34, label %36

34:                                               ; preds = %30
  %35 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %4, i32 noundef %35)
  br label %36

36:                                               ; preds = %34, %30, %25, %13
  br i1 %7, label %37, label %53

37:                                               ; preds = %36
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %8) #1
  %39 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %indvars.iv) #1
  %40 = load i8, ptr %39, align 1, !tbaa !9
  %41 = icmp eq i8 %40, 65
  br i1 %41, label %47, label %42

42:                                               ; preds = %37
  %43 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %8) #1
  %44 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %indvars.iv) #1
  %45 = load i8, ptr %44, align 1, !tbaa !9
  %46 = icmp eq i8 %45, 84
  br i1 %46, label %47, label %53

47:                                               ; preds = %42, %37
  %48 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %8) #1
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %indvars.iv) #1
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %.not46 = icmp eq i32 %50, 0
  br i1 %.not46, label %51, label %53

51:                                               ; preds = %47
  %52 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %6, i32 noundef %52)
  br label %53

53:                                               ; preds = %51, %47, %42, %36
  %54 = add nsw i64 %indvars.iv, 1
  %55 = load i32, ptr @m, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = icmp slt i64 %54, %56
  br i1 %57, label %58, label %74

58:                                               ; preds = %53
  %59 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %60 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %54) #1
  %61 = load i8, ptr %60, align 1, !tbaa !9
  %62 = icmp eq i8 %61, 65
  br i1 %62, label %68, label %63

63:                                               ; preds = %58
  %64 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %65 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %54) #1
  %66 = load i8, ptr %65, align 1, !tbaa !9
  %67 = icmp eq i8 %66, 84
  br i1 %67, label %68, label %74

68:                                               ; preds = %63, %58
  %69 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %70 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %54) #1
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %.not47 = icmp eq i32 %71, 0
  br i1 %.not47, label %72, label %74

72:                                               ; preds = %68
  %73 = trunc nsw i64 %54 to i32
  tail call void @_Z3dfsii(i32 noundef %0, i32 noundef %73)
  br label %74

74:                                               ; preds = %72, %68, %63, %53
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %75 = icmp sgt i64 %indvars.iv, 0
  br i1 %75, label %76, label %90

76:                                               ; preds = %74
  %77 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %78 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %indvars.iv.next) #1
  %79 = load i8, ptr %78, align 1, !tbaa !9
  %80 = icmp eq i8 %79, 65
  br i1 %80, label %86, label %81

81:                                               ; preds = %76
  %82 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %83 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %82, i64 noundef %indvars.iv.next) #1
  %84 = load i8, ptr %83, align 1, !tbaa !9
  %85 = icmp eq i8 %84, 84
  br i1 %85, label %86, label %90

86:                                               ; preds = %81, %76
  %87 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %88 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %indvars.iv.next) #1
  %89 = load i32, ptr %88, align 4, !tbaa !5
  %.not48 = icmp eq i32 %89, 0
  br i1 %.not48, label %tailrecurse, label %90

90:                                               ; preds = %74, %81, %86, %tailrecurse
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,LICMPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass