; LLVM IR from vss2sn/cvrp :: src/genetic_algorithm.ll (ZN10GASolution15MutateIterRightEii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.GASolution = type <{ %class.Solution, i32, i32, i64, %"class.std::vector.10", i64, %"class.std::vector.15", %"class.std::vector.15", i32, [4 x i8] }>
%class.Solution = type { ptr, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %struct.Node, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl" }
%"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl" = type { %"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Vehicle, std::allocator<Vehicle>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.Node = type <{ i32, i32, i32, i32, i8, [3 x i8] }>
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN10GASolution15MutateIterRightEii(ptr noundef nonnull align 8 dereferenceable(204) %0, i32 noundef %1, i32 noundef %2) #1 align 2 {
  %4 = alloca i1, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  %15 = load ptr, ptr %5, align 8
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = sext i32 %16 to i64
  %18 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 5
  %19 = load i64, ptr %18, align 8, !tbaa !11
  %20 = icmp eq i64 %17, %19
  br i1 %20, label %24, label %21

21:                                               ; preds = %3
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %24, label %25

24:                                               ; preds = %21, %3
  store i1 false, ptr %4, align 1
  br label %194

25:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %26 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %26, ptr %8, align 4, !tbaa !9
  %27 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %27, i64 noundef %29) #2
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %32) #2
  %34 = load i32, ptr %33, align 4, !tbaa !9
  %35 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %36 = load i32, ptr %8, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %37) #2
  %39 = load i32, ptr %7, align 4, !tbaa !9
  %40 = sub nsw i32 %39, 1
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %41) #2
  %43 = load i32, ptr %42, align 4, !tbaa !9
  %44 = icmp slt i32 %34, %43
  br i1 %44, label %45, label %55

45:                                               ; preds = %25
  %46 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %47 = load i32, ptr %8, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %48) #2
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #2
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %52, align 4, !tbaa !9
  br label %55

55:                                               ; preds = %45, %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %56 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %56, ptr %9, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %120, %55
  %58 = load i32, ptr %9, align 4, !tbaa !9
  %59 = icmp sgt i32 %58, 1
  br i1 %59, label %61, label %60

60:                                               ; preds = %57
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %123

61:                                               ; preds = %57
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %62 = getelementptr inbounds %class.Solution, ptr %15, i32 0, i32 5
  %63 = load i32, ptr %62, align 4, !tbaa !37
  store i32 %63, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %64 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %65 = load i32, ptr %8, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %66) #2
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #2
  %71 = load i32, ptr %70, align 4, !tbaa !9
  %72 = sub nsw i32 %71, 1
  store i32 %72, ptr %11, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %85, %61
  %74 = load i32, ptr %11, align 4, !tbaa !9
  %75 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %76 = load i32, ptr %8, align 4, !tbaa !9
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %77) #2
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = sub nsw i32 %79, 1
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %81) #2
  %83 = load i32, ptr %82, align 4, !tbaa !9
  %84 = icmp sge i32 %74, %83
  br i1 %84, label %85, label %103

85:                                               ; preds = %73
  %86 = getelementptr inbounds %class.Solution, ptr %15, i32 0, i32 1
  %87 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 6
  %88 = load i32, ptr %8, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %89) #2
  %91 = load i32, ptr %11, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %92) #2
  %94 = load i32, ptr %93, align 4, !tbaa !9
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %95) #2
  %97 = getelementptr inbounds %struct.Node, ptr %96, i32 0, i32 3
  %98 = load i32, ptr %97, align 4, !tbaa !38
  %99 = load i32, ptr %10, align 4, !tbaa !9
  %100 = sub nsw i32 %99, %98
  store i32 %100, ptr %10, align 4, !tbaa !9
  %101 = load i32, ptr %11, align 4, !tbaa !9
  %102 = add nsw i32 %101, -1
  store i32 %102, ptr %11, align 4, !tbaa !9
  br label %73, !llvm.loop !39

103:                                              ; preds = %73
  %104 = load i32, ptr %10, align 4, !tbaa !9
  %105 = icmp slt i32 %104, 0
  br i1 %105, label %106, label %119

106:                                              ; preds = %103
  %107 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %108 = load i32, ptr %8, align 4, !tbaa !9
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %109) #2
  %111 = load i32, ptr %9, align 4, !tbaa !9
  %112 = sub nsw i32 %111, 1
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %113) #2
  %115 = load i32, ptr %114, align 4, !tbaa !9
  %116 = add nsw i32 %115, 1
  store i32 %116, ptr %114, align 4, !tbaa !9
  %117 = load i32, ptr %9, align 4, !tbaa !9
  %118 = add nsw i32 %117, 1
  store i32 %118, ptr %9, align 4, !tbaa !9
  br label %119

119:                                              ; preds = %106, %103
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %120

120:                                              ; preds = %119
  %121 = load i32, ptr %9, align 4, !tbaa !9
  %122 = add nsw i32 %121, -1
  store i32 %122, ptr %9, align 4, !tbaa !9
  br label %57, !llvm.loop !41

123:                                              ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %124

124:                                              ; preds = %190, %123
  %125 = load i32, ptr %12, align 4, !tbaa !9
  %126 = sext i32 %125 to i64
  %127 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 5
  %128 = load i64, ptr %127, align 8, !tbaa !11
  %129 = sub i64 %128, 1
  %130 = icmp ult i64 %126, %129
  br i1 %130, label %132, label %131

131:                                              ; preds = %124
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %193

132:                                              ; preds = %124
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %133 = getelementptr inbounds %class.Solution, ptr %15, i32 0, i32 5
  %134 = load i32, ptr %133, align 4, !tbaa !37
  store i32 %134, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %135 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %136 = load i32, ptr %8, align 4, !tbaa !9
  %137 = sext i32 %136 to i64
  %138 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %135, i64 noundef %137) #2
  %139 = load i32, ptr %12, align 4, !tbaa !9
  %140 = sext i32 %139 to i64
  %141 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef %140) #2
  %142 = load i32, ptr %141, align 4, !tbaa !9
  store i32 %142, ptr %14, align 4, !tbaa !9
  br label %143

143:                                              ; preds = %155, %132
  %144 = load i32, ptr %14, align 4, !tbaa !9
  %145 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %146 = load i32, ptr %8, align 4, !tbaa !9
  %147 = sext i32 %146 to i64
  %148 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %145, i64 noundef %147) #2
  %149 = load i32, ptr %12, align 4, !tbaa !9
  %150 = add nsw i32 %149, 1
  %151 = sext i32 %150 to i64
  %152 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %148, i64 noundef %151) #2
  %153 = load i32, ptr %152, align 4, !tbaa !9
  %154 = icmp slt i32 %144, %153
  br i1 %154, label %155, label %173

155:                                              ; preds = %143
  %156 = getelementptr inbounds %class.Solution, ptr %15, i32 0, i32 1
  %157 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 6
  %158 = load i32, ptr %8, align 4, !tbaa !9
  %159 = sext i32 %158 to i64
  %160 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %157, i64 noundef %159) #2
  %161 = load i32, ptr %14, align 4, !tbaa !9
  %162 = sext i32 %161 to i64
  %163 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %160, i64 noundef %162) #2
  %164 = load i32, ptr %163, align 4, !tbaa !9
  %165 = sext i32 %164 to i64
  %166 = call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %156, i64 noundef %165) #2
  %167 = getelementptr inbounds %struct.Node, ptr %166, i32 0, i32 3
  %168 = load i32, ptr %167, align 4, !tbaa !38
  %169 = load i32, ptr %13, align 4, !tbaa !9
  %170 = sub nsw i32 %169, %168
  store i32 %170, ptr %13, align 4, !tbaa !9
  %171 = load i32, ptr %14, align 4, !tbaa !9
  %172 = add nsw i32 %171, 1
  store i32 %172, ptr %14, align 4, !tbaa !9
  br label %143, !llvm.loop !42

173:                                              ; preds = %143
  %174 = load i32, ptr %13, align 4, !tbaa !9
  %175 = icmp slt i32 %174, 0
  br i1 %175, label %176, label %189

176:                                              ; preds = %173
  %177 = getelementptr inbounds %class.GASolution, ptr %15, i32 0, i32 7
  %178 = load i32, ptr %8, align 4, !tbaa !9
  %179 = sext i32 %178 to i64
  %180 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %177, i64 noundef %179) #2
  %181 = load i32, ptr %12, align 4, !tbaa !9
  %182 = add nsw i32 %181, 1
  %183 = sext i32 %182 to i64
  %184 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %180, i64 noundef %183) #2
  %185 = load i32, ptr %184, align 4, !tbaa !9
  %186 = add nsw i32 %185, -1
  store i32 %186, ptr %184, align 4, !tbaa !9
  %187 = load i32, ptr %12, align 4, !tbaa !9
  %188 = add nsw i32 %187, -1
  store i32 %188, ptr %12, align 4, !tbaa !9
  br label %189

189:                                              ; preds = %176, %173
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %190

190:                                              ; preds = %189
  %191 = load i32, ptr %12, align 4, !tbaa !9
  %192 = add nsw i32 %191, 1
  store i32 %192, ptr %12, align 4, !tbaa !9
  br label %124, !llvm.loop !43

193:                                              ; preds = %131
  store i1 true, ptr %4, align 1
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %194

194:                                              ; preds = %193, %24
  %195 = load i1, ptr %4, align 1
  ret i1 %195
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !28, i64 144}
!12 = !{!"_ZTS10GASolution", !13, i64 0, !10, i64 104, !10, i64 108, !28, i64 112, !29, i64 120, !28, i64 144, !33, i64 152, !33, i64 176, !10, i64 200}
!13 = !{!"_ZTS8Solution", !14, i64 8, !18, i64 32, !22, i64 56, !26, i64 80, !10, i64 100}
!14 = !{!"_ZTSSt6vectorI4NodeSaIS0_EE", !15, i64 0}
!15 = !{!"_ZTSSt12_Vector_baseI4NodeSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE12_Vector_implE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSSt6vectorI7VehicleSaIS0_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseI7VehicleSaIS0_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!22 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!26 = !{!"_ZTS4Node", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !27, i64 16}
!27 = !{!"bool", !7, i64 0}
!28 = !{!"long", !7, i64 0}
!29 = !{!"_ZTSSt6vectorIdSaIdEE", !30, i64 0}
!30 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !31, i64 0}
!31 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !32, i64 0}
!32 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!33 = !{!"_ZTSSt6vectorIS_IiSaIiEESaIS1_EE", !34, i64 0}
!34 = !{!"_ZTSSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE", !35, i64 0}
!35 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE12_Vector_implE", !36, i64 0}
!36 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!37 = !{!13, !10, i64 100}
!38 = !{!26, !10, i64 12}
!39 = distinct !{!39, !40}
!40 = !{!"llvm.loop.mustprogress"}
!41 = distinct !{!41, !40}
!42 = distinct !{!42, !40}
!43 = distinct !{!43, !40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN10GASolution15MutateIterRightEii(ptr noundef nonnull align 8 dereferenceable(204) %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = sext i32 %2 to i64
  %5 = getelementptr inbounds i8, ptr %0, i64 144
  %6 = load i64, ptr %5, align 8, !tbaa !5
  %7 = icmp ne i64 %6, %4
  %8 = icmp ne i32 %2, 0
  %or.cond.not = and i1 %8, %7
  br i1 %or.cond.not, label %9, label %.loopexit

9:                                                ; preds = %3
  %10 = getelementptr inbounds i8, ptr %0, i64 176
  %11 = sext i32 %1 to i64
  %12 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %4) #1
  %14 = load i32, ptr %13, align 4, !tbaa !35
  %15 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %16 = add nsw i32 %2, -1
  %17 = sext i32 %16 to i64
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %17) #1
  %19 = load i32, ptr %18, align 4, !tbaa !35
  %20 = icmp slt i32 %14, %19
  br i1 %20, label %21, label %26

21:                                               ; preds = %9
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %4) #1
  %24 = load i32, ptr %23, align 4, !tbaa !35
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %23, align 4, !tbaa !35
  br label %26

26:                                               ; preds = %21, %9
  %27 = icmp sgt i32 %2, 1
  br i1 %27, label %.lr.ph60, label %.preheader

.lr.ph60:                                         ; preds = %26
  %28 = getelementptr inbounds i8, ptr %0, i64 100
  %29 = getelementptr inbounds i8, ptr %0, i64 8
  %30 = getelementptr inbounds i8, ptr %0, i64 152
  br label %35

.preheader:                                       ; preds = %66, %26
  %31 = load i64, ptr %5, align 8, !tbaa !5
  %.not = icmp eq i64 %31, 1
  br i1 %.not, label %.loopexit, label %.lr.ph69

.lr.ph69:                                         ; preds = %.preheader
  %32 = getelementptr inbounds i8, ptr %0, i64 100
  %33 = getelementptr inbounds i8, ptr %0, i64 8
  %34 = getelementptr inbounds i8, ptr %0, i64 152
  br label %68

35:                                               ; preds = %.lr.ph60, %66
  %.04658 = phi i32 [ %2, %.lr.ph60 ], [ %.pre-phi, %66 ]
  %36 = load i32, ptr %28, align 4, !tbaa !36
  %37 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %38 = zext nneg i32 %.04658 to i64
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %38) #1
  %40 = load i32, ptr %39, align 4, !tbaa !35
  %41 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %42 = add nsw i32 %.04658, -1
  %43 = zext nneg i32 %42 to i64
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43) #1
  %45 = load i32, ptr %44, align 4, !tbaa !35
  %.not.not54 = icmp sgt i32 %40, %45
  br i1 %.not.not54, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %35
  %46 = sext i32 %40 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %46, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.04555 = phi i32 [ %36, %.lr.ph.preheader ], [ %54, %.lr.ph ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %47 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %11) #1
  %48 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %indvars.iv.next) #1
  %49 = load i32, ptr %48, align 4, !tbaa !35
  %50 = sext i32 %49 to i64
  %51 = tail call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %50) #1
  %52 = getelementptr inbounds i8, ptr %51, i64 12
  %53 = load i32, ptr %52, align 4, !tbaa !37
  %54 = sub nsw i32 %.04555, %53
  %55 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %56 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %43) #1
  %57 = load i32, ptr %56, align 4, !tbaa !35
  %58 = sext i32 %57 to i64
  %.not.not = icmp sgt i64 %indvars.iv.next, %58
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !38

._crit_edge:                                      ; preds = %.lr.ph, %35
  %.045.lcssa = phi i32 [ %36, %35 ], [ %54, %.lr.ph ]
  %59 = icmp slt i32 %.045.lcssa, 0
  br i1 %59, label %60, label %66

60:                                               ; preds = %._crit_edge
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %62 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %43) #1
  %63 = load i32, ptr %62, align 4, !tbaa !35
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %62, align 4, !tbaa !35
  %65 = add nuw nsw i32 %.04658, 1
  br label %66

66:                                               ; preds = %60, %._crit_edge
  %.pre-phi = phi i32 [ %.04658, %60 ], [ %42, %._crit_edge ]
  %.147 = phi i32 [ %65, %60 ], [ %.04658, %._crit_edge ]
  %67 = icmp sgt i32 %.147, 2
  br i1 %67, label %35, label %.preheader, !llvm.loop !40

68:                                               ; preds = %.lr.ph69, %100
  %69 = phi i64 [ 0, %.lr.ph69 ], [ %.pre-phi78, %100 ]
  %.04368 = phi i32 [ 0, %.lr.ph69 ], [ %.pre-phi76, %100 ]
  %70 = load i32, ptr %32, align 4, !tbaa !36
  %71 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %72 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %69) #1
  %73 = load i32, ptr %72, align 4, !tbaa !35
  %74 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %75 = add nsw i32 %.04368, 1
  %76 = sext i32 %75 to i64
  %77 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #1
  %78 = load i32, ptr %77, align 4, !tbaa !35
  %79 = icmp slt i32 %73, %78
  br i1 %79, label %.lr.ph64.preheader, label %._crit_edge65

.lr.ph64.preheader:                               ; preds = %68
  %80 = sext i32 %73 to i64
  br label %.lr.ph64

.lr.ph64:                                         ; preds = %.lr.ph64.preheader, %.lr.ph64
  %indvars.iv72 = phi i64 [ %80, %.lr.ph64.preheader ], [ %indvars.iv.next73, %.lr.ph64 ]
  %.04261 = phi i32 [ %70, %.lr.ph64.preheader ], [ %88, %.lr.ph64 ]
  %81 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %11) #1
  %82 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %indvars.iv72) #1
  %83 = load i32, ptr %82, align 4, !tbaa !35
  %84 = sext i32 %83 to i64
  %85 = tail call noundef nonnull align 4 dereferenceable(17) ptr @_ZNSt6vectorI4NodeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %84) #1
  %86 = getelementptr inbounds i8, ptr %85, i64 12
  %87 = load i32, ptr %86, align 4, !tbaa !37
  %88 = sub nsw i32 %.04261, %87
  %indvars.iv.next73 = add nsw i64 %indvars.iv72, 1
  %89 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %90 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %76) #1
  %91 = load i32, ptr %90, align 4, !tbaa !35
  %92 = sext i32 %91 to i64
  %93 = icmp slt i64 %indvars.iv.next73, %92
  br i1 %93, label %.lr.ph64, label %._crit_edge65, !llvm.loop !41

._crit_edge65:                                    ; preds = %.lr.ph64, %68
  %.042.lcssa = phi i32 [ %70, %68 ], [ %88, %.lr.ph64 ]
  %94 = icmp slt i32 %.042.lcssa, 0
  br i1 %94, label %95, label %100

95:                                               ; preds = %._crit_edge65
  %96 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %11) #1
  %97 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %76) #1
  %98 = load i32, ptr %97, align 4, !tbaa !35
  %99 = add nsw i32 %98, -1
  store i32 %99, ptr %97, align 4, !tbaa !35
  %.pre77 = sext i32 %.04368 to i64
  br label %100

100:                                              ; preds = %95, %._crit_edge65
  %.pre-phi78 = phi i64 [ %.pre77, %95 ], [ %76, %._crit_edge65 ]
  %.pre-phi76 = phi i32 [ %.04368, %95 ], [ %75, %._crit_edge65 ]
  %101 = load i64, ptr %5, align 8, !tbaa !5
  %102 = add i64 %101, -1
  %103 = icmp ugt i64 %102, %.pre-phi78
  br i1 %103, label %68, label %.loopexit, !llvm.loop !42

.loopexit:                                        ; preds = %100, %.preheader, %3
  ret i1 %or.cond.not
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !26, i64 144}
!6 = !{!"_ZTS10GASolution", !7, i64 0, !24, i64 104, !24, i64 108, !26, i64 112, !27, i64 120, !26, i64 144, !31, i64 152, !31, i64 176, !24, i64 200}
!7 = !{!"_ZTS8Solution", !8, i64 8, !15, i64 32, !19, i64 56, !23, i64 80, !24, i64 100}
!8 = !{!"_ZTSSt6vectorI4NodeSaIS0_EE", !9, i64 0}
!9 = !{!"_ZTSSt12_Vector_baseI4NodeSaIS0_EE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE12_Vector_implE", !11, i64 0}
!11 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !13, i64 0}
!13 = !{!"omnipotent char", !14, i64 0}
!14 = !{!"Simple C++ TBAA"}
!15 = !{!"_ZTSSt6vectorI7VehicleSaIS0_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseI7VehicleSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseI7VehicleSaIS0_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!19 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!23 = !{!"_ZTS4Node", !24, i64 0, !24, i64 4, !24, i64 8, !24, i64 12, !25, i64 16}
!24 = !{!"int", !13, i64 0}
!25 = !{!"bool", !13, i64 0}
!26 = !{!"long", !13, i64 0}
!27 = !{!"_ZTSSt6vectorIdSaIdEE", !28, i64 0}
!28 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !29, i64 0}
!29 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !30, i64 0}
!30 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!31 = !{!"_ZTSSt6vectorIS_IiSaIiEESaIS1_EE", !32, i64 0}
!32 = !{!"_ZTSSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE", !33, i64 0}
!33 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE12_Vector_implE", !34, i64 0}
!34 = !{!"_ZTSNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!35 = !{!24, !24, i64 0}
!36 = !{!7, !24, i64 100}
!37 = !{!23, !24, i64 12}
!38 = distinct !{!38, !39}
!39 = !{!"llvm.loop.mustprogress"}
!40 = distinct !{!40, !39}
!41 = distinct !{!41, !39}
!42 = distinct !{!42, !39}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass