; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/TocaDoSaci - CODCAD/main.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector", align 8
@cont = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = icmp sge i32 %5, 0
  br i1 %6, label %7, label %161

7:                                                ; preds = %2
  %8 = load i32, ptr %3, align 4, !tbaa !5
  %9 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %10 = trunc i64 %9 to i32
  %11 = icmp slt i32 %8, %10
  br i1 %11, label %12, label %161

12:                                               ; preds = %7
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = icmp sge i32 %13, 0
  br i1 %14, label %15, label %161

15:                                               ; preds = %12
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %18) #2
  %20 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %19) #2
  %21 = trunc i64 %20 to i32
  %22 = icmp slt i32 %16, %21
  br i1 %22, label %23, label %161

23:                                               ; preds = %15
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %25) #2
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #2
  store i32 1, ptr %29, align 4, !tbaa !5
  %30 = load i32, ptr @cont, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  store i32 %31, ptr @cont, align 4, !tbaa !5
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %33) #2
  %35 = load i32, ptr %4, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %36) #2
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = icmp ne i32 %38, 2
  br i1 %39, label %40, label %160

40:                                               ; preds = %23
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  %43 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %44 = trunc i64 %43 to i32
  %45 = icmp slt i32 %42, %44
  br i1 %45, label %46, label %70

46:                                               ; preds = %40
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %49) #2
  %51 = load i32, ptr %4, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %52) #2
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = icmp eq i32 %54, 1
  br i1 %55, label %56, label %70

56:                                               ; preds = %46
  %57 = load i32, ptr %3, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %59) #2
  %61 = load i32, ptr %4, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #2
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %70, label %66

66:                                               ; preds = %56
  %67 = load i32, ptr %3, align 4, !tbaa !5
  %68 = add nsw i32 %67, 1
  %69 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %68, i32 noundef %69)
  br label %70

70:                                               ; preds = %66, %56, %46, %40
  %71 = load i32, ptr %3, align 4, !tbaa !5
  %72 = sub nsw i32 %71, 1
  %73 = icmp sge i32 %72, 0
  br i1 %73, label %74, label %98

74:                                               ; preds = %70
  %75 = load i32, ptr %3, align 4, !tbaa !5
  %76 = sub nsw i32 %75, 1
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %77) #2
  %79 = load i32, ptr %4, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %80) #2
  %82 = load i32, ptr %81, align 4, !tbaa !5
  %83 = icmp eq i32 %82, 1
  br i1 %83, label %84, label %98

84:                                               ; preds = %74
  %85 = load i32, ptr %3, align 4, !tbaa !5
  %86 = sub nsw i32 %85, 1
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %87) #2
  %89 = load i32, ptr %4, align 4, !tbaa !5
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %90) #2
  %92 = load i32, ptr %91, align 4, !tbaa !5
  %93 = icmp ne i32 %92, 0
  br i1 %93, label %98, label %94

94:                                               ; preds = %84
  %95 = load i32, ptr %3, align 4, !tbaa !5
  %96 = sub nsw i32 %95, 1
  %97 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %96, i32 noundef %97)
  br label %98

98:                                               ; preds = %94, %84, %74, %70
  %99 = load i32, ptr %4, align 4, !tbaa !5
  %100 = add nsw i32 %99, 1
  %101 = load i32, ptr %3, align 4, !tbaa !5
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %102) #2
  %104 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %103) #2
  %105 = trunc i64 %104 to i32
  %106 = icmp slt i32 %100, %105
  br i1 %106, label %107, label %131

107:                                              ; preds = %98
  %108 = load i32, ptr %3, align 4, !tbaa !5
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %109) #2
  %111 = load i32, ptr %4, align 4, !tbaa !5
  %112 = add nsw i32 %111, 1
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %113) #2
  %115 = load i32, ptr %114, align 4, !tbaa !5
  %116 = icmp eq i32 %115, 1
  br i1 %116, label %117, label %131

117:                                              ; preds = %107
  %118 = load i32, ptr %3, align 4, !tbaa !5
  %119 = sext i32 %118 to i64
  %120 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %119) #2
  %121 = load i32, ptr %4, align 4, !tbaa !5
  %122 = add nsw i32 %121, 1
  %123 = sext i32 %122 to i64
  %124 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %120, i64 noundef %123) #2
  %125 = load i32, ptr %124, align 4, !tbaa !5
  %126 = icmp ne i32 %125, 0
  br i1 %126, label %131, label %127

127:                                              ; preds = %117
  %128 = load i32, ptr %3, align 4, !tbaa !5
  %129 = load i32, ptr %4, align 4, !tbaa !5
  %130 = add nsw i32 %129, 1
  call void @_Z3dfsii(i32 noundef %128, i32 noundef %130)
  br label %131

131:                                              ; preds = %127, %117, %107, %98
  %132 = load i32, ptr %4, align 4, !tbaa !5
  %133 = sub nsw i32 %132, 1
  %134 = icmp sge i32 %133, 0
  br i1 %134, label %135, label %159

135:                                              ; preds = %131
  %136 = load i32, ptr %3, align 4, !tbaa !5
  %137 = sext i32 %136 to i64
  %138 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %137) #2
  %139 = load i32, ptr %4, align 4, !tbaa !5
  %140 = sub nsw i32 %139, 1
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef %141) #2
  %143 = load i32, ptr %142, align 4, !tbaa !5
  %144 = icmp eq i32 %143, 1
  br i1 %144, label %145, label %159

145:                                              ; preds = %135
  %146 = load i32, ptr %3, align 4, !tbaa !5
  %147 = sext i32 %146 to i64
  %148 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %147) #2
  %149 = load i32, ptr %4, align 4, !tbaa !5
  %150 = sub nsw i32 %149, 1
  %151 = sext i32 %150 to i64
  %152 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %148, i64 noundef %151) #2
  %153 = load i32, ptr %152, align 4, !tbaa !5
  %154 = icmp ne i32 %153, 0
  br i1 %154, label %159, label %155

155:                                              ; preds = %145
  %156 = load i32, ptr %3, align 4, !tbaa !5
  %157 = load i32, ptr %4, align 4, !tbaa !5
  %158 = sub nsw i32 %157, 1
  call void @_Z3dfsii(i32 noundef %156, i32 noundef %158)
  br label %159

159:                                              ; preds = %155, %145, %135, %131
  br label %160

160:                                              ; preds = %159, %23
  br label %161

161:                                              ; preds = %160, %15, %12, %7, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector", align 8
@cont = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = zext nneg i32 %0 to i64
  %4 = icmp sgt i32 %0, -1
  %5 = add nuw nsw i32 %0, 1
  %6 = zext nneg i32 %5 to i64
  %7 = add nsw i32 %0, -1
  %.not45 = icmp eq i32 %0, 0
  %8 = zext nneg i32 %7 to i64
  br i1 %4, label %tailrecurse.preheader, label %.split51

tailrecurse.preheader:                            ; preds = %2
  %9 = zext i32 %1 to i64
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.preheader, %77
  %indvars.iv = phi i64 [ %9, %tailrecurse.preheader ], [ %71, %77 ]
  %10 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %11 = trunc i64 %10 to i32
  %12 = icmp sgt i32 %11, %0
  %13 = trunc nuw i64 %indvars.iv to i32
  %14 = icmp sgt i32 %13, -1
  %or.cond = and i1 %14, %12
  br i1 %or.cond, label %15, label %.split51

15:                                               ; preds = %tailrecurse
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %17 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #1
  %18 = trunc i64 %17 to i32
  %19 = icmp slt i32 %13, %18
  br i1 %19, label %20, label %.split51

20:                                               ; preds = %15
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #1
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv) #1
  store i32 1, ptr %22, align 4, !tbaa !5
  %23 = load i32, ptr @cont, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr @cont, align 4, !tbaa !5
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %indvars.iv) #1
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %.not = icmp eq i32 %27, 2
  br i1 %.not, label %.split51, label %28

28:                                               ; preds = %20
  %29 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %30 = trunc i64 %29 to i32
  %31 = icmp slt i32 %5, %30
  br i1 %31, label %32, label %42

32:                                               ; preds = %28
  %33 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %6) #1
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %indvars.iv) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp eq i32 %35, 1
  br i1 %36, label %37, label %42

37:                                               ; preds = %32
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %6) #1
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %indvars.iv) #1
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %.not44 = icmp eq i32 %40, 0
  br i1 %.not44, label %41, label %42

41:                                               ; preds = %37
  tail call void @_Z3dfsii(i32 noundef %5, i32 noundef %13)
  br label %42

42:                                               ; preds = %41, %37, %32, %28
  br i1 %.not45, label %53, label %43

43:                                               ; preds = %42
  %44 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %8) #1
  %45 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %indvars.iv) #1
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = icmp eq i32 %46, 1
  br i1 %47, label %48, label %53

48:                                               ; preds = %43
  %49 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %8) #1
  %50 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %indvars.iv) #1
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %.not46 = icmp eq i32 %51, 0
  br i1 %.not46, label %52, label %53

52:                                               ; preds = %48
  tail call void @_Z3dfsii(i32 noundef %7, i32 noundef %13)
  br label %53

53:                                               ; preds = %52, %48, %43, %42
  %54 = add nuw nsw i64 %indvars.iv, 1
  %55 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %56 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %55) #1
  %57 = trunc i64 %56 to i32
  %58 = trunc nuw i64 %54 to i32
  %59 = icmp slt i32 %58, %57
  br i1 %59, label %60, label %70

60:                                               ; preds = %53
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %62 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %54) #1
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = icmp eq i32 %63, 1
  br i1 %64, label %65, label %70

65:                                               ; preds = %60
  %66 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #1
  %67 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %54) #1
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %.not47 = icmp eq i32 %68, 0
  br i1 %.not47, label %69, label %70

69:                                               ; preds = %65
  tail call void @_Z3dfsii(i32 noundef %0, i32 noundef %58)
  br label %70

70:                                               ; preds = %69, %65, %60, %53
  %71 = add nsw i64 %indvars.iv, -1
  %.not49 = icmp eq i64 %indvars.iv, 0
  br i1 %.not49, label %.split51, label %72

72:                                               ; preds = %70
  %73 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %74 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %71) #1
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = icmp eq i32 %75, 1
  br i1 %76, label %77, label %.split51

77:                                               ; preds = %72
  %78 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %3) #1
  %79 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %71) #1
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %.not48 = icmp eq i32 %80, 0
  br i1 %.not48, label %tailrecurse, label %.split51

.split51:                                         ; preds = %tailrecurse, %15, %70, %72, %77, %20, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass