; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1112/main.ll (Z5queryii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@fk = external dso_local global %"class.std::vector", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %9 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %9, ptr %6, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %38, %2
  %11 = load i32, ptr %6, align 4, !tbaa !5
  %12 = icmp sgt i32 %11, 0
  br i1 %12, label %14, label %13

13:                                               ; preds = %10
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %45

14:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %15 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %15, ptr %8, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %30, %14
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = icmp sgt i32 %17, 0
  br i1 %18, label %20, label %19

19:                                               ; preds = %16
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %37

20:                                               ; preds = %16
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fk, i64 noundef %22) #2
  %24 = load i32, ptr %8, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = add nsw i32 %28, %27
  store i32 %29, ptr %5, align 4, !tbaa !5
  br label %30

30:                                               ; preds = %20
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = sub nsw i32 0, %32
  %34 = and i32 %31, %33
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = sub nsw i32 %35, %34
  store i32 %36, ptr %8, align 4, !tbaa !5
  br label %16, !llvm.loop !9

37:                                               ; preds = %19
  br label %38

38:                                               ; preds = %37
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = load i32, ptr %6, align 4, !tbaa !5
  %41 = sub nsw i32 0, %40
  %42 = and i32 %39, %41
  %43 = load i32, ptr %6, align 4, !tbaa !5
  %44 = sub nsw i32 %43, %42
  store i32 %44, ptr %6, align 4, !tbaa !5
  br label %10, !llvm.loop !11

45:                                               ; preds = %13
  %46 = load i32, ptr %5, align 4, !tbaa !5
  store i32 1, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %46
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@fk = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %0, 0
  %4 = icmp sgt i32 %1, 0
  %or.cond = and i1 %3, %4
  br i1 %or.cond, label %.preheader.us, label %._crit_edge21

.preheader.us:                                    ; preds = %2, %._crit_edge.us
  %.01420.us = phi i32 [ %14, %._crit_edge.us ], [ %0, %2 ]
  %.01519.us = phi i32 [ %11, %._crit_edge.us ], [ 0, %2 ]
  %5 = zext nneg i32 %.01420.us to i64
  br label %6

6:                                                ; preds = %.preheader.us, %6
  %.018.us = phi i32 [ %1, %.preheader.us ], [ %12, %6 ]
  %.117.us = phi i32 [ %.01519.us, %.preheader.us ], [ %11, %6 ]
  %7 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fk, i64 noundef %5) #1
  %8 = zext nneg i32 %.018.us to i64
  %9 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %8) #1
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = add nsw i32 %10, %.117.us
  %.not16.us = add nsw i32 %.018.us, -1
  %12 = and i32 %.not16.us, %.018.us
  %13 = icmp sgt i32 %12, 0
  br i1 %13, label %6, label %._crit_edge.us, !llvm.loop !9

._crit_edge.us:                                   ; preds = %6
  %.not.us = add nsw i32 %.01420.us, -1
  %14 = and i32 %.not.us, %.01420.us
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.preheader.us, label %._crit_edge21, !llvm.loop !11

._crit_edge21:                                    ; preds = %._crit_edge.us, %2
  %.015.lcssa = phi i32 [ 0, %2 ], [ %11, %._crit_edge.us ]
  ret i32 %.015.lcssa
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass