; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1500/main.ll (Z6updateiiiiix)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@lazy = external dso_local global %"class.std::vector", align 8
@st = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiiix(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i64 noundef %5) #0 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  store i64 %5, ptr %12, align 8, !tbaa !9
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %15) #4
  %17 = load i64, ptr %16, align 8, !tbaa !9
  %18 = icmp ne i64 %17, 0
  br i1 %18, label %19, label %63

19:                                               ; preds = %6
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %21) #4
  %23 = load i64, ptr %22, align 8, !tbaa !9
  %24 = load i32, ptr %9, align 4, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = sub nsw i32 %24, %25
  %27 = add nsw i32 %26, 1
  %28 = sext i32 %27 to i64
  %29 = mul nsw i64 %23, %28
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %31) #4
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = add nsw i64 %33, %29
  store i64 %34, ptr %32, align 8, !tbaa !9
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = load i32, ptr %9, align 4, !tbaa !5
  %37 = icmp ne i32 %35, %36
  br i1 %37, label %38, label %59

38:                                               ; preds = %19
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %40) #4
  %42 = load i64, ptr %41, align 8, !tbaa !9
  %43 = load i32, ptr %7, align 4, !tbaa !5
  %44 = call noundef i32 @_Z4lefti(i32 noundef %43)
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %45) #4
  %47 = load i64, ptr %46, align 8, !tbaa !9
  %48 = add nsw i64 %47, %42
  store i64 %48, ptr %46, align 8, !tbaa !9
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %50) #4
  %52 = load i64, ptr %51, align 8, !tbaa !9
  %53 = load i32, ptr %7, align 4, !tbaa !5
  %54 = call noundef i32 @_Z5righti(i32 noundef %53)
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %55) #4
  %57 = load i64, ptr %56, align 8, !tbaa !9
  %58 = add nsw i64 %57, %52
  store i64 %58, ptr %56, align 8, !tbaa !9
  br label %59

59:                                               ; preds = %38, %19
  %60 = load i32, ptr %7, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %61) #4
  store i64 0, ptr %62, align 8, !tbaa !9
  br label %63

63:                                               ; preds = %59, %6
  %64 = load i32, ptr %8, align 4, !tbaa !5
  %65 = load i32, ptr %9, align 4, !tbaa !5
  %66 = icmp sgt i32 %64, %65
  br i1 %66, label %75, label %67

67:                                               ; preds = %63
  %68 = load i32, ptr %8, align 4, !tbaa !5
  %69 = load i32, ptr %11, align 4, !tbaa !5
  %70 = icmp sgt i32 %68, %69
  br i1 %70, label %75, label %71

71:                                               ; preds = %67
  %72 = load i32, ptr %9, align 4, !tbaa !5
  %73 = load i32, ptr %10, align 4, !tbaa !5
  %74 = icmp slt i32 %72, %73
  br i1 %74, label %75, label %76

75:                                               ; preds = %71, %67, %63
  br label %150

76:                                               ; preds = %71
  %77 = load i32, ptr %10, align 4, !tbaa !5
  %78 = load i32, ptr %8, align 4, !tbaa !5
  %79 = icmp sle i32 %77, %78
  br i1 %79, label %80, label %116

80:                                               ; preds = %76
  %81 = load i32, ptr %9, align 4, !tbaa !5
  %82 = load i32, ptr %11, align 4, !tbaa !5
  %83 = icmp sle i32 %81, %82
  br i1 %83, label %84, label %116

84:                                               ; preds = %80
  %85 = load i64, ptr %12, align 8, !tbaa !9
  %86 = load i32, ptr %9, align 4, !tbaa !5
  %87 = load i32, ptr %8, align 4, !tbaa !5
  %88 = sub nsw i32 %86, %87
  %89 = add nsw i32 %88, 1
  %90 = sext i32 %89 to i64
  %91 = mul nsw i64 %85, %90
  %92 = load i32, ptr %7, align 4, !tbaa !5
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %93) #4
  %95 = load i64, ptr %94, align 8, !tbaa !9
  %96 = add nsw i64 %95, %91
  store i64 %96, ptr %94, align 8, !tbaa !9
  %97 = load i32, ptr %8, align 4, !tbaa !5
  %98 = load i32, ptr %9, align 4, !tbaa !5
  %99 = icmp ne i32 %97, %98
  br i1 %99, label %100, label %115

100:                                              ; preds = %84
  %101 = load i64, ptr %12, align 8, !tbaa !9
  %102 = load i32, ptr %7, align 4, !tbaa !5
  %103 = call noundef i32 @_Z4lefti(i32 noundef %102)
  %104 = sext i32 %103 to i64
  %105 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %104) #4
  %106 = load i64, ptr %105, align 8, !tbaa !9
  %107 = add nsw i64 %106, %101
  store i64 %107, ptr %105, align 8, !tbaa !9
  %108 = load i64, ptr %12, align 8, !tbaa !9
  %109 = load i32, ptr %7, align 4, !tbaa !5
  %110 = call noundef i32 @_Z5righti(i32 noundef %109)
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %111) #4
  %113 = load i64, ptr %112, align 8, !tbaa !9
  %114 = add nsw i64 %113, %108
  store i64 %114, ptr %112, align 8, !tbaa !9
  br label %115

115:                                              ; preds = %100, %84
  br label %150

116:                                              ; preds = %80, %76
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %117 = load i32, ptr %8, align 4, !tbaa !5
  %118 = load i32, ptr %9, align 4, !tbaa !5
  %119 = call noundef i32 @_Z6middleii(i32 noundef %117, i32 noundef %118)
  store i32 %119, ptr %13, align 4, !tbaa !5
  %120 = load i32, ptr %7, align 4, !tbaa !5
  %121 = call noundef i32 @_Z4lefti(i32 noundef %120)
  %122 = load i32, ptr %8, align 4, !tbaa !5
  %123 = load i32, ptr %13, align 4, !tbaa !5
  %124 = load i32, ptr %10, align 4, !tbaa !5
  %125 = load i32, ptr %11, align 4, !tbaa !5
  %126 = load i64, ptr %12, align 8, !tbaa !9
  call void @_Z6updateiiiiix(i32 noundef %121, i32 noundef %122, i32 noundef %123, i32 noundef %124, i32 noundef %125, i64 noundef %126)
  %127 = load i32, ptr %7, align 4, !tbaa !5
  %128 = call noundef i32 @_Z5righti(i32 noundef %127)
  %129 = load i32, ptr %13, align 4, !tbaa !5
  %130 = add nsw i32 %129, 1
  %131 = load i32, ptr %9, align 4, !tbaa !5
  %132 = load i32, ptr %10, align 4, !tbaa !5
  %133 = load i32, ptr %11, align 4, !tbaa !5
  %134 = load i64, ptr %12, align 8, !tbaa !9
  call void @_Z6updateiiiiix(i32 noundef %128, i32 noundef %130, i32 noundef %131, i32 noundef %132, i32 noundef %133, i64 noundef %134)
  %135 = load i32, ptr %7, align 4, !tbaa !5
  %136 = call noundef i32 @_Z4lefti(i32 noundef %135)
  %137 = sext i32 %136 to i64
  %138 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %137) #4
  %139 = load i64, ptr %138, align 8, !tbaa !9
  %140 = load i32, ptr %7, align 4, !tbaa !5
  %141 = call noundef i32 @_Z5righti(i32 noundef %140)
  %142 = sext i32 %141 to i64
  %143 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %142) #4
  %144 = load i64, ptr %143, align 8, !tbaa !9
  %145 = add nsw i64 %139, %144
  %146 = load i32, ptr %7, align 4, !tbaa !5
  %147 = sext i32 %146 to i64
  %148 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %147) #4
  store i64 %145, ptr %148, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %149

149:                                              ; preds = %116
  br label %150

150:                                              ; preds = %149, %115, %75
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4lefti(i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5righti(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6middleii(i32 noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@lazy = external dso_local global %"class.std::vector", align 8
@st = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiiiiix(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i64 noundef %5) local_unnamed_addr #0 {
  %7 = sext i32 %0 to i64
  %8 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %7) #2
  %9 = load i64, ptr %8, align 8, !tbaa !5
  %.not = icmp eq i64 %9, 0
  br i1 %.not, label %36, label %10

10:                                               ; preds = %6
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %7) #2
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %reass.sub = sub i32 %2, %1
  %13 = add i32 %reass.sub, 1
  %14 = sext i32 %13 to i64
  %15 = mul nsw i64 %12, %14
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %7) #2
  %17 = load i64, ptr %16, align 8, !tbaa !5
  %18 = add nsw i64 %17, %15
  store i64 %18, ptr %16, align 8, !tbaa !5
  %.not52 = icmp eq i32 %1, %2
  br i1 %.not52, label %34, label %19

19:                                               ; preds = %10
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %7) #2
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = tail call noundef i32 @_Z4lefti(i32 noundef %0)
  %23 = sext i32 %22 to i64
  %24 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %23) #2
  %25 = load i64, ptr %24, align 8, !tbaa !5
  %26 = add nsw i64 %25, %21
  store i64 %26, ptr %24, align 8, !tbaa !5
  %27 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %7) #2
  %28 = load i64, ptr %27, align 8, !tbaa !5
  %29 = tail call noundef i32 @_Z5righti(i32 noundef %0)
  %30 = sext i32 %29 to i64
  %31 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %30) #2
  %32 = load i64, ptr %31, align 8, !tbaa !5
  %33 = add nsw i64 %32, %28
  store i64 %33, ptr %31, align 8, !tbaa !5
  br label %34

34:                                               ; preds = %19, %10
  %35 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %7) #2
  store i64 0, ptr %35, align 8, !tbaa !5
  br label %36

36:                                               ; preds = %34, %6
  %37 = icmp sgt i32 %1, %2
  %38 = icmp sgt i32 %1, %4
  %or.cond = or i1 %37, %38
  %39 = icmp slt i32 %2, %3
  %or.cond56 = or i1 %39, %or.cond
  br i1 %or.cond56, label %common.ret59, label %40

40:                                               ; preds = %36
  %.not53 = icmp sgt i32 %3, %1
  %.not54 = icmp sgt i32 %2, %4
  %or.cond57 = or i1 %.not53, %.not54
  br i1 %or.cond57, label %59, label %41

41:                                               ; preds = %40
  %reass.sub58 = sub i32 %2, %1
  %42 = add i32 %reass.sub58, 1
  %43 = sext i32 %42 to i64
  %44 = mul nsw i64 %43, %5
  %45 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %7) #2
  %46 = load i64, ptr %45, align 8, !tbaa !5
  %47 = add nsw i64 %46, %44
  store i64 %47, ptr %45, align 8, !tbaa !5
  %.not55 = icmp eq i32 %1, %2
  br i1 %.not55, label %common.ret59, label %48

48:                                               ; preds = %41
  %49 = tail call noundef i32 @_Z4lefti(i32 noundef %0)
  %50 = sext i32 %49 to i64
  %51 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %50) #2
  %52 = load i64, ptr %51, align 8, !tbaa !5
  %53 = add nsw i64 %52, %5
  store i64 %53, ptr %51, align 8, !tbaa !5
  %54 = tail call noundef i32 @_Z5righti(i32 noundef %0)
  %55 = sext i32 %54 to i64
  %56 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @lazy, i64 noundef %55) #2
  %57 = load i64, ptr %56, align 8, !tbaa !5
  %58 = add nsw i64 %57, %5
  store i64 %58, ptr %56, align 8, !tbaa !5
  br label %common.ret59

common.ret59:                                     ; preds = %41, %48, %36, %59
  ret void

59:                                               ; preds = %40
  %60 = tail call noundef i32 @_Z6middleii(i32 noundef %1, i32 noundef %2)
  %61 = tail call noundef i32 @_Z4lefti(i32 noundef %0)
  tail call void @_Z6updateiiiiix(i32 noundef %61, i32 noundef %1, i32 noundef %60, i32 noundef %3, i32 noundef %4, i64 noundef %5)
  %62 = tail call noundef i32 @_Z5righti(i32 noundef %0)
  %63 = add nsw i32 %60, 1
  tail call void @_Z6updateiiiiix(i32 noundef %62, i32 noundef %63, i32 noundef %2, i32 noundef %3, i32 noundef %4, i64 noundef %5)
  %64 = tail call noundef i32 @_Z4lefti(i32 noundef %0)
  %65 = sext i32 %64 to i64
  %66 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %65) #2
  %67 = load i64, ptr %66, align 8, !tbaa !5
  %68 = tail call noundef i32 @_Z5righti(i32 noundef %0)
  %69 = sext i32 %68 to i64
  %70 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %69) #2
  %71 = load i64, ptr %70, align 8, !tbaa !5
  %72 = add nsw i64 %71, %67
  %73 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %7) #2
  store i64 %72, ptr %73, align 8, !tbaa !5
  br label %common.ret59
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z4lefti(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5righti(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6middleii(i32 noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass