; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.MIFARE_Key = type { [6 x i8] }
%struct.MFRC522_Uid = type { i8, [10 x i8], i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext %0, i8 noundef zeroext %1, ptr noundef %2, ptr noundef %3) #1 {
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca [12 x i8], align 1
  %11 = alloca i8, align 1
  store i8 %0, ptr %5, align 1, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !8
  store ptr %3, ptr %8, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  store i8 16, ptr %9, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 12, ptr %10) #2
  %12 = load i8, ptr %5, align 1, !tbaa !5
  %13 = getelementptr inbounds [12 x i8], ptr %10, i64 0, i64 0
  store i8 %12, ptr %13, align 1, !tbaa !5
  %14 = load i8, ptr %6, align 1, !tbaa !5
  %15 = getelementptr inbounds [12 x i8], ptr %10, i64 0, i64 1
  store i8 %14, ptr %15, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #2
  store i8 0, ptr %11, align 1, !tbaa !5
  br label %16

16:                                               ; preds = %32, %4
  %17 = load i8, ptr %11, align 1, !tbaa !5
  %18 = zext i8 %17 to i32
  %19 = icmp slt i32 %18, 6
  br i1 %19, label %20, label %35

20:                                               ; preds = %16
  %21 = load ptr, ptr %7, align 8, !tbaa !8
  %22 = getelementptr inbounds %struct.MIFARE_Key, ptr %21, i32 0, i32 0
  %23 = load i8, ptr %11, align 1, !tbaa !5
  %24 = zext i8 %23 to i64
  %25 = getelementptr inbounds [6 x i8], ptr %22, i64 0, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !5
  %27 = load i8, ptr %11, align 1, !tbaa !5
  %28 = zext i8 %27 to i32
  %29 = add nsw i32 2, %28
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [12 x i8], ptr %10, i64 0, i64 %30
  store i8 %26, ptr %31, align 1, !tbaa !5
  br label %32

32:                                               ; preds = %20
  %33 = load i8, ptr %11, align 1, !tbaa !5
  %34 = add i8 %33, 1
  store i8 %34, ptr %11, align 1, !tbaa !5
  br label %16, !llvm.loop !10

35:                                               ; preds = %16
  store i8 0, ptr %11, align 1, !tbaa !5
  br label %36

36:                                               ; preds = %59, %35
  %37 = load i8, ptr %11, align 1, !tbaa !5
  %38 = zext i8 %37 to i32
  %39 = icmp slt i32 %38, 4
  br i1 %39, label %40, label %62

40:                                               ; preds = %36
  %41 = load ptr, ptr %8, align 8, !tbaa !8
  %42 = getelementptr inbounds %struct.MFRC522_Uid, ptr %41, i32 0, i32 1
  %43 = load i8, ptr %11, align 1, !tbaa !5
  %44 = zext i8 %43 to i32
  %45 = load ptr, ptr %8, align 8, !tbaa !8
  %46 = getelementptr inbounds %struct.MFRC522_Uid, ptr %45, i32 0, i32 0
  %47 = load i8, ptr %46, align 1, !tbaa !12
  %48 = zext i8 %47 to i32
  %49 = add nsw i32 %44, %48
  %50 = sub nsw i32 %49, 4
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [10 x i8], ptr %42, i64 0, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !5
  %54 = load i8, ptr %11, align 1, !tbaa !5
  %55 = zext i8 %54 to i32
  %56 = add nsw i32 8, %55
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [12 x i8], ptr %10, i64 0, i64 %57
  store i8 %53, ptr %58, align 1, !tbaa !5
  br label %59

59:                                               ; preds = %40
  %60 = load i8, ptr %11, align 1, !tbaa !5
  %61 = add i8 %60, 1
  store i8 %61, ptr %11, align 1, !tbaa !5
  br label %36, !llvm.loop !14

62:                                               ; preds = %36
  %63 = load i8, ptr %9, align 1, !tbaa !5
  %64 = getelementptr inbounds [12 x i8], ptr %10, i64 0, i64 0
  %65 = call i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext 14, i8 noundef zeroext %63, ptr noundef %64, i8 noundef zeroext 12, ptr noundef null, ptr noundef null, ptr noundef null, i8 noundef zeroext 0, i8 noundef zeroext 0)
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 12, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  ret i32 %65
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !6, i64 0}
!13 = !{!"", !6, i64 0, !6, i64 1, !6, i64 11}
!14 = distinct !{!14, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext %0, i8 noundef zeroext %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3) local_unnamed_addr #1 {
.preheader:
  %4 = alloca [12 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %4) #3
  store i8 %0, ptr %4, align 1, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %4, i64 1
  store i8 %1, ptr %5, align 1, !tbaa !5
  %scevgep = getelementptr inbounds i8, ptr %4, i64 2
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(6) %scevgep, ptr noundef nonnull align 1 dereferenceable(6) %2, i64 6, i1 false), !tbaa !5
  %6 = load i8, ptr %3, align 1, !tbaa !8
  %scevgep19 = getelementptr inbounds i8, ptr %4, i64 8
  %7 = zext i8 %6 to i64
  %8 = getelementptr i8, ptr %3, i64 %7
  %scevgep20 = getelementptr i8, ptr %8, i64 -3
  %9 = load i32, ptr %scevgep20, align 1, !tbaa !5
  store i32 %9, ptr %scevgep19, align 1, !tbaa !5
  %10 = call i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext 14, i8 noundef zeroext 16, ptr noundef nonnull %4, i8 noundef zeroext 12, ptr noundef null, ptr noundef null, ptr noundef null, i8 noundef zeroext 0, i8 noundef zeroext 0)
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %4) #3
  ret i32 %10
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !6, i64 0}
!9 = !{!"", !6, i64 0, !6, i64 1, !6, i64 11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass