; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/2451/main.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector.0", align 8
@cont = external dso_local global i32, align 4
@contt = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %6) #2
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %9) #2
  store i32 1, ptr %10, align 4, !tbaa !5
  %11 = load i32, ptr @cont, align 4, !tbaa !5
  %12 = load i32, ptr @contt, align 4, !tbaa !5
  %13 = icmp sgt i32 %11, %12
  br i1 %13, label %14, label %16

14:                                               ; preds = %2
  %15 = load i32, ptr @cont, align 4, !tbaa !5
  store i32 %15, ptr @contt, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %14, %2
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = add nsw i32 %17, 1
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %20) #2
  %22 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #2
  %23 = trunc i64 %22 to i32
  %24 = icmp slt i32 %18, %23
  br i1 %24, label %25, label %64

25:                                               ; preds = %16
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %27) #2
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %31) #2
  %33 = load i8, ptr %32, align 1, !tbaa !9
  %34 = sext i8 %33 to i32
  %35 = icmp ne i32 %34, 65
  br i1 %35, label %36, label %64

36:                                               ; preds = %25
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %38) #2
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %42) #2
  %44 = load i32, ptr %43, align 4, !tbaa !5
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %64, label %46

46:                                               ; preds = %36
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %48) #2
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = add nsw i32 %50, 1
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %52) #2
  %54 = load i8, ptr %53, align 1, !tbaa !9
  %55 = sext i8 %54 to i32
  %56 = icmp eq i32 %55, 111
  br i1 %56, label %57, label %60

57:                                               ; preds = %46
  %58 = load i32, ptr @cont, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr @cont, align 4, !tbaa !5
  br label %60

60:                                               ; preds = %57, %46
  %61 = load i32, ptr %3, align 4, !tbaa !5
  %62 = load i32, ptr %4, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  call void @_Z3dfsii(i32 noundef %61, i32 noundef %63)
  br label %99

64:                                               ; preds = %36, %25, %16
  %65 = load i32, ptr %4, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  %67 = load i32, ptr %3, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %68) #2
  %70 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %69) #2
  %71 = trunc i64 %70 to i32
  %72 = icmp slt i32 %66, %71
  br i1 %72, label %73, label %98

73:                                               ; preds = %64
  %74 = load i32, ptr %3, align 4, !tbaa !5
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %75) #2
  %77 = load i32, ptr %4, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %79) #2
  %81 = load i8, ptr %80, align 1, !tbaa !9
  %82 = sext i8 %81 to i32
  %83 = icmp eq i32 %82, 65
  br i1 %83, label %84, label %98

84:                                               ; preds = %73
  %85 = load i32, ptr %3, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %86) #2
  %88 = load i32, ptr %4, align 4, !tbaa !5
  %89 = add nsw i32 %88, 1
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %90) #2
  %92 = load i32, ptr %91, align 4, !tbaa !5
  %93 = icmp ne i32 %92, 0
  br i1 %93, label %98, label %94

94:                                               ; preds = %84
  store i32 0, ptr @cont, align 4, !tbaa !5
  %95 = load i32, ptr %3, align 4, !tbaa !5
  %96 = load i32, ptr %4, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  call void @_Z3dfsii(i32 noundef %95, i32 noundef %97)
  br label %98

98:                                               ; preds = %94, %84, %73, %64
  br label %99

99:                                               ; preds = %98, %60
  %100 = load i32, ptr %4, align 4, !tbaa !5
  %101 = sub nsw i32 %100, 1
  %102 = icmp sge i32 %101, 0
  br i1 %102, label %103, label %142

103:                                              ; preds = %99
  %104 = load i32, ptr %3, align 4, !tbaa !5
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %105) #2
  %107 = load i32, ptr %4, align 4, !tbaa !5
  %108 = sub nsw i32 %107, 1
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %109) #2
  %111 = load i8, ptr %110, align 1, !tbaa !9
  %112 = sext i8 %111 to i32
  %113 = icmp ne i32 %112, 65
  br i1 %113, label %114, label %142

114:                                              ; preds = %103
  %115 = load i32, ptr %3, align 4, !tbaa !5
  %116 = sext i32 %115 to i64
  %117 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %116) #2
  %118 = load i32, ptr %4, align 4, !tbaa !5
  %119 = sub nsw i32 %118, 1
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %117, i64 noundef %120) #2
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %123 = icmp ne i32 %122, 0
  br i1 %123, label %142, label %124

124:                                              ; preds = %114
  %125 = load i32, ptr %3, align 4, !tbaa !5
  %126 = sext i32 %125 to i64
  %127 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %126) #2
  %128 = load i32, ptr %4, align 4, !tbaa !5
  %129 = sub nsw i32 %128, 1
  %130 = sext i32 %129 to i64
  %131 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %127, i64 noundef %130) #2
  %132 = load i8, ptr %131, align 1, !tbaa !9
  %133 = sext i8 %132 to i32
  %134 = icmp eq i32 %133, 111
  br i1 %134, label %135, label %138

135:                                              ; preds = %124
  %136 = load i32, ptr @cont, align 4, !tbaa !5
  %137 = add nsw i32 %136, 1
  store i32 %137, ptr @cont, align 4, !tbaa !5
  br label %138

138:                                              ; preds = %135, %124
  %139 = load i32, ptr %3, align 4, !tbaa !5
  %140 = load i32, ptr %4, align 4, !tbaa !5
  %141 = sub nsw i32 %140, 1
  call void @_Z3dfsii(i32 noundef %139, i32 noundef %141)
  br label %172

142:                                              ; preds = %114, %103, %99
  %143 = load i32, ptr %4, align 4, !tbaa !5
  %144 = sub nsw i32 %143, 1
  %145 = icmp sge i32 %144, 0
  br i1 %145, label %146, label %171

146:                                              ; preds = %142
  %147 = load i32, ptr %3, align 4, !tbaa !5
  %148 = sext i32 %147 to i64
  %149 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %148) #2
  %150 = load i32, ptr %4, align 4, !tbaa !5
  %151 = sub nsw i32 %150, 1
  %152 = sext i32 %151 to i64
  %153 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %149, i64 noundef %152) #2
  %154 = load i8, ptr %153, align 1, !tbaa !9
  %155 = sext i8 %154 to i32
  %156 = icmp eq i32 %155, 65
  br i1 %156, label %157, label %171

157:                                              ; preds = %146
  %158 = load i32, ptr %3, align 4, !tbaa !5
  %159 = sext i32 %158 to i64
  %160 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %159) #2
  %161 = load i32, ptr %4, align 4, !tbaa !5
  %162 = sub nsw i32 %161, 1
  %163 = sext i32 %162 to i64
  %164 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %160, i64 noundef %163) #2
  %165 = load i32, ptr %164, align 4, !tbaa !5
  %166 = icmp ne i32 %165, 0
  br i1 %166, label %171, label %167

167:                                              ; preds = %157
  store i32 0, ptr @cont, align 4, !tbaa !5
  %168 = load i32, ptr %3, align 4, !tbaa !5
  %169 = load i32, ptr %4, align 4, !tbaa !5
  %170 = sub nsw i32 %169, 1
  call void @_Z3dfsii(i32 noundef %168, i32 noundef %170)
  br label %171

171:                                              ; preds = %167, %157, %146, %142
  br label %172

172:                                              ; preds = %171, %138
  %173 = load i32, ptr %3, align 4, !tbaa !5
  %174 = add nsw i32 %173, 1
  %175 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %176 = trunc i64 %175 to i32
  %177 = icmp slt i32 %174, %176
  br i1 %177, label %178, label %217

178:                                              ; preds = %172
  %179 = load i32, ptr %3, align 4, !tbaa !5
  %180 = add nsw i32 %179, 1
  %181 = sext i32 %180 to i64
  %182 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %181) #2
  %183 = load i32, ptr %4, align 4, !tbaa !5
  %184 = sext i32 %183 to i64
  %185 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %182, i64 noundef %184) #2
  %186 = load i8, ptr %185, align 1, !tbaa !9
  %187 = sext i8 %186 to i32
  %188 = icmp ne i32 %187, 65
  br i1 %188, label %189, label %217

189:                                              ; preds = %178
  %190 = load i32, ptr %3, align 4, !tbaa !5
  %191 = add nsw i32 %190, 1
  %192 = sext i32 %191 to i64
  %193 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %192) #2
  %194 = load i32, ptr %4, align 4, !tbaa !5
  %195 = sext i32 %194 to i64
  %196 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %193, i64 noundef %195) #2
  %197 = load i32, ptr %196, align 4, !tbaa !5
  %198 = icmp ne i32 %197, 0
  br i1 %198, label %217, label %199

199:                                              ; preds = %189
  %200 = load i32, ptr %3, align 4, !tbaa !5
  %201 = add nsw i32 %200, 1
  %202 = sext i32 %201 to i64
  %203 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %202) #2
  %204 = load i32, ptr %4, align 4, !tbaa !5
  %205 = sext i32 %204 to i64
  %206 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %203, i64 noundef %205) #2
  %207 = load i8, ptr %206, align 1, !tbaa !9
  %208 = sext i8 %207 to i32
  %209 = icmp eq i32 %208, 111
  br i1 %209, label %210, label %213

210:                                              ; preds = %199
  %211 = load i32, ptr @cont, align 4, !tbaa !5
  %212 = add nsw i32 %211, 1
  store i32 %212, ptr @cont, align 4, !tbaa !5
  br label %213

213:                                              ; preds = %210, %199
  %214 = load i32, ptr %3, align 4, !tbaa !5
  %215 = add nsw i32 %214, 1
  %216 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %215, i32 noundef %216)
  br label %249

217:                                              ; preds = %189, %178, %172
  %218 = load i32, ptr %3, align 4, !tbaa !5
  %219 = add nsw i32 %218, 1
  %220 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %221 = trunc i64 %220 to i32
  %222 = icmp slt i32 %219, %221
  br i1 %222, label %223, label %248

223:                                              ; preds = %217
  %224 = load i32, ptr %3, align 4, !tbaa !5
  %225 = add nsw i32 %224, 1
  %226 = sext i32 %225 to i64
  %227 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %226) #2
  %228 = load i32, ptr %4, align 4, !tbaa !5
  %229 = sext i32 %228 to i64
  %230 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %227, i64 noundef %229) #2
  %231 = load i8, ptr %230, align 1, !tbaa !9
  %232 = sext i8 %231 to i32
  %233 = icmp eq i32 %232, 65
  br i1 %233, label %234, label %248

234:                                              ; preds = %223
  %235 = load i32, ptr %3, align 4, !tbaa !5
  %236 = add nsw i32 %235, 1
  %237 = sext i32 %236 to i64
  %238 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %237) #2
  %239 = load i32, ptr %4, align 4, !tbaa !5
  %240 = sext i32 %239 to i64
  %241 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %238, i64 noundef %240) #2
  %242 = load i32, ptr %241, align 4, !tbaa !5
  %243 = icmp ne i32 %242, 0
  br i1 %243, label %248, label %244

244:                                              ; preds = %234
  store i32 0, ptr @cont, align 4, !tbaa !5
  %245 = load i32, ptr %3, align 4, !tbaa !5
  %246 = add nsw i32 %245, 1
  %247 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %246, i32 noundef %247)
  br label %248

248:                                              ; preds = %244, %234, %223, %217
  br label %249

249:                                              ; preds = %248, %213
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector.0", align 8
@cont = external dso_local local_unnamed_addr global i32, align 4
@contt = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %1 to i64
  %4 = add nsw i32 %1, 1
  %5 = sext i32 %4 to i64
  %6 = add nsw i32 %1, -1
  %7 = icmp sgt i32 %1, 0
  %8 = zext nneg i32 %6 to i64
  %9 = sext i32 %0 to i64
  br label %tailrecurse

tailrecurse:                                      ; preds = %tailrecurse.backedge, %2
  %indvars.iv = phi i64 [ %9, %2 ], [ %indvars.iv.next, %tailrecurse.backedge ]
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %3) #1
  store i32 1, ptr %11, align 4, !tbaa !5
  %12 = load i32, ptr @cont, align 4, !tbaa !5
  %13 = load i32, ptr @contt, align 4, !tbaa !5
  %14 = icmp sgt i32 %12, %13
  br i1 %14, label %15, label %16

15:                                               ; preds = %tailrecurse
  store i32 %12, ptr @contt, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %15, %tailrecurse
  %17 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %18 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %17) #1
  %19 = trunc i64 %18 to i32
  %20 = icmp slt i32 %4, %19
  br i1 %20, label %21, label %37

21:                                               ; preds = %16
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %23 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %5) #1
  %24 = load i8, ptr %23, align 1, !tbaa !9
  %.not = icmp eq i8 %24, 65
  br i1 %.not, label %37, label %25

25:                                               ; preds = %21
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %5) #1
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %.not57 = icmp eq i32 %28, 0
  br i1 %.not57, label %29, label %37

29:                                               ; preds = %25
  %30 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %31 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %5) #1
  %32 = load i8, ptr %31, align 1, !tbaa !9
  %33 = icmp eq i8 %32, 111
  br i1 %33, label %34, label %.sink.split

34:                                               ; preds = %29
  %35 = load i32, ptr @cont, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  br label %.sink.split.sink.split

37:                                               ; preds = %25, %21, %16
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %39 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %38) #1
  %40 = trunc i64 %39 to i32
  %41 = icmp slt i32 %4, %40
  br i1 %41, label %42, label %52

42:                                               ; preds = %37
  %43 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %44 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %5) #1
  %45 = load i8, ptr %44, align 1, !tbaa !9
  %46 = icmp eq i8 %45, 65
  br i1 %46, label %47, label %52

47:                                               ; preds = %42
  %48 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %49 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %5) #1
  %50 = load i32, ptr %49, align 4, !tbaa !5
  %.not58 = icmp eq i32 %50, 0
  br i1 %.not58, label %.sink.split.sink.split, label %52

.sink.split.sink.split:                           ; preds = %47, %34
  %.sink68 = phi i32 [ %36, %34 ], [ 0, %47 ]
  store i32 %.sink68, ptr @cont, align 4, !tbaa !5
  br label %.sink.split

.sink.split:                                      ; preds = %.sink.split.sink.split, %29
  %51 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %51, i32 noundef %4)
  br label %52

52:                                               ; preds = %.sink.split, %37, %42, %47
  br i1 %7, label %53, label %.critedge

53:                                               ; preds = %52
  %54 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %55 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %8) #1
  %56 = load i8, ptr %55, align 1, !tbaa !9
  %.not59 = icmp eq i8 %56, 65
  br i1 %.not59, label %69, label %57

57:                                               ; preds = %53
  %58 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %59 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %8) #1
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %.not60 = icmp eq i32 %60, 0
  br i1 %.not60, label %61, label %69

61:                                               ; preds = %57
  %62 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %63 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %8) #1
  %64 = load i8, ptr %63, align 1, !tbaa !9
  %65 = icmp eq i8 %64, 111
  br i1 %65, label %66, label %.critedge.sink.split

66:                                               ; preds = %61
  %67 = load i32, ptr @cont, align 4, !tbaa !5
  %68 = add nsw i32 %67, 1
  br label %.critedge.sink.split.sink.split

69:                                               ; preds = %53, %57
  %70 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %71 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %8) #1
  %72 = load i8, ptr %71, align 1, !tbaa !9
  %73 = icmp eq i8 %72, 65
  br i1 %73, label %74, label %.critedge

74:                                               ; preds = %69
  %75 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %76 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %75, i64 noundef %8) #1
  %77 = load i32, ptr %76, align 4, !tbaa !5
  %.not61 = icmp eq i32 %77, 0
  br i1 %.not61, label %.critedge.sink.split.sink.split, label %.critedge

.critedge.sink.split.sink.split:                  ; preds = %74, %66
  %.sink69 = phi i32 [ %68, %66 ], [ 0, %74 ]
  store i32 %.sink69, ptr @cont, align 4, !tbaa !5
  br label %.critedge.sink.split

.critedge.sink.split:                             ; preds = %.critedge.sink.split.sink.split, %61
  %78 = trunc nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %78, i32 noundef %6)
  br label %.critedge

.critedge:                                        ; preds = %.critedge.sink.split, %52, %69, %74
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %79 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %sext = shl i64 %79, 32
  %80 = ashr exact i64 %sext, 32
  %81 = icmp slt i64 %indvars.iv.next, %80
  br i1 %81, label %82, label %98

82:                                               ; preds = %.critedge
  %83 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next) #1
  %84 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %3) #1
  %85 = load i8, ptr %84, align 1, !tbaa !9
  %.not62 = icmp eq i8 %85, 65
  br i1 %.not62, label %98, label %86

86:                                               ; preds = %82
  %87 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv.next) #1
  %88 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %3) #1
  %89 = load i32, ptr %88, align 4, !tbaa !5
  %.not63 = icmp eq i32 %89, 0
  br i1 %.not63, label %90, label %98

90:                                               ; preds = %86
  %91 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next) #1
  %92 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %3) #1
  %93 = load i8, ptr %92, align 1, !tbaa !9
  %94 = icmp eq i8 %93, 111
  br i1 %94, label %95, label %tailrecurse.backedge

95:                                               ; preds = %90
  %96 = load i32, ptr @cont, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  br label %tailrecurse.backedge.sink.split

tailrecurse.backedge.sink.split:                  ; preds = %107, %95
  %.sink = phi i32 [ %97, %95 ], [ 0, %107 ]
  store i32 %.sink, ptr @cont, align 4, !tbaa !5
  br label %tailrecurse.backedge

tailrecurse.backedge:                             ; preds = %tailrecurse.backedge.sink.split, %90
  br label %tailrecurse

98:                                               ; preds = %86, %82, %.critedge
  %99 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %sext67 = shl i64 %99, 32
  %100 = ashr exact i64 %sext67, 32
  %101 = icmp slt i64 %indvars.iv.next, %100
  br i1 %101, label %102, label %111

102:                                              ; preds = %98
  %103 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next) #1
  %104 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %103, i64 noundef %3) #1
  %105 = load i8, ptr %104, align 1, !tbaa !9
  %106 = icmp eq i8 %105, 65
  br i1 %106, label %107, label %111

107:                                              ; preds = %102
  %108 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv.next) #1
  %109 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %108, i64 noundef %3) #1
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %.not64 = icmp eq i32 %110, 0
  br i1 %.not64, label %tailrecurse.backedge.sink.split, label %111

111:                                              ; preds = %98, %102, %107
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass