; LLVM IR from indjev99/Evolving-Snakes :: sources/ctrNeuralNetwork.ll (ZN16ctrNeuralNetwork9setValuesERSt6vectorIdSaIdEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ctrNeuralNetwork = type { %struct.controller, double, double, double, i32, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5" }
%struct.controller = type { ptr, [3 x i32], [3 x i8], [1 x i32], [1 x i8], [1 x i32], [1 x i8], i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16ctrNeuralNetwork9setValuesERSt6vectorIdSaIdEE(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) unnamed_addr #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !9
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = add nsw i32 %12, 1
  store i32 %13, ptr %5, align 4, !tbaa !9
  %14 = sext i32 %12 to i64
  %15 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %14) #4
  %16 = load double, ptr %15, align 8, !tbaa !11
  %17 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 1
  store double %16, ptr %17, align 8, !tbaa !13
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = load i32, ptr %5, align 4, !tbaa !9
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %5, align 4, !tbaa !9
  %21 = sext i32 %19 to i64
  %22 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %21) #4
  %23 = load double, ptr %22, align 8, !tbaa !11
  %24 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 2
  store double %23, ptr %24, align 8, !tbaa !28
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = add nsw i32 %26, 1
  store i32 %27, ptr %5, align 4, !tbaa !9
  %28 = sext i32 %26 to i64
  %29 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %28) #4
  %30 = load double, ptr %29, align 8, !tbaa !11
  %31 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 3
  store double %30, ptr %31, align 8, !tbaa !29
  %32 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = load i32, ptr %5, align 4, !tbaa !9
  %35 = add nsw i32 %34, 1
  store i32 %35, ptr %5, align 4, !tbaa !9
  %36 = sext i32 %34 to i64
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %36) #4
  %38 = load double, ptr %37, align 8, !tbaa !11
  %39 = call double @llvm.round.f64(double %38)
  %40 = fptoui double %39 to i64
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %40)
  %41 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 7
  %42 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %43 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %42) #4
  call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %43)
  %44 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 8
  %45 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %46 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %45) #4
  call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %46)
  %47 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 9
  %48 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %49 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %48) #4
  call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %49)
  %50 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 6
  %51 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %52 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %51) #4
  call void @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %52)
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %189, %2
  %54 = load i32, ptr %6, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %57 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %56) #4
  %58 = icmp ult i64 %55, %57
  br i1 %58, label %60, label %59

59:                                               ; preds = %53
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %192

60:                                               ; preds = %53
  %61 = load ptr, ptr %4, align 8, !tbaa !5
  %62 = load i32, ptr %5, align 4, !tbaa !9
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %5, align 4, !tbaa !9
  %64 = sext i32 %62 to i64
  %65 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %64) #4
  %66 = load double, ptr %65, align 8, !tbaa !11
  %67 = call double @llvm.round.f64(double %66)
  %68 = fptosi double %67 to i32
  %69 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %70 = load i32, ptr %6, align 4, !tbaa !9
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #4
  store i32 %68, ptr %72, align 4, !tbaa !9
  %73 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 7
  %74 = load i32, ptr %6, align 4, !tbaa !9
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %75) #4
  %77 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %78 = load i32, ptr %6, align 4, !tbaa !9
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #4
  %81 = load i32, ptr %80, align 4, !tbaa !9
  %82 = sext i32 %81 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %82)
  %83 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 8
  %84 = load i32, ptr %6, align 4, !tbaa !9
  %85 = sext i32 %84 to i64
  %86 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %85) #4
  %87 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %88 = load i32, ptr %6, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %89) #4
  %91 = load i32, ptr %90, align 4, !tbaa !9
  %92 = sext i32 %91 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %92)
  %93 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 9
  %94 = load i32, ptr %6, align 4, !tbaa !9
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %95) #4
  %97 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %98 = load i32, ptr %6, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %97, i64 noundef %99) #4
  %101 = load i32, ptr %100, align 4, !tbaa !9
  %102 = sext i32 %101 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %102)
  %103 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 6
  %104 = load i32, ptr %6, align 4, !tbaa !9
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %103, i64 noundef %105) #4
  %107 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %108 = load i32, ptr %6, align 4, !tbaa !9
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %109) #4
  %111 = load i32, ptr %110, align 4, !tbaa !9
  %112 = sext i32 %111 to i64
  call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %112)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %113

113:                                              ; preds = %185, %60
  %114 = load i32, ptr %8, align 4, !tbaa !9
  %115 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %116 = load i32, ptr %6, align 4, !tbaa !9
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %117) #4
  %119 = load i32, ptr %118, align 4, !tbaa !9
  %120 = icmp slt i32 %114, %119
  br i1 %120, label %122, label %121

121:                                              ; preds = %113
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %188

122:                                              ; preds = %113
  %123 = load ptr, ptr %4, align 8, !tbaa !5
  %124 = load i32, ptr %5, align 4, !tbaa !9
  %125 = add nsw i32 %124, 1
  store i32 %125, ptr %5, align 4, !tbaa !9
  %126 = sext i32 %124 to i64
  %127 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %123, i64 noundef %126) #4
  %128 = load double, ptr %127, align 8, !tbaa !11
  %129 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 7
  %130 = load i32, ptr %6, align 4, !tbaa !9
  %131 = sext i32 %130 to i64
  %132 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %129, i64 noundef %131) #4
  %133 = load i32, ptr %8, align 4, !tbaa !9
  %134 = sext i32 %133 to i64
  %135 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %132, i64 noundef %134) #4
  store double %128, ptr %135, align 8, !tbaa !11
  %136 = load i32, ptr %6, align 4, !tbaa !9
  %137 = icmp ne i32 %136, 0
  br i1 %137, label %138, label %184

138:                                              ; preds = %122
  %139 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 6
  %140 = load i32, ptr %6, align 4, !tbaa !9
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %139, i64 noundef %141) #4
  %143 = load i32, ptr %8, align 4, !tbaa !9
  %144 = sext i32 %143 to i64
  %145 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %142, i64 noundef %144) #4
  %146 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %147 = load i32, ptr %6, align 4, !tbaa !9
  %148 = sub nsw i32 %147, 1
  %149 = sext i32 %148 to i64
  %150 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %146, i64 noundef %149) #4
  %151 = load i32, ptr %150, align 4, !tbaa !9
  %152 = sext i32 %151 to i64
  call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %145, i64 noundef %152)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %153

153:                                              ; preds = %180, %138
  %154 = load i32, ptr %9, align 4, !tbaa !9
  %155 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %156 = load i32, ptr %6, align 4, !tbaa !9
  %157 = sub nsw i32 %156, 1
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %155, i64 noundef %158) #4
  %160 = load i32, ptr %159, align 4, !tbaa !9
  %161 = icmp slt i32 %154, %160
  br i1 %161, label %163, label %162

162:                                              ; preds = %153
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %183

163:                                              ; preds = %153
  %164 = load ptr, ptr %4, align 8, !tbaa !5
  %165 = load i32, ptr %5, align 4, !tbaa !9
  %166 = add nsw i32 %165, 1
  store i32 %166, ptr %5, align 4, !tbaa !9
  %167 = sext i32 %165 to i64
  %168 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %164, i64 noundef %167) #4
  %169 = load double, ptr %168, align 8, !tbaa !11
  %170 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 6
  %171 = load i32, ptr %6, align 4, !tbaa !9
  %172 = sext i32 %171 to i64
  %173 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %170, i64 noundef %172) #4
  %174 = load i32, ptr %8, align 4, !tbaa !9
  %175 = sext i32 %174 to i64
  %176 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %173, i64 noundef %175) #4
  %177 = load i32, ptr %9, align 4, !tbaa !9
  %178 = sext i32 %177 to i64
  %179 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %176, i64 noundef %178) #4
  store double %169, ptr %179, align 8, !tbaa !11
  br label %180

180:                                              ; preds = %163
  %181 = load i32, ptr %9, align 4, !tbaa !9
  %182 = add nsw i32 %181, 1
  store i32 %182, ptr %9, align 4, !tbaa !9
  br label %153, !llvm.loop !30

183:                                              ; preds = %162
  br label %184

184:                                              ; preds = %183, %122
  br label %185

185:                                              ; preds = %184
  %186 = load i32, ptr %8, align 4, !tbaa !9
  %187 = add nsw i32 %186, 1
  store i32 %187, ptr %8, align 4, !tbaa !9
  br label %113, !llvm.loop !32

188:                                              ; preds = %121
  br label %189

189:                                              ; preds = %188
  %190 = load i32, ptr %6, align 4, !tbaa !9
  %191 = add nsw i32 %190, 1
  store i32 %191, ptr %6, align 4, !tbaa !9
  br label %53, !llvm.loop !33

192:                                              ; preds = %59
  %193 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 5
  %194 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %193, i64 noundef 0) #4
  %195 = load i32, ptr %194, align 4, !tbaa !9
  %196 = sub nsw i32 %195, 13
  %197 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %10, i32 0, i32 4
  store i32 %196, ptr %197, align 8, !tbaa !34
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.round.f64(double) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{!14, !12, i64 48}
!14 = !{!"_ZTS16ctrNeuralNetwork", !15, i64 0, !12, i64 48, !12, i64 56, !12, i64 64, !10, i64 72, !16, i64 80, !20, i64 104, !24, i64 128, !24, i64 152, !24, i64 176}
!15 = !{!"_ZTS10controller", !7, i64 8, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !10, i64 40, !10, i64 44}
!16 = !{!"_ZTSSt6vectorIiSaIiEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!14, !12, i64 56}
!29 = !{!14, !12, i64 64}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = distinct !{!32, !31}
!33 = distinct !{!33, !31}
!34 = !{!14, !10, i64 72}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16ctrNeuralNetwork9setValuesERSt6vectorIdSaIdEE(ptr noundef nonnull align 8 dereferenceable(200) %0, ptr noundef nonnull align 8 dereferenceable(24) %1) unnamed_addr #1 align 2 {
  %3 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #3
  %4 = load double, ptr %3, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 48
  store double %4, ptr %5, align 8, !tbaa !9
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 1) #3
  %7 = load double, ptr %6, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 56
  store double %7, ptr %8, align 8, !tbaa !26
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 2) #3
  %10 = load double, ptr %9, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 64
  store double %10, ptr %11, align 8, !tbaa !27
  %12 = getelementptr inbounds i8, ptr %0, i64 80
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 3) #3
  %14 = load double, ptr %13, align 8, !tbaa !5
  %15 = tail call double @llvm.round.f64(double %14)
  %16 = fptoui double %15 to i64
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %16)
  %17 = getelementptr inbounds i8, ptr %0, i64 128
  %18 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  tail call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %18)
  %19 = getelementptr inbounds i8, ptr %0, i64 152
  %20 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  tail call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %20)
  %21 = getelementptr inbounds i8, ptr %0, i64 176
  %22 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  tail call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %22)
  %23 = getelementptr inbounds i8, ptr %0, i64 104
  %24 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  tail call void @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %24)
  %25 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  %.not55 = icmp eq i64 %25, 0
  br i1 %.not55, label %._crit_edge54, label %.lr.ph53

._crit_edge54:                                    ; preds = %._crit_edge, %2
  %26 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef 0) #3
  %27 = load i32, ptr %26, align 4, !tbaa !28
  %28 = add nsw i32 %27, -13
  %29 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 %28, ptr %29, align 8, !tbaa !29
  ret void

.lr.ph53:                                         ; preds = %2, %._crit_edge
  %30 = phi i64 [ %70, %._crit_edge ], [ 0, %2 ]
  %.04151 = phi i32 [ %69, %._crit_edge ], [ 0, %2 ]
  %.04250 = phi i32 [ %.1.lcssa, %._crit_edge ], [ 4, %2 ]
  %31 = add i32 %.04250, 1
  %32 = sext i32 %.04250 to i64
  %33 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %32) #3
  %34 = load double, ptr %33, align 8, !tbaa !5
  %35 = tail call double @llvm.round.f64(double %34)
  %36 = fptosi double %35 to i32
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  store i32 %36, ptr %37, align 4, !tbaa !28
  %38 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %30) #3
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  %40 = load i32, ptr %39, align 4, !tbaa !28
  %41 = sext i32 %40 to i64
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %41)
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %30) #3
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  %44 = load i32, ptr %43, align 4, !tbaa !28
  %45 = sext i32 %44 to i64
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %45)
  %46 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %30) #3
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  %48 = load i32, ptr %47, align 4, !tbaa !28
  %49 = sext i32 %48 to i64
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %49)
  %50 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %30) #3
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  %52 = load i32, ptr %51, align 4, !tbaa !28
  %53 = sext i32 %52 to i64
  tail call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %53)
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  %55 = load i32, ptr %54, align 4, !tbaa !28
  %56 = icmp sgt i32 %55, 0
  br i1 %56, label %.lr.ph48, label %._crit_edge

.lr.ph48:                                         ; preds = %.lr.ph53
  %.not = icmp eq i32 %.04151, 0
  %57 = add nsw i32 %.04151, -1
  %58 = sext i32 %57 to i64
  br i1 %.not, label %.lr.ph48.split.us.preheader, label %.lr.ph48.split

.lr.ph48.split.us.preheader:                      ; preds = %.lr.ph48
  %59 = sext i32 %31 to i64
  br label %.lr.ph48.split.us

.lr.ph48.split.us:                                ; preds = %.lr.ph48.split.us.preheader, %.lr.ph48.split.us
  %indvars.iv68 = phi i64 [ %59, %.lr.ph48.split.us.preheader ], [ %indvars.iv.next69, %.lr.ph48.split.us ]
  %indvars.iv66 = phi i64 [ 0, %.lr.ph48.split.us.preheader ], [ %indvars.iv.next67, %.lr.ph48.split.us ]
  %indvars.iv.next69 = add nsw i64 %indvars.iv68, 1
  %60 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv68) #3
  %61 = load double, ptr %60, align 8, !tbaa !5
  %62 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %30) #3
  %63 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %indvars.iv66) #3
  store double %61, ptr %63, align 8, !tbaa !5
  %indvars.iv.next67 = add nuw nsw i64 %indvars.iv66, 1
  %64 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  %65 = load i32, ptr %64, align 4, !tbaa !28
  %66 = sext i32 %65 to i64
  %67 = icmp slt i64 %indvars.iv.next67, %66
  br i1 %67, label %.lr.ph48.split.us, label %._crit_edge.loopexit, !llvm.loop !30

._crit_edge.loopexit:                             ; preds = %.lr.ph48.split.us
  %68 = trunc nsw i64 %indvars.iv.next69 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %.loopexit, %._crit_edge.loopexit, %.lr.ph53
  %.1.lcssa = phi i32 [ %31, %.lr.ph53 ], [ %68, %._crit_edge.loopexit ], [ %.2.lcssa, %.loopexit ]
  %69 = add i32 %.04151, 1
  %70 = zext nneg i32 %69 to i64
  %71 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %12) #3
  %72 = icmp ugt i64 %71, %70
  br i1 %72, label %.lr.ph53, label %._crit_edge54, !llvm.loop !32

.lr.ph48.split:                                   ; preds = %.lr.ph48, %.loopexit
  %indvars.iv63 = phi i64 [ %indvars.iv.next64, %.loopexit ], [ 0, %.lr.ph48 ]
  %.146 = phi i32 [ %.2.lcssa, %.loopexit ], [ %31, %.lr.ph48 ]
  %73 = add i32 %.146, 1
  %74 = sext i32 %.146 to i64
  %75 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %74) #3
  %76 = load double, ptr %75, align 8, !tbaa !5
  %77 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %30) #3
  %78 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %indvars.iv63) #3
  store double %76, ptr %78, align 8, !tbaa !5
  %79 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %30) #3
  %80 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %79, i64 noundef %indvars.iv63) #3
  %81 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %58) #3
  %82 = load i32, ptr %81, align 4, !tbaa !28
  %83 = sext i32 %82 to i64
  tail call void @_ZNSt6vectorIdSaIdEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %83)
  %84 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %58) #3
  %85 = load i32, ptr %84, align 4, !tbaa !28
  %86 = icmp sgt i32 %85, 0
  br i1 %86, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %.lr.ph48.split
  %87 = sext i32 %73 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv58 = phi i64 [ %87, %.lr.ph.preheader ], [ %indvars.iv.next59, %.lr.ph ]
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %indvars.iv.next59 = add nsw i64 %indvars.iv58, 1
  %88 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %indvars.iv58) #3
  %89 = load double, ptr %88, align 8, !tbaa !5
  %90 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %30) #3
  %91 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %90, i64 noundef %indvars.iv63) #3
  %92 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %indvars.iv) #3
  store double %89, ptr %92, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %93 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %58) #3
  %94 = load i32, ptr %93, align 4, !tbaa !28
  %95 = sext i32 %94 to i64
  %96 = icmp slt i64 %indvars.iv.next, %95
  br i1 %96, label %.lr.ph, label %.loopexit.loopexit, !llvm.loop !33

.loopexit.loopexit:                               ; preds = %.lr.ph
  %97 = trunc nsw i64 %indvars.iv.next59 to i32
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %.lr.ph48.split
  %.2.lcssa = phi i32 [ %73, %.lr.ph48.split ], [ %97, %.loopexit.loopexit ]
  %indvars.iv.next64 = add nuw nsw i64 %indvars.iv63, 1
  %98 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %30) #3
  %99 = load i32, ptr %98, align 4, !tbaa !28
  %100 = sext i32 %99 to i64
  %101 = icmp slt i64 %indvars.iv.next64, %100
  br i1 %101, label %.lr.ph48.split, label %._crit_edge, !llvm.loop !30
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.round.f64(double) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 48}
!10 = !{!"_ZTS16ctrNeuralNetwork", !11, i64 0, !6, i64 48, !6, i64 56, !6, i64 64, !12, i64 72, !13, i64 80, !18, i64 104, !22, i64 128, !22, i64 152, !22, i64 176}
!11 = !{!"_ZTS10controller", !7, i64 8, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !12, i64 40, !12, i64 44}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!17 = !{!"any pointer", !7, i64 0}
!18 = !{!"_ZTSSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!22 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!26 = !{!10, !6, i64 56}
!27 = !{!10, !6, i64 64}
!28 = !{!12, !12, i64 0}
!29 = !{!10, !12, i64 72}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = distinct !{!32, !31}
!33 = distinct !{!33, !31}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass