; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/commands (mcp4725_cmd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gpio_command_params = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i32, %union.anon, i16, i32, i8, i8, i8, [264 x i8], i32, i32, i32, i32, i32, i32, i32, i32, float }
%union.anon = type { [16 x i32] }

@.str = external hidden unnamed_addr constant [15 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [1 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @dh_handle_devices_mcp4725_write(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca %struct.gpio_command_params, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 408, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %16 = load ptr, ptr %7, align 8, !tbaa !5
  %17 = load i32, ptr %8, align 4, !tbaa !9
  %18 = call ptr @parse_params_pins_set(ptr noundef %16, i32 noundef %17, ptr noundef %9, i32 noundef 1, i32 noundef 0, i32 noundef 37240832, ptr noundef %10)
  store ptr %18, ptr %11, align 8, !tbaa !5
  %19 = load ptr, ptr %11, align 8, !tbaa !5
  %20 = icmp ne ptr %19, null
  br i1 %20, label %21, label %24

21:                                               ; preds = %4
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = load ptr, ptr %11, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %22, ptr noundef %23)
  store i32 1, ptr %12, align 4
  br label %80

24:                                               ; preds = %4
  %25 = getelementptr inbounds %struct.gpio_command_params, ptr %9, i32 0, i32 14
  %26 = load i16, ptr %25, align 4, !tbaa !11
  %27 = zext i16 %26 to i32
  %28 = icmp ne i32 %27, 1
  br i1 %28, label %29, label %31

29:                                               ; preds = %24
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %30, ptr noundef @.str)
  store i32 1, ptr %12, align 4
  br label %80

31:                                               ; preds = %24
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = and i32 %32, 524288
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %38

35:                                               ; preds = %31
  %36 = getelementptr inbounds %struct.gpio_command_params, ptr %9, i32 0, i32 22
  %37 = load i32, ptr %36, align 4, !tbaa !15
  call void @mcp4725_set_address(i32 noundef %37)
  br label %38

38:                                               ; preds = %35, %31
  %39 = load i32, ptr %10, align 4, !tbaa !9
  %40 = and i32 %39, 33554432
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %57

42:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %43 = getelementptr inbounds %struct.gpio_command_params, ptr %9, i32 0, i32 28
  %44 = load float, ptr %43, align 4, !tbaa !16
  %45 = call i32 @mcp4725_set_vref(float noundef %44)
  store i32 %45, ptr %13, align 4, !tbaa !9
  %46 = load i32, ptr %13, align 4, !tbaa !9
  %47 = call ptr @dh_i2c_error_string(i32 noundef %46)
  store ptr %47, ptr %11, align 8, !tbaa !5
  %48 = load ptr, ptr %11, align 8, !tbaa !5
  %49 = icmp ne ptr %48, null
  br i1 %49, label %50, label %53

50:                                               ; preds = %42
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = load ptr, ptr %11, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %51, ptr noundef %52)
  store i32 1, ptr %12, align 4
  br label %54

53:                                               ; preds = %42
  store i32 0, ptr %12, align 4
  br label %54

54:                                               ; preds = %53, %50
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  %55 = load i32, ptr %12, align 4
  switch i32 %55, label %80 [
    i32 0, label %56
  ]

56:                                               ; preds = %54
  br label %57

57:                                               ; preds = %56, %38
  %58 = load i32, ptr %10, align 4, !tbaa !9
  %59 = or i32 %58, 524288
  store i32 %59, ptr %10, align 4, !tbaa !9
  %60 = load ptr, ptr %5, align 8, !tbaa !5
  %61 = load i32, ptr %10, align 4, !tbaa !9
  %62 = call i32 @dh_i2c_init_helper(ptr noundef %60, i32 noundef %61, ptr noundef %9)
  %63 = icmp ne i32 %62, 0
  br i1 %63, label %64, label %65

64:                                               ; preds = %57
  store i32 1, ptr %12, align 4
  br label %80

65:                                               ; preds = %57
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %66 = getelementptr inbounds %struct.gpio_command_params, ptr %9, i32 0, i32 13
  %67 = getelementptr inbounds [16 x float], ptr %66, i64 0, i64 0
  %68 = load float, ptr %67, align 4, !tbaa !17
  %69 = call i32 @mcp4725_write(i32 noundef -1, i32 noundef -1, float noundef %68)
  store i32 %69, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %70 = load i32, ptr %14, align 4, !tbaa !9
  %71 = call ptr @dh_i2c_error_string(i32 noundef %70)
  store ptr %71, ptr %15, align 8, !tbaa !5
  %72 = load ptr, ptr %15, align 8, !tbaa !5
  %73 = icmp ne ptr %72, null
  br i1 %73, label %74, label %77

74:                                               ; preds = %65
  %75 = load ptr, ptr %5, align 8, !tbaa !5
  %76 = load ptr, ptr %15, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %75, ptr noundef %76)
  br label %79

77:                                               ; preds = %65
  %78 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dh_command_done(ptr noundef %78, ptr noundef @.str.1)
  br label %79

79:                                               ; preds = %77, %74
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  store i32 0, ptr %12, align 4
  br label %80

80:                                               ; preds = %79, %64, %54, %29, %21
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 408, ptr %9) #3
  %81 = load i32, ptr %12, align 4
  switch i32 %81, label %83 [
    i32 0, label %82
    i32 1, label %82
  ]

82:                                               ; preds = %80, %80
  ret void

83:                                               ; preds = %80
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @parse_params_pins_set(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) #2

declare void @dh_command_fail(ptr noundef, ptr noundef) #2

declare void @mcp4725_set_address(i32 noundef) #2

declare i32 @mcp4725_set_vref(float noundef) #2

declare ptr @dh_i2c_error_string(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init_helper(ptr noundef, i32 noundef, ptr noundef) #2

declare i32 @mcp4725_write(i32 noundef, i32 noundef, float noundef) #2

declare void @dh_command_done(ptr noundef, ptr noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 96}
!12 = !{!"", !13, i64 0, !13, i64 2, !13, i64 4, !13, i64 6, !13, i64 8, !13, i64 10, !13, i64 12, !13, i64 14, !13, i64 16, !13, i64 18, !13, i64 20, !10, i64 24, !10, i64 28, !7, i64 32, !13, i64 96, !10, i64 100, !7, i64 104, !7, i64 105, !7, i64 106, !7, i64 107, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !14, i64 404}
!13 = !{!"short", !7, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = !{!12, !10, i64 380}
!16 = !{!12, !14, i64 404}
!17 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gpio_command_params = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i32, %union.anon, i16, i32, i8, i8, i8, [264 x i8], i32, i32, i32, i32, i32, i32, i32, i32, float }
%union.anon = type { [16 x i32] }

@.str = external hidden unnamed_addr constant [15 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [1 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @dh_handle_devices_mcp4725_write(ptr noundef %0, ptr nocapture noundef readnone %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca %struct.gpio_command_params, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 408, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  %7 = call ptr @parse_params_pins_set(ptr noundef %2, i32 noundef %3, ptr noundef nonnull %5, i32 noundef 1, i32 noundef 0, i32 noundef 37240832, ptr noundef nonnull %6) #3
  %.not = icmp eq ptr %7, null
  br i1 %.not, label %9, label %8

8:                                                ; preds = %4
  call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull %7) #3
  br label %38

9:                                                ; preds = %4
  %10 = getelementptr inbounds i8, ptr %5, i64 96
  %11 = load i16, ptr %10, align 4, !tbaa !9
  %.not19 = icmp eq i16 %11, 1
  br i1 %.not19, label %13, label %12

12:                                               ; preds = %9
  call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull @.str) #3
  br label %38

13:                                               ; preds = %9
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = and i32 %14, 524288
  %.not20 = icmp eq i32 %15, 0
  br i1 %.not20, label %19, label %16

16:                                               ; preds = %13
  %17 = getelementptr inbounds i8, ptr %5, i64 380
  %18 = load i32, ptr %17, align 4, !tbaa !13
  call void @mcp4725_set_address(i32 noundef %18) #3
  %.pre = load i32, ptr %6, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %16, %13
  %20 = phi i32 [ %.pre, %16 ], [ %14, %13 ]
  %21 = and i32 %20, 33554432
  %.not21 = icmp eq i32 %21, 0
  br i1 %.not21, label %.critedge, label %22

22:                                               ; preds = %19
  %23 = getelementptr inbounds i8, ptr %5, i64 404
  %24 = load float, ptr %23, align 4, !tbaa !14
  %25 = call i32 @mcp4725_set_vref(float noundef %24) #3
  %26 = call ptr @dh_i2c_error_string(i32 noundef %25) #3
  %.not22 = icmp eq ptr %26, null
  br i1 %.not22, label %..critedge_crit_edge, label %27

..critedge_crit_edge:                             ; preds = %22
  %.pre25 = load i32, ptr %6, align 4, !tbaa !5
  br label %.critedge

27:                                               ; preds = %22
  call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull %26) #3
  br label %38

.critedge:                                        ; preds = %..critedge_crit_edge, %19
  %28 = phi i32 [ %.pre25, %..critedge_crit_edge ], [ %20, %19 ]
  %29 = or i32 %28, 524288
  store i32 %29, ptr %6, align 4, !tbaa !5
  %30 = call i32 @dh_i2c_init_helper(ptr noundef %0, i32 noundef %29, ptr noundef nonnull %5) #3
  %.not23 = icmp eq i32 %30, 0
  br i1 %.not23, label %31, label %38

31:                                               ; preds = %.critedge
  %32 = getelementptr inbounds i8, ptr %5, i64 32
  %33 = load float, ptr %32, align 4, !tbaa !15
  %34 = call i32 @mcp4725_write(i32 noundef -1, i32 noundef -1, float noundef %33) #3
  %35 = call ptr @dh_i2c_error_string(i32 noundef %34) #3
  %.not24 = icmp eq ptr %35, null
  br i1 %.not24, label %37, label %36

36:                                               ; preds = %31
  call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull %35) #3
  br label %38

37:                                               ; preds = %31
  call void @dh_command_done(ptr noundef %0, ptr noundef nonnull @.str.1) #3
  br label %38

38:                                               ; preds = %27, %36, %37, %.critedge, %12, %8
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 408, ptr nonnull %5) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare ptr @parse_params_pins_set(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare void @dh_command_fail(ptr noundef, ptr noundef) local_unnamed_addr #2

declare void @mcp4725_set_address(i32 noundef) local_unnamed_addr #2

declare i32 @mcp4725_set_vref(float noundef) local_unnamed_addr #2

declare ptr @dh_i2c_error_string(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init_helper(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

declare i32 @mcp4725_write(i32 noundef, i32 noundef, float noundef) local_unnamed_addr #2

declare void @dh_command_done(ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 96}
!10 = !{!"", !11, i64 0, !11, i64 2, !11, i64 4, !11, i64 6, !11, i64 8, !11, i64 10, !11, i64 12, !11, i64 14, !11, i64 16, !11, i64 18, !11, i64 20, !6, i64 24, !6, i64 28, !7, i64 32, !11, i64 96, !6, i64 100, !7, i64 104, !7, i64 105, !7, i64 106, !7, i64 107, !6, i64 372, !6, i64 376, !6, i64 380, !6, i64 384, !6, i64 388, !6, i64 392, !6, i64 396, !6, i64 400, !12, i64 404}
!11 = !{!"short", !7, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!10, !6, i64 380}
!14 = !{!10, !12, i64 404}
!15 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass