; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/Oil Deposits - UVA/main.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %5 = load i32, ptr %3, align 4, !tbaa !5
  %6 = sext i32 %5 to i64
  %7 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %6) #2
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %9) #2
  %11 = load i8, ptr %10, align 1, !tbaa !9
  %12 = sext i8 %11 to i32
  %13 = icmp eq i32 %12, 64
  br i1 %13, label %14, label %302

14:                                               ; preds = %2
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %16) #2
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %19) #2
  store i32 1, ptr %20, align 4, !tbaa !5
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = sub nsw i32 %21, 1
  %23 = icmp sge i32 %22, 0
  br i1 %23, label %24, label %49

24:                                               ; preds = %14
  %25 = load i32, ptr %3, align 4, !tbaa !5
  %26 = sub nsw i32 %25, 1
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %27) #2
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %30) #2
  %32 = load i8, ptr %31, align 1, !tbaa !9
  %33 = sext i8 %32 to i32
  %34 = icmp eq i32 %33, 64
  br i1 %34, label %35, label %49

35:                                               ; preds = %24
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = sub nsw i32 %36, 1
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %38) #2
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #2
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %49, label %45

45:                                               ; preds = %35
  %46 = load i32, ptr %3, align 4, !tbaa !5
  %47 = sub nsw i32 %46, 1
  %48 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %47, i32 noundef %48)
  br label %49

49:                                               ; preds = %45, %35, %24, %14
  %50 = load i32, ptr %3, align 4, !tbaa !5
  %51 = add nsw i32 %50, 1
  %52 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %53 = trunc i64 %52 to i32
  %54 = icmp slt i32 %51, %53
  br i1 %54, label %55, label %80

55:                                               ; preds = %49
  %56 = load i32, ptr %3, align 4, !tbaa !5
  %57 = add nsw i32 %56, 1
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %58) #2
  %60 = load i32, ptr %4, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %61) #2
  %63 = load i8, ptr %62, align 1, !tbaa !9
  %64 = sext i8 %63 to i32
  %65 = icmp eq i32 %64, 64
  br i1 %65, label %66, label %80

66:                                               ; preds = %55
  %67 = load i32, ptr %3, align 4, !tbaa !5
  %68 = add nsw i32 %67, 1
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %69) #2
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %72) #2
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = icmp ne i32 %74, 0
  br i1 %75, label %80, label %76

76:                                               ; preds = %66
  %77 = load i32, ptr %3, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  %79 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %78, i32 noundef %79)
  br label %80

80:                                               ; preds = %76, %66, %55, %49
  %81 = load i32, ptr %4, align 4, !tbaa !5
  %82 = sub nsw i32 %81, 1
  %83 = icmp sge i32 %82, 0
  br i1 %83, label %84, label %109

84:                                               ; preds = %80
  %85 = load i32, ptr %3, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %86) #2
  %88 = load i32, ptr %4, align 4, !tbaa !5
  %89 = sub nsw i32 %88, 1
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %87, i64 noundef %90) #2
  %92 = load i8, ptr %91, align 1, !tbaa !9
  %93 = sext i8 %92 to i32
  %94 = icmp eq i32 %93, 64
  br i1 %94, label %95, label %109

95:                                               ; preds = %84
  %96 = load i32, ptr %3, align 4, !tbaa !5
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %97) #2
  %99 = load i32, ptr %4, align 4, !tbaa !5
  %100 = sub nsw i32 %99, 1
  %101 = sext i32 %100 to i64
  %102 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %101) #2
  %103 = load i32, ptr %102, align 4, !tbaa !5
  %104 = icmp ne i32 %103, 0
  br i1 %104, label %109, label %105

105:                                              ; preds = %95
  %106 = load i32, ptr %3, align 4, !tbaa !5
  %107 = load i32, ptr %4, align 4, !tbaa !5
  %108 = sub nsw i32 %107, 1
  call void @_Z3dfsii(i32 noundef %106, i32 noundef %108)
  br label %109

109:                                              ; preds = %105, %95, %84, %80
  %110 = load i32, ptr %4, align 4, !tbaa !5
  %111 = add nsw i32 %110, 1
  %112 = load i32, ptr %3, align 4, !tbaa !5
  %113 = sext i32 %112 to i64
  %114 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %113) #2
  %115 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %114) #2
  %116 = trunc i64 %115 to i32
  %117 = icmp slt i32 %111, %116
  br i1 %117, label %118, label %143

118:                                              ; preds = %109
  %119 = load i32, ptr %3, align 4, !tbaa !5
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %120) #2
  %122 = load i32, ptr %4, align 4, !tbaa !5
  %123 = add nsw i32 %122, 1
  %124 = sext i32 %123 to i64
  %125 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %121, i64 noundef %124) #2
  %126 = load i8, ptr %125, align 1, !tbaa !9
  %127 = sext i8 %126 to i32
  %128 = icmp eq i32 %127, 64
  br i1 %128, label %129, label %143

129:                                              ; preds = %118
  %130 = load i32, ptr %3, align 4, !tbaa !5
  %131 = sext i32 %130 to i64
  %132 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %131) #2
  %133 = load i32, ptr %4, align 4, !tbaa !5
  %134 = add nsw i32 %133, 1
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %132, i64 noundef %135) #2
  %137 = load i32, ptr %136, align 4, !tbaa !5
  %138 = icmp ne i32 %137, 0
  br i1 %138, label %143, label %139

139:                                              ; preds = %129
  %140 = load i32, ptr %3, align 4, !tbaa !5
  %141 = load i32, ptr %4, align 4, !tbaa !5
  %142 = add nsw i32 %141, 1
  call void @_Z3dfsii(i32 noundef %140, i32 noundef %142)
  br label %143

143:                                              ; preds = %139, %129, %118, %109
  %144 = load i32, ptr %3, align 4, !tbaa !5
  %145 = sub nsw i32 %144, 1
  %146 = icmp sge i32 %145, 0
  br i1 %146, label %147, label %179

147:                                              ; preds = %143
  %148 = load i32, ptr %4, align 4, !tbaa !5
  %149 = sub nsw i32 %148, 1
  %150 = icmp sge i32 %149, 0
  br i1 %150, label %151, label %179

151:                                              ; preds = %147
  %152 = load i32, ptr %3, align 4, !tbaa !5
  %153 = sub nsw i32 %152, 1
  %154 = sext i32 %153 to i64
  %155 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %154) #2
  %156 = load i32, ptr %4, align 4, !tbaa !5
  %157 = sub nsw i32 %156, 1
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %155, i64 noundef %158) #2
  %160 = load i8, ptr %159, align 1, !tbaa !9
  %161 = sext i8 %160 to i32
  %162 = icmp eq i32 %161, 64
  br i1 %162, label %163, label %179

163:                                              ; preds = %151
  %164 = load i32, ptr %3, align 4, !tbaa !5
  %165 = sub nsw i32 %164, 1
  %166 = sext i32 %165 to i64
  %167 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %166) #2
  %168 = load i32, ptr %4, align 4, !tbaa !5
  %169 = sub nsw i32 %168, 1
  %170 = sext i32 %169 to i64
  %171 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %167, i64 noundef %170) #2
  %172 = load i32, ptr %171, align 4, !tbaa !5
  %173 = icmp ne i32 %172, 0
  br i1 %173, label %179, label %174

174:                                              ; preds = %163
  %175 = load i32, ptr %3, align 4, !tbaa !5
  %176 = sub nsw i32 %175, 1
  %177 = load i32, ptr %4, align 4, !tbaa !5
  %178 = sub nsw i32 %177, 1
  call void @_Z3dfsii(i32 noundef %176, i32 noundef %178)
  br label %179

179:                                              ; preds = %174, %163, %151, %147, %143
  %180 = load i32, ptr %3, align 4, !tbaa !5
  %181 = sub nsw i32 %180, 1
  %182 = icmp sge i32 %181, 0
  br i1 %182, label %183, label %220

183:                                              ; preds = %179
  %184 = load i32, ptr %4, align 4, !tbaa !5
  %185 = add nsw i32 %184, 1
  %186 = load i32, ptr %3, align 4, !tbaa !5
  %187 = sext i32 %186 to i64
  %188 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %187) #2
  %189 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %188) #2
  %190 = trunc i64 %189 to i32
  %191 = icmp slt i32 %185, %190
  br i1 %191, label %192, label %220

192:                                              ; preds = %183
  %193 = load i32, ptr %3, align 4, !tbaa !5
  %194 = sub nsw i32 %193, 1
  %195 = sext i32 %194 to i64
  %196 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %195) #2
  %197 = load i32, ptr %4, align 4, !tbaa !5
  %198 = add nsw i32 %197, 1
  %199 = sext i32 %198 to i64
  %200 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %196, i64 noundef %199) #2
  %201 = load i8, ptr %200, align 1, !tbaa !9
  %202 = sext i8 %201 to i32
  %203 = icmp eq i32 %202, 64
  br i1 %203, label %204, label %220

204:                                              ; preds = %192
  %205 = load i32, ptr %3, align 4, !tbaa !5
  %206 = sub nsw i32 %205, 1
  %207 = sext i32 %206 to i64
  %208 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %207) #2
  %209 = load i32, ptr %4, align 4, !tbaa !5
  %210 = add nsw i32 %209, 1
  %211 = sext i32 %210 to i64
  %212 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %208, i64 noundef %211) #2
  %213 = load i32, ptr %212, align 4, !tbaa !5
  %214 = icmp ne i32 %213, 0
  br i1 %214, label %220, label %215

215:                                              ; preds = %204
  %216 = load i32, ptr %3, align 4, !tbaa !5
  %217 = sub nsw i32 %216, 1
  %218 = load i32, ptr %4, align 4, !tbaa !5
  %219 = add nsw i32 %218, 1
  call void @_Z3dfsii(i32 noundef %217, i32 noundef %219)
  br label %220

220:                                              ; preds = %215, %204, %192, %183, %179
  %221 = load i32, ptr %3, align 4, !tbaa !5
  %222 = add nsw i32 %221, 1
  %223 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %224 = trunc i64 %223 to i32
  %225 = icmp slt i32 %222, %224
  br i1 %225, label %226, label %258

226:                                              ; preds = %220
  %227 = load i32, ptr %4, align 4, !tbaa !5
  %228 = sub nsw i32 %227, 1
  %229 = icmp sge i32 %228, 0
  br i1 %229, label %230, label %258

230:                                              ; preds = %226
  %231 = load i32, ptr %3, align 4, !tbaa !5
  %232 = add nsw i32 %231, 1
  %233 = sext i32 %232 to i64
  %234 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %233) #2
  %235 = load i32, ptr %4, align 4, !tbaa !5
  %236 = sub nsw i32 %235, 1
  %237 = sext i32 %236 to i64
  %238 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %234, i64 noundef %237) #2
  %239 = load i8, ptr %238, align 1, !tbaa !9
  %240 = sext i8 %239 to i32
  %241 = icmp eq i32 %240, 64
  br i1 %241, label %242, label %258

242:                                              ; preds = %230
  %243 = load i32, ptr %3, align 4, !tbaa !5
  %244 = add nsw i32 %243, 1
  %245 = sext i32 %244 to i64
  %246 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %245) #2
  %247 = load i32, ptr %4, align 4, !tbaa !5
  %248 = sub nsw i32 %247, 1
  %249 = sext i32 %248 to i64
  %250 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %246, i64 noundef %249) #2
  %251 = load i32, ptr %250, align 4, !tbaa !5
  %252 = icmp ne i32 %251, 0
  br i1 %252, label %258, label %253

253:                                              ; preds = %242
  %254 = load i32, ptr %3, align 4, !tbaa !5
  %255 = add nsw i32 %254, 1
  %256 = load i32, ptr %4, align 4, !tbaa !5
  %257 = sub nsw i32 %256, 1
  call void @_Z3dfsii(i32 noundef %255, i32 noundef %257)
  br label %258

258:                                              ; preds = %253, %242, %230, %226, %220
  %259 = load i32, ptr %3, align 4, !tbaa !5
  %260 = add nsw i32 %259, 1
  %261 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #2
  %262 = trunc i64 %261 to i32
  %263 = icmp slt i32 %260, %262
  br i1 %263, label %264, label %301

264:                                              ; preds = %258
  %265 = load i32, ptr %4, align 4, !tbaa !5
  %266 = add nsw i32 %265, 1
  %267 = load i32, ptr %3, align 4, !tbaa !5
  %268 = sext i32 %267 to i64
  %269 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %268) #2
  %270 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %269) #2
  %271 = trunc i64 %270 to i32
  %272 = icmp slt i32 %266, %271
  br i1 %272, label %273, label %301

273:                                              ; preds = %264
  %274 = load i32, ptr %3, align 4, !tbaa !5
  %275 = add nsw i32 %274, 1
  %276 = sext i32 %275 to i64
  %277 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %276) #2
  %278 = load i32, ptr %4, align 4, !tbaa !5
  %279 = add nsw i32 %278, 1
  %280 = sext i32 %279 to i64
  %281 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %277, i64 noundef %280) #2
  %282 = load i8, ptr %281, align 1, !tbaa !9
  %283 = sext i8 %282 to i32
  %284 = icmp eq i32 %283, 64
  br i1 %284, label %285, label %301

285:                                              ; preds = %273
  %286 = load i32, ptr %3, align 4, !tbaa !5
  %287 = add nsw i32 %286, 1
  %288 = sext i32 %287 to i64
  %289 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %288) #2
  %290 = load i32, ptr %4, align 4, !tbaa !5
  %291 = add nsw i32 %290, 1
  %292 = sext i32 %291 to i64
  %293 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %289, i64 noundef %292) #2
  %294 = load i32, ptr %293, align 4, !tbaa !5
  %295 = icmp ne i32 %294, 0
  br i1 %295, label %301, label %296

296:                                              ; preds = %285
  %297 = load i32, ptr %3, align 4, !tbaa !5
  %298 = add nsw i32 %297, 1
  %299 = load i32, ptr %4, align 4, !tbaa !5
  %300 = add nsw i32 %299, 1
  call void @_Z3dfsii(i32 noundef %298, i32 noundef %300)
  br label %301

301:                                              ; preds = %296, %285, %273, %264, %258
  br label %302

302:                                              ; preds = %301, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vis = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = sext i32 %1 to i64
  br label %tailrecurse

tailrecurse:                                      ; preds = %134, %2
  %indvars.iv89 = phi i64 [ %indvars.iv.next90, %134 ], [ %4, %2 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %134 ], [ %3, %2 ]
  %5 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %6 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv89) #1
  %7 = load i8, ptr %6, align 1, !tbaa !5
  %8 = icmp eq i8 %7, 64
  br i1 %8, label %9, label %138

9:                                                ; preds = %tailrecurse
  %10 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %indvars.iv89) #1
  store i32 1, ptr %11, align 4, !tbaa !8
  %12 = add nsw i64 %indvars.iv, -1
  %13 = icmp slt i64 %indvars.iv, 1
  br i1 %13, label %26, label %14

14:                                               ; preds = %9
  %15 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %12) #1
  %16 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %15, i64 noundef %indvars.iv89) #1
  %17 = load i8, ptr %16, align 1, !tbaa !5
  %18 = icmp eq i8 %17, 64
  br i1 %18, label %19, label %26

19:                                               ; preds = %14
  %20 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %12) #1
  %21 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv89) #1
  %22 = load i32, ptr %21, align 4, !tbaa !8
  %.not = icmp eq i32 %22, 0
  br i1 %.not, label %23, label %26

23:                                               ; preds = %19
  %24 = trunc nsw i64 %12 to i32
  %25 = trunc nsw i64 %indvars.iv89 to i32
  tail call void @_Z3dfsii(i32 noundef %24, i32 noundef %25)
  br label %26

26:                                               ; preds = %23, %19, %14, %9
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %27 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %sext = shl i64 %27, 32
  %28 = ashr exact i64 %sext, 32
  %29 = icmp slt i64 %indvars.iv.next, %28
  br i1 %29, label %30, label %42

30:                                               ; preds = %26
  %31 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next) #1
  %32 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %indvars.iv89) #1
  %33 = load i8, ptr %32, align 1, !tbaa !5
  %34 = icmp eq i8 %33, 64
  br i1 %34, label %35, label %42

35:                                               ; preds = %30
  %36 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv.next) #1
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %indvars.iv89) #1
  %38 = load i32, ptr %37, align 4, !tbaa !8
  %.not76 = icmp eq i32 %38, 0
  br i1 %.not76, label %39, label %42

39:                                               ; preds = %35
  %40 = trunc nsw i64 %indvars.iv.next to i32
  %41 = trunc nsw i64 %indvars.iv89 to i32
  tail call void @_Z3dfsii(i32 noundef %40, i32 noundef %41)
  br label %42

42:                                               ; preds = %39, %35, %30, %26
  %43 = add nsw i64 %indvars.iv89, -1
  %44 = icmp slt i64 %indvars.iv89, 1
  br i1 %44, label %57, label %45

45:                                               ; preds = %42
  %46 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %47 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %46, i64 noundef %43) #1
  %48 = load i8, ptr %47, align 1, !tbaa !5
  %49 = icmp eq i8 %48, 64
  br i1 %49, label %50, label %57

50:                                               ; preds = %45
  %51 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %43) #1
  %53 = load i32, ptr %52, align 4, !tbaa !8
  %.not77 = icmp eq i32 %53, 0
  br i1 %.not77, label %54, label %57

54:                                               ; preds = %50
  %55 = trunc nsw i64 %indvars.iv to i32
  %56 = trunc nsw i64 %43 to i32
  tail call void @_Z3dfsii(i32 noundef %55, i32 noundef %56)
  br label %57

57:                                               ; preds = %54, %50, %45, %42
  %indvars.iv.next90 = add nsw i64 %indvars.iv89, 1
  %58 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %59 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %58) #1
  %sext94 = shl i64 %59, 32
  %60 = ashr exact i64 %sext94, 32
  %61 = icmp slt i64 %indvars.iv.next90, %60
  br i1 %61, label %62, label %74

62:                                               ; preds = %57
  %63 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %64 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %indvars.iv.next90) #1
  %65 = load i8, ptr %64, align 1, !tbaa !5
  %66 = icmp eq i8 %65, 64
  br i1 %66, label %67, label %74

67:                                               ; preds = %62
  %68 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv) #1
  %69 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %indvars.iv.next90) #1
  %70 = load i32, ptr %69, align 4, !tbaa !8
  %.not78 = icmp eq i32 %70, 0
  br i1 %.not78, label %71, label %74

71:                                               ; preds = %67
  %72 = trunc nsw i64 %indvars.iv to i32
  %73 = trunc nsw i64 %indvars.iv.next90 to i32
  tail call void @_Z3dfsii(i32 noundef %72, i32 noundef %73)
  br label %74

74:                                               ; preds = %71, %67, %62, %57
  %brmerge = or i1 %13, %44
  br i1 %brmerge, label %87, label %75

75:                                               ; preds = %74
  %76 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %12) #1
  %77 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %43) #1
  %78 = load i8, ptr %77, align 1, !tbaa !5
  %79 = icmp eq i8 %78, 64
  br i1 %79, label %80, label %.thread

80:                                               ; preds = %75
  %81 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %12) #1
  %82 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %43) #1
  %83 = load i32, ptr %82, align 4, !tbaa !8
  %.not79 = icmp eq i32 %83, 0
  br i1 %.not79, label %84, label %.thread

84:                                               ; preds = %80
  %85 = trunc nsw i64 %12 to i32
  %86 = trunc nsw i64 %43 to i32
  tail call void @_Z3dfsii(i32 noundef %85, i32 noundef %86)
  br label %.thread

87:                                               ; preds = %74
  br i1 %13, label %104, label %.thread

.thread:                                          ; preds = %75, %80, %84, %87
  %88 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %89 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %88) #1
  %sext95 = shl i64 %89, 32
  %90 = ashr exact i64 %sext95, 32
  %91 = icmp slt i64 %indvars.iv.next90, %90
  br i1 %91, label %92, label %104

92:                                               ; preds = %.thread
  %93 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %12) #1
  %94 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %indvars.iv.next90) #1
  %95 = load i8, ptr %94, align 1, !tbaa !5
  %96 = icmp eq i8 %95, 64
  br i1 %96, label %97, label %104

97:                                               ; preds = %92
  %98 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %12) #1
  %99 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %indvars.iv.next90) #1
  %100 = load i32, ptr %99, align 4, !tbaa !8
  %.not80 = icmp eq i32 %100, 0
  br i1 %.not80, label %101, label %104

101:                                              ; preds = %97
  %102 = trunc nsw i64 %12 to i32
  %103 = trunc nsw i64 %indvars.iv.next90 to i32
  tail call void @_Z3dfsii(i32 noundef %102, i32 noundef %103)
  br label %104

104:                                              ; preds = %101, %97, %92, %.thread, %87
  %105 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %sext96 = shl i64 %105, 32
  %106 = ashr exact i64 %sext96, 32
  %107 = icmp sge i64 %indvars.iv.next, %106
  %brmerge87 = or i1 %44, %107
  br i1 %brmerge87, label %120, label %108

108:                                              ; preds = %104
  %109 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next) #1
  %110 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %43) #1
  %111 = load i8, ptr %110, align 1, !tbaa !5
  %112 = icmp eq i8 %111, 64
  br i1 %112, label %113, label %120

113:                                              ; preds = %108
  %114 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv.next) #1
  %115 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %114, i64 noundef %43) #1
  %116 = load i32, ptr %115, align 4, !tbaa !8
  %.not81 = icmp eq i32 %116, 0
  br i1 %.not81, label %117, label %120

117:                                              ; preds = %113
  %118 = trunc nsw i64 %indvars.iv.next to i32
  %119 = trunc nsw i64 %43 to i32
  tail call void @_Z3dfsii(i32 noundef %118, i32 noundef %119)
  br label %120

120:                                              ; preds = %104, %117, %113, %108
  %121 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %sext97 = shl i64 %121, 32
  %122 = ashr exact i64 %sext97, 32
  %123 = icmp slt i64 %indvars.iv.next, %122
  br i1 %123, label %124, label %138

124:                                              ; preds = %120
  %125 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv) #1
  %126 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %125) #1
  %sext98 = shl i64 %126, 32
  %127 = ashr exact i64 %sext98, 32
  %128 = icmp slt i64 %indvars.iv.next90, %127
  br i1 %128, label %129, label %138

129:                                              ; preds = %124
  %130 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next) #1
  %131 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %130, i64 noundef %indvars.iv.next90) #1
  %132 = load i8, ptr %131, align 1, !tbaa !5
  %133 = icmp eq i8 %132, 64
  br i1 %133, label %134, label %138

134:                                              ; preds = %129
  %135 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vis, i64 noundef %indvars.iv.next) #1
  %136 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %135, i64 noundef %indvars.iv.next90) #1
  %137 = load i32, ptr %136, align 4, !tbaa !8
  %.not82 = icmp eq i32 %137, 0
  br i1 %.not82, label %tailrecurse, label %138

138:                                              ; preds = %120, %124, %129, %134, %tailrecurse
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass