; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_MIFARE_Write(i8 noundef zeroext %0, ptr noundef %1, i8 noundef zeroext %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca [2 x i8], align 1
  store i8 %0, ptr %5, align 1, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !8
  store i8 %2, ptr %7, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %11 = load ptr, ptr %6, align 8, !tbaa !8
  %12 = icmp eq ptr %11, null
  br i1 %12, label %17, label %13

13:                                               ; preds = %3
  %14 = load i8, ptr %7, align 1, !tbaa !5
  %15 = zext i8 %14 to i32
  %16 = icmp slt i32 %15, 16
  br i1 %16, label %17, label %18

17:                                               ; preds = %13, %3
  store i32 6, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %38

18:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #2
  %19 = getelementptr inbounds [2 x i8], ptr %10, i64 0, i64 0
  store i8 -96, ptr %19, align 1, !tbaa !5
  %20 = load i8, ptr %5, align 1, !tbaa !5
  %21 = getelementptr inbounds [2 x i8], ptr %10, i64 0, i64 1
  store i8 %20, ptr %21, align 1, !tbaa !5
  %22 = getelementptr inbounds [2 x i8], ptr %10, i64 0, i64 0
  %23 = call i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef %22, i8 noundef zeroext 2, i8 noundef zeroext 0)
  store i32 %23, ptr %8, align 4, !tbaa !10
  %24 = load i32, ptr %8, align 4, !tbaa !10
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %28

26:                                               ; preds = %18
  %27 = load i32, ptr %8, align 4, !tbaa !10
  store i32 %27, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %37

28:                                               ; preds = %18
  %29 = load ptr, ptr %6, align 8, !tbaa !8
  %30 = load i8, ptr %7, align 1, !tbaa !5
  %31 = call i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef %29, i8 noundef zeroext %30, i8 noundef zeroext 0)
  store i32 %31, ptr %8, align 4, !tbaa !10
  %32 = load i32, ptr %8, align 4, !tbaa !10
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %36

34:                                               ; preds = %28
  %35 = load i32, ptr %8, align 4, !tbaa !10
  store i32 %35, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %37

36:                                               ; preds = %28
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %37

37:                                               ; preds = %36, %34, %26
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #2
  br label %38

38:                                               ; preds = %37, %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %39 = load i32, ptr %4, align 4
  ret i32 %39
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_MIFARE_Write(i8 noundef zeroext %0, ptr noundef %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = alloca [2 x i8], align 1
  %5 = icmp eq ptr %1, null
  %6 = icmp ult i8 %2, 16
  %or.cond = or i1 %5, %6
  br i1 %or.cond, label %13, label %7

7:                                                ; preds = %3
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %4) #2
  store i8 -96, ptr %4, align 1, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %4, i64 1
  store i8 %0, ptr %8, align 1, !tbaa !5
  %9 = call i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef nonnull %4, i8 noundef zeroext 2, i8 noundef zeroext 0)
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %10, label %12

10:                                               ; preds = %7
  %11 = call i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef nonnull %1, i8 noundef zeroext %2, i8 noundef zeroext 0)
  br label %12

12:                                               ; preds = %10, %7
  %.0 = phi i32 [ %9, %7 ], [ %11, %10 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %4) #2
  br label %13

13:                                               ; preds = %3, %12
  %.1 = phi i32 [ %.0, %12 ], [ 6, %3 ]
  ret i32 %.1
}

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass