; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/Produto do Intervalo(2)/main.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@st = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6golefti(i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7gorighti(i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store i32 %2, ptr %9, align 4, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !5
  store i32 %4, ptr %11, align 4, !tbaa !5
  %15 = load i32, ptr %8, align 4, !tbaa !5
  %16 = load i32, ptr %10, align 4, !tbaa !5
  %17 = icmp sge i32 %15, %16
  br i1 %17, label %18, label %27

18:                                               ; preds = %5
  %19 = load i32, ptr %9, align 4, !tbaa !5
  %20 = load i32, ptr %11, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %22, label %27

22:                                               ; preds = %18
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %24) #3
  %26 = load i32, ptr %25, align 4, !tbaa !5
  store i32 %26, ptr %6, align 4
  br label %60

27:                                               ; preds = %18, %5
  %28 = load i32, ptr %8, align 4, !tbaa !5
  %29 = load i32, ptr %11, align 4, !tbaa !5
  %30 = icmp sgt i32 %28, %29
  br i1 %30, label %35, label %31

31:                                               ; preds = %27
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = load i32, ptr %10, align 4, !tbaa !5
  %34 = icmp slt i32 %32, %33
  br i1 %34, label %35, label %36

35:                                               ; preds = %31, %27
  store i32 1, ptr %6, align 4
  br label %60

36:                                               ; preds = %31
  br label %37

37:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = load i32, ptr %9, align 4, !tbaa !5
  %40 = add nsw i32 %38, %39
  %41 = ashr i32 %40, 1
  store i32 %41, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = call noundef i32 @_Z6golefti(i32 noundef %42)
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = load i32, ptr %12, align 4, !tbaa !5
  %46 = load i32, ptr %10, align 4, !tbaa !5
  %47 = load i32, ptr %11, align 4, !tbaa !5
  %48 = call noundef i32 @_Z5queryiiiii(i32 noundef %43, i32 noundef %44, i32 noundef %45, i32 noundef %46, i32 noundef %47)
  store i32 %48, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = call noundef i32 @_Z7gorighti(i32 noundef %49)
  %51 = load i32, ptr %12, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !5
  %56 = call noundef i32 @_Z5queryiiiii(i32 noundef %50, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %55)
  store i32 %56, ptr %14, align 4, !tbaa !5
  %57 = load i32, ptr %13, align 4, !tbaa !5
  %58 = load i32, ptr %14, align 4, !tbaa !5
  %59 = mul nsw i32 %57, %58
  store i32 %59, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %60

60:                                               ; preds = %37, %35, %22
  %61 = load i32, ptr %6, align 4
  ret i32 %61
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@st = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6golefti(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7gorighti(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %.not28 = icmp sgt i32 %2, %4
  %.not37 = icmp slt i32 %1, %3
  %or.cond38 = or i1 %.not28, %.not37
  br i1 %or.cond38, label %.lr.ph, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %5
  %6 = icmp slt i32 %2, %3
  br i1 %6, label %.loopexit, label %.lr.ph.split

.lr.ph.split:                                     ; preds = %.lr.ph
  br i1 %.not28, label %.lr.ph.split.split.us, label %.lr.ph.split.split

.lr.ph.split.split.us:                            ; preds = %.lr.ph.split
  %7 = icmp sgt i32 %1, %4
  br i1 %7, label %.loopexit, label %tailrecurse.us

tailrecurse.us:                                   ; preds = %.lr.ph.split.split.us, %tailrecurse.us
  %accumulator.tr39.us4449 = phi i32 [ %14, %tailrecurse.us ], [ 1, %.lr.ph.split.split.us ]
  %.tr40.us4348 = phi i32 [ %12, %tailrecurse.us ], [ %0, %.lr.ph.split.split.us ]
  %.tr3041.us47 = phi i32 [ %13, %tailrecurse.us ], [ %1, %.lr.ph.split.split.us ]
  %8 = add nsw i32 %.tr3041.us47, %2
  %9 = ashr i32 %8, 1
  %10 = tail call noundef i32 @_Z6golefti(i32 noundef %.tr40.us4348)
  %11 = tail call noundef i32 @_Z5queryiiiii(i32 noundef %10, i32 noundef %.tr3041.us47, i32 noundef %9, i32 noundef %3, i32 noundef %4)
  %12 = tail call noundef i32 @_Z7gorighti(i32 noundef %.tr40.us4348)
  %13 = add nsw i32 %9, 1
  %14 = mul nsw i32 %11, %accumulator.tr39.us4449
  %.not51 = icmp slt i32 %9, %4
  br i1 %.not51, label %tailrecurse.us, label %.loopexit

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %5
  %accumulator.tr.lcssa = phi i32 [ 1, %5 ], [ %25, %tailrecurse ]
  %.tr.lcssa = phi i32 [ %0, %5 ], [ %23, %tailrecurse ]
  %15 = sext i32 %.tr.lcssa to i64
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %15) #1
  %17 = load i32, ptr %16, align 4, !tbaa !5
  br label %.loopexit

.lr.ph.split.split:                               ; preds = %.lr.ph.split, %tailrecurse
  %.tr3041 = phi i32 [ %24, %tailrecurse ], [ %1, %.lr.ph.split ]
  %.tr40 = phi i32 [ %23, %tailrecurse ], [ %0, %.lr.ph.split ]
  %accumulator.tr39 = phi i32 [ %25, %tailrecurse ], [ 1, %.lr.ph.split ]
  %18 = icmp sgt i32 %.tr3041, %4
  br i1 %18, label %.loopexit, label %tailrecurse

tailrecurse:                                      ; preds = %.lr.ph.split.split
  %19 = add nsw i32 %.tr3041, %2
  %20 = ashr i32 %19, 1
  %21 = tail call noundef i32 @_Z6golefti(i32 noundef %.tr40)
  %22 = tail call noundef i32 @_Z5queryiiiii(i32 noundef %21, i32 noundef %.tr3041, i32 noundef %20, i32 noundef %3, i32 noundef %4)
  %23 = tail call noundef i32 @_Z7gorighti(i32 noundef %.tr40)
  %24 = add nsw i32 %20, 1
  %25 = mul nsw i32 %22, %accumulator.tr39
  %.not = icmp slt i32 %24, %3
  br i1 %.not, label %.lr.ph.split.split, label %tailrecurse._crit_edge

.loopexit:                                        ; preds = %.lr.ph.split.split, %tailrecurse.us, %.lr.ph, %.lr.ph.split.split.us, %tailrecurse._crit_edge
  %accumulator.tr36 = phi i32 [ %accumulator.tr.lcssa, %tailrecurse._crit_edge ], [ 1, %.lr.ph ], [ 1, %.lr.ph.split.split.us ], [ %14, %tailrecurse.us ], [ %accumulator.tr39, %.lr.ph.split.split ]
  %.0 = phi i32 [ %17, %tailrecurse._crit_edge ], [ 1, %.lr.ph ], [ 1, %.lr.ph.split.split.us ], [ 1, %tailrecurse.us ], [ 1, %.lr.ph.split.split ]
  %accumulator.ret.tr = mul nsw i32 %.0, %accumulator.tr36
  ret i32 %accumulator.ret.tr
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass