; LLVM IR from turi-code/SFrame :: oss_src/random/random.ll (ZN8graphlab6random7pdf2cdfERSt6vectorIdSaIdEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN8graphlab6random7pdf2cdfERSt6vectorIdSaIdEE(ptr noundef nonnull align 8 dereferenceable(24) %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca double, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #2
  store double 0.000000e+00, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 0, ptr %4, align 8, !tbaa !11
  br label %6

6:                                                ; preds = %19, %1
  %7 = load i64, ptr %4, align 8, !tbaa !11
  %8 = load ptr, ptr %2, align 8, !tbaa !5
  %9 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #2
  %10 = icmp ult i64 %7, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  br label %22

12:                                               ; preds = %6
  %13 = load ptr, ptr %2, align 8, !tbaa !5
  %14 = load i64, ptr %4, align 8, !tbaa !11
  %15 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %14) #2
  %16 = load double, ptr %15, align 8, !tbaa !9
  %17 = load double, ptr %3, align 8, !tbaa !9
  %18 = fadd double %17, %16
  store double %18, ptr %3, align 8, !tbaa !9
  br label %19

19:                                               ; preds = %12
  %20 = load i64, ptr %4, align 8, !tbaa !11
  %21 = add i64 %20, 1
  store i64 %21, ptr %4, align 8, !tbaa !11
  br label %6, !llvm.loop !13

22:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  store i64 0, ptr %5, align 8, !tbaa !11
  br label %23

23:                                               ; preds = %51, %22
  %24 = load i64, ptr %5, align 8, !tbaa !11
  %25 = load ptr, ptr %2, align 8, !tbaa !5
  %26 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %25) #2
  %27 = icmp ult i64 %24, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  br label %54

29:                                               ; preds = %23
  %30 = load ptr, ptr %2, align 8, !tbaa !5
  %31 = load i64, ptr %5, align 8, !tbaa !11
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %31) #2
  %33 = load double, ptr %32, align 8, !tbaa !9
  %34 = load double, ptr %3, align 8, !tbaa !9
  %35 = fdiv double %33, %34
  %36 = load i64, ptr %5, align 8, !tbaa !11
  %37 = icmp ugt i64 %36, 0
  br i1 %37, label %38, label %44

38:                                               ; preds = %29
  %39 = load ptr, ptr %2, align 8, !tbaa !5
  %40 = load i64, ptr %5, align 8, !tbaa !11
  %41 = sub i64 %40, 1
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #2
  %43 = load double, ptr %42, align 8, !tbaa !9
  br label %45

44:                                               ; preds = %29
  br label %45

45:                                               ; preds = %44, %38
  %46 = phi double [ %43, %38 ], [ 0.000000e+00, %44 ]
  %47 = fadd double %35, %46
  %48 = load ptr, ptr %2, align 8, !tbaa !5
  %49 = load i64, ptr %5, align 8, !tbaa !11
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %49) #2
  store double %47, ptr %50, align 8, !tbaa !9
  br label %51

51:                                               ; preds = %45
  %52 = load i64, ptr %5, align 8, !tbaa !11
  %53 = add i64 %52, 1
  store i64 %53, ptr %5, align 8, !tbaa !11
  br label %23, !llvm.loop !15

54:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN8graphlab6random7pdf2cdfERSt6vectorIdSaIdEE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not22 = icmp eq i64 %2, 0
  br i1 %.not22, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %1
  %.017.lcssa = phi double [ 0.000000e+00, %1 ], [ %14, %.lr.ph ]
  %3 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not23 = icmp eq i64 %3, 0
  br i1 %.not23, label %._crit_edge, label %4

4:                                                ; preds = %.preheader
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  %6 = load double, ptr %5, align 8, !tbaa !5
  %7 = fdiv double %6, %.017.lcssa
  %8 = fadd double %7, 0.000000e+00
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef 0) #1
  store double %8, ptr %9, align 8, !tbaa !5
  %10 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %11 = icmp ugt i64 %10, 1
  br i1 %11, label %.lr.ph21.peel.next, label %._crit_edge

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.01619 = phi i64 [ %15, %.lr.ph ], [ 0, %1 ]
  %.01718 = phi double [ %14, %.lr.ph ], [ 0.000000e+00, %1 ]
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.01619) #1
  %13 = load double, ptr %12, align 8, !tbaa !5
  %14 = fadd double %.01718, %13
  %15 = add nuw i64 %.01619, 1
  %16 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %17 = icmp ult i64 %15, %16
  br i1 %17, label %.lr.ph, label %.preheader, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph21.peel.next, %4, %.preheader
  ret void

.lr.ph21.peel.next:                               ; preds = %4, %.lr.ph21.peel.next
  %.020 = phi i64 [ %26, %.lr.ph21.peel.next ], [ 1, %4 ]
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.020) #1
  %19 = load double, ptr %18, align 8, !tbaa !5
  %20 = fdiv double %19, %.017.lcssa
  %21 = add i64 %.020, -1
  %22 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #1
  %23 = load double, ptr %22, align 8, !tbaa !5
  %24 = fadd double %20, %23
  %25 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.020) #1
  store double %24, ptr %25, align 8, !tbaa !5
  %26 = add nuw i64 %.020, 1
  %27 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %28 = icmp ult i64 %26, %27
  br i1 %28, label %.lr.ph21.peel.next, label %._crit_edge, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10, !12}
!12 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass