; LLVM IR from indjev99/Evolving-Snakes :: sources/ctrNeuralNetwork.ll (ZN16ctrNeuralNetwork21calcImportancePartialEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ctrNeuralNetwork = type { %struct.controller, double, double, double, i32, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5" }
%struct.controller = type { ptr, [3 x i32], [3 x i8], [1 x i32], [1 x i8], [1 x i32], [1 x i8], i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16ctrNeuralNetwork21calcImportancePartialEi(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %1) #2 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca double, align 8
  %6 = alloca double, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %12 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %13 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 5
  %14 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %13) #5
  %15 = sub i64 %14, 2
  %16 = trunc i64 %15 to i32
  store i32 %16, ptr %7, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %240, %2
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = icmp sge i32 %18, 0
  br i1 %19, label %21, label %20

20:                                               ; preds = %17
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %243

21:                                               ; preds = %17
  store double 0.000000e+00, ptr %5, align 8, !tbaa !11
  store double 0.000000e+00, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %202, %21
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 5
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #5
  %28 = load i32, ptr %27, align 4, !tbaa !9
  %29 = icmp slt i32 %23, %28
  br i1 %29, label %31, label %30

30:                                               ; preds = %22
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %205

31:                                               ; preds = %22
  %32 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %33 = load i32, ptr %7, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %34) #5
  %36 = load i32, ptr %9, align 4, !tbaa !9
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %37) #5
  store double 0.000000e+00, ptr %38, align 8, !tbaa !11
  %39 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 9
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #5
  %43 = load i32, ptr %9, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %44) #5
  store double 0.000000e+00, ptr %45, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %46

46:                                               ; preds = %156, %31
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 5
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = add nsw i32 %49, 1
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %51) #5
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = icmp slt i32 %47, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %46
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %159

56:                                               ; preds = %46
  %57 = load i32, ptr %4, align 4, !tbaa !9
  %58 = icmp eq i32 %57, 0
  br i1 %58, label %59, label %92

59:                                               ; preds = %56
  %60 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 6
  %61 = load i32, ptr %7, align 4, !tbaa !9
  %62 = add nsw i32 %61, 1
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %63) #5
  %65 = load i32, ptr %10, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %66) #5
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69) #5
  %71 = load double, ptr %70, align 8, !tbaa !11
  %72 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = add nsw i32 %73, 1
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %75) #5
  %77 = load i32, ptr %10, align 4, !tbaa !9
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %78) #5
  %80 = load double, ptr %79, align 8, !tbaa !11
  %81 = fmul double %71, %80
  %82 = call double @llvm.fabs.f64(double %81)
  %83 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %84 = load i32, ptr %7, align 4, !tbaa !9
  %85 = sext i32 %84 to i64
  %86 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %85) #5
  %87 = load i32, ptr %9, align 4, !tbaa !9
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %88) #5
  %90 = load double, ptr %89, align 8, !tbaa !11
  %91 = fadd double %90, %82
  store double %91, ptr %89, align 8, !tbaa !11
  br label %125

92:                                               ; preds = %56
  %93 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 6
  %94 = load i32, ptr %7, align 4, !tbaa !9
  %95 = add nsw i32 %94, 1
  %96 = sext i32 %95 to i64
  %97 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %96) #5
  %98 = load i32, ptr %10, align 4, !tbaa !9
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %97, i64 noundef %99) #5
  %101 = load i32, ptr %9, align 4, !tbaa !9
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %102) #5
  %104 = load double, ptr %103, align 8, !tbaa !11
  %105 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %106 = load i32, ptr %7, align 4, !tbaa !9
  %107 = add nsw i32 %106, 1
  %108 = sext i32 %107 to i64
  %109 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %108) #5
  %110 = load i32, ptr %10, align 4, !tbaa !9
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %111) #5
  %113 = load double, ptr %112, align 8, !tbaa !11
  %114 = fmul double %104, %113
  %115 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %114, i32 noundef 2)
  %116 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %117 = load i32, ptr %7, align 4, !tbaa !9
  %118 = sext i32 %117 to i64
  %119 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %116, i64 noundef %118) #5
  %120 = load i32, ptr %9, align 4, !tbaa !9
  %121 = sext i32 %120 to i64
  %122 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %119, i64 noundef %121) #5
  %123 = load double, ptr %122, align 8, !tbaa !11
  %124 = fadd double %123, %115
  store double %124, ptr %122, align 8, !tbaa !11
  br label %125

125:                                              ; preds = %92, %59
  %126 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 6
  %127 = load i32, ptr %7, align 4, !tbaa !9
  %128 = add nsw i32 %127, 1
  %129 = sext i32 %128 to i64
  %130 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %126, i64 noundef %129) #5
  %131 = load i32, ptr %10, align 4, !tbaa !9
  %132 = sext i32 %131 to i64
  %133 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %130, i64 noundef %132) #5
  %134 = load i32, ptr %9, align 4, !tbaa !9
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %133, i64 noundef %135) #5
  %137 = load double, ptr %136, align 8, !tbaa !11
  %138 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 9
  %139 = load i32, ptr %7, align 4, !tbaa !9
  %140 = add nsw i32 %139, 1
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %138, i64 noundef %141) #5
  %143 = load i32, ptr %10, align 4, !tbaa !9
  %144 = sext i32 %143 to i64
  %145 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %142, i64 noundef %144) #5
  %146 = load double, ptr %145, align 8, !tbaa !11
  %147 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 9
  %148 = load i32, ptr %7, align 4, !tbaa !9
  %149 = sext i32 %148 to i64
  %150 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %147, i64 noundef %149) #5
  %151 = load i32, ptr %9, align 4, !tbaa !9
  %152 = sext i32 %151 to i64
  %153 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %150, i64 noundef %152) #5
  %154 = load double, ptr %153, align 8, !tbaa !11
  %155 = call double @llvm.fmuladd.f64(double %137, double %146, double %154)
  store double %155, ptr %153, align 8, !tbaa !11
  br label %156

156:                                              ; preds = %125
  %157 = load i32, ptr %10, align 4, !tbaa !9
  %158 = add nsw i32 %157, 1
  store i32 %158, ptr %10, align 4, !tbaa !9
  br label %46, !llvm.loop !13

159:                                              ; preds = %55
  %160 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %161 = load i32, ptr %7, align 4, !tbaa !9
  %162 = sext i32 %161 to i64
  %163 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %160, i64 noundef %162) #5
  %164 = load i32, ptr %9, align 4, !tbaa !9
  %165 = sext i32 %164 to i64
  %166 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %163, i64 noundef %165) #5
  %167 = load double, ptr %166, align 8, !tbaa !11
  %168 = load double, ptr %5, align 8, !tbaa !11
  %169 = fcmp ogt double %167, %168
  br i1 %169, label %170, label %179

170:                                              ; preds = %159
  %171 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %172 = load i32, ptr %7, align 4, !tbaa !9
  %173 = sext i32 %172 to i64
  %174 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %171, i64 noundef %173) #5
  %175 = load i32, ptr %9, align 4, !tbaa !9
  %176 = sext i32 %175 to i64
  %177 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %174, i64 noundef %176) #5
  %178 = load double, ptr %177, align 8, !tbaa !11
  store double %178, ptr %5, align 8, !tbaa !11
  br label %179

179:                                              ; preds = %170, %159
  %180 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 9
  %181 = load i32, ptr %7, align 4, !tbaa !9
  %182 = sext i32 %181 to i64
  %183 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %180, i64 noundef %182) #5
  %184 = load i32, ptr %9, align 4, !tbaa !9
  %185 = sext i32 %184 to i64
  %186 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %183, i64 noundef %185) #5
  %187 = load double, ptr %186, align 8, !tbaa !11
  %188 = call double @llvm.fabs.f64(double %187)
  %189 = load double, ptr %6, align 8, !tbaa !11
  %190 = fcmp ogt double %188, %189
  br i1 %190, label %191, label %201

191:                                              ; preds = %179
  %192 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 9
  %193 = load i32, ptr %7, align 4, !tbaa !9
  %194 = sext i32 %193 to i64
  %195 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %192, i64 noundef %194) #5
  %196 = load i32, ptr %9, align 4, !tbaa !9
  %197 = sext i32 %196 to i64
  %198 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %195, i64 noundef %197) #5
  %199 = load double, ptr %198, align 8, !tbaa !11
  %200 = call double @llvm.fabs.f64(double %199)
  store double %200, ptr %6, align 8, !tbaa !11
  br label %201

201:                                              ; preds = %191, %179
  br label %202

202:                                              ; preds = %201
  %203 = load i32, ptr %9, align 4, !tbaa !9
  %204 = add nsw i32 %203, 1
  store i32 %204, ptr %9, align 4, !tbaa !9
  br label %22, !llvm.loop !15

205:                                              ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %206

206:                                              ; preds = %236, %205
  %207 = load i32, ptr %11, align 4, !tbaa !9
  %208 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 5
  %209 = load i32, ptr %7, align 4, !tbaa !9
  %210 = sext i32 %209 to i64
  %211 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %208, i64 noundef %210) #5
  %212 = load i32, ptr %211, align 4, !tbaa !9
  %213 = icmp slt i32 %207, %212
  br i1 %213, label %215, label %214

214:                                              ; preds = %206
  store i32 11, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %239

215:                                              ; preds = %206
  %216 = load double, ptr %5, align 8, !tbaa !11
  %217 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 8
  %218 = load i32, ptr %7, align 4, !tbaa !9
  %219 = sext i32 %218 to i64
  %220 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %217, i64 noundef %219) #5
  %221 = load i32, ptr %11, align 4, !tbaa !9
  %222 = sext i32 %221 to i64
  %223 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %220, i64 noundef %222) #5
  %224 = load double, ptr %223, align 8, !tbaa !11
  %225 = fdiv double %224, %216
  store double %225, ptr %223, align 8, !tbaa !11
  %226 = load double, ptr %6, align 8, !tbaa !11
  %227 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %12, i32 0, i32 9
  %228 = load i32, ptr %7, align 4, !tbaa !9
  %229 = sext i32 %228 to i64
  %230 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %227, i64 noundef %229) #5
  %231 = load i32, ptr %11, align 4, !tbaa !9
  %232 = sext i32 %231 to i64
  %233 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %230, i64 noundef %232) #5
  %234 = load double, ptr %233, align 8, !tbaa !11
  %235 = fdiv double %234, %226
  store double %235, ptr %233, align 8, !tbaa !11
  br label %236

236:                                              ; preds = %215
  %237 = load i32, ptr %11, align 4, !tbaa !9
  %238 = add nsw i32 %237, 1
  store i32 %238, ptr %11, align 4, !tbaa !9
  br label %206, !llvm.loop !16

239:                                              ; preds = %214
  br label %240

240:                                              ; preds = %239
  %241 = load i32, ptr %7, align 4, !tbaa !9
  %242 = add nsw i32 %241, -1
  store i32 %242, ptr %7, align 4, !tbaa !9
  br label %17, !llvm.loop !17

243:                                              ; preds = %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN16ctrNeuralNetwork21calcImportancePartialEi(ptr noundef nonnull align 8 dereferenceable(200) %0, i32 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 80
  %4 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %3) #3
  %5 = trunc i64 %4 to i32
  %6 = add i32 %5, -2
  %7 = icmp sgt i32 %6, -1
  br i1 %7, label %.preheader59.lr.ph, label %._crit_edge71

.preheader59.lr.ph:                               ; preds = %2
  %8 = getelementptr inbounds i8, ptr %0, i64 152
  %9 = getelementptr inbounds i8, ptr %0, i64 176
  %10 = icmp eq i32 %1, 0
  %11 = getelementptr inbounds i8, ptr %0, i64 104
  %12 = zext nneg i32 %6 to i64
  br label %.preheader59

.preheader59:                                     ; preds = %.preheader59.lr.ph, %._crit_edge69
  %indvars.iv83 = phi i64 [ %12, %.preheader59.lr.ph ], [ %indvars.iv.next84, %._crit_edge69 ]
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv83) #3
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph64, label %.preheader

.lr.ph64:                                         ; preds = %.preheader59
  %16 = add nuw nsw i64 %indvars.iv83, 1
  br label %20

._crit_edge71:                                    ; preds = %._crit_edge69, %2
  ret void

.preheader:                                       ; preds = %103, %.preheader59
  %.057.lcssa = phi double [ 0.000000e+00, %.preheader59 ], [ %.158, %103 ]
  %.056.lcssa = phi double [ 0.000000e+00, %.preheader59 ], [ %.1, %103 ]
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv83) #3
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = icmp sgt i32 %18, 0
  br i1 %19, label %.lr.ph68, label %._crit_edge69

20:                                               ; preds = %.lr.ph64, %103
  %indvars.iv77 = phi i64 [ 0, %.lr.ph64 ], [ %indvars.iv.next78, %103 ]
  %.05662 = phi double [ 0.000000e+00, %.lr.ph64 ], [ %.1, %103 ]
  %.05761 = phi double [ 0.000000e+00, %.lr.ph64 ], [ %.158, %103 ]
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv83) #3
  %22 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv77) #3
  store double 0.000000e+00, ptr %22, align 8, !tbaa !9
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv83) #3
  %24 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %indvars.iv77) #3
  store double 0.000000e+00, ptr %24, align 8, !tbaa !9
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %16) #3
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = icmp sgt i32 %26, 0
  br i1 %27, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %20
  br i1 %10, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.lr.ph.split.us
  %indvars.iv74 = phi i64 [ %indvars.iv.next75, %.lr.ph.split.us ], [ 0, %.lr.ph ]
  %28 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %16) #3
  %29 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %indvars.iv74) #3
  %30 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %indvars.iv77) #3
  %31 = load double, ptr %30, align 8, !tbaa !9
  %32 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %16) #3
  %33 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %32, i64 noundef %indvars.iv74) #3
  %34 = load double, ptr %33, align 8, !tbaa !9
  %35 = fmul double %31, %34
  %36 = tail call double @llvm.fabs.f64(double %35)
  %37 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv83) #3
  %38 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %indvars.iv77) #3
  %39 = load double, ptr %38, align 8, !tbaa !9
  %40 = fadd double %36, %39
  store double %40, ptr %38, align 8, !tbaa !9
  %41 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %16) #3
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %41, i64 noundef %indvars.iv74) #3
  %43 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef %indvars.iv77) #3
  %44 = load double, ptr %43, align 8, !tbaa !9
  %45 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %16) #3
  %46 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %45, i64 noundef %indvars.iv74) #3
  %47 = load double, ptr %46, align 8, !tbaa !9
  %48 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv83) #3
  %49 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %indvars.iv77) #3
  %50 = load double, ptr %49, align 8, !tbaa !9
  %51 = tail call double @llvm.fmuladd.f64(double %44, double %47, double %50)
  store double %51, ptr %49, align 8, !tbaa !9
  %indvars.iv.next75 = add nuw nsw i64 %indvars.iv74, 1
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %16) #3
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = icmp slt i64 %indvars.iv.next75, %54
  br i1 %55, label %.lr.ph.split.us, label %._crit_edge, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph.split, %.lr.ph.split.us, %20
  %56 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv83) #3
  %57 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %indvars.iv77) #3
  %58 = load double, ptr %57, align 8, !tbaa !9
  %59 = fcmp ogt double %58, %.05761
  br i1 %59, label %88, label %92

.lr.ph.split:                                     ; preds = %.lr.ph, %.lr.ph.split
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph.split ], [ 0, %.lr.ph ]
  %60 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %16) #3
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %indvars.iv) #3
  %62 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %indvars.iv77) #3
  %63 = load double, ptr %62, align 8, !tbaa !9
  %64 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %16) #3
  %65 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %indvars.iv) #3
  %66 = load double, ptr %65, align 8, !tbaa !9
  %67 = fmul double %63, %66
  %68 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %67, i32 noundef 2)
  %69 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv83) #3
  %70 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %indvars.iv77) #3
  %71 = load double, ptr %70, align 8, !tbaa !9
  %72 = fadd double %68, %71
  store double %72, ptr %70, align 8, !tbaa !9
  %73 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %16) #3
  %74 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %indvars.iv) #3
  %75 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %indvars.iv77) #3
  %76 = load double, ptr %75, align 8, !tbaa !9
  %77 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %16) #3
  %78 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %indvars.iv) #3
  %79 = load double, ptr %78, align 8, !tbaa !9
  %80 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv83) #3
  %81 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %indvars.iv77) #3
  %82 = load double, ptr %81, align 8, !tbaa !9
  %83 = tail call double @llvm.fmuladd.f64(double %76, double %79, double %82)
  store double %83, ptr %81, align 8, !tbaa !9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %84 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %16) #3
  %85 = load i32, ptr %84, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = icmp slt i64 %indvars.iv.next, %86
  br i1 %87, label %.lr.ph.split, label %._crit_edge, !llvm.loop !11

88:                                               ; preds = %._crit_edge
  %89 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv83) #3
  %90 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %89, i64 noundef %indvars.iv77) #3
  %91 = load double, ptr %90, align 8, !tbaa !9
  br label %92

92:                                               ; preds = %88, %._crit_edge
  %.158 = phi double [ %91, %88 ], [ %.05761, %._crit_edge ]
  %93 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv83) #3
  %94 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %indvars.iv77) #3
  %95 = load double, ptr %94, align 8, !tbaa !9
  %96 = tail call double @llvm.fabs.f64(double %95)
  %97 = fcmp ogt double %96, %.05662
  br i1 %97, label %98, label %103

98:                                               ; preds = %92
  %99 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv83) #3
  %100 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %99, i64 noundef %indvars.iv77) #3
  %101 = load double, ptr %100, align 8, !tbaa !9
  %102 = tail call double @llvm.fabs.f64(double %101)
  br label %103

103:                                              ; preds = %92, %98
  %.1 = phi double [ %102, %98 ], [ %.05662, %92 ]
  %indvars.iv.next78 = add nuw nsw i64 %indvars.iv77, 1
  %104 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv83) #3
  %105 = load i32, ptr %104, align 4, !tbaa !5
  %106 = sext i32 %105 to i64
  %107 = icmp slt i64 %indvars.iv.next78, %106
  br i1 %107, label %20, label %.preheader, !llvm.loop !13

._crit_edge69:                                    ; preds = %.lr.ph68, %.preheader
  %indvars.iv.next84 = add nsw i64 %indvars.iv83, -1
  %108 = icmp sgt i64 %indvars.iv83, 0
  br i1 %108, label %.preheader59, label %._crit_edge71, !llvm.loop !14

.lr.ph68:                                         ; preds = %.preheader, %.lr.ph68
  %indvars.iv80 = phi i64 [ %indvars.iv.next81, %.lr.ph68 ], [ 0, %.preheader ]
  %109 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %8, i64 noundef %indvars.iv83) #3
  %110 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %109, i64 noundef %indvars.iv80) #3
  %111 = load double, ptr %110, align 8, !tbaa !9
  %112 = fdiv double %111, %.057.lcssa
  store double %112, ptr %110, align 8, !tbaa !9
  %113 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %indvars.iv83) #3
  %114 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %indvars.iv80) #3
  %115 = load double, ptr %114, align 8, !tbaa !9
  %116 = fdiv double %115, %.056.lcssa
  store double %116, ptr %114, align 8, !tbaa !9
  %indvars.iv.next81 = add nuw nsw i64 %indvars.iv80, 1
  %117 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %indvars.iv83) #3
  %118 = load i32, ptr %117, align 4, !tbaa !5
  %119 = sext i32 %118 to i64
  %120 = icmp slt i64 %indvars.iv.next81, %119
  br i1 %120, label %.lr.ph68, label %._crit_edge69, !llvm.loop !15
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass