; LLVM IR from tum-i4/obfuscation-benchmarks :: tigress-generated-programs (RandomFunc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @RandomFunc(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1 x i64], align 8
  %6 = alloca i8, align 1
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds i64, ptr %10, i64 0
  %12 = load i64, ptr %11, align 8, !tbaa !9
  %13 = add i64 %12, 1373777115
  %14 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  store i64 %13, ptr %14, align 8, !tbaa !9
  %15 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %16 = load i64, ptr %15, align 8, !tbaa !9
  %17 = and i64 %16, 1
  %18 = icmp ne i64 %17, 0
  br i1 %18, label %19, label %140

19:                                               ; preds = %2
  %20 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %21 = load i64, ptr %20, align 8, !tbaa !9
  %22 = lshr i64 %21, 2
  %23 = and i64 %22, 1
  %24 = icmp ne i64 %23, 0
  br i1 %24, label %25, label %85

25:                                               ; preds = %19
  %26 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %27 = load i64, ptr %26, align 8, !tbaa !9
  %28 = lshr i64 %27, 3
  %29 = and i64 %28, 1
  %30 = icmp ne i64 %29, 0
  br i1 %30, label %31, label %50

31:                                               ; preds = %25
  %32 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %33 = load i64, ptr %32, align 8, !tbaa !9
  %34 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %35 = load i64, ptr %34, align 8, !tbaa !9
  %36 = lshr i64 %35, 2
  %37 = and i64 %36, 7
  %38 = or i64 %37, 1
  %39 = shl i64 %33, %38
  %40 = and i64 %39, 15
  %41 = shl i64 %40, 2
  %42 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %43 = load i64, ptr %42, align 8, !tbaa !9
  %44 = or i64 %43, %41
  store i64 %44, ptr %42, align 8, !tbaa !9
  %45 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %46 = load i64, ptr %45, align 8, !tbaa !9
  %47 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %48 = load i64, ptr %47, align 8, !tbaa !9
  %49 = add i64 %48, %46
  store i64 %49, ptr %47, align 8, !tbaa !9
  br label %84

50:                                               ; preds = %25
  %51 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %52 = getelementptr inbounds i8, ptr %51, i64 7
  %53 = load i8, ptr %52, align 1, !tbaa !11
  store i8 %53, ptr %6, align 1, !tbaa !11
  %54 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %55 = getelementptr inbounds i8, ptr %54, i64 5
  %56 = load i8, ptr %55, align 1, !tbaa !11
  %57 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %58 = getelementptr inbounds i8, ptr %57, i64 7
  store i8 %56, ptr %58, align 1, !tbaa !11
  %59 = load i8, ptr %6, align 1, !tbaa !11
  %60 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %61 = getelementptr inbounds i8, ptr %60, i64 5
  store i8 %59, ptr %61, align 1, !tbaa !11
  %62 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %63 = getelementptr inbounds i8, ptr %62, i64 4
  %64 = load i8, ptr %63, align 1, !tbaa !11
  store i8 %64, ptr %6, align 1, !tbaa !11
  %65 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %66 = getelementptr inbounds i8, ptr %65, i64 0
  %67 = load i8, ptr %66, align 1, !tbaa !11
  %68 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %69 = getelementptr inbounds i8, ptr %68, i64 4
  store i8 %67, ptr %69, align 1, !tbaa !11
  %70 = load i8, ptr %6, align 1, !tbaa !11
  %71 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %72 = getelementptr inbounds i8, ptr %71, i64 0
  store i8 %70, ptr %72, align 1, !tbaa !11
  %73 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %74 = getelementptr inbounds i16, ptr %73, i64 2
  %75 = load i16, ptr %74, align 2, !tbaa !12
  store i16 %75, ptr %7, align 2, !tbaa !12
  %76 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %77 = getelementptr inbounds i16, ptr %76, i64 0
  %78 = load i16, ptr %77, align 2, !tbaa !12
  %79 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %80 = getelementptr inbounds i16, ptr %79, i64 2
  store i16 %78, ptr %80, align 2, !tbaa !12
  %81 = load i16, ptr %7, align 2, !tbaa !12
  %82 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %83 = getelementptr inbounds i16, ptr %82, i64 0
  store i16 %81, ptr %83, align 2, !tbaa !12
  br label %84

84:                                               ; preds = %50, %31
  br label %139

85:                                               ; preds = %19
  %86 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %87 = load i64, ptr %86, align 8, !tbaa !9
  %88 = lshr i64 %87, 4
  %89 = and i64 %88, 1
  %90 = icmp ne i64 %89, 0
  br i1 %90, label %91, label %115

91:                                               ; preds = %85
  %92 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %93 = load i64, ptr %92, align 8, !tbaa !9
  %94 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %95 = load i64, ptr %94, align 8, !tbaa !9
  %96 = lshr i64 %95, 4
  %97 = and i64 %96, 7
  %98 = or i64 %97, 1
  %99 = lshr i64 %93, %98
  %100 = and i64 %99, 15
  %101 = shl i64 %100, 2
  %102 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %103 = load i64, ptr %102, align 8, !tbaa !9
  %104 = or i64 %103, %101
  store i64 %104, ptr %102, align 8, !tbaa !9
  %105 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %106 = load i64, ptr %105, align 8, !tbaa !9
  %107 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %108 = load i64, ptr %107, align 8, !tbaa !9
  %109 = add i64 %106, %108
  %110 = and i64 %109, 31
  %111 = shl i64 %110, 3
  %112 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %113 = load i64, ptr %112, align 8, !tbaa !9
  %114 = or i64 %113, %111
  store i64 %114, ptr %112, align 8, !tbaa !9
  br label %138

115:                                              ; preds = %85
  %116 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %117 = getelementptr inbounds i16, ptr %116, i64 0
  %118 = load i16, ptr %117, align 2, !tbaa !12
  store i16 %118, ptr %8, align 2, !tbaa !12
  %119 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %120 = getelementptr inbounds i16, ptr %119, i64 1
  %121 = load i16, ptr %120, align 2, !tbaa !12
  %122 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %123 = getelementptr inbounds i16, ptr %122, i64 0
  store i16 %121, ptr %123, align 2, !tbaa !12
  %124 = load i16, ptr %8, align 2, !tbaa !12
  %125 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %126 = getelementptr inbounds i16, ptr %125, i64 1
  store i16 %124, ptr %126, align 2, !tbaa !12
  %127 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %128 = getelementptr inbounds i8, ptr %127, i64 2
  %129 = load i8, ptr %128, align 1, !tbaa !11
  store i8 %129, ptr %9, align 1, !tbaa !11
  %130 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %131 = getelementptr inbounds i8, ptr %130, i64 0
  %132 = load i8, ptr %131, align 1, !tbaa !11
  %133 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %134 = getelementptr inbounds i8, ptr %133, i64 2
  store i8 %132, ptr %134, align 1, !tbaa !11
  %135 = load i8, ptr %9, align 1, !tbaa !11
  %136 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %137 = getelementptr inbounds i8, ptr %136, i64 0
  store i8 %135, ptr %137, align 1, !tbaa !11
  br label %138

138:                                              ; preds = %115, %91
  br label %139

139:                                              ; preds = %138, %84
  br label %160

140:                                              ; preds = %2
  %141 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %142 = load i64, ptr %141, align 8, !tbaa !9
  %143 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %144 = load i64, ptr %143, align 8, !tbaa !9
  %145 = lshr i64 %144, 2
  %146 = and i64 %145, 15
  %147 = or i64 %146, 1
  %148 = shl i64 %142, %147
  %149 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %150 = load i64, ptr %149, align 8, !tbaa !9
  %151 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %152 = load i64, ptr %151, align 8, !tbaa !9
  %153 = lshr i64 %152, 2
  %154 = and i64 %153, 15
  %155 = or i64 %154, 1
  %156 = sub i64 64, %155
  %157 = lshr i64 %150, %156
  %158 = or i64 %148, %157
  %159 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  store i64 %158, ptr %159, align 8, !tbaa !9
  br label %160

160:                                              ; preds = %140, %139
  %161 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %162 = load i64, ptr %161, align 8, !tbaa !9
  %163 = add i64 %162, 668888901
  %164 = load ptr, ptr %4, align 8, !tbaa !5
  %165 = getelementptr inbounds i64, ptr %164, i64 0
  store i64 %163, ptr %165, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"short", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @RandomFunc(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = load i64, ptr %0, align 8, !tbaa !5
  %4 = add i64 %3, 1373777115
  %.sroa.0.sroa.0.0.extract.trunc834 = trunc i64 %4 to i16
  %.sroa.0.sroa.36.0.insert.shift909 = and i16 %.sroa.0.sroa.0.0.extract.trunc834, -256
  %.sroa.36.0.extract.shift = lshr i64 %4, 16
  %.sroa.36.sroa.32.0.extract.shift1000 = lshr i64 %4, 24
  %.sroa.40.0.extract.shift = lshr i64 %4, 32
  %.sroa.40.sroa.32.0.extract.shift1001 = lshr i64 %4, 40
  %.sroa.46.0.extract.shift = lshr i64 %4, 48
  %.sroa.46408.0.extract.shift = lshr i64 %4, 56
  %.sroa.0.sroa.0.0.insert.ext835 = and i16 %.sroa.0.sroa.0.0.extract.trunc834, 255
  %5 = trunc i64 %.sroa.36.sroa.32.0.extract.shift1000 to i16
  %.sroa.36.sroa.32.0.insert.ext = shl nuw nsw i64 %.sroa.36.sroa.32.0.extract.shift1000, 8
  %.sroa.36.sroa.0.0.insert.ext = and i64 %.sroa.36.0.extract.shift, 255
  %.sroa.40.sroa.32.0.insert.ext = shl nuw nsw i64 %.sroa.40.sroa.32.0.extract.shift1001, 8
  %.sroa.40.sroa.0.0.insert.ext = and i64 %.sroa.40.0.extract.shift, 255
  %.sroa.46.0.insert.insert = and i64 %4, -281474976710656
  %.sroa.40.sroa.32.0.insert.ext.masked = and i64 %.sroa.40.sroa.32.0.insert.ext, 65280
  %.sroa.40.0.insert.ext = or disjoint i64 %.sroa.40.sroa.32.0.insert.ext.masked, %.sroa.40.sroa.0.0.insert.ext
  %.sroa.40.0.insert.shift = shl nuw nsw i64 %.sroa.40.0.insert.ext, 32
  %.sroa.36.sroa.32.0.insert.ext.masked = and i64 %.sroa.36.sroa.32.0.insert.ext, 65280
  %.sroa.36.0.insert.ext = or disjoint i64 %.sroa.36.sroa.32.0.insert.ext.masked, %.sroa.36.sroa.0.0.insert.ext
  %.sroa.36.0.insert.shift = shl nuw nsw i64 %.sroa.36.0.insert.ext, 16
  %.sroa.0.0.insert.ext = and i64 %4, 65535
  %6 = or disjoint i64 %.sroa.40.0.insert.shift, %.sroa.0.0.insert.ext
  %7 = or disjoint i64 %6, %.sroa.36.0.insert.shift
  %.sroa.0.0.insert.insert = or disjoint i64 %7, %.sroa.46.0.insert.insert
  %8 = and i64 %4, 1
  %.not = icmp eq i64 %8, 0
  br i1 %.not, label %36, label %9

9:                                                ; preds = %2
  %10 = lshr i16 %.sroa.0.sroa.0.0.extract.trunc834, 2
  %11 = and i64 %4, 4
  %.not1005 = icmp eq i64 %11, 0
  br i1 %.not1005, label %21, label %12

12:                                               ; preds = %9
  %13 = and i64 %4, 8
  %.not1012 = icmp eq i64 %13, 0
  br i1 %.not1012, label %20, label %14

14:                                               ; preds = %12
  %15 = and i16 %10, 7
  %16 = shl i16 %.sroa.0.sroa.0.0.extract.trunc834, %15
  %17 = shl i16 %16, 2
  %18 = and i16 %17, 32
  %.sroa.0.sroa.0.0.insert.ext854 = or i16 %18, %.sroa.0.sroa.0.0.insert.ext835
  %.sroa.0.sroa.0.0.insert.insert856 = or disjoint i16 %.sroa.0.sroa.0.0.insert.ext854, %.sroa.0.sroa.36.0.insert.shift909
  %.sroa.46.0.insert.insert334 = and i64 %4, 9223090561878065152
  %.sroa.40.0.insert.insert227 = or disjoint i64 %.sroa.40.0.insert.shift, %.sroa.46.0.insert.insert334
  %.sroa.0.0.insert.ext31 = zext i16 %.sroa.0.sroa.0.0.insert.insert856 to i64
  %19 = or disjoint i64 %.sroa.36.0.insert.shift, %.sroa.0.0.insert.ext31
  %.sroa.0.0.insert.insert33 = or disjoint i64 %19, %.sroa.40.0.insert.insert227
  %.sroa.0.sroa.0.0.extract.trunc860 = shl nuw nsw i16 %.sroa.0.sroa.0.0.insert.ext854, 1
  %.sroa.0.sroa.36.0.extract.shift9421015 = lshr i16 %.sroa.0.sroa.0.0.insert.insert856, 7
  %.sroa.36.0.extract.shift127 = lshr i64 %.sroa.0.0.insert.insert33, 15
  %.sroa.36.sroa.32.0.extract.shift7681016 = lshr i64 %.sroa.36.0.insert.ext, 7
  %.sroa.40.0.extract.shift233 = lshr i64 %.sroa.0.0.insert.insert33, 31
  %.sroa.40.sroa.32.0.extract.shift6101017 = lshr i64 %.sroa.40.0.insert.ext, 7
  %.sroa.46.0.extract.shift340 = lshr i64 %.sroa.40.0.insert.insert227, 47
  %.sroa.46408.0.extract.shift446 = lshr i64 %4, 55
  br label %41

20:                                               ; preds = %12
  %.sroa.40.sroa.32.0.extract.shift6701013 = lshr i64 %4, 8
  %.sroa.0.sroa.36.0.extract.trunc = trunc nuw nsw i64 %.sroa.46408.0.extract.shift to i16
  br label %41

21:                                               ; preds = %9
  %22 = and i64 %4, 16
  %.not1006 = icmp eq i64 %22, 0
  br i1 %.not1006, label %35, label %23

23:                                               ; preds = %21
  %24 = lshr i64 %4, 4
  %25 = and i64 %24, 7
  %26 = lshr i64 %.sroa.0.0.insert.insert, %25
  %27 = shl i64 %26, 2
  %28 = and i64 %27, 44
  %.masked = and i64 %4, 65531
  %.sroa.0.0.insert.ext57 = or i64 %28, %.masked
  %29 = shl nuw nsw i64 %.sroa.0.0.insert.ext57, 4
  %30 = and i64 %29, 224
  %31 = or disjoint i64 %.sroa.46.0.insert.insert, %30
  %32 = or disjoint i64 %31, %.sroa.40.0.insert.shift
  %33 = or disjoint i64 %32, %.sroa.36.0.insert.shift
  %34 = or i64 %33, %.sroa.0.0.insert.ext57
  %.sroa.0.sroa.0.0.extract.trunc883 = trunc i64 %34 to i16
  %.sroa.0.sroa.36.0.extract.shift9741009 = lshr i64 %34, 8
  %.sroa.0.sroa.36.0.extract.trunc975 = trunc i64 %.sroa.0.sroa.36.0.extract.shift9741009 to i16
  br label %41

35:                                               ; preds = %21
  %.sroa.36.sroa.32.0.extract.shift8281007 = lshr i64 %4, 8
  br label %41

36:                                               ; preds = %2
  %37 = lshr i64 %4, 2
  %38 = and i64 %37, 14
  %39 = or disjoint i64 %38, 1
  %40 = tail call i64 @llvm.fshl.i64(i64 %.sroa.0.0.insert.insert, i64 %.sroa.0.0.insert.insert, i64 %39)
  %.sroa.0.sroa.0.0.extract.trunc896 = trunc i64 %40 to i16
  %.sroa.0.sroa.36.0.extract.shift9921002 = lshr i64 %40, 8
  %.sroa.0.sroa.36.0.extract.trunc993 = trunc i64 %.sroa.0.sroa.36.0.extract.shift9921002 to i16
  %.sroa.36.0.extract.shift188 = lshr i64 %40, 16
  %.sroa.36.sroa.32.0.extract.shift8181003 = lshr i64 %40, 24
  %.sroa.40.0.extract.shift294 = lshr i64 %40, 32
  %.sroa.40.sroa.32.0.extract.shift6601004 = lshr i64 %40, 40
  %.sroa.46.0.extract.shift401 = lshr i64 %40, 48
  %.sroa.46408.0.extract.shift507 = lshr i64 %40, 56
  br label %41

41:                                               ; preds = %20, %14, %35, %23, %36
  %.sroa.40.sroa.32.0.in = phi i64 [ %.sroa.40.sroa.32.0.extract.shift6101017, %14 ], [ %.sroa.40.sroa.32.0.extract.shift6701013, %20 ], [ %.sroa.40.sroa.32.0.extract.shift1001, %23 ], [ %.sroa.40.sroa.32.0.extract.shift1001, %35 ], [ %.sroa.40.sroa.32.0.extract.shift6601004, %36 ]
  %.sroa.40.sroa.0.0.in = phi i64 [ %.sroa.40.0.extract.shift233, %14 ], [ %.sroa.40.0.extract.shift, %20 ], [ %.sroa.40.0.extract.shift, %23 ], [ %.sroa.40.0.extract.shift, %35 ], [ %.sroa.40.0.extract.shift294, %36 ]
  %.sroa.46408.0 = phi i64 [ %.sroa.46408.0.extract.shift446, %14 ], [ %.sroa.40.sroa.32.0.extract.shift1001, %20 ], [ %.sroa.46408.0.extract.shift, %23 ], [ %.sroa.46408.0.extract.shift, %35 ], [ %.sroa.46408.0.extract.shift507, %36 ]
  %.sroa.46.0.in = phi i64 [ %.sroa.46.0.extract.shift340, %14 ], [ %.sroa.46.0.extract.shift, %20 ], [ %.sroa.46.0.extract.shift, %23 ], [ %.sroa.46.0.extract.shift, %35 ], [ %.sroa.46.0.extract.shift401, %36 ]
  %.sroa.36.sroa.0.0.in = phi i64 [ %.sroa.36.0.extract.shift127, %14 ], [ %.sroa.36.0.extract.shift, %20 ], [ %.sroa.36.0.extract.shift, %23 ], [ %.sroa.36.0.extract.shift, %35 ], [ %.sroa.36.0.extract.shift188, %36 ]
  %.sroa.36.sroa.32.0.in = phi i64 [ %.sroa.36.sroa.32.0.extract.shift7681016, %14 ], [ %.sroa.36.sroa.32.0.extract.shift1000, %20 ], [ %.sroa.36.sroa.32.0.extract.shift1000, %23 ], [ %.sroa.36.sroa.32.0.extract.shift8281007, %35 ], [ %.sroa.36.sroa.32.0.extract.shift8181003, %36 ]
  %.sroa.0.sroa.0.0 = phi i16 [ %.sroa.0.sroa.0.0.extract.trunc860, %14 ], [ %.sroa.0.sroa.0.0.extract.trunc834, %20 ], [ %.sroa.0.sroa.0.0.extract.trunc883, %23 ], [ %.sroa.0.sroa.0.0.extract.trunc834, %35 ], [ %.sroa.0.sroa.0.0.extract.trunc896, %36 ]
  %.sroa.0.sroa.36.0 = phi i16 [ %.sroa.0.sroa.36.0.extract.shift9421015, %14 ], [ %.sroa.0.sroa.36.0.extract.trunc, %20 ], [ %.sroa.0.sroa.36.0.extract.trunc975, %23 ], [ %5, %35 ], [ %.sroa.0.sroa.36.0.extract.trunc993, %36 ]
  %.sroa.0.sroa.36.0.insert.ext994 = shl i16 %.sroa.0.sroa.36.0, 8
  %.sroa.0.sroa.0.0.insert.ext897 = and i16 %.sroa.0.sroa.0.0, 255
  %.sroa.0.sroa.0.0.insert.insert899 = or disjoint i16 %.sroa.0.sroa.36.0.insert.ext994, %.sroa.0.sroa.0.0.insert.ext897
  %.sroa.36.sroa.32.0.insert.ext820 = shl nuw i64 %.sroa.36.sroa.32.0.in, 8
  %.sroa.36.sroa.0.0.insert.ext731 = and i64 %.sroa.36.sroa.0.0.in, 255
  %.sroa.40.sroa.32.0.insert.ext662 = shl nuw i64 %.sroa.40.sroa.32.0.in, 8
  %.sroa.40.sroa.0.0.insert.ext573 = and i64 %.sroa.40.sroa.0.0.in, 255
  %.sroa.46408.0.insert.ext510 = shl i64 %.sroa.46408.0, 56
  %.sroa.46.0.insert.ext404 = shl nuw i64 %.sroa.46.0.in, 48
  %.sroa.46.0.insert.shift405 = and i64 %.sroa.46.0.insert.ext404, 71776119061217280
  %.sroa.40.sroa.32.0.insert.ext662.masked = and i64 %.sroa.40.sroa.32.0.insert.ext662, 65280
  %.sroa.40.0.insert.ext297 = or disjoint i64 %.sroa.40.sroa.32.0.insert.ext662.masked, %.sroa.40.sroa.0.0.insert.ext573
  %.sroa.40.0.insert.shift298 = shl nuw nsw i64 %.sroa.40.0.insert.ext297, 32
  %.sroa.36.sroa.32.0.insert.ext820.masked = and i64 %.sroa.36.sroa.32.0.insert.ext820, 65280
  %.sroa.36.0.insert.ext191 = or disjoint i64 %.sroa.36.sroa.32.0.insert.ext820.masked, %.sroa.36.sroa.0.0.insert.ext731
  %.sroa.36.0.insert.shift192 = shl nuw nsw i64 %.sroa.36.0.insert.ext191, 16
  %.sroa.0.0.insert.ext87 = zext i16 %.sroa.0.sroa.0.0.insert.insert899 to i64
  %.sroa.0.0.insert.insert89 = or disjoint i64 %.sroa.46408.0.insert.ext510, %.sroa.40.0.insert.shift298
  %.sroa.46.0.insert.insert407 = or disjoint i64 %.sroa.0.0.insert.insert89, %.sroa.46.0.insert.shift405
  %.sroa.40.0.insert.insert300 = or disjoint i64 %.sroa.46.0.insert.insert407, 668888901
  %.sroa.36.0.insert.insert194 = add i64 %.sroa.40.0.insert.insert300, %.sroa.36.0.insert.shift192
  %42 = add i64 %.sroa.36.0.insert.insert194, %.sroa.0.0.insert.ext87
  store i64 %42, ptr %1, align 8, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.fshl.i64(i64, i64, i64) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass