; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mlx90614)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mlx90614_read.str = external hidden constant [32 x i8], align 4
@mAddress = external hidden global i32, align 4
@mlx90614_read.str.1 = external hidden constant [36 x i8], align 4
@mlx90614_read.str.2 = external hidden constant [28 x i8], align 4
@mlx90614_read.str.3 = external hidden constant [39 x i8], align 4
@mlx90614_read.str.4 = external hidden constant [31 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @mlx90614_read(i32 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca [2 x i8], align 1
  %13 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = icmp ne i32 %14, -1
  br i1 %15, label %16, label %30

16:                                               ; preds = %4
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = icmp ne i32 %17, -1
  br i1 %18, label %19, label %30

19:                                               ; preds = %16
  %20 = load i32, ptr %6, align 4, !tbaa !5
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = call i32 @dh_i2c_init(i32 noundef %20, i32 noundef %21)
  store i32 %22, ptr %10, align 4, !tbaa !5
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %29

24:                                               ; preds = %19
  br label %25

25:                                               ; preds = %24
  call void (ptr, ...) @dhdebug_ram(ptr noundef @mlx90614_read.str)
  br label %26

26:                                               ; preds = %25
  br label %27

27:                                               ; preds = %26
  %28 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %28, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %87

29:                                               ; preds = %19
  br label %30

30:                                               ; preds = %29, %16, %4
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #5
  %31 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  store i8 6, ptr %31, align 1, !tbaa !11
  %32 = load i32, ptr @mAddress, align 4, !tbaa !5
  %33 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %34 = call i32 @dh_i2c_write(i32 noundef %32, ptr noundef %33, i32 noundef 1, i32 noundef 0)
  store i32 %34, ptr %10, align 4, !tbaa !5
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %41

36:                                               ; preds = %30
  br label %37

37:                                               ; preds = %36
  call void (ptr, ...) @dhdebug_ram(ptr noundef @mlx90614_read.str.1)
  br label %38

38:                                               ; preds = %37
  br label %39

39:                                               ; preds = %38
  %40 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %40, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %86

41:                                               ; preds = %30
  %42 = load i32, ptr @mAddress, align 4, !tbaa !5
  %43 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %44 = call i32 @dh_i2c_read(i32 noundef %42, ptr noundef %43, i32 noundef 2)
  store i32 %44, ptr %10, align 4, !tbaa !5
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %51

46:                                               ; preds = %41
  br label %47

47:                                               ; preds = %46
  call void (ptr, ...) @dhdebug_ram(ptr noundef @mlx90614_read.str.2)
  br label %48

48:                                               ; preds = %47
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %50, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %86

51:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  %52 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %53 = call i32 @signedInt16le(ptr noundef %52, i32 noundef 0)
  store i32 %53, ptr %13, align 4, !tbaa !5
  %54 = load i32, ptr %13, align 4, !tbaa !5
  %55 = sitofp i32 %54 to float
  %56 = call float @llvm.fmuladd.f32(float %55, float 0x3F947AE140000000, float 0xC071126660000000)
  %57 = load ptr, ptr %8, align 8, !tbaa !9
  store float %56, ptr %57, align 4, !tbaa !12
  %58 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  store i8 7, ptr %58, align 1, !tbaa !11
  %59 = load i32, ptr @mAddress, align 4, !tbaa !5
  %60 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %61 = call i32 @dh_i2c_write(i32 noundef %59, ptr noundef %60, i32 noundef 1, i32 noundef 0)
  store i32 %61, ptr %10, align 4, !tbaa !5
  %62 = icmp ne i32 %61, 0
  br i1 %62, label %63, label %68

63:                                               ; preds = %51
  br label %64

64:                                               ; preds = %63
  call void (ptr, ...) @dhdebug_ram(ptr noundef @mlx90614_read.str.3)
  br label %65

65:                                               ; preds = %64
  br label %66

66:                                               ; preds = %65
  %67 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %67, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %85

68:                                               ; preds = %51
  %69 = load i32, ptr @mAddress, align 4, !tbaa !5
  %70 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %71 = call i32 @dh_i2c_read(i32 noundef %69, ptr noundef %70, i32 noundef 2)
  store i32 %71, ptr %10, align 4, !tbaa !5
  %72 = icmp ne i32 %71, 0
  br i1 %72, label %73, label %78

73:                                               ; preds = %68
  br label %74

74:                                               ; preds = %73
  call void (ptr, ...) @dhdebug_ram(ptr noundef @mlx90614_read.str.4)
  br label %75

75:                                               ; preds = %74
  br label %76

76:                                               ; preds = %75
  %77 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %77, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %85

78:                                               ; preds = %68
  %79 = getelementptr inbounds [2 x i8], ptr %12, i64 0, i64 0
  %80 = call i32 @signedInt16le(ptr noundef %79, i32 noundef 0)
  store i32 %80, ptr %13, align 4, !tbaa !5
  %81 = load i32, ptr %13, align 4, !tbaa !5
  %82 = sitofp i32 %81 to float
  %83 = call float @llvm.fmuladd.f32(float %82, float 0x3F947AE140000000, float 0xC071126660000000)
  %84 = load ptr, ptr %9, align 8, !tbaa !9
  store float %83, ptr %84, align 4, !tbaa !12
  store i32 0, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %85

85:                                               ; preds = %78, %76, %66
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %86

86:                                               ; preds = %85, %49, %39
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #5
  br label %87

87:                                               ; preds = %86, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  %88 = load i32, ptr %5, align 4
  ret i32 %88
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) #2

declare void @dhdebug_ram(ptr noundef, ...) #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16le(ptr noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mlx90614_read.str = external hidden constant [32 x i8], align 4
@mAddress = external hidden local_unnamed_addr global i32, align 4
@mlx90614_read.str.1 = external hidden constant [36 x i8], align 4
@mlx90614_read.str.2 = external hidden constant [28 x i8], align 4
@mlx90614_read.str.3 = external hidden constant [39 x i8], align 4
@mlx90614_read.str.4 = external hidden constant [31 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @mlx90614_read(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %5 = alloca [2 x i8], align 1
  %6 = icmp ne i32 %0, -1
  %7 = icmp ne i32 %1, -1
  %or.cond = and i1 %6, %7
  br i1 %or.cond, label %8, label %11

8:                                                ; preds = %4
  %9 = tail call i32 @dh_i2c_init(i32 noundef %0, i32 noundef %1) #5
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %11, label %10

10:                                               ; preds = %8
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @mlx90614_read.str) #5
  br label %35

11:                                               ; preds = %8, %4
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %5) #5
  store i8 6, ptr %5, align 1, !tbaa !5
  %12 = load i32, ptr @mAddress, align 4, !tbaa !8
  %13 = call i32 @dh_i2c_write(i32 noundef %12, ptr noundef nonnull %5, i32 noundef 1, i32 noundef 0) #5
  %.not21 = icmp eq i32 %13, 0
  br i1 %.not21, label %15, label %14

14:                                               ; preds = %11
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @mlx90614_read.str.1) #5
  br label %34

15:                                               ; preds = %11
  %16 = load i32, ptr @mAddress, align 4, !tbaa !8
  %17 = call i32 @dh_i2c_read(i32 noundef %16, ptr noundef nonnull %5, i32 noundef 2) #5
  %.not22 = icmp eq i32 %17, 0
  br i1 %.not22, label %19, label %18

18:                                               ; preds = %15
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @mlx90614_read.str.2) #5
  br label %34

19:                                               ; preds = %15
  %20 = call i32 @signedInt16le(ptr noundef nonnull %5, i32 noundef 0)
  %21 = sitofp i32 %20 to float
  %22 = call float @llvm.fmuladd.f32(float %21, float 0x3F947AE140000000, float 0xC071126660000000)
  store float %22, ptr %2, align 4, !tbaa !10
  store i8 7, ptr %5, align 1, !tbaa !5
  %23 = load i32, ptr @mAddress, align 4, !tbaa !8
  %24 = call i32 @dh_i2c_write(i32 noundef %23, ptr noundef nonnull %5, i32 noundef 1, i32 noundef 0) #5
  %.not23 = icmp eq i32 %24, 0
  br i1 %.not23, label %26, label %25

25:                                               ; preds = %19
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @mlx90614_read.str.3) #5
  br label %34

26:                                               ; preds = %19
  %27 = load i32, ptr @mAddress, align 4, !tbaa !8
  %28 = call i32 @dh_i2c_read(i32 noundef %27, ptr noundef nonnull %5, i32 noundef 2) #5
  %.not24 = icmp eq i32 %28, 0
  br i1 %.not24, label %30, label %29

29:                                               ; preds = %26
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @mlx90614_read.str.4) #5
  br label %34

30:                                               ; preds = %26
  %31 = call i32 @signedInt16le(ptr noundef nonnull %5, i32 noundef 0)
  %32 = sitofp i32 %31 to float
  %33 = call float @llvm.fmuladd.f32(float %32, float 0x3F947AE140000000, float 0xC071126660000000)
  store float %33, ptr %3, align 4, !tbaa !10
  br label %34

34:                                               ; preds = %25, %29, %30, %18, %14
  %.1 = phi i32 [ %13, %14 ], [ %17, %18 ], [ %24, %25 ], [ %28, %29 ], [ 0, %30 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %5) #5
  br label %35

35:                                               ; preds = %34, %10
  %.2 = phi i32 [ %9, %10 ], [ %.1, %34 ]
  ret i32 %.2
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16le(ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"float", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass