; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources (rand)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @rand() #0

; Function Attrs: nounwind uwtable
define dso_local i32 @rand_generate_key(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 8, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 16, ptr %5, align 4, !tbaa !9
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = icmp eq ptr %10, null
  br i1 %11, label %12, label %13

12:                                               ; preds = %1
  store i32 16, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %49

13:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %14 = call i32 @rand()
  %15 = srem i32 %14, 9
  %16 = add nsw i32 8, %15
  store i32 %16, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %36, %13
  %18 = load i32, ptr %7, align 4, !tbaa !9
  %19 = add nsw i32 %18, -1
  store i32 %19, ptr %7, align 4, !tbaa !9
  %20 = icmp ne i32 %18, 0
  br i1 %20, label %21, label %43

21:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %22 = call i32 @rand()
  %23 = srem i32 %22, 92
  %24 = add nsw i32 33, %23
  %25 = trunc i32 %24 to i8
  store i8 %25, ptr %9, align 1, !tbaa !11
  %26 = load i8, ptr %9, align 1, !tbaa !11
  %27 = sext i8 %26 to i32
  %28 = icmp eq i32 %27, 34
  br i1 %28, label %29, label %30

29:                                               ; preds = %21
  store i8 125, ptr %9, align 1, !tbaa !11
  br label %36

30:                                               ; preds = %21
  %31 = load i8, ptr %9, align 1, !tbaa !11
  %32 = sext i8 %31 to i32
  %33 = icmp eq i32 %32, 92
  br i1 %33, label %34, label %35

34:                                               ; preds = %30
  store i8 126, ptr %9, align 1, !tbaa !11
  br label %35

35:                                               ; preds = %34, %30
  br label %36

36:                                               ; preds = %35, %29
  %37 = load i8, ptr %9, align 1, !tbaa !11
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !9
  %40 = add i32 %39, 1
  store i32 %40, ptr %8, align 4, !tbaa !9
  %41 = zext i32 %39 to i64
  %42 = getelementptr inbounds i8, ptr %38, i64 %41
  store i8 %37, ptr %42, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  br label %17, !llvm.loop !12

43:                                               ; preds = %17
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = load i32, ptr %8, align 4, !tbaa !9
  %46 = zext i32 %45 to i64
  %47 = getelementptr inbounds i8, ptr %44, i64 %46
  store i8 0, ptr %47, align 1, !tbaa !11
  %48 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %48, ptr %2, align 4
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %49

49:                                               ; preds = %43, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %50 = load i32, ptr %2, align 4
  ret i32 %50
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @rand() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @rand_generate_key(ptr noundef writeonly %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %18, label %3

3:                                                ; preds = %1
  %4 = tail call i32 @rand()
  %5 = srem i32 %4, 9
  %6 = add nsw i32 %5, 8
  %.not15 = icmp eq i32 %6, 0
  br i1 %.not15, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %3 ]
  %.01116 = phi i32 [ %7, %.lr.ph ], [ %6, %3 ]
  %7 = add nsw i32 %.01116, -1
  %8 = tail call i32 @rand()
  %9 = srem i32 %8, 92
  %10 = trunc nsw i32 %9 to i8
  %11 = add nsw i8 %10, 33
  %12 = icmp eq i8 %11, 34
  %13 = icmp eq i8 %11, 92
  %spec.store.select = select i1 %13, i8 126, i8 %11
  %.0 = select i1 %12, i8 125, i8 %spec.store.select
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %14 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv
  store i8 %.0, ptr %14, align 1, !tbaa !5
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !8

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %15 = trunc nuw i64 %indvars.iv.next to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %3
  %.010.lcssa = phi i32 [ 0, %3 ], [ %15, %._crit_edge.loopexit ]
  %16 = zext i32 %.010.lcssa to i64
  %17 = getelementptr inbounds i8, ptr %0, i64 %16
  store i8 0, ptr %17, align 1, !tbaa !5
  br label %18

18:                                               ; preds = %1, %._crit_edge
  %.012 = phi i32 [ %.010.lcssa, %._crit_edge ], [ 16, %1 ]
  ret i32 %.012
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass