; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/CodeForces/580C - Kefa and Park/main.ll (Z3dfsiiRii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@g = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8
@cat = external dso_local global %"class.std::vector.0", align 8
@pre = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsiiRii(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !5
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %14) #3
  store i32 1, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = load i32, ptr %8, align 4, !tbaa !5
  %18 = icmp sgt i32 %16, %17
  br i1 %18, label %19, label %20

19:                                               ; preds = %4
  store i32 1, ptr %11, align 4
  br label %169

20:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %153, %20
  %22 = load i32, ptr %12, align 4, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %24) #3
  %26 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %25) #3
  %27 = trunc i64 %26 to i32
  %28 = icmp slt i32 %22, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %21
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %156

30:                                               ; preds = %21
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %32) #3
  %34 = load i32, ptr %12, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %35) #3
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %38) #3
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %152, label %42

42:                                               ; preds = %30
  %43 = load i32, ptr %10, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %10, align 4, !tbaa !5
  %45 = load i32, ptr %5, align 4, !tbaa !5
  %46 = load i32, ptr %5, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %47) #3
  %49 = load i32, ptr %12, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50) #3
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %53) #3
  store i32 %45, ptr %54, align 4, !tbaa !5
  %55 = load i32, ptr %5, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %56) #3
  %58 = load i32, ptr %12, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef %59) #3
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %62) #3
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %66, label %91

66:                                               ; preds = %42
  %67 = load i32, ptr %5, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %68) #3
  %70 = load i32, ptr %12, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #3
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %74) #3
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = sext i32 %76 to i64
  %78 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %77) #3
  %79 = load i32, ptr %78, align 4, !tbaa !5
  %80 = icmp ne i32 %79, 0
  br i1 %80, label %91, label %81

81:                                               ; preds = %66
  %82 = load i32, ptr %5, align 4, !tbaa !5
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %83) #3
  %85 = load i32, ptr %12, align 4, !tbaa !5
  %86 = sext i32 %85 to i64
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %84, i64 noundef %86) #3
  %88 = load i32, ptr %87, align 4, !tbaa !5
  %89 = load ptr, ptr %7, align 8, !tbaa !9
  %90 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z3dfsiiRii(i32 noundef %88, i32 noundef 1, ptr noundef nonnull align 4 dereferenceable(4) %89, i32 noundef %90)
  br label %151

91:                                               ; preds = %66, %42
  %92 = load i32, ptr %5, align 4, !tbaa !5
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %93) #3
  %95 = load i32, ptr %12, align 4, !tbaa !5
  %96 = sext i32 %95 to i64
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %94, i64 noundef %96) #3
  %98 = load i32, ptr %97, align 4, !tbaa !5
  %99 = sext i32 %98 to i64
  %100 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %99) #3
  %101 = load i32, ptr %100, align 4, !tbaa !5
  %102 = icmp ne i32 %101, 0
  br i1 %102, label %128, label %103

103:                                              ; preds = %91
  %104 = load i32, ptr %5, align 4, !tbaa !5
  %105 = sext i32 %104 to i64
  %106 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %105) #3
  %107 = load i32, ptr %12, align 4, !tbaa !5
  %108 = sext i32 %107 to i64
  %109 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %106, i64 noundef %108) #3
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %111) #3
  %113 = load i32, ptr %112, align 4, !tbaa !5
  %114 = sext i32 %113 to i64
  %115 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %114) #3
  %116 = load i32, ptr %115, align 4, !tbaa !5
  %117 = icmp ne i32 %116, 0
  br i1 %117, label %128, label %118

118:                                              ; preds = %103
  %119 = load i32, ptr %5, align 4, !tbaa !5
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %120) #3
  %122 = load i32, ptr %12, align 4, !tbaa !5
  %123 = sext i32 %122 to i64
  %124 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %121, i64 noundef %123) #3
  %125 = load i32, ptr %124, align 4, !tbaa !5
  %126 = load ptr, ptr %7, align 8, !tbaa !9
  %127 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z3dfsiiRii(i32 noundef %125, i32 noundef 0, ptr noundef nonnull align 4 dereferenceable(4) %126, i32 noundef %127)
  br label %150

128:                                              ; preds = %103, %91
  %129 = load i32, ptr %5, align 4, !tbaa !5
  %130 = sext i32 %129 to i64
  %131 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %130) #3
  %132 = load i32, ptr %12, align 4, !tbaa !5
  %133 = sext i32 %132 to i64
  %134 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %131, i64 noundef %133) #3
  %135 = load i32, ptr %134, align 4, !tbaa !5
  %136 = load i32, ptr %6, align 4, !tbaa !5
  %137 = load i32, ptr %5, align 4, !tbaa !5
  %138 = sext i32 %137 to i64
  %139 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %138) #3
  %140 = load i32, ptr %12, align 4, !tbaa !5
  %141 = sext i32 %140 to i64
  %142 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %139, i64 noundef %141) #3
  %143 = load i32, ptr %142, align 4, !tbaa !5
  %144 = sext i32 %143 to i64
  %145 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %144) #3
  %146 = load i32, ptr %145, align 4, !tbaa !5
  %147 = add nsw i32 %136, %146
  %148 = load ptr, ptr %7, align 8, !tbaa !9
  %149 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z3dfsiiRii(i32 noundef %135, i32 noundef %147, ptr noundef nonnull align 4 dereferenceable(4) %148, i32 noundef %149)
  br label %150

150:                                              ; preds = %128, %118
  br label %151

151:                                              ; preds = %150, %81
  br label %152

152:                                              ; preds = %151, %30
  br label %153

153:                                              ; preds = %152
  %154 = load i32, ptr %12, align 4, !tbaa !5
  %155 = add nsw i32 %154, 1
  store i32 %155, ptr %12, align 4, !tbaa !5
  br label %21, !llvm.loop !11

156:                                              ; preds = %29
  %157 = load i32, ptr %10, align 4, !tbaa !5
  %158 = icmp ne i32 %157, 0
  br i1 %158, label %168, label %159

159:                                              ; preds = %156
  %160 = load i32, ptr %6, align 4, !tbaa !5
  %161 = load i32, ptr %8, align 4, !tbaa !5
  %162 = icmp sle i32 %160, %161
  br i1 %162, label %163, label %167

163:                                              ; preds = %159
  %164 = load ptr, ptr %7, align 8, !tbaa !9
  %165 = load i32, ptr %164, align 4, !tbaa !5
  %166 = add nsw i32 %165, 1
  store i32 %166, ptr %164, align 4, !tbaa !5
  br label %167

167:                                              ; preds = %163, %159
  br label %168

168:                                              ; preds = %167, %156
  store i32 0, ptr %11, align 4
  br label %169

169:                                              ; preds = %168, %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %170 = load i32, ptr %11, align 4
  switch i32 %170, label %172 [
    i32 0, label %171
    i32 1, label %171
  ]

171:                                              ; preds = %169, %169
  ret void

172:                                              ; preds = %169
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@g = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8
@cat = external dso_local global %"class.std::vector.0", align 8
@pre = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsiiRii(i32 noundef %0, i32 noundef %1, ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = sext i32 %0 to i64
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %5) #1
  store i32 1, ptr %6, align 4, !tbaa !5
  %7 = icmp sgt i32 %1, %3
  br i1 %7, label %85, label %.preheader

.preheader:                                       ; preds = %4
  %8 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %9 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #1
  %10 = trunc i64 %9 to i32
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %.lr.ph, label %._crit_edge.thread

._crit_edge:                                      ; preds = %78
  %12 = icmp eq i32 %.1, 0
  br i1 %12, label %._crit_edge.thread, label %85

.lr.ph:                                           ; preds = %.preheader, %78
  %indvars.iv = phi i64 [ %indvars.iv.next, %78 ], [ 0, %.preheader ]
  %.03847 = phi i32 [ %.1, %78 ], [ 0, %.preheader ]
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %indvars.iv) #1
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %16) #1
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %.not42 = icmp eq i32 %18, 0
  br i1 %.not42, label %19, label %78

19:                                               ; preds = %.lr.ph
  %20 = add nsw i32 %.03847, 1
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %indvars.iv) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %24) #1
  store i32 %0, ptr %25, align 4, !tbaa !5
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %indvars.iv) #1
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %29) #1
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %.not43 = icmp eq i32 %31, 0
  br i1 %.not43, label %46, label %32

32:                                               ; preds = %19
  %33 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %indvars.iv) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = sext i32 %35 to i64
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %36) #1
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %39) #1
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %.not44 = icmp eq i32 %41, 0
  br i1 %.not44, label %42, label %46

42:                                               ; preds = %32
  %43 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %44 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %indvars.iv) #1
  %45 = load i32, ptr %44, align 4, !tbaa !5
  tail call void @_Z3dfsiiRii(i32 noundef %45, i32 noundef 1, ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %3)
  br label %78

46:                                               ; preds = %32, %19
  %47 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %48 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %indvars.iv) #1
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %50) #1
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %.not45 = icmp eq i32 %52, 0
  br i1 %.not45, label %53, label %67

53:                                               ; preds = %46
  %54 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %indvars.iv) #1
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @pre, i64 noundef %57) #1
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %60) #1
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %.not46 = icmp eq i32 %62, 0
  br i1 %.not46, label %63, label %67

63:                                               ; preds = %53
  %64 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %65 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %indvars.iv) #1
  %66 = load i32, ptr %65, align 4, !tbaa !5
  tail call void @_Z3dfsiiRii(i32 noundef %66, i32 noundef 0, ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %3)
  br label %78

67:                                               ; preds = %53, %46
  %68 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %69 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %68, i64 noundef %indvars.iv) #1
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %72 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %indvars.iv) #1
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cat, i64 noundef %74) #1
  %76 = load i32, ptr %75, align 4, !tbaa !5
  %77 = add nsw i32 %76, %1
  tail call void @_Z3dfsiiRii(i32 noundef %70, i32 noundef %77, ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %3)
  br label %78

78:                                               ; preds = %.lr.ph, %63, %67, %42
  %.1 = phi i32 [ %.03847, %.lr.ph ], [ %20, %67 ], [ %20, %63 ], [ %20, %42 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %79 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %5) #1
  %80 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %79) #1
  %sext = shl i64 %80, 32
  %81 = ashr exact i64 %sext, 32
  %82 = icmp slt i64 %indvars.iv.next, %81
  br i1 %82, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge.thread:                               ; preds = %.preheader, %._crit_edge
  %83 = load i32, ptr %2, align 4, !tbaa !5
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %2, align 4, !tbaa !5
  br label %85

85:                                               ; preds = %._crit_edge, %._crit_edge.thread, %4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: ConstraintEliminationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass