; LLVM IR from acm-clan/algorithm-stone :: templates (rb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.RBTree = type { ptr, ptr }

@__const.main.arr = external hidden unnamed_addr constant [5 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6RBTreeC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6RBTree3setEii(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef, i32 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6RBTree6removeEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) #2 align 2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #3 {
  %1 = alloca i32, align 4
  %2 = alloca %class.RBTree, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca [5 x i32], align 16
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 16, ptr %2) #6
  call void @_ZN6RBTreeC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %2)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  store i32 3, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #6
  %7 = call i64 @time(ptr noundef null) #6
  %8 = trunc i64 %7 to i32
  call void @srand(i32 noundef %8) #6
  call void @llvm.lifetime.start.p0(i64 20, ptr %6) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %6, ptr align 16 @__const.main.arr, i64 20, i1 false)
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %19, %0
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = icmp slt i32 %10, %11
  br i1 %12, label %13, label %22

13:                                               ; preds = %9
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [5 x i32], ptr %6, i64 0, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = load i32, ptr %3, align 4, !tbaa !5
  call void @_ZN6RBTree3setEii(ptr noundef nonnull align 8 dereferenceable(16) %2, i32 noundef %17, i32 noundef %18)
  br label %19

19:                                               ; preds = %13
  %20 = load i32, ptr %3, align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr %3, align 4, !tbaa !5
  br label %9, !llvm.loop !9

22:                                               ; preds = %9
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %32, %22
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %27, label %35

27:                                               ; preds = %23
  %28 = load i32, ptr %3, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [5 x i32], ptr %6, i64 0, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  call void @_ZN6RBTree6removeEi(ptr noundef nonnull align 8 dereferenceable(16) %2, i32 noundef %31)
  br label %32

32:                                               ; preds = %27
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %3, align 4, !tbaa !5
  br label %23, !llvm.loop !11

35:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 20, ptr %6) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  call void @llvm.lifetime.end.p0(i64 16, ptr %2) #6
  ret i32 0
}

; Function Attrs: nounwind
declare void @srand(i32 noundef) #4

; Function Attrs: nounwind
declare i64 @time(ptr noundef) #4

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.RBTree = type { ptr, ptr }

@__const.main.arr = external hidden unnamed_addr constant [5 x i32], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6RBTreeC2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6RBTree3setEii(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef, i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN6RBTree6removeEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #3 {
.preheader.preheader:
  %0 = alloca %class.RBTree, align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %0) #5
  call void @_ZN6RBTreeC2Ev(ptr noundef nonnull align 8 dereferenceable(16) %0)
  %1 = call i64 @time(ptr noundef null) #5
  %2 = trunc i64 %1 to i32
  call void @srand(i32 noundef %2) #5
  %3 = load i32, ptr @__const.main.arr, align 16, !tbaa !5
  call void @_ZN6RBTree3setEii(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %3, i32 noundef 0)
  %4 = load i32, ptr getelementptr inbounds (i8, ptr @__const.main.arr, i64 4), align 4, !tbaa !5
  call void @_ZN6RBTree3setEii(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %4, i32 noundef 1)
  %5 = load i32, ptr getelementptr inbounds (i8, ptr @__const.main.arr, i64 8), align 8, !tbaa !5
  call void @_ZN6RBTree3setEii(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %5, i32 noundef 2)
  call void @_ZN6RBTree6removeEi(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %3)
  call void @_ZN6RBTree6removeEi(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %4)
  call void @_ZN6RBTree6removeEi(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %5)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %0) #5
  ret i32 0
}

; Function Attrs: nounwind
declare void @srand(i32 noundef) local_unnamed_addr #4

; Function Attrs: nounwind
declare i64 @time(ptr noundef) local_unnamed_addr #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass