; LLVM IR from Rintarooo/VRPTW_ACO_Routing :: src/colony.ll (ZN6Colony18reset_at_each_stepEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Graph = type { ptr, i32, i32, ptr, ptr, ptr }
%class.Car = type { i32, i32, i32, i32, i32, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Node = type { i32, i32, i32, i32, i8, i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN6Colony18reset_at_each_stepEv(ptr noundef nonnull align 8 dereferenceable(56) %0) #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %5 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %37, %1
  %7 = load i32, ptr %3, align 4, !tbaa !9
  %8 = getelementptr inbounds %class.Graph, ptr %5, i32 0, i32 1
  %9 = load i32, ptr %8, align 8, !tbaa !11
  %10 = icmp slt i32 %7, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %40

12:                                               ; preds = %6
  %13 = getelementptr inbounds %class.Graph, ptr %5, i32 0, i32 3
  %14 = load ptr, ptr %13, align 8, !tbaa !13
  %15 = load i32, ptr %3, align 4, !tbaa !9
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds %class.Car, ptr %14, i64 %16
  %18 = getelementptr inbounds %class.Car, ptr %17, i32 0, i32 5
  call void @_ZNSt6vectorI4NodeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %18) #2
  %19 = getelementptr inbounds %class.Graph, ptr %5, i32 0, i32 3
  %20 = load ptr, ptr %19, align 8, !tbaa !13
  %21 = load i32, ptr %3, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds %class.Car, ptr %20, i64 %22
  %24 = getelementptr inbounds %class.Car, ptr %23, i32 0, i32 1
  store i32 0, ptr %24, align 4, !tbaa !14
  %25 = getelementptr inbounds %class.Graph, ptr %5, i32 0, i32 3
  %26 = load ptr, ptr %25, align 8, !tbaa !13
  %27 = load i32, ptr %3, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds %class.Car, ptr %26, i64 %28
  %30 = getelementptr inbounds %class.Car, ptr %29, i32 0, i32 2
  store i32 0, ptr %30, align 8, !tbaa !20
  %31 = getelementptr inbounds %class.Graph, ptr %5, i32 0, i32 3
  %32 = load ptr, ptr %31, align 8, !tbaa !13
  %33 = load i32, ptr %3, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds %class.Car, ptr %32, i64 %34
  %36 = getelementptr inbounds %class.Car, ptr %35, i32 0, i32 4
  store i32 0, ptr %36, align 8, !tbaa !21
  br label %37

37:                                               ; preds = %12
  %38 = load i32, ptr %3, align 4, !tbaa !9
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr %3, align 4, !tbaa !9
  br label %6, !llvm.loop !22

40:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %54, %40
  %42 = load i32, ptr %4, align 4, !tbaa !9
  %43 = getelementptr inbounds %class.Graph, ptr %5, i32 0, i32 2
  %44 = load i32, ptr %43, align 4, !tbaa !24
  %45 = icmp slt i32 %42, %44
  br i1 %45, label %47, label %46

46:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %57

47:                                               ; preds = %41
  %48 = getelementptr inbounds %class.Graph, ptr %5, i32 0, i32 4
  %49 = load ptr, ptr %48, align 8, !tbaa !25
  %50 = load i32, ptr %4, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds %class.Node, ptr %49, i64 %51
  %53 = getelementptr inbounds %class.Node, ptr %52, i32 0, i32 4
  store i8 0, ptr %53, align 4, !tbaa !26
  br label %54

54:                                               ; preds = %47
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %4, align 4, !tbaa !9
  br label %41, !llvm.loop !29

57:                                               ; preds = %46
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI4NodeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"_ZTS5Graph", !10, i64 8, !10, i64 12, !6, i64 16, !6, i64 24, !6, i64 32}
!13 = !{!12, !6, i64 16}
!14 = !{!15, !10, i64 4}
!15 = !{!"_ZTS3Car", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !16, i64 24}
!16 = !{!"_ZTSSt6vectorI4NodeSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseI4NodeSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!15, !10, i64 8}
!21 = !{!15, !10, i64 16}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!12, !10, i64 12}
!25 = !{!12, !6, i64 24}
!26 = !{!27, !28, i64 16}
!27 = !{!"_ZTS4Node", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !28, i64 16, !10, i64 20, !10, i64 24, !10, i64 28}
!28 = !{!"bool", !7, i64 0}
!29 = distinct !{!29, !23}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Car = type { i32, i32, i32, i32, i32, %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl" = type { %"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Node, std::allocator<Node>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.Node = type { i32, i32, i32, i32, i8, i32, i32, i32 }

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN6Colony18reset_at_each_stepEv(ptr nocapture noundef nonnull readonly align 8 dereferenceable(56) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  %3 = load i32, ptr %2, align 8, !tbaa !5
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %.preheader

.lr.ph:                                           ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  %.pre = load ptr, ptr %5, align 8, !tbaa !11
  br label %12

.preheader:                                       ; preds = %12, %1
  %6 = getelementptr inbounds i8, ptr %0, i64 12
  %7 = load i32, ptr %6, align 4, !tbaa !12
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.lr.ph12, label %._crit_edge

.lr.ph12:                                         ; preds = %.preheader
  %9 = getelementptr inbounds i8, ptr %0, i64 24
  %10 = load ptr, ptr %9, align 8, !tbaa !13
  %wide.trip.count = zext nneg i32 %7 to i64
  %xtraiter = and i64 %wide.trip.count, 3
  %11 = icmp ult i32 %7, 4
  br i1 %11, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph12.new

.lr.ph12.new:                                     ; preds = %.lr.ph12
  %unroll_iter = and i64 %wide.trip.count, 2147483644
  br label %23

12:                                               ; preds = %.lr.ph, %12
  %13 = phi ptr [ %.pre, %.lr.ph ], [ %15, %12 ]
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %12 ]
  %14 = getelementptr inbounds %class.Car, ptr %13, i64 %indvars.iv, i32 5
  tail call void @_ZNSt6vectorI4NodeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %14) #1
  %15 = load ptr, ptr %5, align 8, !tbaa !11
  %16 = getelementptr inbounds %class.Car, ptr %15, i64 %indvars.iv, i32 1
  store i32 0, ptr %16, align 4, !tbaa !14
  %17 = getelementptr inbounds %class.Car, ptr %15, i64 %indvars.iv, i32 2
  store i32 0, ptr %17, align 8, !tbaa !20
  %18 = getelementptr inbounds %class.Car, ptr %15, i64 %indvars.iv, i32 4
  store i32 0, ptr %18, align 8, !tbaa !21
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %19 = load i32, ptr %2, align 8, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = icmp slt i64 %indvars.iv.next, %20
  br i1 %21, label %12, label %.preheader, !llvm.loop !22

._crit_edge.loopexit.unr-lcssa:                   ; preds = %23, %.lr.ph12
  %indvars.iv14.unr = phi i64 [ 0, %.lr.ph12 ], [ %indvars.iv.next15.3, %23 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.epil.preheader

.epil.preheader:                                  ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader
  %indvars.iv14.epil = phi i64 [ %indvars.iv.next15.epil, %.epil.preheader ], [ %indvars.iv14.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.epil.preheader ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %22 = getelementptr inbounds %class.Node, ptr %10, i64 %indvars.iv14.epil, i32 4
  store i8 0, ptr %22, align 4, !tbaa !24
  %indvars.iv.next15.epil = add nuw nsw i64 %indvars.iv14.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.epil.preheader, !llvm.loop !27

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader, %.preheader
  ret void

23:                                               ; preds = %23, %.lr.ph12.new
  %indvars.iv14 = phi i64 [ 0, %.lr.ph12.new ], [ %indvars.iv.next15.3, %23 ]
  %niter = phi i64 [ 0, %.lr.ph12.new ], [ %niter.next.3, %23 ]
  %24 = getelementptr inbounds %class.Node, ptr %10, i64 %indvars.iv14, i32 4
  store i8 0, ptr %24, align 4, !tbaa !24
  %indvars.iv.next15 = or disjoint i64 %indvars.iv14, 1
  %25 = getelementptr inbounds %class.Node, ptr %10, i64 %indvars.iv.next15, i32 4
  store i8 0, ptr %25, align 4, !tbaa !24
  %indvars.iv.next15.1 = or disjoint i64 %indvars.iv14, 2
  %26 = getelementptr inbounds %class.Node, ptr %10, i64 %indvars.iv.next15.1, i32 4
  store i8 0, ptr %26, align 4, !tbaa !24
  %indvars.iv.next15.2 = or disjoint i64 %indvars.iv14, 3
  %27 = getelementptr inbounds %class.Node, ptr %10, i64 %indvars.iv.next15.2, i32 4
  store i8 0, ptr %27, align 4, !tbaa !24
  %indvars.iv.next15.3 = add nuw nsw i64 %indvars.iv14, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %23, !llvm.loop !29
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorI4NodeSaIS0_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"_ZTS5Graph", !7, i64 8, !7, i64 12, !10, i64 16, !10, i64 24, !10, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 16}
!12 = !{!6, !7, i64 12}
!13 = !{!6, !10, i64 24}
!14 = !{!15, !7, i64 4}
!15 = !{!"_ZTS3Car", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !16, i64 24}
!16 = !{!"_ZTSSt6vectorI4NodeSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseI4NodeSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI4NodeSaIS0_EE17_Vector_impl_dataE", !10, i64 0, !10, i64 8, !10, i64 16}
!20 = !{!15, !7, i64 8}
!21 = !{!15, !7, i64 16}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = !{!25, !26, i64 16}
!25 = !{!"_ZTS4Node", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !26, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!26 = !{!"bool", !8, i64 0}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.unroll.disable"}
!29 = distinct !{!29, !23}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass