; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@FM17522_firmware_reference = external hidden constant [64 x i8], align 4
@MFRC522_firmware_referenceV0_0 = external hidden constant [64 x i8], align 4
@MFRC522_firmware_referenceV1_0 = external hidden constant [64 x i8], align 4
@MFRC522_firmware_referenceV2_0 = external hidden constant [64 x i8], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_WriteRegister(i8 noundef zeroext, i8 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_WriteRegister_n(i8 noundef zeroext, i8 noundef zeroext, ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_PCD_ReadRegister(i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_ReadRegister_n(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_SetRegisterBitMask(i8 noundef zeroext, i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_Reset() #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @MFRC522_PCD_PerformSelfTest() #0 {
  %1 = alloca i8, align 1
  %2 = alloca [25 x i8], align 16
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca [64 x i8], align 16
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  call void @MFRC522_PCD_Reset()
  call void @llvm.lifetime.start.p0(i64 25, ptr %2) #4
  call void @llvm.memset.p0.i64(ptr align 16 %2, i8 0, i64 25, i1 false)
  call void @MFRC522_PCD_SetRegisterBitMask(i8 noundef zeroext 20, i8 noundef zeroext -128)
  %9 = getelementptr inbounds [25 x i8], ptr %2, i64 0, i64 0
  call void @MFRC522_PCD_WriteRegister_n(i8 noundef zeroext 18, i8 noundef zeroext 25, ptr noundef %9)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 2, i8 noundef zeroext 1)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 108, i8 noundef zeroext 9)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 18, i8 noundef zeroext 0)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 2, i8 noundef zeroext 3)
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #4
  store i8 0, ptr %4, align 1, !tbaa !5
  br label %10

10:                                               ; preds = %21, %0
  %11 = load i8, ptr %4, align 1, !tbaa !5
  %12 = zext i8 %11 to i32
  %13 = icmp slt i32 %12, 255
  br i1 %13, label %14, label %24

14:                                               ; preds = %10
  %15 = call zeroext i8 @MFRC522_PCD_ReadRegister(i8 noundef zeroext 20)
  store i8 %15, ptr %3, align 1, !tbaa !5
  %16 = load i8, ptr %3, align 1, !tbaa !5
  %17 = zext i8 %16 to i32
  %18 = icmp sge i32 %17, 64
  br i1 %18, label %19, label %20

19:                                               ; preds = %14
  br label %24

20:                                               ; preds = %14
  br label %21

21:                                               ; preds = %20
  %22 = load i8, ptr %4, align 1, !tbaa !5
  %23 = add i8 %22, 1
  store i8 %23, ptr %4, align 1, !tbaa !5
  br label %10, !llvm.loop !8

24:                                               ; preds = %19, %10
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 2, i8 noundef zeroext 0)
  call void @llvm.lifetime.start.p0(i64 64, ptr %5) #4
  %25 = getelementptr inbounds [64 x i8], ptr %5, i64 0, i64 0
  call void @MFRC522_PCD_ReadRegister_n(i8 noundef zeroext 18, i8 noundef zeroext 64, ptr noundef %25, i8 noundef zeroext 0)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 108, i8 noundef zeroext 0)
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #4
  %26 = call zeroext i8 @MFRC522_PCD_ReadRegister(i8 noundef zeroext 110)
  store i8 %26, ptr %6, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %27 = load i8, ptr %6, align 1, !tbaa !5
  %28 = zext i8 %27 to i32
  switch i32 %28, label %33 [
    i32 136, label %29
    i32 144, label %30
    i32 145, label %31
    i32 146, label %32
  ]

29:                                               ; preds = %24
  store ptr @FM17522_firmware_reference, ptr %7, align 8, !tbaa !10
  br label %34

30:                                               ; preds = %24
  store ptr @MFRC522_firmware_referenceV0_0, ptr %7, align 8, !tbaa !10
  br label %34

31:                                               ; preds = %24
  store ptr @MFRC522_firmware_referenceV1_0, ptr %7, align 8, !tbaa !10
  br label %34

32:                                               ; preds = %24
  store ptr @MFRC522_firmware_referenceV2_0, ptr %7, align 8, !tbaa !10
  br label %34

33:                                               ; preds = %24
  store i8 0, ptr %1, align 1
  store i32 1, ptr %8, align 4
  br label %41

34:                                               ; preds = %32, %31, %30, %29
  %35 = getelementptr inbounds [64 x i8], ptr %5, i64 0, i64 0
  %36 = load ptr, ptr %7, align 8, !tbaa !10
  %37 = call i32 @irom_cmp(ptr noundef %35, i32 noundef 64, ptr noundef %36)
  %38 = icmp ne i32 0, %37
  br i1 %38, label %39, label %40

39:                                               ; preds = %34
  store i8 0, ptr %1, align 1
  store i32 1, ptr %8, align 4
  br label %41

40:                                               ; preds = %34
  store i8 1, ptr %1, align 1
  store i32 1, ptr %8, align 4
  br label %41

41:                                               ; preds = %40, %39, %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 64, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 25, ptr %2) #4
  %42 = load i8, ptr %1, align 1
  ret i8 %42
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

declare i32 @irom_cmp(ptr noundef, i32 noundef, ptr noundef) #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@FM17522_firmware_reference = external hidden constant [64 x i8], align 4
@MFRC522_firmware_referenceV0_0 = external hidden constant [64 x i8], align 4
@MFRC522_firmware_referenceV1_0 = external hidden constant [64 x i8], align 4
@MFRC522_firmware_referenceV2_0 = external hidden constant [64 x i8], align 4

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_WriteRegister(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_WriteRegister_n(i8 noundef zeroext, i8 noundef zeroext, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_PCD_ReadRegister(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_ReadRegister_n(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_SetRegisterBitMask(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_Reset() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @MFRC522_PCD_PerformSelfTest() local_unnamed_addr #0 {
  %1 = alloca [25 x i8], align 16
  %2 = alloca [64 x i8], align 16
  tail call void @MFRC522_PCD_Reset()
  call void @llvm.lifetime.start.p0(i64 25, ptr nonnull %1) #4
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(25) %1, i8 0, i64 25, i1 false)
  tail call void @MFRC522_PCD_SetRegisterBitMask(i8 noundef zeroext 20, i8 noundef zeroext -128)
  call void @MFRC522_PCD_WriteRegister_n(i8 noundef zeroext 18, i8 noundef zeroext 25, ptr noundef nonnull %1)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 2, i8 noundef zeroext 1)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 108, i8 noundef zeroext 9)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 18, i8 noundef zeroext 0)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 2, i8 noundef zeroext 3)
  br label %3

3:                                                ; preds = %3, %0
  %.068 = phi i8 [ 0, %0 ], [ %6, %3 ]
  %4 = call zeroext i8 @MFRC522_PCD_ReadRegister(i8 noundef zeroext 20)
  %5 = icmp ugt i8 %4, 63
  %6 = add nuw i8 %.068, 1
  %.not = icmp eq i8 %6, -1
  %or.cond = select i1 %5, i1 true, i1 %.not
  br i1 %or.cond, label %7, label %3, !llvm.loop !5

7:                                                ; preds = %3
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 2, i8 noundef zeroext 0)
  call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %2) #4
  call void @MFRC522_PCD_ReadRegister_n(i8 noundef zeroext 18, i8 noundef zeroext 64, ptr noundef nonnull %2, i8 noundef zeroext 0)
  call void @MFRC522_PCD_WriteRegister(i8 noundef zeroext 108, i8 noundef zeroext 0)
  %8 = call zeroext i8 @MFRC522_PCD_ReadRegister(i8 noundef zeroext 110)
  switch i8 %8, label %14 [
    i8 -120, label %12
    i8 -112, label %9
    i8 -111, label %10
    i8 -110, label %11
  ]

9:                                                ; preds = %7
  br label %12

10:                                               ; preds = %7
  br label %12

11:                                               ; preds = %7
  br label %12

12:                                               ; preds = %7, %11, %10, %9
  %.0 = phi ptr [ @MFRC522_firmware_referenceV2_0, %11 ], [ @MFRC522_firmware_referenceV1_0, %10 ], [ @MFRC522_firmware_referenceV0_0, %9 ], [ @FM17522_firmware_reference, %7 ]
  %13 = call i32 @irom_cmp(ptr noundef nonnull %2, i32 noundef 64, ptr noundef nonnull %.0) #4
  %.not7 = icmp eq i32 %13, 0
  %. = zext i1 %.not7 to i8
  br label %14

14:                                               ; preds = %12, %7
  %.05 = phi i8 [ 0, %7 ], [ %., %12 ]
  call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %2) #4
  call void @llvm.lifetime.end.p0(i64 25, ptr nonnull %1) #4
  ret i8 %.05
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

declare i32 @irom_cmp(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass