; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CalculateCRC(ptr noundef, i8 noundef zeroext, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_PCD_NTAG216_AUTH(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca [18 x i8], align 16
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 18, ptr %7) #2
  %13 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 0
  store i8 27, ptr %13, align 16, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  store i8 0, ptr %8, align 1, !tbaa !9
  br label %14

14:                                               ; preds = %29, %2
  %15 = load i8, ptr %8, align 1, !tbaa !9
  %16 = zext i8 %15 to i32
  %17 = icmp slt i32 %16, 4
  br i1 %17, label %18, label %32

18:                                               ; preds = %14
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = load i8, ptr %8, align 1, !tbaa !9
  %21 = zext i8 %20 to i64
  %22 = getelementptr inbounds i8, ptr %19, i64 %21
  %23 = load i8, ptr %22, align 1, !tbaa !9
  %24 = load i8, ptr %8, align 1, !tbaa !9
  %25 = zext i8 %24 to i32
  %26 = add nsw i32 %25, 1
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 %27
  store i8 %23, ptr %28, align 1, !tbaa !9
  br label %29

29:                                               ; preds = %18
  %30 = load i8, ptr %8, align 1, !tbaa !9
  %31 = add i8 %30, 1
  store i8 %31, ptr %8, align 1, !tbaa !9
  br label %14, !llvm.loop !10

32:                                               ; preds = %14
  %33 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 0
  %34 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 5
  %35 = call i32 @MFRC522_PCD_CalculateCRC(ptr noundef %33, i8 noundef zeroext 5, ptr noundef %34)
  store i32 %35, ptr %6, align 4, !tbaa !12
  %36 = load i32, ptr %6, align 4, !tbaa !12
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %40

38:                                               ; preds = %32
  %39 = load i32, ptr %6, align 4, !tbaa !12
  store i32 %39, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %59

40:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #2
  store i8 48, ptr %10, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #2
  store i8 0, ptr %11, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #2
  store i8 5, ptr %12, align 1, !tbaa !9
  %41 = load i8, ptr %10, align 1, !tbaa !9
  %42 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 0
  %43 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 0
  %44 = call i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext 12, i8 noundef zeroext %41, ptr noundef %42, i8 noundef zeroext 7, ptr noundef %43, ptr noundef %12, ptr noundef %11, i8 noundef zeroext 0, i8 noundef zeroext 0)
  store i32 %44, ptr %6, align 4, !tbaa !12
  %45 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 0
  %46 = load i8, ptr %45, align 16, !tbaa !9
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = getelementptr inbounds i8, ptr %47, i64 0
  store i8 %46, ptr %48, align 1, !tbaa !9
  %49 = getelementptr inbounds [18 x i8], ptr %7, i64 0, i64 1
  %50 = load i8, ptr %49, align 1, !tbaa !9
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = getelementptr inbounds i8, ptr %51, i64 1
  store i8 %50, ptr %52, align 1, !tbaa !9
  %53 = load i32, ptr %6, align 4, !tbaa !12
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %57

55:                                               ; preds = %40
  %56 = load i32, ptr %6, align 4, !tbaa !12
  store i32 %56, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %58

57:                                               ; preds = %40
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %58

58:                                               ; preds = %57, %55
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #2
  br label %59

59:                                               ; preds = %58, %38
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 18, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %60 = load i32, ptr %3, align 4
  ret i32 %60
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CalculateCRC(ptr noundef, i8 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_PCD_NTAG216_AUTH(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #1 {
  %3 = alloca [18 x i8], align 16
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 18, ptr nonnull %3) #2
  store i8 27, ptr %3, align 16, !tbaa !5
  %scevgep = getelementptr inbounds i8, ptr %3, i64 1
  %6 = load i32, ptr %0, align 1, !tbaa !5
  store i32 %6, ptr %scevgep, align 1, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %3, i64 5
  %8 = call i32 @MFRC522_PCD_CalculateCRC(ptr noundef nonnull %3, i8 noundef zeroext 5, ptr noundef nonnull %7)
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %9, label %14

9:                                                ; preds = %2
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %4) #2
  store i8 0, ptr %4, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #2
  store i8 5, ptr %5, align 1, !tbaa !5
  %10 = call i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext 12, i8 noundef zeroext 48, ptr noundef nonnull %3, i8 noundef zeroext 7, ptr noundef nonnull %3, ptr noundef nonnull %5, ptr noundef nonnull %4, i8 noundef zeroext 0, i8 noundef zeroext 0)
  %11 = load i8, ptr %3, align 16, !tbaa !5
  store i8 %11, ptr %1, align 1, !tbaa !5
  %12 = load i8, ptr %scevgep, align 1, !tbaa !5
  %13 = getelementptr inbounds i8, ptr %1, i64 1
  store i8 %12, ptr %13, align 1, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %4) #2
  br label %14

14:                                               ; preds = %2, %9
  %.1 = phi i32 [ %10, %9 ], [ %8, %2 ]
  call void @llvm.lifetime.end.p0(i64 18, ptr nonnull %3) #2
  ret i32 %.1
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopIdiomRecognizePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass