; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/UVA/1147/main.ll (Z14checkMoveHorsev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@hx = external dso_local global i32, align 4
@hy = external dso_local global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z14checkMoveHorsev() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %108, %0
  %6 = load i32, ptr %2, align 4, !tbaa !5
  %7 = icmp slt i32 %6, 8
  br i1 %7, label %9, label %8

8:                                                ; preds = %5
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  br label %111

9:                                                ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %104, %9
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = icmp slt i32 %11, 8
  br i1 %12, label %14, label %13

13:                                               ; preds = %10
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  br label %107

14:                                               ; preds = %10
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %16) #2
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %19) #2
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = icmp eq i32 %21, 2
  br i1 %22, label %32, label %23

23:                                               ; preds = %14
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %25) #2
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %28) #2
  %30 = load i32, ptr %29, align 4, !tbaa !5
  %31 = icmp eq i32 %30, 3
  br i1 %31, label %32, label %103

32:                                               ; preds = %23, %14
  %33 = load i32, ptr %2, align 4, !tbaa !5
  %34 = load i32, ptr @hx, align 4, !tbaa !5
  %35 = icmp ne i32 %33, %34
  br i1 %35, label %36, label %103

36:                                               ; preds = %32
  %37 = load i32, ptr %4, align 4, !tbaa !5
  %38 = load i32, ptr @hy, align 4, !tbaa !5
  %39 = icmp ne i32 %37, %38
  br i1 %39, label %40, label %103

40:                                               ; preds = %36
  %41 = load i32, ptr %2, align 4, !tbaa !5
  %42 = add nsw i32 %41, 1
  %43 = icmp sle i32 %42, 7
  br i1 %43, label %44, label %70

44:                                               ; preds = %40
  %45 = load i32, ptr %4, align 4, !tbaa !5
  %46 = sub nsw i32 %45, 1
  %47 = icmp sge i32 %46, 0
  br i1 %47, label %48, label %70

48:                                               ; preds = %44
  %49 = load i32, ptr %2, align 4, !tbaa !5
  %50 = add nsw i32 %49, 1
  %51 = sext i32 %50 to i64
  %52 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %51) #2
  %53 = load i32, ptr %4, align 4, !tbaa !5
  %54 = sub nsw i32 %53, 1
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %55) #2
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = icmp eq i32 %57, 1
  br i1 %58, label %103, label %59

59:                                               ; preds = %48
  %60 = load i32, ptr %2, align 4, !tbaa !5
  %61 = add nsw i32 %60, 1
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %62) #2
  %64 = load i32, ptr %4, align 4, !tbaa !5
  %65 = sub nsw i32 %64, 1
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %66) #2
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %69 = icmp eq i32 %68, 3
  br i1 %69, label %103, label %70

70:                                               ; preds = %59, %44, %40
  %71 = load i32, ptr %2, align 4, !tbaa !5
  %72 = add nsw i32 %71, 1
  %73 = icmp sle i32 %72, 7
  br i1 %73, label %74, label %100

74:                                               ; preds = %70
  %75 = load i32, ptr %4, align 4, !tbaa !5
  %76 = add nsw i32 %75, 1
  %77 = icmp sle i32 %76, 7
  br i1 %77, label %78, label %100

78:                                               ; preds = %74
  %79 = load i32, ptr %2, align 4, !tbaa !5
  %80 = add nsw i32 %79, 1
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %81) #2
  %83 = load i32, ptr %4, align 4, !tbaa !5
  %84 = add nsw i32 %83, 1
  %85 = sext i32 %84 to i64
  %86 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %82, i64 noundef %85) #2
  %87 = load i32, ptr %86, align 4, !tbaa !5
  %88 = icmp eq i32 %87, 1
  br i1 %88, label %103, label %89

89:                                               ; preds = %78
  %90 = load i32, ptr %2, align 4, !tbaa !5
  %91 = add nsw i32 %90, 1
  %92 = sext i32 %91 to i64
  %93 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %92) #2
  %94 = load i32, ptr %4, align 4, !tbaa !5
  %95 = add nsw i32 %94, 1
  %96 = sext i32 %95 to i64
  %97 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %96) #2
  %98 = load i32, ptr %97, align 4, !tbaa !5
  %99 = icmp eq i32 %98, 3
  br i1 %99, label %103, label %100

100:                                              ; preds = %89, %74, %70
  %101 = load i32, ptr %1, align 4, !tbaa !5
  %102 = add nsw i32 %101, 1
  store i32 %102, ptr %1, align 4, !tbaa !5
  br label %103

103:                                              ; preds = %100, %89, %78, %59, %48, %36, %32, %23
  br label %104

104:                                              ; preds = %103
  %105 = load i32, ptr %4, align 4, !tbaa !5
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %4, align 4, !tbaa !5
  br label %10, !llvm.loop !9

107:                                              ; preds = %13
  br label %108

108:                                              ; preds = %107
  %109 = load i32, ptr %2, align 4, !tbaa !5
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %2, align 4, !tbaa !5
  br label %5, !llvm.loop !11

111:                                              ; preds = %8
  %112 = load i32, ptr %1, align 4, !tbaa !5
  store i32 1, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret i32 %112
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@hx = external dso_local local_unnamed_addr global i32, align 4
@hy = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z14checkMoveHorsev() local_unnamed_addr #0 {
  br label %.preheader

.preheader:                                       ; preds = %0, %.loopexit
  %indvars.iv43 = phi i64 [ 0, %0 ], [ %indvars.iv.next44, %.loopexit ]
  %.02539 = phi i32 [ 0, %0 ], [ %.2, %.loopexit ]
  %indvars.iv.next44 = add nuw nsw i64 %indvars.iv43, 1
  %.not31 = icmp eq i64 %indvars.iv43, 7
  %1 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv43) #1
  %2 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0) #1
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = icmp eq i32 %3, 2
  br i1 %4, label %12, label %5

5:                                                ; preds = %.preheader
  %6 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv43) #1
  %7 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef 0) #1
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = icmp ne i32 %8, 3
  %10 = load i32, ptr @hx, align 4
  %11 = zext i32 %10 to i64
  %.not.peel = icmp eq i64 %indvars.iv43, %11
  %or.cond.peel = select i1 %9, i1 true, i1 %.not.peel
  br i1 %or.cond.peel, label %.peel.next.preheader, label %14

12:                                               ; preds = %.preheader
  %.old.peel = load i32, ptr @hx, align 4, !tbaa !5
  %13 = zext i32 %.old.peel to i64
  %.not.old.peel = icmp eq i64 %indvars.iv43, %13
  br i1 %.not.old.peel, label %.peel.next.preheader, label %14

14:                                               ; preds = %12, %5
  %15 = load i32, ptr @hy, align 4, !tbaa !5
  %.not30.peel = icmp eq i32 %15, 0
  br i1 %.not30.peel, label %.peel.next.preheader, label %16

16:                                               ; preds = %14
  br i1 %.not31, label %27, label %17

17:                                               ; preds = %16
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next44) #1
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef 1) #1
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp eq i32 %20, 1
  br i1 %21, label %.peel.next.preheader, label %22

22:                                               ; preds = %17
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next44) #1
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef 1) #1
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %26 = icmp eq i32 %25, 3
  br i1 %26, label %.peel.next.preheader, label %27

27:                                               ; preds = %22, %16
  %28 = add nsw i32 %.02539, 1
  br label %.peel.next.preheader

.peel.next.preheader:                             ; preds = %5, %12, %14, %17, %22, %27
  %.136.ph = phi i32 [ %28, %27 ], [ %.02539, %22 ], [ %.02539, %17 ], [ %.02539, %14 ], [ %.02539, %12 ], [ %.02539, %5 ]
  br label %.peel.next

29:                                               ; preds = %.loopexit
  ret i32 %.2

.loopexit:                                        ; preds = %71
  %exitcond46.not = icmp eq i64 %indvars.iv.next44, 8
  br i1 %exitcond46.not, label %29, label %.preheader, !llvm.loop !9

.peel.next:                                       ; preds = %.peel.next.preheader, %71
  %indvars.iv = phi i64 [ %indvars.iv.next, %71 ], [ 1, %.peel.next.preheader ]
  %.136 = phi i32 [ %.2, %71 ], [ %.136.ph, %.peel.next.preheader ]
  %30 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv43) #1
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %indvars.iv) #1
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = icmp eq i32 %32, 2
  br i1 %33, label %41, label %34

34:                                               ; preds = %.peel.next
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv43) #1
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %indvars.iv) #1
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = icmp ne i32 %37, 3
  %39 = load i32, ptr @hx, align 4
  %40 = zext i32 %39 to i64
  %.not = icmp eq i64 %indvars.iv43, %40
  %or.cond = select i1 %38, i1 true, i1 %.not
  br i1 %or.cond, label %71, label %43

41:                                               ; preds = %.peel.next
  %.old = load i32, ptr @hx, align 4, !tbaa !5
  %42 = zext i32 %.old to i64
  %.not.old = icmp eq i64 %indvars.iv43, %42
  br i1 %.not.old, label %71, label %43

43:                                               ; preds = %34, %41
  %44 = load i32, ptr @hy, align 4, !tbaa !5
  %45 = zext i32 %44 to i64
  %.not30 = icmp eq i64 %indvars.iv, %45
  br i1 %.not30, label %71, label %46

46:                                               ; preds = %43
  br i1 %.not31, label %.thread, label %47

47:                                               ; preds = %46
  %48 = add nsw i64 %indvars.iv, -1
  %49 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next44) #1
  %50 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %48) #1
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = icmp eq i32 %51, 1
  br i1 %52, label %71, label %53

53:                                               ; preds = %47
  %54 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next44) #1
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %48) #1
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = icmp eq i32 %56, 3
  br i1 %57, label %71, label %58

58:                                               ; preds = %53
  %.not33 = icmp eq i64 %indvars.iv, 7
  %or.cond35 = or i1 %.not31, %.not33
  br i1 %or.cond35, label %.thread, label %59

59:                                               ; preds = %58
  %60 = add nuw nsw i64 %indvars.iv, 1
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next44) #1
  %62 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %60) #1
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = icmp eq i32 %63, 1
  br i1 %64, label %71, label %65

65:                                               ; preds = %59
  %66 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %indvars.iv.next44) #1
  %67 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %60) #1
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %69 = icmp eq i32 %68, 3
  br i1 %69, label %71, label %.thread

.thread:                                          ; preds = %46, %65, %58
  %70 = add nsw i32 %.136, 1
  br label %71

71:                                               ; preds = %34, %41, %43, %47, %53, %59, %65, %.thread
  %.2 = phi i32 [ %.136, %47 ], [ %.136, %53 ], [ %.136, %59 ], [ %.136, %65 ], [ %70, %.thread ], [ %.136, %43 ], [ %.136, %41 ], [ %.136, %34 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 8
  br i1 %exitcond.not, label %.loopexit, label %.peel.next, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10, !12}
!12 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass