; LLVM IR from bjourne/fast_snn_fpga :: src (opencl)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @ocl_get_platforms(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @ocl_get_devices(ptr noundef, ptr noundef, ptr noundef) #1

; Function Attrs: nounwind
declare void @free(ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @ocl_basic_setup(i32 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, i64 noundef %5, ptr noundef %6) #1 {
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i64, align 8
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca ptr, align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca ptr, align 8
  %22 = alloca i64, align 8
  %23 = alloca i64, align 8
  store i32 %0, ptr %9, align 4, !tbaa !5
  store i32 %1, ptr %10, align 4, !tbaa !5
  store ptr %2, ptr %11, align 8, !tbaa !9
  store ptr %3, ptr %12, align 8, !tbaa !9
  store ptr %4, ptr %13, align 8, !tbaa !9
  store i64 %5, ptr %14, align 8, !tbaa !11
  store ptr %6, ptr %15, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %24 = call i32 @ocl_get_platforms(ptr noundef %16, ptr noundef %17)
  store i32 %24, ptr %18, align 4, !tbaa !5
  %25 = load i32, ptr %18, align 4, !tbaa !5
  %26 = icmp ne i32 %25, 0
  br i1 %26, label %27, label %29

27:                                               ; preds = %7
  %28 = load i32, ptr %18, align 4, !tbaa !5
  store i32 %28, ptr %8, align 4
  store i32 1, ptr %19, align 4
  br label %114

29:                                               ; preds = %7
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = load i32, ptr %16, align 4, !tbaa !5
  %32 = icmp uge i32 %30, %31
  br i1 %32, label %33, label %34

33:                                               ; preds = %29
  store i32 2, ptr %8, align 4
  store i32 1, ptr %19, align 4
  br label %114

34:                                               ; preds = %29
  %35 = load ptr, ptr %17, align 8, !tbaa !9
  %36 = load i32, ptr %9, align 4, !tbaa !5
  %37 = zext i32 %36 to i64
  %38 = getelementptr inbounds ptr, ptr %35, i64 %37
  %39 = load ptr, ptr %38, align 8, !tbaa !9
  %40 = load ptr, ptr %11, align 8, !tbaa !9
  store ptr %39, ptr %40, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #4
  %41 = load ptr, ptr %11, align 8, !tbaa !9
  %42 = load ptr, ptr %41, align 8, !tbaa !9
  %43 = call i32 @ocl_get_devices(ptr noundef %42, ptr noundef %20, ptr noundef %21)
  store i32 %43, ptr %18, align 4, !tbaa !5
  %44 = load i32, ptr %18, align 4, !tbaa !5
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %48

46:                                               ; preds = %34
  %47 = load i32, ptr %18, align 4, !tbaa !5
  store i32 %47, ptr %8, align 4
  store i32 1, ptr %19, align 4
  br label %113

48:                                               ; preds = %34
  %49 = load i32, ptr %10, align 4, !tbaa !5
  %50 = load i32, ptr %20, align 4, !tbaa !5
  %51 = icmp uge i32 %49, %50
  br i1 %51, label %52, label %53

52:                                               ; preds = %48
  store i32 3, ptr %8, align 4
  store i32 1, ptr %19, align 4
  br label %113

53:                                               ; preds = %48
  %54 = load ptr, ptr %21, align 8, !tbaa !9
  %55 = load i32, ptr %10, align 4, !tbaa !5
  %56 = zext i32 %55 to i64
  %57 = getelementptr inbounds ptr, ptr %54, i64 %56
  %58 = load ptr, ptr %57, align 8, !tbaa !9
  %59 = load ptr, ptr %12, align 8, !tbaa !9
  store ptr %58, ptr %59, align 8, !tbaa !9
  %60 = load ptr, ptr %12, align 8, !tbaa !9
  %61 = call ptr @clCreateContext(ptr noundef null, i32 noundef 1, ptr noundef %60, ptr noundef null, ptr noundef null, ptr noundef %18)
  %62 = load ptr, ptr %13, align 8, !tbaa !9
  store ptr %61, ptr %62, align 8, !tbaa !9
  %63 = load i32, ptr %18, align 4, !tbaa !5
  %64 = icmp ne i32 %63, 0
  br i1 %64, label %65, label %66

65:                                               ; preds = %53
  br label %109

66:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 8, ptr %22) #4
  store i64 0, ptr %22, align 8, !tbaa !11
  br label %67

67:                                               ; preds = %103, %66
  %68 = load i64, ptr %22, align 8, !tbaa !11
  %69 = load i64, ptr %14, align 8, !tbaa !11
  %70 = icmp ult i64 %68, %69
  br i1 %70, label %72, label %71

71:                                               ; preds = %67
  store i32 3, ptr %19, align 4
  br label %106

72:                                               ; preds = %67
  %73 = load ptr, ptr %13, align 8, !tbaa !9
  %74 = load ptr, ptr %73, align 8, !tbaa !9
  %75 = load ptr, ptr %12, align 8, !tbaa !9
  %76 = load ptr, ptr %75, align 8, !tbaa !9
  %77 = call ptr @clCreateCommandQueueWithProperties(ptr noundef %74, ptr noundef %76, ptr noundef null, ptr noundef %18)
  %78 = load ptr, ptr %15, align 8, !tbaa !9
  %79 = load i64, ptr %22, align 8, !tbaa !11
  %80 = getelementptr inbounds ptr, ptr %78, i64 %79
  store ptr %77, ptr %80, align 8, !tbaa !9
  %81 = load i32, ptr %18, align 4, !tbaa !5
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %83, label %102

83:                                               ; preds = %72
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #4
  store i64 0, ptr %23, align 8, !tbaa !11
  br label %84

84:                                               ; preds = %95, %83
  %85 = load i64, ptr %23, align 8, !tbaa !11
  %86 = load i64, ptr %22, align 8, !tbaa !11
  %87 = icmp ult i64 %85, %86
  br i1 %87, label %89, label %88

88:                                               ; preds = %84
  store i32 6, ptr %19, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #4
  br label %98

89:                                               ; preds = %84
  %90 = load ptr, ptr %15, align 8, !tbaa !9
  %91 = load i64, ptr %23, align 8, !tbaa !11
  %92 = getelementptr inbounds ptr, ptr %90, i64 %91
  %93 = load ptr, ptr %92, align 8, !tbaa !9
  %94 = call i32 @clReleaseCommandQueue(ptr noundef %93)
  br label %95

95:                                               ; preds = %89
  %96 = load i64, ptr %23, align 8, !tbaa !11
  %97 = add i64 %96, 1
  store i64 %97, ptr %23, align 8, !tbaa !11
  br label %84, !llvm.loop !13

98:                                               ; preds = %88
  %99 = load ptr, ptr %13, align 8, !tbaa !9
  %100 = load ptr, ptr %99, align 8, !tbaa !9
  %101 = call i32 @clReleaseContext(ptr noundef %100)
  store i32 2, ptr %19, align 4
  br label %106

102:                                              ; preds = %72
  br label %103

103:                                              ; preds = %102
  %104 = load i64, ptr %22, align 8, !tbaa !11
  %105 = add i64 %104, 1
  store i64 %105, ptr %22, align 8, !tbaa !11
  br label %67, !llvm.loop !15

106:                                              ; preds = %98, %71
  call void @llvm.lifetime.end.p0(i64 8, ptr %22) #4
  %107 = load i32, ptr %19, align 4
  switch i32 %107, label %113 [
    i32 3, label %108
    i32 2, label %109
  ]

108:                                              ; preds = %106
  br label %109

109:                                              ; preds = %108, %106, %65
  %110 = load ptr, ptr %21, align 8, !tbaa !9
  call void @free(ptr noundef %110) #4
  %111 = load ptr, ptr %17, align 8, !tbaa !9
  call void @free(ptr noundef %111) #4
  %112 = load i32, ptr %18, align 4, !tbaa !5
  store i32 %112, ptr %8, align 4
  store i32 1, ptr %19, align 4
  br label %113

113:                                              ; preds = %109, %106, %52, %46
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  br label %114

114:                                              ; preds = %113, %33, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  %115 = load i32, ptr %8, align 4
  ret i32 %115
}

declare ptr @clCreateContext(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #3

declare ptr @clCreateCommandQueueWithProperties(ptr noundef, ptr noundef, ptr noundef, ptr noundef) #3

declare i32 @clReleaseCommandQueue(ptr noundef) #3

declare i32 @clReleaseContext(ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @ocl_get_platforms(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @ocl_get_devices(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local i32 @ocl_basic_setup(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr noundef %3, ptr nocapture noundef %4, i64 noundef %5, ptr nocapture noundef %6) local_unnamed_addr #1 {
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %10) #4
  %13 = call i32 @ocl_get_platforms(ptr noundef nonnull %8, ptr noundef nonnull %9)
  %.not = icmp eq i32 %13, 0
  br i1 %.not, label %14, label %49

14:                                               ; preds = %7
  %15 = load i32, ptr %8, align 4, !tbaa !5
  %.not30 = icmp ugt i32 %15, %0
  br i1 %.not30, label %16, label %49

16:                                               ; preds = %14
  %17 = load ptr, ptr %9, align 8, !tbaa !9
  %18 = zext i32 %0 to i64
  %19 = getelementptr inbounds ptr, ptr %17, i64 %18
  %20 = load ptr, ptr %19, align 8, !tbaa !9
  store ptr %20, ptr %2, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %11) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %12) #4
  %21 = call i32 @ocl_get_devices(ptr noundef %20, ptr noundef nonnull %11, ptr noundef nonnull %12)
  store i32 %21, ptr %10, align 4, !tbaa !5
  %.not31 = icmp eq i32 %21, 0
  br i1 %.not31, label %22, label %48

22:                                               ; preds = %16
  %23 = load i32, ptr %11, align 4, !tbaa !5
  %.not32 = icmp ugt i32 %23, %1
  br i1 %.not32, label %24, label %48

24:                                               ; preds = %22
  %25 = load ptr, ptr %12, align 8, !tbaa !9
  %26 = zext i32 %1 to i64
  %27 = getelementptr inbounds ptr, ptr %25, i64 %26
  %28 = load ptr, ptr %27, align 8, !tbaa !9
  store ptr %28, ptr %3, align 8, !tbaa !9
  %29 = call ptr @clCreateContext(ptr noundef null, i32 noundef 1, ptr noundef nonnull %3, ptr noundef null, ptr noundef null, ptr noundef nonnull %10) #4
  store ptr %29, ptr %4, align 8, !tbaa !9
  %30 = load i32, ptr %10, align 4, !tbaa !5
  %.not33 = icmp eq i32 %30, 0
  %31 = icmp ne i64 %5, 0
  %or.cond = and i1 %.not33, %31
  br i1 %or.cond, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %24, %43
  %.02337 = phi i64 [ %44, %43 ], [ 0, %24 ]
  %32 = load ptr, ptr %4, align 8, !tbaa !9
  %33 = load ptr, ptr %3, align 8, !tbaa !9
  %34 = call ptr @clCreateCommandQueueWithProperties(ptr noundef %32, ptr noundef %33, ptr noundef null, ptr noundef nonnull %10) #4
  %35 = getelementptr inbounds ptr, ptr %6, i64 %.02337
  store ptr %34, ptr %35, align 8, !tbaa !9
  %36 = load i32, ptr %10, align 4, !tbaa !5
  %.not34 = icmp eq i32 %36, 0
  br i1 %.not34, label %43, label %.preheader

.preheader:                                       ; preds = %.lr.ph
  %.not40 = icmp eq i64 %.02337, 0
  br i1 %.not40, label %._crit_edge, label %.lr.ph39

._crit_edge:                                      ; preds = %.lr.ph39, %.preheader
  %37 = load ptr, ptr %4, align 8, !tbaa !9
  %38 = call i32 @clReleaseContext(ptr noundef %37) #4
  br label %.loopexit

.lr.ph39:                                         ; preds = %.preheader, %.lr.ph39
  %.038 = phi i64 [ %42, %.lr.ph39 ], [ 0, %.preheader ]
  %39 = getelementptr inbounds ptr, ptr %6, i64 %.038
  %40 = load ptr, ptr %39, align 8, !tbaa !9
  %41 = call i32 @clReleaseCommandQueue(ptr noundef %40) #4
  %42 = add nuw i64 %.038, 1
  %exitcond44.not = icmp eq i64 %42, %.02337
  br i1 %exitcond44.not, label %._crit_edge, label %.lr.ph39, !llvm.loop !11

43:                                               ; preds = %.lr.ph
  %44 = add nuw i64 %.02337, 1
  %exitcond.not = icmp eq i64 %44, %5
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !13

.loopexit:                                        ; preds = %43, %._crit_edge, %24
  %45 = load ptr, ptr %12, align 8, !tbaa !9
  call void @free(ptr noundef %45) #4
  %46 = load ptr, ptr %9, align 8, !tbaa !9
  call void @free(ptr noundef %46) #4
  %47 = load i32, ptr %10, align 4, !tbaa !5
  br label %48

48:                                               ; preds = %22, %16, %.loopexit
  %.025 = phi i32 [ %47, %.loopexit ], [ %21, %16 ], [ 3, %22 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %11) #4
  br label %49

49:                                               ; preds = %14, %7, %48
  %.1 = phi i32 [ %.025, %48 ], [ %13, %7 ], [ 2, %14 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #4
  ret i32 %.1
}

declare ptr @clCreateContext(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

declare ptr @clCreateCommandQueueWithProperties(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

declare i32 @clReleaseCommandQueue(ptr noundef) local_unnamed_addr #3

declare i32 @clReleaseContext(ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass