; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/DH (i2c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mSDAPin = external hidden global i32, align 4
@mSCLPin = external hidden global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @dh_i2c_init(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %9 = load i32, ptr %4, align 4, !tbaa !5
  %10 = zext i32 %9 to i64
  %11 = shl i64 1, %10
  %12 = trunc i64 %11 to i32
  store i32 %12, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = zext i32 %13 to i64
  %15 = shl i64 1, %14
  %16 = trunc i64 %15 to i32
  store i32 %16, ptr %7, align 4, !tbaa !5
  %17 = load i32, ptr %6, align 4, !tbaa !5
  %18 = and i32 %17, 61503
  %19 = icmp ne i32 %18, 0
  br i1 %19, label %20, label %28

20:                                               ; preds = %2
  %21 = load i32, ptr %7, align 4, !tbaa !5
  %22 = and i32 %21, 61503
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %28

24:                                               ; preds = %20
  %25 = load i32, ptr %6, align 4, !tbaa !5
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = icmp eq i32 %25, %26
  br i1 %27, label %28, label %29

28:                                               ; preds = %24, %20, %2
  store i32 2, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %32

29:                                               ; preds = %24
  %30 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %30, ptr @mSDAPin, align 4, !tbaa !5
  %31 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %31, ptr @mSCLPin, align 4, !tbaa !5
  call void @dh_i2c_reinit()
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %32

32:                                               ; preds = %29, %28
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %33 = load i32, ptr %3, align 4
  ret i32 %33
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @dh_i2c_reinit() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mSDAPin = external hidden local_unnamed_addr global i32, align 4
@mSCLPin = external hidden local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 3) i32 @dh_i2c_init(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = zext nneg i32 %0 to i64
  %4 = shl nuw i64 1, %3
  %5 = trunc i64 %4 to i32
  %6 = zext nneg i32 %1 to i64
  %7 = shl nuw i64 1, %6
  %8 = trunc i64 %7 to i32
  %9 = and i32 %5, 61503
  %.not = icmp eq i32 %9, 0
  %10 = and i32 %8, 61503
  %.not11 = icmp eq i32 %10, 0
  %11 = icmp eq i32 %5, %8
  %12 = or i1 %11, %.not11
  %or.cond12 = select i1 %.not, i1 true, i1 %12
  br i1 %or.cond12, label %14, label %13

13:                                               ; preds = %2
  store i32 %5, ptr @mSDAPin, align 4, !tbaa !5
  store i32 %8, ptr @mSCLPin, align 4, !tbaa !5
  tail call void @dh_i2c_reinit()
  br label %14

14:                                               ; preds = %2, %13
  %.0 = phi i32 [ 0, %13 ], [ 2, %2 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local void @dh_i2c_reinit() local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass