; LLVM IR from devicehive/esp8266-firmware :: esp-utils/esp-flasher.ll (Z11flash_startP10SerialPortjjj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ESP_REQUEST_HEADER = type { i8, i8, i16, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z12esp_checksumPvj(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL17__uint32_identityj(i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef, ptr noundef, ptr noundef, i1 noundef zeroext) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z11flash_startP10SerialPortjjj(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #1 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca %struct.ESP_REQUEST_HEADER, align 4
  %11 = alloca [4 x i32], align 16
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %15 = load i32, ptr %8, align 4, !tbaa !9
  %16 = uitofp i32 %15 to double
  %17 = fdiv double %16, 4.096000e+03
  %18 = call double @llvm.ceil.f64(double %17)
  %19 = fptoui double %18 to i32
  store i32 %19, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = udiv i32 %20, 4096
  %22 = urem i32 %21, 16
  %23 = sub i32 16, %22
  store i32 %23, ptr %13, align 4, !tbaa !9
  %24 = load i32, ptr %12, align 4, !tbaa !9
  %25 = load i32, ptr %13, align 4, !tbaa !9
  %26 = icmp ult i32 %24, %25
  br i1 %26, label %27, label %29

27:                                               ; preds = %4
  %28 = load i32, ptr %12, align 4, !tbaa !9
  store i32 %28, ptr %13, align 4, !tbaa !9
  br label %29

29:                                               ; preds = %27, %4
  %30 = load i32, ptr %12, align 4, !tbaa !9
  %31 = load i32, ptr %13, align 4, !tbaa !9
  %32 = mul i32 2, %31
  %33 = icmp ult i32 %30, %32
  br i1 %33, label %34, label %38

34:                                               ; preds = %29
  %35 = load i32, ptr %12, align 4, !tbaa !9
  %36 = add i32 %35, 1
  %37 = udiv i32 %36, 2
  br label %42

38:                                               ; preds = %29
  %39 = load i32, ptr %12, align 4, !tbaa !9
  %40 = load i32, ptr %13, align 4, !tbaa !9
  %41 = sub i32 %39, %40
  br label %42

42:                                               ; preds = %38, %34
  %43 = phi i32 [ %37, %34 ], [ %41, %38 ]
  %44 = mul i32 %43, 4096
  %45 = call noundef i32 @_ZL17__uint32_identityj(i32 noundef %44)
  %46 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 0
  store i32 %45, ptr %46, align 16, !tbaa !9
  %47 = load i32, ptr %7, align 4, !tbaa !9
  %48 = call noundef i32 @_ZL17__uint32_identityj(i32 noundef %47)
  %49 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 1
  store i32 %48, ptr %49, align 4, !tbaa !9
  %50 = call noundef i32 @_ZL17__uint32_identityj(i32 noundef 1024)
  %51 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 2
  store i32 %50, ptr %51, align 8, !tbaa !9
  %52 = load i32, ptr %9, align 4, !tbaa !9
  %53 = call noundef i32 @_ZL17__uint32_identityj(i32 noundef %52)
  %54 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 3
  store i32 %53, ptr %54, align 4, !tbaa !9
  %55 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %10, i32 0, i32 0
  store i8 0, ptr %55, align 4, !tbaa !11
  %56 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %10, i32 0, i32 1
  store i8 2, ptr %56, align 1, !tbaa !14
  %57 = call noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext 16)
  %58 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %10, i32 0, i32 2
  store i16 %57, ptr %58, align 2, !tbaa !15
  %59 = getelementptr inbounds [4 x i32], ptr %11, i64 0, i64 0
  %60 = call noundef i32 @_Z12esp_checksumPvj(ptr noundef %59, i32 noundef 16)
  %61 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %10, i32 0, i32 3
  store i32 %60, ptr %61, align 4, !tbaa !16
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = call noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef %62, ptr noundef %10, ptr noundef %11, i1 noundef zeroext true)
  br i1 %63, label %65, label %64

64:                                               ; preds = %42
  store i1 false, ptr %5, align 1
  store i32 1, ptr %14, align 4
  br label %66

65:                                               ; preds = %42
  store i1 true, ptr %5, align 1
  store i32 1, ptr %14, align 4
  br label %66

66:                                               ; preds = %65, %64
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  %67 = load i1, ptr %5, align 1
  ret i1 %67
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"_ZTS18ESP_REQUEST_HEADER", !7, i64 0, !7, i64 1, !13, i64 2, !10, i64 4}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !7, i64 1}
!15 = !{!12, !13, i64 2}
!16 = !{!12, !10, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ESP_REQUEST_HEADER = type { i8, i8, i16, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z12esp_checksumPvj(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL17__uint32_identityj(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef, ptr noundef, ptr noundef, i1 noundef zeroext) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z11flash_startP10SerialPortjjj(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = alloca %struct.ESP_REQUEST_HEADER, align 4
  %6 = alloca [4 x i32], align 16
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #5
  %7 = uitofp i32 %2 to double
  %8 = fmul double %7, 0x3F30000000000000
  %9 = tail call double @llvm.ceil.f64(double %8)
  %10 = fptoui double %9 to i32
  %11 = lshr i32 %3, 12
  %12 = and i32 %11, 15
  %13 = sub nuw nsw i32 16, %12
  %spec.select = tail call i32 @llvm.umin.i32(i32 %13, i32 %10)
  %14 = shl nuw nsw i32 %spec.select, 1
  %15 = icmp ugt i32 %14, %10
  %16 = add nuw nsw i32 %10, 1
  %17 = lshr i32 %16, 1
  %18 = sub i32 %10, %spec.select
  %19 = select i1 %15, i32 %17, i32 %18
  %20 = shl i32 %19, 12
  %21 = tail call noundef i32 @_ZL17__uint32_identityj(i32 noundef %20)
  store i32 %21, ptr %6, align 16, !tbaa !5
  %22 = tail call noundef i32 @_ZL17__uint32_identityj(i32 noundef %1)
  %23 = getelementptr inbounds i8, ptr %6, i64 4
  store i32 %22, ptr %23, align 4, !tbaa !5
  %24 = tail call noundef i32 @_ZL17__uint32_identityj(i32 noundef 1024)
  %25 = getelementptr inbounds i8, ptr %6, i64 8
  store i32 %24, ptr %25, align 8, !tbaa !5
  %26 = tail call noundef i32 @_ZL17__uint32_identityj(i32 noundef %3)
  %27 = getelementptr inbounds i8, ptr %6, i64 12
  store i32 %26, ptr %27, align 4, !tbaa !5
  store i8 0, ptr %5, align 4, !tbaa !9
  %28 = getelementptr inbounds i8, ptr %5, i64 1
  store i8 2, ptr %28, align 1, !tbaa !12
  %29 = tail call noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext 16)
  %30 = getelementptr inbounds i8, ptr %5, i64 2
  store i16 %29, ptr %30, align 2, !tbaa !13
  %31 = call noundef i32 @_Z12esp_checksumPvj(ptr noundef nonnull %6, i32 noundef 16)
  %32 = getelementptr inbounds i8, ptr %5, i64 4
  store i32 %31, ptr %32, align 4, !tbaa !14
  %33 = call noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef %0, ptr noundef nonnull %5, ptr noundef nonnull %6, i1 noundef zeroext true)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  ret i1 %33
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !7, i64 0}
!10 = !{!"_ZTS18ESP_REQUEST_HEADER", !7, i64 0, !7, i64 1, !11, i64 2, !6, i64 4}
!11 = !{!"short", !7, i64 0}
!12 = !{!10, !7, i64 1}
!13 = !{!10, !11, i64 2}
!14 = !{!10, !6, i64 4}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass