; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/Produto do Intervalo/main.ll (Z5buildiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@st = external dso_local global %"class.std::vector", align 8
@a = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5buildiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = load i32, ptr %6, align 4, !tbaa !5
  %12 = icmp eq i32 %10, %11
  br i1 %12, label %13, label %21

13:                                               ; preds = %3
  %14 = load i32, ptr %5, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %15) #3
  %17 = load i64, ptr %16, align 8, !tbaa !9
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %19) #3
  store i64 %17, ptr %20, align 8, !tbaa !9
  br label %51

21:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = add nsw i32 %22, %23
  %25 = ashr i32 %24, 1
  store i32 %25, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %26 = load i32, ptr %4, align 4, !tbaa !5
  %27 = mul nsw i32 %26, 2
  store i32 %27, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = mul nsw i32 %28, 2
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %9, align 4, !tbaa !5
  %31 = load i32, ptr %8, align 4, !tbaa !5
  %32 = load i32, ptr %5, align 4, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  call void @_Z5buildiii(i32 noundef %31, i32 noundef %32, i32 noundef %33)
  %34 = load i32, ptr %9, align 4, !tbaa !5
  %35 = load i32, ptr %7, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  %37 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z5buildiii(i32 noundef %34, i32 noundef %36, i32 noundef %37)
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %39) #3
  %41 = load i64, ptr %40, align 8, !tbaa !9
  %42 = load i32, ptr %9, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %43) #3
  %45 = load i64, ptr %44, align 8, !tbaa !9
  %46 = mul nsw i64 %41, %45
  %47 = srem i64 %46, 1000000007
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %49) #3
  store i64 %47, ptr %50, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %51

51:                                               ; preds = %21, %13
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@st = external dso_local global %"class.std::vector", align 8
@a = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5buildiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %1, %2
  br i1 %4, label %5, label %11

5:                                                ; preds = %3
  %6 = sext i32 %1 to i64
  %7 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %6) #1
  %8 = load i64, ptr %7, align 8, !tbaa !5
  br label %common.ret

common.ret:                                       ; preds = %5, %11
  %.sink = phi i64 [ %8, %5 ], [ %24, %11 ]
  %9 = sext i32 %0 to i64
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %9) #1
  store i64 %.sink, ptr %10, align 8, !tbaa !5
  ret void

11:                                               ; preds = %3
  %12 = add nsw i32 %2, %1
  %13 = ashr i32 %12, 1
  %14 = shl nsw i32 %0, 1
  %15 = or disjoint i32 %14, 1
  tail call void @_Z5buildiii(i32 noundef %14, i32 noundef %1, i32 noundef %13)
  %16 = add nsw i32 %13, 1
  tail call void @_Z5buildiii(i32 noundef %15, i32 noundef %16, i32 noundef %2)
  %17 = sext i32 %14 to i64
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %17) #1
  %19 = load i64, ptr %18, align 8, !tbaa !5
  %20 = sext i32 %15 to i64
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %20) #1
  %22 = load i64, ptr %21, align 8, !tbaa !5
  %23 = mul nsw i64 %22, %19
  %24 = srem i64 %23, 1000000007
  br label %common.ret
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass