; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (ads1115)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ads1115_read.str = external hidden constant [31 x i8], align 4
@mAddress = external hidden global i32, align 4
@ads1115_read.str.1 = external hidden constant [32 x i8], align 4
@ads1115_read.str.2 = external hidden constant [36 x i8], align 4
@ads1115_read.str.3 = external hidden constant [31 x i8], align 4
@ads1115_read.str.4 = external hidden constant [51 x i8], align 4
@ads1115_read.str.5 = external hidden constant [37 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @ads1115_read(i32 noundef %0, i32 noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca [3 x i8], align 1
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = icmp ne i32 %12, -1
  br i1 %13, label %14, label %28

14:                                               ; preds = %3
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = icmp ne i32 %15, -1
  br i1 %16, label %17, label %28

17:                                               ; preds = %14
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = load i32, ptr %6, align 4, !tbaa !5
  %20 = call i32 @dh_i2c_init(i32 noundef %18, i32 noundef %19)
  store i32 %20, ptr %8, align 4, !tbaa !5
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %27

22:                                               ; preds = %17
  br label %23

23:                                               ; preds = %22
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ads1115_read.str)
  br label %24

24:                                               ; preds = %23
  br label %25

25:                                               ; preds = %24
  %26 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %26, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %116

27:                                               ; preds = %17
  br label %28

28:                                               ; preds = %27, %14, %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %111, %28
  %30 = load i32, ptr %10, align 4, !tbaa !5
  %31 = icmp slt i32 %30, 4
  br i1 %31, label %32, label %114

32:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 3, ptr %11) #4
  %33 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  store i8 1, ptr %33, align 1, !tbaa !11
  %34 = load i32, ptr %10, align 4, !tbaa !5
  %35 = or i32 4, %34
  %36 = shl i32 %35, 4
  %37 = or i32 %36, 131
  %38 = trunc i32 %37 to i8
  %39 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 1
  store i8 %38, ptr %39, align 1, !tbaa !11
  %40 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 2
  store i8 -128, ptr %40, align 1, !tbaa !11
  %41 = load i32, ptr @mAddress, align 4, !tbaa !5
  %42 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  %43 = call i32 @dh_i2c_write(i32 noundef %41, ptr noundef %42, i32 noundef 3, i32 noundef 1)
  store i32 %43, ptr %8, align 4, !tbaa !5
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %50

45:                                               ; preds = %32
  br label %46

46:                                               ; preds = %45
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ads1115_read.str.1)
  br label %47

47:                                               ; preds = %46
  br label %48

48:                                               ; preds = %47
  %49 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %49, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %108

50:                                               ; preds = %32
  br label %51

51:                                               ; preds = %72, %50
  %52 = load i32, ptr @mAddress, align 4, !tbaa !5
  %53 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  %54 = call i32 @dh_i2c_write(i32 noundef %52, ptr noundef %53, i32 noundef 1, i32 noundef 0)
  store i32 %54, ptr %8, align 4, !tbaa !5
  %55 = icmp ne i32 %54, 0
  br i1 %55, label %56, label %61

56:                                               ; preds = %51
  br label %57

57:                                               ; preds = %56
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ads1115_read.str.2)
  br label %58

58:                                               ; preds = %57
  br label %59

59:                                               ; preds = %58
  %60 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %60, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %108

61:                                               ; preds = %51
  %62 = load i32, ptr @mAddress, align 4, !tbaa !5
  %63 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 1
  %64 = call i32 @dh_i2c_read(i32 noundef %62, ptr noundef %63, i32 noundef 2)
  store i32 %64, ptr %8, align 4, !tbaa !5
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %66, label %71

66:                                               ; preds = %61
  br label %67

67:                                               ; preds = %66
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ads1115_read.str.3)
  br label %68

68:                                               ; preds = %67
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %70, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %108

71:                                               ; preds = %61
  br label %72

72:                                               ; preds = %71
  %73 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 1
  %74 = load i8, ptr %73, align 1, !tbaa !11
  %75 = sext i8 %74 to i32
  %76 = and i32 %75, 128
  %77 = icmp eq i32 %76, 0
  br i1 %77, label %51, label %78, !llvm.loop !12

78:                                               ; preds = %72
  %79 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  store i8 0, ptr %79, align 1, !tbaa !11
  %80 = load i32, ptr @mAddress, align 4, !tbaa !5
  %81 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  %82 = call i32 @dh_i2c_write(i32 noundef %80, ptr noundef %81, i32 noundef 1, i32 noundef 0)
  store i32 %82, ptr %8, align 4, !tbaa !5
  %83 = icmp ne i32 %82, 0
  br i1 %83, label %84, label %89

84:                                               ; preds = %78
  br label %85

85:                                               ; preds = %84
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ads1115_read.str.4)
  br label %86

86:                                               ; preds = %85
  br label %87

87:                                               ; preds = %86
  %88 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %88, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %108

89:                                               ; preds = %78
  %90 = load i32, ptr @mAddress, align 4, !tbaa !5
  %91 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 1
  %92 = call i32 @dh_i2c_read(i32 noundef %90, ptr noundef %91, i32 noundef 2)
  store i32 %92, ptr %8, align 4, !tbaa !5
  %93 = icmp ne i32 %92, 0
  br i1 %93, label %94, label %99

94:                                               ; preds = %89
  br label %95

95:                                               ; preds = %94
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ads1115_read.str.5)
  br label %96

96:                                               ; preds = %95
  br label %97

97:                                               ; preds = %96
  %98 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %98, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %108

99:                                               ; preds = %89
  %100 = getelementptr inbounds [3 x i8], ptr %11, i64 0, i64 0
  %101 = call i32 @signedInt16be(ptr noundef %100, i32 noundef 1)
  %102 = sitofp i32 %101 to float
  %103 = fmul float %102, 0x3F20624DE0000000
  %104 = load ptr, ptr %7, align 8, !tbaa !9
  %105 = load i32, ptr %10, align 4, !tbaa !5
  %106 = sext i32 %105 to i64
  %107 = getelementptr inbounds float, ptr %104, i64 %106
  store float %103, ptr %107, align 4, !tbaa !14
  store i32 0, ptr %9, align 4
  br label %108

108:                                              ; preds = %99, %97, %87, %69, %59, %48
  call void @llvm.lifetime.end.p0(i64 3, ptr %11) #4
  %109 = load i32, ptr %9, align 4
  switch i32 %109, label %115 [
    i32 0, label %110
  ]

110:                                              ; preds = %108
  br label %111

111:                                              ; preds = %110
  %112 = load i32, ptr %10, align 4, !tbaa !5
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %10, align 4, !tbaa !5
  br label %29, !llvm.loop !16

114:                                              ; preds = %29
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %115

115:                                              ; preds = %114, %108
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %116

116:                                              ; preds = %115, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %117 = load i32, ptr %4, align 4
  ret i32 %117
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) #2

declare void @dhdebug_ram(ptr noundef, ...) #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16be(ptr noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !15, i64 0}
!15 = !{!"float", !7, i64 0}
!16 = distinct !{!16, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ads1115_read.str = external hidden constant [31 x i8], align 4
@mAddress = external hidden local_unnamed_addr global i32, align 4
@ads1115_read.str.1 = external hidden constant [32 x i8], align 4
@ads1115_read.str.2 = external hidden constant [36 x i8], align 4
@ads1115_read.str.3 = external hidden constant [31 x i8], align 4
@ads1115_read.str.4 = external hidden constant [51 x i8], align 4
@ads1115_read.str.5 = external hidden constant [37 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @ads1115_read(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
  %4 = alloca [3 x i8], align 1
  %5 = icmp ne i32 %0, -1
  %6 = icmp ne i32 %1, -1
  %or.cond = and i1 %5, %6
  br i1 %or.cond, label %7, label %10

7:                                                ; preds = %3
  %8 = tail call i32 @dh_i2c_init(i32 noundef %0, i32 noundef %1) #4
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %10, label %9

9:                                                ; preds = %7
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @ads1115_read.str) #4
  br label %.loopexit

10:                                               ; preds = %7, %3
  %11 = getelementptr inbounds i8, ptr %4, i64 1
  %12 = getelementptr inbounds i8, ptr %4, i64 2
  call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %4) #4
  store i8 1, ptr %4, align 1, !tbaa !5
  store i8 -61, ptr %11, align 1, !tbaa !5
  store i8 -128, ptr %12, align 1, !tbaa !5
  %13 = load i32, ptr @mAddress, align 4, !tbaa !8
  %14 = call i32 @dh_i2c_write(i32 noundef %13, ptr noundef nonnull %4, i32 noundef 3, i32 noundef 1) #4
  %.not27 = icmp eq i32 %14, 0
  br i1 %.not27, label %.preheader, label %.thread

.preheader:                                       ; preds = %10, %20
  %15 = load i32, ptr @mAddress, align 4, !tbaa !8
  %16 = call i32 @dh_i2c_write(i32 noundef %15, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not28 = icmp eq i32 %16, 0
  br i1 %.not28, label %17, label %.thread

17:                                               ; preds = %.preheader
  %18 = load i32, ptr @mAddress, align 4, !tbaa !8
  %19 = call i32 @dh_i2c_read(i32 noundef %18, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not29 = icmp eq i32 %19, 0
  br i1 %.not29, label %20, label %.thread

20:                                               ; preds = %17
  %21 = load i8, ptr %11, align 1, !tbaa !5
  %22 = icmp sgt i8 %21, -1
  br i1 %22, label %.preheader, label %23, !llvm.loop !10

23:                                               ; preds = %20
  store i8 0, ptr %4, align 1, !tbaa !5
  %24 = load i32, ptr @mAddress, align 4, !tbaa !8
  %25 = call i32 @dh_i2c_write(i32 noundef %24, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not30 = icmp eq i32 %25, 0
  br i1 %.not30, label %26, label %.thread

26:                                               ; preds = %23
  %27 = load i32, ptr @mAddress, align 4, !tbaa !8
  %28 = call i32 @dh_i2c_read(i32 noundef %27, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not31 = icmp eq i32 %28, 0
  br i1 %.not31, label %29, label %.thread

.thread:                                          ; preds = %17, %.preheader, %37, %.preheader.1, %58, %.preheader.2, %79, %.preheader.3, %26, %46, %67, %88, %23, %43, %64, %85, %10, %29, %49, %70
  %ads1115_read.str.1.sink = phi ptr [ @ads1115_read.str.1, %70 ], [ @ads1115_read.str.1, %49 ], [ @ads1115_read.str.1, %29 ], [ @ads1115_read.str.1, %10 ], [ @ads1115_read.str.4, %85 ], [ @ads1115_read.str.4, %64 ], [ @ads1115_read.str.4, %43 ], [ @ads1115_read.str.4, %23 ], [ @ads1115_read.str.5, %88 ], [ @ads1115_read.str.5, %67 ], [ @ads1115_read.str.5, %46 ], [ @ads1115_read.str.5, %26 ], [ @ads1115_read.str.2, %.preheader.3 ], [ @ads1115_read.str.3, %79 ], [ @ads1115_read.str.2, %.preheader.2 ], [ @ads1115_read.str.3, %58 ], [ @ads1115_read.str.2, %.preheader.1 ], [ @ads1115_read.str.3, %37 ], [ @ads1115_read.str.2, %.preheader ], [ @ads1115_read.str.3, %17 ]
  %.1.ph = phi i32 [ %76, %70 ], [ %55, %49 ], [ %34, %29 ], [ %14, %10 ], [ %87, %85 ], [ %66, %64 ], [ %45, %43 ], [ %25, %23 ], [ %90, %88 ], [ %69, %67 ], [ %48, %46 ], [ %28, %26 ], [ %78, %.preheader.3 ], [ %81, %79 ], [ %57, %.preheader.2 ], [ %60, %58 ], [ %36, %.preheader.1 ], [ %39, %37 ], [ %16, %.preheader ], [ %19, %17 ]
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull %ads1115_read.str.1.sink) #4
  call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %4) #4
  br label %.loopexit

29:                                               ; preds = %26
  %30 = call i32 @signedInt16be(ptr noundef nonnull %4, i32 noundef 1)
  %31 = sitofp i32 %30 to float
  %32 = fmul float %31, 0x3F20624DE0000000
  store float %32, ptr %2, align 4, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %4) #4
  call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %4) #4
  store i8 1, ptr %4, align 1, !tbaa !5
  store i8 -45, ptr %11, align 1, !tbaa !5
  store i8 -128, ptr %12, align 1, !tbaa !5
  %33 = load i32, ptr @mAddress, align 4, !tbaa !8
  %34 = call i32 @dh_i2c_write(i32 noundef %33, ptr noundef nonnull %4, i32 noundef 3, i32 noundef 1) #4
  %.not27.1 = icmp eq i32 %34, 0
  br i1 %.not27.1, label %.preheader.1, label %.thread

.preheader.1:                                     ; preds = %29, %40
  %35 = load i32, ptr @mAddress, align 4, !tbaa !8
  %36 = call i32 @dh_i2c_write(i32 noundef %35, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not28.1 = icmp eq i32 %36, 0
  br i1 %.not28.1, label %37, label %.thread

37:                                               ; preds = %.preheader.1
  %38 = load i32, ptr @mAddress, align 4, !tbaa !8
  %39 = call i32 @dh_i2c_read(i32 noundef %38, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not29.1 = icmp eq i32 %39, 0
  br i1 %.not29.1, label %40, label %.thread

40:                                               ; preds = %37
  %41 = load i8, ptr %11, align 1, !tbaa !5
  %42 = icmp sgt i8 %41, -1
  br i1 %42, label %.preheader.1, label %43, !llvm.loop !10

43:                                               ; preds = %40
  store i8 0, ptr %4, align 1, !tbaa !5
  %44 = load i32, ptr @mAddress, align 4, !tbaa !8
  %45 = call i32 @dh_i2c_write(i32 noundef %44, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not30.1 = icmp eq i32 %45, 0
  br i1 %.not30.1, label %46, label %.thread

46:                                               ; preds = %43
  %47 = load i32, ptr @mAddress, align 4, !tbaa !8
  %48 = call i32 @dh_i2c_read(i32 noundef %47, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not31.1 = icmp eq i32 %48, 0
  br i1 %.not31.1, label %49, label %.thread

49:                                               ; preds = %46
  %50 = call i32 @signedInt16be(ptr noundef nonnull %4, i32 noundef 1)
  %51 = sitofp i32 %50 to float
  %52 = fmul float %51, 0x3F20624DE0000000
  %53 = getelementptr inbounds i8, ptr %2, i64 4
  store float %52, ptr %53, align 4, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %4) #4
  call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %4) #4
  store i8 1, ptr %4, align 1, !tbaa !5
  store i8 -29, ptr %11, align 1, !tbaa !5
  store i8 -128, ptr %12, align 1, !tbaa !5
  %54 = load i32, ptr @mAddress, align 4, !tbaa !8
  %55 = call i32 @dh_i2c_write(i32 noundef %54, ptr noundef nonnull %4, i32 noundef 3, i32 noundef 1) #4
  %.not27.2 = icmp eq i32 %55, 0
  br i1 %.not27.2, label %.preheader.2, label %.thread

.preheader.2:                                     ; preds = %49, %61
  %56 = load i32, ptr @mAddress, align 4, !tbaa !8
  %57 = call i32 @dh_i2c_write(i32 noundef %56, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not28.2 = icmp eq i32 %57, 0
  br i1 %.not28.2, label %58, label %.thread

58:                                               ; preds = %.preheader.2
  %59 = load i32, ptr @mAddress, align 4, !tbaa !8
  %60 = call i32 @dh_i2c_read(i32 noundef %59, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not29.2 = icmp eq i32 %60, 0
  br i1 %.not29.2, label %61, label %.thread

61:                                               ; preds = %58
  %62 = load i8, ptr %11, align 1, !tbaa !5
  %63 = icmp sgt i8 %62, -1
  br i1 %63, label %.preheader.2, label %64, !llvm.loop !10

64:                                               ; preds = %61
  store i8 0, ptr %4, align 1, !tbaa !5
  %65 = load i32, ptr @mAddress, align 4, !tbaa !8
  %66 = call i32 @dh_i2c_write(i32 noundef %65, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not30.2 = icmp eq i32 %66, 0
  br i1 %.not30.2, label %67, label %.thread

67:                                               ; preds = %64
  %68 = load i32, ptr @mAddress, align 4, !tbaa !8
  %69 = call i32 @dh_i2c_read(i32 noundef %68, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not31.2 = icmp eq i32 %69, 0
  br i1 %.not31.2, label %70, label %.thread

70:                                               ; preds = %67
  %71 = call i32 @signedInt16be(ptr noundef nonnull %4, i32 noundef 1)
  %72 = sitofp i32 %71 to float
  %73 = fmul float %72, 0x3F20624DE0000000
  %74 = getelementptr inbounds i8, ptr %2, i64 8
  store float %73, ptr %74, align 4, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %4) #4
  call void @llvm.lifetime.start.p0(i64 3, ptr nonnull %4) #4
  store i8 1, ptr %4, align 1, !tbaa !5
  store i8 -13, ptr %11, align 1, !tbaa !5
  store i8 -128, ptr %12, align 1, !tbaa !5
  %75 = load i32, ptr @mAddress, align 4, !tbaa !8
  %76 = call i32 @dh_i2c_write(i32 noundef %75, ptr noundef nonnull %4, i32 noundef 3, i32 noundef 1) #4
  %.not27.3 = icmp eq i32 %76, 0
  br i1 %.not27.3, label %.preheader.3, label %.thread

.preheader.3:                                     ; preds = %70, %82
  %77 = load i32, ptr @mAddress, align 4, !tbaa !8
  %78 = call i32 @dh_i2c_write(i32 noundef %77, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not28.3 = icmp eq i32 %78, 0
  br i1 %.not28.3, label %79, label %.thread

79:                                               ; preds = %.preheader.3
  %80 = load i32, ptr @mAddress, align 4, !tbaa !8
  %81 = call i32 @dh_i2c_read(i32 noundef %80, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not29.3 = icmp eq i32 %81, 0
  br i1 %.not29.3, label %82, label %.thread

82:                                               ; preds = %79
  %83 = load i8, ptr %11, align 1, !tbaa !5
  %84 = icmp sgt i8 %83, -1
  br i1 %84, label %.preheader.3, label %85, !llvm.loop !10

85:                                               ; preds = %82
  store i8 0, ptr %4, align 1, !tbaa !5
  %86 = load i32, ptr @mAddress, align 4, !tbaa !8
  %87 = call i32 @dh_i2c_write(i32 noundef %86, ptr noundef nonnull %4, i32 noundef 1, i32 noundef 0) #4
  %.not30.3 = icmp eq i32 %87, 0
  br i1 %.not30.3, label %88, label %.thread

88:                                               ; preds = %85
  %89 = load i32, ptr @mAddress, align 4, !tbaa !8
  %90 = call i32 @dh_i2c_read(i32 noundef %89, ptr noundef nonnull %11, i32 noundef 2) #4
  %.not31.3 = icmp eq i32 %90, 0
  br i1 %.not31.3, label %.loopexit.loopexit, label %.thread

.loopexit.loopexit:                               ; preds = %88
  %91 = call i32 @signedInt16be(ptr noundef nonnull %4, i32 noundef 1)
  %92 = sitofp i32 %91 to float
  %93 = fmul float %92, 0x3F20624DE0000000
  %94 = getelementptr inbounds i8, ptr %2, i64 12
  store float %93, ptr %94, align 4, !tbaa !12
  call void @llvm.lifetime.end.p0(i64 3, ptr nonnull %4) #4
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %.thread, %9
  %.3 = phi i32 [ %8, %9 ], [ %.1.ph, %.thread ], [ 0, %.loopexit.loopexit ]
  ret i32 %.3
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16be(ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"float", !6, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass