; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1121/main.ll (Z10move_robotRKcRiS1_S1_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@grid = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10move_robotRKcRiS1_S1_(ptr noundef nonnull align 1 dereferenceable(1) %0, ptr noundef nonnull align 4 dereferenceable(4) %1, ptr noundef nonnull align 4 dereferenceable(4) %2, ptr noundef nonnull align 4 dereferenceable(4) %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = load i8, ptr %11, align 1, !tbaa !11
  %13 = sext i8 %12 to i32
  %14 = icmp eq i32 %13, 78
  br i1 %14, label %15, label %16

15:                                               ; preds = %4
  store i32 -1, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %31

16:                                               ; preds = %4
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = load i8, ptr %17, align 1, !tbaa !11
  %19 = sext i8 %18 to i32
  %20 = icmp eq i32 %19, 83
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  store i32 1, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %30

22:                                               ; preds = %16
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = load i8, ptr %23, align 1, !tbaa !11
  %25 = sext i8 %24 to i32
  %26 = icmp eq i32 %25, 76
  br i1 %26, label %27, label %28

27:                                               ; preds = %22
  store i32 0, ptr %9, align 4, !tbaa !9
  store i32 1, ptr %10, align 4, !tbaa !9
  br label %29

28:                                               ; preds = %22
  store i32 0, ptr %9, align 4, !tbaa !9
  store i32 -1, ptr %10, align 4, !tbaa !9
  br label %29

29:                                               ; preds = %28, %27
  br label %30

30:                                               ; preds = %29, %21
  br label %31

31:                                               ; preds = %30, %15
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = load i32, ptr %32, align 4, !tbaa !9
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = add nsw i32 %33, %34
  %36 = icmp sge i32 %35, 0
  br i1 %36, label %37, label %135

37:                                               ; preds = %31
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load i32, ptr %38, align 4, !tbaa !9
  %40 = load i32, ptr %9, align 4, !tbaa !9
  %41 = add nsw i32 %39, %40
  %42 = call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @grid) #2
  %43 = trunc i64 %42 to i32
  %44 = icmp slt i32 %41, %43
  br i1 %44, label %45, label %135

45:                                               ; preds = %37
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = load i32, ptr %46, align 4, !tbaa !9
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = add nsw i32 %47, %48
  %50 = icmp sge i32 %49, 0
  br i1 %50, label %51, label %135

51:                                               ; preds = %45
  %52 = load ptr, ptr %7, align 8, !tbaa !5
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = load i32, ptr %10, align 4, !tbaa !9
  %55 = add nsw i32 %53, %54
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef 0) #2
  %57 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %56) #2
  %58 = trunc i64 %57 to i32
  %59 = icmp slt i32 %55, %58
  br i1 %59, label %60, label %135

60:                                               ; preds = %51
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = load i32, ptr %61, align 4, !tbaa !9
  %63 = load i32, ptr %9, align 4, !tbaa !9
  %64 = add nsw i32 %62, %63
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %65) #2
  %67 = load ptr, ptr %7, align 8, !tbaa !5
  %68 = load i32, ptr %67, align 4, !tbaa !9
  %69 = load i32, ptr %10, align 4, !tbaa !9
  %70 = add nsw i32 %68, %69
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %71) #2
  %73 = load i8, ptr %72, align 1, !tbaa !11
  %74 = sext i8 %73 to i32
  %75 = icmp ne i32 %74, 35
  br i1 %75, label %76, label %134

76:                                               ; preds = %60
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = load i32, ptr %77, align 4, !tbaa !9
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = add nsw i32 %78, %79
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %81) #2
  %83 = load ptr, ptr %7, align 8, !tbaa !5
  %84 = load i32, ptr %83, align 4, !tbaa !9
  %85 = load i32, ptr %10, align 4, !tbaa !9
  %86 = add nsw i32 %84, %85
  %87 = sext i32 %86 to i64
  %88 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %82, i64 noundef %87) #2
  %89 = load i8, ptr %88, align 1, !tbaa !11
  %90 = sext i8 %89 to i32
  %91 = icmp eq i32 %90, 42
  br i1 %91, label %92, label %123

92:                                               ; preds = %76
  %93 = load ptr, ptr %6, align 8, !tbaa !5
  %94 = load i32, ptr %93, align 4, !tbaa !9
  %95 = load i32, ptr %9, align 4, !tbaa !9
  %96 = add nsw i32 %94, %95
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %97) #2
  %99 = load ptr, ptr %7, align 8, !tbaa !5
  %100 = load i32, ptr %99, align 4, !tbaa !9
  %101 = load i32, ptr %10, align 4, !tbaa !9
  %102 = add nsw i32 %100, %101
  %103 = sext i32 %102 to i64
  %104 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %103) #2
  %105 = load i32, ptr %104, align 4, !tbaa !9
  %106 = icmp ne i32 %105, 0
  br i1 %106, label %123, label %107

107:                                              ; preds = %92
  %108 = load ptr, ptr %6, align 8, !tbaa !5
  %109 = load i32, ptr %108, align 4, !tbaa !9
  %110 = load i32, ptr %9, align 4, !tbaa !9
  %111 = add nsw i32 %109, %110
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %112) #2
  %114 = load ptr, ptr %7, align 8, !tbaa !5
  %115 = load i32, ptr %114, align 4, !tbaa !9
  %116 = load i32, ptr %10, align 4, !tbaa !9
  %117 = add nsw i32 %115, %116
  %118 = sext i32 %117 to i64
  %119 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %113, i64 noundef %118) #2
  store i32 1, ptr %119, align 4, !tbaa !9
  %120 = load ptr, ptr %8, align 8, !tbaa !5
  %121 = load i32, ptr %120, align 4, !tbaa !9
  %122 = add nsw i32 %121, 1
  store i32 %122, ptr %120, align 4, !tbaa !9
  br label %123

123:                                              ; preds = %107, %92, %76
  %124 = load ptr, ptr %6, align 8, !tbaa !5
  %125 = load i32, ptr %124, align 4, !tbaa !9
  %126 = load i32, ptr %9, align 4, !tbaa !9
  %127 = add nsw i32 %125, %126
  %128 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 %127, ptr %128, align 4, !tbaa !9
  %129 = load ptr, ptr %7, align 8, !tbaa !5
  %130 = load i32, ptr %129, align 4, !tbaa !9
  %131 = load i32, ptr %10, align 4, !tbaa !9
  %132 = add nsw i32 %130, %131
  %133 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 %132, ptr %133, align 4, !tbaa !9
  br label %134

134:                                              ; preds = %123, %60
  br label %135

135:                                              ; preds = %134, %51, %45, %37, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<char>, std::allocator<std::vector<char>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@grid = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z10move_robotRKcRiS1_S1_(ptr nocapture noundef nonnull readonly align 1 dereferenceable(1) %0, ptr nocapture noundef nonnull align 4 dereferenceable(4) %1, ptr nocapture noundef nonnull align 4 dereferenceable(4) %2, ptr nocapture noundef nonnull align 4 dereferenceable(4) %3) local_unnamed_addr #0 {
  %5 = load i8, ptr %0, align 1, !tbaa !5
  switch i8 %5, label %8 [
    i8 78, label %9
    i8 83, label %6
    i8 76, label %7
  ]

6:                                                ; preds = %4
  br label %9

7:                                                ; preds = %4
  br label %9

8:                                                ; preds = %4
  br label %9

9:                                                ; preds = %4, %6, %8, %7
  %.033 = phi i32 [ 1, %6 ], [ 0, %7 ], [ 0, %8 ], [ -1, %4 ]
  %.0 = phi i32 [ 0, %6 ], [ 1, %7 ], [ -1, %8 ], [ 0, %4 ]
  %10 = load i32, ptr %1, align 4, !tbaa !8
  %11 = add nsw i32 %10, %.033
  %12 = icmp sgt i32 %11, -1
  br i1 %12, label %13, label %73

13:                                               ; preds = %9
  %14 = tail call noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @grid) #1
  %15 = trunc i64 %14 to i32
  %16 = icmp slt i32 %11, %15
  br i1 %16, label %17, label %73

17:                                               ; preds = %13
  %18 = load i32, ptr %2, align 4, !tbaa !8
  %19 = add nsw i32 %18, %.0
  %20 = icmp sgt i32 %19, -1
  br i1 %20, label %21, label %73

21:                                               ; preds = %17
  %22 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef 0) #1
  %23 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %22) #1
  %24 = trunc i64 %23 to i32
  %25 = icmp slt i32 %19, %24
  br i1 %25, label %26, label %73

26:                                               ; preds = %21
  %27 = load i32, ptr %1, align 4, !tbaa !8
  %28 = add nsw i32 %27, %.033
  %29 = sext i32 %28 to i64
  %30 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %29) #1
  %31 = load i32, ptr %2, align 4, !tbaa !8
  %32 = add nsw i32 %31, %.0
  %33 = sext i32 %32 to i64
  %34 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %33) #1
  %35 = load i8, ptr %34, align 1, !tbaa !5
  %.not = icmp eq i8 %35, 35
  br i1 %.not, label %73, label %36

36:                                               ; preds = %26
  %37 = load i32, ptr %1, align 4, !tbaa !8
  %38 = add nsw i32 %37, %.033
  %39 = sext i32 %38 to i64
  %40 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IcSaIcEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @grid, i64 noundef %39) #1
  %41 = load i32, ptr %2, align 4, !tbaa !8
  %42 = add nsw i32 %41, %.0
  %43 = sext i32 %42 to i64
  %44 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %43) #1
  %45 = load i8, ptr %44, align 1, !tbaa !5
  %46 = icmp eq i8 %45, 42
  br i1 %46, label %47, label %68

47:                                               ; preds = %36
  %48 = load i32, ptr %1, align 4, !tbaa !8
  %49 = add nsw i32 %48, %.033
  %50 = sext i32 %49 to i64
  %51 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %50) #1
  %52 = load i32, ptr %2, align 4, !tbaa !8
  %53 = add nsw i32 %52, %.0
  %54 = sext i32 %53 to i64
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %54) #1
  %56 = load i32, ptr %55, align 4, !tbaa !8
  %.not37 = icmp eq i32 %56, 0
  br i1 %.not37, label %57, label %68

57:                                               ; preds = %47
  %58 = load i32, ptr %1, align 4, !tbaa !8
  %59 = add nsw i32 %58, %.033
  %60 = sext i32 %59 to i64
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %60) #1
  %62 = load i32, ptr %2, align 4, !tbaa !8
  %63 = add nsw i32 %62, %.0
  %64 = sext i32 %63 to i64
  %65 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %64) #1
  store i32 1, ptr %65, align 4, !tbaa !8
  %66 = load i32, ptr %3, align 4, !tbaa !8
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %3, align 4, !tbaa !8
  br label %68

68:                                               ; preds = %57, %47, %36
  %69 = load i32, ptr %1, align 4, !tbaa !8
  %70 = add nsw i32 %69, %.033
  store i32 %70, ptr %1, align 4, !tbaa !8
  %71 = load i32, ptr %2, align 4, !tbaa !8
  %72 = add nsw i32 %71, %.0
  store i32 %72, ptr %2, align 4, !tbaa !8
  br label %73

73:                                               ; preds = %26, %68, %21, %17, %13, %9
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IcSaIcEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass