; LLVM IR from Eaglegor/SchedulerEngine :: Engine/Concepts/Capacity.ll (ZNK9Scheduler8CapacityeqERKS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZNK9Scheduler8CapacityeqERKS0_(ptr noundef nonnull align 4 dereferenceable(16) %0, ptr noundef nonnull align 4 dereferenceable(16) %1) #1 align 2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  store i64 0, ptr %6, align 8, !tbaa !9
  br label %9

9:                                                ; preds = %25, %2
  %10 = load i64, ptr %6, align 8, !tbaa !9
  %11 = icmp ult i64 %10, 4
  br i1 %11, label %13, label %12

12:                                               ; preds = %9
  store i32 2, ptr %7, align 4
  br label %28

13:                                               ; preds = %9
  %14 = load i64, ptr %6, align 8, !tbaa !9
  %15 = call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %8, i64 noundef %14)
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = load i64, ptr %6, align 8, !tbaa !9
  %18 = call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %16, i64 noundef %17)
  %19 = fsub float %15, %18
  %20 = fpext float %19 to double
  %21 = call double @llvm.fabs.f64(double %20)
  %22 = fcmp ogt double %21, 0x3E80000000000000
  br i1 %22, label %23, label %24

23:                                               ; preds = %13
  store i1 false, ptr %3, align 1
  store i32 1, ptr %7, align 4
  br label %28

24:                                               ; preds = %13
  br label %25

25:                                               ; preds = %24
  %26 = load i64, ptr %6, align 8, !tbaa !9
  %27 = add i64 %26, 1
  store i64 %27, ptr %6, align 8, !tbaa !9
  br label %9, !llvm.loop !11

28:                                               ; preds = %23, %12
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %29 = load i32, ptr %7, align 4
  switch i32 %29, label %33 [
    i32 2, label %30
    i32 1, label %31
  ]

30:                                               ; preds = %28
  store i1 true, ptr %3, align 1
  br label %31

31:                                               ; preds = %30, %28
  %32 = load i1, ptr %3, align 1
  ret i1 %32

33:                                               ; preds = %28
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZNK9Scheduler8CapacityeqERKS0_(ptr noundef nonnull align 4 dereferenceable(16) %0, ptr noundef nonnull align 4 dereferenceable(16) %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %0, i64 noundef 0)
  %4 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %1, i64 noundef 0)
  %5 = fsub float %3, %4
  %6 = tail call float @llvm.fabs.f32(float %5)
  %7 = fcmp ogt float %6, 0x3E80000000000000
  br i1 %7, label %27, label %8

8:                                                ; preds = %2
  %9 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %0, i64 noundef 1)
  %10 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %1, i64 noundef 1)
  %11 = fsub float %9, %10
  %12 = tail call float @llvm.fabs.f32(float %11)
  %13 = fcmp ogt float %12, 0x3E80000000000000
  br i1 %13, label %27, label %14

14:                                               ; preds = %8
  %15 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %0, i64 noundef 2)
  %16 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %1, i64 noundef 2)
  %17 = fsub float %15, %16
  %18 = tail call float @llvm.fabs.f32(float %17)
  %19 = fcmp ogt float %18, 0x3E80000000000000
  br i1 %19, label %27, label %20

20:                                               ; preds = %14
  %21 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %0, i64 noundef 3)
  %22 = tail call noundef float @_ZNK9Scheduler8Capacity8getValueEm(ptr noundef nonnull align 4 dereferenceable(16) %1, i64 noundef 3)
  %23 = fsub float %21, %22
  %24 = tail call float @llvm.fabs.f32(float %23)
  %25 = fcmp ogt float %24, 0x3E80000000000000
  br i1 %25, label %27, label %26

26:                                               ; preds = %20
  br label %27

27:                                               ; preds = %26, %20, %14, %8, %2
  %.lcssa = phi i1 [ false, %2 ], [ false, %8 ], [ false, %14 ], [ false, %20 ], [ true, %26 ]
  ret i1 %.lcssa
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass