; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/Passa Bolinha/main.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@band = external dso_local global i32, align 4
@__const._Z3dfsii.row = external hidden unnamed_addr constant [4 x i32], align 16
@__const._Z3dfsii.col = external hidden unnamed_addr constant [4 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca [4 x i32], align 16
  %6 = alloca [4 x i32], align 16
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %11) #4
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %14) #4
  store i32 1, ptr %15, align 4, !tbaa !5
  %16 = load i32, ptr @band, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  store i32 %17, ptr @band, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %5) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %5, ptr align 16 @__const._Z3dfsii.row, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 16, ptr %6) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %6, ptr align 16 @__const._Z3dfsii.col, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %79, %2
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = icmp slt i32 %19, 4
  br i1 %20, label %22, label %21

21:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %82

22:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %23 = load i32, ptr %7, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [4 x i32], ptr %5, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = add nsw i32 %26, %27
  store i32 %28, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [4 x i32], ptr %6, i64 0, i64 %30
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = add nsw i32 %32, %33
  store i32 %34, ptr %9, align 4, !tbaa !5
  %35 = load i32, ptr %8, align 4, !tbaa !5
  %36 = icmp sge i32 %35, 0
  br i1 %36, label %37, label %78

37:                                               ; preds = %22
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = icmp sge i32 %38, 0
  br i1 %39, label %40, label %78

40:                                               ; preds = %37
  %41 = load i32, ptr %8, align 4, !tbaa !5
  %42 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #4
  %43 = trunc i64 %42 to i32
  %44 = icmp slt i32 %41, %43
  br i1 %44, label %45, label %78

45:                                               ; preds = %40
  %46 = load i32, ptr %9, align 4, !tbaa !5
  %47 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #4
  %48 = trunc i64 %47 to i32
  %49 = icmp slt i32 %46, %48
  br i1 %49, label %50, label %78

50:                                               ; preds = %45
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %52) #4
  %54 = load i32, ptr %9, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55) #4
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %58 = icmp ne i32 %57, 0
  br i1 %58, label %78, label %59

59:                                               ; preds = %50
  %60 = load i32, ptr %8, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %61) #4
  %63 = load i32, ptr %9, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %64) #4
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = load i32, ptr %3, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %68) #4
  %70 = load i32, ptr %4, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #4
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = icmp sge i32 %66, %73
  br i1 %74, label %75, label %78

75:                                               ; preds = %59
  %76 = load i32, ptr %8, align 4, !tbaa !5
  %77 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %76, i32 noundef %77)
  br label %78

78:                                               ; preds = %75, %59, %50, %45, %40, %37, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %79

79:                                               ; preds = %78
  %80 = load i32, ptr %7, align 4, !tbaa !5
  %81 = add nsw i32 %80, 1
  store i32 %81, ptr %7, align 4, !tbaa !5
  br label %18, !llvm.loop !9

82:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 16, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %5) #4
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@band = external dso_local local_unnamed_addr global i32, align 4
@__const._Z3dfsii.row = external hidden unnamed_addr constant [4 x i32], align 16
@__const._Z3dfsii.col = external hidden unnamed_addr constant [4 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  br label %tailrecurse

tailrecurse:                                      ; preds = %116, %2
  %.tr = phi i32 [ %0, %2 ], [ %97, %116 ]
  %.tr26 = phi i32 [ %1, %2 ], [ %99, %116 ]
  %3 = sext i32 %.tr to i64
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %5 = sext i32 %.tr26 to i64
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5) #1
  store i32 1, ptr %6, align 4, !tbaa !5
  %7 = load i32, ptr @band, align 4, !tbaa !5
  %8 = add nsw i32 %7, 1
  store i32 %8, ptr @band, align 4, !tbaa !5
  %9 = load i32, ptr @__const._Z3dfsii.row, align 16, !tbaa !5
  %10 = add nsw i32 %9, %.tr
  %11 = load i32, ptr @__const._Z3dfsii.col, align 16, !tbaa !5
  %12 = add nsw i32 %11, %.tr26
  %13 = icmp sgt i32 %10, -1
  %14 = icmp sgt i32 %12, -1
  %or.cond = select i1 %13, i1 %14, i1 false
  br i1 %or.cond, label %15, label %37

15:                                               ; preds = %tailrecurse
  %16 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %17 = trunc i64 %16 to i32
  %18 = icmp slt i32 %10, %17
  br i1 %18, label %19, label %37

19:                                               ; preds = %15
  %20 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %21 = trunc i64 %20 to i32
  %22 = icmp slt i32 %12, %21
  br i1 %22, label %23, label %37

23:                                               ; preds = %19
  %24 = zext nneg i32 %10 to i64
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %24) #1
  %26 = zext nneg i32 %12 to i64
  %27 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %26) #1
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %.not = icmp eq i32 %28, 0
  br i1 %.not, label %29, label %37

29:                                               ; preds = %23
  %30 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %24) #1
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %26) #1
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %5) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %.not23 = icmp slt i32 %32, %35
  br i1 %.not23, label %37, label %36

36:                                               ; preds = %29
  tail call void @_Z3dfsii(i32 noundef %10, i32 noundef %12)
  br label %37

37:                                               ; preds = %36, %29, %23, %19, %15, %tailrecurse
  %38 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsii.row, i64 4), align 4, !tbaa !5
  %39 = add nsw i32 %38, %.tr
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsii.col, i64 4), align 4, !tbaa !5
  %41 = add nsw i32 %40, %.tr26
  %42 = icmp sgt i32 %39, -1
  %43 = icmp sgt i32 %41, -1
  %or.cond.1 = select i1 %42, i1 %43, i1 false
  br i1 %or.cond.1, label %44, label %66

44:                                               ; preds = %37
  %45 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %46 = trunc i64 %45 to i32
  %47 = icmp slt i32 %39, %46
  br i1 %47, label %48, label %66

48:                                               ; preds = %44
  %49 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %50 = trunc i64 %49 to i32
  %51 = icmp slt i32 %41, %50
  br i1 %51, label %52, label %66

52:                                               ; preds = %48
  %53 = zext nneg i32 %39 to i64
  %54 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %53) #1
  %55 = zext nneg i32 %41 to i64
  %56 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %55) #1
  %57 = load i32, ptr %56, align 4, !tbaa !5
  %.not.1 = icmp eq i32 %57, 0
  br i1 %.not.1, label %58, label %66

58:                                               ; preds = %52
  %59 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %53) #1
  %60 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %55) #1
  %61 = load i32, ptr %60, align 4, !tbaa !5
  %62 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %63 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %5) #1
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %.not23.1 = icmp slt i32 %61, %64
  br i1 %.not23.1, label %66, label %65

65:                                               ; preds = %58
  tail call void @_Z3dfsii(i32 noundef %39, i32 noundef %41)
  br label %66

66:                                               ; preds = %65, %58, %52, %48, %44, %37
  %67 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsii.row, i64 8), align 8, !tbaa !5
  %68 = add nsw i32 %67, %.tr
  %69 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsii.col, i64 8), align 8, !tbaa !5
  %70 = add nsw i32 %69, %.tr26
  %71 = icmp sgt i32 %68, -1
  %72 = icmp sgt i32 %70, -1
  %or.cond.2 = select i1 %71, i1 %72, i1 false
  br i1 %or.cond.2, label %73, label %95

73:                                               ; preds = %66
  %74 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %75 = trunc i64 %74 to i32
  %76 = icmp slt i32 %68, %75
  br i1 %76, label %77, label %95

77:                                               ; preds = %73
  %78 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %79 = trunc i64 %78 to i32
  %80 = icmp slt i32 %70, %79
  br i1 %80, label %81, label %95

81:                                               ; preds = %77
  %82 = zext nneg i32 %68 to i64
  %83 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %82) #1
  %84 = zext nneg i32 %70 to i64
  %85 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef %84) #1
  %86 = load i32, ptr %85, align 4, !tbaa !5
  %.not.2 = icmp eq i32 %86, 0
  br i1 %.not.2, label %87, label %95

87:                                               ; preds = %81
  %88 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %82) #1
  %89 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %84) #1
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %92 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef %5) #1
  %93 = load i32, ptr %92, align 4, !tbaa !5
  %.not23.2 = icmp slt i32 %90, %93
  br i1 %.not23.2, label %95, label %94

94:                                               ; preds = %87
  tail call void @_Z3dfsii(i32 noundef %68, i32 noundef %70)
  br label %95

95:                                               ; preds = %94, %87, %81, %77, %73, %66
  %96 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsii.row, i64 12), align 4, !tbaa !5
  %97 = add nsw i32 %96, %.tr
  %98 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3dfsii.col, i64 12), align 4, !tbaa !5
  %99 = add nsw i32 %98, %.tr26
  %100 = icmp sgt i32 %97, -1
  %101 = icmp sgt i32 %99, -1
  %or.cond.3 = select i1 %100, i1 %101, i1 false
  br i1 %or.cond.3, label %102, label %123

102:                                              ; preds = %95
  %103 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %104 = trunc i64 %103 to i32
  %105 = icmp slt i32 %97, %104
  br i1 %105, label %106, label %123

106:                                              ; preds = %102
  %107 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @v) #1
  %108 = trunc i64 %107 to i32
  %109 = icmp slt i32 %99, %108
  br i1 %109, label %110, label %123

110:                                              ; preds = %106
  %111 = zext nneg i32 %97 to i64
  %112 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %111) #1
  %113 = zext nneg i32 %99 to i64
  %114 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %112, i64 noundef %113) #1
  %115 = load i32, ptr %114, align 4, !tbaa !5
  %.not.3 = icmp eq i32 %115, 0
  br i1 %.not.3, label %116, label %123

116:                                              ; preds = %110
  %117 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %111) #1
  %118 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %117, i64 noundef %113) #1
  %119 = load i32, ptr %118, align 4, !tbaa !5
  %120 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %121 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %120, i64 noundef %5) #1
  %122 = load i32, ptr %121, align 4, !tbaa !5
  %.not23.3 = icmp slt i32 %119, %122
  br i1 %.not23.3, label %123, label %tailrecurse

123:                                              ; preds = %116, %110, %106, %102, %95
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass