; LLVM IR from tum-i4/obfuscation-benchmarks :: tigress-generated-programs (RandomFunc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @RandomFunc(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1 x i16], align 2
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds i16, ptr %9, i64 0
  %11 = load i16, ptr %10, align 2, !tbaa !9
  %12 = zext i16 %11 to i64
  %13 = add i64 %12, 914778474
  %14 = sub i64 %13, 29623
  %15 = trunc i64 %14 to i16
  %16 = getelementptr inbounds [1 x i16], ptr %5, i64 0, i64 0
  store i16 %15, ptr %16, align 2, !tbaa !9
  store i16 0, ptr %7, align 2, !tbaa !9
  br label %17

17:                                               ; preds = %59, %2
  %18 = load i16, ptr %7, align 2, !tbaa !9
  %19 = zext i16 %18 to i32
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = getelementptr inbounds i16, ptr %20, i64 1
  %22 = load i16, ptr %21, align 2, !tbaa !9
  %23 = zext i16 %22 to i32
  %24 = icmp slt i32 %19, %23
  br i1 %24, label %25, label %62

25:                                               ; preds = %17
  store i16 0, ptr %6, align 2, !tbaa !9
  br label %26

26:                                               ; preds = %56, %25
  %27 = load i16, ptr %6, align 2, !tbaa !9
  %28 = zext i16 %27 to i32
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds i16, ptr %29, i64 1
  %31 = load i16, ptr %30, align 2, !tbaa !9
  %32 = zext i16 %31 to i32
  %33 = icmp slt i32 %28, %32
  br i1 %33, label %34, label %59

34:                                               ; preds = %26
  %35 = getelementptr inbounds [1 x i16], ptr %5, i64 0, i64 0
  %36 = load i16, ptr %35, align 2, !tbaa !9
  %37 = zext i16 %36 to i32
  %38 = load i16, ptr %6, align 2, !tbaa !9
  %39 = zext i16 %38 to i32
  %40 = load i16, ptr %7, align 2, !tbaa !9
  %41 = zext i16 %40 to i32
  %42 = add nsw i32 %39, %41
  %43 = icmp slt i32 %37, %42
  br i1 %43, label %44, label %56

44:                                               ; preds = %34
  %45 = getelementptr inbounds [1 x i16], ptr %5, i64 0, i64 0
  %46 = getelementptr inbounds i8, ptr %45, i64 1
  %47 = load i8, ptr %46, align 1, !tbaa !11
  store i8 %47, ptr %8, align 1, !tbaa !11
  %48 = getelementptr inbounds [1 x i16], ptr %5, i64 0, i64 0
  %49 = getelementptr inbounds i8, ptr %48, i64 0
  %50 = load i8, ptr %49, align 1, !tbaa !11
  %51 = getelementptr inbounds [1 x i16], ptr %5, i64 0, i64 0
  %52 = getelementptr inbounds i8, ptr %51, i64 1
  store i8 %50, ptr %52, align 1, !tbaa !11
  %53 = load i8, ptr %8, align 1, !tbaa !11
  %54 = getelementptr inbounds [1 x i16], ptr %5, i64 0, i64 0
  %55 = getelementptr inbounds i8, ptr %54, i64 0
  store i8 %53, ptr %55, align 1, !tbaa !11
  br label %56

56:                                               ; preds = %44, %34
  %57 = load i16, ptr %6, align 2, !tbaa !9
  %58 = add i16 %57, 1
  store i16 %58, ptr %6, align 2, !tbaa !9
  br label %26, !llvm.loop !12

59:                                               ; preds = %26
  %60 = load i16, ptr %7, align 2, !tbaa !9
  %61 = add i16 %60, 1
  store i16 %61, ptr %7, align 2, !tbaa !9
  br label %17, !llvm.loop !14

62:                                               ; preds = %17
  %63 = getelementptr inbounds [1 x i16], ptr %5, i64 0, i64 0
  %64 = load i16, ptr %63, align 2, !tbaa !9
  %65 = zext i16 %64 to i32
  %66 = add nsw i32 %65, 28765
  %67 = trunc i32 %66 to i16
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = getelementptr inbounds i16, ptr %68, i64 0
  store i16 %67, ptr %69, align 2, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @RandomFunc(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = load i16, ptr %0, align 2, !tbaa !5
  %4 = add i16 %3, -2637
  %.sroa.0.0.extract.trunc = trunc i16 %4 to i8
  %.sroa.7.0.extract.shift = lshr i16 %4, 8
  %.sroa.7.0.extract.trunc = trunc nuw i16 %.sroa.7.0.extract.shift to i8
  %5 = getelementptr inbounds i8, ptr %0, i64 2
  %6 = load i16, ptr %5, align 2, !tbaa !5
  %.not = icmp eq i16 %6, 0
  br i1 %.not, label %._crit_edge, label %.preheader.preheader

.preheader.preheader:                             ; preds = %2
  %wide.trip.count33 = zext i16 %6 to i32
  %xtraiter = and i32 %wide.trip.count33, 1
  %7 = icmp eq i16 %6, 1
  %unroll_iter = and i32 %wide.trip.count33, 65534
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %14
  %indvars.iv31 = phi i32 [ 0, %.preheader.preheader ], [ %indvars.iv.next32, %14 ]
  %.sroa.7.029 = phi i8 [ %.sroa.7.0.extract.trunc, %.preheader.preheader ], [ %spec.select23.lcssa, %14 ]
  %.sroa.0.027 = phi i8 [ %.sroa.0.0.extract.trunc, %.preheader.preheader ], [ %spec.select.lcssa, %14 ]
  br i1 %7, label %.unr-lcssa, label %.preheader.new

.preheader.new:                                   ; preds = %.preheader, %.preheader.new
  %indvars.iv = phi i32 [ %indvars.iv.next.1, %.preheader.new ], [ 0, %.preheader ]
  %.sroa.7.126 = phi i8 [ %spec.select23.1, %.preheader.new ], [ %.sroa.7.029, %.preheader ]
  %.sroa.0.124 = phi i8 [ %spec.select.1, %.preheader.new ], [ %.sroa.0.027, %.preheader ]
  %niter = phi i32 [ %niter.next.1, %.preheader.new ], [ 0, %.preheader ]
  %.sroa.7.0.insert.ext = zext i8 %.sroa.7.126 to i32
  %.sroa.7.0.insert.shift = shl nuw nsw i32 %.sroa.7.0.insert.ext, 8
  %.sroa.0.0.insert.ext = zext i8 %.sroa.0.124 to i32
  %.sroa.0.0.insert.insert = or disjoint i32 %.sroa.7.0.insert.shift, %.sroa.0.0.insert.ext
  %8 = add nuw nsw i32 %indvars.iv31, %indvars.iv
  %9 = icmp ult i32 %.sroa.0.0.insert.insert, %8
  %spec.select = select i1 %9, i8 %.sroa.7.126, i8 %.sroa.0.124
  %spec.select23 = select i1 %9, i8 %.sroa.0.124, i8 %.sroa.7.126
  %indvars.iv.next = or disjoint i32 %indvars.iv, 1
  %.sroa.7.0.insert.ext.1 = zext i8 %spec.select23 to i32
  %.sroa.7.0.insert.shift.1 = shl nuw nsw i32 %.sroa.7.0.insert.ext.1, 8
  %.sroa.0.0.insert.ext.1 = zext i8 %spec.select to i32
  %.sroa.0.0.insert.insert.1 = or disjoint i32 %.sroa.7.0.insert.shift.1, %.sroa.0.0.insert.ext.1
  %10 = add nuw nsw i32 %indvars.iv31, %indvars.iv.next
  %11 = icmp ult i32 %.sroa.0.0.insert.insert.1, %10
  %spec.select.1 = select i1 %11, i8 %spec.select23, i8 %spec.select
  %spec.select23.1 = select i1 %11, i8 %spec.select, i8 %spec.select23
  %indvars.iv.next.1 = add nuw nsw i32 %indvars.iv, 2
  %niter.next.1 = add i32 %niter, 2
  %niter.ncmp.1 = icmp eq i32 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %.unr-lcssa, label %.preheader.new, !llvm.loop !9

.unr-lcssa:                                       ; preds = %.preheader.new, %.preheader
  %spec.select.lcssa.ph = phi i8 [ poison, %.preheader ], [ %spec.select.1, %.preheader.new ]
  %spec.select23.lcssa.ph = phi i8 [ poison, %.preheader ], [ %spec.select23.1, %.preheader.new ]
  %indvars.iv.unr = phi i32 [ 0, %.preheader ], [ %indvars.iv.next.1, %.preheader.new ]
  %.sroa.7.126.unr = phi i8 [ %.sroa.7.029, %.preheader ], [ %spec.select23.1, %.preheader.new ]
  %.sroa.0.124.unr = phi i8 [ %.sroa.0.027, %.preheader ], [ %spec.select.1, %.preheader.new ]
  br i1 %lcmp.mod.not, label %14, label %.epilog-lcssa

.epilog-lcssa:                                    ; preds = %.unr-lcssa
  %.sroa.7.0.insert.ext.epil = zext i8 %.sroa.7.126.unr to i32
  %.sroa.7.0.insert.shift.epil = shl nuw nsw i32 %.sroa.7.0.insert.ext.epil, 8
  %.sroa.0.0.insert.ext.epil = zext i8 %.sroa.0.124.unr to i32
  %.sroa.0.0.insert.insert.epil = or disjoint i32 %.sroa.7.0.insert.shift.epil, %.sroa.0.0.insert.ext.epil
  %12 = add nuw nsw i32 %indvars.iv31, %indvars.iv.unr
  %13 = icmp ult i32 %.sroa.0.0.insert.insert.epil, %12
  %spec.select.epil = select i1 %13, i8 %.sroa.7.126.unr, i8 %.sroa.0.124.unr
  %spec.select23.epil = select i1 %13, i8 %.sroa.0.124.unr, i8 %.sroa.7.126.unr
  br label %14

14:                                               ; preds = %.unr-lcssa, %.epilog-lcssa
  %spec.select.lcssa = phi i8 [ %spec.select.lcssa.ph, %.unr-lcssa ], [ %spec.select.epil, %.epilog-lcssa ]
  %spec.select23.lcssa = phi i8 [ %spec.select23.lcssa.ph, %.unr-lcssa ], [ %spec.select23.epil, %.epilog-lcssa ]
  %indvars.iv.next32 = add nuw nsw i32 %indvars.iv31, 1
  %exitcond34.not = icmp eq i32 %indvars.iv.next32, %wide.trip.count33
  br i1 %exitcond34.not, label %._crit_edge, label %.preheader, !llvm.loop !11

._crit_edge:                                      ; preds = %14, %2
  %.sroa.0.0.lcssa = phi i8 [ %.sroa.0.0.extract.trunc, %2 ], [ %spec.select.lcssa, %14 ]
  %.sroa.7.0.lcssa = phi i8 [ %.sroa.7.0.extract.trunc, %2 ], [ %spec.select23.lcssa, %14 ]
  %.sroa.7.0.insert.ext13 = zext i8 %.sroa.7.0.lcssa to i16
  %.sroa.7.0.insert.shift14 = shl nuw i16 %.sroa.7.0.insert.ext13, 8
  %.sroa.0.0.insert.ext9 = zext i8 %.sroa.0.0.lcssa to i16
  %.sroa.0.0.insert.insert11 = add nuw nsw i16 %.sroa.0.0.insert.ext9, 28765
  %15 = add i16 %.sroa.0.0.insert.insert11, %.sroa.7.0.insert.shift14
  store i16 %15, ptr %1, align 2, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass