; LLVM IR from turi-code/SFrame :: oss_src/graphlab/scheduler/fifo_scheduler.ll (ZN8graphlab14fifo_scheduler5emptyEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.graphlab::fifo_scheduler" = type { %"class.graphlab::ischeduler", %"class.graphlab::dense_bitset", %"class.std::vector", %"class.std::vector.6", %"class.std::vector.11", i64, i64, i64 }
%"class.graphlab::ischeduler" = type { ptr }
%"class.graphlab::dense_bitset" = type { ptr, i64, i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::deque<unsigned long>, std::allocator<std::deque<unsigned long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::deque<unsigned long>, std::allocator<std::deque<unsigned long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::deque<unsigned long>, std::allocator<std::deque<unsigned long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::deque<unsigned long>, std::allocator<std::deque<unsigned long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.6" = type { %"struct.std::_Vector_base.7" }
%"struct.std::_Vector_base.7" = type { %"struct.std::_Vector_base<graphlab::padded_simple_spinlock, std::allocator<graphlab::padded_simple_spinlock>>::_Vector_impl" }
%"struct.std::_Vector_base<graphlab::padded_simple_spinlock, std::allocator<graphlab::padded_simple_spinlock>>::_Vector_impl" = type { %"struct.std::_Vector_base<graphlab::padded_simple_spinlock, std::allocator<graphlab::padded_simple_spinlock>>::_Vector_impl_data" }
%"struct.std::_Vector_base<graphlab::padded_simple_spinlock, std::allocator<graphlab::padded_simple_spinlock>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.11" = type { %"struct.std::_Vector_base.12" }
%"struct.std::_Vector_base.12" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt5dequeImSaImEESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(80) ptr @_ZNSt6vectorISt5dequeImSaImEESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt5dequeImSaImEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN8graphlab14fifo_scheduler5emptyEv(ptr noundef nonnull align 8 dereferenceable(128) %0) unnamed_addr #1 align 2 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %6 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #2
  store i64 0, ptr %4, align 8, !tbaa !9
  br label %7

7:                                                ; preds = %20, %1
  %8 = load i64, ptr %4, align 8, !tbaa !9
  %9 = getelementptr inbounds %"class.graphlab::fifo_scheduler", ptr %6, i32 0, i32 2
  %10 = call noundef i64 @_ZNKSt6vectorISt5dequeImSaImEESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #2
  %11 = icmp ult i64 %8, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %7
  store i32 2, ptr %5, align 4
  br label %23

13:                                               ; preds = %7
  %14 = getelementptr inbounds %"class.graphlab::fifo_scheduler", ptr %6, i32 0, i32 2
  %15 = load i64, ptr %4, align 8, !tbaa !9
  %16 = call noundef nonnull align 8 dereferenceable(80) ptr @_ZNSt6vectorISt5dequeImSaImEESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %15) #2
  %17 = call noundef zeroext i1 @_ZNKSt5dequeImSaImEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80) %16) #2
  br i1 %17, label %19, label %18

18:                                               ; preds = %13
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %23

19:                                               ; preds = %13
  br label %20

20:                                               ; preds = %19
  %21 = load i64, ptr %4, align 8, !tbaa !9
  %22 = add i64 %21, 1
  store i64 %22, ptr %4, align 8, !tbaa !9
  br label %7, !llvm.loop !11

23:                                               ; preds = %18, %12
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #2
  %24 = load i32, ptr %5, align 4
  switch i32 %24, label %28 [
    i32 2, label %25
    i32 1, label %26
  ]

25:                                               ; preds = %23
  store i1 true, ptr %2, align 1
  br label %26

26:                                               ; preds = %25, %23
  %27 = load i1, ptr %2, align 1
  ret i1 %27

28:                                               ; preds = %23
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorISt5dequeImSaImEESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(80) ptr @_ZNSt6vectorISt5dequeImSaImEESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt5dequeImSaImEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_ZN8graphlab14fifo_scheduler5emptyEv(ptr noundef nonnull align 8 dereferenceable(128) %0) unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 32
  %3 = tail call noundef i64 @_ZNKSt6vectorISt5dequeImSaImEESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #1
  %4 = icmp eq i64 %3, 0
  br i1 %4, label %._crit_edge, label %.lr.ph

5:                                                ; preds = %.lr.ph
  %6 = add nuw i64 %.057, 1
  %7 = tail call noundef i64 @_ZNKSt6vectorISt5dequeImSaImEESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #1
  %.not = icmp ult i64 %6, %7
  br i1 %.not, label %.lr.ph, label %._crit_edge, !llvm.loop !5

.lr.ph:                                           ; preds = %1, %5
  %.057 = phi i64 [ %6, %5 ], [ 0, %1 ]
  %8 = tail call noundef nonnull align 8 dereferenceable(80) ptr @_ZNSt6vectorISt5dequeImSaImEESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %.057) #1
  %9 = tail call noundef zeroext i1 @_ZNKSt5dequeImSaImEE5emptyEv(ptr noundef nonnull align 8 dereferenceable(80) %8) #1
  br i1 %9, label %5, label %._crit_edge

._crit_edge:                                      ; preds = %5, %.lr.ph, %1
  %.lcssa = phi i1 [ true, %1 ], [ %9, %.lr.ph ], [ %9, %5 ]
  ret i1 %.lcssa
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass