; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/Ladrilhos (SBC 2016)/main.ll (Z3bfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@h = external dso_local global i32, align 4
@li = external dso_local global i32, align 4
@cont = external dso_local global i32, align 4
@__const._Z3bfsii.row = external hidden unnamed_addr constant [4 x i32], align 16
@__const._Z3bfsii.col = external hidden unnamed_addr constant [4 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3bfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca [4 x i32], align 16
  %6 = alloca [4 x i32], align 16
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %11) #4
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %14) #4
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = icmp ne i32 %16, 0
  br i1 %17, label %90, label %18

18:                                               ; preds = %2
  %19 = load i32, ptr @cont, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr @cont, align 4, !tbaa !5
  %21 = load i32, ptr %3, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %22) #4
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #4
  store i32 1, ptr %26, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %5) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %5, ptr align 16 @__const._Z3bfsii.row, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 16, ptr %6) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %6, ptr align 16 @__const._Z3bfsii.col, i64 16, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %86, %18
  %28 = load i32, ptr %7, align 4, !tbaa !5
  %29 = icmp slt i32 %28, 4
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %89

31:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [4 x i32], ptr %5, i64 0, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = add nsw i32 %32, %36
  store i32 %37, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [4 x i32], ptr %6, i64 0, i64 %40
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = add nsw i32 %38, %42
  store i32 %43, ptr %9, align 4, !tbaa !5
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = icmp sge i32 %44, 0
  br i1 %45, label %46, label %85

46:                                               ; preds = %31
  %47 = load i32, ptr %8, align 4, !tbaa !5
  %48 = load i32, ptr @h, align 4, !tbaa !5
  %49 = icmp slt i32 %47, %48
  br i1 %49, label %50, label %85

50:                                               ; preds = %46
  %51 = load i32, ptr %9, align 4, !tbaa !5
  %52 = icmp sge i32 %51, 0
  br i1 %52, label %53, label %85

53:                                               ; preds = %50
  %54 = load i32, ptr %9, align 4, !tbaa !5
  %55 = load i32, ptr @li, align 4, !tbaa !5
  %56 = icmp slt i32 %54, %55
  br i1 %56, label %57, label %85

57:                                               ; preds = %53
  %58 = load i32, ptr %8, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %59) #4
  %61 = load i32, ptr %9, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %62) #4
  %64 = load i32, ptr %63, align 4, !tbaa !5
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %85, label %66

66:                                               ; preds = %57
  %67 = load i32, ptr %8, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %68) #4
  %70 = load i32, ptr %9, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %71) #4
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = load i32, ptr %3, align 4, !tbaa !5
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %75) #4
  %77 = load i32, ptr %4, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %76, i64 noundef %78) #4
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %81 = icmp eq i32 %73, %80
  br i1 %81, label %82, label %85

82:                                               ; preds = %66
  %83 = load i32, ptr %8, align 4, !tbaa !5
  %84 = load i32, ptr %9, align 4, !tbaa !5
  call void @_Z3bfsii(i32 noundef %83, i32 noundef %84)
  br label %85

85:                                               ; preds = %82, %66, %57, %53, %50, %46, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %86

86:                                               ; preds = %85
  %87 = load i32, ptr %7, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %7, align 4, !tbaa !5
  br label %27, !llvm.loop !9

89:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 16, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %5) #4
  br label %90

90:                                               ; preds = %89, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@v = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@h = external dso_local local_unnamed_addr global i32, align 4
@li = external dso_local local_unnamed_addr global i32, align 4
@cont = external dso_local local_unnamed_addr global i32, align 4
@__const._Z3bfsii.row = external hidden unnamed_addr constant [4 x i32], align 16
@__const._Z3bfsii.col = external hidden unnamed_addr constant [4 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3bfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  br label %tailrecurse

tailrecurse:                                      ; preds = %111, %2
  %.tr = phi i32 [ %0, %2 ], [ %95, %111 ]
  %.tr30 = phi i32 [ %1, %2 ], [ %97, %111 ]
  %3 = sext i32 %.tr to i64
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %5 = sext i32 %.tr30 to i64
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5) #1
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %8, label %.loopexit

8:                                                ; preds = %tailrecurse
  %9 = load i32, ptr @cont, align 4, !tbaa !5
  %10 = add nsw i32 %9, 1
  store i32 %10, ptr @cont, align 4, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %5) #1
  store i32 1, ptr %12, align 4, !tbaa !5
  %13 = load i32, ptr @__const._Z3bfsii.row, align 16, !tbaa !5
  %14 = add nsw i32 %13, %.tr
  %15 = load i32, ptr @__const._Z3bfsii.col, align 16, !tbaa !5
  %16 = add nsw i32 %15, %.tr30
  %17 = icmp sgt i32 %14, -1
  br i1 %17, label %18, label %39

18:                                               ; preds = %8
  %19 = load i32, ptr @h, align 4, !tbaa !5
  %20 = icmp slt i32 %14, %19
  %21 = icmp sgt i32 %16, -1
  %or.cond = select i1 %20, i1 %21, i1 false
  %22 = load i32, ptr @li, align 4
  %23 = icmp slt i32 %16, %22
  %or.cond27 = select i1 %or.cond, i1 %23, i1 false
  br i1 %or.cond27, label %24, label %39

24:                                               ; preds = %18
  %25 = zext nneg i32 %14 to i64
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %25) #1
  %27 = zext nneg i32 %16 to i64
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %27) #1
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %.not25 = icmp eq i32 %29, 0
  br i1 %.not25, label %30, label %39

30:                                               ; preds = %24
  %31 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %25) #1
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %27) #1
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %35 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %5) #1
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = icmp eq i32 %33, %36
  br i1 %37, label %38, label %39

38:                                               ; preds = %30
  tail call void @_Z3bfsii(i32 noundef %14, i32 noundef %16)
  br label %39

39:                                               ; preds = %38, %30, %24, %18, %8
  %40 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3bfsii.row, i64 4), align 4, !tbaa !5
  %41 = add nsw i32 %40, %.tr
  %42 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3bfsii.col, i64 4), align 4, !tbaa !5
  %43 = add nsw i32 %42, %.tr30
  %44 = icmp sgt i32 %41, -1
  br i1 %44, label %45, label %66

45:                                               ; preds = %39
  %46 = load i32, ptr @h, align 4, !tbaa !5
  %47 = icmp slt i32 %41, %46
  %48 = icmp sgt i32 %43, -1
  %or.cond.1 = select i1 %47, i1 %48, i1 false
  %49 = load i32, ptr @li, align 4
  %50 = icmp slt i32 %43, %49
  %or.cond27.1 = select i1 %or.cond.1, i1 %50, i1 false
  br i1 %or.cond27.1, label %51, label %66

51:                                               ; preds = %45
  %52 = zext nneg i32 %41 to i64
  %53 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %52) #1
  %54 = zext nneg i32 %43 to i64
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %54) #1
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %.not25.1 = icmp eq i32 %56, 0
  br i1 %.not25.1, label %57, label %66

57:                                               ; preds = %51
  %58 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %52) #1
  %59 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef %54) #1
  %60 = load i32, ptr %59, align 4, !tbaa !5
  %61 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %62 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %5) #1
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = icmp eq i32 %60, %63
  br i1 %64, label %65, label %66

65:                                               ; preds = %57
  tail call void @_Z3bfsii(i32 noundef %41, i32 noundef %43)
  br label %66

66:                                               ; preds = %65, %57, %51, %45, %39
  %67 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3bfsii.row, i64 8), align 8, !tbaa !5
  %68 = add nsw i32 %67, %.tr
  %69 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3bfsii.col, i64 8), align 8, !tbaa !5
  %70 = add nsw i32 %69, %.tr30
  %71 = icmp sgt i32 %68, -1
  br i1 %71, label %72, label %93

72:                                               ; preds = %66
  %73 = load i32, ptr @h, align 4, !tbaa !5
  %74 = icmp slt i32 %68, %73
  %75 = icmp sgt i32 %70, -1
  %or.cond.2 = select i1 %74, i1 %75, i1 false
  %76 = load i32, ptr @li, align 4
  %77 = icmp slt i32 %70, %76
  %or.cond27.2 = select i1 %or.cond.2, i1 %77, i1 false
  br i1 %or.cond27.2, label %78, label %93

78:                                               ; preds = %72
  %79 = zext nneg i32 %68 to i64
  %80 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %79) #1
  %81 = zext nneg i32 %70 to i64
  %82 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %80, i64 noundef %81) #1
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %.not25.2 = icmp eq i32 %83, 0
  br i1 %.not25.2, label %84, label %93

84:                                               ; preds = %78
  %85 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %79) #1
  %86 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %81) #1
  %87 = load i32, ptr %86, align 4, !tbaa !5
  %88 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %89 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %5) #1
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = icmp eq i32 %87, %90
  br i1 %91, label %92, label %93

92:                                               ; preds = %84
  tail call void @_Z3bfsii(i32 noundef %68, i32 noundef %70)
  br label %93

93:                                               ; preds = %92, %84, %78, %72, %66
  %94 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3bfsii.row, i64 12), align 4, !tbaa !5
  %95 = add nsw i32 %94, %.tr
  %96 = load i32, ptr getelementptr inbounds (i8, ptr @__const._Z3bfsii.col, i64 12), align 4, !tbaa !5
  %97 = add nsw i32 %96, %.tr30
  %98 = icmp sgt i32 %95, -1
  br i1 %98, label %99, label %.loopexit

99:                                               ; preds = %93
  %100 = load i32, ptr @h, align 4, !tbaa !5
  %101 = icmp slt i32 %95, %100
  %102 = icmp sgt i32 %97, -1
  %or.cond.3 = select i1 %101, i1 %102, i1 false
  %103 = load i32, ptr @li, align 4
  %104 = icmp slt i32 %97, %103
  %or.cond27.3 = select i1 %or.cond.3, i1 %104, i1 false
  br i1 %or.cond27.3, label %105, label %.loopexit

105:                                              ; preds = %99
  %106 = zext nneg i32 %95 to i64
  %107 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %106) #1
  %108 = zext nneg i32 %97 to i64
  %109 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %108) #1
  %110 = load i32, ptr %109, align 4, !tbaa !5
  %.not25.3 = icmp eq i32 %110, 0
  br i1 %.not25.3, label %111, label %.loopexit

111:                                              ; preds = %105
  %112 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %106) #1
  %113 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %112, i64 noundef %108) #1
  %114 = load i32, ptr %113, align 4, !tbaa !5
  %115 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %3) #1
  %116 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %5) #1
  %117 = load i32, ptr %116, align 4, !tbaa !5
  %118 = icmp eq i32 %114, %117
  br i1 %118, label %tailrecurse, label %.loopexit

.loopexit:                                        ; preds = %93, %99, %105, %111, %tailrecurse
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass