; LLVM IR from Ryuk17/SpeechAlgorithms :: WebRTC_AGC/src (agc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LegacyAgc = type { i32, i16, i16, i16, i8, %struct.WebRtcAgcConfig, %struct.WebRtcAgcConfig, i16, i16, i32, i32, i32, i32, i32, i32, i32, i16, i16, [8 x i32], i32, i32, i32, i32, i32, i32, [10 x i32], [2 x [5 x i32]], [2 x [10 x i32]], i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, %struct.AgcVad, %struct.DigitalAgc, i16 }
%struct.WebRtcAgcConfig = type { i16, i16, i8 }
%struct.AgcVad = type { [8 x i32], i16, i16, i16, i16, i32, i16, i16, i32, i16 }
%struct.DigitalAgc = type { i32, i32, i32, [32 x i32], i16, i16, %struct.AgcVad, %struct.AgcVad }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @WebRtcAgc_SaturationCtrl(ptr noundef %0, ptr noundef %1, ptr noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  store i16 0, ptr %7, align 2, !tbaa !9
  br label %9

9:                                                ; preds = %34, %3
  %10 = load i16, ptr %7, align 2, !tbaa !9
  %11 = sext i16 %10 to i32
  %12 = icmp slt i32 %11, 10
  br i1 %12, label %13, label %37

13:                                               ; preds = %9
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = load i16, ptr %7, align 2, !tbaa !9
  %16 = sext i16 %15 to i64
  %17 = getelementptr inbounds i32, ptr %14, i64 %16
  %18 = load i32, ptr %17, align 4, !tbaa !11
  %19 = ashr i32 %18, 20
  %20 = trunc i32 %19 to i16
  store i16 %20, ptr %8, align 2, !tbaa !9
  %21 = load i16, ptr %8, align 2, !tbaa !9
  %22 = sext i16 %21 to i32
  %23 = icmp sgt i32 %22, 875
  br i1 %23, label %24, label %33

24:                                               ; preds = %13
  %25 = load i16, ptr %8, align 2, !tbaa !9
  %26 = sext i16 %25 to i32
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.LegacyAgc, ptr %27, i32 0, i32 29
  %29 = load i16, ptr %28, align 2, !tbaa !13
  %30 = sext i16 %29 to i32
  %31 = add nsw i32 %30, %26
  %32 = trunc i32 %31 to i16
  store i16 %32, ptr %28, align 2, !tbaa !13
  br label %33

33:                                               ; preds = %24, %13
  br label %34

34:                                               ; preds = %33
  %35 = load i16, ptr %7, align 2, !tbaa !9
  %36 = add i16 %35, 1
  store i16 %36, ptr %7, align 2, !tbaa !9
  br label %9, !llvm.loop !18

37:                                               ; preds = %9
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.LegacyAgc, ptr %38, i32 0, i32 29
  %40 = load i16, ptr %39, align 2, !tbaa !13
  %41 = sext i16 %40 to i32
  %42 = icmp sgt i32 %41, 25000
  br i1 %42, label %43, label %47

43:                                               ; preds = %37
  %44 = load ptr, ptr %5, align 8, !tbaa !5
  store i8 1, ptr %44, align 1, !tbaa !20
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.LegacyAgc, ptr %45, i32 0, i32 29
  store i16 0, ptr %46, align 2, !tbaa !13
  br label %47

47:                                               ; preds = %43, %37
  %48 = load ptr, ptr %4, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.LegacyAgc, ptr %48, i32 0, i32 29
  %50 = load i16, ptr %49, align 2, !tbaa !13
  %51 = sext i16 %50 to i32
  %52 = mul nsw i32 %51, 32440
  %53 = ashr i32 %52, 15
  %54 = trunc i32 %53 to i16
  %55 = load ptr, ptr %4, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.LegacyAgc, ptr %55, i32 0, i32 29
  store i16 %54, ptr %56, align 2, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !10, i64 278}
!14 = !{!"", !12, i64 0, !10, i64 4, !10, i64 6, !10, i64 8, !7, i64 10, !15, i64 12, !15, i64 18, !10, i64 24, !10, i64 26, !12, i64 28, !12, i64 32, !12, i64 36, !12, i64 40, !12, i64 44, !12, i64 48, !12, i64 52, !10, i64 56, !10, i64 58, !7, i64 60, !12, i64 92, !12, i64 96, !12, i64 100, !12, i64 104, !12, i64 108, !12, i64 112, !7, i64 116, !7, i64 156, !7, i64 196, !10, i64 276, !10, i64 278, !10, i64 280, !10, i64 282, !10, i64 284, !10, i64 286, !10, i64 288, !10, i64 290, !10, i64 292, !10, i64 294, !10, i64 296, !10, i64 298, !10, i64 300, !10, i64 302, !12, i64 304, !10, i64 308, !12, i64 312, !12, i64 316, !12, i64 320, !12, i64 324, !12, i64 328, !12, i64 332, !12, i64 336, !12, i64 340, !12, i64 344, !10, i64 348, !16, i64 352, !17, i64 408, !10, i64 664}
!15 = !{!"", !10, i64 0, !10, i64 2, !7, i64 4}
!16 = !{!"", !7, i64 0, !10, i64 32, !10, i64 34, !10, i64 36, !10, i64 38, !12, i64 40, !10, i64 44, !10, i64 46, !12, i64 48, !10, i64 52}
!17 = !{!"", !12, i64 0, !12, i64 4, !12, i64 8, !7, i64 12, !10, i64 140, !10, i64 142, !16, i64 144, !16, i64 200}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @WebRtcAgc_SaturationCtrl(ptr nocapture noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 278
  %5 = load i32, ptr %2, align 4, !tbaa !5
  %6 = ashr i32 %5, 20
  %7 = icmp sgt i32 %6, 875
  %.pre.pre.pre.pre.pre.pre.pre.pre.pre.pre = load i16, ptr %4, align 2, !tbaa !9
  %8 = trunc nsw i32 %6 to i16
  %9 = select i1 %7, i16 %8, i16 0
  %.pre.pre.pre.pre.pre.pre.pre.pre.pre = add i16 %.pre.pre.pre.pre.pre.pre.pre.pre.pre.pre, %9
  %10 = getelementptr inbounds i8, ptr %2, i64 4
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = ashr i32 %11, 20
  %13 = icmp sgt i32 %12, 875
  %14 = trunc nsw i32 %12 to i16
  %15 = select i1 %13, i16 %14, i16 0
  %.pre.pre.pre.pre.pre.pre.pre.pre = add i16 %.pre.pre.pre.pre.pre.pre.pre.pre.pre, %15
  %16 = getelementptr inbounds i8, ptr %2, i64 8
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = ashr i32 %17, 20
  %19 = icmp sgt i32 %18, 875
  %20 = trunc nsw i32 %18 to i16
  %21 = select i1 %19, i16 %20, i16 0
  %.pre.pre.pre.pre.pre.pre.pre = add i16 %.pre.pre.pre.pre.pre.pre.pre.pre, %21
  %22 = getelementptr inbounds i8, ptr %2, i64 12
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = ashr i32 %23, 20
  %25 = icmp sgt i32 %24, 875
  br i1 %25, label %26, label %29

26:                                               ; preds = %3
  %27 = trunc nsw i32 %24 to i16
  %28 = add i16 %.pre.pre.pre.pre.pre.pre.pre, %27
  store i16 %28, ptr %4, align 2, !tbaa !9
  br label %29

29:                                               ; preds = %26, %3
  %.pre.pre.pre.pre.pre.pre = phi i16 [ %28, %26 ], [ %.pre.pre.pre.pre.pre.pre.pre, %3 ]
  %30 = getelementptr inbounds i8, ptr %2, i64 16
  %31 = load <4 x i32>, ptr %30, align 4, !tbaa !5
  %32 = ashr <4 x i32> %31, <i32 20, i32 20, i32 20, i32 20>
  %33 = icmp sgt <4 x i32> %32, <i32 875, i32 875, i32 875, i32 875>
  %34 = trunc nsw <4 x i32> %32 to <4 x i16>
  %35 = select <4 x i1> %33, <4 x i16> %34, <4 x i16> zeroinitializer
  %36 = getelementptr inbounds i8, ptr %2, i64 32
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = ashr i32 %37, 20
  %39 = icmp sgt i32 %38, 875
  %40 = trunc nsw i32 %38 to i16
  %41 = select i1 %39, i16 %40, i16 0
  %42 = getelementptr inbounds i8, ptr %2, i64 36
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = ashr i32 %43, 20
  %45 = icmp sgt i32 %44, 875
  %46 = trunc nsw i32 %44 to i16
  %47 = select i1 %45, i16 %46, i16 0
  %48 = tail call i16 @llvm.vector.reduce.add.v4i16(<4 x i16> %35)
  %op.rdx = add i16 %48, %41
  %op.rdx23 = add i16 %47, %.pre.pre.pre.pre.pre.pre
  %op.rdx24 = add i16 %op.rdx, %op.rdx23
  %49 = icmp sgt i16 %op.rdx24, 25000
  br i1 %49, label %50, label %51

50:                                               ; preds = %29
  store i8 1, ptr %1, align 1, !tbaa !15
  br label %51

51:                                               ; preds = %50, %29
  %52 = phi i16 [ 0, %50 ], [ %op.rdx24, %29 ]
  %53 = sext i16 %52 to i32
  %54 = mul nsw i32 %53, 32440
  %55 = lshr i32 %54, 15
  %56 = trunc i32 %55 to i16
  store i16 %56, ptr %4, align 2, !tbaa !9
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i16 @llvm.vector.reduce.add.v4i16(<4 x i16>) #1

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 278}
!10 = !{!"", !6, i64 0, !11, i64 4, !11, i64 6, !11, i64 8, !7, i64 10, !12, i64 12, !12, i64 18, !11, i64 24, !11, i64 26, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !11, i64 56, !11, i64 58, !7, i64 60, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !7, i64 116, !7, i64 156, !7, i64 196, !11, i64 276, !11, i64 278, !11, i64 280, !11, i64 282, !11, i64 284, !11, i64 286, !11, i64 288, !11, i64 290, !11, i64 292, !11, i64 294, !11, i64 296, !11, i64 298, !11, i64 300, !11, i64 302, !6, i64 304, !11, i64 308, !6, i64 312, !6, i64 316, !6, i64 320, !6, i64 324, !6, i64 328, !6, i64 332, !6, i64 336, !6, i64 340, !6, i64 344, !11, i64 348, !13, i64 352, !14, i64 408, !11, i64 664}
!11 = !{!"short", !7, i64 0}
!12 = !{!"", !11, i64 0, !11, i64 2, !7, i64 4}
!13 = !{!"", !7, i64 0, !11, i64 32, !11, i64 34, !11, i64 36, !11, i64 38, !6, i64 40, !11, i64 44, !11, i64 46, !6, i64 48, !11, i64 52}
!14 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !7, i64 12, !11, i64 140, !11, i64 142, !13, i64 144, !13, i64 200}
!15 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopRotatePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass