; LLVM IR from tum-i4/obfuscation-benchmarks :: tigress-generated-programs (RandomFunc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @RandomFunc(ptr noundef %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca [1 x i64], align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  %10 = getelementptr inbounds i64, ptr %9, i64 0
  %11 = load i64, ptr %10, align 8, !tbaa !9
  %12 = and i64 %11, 914778474
  %13 = shl i64 %12, 7
  %14 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  store i64 %13, ptr %14, align 8, !tbaa !9
  store i64 0, ptr %6, align 8, !tbaa !9
  br label %15

15:                                               ; preds = %61, %2
  %16 = load i64, ptr %6, align 8, !tbaa !9
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = getelementptr inbounds i64, ptr %17, i64 1
  %19 = load i64, ptr %18, align 8, !tbaa !9
  %20 = icmp ult i64 %16, %19
  br i1 %20, label %21, label %64

21:                                               ; preds = %15
  %22 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %23 = load i64, ptr %22, align 8, !tbaa !9
  %24 = load i64, ptr %6, align 8, !tbaa !9
  %25 = icmp ugt i64 %23, %24
  br i1 %25, label %26, label %49

26:                                               ; preds = %21
  %27 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %28 = load i64, ptr %27, align 8, !tbaa !9
  %29 = load i64, ptr %6, align 8, !tbaa !9
  %30 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 %29
  %31 = load i64, ptr %30, align 8, !tbaa !9
  %32 = lshr i64 %31, 1
  %33 = and i64 %32, 7
  %34 = or i64 %33, 1
  %35 = shl i64 %28, %34
  %36 = load i64, ptr %6, align 8, !tbaa !9
  %37 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 %36
  store i64 %35, ptr %37, align 8, !tbaa !9
  %38 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %39 = getelementptr inbounds i32, ptr %38, i64 0
  %40 = load i32, ptr %39, align 4, !tbaa !11
  store i32 %40, ptr %7, align 4, !tbaa !11
  %41 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %42 = getelementptr inbounds i32, ptr %41, i64 1
  %43 = load i32, ptr %42, align 4, !tbaa !11
  %44 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %45 = getelementptr inbounds i32, ptr %44, i64 0
  store i32 %43, ptr %45, align 4, !tbaa !11
  %46 = load i32, ptr %7, align 4, !tbaa !11
  %47 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %48 = getelementptr inbounds i32, ptr %47, i64 1
  store i32 %46, ptr %48, align 4, !tbaa !11
  br label %61

49:                                               ; preds = %21
  %50 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %51 = getelementptr inbounds i16, ptr %50, i64 3
  %52 = load i16, ptr %51, align 2, !tbaa !13
  store i16 %52, ptr %8, align 2, !tbaa !13
  %53 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %54 = getelementptr inbounds i16, ptr %53, i64 0
  %55 = load i16, ptr %54, align 2, !tbaa !13
  %56 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %57 = getelementptr inbounds i16, ptr %56, i64 3
  store i16 %55, ptr %57, align 2, !tbaa !13
  %58 = load i16, ptr %8, align 2, !tbaa !13
  %59 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %60 = getelementptr inbounds i16, ptr %59, i64 0
  store i16 %58, ptr %60, align 2, !tbaa !13
  br label %61

61:                                               ; preds = %49, %26
  %62 = load i64, ptr %6, align 8, !tbaa !9
  %63 = add i64 %62, 1
  store i64 %63, ptr %6, align 8, !tbaa !9
  br label %15, !llvm.loop !15

64:                                               ; preds = %15
  %65 = getelementptr inbounds [1 x i64], ptr %5, i64 0, i64 0
  %66 = load i64, ptr %65, align 8, !tbaa !9
  %67 = shl i64 %66, 3
  %68 = load ptr, ptr %4, align 8, !tbaa !5
  %69 = getelementptr inbounds i64, ptr %68, i64 0
  store i64 %67, ptr %69, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @RandomFunc(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = load i64, ptr %0, align 8, !tbaa !5
  %4 = shl i64 %3, 7
  %5 = and i64 %4, 117091644672
  %.sroa.0.sroa.0.0.extract.trunc61 = trunc i64 %5 to i16
  %.sroa.0.sroa.11.0.extract.shift7288 = lshr i64 %5, 16
  %.sroa.0.sroa.11.0.extract.trunc73 = trunc i64 %.sroa.0.sroa.11.0.extract.shift7288 to i16
  %.sroa.11.0.extract.shift = lshr i64 %5, 32
  %.sroa.11.sroa.0.0.extract.trunc = trunc nuw nsw i64 %.sroa.11.0.extract.shift to i16
  %6 = getelementptr inbounds i8, ptr %0, i64 8
  %7 = load i64, ptr %6, align 8, !tbaa !5
  %.not = icmp eq i64 %7, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2, %16
  %.097 = phi i64 [ %17, %16 ], [ 0, %2 ]
  %.sroa.11.sroa.0.096 = phi i16 [ %.sroa.11.sroa.0.1, %16 ], [ %.sroa.11.sroa.0.0.extract.trunc, %2 ]
  %.sroa.11.sroa.9.095 = phi i16 [ %.sroa.11.sroa.9.1, %16 ], [ 0, %2 ]
  %.sroa.0.sroa.0.094 = phi i16 [ %.sroa.0.sroa.0.1, %16 ], [ %.sroa.0.sroa.0.0.extract.trunc61, %2 ]
  %.sroa.0.sroa.11.093 = phi i16 [ %.sroa.0.sroa.11.1, %16 ], [ %.sroa.0.sroa.11.0.extract.trunc73, %2 ]
  %.sroa.0.sroa.11.0.insert.ext74 = zext i16 %.sroa.0.sroa.11.093 to i64
  %.sroa.0.sroa.11.0.insert.shift75 = shl nuw nsw i64 %.sroa.0.sroa.11.0.insert.ext74, 16
  %.sroa.0.sroa.0.0.insert.ext62 = zext i16 %.sroa.0.sroa.0.094 to i64
  %.sroa.0.sroa.0.0.insert.insert64 = or disjoint i64 %.sroa.0.sroa.11.0.insert.shift75, %.sroa.0.sroa.0.0.insert.ext62
  %.sroa.11.sroa.9.0.insert.ext = zext i16 %.sroa.11.sroa.9.095 to i64
  %.sroa.11.sroa.0.0.insert.ext = zext i16 %.sroa.11.sroa.0.096 to i64
  %8 = shl nuw i64 %.sroa.11.sroa.9.0.insert.ext, 48
  %9 = shl nuw nsw i64 %.sroa.11.sroa.0.0.insert.ext, 32
  %.sroa.11.0.insert.shift = or disjoint i64 %9, %8
  %.sroa.0.0.insert.insert = or disjoint i64 %.sroa.11.0.insert.shift, %.sroa.0.sroa.0.0.insert.insert64
  %10 = icmp ugt i64 %.sroa.0.0.insert.insert, %.097
  br i1 %10, label %11, label %16

11:                                               ; preds = %.lr.ph
  %12 = lshr i64 %.sroa.0.sroa.0.0.insert.ext62, 1
  %13 = and i64 %12, 6
  %14 = or disjoint i64 %13, 1
  %15 = shl i64 %.sroa.0.0.insert.insert, %14
  %.sroa.11.0.extract.shift31 = lshr i64 %15, 32
  %.sroa.0.sroa.0.0.extract.trunc = trunc i64 %.sroa.11.0.extract.shift31 to i16
  %sum.shift = lshr i64 %15, 48
  %.sroa.0.sroa.11.0.extract.trunc = trunc nuw i64 %sum.shift to i16
  %.sroa.11.sroa.0.0.extract.trunc41 = trunc i64 %15 to i16
  %.sroa.11.sroa.9.0.extract.shift5592 = lshr i64 %15, 16
  %.sroa.11.sroa.9.0.extract.trunc56 = trunc i64 %.sroa.11.sroa.9.0.extract.shift5592 to i16
  br label %16

16:                                               ; preds = %.lr.ph, %11
  %.sroa.0.sroa.11.1 = phi i16 [ %.sroa.0.sroa.11.0.extract.trunc, %11 ], [ %.sroa.0.sroa.11.093, %.lr.ph ]
  %.sroa.0.sroa.0.1 = phi i16 [ %.sroa.0.sroa.0.0.extract.trunc, %11 ], [ %.sroa.11.sroa.9.095, %.lr.ph ]
  %.sroa.11.sroa.9.1 = phi i16 [ %.sroa.11.sroa.9.0.extract.trunc56, %11 ], [ %.sroa.0.sroa.0.094, %.lr.ph ]
  %.sroa.11.sroa.0.1 = phi i16 [ %.sroa.11.sroa.0.0.extract.trunc41, %11 ], [ %.sroa.11.sroa.0.096, %.lr.ph ]
  %17 = add nuw i64 %.097, 1
  %exitcond.not = icmp eq i64 %17, %7
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %16
  %18 = zext i16 %.sroa.11.sroa.9.1 to i64
  %19 = shl nuw i64 %18, 48
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %2
  %.sroa.0.sroa.11.0.lcssa = phi i16 [ %.sroa.0.sroa.11.0.extract.trunc73, %2 ], [ %.sroa.0.sroa.11.1, %._crit_edge.loopexit ]
  %.sroa.0.sroa.0.0.lcssa = phi i16 [ %.sroa.0.sroa.0.0.extract.trunc61, %2 ], [ %.sroa.0.sroa.0.1, %._crit_edge.loopexit ]
  %.sroa.11.sroa.9.0.lcssa = phi i64 [ 0, %2 ], [ %19, %._crit_edge.loopexit ]
  %.sroa.11.sroa.0.0.lcssa = phi i16 [ %.sroa.11.sroa.0.0.extract.trunc, %2 ], [ %.sroa.11.sroa.0.1, %._crit_edge.loopexit ]
  %.sroa.0.sroa.11.0.insert.ext78 = zext i16 %.sroa.0.sroa.11.0.lcssa to i64
  %.sroa.0.sroa.11.0.insert.shift79 = shl nuw nsw i64 %.sroa.0.sroa.11.0.insert.ext78, 16
  %.sroa.0.sroa.0.0.insert.ext65 = zext i16 %.sroa.0.sroa.0.0.lcssa to i64
  %.sroa.0.sroa.0.0.insert.insert67 = or disjoint i64 %.sroa.0.sroa.11.0.insert.shift79, %.sroa.0.sroa.0.0.insert.ext65
  %.sroa.11.sroa.0.0.insert.ext34 = zext i16 %.sroa.11.sroa.0.0.lcssa to i64
  %20 = shl nuw nsw i64 %.sroa.11.sroa.0.0.insert.ext34, 32
  %.sroa.11.0.insert.shift23 = or disjoint i64 %20, %.sroa.11.sroa.9.0.lcssa
  %.sroa.0.0.insert.insert15 = or disjoint i64 %.sroa.11.0.insert.shift23, %.sroa.0.sroa.0.0.insert.insert67
  %21 = shl i64 %.sroa.0.0.insert.insert15, 3
  store i64 %21, ptr %1, align 8, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass