; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (bmp180)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@bmp180_read.str = external hidden constant [30 x i8], align 4
@mAddress = external hidden global i32, align 4
@bmp180_read.str.1 = external hidden constant [49 x i8], align 4
@bmp180_read.str.2 = external hidden constant [36 x i8], align 4
@bmp180_read.str.3 = external hidden constant [44 x i8], align 4
@bmp180_read.str.4 = external hidden constant [48 x i8], align 4
@bmp180_read.str.5 = external hidden constant [35 x i8], align 4
@bmp180_read.str.6 = external hidden constant [41 x i8], align 4
@bmp180_read.str.7 = external hidden constant [45 x i8], align 4
@bmp180_read.str.8 = external hidden constant [32 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @bmp180_read(i32 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca [22 x i8], align 16
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i64, align 8
  %27 = alloca i64, align 8
  %28 = alloca i64, align 8
  %29 = alloca i64, align 8
  %30 = alloca i64, align 8
  %31 = alloca i64, align 8
  %32 = alloca i64, align 8
  %33 = alloca i64, align 8
  %34 = alloca i64, align 8
  %35 = alloca i64, align 8
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %36 = load i32, ptr %6, align 4, !tbaa !5
  %37 = icmp ne i32 %36, -1
  br i1 %37, label %38, label %52

38:                                               ; preds = %4
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = icmp ne i32 %39, -1
  br i1 %40, label %41, label %52

41:                                               ; preds = %38
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = load i32, ptr %7, align 4, !tbaa !5
  %44 = call i32 @dh_i2c_init(i32 noundef %42, i32 noundef %43)
  store i32 %44, ptr %10, align 4, !tbaa !5
  %45 = icmp ne i32 %44, 0
  br i1 %45, label %46, label %51

46:                                               ; preds = %41
  br label %47

47:                                               ; preds = %46
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str)
  br label %48

48:                                               ; preds = %47
  br label %49

49:                                               ; preds = %48
  %50 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %50, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %291

51:                                               ; preds = %41
  br label %52

52:                                               ; preds = %51, %38, %4
  call void @llvm.lifetime.start.p0(i64 22, ptr %12) #4
  %53 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  store i8 -86, ptr %53, align 16, !tbaa !11
  %54 = load i32, ptr @mAddress, align 4, !tbaa !5
  %55 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %56 = call i32 @dh_i2c_write(i32 noundef %54, ptr noundef %55, i32 noundef 1, i32 noundef 0)
  store i32 %56, ptr %10, align 4, !tbaa !5
  %57 = icmp ne i32 %56, 0
  br i1 %57, label %58, label %63

58:                                               ; preds = %52
  br label %59

59:                                               ; preds = %58
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.1)
  br label %60

60:                                               ; preds = %59
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %62, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %290

63:                                               ; preds = %52
  %64 = load i32, ptr @mAddress, align 4, !tbaa !5
  %65 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %66 = call i32 @dh_i2c_read(i32 noundef %64, ptr noundef %65, i32 noundef 22)
  store i32 %66, ptr %10, align 4, !tbaa !5
  %67 = icmp ne i32 %66, 0
  br i1 %67, label %68, label %73

68:                                               ; preds = %63
  br label %69

69:                                               ; preds = %68
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.2)
  br label %70

70:                                               ; preds = %69
  br label %71

71:                                               ; preds = %70
  %72 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %72, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %290

73:                                               ; preds = %63
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %74 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %75 = call i32 @signedInt16be(ptr noundef %74, i32 noundef 0)
  store i32 %75, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %76 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %77 = call i32 @signedInt16be(ptr noundef %76, i32 noundef 2)
  store i32 %77, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %78 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %79 = call i32 @signedInt16be(ptr noundef %78, i32 noundef 4)
  store i32 %79, ptr %16, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %80 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %81 = call i32 @unsignedInt16be(ptr noundef %80, i32 noundef 6)
  store i32 %81, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %82 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %83 = call i32 @unsignedInt16be(ptr noundef %82, i32 noundef 8)
  store i32 %83, ptr %18, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  %84 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %85 = call i32 @unsignedInt16be(ptr noundef %84, i32 noundef 10)
  store i32 %85, ptr %19, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %86 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %87 = call i32 @signedInt16be(ptr noundef %86, i32 noundef 12)
  store i32 %87, ptr %20, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  %88 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %89 = call i32 @signedInt16be(ptr noundef %88, i32 noundef 14)
  store i32 %89, ptr %21, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #4
  %90 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %91 = call i32 @signedInt16be(ptr noundef %90, i32 noundef 18)
  store i32 %91, ptr %22, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  %92 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %93 = call i32 @signedInt16be(ptr noundef %92, i32 noundef 20)
  store i32 %93, ptr %23, align 4, !tbaa !5
  %94 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  store i8 -12, ptr %94, align 16, !tbaa !11
  %95 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 1
  store i8 46, ptr %95, align 1, !tbaa !11
  %96 = load i32, ptr @mAddress, align 4, !tbaa !5
  %97 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %98 = call i32 @dh_i2c_write(i32 noundef %96, ptr noundef %97, i32 noundef 2, i32 noundef 1)
  store i32 %98, ptr %10, align 4, !tbaa !5
  %99 = icmp ne i32 %98, 0
  br i1 %99, label %100, label %105

100:                                              ; preds = %73
  br label %101

101:                                              ; preds = %100
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.3)
  br label %102

102:                                              ; preds = %101
  br label %103

103:                                              ; preds = %102
  %104 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %104, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %289

105:                                              ; preds = %73
  call void @delay_ms(i32 noundef 50)
  %106 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  store i8 -10, ptr %106, align 16, !tbaa !11
  %107 = load i32, ptr @mAddress, align 4, !tbaa !5
  %108 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %109 = call i32 @dh_i2c_write(i32 noundef %107, ptr noundef %108, i32 noundef 1, i32 noundef 0)
  store i32 %109, ptr %10, align 4, !tbaa !5
  %110 = icmp ne i32 %109, 0
  br i1 %110, label %111, label %116

111:                                              ; preds = %105
  br label %112

112:                                              ; preds = %111
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.4)
  br label %113

113:                                              ; preds = %112
  br label %114

114:                                              ; preds = %113
  %115 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %115, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %289

116:                                              ; preds = %105
  %117 = load i32, ptr @mAddress, align 4, !tbaa !5
  %118 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %119 = call i32 @dh_i2c_read(i32 noundef %117, ptr noundef %118, i32 noundef 2)
  store i32 %119, ptr %10, align 4, !tbaa !5
  %120 = icmp ne i32 %119, 0
  br i1 %120, label %121, label %126

121:                                              ; preds = %116
  br label %122

122:                                              ; preds = %121
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.5)
  br label %123

123:                                              ; preds = %122
  br label %124

124:                                              ; preds = %123
  %125 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %125, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %289

126:                                              ; preds = %116
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #4
  %127 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %128 = call i32 @unsignedInt16be(ptr noundef %127, i32 noundef 0)
  store i32 %128, ptr %24, align 4, !tbaa !5
  %129 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  store i8 -12, ptr %129, align 16, !tbaa !11
  %130 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 1
  store i8 52, ptr %130, align 1, !tbaa !11
  %131 = load i32, ptr @mAddress, align 4, !tbaa !5
  %132 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %133 = call i32 @dh_i2c_write(i32 noundef %131, ptr noundef %132, i32 noundef 2, i32 noundef 1)
  store i32 %133, ptr %10, align 4, !tbaa !5
  %134 = icmp ne i32 %133, 0
  br i1 %134, label %135, label %140

135:                                              ; preds = %126
  br label %136

136:                                              ; preds = %135
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.6)
  br label %137

137:                                              ; preds = %136
  br label %138

138:                                              ; preds = %137
  %139 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %139, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %288

140:                                              ; preds = %126
  call void @delay_ms(i32 noundef 50)
  %141 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  store i8 -10, ptr %141, align 16, !tbaa !11
  %142 = load i32, ptr @mAddress, align 4, !tbaa !5
  %143 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %144 = call i32 @dh_i2c_write(i32 noundef %142, ptr noundef %143, i32 noundef 1, i32 noundef 0)
  store i32 %144, ptr %10, align 4, !tbaa !5
  %145 = icmp ne i32 %144, 0
  br i1 %145, label %146, label %151

146:                                              ; preds = %140
  br label %147

147:                                              ; preds = %146
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.7)
  br label %148

148:                                              ; preds = %147
  br label %149

149:                                              ; preds = %148
  %150 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %150, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %288

151:                                              ; preds = %140
  %152 = load i32, ptr @mAddress, align 4, !tbaa !5
  %153 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %154 = call i32 @dh_i2c_read(i32 noundef %152, ptr noundef %153, i32 noundef 2)
  store i32 %154, ptr %10, align 4, !tbaa !5
  %155 = icmp ne i32 %154, 0
  br i1 %155, label %156, label %161

156:                                              ; preds = %151
  br label %157

157:                                              ; preds = %156
  call void (ptr, ...) @dhdebug_ram(ptr noundef @bmp180_read.str.8)
  br label %158

158:                                              ; preds = %157
  br label %159

159:                                              ; preds = %158
  %160 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %160, ptr %5, align 4
  store i32 1, ptr %11, align 4
  br label %288

161:                                              ; preds = %151
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #4
  %162 = getelementptr inbounds [22 x i8], ptr %12, i64 0, i64 0
  %163 = call i32 @unsignedInt16be(ptr noundef %162, i32 noundef 0)
  store i32 %163, ptr %25, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %26) #4
  %164 = load i32, ptr %24, align 4, !tbaa !5
  %165 = load i32, ptr %19, align 4, !tbaa !5
  %166 = sub i32 %164, %165
  %167 = load i32, ptr %18, align 4, !tbaa !5
  %168 = mul i32 %166, %167
  %169 = lshr i32 %168, 15
  %170 = zext i32 %169 to i64
  store i64 %170, ptr %26, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %27) #4
  %171 = load i32, ptr %22, align 4, !tbaa !5
  %172 = shl i32 %171, 11
  %173 = sext i32 %172 to i64
  %174 = load i64, ptr %26, align 8, !tbaa !12
  %175 = load i32, ptr %23, align 4, !tbaa !5
  %176 = sext i32 %175 to i64
  %177 = add nsw i64 %174, %176
  %178 = sdiv i64 %173, %177
  store i64 %178, ptr %27, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %28) #4
  %179 = load i64, ptr %26, align 8, !tbaa !12
  %180 = load i64, ptr %27, align 8, !tbaa !12
  %181 = add nsw i64 %179, %180
  store i64 %181, ptr %28, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %29) #4
  %182 = load i64, ptr %28, align 8, !tbaa !12
  %183 = add nsw i64 %182, 8
  %184 = ashr i64 %183, 4
  store i64 %184, ptr %29, align 8, !tbaa !12
  %185 = load ptr, ptr %9, align 8, !tbaa !9
  %186 = icmp ne ptr %185, null
  br i1 %186, label %187, label %192

187:                                              ; preds = %161
  %188 = load i64, ptr %29, align 8, !tbaa !12
  %189 = sitofp i64 %188 to float
  %190 = fdiv float %189, 1.000000e+01
  %191 = load ptr, ptr %9, align 8, !tbaa !9
  store float %190, ptr %191, align 4, !tbaa !14
  br label %192

192:                                              ; preds = %187, %161
  call void @llvm.lifetime.start.p0(i64 8, ptr %30) #4
  %193 = load i64, ptr %28, align 8, !tbaa !12
  %194 = sub nsw i64 %193, 4000
  store i64 %194, ptr %30, align 8, !tbaa !12
  %195 = load i32, ptr %21, align 4, !tbaa !5
  %196 = sext i32 %195 to i64
  %197 = load i64, ptr %30, align 8, !tbaa !12
  %198 = load i64, ptr %30, align 8, !tbaa !12
  %199 = mul nsw i64 %197, %198
  %200 = ashr i64 %199, 12
  %201 = mul nsw i64 %196, %200
  %202 = ashr i64 %201, 11
  store i64 %202, ptr %26, align 8, !tbaa !12
  %203 = load i32, ptr %15, align 4, !tbaa !5
  %204 = sext i32 %203 to i64
  %205 = load i64, ptr %30, align 8, !tbaa !12
  %206 = mul nsw i64 %204, %205
  %207 = ashr i64 %206, 11
  store i64 %207, ptr %27, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %31) #4
  %208 = load i64, ptr %26, align 8, !tbaa !12
  %209 = load i64, ptr %27, align 8, !tbaa !12
  %210 = add nsw i64 %208, %209
  store i64 %210, ptr %31, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %32) #4
  %211 = load i32, ptr %14, align 4, !tbaa !5
  %212 = mul nsw i32 %211, 4
  %213 = sext i32 %212 to i64
  %214 = load i64, ptr %31, align 8, !tbaa !12
  %215 = add nsw i64 %213, %214
  %216 = load i32, ptr %13, align 4, !tbaa !5
  %217 = zext i32 %216 to i64
  %218 = shl i64 %215, %217
  %219 = add nsw i64 %218, 2
  %220 = ashr i64 %219, 2
  store i64 %220, ptr %32, align 8, !tbaa !12
  %221 = load i32, ptr %16, align 4, !tbaa !5
  %222 = sext i32 %221 to i64
  %223 = load i64, ptr %30, align 8, !tbaa !12
  %224 = mul nsw i64 %222, %223
  %225 = ashr i64 %224, 13
  store i64 %225, ptr %26, align 8, !tbaa !12
  %226 = load i32, ptr %20, align 4, !tbaa !5
  %227 = sext i32 %226 to i64
  %228 = load i64, ptr %30, align 8, !tbaa !12
  %229 = load i64, ptr %30, align 8, !tbaa !12
  %230 = mul nsw i64 %228, %229
  %231 = ashr i64 %230, 12
  %232 = mul nsw i64 %227, %231
  %233 = ashr i64 %232, 16
  store i64 %233, ptr %27, align 8, !tbaa !12
  %234 = load i64, ptr %26, align 8, !tbaa !12
  %235 = load i64, ptr %27, align 8, !tbaa !12
  %236 = add nsw i64 %234, %235
  %237 = add nsw i64 %236, 2
  %238 = ashr i64 %237, 2
  store i64 %238, ptr %31, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %33) #4
  %239 = load i32, ptr %17, align 4, !tbaa !5
  %240 = zext i32 %239 to i64
  %241 = load i64, ptr %31, align 8, !tbaa !12
  %242 = add nsw i64 %241, 32768
  %243 = mul nsw i64 %240, %242
  %244 = ashr i64 %243, 15
  store i64 %244, ptr %33, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %34) #4
  %245 = load i32, ptr %25, align 4, !tbaa !5
  %246 = zext i32 %245 to i64
  %247 = load i64, ptr %32, align 8, !tbaa !12
  %248 = sub nsw i64 %246, %247
  %249 = load i32, ptr %13, align 4, !tbaa !5
  %250 = ashr i32 50000, %249
  %251 = sext i32 %250 to i64
  %252 = mul nsw i64 %248, %251
  store i64 %252, ptr %34, align 8, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %35) #4
  %253 = load i64, ptr %34, align 8, !tbaa !12
  %254 = icmp ult i64 %253, 2147483648
  br i1 %254, label %255, label %260

255:                                              ; preds = %192
  %256 = load i64, ptr %34, align 8, !tbaa !12
  %257 = mul i64 %256, 2
  %258 = load i64, ptr %33, align 8, !tbaa !12
  %259 = udiv i64 %257, %258
  br label %265

260:                                              ; preds = %192
  %261 = load i64, ptr %34, align 8, !tbaa !12
  %262 = load i64, ptr %33, align 8, !tbaa !12
  %263 = udiv i64 %261, %262
  %264 = mul i64 %263, 2
  br label %265

265:                                              ; preds = %260, %255
  %266 = phi i64 [ %259, %255 ], [ %264, %260 ]
  store i64 %266, ptr %35, align 8, !tbaa !12
  %267 = load i64, ptr %35, align 8, !tbaa !12
  %268 = ashr i64 %267, 8
  %269 = load i64, ptr %35, align 8, !tbaa !12
  %270 = ashr i64 %269, 8
  %271 = mul nsw i64 %268, %270
  store i64 %271, ptr %26, align 8, !tbaa !12
  %272 = load i64, ptr %26, align 8, !tbaa !12
  %273 = mul nsw i64 %272, 3038
  %274 = ashr i64 %273, 16
  store i64 %274, ptr %26, align 8, !tbaa !12
  %275 = load i64, ptr %35, align 8, !tbaa !12
  %276 = mul nsw i64 -7357, %275
  %277 = ashr i64 %276, 16
  store i64 %277, ptr %27, align 8, !tbaa !12
  %278 = load i64, ptr %35, align 8, !tbaa !12
  %279 = load i64, ptr %26, align 8, !tbaa !12
  %280 = load i64, ptr %27, align 8, !tbaa !12
  %281 = add nsw i64 %279, %280
  %282 = add nsw i64 %281, 3791
  %283 = ashr i64 %282, 4
  %284 = add nsw i64 %278, %283
  store i64 %284, ptr %35, align 8, !tbaa !12
  %285 = load i64, ptr %35, align 8, !tbaa !12
  %286 = trunc i64 %285 to i32
  %287 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %286, ptr %287, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %35) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %34) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %33) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %32) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %31) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %30) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %29) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %28) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %27) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #4
  br label %288

288:                                              ; preds = %265, %159, %149, %138
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #4
  br label %289

289:                                              ; preds = %288, %124, %114, %103
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %290

290:                                              ; preds = %289, %71, %61
  call void @llvm.lifetime.end.p0(i64 22, ptr %12) #4
  br label %291

291:                                              ; preds = %290, %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  %292 = load i32, ptr %5, align 4
  ret i32 %292
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) #2

declare void @dhdebug_ram(ptr noundef, ...) #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16be(ptr noundef, i32 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @unsignedInt16be(ptr noundef, i32 noundef) #3

declare void @delay_ms(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"float", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@bmp180_read.str = external hidden constant [30 x i8], align 4
@mAddress = external hidden local_unnamed_addr global i32, align 4
@bmp180_read.str.1 = external hidden constant [49 x i8], align 4
@bmp180_read.str.2 = external hidden constant [36 x i8], align 4
@bmp180_read.str.3 = external hidden constant [44 x i8], align 4
@bmp180_read.str.4 = external hidden constant [48 x i8], align 4
@bmp180_read.str.5 = external hidden constant [35 x i8], align 4
@bmp180_read.str.6 = external hidden constant [41 x i8], align 4
@bmp180_read.str.7 = external hidden constant [45 x i8], align 4
@bmp180_read.str.8 = external hidden constant [32 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @bmp180_read(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr noundef writeonly %3) local_unnamed_addr #0 {
  %5 = alloca [22 x i8], align 16
  %6 = icmp ne i32 %0, -1
  %7 = icmp ne i32 %1, -1
  %or.cond = and i1 %6, %7
  br i1 %or.cond, label %8, label %11

8:                                                ; preds = %4
  %9 = tail call i32 @dh_i2c_init(i32 noundef %0, i32 noundef %1) #4
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %11, label %10

10:                                               ; preds = %8
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str) #4
  br label %125

11:                                               ; preds = %8, %4
  call void @llvm.lifetime.start.p0(i64 22, ptr nonnull %5) #4
  store i8 -86, ptr %5, align 16, !tbaa !5
  %12 = load i32, ptr @mAddress, align 4, !tbaa !8
  %13 = call i32 @dh_i2c_write(i32 noundef %12, ptr noundef nonnull %5, i32 noundef 1, i32 noundef 0) #4
  %.not77 = icmp eq i32 %13, 0
  br i1 %.not77, label %15, label %14

14:                                               ; preds = %11
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.1) #4
  br label %124

15:                                               ; preds = %11
  %16 = load i32, ptr @mAddress, align 4, !tbaa !8
  %17 = call i32 @dh_i2c_read(i32 noundef %16, ptr noundef nonnull %5, i32 noundef 22) #4
  %.not78 = icmp eq i32 %17, 0
  br i1 %.not78, label %19, label %18

18:                                               ; preds = %15
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.2) #4
  br label %124

19:                                               ; preds = %15
  %20 = call i32 @signedInt16be(ptr noundef nonnull %5, i32 noundef 0)
  %21 = call i32 @signedInt16be(ptr noundef nonnull %5, i32 noundef 2)
  %22 = call i32 @signedInt16be(ptr noundef nonnull %5, i32 noundef 4)
  %23 = call i32 @unsignedInt16be(ptr noundef nonnull %5, i32 noundef 6)
  %24 = call i32 @unsignedInt16be(ptr noundef nonnull %5, i32 noundef 8)
  %25 = call i32 @unsignedInt16be(ptr noundef nonnull %5, i32 noundef 10)
  %26 = call i32 @signedInt16be(ptr noundef nonnull %5, i32 noundef 12)
  %27 = call i32 @signedInt16be(ptr noundef nonnull %5, i32 noundef 14)
  %28 = call i32 @signedInt16be(ptr noundef nonnull %5, i32 noundef 18)
  %29 = call i32 @signedInt16be(ptr noundef nonnull %5, i32 noundef 20)
  store i8 -12, ptr %5, align 16, !tbaa !5
  %30 = getelementptr inbounds i8, ptr %5, i64 1
  store i8 46, ptr %30, align 1, !tbaa !5
  %31 = load i32, ptr @mAddress, align 4, !tbaa !8
  %32 = call i32 @dh_i2c_write(i32 noundef %31, ptr noundef nonnull %5, i32 noundef 2, i32 noundef 1) #4
  %.not79 = icmp eq i32 %32, 0
  br i1 %.not79, label %34, label %33

33:                                               ; preds = %19
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.3) #4
  br label %124

34:                                               ; preds = %19
  call void @delay_ms(i32 noundef 50) #4
  store i8 -10, ptr %5, align 16, !tbaa !5
  %35 = load i32, ptr @mAddress, align 4, !tbaa !8
  %36 = call i32 @dh_i2c_write(i32 noundef %35, ptr noundef nonnull %5, i32 noundef 1, i32 noundef 0) #4
  %.not80 = icmp eq i32 %36, 0
  br i1 %.not80, label %38, label %37

37:                                               ; preds = %34
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.4) #4
  br label %124

38:                                               ; preds = %34
  %39 = load i32, ptr @mAddress, align 4, !tbaa !8
  %40 = call i32 @dh_i2c_read(i32 noundef %39, ptr noundef nonnull %5, i32 noundef 2) #4
  %.not81 = icmp eq i32 %40, 0
  br i1 %.not81, label %42, label %41

41:                                               ; preds = %38
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.5) #4
  br label %124

42:                                               ; preds = %38
  %43 = call i32 @unsignedInt16be(ptr noundef nonnull %5, i32 noundef 0)
  store i8 -12, ptr %5, align 16, !tbaa !5
  store i8 52, ptr %30, align 1, !tbaa !5
  %44 = load i32, ptr @mAddress, align 4, !tbaa !8
  %45 = call i32 @dh_i2c_write(i32 noundef %44, ptr noundef nonnull %5, i32 noundef 2, i32 noundef 1) #4
  %.not82 = icmp eq i32 %45, 0
  br i1 %.not82, label %47, label %46

46:                                               ; preds = %42
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.6) #4
  br label %124

47:                                               ; preds = %42
  call void @delay_ms(i32 noundef 50) #4
  store i8 -10, ptr %5, align 16, !tbaa !5
  %48 = load i32, ptr @mAddress, align 4, !tbaa !8
  %49 = call i32 @dh_i2c_write(i32 noundef %48, ptr noundef nonnull %5, i32 noundef 1, i32 noundef 0) #4
  %.not83 = icmp eq i32 %49, 0
  br i1 %.not83, label %51, label %50

50:                                               ; preds = %47
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.7) #4
  br label %124

51:                                               ; preds = %47
  %52 = load i32, ptr @mAddress, align 4, !tbaa !8
  %53 = call i32 @dh_i2c_read(i32 noundef %52, ptr noundef nonnull %5, i32 noundef 2) #4
  %.not84 = icmp eq i32 %53, 0
  br i1 %.not84, label %55, label %54

54:                                               ; preds = %51
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @bmp180_read.str.8) #4
  br label %124

55:                                               ; preds = %51
  %56 = call i32 @unsignedInt16be(ptr noundef nonnull %5, i32 noundef 0)
  %57 = sub i32 %43, %25
  %58 = mul i32 %57, %24
  %59 = lshr i32 %58, 15
  %60 = zext nneg i32 %59 to i64
  %61 = shl i32 %28, 11
  %62 = sext i32 %61 to i64
  %63 = sext i32 %29 to i64
  %64 = add nsw i64 %60, %63
  %65 = sdiv i64 %62, %64
  %66 = add nsw i64 %65, %60
  %.not85 = icmp eq ptr %3, null
  br i1 %.not85, label %72, label %67

67:                                               ; preds = %55
  %68 = add nsw i64 %66, 8
  %69 = ashr i64 %68, 4
  %70 = sitofp i64 %69 to float
  %71 = fdiv float %70, 1.000000e+01
  store float %71, ptr %3, align 4, !tbaa !10
  br label %72

72:                                               ; preds = %67, %55
  %73 = add nsw i64 %66, -4000
  %74 = sext i32 %27 to i64
  %75 = mul nsw i64 %73, %73
  %76 = lshr i64 %75, 12
  %77 = mul nsw i64 %76, %74
  %78 = ashr i64 %77, 11
  %79 = sext i32 %21 to i64
  %80 = mul nsw i64 %73, %79
  %81 = ashr i64 %80, 11
  %82 = shl nsw i32 %20, 2
  %83 = or disjoint i32 %82, 2
  %84 = sext i32 %83 to i64
  %85 = add nsw i64 %81, %84
  %86 = add nsw i64 %85, %78
  %87 = ashr i64 %86, 2
  %88 = sext i32 %22 to i64
  %89 = mul nsw i64 %73, %88
  %90 = ashr i64 %89, 13
  %91 = sext i32 %26 to i64
  %92 = mul nsw i64 %76, %91
  %93 = ashr i64 %92, 16
  %94 = add nsw i64 %90, 2
  %95 = add nsw i64 %94, %93
  %96 = ashr i64 %95, 2
  %97 = zext i32 %23 to i64
  %98 = add nsw i64 %96, 32768
  %99 = mul nsw i64 %98, %97
  %100 = ashr i64 %99, 15
  %101 = zext i32 %56 to i64
  %102 = sub nsw i64 %101, %87
  %103 = mul nsw i64 %102, 50000
  %104 = icmp ult i64 %103, 2147483648
  br i1 %104, label %105, label %108

105:                                              ; preds = %72
  %106 = mul i64 %102, 100000
  %107 = udiv i64 %106, %100
  br label %111

108:                                              ; preds = %72
  %109 = udiv i64 %103, %100
  %110 = shl i64 %109, 1
  br label %111

111:                                              ; preds = %108, %105
  %112 = phi i64 [ %107, %105 ], [ %110, %108 ]
  %113 = ashr i64 %112, 8
  %114 = mul i64 %113, 3038
  %115 = mul i64 %114, %113
  %116 = lshr i64 %115, 16
  %117 = mul nsw i64 %112, -7357
  %118 = lshr i64 %117, 16
  %119 = add nuw nsw i64 %118, 3791
  %120 = add nuw nsw i64 %119, %116
  %121 = lshr i64 %120, 4
  %122 = add i64 %121, %112
  %123 = trunc i64 %122 to i32
  store i32 %123, ptr %2, align 4, !tbaa !8
  br label %124

124:                                              ; preds = %33, %37, %41, %111, %54, %50, %46, %18, %14
  %.2 = phi i32 [ %13, %14 ], [ %17, %18 ], [ %32, %33 ], [ %36, %37 ], [ %40, %41 ], [ %45, %46 ], [ %49, %50 ], [ %53, %54 ], [ 0, %111 ]
  call void @llvm.lifetime.end.p0(i64 22, ptr nonnull %5) #4
  br label %125

125:                                              ; preds = %124, %10
  %.3 = phi i32 [ %9, %10 ], [ %.2, %124 ]
  ret i32 %.3
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16be(ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @unsignedInt16be(ptr noundef, i32 noundef) local_unnamed_addr #3

declare void @delay_ms(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"float", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass