; LLVM IR from kmilo17pet/qlibs :: qffmath (qFFMath_Log2)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.anon = type { [2 x i32] }

@s_values = external hidden constant %union.anon, align 4

; Function Attrs: nounwind uwtable
declare dso_local i32 @qFFMath_FPClassify(float noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: nounwind uwtable
define dso_local float @qFFMath_Log2(float noundef %0) #0 {
  %2 = alloca float, align 4
  %3 = alloca float, align 4
  %4 = alloca float, align 4
  %5 = alloca float, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store float %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %9 = load float, ptr %2, align 4, !tbaa !5
  %10 = fcmp olt float %9, 0.000000e+00
  br i1 %10, label %11, label %13

11:                                               ; preds = %1
  %12 = load float, ptr getelementptr (i8, ptr @s_values, i64 4), align 4, !tbaa !5
  store float %12, ptr %3, align 4, !tbaa !5
  br label %85

13:                                               ; preds = %1
  %14 = load float, ptr %2, align 4, !tbaa !5
  %15 = call i32 @qFFMath_FPClassify(float noundef %14)
  %16 = icmp eq i32 0, %15
  br i1 %16, label %17, label %20

17:                                               ; preds = %13
  %18 = load float, ptr @s_values, align 4, !tbaa !5
  %19 = fneg float %18
  store float %19, ptr %3, align 4, !tbaa !5
  br label %84

20:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 %2, i64 4, i1 false)
  %21 = load i32, ptr %8, align 4, !tbaa !9
  %22 = and i32 %21, 8388607
  store i32 %22, ptr %7, align 4, !tbaa !9
  %23 = load i32, ptr %8, align 4, !tbaa !9
  %24 = and i32 %23, 2139095040
  store i32 %24, ptr %6, align 4, !tbaa !9
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = or i32 %25, 1065353216
  store i32 %26, ptr %7, align 4, !tbaa !9
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %2, ptr align 4 %7, i64 4, i1 false)
  %27 = load i32, ptr %6, align 4, !tbaa !9
  %28 = ashr i32 %27, 23
  store i32 %28, ptr %6, align 4, !tbaa !9
  %29 = load i32, ptr %6, align 4, !tbaa !9
  %30 = sub nsw i32 %29, 127
  store i32 %30, ptr %6, align 4, !tbaa !9
  %31 = load float, ptr %2, align 4, !tbaa !5
  %32 = fcmp ogt float %31, 0x3FF6A09E60000000
  br i1 %32, label %33, label %38

33:                                               ; preds = %20
  %34 = load float, ptr %2, align 4, !tbaa !5
  %35 = fmul float %34, 5.000000e-01
  store float %35, ptr %2, align 4, !tbaa !5
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = add nsw i32 %36, 1
  store i32 %37, ptr %6, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %33, %20
  %39 = load float, ptr %2, align 4, !tbaa !5
  %40 = fsub float %39, 1.000000e+00
  store float %40, ptr %2, align 4, !tbaa !5
  store float 0x3FB2043760000000, ptr %5, align 4, !tbaa !5
  %41 = load float, ptr %5, align 4, !tbaa !5
  %42 = load float, ptr %2, align 4, !tbaa !5
  %43 = call float @llvm.fmuladd.f32(float %41, float %42, float 0xBFBD7A3700000000)
  store float %43, ptr %5, align 4, !tbaa !5
  %44 = load float, ptr %5, align 4, !tbaa !5
  %45 = load float, ptr %2, align 4, !tbaa !5
  %46 = call float @llvm.fmuladd.f32(float %44, float %45, float 0x3FBDE4A340000000)
  store float %46, ptr %5, align 4, !tbaa !5
  %47 = load float, ptr %5, align 4, !tbaa !5
  %48 = load float, ptr %2, align 4, !tbaa !5
  %49 = call float @llvm.fmuladd.f32(float %47, float %48, float 0xBFBFCBA9E0000000)
  store float %49, ptr %5, align 4, !tbaa !5
  %50 = load float, ptr %5, align 4, !tbaa !5
  %51 = load float, ptr %2, align 4, !tbaa !5
  %52 = call float @llvm.fmuladd.f32(float %50, float %51, float 0x3FC23D37E0000000)
  store float %52, ptr %5, align 4, !tbaa !5
  %53 = load float, ptr %5, align 4, !tbaa !5
  %54 = load float, ptr %2, align 4, !tbaa !5
  %55 = call float @llvm.fmuladd.f32(float %53, float %54, float 0xBFC555CA00000000)
  store float %55, ptr %5, align 4, !tbaa !5
  %56 = load float, ptr %5, align 4, !tbaa !5
  %57 = load float, ptr %2, align 4, !tbaa !5
  %58 = call float @llvm.fmuladd.f32(float %56, float %57, float 0x3FC999D580000000)
  store float %58, ptr %5, align 4, !tbaa !5
  %59 = load float, ptr %5, align 4, !tbaa !5
  %60 = load float, ptr %2, align 4, !tbaa !5
  %61 = call float @llvm.fmuladd.f32(float %59, float %60, float 0xBFCFFFFF80000000)
  store float %61, ptr %5, align 4, !tbaa !5
  %62 = load float, ptr %5, align 4, !tbaa !5
  %63 = load float, ptr %2, align 4, !tbaa !5
  %64 = call float @llvm.fmuladd.f32(float %62, float %63, float 0x3FD5555540000000)
  store float %64, ptr %5, align 4, !tbaa !5
  %65 = load float, ptr %2, align 4, !tbaa !5
  %66 = load float, ptr %2, align 4, !tbaa !5
  %67 = fmul float %65, %66
  store float %67, ptr %4, align 4, !tbaa !5
  %68 = load float, ptr %2, align 4, !tbaa !5
  %69 = load float, ptr %4, align 4, !tbaa !5
  %70 = fmul float %68, %69
  %71 = load float, ptr %5, align 4, !tbaa !5
  %72 = load float, ptr %4, align 4, !tbaa !5
  %73 = fmul float 5.000000e-01, %72
  %74 = fneg float %73
  %75 = call float @llvm.fmuladd.f32(float %70, float %71, float %74)
  %76 = load float, ptr %2, align 4, !tbaa !5
  %77 = fadd float %75, %76
  store float %77, ptr %4, align 4, !tbaa !5
  %78 = load float, ptr %4, align 4, !tbaa !5
  %79 = fmul float %78, 0x3FF7154760000000
  store float %79, ptr %4, align 4, !tbaa !5
  %80 = load i32, ptr %6, align 4, !tbaa !9
  %81 = sitofp i32 %80 to float
  %82 = load float, ptr %4, align 4, !tbaa !5
  %83 = fadd float %81, %82
  store float %83, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %84

84:                                               ; preds = %38, %17
  br label %85

85:                                               ; preds = %84, %11
  %86 = load float, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret float %86
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.anon = type { [2 x i32] }

@s_values = external hidden local_unnamed_addr constant %union.anon, align 4

; Function Attrs: nounwind uwtable
declare dso_local i32 @qFFMath_FPClassify(float noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nounwind uwtable
define dso_local float @qFFMath_Log2(float noundef %0) local_unnamed_addr #0 {
  %2 = fcmp olt float %0, 0.000000e+00
  br i1 %2, label %3, label %5

3:                                                ; preds = %1
  %4 = load float, ptr getelementptr inbounds (i8, ptr @s_values, i64 4), align 4, !tbaa !5
  br label %37

5:                                                ; preds = %1
  %6 = tail call i32 @qFFMath_FPClassify(float noundef %0)
  %7 = icmp eq i32 %6, 0
  br i1 %7, label %8, label %11

8:                                                ; preds = %5
  %9 = load float, ptr @s_values, align 4, !tbaa !5
  %10 = fneg float %9
  br label %37

11:                                               ; preds = %5
  %12 = bitcast float %0 to i32
  %13 = and i32 %12, 8388607
  %14 = or disjoint i32 %13, 1065353216
  %15 = bitcast i32 %14 to float
  %16 = lshr i32 %12, 23
  %17 = and i32 %16, 255
  %18 = fcmp ogt float %15, 0x3FF6A09E60000000
  %19 = fmul float %15, 5.000000e-01
  %.040.v = select i1 %18, i32 -126, i32 -127
  %.040 = add nsw i32 %.040.v, %17
  %.0 = select i1 %18, float %19, float %15
  %20 = fadd float %.0, -1.000000e+00
  %21 = tail call float @llvm.fmuladd.f32(float %20, float 0x3FB2043760000000, float 0xBFBD7A3700000000)
  %22 = tail call float @llvm.fmuladd.f32(float %21, float %20, float 0x3FBDE4A340000000)
  %23 = tail call float @llvm.fmuladd.f32(float %22, float %20, float 0xBFBFCBA9E0000000)
  %24 = tail call float @llvm.fmuladd.f32(float %23, float %20, float 0x3FC23D37E0000000)
  %25 = tail call float @llvm.fmuladd.f32(float %24, float %20, float 0xBFC555CA00000000)
  %26 = tail call float @llvm.fmuladd.f32(float %25, float %20, float 0x3FC999D580000000)
  %27 = tail call float @llvm.fmuladd.f32(float %26, float %20, float 0xBFCFFFFF80000000)
  %28 = tail call float @llvm.fmuladd.f32(float %27, float %20, float 0x3FD5555540000000)
  %29 = fmul float %20, %20
  %30 = fmul float %20, %29
  %31 = fmul float %29, -5.000000e-01
  %32 = tail call float @llvm.fmuladd.f32(float %30, float %28, float %31)
  %33 = fadd float %20, %32
  %34 = fmul float %33, 0x3FF7154760000000
  %35 = sitofp i32 %.040 to float
  %36 = fadd float %34, %35
  br label %37

37:                                               ; preds = %8, %11, %3
  %.039 = phi float [ %4, %3 ], [ %10, %8 ], [ %36, %11 ]
  ret float %.039
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass