; LLVM IR from evanxg852000/rockstartdev :: chip8-cpp/src/chip8.ll (ZN5Chip84initEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.Chip8 = type <{ [16 x i16], i16, [4096 x i8], [16 x i8], i16, i16, i16, i8, i8, [2048 x i8], [16 x i8], i8, i8 }>

@chip8_fontset = external dso_local global [80 x i8], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5Chip84initEv(ptr noundef nonnull align 2 dereferenceable(6219) %0) #0 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  %8 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 4
  store i16 512, ptr %8, align 2, !tbaa !9
  %9 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 5
  store i16 0, ptr %9, align 2, !tbaa !13
  %10 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 6
  store i16 0, ptr %10, align 2, !tbaa !14
  %11 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 1
  store i16 0, ptr %11, align 2, !tbaa !15
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !16
  br label %12

12:                                               ; preds = %21, %1
  %13 = load i32, ptr %3, align 4, !tbaa !16
  %14 = icmp slt i32 %13, 2048
  br i1 %14, label %16, label %15

15:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %24

16:                                               ; preds = %12
  %17 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 9
  %18 = load i32, ptr %3, align 4, !tbaa !16
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [2048 x i8], ptr %17, i64 0, i64 %19
  store i8 0, ptr %20, align 1, !tbaa !18
  br label %21

21:                                               ; preds = %16
  %22 = load i32, ptr %3, align 4, !tbaa !16
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %3, align 4, !tbaa !16
  br label %12, !llvm.loop !19

24:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !16
  br label %25

25:                                               ; preds = %42, %24
  %26 = load i32, ptr %4, align 4, !tbaa !16
  %27 = icmp slt i32 %26, 16
  br i1 %27, label %29, label %28

28:                                               ; preds = %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %45

29:                                               ; preds = %25
  %30 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 0
  %31 = load i32, ptr %4, align 4, !tbaa !16
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [16 x i16], ptr %30, i64 0, i64 %32
  store i16 0, ptr %33, align 2, !tbaa !21
  %34 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 10
  %35 = load i32, ptr %4, align 4, !tbaa !16
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [16 x i8], ptr %34, i64 0, i64 %36
  store i8 0, ptr %37, align 1, !tbaa !18
  %38 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 3
  %39 = load i32, ptr %4, align 4, !tbaa !16
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [16 x i8], ptr %38, i64 0, i64 %40
  store i8 0, ptr %41, align 1, !tbaa !18
  br label %42

42:                                               ; preds = %29
  %43 = load i32, ptr %4, align 4, !tbaa !16
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %4, align 4, !tbaa !16
  br label %25, !llvm.loop !22

45:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !16
  br label %46

46:                                               ; preds = %55, %45
  %47 = load i32, ptr %5, align 4, !tbaa !16
  %48 = icmp slt i32 %47, 4096
  br i1 %48, label %50, label %49

49:                                               ; preds = %46
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %58

50:                                               ; preds = %46
  %51 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 2
  %52 = load i32, ptr %5, align 4, !tbaa !16
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [4096 x i8], ptr %51, i64 0, i64 %53
  store i8 0, ptr %54, align 1, !tbaa !18
  br label %55

55:                                               ; preds = %50
  %56 = load i32, ptr %5, align 4, !tbaa !16
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %5, align 4, !tbaa !16
  br label %46, !llvm.loop !23

58:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !16
  br label %59

59:                                               ; preds = %72, %58
  %60 = load i32, ptr %6, align 4, !tbaa !16
  %61 = icmp slt i32 %60, 80
  br i1 %61, label %63, label %62

62:                                               ; preds = %59
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %75

63:                                               ; preds = %59
  %64 = load i32, ptr %6, align 4, !tbaa !16
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds [80 x i8], ptr @chip8_fontset, i64 0, i64 %65
  %67 = load i8, ptr %66, align 1, !tbaa !18
  %68 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 2
  %69 = load i32, ptr %6, align 4, !tbaa !16
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds [4096 x i8], ptr %68, i64 0, i64 %70
  store i8 %67, ptr %71, align 1, !tbaa !18
  br label %72

72:                                               ; preds = %63
  %73 = load i32, ptr %6, align 4, !tbaa !16
  %74 = add nsw i32 %73, 1
  store i32 %74, ptr %6, align 4, !tbaa !16
  br label %59, !llvm.loop !24

75:                                               ; preds = %62
  %76 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 7
  store i8 0, ptr %76, align 2, !tbaa !25
  %77 = getelementptr inbounds %class.Chip8, ptr %7, i32 0, i32 8
  store i8 0, ptr %77, align 1, !tbaa !26
  %78 = call i64 @time(ptr noundef null) #3
  %79 = trunc i64 %78 to i32
  call void @srand(i32 noundef %79) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare void @srand(i32 noundef) #2

; Function Attrs: nounwind
declare i64 @time(ptr noundef) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4146}
!10 = !{!"_ZTS5Chip8", !7, i64 0, !11, i64 32, !7, i64 34, !7, i64 4130, !11, i64 4146, !11, i64 4148, !11, i64 4150, !7, i64 4152, !7, i64 4153, !7, i64 4154, !7, i64 6202, !12, i64 6218}
!11 = !{!"short", !7, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!10, !11, i64 4148}
!14 = !{!10, !11, i64 4150}
!15 = !{!10, !11, i64 32}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!11, !11, i64 0}
!22 = distinct !{!22, !20}
!23 = distinct !{!23, !20}
!24 = distinct !{!24, !20}
!25 = !{!10, !7, i64 4152}
!26 = !{!10, !7, i64 4153}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@chip8_fontset = external dso_local local_unnamed_addr global [80 x i8], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN5Chip84initEv(ptr nocapture noundef nonnull writeonly align 2 dereferenceable(6219) %0) local_unnamed_addr #0 align 2 {
iter.check:
  %1 = getelementptr inbounds i8, ptr %0, i64 4146
  store i16 512, ptr %1, align 2, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 4148
  store i16 0, ptr %2, align 2, !tbaa !11
  %3 = getelementptr inbounds i8, ptr %0, i64 4150
  store i16 0, ptr %3, align 2, !tbaa !12
  %4 = getelementptr inbounds i8, ptr %0, i64 4154
  %5 = getelementptr inbounds i8, ptr %0, i64 34
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 2 dereferenceable(4146) %0, i8 0, i64 4146, i1 false)
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 2 dereferenceable(2064) %4, i8 0, i64 2064, i1 false)
  %6 = ptrtoint ptr %0 to i64
  %7 = add i64 %6, 34
  %8 = sub i64 %7, ptrtoint (ptr @chip8_fontset to i64)
  %diff.check = icmp ult i64 %8, 32
  br i1 %diff.check, label %vec.epilog.scalar.ph, label %vector.body

vector.body:                                      ; preds = %iter.check
  %wide.load = load <16 x i8>, ptr @chip8_fontset, align 16, !tbaa !13
  %wide.load28 = load <16 x i8>, ptr getelementptr inbounds (i8, ptr @chip8_fontset, i64 16), align 16, !tbaa !13
  %9 = getelementptr inbounds i8, ptr %0, i64 50
  store <16 x i8> %wide.load, ptr %5, align 2, !tbaa !13
  store <16 x i8> %wide.load28, ptr %9, align 2, !tbaa !13
  %wide.load.1 = load <16 x i8>, ptr getelementptr inbounds (i8, ptr @chip8_fontset, i64 32), align 16, !tbaa !13
  %wide.load28.1 = load <16 x i8>, ptr getelementptr inbounds (i8, ptr @chip8_fontset, i64 48), align 16, !tbaa !13
  %10 = getelementptr inbounds i8, ptr %0, i64 66
  %11 = getelementptr inbounds i8, ptr %0, i64 82
  store <16 x i8> %wide.load.1, ptr %10, align 2, !tbaa !13
  store <16 x i8> %wide.load28.1, ptr %11, align 2, !tbaa !13
  %wide.load30 = load <8 x i8>, ptr getelementptr inbounds (i8, ptr @chip8_fontset, i64 64), align 16, !tbaa !13
  %12 = getelementptr inbounds i8, ptr %0, i64 98
  store <8 x i8> %wide.load30, ptr %12, align 2, !tbaa !13
  %wide.load30.1 = load <8 x i8>, ptr getelementptr inbounds (i8, ptr @chip8_fontset, i64 72), align 8, !tbaa !13
  %13 = getelementptr inbounds i8, ptr %0, i64 106
  store <8 x i8> %wide.load30.1, ptr %13, align 2, !tbaa !13
  br label %vec.epilog.middle.block

vec.epilog.middle.block:                          ; preds = %vec.epilog.scalar.ph, %vector.body
  %14 = getelementptr inbounds i8, ptr %0, i64 4152
  store i8 0, ptr %14, align 2, !tbaa !14
  %15 = getelementptr inbounds i8, ptr %0, i64 4153
  store i8 0, ptr %15, align 1, !tbaa !15
  %16 = tail call i64 @time(ptr noundef null) #3
  %17 = trunc i64 %16 to i32
  tail call void @srand(i32 noundef %17) #3
  ret void

vec.epilog.scalar.ph:                             ; preds = %iter.check, %vec.epilog.scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next.4, %vec.epilog.scalar.ph ], [ 0, %iter.check ]
  %18 = getelementptr inbounds [80 x i8], ptr @chip8_fontset, i64 0, i64 %indvars.iv
  %19 = load i8, ptr %18, align 1, !tbaa !13
  %20 = getelementptr inbounds [4096 x i8], ptr %5, i64 0, i64 %indvars.iv
  store i8 %19, ptr %20, align 1, !tbaa !13
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %21 = getelementptr inbounds [80 x i8], ptr @chip8_fontset, i64 0, i64 %indvars.iv.next
  %22 = load i8, ptr %21, align 1, !tbaa !13
  %23 = getelementptr inbounds [4096 x i8], ptr %5, i64 0, i64 %indvars.iv.next
  store i8 %22, ptr %23, align 1, !tbaa !13
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %24 = getelementptr inbounds [80 x i8], ptr @chip8_fontset, i64 0, i64 %indvars.iv.next.1
  %25 = load i8, ptr %24, align 1, !tbaa !13
  %26 = getelementptr inbounds [4096 x i8], ptr %5, i64 0, i64 %indvars.iv.next.1
  store i8 %25, ptr %26, align 1, !tbaa !13
  %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
  %27 = getelementptr inbounds [80 x i8], ptr @chip8_fontset, i64 0, i64 %indvars.iv.next.2
  %28 = load i8, ptr %27, align 1, !tbaa !13
  %29 = getelementptr inbounds [4096 x i8], ptr %5, i64 0, i64 %indvars.iv.next.2
  store i8 %28, ptr %29, align 1, !tbaa !13
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %30 = getelementptr inbounds [80 x i8], ptr @chip8_fontset, i64 0, i64 %indvars.iv.next.3
  %31 = load i8, ptr %30, align 1, !tbaa !13
  %32 = getelementptr inbounds [4096 x i8], ptr %5, i64 0, i64 %indvars.iv.next.3
  store i8 %31, ptr %32, align 1, !tbaa !13
  %indvars.iv.next.4 = add nuw nsw i64 %indvars.iv, 5
  %exitcond.not.4 = icmp eq i64 %indvars.iv.next.4, 80
  br i1 %exitcond.not.4, label %vec.epilog.middle.block, label %vec.epilog.scalar.ph, !llvm.loop !16
}

; Function Attrs: nounwind
declare void @srand(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i64 @time(ptr noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 4146}
!6 = !{!"_ZTS5Chip8", !7, i64 0, !9, i64 32, !7, i64 34, !7, i64 4130, !9, i64 4146, !9, i64 4148, !9, i64 4150, !7, i64 4152, !7, i64 4153, !7, i64 4154, !7, i64 6202, !10, i64 6218}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"short", !7, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!6, !9, i64 4148}
!12 = !{!6, !9, i64 4150}
!13 = !{!7, !7, i64 0}
!14 = !{!6, !7, i64 4152}
!15 = !{!6, !7, i64 4153}
!16 = distinct !{!16, !17, !18}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!"llvm.loop.isvectorized", i32 1}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopIdiomRecognizePass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,MemCpyOptPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass