; LLVM IR from Ryuk17/SpeechAlgorithms :: WebRTC_AEC/src (aec_core)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.AecCore = type { i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, [128 x float], [128 x float], [128 x float], [65 x float], [65 x float], [65 x float], [65 x float], ptr, [2 x [2080 x float]], [2 x [2080 x float]], [65 x [2 x float]], [65 x [2 x float]], [2080 x [2 x float]], [65 x float], [65 x float], [65 x float], [65 x float], float, float, float, i32, i32, float, float, i32, [64 x float], i32, i16, i16, i16, i32, ptr, ptr, i32, i32, i32, i32, float, float, i32, %struct.PowerLevel, %struct.PowerLevel, %struct.PowerLevel, %struct.PowerLevel, i32, i32, %struct.Stats, %struct.Stats, %struct.Stats, %struct.Stats, i32, i32, float, [75 x i32], i32, ptr, ptr, i32, i32 }
%struct.PowerLevel = type { float, i32, float, float, i32, float, float }
%struct.Stats = type { float, float, float, float, float, float, float, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local i32 @WebRtcAec_CreateAec(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  %6 = call noalias ptr @malloc(i64 noundef 55592) #5
  store ptr %6, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %4, align 8, !tbaa !5
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %7, ptr %8, align 8, !tbaa !5
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = icmp eq ptr %9, null
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

12:                                               ; preds = %1
  %13 = call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2)
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.AecCore, ptr %14, i32 0, i32 6
  store ptr %13, ptr %15, align 8, !tbaa !9
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.AecCore, ptr %16, i32 0, i32 6
  %18 = load ptr, ptr %17, align 8, !tbaa !9
  %19 = icmp ne ptr %18, null
  br i1 %19, label %23, label %20

20:                                               ; preds = %12
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = call i32 @WebRtcAec_FreeAec(ptr noundef %21)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

23:                                               ; preds = %12
  %24 = call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2)
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.AecCore, ptr %25, i32 0, i32 7
  store ptr %24, ptr %26, align 8, !tbaa !16
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.AecCore, ptr %27, i32 0, i32 7
  %29 = load ptr, ptr %28, align 8, !tbaa !16
  %30 = icmp ne ptr %29, null
  br i1 %30, label %34, label %31

31:                                               ; preds = %23
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = call i32 @WebRtcAec_FreeAec(ptr noundef %32)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

34:                                               ; preds = %23
  %35 = call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2)
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.AecCore, ptr %36, i32 0, i32 8
  store ptr %35, ptr %37, align 8, !tbaa !17
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.AecCore, ptr %38, i32 0, i32 8
  %40 = load ptr, ptr %39, align 8, !tbaa !17
  %41 = icmp ne ptr %40, null
  br i1 %41, label %45, label %42

42:                                               ; preds = %34
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = call i32 @WebRtcAec_FreeAec(ptr noundef %43)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

45:                                               ; preds = %34
  %46 = call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2)
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.AecCore, ptr %47, i32 0, i32 9
  store ptr %46, ptr %48, align 8, !tbaa !18
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.AecCore, ptr %49, i32 0, i32 9
  %51 = load ptr, ptr %50, align 8, !tbaa !18
  %52 = icmp ne ptr %51, null
  br i1 %52, label %56, label %53

53:                                               ; preds = %45
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = call i32 @WebRtcAec_FreeAec(ptr noundef %54)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

56:                                               ; preds = %45
  %57 = call ptr @WebRtc_CreateBuffer(i64 noundef 250, i64 noundef 520)
  %58 = load ptr, ptr %4, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.AecCore, ptr %58, i32 0, i32 41
  store ptr %57, ptr %59, align 8, !tbaa !19
  %60 = load ptr, ptr %4, align 8, !tbaa !5
  %61 = getelementptr inbounds %struct.AecCore, ptr %60, i32 0, i32 41
  %62 = load ptr, ptr %61, align 8, !tbaa !19
  %63 = icmp ne ptr %62, null
  br i1 %63, label %67, label %64

64:                                               ; preds = %56
  %65 = load ptr, ptr %4, align 8, !tbaa !5
  %66 = call i32 @WebRtcAec_FreeAec(ptr noundef %65)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

67:                                               ; preds = %56
  %68 = call ptr @WebRtc_CreateBuffer(i64 noundef 250, i64 noundef 520)
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.AecCore, ptr %69, i32 0, i32 42
  store ptr %68, ptr %70, align 8, !tbaa !20
  %71 = load ptr, ptr %4, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.AecCore, ptr %71, i32 0, i32 42
  %73 = load ptr, ptr %72, align 8, !tbaa !20
  %74 = icmp ne ptr %73, null
  br i1 %74, label %78, label %75

75:                                               ; preds = %67
  %76 = load ptr, ptr %4, align 8, !tbaa !5
  %77 = call i32 @WebRtcAec_FreeAec(ptr noundef %76)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

78:                                               ; preds = %67
  %79 = call ptr @WebRtc_CreateDelayEstimatorFarend(i32 noundef 65, i32 noundef 75)
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.AecCore, ptr %80, i32 0, i32 65
  store ptr %79, ptr %81, align 8, !tbaa !21
  %82 = load ptr, ptr %4, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.AecCore, ptr %82, i32 0, i32 65
  %84 = load ptr, ptr %83, align 8, !tbaa !21
  %85 = icmp eq ptr %84, null
  br i1 %85, label %86, label %89

86:                                               ; preds = %78
  %87 = load ptr, ptr %4, align 8, !tbaa !5
  %88 = call i32 @WebRtcAec_FreeAec(ptr noundef %87)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

89:                                               ; preds = %78
  %90 = load ptr, ptr %4, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.AecCore, ptr %90, i32 0, i32 65
  %92 = load ptr, ptr %91, align 8, !tbaa !21
  %93 = call ptr @WebRtc_CreateDelayEstimator(ptr noundef %92, i32 noundef 15)
  %94 = load ptr, ptr %4, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.AecCore, ptr %94, i32 0, i32 66
  store ptr %93, ptr %95, align 8, !tbaa !22
  %96 = load ptr, ptr %4, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.AecCore, ptr %96, i32 0, i32 66
  %98 = load ptr, ptr %97, align 8, !tbaa !22
  %99 = icmp eq ptr %98, null
  br i1 %99, label %100, label %103

100:                                              ; preds = %89
  %101 = load ptr, ptr %4, align 8, !tbaa !5
  %102 = call i32 @WebRtcAec_FreeAec(ptr noundef %101)
  store ptr null, ptr %4, align 8, !tbaa !5
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

103:                                              ; preds = %89
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %104

104:                                              ; preds = %103, %100, %86, %75, %64, %53, %42, %31, %20, %11
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  %105 = load i32, ptr %2, align 4
  ret i32 %105
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind allocsize(0)
declare noalias ptr @malloc(i64 noundef) #2

declare ptr @WebRtc_CreateBuffer(i64 noundef, i64 noundef) #3

; Function Attrs: nounwind uwtable
declare dso_local i32 @WebRtcAec_FreeAec(ptr noundef) #0

declare ptr @WebRtc_CreateDelayEstimatorFarend(i32 noundef, i32 noundef) #3

declare ptr @WebRtc_CreateDelayEstimator(ptr noundef, i32 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { nounwind allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"AecCore", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !7, i64 56, !7, i64 568, !7, i64 1080, !7, i64 1592, !7, i64 1852, !7, i64 2112, !7, i64 2372, !6, i64 2632, !7, i64 2640, !7, i64 19280, !7, i64 35920, !7, i64 36440, !7, i64 36960, !7, i64 53600, !7, i64 53860, !7, i64 54120, !7, i64 54380, !12, i64 54640, !12, i64 54644, !12, i64 54648, !11, i64 54652, !11, i64 54656, !12, i64 54660, !12, i64 54664, !11, i64 54668, !7, i64 54672, !11, i64 54928, !13, i64 54932, !13, i64 54934, !13, i64 54936, !11, i64 54940, !6, i64 54944, !6, i64 54952, !11, i64 54960, !11, i64 54964, !11, i64 54968, !11, i64 54972, !12, i64 54976, !12, i64 54980, !11, i64 54984, !14, i64 54988, !14, i64 55016, !14, i64 55044, !14, i64 55072, !11, i64 55100, !11, i64 55104, !15, i64 55108, !15, i64 55144, !15, i64 55180, !15, i64 55216, !11, i64 55252, !11, i64 55256, !12, i64 55260, !7, i64 55264, !11, i64 55564, !6, i64 55568, !6, i64 55576, !11, i64 55584, !11, i64 55588}
!11 = !{!"int", !7, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!"PowerLevel", !12, i64 0, !11, i64 4, !12, i64 8, !12, i64 12, !11, i64 16, !12, i64 20, !12, i64 24}
!15 = !{!"Stats", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !11, i64 28, !11, i64 32}
!16 = !{!10, !6, i64 32}
!17 = !{!10, !6, i64 40}
!18 = !{!10, !6, i64 48}
!19 = !{!10, !6, i64 54944}
!20 = !{!10, !6, i64 54952}
!21 = !{!10, !6, i64 55568}
!22 = !{!10, !6, i64 55576}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @WebRtcAec_CreateAec(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
  %2 = tail call noalias dereferenceable_or_null(55592) ptr @malloc(i64 noundef 55592) #3
  store ptr %2, ptr %0, align 8, !tbaa !5
  %3 = icmp eq ptr %2, null
  br i1 %3, label %31, label %4

4:                                                ; preds = %1
  %5 = tail call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2) #4
  %6 = getelementptr inbounds i8, ptr %2, i64 24
  store ptr %5, ptr %6, align 8, !tbaa !9
  %.not = icmp eq ptr %5, null
  br i1 %.not, label %.sink.split, label %7

7:                                                ; preds = %4
  %8 = tail call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2) #4
  %9 = getelementptr inbounds i8, ptr %2, i64 32
  store ptr %8, ptr %9, align 8, !tbaa !16
  %.not30 = icmp eq ptr %8, null
  br i1 %.not30, label %.sink.split, label %10

10:                                               ; preds = %7
  %11 = tail call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2) #4
  %12 = getelementptr inbounds i8, ptr %2, i64 40
  store ptr %11, ptr %12, align 8, !tbaa !17
  %.not31 = icmp eq ptr %11, null
  br i1 %.not31, label %.sink.split, label %13

13:                                               ; preds = %10
  %14 = tail call ptr @WebRtc_CreateBuffer(i64 noundef 144, i64 noundef 2) #4
  %15 = getelementptr inbounds i8, ptr %2, i64 48
  store ptr %14, ptr %15, align 8, !tbaa !18
  %.not32 = icmp eq ptr %14, null
  br i1 %.not32, label %.sink.split, label %16

16:                                               ; preds = %13
  %17 = tail call ptr @WebRtc_CreateBuffer(i64 noundef 250, i64 noundef 520) #4
  %18 = getelementptr inbounds i8, ptr %2, i64 54944
  store ptr %17, ptr %18, align 8, !tbaa !19
  %.not33 = icmp eq ptr %17, null
  br i1 %.not33, label %.sink.split, label %19

19:                                               ; preds = %16
  %20 = tail call ptr @WebRtc_CreateBuffer(i64 noundef 250, i64 noundef 520) #4
  %21 = getelementptr inbounds i8, ptr %2, i64 54952
  store ptr %20, ptr %21, align 8, !tbaa !20
  %.not34 = icmp eq ptr %20, null
  br i1 %.not34, label %.sink.split, label %22

22:                                               ; preds = %19
  %23 = tail call ptr @WebRtc_CreateDelayEstimatorFarend(i32 noundef 65, i32 noundef 75) #4
  %24 = getelementptr inbounds i8, ptr %2, i64 55568
  store ptr %23, ptr %24, align 8, !tbaa !21
  %25 = icmp eq ptr %23, null
  br i1 %25, label %.sink.split, label %26

26:                                               ; preds = %22
  %27 = tail call ptr @WebRtc_CreateDelayEstimator(ptr noundef nonnull %23, i32 noundef 15) #4
  %28 = getelementptr inbounds i8, ptr %2, i64 55576
  store ptr %27, ptr %28, align 8, !tbaa !22
  %29 = icmp eq ptr %27, null
  br i1 %29, label %.sink.split, label %31

.sink.split:                                      ; preds = %26, %22, %19, %16, %13, %10, %7, %4
  %30 = tail call i32 @WebRtcAec_FreeAec(ptr noundef nonnull %2)
  br label %31

31:                                               ; preds = %.sink.split, %26, %1
  %.0 = phi i32 [ -1, %1 ], [ 0, %26 ], [ -1, %.sink.split ]
  ret i32 %.0
}

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #1

declare ptr @WebRtc_CreateBuffer(i64 noundef, i64 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @WebRtcAec_FreeAec(ptr noundef) local_unnamed_addr #0

declare ptr @WebRtc_CreateDelayEstimatorFarend(i32 noundef, i32 noundef) local_unnamed_addr #2

declare ptr @WebRtc_CreateDelayEstimator(ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind allocsize(0) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"AecCore", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !7, i64 56, !7, i64 568, !7, i64 1080, !7, i64 1592, !7, i64 1852, !7, i64 2112, !7, i64 2372, !6, i64 2632, !7, i64 2640, !7, i64 19280, !7, i64 35920, !7, i64 36440, !7, i64 36960, !7, i64 53600, !7, i64 53860, !7, i64 54120, !7, i64 54380, !12, i64 54640, !12, i64 54644, !12, i64 54648, !11, i64 54652, !11, i64 54656, !12, i64 54660, !12, i64 54664, !11, i64 54668, !7, i64 54672, !11, i64 54928, !13, i64 54932, !13, i64 54934, !13, i64 54936, !11, i64 54940, !6, i64 54944, !6, i64 54952, !11, i64 54960, !11, i64 54964, !11, i64 54968, !11, i64 54972, !12, i64 54976, !12, i64 54980, !11, i64 54984, !14, i64 54988, !14, i64 55016, !14, i64 55044, !14, i64 55072, !11, i64 55100, !11, i64 55104, !15, i64 55108, !15, i64 55144, !15, i64 55180, !15, i64 55216, !11, i64 55252, !11, i64 55256, !12, i64 55260, !7, i64 55264, !11, i64 55564, !6, i64 55568, !6, i64 55576, !11, i64 55584, !11, i64 55588}
!11 = !{!"int", !7, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!"short", !7, i64 0}
!14 = !{!"PowerLevel", !12, i64 0, !11, i64 4, !12, i64 8, !12, i64 12, !11, i64 16, !12, i64 20, !12, i64 24}
!15 = !{!"Stats", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !12, i64 20, !12, i64 24, !11, i64 28, !11, i64 32}
!16 = !{!10, !6, i64 32}
!17 = !{!10, !6, i64 40}
!18 = !{!10, !6, i64 48}
!19 = !{!10, !6, i64 54944}
!20 = !{!10, !6, i64 54952}
!21 = !{!10, !6, i64 55568}
!22 = !{!10, !6, i64 55576}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass