; LLVM IR from JessonYue/LeetCodeLearning :: Array/linzhicong (16_No_565_array_circle_C)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @arrayNesting(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = icmp ne ptr %11, null
  br i1 %12, label %13, label %16

13:                                               ; preds = %2
  %14 = load i32, ptr %5, align 4, !tbaa !9
  %15 = icmp sle i32 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %13, %2
  store i32 0, ptr %3, align 4
  br label %57

17:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %52, %17
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = load i32, ptr %5, align 4, !tbaa !9
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %55

23:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %24 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %24, ptr %10, align 4, !tbaa !9
  br label %25

25:                                               ; preds = %32, %23
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds i32, ptr %26, i64 %28
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %31 = icmp sge i32 %30, 0
  br i1 %31, label %32, label %45

32:                                               ; preds = %25
  %33 = load i32, ptr %8, align 4, !tbaa !9
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %8, align 4, !tbaa !9
  %35 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %35, ptr %9, align 4, !tbaa !9
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds i32, ptr %36, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !9
  store i32 %40, ptr %10, align 4, !tbaa !9
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = load i32, ptr %9, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds i32, ptr %41, i64 %43
  store i32 -1, ptr %44, align 4, !tbaa !9
  br label %25, !llvm.loop !11

45:                                               ; preds = %25
  %46 = load i32, ptr %8, align 4, !tbaa !9
  %47 = load i32, ptr %6, align 4, !tbaa !9
  %48 = icmp sgt i32 %46, %47
  br i1 %48, label %49, label %51

49:                                               ; preds = %45
  %50 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %50, ptr %6, align 4, !tbaa !9
  br label %51

51:                                               ; preds = %49, %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  br label %52

52:                                               ; preds = %51
  %53 = load i32, ptr %7, align 4, !tbaa !9
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %7, align 4, !tbaa !9
  br label %18, !llvm.loop !13

55:                                               ; preds = %22
  %56 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %56, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  br label %57

57:                                               ; preds = %55, %16
  %58 = load i32, ptr %3, align 4
  ret i32 %58
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local range(i32 0, -2147483648) i32 @arrayNesting(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq ptr %0, null
  %4 = icmp slt i32 %1, 1
  %or.cond = or i1 %3, %4
  br i1 %or.cond, label %.loopexit, label %.preheader.preheader

.preheader.preheader:                             ; preds = %2
  %wide.trip.count = zext nneg i32 %1 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %5 = icmp eq i32 %1, 1
  br i1 %5, label %.loopexit.loopexit.unr-lcssa, label %.preheader.preheader.new

.preheader.preheader.new:                         ; preds = %.preheader.preheader
  %unroll_iter = and i64 %wide.trip.count, 2147483646
  br label %.preheader

.preheader:                                       ; preds = %._crit_edge.1, %.preheader.preheader.new
  %indvars.iv = phi i64 [ 0, %.preheader.preheader.new ], [ %indvars.iv.next.1, %._crit_edge.1 ]
  %.02128 = phi i32 [ 0, %.preheader.preheader.new ], [ %spec.select.1, %._crit_edge.1 ]
  %niter = phi i64 [ 0, %.preheader.preheader.new ], [ %niter.next.1, %._crit_edge.1 ]
  %6 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %8 = icmp sgt i32 %7, -1
  br i1 %8, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %9 = phi i32 [ %14, %.lr.ph ], [ %7, %.preheader ]
  %10 = phi ptr [ %13, %.lr.ph ], [ %6, %.preheader ]
  %.01927 = phi i32 [ %11, %.lr.ph ], [ 0, %.preheader ]
  %11 = add nuw nsw i32 %.01927, 1
  store i32 -1, ptr %10, align 4, !tbaa !5
  %12 = zext nneg i32 %9 to i64
  %13 = getelementptr inbounds i32, ptr %0, i64 %12
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp sgt i32 %14, -1
  br i1 %15, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %.019.lcssa = phi i32 [ 0, %.preheader ], [ %11, %.lr.ph ]
  %spec.select = tail call i32 @llvm.smax.i32(i32 %.019.lcssa, i32 %.02128)
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %16 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp sgt i32 %17, -1
  br i1 %18, label %.lr.ph.1, label %._crit_edge.1

.lr.ph.1:                                         ; preds = %._crit_edge, %.lr.ph.1
  %19 = phi i32 [ %24, %.lr.ph.1 ], [ %17, %._crit_edge ]
  %20 = phi ptr [ %23, %.lr.ph.1 ], [ %16, %._crit_edge ]
  %.01927.1 = phi i32 [ %21, %.lr.ph.1 ], [ 0, %._crit_edge ]
  %21 = add nuw nsw i32 %.01927.1, 1
  store i32 -1, ptr %20, align 4, !tbaa !5
  %22 = zext nneg i32 %19 to i64
  %23 = getelementptr inbounds i32, ptr %0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = icmp sgt i32 %24, -1
  br i1 %25, label %.lr.ph.1, label %._crit_edge.1, !llvm.loop !9

._crit_edge.1:                                    ; preds = %.lr.ph.1, %._crit_edge
  %.019.lcssa.1 = phi i32 [ 0, %._crit_edge ], [ %21, %.lr.ph.1 ]
  %spec.select.1 = tail call i32 @llvm.smax.i32(i32 %.019.lcssa.1, i32 %spec.select)
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %.loopexit.loopexit.unr-lcssa, label %.preheader, !llvm.loop !11

.loopexit.loopexit.unr-lcssa:                     ; preds = %._crit_edge.1, %.preheader.preheader
  %spec.select.lcssa.ph = phi i32 [ poison, %.preheader.preheader ], [ %spec.select.1, %._crit_edge.1 ]
  %indvars.iv.unr = phi i64 [ 0, %.preheader.preheader ], [ %indvars.iv.next.1, %._crit_edge.1 ]
  %.02128.unr = phi i32 [ 0, %.preheader.preheader ], [ %spec.select.1, %._crit_edge.1 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.loopexit, label %.preheader.epil

.preheader.epil:                                  ; preds = %.loopexit.loopexit.unr-lcssa
  %26 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.unr
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = icmp sgt i32 %27, -1
  br i1 %28, label %.lr.ph.epil, label %._crit_edge.epil

.lr.ph.epil:                                      ; preds = %.preheader.epil, %.lr.ph.epil
  %29 = phi i32 [ %34, %.lr.ph.epil ], [ %27, %.preheader.epil ]
  %30 = phi ptr [ %33, %.lr.ph.epil ], [ %26, %.preheader.epil ]
  %.01927.epil = phi i32 [ %31, %.lr.ph.epil ], [ 0, %.preheader.epil ]
  %31 = add nuw nsw i32 %.01927.epil, 1
  store i32 -1, ptr %30, align 4, !tbaa !5
  %32 = zext nneg i32 %29 to i64
  %33 = getelementptr inbounds i32, ptr %0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = icmp sgt i32 %34, -1
  br i1 %35, label %.lr.ph.epil, label %._crit_edge.epil, !llvm.loop !9

._crit_edge.epil:                                 ; preds = %.lr.ph.epil, %.preheader.epil
  %.019.lcssa.epil = phi i32 [ 0, %.preheader.epil ], [ %31, %.lr.ph.epil ]
  %spec.select.epil = tail call i32 @llvm.smax.i32(i32 %.019.lcssa.epil, i32 %.02128.unr)
  br label %.loopexit

.loopexit:                                        ; preds = %._crit_edge.epil, %.loopexit.loopexit.unr-lcssa, %2
  %.022 = phi i32 [ 0, %2 ], [ %spec.select.lcssa.ph, %.loopexit.loopexit.unr-lcssa ], [ %spec.select.epil, %._crit_edge.epil ]
  ret i32 %.022
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #1

attributes #0 = { nofree norecurse nosync nounwind memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass