; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/HackerEarth/Help Ashu.ll (Z5queryiiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.Data = type { i32, i32 }

@st = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6middleii(i32 noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6golefti(i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7gorighti(i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5queryiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #3 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store i32 %0, ptr %8, align 4, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !5
  store i32 %2, ptr %10, align 4, !tbaa !5
  store i32 %3, ptr %11, align 4, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = load i32, ptr %12, align 4, !tbaa !5
  %19 = icmp sgt i32 %17, %18
  br i1 %19, label %24, label %20

20:                                               ; preds = %6
  %21 = load i32, ptr %10, align 4, !tbaa !5
  %22 = load i32, ptr %11, align 4, !tbaa !5
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %20, %6
  store i32 0, ptr %7, align 4
  br label %74

25:                                               ; preds = %20
  %26 = load i32, ptr %11, align 4, !tbaa !5
  %27 = load i32, ptr %9, align 4, !tbaa !5
  %28 = icmp sle i32 %26, %27
  br i1 %28, label %29, label %50

29:                                               ; preds = %25
  %30 = load i32, ptr %10, align 4, !tbaa !5
  %31 = load i32, ptr %12, align 4, !tbaa !5
  %32 = icmp sle i32 %30, %31
  br i1 %32, label %33, label %50

33:                                               ; preds = %29
  %34 = load i32, ptr %13, align 4, !tbaa !5
  %35 = icmp eq i32 %34, 1
  br i1 %35, label %36, label %42

36:                                               ; preds = %33
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %38) #4
  %40 = getelementptr inbounds %struct.Data, ptr %39, i32 0, i32 0
  %41 = load i32, ptr %40, align 4, !tbaa !9
  br label %48

42:                                               ; preds = %33
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %44) #4
  %46 = getelementptr inbounds %struct.Data, ptr %45, i32 0, i32 1
  %47 = load i32, ptr %46, align 4, !tbaa !11
  br label %48

48:                                               ; preds = %42, %36
  %49 = phi i32 [ %41, %36 ], [ %47, %42 ]
  store i32 %49, ptr %7, align 4
  br label %74

50:                                               ; preds = %29, %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %51 = load i32, ptr %9, align 4, !tbaa !5
  %52 = load i32, ptr %10, align 4, !tbaa !5
  %53 = call noundef i32 @_Z6middleii(i32 noundef %51, i32 noundef %52)
  store i32 %53, ptr %14, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %54 = load i32, ptr %8, align 4, !tbaa !5
  %55 = call noundef i32 @_Z6golefti(i32 noundef %54)
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = load i32, ptr %14, align 4, !tbaa !5
  %58 = load i32, ptr %11, align 4, !tbaa !5
  %59 = load i32, ptr %12, align 4, !tbaa !5
  %60 = load i32, ptr %13, align 4, !tbaa !5
  %61 = call noundef i32 @_Z5queryiiiiii(i32 noundef %55, i32 noundef %56, i32 noundef %57, i32 noundef %58, i32 noundef %59, i32 noundef %60)
  store i32 %61, ptr %15, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  %62 = load i32, ptr %8, align 4, !tbaa !5
  %63 = call noundef i32 @_Z7gorighti(i32 noundef %62)
  %64 = load i32, ptr %14, align 4, !tbaa !5
  %65 = add nsw i32 %64, 1
  %66 = load i32, ptr %10, align 4, !tbaa !5
  %67 = load i32, ptr %11, align 4, !tbaa !5
  %68 = load i32, ptr %12, align 4, !tbaa !5
  %69 = load i32, ptr %13, align 4, !tbaa !5
  %70 = call noundef i32 @_Z5queryiiiiii(i32 noundef %63, i32 noundef %65, i32 noundef %66, i32 noundef %67, i32 noundef %68, i32 noundef %69)
  store i32 %70, ptr %16, align 4, !tbaa !5
  %71 = load i32, ptr %15, align 4, !tbaa !5
  %72 = load i32, ptr %16, align 4, !tbaa !5
  %73 = add nsw i32 %71, %72
  store i32 %73, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %74

74:                                               ; preds = %50, %48, %24
  %75 = load i32, ptr %7, align 4
  ret i32 %75
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4Data", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@st = external dso_local global %"class.std::vector.0", align 8

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6middleii(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z6golefti(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7gorighti(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5queryiiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = icmp slt i32 %2, %3
  %8 = icmp sgt i32 %1, %4
  %or.cond42 = or i1 %7, %8
  br i1 %or.cond42, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %6
  %.not32 = icmp sgt i32 %2, %4
  br i1 %.not32, label %tailrecurse.us, label %.lr.ph.split.split

tailrecurse.us:                                   ; preds = %.lr.ph, %tailrecurse.us
  %.tr3445.us = phi i32 [ %13, %tailrecurse.us ], [ %1, %.lr.ph ]
  %.tr44.us = phi i32 [ %12, %tailrecurse.us ], [ %0, %.lr.ph ]
  %accumulator.tr43.us = phi i32 [ %14, %tailrecurse.us ], [ 0, %.lr.ph ]
  %9 = tail call noundef i32 @_Z6middleii(i32 noundef %.tr3445.us, i32 noundef %2)
  %10 = tail call noundef i32 @_Z6golefti(i32 noundef %.tr44.us)
  %11 = tail call noundef i32 @_Z5queryiiiiii(i32 noundef %10, i32 noundef %.tr3445.us, i32 noundef %9, i32 noundef %3, i32 noundef %4, i32 noundef %5)
  %12 = tail call noundef i32 @_Z7gorighti(i32 noundef %.tr44.us)
  %13 = add nsw i32 %9, 1
  %14 = add nsw i32 %11, %accumulator.tr43.us
  %.not57 = icmp slt i32 %9, %4
  br i1 %.not57, label %tailrecurse.us, label %.loopexit

.lr.ph.split.split:                               ; preds = %.lr.ph, %tailrecurse
  %.tr3445 = phi i32 [ %23, %tailrecurse ], [ %1, %.lr.ph ]
  %.tr44 = phi i32 [ %22, %tailrecurse ], [ %0, %.lr.ph ]
  %accumulator.tr43 = phi i32 [ %24, %tailrecurse ], [ 0, %.lr.ph ]
  %.not = icmp slt i32 %.tr3445, %3
  br i1 %.not, label %tailrecurse, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split.split
  %15 = icmp eq i32 %5, 1
  %16 = sext i32 %.tr44 to i64
  %17 = tail call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %16) #2
  %.in.idx = select i1 %15, i64 0, i64 4
  %.in = getelementptr inbounds i8, ptr %17, i64 %.in.idx
  %18 = load i32, ptr %.in, align 4, !tbaa !5
  br label %.loopexit

tailrecurse:                                      ; preds = %.lr.ph.split.split
  %19 = tail call noundef i32 @_Z6middleii(i32 noundef %.tr3445, i32 noundef %2)
  %20 = tail call noundef i32 @_Z6golefti(i32 noundef %.tr44)
  %21 = tail call noundef i32 @_Z5queryiiiiii(i32 noundef %20, i32 noundef %.tr3445, i32 noundef %19, i32 noundef %3, i32 noundef %4, i32 noundef %5)
  %22 = tail call noundef i32 @_Z7gorighti(i32 noundef %.tr44)
  %23 = add nsw i32 %19, 1
  %24 = add nsw i32 %21, %accumulator.tr43
  %.not56 = icmp slt i32 %19, %4
  br i1 %.not56, label %.lr.ph.split.split, label %.loopexit

.loopexit:                                        ; preds = %tailrecurse, %tailrecurse.us, %6, %.split.us
  %accumulator.tr41 = phi i32 [ %accumulator.tr43, %.split.us ], [ 0, %6 ], [ %14, %tailrecurse.us ], [ %24, %tailrecurse ]
  %.0 = phi i32 [ %18, %.split.us ], [ 0, %6 ], [ 0, %tailrecurse.us ], [ 0, %tailrecurse ]
  %accumulator.ret.tr = add nsw i32 %.0, %accumulator.tr41
  ret i32 %accumulator.ret.tr
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass