; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/commands (dht_cmd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gpio_command_params = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i32, %union.anon, i16, i32, i8, i8, i8, [264 x i8], i32, i32, i32, i32, i32, i32, i32, i32, float }
%union.anon = type { [16 x i32] }
%struct.COMMAND_RESULT = type { ptr, %union.CommandResultArgument }
%union.CommandResultArgument = type { ptr }

@.str.1 = external hidden unnamed_addr constant [34 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare ptr @parse_params_pins_set(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) #1

declare void @dh_command_fail(ptr noundef, ptr noundef) #1

declare i32 @dh_onewire_init_helper(ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @dh_handle_devices_dht11_read(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca %struct.gpio_command_params, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = icmp ne i32 %16, 0
  br i1 %17, label %18, label %37

18:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 408, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = load i32, ptr %8, align 4, !tbaa !9
  %21 = call ptr @parse_params_pins_set(ptr noundef %19, i32 noundef %20, ptr noundef %9, i32 noundef 1, i32 noundef 0, i32 noundef 16777216, ptr noundef %10)
  store ptr %21, ptr %11, align 8, !tbaa !5
  %22 = load ptr, ptr %11, align 8, !tbaa !5
  %23 = icmp ne ptr %22, null
  br i1 %23, label %24, label %27

24:                                               ; preds = %18
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load ptr, ptr %11, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %25, ptr noundef %26)
  store i32 1, ptr %12, align 4
  br label %34

27:                                               ; preds = %18
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = load i32, ptr %10, align 4, !tbaa !9
  %30 = call i32 @dh_onewire_init_helper(ptr noundef %28, i32 noundef %29, ptr noundef %9)
  %31 = icmp ne i32 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %27
  store i32 1, ptr %12, align 4
  br label %34

33:                                               ; preds = %27
  store i32 0, ptr %12, align 4
  br label %34

34:                                               ; preds = %33, %32, %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 408, ptr %9) #3
  %35 = load i32, ptr %12, align 4
  switch i32 %35, label %56 [
    i32 0, label %36
    i32 1, label %55
  ]

36:                                               ; preds = %34
  br label %37

37:                                               ; preds = %36, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  %38 = call ptr @dht11_read(i32 noundef -1, ptr noundef %14, ptr noundef %13)
  store ptr %38, ptr %15, align 8, !tbaa !5
  %39 = load ptr, ptr %15, align 8, !tbaa !5
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %44

41:                                               ; preds = %37
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load ptr, ptr %15, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %42, ptr noundef %43)
  br label %54

44:                                               ; preds = %37
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.COMMAND_RESULT, ptr %45, i32 0, i32 0
  %47 = load ptr, ptr %46, align 8, !tbaa !11
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.COMMAND_RESULT, ptr %48, i32 0, i32 1
  %50 = load i32, ptr %13, align 4, !tbaa !9
  %51 = load i32, ptr %14, align 4, !tbaa !9
  %52 = getelementptr inbounds %union.CommandResultArgument, ptr %49, i32 0, i32 0
  %53 = load ptr, ptr %52, align 8
  call void (ptr, i32, i32, ...) %47(ptr %53, i32 noundef 1, i32 noundef 5, ptr noundef @.str.1, i32 noundef %50, i32 noundef %51)
  br label %54

54:                                               ; preds = %44, %41
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %55

55:                                               ; preds = %54, %34
  ret void

56:                                               ; preds = %34
  unreachable
}

declare ptr @dht11_read(i32 noundef, ptr noundef, ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"", !6, i64 0, !7, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gpio_command_params = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i32, %union.anon, i16, i32, i8, i8, i8, [264 x i8], i32, i32, i32, i32, i32, i32, i32, i32, float }
%union.anon = type { [16 x i32] }

@.str.1 = external hidden unnamed_addr constant [34 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare ptr @parse_params_pins_set(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

declare void @dh_command_fail(ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @dh_onewire_init_helper(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @dh_handle_devices_dht11_read(ptr noundef %0, ptr nocapture noundef readnone %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #2 {
  %5 = alloca %struct.gpio_command_params, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %16, label %9

9:                                                ; preds = %4
  call void @llvm.lifetime.start.p0(i64 408, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  %10 = call ptr @parse_params_pins_set(ptr noundef %2, i32 noundef %3, ptr noundef nonnull %5, i32 noundef 1, i32 noundef 0, i32 noundef 16777216, ptr noundef nonnull %6) #3
  %.not15 = icmp eq ptr %10, null
  br i1 %.not15, label %12, label %11

11:                                               ; preds = %9
  call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull %10) #3
  br label %.thread

12:                                               ; preds = %9
  %13 = load i32, ptr %6, align 4, !tbaa !5
  %14 = call i32 @dh_onewire_init_helper(ptr noundef %0, i32 noundef %13, ptr noundef nonnull %5) #3
  %.not16 = icmp eq i32 %14, 0
  br i1 %.not16, label %15, label %.thread

.thread:                                          ; preds = %11, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 408, ptr nonnull %5) #3
  br label %26

15:                                               ; preds = %12
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 408, ptr nonnull %5) #3
  br label %16

16:                                               ; preds = %15, %4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
  %17 = call ptr @dht11_read(i32 noundef -1, ptr noundef nonnull %8, ptr noundef nonnull %7) #3
  %.not17 = icmp eq ptr %17, null
  br i1 %.not17, label %19, label %18

18:                                               ; preds = %16
  call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull %17) #3
  br label %25

19:                                               ; preds = %16
  %20 = load ptr, ptr %0, align 8, !tbaa !9
  %21 = getelementptr inbounds i8, ptr %0, i64 8
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = load i32, ptr %8, align 4, !tbaa !5
  %24 = load ptr, ptr %21, align 8
  call void (ptr, i32, i32, ...) %20(ptr %24, i32 noundef 1, i32 noundef 5, ptr noundef nonnull @.str.1, i32 noundef %22, i32 noundef %23) #3
  br label %25

25:                                               ; preds = %19, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
  br label %26

26:                                               ; preds = %.thread, %25
  ret void
}

declare ptr @dht11_read(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !7, i64 8}
!11 = !{!"any pointer", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass