; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mhz19)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@__const.mhz19_read.request = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local ptr @mhz19_read(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca [9 x i8], align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @dh_uart_set_mode(i32 noundef 2)
  %10 = call i32 @dh_uart_init(i32 noundef 9600, i32 noundef 8, i8 noundef signext 78, i32 noundef 1)
  %11 = icmp ne i32 %10, 0
  br i1 %11, label %12, label %13

12:                                               ; preds = %1
  store ptr @.str, ptr %2, align 8
  br label %62

13:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 9, ptr %4) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %4, ptr align 1 @__const.mhz19_read.request, i64 9, i1 false)
  %14 = getelementptr inbounds [9 x i8], ptr %4, i64 0, i64 0
  call void @dh_uart_send_buf(ptr noundef %14, i32 noundef 9)
  call void @delay_ms(i32 noundef 20)
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  store ptr null, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %15 = call i32 @dh_uart_get_buf(ptr noundef %5)
  store i32 %15, ptr %6, align 4, !tbaa !9
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = icmp ne i32 %16, 9
  br i1 %17, label %18, label %23

18:                                               ; preds = %13
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = icmp ne i32 %19, 0
  %21 = zext i1 %20 to i64
  %22 = select i1 %20, ptr @.str.1, ptr @.str.2
  store ptr %22, ptr %2, align 8
  store i32 1, ptr %7, align 4
  br label %61

23:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #5
  store i8 0, ptr %9, align 1, !tbaa !11
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %38, %23
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = icmp slt i32 %25, 8
  br i1 %26, label %27, label %41

27:                                               ; preds = %24
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !9
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds i8, ptr %28, i64 %30
  %32 = load i8, ptr %31, align 1, !tbaa !11
  %33 = zext i8 %32 to i32
  %34 = load i8, ptr %9, align 1, !tbaa !11
  %35 = zext i8 %34 to i32
  %36 = add nsw i32 %35, %33
  %37 = trunc i32 %36 to i8
  store i8 %37, ptr %9, align 1, !tbaa !11
  br label %38

38:                                               ; preds = %27
  %39 = load i32, ptr %8, align 4, !tbaa !9
  %40 = add nsw i32 %39, 1
  store i32 %40, ptr %8, align 4, !tbaa !9
  br label %24, !llvm.loop !12

41:                                               ; preds = %24
  %42 = load i8, ptr %9, align 1, !tbaa !11
  %43 = zext i8 %42 to i32
  %44 = xor i32 %43, -1
  %45 = trunc i32 %44 to i8
  store i8 %45, ptr %9, align 1, !tbaa !11
  %46 = load i8, ptr %9, align 1, !tbaa !11
  %47 = add i8 %46, 1
  store i8 %47, ptr %9, align 1, !tbaa !11
  %48 = load i8, ptr %9, align 1, !tbaa !11
  %49 = zext i8 %48 to i32
  %50 = load ptr, ptr %5, align 8, !tbaa !5
  %51 = getelementptr inbounds i8, ptr %50, i64 8
  %52 = load i8, ptr %51, align 1, !tbaa !11
  %53 = zext i8 %52 to i32
  %54 = icmp ne i32 %49, %53
  br i1 %54, label %55, label %56

55:                                               ; preds = %41
  store ptr @.str.3, ptr %2, align 8
  store i32 1, ptr %7, align 4
  br label %60

56:                                               ; preds = %41
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = call i32 @unsignedInt16be(ptr noundef %57, i32 noundef 2)
  %59 = load ptr, ptr %3, align 8, !tbaa !5
  store i32 %58, ptr %59, align 4, !tbaa !9
  store ptr null, ptr %2, align 8
  store i32 1, ptr %7, align 4
  br label %60

60:                                               ; preds = %56, %55
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  br label %61

61:                                               ; preds = %60, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 9, ptr %4) #5
  br label %62

62:                                               ; preds = %61, %12
  %63 = load ptr, ptr %2, align 8
  ret ptr %63
}

declare void @dh_uart_set_mode(i32 noundef) #1

declare i32 @dh_uart_init(i32 noundef, i32 noundef, i8 noundef signext, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare void @dh_uart_send_buf(ptr noundef, i32 noundef) #1

declare void @delay_ms(i32 noundef) #1

declare i32 @dh_uart_get_buf(ptr noundef) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @unsignedInt16be(ptr noundef, i32 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [20 x i8], align 1
@__const.mhz19_read.request = external hidden unnamed_addr constant [9 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [18 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local ptr @mhz19_read(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
  %2 = alloca [9 x i8], align 1
  %3 = alloca ptr, align 8
  tail call void @dh_uart_set_mode(i32 noundef 2) #6
  %4 = tail call i32 @dh_uart_init(i32 noundef 9600, i32 noundef 8, i8 noundef signext 78, i32 noundef 1) #6
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %5, label %25

5:                                                ; preds = %1
  call void @llvm.lifetime.start.p0(i64 9, ptr nonnull %2) #6
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(9) %2, ptr noundef nonnull align 1 dereferenceable(9) @__const.mhz19_read.request, i64 9, i1 false)
  call void @dh_uart_send_buf(ptr noundef nonnull %2, i32 noundef 9) #6
  call void @delay_ms(i32 noundef 20) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #6
  store ptr null, ptr %3, align 8, !tbaa !5
  %6 = call i32 @dh_uart_get_buf(ptr noundef nonnull %3) #6
  %.not13 = icmp eq i32 %6, 9
  br i1 %.not13, label %.preheader, label %20

.preheader:                                       ; preds = %5
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %7, i64 1
  %9 = load <4 x i8>, ptr %8, align 1, !tbaa !9
  %10 = getelementptr inbounds i8, ptr %7, i64 5
  %11 = load i8, ptr %10, align 1, !tbaa !9
  %12 = getelementptr inbounds i8, ptr %7, i64 6
  %13 = load i8, ptr %12, align 1, !tbaa !9
  %14 = getelementptr inbounds i8, ptr %7, i64 7
  %15 = load i8, ptr %14, align 1, !tbaa !9
  %16 = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> %9)
  %op.rdx = add i8 %16, %11
  %op.rdx18 = add i8 %13, %15
  %op.rdx19 = add i8 %op.rdx, %op.rdx18
  %17 = sub i8 0, %op.rdx19
  %18 = getelementptr inbounds i8, ptr %7, i64 8
  %19 = load i8, ptr %18, align 1, !tbaa !9
  %.not14 = icmp eq i8 %19, %17
  br i1 %.not14, label %22, label %24

20:                                               ; preds = %5
  %.not15 = icmp eq i32 %6, 0
  %21 = select i1 %.not15, ptr @.str.2, ptr @.str.1
  br label %24

22:                                               ; preds = %.preheader
  %23 = call i32 @unsignedInt16be(ptr noundef nonnull %7, i32 noundef 2)
  store i32 %23, ptr %0, align 4, !tbaa !10
  br label %24

24:                                               ; preds = %22, %.preheader, %20
  %.1 = phi ptr [ %21, %20 ], [ null, %22 ], [ @.str.3, %.preheader ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #6
  call void @llvm.lifetime.end.p0(i64 9, ptr nonnull %2) #6
  br label %25

25:                                               ; preds = %1, %24
  %.2 = phi ptr [ %.1, %24 ], [ @.str, %1 ]
  ret ptr %.2
}

declare void @dh_uart_set_mode(i32 noundef) local_unnamed_addr #1

declare i32 @dh_uart_init(i32 noundef, i32 noundef, i8 noundef signext, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare void @dh_uart_send_buf(ptr noundef, i32 noundef) local_unnamed_addr #1

declare void @delay_ms(i32 noundef) local_unnamed_addr #1

declare i32 @dh_uart_get_buf(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @unsignedInt16be(ptr noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i8 @llvm.vector.reduce.add.v4i8(<4 x i8>) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass