; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/1112/main.ll (Z6updateiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@x = external dso_local global i32, align 4
@y = external dso_local global i32, align 4
@p = external dso_local global i32, align 4
@fk = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %10 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %10, ptr %7, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %45, %3
  %12 = load i32, ptr %7, align 4, !tbaa !5
  %13 = load i32, ptr @x, align 4, !tbaa !5
  %14 = add nsw i32 %13, 1
  %15 = icmp slt i32 %12, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %11
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %52

17:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %18 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %18, ptr %9, align 4, !tbaa !5
  br label %19

19:                                               ; preds = %37, %17
  %20 = load i32, ptr %9, align 4, !tbaa !5
  %21 = load i32, ptr @y, align 4, !tbaa !5
  %22 = add nsw i32 %21, 1
  %23 = icmp slt i32 %20, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %19
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %44

25:                                               ; preds = %19
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = load i32, ptr @p, align 4, !tbaa !5
  %28 = mul nsw i32 %26, %27
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fk, i64 noundef %30) #2
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %33) #2
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = add nsw i32 %35, %28
  store i32 %36, ptr %34, align 4, !tbaa !5
  br label %37

37:                                               ; preds = %25
  %38 = load i32, ptr %9, align 4, !tbaa !5
  %39 = load i32, ptr %9, align 4, !tbaa !5
  %40 = sub nsw i32 0, %39
  %41 = and i32 %38, %40
  %42 = load i32, ptr %9, align 4, !tbaa !5
  %43 = add nsw i32 %42, %41
  store i32 %43, ptr %9, align 4, !tbaa !5
  br label %19, !llvm.loop !9

44:                                               ; preds = %24
  br label %45

45:                                               ; preds = %44
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = load i32, ptr %7, align 4, !tbaa !5
  %48 = sub nsw i32 0, %47
  %49 = and i32 %46, %48
  %50 = load i32, ptr %7, align 4, !tbaa !5
  %51 = add nsw i32 %50, %49
  store i32 %51, ptr %7, align 4, !tbaa !5
  br label %11, !llvm.loop !11

52:                                               ; preds = %16
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@x = external dso_local local_unnamed_addr global i32, align 4
@y = external dso_local local_unnamed_addr global i32, align 4
@p = external dso_local local_unnamed_addr global i32, align 4
@fk = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = load i32, ptr @x, align 4, !tbaa !5
  %.not17 = icmp slt i32 %4, %0
  %5 = load i32, ptr @y, align 4
  %6 = icmp slt i32 %5, %1
  %or.cond = select i1 %.not17, i1 true, i1 %6
  br i1 %or.cond, label %._crit_edge19, label %.preheader

.preheader:                                       ; preds = %3, %._crit_edge
  %7 = phi i32 [ %10, %._crit_edge ], [ %4, %3 ]
  %8 = phi i32 [ %11, %._crit_edge ], [ %5, %3 ]
  %.01318 = phi i32 [ %14, %._crit_edge ], [ %0, %3 ]
  %.not1415 = icmp slt i32 %8, %1
  br i1 %.not1415, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader
  %9 = sext i32 %.01318 to i64
  br label %15

._crit_edge19:                                    ; preds = %._crit_edge, %3
  ret void

._crit_edge.loopexit:                             ; preds = %15
  %.pre = load i32, ptr @x, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.preheader
  %10 = phi i32 [ %.pre, %._crit_edge.loopexit ], [ %7, %.preheader ]
  %11 = phi i32 [ %26, %._crit_edge.loopexit ], [ %8, %.preheader ]
  %12 = sub nsw i32 0, %.01318
  %13 = and i32 %.01318, %12
  %14 = add nsw i32 %13, %.01318
  %.not = icmp sgt i32 %14, %10
  br i1 %.not, label %._crit_edge19, label %.preheader, !llvm.loop !9

15:                                               ; preds = %.lr.ph, %15
  %.016 = phi i32 [ %1, %.lr.ph ], [ %25, %15 ]
  %16 = load i32, ptr @p, align 4, !tbaa !5
  %17 = mul nsw i32 %16, %2
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @fk, i64 noundef %9) #1
  %19 = sext i32 %.016 to i64
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %19) #1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = add nsw i32 %21, %17
  store i32 %22, ptr %20, align 4, !tbaa !5
  %23 = sub nsw i32 0, %.016
  %24 = and i32 %.016, %23
  %25 = add nsw i32 %24, %.016
  %26 = load i32, ptr @y, align 4, !tbaa !5
  %.not14 = icmp sgt i32 %25, %26
  br i1 %.not14, label %._crit_edge.loopexit, label %15, !llvm.loop !12
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass