; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.MFRC522_Uid = type { i8, [10 x i8], i8 }
%struct.MIFARE_Key = type { [6 x i8] }

@uid = external hidden global %struct.MFRC522_Uid, align 1
@MFRC522_MIFARE_SetUid.str = external hidden constant [49 x i8], align 4
@__const.MFRC522_MIFARE_SetUid.key = external hidden unnamed_addr constant %struct.MIFARE_Key, align 1
@MFRC522_MIFARE_SetUid.str.49 = external hidden constant [76 x i8], align 4
@MFRC522_MIFARE_SetUid.str.50 = external hidden constant [66 x i8], align 4
@MFRC522_MIFARE_SetUid.str.51 = external hidden constant [38 x i8], align 4
@MFRC522_MIFARE_SetUid.str.52 = external hidden constant [31 x i8], align 4
@MFRC522_MIFARE_SetUid.str.53 = external hidden constant [56 x i8], align 4
@MFRC522_MIFARE_SetUid.str.54 = external hidden constant [36 x i8], align 4
@MFRC522_MIFARE_SetUid.str.55 = external hidden constant [34 x i8], align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PICC_WakeupA(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_StopCrypto1() #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_MIFARE_Read(i8 noundef zeroext, ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_MIFARE_Write(i8 noundef zeroext, ptr noundef, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
declare dso_local ptr @MFRC522_GetStatusCodeName(i32 noundef) #1

declare void @dhdebug_ram(ptr noundef, ...) #2

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_MIFARE_OpenUidBackdoor(i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @MFRC522_MIFARE_SetUid(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #1 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca %struct.MIFARE_Key, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca [18 x i8], align 16
  %12 = alloca i8, align 1
  %13 = alloca i8, align 1
  %14 = alloca i8, align 1
  %15 = alloca [2 x i8], align 1
  %16 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store i8 %2, ptr %7, align 1, !tbaa !9
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = icmp ne ptr %17, null
  br i1 %18, label %19, label %26

19:                                               ; preds = %3
  %20 = load i8, ptr %6, align 1, !tbaa !9
  %21 = icmp ne i8 %20, 0
  br i1 %21, label %22, label %26

22:                                               ; preds = %19
  %23 = load i8, ptr %6, align 1, !tbaa !9
  %24 = zext i8 %23 to i32
  %25 = icmp sgt i32 %24, 15
  br i1 %25, label %26, label %33

26:                                               ; preds = %22, %19, %3
  %27 = load i8, ptr %7, align 1, !tbaa !9
  %28 = icmp ne i8 %27, 0
  br i1 %28, label %29, label %32

29:                                               ; preds = %26
  br label %30

30:                                               ; preds = %29
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str)
  br label %31

31:                                               ; preds = %30
  br label %32

32:                                               ; preds = %31, %26
  store i8 0, ptr %4, align 1
  br label %160

33:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 6, ptr %8) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %8, ptr align 1 @__const.MFRC522_MIFARE_SetUid.key, i64 6, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %34 = call i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext 96, i8 noundef zeroext 1, ptr noundef %8, ptr noundef @uid)
  store i32 %34, ptr %9, align 4, !tbaa !10
  %35 = load i32, ptr %9, align 4, !tbaa !10
  %36 = icmp ne i32 %35, 0
  br i1 %36, label %37, label %76

37:                                               ; preds = %33
  %38 = load i32, ptr %9, align 4, !tbaa !10
  %39 = icmp eq i32 %38, 3
  br i1 %39, label %40, label %65

40:                                               ; preds = %37
  %41 = call zeroext i8 @MFRC522_PICC_IsNewCardPresent()
  %42 = icmp ne i8 %41, 0
  br i1 %42, label %43, label %46

43:                                               ; preds = %40
  %44 = call zeroext i8 @MFRC522_PICC_ReadCardSerial()
  %45 = icmp ne i8 %44, 0
  br i1 %45, label %50, label %46

46:                                               ; preds = %43, %40
  br label %47

47:                                               ; preds = %46
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str.49)
  br label %48

48:                                               ; preds = %47
  br label %49

49:                                               ; preds = %48
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %159

50:                                               ; preds = %43
  %51 = call i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext 96, i8 noundef zeroext 1, ptr noundef %8, ptr noundef @uid)
  store i32 %51, ptr %9, align 4, !tbaa !10
  %52 = load i32, ptr %9, align 4, !tbaa !10
  %53 = icmp ne i32 %52, 0
  br i1 %53, label %54, label %64

54:                                               ; preds = %50
  %55 = load i8, ptr %7, align 1, !tbaa !9
  %56 = icmp ne i8 %55, 0
  br i1 %56, label %57, label %63

57:                                               ; preds = %54
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %9, align 4, !tbaa !10
  %60 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %59)
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str.50, ptr noundef %60)
  br label %61

61:                                               ; preds = %58
  br label %62

62:                                               ; preds = %61
  br label %63

63:                                               ; preds = %62, %54
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %159

64:                                               ; preds = %50
  br label %75

65:                                               ; preds = %37
  %66 = load i8, ptr %7, align 1, !tbaa !9
  %67 = icmp ne i8 %66, 0
  br i1 %67, label %68, label %74

68:                                               ; preds = %65
  br label %69

69:                                               ; preds = %68
  %70 = load i32, ptr %9, align 4, !tbaa !10
  %71 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %70)
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str.51, ptr noundef %71)
  br label %72

72:                                               ; preds = %69
  br label %73

73:                                               ; preds = %72
  br label %74

74:                                               ; preds = %73, %65
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %159

75:                                               ; preds = %64
  br label %76

76:                                               ; preds = %75, %33
  call void @llvm.lifetime.start.p0(i64 18, ptr %11) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #4
  store i8 18, ptr %12, align 1, !tbaa !9
  %77 = getelementptr inbounds [18 x i8], ptr %11, i64 0, i64 0
  %78 = call i32 @MFRC522_MIFARE_Read(i8 noundef zeroext 0, ptr noundef %77, ptr noundef %12)
  store i32 %78, ptr %9, align 4, !tbaa !10
  %79 = load i32, ptr %9, align 4, !tbaa !10
  %80 = icmp ne i32 %79, 0
  br i1 %80, label %81, label %94

81:                                               ; preds = %76
  %82 = load i8, ptr %7, align 1, !tbaa !9
  %83 = icmp ne i8 %82, 0
  br i1 %83, label %84, label %93

84:                                               ; preds = %81
  br label %85

85:                                               ; preds = %84
  %86 = load i32, ptr %9, align 4, !tbaa !10
  %87 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %86)
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str.52, ptr noundef %87)
  br label %88

88:                                               ; preds = %85
  br label %89

89:                                               ; preds = %88
  br label %90

90:                                               ; preds = %89
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str.53)
  br label %91

91:                                               ; preds = %90
  br label %92

92:                                               ; preds = %91
  br label %93

93:                                               ; preds = %92, %81
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %158

94:                                               ; preds = %76
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #4
  store i8 0, ptr %13, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %14) #4
  store i8 0, ptr %14, align 1, !tbaa !9
  br label %95

95:                                               ; preds = %120, %94
  %96 = load i8, ptr %14, align 1, !tbaa !9
  %97 = zext i8 %96 to i32
  %98 = load i8, ptr %6, align 1, !tbaa !9
  %99 = zext i8 %98 to i32
  %100 = icmp slt i32 %97, %99
  br i1 %100, label %101, label %123

101:                                              ; preds = %95
  %102 = load ptr, ptr %5, align 8, !tbaa !5
  %103 = load i8, ptr %14, align 1, !tbaa !9
  %104 = zext i8 %103 to i64
  %105 = getelementptr inbounds i8, ptr %102, i64 %104
  %106 = load i8, ptr %105, align 1, !tbaa !9
  %107 = load i8, ptr %14, align 1, !tbaa !9
  %108 = zext i8 %107 to i64
  %109 = getelementptr inbounds [18 x i8], ptr %11, i64 0, i64 %108
  store i8 %106, ptr %109, align 1, !tbaa !9
  %110 = load ptr, ptr %5, align 8, !tbaa !5
  %111 = load i8, ptr %14, align 1, !tbaa !9
  %112 = zext i8 %111 to i64
  %113 = getelementptr inbounds i8, ptr %110, i64 %112
  %114 = load i8, ptr %113, align 1, !tbaa !9
  %115 = zext i8 %114 to i32
  %116 = load i8, ptr %13, align 1, !tbaa !9
  %117 = zext i8 %116 to i32
  %118 = xor i32 %117, %115
  %119 = trunc i32 %118 to i8
  store i8 %119, ptr %13, align 1, !tbaa !9
  br label %120

120:                                              ; preds = %101
  %121 = load i8, ptr %14, align 1, !tbaa !9
  %122 = add i8 %121, 1
  store i8 %122, ptr %14, align 1, !tbaa !9
  br label %95, !llvm.loop !12

123:                                              ; preds = %95
  %124 = load i8, ptr %13, align 1, !tbaa !9
  %125 = load i8, ptr %6, align 1, !tbaa !9
  %126 = zext i8 %125 to i64
  %127 = getelementptr inbounds [18 x i8], ptr %11, i64 0, i64 %126
  store i8 %124, ptr %127, align 1, !tbaa !9
  call void @MFRC522_PCD_StopCrypto1()
  %128 = load i8, ptr %7, align 1, !tbaa !9
  %129 = call zeroext i8 @MFRC522_MIFARE_OpenUidBackdoor(i8 noundef zeroext %128)
  %130 = icmp ne i8 %129, 0
  br i1 %130, label %139, label %131

131:                                              ; preds = %123
  %132 = load i8, ptr %7, align 1, !tbaa !9
  %133 = icmp ne i8 %132, 0
  br i1 %133, label %134, label %138

134:                                              ; preds = %131
  br label %135

135:                                              ; preds = %134
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str.54)
  br label %136

136:                                              ; preds = %135
  br label %137

137:                                              ; preds = %136
  br label %138

138:                                              ; preds = %137, %131
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %157

139:                                              ; preds = %123
  %140 = getelementptr inbounds [18 x i8], ptr %11, i64 0, i64 0
  %141 = call i32 @MFRC522_MIFARE_Write(i8 noundef zeroext 0, ptr noundef %140, i8 noundef zeroext 16)
  store i32 %141, ptr %9, align 4, !tbaa !10
  %142 = load i32, ptr %9, align 4, !tbaa !10
  %143 = icmp ne i32 %142, 0
  br i1 %143, label %144, label %154

144:                                              ; preds = %139
  %145 = load i8, ptr %7, align 1, !tbaa !9
  %146 = icmp ne i8 %145, 0
  br i1 %146, label %147, label %153

147:                                              ; preds = %144
  br label %148

148:                                              ; preds = %147
  %149 = load i32, ptr %9, align 4, !tbaa !10
  %150 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %149)
  call void (ptr, ...) @dhdebug_ram(ptr noundef @MFRC522_MIFARE_SetUid.str.55, ptr noundef %150)
  br label %151

151:                                              ; preds = %148
  br label %152

152:                                              ; preds = %151
  br label %153

153:                                              ; preds = %152, %144
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %157

154:                                              ; preds = %139
  call void @llvm.lifetime.start.p0(i64 2, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #4
  store i8 2, ptr %16, align 1, !tbaa !9
  %155 = getelementptr inbounds [2 x i8], ptr %15, i64 0, i64 0
  %156 = call i32 @MFRC522_PICC_WakeupA(ptr noundef %155, ptr noundef %16)
  store i8 1, ptr %4, align 1
  store i32 1, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %15) #4
  br label %157

157:                                              ; preds = %154, %153, %138
  call void @llvm.lifetime.end.p0(i64 1, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #4
  br label %158

158:                                              ; preds = %157, %93
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 18, ptr %11) #4
  br label %159

159:                                              ; preds = %158, %74, %63, %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 6, ptr %8) #4
  br label %160

160:                                              ; preds = %159, %32
  %161 = load i8, ptr %4, align 1
  ret i8 %161
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_PICC_IsNewCardPresent() #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_PICC_ReadCardSerial() #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.MFRC522_Uid = type { i8, [10 x i8], i8 }
%struct.MIFARE_Key = type { [6 x i8] }

@uid = external hidden global %struct.MFRC522_Uid, align 1
@MFRC522_MIFARE_SetUid.str = external hidden constant [49 x i8], align 4
@__const.MFRC522_MIFARE_SetUid.key = external hidden unnamed_addr constant %struct.MIFARE_Key, align 1
@MFRC522_MIFARE_SetUid.str.49 = external hidden constant [76 x i8], align 4
@MFRC522_MIFARE_SetUid.str.50 = external hidden constant [66 x i8], align 4
@MFRC522_MIFARE_SetUid.str.51 = external hidden constant [38 x i8], align 4
@MFRC522_MIFARE_SetUid.str.52 = external hidden constant [31 x i8], align 4
@MFRC522_MIFARE_SetUid.str.53 = external hidden constant [56 x i8], align 4
@MFRC522_MIFARE_SetUid.str.54 = external hidden constant [36 x i8], align 4
@MFRC522_MIFARE_SetUid.str.55 = external hidden constant [34 x i8], align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PICC_WakeupA(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @MFRC522_PCD_StopCrypto1() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_MIFARE_Read(i8 noundef zeroext, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_MIFARE_Write(i8 noundef zeroext, ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local ptr @MFRC522_GetStatusCodeName(i32 noundef) local_unnamed_addr #1

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_MIFARE_OpenUidBackdoor(i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 2) i8 @MFRC522_MIFARE_SetUid(ptr noundef readonly %0, i8 noundef zeroext %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = alloca %struct.MIFARE_Key, align 1
  %5 = alloca [18 x i8], align 16
  %6 = alloca i8, align 1
  %7 = alloca [2 x i8], align 1
  %8 = alloca i8, align 1
  %9 = icmp eq ptr %0, null
  %10 = add i8 %1, -16
  %11 = icmp ult i8 %10, -15
  %or.cond4 = or i1 %9, %11
  br i1 %or.cond4, label %12, label %14

12:                                               ; preds = %3
  %.not54 = icmp eq i8 %2, 0
  br i1 %.not54, label %55, label %13

13:                                               ; preds = %12
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str) #5
  br label %55

14:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 6, ptr nonnull %4) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(6) %4, ptr noundef nonnull align 1 dereferenceable(6) @__const.MFRC522_MIFARE_SetUid.key, i64 6, i1 false)
  %15 = call i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext 96, i8 noundef zeroext 1, ptr noundef nonnull %4, ptr noundef nonnull @uid)
  switch i32 %15, label %26 [
    i32 0, label %29
    i32 3, label %16
  ]

16:                                               ; preds = %14
  %17 = call zeroext i8 @MFRC522_PICC_IsNewCardPresent()
  %.not44 = icmp eq i8 %17, 0
  br i1 %.not44, label %20, label %18

18:                                               ; preds = %16
  %19 = call zeroext i8 @MFRC522_PICC_ReadCardSerial()
  %.not45 = icmp eq i8 %19, 0
  br i1 %.not45, label %20, label %21

20:                                               ; preds = %16, %18
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str.49) #5
  br label %54

21:                                               ; preds = %18
  %22 = call i32 @MFRC522_PCD_Authenticate(i8 noundef zeroext 96, i8 noundef zeroext 1, ptr noundef nonnull %4, ptr noundef nonnull @uid)
  %.not46 = icmp eq i32 %22, 0
  br i1 %.not46, label %29, label %23

23:                                               ; preds = %21
  %.not53 = icmp eq i8 %2, 0
  br i1 %.not53, label %54, label %24

24:                                               ; preds = %23
  %25 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %22)
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str.50, ptr noundef %25) #5
  br label %54

26:                                               ; preds = %14
  %.not43 = icmp eq i8 %2, 0
  br i1 %.not43, label %54, label %27

27:                                               ; preds = %26
  %28 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %15)
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str.51, ptr noundef %28) #5
  br label %54

29:                                               ; preds = %14, %21
  call void @llvm.lifetime.start.p0(i64 18, ptr nonnull %5) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #5
  store i8 18, ptr %6, align 1, !tbaa !5
  %30 = call i32 @MFRC522_MIFARE_Read(i8 noundef zeroext 0, ptr noundef nonnull %5, ptr noundef nonnull %6)
  %.not47 = icmp eq i32 %30, 0
  br i1 %.not47, label %iter.check, label %36

iter.check:                                       ; preds = %29
  %31 = zext nneg i8 %1 to i64
  call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 16 %5, ptr nonnull align 1 %0, i64 %31, i1 false), !tbaa !5
  %min.iters.check = icmp ult i8 %1, 8
  br i1 %min.iters.check, label %.lr.ph.preheader, label %vector.main.loop.iter.check

.lr.ph.preheader:                                 ; preds = %vec.epilog.middle.block, %iter.check
  %indvars.iv.ph = phi i64 [ 0, %iter.check ], [ %n.vec62, %vec.epilog.middle.block ]
  %.03455.ph = phi i8 [ 0, %iter.check ], [ %35, %vec.epilog.middle.block ]
  br label %.lr.ph

vector.main.loop.iter.check:                      ; preds = %iter.check
  %min.iters.check58 = icmp ult i8 %1, 32
  br i1 %min.iters.check58, label %vec.epilog.ph, label %vector.body

vector.body:                                      ; preds = %vector.main.loop.iter.check, %vector.body
  br label %vector.body, !llvm.loop !8

vec.epilog.ph:                                    ; preds = %vector.main.loop.iter.check
  %n.vec62 = and i64 %31, 8
  br label %vec.epilog.vector.body

vec.epilog.vector.body:                           ; preds = %vec.epilog.vector.body, %vec.epilog.ph
  %index63 = phi i64 [ 0, %vec.epilog.ph ], [ %index.next66, %vec.epilog.vector.body ]
  %vec.phi64 = phi <8 x i8> [ zeroinitializer, %vec.epilog.ph ], [ %33, %vec.epilog.vector.body ]
  %32 = getelementptr inbounds i8, ptr %0, i64 %index63
  %wide.load65 = load <8 x i8>, ptr %32, align 1, !tbaa !5
  %33 = xor <8 x i8> %wide.load65, %vec.phi64
  %index.next66 = add nuw i64 %index63, 8
  %34 = icmp eq i64 %index.next66, %n.vec62
  br i1 %34, label %vec.epilog.middle.block, label %vec.epilog.vector.body, !llvm.loop !12

vec.epilog.middle.block:                          ; preds = %vec.epilog.vector.body
  %35 = call i8 @llvm.vector.reduce.xor.v8i8(<8 x i8> %33)
  %cmp.n67 = icmp eq i64 %n.vec62, %31
  br i1 %cmp.n67, label %._crit_edge, label %.lr.ph.preheader

36:                                               ; preds = %29
  %.not52 = icmp eq i8 %2, 0
  br i1 %.not52, label %53, label %37

37:                                               ; preds = %36
  %38 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %30)
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str.52, ptr noundef %38) #5
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str.53) #5
  br label %53

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader ]
  %.03455 = phi i8 [ %41, %.lr.ph ], [ %.03455.ph, %.lr.ph.preheader ]
  %39 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv
  %40 = load i8, ptr %39, align 1, !tbaa !5
  %41 = xor i8 %40, %.03455
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %31
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph, %vec.epilog.middle.block
  %.lcssa = phi i8 [ %35, %vec.epilog.middle.block ], [ %41, %.lr.ph ]
  %42 = getelementptr inbounds [18 x i8], ptr %5, i64 0, i64 %31
  store i8 %.lcssa, ptr %42, align 1, !tbaa !5
  call void @MFRC522_PCD_StopCrypto1()
  %43 = call zeroext i8 @MFRC522_MIFARE_OpenUidBackdoor(i8 noundef zeroext %2)
  %.not48 = icmp eq i8 %43, 0
  br i1 %.not48, label %44, label %46

44:                                               ; preds = %._crit_edge
  %.not49 = icmp eq i8 %2, 0
  br i1 %.not49, label %53, label %45

45:                                               ; preds = %44
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str.54) #5
  br label %53

46:                                               ; preds = %._crit_edge
  %47 = call i32 @MFRC522_MIFARE_Write(i8 noundef zeroext 0, ptr noundef nonnull %5, i8 noundef zeroext 16)
  %.not50 = icmp eq i32 %47, 0
  br i1 %.not50, label %51, label %48

48:                                               ; preds = %46
  %.not51 = icmp eq i8 %2, 0
  br i1 %.not51, label %53, label %49

49:                                               ; preds = %48
  %50 = call ptr @MFRC522_GetStatusCodeName(i32 noundef %47)
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @MFRC522_MIFARE_SetUid.str.55, ptr noundef %50) #5
  br label %53

51:                                               ; preds = %46
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %8) #5
  store i8 2, ptr %8, align 1, !tbaa !5
  %52 = call i32 @MFRC522_PICC_WakeupA(ptr noundef nonnull %7, ptr noundef nonnull %8)
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %8) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %7) #5
  br label %53

53:                                               ; preds = %51, %45, %44, %49, %48, %36, %37
  %.1 = phi i8 [ 0, %37 ], [ 0, %36 ], [ 1, %51 ], [ 0, %45 ], [ 0, %44 ], [ 0, %49 ], [ 0, %48 ]
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 18, ptr nonnull %5) #5
  br label %54

54:                                               ; preds = %26, %27, %23, %24, %53, %20
  %.2 = phi i8 [ %.1, %53 ], [ 0, %20 ], [ 0, %24 ], [ 0, %23 ], [ 0, %27 ], [ 0, %26 ]
  call void @llvm.lifetime.end.p0(i64 6, ptr nonnull %4) #5
  br label %55

55:                                               ; preds = %12, %13, %54
  %.3 = phi i8 [ %.2, %54 ], [ 0, %13 ], [ 0, %12 ]
  ret i8 %.3
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_PICC_IsNewCardPresent() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @MFRC522_PICC_ReadCardSerial() local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i8 @llvm.vector.reduce.xor.v8i8(<8 x i8>) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9, !10, !11}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!"llvm.loop.isvectorized", i32 1}
!11 = !{!"llvm.loop.unroll.runtime.disable"}
!12 = distinct !{!12, !9, !10, !11}
!13 = distinct !{!13, !9, !11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalDCEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopIdiomRecognizePass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass