; LLVM IR from devicehive/esp8266-firmware :: esp-utils/esp-flasher.ll (Z10flash_syncP10SerialPortb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ESP_REQUEST_HEADER = type { i8, i8, i16, i32 }

@__const._Z10flash_syncP10SerialPortb.body = external hidden unnamed_addr constant [36 x i8], align 16
@.str.22 = external hidden unnamed_addr constant [26 x i8], align 1

declare i32 @printf(ptr noundef, ...) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z12esp_checksumPvj(ptr noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef, ptr noundef, ptr noundef, i1 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10flash_syncP10SerialPortb(ptr noundef %0, i1 noundef zeroext %1) #2 {
  %3 = alloca i1, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca [36 x i8], align 16
  %7 = alloca %struct.ESP_REQUEST_HEADER, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  %10 = zext i1 %1 to i8
  store i8 %10, ptr %5, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 36, ptr %6) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %6, ptr align 16 @__const._Z10flash_syncP10SerialPortb.body, i64 36, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %11 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %7, i32 0, i32 0
  store i8 0, ptr %11, align 4, !tbaa !11
  %12 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %7, i32 0, i32 1
  store i8 8, ptr %12, align 1, !tbaa !15
  %13 = call noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext 36)
  %14 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %7, i32 0, i32 2
  store i16 %13, ptr %14, align 2, !tbaa !16
  %15 = getelementptr inbounds [36 x i8], ptr %6, i64 0, i64 0
  %16 = call noundef i32 @_Z12esp_checksumPvj(ptr noundef %15, i32 noundef 36)
  %17 = getelementptr inbounds %struct.ESP_REQUEST_HEADER, ptr %7, i32 0, i32 3
  store i32 %16, ptr %17, align 4, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !18
  br label %18

18:                                               ; preds = %28, %2
  %19 = load i32, ptr %8, align 4, !tbaa !18
  %20 = icmp slt i32 %19, 3
  br i1 %20, label %22, label %21

21:                                               ; preds = %18
  store i32 2, ptr %9, align 4
  br label %31

22:                                               ; preds = %18
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds [36 x i8], ptr %6, i64 0, i64 0
  %25 = call noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef %23, ptr noundef %7, ptr noundef %24, i1 noundef zeroext false)
  br i1 %25, label %26, label %27

26:                                               ; preds = %22
  store i1 true, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %31

27:                                               ; preds = %22
  br label %28

28:                                               ; preds = %27
  %29 = load i32, ptr %8, align 4, !tbaa !18
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %8, align 4, !tbaa !18
  br label %18, !llvm.loop !19

31:                                               ; preds = %26, %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  %32 = load i32, ptr %9, align 4
  switch i32 %32, label %39 [
    i32 2, label %33
  ]

33:                                               ; preds = %31
  %34 = load i8, ptr %5, align 1, !tbaa !9, !range !21, !noundef !22
  %35 = trunc i8 %34 to i1
  br i1 %35, label %36, label %38

36:                                               ; preds = %33
  %37 = call i32 (ptr, ...) @printf(ptr noundef @.str.22)
  br label %38

38:                                               ; preds = %36, %33
  store i1 false, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %39

39:                                               ; preds = %38, %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 36, ptr %6) #5
  %40 = load i1, ptr %3, align 1
  ret i1 %40
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"_ZTS18ESP_REQUEST_HEADER", !7, i64 0, !7, i64 1, !13, i64 2, !14, i64 4}
!13 = !{!"short", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !7, i64 1}
!16 = !{!12, !13, i64 2}
!17 = !{!12, !14, i64 4}
!18 = !{!14, !14, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{i8 0, i8 2}
!22 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ESP_REQUEST_HEADER = type { i8, i8, i16, i32 }

@__const._Z10flash_syncP10SerialPortb.body = external hidden unnamed_addr constant [36 x i8], align 16
@.str.22 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z12esp_checksumPvj(ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef, ptr noundef, ptr noundef, i1 noundef zeroext) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z10flash_syncP10SerialPortb(ptr noundef %0, i1 noundef zeroext %1) local_unnamed_addr #2 {
  %3 = alloca [36 x i8], align 16
  %4 = alloca %struct.ESP_REQUEST_HEADER, align 4
  call void @llvm.lifetime.start.p0(i64 36, ptr nonnull %3) #5
  call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(36) %3, ptr noundef nonnull align 16 dereferenceable(36) @__const._Z10flash_syncP10SerialPortb.body, i64 36, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  store i8 0, ptr %4, align 4, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %4, i64 1
  store i8 8, ptr %5, align 1, !tbaa !11
  %6 = tail call noundef zeroext i16 @_ZL17__uint16_identityt(i16 noundef zeroext 36)
  %7 = getelementptr inbounds i8, ptr %4, i64 2
  store i16 %6, ptr %7, align 2, !tbaa !12
  %8 = call noundef i32 @_Z12esp_checksumPvj(ptr noundef nonnull %3, i32 noundef 36)
  %9 = getelementptr inbounds i8, ptr %4, i64 4
  store i32 %8, ptr %9, align 4, !tbaa !13
  %10 = call noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef %0, ptr noundef nonnull %4, ptr noundef nonnull %3, i1 noundef zeroext false)
  br i1 %10, label %.loopexit, label %11

11:                                               ; preds = %2
  %12 = call noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef %0, ptr noundef nonnull %4, ptr noundef nonnull %3, i1 noundef zeroext false)
  br i1 %12, label %.loopexit, label %13

13:                                               ; preds = %11
  %14 = call noundef zeroext i1 @_Z10flash_sendP10SerialPortP18ESP_REQUEST_HEADERPvb(ptr noundef %0, ptr noundef nonnull %4, ptr noundef nonnull %3, i1 noundef zeroext false)
  %.not = xor i1 %1, true
  %brmerge = or i1 %14, %.not
  br i1 %brmerge, label %.loopexit, label %15

15:                                               ; preds = %13
  %16 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.22)
  br label %.loopexit

.loopexit:                                        ; preds = %13, %2, %11, %15
  %17 = phi i1 [ false, %15 ], [ %14, %13 ], [ true, %11 ], [ true, %2 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 36, ptr nonnull %3) #5
  ret i1 %17
}

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTS18ESP_REQUEST_HEADER", !7, i64 0, !7, i64 1, !9, i64 2, !10, i64 4}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"short", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!6, !7, i64 1}
!12 = !{!6, !9, i64 2}
!13 = !{!6, !10, i64 4}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,SROAPass,SimplifyCFGPass,TailCallElimPass