; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/URI/2405.ll (Z3bfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@g = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@qtd = external dso_local global i32, align 4
@__const._Z3bfsii.row = external hidden unnamed_addr constant [8 x i32], align 16
@__const._Z3bfsii.col = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3bfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca [8 x i32], align 16
  %6 = alloca [8 x i32], align 16
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %12) #4
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %15) #4
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %90, label %19

19:                                               ; preds = %2
  %20 = load i32, ptr @qtd, align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr @qtd, align 4, !tbaa !5
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %23) #4
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #4
  store i32 1, ptr %27, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 32, ptr %5) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %5, ptr align 16 @__const._Z3bfsii.row, i64 32, i1 false)
  call void @llvm.lifetime.start.p0(i64 32, ptr %6) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %6, ptr align 16 @__const._Z3bfsii.col, i64 32, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %86, %19
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %30 = icmp slt i32 %29, 8
  br i1 %30, label %32, label %31

31:                                               ; preds = %28
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %89

32:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [8 x i32], ptr %5, i64 0, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = add nsw i32 %36, %37
  store i32 %38, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  %39 = load i32, ptr %7, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [8 x i32], ptr %6, i64 0, i64 %40
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = add nsw i32 %42, %43
  store i32 %44, ptr %10, align 4, !tbaa !5
  %45 = load i32, ptr %9, align 4, !tbaa !5
  %46 = icmp slt i32 %45, 0
  br i1 %46, label %79, label %47

47:                                               ; preds = %32
  %48 = load i32, ptr %9, align 4, !tbaa !5
  %49 = call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @g) #4
  %50 = trunc i64 %49 to i32
  %51 = icmp sge i32 %48, %50
  br i1 %51, label %79, label %52

52:                                               ; preds = %47
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = icmp slt i32 %53, 0
  br i1 %54, label %79, label %55

55:                                               ; preds = %52
  %56 = load i32, ptr %10, align 4, !tbaa !5
  %57 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef 0) #4
  %58 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %57) #4
  %59 = trunc i64 %58 to i32
  %60 = icmp sge i32 %56, %59
  br i1 %60, label %79, label %61

61:                                               ; preds = %55
  %62 = load i32, ptr %9, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %63) #4
  %65 = load i32, ptr %10, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %64, i64 noundef %66) #4
  %68 = load i32, ptr %67, align 4, !tbaa !5
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %79, label %70

70:                                               ; preds = %61
  %71 = load i32, ptr %9, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %72) #4
  %74 = load i32, ptr %10, align 4, !tbaa !5
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef %75) #4
  %77 = load i32, ptr %76, align 4, !tbaa !5
  %78 = icmp eq i32 %77, 1
  br i1 %78, label %79, label %80

79:                                               ; preds = %70, %61, %55, %52, %47, %32
  store i32 4, ptr %8, align 4
  br label %83

80:                                               ; preds = %70
  %81 = load i32, ptr %9, align 4, !tbaa !5
  %82 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z3bfsii(i32 noundef %81, i32 noundef %82)
  store i32 0, ptr %8, align 4
  br label %83

83:                                               ; preds = %80, %79
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %84 = load i32, ptr %8, align 4
  switch i32 %84, label %91 [
    i32 0, label %85
    i32 4, label %86
  ]

85:                                               ; preds = %83
  br label %86

86:                                               ; preds = %85, %83
  %87 = load i32, ptr %7, align 4, !tbaa !5
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %7, align 4, !tbaa !5
  br label %28, !llvm.loop !9

89:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 32, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 32, ptr %5) #4
  br label %90

90:                                               ; preds = %89, %2
  ret void

91:                                               ; preds = %83
  unreachable
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<int>, std::allocator<std::vector<int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@g = external dso_local global %"class.std::vector", align 8
@vi = external dso_local global %"class.std::vector", align 8
@qtd = external dso_local local_unnamed_addr global i32, align 4
@__const._Z3bfsii.row = external hidden unnamed_addr constant [8 x i32], align 16
@__const._Z3bfsii.col = external hidden unnamed_addr constant [8 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3bfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = sext i32 %0 to i64
  %4 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %5 = sext i32 %1 to i64
  %6 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5) #1
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %.not = icmp eq i32 %7, 0
  br i1 %.not, label %8, label %.loopexit

8:                                                ; preds = %2
  %9 = load i32, ptr @qtd, align 4, !tbaa !5
  %10 = add nsw i32 %9, 1
  store i32 %10, ptr @qtd, align 4, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %3) #1
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %5) #1
  store i32 1, ptr %12, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %8, %40
  %indvars.iv = phi i64 [ 0, %8 ], [ %indvars.iv.next, %40 ]
  %14 = getelementptr inbounds [8 x i32], ptr @__const._Z3bfsii.row, i64 0, i64 %indvars.iv
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = add nsw i32 %15, %0
  %17 = getelementptr inbounds [8 x i32], ptr @__const._Z3bfsii.col, i64 0, i64 %indvars.iv
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = add nsw i32 %18, %1
  %20 = icmp slt i32 %16, 0
  br i1 %20, label %40, label %21

21:                                               ; preds = %13
  %22 = tail call noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @g) #1
  %23 = trunc i64 %22 to i32
  %.not23 = icmp slt i32 %16, %23
  br i1 %.not23, label %24, label %40

24:                                               ; preds = %21
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef 0) #1
  %26 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %25) #1
  %27 = trunc i64 %26 to i32
  %.not24 = icmp slt i32 %19, %27
  br i1 %.not24, label %28, label %40

28:                                               ; preds = %24
  %29 = zext nneg i32 %16 to i64
  %30 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @vi, i64 noundef %29) #1
  %31 = sext i32 %19 to i64
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %30, i64 noundef %31) #1
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %.not25 = icmp eq i32 %33, 0
  br i1 %.not25, label %34, label %40

34:                                               ; preds = %28
  %35 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @g, i64 noundef %29) #1
  %36 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %35, i64 noundef %31) #1
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = icmp eq i32 %37, 1
  br i1 %38, label %40, label %39

39:                                               ; preds = %34
  tail call void @_Z3bfsii(i32 noundef %16, i32 noundef %19)
  br label %40

40:                                               ; preds = %13, %21, %24, %28, %34, %39
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 8
  br i1 %exitcond.not, label %.loopexit, label %13, !llvm.loop !9

.loopexit:                                        ; preds = %40, %2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass