; LLVM IR from devicehive/esp8266-firmware :: esp-utils/esp-flasher.ll (Z18SerialPortRecievedP10SerialPortPKcj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@recivedBuf = external dso_local global [4096 x i8], align 16
@recivedPos = external dso_local global i32, align 4
@recivedEscape = external dso_local global i8, align 1
@mCurrentPort = external dso_local global ptr, align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z18SerialPortRecievedP10SerialPortPKcj(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %10 = load ptr, ptr @mCurrentPort, align 8, !tbaa !5
  %11 = icmp ne ptr %10, null
  br i1 %11, label %12, label %17

12:                                               ; preds = %3
  %13 = load ptr, ptr @mCurrentPort, align 8, !tbaa !5
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = icmp ne ptr %13, %14
  br i1 %15, label %16, label %17

16:                                               ; preds = %12
  br label %76

17:                                               ; preds = %12, %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %72, %17
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = icmp ult i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  store i32 2, ptr %8, align 4
  br label %75

23:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #2
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = zext i32 %25 to i64
  %27 = getelementptr inbounds i8, ptr %24, i64 %26
  %28 = load i8, ptr %27, align 1, !tbaa !11
  store i8 %28, ptr %9, align 1, !tbaa !11
  %29 = load i32, ptr @recivedPos, align 4, !tbaa !9
  %30 = zext i32 %29 to i64
  %31 = icmp uge i64 %30, 4096
  br i1 %31, label %32, label %33

32:                                               ; preds = %23
  store i32 2, ptr %8, align 4
  br label %69

33:                                               ; preds = %23
  %34 = load i8, ptr @recivedEscape, align 1, !tbaa !12, !range !14, !noundef !15
  %35 = trunc i8 %34 to i1
  br i1 %35, label %36, label %56

36:                                               ; preds = %33
  %37 = load i8, ptr %9, align 1, !tbaa !11
  %38 = zext i8 %37 to i32
  %39 = icmp eq i32 %38, 220
  br i1 %39, label %40, label %45

40:                                               ; preds = %36
  %41 = load i32, ptr @recivedPos, align 4, !tbaa !9
  %42 = add i32 %41, 1
  store i32 %42, ptr @recivedPos, align 4, !tbaa !9
  %43 = zext i32 %41 to i64
  %44 = getelementptr inbounds [4096 x i8], ptr @recivedBuf, i64 0, i64 %43
  store i8 -64, ptr %44, align 1, !tbaa !11
  br label %55

45:                                               ; preds = %36
  %46 = load i8, ptr %9, align 1, !tbaa !11
  %47 = zext i8 %46 to i32
  %48 = icmp eq i32 %47, 221
  br i1 %48, label %49, label %54

49:                                               ; preds = %45
  %50 = load i32, ptr @recivedPos, align 4, !tbaa !9
  %51 = add i32 %50, 1
  store i32 %51, ptr @recivedPos, align 4, !tbaa !9
  %52 = zext i32 %50 to i64
  %53 = getelementptr inbounds [4096 x i8], ptr @recivedBuf, i64 0, i64 %52
  store i8 -37, ptr %53, align 1, !tbaa !11
  br label %54

54:                                               ; preds = %49, %45
  br label %55

55:                                               ; preds = %54, %40
  store i8 0, ptr @recivedEscape, align 1, !tbaa !12
  br label %68

56:                                               ; preds = %33
  %57 = load i8, ptr %9, align 1, !tbaa !11
  %58 = zext i8 %57 to i32
  %59 = icmp eq i32 %58, 219
  br i1 %59, label %60, label %61

60:                                               ; preds = %56
  store i8 1, ptr @recivedEscape, align 1, !tbaa !12
  br label %67

61:                                               ; preds = %56
  %62 = load i8, ptr %9, align 1, !tbaa !11
  %63 = load i32, ptr @recivedPos, align 4, !tbaa !9
  %64 = add i32 %63, 1
  store i32 %64, ptr @recivedPos, align 4, !tbaa !9
  %65 = zext i32 %63 to i64
  %66 = getelementptr inbounds [4096 x i8], ptr @recivedBuf, i64 0, i64 %65
  store i8 %62, ptr %66, align 1, !tbaa !11
  br label %67

67:                                               ; preds = %61, %60
  br label %68

68:                                               ; preds = %67, %55
  store i32 0, ptr %8, align 4
  br label %69

69:                                               ; preds = %68, %32
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #2
  %70 = load i32, ptr %8, align 4
  switch i32 %70, label %75 [
    i32 0, label %71
  ]

71:                                               ; preds = %69
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr %7, align 4, !tbaa !9
  %74 = add i32 %73, 1
  store i32 %74, ptr %7, align 4, !tbaa !9
  br label %18, !llvm.loop !16

75:                                               ; preds = %69, %22
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %76

76:                                               ; preds = %75, %16
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{i8 0, i8 2}
!15 = !{}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@recivedBuf = external dso_local local_unnamed_addr global [4096 x i8], align 16
@recivedPos = external dso_local local_unnamed_addr global i32, align 4
@recivedEscape = external dso_local local_unnamed_addr global i8, align 1
@mCurrentPort = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: read, inaccessiblemem: none) uwtable
define dso_local void @_Z18SerialPortRecievedP10SerialPortPKcj(ptr noundef readnone %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = load ptr, ptr @mCurrentPort, align 8, !tbaa !5
  %.not = icmp ne ptr %4, null
  %.not14 = icmp ne ptr %4, %0
  %or.cond.not21 = and i1 %.not, %.not14
  %.not17 = icmp eq i32 %2, 0
  %or.cond18 = or i1 %or.cond.not21, %.not17
  br i1 %or.cond18, label %.critedge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %3
  %recivedEscape.promoted = load i8, ptr @recivedEscape, align 1, !tbaa !9
  %recivedPos.promoted = load i32, ptr @recivedPos, align 4, !tbaa !11
  %wide.trip.count = zext i32 %2 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %25
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %25 ]
  %5 = phi i32 [ %recivedPos.promoted, %.lr.ph.preheader ], [ %27, %25 ]
  %6 = phi i8 [ %recivedEscape.promoted, %.lr.ph.preheader ], [ %26, %25 ]
  %7 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv
  %8 = load i8, ptr %7, align 1, !tbaa !13
  %9 = zext i32 %5 to i64
  %10 = icmp ult i32 %5, 4096
  br i1 %10, label %11, label %.critedge

11:                                               ; preds = %.lr.ph
  %12 = trunc nuw i8 %6 to i1
  br i1 %12, label %13, label %19

13:                                               ; preds = %11
  switch i8 %8, label %17 [
    i8 -36, label %.sink.split
    i8 -35, label %14
  ]

14:                                               ; preds = %13
  br label %.sink.split

.sink.split:                                      ; preds = %13, %14
  %.sink = phi i8 [ -37, %14 ], [ -64, %13 ]
  %15 = add nuw nsw i32 %5, 1
  store i32 %15, ptr @recivedPos, align 4, !tbaa !11
  %16 = getelementptr inbounds [4096 x i8], ptr @recivedBuf, i64 0, i64 %9
  store i8 %.sink, ptr %16, align 1, !tbaa !13
  br label %17

17:                                               ; preds = %.sink.split, %13
  %18 = phi i32 [ %5, %13 ], [ %15, %.sink.split ]
  store i8 0, ptr @recivedEscape, align 1, !tbaa !9
  br label %25

19:                                               ; preds = %11
  %20 = icmp eq i8 %8, -37
  br i1 %20, label %21, label %22

21:                                               ; preds = %19
  store i8 1, ptr @recivedEscape, align 1, !tbaa !9
  br label %25

22:                                               ; preds = %19
  %23 = add nuw nsw i32 %5, 1
  store i32 %23, ptr @recivedPos, align 4, !tbaa !11
  %24 = getelementptr inbounds [4096 x i8], ptr @recivedBuf, i64 0, i64 %9
  store i8 %8, ptr %24, align 1, !tbaa !13
  br label %25

25:                                               ; preds = %21, %22, %17
  %26 = phi i8 [ 1, %21 ], [ %6, %22 ], [ 0, %17 ]
  %27 = phi i32 [ %5, %21 ], [ %23, %22 ], [ %18, %17 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.critedge, label %.lr.ph, !llvm.loop !14

.critedge:                                        ; preds = %.lr.ph, %25, %3
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass