; LLVM IR from Ryuk17/SpeechAlgorithms :: WebRTC_AEC/src (aec_core)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.AecCore = type { i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, [128 x float], [128 x float], [128 x float], [65 x float], [65 x float], [65 x float], [65 x float], ptr, [2 x [2080 x float]], [2 x [2080 x float]], [65 x [2 x float]], [65 x [2 x float]], [2080 x [2 x float]], [65 x float], [65 x float], [65 x float], [65 x float], float, float, float, i32, i32, float, float, i32, [64 x float], i32, i16, i16, i16, i32, ptr, ptr, i32, i32, i32, i32, float, float, i32, %struct.PowerLevel, %struct.PowerLevel, %struct.PowerLevel, %struct.PowerLevel, i32, i32, %struct.Stats, %struct.Stats, %struct.Stats, %struct.Stats, i32, i32, float, [75 x i32], i32, ptr, ptr, i32, i32 }
%struct.PowerLevel = type { float, i32, float, float, i32, float, float }
%struct.Stats = type { float, float, float, float, float, float, float, i32, i32 }

@.str = external hidden unnamed_addr constant [13 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@__PRETTY_FUNCTION__.WebRtcAec_GetDelayMetricsCore = external hidden unnamed_addr constant [59 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [12 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @WebRtcAec_GetDelayMetricsCore(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca float, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.AecCore, ptr %15, i32 0, i32 44
  %17 = load i32, ptr %16, align 4, !tbaa !11
  %18 = mul nsw i32 %17, 8
  %19 = sdiv i32 64, %18
  store i32 %19, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store float 0.000000e+00, ptr %13, align 4, !tbaa !17
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %22, label %23

22:                                               ; preds = %3
  br label %24

23:                                               ; preds = %3
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 691, ptr noundef @__PRETTY_FUNCTION__.WebRtcAec_GetDelayMetricsCore) #6
  unreachable

24:                                               ; preds = %22
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = icmp ne ptr %25, null
  br i1 %26, label %27, label %28

27:                                               ; preds = %24
  br label %29

28:                                               ; preds = %24
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 692, ptr noundef @__PRETTY_FUNCTION__.WebRtcAec_GetDelayMetricsCore) #6
  unreachable

29:                                               ; preds = %27
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = icmp ne ptr %30, null
  br i1 %31, label %32, label %33

32:                                               ; preds = %29
  br label %34

33:                                               ; preds = %29
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 693, ptr noundef @__PRETTY_FUNCTION__.WebRtcAec_GetDelayMetricsCore) #6
  unreachable

34:                                               ; preds = %32
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.AecCore, ptr %35, i32 0, i32 64
  %37 = load i32, ptr %36, align 4, !tbaa !18
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %39, label %40

39:                                               ; preds = %34
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %14, align 4
  br label %127

40:                                               ; preds = %34
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %53, %40
  %42 = load i32, ptr %8, align 4, !tbaa !9
  %43 = icmp slt i32 %42, 75
  br i1 %43, label %44, label %56

44:                                               ; preds = %41
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.AecCore, ptr %45, i32 0, i32 63
  %47 = load i32, ptr %8, align 4, !tbaa !9
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [75 x i32], ptr %46, i64 0, i64 %48
  %50 = load i32, ptr %49, align 4, !tbaa !9
  %51 = load i32, ptr %10, align 4, !tbaa !9
  %52 = add nsw i32 %51, %50
  store i32 %52, ptr %10, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %44
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %8, align 4, !tbaa !9
  br label %41, !llvm.loop !19

56:                                               ; preds = %41
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = icmp eq i32 %57, 0
  br i1 %58, label %59, label %62

59:                                               ; preds = %56
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 -1, ptr %60, align 4, !tbaa !9
  %61 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 -1, ptr %61, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  store i32 1, ptr %14, align 4
  br label %127

62:                                               ; preds = %56
  %63 = load i32, ptr %10, align 4, !tbaa !9
  %64 = ashr i32 %63, 1
  store i32 %64, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %82, %62
  %66 = load i32, ptr %8, align 4, !tbaa !9
  %67 = icmp slt i32 %66, 75
  br i1 %67, label %68, label %85

68:                                               ; preds = %65
  %69 = load ptr, ptr %5, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.AecCore, ptr %69, i32 0, i32 63
  %71 = load i32, ptr %8, align 4, !tbaa !9
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [75 x i32], ptr %70, i64 0, i64 %72
  %74 = load i32, ptr %73, align 4, !tbaa !9
  %75 = load i32, ptr %9, align 4, !tbaa !9
  %76 = sub nsw i32 %75, %74
  store i32 %76, ptr %9, align 4, !tbaa !9
  %77 = load i32, ptr %9, align 4, !tbaa !9
  %78 = icmp slt i32 %77, 0
  br i1 %78, label %79, label %81

79:                                               ; preds = %68
  %80 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %80, ptr %11, align 4, !tbaa !9
  br label %85

81:                                               ; preds = %68
  br label %82

82:                                               ; preds = %81
  %83 = load i32, ptr %8, align 4, !tbaa !9
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %8, align 4, !tbaa !9
  br label %65, !llvm.loop !21

85:                                               ; preds = %79, %65
  %86 = load i32, ptr %11, align 4, !tbaa !9
  %87 = sub nsw i32 %86, 15
  %88 = load i32, ptr %12, align 4, !tbaa !9
  %89 = mul nsw i32 %87, %88
  %90 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 %89, ptr %90, align 4, !tbaa !9
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %91

91:                                               ; preds = %111, %85
  %92 = load i32, ptr %8, align 4, !tbaa !9
  %93 = icmp slt i32 %92, 75
  br i1 %93, label %94, label %114

94:                                               ; preds = %91
  %95 = load i32, ptr %8, align 4, !tbaa !9
  %96 = load i32, ptr %11, align 4, !tbaa !9
  %97 = sub nsw i32 %95, %96
  %98 = sitofp i32 %97 to double
  %99 = call double @llvm.fabs.f64(double %98)
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = getelementptr inbounds %struct.AecCore, ptr %100, i32 0, i32 63
  %102 = load i32, ptr %8, align 4, !tbaa !9
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds [75 x i32], ptr %101, i64 0, i64 %103
  %105 = load i32, ptr %104, align 4, !tbaa !9
  %106 = sitofp i32 %105 to double
  %107 = fmul double %99, %106
  %108 = fptrunc double %107 to float
  %109 = load float, ptr %13, align 4, !tbaa !17
  %110 = fadd float %109, %108
  store float %110, ptr %13, align 4, !tbaa !17
  br label %111

111:                                              ; preds = %94
  %112 = load i32, ptr %8, align 4, !tbaa !9
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %8, align 4, !tbaa !9
  br label %91, !llvm.loop !22

114:                                              ; preds = %91
  %115 = load float, ptr %13, align 4, !tbaa !17
  %116 = load i32, ptr %10, align 4, !tbaa !9
  %117 = sitofp i32 %116 to float
  %118 = fdiv float %115, %117
  %119 = fadd float %118, 5.000000e-01
  %120 = fptosi float %119 to i32
  %121 = load i32, ptr %12, align 4, !tbaa !9
  %122 = mul nsw i32 %120, %121
  %123 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 %122, ptr %123, align 4, !tbaa !9
  %124 = load ptr, ptr %5, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.AecCore, ptr %124, i32 0, i32 63
  %126 = getelementptr inbounds [75 x i32], ptr %125, i64 0, i64 0
  call void @llvm.memset.p0.i64(ptr align 8 %126, i8 0, i64 300, i1 false)
  store i32 0, ptr %4, align 4
  store i32 1, ptr %14, align 4
  br label %127

127:                                              ; preds = %114, %59, %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  %128 = load i32, ptr %4, align 4
  ret i32 %128
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #4

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 54964}
!12 = !{!"AecCore", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !7, i64 56, !7, i64 568, !7, i64 1080, !7, i64 1592, !7, i64 1852, !7, i64 2112, !7, i64 2372, !6, i64 2632, !7, i64 2640, !7, i64 19280, !7, i64 35920, !7, i64 36440, !7, i64 36960, !7, i64 53600, !7, i64 53860, !7, i64 54120, !7, i64 54380, !13, i64 54640, !13, i64 54644, !13, i64 54648, !10, i64 54652, !10, i64 54656, !13, i64 54660, !13, i64 54664, !10, i64 54668, !7, i64 54672, !10, i64 54928, !14, i64 54932, !14, i64 54934, !14, i64 54936, !10, i64 54940, !6, i64 54944, !6, i64 54952, !10, i64 54960, !10, i64 54964, !10, i64 54968, !10, i64 54972, !13, i64 54976, !13, i64 54980, !10, i64 54984, !15, i64 54988, !15, i64 55016, !15, i64 55044, !15, i64 55072, !10, i64 55100, !10, i64 55104, !16, i64 55108, !16, i64 55144, !16, i64 55180, !16, i64 55216, !10, i64 55252, !10, i64 55256, !13, i64 55260, !7, i64 55264, !10, i64 55564, !6, i64 55568, !6, i64 55576, !10, i64 55584, !10, i64 55588}
!13 = !{!"float", !7, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!"PowerLevel", !13, i64 0, !10, i64 4, !13, i64 8, !13, i64 12, !10, i64 16, !13, i64 20, !13, i64 24}
!16 = !{!"Stats", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !13, i64 20, !13, i64 24, !10, i64 28, !10, i64 32}
!17 = !{!13, !13, i64 0}
!18 = !{!12, !10, i64 55564}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = distinct !{!22, !20}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [83 x i8], align 1
@__PRETTY_FUNCTION__.WebRtcAec_GetDelayMetricsCore = external hidden unnamed_addr constant [59 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [12 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @WebRtcAec_GetDelayMetricsCore(ptr noundef %0, ptr noundef writeonly %1, ptr noundef writeonly %2) local_unnamed_addr #1 {
  %4 = getelementptr inbounds i8, ptr %0, i64 54964
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %6 = shl nsw i32 %5, 3
  %7 = sdiv i32 64, %6
  %.not45 = icmp eq ptr %1, null
  br i1 %.not45, label %8, label %9

8:                                                ; preds = %3
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 692, ptr noundef nonnull @__PRETTY_FUNCTION__.WebRtcAec_GetDelayMetricsCore) #5
  unreachable

9:                                                ; preds = %3
  %.not46 = icmp eq ptr %2, null
  br i1 %.not46, label %10, label %11

10:                                               ; preds = %9
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 693, ptr noundef nonnull @__PRETTY_FUNCTION__.WebRtcAec_GetDelayMetricsCore) #5
  unreachable

11:                                               ; preds = %9
  %12 = getelementptr inbounds i8, ptr %0, i64 55564
  %13 = load i32, ptr %12, align 4, !tbaa !15
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %88, label %.preheader

.preheader:                                       ; preds = %11
  %15 = getelementptr inbounds i8, ptr %0, i64 55264
  %16 = load <64 x i32>, ptr %15, align 4, !tbaa !16
  %17 = getelementptr inbounds i8, ptr %0, i64 55520
  %18 = load <8 x i32>, ptr %17, align 4, !tbaa !16
  %19 = getelementptr inbounds i8, ptr %0, i64 55552
  %20 = load i32, ptr %19, align 4, !tbaa !16
  %21 = getelementptr inbounds i8, ptr %0, i64 55556
  %22 = load i32, ptr %21, align 4, !tbaa !16
  %23 = getelementptr inbounds i8, ptr %0, i64 55560
  %24 = load i32, ptr %23, align 4, !tbaa !16
  %25 = tail call i32 @llvm.vector.reduce.add.v64i32(<64 x i32> %16)
  %26 = tail call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %18)
  %op.rdx = add i32 %25, %26
  %op.rdx63 = add i32 %op.rdx, %20
  %op.rdx64 = add i32 %22, %24
  %op.rdx65 = add i32 %op.rdx63, %op.rdx64
  %27 = icmp eq i32 %op.rdx65, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %.preheader
  store i32 -1, ptr %1, align 4, !tbaa !16
  store i32 -1, ptr %2, align 4, !tbaa !16
  br label %88

29:                                               ; preds = %.preheader
  %30 = ashr i32 %op.rdx65, 1
  br label %31

31:                                               ; preds = %56, %29
  %indvars.iv = phi i64 [ 0, %29 ], [ %indvars.iv.next.4, %56 ]
  %.03950 = phi i32 [ %30, %29 ], [ %54, %56 ]
  %32 = getelementptr inbounds [75 x i32], ptr %15, i64 0, i64 %indvars.iv
  %33 = load i32, ptr %32, align 4, !tbaa !16
  %34 = sub nsw i32 %.03950, %33
  %35 = icmp slt i32 %34, 0
  br i1 %35, label %.split.loop.exit, label %36

36:                                               ; preds = %31
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %37 = getelementptr inbounds [75 x i32], ptr %15, i64 0, i64 %indvars.iv.next
  %38 = load i32, ptr %37, align 4, !tbaa !16
  %39 = sub nsw i32 %34, %38
  %40 = icmp slt i32 %39, 0
  br i1 %40, label %.split.loop.exit, label %41

41:                                               ; preds = %36
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %42 = getelementptr inbounds [75 x i32], ptr %15, i64 0, i64 %indvars.iv.next.1
  %43 = load i32, ptr %42, align 4, !tbaa !16
  %44 = sub nsw i32 %39, %43
  %45 = icmp slt i32 %44, 0
  br i1 %45, label %.split.loop.exit, label %46

46:                                               ; preds = %41
  %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
  %47 = getelementptr inbounds [75 x i32], ptr %15, i64 0, i64 %indvars.iv.next.2
  %48 = load i32, ptr %47, align 4, !tbaa !16
  %49 = sub nsw i32 %44, %48
  %50 = icmp slt i32 %49, 0
  br i1 %50, label %.split.loop.exit, label %51

51:                                               ; preds = %46
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %52 = getelementptr inbounds [75 x i32], ptr %15, i64 0, i64 %indvars.iv.next.3
  %53 = load i32, ptr %52, align 4, !tbaa !16
  %54 = sub nsw i32 %49, %53
  %55 = icmp slt i32 %54, 0
  br i1 %55, label %.split.loop.exit, label %56

56:                                               ; preds = %51
  %indvars.iv.next.4 = add nuw nsw i64 %indvars.iv, 5
  %exitcond.not.4 = icmp eq i64 %indvars.iv.next.4, 75
  br i1 %exitcond.not.4, label %.split.loop.exit60, label %31, !llvm.loop !17

.split.loop.exit:                                 ; preds = %51, %46, %41, %36, %31
  %indvars.iv.lcssa = phi i64 [ %indvars.iv, %31 ], [ %indvars.iv.next, %36 ], [ %indvars.iv.next.1, %41 ], [ %indvars.iv.next.2, %46 ], [ %indvars.iv.next.3, %51 ]
  %57 = trunc nuw nsw i64 %indvars.iv.lcssa to i32
  br label %.split.loop.exit60

.split.loop.exit60:                               ; preds = %56, %.split.loop.exit
  %.037 = phi i32 [ %57, %.split.loop.exit ], [ 0, %56 ]
  %58 = add nsw i32 %.037, -15
  %59 = mul nsw i32 %58, %7
  store i32 %59, ptr %1, align 4, !tbaa !16
  br label %60

60:                                               ; preds = %71, %.split.loop.exit60
  %indvars.iv56 = phi i64 [ 0, %.split.loop.exit60 ], [ %indvars.iv.next57.1, %71 ]
  %.052 = phi float [ 0.000000e+00, %.split.loop.exit60 ], [ %81, %71 ]
  %61 = trunc i64 %indvars.iv56 to i32
  %62 = sub i32 %61, %.037
  %63 = sitofp i32 %62 to double
  %64 = tail call double @llvm.fabs.f64(double %63)
  %65 = getelementptr inbounds [75 x i32], ptr %15, i64 0, i64 %indvars.iv56
  %66 = load i32, ptr %65, align 4, !tbaa !16
  %67 = sitofp i32 %66 to double
  %68 = fmul double %64, %67
  %69 = fptrunc double %68 to float
  %70 = fadd float %.052, %69
  %exitcond59.not = icmp eq i64 %indvars.iv56, 74
  br i1 %exitcond59.not, label %82, label %71, !llvm.loop !19

71:                                               ; preds = %60
  %indvars.iv.next57 = or disjoint i64 %indvars.iv56, 1
  %72 = trunc i64 %indvars.iv.next57 to i32
  %73 = sub i32 %72, %.037
  %74 = sitofp i32 %73 to double
  %75 = tail call double @llvm.fabs.f64(double %74)
  %76 = getelementptr inbounds [75 x i32], ptr %15, i64 0, i64 %indvars.iv.next57
  %77 = load i32, ptr %76, align 4, !tbaa !16
  %78 = sitofp i32 %77 to double
  %79 = fmul double %75, %78
  %80 = fptrunc double %79 to float
  %81 = fadd float %70, %80
  %indvars.iv.next57.1 = add nuw nsw i64 %indvars.iv56, 2
  br label %60

82:                                               ; preds = %60
  %83 = sitofp i32 %op.rdx65 to float
  %84 = fdiv float %70, %83
  %85 = fadd float %84, 5.000000e-01
  %86 = fptosi float %85 to i32
  %87 = mul nsw i32 %7, %86
  store i32 %87, ptr %2, align 4, !tbaa !16
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(300) %15, i8 0, i64 300, i1 false)
  br label %88

88:                                               ; preds = %11, %82, %28
  %.036 = phi i32 [ 0, %28 ], [ 0, %82 ], [ -1, %11 ]
  ret i32 %.036
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v64i32(<64 x i32>) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v8i32(<8 x i32>) #4

attributes #0 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 54964}
!6 = !{!"AecCore", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !8, i64 56, !8, i64 568, !8, i64 1080, !8, i64 1592, !8, i64 1852, !8, i64 2112, !8, i64 2372, !10, i64 2632, !8, i64 2640, !8, i64 19280, !8, i64 35920, !8, i64 36440, !8, i64 36960, !8, i64 53600, !8, i64 53860, !8, i64 54120, !8, i64 54380, !11, i64 54640, !11, i64 54644, !11, i64 54648, !7, i64 54652, !7, i64 54656, !11, i64 54660, !11, i64 54664, !7, i64 54668, !8, i64 54672, !7, i64 54928, !12, i64 54932, !12, i64 54934, !12, i64 54936, !7, i64 54940, !10, i64 54944, !10, i64 54952, !7, i64 54960, !7, i64 54964, !7, i64 54968, !7, i64 54972, !11, i64 54976, !11, i64 54980, !7, i64 54984, !13, i64 54988, !13, i64 55016, !13, i64 55044, !13, i64 55072, !7, i64 55100, !7, i64 55104, !14, i64 55108, !14, i64 55144, !14, i64 55180, !14, i64 55216, !7, i64 55252, !7, i64 55256, !11, i64 55260, !8, i64 55264, !7, i64 55564, !10, i64 55568, !10, i64 55576, !7, i64 55584, !7, i64 55588}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"float", !8, i64 0}
!12 = !{!"short", !8, i64 0}
!13 = !{!"PowerLevel", !11, i64 0, !7, i64 4, !11, i64 8, !11, i64 12, !7, i64 16, !11, i64 20, !11, i64 24}
!14 = !{!"Stats", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !7, i64 28, !7, i64 32}
!15 = !{!6, !7, i64 55564}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass