; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (ina219)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ina219_read.str = external hidden constant [30 x i8], align 4
@mResistance = external hidden global float, align 4
@mAddress = external hidden global i32, align 4
@ina219_read.str.1 = external hidden constant [41 x i8], align 4
@ina219_read.str.2 = external hidden constant [32 x i8], align 4
@ina219_read.str.3 = external hidden constant [28 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @ina219_read(i32 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i16, align 2
  %15 = alloca [12 x i8], align 1
  %16 = alloca i32, align 4
  %17 = alloca i8, align 1
  store i32 %0, ptr %7, align 4, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !9
  store ptr %3, ptr %10, align 8, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = icmp ne i32 %18, -1
  br i1 %19, label %20, label %34

20:                                               ; preds = %5
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = icmp ne i32 %21, -1
  br i1 %22, label %23, label %34

23:                                               ; preds = %20
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = call i32 @dh_i2c_init(i32 noundef %24, i32 noundef %25)
  store i32 %26, ptr %12, align 4, !tbaa !5
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %33

28:                                               ; preds = %23
  br label %29

29:                                               ; preds = %28
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ina219_read.str)
  br label %30

30:                                               ; preds = %29
  br label %31

31:                                               ; preds = %30
  %32 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %32, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %123

33:                                               ; preds = %23
  br label %34

34:                                               ; preds = %33, %20, %5
  call void @llvm.lifetime.start.p0(i64 2, ptr %14) #5
  %35 = load float, ptr @mResistance, align 4, !tbaa !11
  %36 = fdiv float 4.096000e+03, %35
  %37 = fptosi float %36 to i32
  %38 = trunc i32 %37 to i16
  store i16 %38, ptr %14, align 2, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 12, ptr %15) #5
  %39 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 0
  store i8 5, ptr %39, align 1, !tbaa !15
  %40 = load i16, ptr %14, align 2, !tbaa !13
  %41 = zext i16 %40 to i32
  %42 = ashr i32 %41, 8
  %43 = and i32 %42, 255
  %44 = trunc i32 %43 to i8
  %45 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 1
  store i8 %44, ptr %45, align 1, !tbaa !15
  %46 = load i16, ptr %14, align 2, !tbaa !13
  %47 = zext i16 %46 to i32
  %48 = and i32 %47, 255
  %49 = trunc i32 %48 to i8
  %50 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 2
  store i8 %49, ptr %50, align 1, !tbaa !15
  %51 = load i32, ptr @mAddress, align 4, !tbaa !5
  %52 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 0
  %53 = call i32 @dh_i2c_write(i32 noundef %51, ptr noundef %52, i32 noundef 3, i32 noundef 1)
  store i32 %53, ptr %12, align 4, !tbaa !5
  %54 = icmp ne i32 %53, 0
  br i1 %54, label %55, label %60

55:                                               ; preds = %34
  br label %56

56:                                               ; preds = %55
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ina219_read.str.1)
  br label %57

57:                                               ; preds = %56
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %59, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %122

60:                                               ; preds = %34
  call void @ets_delay_us(i32 noundef 600)
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store i32 1, ptr %16, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %92, %60
  %62 = load i32, ptr %16, align 4, !tbaa !5
  %63 = icmp slt i32 %62, 5
  br i1 %63, label %64, label %95

64:                                               ; preds = %61
  call void @llvm.lifetime.start.p0(i64 1, ptr %17) #5
  %65 = load i32, ptr %16, align 4, !tbaa !5
  %66 = trunc i32 %65 to i8
  store i8 %66, ptr %17, align 1, !tbaa !15
  %67 = load i32, ptr @mAddress, align 4, !tbaa !5
  %68 = call i32 @dh_i2c_write(i32 noundef %67, ptr noundef %17, i32 noundef 1, i32 noundef 0)
  store i32 %68, ptr %12, align 4, !tbaa !5
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %75

70:                                               ; preds = %64
  br label %71

71:                                               ; preds = %70
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ina219_read.str.2)
  br label %72

72:                                               ; preds = %71
  br label %73

73:                                               ; preds = %72
  %74 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %74, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %89

75:                                               ; preds = %64
  %76 = load i32, ptr @mAddress, align 4, !tbaa !5
  %77 = load i32, ptr %16, align 4, !tbaa !5
  %78 = mul nsw i32 %77, 2
  %79 = sext i32 %78 to i64
  %80 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 %79
  %81 = call i32 @dh_i2c_read(i32 noundef %76, ptr noundef %80, i32 noundef 2)
  store i32 %81, ptr %12, align 4, !tbaa !5
  %82 = icmp ne i32 %81, 0
  br i1 %82, label %83, label %88

83:                                               ; preds = %75
  br label %84

84:                                               ; preds = %83
  call void (ptr, ...) @dhdebug_ram(ptr noundef @ina219_read.str.3)
  br label %85

85:                                               ; preds = %84
  br label %86

86:                                               ; preds = %85
  %87 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %87, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %89

88:                                               ; preds = %75
  store i32 0, ptr %13, align 4
  br label %89

89:                                               ; preds = %88, %86, %73
  call void @llvm.lifetime.end.p0(i64 1, ptr %17) #5
  %90 = load i32, ptr %13, align 4
  switch i32 %90, label %121 [
    i32 0, label %91
  ]

91:                                               ; preds = %89
  br label %92

92:                                               ; preds = %91
  %93 = load i32, ptr %16, align 4, !tbaa !5
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %16, align 4, !tbaa !5
  br label %61, !llvm.loop !16

95:                                               ; preds = %61
  %96 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 4
  %97 = load i8, ptr %96, align 1, !tbaa !15
  %98 = zext i8 %97 to i32
  %99 = uitofp i32 %98 to float
  %100 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 5
  %101 = load i8, ptr %100, align 1, !tbaa !15
  %102 = sext i8 %101 to i32
  %103 = icmp sgt i32 %102, 3
  %104 = zext i1 %103 to i32
  %105 = sitofp i32 %104 to float
  %106 = call float @llvm.fmuladd.f32(float %99, float 3.200000e+01, float %105)
  %107 = fdiv float %106, 8.000000e+03
  %108 = fmul float %107, 3.200000e+01
  %109 = load ptr, ptr %9, align 8, !tbaa !9
  store float %108, ptr %109, align 4, !tbaa !11
  %110 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 0
  %111 = call i32 @signedInt16be(ptr noundef %110, i32 noundef 8)
  %112 = sitofp i32 %111 to float
  %113 = fdiv float %112, 1.000000e+05
  %114 = load ptr, ptr %10, align 8, !tbaa !9
  store float %113, ptr %114, align 4, !tbaa !11
  %115 = getelementptr inbounds [12 x i8], ptr %15, i64 0, i64 0
  %116 = call i32 @unsignedInt16be(ptr noundef %115, i32 noundef 6)
  %117 = uitofp i32 %116 to float
  %118 = fdiv float %117, 1.000000e+05
  %119 = fmul float %118, 2.000000e+01
  %120 = load ptr, ptr %11, align 8, !tbaa !9
  store float %119, ptr %120, align 4, !tbaa !11
  store i32 0, ptr %6, align 4
  store i32 1, ptr %13, align 4
  br label %121

121:                                              ; preds = %95, %89
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  br label %122

122:                                              ; preds = %121, %58
  call void @llvm.lifetime.end.p0(i64 12, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 2, ptr %14) #5
  br label %123

123:                                              ; preds = %122, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  %124 = load i32, ptr %6, align 4
  ret i32 %124
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) #2

declare void @dhdebug_ram(ptr noundef, ...) #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #2

declare void @ets_delay_us(i32 noundef) #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16be(ptr noundef, i32 noundef) #4

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @unsignedInt16be(ptr noundef, i32 noundef) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@ina219_read.str = external hidden constant [30 x i8], align 4
@mResistance = external hidden local_unnamed_addr global float, align 4
@mAddress = external hidden local_unnamed_addr global i32, align 4
@ina219_read.str.1 = external hidden constant [41 x i8], align 4
@ina219_read.str.2 = external hidden constant [32 x i8], align 4
@ina219_read.str.3 = external hidden constant [28 x i8], align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @ina219_read(i32 noundef %0, i32 noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #0 {
  %6 = alloca [12 x i8], align 1
  %7 = alloca i8, align 1
  %8 = icmp ne i32 %0, -1
  %9 = icmp ne i32 %1, -1
  %or.cond = and i1 %8, %9
  br i1 %or.cond, label %10, label %13

10:                                               ; preds = %5
  %11 = tail call i32 @dh_i2c_init(i32 noundef %0, i32 noundef %1) #5
  %.not = icmp eq i32 %11, 0
  br i1 %.not, label %13, label %12

12:                                               ; preds = %10
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @ina219_read.str) #5
  br label %70

13:                                               ; preds = %10, %5
  %14 = load float, ptr @mResistance, align 4, !tbaa !5
  %15 = fdiv float 4.096000e+03, %14
  %16 = fptosi float %15 to i32
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %6) #5
  store i8 5, ptr %6, align 1, !tbaa !9
  %17 = lshr i32 %16, 8
  %18 = trunc i32 %17 to i8
  %19 = getelementptr inbounds i8, ptr %6, i64 1
  store i8 %18, ptr %19, align 1, !tbaa !9
  %20 = trunc i32 %16 to i8
  %21 = getelementptr inbounds i8, ptr %6, i64 2
  store i8 %20, ptr %21, align 1, !tbaa !9
  %22 = load i32, ptr @mAddress, align 4, !tbaa !10
  %23 = call i32 @dh_i2c_write(i32 noundef %22, ptr noundef nonnull %6, i32 noundef 3, i32 noundef 1) #5
  %.not27 = icmp eq i32 %23, 0
  br i1 %.not27, label %25, label %24

24:                                               ; preds = %13
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @ina219_read.str.1) #5
  br label %69

25:                                               ; preds = %13
  call void @ets_delay_us(i32 noundef 600) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #5
  store i8 1, ptr %7, align 1, !tbaa !9
  %26 = load i32, ptr @mAddress, align 4, !tbaa !10
  %27 = call i32 @dh_i2c_write(i32 noundef %26, ptr noundef nonnull %7, i32 noundef 1, i32 noundef 0) #5
  %.not28 = icmp eq i32 %27, 0
  br i1 %.not28, label %28, label %.thread

28:                                               ; preds = %25
  %29 = load i32, ptr @mAddress, align 4, !tbaa !10
  %30 = call i32 @dh_i2c_read(i32 noundef %29, ptr noundef nonnull %21, i32 noundef 2) #5
  %.not29 = icmp eq i32 %30, 0
  br i1 %.not29, label %31, label %.thread

.thread:                                          ; preds = %28, %34, %41, %48, %25, %31, %38, %45
  %ina219_read.str.2.sink = phi ptr [ @ina219_read.str.2, %45 ], [ @ina219_read.str.2, %38 ], [ @ina219_read.str.2, %31 ], [ @ina219_read.str.2, %25 ], [ @ina219_read.str.3, %48 ], [ @ina219_read.str.3, %41 ], [ @ina219_read.str.3, %34 ], [ @ina219_read.str.3, %28 ]
  %.1.ph = phi i32 [ %47, %45 ], [ %40, %38 ], [ %33, %31 ], [ %27, %25 ], [ %51, %48 ], [ %44, %41 ], [ %37, %34 ], [ %30, %28 ]
  call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull %ina219_read.str.2.sink) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #5
  br label %69

31:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #5
  store i8 2, ptr %7, align 1, !tbaa !9
  %32 = load i32, ptr @mAddress, align 4, !tbaa !10
  %33 = call i32 @dh_i2c_write(i32 noundef %32, ptr noundef nonnull %7, i32 noundef 1, i32 noundef 0) #5
  %.not28.1 = icmp eq i32 %33, 0
  br i1 %.not28.1, label %34, label %.thread

34:                                               ; preds = %31
  %35 = load i32, ptr @mAddress, align 4, !tbaa !10
  %36 = getelementptr inbounds i8, ptr %6, i64 4
  %37 = call i32 @dh_i2c_read(i32 noundef %35, ptr noundef nonnull %36, i32 noundef 2) #5
  %.not29.1 = icmp eq i32 %37, 0
  br i1 %.not29.1, label %38, label %.thread

38:                                               ; preds = %34
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #5
  store i8 3, ptr %7, align 1, !tbaa !9
  %39 = load i32, ptr @mAddress, align 4, !tbaa !10
  %40 = call i32 @dh_i2c_write(i32 noundef %39, ptr noundef nonnull %7, i32 noundef 1, i32 noundef 0) #5
  %.not28.2 = icmp eq i32 %40, 0
  br i1 %.not28.2, label %41, label %.thread

41:                                               ; preds = %38
  %42 = load i32, ptr @mAddress, align 4, !tbaa !10
  %43 = getelementptr inbounds i8, ptr %6, i64 6
  %44 = call i32 @dh_i2c_read(i32 noundef %42, ptr noundef nonnull %43, i32 noundef 2) #5
  %.not29.2 = icmp eq i32 %44, 0
  br i1 %.not29.2, label %45, label %.thread

45:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %7) #5
  store i8 4, ptr %7, align 1, !tbaa !9
  %46 = load i32, ptr @mAddress, align 4, !tbaa !10
  %47 = call i32 @dh_i2c_write(i32 noundef %46, ptr noundef nonnull %7, i32 noundef 1, i32 noundef 0) #5
  %.not28.3 = icmp eq i32 %47, 0
  br i1 %.not28.3, label %48, label %.thread

48:                                               ; preds = %45
  %49 = load i32, ptr @mAddress, align 4, !tbaa !10
  %50 = getelementptr inbounds i8, ptr %6, i64 8
  %51 = call i32 @dh_i2c_read(i32 noundef %49, ptr noundef nonnull %50, i32 noundef 2) #5
  %.not29.3 = icmp eq i32 %51, 0
  br i1 %.not29.3, label %52, label %.thread

52:                                               ; preds = %48
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %7) #5
  %53 = load i8, ptr %36, align 1, !tbaa !9
  %54 = uitofp i8 %53 to float
  %55 = getelementptr inbounds i8, ptr %6, i64 5
  %56 = load i8, ptr %55, align 1, !tbaa !9
  %57 = icmp sgt i8 %56, 3
  %58 = uitofp i1 %57 to float
  %59 = call float @llvm.fmuladd.f32(float %54, float 3.200000e+01, float %58)
  %60 = fdiv float %59, 8.000000e+03
  %61 = fmul float %60, 3.200000e+01
  store float %61, ptr %2, align 4, !tbaa !5
  %62 = call i32 @signedInt16be(ptr noundef nonnull %6, i32 noundef 8)
  %63 = sitofp i32 %62 to float
  %64 = fdiv float %63, 1.000000e+05
  store float %64, ptr %3, align 4, !tbaa !5
  %65 = call i32 @unsignedInt16be(ptr noundef nonnull %6, i32 noundef 6)
  %66 = uitofp i32 %65 to float
  %67 = fdiv float %66, 1.000000e+05
  %68 = fmul float %67, 2.000000e+01
  store float %68, ptr %4, align 4, !tbaa !5
  br label %69

69:                                               ; preds = %.thread, %52, %24
  %.3 = phi i32 [ %23, %24 ], [ 0, %52 ], [ %.1.ph, %.thread ]
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %6) #5
  br label %70

70:                                               ; preds = %69, %12
  %.4 = phi i32 [ %11, %12 ], [ %.3, %69 ]
  ret i32 %.4
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #2

declare i32 @dh_i2c_write(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @ets_delay_us(i32 noundef) local_unnamed_addr #2

declare i32 @dh_i2c_read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @signedInt16be(ptr noundef, i32 noundef) local_unnamed_addr #4

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @unsignedInt16be(ptr noundef, i32 noundef) local_unnamed_addr #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass