; LLVM IR from aferikoglou/GenHLSOptimizer :: dataset/rodinia-knn-3-unroll (knn)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @compute_dist(ptr noundef %0, ptr noundef %1, ptr noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca float, align 4
  %8 = alloca float, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  br label %13

13:                                               ; preds = %3
  br label %14

14:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %67, %14
  %16 = load i32, ptr %9, align 4, !tbaa !9
  %17 = icmp slt i32 %16, 512
  br i1 %17, label %19, label %18

18:                                               ; preds = %15
  store i32 4, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %70

19:                                               ; preds = %15
  br label %20

20:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %63, %20
  %22 = load i32, ptr %11, align 4, !tbaa !9
  %23 = icmp slt i32 %22, 2
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  store i32 8, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %66

25:                                               ; preds = %21
  store float 0.000000e+00, ptr %7, align 4, !tbaa !11
  br label %26

26:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %52, %26
  %28 = load i32, ptr %12, align 4, !tbaa !9
  %29 = icmp slt i32 %28, 2
  br i1 %29, label %31, label %30

30:                                               ; preds = %27
  store i32 12, ptr %10, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  br label %55

31:                                               ; preds = %27
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = load i32, ptr %11, align 4, !tbaa !9
  %35 = add nsw i32 %33, %34
  %36 = mul nsw i32 %35, 2
  %37 = load i32, ptr %12, align 4, !tbaa !9
  %38 = add nsw i32 %36, %37
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds float, ptr %32, i64 %39
  %41 = load float, ptr %40, align 4, !tbaa !11
  %42 = load ptr, ptr %4, align 8, !tbaa !5
  %43 = load i32, ptr %12, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds float, ptr %42, i64 %44
  %46 = load float, ptr %45, align 4, !tbaa !11
  %47 = fsub float %41, %46
  store float %47, ptr %8, align 4, !tbaa !11
  %48 = load float, ptr %8, align 4, !tbaa !11
  %49 = load float, ptr %8, align 4, !tbaa !11
  %50 = load float, ptr %7, align 4, !tbaa !11
  %51 = call float @llvm.fmuladd.f32(float %48, float %49, float %50)
  store float %51, ptr %7, align 4, !tbaa !11
  br label %52

52:                                               ; preds = %31
  %53 = load i32, ptr %12, align 4, !tbaa !9
  %54 = add nsw i32 %53, 1
  store i32 %54, ptr %12, align 4, !tbaa !9
  br label %27, !llvm.loop !13

55:                                               ; preds = %30
  %56 = load float, ptr %7, align 4, !tbaa !11
  %57 = load ptr, ptr %6, align 8, !tbaa !5
  %58 = load i32, ptr %9, align 4, !tbaa !9
  %59 = load i32, ptr %11, align 4, !tbaa !9
  %60 = add nsw i32 %58, %59
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds float, ptr %57, i64 %61
  store float %56, ptr %62, align 4, !tbaa !11
  br label %63

63:                                               ; preds = %55
  %64 = load i32, ptr %11, align 4, !tbaa !9
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %11, align 4, !tbaa !9
  br label %21, !llvm.loop !15

66:                                               ; preds = %24
  br label %67

67:                                               ; preds = %66
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = add nsw i32 %68, 2
  store i32 %69, ptr %9, align 4, !tbaa !9
  br label %15, !llvm.loop !16

70:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @compute_dist(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
vector.memcheck:
  %3 = getelementptr inbounds i8, ptr %0, i64 4
  %scevgep = getelementptr i8, ptr %2, i64 2048
  %scevgep29 = getelementptr i8, ptr %1, i64 4096
  %scevgep30 = getelementptr i8, ptr %0, i64 8
  %bound0 = icmp ugt ptr %scevgep29, %2
  %bound1 = icmp ugt ptr %scevgep, %1
  %found.conflict = and i1 %bound0, %bound1
  %bound031 = icmp ugt ptr %scevgep30, %2
  %bound132 = icmp ugt ptr %scevgep, %0
  %found.conflict33 = and i1 %bound031, %bound132
  %conflict.rdx = or i1 %found.conflict, %found.conflict33
  br i1 %conflict.rdx, label %.preheader21, label %vector.body.preheader

vector.body.preheader:                            ; preds = %vector.memcheck
  %invariant.gep = getelementptr i8, ptr %2, i64 -4
  br label %vector.body

vector.body:                                      ; preds = %vector.body.preheader, %vector.body
  %index = phi i64 [ %index.next, %vector.body ], [ 0, %vector.body.preheader ]
  %offset.idx = shl i64 %index, 1
  %.idx = shl i64 %index, 4
  %4 = getelementptr inbounds i8, ptr %1, i64 %.idx
  %wide.vec = load <16 x float>, ptr %4, align 4, !tbaa !5
  %strided.vec = shufflevector <16 x float> %wide.vec, <16 x float> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
  %strided.vec34 = shufflevector <16 x float> %wide.vec, <16 x float> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
  %strided.vec35 = shufflevector <16 x float> %wide.vec, <16 x float> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
  %strided.vec36 = shufflevector <16 x float> %wide.vec, <16 x float> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
  %5 = load float, ptr %0, align 4, !tbaa !5, !alias.scope !9
  %broadcast.splatinsert = insertelement <4 x float> poison, float %5, i64 0
  %broadcast.splat = shufflevector <4 x float> %broadcast.splatinsert, <4 x float> poison, <4 x i32> zeroinitializer
  %6 = fsub <4 x float> %strided.vec, %broadcast.splat
  %7 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %6, <4 x float> %6, <4 x float> zeroinitializer)
  %8 = load float, ptr %3, align 4, !tbaa !5, !alias.scope !9
  %broadcast.splatinsert37 = insertelement <4 x float> poison, float %8, i64 0
  %broadcast.splat38 = shufflevector <4 x float> %broadcast.splatinsert37, <4 x float> poison, <4 x i32> zeroinitializer
  %9 = fsub <4 x float> %strided.vec34, %broadcast.splat38
  %10 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %9, <4 x float> %9, <4 x float> %7)
  %11 = load float, ptr %0, align 4, !tbaa !5, !alias.scope !9
  %broadcast.splatinsert39 = insertelement <4 x float> poison, float %11, i64 0
  %broadcast.splat40 = shufflevector <4 x float> %broadcast.splatinsert39, <4 x float> poison, <4 x i32> zeroinitializer
  %12 = fsub <4 x float> %strided.vec35, %broadcast.splat40
  %13 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %12, <4 x float> %12, <4 x float> zeroinitializer)
  %14 = load float, ptr %3, align 4, !tbaa !5, !alias.scope !9
  %broadcast.splatinsert41 = insertelement <4 x float> poison, float %14, i64 0
  %broadcast.splat42 = shufflevector <4 x float> %broadcast.splatinsert41, <4 x float> poison, <4 x i32> zeroinitializer
  %15 = fsub <4 x float> %strided.vec36, %broadcast.splat42
  %16 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %15, <4 x float> %15, <4 x float> %13)
  %17 = or disjoint i64 %offset.idx, 1
  %gep = getelementptr float, ptr %invariant.gep, i64 %17
  %interleaved.vec = shufflevector <4 x float> %10, <4 x float> %16, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
  store <8 x float> %interleaved.vec, ptr %gep, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 4
  %18 = icmp eq i64 %index.next, 256
  br i1 %18, label %middle.block, label %vector.body, !llvm.loop !12

.preheader21:                                     ; preds = %vector.memcheck, %.preheader21
  %indvars.iv = phi i64 [ %indvars.iv.next, %.preheader21 ], [ 0, %vector.memcheck ]
  %19 = shl nuw nsw i64 %indvars.iv, 1
  %20 = getelementptr inbounds float, ptr %1, i64 %19
  %21 = load float, ptr %20, align 4, !tbaa !5
  %22 = load float, ptr %0, align 4, !tbaa !5
  %23 = fsub float %21, %22
  %24 = tail call float @llvm.fmuladd.f32(float %23, float %23, float 0.000000e+00)
  %25 = or disjoint i64 %19, 1
  %26 = getelementptr inbounds float, ptr %1, i64 %25
  %27 = load float, ptr %26, align 4, !tbaa !5
  %28 = load float, ptr %3, align 4, !tbaa !5
  %29 = fsub float %27, %28
  %30 = tail call float @llvm.fmuladd.f32(float %29, float %29, float %24)
  %31 = getelementptr inbounds float, ptr %2, i64 %indvars.iv
  store float %30, ptr %31, align 4, !tbaa !5
  %32 = shl nuw nsw i64 %indvars.iv, 1
  %33 = or disjoint i64 %32, 2
  %34 = getelementptr inbounds float, ptr %1, i64 %33
  %35 = load float, ptr %34, align 4, !tbaa !5
  %36 = load float, ptr %0, align 4, !tbaa !5
  %37 = fsub float %35, %36
  %38 = tail call float @llvm.fmuladd.f32(float %37, float %37, float 0.000000e+00)
  %39 = or disjoint i64 %32, 3
  %40 = getelementptr inbounds float, ptr %1, i64 %39
  %41 = load float, ptr %40, align 4, !tbaa !5
  %42 = load float, ptr %3, align 4, !tbaa !5
  %43 = fsub float %41, %42
  %44 = tail call float @llvm.fmuladd.f32(float %43, float %43, float %38)
  %45 = or disjoint i64 %indvars.iv, 1
  %46 = getelementptr inbounds float, ptr %2, i64 %45
  store float %44, ptr %46, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2
  %47 = icmp ult i64 %indvars.iv, 510
  br i1 %47, label %.preheader21, label %middle.block, !llvm.loop !16

middle.block:                                     ; preds = %vector.body, %.preheader21
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #2

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10}
!10 = distinct !{!10, !11}
!11 = distinct !{!11, !"LVerDomain"}
!12 = distinct !{!12, !13, !14, !15}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!"llvm.loop.isvectorized", i32 1}
!15 = !{!"llvm.loop.unroll.runtime.disable"}
!16 = distinct !{!16, !13, !14}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass