; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/commands (i2c_cmd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.gpio_command_params = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i32, %union.anon, i16, i32, i8, i8, i8, [264 x i8], i32, i32, i32, i32, i32, i32, i32, i32, float }
%union.anon = type { [16 x i32] }

@.str = external hidden unnamed_addr constant [22 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @dh_i2c_init_helper(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  %12 = load i32, ptr %6, align 4, !tbaa !9
  %13 = and i32 %12, 524288
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %17

15:                                               ; preds = %3
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %16, ptr noundef @.str)
  store i32 1, ptr %4, align 4
  br label %57

17:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %18 = load i32, ptr %6, align 4, !tbaa !9
  %19 = and i32 %18, 1048576
  %20 = icmp ne i32 %19, 0
  %21 = zext i1 %20 to i32
  %22 = load i32, ptr %6, align 4, !tbaa !9
  %23 = and i32 %22, 2097152
  %24 = icmp ne i32 %23, 0
  %25 = zext i1 %24 to i32
  %26 = add nsw i32 %21, %25
  store i32 %26, ptr %8, align 4, !tbaa !9
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = icmp eq i32 %27, 2
  br i1 %28, label %29, label %48

29:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.gpio_command_params, ptr %30, i32 0, i32 23
  %32 = load i32, ptr %31, align 4, !tbaa !11
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.gpio_command_params, ptr %33, i32 0, i32 24
  %35 = load i32, ptr %34, align 4, !tbaa !15
  %36 = call i32 @dh_i2c_init(i32 noundef %32, i32 noundef %35)
  store i32 %36, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = call ptr @dh_i2c_error_string(i32 noundef %37)
  store ptr %38, ptr %10, align 8, !tbaa !5
  %39 = load ptr, ptr %10, align 8, !tbaa !5
  %40 = icmp ne ptr %39, null
  br i1 %40, label %41, label %44

41:                                               ; preds = %29
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load ptr, ptr %10, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %42, ptr noundef %43)
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %45

44:                                               ; preds = %29
  store i32 0, ptr %11, align 4
  br label %45

45:                                               ; preds = %44, %41
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %46 = load i32, ptr %11, align 4
  switch i32 %46, label %56 [
    i32 0, label %47
  ]

47:                                               ; preds = %45
  br label %55

48:                                               ; preds = %17
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = icmp eq i32 %49, 1
  br i1 %50, label %51, label %53

51:                                               ; preds = %48
  %52 = load ptr, ptr %5, align 8, !tbaa !5
  call void @dh_command_fail(ptr noundef %52, ptr noundef @.str.1)
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %56

53:                                               ; preds = %48
  call void @dh_i2c_reinit()
  br label %54

54:                                               ; preds = %53
  br label %55

55:                                               ; preds = %54, %47
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %56

56:                                               ; preds = %55, %51, %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %57

57:                                               ; preds = %56, %15
  %58 = load i32, ptr %4, align 4
  ret i32 %58
}

declare void @dh_command_fail(ptr noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) #1

declare ptr @dh_i2c_error_string(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare void @dh_i2c_reinit() #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 384}
!12 = !{!"", !13, i64 0, !13, i64 2, !13, i64 4, !13, i64 6, !13, i64 8, !13, i64 10, !13, i64 12, !13, i64 14, !13, i64 16, !13, i64 18, !13, i64 20, !10, i64 24, !10, i64 28, !7, i64 32, !13, i64 96, !10, i64 100, !7, i64 104, !7, i64 105, !7, i64 106, !7, i64 107, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !14, i64 404}
!13 = !{!"short", !7, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = !{!12, !10, i64 388}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [22 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [23 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @dh_i2c_init_helper(ptr noundef %0, i32 noundef %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
  %4 = and i32 %1, 524288
  %5 = icmp eq i32 %4, 0
  br i1 %5, label %6, label %7

6:                                                ; preds = %3
  tail call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull @.str) #2
  br label %.critedge

7:                                                ; preds = %3
  %8 = lshr i32 %1, 20
  %.lobit = and i32 %8, 1
  %9 = lshr i32 %1, 21
  %.lobit17 = and i32 %9, 1
  %10 = add nuw nsw i32 %.lobit, %.lobit17
  switch i32 %10, label %20 [
    i32 2, label %11
    i32 1, label %19
  ]

11:                                               ; preds = %7
  %12 = getelementptr inbounds i8, ptr %2, i64 384
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %2, i64 388
  %15 = load i32, ptr %14, align 4, !tbaa !12
  %16 = tail call i32 @dh_i2c_init(i32 noundef %13, i32 noundef %15) #2
  %17 = tail call ptr @dh_i2c_error_string(i32 noundef %16) #2
  %.not = icmp eq ptr %17, null
  br i1 %.not, label %.critedge, label %18

18:                                               ; preds = %11
  tail call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull %17) #2
  br label %.critedge

19:                                               ; preds = %7
  tail call void @dh_command_fail(ptr noundef %0, ptr noundef nonnull @.str.1) #2
  br label %.critedge

20:                                               ; preds = %7
  tail call void @dh_i2c_reinit() #2
  br label %.critedge

.critedge:                                        ; preds = %20, %11, %18, %19, %6
  %.2 = phi i32 [ 1, %6 ], [ 1, %18 ], [ 1, %19 ], [ 0, %11 ], [ 0, %20 ]
  ret i32 %.2
}

declare void @dh_command_fail(ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @dh_i2c_init(i32 noundef, i32 noundef) local_unnamed_addr #1

declare ptr @dh_i2c_error_string(i32 noundef) local_unnamed_addr #1

declare void @dh_i2c_reinit() local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 384}
!6 = !{!"", !7, i64 0, !7, i64 2, !7, i64 4, !7, i64 6, !7, i64 8, !7, i64 10, !7, i64 12, !7, i64 14, !7, i64 16, !7, i64 18, !7, i64 20, !10, i64 24, !10, i64 28, !8, i64 32, !7, i64 96, !10, i64 100, !8, i64 104, !8, i64 105, !8, i64 106, !8, i64 107, !10, i64 372, !10, i64 376, !10, i64 380, !10, i64 384, !10, i64 388, !10, i64 392, !10, i64 396, !10, i64 400, !11, i64 404}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"float", !8, i64 0}
!12 = !{!6, !10, i64 388}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass