; LLVM IR from AnneLivia/Competitive-Programming :: Online Judges/Neps Academy/Segredo do Cofre (OBI 2017)/main.ll (Z5queryiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.Data = type { [10 x i32] }

@st = external dso_local global %"class.std::vector", align 8
@constinit = external hidden constant [10 x i32], align 4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(40) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5queryiiiii(ptr dead_on_unwind noalias writable sret(%struct.Data) align 4 %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #2 {
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca %struct.Data, align 4
  %14 = alloca %struct.Data, align 4
  %15 = alloca i32, align 4
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  store i32 %5, ptr %11, align 4, !tbaa !5
  %16 = load i32, ptr %10, align 4, !tbaa !5
  %17 = load i32, ptr %9, align 4, !tbaa !5
  %18 = icmp sgt i32 %16, %17
  br i1 %18, label %23, label %19

19:                                               ; preds = %6
  %20 = load i32, ptr %11, align 4, !tbaa !5
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = icmp slt i32 %20, %21
  br i1 %22, label %23, label %25

23:                                               ; preds = %19, %6
  call void @llvm.memset.p0.i64(ptr align 4 %0, i8 0, i64 40, i1 false)
  %24 = getelementptr inbounds %struct.Data, ptr %0, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %24, ptr align 4 @constinit, i64 40, i1 false), !tbaa.struct !9
  br label %80

25:                                               ; preds = %19
  %26 = load i32, ptr %10, align 4, !tbaa !5
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = icmp sle i32 %26, %27
  br i1 %28, label %29, label %37

29:                                               ; preds = %25
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = load i32, ptr %11, align 4, !tbaa !5
  %32 = icmp sle i32 %30, %31
  br i1 %32, label %33, label %37

33:                                               ; preds = %29
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(40) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %35) #5
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %0, ptr align 4 %36, i64 40, i1 false), !tbaa.struct !9
  br label %80

37:                                               ; preds = %29, %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = load i32, ptr %9, align 4, !tbaa !5
  %40 = add nsw i32 %38, %39
  %41 = ashr i32 %40, 1
  store i32 %41, ptr %12, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 40, ptr %13) #5
  %42 = load i32, ptr %7, align 4, !tbaa !5
  %43 = mul nsw i32 2, %42
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = load i32, ptr %12, align 4, !tbaa !5
  %46 = load i32, ptr %10, align 4, !tbaa !5
  %47 = load i32, ptr %11, align 4, !tbaa !5
  call void @_Z5queryiiiii(ptr dead_on_unwind writable sret(%struct.Data) align 4 %13, i32 noundef %43, i32 noundef %44, i32 noundef %45, i32 noundef %46, i32 noundef %47)
  call void @llvm.lifetime.start.p0(i64 40, ptr %14) #5
  %48 = load i32, ptr %7, align 4, !tbaa !5
  %49 = mul nsw i32 2, %48
  %50 = add nsw i32 %49, 1
  %51 = load i32, ptr %12, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  %53 = load i32, ptr %9, align 4, !tbaa !5
  %54 = load i32, ptr %10, align 4, !tbaa !5
  %55 = load i32, ptr %11, align 4, !tbaa !5
  call void @_Z5queryiiiii(ptr dead_on_unwind writable sret(%struct.Data) align 4 %14, i32 noundef %50, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %55)
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  store i32 0, ptr %15, align 4, !tbaa !5
  br label %56

56:                                               ; preds = %76, %37
  %57 = load i32, ptr %15, align 4, !tbaa !5
  %58 = icmp slt i32 %57, 10
  br i1 %58, label %60, label %59

59:                                               ; preds = %56
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  br label %79

60:                                               ; preds = %56
  %61 = getelementptr inbounds %struct.Data, ptr %13, i32 0, i32 0
  %62 = load i32, ptr %15, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [10 x i32], ptr %61, i64 0, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !5
  %66 = getelementptr inbounds %struct.Data, ptr %14, i32 0, i32 0
  %67 = load i32, ptr %15, align 4, !tbaa !5
  %68 = sext i32 %67 to i64
  %69 = getelementptr inbounds [10 x i32], ptr %66, i64 0, i64 %68
  %70 = load i32, ptr %69, align 4, !tbaa !5
  %71 = add nsw i32 %65, %70
  %72 = getelementptr inbounds %struct.Data, ptr %0, i32 0, i32 0
  %73 = load i32, ptr %15, align 4, !tbaa !5
  %74 = sext i32 %73 to i64
  %75 = getelementptr inbounds [10 x i32], ptr %72, i64 0, i64 %74
  store i32 %71, ptr %75, align 4, !tbaa !5
  br label %76

76:                                               ; preds = %60
  %77 = load i32, ptr %15, align 4, !tbaa !5
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %15, align 4, !tbaa !5
  br label %56, !llvm.loop !11

79:                                               ; preds = %59
  call void @llvm.lifetime.end.p0(i64 40, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 40, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %80

80:                                               ; preds = %79, %33, %23
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{i64 0, i64 40, !10}
!10 = !{!7, !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl" = type { %"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Data, std::allocator<Data>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.Data = type { [10 x i32] }

@st = external dso_local global %"class.std::vector", align 8
@constinit = external hidden local_unnamed_addr constant [10 x i32], align 4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(40) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5queryiiiii(ptr dead_on_unwind noalias nocapture writable writeonly sret(%struct.Data) align 4 %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = alloca %struct.Data, align 16
  %8 = alloca %struct.Data, align 16
  %9 = icmp sgt i32 %4, %3
  %10 = icmp slt i32 %5, %2
  %or.cond = or i1 %9, %10
  br i1 %or.cond, label %11, label %12

11:                                               ; preds = %6
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(40) %0, ptr noundef nonnull align 4 dereferenceable(40) @constinit, i64 40, i1 false), !tbaa.struct !5
  br label %37

12:                                               ; preds = %6
  %.not = icmp sgt i32 %4, %2
  %.not30 = icmp sgt i32 %3, %5
  %or.cond31 = or i1 %.not, %.not30
  br i1 %or.cond31, label %16, label %13

13:                                               ; preds = %12
  %14 = sext i32 %1 to i64
  %15 = tail call noundef nonnull align 4 dereferenceable(40) ptr @_ZNSt6vectorI4DataSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @st, i64 noundef %14) #3
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(40) %0, ptr noundef nonnull align 4 dereferenceable(40) %15, i64 40, i1 false), !tbaa.struct !5
  br label %37

16:                                               ; preds = %12
  %17 = add nsw i32 %3, %2
  %18 = ashr i32 %17, 1
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %7) #3
  %19 = shl nsw i32 %1, 1
  call void @_Z5queryiiiii(ptr dead_on_unwind nonnull writable sret(%struct.Data) align 4 %7, i32 noundef %19, i32 noundef %2, i32 noundef %18, i32 noundef %4, i32 noundef %5)
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %8) #3
  %20 = or disjoint i32 %19, 1
  %21 = add nsw i32 %18, 1
  call void @_Z5queryiiiii(ptr dead_on_unwind nonnull writable sret(%struct.Data) align 4 %8, i32 noundef %20, i32 noundef %21, i32 noundef %3, i32 noundef %4, i32 noundef %5)
  %22 = load <4 x i32>, ptr %7, align 16, !tbaa !9
  %23 = load <4 x i32>, ptr %8, align 16, !tbaa !9
  %24 = add nsw <4 x i32> %23, %22
  store <4 x i32> %24, ptr %0, align 4, !tbaa !9
  %25 = getelementptr inbounds i8, ptr %7, i64 16
  %26 = getelementptr inbounds i8, ptr %8, i64 16
  %27 = getelementptr inbounds i8, ptr %0, i64 16
  %28 = load <4 x i32>, ptr %25, align 16, !tbaa !9
  %29 = load <4 x i32>, ptr %26, align 16, !tbaa !9
  %30 = add nsw <4 x i32> %29, %28
  store <4 x i32> %30, ptr %27, align 4, !tbaa !9
  %31 = getelementptr inbounds i8, ptr %7, i64 32
  %32 = getelementptr inbounds i8, ptr %8, i64 32
  %33 = getelementptr inbounds i8, ptr %0, i64 32
  %34 = load <2 x i32>, ptr %31, align 16, !tbaa !9
  %35 = load <2 x i32>, ptr %32, align 16, !tbaa !9
  %36 = add nsw <2 x i32> %35, %34
  store <2 x i32> %36, ptr %33, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %7) #3
  br label %37

37:                                               ; preds = %16, %13, %11
  ret void
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 0, i64 40, !6}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,SimplifyCFGPass,TailCallElimPass