; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources/devices (mfrc522)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CalculateCRC(ptr noundef, i8 noundef zeroext, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca [18 x i8], align 16
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  %13 = alloca i8, align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store i8 %2, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 18, ptr %9) #3
  %14 = load ptr, ptr %5, align 8, !tbaa !5
  %15 = icmp eq ptr %14, null
  br i1 %15, label %20, label %16

16:                                               ; preds = %3
  %17 = load i8, ptr %6, align 1, !tbaa !9
  %18 = zext i8 %17 to i32
  %19 = icmp sgt i32 %18, 16
  br i1 %19, label %20, label %21

20:                                               ; preds = %16, %3
  store i32 6, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %76

21:                                               ; preds = %16
  %22 = getelementptr inbounds [18 x i8], ptr %9, i64 0, i64 0
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = load i8, ptr %6, align 1, !tbaa !9
  %25 = zext i8 %24 to i32
  %26 = call ptr @ets_memcpy(ptr noundef %22, ptr noundef %23, i32 noundef %25)
  %27 = getelementptr inbounds [18 x i8], ptr %9, i64 0, i64 0
  %28 = load i8, ptr %6, align 1, !tbaa !9
  %29 = load i8, ptr %6, align 1, !tbaa !9
  %30 = zext i8 %29 to i64
  %31 = getelementptr inbounds [18 x i8], ptr %9, i64 0, i64 %30
  %32 = call i32 @MFRC522_PCD_CalculateCRC(ptr noundef %27, i8 noundef zeroext %28, ptr noundef %31)
  store i32 %32, ptr %8, align 4, !tbaa !10
  %33 = load i32, ptr %8, align 4, !tbaa !10
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %37

35:                                               ; preds = %21
  %36 = load i32, ptr %8, align 4, !tbaa !10
  store i32 %36, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %76

37:                                               ; preds = %21
  %38 = load i8, ptr %6, align 1, !tbaa !9
  %39 = zext i8 %38 to i32
  %40 = add nsw i32 %39, 2
  %41 = trunc i32 %40 to i8
  store i8 %41, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  store i8 48, ptr %11, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #3
  store i8 18, ptr %12, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #3
  store i8 0, ptr %13, align 1, !tbaa !9
  %42 = load i8, ptr %11, align 1, !tbaa !9
  %43 = getelementptr inbounds [18 x i8], ptr %9, i64 0, i64 0
  %44 = load i8, ptr %6, align 1, !tbaa !9
  %45 = getelementptr inbounds [18 x i8], ptr %9, i64 0, i64 0
  %46 = call i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext 12, i8 noundef zeroext %42, ptr noundef %43, i8 noundef zeroext %44, ptr noundef %45, ptr noundef %12, ptr noundef %13, i8 noundef zeroext 0, i8 noundef zeroext 0)
  store i32 %46, ptr %8, align 4, !tbaa !10
  %47 = load i8, ptr %7, align 1, !tbaa !9
  %48 = zext i8 %47 to i32
  %49 = icmp ne i32 %48, 0
  br i1 %49, label %50, label %54

50:                                               ; preds = %37
  %51 = load i32, ptr %8, align 4, !tbaa !10
  %52 = icmp eq i32 %51, 3
  br i1 %52, label %53, label %54

53:                                               ; preds = %50
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %75

54:                                               ; preds = %50, %37
  %55 = load i32, ptr %8, align 4, !tbaa !10
  %56 = icmp ne i32 %55, 0
  br i1 %56, label %57, label %59

57:                                               ; preds = %54
  %58 = load i32, ptr %8, align 4, !tbaa !10
  store i32 %58, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %75

59:                                               ; preds = %54
  %60 = load i8, ptr %12, align 1, !tbaa !9
  %61 = zext i8 %60 to i32
  %62 = icmp ne i32 %61, 1
  br i1 %62, label %67, label %63

63:                                               ; preds = %59
  %64 = load i8, ptr %13, align 1, !tbaa !9
  %65 = zext i8 %64 to i32
  %66 = icmp ne i32 %65, 4
  br i1 %66, label %67, label %68

67:                                               ; preds = %63, %59
  store i32 1, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %75

68:                                               ; preds = %63
  %69 = getelementptr inbounds [18 x i8], ptr %9, i64 0, i64 0
  %70 = load i8, ptr %69, align 16, !tbaa !9
  %71 = zext i8 %70 to i32
  %72 = icmp ne i32 %71, 10
  br i1 %72, label %73, label %74

73:                                               ; preds = %68
  store i32 255, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %75

74:                                               ; preds = %68
  store i32 0, ptr %4, align 4
  store i32 1, ptr %10, align 4
  br label %75

75:                                               ; preds = %74, %73, %67, %57, %53
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  br label %76

76:                                               ; preds = %75, %35, %20
  call void @llvm.lifetime.end.p0(i64 18, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %77 = load i32, ptr %4, align 4
  ret i32 %77
}

declare ptr @ets_memcpy(ptr noundef, ptr noundef, i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CalculateCRC(ptr noundef, i8 noundef zeroext, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext, i8 noundef zeroext, ptr noundef, i8 noundef zeroext, ptr noundef, ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @MFRC522_PCD_MIFARE_Transceive(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = alloca [18 x i8], align 16
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 18, ptr nonnull %4) #3
  %7 = icmp eq ptr %0, null
  %8 = icmp ugt i8 %1, 16
  %or.cond = or i1 %7, %8
  br i1 %or.cond, label %29, label %9

9:                                                ; preds = %3
  %10 = zext nneg i8 %1 to i32
  %11 = call ptr @ets_memcpy(ptr noundef nonnull %4, ptr noundef nonnull %0, i32 noundef %10) #3
  %12 = zext nneg i8 %1 to i64
  %13 = getelementptr inbounds [18 x i8], ptr %4, i64 0, i64 %12
  %14 = call i32 @MFRC522_PCD_CalculateCRC(ptr noundef nonnull %4, i8 noundef zeroext %1, ptr noundef nonnull %13)
  %.not = icmp eq i32 %14, 0
  br i1 %.not, label %15, label %29

15:                                               ; preds = %9
  %16 = add nuw nsw i8 %1, 2
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #3
  store i8 18, ptr %5, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #3
  store i8 0, ptr %6, align 1, !tbaa !5
  %17 = call i32 @MFRC522_PCD_CommunicateWithPICC(i8 noundef zeroext 12, i8 noundef zeroext 48, ptr noundef nonnull %4, i8 noundef zeroext %16, ptr noundef nonnull %4, ptr noundef nonnull %5, ptr noundef nonnull %6, i8 noundef zeroext 0, i8 noundef zeroext 0)
  %18 = icmp ne i8 %2, 0
  %19 = icmp eq i32 %17, 3
  %or.cond4 = select i1 %18, i1 %19, i1 false
  br i1 %or.cond4, label %28, label %20

20:                                               ; preds = %15
  %.not26 = icmp eq i32 %17, 0
  br i1 %.not26, label %21, label %28

21:                                               ; preds = %20
  %22 = load i8, ptr %5, align 1, !tbaa !5
  %23 = icmp ne i8 %22, 1
  %24 = load i8, ptr %6, align 1
  %25 = icmp ne i8 %24, 4
  %or.cond7 = select i1 %23, i1 true, i1 %25
  br i1 %or.cond7, label %28, label %26

26:                                               ; preds = %21
  %27 = load i8, ptr %4, align 16, !tbaa !5
  %.not27 = icmp eq i8 %27, 10
  %. = select i1 %.not27, i32 0, i32 255
  br label %28

28:                                               ; preds = %26, %21, %20, %15
  %.0 = phi i32 [ 0, %15 ], [ %17, %20 ], [ 1, %21 ], [ %., %26 ]
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #3
  br label %29

29:                                               ; preds = %9, %3, %28
  %.1 = phi i32 [ %.0, %28 ], [ 6, %3 ], [ %14, %9 ]
  call void @llvm.lifetime.end.p0(i64 18, ptr nonnull %4) #3
  ret i32 %.1
}

declare ptr @ets_memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass