; LLVM IR from SSBMTonberry/pocketlzma :: ref_spec/lzma1900/C (7zCrc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@g_CrcUpdate = external dso_local global ptr, align 8
@g_CrcTable = external dso_local global [2048 x i32], align 16
@g_CrcUpdateT4 = external dso_local global ptr, align 8
@g_CrcUpdateT8 = external dso_local global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @CrcGenerateTable() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %29, %0
  %6 = load i32, ptr %1, align 4, !tbaa !5
  %7 = icmp ult i32 %6, 256
  br i1 %7, label %8, label %32

8:                                                ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  %9 = load i32, ptr %1, align 4, !tbaa !5
  store i32 %9, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %21, %8
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = icmp ult i32 %11, 8
  br i1 %12, label %13, label %24

13:                                               ; preds = %10
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = lshr i32 %14, 1
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = and i32 %16, 1
  %18 = sub i32 0, %17
  %19 = and i32 -306674912, %18
  %20 = xor i32 %15, %19
  store i32 %20, ptr %2, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %13
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = add i32 %22, 1
  store i32 %23, ptr %3, align 4, !tbaa !5
  br label %10, !llvm.loop !9

24:                                               ; preds = %10
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = load i32, ptr %1, align 4, !tbaa !5
  %27 = zext i32 %26 to i64
  %28 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %27
  store i32 %25, ptr %28, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  br label %29

29:                                               ; preds = %24
  %30 = load i32, ptr %1, align 4, !tbaa !5
  %31 = add i32 %30, 1
  store i32 %31, ptr %1, align 4, !tbaa !5
  br label %5, !llvm.loop !11

32:                                               ; preds = %5
  store i32 256, ptr %1, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %53, %32
  %34 = load i32, ptr %1, align 4, !tbaa !5
  %35 = icmp ult i32 %34, 2048
  br i1 %35, label %36, label %56

36:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %37 = load i32, ptr %1, align 4, !tbaa !5
  %38 = zext i32 %37 to i64
  %39 = sub i64 %38, 256
  %40 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !5
  store i32 %41, ptr %4, align 4, !tbaa !5
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = and i32 %42, 255
  %44 = zext i32 %43 to i64
  %45 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = lshr i32 %47, 8
  %49 = xor i32 %46, %48
  %50 = load i32, ptr %1, align 4, !tbaa !5
  %51 = zext i32 %50 to i64
  %52 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %51
  store i32 %49, ptr %52, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %53

53:                                               ; preds = %36
  %54 = load i32, ptr %1, align 4, !tbaa !5
  %55 = add i32 %54, 1
  store i32 %55, ptr %1, align 4, !tbaa !5
  br label %33, !llvm.loop !12

56:                                               ; preds = %33
  store ptr @CrcUpdateT4, ptr @g_CrcUpdateT4, align 8, !tbaa !13
  store ptr @CrcUpdateT4, ptr @g_CrcUpdate, align 8, !tbaa !13
  store ptr @CrcUpdateT8, ptr @g_CrcUpdateT8, align 8, !tbaa !13
  %57 = call i32 (...) @CPU_Is_InOrder()
  %58 = icmp ne i32 %57, 0
  br i1 %58, label %60, label %59

59:                                               ; preds = %56
  store ptr @CrcUpdateT8, ptr @g_CrcUpdate, align 8, !tbaa !13
  br label %60

60:                                               ; preds = %59, %56
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret void
}

declare i32 @CrcUpdateT4(i32 noundef, ptr noundef, i64 noundef, ptr noundef) #2

declare i32 @CrcUpdateT8(i32 noundef, ptr noundef, i64 noundef, ptr noundef) #2

declare i32 @CPU_Is_InOrder(...) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@g_CrcUpdate = external dso_local local_unnamed_addr global ptr, align 8
@g_CrcTable = external dso_local local_unnamed_addr global [2048 x i32], align 16
@g_CrcUpdateT4 = external dso_local local_unnamed_addr global ptr, align 8
@g_CrcUpdateT8 = external dso_local local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local void @CrcGenerateTable() local_unnamed_addr #0 {
vector.ph:
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.ind = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %0 = lshr <4 x i32> %vec.ind, <i32 1, i32 1, i32 1, i32 1>
  %1 = and <4 x i32> %vec.ind, <i32 1, i32 1, i32 1, i32 1>
  %2 = icmp eq <4 x i32> %1, zeroinitializer
  %3 = select <4 x i1> %2, <4 x i32> zeroinitializer, <4 x i32> <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
  %4 = xor <4 x i32> %3, %0
  %5 = lshr <4 x i32> %4, <i32 1, i32 1, i32 1, i32 1>
  %6 = and <4 x i32> %vec.ind, <i32 2, i32 2, i32 2, i32 2>
  %7 = icmp eq <4 x i32> %6, zeroinitializer
  %8 = select <4 x i1> %7, <4 x i32> zeroinitializer, <4 x i32> <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
  %9 = xor <4 x i32> %8, %5
  %10 = lshr <4 x i32> %9, <i32 6, i32 6, i32 6, i32 6>
  %11 = and <4 x i32> %vec.ind, <i32 4, i32 4, i32 4, i32 4>
  %12 = icmp eq <4 x i32> %11, zeroinitializer
  %13 = select <4 x i1> %12, <4 x i32> zeroinitializer, <4 x i32> <i32 124634137, i32 124634137, i32 124634137, i32 124634137>
  %14 = xor <4 x i32> %13, %10
  %15 = and <4 x i32> %vec.ind, <i32 8, i32 8, i32 8, i32 8>
  %16 = icmp eq <4 x i32> %15, zeroinitializer
  %17 = select <4 x i1> %16, <4 x i32> zeroinitializer, <4 x i32> <i32 249268274, i32 249268274, i32 249268274, i32 249268274>
  %18 = xor <4 x i32> %17, %14
  %19 = and <4 x i32> %vec.ind, <i32 16, i32 16, i32 16, i32 16>
  %20 = icmp eq <4 x i32> %19, zeroinitializer
  %21 = select <4 x i1> %20, <4 x i32> zeroinitializer, <4 x i32> <i32 498536548, i32 498536548, i32 498536548, i32 498536548>
  %22 = xor <4 x i32> %21, %18
  %23 = and <4 x i32> %vec.ind, <i32 32, i32 32, i32 32, i32 32>
  %24 = icmp eq <4 x i32> %23, zeroinitializer
  %25 = select <4 x i1> %24, <4 x i32> zeroinitializer, <4 x i32> <i32 997073096, i32 997073096, i32 997073096, i32 997073096>
  %26 = xor <4 x i32> %25, %22
  %27 = and <4 x i32> %4, <i32 32, i32 32, i32 32, i32 32>
  %28 = icmp eq <4 x i32> %27, zeroinitializer
  %29 = select <4 x i1> %28, <4 x i32> zeroinitializer, <4 x i32> <i32 1994146192, i32 1994146192, i32 1994146192, i32 1994146192>
  %30 = xor <4 x i32> %29, %26
  %31 = and <4 x i32> %9, <i32 32, i32 32, i32 32, i32 32>
  %32 = icmp eq <4 x i32> %31, zeroinitializer
  %33 = select <4 x i1> %32, <4 x i32> zeroinitializer, <4 x i32> <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
  %34 = xor <4 x i32> %33, %30
  %35 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %index
  store <4 x i32> %34, ptr %35, align 16, !tbaa !5
  %index.next = add nuw i64 %index, 4
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 4, i32 4, i32 4, i32 4>
  %36 = icmp eq i64 %index.next, 256
  br i1 %36, label %.preheader, label %vector.body, !llvm.loop !9

.preheader:                                       ; preds = %vector.body, %.preheader
  %indvars.iv23 = phi i64 [ %indvars.iv.next24.1, %.preheader ], [ 256, %vector.body ]
  %37 = add nsw i64 %indvars.iv23, -256
  %38 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %37
  %39 = load i32, ptr %38, align 8, !tbaa !5
  %40 = and i32 %39, 255
  %41 = zext nneg i32 %40 to i64
  %42 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %41
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = lshr i32 %39, 8
  %45 = xor i32 %43, %44
  %46 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %indvars.iv23
  store i32 %45, ptr %46, align 8, !tbaa !5
  %indvars.iv.next24 = or disjoint i64 %indvars.iv23, 1
  %47 = add nsw i64 %indvars.iv23, -255
  %48 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %47
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = and i32 %49, 255
  %51 = zext nneg i32 %50 to i64
  %52 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %51
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = lshr i32 %49, 8
  %55 = xor i32 %53, %54
  %56 = getelementptr inbounds [2048 x i32], ptr @g_CrcTable, i64 0, i64 %indvars.iv.next24
  store i32 %55, ptr %56, align 4, !tbaa !5
  %indvars.iv.next24.1 = add nuw nsw i64 %indvars.iv23, 2
  %exitcond26.not.1 = icmp eq i64 %indvars.iv.next24.1, 2048
  br i1 %exitcond26.not.1, label %57, label %.preheader, !llvm.loop !13

57:                                               ; preds = %.preheader
  store ptr @CrcUpdateT4, ptr @g_CrcUpdateT4, align 8, !tbaa !14
  store ptr @CrcUpdateT4, ptr @g_CrcUpdate, align 8, !tbaa !14
  store ptr @CrcUpdateT8, ptr @g_CrcUpdateT8, align 8, !tbaa !14
  %58 = tail call i32 (...) @CPU_Is_InOrder() #2
  %.not = icmp eq i32 %58, 0
  br i1 %.not, label %59, label %60

59:                                               ; preds = %57
  store ptr @CrcUpdateT8, ptr @g_CrcUpdate, align 8, !tbaa !14
  br label %60

60:                                               ; preds = %59, %57
  ret void
}

declare i32 @CrcUpdateT4(i32 noundef, ptr noundef, i64 noundef, ptr noundef) #1

declare i32 @CrcUpdateT8(i32 noundef, ptr noundef, i64 noundef, ptr noundef) #1

declare i32 @CPU_Is_InOrder(...) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass