; LLVM IR from JessonYue/LeetCodeLearning :: Array/zhanchengguo/0804-插入/insertBits.ll (Z10insertBitsiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z10insertBitsiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %10 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %10, ptr %9, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %28, %4
  %12 = load i32, ptr %9, align 4, !tbaa !5
  %13 = load i32, ptr %8, align 4, !tbaa !5
  %14 = icmp sle i32 %12, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %31

16:                                               ; preds = %11
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = load i32, ptr %9, align 4, !tbaa !5
  %19 = shl i32 1, %18
  %20 = and i32 %17, %19
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %27

22:                                               ; preds = %16
  %23 = load i32, ptr %9, align 4, !tbaa !5
  %24 = shl i32 1, %23
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = sub nsw i32 %25, %24
  store i32 %26, ptr %5, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %22, %16
  br label %28

28:                                               ; preds = %27
  %29 = load i32, ptr %9, align 4, !tbaa !5
  %30 = add nsw i32 %29, 1
  store i32 %30, ptr %9, align 4, !tbaa !5
  br label %11, !llvm.loop !9

31:                                               ; preds = %15
  %32 = load i32, ptr %6, align 4, !tbaa !5
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = shl i32 %32, %33
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = add nsw i32 %35, %34
  store i32 %36, ptr %5, align 4, !tbaa !5
  %37 = load i32, ptr %5, align 4, !tbaa !5
  ret i32 %37
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @_Z10insertBitsiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %.not14 = icmp sgt i32 %2, %3
  br i1 %.not14, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %5 = add i32 %3, 1
  %6 = sub i32 %5, %2
  %7 = sub i32 %3, %2
  %xtraiter = and i32 %6, 3
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader, %.lr.ph.prol
  %.016.prol = phi i32 [ %11, %.lr.ph.prol ], [ %2, %.lr.ph.preheader ]
  %.01215.prol = phi i32 [ %spec.select.prol, %.lr.ph.prol ], [ %0, %.lr.ph.preheader ]
  %prol.iter = phi i32 [ %prol.iter.next, %.lr.ph.prol ], [ 0, %.lr.ph.preheader ]
  %8 = shl nuw i32 1, %.016.prol
  %9 = and i32 %8, %.01215.prol
  %.not13.prol = icmp eq i32 %9, 0
  %10 = select i1 %.not13.prol, i32 0, i32 %8
  %spec.select.prol = sub nsw i32 %.01215.prol, %10
  %11 = add i32 %.016.prol, 1
  %prol.iter.next = add i32 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i32 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol, !llvm.loop !5

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader
  %spec.select.lcssa.unr = phi i32 [ poison, %.lr.ph.preheader ], [ %spec.select.prol, %.lr.ph.prol ]
  %.016.unr = phi i32 [ %2, %.lr.ph.preheader ], [ %11, %.lr.ph.prol ]
  %.01215.unr = phi i32 [ %0, %.lr.ph.preheader ], [ %spec.select.prol, %.lr.ph.prol ]
  %12 = icmp ult i32 %7, 3
  br i1 %12, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %4
  %.012.lcssa = phi i32 [ %0, %4 ], [ %spec.select.lcssa.unr, %.lr.ph.prol.loopexit ], [ %spec.select.3, %.lr.ph ]
  %13 = shl i32 %1, %2
  %14 = add nsw i32 %.012.lcssa, %13
  ret i32 %14

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.016 = phi i32 [ %30, %.lr.ph ], [ %.016.unr, %.lr.ph.prol.loopexit ]
  %.01215 = phi i32 [ %spec.select.3, %.lr.ph ], [ %.01215.unr, %.lr.ph.prol.loopexit ]
  %15 = shl nuw i32 1, %.016
  %16 = and i32 %15, %.01215
  %.not13 = icmp eq i32 %16, 0
  %17 = select i1 %.not13, i32 0, i32 %15
  %spec.select = sub nsw i32 %.01215, %17
  %18 = add i32 %.016, 1
  %19 = shl nuw i32 1, %18
  %20 = and i32 %19, %spec.select
  %.not13.1 = icmp eq i32 %20, 0
  %21 = select i1 %.not13.1, i32 0, i32 %19
  %spec.select.1 = sub nsw i32 %spec.select, %21
  %22 = add i32 %.016, 2
  %23 = shl nuw i32 1, %22
  %24 = and i32 %23, %spec.select.1
  %.not13.2 = icmp eq i32 %24, 0
  %25 = select i1 %.not13.2, i32 0, i32 %23
  %spec.select.2 = sub nsw i32 %spec.select.1, %25
  %26 = add i32 %.016, 3
  %27 = shl nuw i32 1, %26
  %28 = and i32 %27, %spec.select.2
  %.not13.3 = icmp eq i32 %28, 0
  %29 = select i1 %.not13.3, i32 0, i32 %27
  %spec.select.3 = sub nsw i32 %spec.select.2, %29
  %30 = add i32 %.016, 4
  %exitcond.not.3 = icmp eq i32 %26, %3
  br i1 %exitcond.not.3, label %._crit_edge, label %.lr.ph, !llvm.loop !7
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.unroll.disable"}
!7 = distinct !{!7, !8}
!8 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass