; LLVM IR from indjev99/Evolving-Snakes :: sources/ctrNeuralNetwork.ll (ZN16ctrNeuralNetwork10loadInputsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ctrNeuralNetwork = type { %struct.controller, double, double, double, i32, %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.5", %"class.std::vector.5" }
%struct.controller = type { ptr, [3 x i32], [3 x i8], [1 x i32], [1 x i8], [1 x i32], [1 x i8], i32, i32 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<std::vector<double>>, std::allocator<std::vector<std::vector<double>>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN16ctrNeuralNetwork10loadInputsEv(ptr noundef nonnull align 8 dereferenceable(200) %0) #3 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %8 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 0, ptr %3, align 4, !tbaa !9
  %9 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %10 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef 0) #5
  %11 = load i32, ptr %3, align 4, !tbaa !9
  %12 = add nsw i32 %11, 1
  store i32 %12, ptr %3, align 4, !tbaa !9
  %13 = sext i32 %11 to i64
  %14 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %13) #5
  store double 1.000000e+00, ptr %14, align 8, !tbaa !11
  %15 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 1
  %16 = load double, ptr %15, align 8, !tbaa !13
  %17 = fsub double 1.000000e+00, %16
  %18 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 7
  %19 = load i32, ptr %18, align 8, !tbaa !28
  %20 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %17, i32 noundef %19)
  %21 = fsub double 1.000000e+00, %20
  %22 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef 0) #5
  %24 = load i32, ptr %3, align 4, !tbaa !9
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %3, align 4, !tbaa !9
  %26 = sext i32 %24 to i64
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %26) #5
  store double %21, ptr %27, align 8, !tbaa !11
  %28 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 8
  %29 = load i32, ptr %28, align 4, !tbaa !29
  %30 = icmp sge i32 %29, 0
  %31 = zext i1 %30 to i64
  %32 = select i1 %30, i32 1, i32 -1
  %33 = sitofp i32 %32 to double
  %34 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 1
  %35 = load double, ptr %34, align 8, !tbaa !13
  %36 = fsub double 1.000000e+00, %35
  %37 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 8
  %38 = load i32, ptr %37, align 4, !tbaa !29
  %39 = call noundef double @_ZSt4fabsIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef %38)
  %40 = call double @pow(double noundef %36, double noundef %39) #5
  %41 = fsub double 1.000000e+00, %40
  %42 = fmul double %33, %41
  %43 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %44 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef 0) #5
  %45 = load i32, ptr %3, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %3, align 4, !tbaa !9
  %47 = sext i32 %45 to i64
  %48 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %47) #5
  store double %42, ptr %48, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %49

49:                                               ; preds = %97, %1
  %50 = load i32, ptr %4, align 4, !tbaa !9
  %51 = icmp sle i32 %50, 2
  br i1 %51, label %53, label %52

52:                                               ; preds = %49
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %100

53:                                               ; preds = %49
  %54 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 1
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [3 x i32], ptr %54, i64 0, i64 %56
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = icmp sge i32 %58, 0
  br i1 %59, label %60, label %76

60:                                               ; preds = %53
  %61 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 2
  %62 = load double, ptr %61, align 8, !tbaa !30
  %63 = fsub double 1.000000e+00, %62
  %64 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 1
  %65 = load i32, ptr %4, align 4, !tbaa !9
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds [3 x i32], ptr %64, i64 0, i64 %66
  %68 = load i32, ptr %67, align 4, !tbaa !9
  %69 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %63, i32 noundef %68)
  %70 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %71 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef 0) #5
  %72 = load i32, ptr %3, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %3, align 4, !tbaa !9
  %74 = sext i32 %72 to i64
  %75 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %71, i64 noundef %74) #5
  store double %69, ptr %75, align 8, !tbaa !11
  br label %83

76:                                               ; preds = %53
  %77 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %78 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef 0) #5
  %79 = load i32, ptr %3, align 4, !tbaa !9
  %80 = add nsw i32 %79, 1
  store i32 %80, ptr %3, align 4, !tbaa !9
  %81 = sext i32 %79 to i64
  %82 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %81) #5
  store double 0.000000e+00, ptr %82, align 8, !tbaa !11
  br label %83

83:                                               ; preds = %76, %60
  %84 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 2
  %85 = load i32, ptr %4, align 4, !tbaa !9
  %86 = sext i32 %85 to i64
  %87 = getelementptr inbounds [3 x i8], ptr %84, i64 0, i64 %86
  %88 = load i8, ptr %87, align 1, !tbaa !31, !range !33, !noundef !34
  %89 = trunc i8 %88 to i1
  %90 = uitofp i1 %89 to double
  %91 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %92 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %91, i64 noundef 0) #5
  %93 = load i32, ptr %3, align 4, !tbaa !9
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %3, align 4, !tbaa !9
  %95 = sext i32 %93 to i64
  %96 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %95) #5
  store double %90, ptr %96, align 8, !tbaa !11
  br label %97

97:                                               ; preds = %83
  %98 = load i32, ptr %4, align 4, !tbaa !9
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %4, align 4, !tbaa !9
  br label %49, !llvm.loop !35

100:                                              ; preds = %52
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %101

101:                                              ; preds = %149, %100
  %102 = load i32, ptr %5, align 4, !tbaa !9
  %103 = icmp sle i32 %102, 0
  br i1 %103, label %105, label %104

104:                                              ; preds = %101
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %152

105:                                              ; preds = %101
  %106 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 3
  %107 = load i32, ptr %5, align 4, !tbaa !9
  %108 = sext i32 %107 to i64
  %109 = getelementptr inbounds [1 x i32], ptr %106, i64 0, i64 %108
  %110 = load i32, ptr %109, align 4, !tbaa !9
  %111 = icmp sge i32 %110, 0
  br i1 %111, label %112, label %128

112:                                              ; preds = %105
  %113 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 2
  %114 = load double, ptr %113, align 8, !tbaa !30
  %115 = fsub double 1.000000e+00, %114
  %116 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 3
  %117 = load i32, ptr %5, align 4, !tbaa !9
  %118 = sext i32 %117 to i64
  %119 = getelementptr inbounds [1 x i32], ptr %116, i64 0, i64 %118
  %120 = load i32, ptr %119, align 4, !tbaa !9
  %121 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %115, i32 noundef %120)
  %122 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %123 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %122, i64 noundef 0) #5
  %124 = load i32, ptr %3, align 4, !tbaa !9
  %125 = add nsw i32 %124, 1
  store i32 %125, ptr %3, align 4, !tbaa !9
  %126 = sext i32 %124 to i64
  %127 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %123, i64 noundef %126) #5
  store double %121, ptr %127, align 8, !tbaa !11
  br label %135

128:                                              ; preds = %105
  %129 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %130 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %129, i64 noundef 0) #5
  %131 = load i32, ptr %3, align 4, !tbaa !9
  %132 = add nsw i32 %131, 1
  store i32 %132, ptr %3, align 4, !tbaa !9
  %133 = sext i32 %131 to i64
  %134 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %130, i64 noundef %133) #5
  store double 0.000000e+00, ptr %134, align 8, !tbaa !11
  br label %135

135:                                              ; preds = %128, %112
  %136 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 4
  %137 = load i32, ptr %5, align 4, !tbaa !9
  %138 = sext i32 %137 to i64
  %139 = getelementptr inbounds [1 x i8], ptr %136, i64 0, i64 %138
  %140 = load i8, ptr %139, align 1, !tbaa !31, !range !33, !noundef !34
  %141 = trunc i8 %140 to i1
  %142 = uitofp i1 %141 to double
  %143 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %144 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %143, i64 noundef 0) #5
  %145 = load i32, ptr %3, align 4, !tbaa !9
  %146 = add nsw i32 %145, 1
  store i32 %146, ptr %3, align 4, !tbaa !9
  %147 = sext i32 %145 to i64
  %148 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %144, i64 noundef %147) #5
  store double %142, ptr %148, align 8, !tbaa !11
  br label %149

149:                                              ; preds = %135
  %150 = load i32, ptr %5, align 4, !tbaa !9
  %151 = add nsw i32 %150, 1
  store i32 %151, ptr %5, align 4, !tbaa !9
  br label %101, !llvm.loop !37

152:                                              ; preds = %104
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %153

153:                                              ; preds = %201, %152
  %154 = load i32, ptr %6, align 4, !tbaa !9
  %155 = icmp sle i32 %154, 0
  br i1 %155, label %157, label %156

156:                                              ; preds = %153
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %204

157:                                              ; preds = %153
  %158 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 5
  %159 = load i32, ptr %6, align 4, !tbaa !9
  %160 = sext i32 %159 to i64
  %161 = getelementptr inbounds [1 x i32], ptr %158, i64 0, i64 %160
  %162 = load i32, ptr %161, align 4, !tbaa !9
  %163 = icmp sge i32 %162, 0
  br i1 %163, label %164, label %180

164:                                              ; preds = %157
  %165 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 2
  %166 = load double, ptr %165, align 8, !tbaa !30
  %167 = fsub double 1.000000e+00, %166
  %168 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 5
  %169 = load i32, ptr %6, align 4, !tbaa !9
  %170 = sext i32 %169 to i64
  %171 = getelementptr inbounds [1 x i32], ptr %168, i64 0, i64 %170
  %172 = load i32, ptr %171, align 4, !tbaa !9
  %173 = call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %167, i32 noundef %172)
  %174 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %175 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %174, i64 noundef 0) #5
  %176 = load i32, ptr %3, align 4, !tbaa !9
  %177 = add nsw i32 %176, 1
  store i32 %177, ptr %3, align 4, !tbaa !9
  %178 = sext i32 %176 to i64
  %179 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %175, i64 noundef %178) #5
  store double %173, ptr %179, align 8, !tbaa !11
  br label %187

180:                                              ; preds = %157
  %181 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %182 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %181, i64 noundef 0) #5
  %183 = load i32, ptr %3, align 4, !tbaa !9
  %184 = add nsw i32 %183, 1
  store i32 %184, ptr %3, align 4, !tbaa !9
  %185 = sext i32 %183 to i64
  %186 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %182, i64 noundef %185) #5
  store double 0.000000e+00, ptr %186, align 8, !tbaa !11
  br label %187

187:                                              ; preds = %180, %164
  %188 = getelementptr inbounds %struct.controller, ptr %8, i32 0, i32 6
  %189 = load i32, ptr %6, align 4, !tbaa !9
  %190 = sext i32 %189 to i64
  %191 = getelementptr inbounds [1 x i8], ptr %188, i64 0, i64 %190
  %192 = load i8, ptr %191, align 1, !tbaa !31, !range !33, !noundef !34
  %193 = trunc i8 %192 to i1
  %194 = uitofp i1 %193 to double
  %195 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %196 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %195, i64 noundef 0) #5
  %197 = load i32, ptr %3, align 4, !tbaa !9
  %198 = add nsw i32 %197, 1
  store i32 %198, ptr %3, align 4, !tbaa !9
  %199 = sext i32 %197 to i64
  %200 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %196, i64 noundef %199) #5
  store double %194, ptr %200, align 8, !tbaa !11
  br label %201

201:                                              ; preds = %187
  %202 = load i32, ptr %6, align 4, !tbaa !9
  %203 = add nsw i32 %202, 1
  store i32 %203, ptr %6, align 4, !tbaa !9
  br label %153, !llvm.loop !38

204:                                              ; preds = %156
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %205

205:                                              ; preds = %228, %204
  %206 = load i32, ptr %7, align 4, !tbaa !9
  %207 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 4
  %208 = load i32, ptr %207, align 8, !tbaa !39
  %209 = icmp slt i32 %206, %208
  br i1 %209, label %211, label %210

210:                                              ; preds = %205
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %231

211:                                              ; preds = %205
  %212 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %213 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 5
  %214 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %213) #5
  %215 = sub i64 %214, 1
  %216 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %212, i64 noundef %215) #5
  %217 = load i32, ptr %7, align 4, !tbaa !9
  %218 = add nsw i32 6, %217
  %219 = sext i32 %218 to i64
  %220 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %216, i64 noundef %219) #5
  %221 = load double, ptr %220, align 8, !tbaa !11
  %222 = getelementptr inbounds %struct.ctrNeuralNetwork, ptr %8, i32 0, i32 7
  %223 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %222, i64 noundef 0) #5
  %224 = load i32, ptr %3, align 4, !tbaa !9
  %225 = add nsw i32 %224, 1
  store i32 %225, ptr %3, align 4, !tbaa !9
  %226 = sext i32 %224 to i64
  %227 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %223, i64 noundef %226) #5
  store double %221, ptr %227, align 8, !tbaa !11
  br label %228

228:                                              ; preds = %211
  %229 = load i32, ptr %7, align 4, !tbaa !9
  %230 = add nsw i32 %229, 1
  store i32 %230, ptr %7, align 4, !tbaa !9
  br label %205, !llvm.loop !40

231:                                              ; preds = %210
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  ret void
}

; Function Attrs: nounwind
declare double @pow(double noundef, double noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt4fabsIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = !{!14, !12, i64 48}
!14 = !{!"_ZTS16ctrNeuralNetwork", !15, i64 0, !12, i64 48, !12, i64 56, !12, i64 64, !10, i64 72, !16, i64 80, !20, i64 104, !24, i64 128, !24, i64 152, !24, i64 176}
!15 = !{!"_ZTS10controller", !7, i64 8, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !10, i64 40, !10, i64 44}
!16 = !{!"_ZTSSt6vectorIiSaIiEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !25, i64 0}
!25 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !26, i64 0}
!26 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !27, i64 0}
!27 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!15, !10, i64 40}
!29 = !{!15, !10, i64 44}
!30 = !{!14, !12, i64 56}
!31 = !{!32, !32, i64 0}
!32 = !{!"bool", !7, i64 0}
!33 = !{i8 0, i8 2}
!34 = !{}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}
!37 = distinct !{!37, !36}
!38 = distinct !{!38, !36}
!39 = !{!14, !10, i64 72}
!40 = distinct !{!40, !36}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN16ctrNeuralNetwork10loadInputsEv(ptr noundef nonnull align 8 dereferenceable(200) %0) local_unnamed_addr #0 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 128
  %3 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %4 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef 0) #3
  store double 1.000000e+00, ptr %4, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 48
  %6 = load double, ptr %5, align 8, !tbaa !9
  %7 = fsub double 1.000000e+00, %6
  %8 = getelementptr inbounds i8, ptr %0, i64 40
  %9 = load i32, ptr %8, align 8, !tbaa !26
  %10 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %7, i32 noundef %9)
  %11 = fsub double 1.000000e+00, %10
  %12 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef 1) #3
  store double %11, ptr %13, align 8, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %0, i64 44
  %15 = load i32, ptr %14, align 4, !tbaa !27
  %16 = icmp sgt i32 %15, -1
  %17 = select i1 %16, i32 1, i32 -1
  %18 = sitofp i32 %17 to double
  %19 = load double, ptr %5, align 8, !tbaa !9
  %20 = fsub double 1.000000e+00, %19
  %21 = tail call noundef double @_ZSt4fabsIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef %15)
  %22 = tail call double @pow(double noundef %20, double noundef %21) #3
  %23 = fsub double 1.000000e+00, %22
  %24 = fmul double %23, %18
  %25 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %26 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef 2) #3
  store double %24, ptr %26, align 8, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %0, i64 8
  %28 = getelementptr inbounds i8, ptr %0, i64 56
  %29 = getelementptr inbounds i8, ptr %0, i64 20
  %30 = load i32, ptr %27, align 8, !tbaa !28
  %31 = icmp sgt i32 %30, -1
  br i1 %31, label %32, label %36

32:                                               ; preds = %1
  %33 = load double, ptr %28, align 8, !tbaa !29
  %34 = fsub double 1.000000e+00, %33
  %35 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %34, i32 noundef %30)
  br label %36

36:                                               ; preds = %1, %32
  %.sink = phi double [ %35, %32 ], [ 0.000000e+00, %1 ]
  %37 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %38 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef 3) #3
  store double %.sink, ptr %38, align 8, !tbaa !5
  %39 = load i8, ptr %29, align 4, !tbaa !30, !range !32, !noundef !33
  %40 = trunc nuw i8 %39 to i1
  %41 = uitofp i1 %40 to double
  %42 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %43 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %42, i64 noundef 4) #3
  store double %41, ptr %43, align 8, !tbaa !5
  %44 = getelementptr inbounds i8, ptr %0, i64 12
  %45 = load i32, ptr %44, align 4, !tbaa !28
  %46 = icmp sgt i32 %45, -1
  br i1 %46, label %47, label %51

47:                                               ; preds = %36
  %48 = load double, ptr %28, align 8, !tbaa !29
  %49 = fsub double 1.000000e+00, %48
  %50 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %49, i32 noundef %45)
  br label %51

51:                                               ; preds = %36, %47
  %.sink59 = phi double [ %50, %47 ], [ 0.000000e+00, %36 ]
  %52 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %53 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef 5) #3
  store double %.sink59, ptr %53, align 8, !tbaa !5
  %54 = getelementptr inbounds i8, ptr %0, i64 21
  %55 = load i8, ptr %54, align 1, !tbaa !30, !range !32, !noundef !33
  %56 = trunc nuw i8 %55 to i1
  %57 = uitofp i1 %56 to double
  %58 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %59 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %58, i64 noundef 6) #3
  store double %57, ptr %59, align 8, !tbaa !5
  %60 = getelementptr inbounds i8, ptr %0, i64 16
  %61 = load i32, ptr %60, align 8, !tbaa !28
  %62 = icmp sgt i32 %61, -1
  br i1 %62, label %63, label %.preheader39

63:                                               ; preds = %51
  %64 = load double, ptr %28, align 8, !tbaa !29
  %65 = fsub double 1.000000e+00, %64
  %66 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %65, i32 noundef %61)
  br label %.preheader39

.preheader39:                                     ; preds = %51, %63
  %.sink62 = phi double [ %66, %63 ], [ 0.000000e+00, %51 ]
  %67 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %68 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef 7) #3
  store double %.sink62, ptr %68, align 8, !tbaa !5
  %69 = getelementptr inbounds i8, ptr %0, i64 22
  %70 = load i8, ptr %69, align 2, !tbaa !30, !range !32, !noundef !33
  %71 = trunc nuw i8 %70 to i1
  %72 = uitofp i1 %71 to double
  %73 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %74 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %73, i64 noundef 8) #3
  store double %72, ptr %74, align 8, !tbaa !5
  %75 = getelementptr inbounds i8, ptr %0, i64 24
  %76 = getelementptr inbounds i8, ptr %0, i64 28
  %77 = load i32, ptr %75, align 8, !tbaa !28
  %78 = icmp sgt i32 %77, -1
  br i1 %78, label %79, label %.preheader38

79:                                               ; preds = %.preheader39
  %80 = load double, ptr %28, align 8, !tbaa !29
  %81 = fsub double 1.000000e+00, %80
  %82 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %81, i32 noundef %77)
  br label %.preheader38

.preheader38:                                     ; preds = %.preheader39, %79
  %.sink65 = phi double [ %82, %79 ], [ 0.000000e+00, %.preheader39 ]
  %83 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %84 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %83, i64 noundef 9) #3
  store double %.sink65, ptr %84, align 8, !tbaa !5
  %85 = load i8, ptr %76, align 4, !tbaa !30, !range !32, !noundef !33
  %86 = trunc nuw i8 %85 to i1
  %87 = uitofp i1 %86 to double
  %88 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %89 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef 10) #3
  store double %87, ptr %89, align 8, !tbaa !5
  %90 = getelementptr inbounds i8, ptr %0, i64 32
  %91 = getelementptr inbounds i8, ptr %0, i64 36
  %92 = load i32, ptr %90, align 8, !tbaa !28
  %93 = icmp sgt i32 %92, -1
  br i1 %93, label %95, label %.preheader

.lr.ph:                                           ; preds = %.preheader
  %94 = getelementptr inbounds i8, ptr %0, i64 80
  br label %109

95:                                               ; preds = %.preheader38
  %96 = load double, ptr %28, align 8, !tbaa !29
  %97 = fsub double 1.000000e+00, %96
  %98 = tail call noundef double @_ZSt3powIdiEN9__gnu_cxx9__promoteIDTplcvNS1_IT_Xsr3std12__is_integerIS2_EE7__valueEE6__typeELi0EcvNS1_IT0_Xsr3std12__is_integerIS5_EE7__valueEE6__typeELi0EEXsr3std12__is_integerIS8_EE7__valueEE6__typeES2_S5_(double noundef %97, i32 noundef %92)
  br label %.preheader

.preheader:                                       ; preds = %.preheader38, %95
  %.sink68 = phi double [ %98, %95 ], [ 0.000000e+00, %.preheader38 ]
  %99 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %100 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %99, i64 noundef 11) #3
  store double %.sink68, ptr %100, align 8, !tbaa !5
  %101 = load i8, ptr %91, align 4, !tbaa !30, !range !32, !noundef !33
  %102 = trunc nuw i8 %101 to i1
  %103 = uitofp i1 %102 to double
  %104 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %105 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %104, i64 noundef 12) #3
  store double %103, ptr %105, align 8, !tbaa !5
  %106 = getelementptr inbounds i8, ptr %0, i64 72
  %107 = load i32, ptr %106, align 8, !tbaa !34
  %108 = icmp sgt i32 %107, 0
  br i1 %108, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %109, %.preheader
  ret void

109:                                              ; preds = %.lr.ph, %109
  %indvars.iv52 = phi i64 [ 13, %.lr.ph ], [ %indvars.iv.next53, %109 ]
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %109 ]
  %110 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %94) #3
  %111 = add i64 %110, -1
  %112 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %111) #3
  %113 = add nuw nsw i64 %indvars.iv, 6
  %114 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %112, i64 noundef %113) #3
  %115 = load double, ptr %114, align 8, !tbaa !5
  %116 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef 0) #3
  %indvars.iv.next53 = add nuw nsw i64 %indvars.iv52, 1
  %117 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %116, i64 noundef %indvars.iv52) #3
  store double %115, ptr %117, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %118 = load i32, ptr %106, align 8, !tbaa !34
  %119 = sext i32 %118 to i64
  %120 = icmp slt i64 %indvars.iv.next, %119
  br i1 %120, label %109, label %._crit_edge, !llvm.loop !35
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @pow(double noundef, double noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef double @_ZSt4fabsIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_(i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 48}
!10 = !{!"_ZTS16ctrNeuralNetwork", !11, i64 0, !6, i64 48, !6, i64 56, !6, i64 64, !12, i64 72, !13, i64 80, !18, i64 104, !22, i64 128, !22, i64 152, !22, i64 176}
!11 = !{!"_ZTS10controller", !7, i64 8, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !12, i64 40, !12, i64 44}
!12 = !{!"int", !7, i64 0}
!13 = !{!"_ZTSSt6vectorIiSaIiEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIiSaIiEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIiSaIiEE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!17 = !{!"any pointer", !7, i64 0}
!18 = !{!"_ZTSSt6vectorIS_IS_IdSaIdEESaIS1_EESaIS3_EE", !19, i64 0}
!19 = !{!"_ZTSSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE12_Vector_implE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt6vectorIS0_IdSaIdEESaIS2_EESaIS4_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!22 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !23, i64 0}
!23 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !24, i64 0}
!24 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !25, i64 0}
!25 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !17, i64 0, !17, i64 8, !17, i64 16}
!26 = !{!11, !12, i64 40}
!27 = !{!11, !12, i64 44}
!28 = !{!12, !12, i64 0}
!29 = !{!10, !6, i64 56}
!30 = !{!31, !31, i64 0}
!31 = !{!"bool", !7, i64 0}
!32 = !{i8 0, i8 2}
!33 = !{}
!34 = !{!10, !12, i64 72}
!35 = distinct !{!35, !36}
!36 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass