; LLVM IR from devicehive/esp8266-firmware :: firmware-src/sources (dhesperrors)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.26 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.30 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.31 = external hidden unnamed_addr constant [19 x i8], align 1
@.str.32 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.34 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.35 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.36 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.37 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.38 = external hidden unnamed_addr constant [24 x i8], align 1
@dhesperrors_espconn_result.str = external hidden constant [6 x i8], align 4
@dhesperrors_espconn_result.str.39 = external hidden constant [6 x i8], align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @dhdebug_ram(ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @dhesperrors_espconn_result(ptr noundef %0, i32 noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  store ptr null, ptr %5, align 8, !tbaa !5
  %6 = load i32, ptr %4, align 4, !tbaa !9
  switch i32 %6, label %20 [
    i32 0, label %7
    i32 -1, label %8
    i32 -3, label %9
    i32 -4, label %10
    i32 -5, label %11
    i32 -8, label %12
    i32 -9, label %13
    i32 -10, label %14
    i32 -11, label %15
    i32 -12, label %16
    i32 -15, label %17
    i32 -28, label %18
    i32 -61, label %19
  ]

7:                                                ; preds = %2
  store ptr @.str.26, ptr %5, align 8, !tbaa !5
  br label %20

8:                                                ; preds = %2
  store ptr @.str.27, ptr %5, align 8, !tbaa !5
  br label %20

9:                                                ; preds = %2
  store ptr @.str.28, ptr %5, align 8, !tbaa !5
  br label %20

10:                                               ; preds = %2
  store ptr @.str.29, ptr %5, align 8, !tbaa !5
  br label %20

11:                                               ; preds = %2
  store ptr @.str.30, ptr %5, align 8, !tbaa !5
  br label %20

12:                                               ; preds = %2
  store ptr @.str.31, ptr %5, align 8, !tbaa !5
  br label %20

13:                                               ; preds = %2
  store ptr @.str.32, ptr %5, align 8, !tbaa !5
  br label %20

14:                                               ; preds = %2
  store ptr @.str.33, ptr %5, align 8, !tbaa !5
  br label %20

15:                                               ; preds = %2
  store ptr @.str.34, ptr %5, align 8, !tbaa !5
  br label %20

16:                                               ; preds = %2
  store ptr @.str.35, ptr %5, align 8, !tbaa !5
  br label %20

17:                                               ; preds = %2
  store ptr @.str.36, ptr %5, align 8, !tbaa !5
  br label %20

18:                                               ; preds = %2
  store ptr @.str.37, ptr %5, align 8, !tbaa !5
  br label %20

19:                                               ; preds = %2
  store ptr @.str.38, ptr %5, align 8, !tbaa !5
  br label %20

20:                                               ; preds = %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8, %7, %2
  %21 = load ptr, ptr %5, align 8, !tbaa !5
  %22 = icmp ne ptr %21, null
  br i1 %22, label %23, label %29

23:                                               ; preds = %20
  br label %24

24:                                               ; preds = %23
  %25 = load ptr, ptr %3, align 8, !tbaa !5
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  call void (ptr, ...) @dhdebug_ram(ptr noundef @dhesperrors_espconn_result.str, ptr noundef %25, ptr noundef %26)
  br label %27

27:                                               ; preds = %24
  br label %28

28:                                               ; preds = %27
  br label %35

29:                                               ; preds = %20
  br label %30

30:                                               ; preds = %29
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = load i32, ptr %4, align 4, !tbaa !9
  call void (ptr, ...) @dhdebug_ram(ptr noundef @dhesperrors_espconn_result.str.39, ptr noundef %31, i32 noundef %32)
  br label %33

33:                                               ; preds = %30
  br label %34

34:                                               ; preds = %33
  br label %35

35:                                               ; preds = %34, %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.26 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.27 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.28 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.29 = external hidden unnamed_addr constant [16 x i8], align 1
@.str.30 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.31 = external hidden unnamed_addr constant [19 x i8], align 1
@.str.32 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.33 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.34 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.35 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.36 = external hidden unnamed_addr constant [18 x i8], align 1
@.str.37 = external hidden unnamed_addr constant [21 x i8], align 1
@.str.38 = external hidden unnamed_addr constant [24 x i8], align 1
@dhesperrors_espconn_result.str = external hidden constant [6 x i8], align 4
@dhesperrors_espconn_result.str.39 = external hidden constant [6 x i8], align 4

declare void @dhdebug_ram(ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @dhesperrors_espconn_result(ptr noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  switch i32 %1, label %16 [
    i32 0, label %15
    i32 -1, label %3
    i32 -3, label %4
    i32 -4, label %5
    i32 -5, label %6
    i32 -8, label %7
    i32 -9, label %8
    i32 -10, label %9
    i32 -11, label %10
    i32 -12, label %11
    i32 -15, label %12
    i32 -28, label %13
    i32 -61, label %14
  ]

3:                                                ; preds = %2
  br label %15

4:                                                ; preds = %2
  br label %15

5:                                                ; preds = %2
  br label %15

6:                                                ; preds = %2
  br label %15

7:                                                ; preds = %2
  br label %15

8:                                                ; preds = %2
  br label %15

9:                                                ; preds = %2
  br label %15

10:                                               ; preds = %2
  br label %15

11:                                               ; preds = %2
  br label %15

12:                                               ; preds = %2
  br label %15

13:                                               ; preds = %2
  br label %15

14:                                               ; preds = %2
  br label %15

15:                                               ; preds = %2, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5, %4, %3
  %.0.ph = phi ptr [ @.str.27, %3 ], [ @.str.28, %4 ], [ @.str.29, %5 ], [ @.str.30, %6 ], [ @.str.31, %7 ], [ @.str.32, %8 ], [ @.str.33, %9 ], [ @.str.34, %10 ], [ @.str.35, %11 ], [ @.str.36, %12 ], [ @.str.37, %13 ], [ @.str.38, %14 ], [ @.str.26, %2 ]
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @dhesperrors_espconn_result.str, ptr noundef %0, ptr noundef nonnull %.0.ph) #2
  br label %17

16:                                               ; preds = %2
  tail call void (ptr, ...) @dhdebug_ram(ptr noundef nonnull @dhesperrors_espconn_result.str.39, ptr noundef %0, i32 noundef %1) #2
  br label %17

17:                                               ; preds = %16, %15
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass