; LLVM IR from devparthgarg/Data-Structures-and-Algorithms :: 09. Hashing/05 Intersection of Arrays/05a Intersection of Arrays.ll (Z12intersectionPiS_ii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z12intersectionPiS_ii(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i8, align 1
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %80, %4
  %16 = load i32, ptr %10, align 4, !tbaa !9
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = icmp slt i32 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  store i32 2, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %83

20:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 1, ptr %12) #2
  store i8 0, ptr %12, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %40, %20
  %22 = load i32, ptr %13, align 4, !tbaa !9
  %23 = load i32, ptr %10, align 4, !tbaa !9
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  store i32 5, ptr %11, align 4
  br label %43

26:                                               ; preds = %21
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds i32, ptr %27, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !9
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds i32, ptr %32, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = icmp eq i32 %31, %36
  br i1 %37, label %38, label %39

38:                                               ; preds = %26
  store i8 1, ptr %12, align 1, !tbaa !11
  store i32 5, ptr %11, align 4
  br label %43

39:                                               ; preds = %26
  br label %40

40:                                               ; preds = %39
  %41 = load i32, ptr %13, align 4, !tbaa !9
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr %13, align 4, !tbaa !9
  br label %21, !llvm.loop !13

43:                                               ; preds = %38, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  br label %44

44:                                               ; preds = %43
  %45 = load i8, ptr %12, align 1, !tbaa !11, !range !15, !noundef !16
  %46 = trunc i8 %45 to i1
  %47 = zext i1 %46 to i32
  %48 = icmp eq i32 %47, 1
  br i1 %48, label %49, label %50

49:                                               ; preds = %44
  store i32 4, ptr %11, align 4
  br label %77

50:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %51

51:                                               ; preds = %72, %50
  %52 = load i32, ptr %14, align 4, !tbaa !9
  %53 = load i32, ptr %8, align 4, !tbaa !9
  %54 = icmp slt i32 %52, %53
  br i1 %54, label %56, label %55

55:                                               ; preds = %51
  store i32 8, ptr %11, align 4
  br label %75

56:                                               ; preds = %51
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = load i32, ptr %10, align 4, !tbaa !9
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds i32, ptr %57, i64 %59
  %61 = load i32, ptr %60, align 4, !tbaa !9
  %62 = load ptr, ptr %6, align 8, !tbaa !5
  %63 = load i32, ptr %14, align 4, !tbaa !9
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds i32, ptr %62, i64 %64
  %66 = load i32, ptr %65, align 4, !tbaa !9
  %67 = icmp eq i32 %61, %66
  br i1 %67, label %68, label %71

68:                                               ; preds = %56
  %69 = load i32, ptr %9, align 4, !tbaa !9
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %9, align 4, !tbaa !9
  store i32 8, ptr %11, align 4
  br label %75

71:                                               ; preds = %56
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr %14, align 4, !tbaa !9
  %74 = add nsw i32 %73, 1
  store i32 %74, ptr %14, align 4, !tbaa !9
  br label %51, !llvm.loop !17

75:                                               ; preds = %68, %55
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %76

76:                                               ; preds = %75
  store i32 0, ptr %11, align 4
  br label %77

77:                                               ; preds = %76, %49
  call void @llvm.lifetime.end.p0(i64 1, ptr %12) #2
  %78 = load i32, ptr %11, align 4
  switch i32 %78, label %85 [
    i32 0, label %79
    i32 4, label %80
  ]

79:                                               ; preds = %77
  br label %80

80:                                               ; preds = %79, %77
  %81 = load i32, ptr %10, align 4, !tbaa !9
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %10, align 4, !tbaa !9
  br label %15, !llvm.loop !18

83:                                               ; preds = %19
  %84 = load i32, ptr %9, align 4, !tbaa !9
  store i32 1, ptr %11, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret i32 %84

85:                                               ; preds = %77
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local noundef i32 @_Z12intersectionPiS_ii(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %2, 0
  %6 = icmp sgt i32 %3, 0
  %or.cond = and i1 %5, %6
  br i1 %or.cond, label %.preheader.us.preheader, label %._crit_edge

.preheader.us.preheader:                          ; preds = %4
  %wide.trip.count44 = zext nneg i32 %2 to i64
  %wide.trip.count39 = zext nneg i32 %3 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %.loopexit23.us
  %indvars.iv41 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next42, %.loopexit23.us ]
  %.02227.us = phi i32 [ 0, %.preheader.us.preheader ], [ %.2.us, %.loopexit23.us ]
  %.not30 = icmp eq i64 %indvars.iv41, 0
  br i1 %.not30, label %.preheader.us..critedge.preheader.us_crit_edge, label %.lr.ph.us

.preheader.us..critedge.preheader.us_crit_edge:   ; preds = %.preheader.us
  %.pre = load i32, ptr %0, align 4, !tbaa !5
  br label %.critedge.preheader.us

7:                                                ; preds = %14
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %indvars.iv41
  br i1 %exitcond.not, label %.critedge.preheader.us, label %14, !llvm.loop !9

.critedge.us:                                     ; preds = %8
  %indvars.iv.next37 = add nuw nsw i64 %indvars.iv36, 1
  %exitcond40.not = icmp eq i64 %indvars.iv.next37, %wide.trip.count39
  br i1 %exitcond40.not, label %.loopexit23.us, label %8, !llvm.loop !11

8:                                                ; preds = %.critedge.preheader.us, %.critedge.us
  %indvars.iv36 = phi i64 [ 0, %.critedge.preheader.us ], [ %indvars.iv.next37, %.critedge.us ]
  %9 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv36
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp eq i32 %18, %10
  br i1 %11, label %12, label %.critedge.us

12:                                               ; preds = %8
  %13 = add nsw i32 %.02227.us, 1
  br label %.loopexit23.us

14:                                               ; preds = %.lr.ph.us, %7
  %indvars.iv = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next, %7 ]
  %15 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = icmp eq i32 %20, %16
  br i1 %17, label %.loopexit23.us, label %7

.loopexit23.us:                                   ; preds = %14, %.critedge.us, %12
  %.2.us = phi i32 [ %13, %12 ], [ %.02227.us, %.critedge.us ], [ %.02227.us, %14 ]
  %indvars.iv.next42 = add nuw nsw i64 %indvars.iv41, 1
  %exitcond45.not = icmp eq i64 %indvars.iv.next42, %wide.trip.count44
  br i1 %exitcond45.not, label %._crit_edge, label %.preheader.us, !llvm.loop !12

.critedge.preheader.us:                           ; preds = %7, %.preheader.us..critedge.preheader.us_crit_edge
  %18 = phi i32 [ %.pre, %.preheader.us..critedge.preheader.us_crit_edge ], [ %20, %7 ]
  br label %8

.lr.ph.us:                                        ; preds = %.preheader.us
  %19 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv41
  %20 = load i32, ptr %19, align 4, !tbaa !5
  br label %14

._crit_edge:                                      ; preds = %.loopexit23.us, %4
  %.022.lcssa = phi i32 [ 0, %4 ], [ %.2.us, %.loopexit23.us ]
  ret i32 %.022.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass