; LLVM IR from ggml-org/ggml :: examples/common.ll (Z10vad_simpleRSt6vectorIfSaIfEEiiffb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external global ptr, align 8
@.str.91 = external hidden unnamed_addr constant [68 x i8], align 1
@__func__._Z10vad_simpleRSt6vectorIfSaIfEEiiffb = external hidden unnamed_addr constant [11 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z16high_pass_filterRSt6vectorIfSaIfEEff(ptr noundef nonnull align 8 dereferenceable(24), float noundef, float noundef) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIfSaIfEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z10vad_simpleRSt6vectorIfSaIfEEiiffb(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, float noundef %3, float noundef %4, i1 noundef zeroext %5) #2 {
  %7 = alloca i1, align 1
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca float, align 4
  %12 = alloca float, align 4
  %13 = alloca i8, align 1
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca float, align 4
  %18 = alloca float, align 4
  %19 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store float %3, ptr %11, align 4, !tbaa !11
  store float %4, ptr %12, align 4, !tbaa !11
  %20 = zext i1 %5 to i8
  store i8 %20, ptr %13, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %21 = load ptr, ptr %8, align 8, !tbaa !5
  %22 = call noundef i64 @_ZNKSt6vectorIfSaIfEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %21) #4
  %23 = trunc i64 %22 to i32
  store i32 %23, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = load i32, ptr %10, align 4, !tbaa !9
  %26 = mul nsw i32 %24, %25
  %27 = sdiv i32 %26, 1000
  store i32 %27, ptr %15, align 4, !tbaa !9
  %28 = load i32, ptr %15, align 4, !tbaa !9
  %29 = load i32, ptr %14, align 4, !tbaa !9
  %30 = icmp sge i32 %28, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %6
  store i1 false, ptr %7, align 1
  store i32 1, ptr %16, align 4
  br label %104

32:                                               ; preds = %6
  %33 = load float, ptr %12, align 4, !tbaa !11
  %34 = fcmp ogt float %33, 0.000000e+00
  br i1 %34, label %35, label %40

35:                                               ; preds = %32
  %36 = load ptr, ptr %8, align 8, !tbaa !5
  %37 = load float, ptr %12, align 4, !tbaa !11
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = sitofp i32 %38 to float
  call void @_Z16high_pass_filterRSt6vectorIfSaIfEEff(ptr noundef nonnull align 8 dereferenceable(24) %36, float noundef %37, float noundef %39)
  br label %40

40:                                               ; preds = %35, %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store float 0.000000e+00, ptr %17, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store float 0.000000e+00, ptr %18, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  br label %41

41:                                               ; preds = %70, %40
  %42 = load i32, ptr %19, align 4, !tbaa !9
  %43 = load i32, ptr %14, align 4, !tbaa !9
  %44 = icmp slt i32 %42, %43
  br i1 %44, label %46, label %45

45:                                               ; preds = %41
  store i32 2, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  br label %73

46:                                               ; preds = %41
  %47 = load ptr, ptr %8, align 8, !tbaa !5
  %48 = load i32, ptr %19, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %49) #4
  %51 = load float, ptr %50, align 4, !tbaa !11
  %52 = call float @llvm.fabs.f32(float %51)
  %53 = load float, ptr %17, align 4, !tbaa !11
  %54 = fadd float %53, %52
  store float %54, ptr %17, align 4, !tbaa !11
  %55 = load i32, ptr %19, align 4, !tbaa !9
  %56 = load i32, ptr %14, align 4, !tbaa !9
  %57 = load i32, ptr %15, align 4, !tbaa !9
  %58 = sub nsw i32 %56, %57
  %59 = icmp sge i32 %55, %58
  br i1 %59, label %60, label %69

60:                                               ; preds = %46
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = load i32, ptr %19, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %63) #4
  %65 = load float, ptr %64, align 4, !tbaa !11
  %66 = call float @llvm.fabs.f32(float %65)
  %67 = load float, ptr %18, align 4, !tbaa !11
  %68 = fadd float %67, %66
  store float %68, ptr %18, align 4, !tbaa !11
  br label %69

69:                                               ; preds = %60, %46
  br label %70

70:                                               ; preds = %69
  %71 = load i32, ptr %19, align 4, !tbaa !9
  %72 = add nsw i32 %71, 1
  store i32 %72, ptr %19, align 4, !tbaa !9
  br label %41, !llvm.loop !15

73:                                               ; preds = %45
  %74 = load i32, ptr %14, align 4, !tbaa !9
  %75 = sitofp i32 %74 to float
  %76 = load float, ptr %17, align 4, !tbaa !11
  %77 = fdiv float %76, %75
  store float %77, ptr %17, align 4, !tbaa !11
  %78 = load i32, ptr %15, align 4, !tbaa !9
  %79 = sitofp i32 %78 to float
  %80 = load float, ptr %18, align 4, !tbaa !11
  %81 = fdiv float %80, %79
  store float %81, ptr %18, align 4, !tbaa !11
  %82 = load i8, ptr %13, align 1, !tbaa !13, !range !17, !noundef !18
  %83 = trunc i8 %82 to i1
  br i1 %83, label %84, label %95

84:                                               ; preds = %73
  %85 = load ptr, ptr @stderr, align 8, !tbaa !5
  %86 = load float, ptr %17, align 4, !tbaa !11
  %87 = fpext float %86 to double
  %88 = load float, ptr %18, align 4, !tbaa !11
  %89 = fpext float %88 to double
  %90 = load float, ptr %11, align 4, !tbaa !11
  %91 = fpext float %90 to double
  %92 = load float, ptr %12, align 4, !tbaa !11
  %93 = fpext float %92 to double
  %94 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %85, ptr noundef @.str.91, ptr noundef @__func__._Z10vad_simpleRSt6vectorIfSaIfEEiiffb, double noundef %87, double noundef %89, double noundef %91, double noundef %93) #4
  br label %95

95:                                               ; preds = %84, %73
  %96 = load float, ptr %18, align 4, !tbaa !11
  %97 = load float, ptr %11, align 4, !tbaa !11
  %98 = load float, ptr %17, align 4, !tbaa !11
  %99 = fmul float %97, %98
  %100 = fcmp ogt float %96, %99
  br i1 %100, label %101, label %102

101:                                              ; preds = %95
  store i1 false, ptr %7, align 1
  store i32 1, ptr %16, align 4
  br label %103

102:                                              ; preds = %95
  store i1 true, ptr %7, align 1
  store i32 1, ptr %16, align 4
  br label %103

103:                                              ; preds = %102, %101
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %104

104:                                              ; preds = %103, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  %105 = load i1, ptr %7, align 1
  ret i1 %105
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{i8 0, i8 2}
!18 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external local_unnamed_addr global ptr, align 8
@.str.91 = external hidden unnamed_addr constant [68 x i8], align 1
@__func__._Z10vad_simpleRSt6vectorIfSaIfEEiiffb = external hidden unnamed_addr constant [11 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z16high_pass_filterRSt6vectorIfSaIfEEff(ptr noundef nonnull align 8 dereferenceable(24), float noundef, float noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIfSaIfEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z10vad_simpleRSt6vectorIfSaIfEEiiffb(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, float noundef %3, float noundef %4, i1 noundef zeroext %5) local_unnamed_addr #1 {
  %7 = tail call noundef i64 @_ZNKSt6vectorIfSaIfEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  %8 = trunc i64 %7 to i32
  %9 = mul nsw i32 %2, %1
  %10 = sdiv i32 %9, 1000
  %.not = icmp slt i32 %10, %8
  br i1 %.not, label %11, label %44

11:                                               ; preds = %6
  %12 = fcmp ogt float %4, 0.000000e+00
  br i1 %12, label %13, label %15

13:                                               ; preds = %11
  %14 = sitofp i32 %1 to float
  tail call void @_Z16high_pass_filterRSt6vectorIfSaIfEEff(ptr noundef nonnull align 8 dereferenceable(24) %0, float noundef %4, float noundef %14)
  br label %15

15:                                               ; preds = %13, %11
  %16 = icmp sgt i32 %8, 0
  br i1 %16, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %15
  %17 = sub nsw i32 %8, %10
  %18 = sext i32 %17 to i64
  %wide.trip.count = and i64 %7, 2147483647
  br label %23

._crit_edge:                                      ; preds = %33, %15
  %.034.lcssa = phi float [ 0.000000e+00, %15 ], [ %27, %33 ]
  %.033.lcssa = phi float [ 0.000000e+00, %15 ], [ %.1, %33 ]
  %19 = sitofp i32 %8 to float
  %20 = fdiv float %.034.lcssa, %19
  %21 = sitofp i32 %10 to float
  %22 = fdiv float %.033.lcssa, %21
  br i1 %5, label %34, label %41

23:                                               ; preds = %.lr.ph, %33
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %33 ]
  %.03342 = phi float [ 0.000000e+00, %.lr.ph ], [ %.1, %33 ]
  %.03441 = phi float [ 0.000000e+00, %.lr.ph ], [ %27, %33 ]
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %25 = load float, ptr %24, align 4, !tbaa !5
  %26 = tail call float @llvm.fabs.f32(float %25)
  %27 = fadd float %.03441, %26
  %.not40 = icmp slt i64 %indvars.iv, %18
  br i1 %.not40, label %33, label %28

28:                                               ; preds = %23
  %29 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIfSaIfEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #3
  %30 = load float, ptr %29, align 4, !tbaa !5
  %31 = tail call float @llvm.fabs.f32(float %30)
  %32 = fadd float %.03342, %31
  br label %33

33:                                               ; preds = %23, %28
  %.1 = phi float [ %32, %28 ], [ %.03342, %23 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %23, !llvm.loop !9

34:                                               ; preds = %._crit_edge
  %35 = load ptr, ptr @stderr, align 8, !tbaa !11
  %36 = fpext float %20 to double
  %37 = fpext float %22 to double
  %38 = fpext float %3 to double
  %39 = fpext float %4 to double
  %40 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %35, ptr noundef nonnull @.str.91, ptr noundef nonnull @__func__._Z10vad_simpleRSt6vectorIfSaIfEEiiffb, double noundef %36, double noundef %37, double noundef %38, double noundef %39) #4
  br label %41

41:                                               ; preds = %34, %._crit_edge
  %42 = fmul float %20, %3
  %43 = fcmp ule float %22, %42
  br label %44

44:                                               ; preds = %6, %41
  %.136 = phi i1 [ %43, %41 ], [ false, %6 ]
  ret i1 %.136
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fabs.f32(float) #2

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
attributes #4 = { cold nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass