; LLVM IR from erayzesen/QuarkPhysics :: QuarkPhysics/qworld.ll (ZN6QWorld12ClearSpringsEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.QWorld = type { %"class.std::vector", %"class.std::vector.0", %"class.std::vector.5", %"class.std::vector.10", %"class.std::vector.15", %"class.std::unordered_set", %"class.std::vector.25", ptr, i8, %struct.QVector, i8, i8, i32, float, float, float, i32, i32, %"class.std::vector.30" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<QJoint *, std::allocator<QJoint *>>::_Vector_impl" }
%"struct.std::_Vector_base<QJoint *, std::allocator<QJoint *>>::_Vector_impl" = type { %"struct.std::_Vector_base<QJoint *, std::allocator<QJoint *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<QJoint *, std::allocator<QJoint *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<QSpring *, std::allocator<QSpring *>>::_Vector_impl" }
%"struct.std::_Vector_base<QSpring *, std::allocator<QSpring *>>::_Vector_impl" = type { %"struct.std::_Vector_base<QSpring *, std::allocator<QSpring *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<QSpring *, std::allocator<QSpring *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<QRaycast *, std::allocator<QRaycast *>>::_Vector_impl" }
%"struct.std::_Vector_base<QRaycast *, std::allocator<QRaycast *>>::_Vector_impl" = type { %"struct.std::_Vector_base<QRaycast *, std::allocator<QRaycast *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<QRaycast *, std::allocator<QRaycast *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.10" = type { %"struct.std::_Vector_base.11" }
%"struct.std::_Vector_base.11" = type { %"struct.std::_Vector_base<QGizmo *, std::allocator<QGizmo *>>::_Vector_impl" }
%"struct.std::_Vector_base<QGizmo *, std::allocator<QGizmo *>>::_Vector_impl" = type { %"struct.std::_Vector_base<QGizmo *, std::allocator<QGizmo *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<QGizmo *, std::allocator<QGizmo *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.15" = type { %"struct.std::_Vector_base.16" }
%"struct.std::_Vector_base.16" = type { %"struct.std::_Vector_base<std::vector<QBody *>, std::allocator<std::vector<QBody *>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<QBody *>, std::allocator<std::vector<QBody *>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<QBody *>, std::allocator<std::vector<QBody *>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<QBody *>, std::allocator<std::vector<QBody *>>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::unordered_set" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }
%"class.std::vector.25" = type { %"struct.std::_Vector_base.26" }
%"struct.std::_Vector_base.26" = type { %"struct.std::_Vector_base<QManifold, std::allocator<QManifold>>::_Vector_impl" }
%"struct.std::_Vector_base<QManifold, std::allocator<QManifold>>::_Vector_impl" = type { %"struct.std::_Vector_base<QManifold, std::allocator<QManifold>>::_Vector_impl_data" }
%"struct.std::_Vector_base<QManifold, std::allocator<QManifold>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.QVector = type { float, float }
%"class.std::vector.30" = type { %"struct.std::_Vector_base.31" }
%"struct.std::_Vector_base.31" = type { %"struct.std::_Vector_base<QBody *, std::allocator<QBody *>>::_Vector_impl" }
%"struct.std::_Vector_base<QBody *, std::allocator<QBody *>>::_Vector_impl" = type { %"struct.std::_Vector_base<QBody *, std::allocator<QBody *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<QBody *, std::allocator<QBody *>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%class.QSpring = type <{ ptr, float, [4 x i8], ptr, ptr, float, i8, i8, i8, i8 }>

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef ptr @_ZN6QWorld12ClearSpringsEv(ptr noundef nonnull align 8 dereferenceable(272) %0) #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %5

5:                                                ; preds = %45, %1
  %6 = load i32, ptr %3, align 4, !tbaa !9
  %7 = sext i32 %6 to i64
  %8 = getelementptr inbounds %class.QWorld, ptr %4, i32 0, i32 1
  %9 = call noundef i64 @_ZNKSt6vectorIP7QSpringSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %8) #3
  %10 = icmp ult i64 %7, %9
  br i1 %10, label %12, label %11

11:                                               ; preds = %5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %48

12:                                               ; preds = %5
  %13 = getelementptr inbounds %class.QWorld, ptr %4, i32 0, i32 1
  %14 = load i32, ptr %3, align 4, !tbaa !9
  %15 = sext i32 %14 to i64
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %15) #3
  %17 = load ptr, ptr %16, align 8, !tbaa !5
  %18 = icmp ne ptr %17, null
  br i1 %18, label %19, label %44

19:                                               ; preds = %12
  %20 = getelementptr inbounds %class.QWorld, ptr %4, i32 0, i32 1
  %21 = load i32, ptr %3, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %22) #3
  %24 = load ptr, ptr %23, align 8, !tbaa !5
  %25 = getelementptr inbounds %class.QSpring, ptr %24, i32 0, i32 8
  %26 = load i8, ptr %25, align 2, !tbaa !11, !range !15, !noundef !16
  %27 = trunc i8 %26 to i1
  %28 = zext i1 %27 to i32
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %43

30:                                               ; preds = %19
  %31 = getelementptr inbounds %class.QWorld, ptr %4, i32 0, i32 1
  %32 = load i32, ptr %3, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %33) #3
  %35 = load ptr, ptr %34, align 8, !tbaa !5
  %36 = icmp eq ptr %35, null
  br i1 %36, label %38, label %37

37:                                               ; preds = %30
  call void @_ZdlPvm(ptr noundef %35, i64 noundef 40) #4
  br label %38

38:                                               ; preds = %37, %30
  %39 = getelementptr inbounds %class.QWorld, ptr %4, i32 0, i32 1
  %40 = load i32, ptr %3, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %41) #3
  store ptr null, ptr %42, align 8, !tbaa !5
  br label %43

43:                                               ; preds = %38, %19
  br label %44

44:                                               ; preds = %43, %12
  br label %45

45:                                               ; preds = %44
  %46 = load i32, ptr %3, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %3, align 4, !tbaa !9
  br label %5, !llvm.loop !17

48:                                               ; preds = %11
  %49 = getelementptr inbounds %class.QWorld, ptr %4, i32 0, i32 1
  call void @_ZNSt6vectorIP7QSpringSaIS1_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %49) #3
  ret ptr %4
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP7QSpringSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP7QSpringSaIS1_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !14, i64 38}
!12 = !{!"_ZTS7QSpring", !13, i64 8, !6, i64 16, !6, i64 24, !13, i64 32, !14, i64 36, !14, i64 37, !14, i64 38}
!13 = !{!"float", !7, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef nonnull ptr @_ZN6QWorld12ClearSpringsEv(ptr noundef nonnull returned align 8 dereferenceable(272) %0) local_unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 24
  %3 = tail call noundef i64 @_ZNKSt6vectorIP7QSpringSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %.not9 = icmp eq i64 %3, 0
  br i1 %.not9, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %19, %1
  tail call void @_ZNSt6vectorIP7QSpringSaIS1_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  ret ptr %0

.lr.ph:                                           ; preds = %1, %19
  %indvars.iv = phi i64 [ %indvars.iv.next, %19 ], [ 0, %1 ]
  %4 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #2
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %.not = icmp eq ptr %5, null
  br i1 %.not, label %19, label %6

6:                                                ; preds = %.lr.ph
  %7 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #2
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  %9 = getelementptr inbounds i8, ptr %8, i64 38
  %10 = load i8, ptr %9, align 2, !tbaa !9, !range !13, !noundef !14
  %11 = icmp eq i8 %10, 0
  br i1 %11, label %12, label %19

12:                                               ; preds = %6
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #2
  %14 = load ptr, ptr %13, align 8, !tbaa !5
  %15 = icmp eq ptr %14, null
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  tail call void @_ZdlPvm(ptr noundef nonnull %14, i64 noundef 40) #3
  br label %17

17:                                               ; preds = %16, %12
  %18 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %2, i64 noundef %indvars.iv) #2
  store ptr null, ptr %18, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %.lr.ph, %17, %6
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %20 = tail call noundef i64 @_ZNKSt6vectorIP7QSpringSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %2) #2
  %21 = icmp ugt i64 %20, %indvars.iv.next
  br i1 %21, label %.lr.ph, label %._crit_edge, !llvm.loop !15
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIP7QSpringSaIS1_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIP7QSpringSaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIP7QSpringSaIS1_EE5clearEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

attributes #0 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
attributes #3 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !12, i64 38}
!10 = !{!"_ZTS7QSpring", !11, i64 8, !6, i64 16, !6, i64 24, !11, i64 32, !12, i64 36, !12, i64 37, !12, i64 38}
!11 = !{!"float", !7, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass