; LLVM IR from ucb-bar/RoSE :: soc/sw/baremetal (spiflashread)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [75 x i8], align 1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @reg_read32(i64 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @test_spiflash(i32 noundef %0, i32 noundef %1, i8 noundef zeroext %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i8 %2, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %12 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %12, ptr %8, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %42, %3
  %14 = load i32, ptr %8, align 4, !tbaa !5
  %15 = load i32, ptr %5, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = add i32 %15, %16
  %18 = icmp ult i32 %14, %17
  br i1 %18, label %19, label %45

19:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  %20 = load i32, ptr %8, align 4, !tbaa !5
  %21 = add i32 536870912, %20
  %22 = zext i32 %21 to i64
  %23 = call i32 @reg_read32(i64 noundef %22)
  store i32 %23, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  %24 = load i8, ptr %7, align 1, !tbaa !9
  %25 = icmp ne i8 %24, 0
  br i1 %25, label %29, label %26

26:                                               ; preds = %19
  %27 = load i32, ptr %8, align 4, !tbaa !5
  %28 = sub i32 -559038737, %27
  store i32 %28, ptr %10, align 4, !tbaa !5
  br label %29

29:                                               ; preds = %26, %19
  %30 = load i32, ptr %9, align 4, !tbaa !5
  %31 = load i32, ptr %10, align 4, !tbaa !5
  %32 = icmp ne i32 %30, %31
  br i1 %32, label %33, label %38

33:                                               ; preds = %29
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = load i32, ptr %9, align 4, !tbaa !5
  %36 = load i32, ptr %10, align 4, !tbaa !5
  %37 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %34, i32 noundef %35, i32 noundef %36)
  store i32 1, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %39

38:                                               ; preds = %29
  store i32 0, ptr %11, align 4
  br label %39

39:                                               ; preds = %38, %33
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %40 = load i32, ptr %11, align 4
  switch i32 %40, label %46 [
    i32 0, label %41
  ]

41:                                               ; preds = %39
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = add i32 %43, 4
  store i32 %44, ptr %8, align 4, !tbaa !5
  br label %13, !llvm.loop !10

45:                                               ; preds = %13
  store i32 0, ptr %4, align 4
  store i32 1, ptr %11, align 4
  br label %46

46:                                               ; preds = %45, %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  %47 = load i32, ptr %4, align 4
  ret i32 %47
}

declare i32 @printf(ptr noundef, ...) #3

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [75 x i8], align 1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @reg_read32(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @test_spiflash(i32 noundef %0, i32 noundef %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = add i32 %1, %0
  %5 = icmp ugt i32 %4, %0
  br i1 %5, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %3
  %.not = icmp eq i8 %2, 0
  br i1 %.not, label %.lr.ph.split.us, label %.lr.ph.split

.lr.ph.split.us:                                  ; preds = %.lr.ph, %.critedge.us
  %.01721.us = phi i32 [ %10, %.critedge.us ], [ %0, %.lr.ph ]
  %6 = add i32 %.01721.us, 536870912
  %7 = zext i32 %6 to i64
  %8 = tail call i32 @reg_read32(i64 noundef %7)
  %9 = sub i32 -559038737, %.01721.us
  %.not19.us = icmp eq i32 %8, %9
  br i1 %.not19.us, label %.critedge.us, label %.split.us

.critedge.us:                                     ; preds = %.lr.ph.split.us
  %10 = add i32 %.01721.us, 4
  %11 = icmp ult i32 %10, %4
  br i1 %11, label %.lr.ph.split.us, label %.loopexit, !llvm.loop !5

.lr.ph.split:                                     ; preds = %.lr.ph, %.critedge
  %.01721 = phi i32 [ %16, %.critedge ], [ %0, %.lr.ph ]
  %12 = add i32 %.01721, 536870912
  %13 = zext i32 %12 to i64
  %14 = tail call i32 @reg_read32(i64 noundef %13)
  %.not19 = icmp eq i32 %14, 0
  br i1 %.not19, label %.critedge, label %.split.us

.split.us:                                        ; preds = %.lr.ph.split, %.lr.ph.split.us
  %.us-phi = phi i32 [ %8, %.lr.ph.split.us ], [ %14, %.lr.ph.split ]
  %.us-phi22 = phi i32 [ %9, %.lr.ph.split.us ], [ 0, %.lr.ph.split ]
  %.us-phi23 = phi i32 [ %.01721.us, %.lr.ph.split.us ], [ %.01721, %.lr.ph.split ]
  %15 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %.us-phi23, i32 noundef %.us-phi, i32 noundef %.us-phi22)
  br label %.loopexit

.critedge:                                        ; preds = %.lr.ph.split
  %16 = add i32 %.01721, 4
  %17 = icmp ult i32 %16, %4
  br i1 %17, label %.lr.ph.split, label %.loopexit, !llvm.loop !5

.loopexit:                                        ; preds = %.critedge, %.critedge.us, %3, %.split.us
  %.2 = phi i32 [ 1, %.split.us ], [ 0, %3 ], [ 0, %.critedge.us ], [ 0, %.critedge ]
  ret i32 %.2
}

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass