; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/FIRMWARE/EXAMPLES (pi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @pow_mod(i32 noundef %0, i32 noundef %1, i32 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 1, ptr %7, align 4, !tbaa !5
  %9 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %9, ptr %8, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %31, %3
  br label %11

11:                                               ; preds = %10
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = and i32 %12, 1
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %25

15:                                               ; preds = %11
  %16 = load i32, ptr %7, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = load i32, ptr %8, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = mul nsw i64 %17, %19
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = srem i64 %20, %22
  %24 = trunc i64 %23 to i32
  store i32 %24, ptr %7, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %15, %11
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = ashr i32 %26, 1
  store i32 %27, ptr %5, align 4, !tbaa !5
  %28 = load i32, ptr %5, align 4, !tbaa !5
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %25
  br label %41

31:                                               ; preds = %25
  %32 = load i32, ptr %8, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = load i32, ptr %8, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = mul nsw i64 %33, %35
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = srem i64 %36, %38
  %40 = trunc i64 %39 to i32
  store i32 %40, ptr %8, align 4, !tbaa !5
  br label %10

41:                                               ; preds = %30
  %42 = load i32, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  ret i32 %42
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(none) uwtable
define dso_local range(i32 -2147483647, -2147483648) i32 @pow_mod(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = sext i32 %2 to i64
  br label %5

5:                                                ; preds = %15, %3
  %.012 = phi i32 [ %1, %3 ], [ %16, %15 ]
  %.011 = phi i32 [ 1, %3 ], [ %.1, %15 ]
  %.0 = phi i32 [ %0, %3 ], [ %20, %15 ]
  %6 = and i32 %.012, 1
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %13, label %7

7:                                                ; preds = %5
  %8 = sext i32 %.011 to i64
  %9 = sext i32 %.0 to i64
  %10 = mul nsw i64 %9, %8
  %11 = srem i64 %10, %4
  %12 = trunc nsw i64 %11 to i32
  br label %13

13:                                               ; preds = %7, %5
  %.1 = phi i32 [ %12, %7 ], [ %.011, %5 ]
  %14 = icmp ult i32 %.012, 2
  br i1 %14, label %21, label %15

15:                                               ; preds = %13
  %16 = ashr i32 %.012, 1
  %17 = sext i32 %.0 to i64
  %18 = mul nsw i64 %17, %17
  %19 = srem i64 %18, %4
  %20 = trunc nsw i64 %19 to i32
  br label %5

21:                                               ; preds = %13
  ret i32 %.1
}

attributes #0 = { nofree norecurse nosync nounwind memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass