; LLVM IR from chensoft/libsocket :: src/ip/ip_version.ll (ZNK4chen11ip_version68embeddedEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.chen::ip_version4" = type { %"class.chen::ip_version", i32 }
%"class.chen::ip_version" = type { i8 }
%"class.chen::ip_version6" = type { %"class.chen::ip_version", %"struct.std::array", i32 }
%"struct.std::array" = type { [16 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZNK4chen11ip_version68embeddedEv(ptr noundef nonnull align 4 dereferenceable(24) %0) #1 align 2 {
  %2 = alloca %"class.chen::ip_version4", align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %9 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  %10 = call noundef zeroext i1 @_ZNK4chen11ip_version616isIPv4CompatibleEv(ptr noundef nonnull align 4 dereferenceable(24) %9)
  br i1 %10, label %13, label %11

11:                                               ; preds = %1
  %12 = call noundef zeroext i1 @_ZNK4chen11ip_version612isIPv4MappedEv(ptr noundef nonnull align 4 dereferenceable(24) %9)
  br i1 %12, label %13, label %14

13:                                               ; preds = %11, %1
  br label %18

14:                                               ; preds = %11
  %15 = getelementptr inbounds %"class.chen::ip_version", ptr %9, i32 0, i32 0
  %16 = load i8, ptr %15, align 4, !tbaa !9
  %17 = zext i8 %16 to i32
  br label %18

18:                                               ; preds = %14, %13
  %19 = phi i32 [ 128, %13 ], [ %17, %14 ]
  store i32 %19, ptr %4, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !11
  %20 = load i32, ptr %4, align 4, !tbaa !11
  switch i32 %20, label %106 [
    i32 32, label %21
    i32 40, label %38
    i32 48, label %55
    i32 56, label %72
    i32 64, label %89
  ]

21:                                               ; preds = %18
  %22 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %23 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %22, i64 noundef 4) #3
  %24 = load i8, ptr %23, align 1, !tbaa !13
  %25 = zext i8 %24 to i32
  store i32 %25, ptr %5, align 4, !tbaa !11
  %26 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %27 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %26, i64 noundef 5) #3
  %28 = load i8, ptr %27, align 1, !tbaa !13
  %29 = zext i8 %28 to i32
  store i32 %29, ptr %6, align 4, !tbaa !11
  %30 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %31 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %30, i64 noundef 6) #3
  %32 = load i8, ptr %31, align 1, !tbaa !13
  %33 = zext i8 %32 to i32
  store i32 %33, ptr %7, align 4, !tbaa !11
  %34 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %35 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %34, i64 noundef 7) #3
  %36 = load i8, ptr %35, align 1, !tbaa !13
  %37 = zext i8 %36 to i32
  store i32 %37, ptr %8, align 4, !tbaa !11
  br label %123

38:                                               ; preds = %18
  %39 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %40 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %39, i64 noundef 5) #3
  %41 = load i8, ptr %40, align 1, !tbaa !13
  %42 = zext i8 %41 to i32
  store i32 %42, ptr %5, align 4, !tbaa !11
  %43 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %44 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %43, i64 noundef 6) #3
  %45 = load i8, ptr %44, align 1, !tbaa !13
  %46 = zext i8 %45 to i32
  store i32 %46, ptr %6, align 4, !tbaa !11
  %47 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %48 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %47, i64 noundef 7) #3
  %49 = load i8, ptr %48, align 1, !tbaa !13
  %50 = zext i8 %49 to i32
  store i32 %50, ptr %7, align 4, !tbaa !11
  %51 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %52 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %51, i64 noundef 9) #3
  %53 = load i8, ptr %52, align 1, !tbaa !13
  %54 = zext i8 %53 to i32
  store i32 %54, ptr %8, align 4, !tbaa !11
  br label %123

55:                                               ; preds = %18
  %56 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %57 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %56, i64 noundef 6) #3
  %58 = load i8, ptr %57, align 1, !tbaa !13
  %59 = zext i8 %58 to i32
  store i32 %59, ptr %5, align 4, !tbaa !11
  %60 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %61 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %60, i64 noundef 7) #3
  %62 = load i8, ptr %61, align 1, !tbaa !13
  %63 = zext i8 %62 to i32
  store i32 %63, ptr %6, align 4, !tbaa !11
  %64 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %65 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %64, i64 noundef 9) #3
  %66 = load i8, ptr %65, align 1, !tbaa !13
  %67 = zext i8 %66 to i32
  store i32 %67, ptr %7, align 4, !tbaa !11
  %68 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %69 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %68, i64 noundef 10) #3
  %70 = load i8, ptr %69, align 1, !tbaa !13
  %71 = zext i8 %70 to i32
  store i32 %71, ptr %8, align 4, !tbaa !11
  br label %123

72:                                               ; preds = %18
  %73 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %74 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %73, i64 noundef 7) #3
  %75 = load i8, ptr %74, align 1, !tbaa !13
  %76 = zext i8 %75 to i32
  store i32 %76, ptr %5, align 4, !tbaa !11
  %77 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %78 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %77, i64 noundef 9) #3
  %79 = load i8, ptr %78, align 1, !tbaa !13
  %80 = zext i8 %79 to i32
  store i32 %80, ptr %6, align 4, !tbaa !11
  %81 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %82 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %81, i64 noundef 10) #3
  %83 = load i8, ptr %82, align 1, !tbaa !13
  %84 = zext i8 %83 to i32
  store i32 %84, ptr %7, align 4, !tbaa !11
  %85 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %86 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %85, i64 noundef 11) #3
  %87 = load i8, ptr %86, align 1, !tbaa !13
  %88 = zext i8 %87 to i32
  store i32 %88, ptr %8, align 4, !tbaa !11
  br label %123

89:                                               ; preds = %18
  %90 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %91 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %90, i64 noundef 9) #3
  %92 = load i8, ptr %91, align 1, !tbaa !13
  %93 = zext i8 %92 to i32
  store i32 %93, ptr %5, align 4, !tbaa !11
  %94 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %95 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %94, i64 noundef 10) #3
  %96 = load i8, ptr %95, align 1, !tbaa !13
  %97 = zext i8 %96 to i32
  store i32 %97, ptr %6, align 4, !tbaa !11
  %98 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %99 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %98, i64 noundef 11) #3
  %100 = load i8, ptr %99, align 1, !tbaa !13
  %101 = zext i8 %100 to i32
  store i32 %101, ptr %7, align 4, !tbaa !11
  %102 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %103 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %102, i64 noundef 12) #3
  %104 = load i8, ptr %103, align 1, !tbaa !13
  %105 = zext i8 %104 to i32
  store i32 %105, ptr %8, align 4, !tbaa !11
  br label %123

106:                                              ; preds = %18
  %107 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %108 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %107, i64 noundef 12) #3
  %109 = load i8, ptr %108, align 1, !tbaa !13
  %110 = zext i8 %109 to i32
  store i32 %110, ptr %5, align 4, !tbaa !11
  %111 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %112 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %111, i64 noundef 13) #3
  %113 = load i8, ptr %112, align 1, !tbaa !13
  %114 = zext i8 %113 to i32
  store i32 %114, ptr %6, align 4, !tbaa !11
  %115 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %116 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %115, i64 noundef 14) #3
  %117 = load i8, ptr %116, align 1, !tbaa !13
  %118 = zext i8 %117 to i32
  store i32 %118, ptr %7, align 4, !tbaa !11
  %119 = getelementptr inbounds %"class.chen::ip_version6", ptr %9, i32 0, i32 1
  %120 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %119, i64 noundef 15) #3
  %121 = load i8, ptr %120, align 1, !tbaa !13
  %122 = zext i8 %121 to i32
  store i32 %122, ptr %8, align 4, !tbaa !11
  br label %123

123:                                              ; preds = %106, %89, %72, %55, %38, %21
  %124 = load i32, ptr %5, align 4, !tbaa !11
  %125 = mul i32 %124, 256
  %126 = mul i32 %125, 256
  %127 = mul i32 %126, 256
  %128 = load i32, ptr %6, align 4, !tbaa !11
  %129 = mul i32 %128, 256
  %130 = mul i32 %129, 256
  %131 = add i32 %127, %130
  %132 = load i32, ptr %7, align 4, !tbaa !11
  %133 = mul i32 %132, 256
  %134 = add i32 %131, %133
  %135 = load i32, ptr %8, align 4, !tbaa !11
  %136 = add i32 %134, %135
  call void @_ZN4chen11ip_version4C1Ej(ptr noundef nonnull align 4 dereferenceable(8) %2, i32 noundef %136)
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %137 = load i64, ptr %2, align 4
  ret i64 %137
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK4chen11ip_version616isIPv4CompatibleEv(ptr noundef nonnull align 4 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK4chen11ip_version612isIPv4MappedEv(ptr noundef nonnull align 4 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16), i64 noundef) #2 align 2

declare void @_ZN4chen11ip_version4C1Ej(ptr, i32)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !7, i64 0}
!10 = !{!"_ZTSN4chen10ip_versionE", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.chen::ip_version4" = type { %"class.chen::ip_version", i32 }
%"class.chen::ip_version" = type { i8 }

@switch.table._ZNK4chen11ip_version68embeddedEv = private unnamed_addr constant [5 x i64] [i64 4, i64 5, i64 6, i64 7, i64 9], align 8
@switch.table._ZNK4chen11ip_version68embeddedEv.1 = private unnamed_addr constant [5 x i64] [i64 5, i64 6, i64 7, i64 9, i64 10], align 8
@switch.table._ZNK4chen11ip_version68embeddedEv.2 = private unnamed_addr constant [5 x i64] [i64 6, i64 7, i64 9, i64 10, i64 11], align 8
@switch.table._ZNK4chen11ip_version68embeddedEv.3 = private unnamed_addr constant [5 x i64] [i64 7, i64 9, i64 10, i64 11, i64 12], align 8

; Function Attrs: mustprogress uwtable
define dso_local i64 @_ZNK4chen11ip_version68embeddedEv(ptr noundef nonnull align 4 dereferenceable(24) %0) local_unnamed_addr #0 align 2 {
  %2 = alloca %"class.chen::ip_version4", align 8
  %3 = tail call noundef zeroext i1 @_ZNK4chen11ip_version616isIPv4CompatibleEv(ptr noundef nonnull align 4 dereferenceable(24) %0)
  br i1 %3, label %10, label %4

4:                                                ; preds = %1
  %5 = tail call noundef zeroext i1 @_ZNK4chen11ip_version612isIPv4MappedEv(ptr noundef nonnull align 4 dereferenceable(24) %0)
  br i1 %5, label %10, label %6

6:                                                ; preds = %4
  %7 = load i8, ptr %0, align 4, !tbaa !5
  %8 = zext i8 %7 to i32
  %9 = add nsw i32 %8, -32
  br label %10

10:                                               ; preds = %1, %4, %6
  %11 = phi i32 [ %9, %6 ], [ 96, %4 ], [ 96, %1 ]
  %12 = tail call i32 @llvm.fshl.i32(i32 %11, i32 %11, i32 29)
  %13 = icmp ult i32 %12, 5
  br i1 %13, label %switch.lookup, label %18

switch.lookup:                                    ; preds = %10
  %14 = zext nneg i32 %12 to i64
  %switch.gep = getelementptr inbounds [5 x i64], ptr @switch.table._ZNK4chen11ip_version68embeddedEv, i64 0, i64 %14
  %switch.load = load i64, ptr %switch.gep, align 8
  %15 = zext nneg i32 %12 to i64
  %switch.gep14 = getelementptr inbounds [5 x i64], ptr @switch.table._ZNK4chen11ip_version68embeddedEv.1, i64 0, i64 %15
  %switch.load15 = load i64, ptr %switch.gep14, align 8
  %16 = zext nneg i32 %12 to i64
  %switch.gep16 = getelementptr inbounds [5 x i64], ptr @switch.table._ZNK4chen11ip_version68embeddedEv.2, i64 0, i64 %16
  %switch.load17 = load i64, ptr %switch.gep16, align 8
  %17 = zext nneg i32 %12 to i64
  %switch.gep18 = getelementptr inbounds [5 x i64], ptr @switch.table._ZNK4chen11ip_version68embeddedEv.3, i64 0, i64 %17
  %switch.load19 = load i64, ptr %switch.gep18, align 8
  br label %18

18:                                               ; preds = %10, %switch.lookup
  %.sink13 = phi i64 [ %switch.load, %switch.lookup ], [ 12, %10 ]
  %.sink11 = phi i64 [ %switch.load15, %switch.lookup ], [ 13, %10 ]
  %.sink9 = phi i64 [ %switch.load17, %switch.lookup ], [ 14, %10 ]
  %.sink = phi i64 [ %switch.load19, %switch.lookup ], [ 15, %10 ]
  %19 = getelementptr inbounds i8, ptr %0, i64 1
  %20 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %19, i64 noundef %.sink13) #3
  %21 = load i8, ptr %20, align 1, !tbaa !9
  %22 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %19, i64 noundef %.sink11) #3
  %23 = load i8, ptr %22, align 1, !tbaa !9
  %24 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %19, i64 noundef %.sink9) #3
  %25 = load i8, ptr %24, align 1, !tbaa !9
  %26 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16) %19, i64 noundef %.sink) #3
  %.0.in = load i8, ptr %26, align 1, !tbaa !9
  %.0 = zext i8 %.0.in to i32
  %.05 = zext i8 %25 to i32
  %.06 = zext i8 %23 to i32
  %.07 = zext i8 %21 to i32
  %27 = shl nuw i32 %.07, 24
  %28 = shl nuw nsw i32 %.06, 16
  %29 = or disjoint i32 %28, %27
  %30 = shl nuw nsw i32 %.05, 8
  %31 = or disjoint i32 %29, %30
  %32 = or disjoint i32 %31, %.0
  call void @_ZN4chen11ip_version4C1Ej(ptr noundef nonnull align 4 dereferenceable(8) %2, i32 noundef %32)
  %33 = load i64, ptr %2, align 8
  ret i64 %33
}

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK4chen11ip_version616isIPv4CompatibleEv(ptr noundef nonnull align 4 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK4chen11ip_version612isIPv4MappedEv(ptr noundef nonnull align 4 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm16EEixEm(ptr noundef nonnull align 1 dereferenceable(16), i64 noundef) local_unnamed_addr #1 align 2

declare void @_ZN4chen11ip_version4C1Ej(ptr, i32) local_unnamed_addr

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.fshl.i32(i32, i32, i32) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN4chen10ip_versionE", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass