; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/FIRMWARE (donut2)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stats_cycles_init = external dso_local global i64, align 8
@stats_instructions_init = external dso_local global i64, align 8
@stats_cycles = external dso_local global i64, align 8
@stats_instructions = external dso_local global i64, align 8
@stats_CPI_times_1000 = external dso_local global i32, align 4

; Function Attrs: nounwind uwtable
declare dso_local i64 @my_rdcycle() #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @my_rdinstret() #0

; Function Attrs: nounwind uwtable
define dso_local void @stats_end() #0 {
  %1 = call i64 @my_rdcycle()
  %2 = load i64, ptr @stats_cycles_init, align 8, !tbaa !5
  %3 = sub i64 %1, %2
  store i64 %3, ptr @stats_cycles, align 8, !tbaa !5
  %4 = call i64 @my_rdinstret()
  %5 = load i64, ptr @stats_instructions_init, align 8, !tbaa !5
  %6 = sub i64 %4, %5
  store i64 %6, ptr @stats_instructions, align 8, !tbaa !5
  %7 = load i64, ptr @stats_cycles, align 8, !tbaa !5
  %8 = icmp eq i64 %7, 0
  br i1 %8, label %9, label %12

9:                                                ; preds = %0
  %10 = load i64, ptr @stats_cycles, align 8, !tbaa !5
  %11 = add i64 %10, 1
  store i64 %11, ptr @stats_cycles, align 8, !tbaa !5
  br label %12

12:                                               ; preds = %9, %0
  %13 = load i64, ptr @stats_instructions, align 8, !tbaa !5
  %14 = icmp eq i64 %13, 0
  br i1 %14, label %15, label %18

15:                                               ; preds = %12
  %16 = load i64, ptr @stats_instructions, align 8, !tbaa !5
  %17 = add i64 %16, 1
  store i64 %17, ptr @stats_instructions, align 8, !tbaa !5
  br label %18

18:                                               ; preds = %15, %12
  %19 = load i64, ptr @stats_cycles, align 8, !tbaa !5
  %20 = mul i64 %19, 1000
  %21 = load i64, ptr @stats_instructions, align 8, !tbaa !5
  %22 = udiv i64 %20, %21
  %23 = trunc i64 %22 to i32
  store i32 %23, ptr @stats_CPI_times_1000, align 4, !tbaa !9
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stats_cycles_init = external dso_local local_unnamed_addr global i64, align 8
@stats_instructions_init = external dso_local local_unnamed_addr global i64, align 8
@stats_cycles = external dso_local local_unnamed_addr global i64, align 8
@stats_instructions = external dso_local local_unnamed_addr global i64, align 8
@stats_CPI_times_1000 = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
declare dso_local i64 @my_rdcycle() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @my_rdinstret() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @stats_end() local_unnamed_addr #0 {
  %1 = tail call i64 @my_rdcycle()
  %2 = load i64, ptr @stats_cycles_init, align 8, !tbaa !5
  %3 = sub i64 %1, %2
  store i64 %3, ptr @stats_cycles, align 8, !tbaa !5
  %4 = tail call i64 @my_rdinstret()
  %5 = load i64, ptr @stats_instructions_init, align 8, !tbaa !5
  %6 = sub i64 %4, %5
  store i64 %6, ptr @stats_instructions, align 8, !tbaa !5
  %7 = load i64, ptr @stats_cycles, align 8, !tbaa !5
  %8 = icmp eq i64 %7, 0
  br i1 %8, label %9, label %10

9:                                                ; preds = %0
  store i64 1, ptr @stats_cycles, align 8, !tbaa !5
  br label %10

10:                                               ; preds = %9, %0
  %11 = phi i64 [ 1, %9 ], [ %7, %0 ]
  %12 = icmp eq i64 %4, %5
  br i1 %12, label %13, label %14

13:                                               ; preds = %10
  store i64 1, ptr @stats_instructions, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %13, %10
  %15 = phi i64 [ 1, %13 ], [ %6, %10 ]
  %16 = mul i64 %11, 1000
  %17 = udiv i64 %16, %15
  %18 = trunc i64 %17 to i32
  store i32 %18, ptr @stats_CPI_times_1000, align 4, !tbaa !9
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InstCombinePass,TailCallElimPass