; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/FIRMWARE/LIBFEMTORV32 (spi_sd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [32 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @spi_receive() #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @spi_sendrecv(i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local void @spi_readblock(ptr noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @sd_send_command(i8 noundef zeroext, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @sd_readsector(i32 noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %13 = load i32, ptr %7, align 4, !tbaa !5
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %53

16:                                               ; preds = %3
  br label %17

17:                                               ; preds = %45, %16
  %18 = load i32, ptr %7, align 4, !tbaa !5
  %19 = add i32 %18, -1
  store i32 %19, ptr %7, align 4, !tbaa !5
  %20 = icmp ne i32 %18, 0
  br i1 %20, label %21, label %52

21:                                               ; preds = %17
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = add i32 %22, 1
  store i32 %23, ptr %5, align 4, !tbaa !5
  %24 = call zeroext i8 @sd_send_command(i8 noundef zeroext 17, i32 noundef %22)
  store i8 %24, ptr %8, align 1, !tbaa !11
  %25 = load i8, ptr %8, align 1, !tbaa !11
  %26 = zext i8 %25 to i32
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %32

28:                                               ; preds = %21
  %29 = load i8, ptr %8, align 1, !tbaa !11
  %30 = zext i8 %29 to i32
  %31 = call i32 (ptr, ...) @printf(ptr noundef @.str, i32 noundef %30)
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %53

32:                                               ; preds = %21
  br label %33

33:                                               ; preds = %42, %32
  %34 = call zeroext i8 @spi_receive()
  %35 = zext i8 %34 to i32
  %36 = icmp ne i32 %35, 254
  br i1 %36, label %37, label %45

37:                                               ; preds = %33
  %38 = load i32, ptr %10, align 4, !tbaa !5
  %39 = icmp sgt i32 %38, 5000
  br i1 %39, label %40, label %42

40:                                               ; preds = %37
  %41 = call i32 (ptr, ...) @printf(ptr noundef @.str.1)
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %53

42:                                               ; preds = %37
  %43 = load i32, ptr %10, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %10, align 4, !tbaa !5
  br label %33, !llvm.loop !12

45:                                               ; preds = %33
  %46 = load ptr, ptr %6, align 8, !tbaa !9
  call void @spi_readblock(ptr noundef %46, i32 noundef 512)
  %47 = load ptr, ptr %6, align 8, !tbaa !9
  %48 = getelementptr inbounds i8, ptr %47, i64 512
  store ptr %48, ptr %6, align 8, !tbaa !9
  %49 = call zeroext i8 @spi_receive()
  %50 = call zeroext i8 @spi_receive()
  %51 = call zeroext i8 @spi_sendrecv(i8 noundef zeroext -1)
  br label %17, !llvm.loop !14

52:                                               ; preds = %17
  store i32 1, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %53

53:                                               ; preds = %52, %40, %28, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %54 = load i32, ptr %4, align 4
  ret i32 %54
}

declare i32 @printf(ptr noundef, ...) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [32 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [24 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @spi_receive() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @spi_sendrecv(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @spi_readblock(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @sd_send_command(i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @sd_readsector(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = icmp eq i32 %2, 0
  br i1 %4, label %.loopexit, label %.preheader17

.preheader17:                                     ; preds = %3, %._crit_edge
  %.in = phi i32 [ %5, %._crit_edge ], [ %2, %3 ]
  %.0924 = phi i32 [ %.1.lcssa, %._crit_edge ], [ 0, %3 ]
  %.01023 = phi i32 [ %6, %._crit_edge ], [ %0, %3 ]
  %.01122 = phi ptr [ %17, %._crit_edge ], [ %1, %3 ]
  %5 = add i32 %.in, -1
  %6 = add i32 %.01023, 1
  %7 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 17, i32 noundef %.01023)
  %.not15 = icmp eq i8 %7, 0
  br i1 %.not15, label %.preheader, label %9

.preheader:                                       ; preds = %.preheader17
  %8 = tail call zeroext i8 @spi_receive()
  %.not1620 = icmp eq i8 %8, -2
  br i1 %.not1620, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %.preheader
  %smax = tail call i32 @llvm.smax.i32(i32 %.0924, i32 5001)
  br label %.lr.ph

9:                                                ; preds = %.preheader17
  %10 = zext i8 %7 to i32
  %11 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str, i32 noundef %10)
  br label %.loopexit

.lr.ph:                                           ; preds = %.lr.ph.preheader, %14
  %.121 = phi i32 [ %15, %14 ], [ %.0924, %.lr.ph.preheader ]
  %exitcond = icmp eq i32 %.121, %smax
  br i1 %exitcond, label %12, label %14

12:                                               ; preds = %.lr.ph
  %13 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1)
  br label %.loopexit

14:                                               ; preds = %.lr.ph
  %15 = add i32 %.121, 1
  %16 = tail call zeroext i8 @spi_receive()
  %.not16 = icmp eq i8 %16, -2
  br i1 %.not16, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %14, %.preheader
  %.1.lcssa = phi i32 [ %.0924, %.preheader ], [ %15, %14 ]
  tail call void @spi_readblock(ptr noundef %.01122, i32 noundef 512)
  %17 = getelementptr inbounds i8, ptr %.01122, i64 512
  %18 = tail call zeroext i8 @spi_receive()
  %19 = tail call zeroext i8 @spi_receive()
  %20 = tail call zeroext i8 @spi_sendrecv(i8 noundef zeroext -1)
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %.loopexit, label %.preheader17, !llvm.loop !7

.loopexit:                                        ; preds = %._crit_edge, %3, %12, %9
  %.0 = phi i32 [ 0, %9 ], [ 0, %12 ], [ 0, %3 ], [ 1, %._crit_edge ]
  ret i32 %.0
}

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass