; LLVM IR from ashishzero/karma :: src/modules/core/lin_maths.ll (Z9vec3s_muli5Vec3s)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.Vec3s = type { %struct.anon.10 }
%struct.anon.10 = type { i32, i32, i32 }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local { i64, i32 } @_Z5vec3siii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local { i64, i32 } @_Z9vec3s_muli5Vec3s(i32 noundef %0, i64 %1, i32 %2) #2 {
  %4 = alloca %union.Vec3s, align 4
  %5 = alloca %union.Vec3s, align 4
  %6 = alloca { i64, i32 }, align 4
  %7 = alloca i32, align 4
  %8 = alloca { i64, i32 }, align 8
  %9 = alloca { i64, i32 }, align 8
  %10 = getelementptr inbounds { i64, i32 }, ptr %6, i32 0, i32 0
  store i64 %1, ptr %10, align 4
  %11 = getelementptr inbounds { i64, i32 }, ptr %6, i32 0, i32 1
  store i32 %2, ptr %11, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 %6, i64 12, i1 false)
  store i32 %0, ptr %7, align 4, !tbaa !5
  %12 = load i32, ptr %7, align 4, !tbaa !5
  %13 = getelementptr inbounds %struct.anon.10, ptr %5, i32 0, i32 0
  %14 = load i32, ptr %13, align 4, !tbaa !9
  %15 = mul nsw i32 %12, %14
  %16 = load i32, ptr %7, align 4, !tbaa !5
  %17 = getelementptr inbounds %struct.anon.10, ptr %5, i32 0, i32 1
  %18 = load i32, ptr %17, align 4, !tbaa !9
  %19 = mul nsw i32 %16, %18
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = getelementptr inbounds %struct.anon.10, ptr %5, i32 0, i32 2
  %22 = load i32, ptr %21, align 4, !tbaa !9
  %23 = mul nsw i32 %20, %22
  %24 = call { i64, i32 } @_Z5vec3siii(i32 noundef %15, i32 noundef %19, i32 noundef %23)
  %25 = getelementptr inbounds %union.Vec3s, ptr %4, i32 0, i32 0
  store { i64, i32 } %24, ptr %8, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %25, ptr align 8 %8, i64 12, i1 false)
  %26 = getelementptr inbounds %union.Vec3s, ptr %4, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %9, ptr align 4 %26, i64 12, i1 false)
  %27 = load { i64, i32 }, ptr %9, align 8
  ret { i64, i32 } %27
}

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local { i64, i32 } @_Z5vec3siii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local { i64, i32 } @_Z9vec3s_muli5Vec3s(i32 noundef %0, i64 %1, i32 %2) local_unnamed_addr #1 {
  %.sroa.07.0.extract.trunc = trunc i64 %1 to i32
  %.sroa.28.0.extract.shift = lshr i64 %1, 32
  %.sroa.28.0.extract.trunc = trunc nuw i64 %.sroa.28.0.extract.shift to i32
  %4 = mul nsw i32 %.sroa.07.0.extract.trunc, %0
  %5 = mul nsw i32 %.sroa.28.0.extract.trunc, %0
  %6 = mul nsw i32 %2, %0
  %7 = tail call { i64, i32 } @_Z5vec3siii(i32 noundef %4, i32 noundef %5, i32 noundef %6)
  ret { i64, i32 } %7
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass