; LLVM IR from bgin/Radar_ElectroOptical_Simulation :: Hardware (GMS_fast_pmc_access)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local float @get_TSC_frequency() #1 {
  %1 = alloca float, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca [12 x i32], align 16
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca float, align 4
  %18 = alloca float, align 4
  %19 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 48, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  store i32 0, ptr %7, align 4, !tbaa !5
  store i32 0, ptr %13, align 4, !tbaa !5
  store i32 -2147483646, ptr %6, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %52, %0
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = icmp ult i32 %21, -2147483643
  br i1 %22, label %23, label %55

23:                                               ; preds = %20
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = load i32, ptr %7, align 4, !tbaa !5
  %26 = call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %24, i32 %25) #3, !srcloc !9
  %27 = extractvalue { i32, i32, i32, i32 } %26, 0
  %28 = extractvalue { i32, i32, i32, i32 } %26, 1
  %29 = extractvalue { i32, i32, i32, i32 } %26, 2
  %30 = extractvalue { i32, i32, i32, i32 } %26, 3
  store i32 %27, ptr %2, align 4, !tbaa !5
  store i32 %28, ptr %3, align 4, !tbaa !5
  store i32 %29, ptr %4, align 4, !tbaa !5
  store i32 %30, ptr %5, align 4, !tbaa !5
  %31 = load i32, ptr %2, align 4, !tbaa !5
  %32 = load i32, ptr %13, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [12 x i32], ptr %8, i64 0, i64 %33
  store i32 %31, ptr %34, align 4, !tbaa !5
  %35 = load i32, ptr %3, align 4, !tbaa !5
  %36 = load i32, ptr %13, align 4, !tbaa !5
  %37 = add nsw i32 %36, 1
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [12 x i32], ptr %8, i64 0, i64 %38
  store i32 %35, ptr %39, align 4, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = load i32, ptr %13, align 4, !tbaa !5
  %42 = add nsw i32 %41, 2
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds [12 x i32], ptr %8, i64 0, i64 %43
  store i32 %40, ptr %44, align 4, !tbaa !5
  %45 = load i32, ptr %5, align 4, !tbaa !5
  %46 = load i32, ptr %13, align 4, !tbaa !5
  %47 = add nsw i32 %46, 3
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [12 x i32], ptr %8, i64 0, i64 %48
  store i32 %45, ptr %49, align 4, !tbaa !5
  %50 = load i32, ptr %13, align 4, !tbaa !5
  %51 = add nsw i32 %50, 4
  store i32 %51, ptr %13, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %23
  %53 = load i32, ptr %6, align 4, !tbaa !5
  %54 = add i32 %53, 1
  store i32 %54, ptr %6, align 4, !tbaa !5
  br label %20, !llvm.loop !10

55:                                               ; preds = %20
  %56 = getelementptr inbounds [12 x i32], ptr %8, i64 0, i64 0
  store ptr %56, ptr %9, align 8, !tbaa !12
  store i32 47, ptr %13, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %124, %55
  %58 = load i32, ptr %13, align 4, !tbaa !5
  %59 = icmp sgt i32 %58, 0
  br i1 %59, label %60, label %127

60:                                               ; preds = %57
  %61 = load ptr, ptr %9, align 8, !tbaa !12
  %62 = load i32, ptr %13, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds i8, ptr %61, i64 %63
  %65 = load i8, ptr %64, align 1, !tbaa !14
  %66 = sext i8 %65 to i32
  %67 = icmp eq i32 %66, 122
  br i1 %67, label %68, label %123

68:                                               ; preds = %60
  %69 = load ptr, ptr %9, align 8, !tbaa !12
  %70 = load i32, ptr %13, align 4, !tbaa !5
  %71 = sub nsw i32 %70, 1
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds i8, ptr %69, i64 %72
  %74 = load i8, ptr %73, align 1, !tbaa !14
  %75 = sext i8 %74 to i32
  %76 = icmp eq i32 %75, 72
  br i1 %76, label %77, label %122

77:                                               ; preds = %68
  %78 = load ptr, ptr %9, align 8, !tbaa !12
  %79 = load i32, ptr %13, align 4, !tbaa !5
  %80 = sub nsw i32 %79, 2
  %81 = sext i32 %80 to i64
  %82 = getelementptr inbounds i8, ptr %78, i64 %81
  %83 = load i8, ptr %82, align 1, !tbaa !14
  %84 = sext i8 %83 to i32
  %85 = icmp eq i32 %84, 71
  br i1 %85, label %86, label %121

86:                                               ; preds = %77
  %87 = load i32, ptr %13, align 4, !tbaa !5
  %88 = sub nsw i32 %87, 3
  store i32 %88, ptr %10, align 4, !tbaa !5
  %89 = load i32, ptr %13, align 4, !tbaa !5
  %90 = sub nsw i32 %89, 3
  store i32 %90, ptr %15, align 4, !tbaa !5
  br label %91

91:                                               ; preds = %99, %86
  %92 = load ptr, ptr %9, align 8, !tbaa !12
  %93 = load i32, ptr %10, align 4, !tbaa !5
  %94 = sext i32 %93 to i64
  %95 = getelementptr inbounds i8, ptr %92, i64 %94
  %96 = load i8, ptr %95, align 1, !tbaa !14
  %97 = sext i8 %96 to i32
  %98 = icmp ne i32 %97, 32
  br i1 %98, label %99, label %102

99:                                               ; preds = %91
  %100 = load i32, ptr %10, align 4, !tbaa !5
  %101 = add nsw i32 %100, -1
  store i32 %101, ptr %10, align 4, !tbaa !5
  br label %91, !llvm.loop !15

102:                                              ; preds = %91
  %103 = load i32, ptr %10, align 4, !tbaa !5
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %14, align 4, !tbaa !5
  %105 = load i32, ptr %15, align 4, !tbaa !5
  %106 = load i32, ptr %14, align 4, !tbaa !5
  %107 = sub nsw i32 %105, %106
  %108 = add nsw i32 %107, 1
  store i32 %108, ptr %16, align 4, !tbaa !5
  %109 = load i32, ptr %16, align 4, !tbaa !5
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %12, align 4, !tbaa !5
  %111 = load ptr, ptr %9, align 8, !tbaa !12
  %112 = load i32, ptr %14, align 4, !tbaa !5
  %113 = sext i32 %112 to i64
  %114 = getelementptr inbounds i8, ptr %111, i64 %113
  %115 = call i32 (ptr, ptr, ...) @__isoc99_sscanf(ptr noundef %114, ptr noundef @.str.1, ptr noundef %17) #3
  %116 = load float, ptr %17, align 4, !tbaa !16
  %117 = fpext float %116 to double
  %118 = fmul double 1.000000e+09, %117
  %119 = fptrunc double %118 to float
  store float %119, ptr %18, align 4, !tbaa !16
  %120 = load float, ptr %18, align 4, !tbaa !16
  store float %120, ptr %1, align 4
  store i32 1, ptr %19, align 4
  br label %128

121:                                              ; preds = %77
  br label %122

122:                                              ; preds = %121, %68
  br label %123

123:                                              ; preds = %122, %60
  br label %124

124:                                              ; preds = %123
  %125 = load i32, ptr %13, align 4, !tbaa !5
  %126 = add nsw i32 %125, -1
  store i32 %126, ptr %13, align 4, !tbaa !5
  br label %57, !llvm.loop !18

127:                                              ; preds = %57
  store float -1.000000e+00, ptr %1, align 4
  store i32 1, ptr %19, align 4
  br label %128

128:                                              ; preds = %127, %102
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 48, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  %129 = load float, ptr %1, align 4
  ret float %129
}

; Function Attrs: nounwind
declare i32 @__isoc99_sscanf(ptr noundef, ptr noundef, ...) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 4661}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = distinct !{!15, !11}
!16 = !{!17, !17, i64 0}
!17 = !{!"float", !7, i64 0}
!18 = distinct !{!18, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local float @get_TSC_frequency() local_unnamed_addr #1 {
.preheader.preheader:
  %0 = alloca [12 x i32], align 16
  %1 = alloca float, align 4
  call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %0) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
  %2 = tail call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 -2147483646, i32 0) #3, !srcloc !5
  %3 = extractvalue { i32, i32, i32, i32 } %2, 0
  %4 = extractvalue { i32, i32, i32, i32 } %2, 1
  %5 = extractvalue { i32, i32, i32, i32 } %2, 2
  %6 = extractvalue { i32, i32, i32, i32 } %2, 3
  store i32 %3, ptr %0, align 16, !tbaa !6
  %7 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %4, ptr %7, align 4, !tbaa !6
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 %5, ptr %8, align 8, !tbaa !6
  %9 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 %6, ptr %9, align 4, !tbaa !6
  %10 = tail call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 -2147483645, i32 0) #3, !srcloc !5
  %11 = extractvalue { i32, i32, i32, i32 } %10, 0
  %12 = extractvalue { i32, i32, i32, i32 } %10, 1
  %13 = extractvalue { i32, i32, i32, i32 } %10, 2
  %14 = extractvalue { i32, i32, i32, i32 } %10, 3
  %15 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 %11, ptr %15, align 16, !tbaa !6
  %16 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 %12, ptr %16, align 4, !tbaa !6
  %17 = getelementptr inbounds i8, ptr %0, i64 24
  store i32 %13, ptr %17, align 8, !tbaa !6
  %18 = getelementptr inbounds i8, ptr %0, i64 28
  store i32 %14, ptr %18, align 4, !tbaa !6
  %19 = tail call { i32, i32, i32, i32 } asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},{ax},{cx},~{dirflag},~{fpsr},~{flags}"(i32 -2147483644, i32 0) #3, !srcloc !5
  %20 = extractvalue { i32, i32, i32, i32 } %19, 0
  %21 = extractvalue { i32, i32, i32, i32 } %19, 1
  %22 = extractvalue { i32, i32, i32, i32 } %19, 2
  %23 = extractvalue { i32, i32, i32, i32 } %19, 3
  %24 = getelementptr inbounds i8, ptr %0, i64 32
  store i32 %20, ptr %24, align 16, !tbaa !6
  %25 = getelementptr inbounds i8, ptr %0, i64 36
  store i32 %21, ptr %25, align 4, !tbaa !6
  %26 = getelementptr inbounds i8, ptr %0, i64 40
  store i32 %22, ptr %26, align 8, !tbaa !6
  %27 = getelementptr inbounds i8, ptr %0, i64 44
  store i32 %23, ptr %27, align 4, !tbaa !6
  br label %.preheader

.preheader:                                       ; preds = %61, %.preheader.preheader
  %indvars.iv44 = phi i64 [ 44, %.preheader.preheader ], [ %indvars.iv.next45.1, %61 ]
  %indvars.iv = phi i64 [ 47, %.preheader.preheader ], [ %indvars.iv.next.1, %61 ]
  %28 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv
  %29 = load i8, ptr %28, align 1, !tbaa !10
  %30 = icmp eq i8 %29, 122
  br i1 %30, label %31, label %47

31:                                               ; preds = %.preheader
  %32 = getelementptr i8, ptr %28, i64 -1
  %33 = load i8, ptr %32, align 1, !tbaa !10
  %34 = icmp eq i8 %33, 72
  br i1 %34, label %35, label %47

35:                                               ; preds = %31
  %36 = getelementptr i8, ptr %28, i64 -2
  %37 = load i8, ptr %36, align 1, !tbaa !10
  %38 = icmp eq i8 %37, 71
  br i1 %38, label %.preheader51.preheader, label %47

.preheader51.preheader.split.loop.exit:           ; preds = %57
  %indvars.iv.next45.le = add nsw i64 %indvars.iv44, -1
  br label %.preheader51.preheader

.preheader51.preheader:                           ; preds = %35, %.preheader51.preheader.split.loop.exit
  %indvars.iv44.lcssa = phi i64 [ %indvars.iv.next45.le, %.preheader51.preheader.split.loop.exit ], [ %indvars.iv44, %35 ]
  br label %.preheader51

.preheader51:                                     ; preds = %.preheader51.preheader, %.preheader51
  %indvars.iv47 = phi i64 [ %indvars.iv.next48, %.preheader51 ], [ %indvars.iv44.lcssa, %.preheader51.preheader ]
  %39 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv47
  %40 = load i8, ptr %39, align 1, !tbaa !10
  %.not = icmp eq i8 %40, 32
  %indvars.iv.next48 = add nsw i64 %indvars.iv47, -1
  br i1 %.not, label %41, label %.preheader51, !llvm.loop !11

41:                                               ; preds = %.preheader51
  %42 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv47
  %43 = getelementptr i8, ptr %42, i64 1
  %44 = call i32 (ptr, ptr, ...) @__isoc99_sscanf(ptr noundef %43, ptr noundef nonnull @.str.1, ptr noundef nonnull %1) #3
  %45 = load float, ptr %1, align 4, !tbaa !13
  %46 = fmul float %45, 1.000000e+09
  br label %.loopexit

47:                                               ; preds = %.preheader, %35, %31
  %48 = icmp ugt i64 %indvars.iv, 1
  br i1 %48, label %.preheader.1, label %.loopexit, !llvm.loop !15

.preheader.1:                                     ; preds = %47
  %49 = getelementptr i8, ptr %0, i64 %indvars.iv
  %50 = getelementptr i8, ptr %49, i64 -1
  %51 = load i8, ptr %50, align 1, !tbaa !10
  %52 = icmp eq i8 %51, 122
  br i1 %52, label %53, label %61

53:                                               ; preds = %.preheader.1
  %54 = getelementptr i8, ptr %49, i64 -2
  %55 = load i8, ptr %54, align 1, !tbaa !10
  %56 = icmp eq i8 %55, 72
  br i1 %56, label %57, label %61

57:                                               ; preds = %53
  %58 = getelementptr i8, ptr %49, i64 -3
  %59 = load i8, ptr %58, align 1, !tbaa !10
  %60 = icmp eq i8 %59, 71
  br i1 %60, label %.preheader51.preheader.split.loop.exit, label %61

61:                                               ; preds = %57, %53, %.preheader.1
  %indvars.iv.next.1 = add nsw i64 %indvars.iv, -2
  %indvars.iv.next45.1 = add nsw i64 %indvars.iv44, -2
  br label %.preheader

.loopexit:                                        ; preds = %47, %41
  %.0 = phi float [ %46, %41 ], [ -1.000000e+00, %47 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
  call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %0) #3
  ret float %.0
}

; Function Attrs: nofree nounwind
declare noundef i32 @__isoc99_sscanf(ptr nocapture noundef readonly, ptr nocapture noundef readonly, ...) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 4661}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"float", !8, i64 0}
!15 = distinct !{!15, !12}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass