; LLVM IR from 2404589803/LowMemoryLLM :: src/hal/gpu (gpu_context)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.GPUContext = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, i64 }

@.str.3 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @clSetKernelArg(ptr noundef, i32 noundef, i64 noundef, ptr noundef) #1

declare i32 @clEnqueueNDRangeKernel(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @gpu_activation(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4) #2 {
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !5
  store i64 %3, ptr %10, align 8, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !5
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = icmp ne ptr %15, null
  br i1 %16, label %18, label %17

17:                                               ; preds = %5
  store i32 -1, ptr %6, align 4
  br label %61

18:                                               ; preds = %5
  %19 = load ptr, ptr %11, align 8, !tbaa !5
  %20 = call i32 @strcmp(ptr noundef %19, ptr noundef @.str.3) #4
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %23

22:                                               ; preds = %18
  store i32 -1, ptr %6, align 4
  br label %61

23:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  %24 = load i64, ptr %10, align 8, !tbaa !9
  store i64 %24, ptr %13, align 8, !tbaa !9
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.GPUContext, ptr %25, i32 0, i32 6
  %27 = load ptr, ptr %26, align 8, !tbaa !11
  %28 = call i32 @clSetKernelArg(ptr noundef %27, i32 noundef 0, i64 noundef 8, ptr noundef %9)
  store i32 %28, ptr %12, align 4, !tbaa !13
  %29 = load i32, ptr %12, align 4, !tbaa !13
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %31, label %32

31:                                               ; preds = %23
  store i32 -1, ptr %6, align 4
  store i32 1, ptr %14, align 4
  br label %60

32:                                               ; preds = %23
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.GPUContext, ptr %33, i32 0, i32 6
  %35 = load ptr, ptr %34, align 8, !tbaa !11
  %36 = call i32 @clSetKernelArg(ptr noundef %35, i32 noundef 1, i64 noundef 8, ptr noundef %8)
  store i32 %36, ptr %12, align 4, !tbaa !13
  %37 = load i32, ptr %12, align 4, !tbaa !13
  %38 = icmp ne i32 %37, 0
  br i1 %38, label %39, label %40

39:                                               ; preds = %32
  store i32 -1, ptr %6, align 4
  store i32 1, ptr %14, align 4
  br label %60

40:                                               ; preds = %32
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.GPUContext, ptr %41, i32 0, i32 6
  %43 = load ptr, ptr %42, align 8, !tbaa !11
  %44 = call i32 @clSetKernelArg(ptr noundef %43, i32 noundef 2, i64 noundef 4, ptr noundef %10)
  store i32 %44, ptr %12, align 4, !tbaa !13
  %45 = load i32, ptr %12, align 4, !tbaa !13
  %46 = icmp ne i32 %45, 0
  br i1 %46, label %47, label %48

47:                                               ; preds = %40
  store i32 -1, ptr %6, align 4
  store i32 1, ptr %14, align 4
  br label %60

48:                                               ; preds = %40
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.GPUContext, ptr %49, i32 0, i32 1
  %51 = load ptr, ptr %50, align 8, !tbaa !15
  %52 = load ptr, ptr %7, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.GPUContext, ptr %52, i32 0, i32 6
  %54 = load ptr, ptr %53, align 8, !tbaa !11
  %55 = call i32 @clEnqueueNDRangeKernel(ptr noundef %51, ptr noundef %54, i32 noundef 1, ptr noundef null, ptr noundef %13, ptr noundef null, i32 noundef 0, ptr noundef null, ptr noundef null)
  store i32 %55, ptr %12, align 4, !tbaa !13
  %56 = load i32, ptr %12, align 4, !tbaa !13
  %57 = icmp ne i32 %56, 0
  br i1 %57, label %58, label %59

58:                                               ; preds = %48
  store i32 -1, ptr %6, align 4
  store i32 1, ptr %14, align 4
  br label %60

59:                                               ; preds = %48
  store i32 0, ptr %6, align 4
  store i32 1, ptr %14, align 4
  br label %60

60:                                               ; preds = %59, %58, %47, %39, %31
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %61

61:                                               ; preds = %60, %22, %17
  %62 = load i32, ptr %6, align 4
  ret i32 %62
}

; Function Attrs: nounwind willreturn memory(read)
declare i32 @strcmp(ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind willreturn memory(read) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 48}
!12 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !10, i64 56, !10, i64 64}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.3 = external hidden unnamed_addr constant [5 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @clSetKernelArg(ptr noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @clEnqueueNDRangeKernel(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @gpu_activation(ptr noundef readonly %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr nocapture noundef readonly %4) local_unnamed_addr #2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i64 %3, ptr %8, align 8, !tbaa !9
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %28, label %10

10:                                               ; preds = %5
  %11 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %4, ptr noundef nonnull dereferenceable(1) @.str.3) #4
  %.not12 = icmp eq i32 %11, 0
  br i1 %.not12, label %12, label %28

12:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #5
  store i64 %3, ptr %9, align 8, !tbaa !9
  %13 = getelementptr inbounds i8, ptr %0, i64 48
  %14 = load ptr, ptr %13, align 8, !tbaa !11
  %15 = call i32 @clSetKernelArg(ptr noundef %14, i32 noundef 0, i64 noundef 8, ptr noundef nonnull %7) #5
  %.not13 = icmp eq i32 %15, 0
  br i1 %.not13, label %16, label %27

16:                                               ; preds = %12
  %17 = load ptr, ptr %13, align 8, !tbaa !11
  %18 = call i32 @clSetKernelArg(ptr noundef %17, i32 noundef 1, i64 noundef 8, ptr noundef nonnull %6) #5
  %.not14 = icmp eq i32 %18, 0
  br i1 %.not14, label %19, label %27

19:                                               ; preds = %16
  %20 = load ptr, ptr %13, align 8, !tbaa !11
  %21 = call i32 @clSetKernelArg(ptr noundef %20, i32 noundef 2, i64 noundef 4, ptr noundef nonnull %8) #5
  %.not15 = icmp eq i32 %21, 0
  br i1 %.not15, label %22, label %27

22:                                               ; preds = %19
  %23 = getelementptr inbounds i8, ptr %0, i64 8
  %24 = load ptr, ptr %23, align 8, !tbaa !13
  %25 = load ptr, ptr %13, align 8, !tbaa !11
  %26 = call i32 @clEnqueueNDRangeKernel(ptr noundef %24, ptr noundef %25, i32 noundef 1, ptr noundef null, ptr noundef nonnull %9, ptr noundef null, i32 noundef 0, ptr noundef null, ptr noundef null) #5
  %.not16 = icmp ne i32 %26, 0
  %. = sext i1 %.not16 to i32
  br label %27

27:                                               ; preds = %22, %19, %16, %12
  %.0 = phi i32 [ -1, %12 ], [ -1, %16 ], [ -1, %19 ], [ %., %22 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #5
  br label %28

28:                                               ; preds = %10, %5, %27
  %.1 = phi i32 [ %.0, %27 ], [ -1, %5 ], [ -1, %10 ]
  ret i32 %.1
}

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind willreturn memory(read) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 48}
!12 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !10, i64 56, !10, i64 64}
!13 = !{!12, !6, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass