; LLVM IR from embeddednirvana/A-Rudimentary-RTOS-for-Satellite-Control :: fs/patches (sat_fs)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._sd = type { i32, i32, i8 }

@buffer = external dso_local global [512 x i8], align 16
@ready = external dso_local global i8, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @fs_mount_chip(i64 %0, i8 %1) #2 {
  %3 = alloca %struct._sd, align 4
  %4 = alloca { i64, i8 }, align 4
  %5 = alloca i32, align 4
  %6 = getelementptr inbounds { i64, i8 }, ptr %4, i32 0, i32 0
  store i64 %0, ptr %6, align 4
  %7 = getelementptr inbounds { i64, i8 }, ptr %4, i32 0, i32 1
  store i8 %1, ptr %7, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %3, ptr align 4 %4, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %15, %2
  %9 = load i32, ptr %5, align 4, !tbaa !5
  %10 = icmp slt i32 %9, 512
  br i1 %10, label %11, label %18

11:                                               ; preds = %8
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [512 x i8], ptr @buffer, i64 0, i64 %13
  store i8 -52, ptr %14, align 1, !tbaa !9
  br label %15

15:                                               ; preds = %11
  %16 = load i32, ptr %5, align 4, !tbaa !5
  %17 = add nsw i32 %16, 1
  store i32 %17, ptr %5, align 4, !tbaa !5
  br label %8, !llvm.loop !10

18:                                               ; preds = %8
  store i8 0, ptr @ready, align 1, !tbaa !9
  %19 = getelementptr inbounds %struct._sd, ptr %3, i32 0, i32 0
  store i32 1000, ptr %19, align 4, !tbaa !12
  %20 = getelementptr inbounds %struct._sd, ptr %3, i32 0, i32 1
  store i32 1000, ptr %20, align 4, !tbaa !14
  %21 = getelementptr inbounds %struct._sd, ptr %3, i32 0, i32 2
  store i8 0, ptr %21, align 4, !tbaa !15
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %34, %18
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = icmp slt i32 %23, 50
  br i1 %24, label %25, label %29

25:                                               ; preds = %22
  %26 = load i8, ptr @ready, align 1, !tbaa !9
  %27 = zext i8 %26 to i32
  %28 = icmp ne i32 %27, 1
  br label %29

29:                                               ; preds = %25, %22
  %30 = phi i1 [ false, %22 ], [ %28, %25 ]
  br i1 %30, label %31, label %37

31:                                               ; preds = %29
  call void (...) @spi_initialize()
  %32 = call i32 @sd_initialize(ptr noundef %3)
  %33 = trunc i32 %32 to i8
  store i8 %33, ptr @ready, align 1, !tbaa !9
  br label %34

34:                                               ; preds = %31
  %35 = load i32, ptr %5, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %5, align 4, !tbaa !5
  br label %22, !llvm.loop !16

37:                                               ; preds = %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret i8 0
}

declare void @spi_initialize(...) #3

declare i32 @sd_initialize(ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !6, i64 0}
!13 = !{!"_sd", !6, i64 0, !6, i64 4, !7, i64 8}
!14 = !{!13, !6, i64 4}
!15 = !{!13, !7, i64 8}
!16 = distinct !{!16, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._sd = type { i32, i32, i8 }

@buffer = external dso_local local_unnamed_addr global [512 x i8], align 16
@ready = external dso_local local_unnamed_addr global i8, align 1

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i8 @fs_mount_chip(i64 %0, i8 %1) local_unnamed_addr #0 {
.lr.ph.preheader:
  %2 = alloca %struct._sd, align 4
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %2, i64 8
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(512) @buffer, i8 -52, i64 512, i1 false), !tbaa !5
  store i8 0, ptr @ready, align 1, !tbaa !5
  store i32 1000, ptr %2, align 4, !tbaa !8
  %3 = getelementptr inbounds i8, ptr %2, i64 4
  store i32 1000, ptr %3, align 4, !tbaa !11
  store i8 0, ptr %.sroa.2.0..sroa_idx, align 4, !tbaa !12
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.16 = phi i32 [ %6, %.lr.ph ], [ 0, %.lr.ph.preheader ]
  call void (...) @spi_initialize() #3
  %4 = call i32 @sd_initialize(ptr noundef nonnull %2) #3
  %5 = trunc i32 %4 to i8
  store i8 %5, ptr @ready, align 1, !tbaa !5
  %6 = add nuw nsw i32 %.16, 1
  %7 = icmp ult i32 %.16, 49
  %8 = icmp ne i8 %5, 1
  %9 = select i1 %7, i1 %8, i1 false
  br i1 %9, label %.lr.ph, label %._crit_edge, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph
  ret i8 0
}

declare void @spi_initialize(...) local_unnamed_addr #1

declare i32 @sd_initialize(ptr noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !10, i64 0}
!9 = !{!"_sd", !10, i64 0, !10, i64 4, !6, i64 8}
!10 = !{!"int", !6, i64 0}
!11 = !{!9, !10, i64 4}
!12 = !{!9, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass