; LLVM IR from NVIDIA/TensorRT :: samples/common (getOptions)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN8nvinfer17utility7matchesERKNS0_9TRTOptionES3_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 8 dereferenceable(80)) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN8nvinfer17utility17getTRTOptionIndexERKSt6vectorINS0_9TRTOptionESaIS2_EERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(80) %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 0, ptr %6, align 8, !tbaa !9
  br label %8

8:                                                ; preds = %24, %2
  %9 = load i64, ptr %6, align 8, !tbaa !9
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  %11 = call noundef i64 @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #2
  %12 = icmp ult i64 %9, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %8
  store i32 2, ptr %7, align 4
  br label %27

14:                                               ; preds = %8
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = load i64, ptr %6, align 8, !tbaa !9
  %18 = call noundef nonnull align 8 dereferenceable(80) ptr @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %17) #2
  %19 = call noundef zeroext i1 @_ZN8nvinfer17utility7matchesERKNS0_9TRTOptionES3_(ptr noundef nonnull align 8 dereferenceable(80) %15, ptr noundef nonnull align 8 dereferenceable(80) %18)
  br i1 %19, label %20, label %23

20:                                               ; preds = %14
  %21 = load i64, ptr %6, align 8, !tbaa !9
  %22 = trunc i64 %21 to i32
  store i32 %22, ptr %3, align 4
  store i32 1, ptr %7, align 4
  br label %27

23:                                               ; preds = %14
  br label %24

24:                                               ; preds = %23
  %25 = load i64, ptr %6, align 8, !tbaa !9
  %26 = add i64 %25, 1
  store i64 %26, ptr %6, align 8, !tbaa !9
  br label %8, !llvm.loop !11

27:                                               ; preds = %20, %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  %28 = load i32, ptr %7, align 4
  switch i32 %28, label %32 [
    i32 2, label %29
    i32 1, label %30
  ]

29:                                               ; preds = %27
  store i32 -1, ptr %3, align 4
  br label %30

30:                                               ; preds = %29, %27
  %31 = load i32, ptr %3, align 4
  ret i32 %31

32:                                               ; preds = %27
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(80) ptr @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN8nvinfer17utility7matchesERKNS0_9TRTOptionES3_(ptr noundef nonnull align 8 dereferenceable(80), ptr noundef nonnull align 8 dereferenceable(80)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN8nvinfer17utility17getTRTOptionIndexERKSt6vectorINS0_9TRTOptionESaIS2_EERKS2_(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef nonnull align 8 dereferenceable(80) %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not11.not = icmp eq i64 %3, 0
  br i1 %.not11.not, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %2, %8
  %.0812 = phi i64 [ %9, %8 ], [ 0, %2 ]
  %4 = tail call noundef nonnull align 8 dereferenceable(80) ptr @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %.0812) #1
  %5 = tail call noundef zeroext i1 @_ZN8nvinfer17utility7matchesERKNS0_9TRTOptionES3_(ptr noundef nonnull align 8 dereferenceable(80) %1, ptr noundef nonnull align 8 dereferenceable(80) %4)
  br i1 %5, label %6, label %8

6:                                                ; preds = %.lr.ph
  %7 = trunc i64 %.0812 to i32
  br label %.loopexit

8:                                                ; preds = %.lr.ph
  %9 = add nuw i64 %.0812, 1
  %10 = tail call noundef i64 @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #1
  %.not = icmp ult i64 %9, %10
  br i1 %.not, label %.lr.ph, label %.loopexit, !llvm.loop !5

.loopexit:                                        ; preds = %8, %2, %6
  %spec.select = phi i32 [ %7, %6 ], [ -1, %2 ], [ -1, %8 ]
  ret i32 %spec.select
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(80) ptr @_ZNKSt6vectorIN8nvinfer17utility9TRTOptionESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass