; LLVM IR from Try/Tempest :: Engine/thirdparty/squish/maths.ll (ZN6squish25ComputeWeightedCovarianceEiPKNS_4Vec3EPKf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.squish::Sym3x3" = type { [6 x float] }
%"class.squish::Vec3" = type { float, float, float }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6squish25ComputeWeightedCovarianceEiPKNS_4Vec3EPKf(ptr dead_on_unwind noalias writable sret(%"class.squish::Sym3x3") align 4 %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca float, align 4
  %9 = alloca %"class.squish::Vec3", align 4
  %10 = alloca i32, align 4
  %11 = alloca %"class.squish::Vec3", align 4
  %12 = alloca { <2 x float>, float }, align 8
  %13 = alloca i32, align 4
  %14 = alloca %"class.squish::Vec3", align 4
  %15 = alloca { <2 x float>, float }, align 8
  %16 = alloca %"class.squish::Vec3", align 4
  %17 = alloca { <2 x float>, float }, align 8
  store i32 %1, ptr %5, align 4, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !9
  store ptr %3, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  store float 0.000000e+00, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 12, ptr %9) #6
  call void @_ZN6squish4Vec3C2Ef(ptr noundef nonnull align 4 dereferenceable(12) %9, float noundef 0.000000e+00)
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %42, %4
  %19 = load i32, ptr %10, align 4, !tbaa !5
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = icmp slt i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  br label %45

23:                                               ; preds = %18
  %24 = load ptr, ptr %7, align 8, !tbaa !9
  %25 = load i32, ptr %10, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds float, ptr %24, i64 %26
  %28 = load float, ptr %27, align 4, !tbaa !11
  %29 = load float, ptr %8, align 4, !tbaa !11
  %30 = fadd float %29, %28
  store float %30, ptr %8, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 12, ptr %11) #6
  %31 = load ptr, ptr %7, align 8, !tbaa !9
  %32 = load i32, ptr %10, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds float, ptr %31, i64 %33
  %35 = load float, ptr %34, align 4, !tbaa !11
  %36 = load ptr, ptr %6, align 8, !tbaa !9
  %37 = load i32, ptr %10, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds %"class.squish::Vec3", ptr %36, i64 %38
  %40 = call { <2 x float>, float } @_ZN6squishmlEfRKNS_4Vec3E(float noundef %35, ptr noundef nonnull align 4 dereferenceable(12) %39)
  store { <2 x float>, float } %40, ptr %12, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %11, ptr align 8 %12, i64 12, i1 false)
  %41 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3pLERKS0_(ptr noundef nonnull align 4 dereferenceable(12) %9, ptr noundef nonnull align 4 dereferenceable(12) %11)
  call void @llvm.lifetime.end.p0(i64 12, ptr %11) #6
  br label %42

42:                                               ; preds = %23
  %43 = load i32, ptr %10, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %10, align 4, !tbaa !5
  br label %18, !llvm.loop !13

45:                                               ; preds = %22
  %46 = load float, ptr %8, align 4, !tbaa !11
  %47 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3dVEf(ptr noundef nonnull align 4 dereferenceable(12) %9, float noundef %46)
  call void @_ZN6squish6Sym3x3C2Ef(ptr noundef nonnull align 4 dereferenceable(24) %0, float noundef 0.000000e+00)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  store i32 0, ptr %13, align 4, !tbaa !5
  br label %48

48:                                               ; preds = %95, %45
  %49 = load i32, ptr %13, align 4, !tbaa !5
  %50 = load i32, ptr %5, align 4, !tbaa !5
  %51 = icmp slt i32 %49, %50
  br i1 %51, label %53, label %52

52:                                               ; preds = %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  br label %98

53:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 12, ptr %14) #6
  %54 = load ptr, ptr %6, align 8, !tbaa !9
  %55 = load i32, ptr %13, align 4, !tbaa !5
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds %"class.squish::Vec3", ptr %54, i64 %56
  %58 = call { <2 x float>, float } @_ZN6squishmiERKNS_4Vec3ES2_(ptr noundef nonnull align 4 dereferenceable(12) %57, ptr noundef nonnull align 4 dereferenceable(12) %9)
  store { <2 x float>, float } %58, ptr %15, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 8 %15, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr %16) #6
  %59 = load ptr, ptr %7, align 8, !tbaa !9
  %60 = load i32, ptr %13, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds float, ptr %59, i64 %61
  %63 = load float, ptr %62, align 4, !tbaa !11
  %64 = call { <2 x float>, float } @_ZN6squishmlEfRKNS_4Vec3E(float noundef %63, ptr noundef nonnull align 4 dereferenceable(12) %14)
  store { <2 x float>, float } %64, ptr %17, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 8 %17, i64 12, i1 false)
  %65 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %14)
  %66 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %16)
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 0)
  %68 = load float, ptr %67, align 4, !tbaa !11
  %69 = call float @llvm.fmuladd.f32(float %65, float %66, float %68)
  store float %69, ptr %67, align 4, !tbaa !11
  %70 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %14)
  %71 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %16)
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 1)
  %73 = load float, ptr %72, align 4, !tbaa !11
  %74 = call float @llvm.fmuladd.f32(float %70, float %71, float %73)
  store float %74, ptr %72, align 4, !tbaa !11
  %75 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %14)
  %76 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %16)
  %77 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 2)
  %78 = load float, ptr %77, align 4, !tbaa !11
  %79 = call float @llvm.fmuladd.f32(float %75, float %76, float %78)
  store float %79, ptr %77, align 4, !tbaa !11
  %80 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %14)
  %81 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %16)
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 3)
  %83 = load float, ptr %82, align 4, !tbaa !11
  %84 = call float @llvm.fmuladd.f32(float %80, float %81, float %83)
  store float %84, ptr %82, align 4, !tbaa !11
  %85 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %14)
  %86 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %16)
  %87 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 4)
  %88 = load float, ptr %87, align 4, !tbaa !11
  %89 = call float @llvm.fmuladd.f32(float %85, float %86, float %88)
  store float %89, ptr %87, align 4, !tbaa !11
  %90 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %14)
  %91 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %16)
  %92 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 5)
  %93 = load float, ptr %92, align 4, !tbaa !11
  %94 = call float @llvm.fmuladd.f32(float %90, float %91, float %93)
  store float %94, ptr %92, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 12, ptr %16) #6
  call void @llvm.lifetime.end.p0(i64 12, ptr %14) #6
  br label %95

95:                                               ; preds = %53
  %96 = load i32, ptr %13, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %13, align 4, !tbaa !5
  br label %48, !llvm.loop !15

98:                                               ; preds = %52
  call void @llvm.lifetime.end.p0(i64 12, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6squish4Vec3C2Ef(ptr noundef nonnull align 4 dereferenceable(12), float noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN6squishmlEfRKNS_4Vec3E(float noundef, ptr noundef nonnull align 4 dereferenceable(12)) #3

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3pLERKS0_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3dVEf(ptr noundef nonnull align 4 dereferenceable(12), float noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6squish6Sym3x3C2Ef(ptr noundef nonnull align 4 dereferenceable(24), float noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN6squishmiERKNS_4Vec3ES2_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24), i32 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #5

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12)) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.squish::Sym3x3" = type { [6 x float] }
%"class.squish::Vec3" = type { float, float, float }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6squish25ComputeWeightedCovarianceEiPKNS_4Vec3EPKf(ptr dead_on_unwind noalias writable sret(%"class.squish::Sym3x3") align 4 %0, i32 noundef %1, ptr noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #0 {
  %5 = alloca %"class.squish::Vec3", align 4
  %6 = alloca %"class.squish::Vec3", align 8
  %7 = alloca %"class.squish::Vec3", align 8
  %8 = alloca %"class.squish::Vec3", align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %5) #5
  call void @_ZN6squish4Vec3C2Ef(ptr noundef nonnull align 4 dereferenceable(12) %5, float noundef 0.000000e+00)
  %9 = icmp sgt i32 %1, 0
  br i1 %9, label %.lr.ph, label %._crit_edge33.critedge

.lr.ph:                                           ; preds = %4
  %.sroa.211.0..sroa_idx = getelementptr inbounds i8, ptr %6, i64 8
  %wide.trip.count = zext nneg i32 %1 to i64
  br label %11

._crit_edge:                                      ; preds = %11
  %10 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3dVEf(ptr noundef nonnull align 4 dereferenceable(12) %5, float noundef %14)
  call void @_ZN6squish6Sym3x3C2Ef(ptr noundef nonnull align 4 dereferenceable(24) %0, float noundef 0.000000e+00)
  br i1 %9, label %.lr.ph32, label %._crit_edge33

.lr.ph32:                                         ; preds = %._crit_edge
  %.sroa.24.0..sroa_idx = getelementptr inbounds i8, ptr %7, i64 8
  %.sroa.2.0..sroa_idx = getelementptr inbounds i8, ptr %8, i64 8
  %wide.trip.count38 = zext nneg i32 %1 to i64
  br label %19

11:                                               ; preds = %.lr.ph, %11
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %11 ]
  %.029 = phi float [ 0.000000e+00, %.lr.ph ], [ %14, %11 ]
  %12 = getelementptr inbounds float, ptr %3, i64 %indvars.iv
  %13 = load float, ptr %12, align 4, !tbaa !5
  %14 = fadd float %.029, %13
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %6) #5
  %15 = getelementptr inbounds %"class.squish::Vec3", ptr %2, i64 %indvars.iv
  %16 = call { <2 x float>, float } @_ZN6squishmlEfRKNS_4Vec3E(float noundef %13, ptr noundef nonnull align 4 dereferenceable(12) %15)
  %.fca.0.extract8 = extractvalue { <2 x float>, float } %16, 0
  %.fca.1.extract9 = extractvalue { <2 x float>, float } %16, 1
  store <2 x float> %.fca.0.extract8, ptr %6, align 8
  store float %.fca.1.extract9, ptr %.sroa.211.0..sroa_idx, align 8
  %17 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3pLERKS0_(ptr noundef nonnull align 4 dereferenceable(12) %5, ptr noundef nonnull align 4 dereferenceable(12) %6)
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %6) #5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %11, !llvm.loop !9

._crit_edge33.critedge:                           ; preds = %4
  %18 = call noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3dVEf(ptr noundef nonnull align 4 dereferenceable(12) %5, float noundef 0.000000e+00)
  call void @_ZN6squish6Sym3x3C2Ef(ptr noundef nonnull align 4 dereferenceable(24) %0, float noundef 0.000000e+00)
  br label %._crit_edge33

._crit_edge33:                                    ; preds = %19, %._crit_edge33.critedge, %._crit_edge
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %5) #5
  ret void

19:                                               ; preds = %.lr.ph32, %19
  %indvars.iv35 = phi i64 [ 0, %.lr.ph32 ], [ %indvars.iv.next36, %19 ]
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %7) #5
  %20 = getelementptr inbounds %"class.squish::Vec3", ptr %2, i64 %indvars.iv35
  %21 = call { <2 x float>, float } @_ZN6squishmiERKNS_4Vec3ES2_(ptr noundef nonnull align 4 dereferenceable(12) %20, ptr noundef nonnull align 4 dereferenceable(12) %5)
  %.fca.0.extract1 = extractvalue { <2 x float>, float } %21, 0
  %.fca.1.extract2 = extractvalue { <2 x float>, float } %21, 1
  store <2 x float> %.fca.0.extract1, ptr %7, align 8
  store float %.fca.1.extract2, ptr %.sroa.24.0..sroa_idx, align 8
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %8) #5
  %22 = getelementptr inbounds float, ptr %3, i64 %indvars.iv35
  %23 = load float, ptr %22, align 4, !tbaa !5
  %24 = call { <2 x float>, float } @_ZN6squishmlEfRKNS_4Vec3E(float noundef %23, ptr noundef nonnull align 4 dereferenceable(12) %7)
  %.fca.0.extract = extractvalue { <2 x float>, float } %24, 0
  %.fca.1.extract = extractvalue { <2 x float>, float } %24, 1
  store <2 x float> %.fca.0.extract, ptr %8, align 8
  store float %.fca.1.extract, ptr %.sroa.2.0..sroa_idx, align 8
  %25 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %7)
  %26 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %8)
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 0)
  %28 = load float, ptr %27, align 4, !tbaa !5
  %29 = call float @llvm.fmuladd.f32(float %25, float %26, float %28)
  store float %29, ptr %27, align 4, !tbaa !5
  %30 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %7)
  %31 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %8)
  %32 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 1)
  %33 = load float, ptr %32, align 4, !tbaa !5
  %34 = call float @llvm.fmuladd.f32(float %30, float %31, float %33)
  store float %34, ptr %32, align 4, !tbaa !5
  %35 = call noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12) %7)
  %36 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %8)
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 2)
  %38 = load float, ptr %37, align 4, !tbaa !5
  %39 = call float @llvm.fmuladd.f32(float %35, float %36, float %38)
  store float %39, ptr %37, align 4, !tbaa !5
  %40 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %7)
  %41 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %8)
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 3)
  %43 = load float, ptr %42, align 4, !tbaa !5
  %44 = call float @llvm.fmuladd.f32(float %40, float %41, float %43)
  store float %44, ptr %42, align 4, !tbaa !5
  %45 = call noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12) %7)
  %46 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %8)
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 4)
  %48 = load float, ptr %47, align 4, !tbaa !5
  %49 = call float @llvm.fmuladd.f32(float %45, float %46, float %48)
  store float %49, ptr %47, align 4, !tbaa !5
  %50 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %7)
  %51 = call noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12) %8)
  %52 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef 5)
  %53 = load float, ptr %52, align 4, !tbaa !5
  %54 = call float @llvm.fmuladd.f32(float %50, float %51, float %53)
  store float %54, ptr %52, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %8) #5
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %7) #5
  %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1
  %exitcond39.not = icmp eq i64 %indvars.iv.next36, %wide.trip.count38
  br i1 %exitcond39.not, label %._crit_edge33, label %19, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6squish4Vec3C2Ef(ptr noundef nonnull align 4 dereferenceable(12), float noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN6squishmlEfRKNS_4Vec3E(float noundef, ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3pLERKS0_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(12) ptr @_ZN6squish4Vec3dVEf(ptr noundef nonnull align 4 dereferenceable(12), float noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN6squish6Sym3x3C2Ef(ptr noundef nonnull align 4 dereferenceable(24), float noundef) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { <2 x float>, float } @_ZN6squishmiERKNS_4Vec3ES2_(ptr noundef nonnull align 4 dereferenceable(12), ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK6squish4Vec31XEv(ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN6squish6Sym3x3ixEi(ptr noundef nonnull align 4 dereferenceable(24), i32 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK6squish4Vec31YEv(ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZNK6squish4Vec31ZEv(ptr noundef nonnull align 4 dereferenceable(12)) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass