; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/FIRMWARE/EXAMPLES (FGA_test)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @FGA_setmode(i32 noundef 0)
  br label %10

10:                                               ; preds = %56, %0
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store ptr inttoptr (i64 2097152 to ptr), ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %53, %10
  %12 = load i32, ptr %4, align 4, !tbaa !5
  %13 = icmp slt i32 %12, 200
  br i1 %13, label %15, label %14

14:                                               ; preds = %11
  store i32 4, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %56

15:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %49, %15
  %17 = load i32, ptr %6, align 4, !tbaa !5
  %18 = icmp slt i32 %17, 320
  br i1 %18, label %20, label %19

19:                                               ; preds = %16
  store i32 7, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %52

20:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %21 = load i32, ptr %6, align 4, !tbaa !5
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = add nsw i32 %21, %22
  %24 = and i32 %23, 63
  store i32 %24, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %25 = load i32, ptr %6, align 4, !tbaa !5
  %26 = ashr i32 %25, 3
  %27 = and i32 %26, 63
  store i32 %27, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = add nsw i32 %28, %29
  %31 = and i32 %30, 63
  store i32 %31, ptr %9, align 4, !tbaa !5
  %32 = load i32, ptr %7, align 4, !tbaa !5
  %33 = shl i32 %32, 3
  %34 = and i32 %33, 248
  %35 = shl i32 %34, 5
  %36 = load i32, ptr %8, align 4, !tbaa !5
  %37 = shl i32 %36, 3
  %38 = and i32 %37, 248
  %39 = or i32 %35, %38
  %40 = shl i32 %39, 3
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = shl i32 %41, 3
  %43 = lshr i32 %42, 3
  %44 = or i32 %40, %43
  %45 = trunc i32 %44 to i16
  %46 = load ptr, ptr %3, align 8, !tbaa !9
  store i16 %45, ptr %46, align 2, !tbaa !11
  %47 = load ptr, ptr %3, align 8, !tbaa !9
  %48 = getelementptr inbounds i16, ptr %47, i32 1
  store ptr %48, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %49

49:                                               ; preds = %20
  %50 = load i32, ptr %6, align 4, !tbaa !5
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %6, align 4, !tbaa !5
  br label %16, !llvm.loop !13

52:                                               ; preds = %19
  br label %53

53:                                               ; preds = %52
  %54 = load i32, ptr %4, align 4, !tbaa !5
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %4, align 4, !tbaa !5
  br label %11, !llvm.loop !15

56:                                               ; preds = %14
  %57 = load i32, ptr %2, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  br label %10
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @FGA_setmode(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: noreturn nounwind uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  tail call void @FGA_setmode(i32 noundef 0) #2
  br label %1

1:                                                ; preds = %13, %0
  %.0 = phi i32 [ 0, %0 ], [ %14, %13 ]
  %broadcast.splatinsert = insertelement <8 x i32> poison, i32 %.0, i64 0
  %broadcast.splat = shufflevector <8 x i32> %broadcast.splatinsert, <8 x i32> poison, <8 x i32> zeroinitializer
  br label %vector.ph

vector.ph:                                        ; preds = %middle.block, %1
  %.01420 = phi ptr [ inttoptr (i64 2097152 to ptr), %1 ], [ %ind.end, %middle.block ]
  %.01519 = phi i32 [ 0, %1 ], [ %15, %middle.block ]
  %2 = add nuw nsw i32 %.01519, %.0
  %3 = and i32 %2, 63
  %ind.end = getelementptr i8, ptr %.01420, i64 640
  %broadcast.splatinsert23 = insertelement <8 x i32> poison, i32 %3, i64 0
  %broadcast.splat24 = shufflevector <8 x i32> %broadcast.splatinsert23, <8 x i32> poison, <8 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.ind = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %offset.idx = shl i64 %index, 1
  %next.gep = getelementptr i8, ptr %.01420, i64 %offset.idx
  %4 = add nuw nsw <8 x i32> %vec.ind, %broadcast.splat
  %5 = shl <8 x i32> %4, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
  %6 = and <8 x i32> %5, <i32 7936, i32 7936, i32 7936, i32 7936, i32 7936, i32 7936, i32 7936, i32 7936>
  %7 = and <8 x i32> %vec.ind, <i32 248, i32 248, i32 248, i32 248, i32 248, i32 248, i32 248, i32 248>
  %8 = or disjoint <8 x i32> %6, %7
  %9 = shl nuw nsw <8 x i32> %8, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
  %10 = or disjoint <8 x i32> %9, %broadcast.splat24
  %11 = trunc nuw <8 x i32> %10 to <8 x i16>
  store <8 x i16> %11, ptr %next.gep, align 2, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %vec.ind.next = add <8 x i32> %vec.ind, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
  %12 = icmp eq i64 %index.next, 320
  br i1 %12, label %middle.block, label %vector.body, !llvm.loop !9

13:                                               ; preds = %middle.block
  %14 = add nuw nsw i32 %.0, 1
  br label %1

middle.block:                                     ; preds = %vector.body
  %15 = add nuw nsw i32 %.01519, 1
  %exitcond21.not = icmp eq i32 %15, 200
  br i1 %exitcond21.not, label %13, label %vector.ph, !llvm.loop !13
}

declare void @FGA_setmode(i32 noundef) local_unnamed_addr #1

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass