; LLVM IR from BrunoLevy/learn-fpga :: LiteX/software/Doom/mc1-doom/src (p_switch)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.switchlist_t = type { [9 x i8], [9 x i8], i16 }

@alphSwitchList = external dso_local global [41 x %struct.switchlist_t], align 16
@gamemode = external global i32, align 4
@numswitches = external dso_local global i32, align 4
@switchlist = external dso_local global [100 x i32], align 16

; Function Attrs: nounwind uwtable
define dso_local void @P_InitSwitchList() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 1, ptr %3, align 4, !tbaa !5
  %4 = load i32, ptr @gamemode, align 4, !tbaa !5
  %5 = icmp eq i32 %4, 1
  br i1 %5, label %6, label %7

6:                                                ; preds = %0
  store i32 2, ptr %3, align 4, !tbaa !5
  br label %12

7:                                                ; preds = %0
  %8 = load i32, ptr @gamemode, align 4, !tbaa !5
  %9 = icmp eq i32 %8, 2
  br i1 %9, label %10, label %11

10:                                               ; preds = %7
  store i32 3, ptr %3, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %10, %7
  br label %12

12:                                               ; preds = %11, %6
  store i32 0, ptr %2, align 4, !tbaa !5
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %60, %12
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = icmp slt i32 %14, 50
  br i1 %15, label %16, label %63

16:                                               ; preds = %13
  %17 = load i32, ptr %1, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [41 x %struct.switchlist_t], ptr @alphSwitchList, i64 0, i64 %18
  %20 = getelementptr inbounds %struct.switchlist_t, ptr %19, i32 0, i32 2
  %21 = load i16, ptr %20, align 2, !tbaa !9
  %22 = icmp ne i16 %21, 0
  br i1 %22, label %29, label %23

23:                                               ; preds = %16
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = sdiv i32 %24, 2
  store i32 %25, ptr @numswitches, align 4, !tbaa !5
  %26 = load i32, ptr %2, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [100 x i32], ptr @switchlist, i64 0, i64 %27
  store i32 -1, ptr %28, align 4, !tbaa !5
  br label %63

29:                                               ; preds = %16
  %30 = load i32, ptr %1, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [41 x %struct.switchlist_t], ptr @alphSwitchList, i64 0, i64 %31
  %33 = getelementptr inbounds %struct.switchlist_t, ptr %32, i32 0, i32 2
  %34 = load i16, ptr %33, align 2, !tbaa !9
  %35 = sext i16 %34 to i32
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = icmp sle i32 %35, %36
  br i1 %37, label %38, label %59

38:                                               ; preds = %29
  %39 = load i32, ptr %1, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [41 x %struct.switchlist_t], ptr @alphSwitchList, i64 0, i64 %40
  %42 = getelementptr inbounds %struct.switchlist_t, ptr %41, i32 0, i32 0
  %43 = getelementptr inbounds [9 x i8], ptr %42, i64 0, i64 0
  %44 = call i32 @R_TextureNumForName(ptr noundef %43)
  %45 = load i32, ptr %2, align 4, !tbaa !5
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %2, align 4, !tbaa !5
  %47 = sext i32 %45 to i64
  %48 = getelementptr inbounds [100 x i32], ptr @switchlist, i64 0, i64 %47
  store i32 %44, ptr %48, align 4, !tbaa !5
  %49 = load i32, ptr %1, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [41 x %struct.switchlist_t], ptr @alphSwitchList, i64 0, i64 %50
  %52 = getelementptr inbounds %struct.switchlist_t, ptr %51, i32 0, i32 1
  %53 = getelementptr inbounds [9 x i8], ptr %52, i64 0, i64 0
  %54 = call i32 @R_TextureNumForName(ptr noundef %53)
  %55 = load i32, ptr %2, align 4, !tbaa !5
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %2, align 4, !tbaa !5
  %57 = sext i32 %55 to i64
  %58 = getelementptr inbounds [100 x i32], ptr @switchlist, i64 0, i64 %57
  store i32 %54, ptr %58, align 4, !tbaa !5
  br label %59

59:                                               ; preds = %38, %29
  br label %60

60:                                               ; preds = %59
  %61 = load i32, ptr %1, align 4, !tbaa !5
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %1, align 4, !tbaa !5
  br label %13, !llvm.loop !12

63:                                               ; preds = %23, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @R_TextureNumForName(ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 18}
!10 = !{!"", !7, i64 0, !7, i64 9, !11, i64 18}
!11 = !{!"short", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.switchlist_t = type { [9 x i8], [9 x i8], i16 }

@alphSwitchList = external dso_local global [41 x %struct.switchlist_t], align 16
@gamemode = external local_unnamed_addr global i32, align 4
@numswitches = external dso_local local_unnamed_addr global i32, align 4
@switchlist = external dso_local local_unnamed_addr global [100 x i32], align 16

; Function Attrs: nounwind uwtable
define dso_local void @P_InitSwitchList() local_unnamed_addr #0 {
  %1 = load i32, ptr @gamemode, align 4, !tbaa !5
  %switch.selectcmp = icmp eq i32 %1, 2
  %switch.select = select i1 %switch.selectcmp, i32 3, i32 1
  %switch.selectcmp16 = icmp eq i32 %1, 1
  %switch.select17 = select i1 %switch.selectcmp16, i32 2, i32 %switch.select
  br label %2

2:                                                ; preds = %0, %22
  %indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %22 ]
  %.01120 = phi i32 [ 0, %0 ], [ %.1, %22 ]
  %3 = getelementptr inbounds [41 x %struct.switchlist_t], ptr @alphSwitchList, i64 0, i64 %indvars.iv
  %4 = getelementptr inbounds i8, ptr %3, i64 18
  %5 = load i16, ptr %4, align 2, !tbaa !9
  %.not = icmp eq i16 %5, 0
  br i1 %.not, label %6, label %10

6:                                                ; preds = %2
  %7 = sdiv i32 %.01120, 2
  store i32 %7, ptr @numswitches, align 4, !tbaa !5
  %8 = sext i32 %.01120 to i64
  %9 = getelementptr inbounds [100 x i32], ptr @switchlist, i64 0, i64 %8
  store i32 -1, ptr %9, align 4, !tbaa !5
  br label %.loopexit

10:                                               ; preds = %2
  %11 = sext i16 %5 to i32
  %.not15 = icmp slt i32 %switch.select17, %11
  br i1 %.not15, label %22, label %12

12:                                               ; preds = %10
  %13 = tail call i32 @R_TextureNumForName(ptr noundef nonnull %3) #2
  %14 = add nsw i32 %.01120, 1
  %15 = sext i32 %.01120 to i64
  %16 = getelementptr inbounds [100 x i32], ptr @switchlist, i64 0, i64 %15
  store i32 %13, ptr %16, align 4, !tbaa !5
  %17 = getelementptr inbounds i8, ptr %3, i64 9
  %18 = tail call i32 @R_TextureNumForName(ptr noundef nonnull %17) #2
  %19 = add nsw i32 %.01120, 2
  %20 = sext i32 %14 to i64
  %21 = getelementptr inbounds [100 x i32], ptr @switchlist, i64 0, i64 %20
  store i32 %18, ptr %21, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %10, %12
  %.1 = phi i32 [ %19, %12 ], [ %.01120, %10 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, 50
  br i1 %exitcond.not, label %.loopexit, label %2, !llvm.loop !12

.loopexit:                                        ; preds = %22, %6
  ret void
}

declare i32 @R_TextureNumForName(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 18}
!10 = !{!"", !7, i64 0, !7, i64 9, !11, i64 18}
!11 = !{!"short", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass