; LLVM IR from cfd-rg-solver/FVM-RG-Solver :: src/observer.ll (Z13pressureCheckSt6vectorI10macroParamSaIS0_EE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.macroParam = type { %struct.Mixture, %"class.std::vector.5", %"class.std::vector.5", double, double, double, double, double, double, double, double, %"class.std::__cxx11::basic_string" }
%struct.Mixture = type <{ %"class.std::vector.0", i32, [4 x i8] }>
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<MixtureComponent, std::allocator<MixtureComponent>>::_Vector_impl" }
%"struct.std::_Vector_base<MixtureComponent, std::allocator<MixtureComponent>>::_Vector_impl" = type { %"struct.std::_Vector_base<MixtureComponent, std::allocator<MixtureComponent>>::_Vector_impl_data" }
%"struct.std::_Vector_base<MixtureComponent, std::allocator<MixtureComponent>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.5" = type { %"struct.std::_Vector_base.6" }
%"struct.std::_Vector_base.6" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z13pressureCheckSt6vectorI10macroParamSaIS0_EE(ptr noundef %0) #0 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %7 = call noundef i64 @_ZNKSt6vectorI10macroParamSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #3
  store i64 %7, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !11
  br label %8

8:                                                ; preds = %32, %1
  %9 = load i32, ptr %5, align 4, !tbaa !11
  %10 = sext i32 %9 to i64
  %11 = load i64, ptr %4, align 8, !tbaa !9
  %12 = sub i64 %11, 1
  %13 = icmp ult i64 %10, %12
  br i1 %13, label %15, label %14

14:                                               ; preds = %8
  store i32 2, ptr %6, align 4
  br label %35

15:                                               ; preds = %8
  %16 = load i32, ptr %5, align 4, !tbaa !11
  %17 = sext i32 %16 to i64
  %18 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZNSt6vectorI10macroParamSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %17) #3
  %19 = getelementptr inbounds %struct.macroParam, ptr %18, i32 0, i32 4
  %20 = load double, ptr %19, align 8, !tbaa !13
  %21 = load i32, ptr %5, align 4, !tbaa !11
  %22 = add nsw i32 %21, 1
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 8 dereferenceable(176) ptr @_ZNSt6vectorI10macroParamSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %23) #3
  %25 = getelementptr inbounds %struct.macroParam, ptr %24, i32 0, i32 4
  %26 = load double, ptr %25, align 8, !tbaa !13
  %27 = fsub double %20, %26
  %28 = call double @llvm.fabs.f64(double %27)
  %29 = fcmp ogt double %28, 0x3EB0C6F7A0B5ED8D
  br i1 %29, label %30, label %31

30:                                               ; preds = %15
  store i1 false, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %35

31:                                               ; preds = %15
  br label %32

32:                                               ; preds = %31
  %33 = load i32, ptr %5, align 4, !tbaa !11
  %34 = add nsw i32 %33, 1
  store i32 %34, ptr %5, align 4, !tbaa !11
  br label %8, !llvm.loop !27

35:                                               ; preds = %30, %14
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  %36 = load i32, ptr %6, align 4
  switch i32 %36, label %38 [
    i32 2, label %37
  ]

37:                                               ; preds = %35
  store i1 true, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %38

38:                                               ; preds = %37, %35
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %39 = load i1, ptr %2, align 1
  ret i1 %39
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10macroParamSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(176) ptr @_ZNSt6vectorI10macroParamSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !24, i64 88}
!14 = !{!"_ZTS10macroParam", !15, i64 0, !20, i64 32, !20, i64 56, !24, i64 80, !24, i64 88, !24, i64 96, !24, i64 104, !24, i64 112, !24, i64 120, !24, i64 128, !24, i64 136, !25, i64 144}
!15 = !{!"_ZTS7Mixture", !16, i64 0, !12, i64 24}
!16 = !{!"_ZTSSt6vectorI16MixtureComponentSaIS0_EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseI16MixtureComponentSaIS0_EE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseI16MixtureComponentSaIS0_EE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseI16MixtureComponentSaIS0_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIdSaIdEE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!"double", !7, i64 0}
!25 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !26, i64 0, !10, i64 8, !7, i64 16}
!26 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!27 = distinct !{!27, !28}
!28 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z13pressureCheckSt6vectorI10macroParamSaIS0_EE(ptr noundef nonnull %0) local_unnamed_addr #0 {
  %2 = tail call noundef i64 @_ZNKSt6vectorI10macroParamSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %3 = add i64 %2, -1
  br label %4

4:                                                ; preds = %5, %1
  %indvars.iv = phi i64 [ %indvars.iv.next, %5 ], [ 0, %1 ]
  %exitcond = icmp eq i64 %indvars.iv, %3
  br i1 %exitcond, label %.critedge, label %5

5:                                                ; preds = %4
  %6 = tail call noundef nonnull align 8 dereferenceable(176) ptr @_ZNSt6vectorI10macroParamSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #2
  %7 = getelementptr inbounds i8, ptr %6, i64 88
  %8 = load double, ptr %7, align 8, !tbaa !5
  %indvars.iv.next = add nuw i64 %indvars.iv, 1
  %9 = tail call noundef nonnull align 8 dereferenceable(176) ptr @_ZNSt6vectorI10macroParamSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next) #2
  %10 = getelementptr inbounds i8, ptr %9, i64 88
  %11 = load double, ptr %10, align 8, !tbaa !5
  %12 = fsub double %8, %11
  %13 = tail call double @llvm.fabs.f64(double %12)
  %14 = fcmp ogt double %13, 0x3EB0C6F7A0B5ED8D
  br i1 %14, label %.critedge, label %4, !llvm.loop !24

.critedge:                                        ; preds = %4, %5
  %.not = icmp ule i64 %3, %indvars.iv
  ret i1 %.not
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI10macroParamSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(176) ptr @_ZNSt6vectorI10macroParamSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !20, i64 88}
!6 = !{!"_ZTS10macroParam", !7, i64 0, !16, i64 32, !16, i64 56, !20, i64 80, !20, i64 88, !20, i64 96, !20, i64 104, !20, i64 112, !20, i64 120, !20, i64 128, !20, i64 136, !21, i64 144}
!7 = !{!"_ZTS7Mixture", !8, i64 0, !15, i64 24}
!8 = !{!"_ZTSSt6vectorI16MixtureComponentSaIS0_EE", !9, i64 0}
!9 = !{!"_ZTSSt12_Vector_baseI16MixtureComponentSaIS0_EE", !10, i64 0}
!10 = !{!"_ZTSNSt12_Vector_baseI16MixtureComponentSaIS0_EE12_Vector_implE", !11, i64 0}
!11 = !{!"_ZTSNSt12_Vector_baseI16MixtureComponentSaIS0_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !13, i64 0}
!13 = !{!"omnipotent char", !14, i64 0}
!14 = !{!"Simple C++ TBAA"}
!15 = !{!"int", !13, i64 0}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!20 = !{!"double", !13, i64 0}
!21 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !22, i64 0, !23, i64 8, !13, i64 16}
!22 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !12, i64 0}
!23 = !{!"long", !13, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass