; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/SIM/FPU_funcs.ll (Z20FCVTWS_WITH_SOFT_FPUj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.IEEE754 = type { %union.anon }
%union.anon = type { i32 }

@.str.12 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z20FCVTWS_WITH_SOFT_FPUj(i32 noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca %class.IEEE754, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @_Z1LPKc(ptr noundef @.str.12)
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  %6 = load i32, ptr %2, align 4, !tbaa !5
  call void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef %6)
  %7 = getelementptr inbounds %class.IEEE754, ptr %4, i32 0, i32 0
  %8 = load i32, ptr %7, align 4
  %9 = lshr i32 %8, 23
  %10 = and i32 %9, 255
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %13

12:                                               ; preds = %1
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %35

13:                                               ; preds = %1
  %14 = getelementptr inbounds %class.IEEE754, ptr %4, i32 0, i32 0
  %15 = load i32, ptr %14, align 4
  %16 = and i32 %15, 8388607
  %17 = or i32 %16, 8388608
  store i32 %17, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %18 = getelementptr inbounds %class.IEEE754, ptr %4, i32 0, i32 0
  %19 = load i32, ptr %18, align 4
  %20 = lshr i32 %19, 23
  %21 = and i32 %20, 255
  %22 = sub nsw i32 %21, 150
  store i32 %22, ptr %5, align 4, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = icmp sgt i32 %23, 0
  br i1 %24, label %25, label %29

25:                                               ; preds = %13
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = load i32, ptr %5, align 4, !tbaa !5
  %28 = shl i32 %26, %27
  store i32 %28, ptr %3, align 4, !tbaa !5
  br label %34

29:                                               ; preds = %13
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = load i32, ptr %5, align 4, !tbaa !5
  %32 = sub nsw i32 0, %31
  %33 = lshr i32 %30, %32
  store i32 %33, ptr %3, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %29, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %35

35:                                               ; preds = %34, %12
  %36 = getelementptr inbounds %class.IEEE754, ptr %4, i32 0, i32 0
  %37 = load i32, ptr %36, align 4
  %38 = lshr i32 %37, 31
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %43

40:                                               ; preds = %35
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = sub nsw i32 0, %41
  store i32 %42, ptr %3, align 4, !tbaa !5
  br label %43

43:                                               ; preds = %40, %35
  %44 = load i32, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret i32 %44
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z1LPKc(ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.IEEE754 = type { %union.anon }
%union.anon = type { i32 }

@.str.12 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z20FCVTWS_WITH_SOFT_FPUj(i32 noundef %0) local_unnamed_addr #2 {
  %2 = alloca %class.IEEE754, align 4
  tail call void @_Z1LPKc(ptr noundef nonnull @.str.12)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  call void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4) %2, i32 noundef %0)
  %3 = load i32, ptr %2, align 4
  %4 = lshr i32 %3, 23
  %5 = and i32 %4, 255
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %15, label %7

7:                                                ; preds = %1
  %8 = and i32 %3, 8388607
  %9 = or disjoint i32 %8, 8388608
  %10 = icmp ugt i32 %5, 150
  %11 = add nsw i32 %5, -150
  %12 = shl i32 %9, %11
  %13 = sub nsw i32 150, %5
  %14 = lshr i32 %9, %13
  %.0 = select i1 %10, i32 %12, i32 %14
  br label %15

15:                                               ; preds = %1, %7
  %.1 = phi i32 [ %.0, %7 ], [ 0, %1 ]
  %16 = sub nsw i32 0, %.1
  %.not11 = icmp slt i32 %3, 0
  %spec.select = select i1 %.not11, i32 %16, i32 %.1
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  ret i32 %spec.select
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local void @_Z1LPKc(ptr noundef) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass