; LLVM IR from dmalyuta/FlyARocket_GNC :: master_funcs (linear_search)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@PWM_valve_charac = external dso_local global [8 x i32], align 16
@R_valve_charac = external dso_local global [8 x double], align 16

; Function Attrs: nounwind uwtable
define dso_local void @linear_search(double noundef %0, ptr noundef %1) #0 {
  %3 = alloca double, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store double %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 1, ptr %5, align 4, !tbaa !11
  br label %6

6:                                                ; preds = %64, %2
  %7 = load i32, ptr %5, align 4, !tbaa !11
  %8 = icmp slt i32 %7, 8
  br i1 %8, label %9, label %67

9:                                                ; preds = %6
  %10 = load i32, ptr %5, align 4, !tbaa !11
  %11 = sub nsw i32 %10, 1
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [8 x double], ptr @R_valve_charac, i64 0, i64 %12
  %14 = load double, ptr %13, align 8, !tbaa !5
  %15 = load double, ptr %3, align 8, !tbaa !5
  %16 = fcmp ole double %14, %15
  br i1 %16, label %17, label %63

17:                                               ; preds = %9
  %18 = load i32, ptr %5, align 4, !tbaa !11
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [8 x double], ptr @R_valve_charac, i64 0, i64 %19
  %21 = load double, ptr %20, align 8, !tbaa !5
  %22 = load double, ptr %3, align 8, !tbaa !5
  %23 = fcmp oge double %21, %22
  br i1 %23, label %24, label %63

24:                                               ; preds = %17
  %25 = load i32, ptr %5, align 4, !tbaa !11
  %26 = sub nsw i32 %25, 1
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [8 x i32], ptr @PWM_valve_charac, i64 0, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !11
  %30 = load i32, ptr %5, align 4, !tbaa !11
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [8 x i32], ptr @PWM_valve_charac, i64 0, i64 %31
  %33 = load i32, ptr %32, align 4, !tbaa !11
  %34 = load i32, ptr %5, align 4, !tbaa !11
  %35 = sub nsw i32 %34, 1
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [8 x i32], ptr @PWM_valve_charac, i64 0, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !11
  %39 = sub i32 %33, %38
  %40 = uitofp i32 %39 to double
  %41 = load i32, ptr %5, align 4, !tbaa !11
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds [8 x double], ptr @R_valve_charac, i64 0, i64 %42
  %44 = load double, ptr %43, align 8, !tbaa !5
  %45 = load i32, ptr %5, align 4, !tbaa !11
  %46 = sub nsw i32 %45, 1
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [8 x double], ptr @R_valve_charac, i64 0, i64 %47
  %49 = load double, ptr %48, align 8, !tbaa !5
  %50 = fsub double %44, %49
  %51 = fdiv double %40, %50
  %52 = load double, ptr %3, align 8, !tbaa !5
  %53 = load i32, ptr %5, align 4, !tbaa !11
  %54 = sub nsw i32 %53, 1
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [8 x double], ptr @R_valve_charac, i64 0, i64 %55
  %57 = load double, ptr %56, align 8, !tbaa !5
  %58 = fsub double %52, %57
  %59 = fmul double %51, %58
  %60 = fptoui double %59 to i32
  %61 = add i32 %29, %60
  %62 = load ptr, ptr %4, align 8, !tbaa !9
  store i32 %61, ptr %62, align 4, !tbaa !11
  br label %67

63:                                               ; preds = %17, %9
  br label %64

64:                                               ; preds = %63
  %65 = load i32, ptr %5, align 4, !tbaa !11
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %5, align 4, !tbaa !11
  br label %6, !llvm.loop !13

67:                                               ; preds = %24, %6
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@PWM_valve_charac = external dso_local local_unnamed_addr global [8 x i32], align 16
@R_valve_charac = external dso_local local_unnamed_addr global [8 x double], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable
define dso_local void @linear_search(double noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
  %3 = load double, ptr @R_valve_charac, align 16, !tbaa !5
  %4 = fcmp ugt double %3, %0
  %.pre = load double, ptr getelementptr inbounds (i8, ptr @R_valve_charac, i64 8), align 8, !tbaa !5
  %5 = fcmp ult double %.pre, %0
  %or.cond = select i1 %4, i1 true, i1 %5
  br i1 %or.cond, label %19, label %6

6:                                                ; preds = %34, %31, %28, %25, %22, %19, %2
  %.lcssa23 = phi i64 [ 0, %2 ], [ 1, %19 ], [ 2, %22 ], [ 3, %25 ], [ 4, %28 ], [ 5, %31 ], [ 6, %34 ]
  %.lcssa21 = phi double [ %3, %2 ], [ %.pre, %19 ], [ %.pre26, %22 ], [ %.pre27, %25 ], [ %.pre28, %28 ], [ %.pre29, %31 ], [ %.pre30, %34 ]
  %.lcssa20 = phi i64 [ 1, %2 ], [ 2, %19 ], [ 3, %22 ], [ 4, %25 ], [ 5, %28 ], [ 6, %31 ], [ 7, %34 ]
  %.lcssa = phi double [ %.pre, %2 ], [ %.pre26, %19 ], [ %.pre27, %22 ], [ %.pre28, %25 ], [ %.pre29, %28 ], [ %.pre30, %31 ], [ %36, %34 ]
  %7 = getelementptr inbounds [8 x i32], ptr @PWM_valve_charac, i64 0, i64 %.lcssa23
  %8 = load i32, ptr %7, align 4, !tbaa !9
  %9 = getelementptr inbounds [8 x i32], ptr @PWM_valve_charac, i64 0, i64 %.lcssa20
  %10 = load i32, ptr %9, align 4, !tbaa !9
  %11 = sub i32 %10, %8
  %12 = uitofp i32 %11 to double
  %13 = fsub double %.lcssa, %.lcssa21
  %14 = fdiv double %12, %13
  %15 = fsub double %0, %.lcssa21
  %16 = fmul double %15, %14
  %17 = fptoui double %16 to i32
  %18 = add i32 %8, %17
  store i32 %18, ptr %1, align 4, !tbaa !9
  br label %.loopexit

19:                                               ; preds = %2
  %20 = fcmp ugt double %.pre, %0
  %.pre26 = load double, ptr getelementptr inbounds (i8, ptr @R_valve_charac, i64 16), align 16, !tbaa !5
  %21 = fcmp ult double %.pre26, %0
  %or.cond31 = select i1 %20, i1 true, i1 %21
  br i1 %or.cond31, label %22, label %6

22:                                               ; preds = %19
  %23 = fcmp ugt double %.pre26, %0
  %.pre27 = load double, ptr getelementptr inbounds (i8, ptr @R_valve_charac, i64 24), align 8, !tbaa !5
  %24 = fcmp ult double %.pre27, %0
  %or.cond32 = select i1 %23, i1 true, i1 %24
  br i1 %or.cond32, label %25, label %6

25:                                               ; preds = %22
  %26 = fcmp ugt double %.pre27, %0
  %.pre28 = load double, ptr getelementptr inbounds (i8, ptr @R_valve_charac, i64 32), align 16, !tbaa !5
  %27 = fcmp ult double %.pre28, %0
  %or.cond33 = select i1 %26, i1 true, i1 %27
  br i1 %or.cond33, label %28, label %6

28:                                               ; preds = %25
  %29 = fcmp ugt double %.pre28, %0
  %.pre29 = load double, ptr getelementptr inbounds (i8, ptr @R_valve_charac, i64 40), align 8, !tbaa !5
  %30 = fcmp ult double %.pre29, %0
  %or.cond34 = select i1 %29, i1 true, i1 %30
  br i1 %or.cond34, label %31, label %6

31:                                               ; preds = %28
  %32 = fcmp ugt double %.pre29, %0
  %.pre30 = load double, ptr getelementptr inbounds (i8, ptr @R_valve_charac, i64 48), align 16, !tbaa !5
  %33 = fcmp ult double %.pre30, %0
  %or.cond35 = select i1 %32, i1 true, i1 %33
  br i1 %or.cond35, label %34, label %6

34:                                               ; preds = %31
  %35 = fcmp ugt double %.pre30, %0
  %36 = load double, ptr getelementptr inbounds (i8, ptr @R_valve_charac, i64 56), align 8
  %37 = fcmp ult double %36, %0
  %or.cond37 = select i1 %35, i1 true, i1 %37
  br i1 %or.cond37, label %.loopexit, label %6

.loopexit:                                        ; preds = %34, %6
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass