; LLVM IR from embeddednirvana/A-Rudimentary-RTOS-for-Satellite-Control :: device (sd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._sd = type { i32, i32, i8 }
%struct._AT91S_PIO = type { i32, i32, i32, [1 x i32], i32, i32, i32, [1 x i32], i32, i32, i32, [1 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [1 x i32], i32, i32, i32, [1 x i32], i32, i32, i32, [9 x i32], i32, i32, i32 }

@error = external dso_local global i8, align 1
@arguments = external dso_local global [4 x i8], align 1
@response = external dso_local global [8 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local i32 @sd_initialize(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct._sd, ptr %6, i32 0, i32 2
  store i8 1, ptr %7, align 4, !tbaa !9
  store i8 0, ptr %4, align 1, !tbaa !12
  br label %8

8:                                                ; preds = %16, %1
  %9 = load i8, ptr %4, align 1, !tbaa !12
  %10 = zext i8 %9 to i32
  %11 = icmp slt i32 %10, 4
  br i1 %11, label %12, label %19

12:                                               ; preds = %8
  %13 = load i8, ptr %4, align 1, !tbaa !12
  %14 = zext i8 %13 to i64
  %15 = getelementptr inbounds [4 x i8], ptr @arguments, i64 0, i64 %14
  store i8 0, ptr %15, align 1, !tbaa !12
  br label %16

16:                                               ; preds = %12
  %17 = load i8, ptr %4, align 1, !tbaa !12
  %18 = add i8 %17, 1
  store i8 %18, ptr %4, align 1, !tbaa !12
  br label %8, !llvm.loop !13

19:                                               ; preds = %8
  store i8 0, ptr %4, align 1, !tbaa !12
  br label %20

20:                                               ; preds = %28, %19
  %21 = load i8, ptr %4, align 1, !tbaa !12
  %22 = zext i8 %21 to i32
  %23 = icmp slt i32 %22, 5
  br i1 %23, label %24, label %31

24:                                               ; preds = %20
  %25 = load i8, ptr %4, align 1, !tbaa !12
  %26 = zext i8 %25 to i64
  %27 = getelementptr inbounds [8 x i8], ptr @response, i64 0, i64 %26
  store i8 0, ptr %27, align 1, !tbaa !12
  br label %28

28:                                               ; preds = %24
  %29 = load i8, ptr %4, align 1, !tbaa !12
  %30 = add i8 %29, 1
  store i8 %30, ptr %4, align 1, !tbaa !12
  br label %20, !llvm.loop !15

31:                                               ; preds = %20
  %32 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %33 = and i32 %32, -8193
  store volatile i32 %33, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  call void @sd_delay(i16 noundef zeroext 100)
  %34 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %35 = or i32 %34, 8192
  store volatile i32 %35, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  call void @sd_delay(i16 noundef zeroext 2)
  %36 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %37 = and i32 %36, -8193
  store volatile i32 %37, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %38 = load ptr, ptr %3, align 8, !tbaa !5
  %39 = call i32 @sd_send_command(ptr noundef %38, i8 noundef zeroext 0, i8 noundef zeroext 1)
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %41, label %48

41:                                               ; preds = %31
  %42 = load i8, ptr @error, align 1, !tbaa !12
  %43 = zext i8 %42 to i32
  %44 = or i32 %43, 1
  %45 = trunc i32 %44 to i8
  store i8 %45, ptr @error, align 1, !tbaa !12
  %46 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %47 = or i32 %46, 8192
  store volatile i32 %47, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %96

48:                                               ; preds = %31
  store i8 0, ptr %4, align 1, !tbaa !12
  br label %49

49:                                               ; preds = %69, %48
  %50 = load i8, ptr %4, align 1, !tbaa !12
  %51 = add i8 %50, 1
  store i8 %51, ptr %4, align 1, !tbaa !12
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = call i32 @sd_send_command(ptr noundef %52, i8 noundef zeroext 55, i8 noundef zeroext 1)
  %54 = icmp eq i32 %53, 1
  br i1 %54, label %55, label %58

55:                                               ; preds = %49
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = call i32 @sd_send_command(ptr noundef %56, i8 noundef zeroext 41, i8 noundef zeroext 1)
  br label %59

58:                                               ; preds = %49
  store i8 100, ptr %4, align 1, !tbaa !12
  br label %59

59:                                               ; preds = %58, %55
  br label %60

60:                                               ; preds = %59
  %61 = load i8, ptr @response, align 1, !tbaa !12
  %62 = zext i8 %61 to i32
  %63 = and i32 %62, 1
  %64 = icmp eq i32 %63, 1
  br i1 %64, label %65, label %69

65:                                               ; preds = %60
  %66 = load i8, ptr %4, align 1, !tbaa !12
  %67 = zext i8 %66 to i32
  %68 = icmp slt i32 %67, 100
  br label %69

69:                                               ; preds = %65, %60
  %70 = phi i1 [ false, %60 ], [ %68, %65 ]
  br i1 %70, label %49, label %71, !llvm.loop !18

71:                                               ; preds = %69
  %72 = load i8, ptr %4, align 1, !tbaa !12
  %73 = zext i8 %72 to i32
  %74 = icmp sge i32 %73, 100
  br i1 %74, label %75, label %82

75:                                               ; preds = %71
  %76 = load i8, ptr @error, align 1, !tbaa !12
  %77 = zext i8 %76 to i32
  %78 = or i32 %77, 1
  %79 = trunc i32 %78 to i8
  store i8 %79, ptr @error, align 1, !tbaa !12
  %80 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %81 = or i32 %80, 8192
  store volatile i32 %81, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %96

82:                                               ; preds = %71
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = call i32 @sd_set_block_length(ptr noundef %83, i32 noundef 512)
  %85 = icmp eq i32 %84, 0
  br i1 %85, label %86, label %93

86:                                               ; preds = %82
  %87 = load i8, ptr @error, align 1, !tbaa !12
  %88 = zext i8 %87 to i32
  %89 = or i32 %88, 2
  %90 = trunc i32 %89 to i8
  store i8 %90, ptr @error, align 1, !tbaa !12
  %91 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %92 = or i32 %91, 8192
  store volatile i32 %92, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %96

93:                                               ; preds = %82
  %94 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  %95 = or i32 %94, 8192
  store volatile i32 %95, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !16
  store i32 1, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %96

96:                                               ; preds = %93, %86, %75, %41
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  %97 = load i32, ptr %2, align 4
  ret i32 %97
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local void @sd_delay(i16 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @sd_send_command(ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @sd_set_block_length(ptr noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 8}
!10 = !{!"_sd", !11, i64 0, !11, i64 4, !7, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{!17, !11, i64 56}
!17 = !{!"_AT91S_PIO", !11, i64 0, !11, i64 4, !11, i64 8, !7, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !7, i64 28, !11, i64 32, !11, i64 36, !11, i64 40, !7, i64 44, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !11, i64 80, !11, i64 84, !11, i64 88, !7, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !7, i64 108, !11, i64 112, !11, i64 116, !11, i64 120, !7, i64 124, !11, i64 160, !11, i64 164, !11, i64 168}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@error = external dso_local local_unnamed_addr global i8, align 1
@arguments = external dso_local local_unnamed_addr global [4 x i8], align 1
@response = external dso_local local_unnamed_addr global [8 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @sd_initialize(ptr noundef %0) local_unnamed_addr #0 {
.preheader19.preheader:
  %1 = getelementptr inbounds i8, ptr %0, i64 8
  store i8 1, ptr %1, align 4, !tbaa !5
  store i32 0, ptr @arguments, align 1
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(5) @response, i8 0, i64 5, i1 false), !tbaa !10
  %2 = load volatile i32, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  %3 = and i32 %2, -8193
  store volatile i32 %3, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  tail call void @sd_delay(i16 noundef zeroext 100)
  %4 = load volatile i32, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  %5 = or i32 %4, 8192
  store volatile i32 %5, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  tail call void @sd_delay(i16 noundef zeroext 2)
  %6 = load volatile i32, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  %7 = and i32 %6, -8193
  store volatile i32 %7, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  %8 = tail call i32 @sd_send_command(ptr noundef %0, i8 noundef zeroext 0, i8 noundef zeroext 1)
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %.sink.split, label %.preheader

.preheader:                                       ; preds = %.preheader19.preheader, %12
  %.2 = phi i8 [ %13, %12 ], [ 0, %.preheader19.preheader ]
  %10 = tail call i32 @sd_send_command(ptr noundef %0, i8 noundef zeroext 55, i8 noundef zeroext 1)
  %11 = icmp eq i32 %10, 1
  br i1 %11, label %12, label %.sink.split

12:                                               ; preds = %.preheader
  %13 = add nuw nsw i8 %.2, 1
  %14 = tail call i32 @sd_send_command(ptr noundef %0, i8 noundef zeroext 41, i8 noundef zeroext 1)
  %15 = load i8, ptr @response, align 1, !tbaa !10
  %16 = and i8 %15, 1
  %17 = icmp ne i8 %16, 0
  %18 = icmp ult i8 %.2, 99
  %19 = select i1 %17, i1 %18, i1 false
  br i1 %19, label %.preheader, label %20, !llvm.loop !13

20:                                               ; preds = %12
  %21 = icmp ugt i8 %.2, 98
  br i1 %21, label %.sink.split, label %22

22:                                               ; preds = %20
  %23 = tail call i32 @sd_set_block_length(ptr noundef %0, i32 noundef 512)
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %.sink.split, label %27

.sink.split:                                      ; preds = %.preheader, %22, %20, %.preheader19.preheader
  %.sink29 = phi i8 [ 1, %.preheader19.preheader ], [ 1, %20 ], [ 2, %22 ], [ 1, %.preheader ]
  %25 = load i8, ptr @error, align 1, !tbaa !10
  %26 = or i8 %25, %.sink29
  store i8 %26, ptr @error, align 1, !tbaa !10
  br label %27

27:                                               ; preds = %.sink.split, %22
  %.014 = phi i32 [ 1, %22 ], [ 0, %.sink.split ]
  %28 = load volatile i32, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  %29 = or i32 %28, 8192
  store volatile i32 %29, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  ret i32 %.014
}

; Function Attrs: nounwind uwtable
declare dso_local void @sd_delay(i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @sd_send_command(ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @sd_set_block_length(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 8}
!6 = !{!"_sd", !7, i64 0, !7, i64 4, !8, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !7, i64 56}
!12 = !{!"_AT91S_PIO", !7, i64 0, !7, i64 4, !7, i64 8, !8, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !8, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !8, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !8, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !8, i64 124, !7, i64 160, !7, i64 164, !7, i64 168}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass