; LLVM IR from QiaoLiuHit/LSOTB-TIR :: vlfeat-0.9.19/vl (mathop)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @abort() #1

declare i32 @vl_cpu_has_sse2() #2

declare i32 @vl_get_simd_enabled() #2

declare i32 @vl_cpu_has_avx() #2

; Function Attrs: nounwind uwtable
declare dso_local double @_vl_distance_mahalanobis_sq_d(i64 noundef, ptr noundef, ptr noundef, ptr noundef) #3

; Function Attrs: nounwind uwtable
define dso_local ptr @vl_get_vector_3_comparison_function_d(i32 noundef %0) #3 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  store ptr null, ptr %3, align 8, !tbaa !9
  %4 = load i32, ptr %2, align 4, !tbaa !5
  switch i32 %4, label %6 [
    i32 5, label %5
  ]

5:                                                ; preds = %1
  store ptr @_vl_distance_mahalanobis_sq_d, ptr %3, align 8, !tbaa !9
  br label %7

6:                                                ; preds = %1
  call void @abort() #5
  unreachable

7:                                                ; preds = %5
  %8 = call i32 @vl_cpu_has_sse2()
  %9 = icmp ne i32 %8, 0
  br i1 %9, label %10, label %18

10:                                               ; preds = %7
  %11 = call i32 @vl_get_simd_enabled()
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %13, label %18

13:                                               ; preds = %10
  %14 = load i32, ptr %2, align 4, !tbaa !5
  switch i32 %14, label %16 [
    i32 5, label %15
  ]

15:                                               ; preds = %13
  store ptr @_vl_distance_mahalanobis_sq_sse2_d, ptr %3, align 8, !tbaa !9
  br label %17

16:                                               ; preds = %13
  br label %17

17:                                               ; preds = %16, %15
  br label %18

18:                                               ; preds = %17, %10, %7
  %19 = call i32 @vl_cpu_has_avx()
  %20 = icmp ne i32 %19, 0
  br i1 %20, label %21, label %29

21:                                               ; preds = %18
  %22 = call i32 @vl_get_simd_enabled()
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %29

24:                                               ; preds = %21
  %25 = load i32, ptr %2, align 4, !tbaa !5
  switch i32 %25, label %27 [
    i32 5, label %26
  ]

26:                                               ; preds = %24
  store ptr @_vl_distance_mahalanobis_sq_avx_d, ptr %3, align 8, !tbaa !9
  br label %28

27:                                               ; preds = %24
  br label %28

28:                                               ; preds = %27, %26
  br label %29

29:                                               ; preds = %28, %21, %18
  %30 = load ptr, ptr %3, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret ptr %30
}

declare double @_vl_distance_mahalanobis_sq_sse2_d(i64 noundef, ptr noundef, ptr noundef, ptr noundef) #2

declare double @_vl_distance_mahalanobis_sq_avx_d(i64 noundef, ptr noundef, ptr noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: noreturn nounwind
declare void @abort() local_unnamed_addr #0

declare i32 @vl_cpu_has_sse2() local_unnamed_addr #1

declare i32 @vl_get_simd_enabled() local_unnamed_addr #1

declare i32 @vl_cpu_has_avx() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local double @_vl_distance_mahalanobis_sq_d(i64 noundef, ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local nonnull ptr @vl_get_vector_3_comparison_function_d(i32 noundef %0) local_unnamed_addr #2 {
  %cond = icmp eq i32 %0, 5
  br i1 %cond, label %2, label %4

2:                                                ; preds = %1
  %3 = tail call i32 @vl_cpu_has_sse2() #3
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %7, label %5

4:                                                ; preds = %1
  tail call void @abort() #4
  unreachable

5:                                                ; preds = %2
  %6 = tail call i32 @vl_get_simd_enabled() #3
  %.not6 = icmp eq i32 %6, 0
  %spec.select = select i1 %.not6, ptr @_vl_distance_mahalanobis_sq_d, ptr @_vl_distance_mahalanobis_sq_sse2_d
  br label %7

7:                                                ; preds = %5, %2
  %.0 = phi ptr [ @_vl_distance_mahalanobis_sq_d, %2 ], [ %spec.select, %5 ]
  %8 = tail call i32 @vl_cpu_has_avx() #3
  %.not7 = icmp eq i32 %8, 0
  br i1 %.not7, label %11, label %9

9:                                                ; preds = %7
  %10 = tail call i32 @vl_get_simd_enabled() #3
  %.not8 = icmp eq i32 %10, 0
  %spec.select9 = select i1 %.not8, ptr %.0, ptr @_vl_distance_mahalanobis_sq_avx_d
  br label %11

11:                                               ; preds = %9, %7
  %.1 = phi ptr [ %.0, %7 ], [ %spec.select9, %9 ]
  ret ptr %.1
}

declare double @_vl_distance_mahalanobis_sq_sse2_d(i64 noundef, ptr noundef, ptr noundef, ptr noundef) #1

declare double @_vl_distance_mahalanobis_sq_avx_d(i64 noundef, ptr noundef, ptr noundef, ptr noundef) #1

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass