; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/FIRMWARE/COREMARK (core_main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.RESULTS_S = type { i16, i16, i16, [4 x ptr], i32, i32, i32, ptr, %struct.MAT_PARAMS_S, i16, i16, i16, i16, i16, %struct.CORE_PORTABLE_S }
%struct.MAT_PARAMS_S = type { i32, ptr, ptr, ptr }
%struct.CORE_PORTABLE_S = type { i8 }

; Function Attrs: nounwind uwtable
define dso_local ptr @iterate(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i16, align 2
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %7, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.RESULTS_S, ptr %8, i32 0, i32 5
  %10 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %10, ptr %6, align 4, !tbaa !15
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.RESULTS_S, ptr %11, i32 0, i32 9
  store i16 0, ptr %12, align 8, !tbaa !16
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.RESULTS_S, ptr %13, i32 0, i32 10
  store i16 0, ptr %14, align 2, !tbaa !17
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.RESULTS_S, ptr %15, i32 0, i32 11
  store i16 0, ptr %16, align 4, !tbaa !18
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.RESULTS_S, ptr %17, i32 0, i32 12
  store i16 0, ptr %18, align 2, !tbaa !19
  store i32 0, ptr %3, align 4, !tbaa !15
  br label %19

19:                                               ; preds = %51, %1
  %20 = load i32, ptr %3, align 4, !tbaa !15
  %21 = load i32, ptr %6, align 4, !tbaa !15
  %22 = icmp ult i32 %20, %21
  br i1 %22, label %23, label %54

23:                                               ; preds = %19
  %24 = load ptr, ptr %5, align 8, !tbaa !5
  %25 = call zeroext i16 @core_bench_list(ptr noundef %24, i16 noundef signext 1)
  store i16 %25, ptr %4, align 2, !tbaa !20
  %26 = load i16, ptr %4, align 2, !tbaa !20
  %27 = load ptr, ptr %5, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.RESULTS_S, ptr %27, i32 0, i32 9
  %29 = load i16, ptr %28, align 8, !tbaa !16
  %30 = call zeroext i16 @crcu16(i16 noundef zeroext %26, i16 noundef zeroext %29)
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.RESULTS_S, ptr %31, i32 0, i32 9
  store i16 %30, ptr %32, align 8, !tbaa !16
  %33 = load ptr, ptr %5, align 8, !tbaa !5
  %34 = call zeroext i16 @core_bench_list(ptr noundef %33, i16 noundef signext -1)
  store i16 %34, ptr %4, align 2, !tbaa !20
  %35 = load i16, ptr %4, align 2, !tbaa !20
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.RESULTS_S, ptr %36, i32 0, i32 9
  %38 = load i16, ptr %37, align 8, !tbaa !16
  %39 = call zeroext i16 @crcu16(i16 noundef zeroext %35, i16 noundef zeroext %38)
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.RESULTS_S, ptr %40, i32 0, i32 9
  store i16 %39, ptr %41, align 8, !tbaa !16
  %42 = load i32, ptr %3, align 4, !tbaa !15
  %43 = icmp eq i32 %42, 0
  br i1 %43, label %44, label %50

44:                                               ; preds = %23
  %45 = load ptr, ptr %5, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.RESULTS_S, ptr %45, i32 0, i32 9
  %47 = load i16, ptr %46, align 8, !tbaa !16
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.RESULTS_S, ptr %48, i32 0, i32 10
  store i16 %47, ptr %49, align 2, !tbaa !17
  br label %50

50:                                               ; preds = %44, %23
  br label %51

51:                                               ; preds = %50
  %52 = load i32, ptr %3, align 4, !tbaa !15
  %53 = add i32 %52, 1
  store i32 %53, ptr %3, align 4, !tbaa !15
  br label %19, !llvm.loop !21

54:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret ptr null
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare zeroext i16 @core_bench_list(ptr noundef, i16 noundef signext) #2

declare zeroext i16 @crcu16(i16 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 44}
!10 = !{!"RESULTS_S", !11, i64 0, !11, i64 2, !11, i64 4, !7, i64 8, !12, i64 40, !12, i64 44, !12, i64 48, !6, i64 56, !13, i64 64, !11, i64 96, !11, i64 98, !11, i64 100, !11, i64 102, !11, i64 104, !14, i64 106}
!11 = !{!"short", !7, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!"MAT_PARAMS_S", !12, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!14 = !{!"CORE_PORTABLE_S", !7, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!10, !11, i64 96}
!17 = !{!10, !11, i64 98}
!18 = !{!10, !11, i64 100}
!19 = !{!10, !11, i64 102}
!20 = !{!11, !11, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noalias noundef ptr @iterate(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 44
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 96
  %.not = icmp eq i32 %3, 0
  store i64 0, ptr %4, align 8
  br i1 %.not, label %._crit_edge, label %5

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 98
  %7 = tail call zeroext i16 @core_bench_list(ptr noundef nonnull %0, i16 noundef signext 1) #2
  %8 = load i16, ptr %4, align 8, !tbaa !14
  %9 = tail call zeroext i16 @crcu16(i16 noundef zeroext %7, i16 noundef zeroext %8) #2
  store i16 %9, ptr %4, align 8, !tbaa !14
  %10 = tail call zeroext i16 @core_bench_list(ptr noundef nonnull %0, i16 noundef signext -1) #2
  %11 = load i16, ptr %4, align 8, !tbaa !14
  %12 = tail call zeroext i16 @crcu16(i16 noundef zeroext %10, i16 noundef zeroext %11) #2
  store i16 %12, ptr %4, align 8, !tbaa !14
  store i16 %12, ptr %6, align 2, !tbaa !15
  %exitcond.peel.not = icmp eq i32 %3, 1
  br i1 %exitcond.peel.not, label %._crit_edge, label %.lr.ph.peel.next

.lr.ph.peel.next:                                 ; preds = %5, %.lr.ph.peel.next
  %.019 = phi i32 [ %19, %.lr.ph.peel.next ], [ 1, %5 ]
  %13 = tail call zeroext i16 @core_bench_list(ptr noundef nonnull %0, i16 noundef signext 1) #2
  %14 = load i16, ptr %4, align 8, !tbaa !14
  %15 = tail call zeroext i16 @crcu16(i16 noundef zeroext %13, i16 noundef zeroext %14) #2
  store i16 %15, ptr %4, align 8, !tbaa !14
  %16 = tail call zeroext i16 @core_bench_list(ptr noundef nonnull %0, i16 noundef signext -1) #2
  %17 = load i16, ptr %4, align 8, !tbaa !14
  %18 = tail call zeroext i16 @crcu16(i16 noundef zeroext %16, i16 noundef zeroext %17) #2
  store i16 %18, ptr %4, align 8, !tbaa !14
  %19 = add nuw i32 %.019, 1
  %exitcond.not = icmp eq i32 %19, %3
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.peel.next, !llvm.loop !16

._crit_edge:                                      ; preds = %.lr.ph.peel.next, %5, %1
  ret ptr null
}

declare zeroext i16 @core_bench_list(ptr noundef, i16 noundef signext) local_unnamed_addr #1

declare zeroext i16 @crcu16(i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 44}
!6 = !{!"RESULTS_S", !7, i64 0, !7, i64 2, !7, i64 4, !8, i64 8, !10, i64 40, !10, i64 44, !10, i64 48, !11, i64 56, !12, i64 64, !7, i64 96, !7, i64 98, !7, i64 100, !7, i64 102, !7, i64 104, !13, i64 106}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"MAT_PARAMS_S", !10, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!13 = !{!"CORE_PORTABLE_S", !8, i64 0}
!14 = !{!6, !7, i64 96}
!15 = !{!6, !7, i64 98}
!16 = distinct !{!16, !17, !18}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MemCpyOptPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass