; LLVM IR from fast-pack/simdcomp :: src (simdcomputil)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @bits(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_loadu_si128(ptr noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_or_si128(<2 x i64> noundef, <2 x i64> noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind willreturn memory(read) uwtable
define dso_local i32 @maxbits_length(ptr noundef %0, i32 noundef %1) #3 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca <2 x i64>, align 16
  %11 = alloca <2 x i64>, align 16
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %12 = load i32, ptr %4, align 4, !tbaa !9
  %13 = udiv i32 %12, 4
  store i32 %13, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %14 = load i32, ptr %6, align 4, !tbaa !9
  %15 = mul i32 %14, 4
  store i32 %15, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !9
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = icmp ugt i32 %16, 0
  br i1 %17, label %18, label %43

18:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %19, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %10) #5
  %20 = load ptr, ptr %9, align 8, !tbaa !5
  %21 = call <2 x i64> @_mm_loadu_si128(ptr noundef %20)
  store <2 x i64> %21, ptr %10, align 16, !tbaa !11
  store i32 1, ptr %5, align 4, !tbaa !9
  br label %22

22:                                               ; preds = %37, %18
  %23 = load i32, ptr %5, align 4, !tbaa !9
  %24 = mul i32 4, %23
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = mul i32 4, %25
  %27 = icmp ult i32 %24, %26
  br i1 %27, label %28, label %40

28:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #5
  %29 = load ptr, ptr %9, align 8, !tbaa !5
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = zext i32 %30 to i64
  %32 = getelementptr inbounds <2 x i64>, ptr %29, i64 %31
  %33 = call <2 x i64> @_mm_loadu_si128(ptr noundef %32)
  store <2 x i64> %33, ptr %11, align 16, !tbaa !11
  %34 = load <2 x i64>, ptr %10, align 16, !tbaa !11
  %35 = load <2 x i64>, ptr %11, align 16, !tbaa !11
  %36 = call <2 x i64> @_mm_or_si128(<2 x i64> noundef %34, <2 x i64> noundef %35)
  store <2 x i64> %36, ptr %10, align 16, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #5
  br label %37

37:                                               ; preds = %28
  %38 = load i32, ptr %5, align 4, !tbaa !9
  %39 = add i32 %38, 1
  store i32 %39, ptr %5, align 4, !tbaa !9
  br label %22, !llvm.loop !12

40:                                               ; preds = %22
  %41 = load <2 x i64>, ptr %10, align 16, !tbaa !11
  %42 = call i32 @orasint(<2 x i64> noundef %41)
  store i32 %42, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 16, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %43

43:                                               ; preds = %40, %2
  %44 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %44, ptr %5, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %57, %43
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = load i32, ptr %4, align 4, !tbaa !9
  %48 = icmp ult i32 %46, %47
  br i1 %48, label %49, label %60

49:                                               ; preds = %45
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = zext i32 %51 to i64
  %53 = getelementptr inbounds i32, ptr %50, i64 %52
  %54 = load i32, ptr %53, align 4, !tbaa !9
  %55 = load i32, ptr %8, align 4, !tbaa !9
  %56 = or i32 %55, %54
  store i32 %56, ptr %8, align 4, !tbaa !9
  br label %57

57:                                               ; preds = %49
  %58 = load i32, ptr %5, align 4, !tbaa !9
  %59 = add i32 %58, 1
  store i32 %59, ptr %5, align 4, !tbaa !9
  br label %45, !llvm.loop !14

60:                                               ; preds = %45
  %61 = load i32, ptr %8, align 4, !tbaa !9
  %62 = call i32 @bits(i32 noundef %61)
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  ret i32 %62
}

; Function Attrs: nounwind uwtable
declare hidden i32 @orasint(<2 x i64> noundef) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind willreturn memory(read) uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @bits(i32 noundef) local_unnamed_addr #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_loadu_si128(ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_or_si128(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(read) uwtable
define dso_local i32 @maxbits_length(ptr noundef %0, i32 noundef %1) local_unnamed_addr #2 {
  %3 = and i32 %1, -4
  %.not = icmp ult i32 %1, 4
  br i1 %.not, label %14, label %4

4:                                                ; preds = %2
  %5 = tail call <2 x i64> @_mm_loadu_si128(ptr noundef %0)
  %6 = icmp ugt i32 %3, 4
  br i1 %6, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %4
  %7 = add i32 %3, -5
  %8 = lshr i32 %7, 2
  %9 = add nuw nsw i32 %8, 2
  %wide.trip.count = zext nneg i32 %9 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.02023 = phi <2 x i64> [ %5, %.lr.ph.preheader ], [ %12, %.lr.ph ]
  %10 = getelementptr inbounds <2 x i64>, ptr %0, i64 %indvars.iv
  %11 = tail call <2 x i64> @_mm_loadu_si128(ptr noundef nonnull %10)
  %12 = tail call <2 x i64> @_mm_or_si128(<2 x i64> noundef %.02023, <2 x i64> noundef %11)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %4
  %.020.lcssa = phi <2 x i64> [ %5, %4 ], [ %12, %.lr.ph ]
  %13 = tail call i32 @orasint(<2 x i64> noundef %.020.lcssa)
  br label %14

14:                                               ; preds = %._crit_edge, %2
  %.021 = phi i32 [ %13, %._crit_edge ], [ 0, %2 ]
  %.not31 = icmp eq i32 %3, %1
  br i1 %.not31, label %._crit_edge29, label %.lr.ph28.preheader

.lr.ph28.preheader:                               ; preds = %14
  %15 = zext i32 %1 to i64
  %16 = and i64 %15, 4294967292
  %17 = or disjoint i64 %16, 1
  %umax = tail call i64 @llvm.umax.i64(i64 %17, i64 %15)
  %18 = sub nsw i64 %umax, %16
  %min.iters.check = icmp ult i64 %18, 8
  br i1 %min.iters.check, label %.lr.ph28.preheader40, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph28.preheader
  %n.vec = and i64 %18, -8
  %ind.end = add nsw i64 %16, %n.vec
  %19 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %.021, i64 0
  %20 = getelementptr i32, ptr %0, i64 %16
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %19, %vector.ph ], [ %23, %vector.body ]
  %vec.phi38 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %24, %vector.body ]
  %21 = getelementptr i32, ptr %20, i64 %index
  %22 = getelementptr inbounds i8, ptr %21, i64 16
  %wide.load = load <4 x i32>, ptr %21, align 4, !tbaa !7
  %wide.load39 = load <4 x i32>, ptr %22, align 4, !tbaa !7
  %23 = or <4 x i32> %wide.load, %vec.phi
  %24 = or <4 x i32> %wide.load39, %vec.phi38
  %index.next = add nuw i64 %index, 8
  %25 = icmp eq i64 %index.next, %n.vec
  br i1 %25, label %middle.block, label %vector.body, !llvm.loop !11

middle.block:                                     ; preds = %vector.body
  %bin.rdx = or <4 x i32> %24, %23
  %26 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i64 %18, %n.vec
  br i1 %cmp.n, label %._crit_edge29, label %.lr.ph28.preheader40

.lr.ph28.preheader40:                             ; preds = %middle.block, %.lr.ph28.preheader
  %indvars.iv34.ph = phi i64 [ %16, %.lr.ph28.preheader ], [ %ind.end, %middle.block ]
  %.12225.ph = phi i32 [ %.021, %.lr.ph28.preheader ], [ %26, %middle.block ]
  br label %.lr.ph28

.lr.ph28:                                         ; preds = %.lr.ph28.preheader40, %.lr.ph28
  %indvars.iv34 = phi i64 [ %indvars.iv.next35, %.lr.ph28 ], [ %indvars.iv34.ph, %.lr.ph28.preheader40 ]
  %.12225 = phi i32 [ %29, %.lr.ph28 ], [ %.12225.ph, %.lr.ph28.preheader40 ]
  %27 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv34
  %28 = load i32, ptr %27, align 4, !tbaa !7
  %29 = or i32 %28, %.12225
  %indvars.iv.next35 = add nuw nsw i64 %indvars.iv34, 1
  %30 = icmp ult i64 %indvars.iv.next35, %15
  br i1 %30, label %.lr.ph28, label %._crit_edge29, !llvm.loop !14

._crit_edge29:                                    ; preds = %.lr.ph28, %middle.block, %14
  %.122.lcssa = phi i32 [ %.021, %14 ], [ %26, %middle.block ], [ %29, %.lr.ph28 ]
  %31 = tail call i32 @bits(i32 noundef %.122.lcssa)
  ret i32 %31
}

; Function Attrs: nounwind uwtable
declare hidden i32 @orasint(<2 x i64> noundef) local_unnamed_addr #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(read) uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !6, !12, !13}
!12 = !{!"llvm.loop.isvectorized", i32 1}
!13 = !{!"llvm.loop.unroll.runtime.disable"}
!14 = distinct !{!14, !6, !13, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass