; LLVM IR from embeddednirvana/A-Rudimentary-RTOS-for-Satellite-Control :: device (sd)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._AT91S_PIO = type { i32, i32, i32, [1 x i32], i32, i32, i32, [1 x i32], i32, i32, i32, [1 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [1 x i32], i32, i32, i32, [1 x i32], i32, i32, i32, [9 x i32], i32, i32, i32 }

@error = external dso_local global i8, align 1
@asert = external dso_local global i8, align 1

; Function Attrs: nounwind uwtable
define dso_local void @spi_initialize() #0 {
  store volatile i32 8192, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 4), align 4, !tbaa !5
  store volatile i32 8192, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 32), align 4, !tbaa !10
  %1 = load volatile i32, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !11
  %2 = or i32 %1, 8192
  store volatile i32 %2, ptr getelementptr inbounds (%struct._AT91S_PIO, ptr inttoptr (i64 4294964224 to ptr), i32 0, i32 14), align 4, !tbaa !11
  call void @SPI_Configure(ptr noundef inttoptr (i64 4294836224 to ptr), i32 noundef 4, i32 noundef 851969)
  call void @SPI_ConfigureNPCS(ptr noundef inttoptr (i64 4294836224 to ptr), i32 noundef 1, i32 noundef 65289)
  call void @SPI_Enable(ptr noundef inttoptr (i64 4294836224 to ptr))
  store i8 0, ptr @error, align 1, !tbaa !12
  store i8 0, ptr @asert, align 1, !tbaa !12
  ret void
}

declare void @SPI_Configure(ptr noundef, i32 noundef, i32 noundef) #1

declare void @SPI_ConfigureNPCS(ptr noundef, i32 noundef, i32 noundef) #1

declare void @SPI_Enable(ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"_AT91S_PIO", !7, i64 0, !7, i64 4, !7, i64 8, !8, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !8, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !8, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !8, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !8, i64 124, !7, i64 160, !7, i64 164, !7, i64 168}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 160}
!11 = !{!6, !7, i64 56}
!12 = !{!8, !8, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@error = external dso_local local_unnamed_addr global i8, align 1
@asert = external dso_local local_unnamed_addr global i8, align 1

; Function Attrs: nounwind uwtable
define dso_local void @spi_initialize() local_unnamed_addr #0 {
  store volatile i32 8192, ptr inttoptr (i64 4294964240 to ptr), align 16, !tbaa !5
  store volatile i32 8192, ptr inttoptr (i64 4294964384 to ptr), align 32, !tbaa !10
  %1 = load volatile i32, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  %2 = or i32 %1, 8192
  store volatile i32 %2, ptr inttoptr (i64 4294964280 to ptr), align 8, !tbaa !11
  tail call void @SPI_Configure(ptr noundef nonnull inttoptr (i64 4294836224 to ptr), i32 noundef 4, i32 noundef 851969) #2
  tail call void @SPI_ConfigureNPCS(ptr noundef nonnull inttoptr (i64 4294836224 to ptr), i32 noundef 1, i32 noundef 65289) #2
  tail call void @SPI_Enable(ptr noundef nonnull inttoptr (i64 4294836224 to ptr)) #2
  store i8 0, ptr @error, align 1, !tbaa !12
  store i8 0, ptr @asert, align 1, !tbaa !12
  ret void
}

declare void @SPI_Configure(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @SPI_ConfigureNPCS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

declare void @SPI_Enable(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"_AT91S_PIO", !7, i64 0, !7, i64 4, !7, i64 8, !8, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !8, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !8, i64 44, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !8, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !8, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !8, i64 124, !7, i64 160, !7, i64 164, !7, i64 168}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 160}
!11 = !{!6, !7, i64 56}
!12 = !{!8, !8, i64 0}


; Effective O3 passes: GlobalOptPass,InferAlignmentPass,InstCombinePass,TailCallElimPass