; LLVM IR from aap/librw :: src/ps2/ps2raster.ll (ZN2rw3ps28calcTEX1EPNS_6RasterEPmi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.rw::ps2::Ps2Raster" = type { i64, i32, i16, i8, i8, i64, i64, i32, i32, i32, i8, ptr, i32 }

@_ZN2rw3ps218nativeRasterOffsetE = external dso_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN2rw3ps28calcTEX1EPNS_6RasterEPmi(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %11 = load ptr, ptr %4, align 8, !tbaa !5
  %12 = load i32, ptr @_ZN2rw3ps218nativeRasterOffsetE, align 4, !tbaa !9
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds i8, ptr %11, i64 %13
  store ptr %14, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  %16 = getelementptr inbounds %"struct.rw::ps2::Ps2Raster", ptr %15, i32 0, i32 3
  %17 = load i8, ptr %16, align 2, !tbaa !11
  %18 = zext i8 %17 to i64
  store i64 %18, ptr %8, align 8, !tbaa !15
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %19 = load ptr, ptr %7, align 8, !tbaa !5
  %20 = getelementptr inbounds %"struct.rw::ps2::Ps2Raster", ptr %19, i32 0, i32 2
  %21 = load i16, ptr %20, align 4, !tbaa !16
  %22 = zext i16 %21 to i32
  %23 = and i32 %22, 4095
  %24 = sext i32 %23 to i64
  store i64 %24, ptr %9, align 8, !tbaa !15
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  %25 = load ptr, ptr %7, align 8, !tbaa !5
  %26 = getelementptr inbounds %"struct.rw::ps2::Ps2Raster", ptr %25, i32 0, i32 2
  %27 = load i16, ptr %26, align 4, !tbaa !16
  %28 = zext i16 %27 to i32
  %29 = ashr i32 %28, 12
  %30 = and i32 %29, 3
  %31 = sext i32 %30 to i64
  store i64 %31, ptr %10, align 8, !tbaa !15
  %32 = load i64, ptr %9, align 8, !tbaa !15
  %33 = shl i64 %32, 32
  %34 = load i64, ptr %8, align 8, !tbaa !15
  %35 = or i64 %34, %33
  store i64 %35, ptr %8, align 8, !tbaa !15
  %36 = load i64, ptr %10, align 8, !tbaa !15
  %37 = shl i64 %36, 19
  %38 = load i64, ptr %8, align 8, !tbaa !15
  %39 = or i64 %38, %37
  store i64 %39, ptr %8, align 8, !tbaa !15
  %40 = load i32, ptr %6, align 4, !tbaa !9
  switch i32 %40, label %59 [
    i32 1, label %41
    i32 2, label %44
    i32 3, label %47
    i32 4, label %50
    i32 5, label %53
    i32 6, label %56
  ]

41:                                               ; preds = %3
  %42 = load i64, ptr %8, align 8, !tbaa !15
  %43 = or i64 %42, 0
  store i64 %43, ptr %8, align 8, !tbaa !15
  br label %59

44:                                               ; preds = %3
  %45 = load i64, ptr %8, align 8, !tbaa !15
  %46 = or i64 %45, 96
  store i64 %46, ptr %8, align 8, !tbaa !15
  br label %59

47:                                               ; preds = %3
  %48 = load i64, ptr %8, align 8, !tbaa !15
  %49 = or i64 %48, 128
  store i64 %49, ptr %8, align 8, !tbaa !15
  br label %59

50:                                               ; preds = %3
  %51 = load i64, ptr %8, align 8, !tbaa !15
  %52 = or i64 %51, 288
  store i64 %52, ptr %8, align 8, !tbaa !15
  br label %59

53:                                               ; preds = %3
  %54 = load i64, ptr %8, align 8, !tbaa !15
  %55 = or i64 %54, 192
  store i64 %55, ptr %8, align 8, !tbaa !15
  br label %59

56:                                               ; preds = %3
  %57 = load i64, ptr %8, align 8, !tbaa !15
  %58 = or i64 %57, 352
  store i64 %58, ptr %8, align 8, !tbaa !15
  br label %59

59:                                               ; preds = %56, %53, %50, %47, %44, %41, %3
  %60 = load i64, ptr %8, align 8, !tbaa !15
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  store i64 %60, ptr %61, align 8, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 14}
!12 = !{!"_ZTSN2rw3ps29Ps2RasterE", !13, i64 0, !10, i64 8, !14, i64 12, !7, i64 14, !7, i64 15, !13, i64 16, !13, i64 24, !10, i64 32, !10, i64 36, !10, i64 40, !7, i64 44, !6, i64 48, !10, i64 56}
!13 = !{!"long", !7, i64 0}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !13, i64 0}
!16 = !{!12, !14, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN2rw3ps218nativeRasterOffsetE = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @_ZN2rw3ps28calcTEX1EPNS_6RasterEPmi(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = load i32, ptr @_ZN2rw3ps218nativeRasterOffsetE, align 4, !tbaa !5
  %5 = sext i32 %4 to i64
  %6 = getelementptr inbounds i8, ptr %0, i64 %5
  %7 = getelementptr inbounds i8, ptr %6, i64 14
  %8 = load i8, ptr %7, align 2, !tbaa !9
  %9 = zext i8 %8 to i64
  %10 = getelementptr inbounds i8, ptr %6, i64 12
  %11 = load i16, ptr %10, align 4, !tbaa !14
  %12 = zext i16 %11 to i32
  %13 = and i32 %12, 4095
  %14 = zext nneg i32 %13 to i64
  %15 = shl nuw nsw i64 %14, 32
  %16 = or disjoint i64 %15, %9
  %17 = shl nuw nsw i32 %12, 7
  %18 = and i32 %17, 1572864
  %19 = zext nneg i32 %18 to i64
  %20 = or disjoint i64 %16, %19
  switch i32 %2, label %31 [
    i32 6, label %29
    i32 2, label %21
    i32 3, label %23
    i32 4, label %25
    i32 5, label %27
  ]

21:                                               ; preds = %3
  %22 = or i64 %20, 96
  br label %31

23:                                               ; preds = %3
  %24 = or i64 %20, 128
  br label %31

25:                                               ; preds = %3
  %26 = or i64 %20, 288
  br label %31

27:                                               ; preds = %3
  %28 = or i64 %20, 192
  br label %31

29:                                               ; preds = %3
  %30 = or i64 %20, 352
  br label %31

31:                                               ; preds = %29, %27, %25, %23, %21, %3
  %.0 = phi i64 [ %30, %29 ], [ %28, %27 ], [ %26, %25 ], [ %24, %23 ], [ %22, %21 ], [ %20, %3 ]
  store i64 %.0, ptr %1, align 8, !tbaa !15
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !7, i64 14}
!10 = !{!"_ZTSN2rw3ps29Ps2RasterE", !11, i64 0, !6, i64 8, !12, i64 12, !7, i64 14, !7, i64 15, !11, i64 16, !11, i64 24, !6, i64 32, !6, i64 36, !6, i64 40, !7, i64 44, !13, i64 48, !6, i64 56}
!11 = !{!"long", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!10, !12, i64 12}
!15 = !{!11, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass