; LLVM IR from NVIDIA/TensorRT :: plugin/scatterPlugin (scatterPlugin)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.nvinfer1::Dims64" = type { i32, [8 x i64] }
%"struct.nvinfer1::PluginTensorDesc" = type { %"class.nvinfer1::Dims64", i32, i32, float }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8nvinfer16plugin9ScatterND18calculateNumSlicesENS_6Dims64E(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef byval(%"class.nvinfer1::Dims64") align 8) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_ZNK8nvinfer16plugin9ScatterND16getWorkspaceSizeEPKNS_16PluginTensorDescEiS4_i(ptr noundef nonnull align 8 dereferenceable(40) %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) unnamed_addr #2 align 2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %"class.nvinfer1::Dims64", align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !9
  %13 = load ptr, ptr %6, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = getelementptr inbounds %"struct.nvinfer1::PluginTensorDesc", ptr %14, i64 1
  %16 = getelementptr inbounds %"struct.nvinfer1::PluginTensorDesc", ptr %15, i32 0, i32 0
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %12, ptr align 8 %16, i64 72, i1 false), !tbaa.struct !11
  %17 = call noundef i32 @_ZNK8nvinfer16plugin9ScatterND18calculateNumSlicesENS_6Dims64E(ptr noundef nonnull align 8 dereferenceable(40) %13, ptr noundef byval(%"class.nvinfer1::Dims64") align 8 %12) #3
  store i32 %17, ptr %11, align 4, !tbaa !9
  %18 = load ptr, ptr %9, align 8, !tbaa !5
  %19 = getelementptr inbounds %"struct.nvinfer1::PluginTensorDesc", ptr %18, i64 0
  %20 = getelementptr inbounds %"struct.nvinfer1::PluginTensorDesc", ptr %19, i32 0, i32 0
  %21 = load i32, ptr %11, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = mul i64 %22, 4
  %24 = add i64 32, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  ret i64 %24
}

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{i64 0, i64 4, !9, i64 8, i64 64, !12}
!12 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.nvinfer1::Dims64" = type { i32, [8 x i64] }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK8nvinfer16plugin9ScatterND18calculateNumSlicesENS_6Dims64E(ptr noundef nonnull align 8 dereferenceable(40), ptr noundef byval(%"class.nvinfer1::Dims64") align 8) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef range(i64 -8589934560, 8589934621) i64 @_ZNK8nvinfer16plugin9ScatterND16getWorkspaceSizeEPKNS_16PluginTensorDescEiS4_i(ptr noundef nonnull align 8 dereferenceable(40) %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef readnone %3, i32 noundef %4) unnamed_addr #0 align 2 {
  %6 = getelementptr inbounds i8, ptr %1, i64 88
  %7 = tail call noundef i32 @_ZNK8nvinfer16plugin9ScatterND18calculateNumSlicesENS_6Dims64E(ptr noundef nonnull align 8 dereferenceable(40) %0, ptr noundef nonnull byval(%"class.nvinfer1::Dims64") align 8 %6) #1
  %8 = sext i32 %7 to i64
  %9 = shl nsw i64 %8, 2
  %10 = add nsw i64 %9, 32
  ret i64 %10
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass