; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/SIM/FPU_funcs.ll (Z6expandjRmRiS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.IEEE754 = type { %union.anon }
%union.anon = type { i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6expandjRmRiS0_(i32 noundef %0, ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 4 dereferenceable(4) %2, ptr noundef nonnull align 4 dereferenceable(4) %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca %class.IEEE754, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %10 = load i32, ptr %5, align 4, !tbaa !5
  call void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4) %9, i32 noundef %10)
  %11 = getelementptr inbounds %class.IEEE754, ptr %9, i32 0, i32 0
  %12 = load i32, ptr %11, align 4
  %13 = lshr i32 %12, 23
  %14 = and i32 %13, 255
  %15 = load ptr, ptr %7, align 8, !tbaa !9
  store i32 %14, ptr %15, align 4, !tbaa !5
  %16 = getelementptr inbounds %class.IEEE754, ptr %9, i32 0, i32 0
  %17 = load i32, ptr %16, align 4
  %18 = and i32 %17, 8388607
  %19 = zext i32 %18 to i64
  %20 = load ptr, ptr %6, align 8, !tbaa !9
  store i64 %19, ptr %20, align 8, !tbaa !11
  %21 = getelementptr inbounds %class.IEEE754, ptr %9, i32 0, i32 0
  %22 = load i32, ptr %21, align 4
  %23 = lshr i32 %22, 31
  %24 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %23, ptr %24, align 4, !tbaa !5
  %25 = load ptr, ptr %7, align 8, !tbaa !9
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %32

28:                                               ; preds = %4
  %29 = load ptr, ptr %6, align 8, !tbaa !9
  %30 = load i64, ptr %29, align 8, !tbaa !11
  %31 = or i64 %30, 8388608
  store i64 %31, ptr %29, align 8, !tbaa !11
  br label %32

32:                                               ; preds = %28, %4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.IEEE754 = type { %union.anon }
%union.anon = type { i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6expandjRmRiS0_(i32 noundef %0, ptr nocapture noundef nonnull writeonly align 8 dereferenceable(8) %1, ptr nocapture noundef nonnull align 4 dereferenceable(4) %2, ptr nocapture noundef nonnull writeonly align 4 dereferenceable(4) %3) local_unnamed_addr #1 {
  %5 = alloca %class.IEEE754, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #2
  call void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4) %5, i32 noundef %0)
  %6 = load i32, ptr %5, align 4
  %7 = lshr i32 %6, 23
  %8 = and i32 %7, 255
  store i32 %8, ptr %2, align 4, !tbaa !5
  %9 = and i32 %6, 8388607
  %10 = zext nneg i32 %9 to i64
  store i64 %10, ptr %1, align 8, !tbaa !9
  %11 = lshr i32 %6, 31
  store i32 %11, ptr %3, align 4, !tbaa !5
  %12 = load i32, ptr %2, align 4, !tbaa !5
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %15, label %13

13:                                               ; preds = %4
  %14 = or disjoint i64 %10, 8388608
  store i64 %14, ptr %1, align 8, !tbaa !9
  br label %15

15:                                               ; preds = %13, %4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN7IEEE754C2Ej(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass