; LLVM IR from dmalyuta/FlyARocket_GNC :: imu_funcs (read_IMU_parallel)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.termios = type { i32, i32, i32, i32, i8, [32 x i8], i32, i32 }

@IMU_SYNCHED = external dso_local global i8, align 1
@psi = external dso_local global float, align 4
@theta = external dso_local global float, align 4
@phi = external dso_local global float, align 4
@RAZOR_UART = external dso_local global i32, align 4
@.str.9 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [63 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [77 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [74 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [60 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [59 x i8], align 1
@__const.read_IMU_parallel.SYNCH_TOKEN = external hidden unnamed_addr constant [2 x i8], align 1
@IMU_SYNCH_RECEIVE = external dso_local global [1 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [69 x i8], align 1
@new_razor_uart_options = external dso_local global %struct.termios, align 4
@IMU_RX = external dso_local global [24 x i8], align 16
@.str.20 = external hidden unnamed_addr constant [37 x i8], align 1
@yaw_bytes = external dso_local global [4 x i8], align 1
@pitch_bytes = external dso_local global [4 x i8], align 1
@roll_bytes = external dso_local global [4 x i8], align 1
@accelX_bytes = external dso_local global [4 x i8], align 1
@accelY_bytes = external dso_local global [4 x i8], align 1
@accelZ_bytes = external dso_local global [4 x i8], align 1
@accelX = external dso_local global float, align 4
@accelY = external dso_local global float, align 4
@accelZ = external dso_local global float, align 4
@IMU_quit = external global i8, align 1
@.str.21 = external hidden unnamed_addr constant [31 x i8], align 1

declare void @perror(ptr noundef) #0

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @set_new_attr(i32 noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

declare i32 @printf(ptr noundef, ...) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #4

; Function Attrs: nounwind uwtable
define dso_local ptr @read_IMU_parallel(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca [2 x i8], align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %8 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %9 = call i64 @write(i32 noundef %8, ptr noundef @.str.9, i64 noundef 3)
  %10 = icmp slt i64 %9, 0
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  call void @perror(ptr noundef @.str.10)
  call void @exit(i32 noundef -2) #7
  unreachable

12:                                               ; preds = %1
  %13 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %14 = call i64 @write(i32 noundef %13, ptr noundef @.str.11, i64 noundef 3)
  %15 = icmp slt i64 %14, 0
  br i1 %15, label %16, label %17

16:                                               ; preds = %12
  call void @perror(ptr noundef @.str.12)
  call void @exit(i32 noundef -2) #7
  unreachable

17:                                               ; preds = %12
  %18 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %19 = call i64 @write(i32 noundef %18, ptr noundef @.str.13, i64 noundef 4)
  %20 = icmp slt i64 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %17
  call void @perror(ptr noundef @.str.14)
  call void @exit(i32 noundef -2) #7
  unreachable

22:                                               ; preds = %17
  %23 = call i32 @usleep(i32 noundef 2000000)
  %24 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %25 = call i32 @tcflush(i32 noundef %24, i32 noundef 2) #8
  %26 = icmp eq i32 %25, -1
  br i1 %26, label %27, label %28

27:                                               ; preds = %22
  call void @perror(ptr noundef @.str.15)
  call void @exit(i32 noundef -2) #7
  unreachable

28:                                               ; preds = %22
  %29 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %30 = call i64 @write(i32 noundef %29, ptr noundef @.str.16, i64 noundef 2)
  %31 = icmp slt i64 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %28
  call void @perror(ptr noundef @.str.17)
  call void @exit(i32 noundef -2) #7
  unreachable

33:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #8
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %3, ptr align 1 @__const.read_IMU_parallel.SYNCH_TOKEN, i64 2, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #8
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #8
  store i64 0, ptr %6, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #8
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %34

34:                                               ; preds = %85, %33
  %35 = load i32, ptr %4, align 4, !tbaa !9
  %36 = icmp ne i32 %35, 0
  %37 = xor i1 %36, true
  br i1 %37, label %38, label %86

38:                                               ; preds = %34
  store i32 1, ptr %4, align 4, !tbaa !9
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %58, %38
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = icmp slt i32 %40, 2
  br i1 %41, label %42, label %61

42:                                               ; preds = %39
  %43 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %44 = call i64 @read(i32 noundef %43, ptr noundef @IMU_SYNCH_RECEIVE, i64 noundef 1)
  %45 = icmp slt i64 %44, 0
  br i1 %45, label %46, label %47

46:                                               ; preds = %42
  call void @perror(ptr noundef @.str.18)
  br label %47

47:                                               ; preds = %46, %42
  %48 = load i8, ptr @IMU_SYNCH_RECEIVE, align 1, !tbaa !13
  %49 = sext i8 %48 to i32
  %50 = load i32, ptr %5, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [2 x i8], ptr %3, i64 0, i64 %51
  %53 = load i8, ptr %52, align 1, !tbaa !13
  %54 = sext i8 %53 to i32
  %55 = icmp ne i32 %49, %54
  br i1 %55, label %56, label %57

56:                                               ; preds = %47
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %61

57:                                               ; preds = %47
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %5, align 4, !tbaa !9
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %5, align 4, !tbaa !9
  br label %39, !llvm.loop !14

61:                                               ; preds = %56, %39
  %62 = load i64, ptr %6, align 8, !tbaa !11
  %63 = add i64 %62, 1
  store i64 %63, ptr %6, align 8, !tbaa !11
  %64 = load i64, ptr %6, align 8, !tbaa !11
  %65 = icmp uge i64 %64, 2000
  br i1 %65, label %66, label %79

66:                                               ; preds = %61
  store i64 0, ptr %6, align 8, !tbaa !11
  %67 = load i32, ptr %7, align 4, !tbaa !9
  %68 = add i32 %67, 1
  store i32 %68, ptr %7, align 4, !tbaa !9
  %69 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %70 = call i32 @tcflush(i32 noundef %69, i32 noundef 2) #8
  %71 = icmp eq i32 %70, -1
  br i1 %71, label %72, label %73

72:                                               ; preds = %66
  call void @perror(ptr noundef @.str.15)
  call void @exit(i32 noundef -2) #7
  unreachable

73:                                               ; preds = %66
  %74 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %75 = call i64 @write(i32 noundef %74, ptr noundef @.str.16, i64 noundef 2)
  %76 = icmp slt i64 %75, 0
  br i1 %76, label %77, label %78

77:                                               ; preds = %73
  call void @perror(ptr noundef @.str.17)
  call void @exit(i32 noundef -2) #7
  unreachable

78:                                               ; preds = %73
  br label %79

79:                                               ; preds = %78, %61
  %80 = load i32, ptr %7, align 4, !tbaa !9
  %81 = icmp uge i32 %80, 10
  br i1 %81, label %82, label %85

82:                                               ; preds = %79
  %83 = load i32, ptr %7, align 4, !tbaa !9
  %84 = call i32 (ptr, ...) @printf(ptr noundef @.str.19, i32 noundef %83)
  call void @exit(i32 noundef -2) #7
  unreachable

85:                                               ; preds = %79
  br label %34, !llvm.loop !16

86:                                               ; preds = %34
  store i8 0, ptr getelementptr inbounds ([32 x i8], ptr getelementptr inbounds (%struct.termios, ptr @new_razor_uart_options, i32 0, i32 5), i64 0, i64 5), align 1, !tbaa !13
  store i8 24, ptr getelementptr inbounds ([32 x i8], ptr getelementptr inbounds (%struct.termios, ptr @new_razor_uart_options, i32 0, i32 5), i64 0, i64 6), align 1, !tbaa !13
  %87 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  call void @set_new_attr(i32 noundef %87, ptr noundef null, ptr noundef @new_razor_uart_options)
  store i8 1, ptr @IMU_SYNCHED, align 1, !tbaa !13
  br label %88

88:                                               ; preds = %100, %86
  %89 = load i32, ptr @RAZOR_UART, align 4, !tbaa !9
  %90 = call i64 @read(i32 noundef %89, ptr noundef @IMU_RX, i64 noundef 24)
  %91 = icmp slt i64 %90, 0
  br i1 %91, label %92, label %93

92:                                               ; preds = %88
  call void @perror(ptr noundef @.str.20)
  call void @exit(i32 noundef -2) #7
  unreachable

93:                                               ; preds = %88
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 @yaw_bytes, ptr align 16 @IMU_RX, i64 4, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 @pitch_bytes, ptr align 4 getelementptr inbounds ([24 x i8], ptr @IMU_RX, i64 0, i64 4), i64 4, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 @roll_bytes, ptr align 8 getelementptr inbounds ([24 x i8], ptr @IMU_RX, i64 0, i64 8), i64 4, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 @accelX_bytes, ptr align 4 getelementptr inbounds ([24 x i8], ptr @IMU_RX, i64 0, i64 12), i64 4, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 @accelY_bytes, ptr align 16 getelementptr inbounds ([24 x i8], ptr @IMU_RX, i64 0, i64 16), i64 4, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 1 @accelZ_bytes, ptr align 4 getelementptr inbounds ([24 x i8], ptr @IMU_RX, i64 0, i64 20), i64 4, i1 false)
  %94 = load float, ptr @yaw_bytes, align 1, !tbaa !17
  store float %94, ptr @psi, align 4, !tbaa !17
  %95 = load float, ptr @pitch_bytes, align 1, !tbaa !17
  store float %95, ptr @theta, align 4, !tbaa !17
  %96 = load float, ptr @roll_bytes, align 1, !tbaa !17
  store float %96, ptr @phi, align 4, !tbaa !17
  %97 = load float, ptr @accelX_bytes, align 1, !tbaa !17
  store float %97, ptr @accelX, align 4, !tbaa !17
  %98 = load float, ptr @accelY_bytes, align 1, !tbaa !17
  store float %98, ptr @accelY, align 4, !tbaa !17
  %99 = load float, ptr @accelZ_bytes, align 1, !tbaa !17
  store float %99, ptr @accelZ, align 4, !tbaa !17
  br label %100

100:                                              ; preds = %93
  %101 = load i8, ptr @IMU_quit, align 1, !tbaa !13
  %102 = icmp ne i8 %101, 0
  %103 = xor i1 %102, true
  br i1 %103, label %88, label %104, !llvm.loop !19

104:                                              ; preds = %100
  %105 = call i32 (ptr, ...) @printf(ptr noundef @.str.21)
  call void @pthread_exit(ptr noundef null) #9
  unreachable
}

declare i64 @write(i32 noundef, ptr noundef, i64 noundef) #0

declare i32 @usleep(i32 noundef) #0

; Function Attrs: nounwind
declare i32 @tcflush(i32 noundef, i32 noundef) #5

declare i64 @read(i32 noundef, ptr noundef, i64 noundef) #0

; Function Attrs: noreturn
declare void @pthread_exit(ptr noundef) #6

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn nounwind }
attributes #8 = { nounwind }
attributes #9 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = !{!18, !18, i64 0}
!18 = !{!"float", !7, i64 0}
!19 = distinct !{!19, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.termios = type { i32, i32, i32, i32, i8, [32 x i8], i32, i32 }

@IMU_SYNCHED = external dso_local local_unnamed_addr global i8, align 1
@psi = external dso_local local_unnamed_addr global float, align 4
@theta = external dso_local local_unnamed_addr global float, align 4
@phi = external dso_local local_unnamed_addr global float, align 4
@RAZOR_UART = external dso_local local_unnamed_addr global i32, align 4
@.str.9 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [63 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [77 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [74 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [60 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [59 x i8], align 1
@__const.read_IMU_parallel.SYNCH_TOKEN = external hidden unnamed_addr constant [2 x i8], align 1
@IMU_SYNCH_RECEIVE = external dso_local global [1 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [69 x i8], align 1
@new_razor_uart_options = external dso_local global %struct.termios, align 4
@IMU_RX = external dso_local global [24 x i8], align 16
@.str.20 = external hidden unnamed_addr constant [37 x i8], align 1
@yaw_bytes = external dso_local local_unnamed_addr global [4 x i8], align 1
@pitch_bytes = external dso_local local_unnamed_addr global [4 x i8], align 1
@roll_bytes = external dso_local local_unnamed_addr global [4 x i8], align 1
@accelX_bytes = external dso_local local_unnamed_addr global [4 x i8], align 1
@accelY_bytes = external dso_local local_unnamed_addr global [4 x i8], align 1
@accelZ_bytes = external dso_local local_unnamed_addr global [4 x i8], align 1
@accelX = external dso_local local_unnamed_addr global float, align 4
@accelY = external dso_local local_unnamed_addr global float, align 4
@accelZ = external dso_local local_unnamed_addr global float, align 4
@IMU_quit = external local_unnamed_addr global i8, align 1
@.str.21 = external hidden unnamed_addr constant [31 x i8], align 1

; Function Attrs: nofree nounwind
declare void @perror(ptr nocapture noundef readonly) local_unnamed_addr #0

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @set_new_attr(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: noreturn nounwind uwtable
define dso_local noalias noundef nonnull ptr @read_IMU_parallel(ptr nocapture noundef readnone %0) local_unnamed_addr #3 {
  %2 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %3 = tail call i64 @write(i32 noundef %2, ptr noundef nonnull @.str.9, i64 noundef 3) #8
  %4 = icmp slt i64 %3, 0
  br i1 %4, label %5, label %6

5:                                                ; preds = %1
  tail call void @perror(ptr noundef nonnull @.str.10) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

6:                                                ; preds = %1
  %7 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %8 = tail call i64 @write(i32 noundef %7, ptr noundef nonnull @.str.11, i64 noundef 3) #8
  %9 = icmp slt i64 %8, 0
  br i1 %9, label %10, label %11

10:                                               ; preds = %6
  tail call void @perror(ptr noundef nonnull @.str.12) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

11:                                               ; preds = %6
  %12 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %13 = tail call i64 @write(i32 noundef %12, ptr noundef nonnull @.str.13, i64 noundef 4) #8
  %14 = icmp slt i64 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %11
  tail call void @perror(ptr noundef nonnull @.str.14) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

16:                                               ; preds = %11
  %17 = tail call i32 @usleep(i32 noundef 2000000) #8
  %18 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %19 = tail call i32 @tcflush(i32 noundef %18, i32 noundef 2) #8
  %20 = icmp eq i32 %19, -1
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  tail call void @perror(ptr noundef nonnull @.str.15) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

22:                                               ; preds = %16
  %23 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %24 = tail call i64 @write(i32 noundef %23, ptr noundef nonnull @.str.16, i64 noundef 2) #8
  %25 = icmp slt i64 %24, 0
  br i1 %25, label %28, label %.preheader17.preheader

.preheader17.preheader:                           ; preds = %22
  %26 = load i8, ptr @__const.read_IMU_parallel.SYNCH_TOKEN, align 1
  %27 = load i8, ptr getelementptr inbounds (i8, ptr @__const.read_IMU_parallel.SYNCH_TOKEN, i64 1), align 1
  br label %.preheader17

28:                                               ; preds = %22
  tail call void @perror(ptr noundef nonnull @.str.17) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

.preheader17:                                     ; preds = %.preheader17.preheader, %55
  %.012 = phi i32 [ %.113, %55 ], [ 0, %.preheader17.preheader ]
  %.09 = phi i64 [ %.110, %55 ], [ 0, %.preheader17.preheader ]
  %.0 = phi i32 [ %.1, %55 ], [ 0, %.preheader17.preheader ]
  %.not = icmp eq i32 %.012, 0
  br i1 %.not, label %.preheader.preheader, label %59

.preheader.preheader:                             ; preds = %.preheader17
  %29 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %30 = tail call i64 @read(i32 noundef %29, ptr noundef nonnull @IMU_SYNCH_RECEIVE, i64 noundef 1) #8
  %31 = icmp slt i64 %30, 0
  br i1 %31, label %38, label %39

.preheader.1:                                     ; preds = %39
  %32 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %33 = tail call i64 @read(i32 noundef %32, ptr noundef nonnull @IMU_SYNCH_RECEIVE, i64 noundef 1) #8
  %34 = icmp slt i64 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %.preheader.1
  tail call void @perror(ptr noundef nonnull @.str.18) #9
  br label %36

36:                                               ; preds = %35, %.preheader.1
  %37 = load i8, ptr @IMU_SYNCH_RECEIVE, align 1, !tbaa !9
  %.not16.1 = icmp eq i8 %37, %27
  %spec.select = zext i1 %.not16.1 to i32
  br label %41

38:                                               ; preds = %.preheader.preheader
  tail call void @perror(ptr noundef nonnull @.str.18) #9
  br label %39

39:                                               ; preds = %38, %.preheader.preheader
  %40 = load i8, ptr @IMU_SYNCH_RECEIVE, align 1, !tbaa !9
  %.not16 = icmp eq i8 %40, %26
  br i1 %.not16, label %.preheader.1, label %41

41:                                               ; preds = %36, %39
  %.113 = phi i32 [ 0, %39 ], [ %spec.select, %36 ]
  %42 = add nuw nsw i64 %.09, 1
  %43 = icmp ugt i64 %.09, 1998
  br i1 %43, label %44, label %55

44:                                               ; preds = %41
  %45 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %46 = tail call i32 @tcflush(i32 noundef %45, i32 noundef 2) #8
  %47 = icmp eq i32 %46, -1
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  tail call void @perror(ptr noundef nonnull @.str.15) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

49:                                               ; preds = %44
  %50 = add nuw nsw i32 %.0, 1
  %51 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %52 = tail call i64 @write(i32 noundef %51, ptr noundef nonnull @.str.16, i64 noundef 2) #8
  %53 = icmp slt i64 %52, 0
  br i1 %53, label %54, label %55

54:                                               ; preds = %49
  tail call void @perror(ptr noundef nonnull @.str.17) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

55:                                               ; preds = %49, %41
  %.110 = phi i64 [ 0, %49 ], [ %42, %41 ]
  %.1 = phi i32 [ %50, %49 ], [ %.0, %41 ]
  %56 = icmp ugt i32 %.1, 9
  br i1 %56, label %57, label %.preheader17, !llvm.loop !10

57:                                               ; preds = %55
  %58 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.19, i32 noundef %.1)
  tail call void @exit(i32 noundef -2) #10
  unreachable

59:                                               ; preds = %.preheader17
  store i8 0, ptr getelementptr inbounds (i8, ptr @new_razor_uart_options, i64 22), align 2, !tbaa !9
  store i8 24, ptr getelementptr inbounds (i8, ptr @new_razor_uart_options, i64 23), align 1, !tbaa !9
  %60 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  tail call void @set_new_attr(i32 noundef %60, ptr noundef null, ptr noundef nonnull @new_razor_uart_options)
  store i8 1, ptr @IMU_SYNCHED, align 1, !tbaa !9
  br label %61

61:                                               ; preds = %66, %59
  %62 = load i32, ptr @RAZOR_UART, align 4, !tbaa !5
  %63 = tail call i64 @read(i32 noundef %62, ptr noundef nonnull @IMU_RX, i64 noundef 24) #8
  %64 = icmp slt i64 %63, 0
  br i1 %64, label %65, label %66

65:                                               ; preds = %61
  tail call void @perror(ptr noundef nonnull @.str.20) #9
  tail call void @exit(i32 noundef -2) #10
  unreachable

66:                                               ; preds = %61
  %67 = load i32, ptr @IMU_RX, align 16
  store i32 %67, ptr @yaw_bytes, align 1
  %68 = load i32, ptr getelementptr inbounds (i8, ptr @IMU_RX, i64 4), align 4
  store i32 %68, ptr @pitch_bytes, align 1
  %69 = load i32, ptr getelementptr inbounds (i8, ptr @IMU_RX, i64 8), align 8
  store i32 %69, ptr @roll_bytes, align 1
  %70 = load i32, ptr getelementptr inbounds (i8, ptr @IMU_RX, i64 12), align 4
  store i32 %70, ptr @accelX_bytes, align 1
  %71 = load i32, ptr getelementptr inbounds (i8, ptr @IMU_RX, i64 16), align 16
  store i32 %71, ptr @accelY_bytes, align 1
  %72 = load i32, ptr getelementptr inbounds (i8, ptr @IMU_RX, i64 20), align 4
  store i32 %72, ptr @accelZ_bytes, align 1
  store i32 %67, ptr @psi, align 4, !tbaa !12
  store i32 %68, ptr @theta, align 4, !tbaa !12
  store i32 %69, ptr @phi, align 4, !tbaa !12
  store i32 %70, ptr @accelX, align 4, !tbaa !12
  store i32 %71, ptr @accelY, align 4, !tbaa !12
  store i32 %72, ptr @accelZ, align 4, !tbaa !12
  %73 = load i8, ptr @IMU_quit, align 1, !tbaa !9
  %.not15 = icmp eq i8 %73, 0
  br i1 %.not15, label %61, label %74, !llvm.loop !14

74:                                               ; preds = %66
  %75 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21)
  tail call void @pthread_exit(ptr noundef null) #10
  unreachable
}

; Function Attrs: nofree
declare noundef i64 @write(i32 noundef, ptr nocapture noundef readonly, i64 noundef) local_unnamed_addr #4

declare i32 @usleep(i32 noundef) local_unnamed_addr #5

; Function Attrs: nounwind
declare i32 @tcflush(i32 noundef, i32 noundef) local_unnamed_addr #6

; Function Attrs: nofree
declare noundef i64 @read(i32 noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #4

; Function Attrs: noreturn
declare void @pthread_exit(ptr noundef) local_unnamed_addr #7

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { nounwind }
attributes #9 = { cold }
attributes #10 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"float", !7, i64 0}
!14 = distinct !{!14, !11}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass