; LLVM IR from IlyaGrebnov/libbsc :: libbsc/bwt (bwt)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @bsc_malloc(i64 noundef) #1

declare void @bsc_free(ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z18bsc_bwt_gpu_decodePhiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local i32 @bsc_bwt_decode(ptr noundef %0, i32 noundef %1, i32 noundef %2, i8 noundef zeroext %3, ptr noundef %4, i32 noundef %5) #3 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i8, align 1
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca [256 x i32], align 16
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i32 %1, ptr %9, align 4, !tbaa !9
  store i32 %2, ptr %10, align 4, !tbaa !9
  store i8 %3, ptr %11, align 1, !tbaa !11
  store ptr %4, ptr %12, align 8, !tbaa !5
  store i32 %5, ptr %13, align 4, !tbaa !9
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = icmp eq ptr %19, null
  br i1 %20, label %31, label %21

21:                                               ; preds = %6
  %22 = load i32, ptr %9, align 4, !tbaa !9
  %23 = icmp slt i32 %22, 0
  br i1 %23, label %31, label %24

24:                                               ; preds = %21
  %25 = load i32, ptr %10, align 4, !tbaa !9
  %26 = icmp sle i32 %25, 0
  br i1 %26, label %31, label %27

27:                                               ; preds = %24
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = load i32, ptr %9, align 4, !tbaa !9
  %30 = icmp sgt i32 %28, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %27, %24, %21, %6
  store i32 -1, ptr %7, align 4
  br label %139

32:                                               ; preds = %27
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = icmp sle i32 %33, 1
  br i1 %34, label %42, label %35

35:                                               ; preds = %32
  %36 = load ptr, ptr %8, align 8, !tbaa !5
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = load i32, ptr %10, align 4, !tbaa !9
  %39 = load i32, ptr %13, align 4, !tbaa !9
  %40 = call noundef i32 @_Z18bsc_bwt_gpu_decodePhiii(ptr noundef %36, i32 noundef %37, i32 noundef %38, i32 noundef %39)
  %41 = icmp eq i32 %40, 0
  br i1 %41, label %42, label %43

42:                                               ; preds = %35, %32
  store i32 0, ptr %7, align 4
  br label %139

43:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %44 = load i32, ptr %9, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  %46 = sext i32 %45 to i64
  %47 = mul i64 %46, 4
  %48 = call ptr @bsc_malloc(i64 noundef %47)
  store ptr %48, ptr %14, align 8, !tbaa !5
  %49 = load ptr, ptr %14, align 8, !tbaa !5
  %50 = icmp ne ptr %49, null
  br i1 %50, label %51, label %135

51:                                               ; preds = %43
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %52 = load i32, ptr %9, align 4, !tbaa !9
  %53 = sdiv i32 %52, 8
  store i32 %53, ptr %15, align 4, !tbaa !9
  %54 = load i32, ptr %15, align 4, !tbaa !9
  %55 = ashr i32 %54, 1
  %56 = load i32, ptr %15, align 4, !tbaa !9
  %57 = or i32 %56, %55
  store i32 %57, ptr %15, align 4, !tbaa !9
  %58 = load i32, ptr %15, align 4, !tbaa !9
  %59 = ashr i32 %58, 2
  %60 = load i32, ptr %15, align 4, !tbaa !9
  %61 = or i32 %60, %59
  store i32 %61, ptr %15, align 4, !tbaa !9
  %62 = load i32, ptr %15, align 4, !tbaa !9
  %63 = ashr i32 %62, 4
  %64 = load i32, ptr %15, align 4, !tbaa !9
  %65 = or i32 %64, %63
  store i32 %65, ptr %15, align 4, !tbaa !9
  %66 = load i32, ptr %15, align 4, !tbaa !9
  %67 = ashr i32 %66, 8
  %68 = load i32, ptr %15, align 4, !tbaa !9
  %69 = or i32 %68, %67
  store i32 %69, ptr %15, align 4, !tbaa !9
  %70 = load i32, ptr %15, align 4, !tbaa !9
  %71 = ashr i32 %70, 16
  %72 = load i32, ptr %15, align 4, !tbaa !9
  %73 = or i32 %72, %71
  store i32 %73, ptr %15, align 4, !tbaa !9
  %74 = load i32, ptr %15, align 4, !tbaa !9
  %75 = ashr i32 %74, 1
  store i32 %75, ptr %15, align 4, !tbaa !9
  %76 = load i8, ptr %11, align 1, !tbaa !11
  %77 = zext i8 %76 to i32
  %78 = load i32, ptr %9, align 4, !tbaa !9
  %79 = sub nsw i32 %78, 1
  %80 = load i32, ptr %15, align 4, !tbaa !9
  %81 = add nsw i32 %80, 1
  %82 = sdiv i32 %79, %81
  %83 = trunc i32 %82 to i8
  %84 = zext i8 %83 to i32
  %85 = icmp eq i32 %77, %84
  br i1 %85, label %86, label %121

86:                                               ; preds = %51
  %87 = load ptr, ptr %12, align 8, !tbaa !5
  %88 = icmp ne ptr %87, null
  br i1 %88, label %89, label %121

89:                                               ; preds = %86
  call void @llvm.lifetime.start.p0(i64 1024, ptr %16) #4
  %90 = load i32, ptr %10, align 4, !tbaa !9
  %91 = getelementptr inbounds [256 x i32], ptr %16, i64 0, i64 0
  store i32 %90, ptr %91, align 16, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %92

92:                                               ; preds = %109, %89
  %93 = load i32, ptr %17, align 4, !tbaa !9
  %94 = load i8, ptr %11, align 1, !tbaa !11
  %95 = zext i8 %94 to i32
  %96 = icmp slt i32 %93, %95
  br i1 %96, label %98, label %97

97:                                               ; preds = %92
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %112

98:                                               ; preds = %92
  %99 = load ptr, ptr %12, align 8, !tbaa !5
  %100 = load i32, ptr %17, align 4, !tbaa !9
  %101 = sext i32 %100 to i64
  %102 = getelementptr inbounds i32, ptr %99, i64 %101
  %103 = load i32, ptr %102, align 4, !tbaa !9
  %104 = add nsw i32 %103, 1
  %105 = load i32, ptr %17, align 4, !tbaa !9
  %106 = add nsw i32 %105, 1
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds [256 x i32], ptr %16, i64 0, i64 %107
  store i32 %104, ptr %108, align 4, !tbaa !9
  br label %109

109:                                              ; preds = %98
  %110 = load i32, ptr %17, align 4, !tbaa !9
  %111 = add nsw i32 %110, 1
  store i32 %111, ptr %17, align 4, !tbaa !9
  br label %92, !llvm.loop !12

112:                                              ; preds = %97
  %113 = load ptr, ptr %8, align 8, !tbaa !5
  %114 = load ptr, ptr %8, align 8, !tbaa !5
  %115 = load ptr, ptr %14, align 8, !tbaa !5
  %116 = load i32, ptr %9, align 4, !tbaa !9
  %117 = load i32, ptr %15, align 4, !tbaa !9
  %118 = add nsw i32 %117, 1
  %119 = getelementptr inbounds [256 x i32], ptr %16, i64 0, i64 0
  %120 = call i32 @libsais_unbwt_aux(ptr noundef %113, ptr noundef %114, ptr noundef %115, i32 noundef %116, ptr noundef null, i32 noundef %118, ptr noundef %119)
  store i32 %120, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1024, ptr %16) #4
  br label %128

121:                                              ; preds = %86, %51
  %122 = load ptr, ptr %8, align 8, !tbaa !5
  %123 = load ptr, ptr %8, align 8, !tbaa !5
  %124 = load ptr, ptr %14, align 8, !tbaa !5
  %125 = load i32, ptr %9, align 4, !tbaa !9
  %126 = load i32, ptr %10, align 4, !tbaa !9
  %127 = call i32 @libsais_unbwt(ptr noundef %122, ptr noundef %123, ptr noundef %124, i32 noundef %125, ptr noundef null, i32 noundef %126)
  store i32 %127, ptr %10, align 4, !tbaa !9
  br label %128

128:                                              ; preds = %121, %112
  %129 = load ptr, ptr %14, align 8, !tbaa !5
  call void @bsc_free(ptr noundef %129)
  %130 = load i32, ptr %10, align 4, !tbaa !9
  switch i32 %130, label %133 [
    i32 -1, label %131
    i32 -2, label %132
  ]

131:                                              ; preds = %128
  store i32 -1, ptr %7, align 4
  store i32 1, ptr %18, align 4
  br label %134

132:                                              ; preds = %128
  store i32 -2, ptr %7, align 4
  store i32 1, ptr %18, align 4
  br label %134

133:                                              ; preds = %128
  store i32 0, ptr %7, align 4
  store i32 1, ptr %18, align 4
  br label %134

134:                                              ; preds = %133, %132, %131
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  br label %136

135:                                              ; preds = %43
  store i32 0, ptr %18, align 4
  br label %136

136:                                              ; preds = %135, %134
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  %137 = load i32, ptr %18, align 4
  switch i32 %137, label %141 [
    i32 0, label %138
    i32 1, label %139
  ]

138:                                              ; preds = %136
  store i32 -2, ptr %7, align 4
  br label %139

139:                                              ; preds = %138, %136, %42, %31
  %140 = load i32, ptr %7, align 4
  ret i32 %140

141:                                              ; preds = %136
  unreachable
}

declare i32 @libsais_unbwt_aux(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) #1

declare i32 @libsais_unbwt(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @bsc_malloc(i64 noundef) local_unnamed_addr #1

declare void @bsc_free(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z18bsc_bwt_gpu_decodePhiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local i32 @bsc_bwt_decode(ptr noundef %0, i32 noundef %1, i32 noundef %2, i8 noundef zeroext %3, ptr noundef readonly %4, i32 noundef %5) local_unnamed_addr #3 {
  %7 = alloca [256 x i32], align 16
  %8 = icmp eq ptr %0, null
  %9 = icmp slt i32 %1, 0
  %or.cond = or i1 %8, %9
  %10 = icmp slt i32 %2, 1
  %or.cond3 = or i1 %or.cond, %10
  %11 = icmp sgt i32 %2, %1
  %or.cond62 = or i1 %11, %or.cond3
  br i1 %or.cond62, label %58, label %12

12:                                               ; preds = %6
  %13 = icmp ult i32 %1, 2
  br i1 %13, label %58, label %14

14:                                               ; preds = %12
  %15 = tail call noundef i32 @_Z18bsc_bwt_gpu_decodePhiii(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2, i32 noundef %5)
  %16 = icmp eq i32 %15, 0
  br i1 %16, label %58, label %17

17:                                               ; preds = %14
  %18 = add nuw nsw i32 %1, 1
  %19 = zext nneg i32 %18 to i64
  %20 = shl nuw nsw i64 %19, 2
  %21 = tail call ptr @bsc_malloc(i64 noundef %20)
  %.not.not = icmp eq ptr %21, null
  br i1 %.not.not, label %58, label %22

22:                                               ; preds = %17
  %23 = lshr i32 %1, 3
  %24 = lshr i32 %1, 4
  %25 = or i32 %23, %24
  %26 = lshr i32 %25, 2
  %27 = or i32 %26, %25
  %28 = lshr i32 %27, 4
  %29 = or i32 %28, %27
  %30 = lshr i32 %29, 8
  %31 = or i32 %30, %29
  %32 = lshr i32 %31, 17
  %33 = lshr i32 %31, 1
  %34 = or i32 %32, %33
  %35 = add nsw i32 %1, -1
  %36 = add nuw nsw i32 %34, 1
  %37 = udiv i32 %35, %36
  %38 = trunc i32 %37 to i8
  %39 = icmp eq i8 %38, %3
  %40 = icmp ne ptr %4, null
  %or.cond5 = and i1 %40, %39
  br i1 %or.cond5, label %41, label %55

41:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 1024, ptr nonnull %7) #4
  store i32 %2, ptr %7, align 16, !tbaa !5
  %.not = icmp eq i8 %3, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %41
  %wide.trip.count = zext i8 %3 to i64
  %min.iters.check = icmp ult i8 %3, 8
  br i1 %min.iters.check, label %.lr.ph.preheader68, label %vector.ph

.lr.ph.preheader68:                               ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %wide.trip.count, 248
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %42 = getelementptr inbounds i32, ptr %4, i64 %index
  %43 = getelementptr inbounds i8, ptr %42, i64 16
  %wide.load = load <4 x i32>, ptr %42, align 4, !tbaa !5
  %wide.load67 = load <4 x i32>, ptr %43, align 4, !tbaa !5
  %44 = add nsw <4 x i32> %wide.load, <i32 1, i32 1, i32 1, i32 1>
  %45 = add nsw <4 x i32> %wide.load67, <i32 1, i32 1, i32 1, i32 1>
  %46 = or disjoint i64 %index, 1
  %47 = getelementptr inbounds [256 x i32], ptr %7, i64 0, i64 %46
  %48 = getelementptr inbounds i8, ptr %47, i64 16
  store <4 x i32> %44, ptr %47, align 4, !tbaa !5
  store <4 x i32> %45, ptr %48, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %49 = icmp eq i64 %index.next, %n.vec
  br i1 %49, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader68

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %41
  %50 = call i32 @libsais_unbwt_aux(ptr noundef %0, ptr noundef %0, ptr noundef nonnull %21, i32 noundef %1, ptr noundef null, i32 noundef %36, ptr noundef nonnull %7)
  call void @llvm.lifetime.end.p0(i64 1024, ptr nonnull %7) #4
  br label %57

.lr.ph:                                           ; preds = %.lr.ph.preheader68, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader68 ]
  %51 = getelementptr inbounds i32, ptr %4, i64 %indvars.iv
  %52 = load i32, ptr %51, align 4, !tbaa !5
  %53 = add nsw i32 %52, 1
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %54 = getelementptr inbounds [256 x i32], ptr %7, i64 0, i64 %indvars.iv.next
  store i32 %53, ptr %54, align 4, !tbaa !5
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

55:                                               ; preds = %22
  %56 = tail call i32 @libsais_unbwt(ptr noundef nonnull %0, ptr noundef nonnull %0, ptr noundef nonnull %21, i32 noundef %1, ptr noundef null, i32 noundef %2)
  br label %57

57:                                               ; preds = %55, %._crit_edge
  %.056 = phi i32 [ %50, %._crit_edge ], [ %56, %55 ]
  call void @bsc_free(ptr noundef nonnull %21)
  %switch.selectcmp = icmp eq i32 %.056, -2
  %switch.select = select i1 %switch.selectcmp, i32 -2, i32 0
  %switch.selectcmp63 = icmp eq i32 %.056, -1
  %switch.select64 = select i1 %switch.selectcmp63, i32 -1, i32 %switch.select
  br label %58

58:                                               ; preds = %57, %17, %12, %14, %6
  %.2 = phi i32 [ -1, %6 ], [ 0, %14 ], [ 0, %12 ], [ %switch.select64, %57 ], [ -2, %17 ]
  ret i32 %.2
}

declare i32 @libsais_unbwt_aux(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @libsais_unbwt(ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass