; LLVM IR from BrunoLevy/learn-fpga :: LiteX/software/Doom/mc1-doom/src (wi_stuff)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.patch_t = type { i16, i16, i16, i16, [8 x i32] }

@num = external hidden global [10 x ptr], align 16
@wiminus = external hidden global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @V_DrawPatch(i32 noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @WI_drawNum(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %14 = load ptr, ptr @num, align 16, !tbaa !9
  %15 = getelementptr inbounds %struct.patch_t, ptr %14, i32 0, i32 0
  %16 = load i16, ptr %15, align 4, !tbaa !11
  %17 = sext i16 %16 to i32
  store i32 %17, ptr %10, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %18 = load i32, ptr %9, align 4, !tbaa !5
  %19 = icmp slt i32 %18, 0
  br i1 %19, label %20, label %36

20:                                               ; preds = %4
  %21 = load i32, ptr %8, align 4, !tbaa !5
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %24, label %23

23:                                               ; preds = %20
  store i32 1, ptr %9, align 4, !tbaa !5
  br label %35

24:                                               ; preds = %20
  store i32 0, ptr %9, align 4, !tbaa !5
  %25 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %25, ptr %12, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %29, %24
  %27 = load i32, ptr %12, align 4, !tbaa !5
  %28 = icmp ne i32 %27, 0
  br i1 %28, label %29, label %34

29:                                               ; preds = %26
  %30 = load i32, ptr %12, align 4, !tbaa !5
  %31 = sdiv i32 %30, 10
  store i32 %31, ptr %12, align 4, !tbaa !5
  %32 = load i32, ptr %9, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %9, align 4, !tbaa !5
  br label %26, !llvm.loop !14

34:                                               ; preds = %26
  br label %35

35:                                               ; preds = %34, %23
  br label %36

36:                                               ; preds = %35, %4
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = icmp slt i32 %37, 0
  %39 = zext i1 %38 to i32
  store i32 %39, ptr %11, align 4, !tbaa !5
  %40 = load i32, ptr %11, align 4, !tbaa !5
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %45

42:                                               ; preds = %36
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = sub nsw i32 0, %43
  store i32 %44, ptr %8, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %42, %36
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = icmp eq i32 %46, 1994
  br i1 %47, label %48, label %49

48:                                               ; preds = %45
  store i32 0, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %77

49:                                               ; preds = %45
  br label %50

50:                                               ; preds = %54, %49
  %51 = load i32, ptr %9, align 4, !tbaa !5
  %52 = add nsw i32 %51, -1
  store i32 %52, ptr %9, align 4, !tbaa !5
  %53 = icmp ne i32 %51, 0
  br i1 %53, label %54, label %67

54:                                               ; preds = %50
  %55 = load i32, ptr %10, align 4, !tbaa !5
  %56 = load i32, ptr %6, align 4, !tbaa !5
  %57 = sub nsw i32 %56, %55
  store i32 %57, ptr %6, align 4, !tbaa !5
  %58 = load i32, ptr %6, align 4, !tbaa !5
  %59 = load i32, ptr %7, align 4, !tbaa !5
  %60 = load i32, ptr %8, align 4, !tbaa !5
  %61 = srem i32 %60, 10
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [10 x ptr], ptr @num, i64 0, i64 %62
  %64 = load ptr, ptr %63, align 8, !tbaa !9
  call void @V_DrawPatch(i32 noundef %58, i32 noundef %59, i32 noundef 0, ptr noundef %64)
  %65 = load i32, ptr %8, align 4, !tbaa !5
  %66 = sdiv i32 %65, 10
  store i32 %66, ptr %8, align 4, !tbaa !5
  br label %50, !llvm.loop !16

67:                                               ; preds = %50
  %68 = load i32, ptr %11, align 4, !tbaa !5
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %75

70:                                               ; preds = %67
  %71 = load i32, ptr %6, align 4, !tbaa !5
  %72 = sub nsw i32 %71, 8
  store i32 %72, ptr %6, align 4, !tbaa !5
  %73 = load i32, ptr %7, align 4, !tbaa !5
  %74 = load ptr, ptr @wiminus, align 8, !tbaa !9
  call void @V_DrawPatch(i32 noundef %72, i32 noundef %73, i32 noundef 0, ptr noundef %74)
  br label %75

75:                                               ; preds = %70, %67
  %76 = load i32, ptr %6, align 4, !tbaa !5
  store i32 %76, ptr %5, align 4
  store i32 1, ptr %13, align 4
  br label %77

77:                                               ; preds = %75, %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  %78 = load i32, ptr %5, align 4
  ret i32 %78
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"", !13, i64 0, !13, i64 2, !13, i64 4, !13, i64 6, !7, i64 8}
!13 = !{!"short", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@num = external hidden local_unnamed_addr global [10 x ptr], align 16
@wiminus = external hidden local_unnamed_addr global ptr, align 8

declare void @V_DrawPatch(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @WI_drawNum(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = load ptr, ptr @num, align 16, !tbaa !5
  %6 = load i16, ptr %5, align 4, !tbaa !9
  %7 = sext i16 %6 to i32
  %8 = icmp slt i32 %3, 0
  br i1 %8, label %9, label %.loopexit

9:                                                ; preds = %4
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %.lr.ph.preheader, label %.preheader34

.preheader34:                                     ; preds = %9, %.preheader34
  %.036 = phi i32 [ %10, %.preheader34 ], [ %2, %9 ]
  %.02435 = phi i32 [ %11, %.preheader34 ], [ 0, %9 ]
  %10 = sdiv i32 %.036, 10
  %11 = add nuw nsw i32 %.02435, 1
  %.036.off = add i32 %.036, 9
  %.not32 = icmp ult i32 %.036.off, 19
  br i1 %.not32, label %.loopexit, label %.preheader34, !llvm.loop !12

.loopexit:                                        ; preds = %.preheader34, %4
  %.125 = phi i32 [ %3, %4 ], [ %11, %.preheader34 ]
  %spec.select = tail call i32 @llvm.abs.i32(i32 %2, i1 true)
  %12 = icmp eq i32 %spec.select, 1994
  br i1 %12, label %26, label %.preheader

.preheader:                                       ; preds = %.loopexit
  %13 = icmp slt i32 %2, 0
  %.not3337 = icmp eq i32 %.125, 0
  br i1 %.not3337, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %9, %.preheader
  %.1254450 = phi i32 [ %.125, %.preheader ], [ 1, %9 ]
  %14 = phi i1 [ %13, %.preheader ], [ false, %9 ]
  %spec.select4549 = phi i32 [ %spec.select, %.preheader ], [ 0, %9 ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.02340 = phi i32 [ %16, %.lr.ph ], [ %0, %.lr.ph.preheader ]
  %.239 = phi i32 [ %15, %.lr.ph ], [ %.1254450, %.lr.ph.preheader ]
  %.12738 = phi i32 [ %21, %.lr.ph ], [ %spec.select4549, %.lr.ph.preheader ]
  %15 = add nsw i32 %.239, -1
  %16 = sub nsw i32 %.02340, %7
  %17 = urem i32 %.12738, 10
  %18 = zext nneg i32 %17 to i64
  %19 = getelementptr inbounds [10 x ptr], ptr @num, i64 0, i64 %18
  %20 = load ptr, ptr %19, align 8, !tbaa !5
  tail call void @V_DrawPatch(i32 noundef %16, i32 noundef %1, i32 noundef 0, ptr noundef %20) #3
  %21 = udiv i32 %.12738, 10
  %.not33 = icmp eq i32 %15, 0
  br i1 %.not33, label %._crit_edge, label %.lr.ph, !llvm.loop !14

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %22 = phi i1 [ %13, %.preheader ], [ %14, %.lr.ph ]
  %.023.lcssa = phi i32 [ %0, %.preheader ], [ %16, %.lr.ph ]
  br i1 %22, label %23, label %26

23:                                               ; preds = %._crit_edge
  %24 = add nsw i32 %.023.lcssa, -8
  %25 = load ptr, ptr @wiminus, align 8, !tbaa !5
  tail call void @V_DrawPatch(i32 noundef %24, i32 noundef %1, i32 noundef 0, ptr noundef %25) #3
  br label %26

26:                                               ; preds = %._crit_edge, %23, %.loopexit
  %.022 = phi i32 [ 0, %.loopexit ], [ %24, %23 ], [ %.023.lcssa, %._crit_edge ]
  ret i32 %.022
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.abs.i32(i32, i1 immarg) #2

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"", !11, i64 0, !11, i64 2, !11, i64 4, !11, i64 6, !7, i64 8}
!11 = !{!"short", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass