; LLVM IR from robotics-upo/Heuristic_path_planners :: include/voro++-0.4.6/src (common)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4voro17voro_print_vectorERSt6vectorIdSaIdEEP8_IO_FILE(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  %9 = trunc i64 %8 to i32
  store i32 %9, ptr %6, align 4, !tbaa !9
  br label %10

10:                                               ; preds = %15, %2
  %11 = load i32, ptr %5, align 4, !tbaa !9
  %12 = add nsw i32 %11, 4
  %13 = load i32, ptr %6, align 4, !tbaa !9
  %14 = icmp slt i32 %12, %13
  br i1 %14, label %15, label %43

15:                                               ; preds = %10
  %16 = load ptr, ptr %4, align 8, !tbaa !5
  %17 = load ptr, ptr %3, align 8, !tbaa !5
  %18 = load i32, ptr %5, align 4, !tbaa !9
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %19) #3
  %21 = load double, ptr %20, align 8, !tbaa !11
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !9
  %24 = add nsw i32 %23, 1
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %25) #3
  %27 = load double, ptr %26, align 8, !tbaa !11
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = load i32, ptr %5, align 4, !tbaa !9
  %30 = add nsw i32 %29, 2
  %31 = sext i32 %30 to i64
  %32 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %28, i64 noundef %31) #3
  %33 = load double, ptr %32, align 8, !tbaa !11
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = load i32, ptr %5, align 4, !tbaa !9
  %36 = add nsw i32 %35, 3
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %34, i64 noundef %37) #3
  %39 = load double, ptr %38, align 8, !tbaa !11
  %40 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %16, ptr noundef @.str.5, double noundef %21, double noundef %27, double noundef %33, double noundef %39) #3
  %41 = load i32, ptr %5, align 4, !tbaa !9
  %42 = add nsw i32 %41, 4
  store i32 %42, ptr %5, align 4, !tbaa !9
  br label %10, !llvm.loop !13

43:                                               ; preds = %10
  %44 = load i32, ptr %5, align 4, !tbaa !9
  %45 = add nsw i32 %44, 3
  %46 = load i32, ptr %6, align 4, !tbaa !9
  %47 = icmp sle i32 %45, %46
  br i1 %47, label %48, label %100

48:                                               ; preds = %43
  %49 = load i32, ptr %5, align 4, !tbaa !9
  %50 = add nsw i32 %49, 4
  %51 = load i32, ptr %6, align 4, !tbaa !9
  %52 = icmp eq i32 %50, %51
  br i1 %52, label %53, label %79

53:                                               ; preds = %48
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = load i32, ptr %5, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %57) #3
  %59 = load double, ptr %58, align 8, !tbaa !11
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = load i32, ptr %5, align 4, !tbaa !9
  %62 = add nsw i32 %61, 1
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %63) #3
  %65 = load double, ptr %64, align 8, !tbaa !11
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  %67 = load i32, ptr %5, align 4, !tbaa !9
  %68 = add nsw i32 %67, 2
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %69) #3
  %71 = load double, ptr %70, align 8, !tbaa !11
  %72 = load ptr, ptr %3, align 8, !tbaa !5
  %73 = load i32, ptr %5, align 4, !tbaa !9
  %74 = add nsw i32 %73, 3
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %75) #3
  %77 = load double, ptr %76, align 8, !tbaa !11
  %78 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %54, ptr noundef @.str.6, double noundef %59, double noundef %65, double noundef %71, double noundef %77) #3
  br label %99

79:                                               ; preds = %48
  %80 = load ptr, ptr %4, align 8, !tbaa !5
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  %82 = load i32, ptr %5, align 4, !tbaa !9
  %83 = sext i32 %82 to i64
  %84 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %83) #3
  %85 = load double, ptr %84, align 8, !tbaa !11
  %86 = load ptr, ptr %3, align 8, !tbaa !5
  %87 = load i32, ptr %5, align 4, !tbaa !9
  %88 = add nsw i32 %87, 1
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %89) #3
  %91 = load double, ptr %90, align 8, !tbaa !11
  %92 = load ptr, ptr %3, align 8, !tbaa !5
  %93 = load i32, ptr %5, align 4, !tbaa !9
  %94 = add nsw i32 %93, 2
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %95) #3
  %97 = load double, ptr %96, align 8, !tbaa !11
  %98 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %80, ptr noundef @.str.7, double noundef %85, double noundef %91, double noundef %97) #3
  br label %99

99:                                               ; preds = %79, %53
  br label %128

100:                                              ; preds = %43
  %101 = load i32, ptr %5, align 4, !tbaa !9
  %102 = add nsw i32 %101, 2
  %103 = load i32, ptr %6, align 4, !tbaa !9
  %104 = icmp eq i32 %102, %103
  br i1 %104, label %105, label %119

105:                                              ; preds = %100
  %106 = load ptr, ptr %4, align 8, !tbaa !5
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  %108 = load i32, ptr %5, align 4, !tbaa !9
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %109) #3
  %111 = load double, ptr %110, align 8, !tbaa !11
  %112 = load ptr, ptr %3, align 8, !tbaa !5
  %113 = load i32, ptr %5, align 4, !tbaa !9
  %114 = add nsw i32 %113, 1
  %115 = sext i32 %114 to i64
  %116 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %112, i64 noundef %115) #3
  %117 = load double, ptr %116, align 8, !tbaa !11
  %118 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %106, ptr noundef @.str.8, double noundef %111, double noundef %117) #3
  br label %127

119:                                              ; preds = %100
  %120 = load ptr, ptr %4, align 8, !tbaa !5
  %121 = load ptr, ptr %3, align 8, !tbaa !5
  %122 = load i32, ptr %5, align 4, !tbaa !9
  %123 = sext i32 %122 to i64
  %124 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %121, i64 noundef %123) #3
  %125 = load double, ptr %124, align 8, !tbaa !11
  %126 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %120, ptr noundef @.str.9, double noundef %125) #3
  br label %127

127:                                              ; preds = %119, %105
  br label %128

128:                                              ; preds = %127, %99
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [3 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4voro17voro_print_vectorERSt6vectorIdSaIdEEP8_IO_FILE(ptr noundef nonnull align 8 dereferenceable(24) %0, ptr nocapture noundef %1) local_unnamed_addr #1 {
  %3 = tail call noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %4 = trunc i64 %3 to i32
  %5 = icmp sgt i32 %4, 4
  br i1 %5, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2, %.lr.ph
  %indvars.iv49 = phi i64 [ %indvars.iv.next50, %.lr.ph ], [ 0, %2 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 4, %2 ]
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv49) #2
  %7 = load double, ptr %6, align 8, !tbaa !5
  %8 = or disjoint i64 %indvars.iv49, 1
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %8) #2
  %10 = load double, ptr %9, align 8, !tbaa !5
  %11 = or disjoint i64 %indvars.iv49, 2
  %12 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %11) #2
  %13 = load double, ptr %12, align 8, !tbaa !5
  %14 = or disjoint i64 %indvars.iv49, 3
  %15 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14) #2
  %16 = load double, ptr %15, align 8, !tbaa !5
  %17 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.5, double noundef %7, double noundef %10, double noundef %13, double noundef %16) #2
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
  %18 = trunc nuw i64 %indvars.iv.next to i32
  %19 = icmp slt i32 %18, %4
  %indvars.iv.next50 = add nuw nsw i64 %indvars.iv49, 4
  br i1 %19, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %20 = trunc nuw nsw i64 %indvars.iv to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %2
  %.0.lcssa = phi i32 [ 0, %2 ], [ %20, %._crit_edge.loopexit ]
  %.lcssa = phi i32 [ 4, %2 ], [ %18, %._crit_edge.loopexit ]
  %21 = or disjoint i32 %.0.lcssa, 3
  %.not = icmp sgt i32 %21, %4
  br i1 %.not, label %42, label %22

22:                                               ; preds = %._crit_edge
  %23 = icmp eq i32 %.lcssa, %4
  %24 = zext nneg i32 %.0.lcssa to i64
  %25 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %24) #2
  %26 = load double, ptr %25, align 8, !tbaa !5
  %27 = or disjoint i32 %.0.lcssa, 1
  %28 = zext nneg i32 %27 to i64
  %29 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %28) #2
  %30 = load double, ptr %29, align 8, !tbaa !5
  %31 = or disjoint i32 %.0.lcssa, 2
  %32 = zext nneg i32 %31 to i64
  %33 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %32) #2
  %34 = load double, ptr %33, align 8, !tbaa !5
  br i1 %23, label %35, label %40

35:                                               ; preds = %22
  %36 = zext nneg i32 %21 to i64
  %37 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %36) #2
  %38 = load double, ptr %37, align 8, !tbaa !5
  %39 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.6, double noundef %26, double noundef %30, double noundef %34, double noundef %38) #2
  br label %56

40:                                               ; preds = %22
  %41 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.7, double noundef %26, double noundef %30, double noundef %34) #2
  br label %56

42:                                               ; preds = %._crit_edge
  %43 = or disjoint i32 %.0.lcssa, 2
  %44 = icmp eq i32 %43, %4
  %45 = zext nneg i32 %.0.lcssa to i64
  %46 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %45) #2
  %47 = load double, ptr %46, align 8, !tbaa !5
  br i1 %44, label %48, label %54

48:                                               ; preds = %42
  %49 = or disjoint i32 %.0.lcssa, 1
  %50 = zext nneg i32 %49 to i64
  %51 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %50) #2
  %52 = load double, ptr %51, align 8, !tbaa !5
  %53 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.8, double noundef %47, double noundef %52) #2
  br label %56

54:                                               ; preds = %42
  %55 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.9, double noundef %47) #2
  br label %56

56:                                               ; preds = %48, %54, %35, %40
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIdSaIdEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass