; LLVM IR from MinaFaried3/Assiut-University-Training---Newcomers :: h-sheet5_function/F-Equation.ll (Z5powerii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z5powerii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  store i64 1, ptr %5, align 8, !tbaa !9
  br label %6

6:                                                ; preds = %10, %2
  %7 = load i32, ptr %4, align 4, !tbaa !5
  %8 = add nsw i32 %7, -1
  store i32 %8, ptr %4, align 4, !tbaa !5
  %9 = icmp ne i32 %7, 0
  br i1 %9, label %10, label %15

10:                                               ; preds = %6
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = load i64, ptr %5, align 8, !tbaa !9
  %14 = mul nsw i64 %13, %12
  store i64 %14, ptr %5, align 8, !tbaa !9
  br label %6, !llvm.loop !11

15:                                               ; preds = %6
  %16 = load i64, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret i64 %16
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i64 @_Z5powerii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not5 = icmp eq i32 %1, 0
  br i1 %.not5, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %3 = sext i32 %0 to i64
  %xtraiter = and i32 %1, 7
  %4 = icmp ult i32 %1, 8
  br i1 %4, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.new

.lr.ph.new:                                       ; preds = %.lr.ph
  %unroll_iter = and i32 %1, -8
  %factor.op.mul = mul i64 %3, %3
  %factor.op.mul11 = mul i64 %factor.op.mul, %3
  %factor.op.mul12 = mul i64 %factor.op.mul11, %3
  %factor.op.mul13 = mul i64 %factor.op.mul12, %3
  %factor.op.mul14 = mul i64 %factor.op.mul13, %3
  %factor.op.mul15 = mul i64 %factor.op.mul14, %3
  %factor.op.mul16 = mul i64 %factor.op.mul15, %3
  br label %5

5:                                                ; preds = %5, %.lr.ph.new
  %.07 = phi i64 [ 1, %.lr.ph.new ], [ %.reass.reass.reass.reass.reass.reass.reass, %5 ]
  %niter = phi i32 [ 0, %.lr.ph.new ], [ %niter.next.7, %5 ]
  %.reass.reass.reass.reass.reass.reass.reass = mul i64 %.07, %factor.op.mul16
  %niter.next.7 = add i32 %niter, 8
  %niter.ncmp.7 = icmp eq i32 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %._crit_edge.loopexit.unr-lcssa, label %5, !llvm.loop !5

._crit_edge.loopexit.unr-lcssa:                   ; preds = %5, %.lr.ph
  %.lcssa.ph = phi i64 [ poison, %.lr.ph ], [ %.reass.reass.reass.reass.reass.reass.reass, %5 ]
  %.07.unr = phi i64 [ 1, %.lr.ph ], [ %.reass.reass.reass.reass.reass.reass.reass, %5 ]
  %lcmp.mod.not = icmp eq i32 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.epil.preheader

.epil.preheader:                                  ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader
  %.07.epil = phi i64 [ %6, %.epil.preheader ], [ %.07.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i32 [ %epil.iter.next, %.epil.preheader ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %6 = mul nsw i64 %.07.epil, %3
  %epil.iter.next = add i32 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i32 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.epil.preheader, !llvm.loop !7

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.epil.preheader, %2
  %.0.lcssa = phi i64 [ 1, %2 ], [ %.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %6, %.epil.preheader ]
  ret i64 %.0.lcssa
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !8}
!8 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass