; LLVM IR from 2404589803/LowMemoryLLM :: src/hal/gpu (gpu_context)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.GPUContext = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @gpu_matrix_multiply(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) #1 {
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i32, align 4
  %17 = alloca [2 x i64], align 16
  %18 = alloca i32, align 4
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store ptr %2, ptr %11, align 8, !tbaa !5
  store ptr %3, ptr %12, align 8, !tbaa !5
  store i64 %4, ptr %13, align 8, !tbaa !9
  store i64 %5, ptr %14, align 8, !tbaa !9
  store i64 %6, ptr %15, align 8, !tbaa !9
  %19 = load ptr, ptr %9, align 8, !tbaa !5
  %20 = icmp ne ptr %19, null
  br i1 %20, label %22, label %21

21:                                               ; preds = %7
  store i32 -1, ptr %8, align 4
  br label %87

22:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 16, ptr %17) #3
  %23 = load i64, ptr %13, align 8, !tbaa !9
  store i64 %23, ptr %17, align 8, !tbaa !9
  %24 = getelementptr inbounds i64, ptr %17, i64 1
  %25 = load i64, ptr %14, align 8, !tbaa !9
  store i64 %25, ptr %24, align 8, !tbaa !9
  %26 = load ptr, ptr %9, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.GPUContext, ptr %26, i32 0, i32 4
  %28 = load ptr, ptr %27, align 8, !tbaa !11
  %29 = call i32 @clSetKernelArg(ptr noundef %28, i32 noundef 0, i64 noundef 8, ptr noundef %10)
  store i32 %29, ptr %16, align 4, !tbaa !13
  %30 = load i32, ptr %16, align 4, !tbaa !13
  %31 = icmp ne i32 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %22
  store i32 -1, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

33:                                               ; preds = %22
  %34 = load ptr, ptr %9, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.GPUContext, ptr %34, i32 0, i32 4
  %36 = load ptr, ptr %35, align 8, !tbaa !11
  %37 = call i32 @clSetKernelArg(ptr noundef %36, i32 noundef 1, i64 noundef 8, ptr noundef %11)
  store i32 %37, ptr %16, align 4, !tbaa !13
  %38 = load i32, ptr %16, align 4, !tbaa !13
  %39 = icmp ne i32 %38, 0
  br i1 %39, label %40, label %41

40:                                               ; preds = %33
  store i32 -1, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

41:                                               ; preds = %33
  %42 = load ptr, ptr %9, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.GPUContext, ptr %42, i32 0, i32 4
  %44 = load ptr, ptr %43, align 8, !tbaa !11
  %45 = call i32 @clSetKernelArg(ptr noundef %44, i32 noundef 2, i64 noundef 8, ptr noundef %12)
  store i32 %45, ptr %16, align 4, !tbaa !13
  %46 = load i32, ptr %16, align 4, !tbaa !13
  %47 = icmp ne i32 %46, 0
  br i1 %47, label %48, label %49

48:                                               ; preds = %41
  store i32 -1, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

49:                                               ; preds = %41
  %50 = load ptr, ptr %9, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.GPUContext, ptr %50, i32 0, i32 4
  %52 = load ptr, ptr %51, align 8, !tbaa !11
  %53 = call i32 @clSetKernelArg(ptr noundef %52, i32 noundef 3, i64 noundef 4, ptr noundef %13)
  store i32 %53, ptr %16, align 4, !tbaa !13
  %54 = load i32, ptr %16, align 4, !tbaa !13
  %55 = icmp ne i32 %54, 0
  br i1 %55, label %56, label %57

56:                                               ; preds = %49
  store i32 -1, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

57:                                               ; preds = %49
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.GPUContext, ptr %58, i32 0, i32 4
  %60 = load ptr, ptr %59, align 8, !tbaa !11
  %61 = call i32 @clSetKernelArg(ptr noundef %60, i32 noundef 4, i64 noundef 4, ptr noundef %14)
  store i32 %61, ptr %16, align 4, !tbaa !13
  %62 = load i32, ptr %16, align 4, !tbaa !13
  %63 = icmp ne i32 %62, 0
  br i1 %63, label %64, label %65

64:                                               ; preds = %57
  store i32 -1, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

65:                                               ; preds = %57
  %66 = load ptr, ptr %9, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.GPUContext, ptr %66, i32 0, i32 4
  %68 = load ptr, ptr %67, align 8, !tbaa !11
  %69 = call i32 @clSetKernelArg(ptr noundef %68, i32 noundef 5, i64 noundef 4, ptr noundef %15)
  store i32 %69, ptr %16, align 4, !tbaa !13
  %70 = load i32, ptr %16, align 4, !tbaa !13
  %71 = icmp ne i32 %70, 0
  br i1 %71, label %72, label %73

72:                                               ; preds = %65
  store i32 -1, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

73:                                               ; preds = %65
  %74 = load ptr, ptr %9, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.GPUContext, ptr %74, i32 0, i32 1
  %76 = load ptr, ptr %75, align 8, !tbaa !15
  %77 = load ptr, ptr %9, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.GPUContext, ptr %77, i32 0, i32 4
  %79 = load ptr, ptr %78, align 8, !tbaa !11
  %80 = getelementptr inbounds [2 x i64], ptr %17, i64 0, i64 0
  %81 = call i32 @clEnqueueNDRangeKernel(ptr noundef %76, ptr noundef %79, i32 noundef 2, ptr noundef null, ptr noundef %80, ptr noundef null, i32 noundef 0, ptr noundef null, ptr noundef null)
  store i32 %81, ptr %16, align 4, !tbaa !13
  %82 = load i32, ptr %16, align 4, !tbaa !13
  %83 = icmp ne i32 %82, 0
  br i1 %83, label %84, label %85

84:                                               ; preds = %73
  store i32 -1, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

85:                                               ; preds = %73
  store i32 0, ptr %8, align 4
  store i32 1, ptr %18, align 4
  br label %86

86:                                               ; preds = %85, %84, %72, %64, %56, %48, %40, %32
  call void @llvm.lifetime.end.p0(i64 16, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %87

87:                                               ; preds = %86, %21
  %88 = load i32, ptr %8, align 4
  ret i32 %88
}

declare i32 @clSetKernelArg(ptr noundef, i32 noundef, i64 noundef, ptr noundef) #2

declare i32 @clEnqueueNDRangeKernel(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 32}
!12 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !10, i64 56, !10, i64 64}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!12, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @gpu_matrix_multiply(ptr noundef readonly %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6) local_unnamed_addr #1 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  %14 = alloca [2 x i64], align 16
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store i64 %4, ptr %11, align 8, !tbaa !9
  store i64 %5, ptr %12, align 8, !tbaa !9
  store i64 %6, ptr %13, align 8, !tbaa !9
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %41, label %15

15:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %14) #3
  store i64 %4, ptr %14, align 16, !tbaa !9
  %16 = getelementptr inbounds i8, ptr %14, i64 8
  store i64 %5, ptr %16, align 8, !tbaa !9
  %17 = getelementptr inbounds i8, ptr %0, i64 32
  %18 = load ptr, ptr %17, align 8, !tbaa !11
  %19 = call i32 @clSetKernelArg(ptr noundef %18, i32 noundef 0, i64 noundef 8, ptr noundef nonnull %8) #3
  %.not17 = icmp eq i32 %19, 0
  br i1 %.not17, label %20, label %40

20:                                               ; preds = %15
  %21 = load ptr, ptr %17, align 8, !tbaa !11
  %22 = call i32 @clSetKernelArg(ptr noundef %21, i32 noundef 1, i64 noundef 8, ptr noundef nonnull %9) #3
  %.not18 = icmp eq i32 %22, 0
  br i1 %.not18, label %23, label %40

23:                                               ; preds = %20
  %24 = load ptr, ptr %17, align 8, !tbaa !11
  %25 = call i32 @clSetKernelArg(ptr noundef %24, i32 noundef 2, i64 noundef 8, ptr noundef nonnull %10) #3
  %.not19 = icmp eq i32 %25, 0
  br i1 %.not19, label %26, label %40

26:                                               ; preds = %23
  %27 = load ptr, ptr %17, align 8, !tbaa !11
  %28 = call i32 @clSetKernelArg(ptr noundef %27, i32 noundef 3, i64 noundef 4, ptr noundef nonnull %11) #3
  %.not20 = icmp eq i32 %28, 0
  br i1 %.not20, label %29, label %40

29:                                               ; preds = %26
  %30 = load ptr, ptr %17, align 8, !tbaa !11
  %31 = call i32 @clSetKernelArg(ptr noundef %30, i32 noundef 4, i64 noundef 4, ptr noundef nonnull %12) #3
  %.not21 = icmp eq i32 %31, 0
  br i1 %.not21, label %32, label %40

32:                                               ; preds = %29
  %33 = load ptr, ptr %17, align 8, !tbaa !11
  %34 = call i32 @clSetKernelArg(ptr noundef %33, i32 noundef 5, i64 noundef 4, ptr noundef nonnull %13) #3
  %.not22 = icmp eq i32 %34, 0
  br i1 %.not22, label %35, label %40

35:                                               ; preds = %32
  %36 = getelementptr inbounds i8, ptr %0, i64 8
  %37 = load ptr, ptr %36, align 8, !tbaa !13
  %38 = load ptr, ptr %17, align 8, !tbaa !11
  %39 = call i32 @clEnqueueNDRangeKernel(ptr noundef %37, ptr noundef %38, i32 noundef 2, ptr noundef null, ptr noundef nonnull %14, ptr noundef null, i32 noundef 0, ptr noundef null, ptr noundef null) #3
  %.not23 = icmp ne i32 %39, 0
  %. = sext i1 %.not23 to i32
  br label %40

40:                                               ; preds = %35, %32, %29, %26, %23, %20, %15
  %.0 = phi i32 [ -1, %15 ], [ -1, %20 ], [ -1, %23 ], [ -1, %26 ], [ -1, %29 ], [ -1, %32 ], [ %., %35 ]
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %14) #3
  br label %41

41:                                               ; preds = %7, %40
  %.1 = phi i32 [ %.0, %40 ], [ -1, %7 ]
  ret i32 %.1
}

declare i32 @clSetKernelArg(ptr noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2

declare i32 @clEnqueueNDRangeKernel(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 32}
!12 = !{!"", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !10, i64 56, !10, i64 64}
!13 = !{!12, !6, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass