; LLVM IR from fast-pack/simdcomp :: src (simdfor)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_set1_epi32(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_loadu_si128(ptr noundef) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_or_si128(<2 x i64> noundef, <2 x i64> noundef) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_slli_epi32(<2 x i64> noundef, i32 noundef) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @_mm_storeu_si128(ptr noundef, <2 x i64> noundef) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_srli_epi32(<2 x i64> noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @simdunpackFOR_length(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) #3 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca <2 x i64>, align 16
  %14 = alloca i32, align 4
  %15 = alloca <2 x i64>, align 16
  %16 = alloca <2 x i64>, align 16
  %17 = alloca i32, align 4
  %18 = alloca <2 x i64>, align 16
  %19 = alloca i32, align 4
  %20 = alloca <2 x i64>, align 16
  %21 = alloca i32, align 4
  %22 = alloca <2 x i64>, align 16
  %23 = alloca i32, align 4
  %24 = alloca [4 x i32], align 16
  %25 = alloca <2 x i64>, align 16
  %26 = alloca i32, align 4
  store i32 %0, ptr %7, align 4, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %15) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %16) #4
  %27 = load i32, ptr %9, align 4, !tbaa !5
  %28 = icmp eq i32 %27, 0
  br i1 %28, label %29, label %31

29:                                               ; preds = %5
  %30 = load ptr, ptr %8, align 8, !tbaa !9
  store ptr %30, ptr %6, align 8
  store i32 1, ptr %17, align 4
  br label %283

31:                                               ; preds = %5
  %32 = load i32, ptr %11, align 4, !tbaa !5
  %33 = icmp eq i32 %32, 0
  br i1 %33, label %34, label %50

34:                                               ; preds = %31
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %35

35:                                               ; preds = %45, %34
  %36 = load i32, ptr %12, align 4, !tbaa !5
  %37 = load i32, ptr %9, align 4, !tbaa !5
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %39, label %48

39:                                               ; preds = %35
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = load ptr, ptr %10, align 8, !tbaa !9
  %42 = load i32, ptr %12, align 4, !tbaa !5
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds i32, ptr %41, i64 %43
  store i32 %40, ptr %44, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %39
  %46 = load i32, ptr %12, align 4, !tbaa !5
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %12, align 4, !tbaa !5
  br label %35, !llvm.loop !11

48:                                               ; preds = %35
  %49 = load ptr, ptr %8, align 8, !tbaa !9
  store ptr %49, ptr %6, align 8
  store i32 1, ptr %17, align 4
  br label %283

50:                                               ; preds = %31
  %51 = load i32, ptr %11, align 4, !tbaa !5
  %52 = icmp eq i32 %51, 32
  br i1 %52, label %53, label %63

53:                                               ; preds = %50
  %54 = load ptr, ptr %10, align 8, !tbaa !9
  %55 = load ptr, ptr %8, align 8, !tbaa !9
  %56 = load i32, ptr %9, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = mul i64 %57, 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %54, ptr align 16 %55, i64 %58, i1 false)
  %59 = load ptr, ptr %8, align 8, !tbaa !9
  %60 = load i32, ptr %9, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds i32, ptr %59, i64 %61
  store ptr %62, ptr %6, align 8
  store i32 1, ptr %17, align 4
  br label %283

63:                                               ; preds = %50
  %64 = load i32, ptr %7, align 4, !tbaa !5
  %65 = call <2 x i64> @_mm_set1_epi32(i32 noundef %64)
  store <2 x i64> %65, ptr %16, align 16, !tbaa !13
  %66 = load i32, ptr %11, align 4, !tbaa !5
  %67 = shl i32 1, %66
  %68 = sub i32 %67, 1
  %69 = call <2 x i64> @_mm_set1_epi32(i32 noundef %68)
  store <2 x i64> %69, ptr %13, align 16, !tbaa !13
  store i32 0, ptr %14, align 4, !tbaa !5
  %70 = load ptr, ptr %8, align 8, !tbaa !9
  %71 = call <2 x i64> @_mm_loadu_si128(ptr noundef %70)
  store <2 x i64> %71, ptr %15, align 16, !tbaa !13
  %72 = load ptr, ptr %8, align 8, !tbaa !9
  %73 = getelementptr inbounds <2 x i64>, ptr %72, i32 1
  store ptr %73, ptr %8, align 8, !tbaa !9
  %74 = load i32, ptr %9, align 4, !tbaa !5
  %75 = srem i32 %74, 4
  %76 = icmp eq i32 %75, 0
  br i1 %76, label %77, label %175

77:                                               ; preds = %63
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %78

78:                                               ; preds = %122, %77
  %79 = load i32, ptr %12, align 4, !tbaa !5
  %80 = add nsw i32 %79, 1
  %81 = load i32, ptr %9, align 4, !tbaa !5
  %82 = sdiv i32 %81, 4
  %83 = icmp slt i32 %80, %82
  br i1 %83, label %84, label %125

84:                                               ; preds = %78
  call void @llvm.lifetime.start.p0(i64 16, ptr %18) #4
  %85 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %86 = load i32, ptr %14, align 4, !tbaa !5
  %87 = call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %85, i32 noundef %86)
  store <2 x i64> %87, ptr %18, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  %88 = load i32, ptr %14, align 4, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = sub i64 32, %89
  %91 = trunc i64 %90 to i32
  store i32 %91, ptr %19, align 4, !tbaa !5
  %92 = load i32, ptr %11, align 4, !tbaa !5
  %93 = load i32, ptr %19, align 4, !tbaa !5
  %94 = icmp ult i32 %92, %93
  br i1 %94, label %95, label %99

95:                                               ; preds = %84
  %96 = load i32, ptr %11, align 4, !tbaa !5
  %97 = load i32, ptr %14, align 4, !tbaa !5
  %98 = add i32 %97, %96
  store i32 %98, ptr %14, align 4, !tbaa !5
  br label %112

99:                                               ; preds = %84
  %100 = load ptr, ptr %8, align 8, !tbaa !9
  %101 = call <2 x i64> @_mm_loadu_si128(ptr noundef %100)
  store <2 x i64> %101, ptr %15, align 16, !tbaa !13
  %102 = load ptr, ptr %8, align 8, !tbaa !9
  %103 = getelementptr inbounds <2 x i64>, ptr %102, i32 1
  store ptr %103, ptr %8, align 8, !tbaa !9
  %104 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %105 = load i32, ptr %19, align 4, !tbaa !5
  %106 = call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %104, i32 noundef %105)
  %107 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %108 = call <2 x i64> @_mm_or_si128(<2 x i64> noundef %106, <2 x i64> noundef %107)
  store <2 x i64> %108, ptr %18, align 16, !tbaa !13
  %109 = load i32, ptr %11, align 4, !tbaa !5
  %110 = load i32, ptr %19, align 4, !tbaa !5
  %111 = sub i32 %109, %110
  store i32 %111, ptr %14, align 4, !tbaa !5
  br label %112

112:                                              ; preds = %99, %95
  %113 = load <2 x i64>, ptr %13, align 16, !tbaa !13
  %114 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %115 = call <2 x i64> @_mm_and_si128(<2 x i64> noundef %113, <2 x i64> noundef %114)
  store <2 x i64> %115, ptr %18, align 16, !tbaa !13
  %116 = load ptr, ptr %10, align 8, !tbaa !9
  %117 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %118 = load <2 x i64>, ptr %16, align 16, !tbaa !13
  %119 = call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %117, <2 x i64> noundef %118)
  call void @_mm_storeu_si128(ptr noundef %116, <2 x i64> noundef %119)
  %120 = load ptr, ptr %10, align 8, !tbaa !9
  %121 = getelementptr inbounds i32, ptr %120, i64 4
  store ptr %121, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %18) #4
  br label %122

122:                                              ; preds = %112
  %123 = load i32, ptr %12, align 4, !tbaa !5
  %124 = add nsw i32 %123, 1
  store i32 %124, ptr %12, align 4, !tbaa !5
  br label %78, !llvm.loop !14

125:                                              ; preds = %78
  %126 = load i32, ptr %12, align 4, !tbaa !5
  %127 = load i32, ptr %9, align 4, !tbaa !5
  %128 = sdiv i32 %127, 4
  %129 = icmp slt i32 %126, %128
  br i1 %129, label %130, label %174

130:                                              ; preds = %125
  call void @llvm.lifetime.start.p0(i64 16, ptr %20) #4
  %131 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %132 = load i32, ptr %14, align 4, !tbaa !5
  %133 = call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %131, i32 noundef %132)
  store <2 x i64> %133, ptr %20, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  %134 = load i32, ptr %14, align 4, !tbaa !5
  %135 = sext i32 %134 to i64
  %136 = sub i64 32, %135
  %137 = trunc i64 %136 to i32
  store i32 %137, ptr %21, align 4, !tbaa !5
  %138 = load i32, ptr %11, align 4, !tbaa !5
  %139 = load i32, ptr %21, align 4, !tbaa !5
  %140 = icmp ult i32 %138, %139
  br i1 %140, label %141, label %145

141:                                              ; preds = %130
  %142 = load i32, ptr %11, align 4, !tbaa !5
  %143 = load i32, ptr %14, align 4, !tbaa !5
  %144 = add i32 %143, %142
  store i32 %144, ptr %14, align 4, !tbaa !5
  br label %164

145:                                              ; preds = %130
  %146 = load i32, ptr %11, align 4, !tbaa !5
  %147 = load i32, ptr %21, align 4, !tbaa !5
  %148 = icmp eq i32 %146, %147
  br i1 %148, label %149, label %150

149:                                              ; preds = %145
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %163

150:                                              ; preds = %145
  %151 = load ptr, ptr %8, align 8, !tbaa !9
  %152 = call <2 x i64> @_mm_loadu_si128(ptr noundef %151)
  store <2 x i64> %152, ptr %15, align 16, !tbaa !13
  %153 = load ptr, ptr %8, align 8, !tbaa !9
  %154 = getelementptr inbounds <2 x i64>, ptr %153, i32 1
  store ptr %154, ptr %8, align 8, !tbaa !9
  %155 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %156 = load i32, ptr %21, align 4, !tbaa !5
  %157 = call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %155, i32 noundef %156)
  %158 = load <2 x i64>, ptr %20, align 16, !tbaa !13
  %159 = call <2 x i64> @_mm_or_si128(<2 x i64> noundef %157, <2 x i64> noundef %158)
  store <2 x i64> %159, ptr %20, align 16, !tbaa !13
  %160 = load i32, ptr %11, align 4, !tbaa !5
  %161 = load i32, ptr %21, align 4, !tbaa !5
  %162 = sub i32 %160, %161
  store i32 %162, ptr %14, align 4, !tbaa !5
  br label %163

163:                                              ; preds = %150, %149
  br label %164

164:                                              ; preds = %163, %141
  %165 = load <2 x i64>, ptr %13, align 16, !tbaa !13
  %166 = load <2 x i64>, ptr %20, align 16, !tbaa !13
  %167 = call <2 x i64> @_mm_and_si128(<2 x i64> noundef %165, <2 x i64> noundef %166)
  store <2 x i64> %167, ptr %20, align 16, !tbaa !13
  %168 = load ptr, ptr %10, align 8, !tbaa !9
  %169 = load <2 x i64>, ptr %20, align 16, !tbaa !13
  %170 = load <2 x i64>, ptr %16, align 16, !tbaa !13
  %171 = call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %169, <2 x i64> noundef %170)
  call void @_mm_storeu_si128(ptr noundef %168, <2 x i64> noundef %171)
  %172 = load ptr, ptr %10, align 8, !tbaa !9
  %173 = getelementptr inbounds i32, ptr %172, i64 4
  store ptr %173, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %20) #4
  br label %174

174:                                              ; preds = %164, %125
  br label %281

175:                                              ; preds = %63
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %176

176:                                              ; preds = %219, %175
  %177 = load i32, ptr %12, align 4, !tbaa !5
  %178 = load i32, ptr %9, align 4, !tbaa !5
  %179 = sdiv i32 %178, 4
  %180 = icmp slt i32 %177, %179
  br i1 %180, label %181, label %222

181:                                              ; preds = %176
  call void @llvm.lifetime.start.p0(i64 16, ptr %22) #4
  %182 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %183 = load i32, ptr %14, align 4, !tbaa !5
  %184 = call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %182, i32 noundef %183)
  store <2 x i64> %184, ptr %22, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #4
  %185 = load i32, ptr %14, align 4, !tbaa !5
  %186 = sext i32 %185 to i64
  %187 = sub i64 32, %186
  %188 = trunc i64 %187 to i32
  store i32 %188, ptr %23, align 4, !tbaa !5
  %189 = load i32, ptr %11, align 4, !tbaa !5
  %190 = load i32, ptr %23, align 4, !tbaa !5
  %191 = icmp ult i32 %189, %190
  br i1 %191, label %192, label %196

192:                                              ; preds = %181
  %193 = load i32, ptr %11, align 4, !tbaa !5
  %194 = load i32, ptr %14, align 4, !tbaa !5
  %195 = add i32 %194, %193
  store i32 %195, ptr %14, align 4, !tbaa !5
  br label %209

196:                                              ; preds = %181
  %197 = load ptr, ptr %8, align 8, !tbaa !9
  %198 = call <2 x i64> @_mm_loadu_si128(ptr noundef %197)
  store <2 x i64> %198, ptr %15, align 16, !tbaa !13
  %199 = load ptr, ptr %8, align 8, !tbaa !9
  %200 = getelementptr inbounds <2 x i64>, ptr %199, i32 1
  store ptr %200, ptr %8, align 8, !tbaa !9
  %201 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %202 = load i32, ptr %23, align 4, !tbaa !5
  %203 = call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %201, i32 noundef %202)
  %204 = load <2 x i64>, ptr %22, align 16, !tbaa !13
  %205 = call <2 x i64> @_mm_or_si128(<2 x i64> noundef %203, <2 x i64> noundef %204)
  store <2 x i64> %205, ptr %22, align 16, !tbaa !13
  %206 = load i32, ptr %11, align 4, !tbaa !5
  %207 = load i32, ptr %23, align 4, !tbaa !5
  %208 = sub i32 %206, %207
  store i32 %208, ptr %14, align 4, !tbaa !5
  br label %209

209:                                              ; preds = %196, %192
  %210 = load <2 x i64>, ptr %13, align 16, !tbaa !13
  %211 = load <2 x i64>, ptr %22, align 16, !tbaa !13
  %212 = call <2 x i64> @_mm_and_si128(<2 x i64> noundef %210, <2 x i64> noundef %211)
  store <2 x i64> %212, ptr %22, align 16, !tbaa !13
  %213 = load ptr, ptr %10, align 8, !tbaa !9
  %214 = load <2 x i64>, ptr %22, align 16, !tbaa !13
  %215 = load <2 x i64>, ptr %16, align 16, !tbaa !13
  %216 = call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %214, <2 x i64> noundef %215)
  call void @_mm_storeu_si128(ptr noundef %213, <2 x i64> noundef %216)
  %217 = load ptr, ptr %10, align 8, !tbaa !9
  %218 = getelementptr inbounds i32, ptr %217, i64 4
  store ptr %218, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %22) #4
  br label %219

219:                                              ; preds = %209
  %220 = load i32, ptr %12, align 4, !tbaa !5
  %221 = add nsw i32 %220, 1
  store i32 %221, ptr %12, align 4, !tbaa !5
  br label %176, !llvm.loop !15

222:                                              ; preds = %176
  call void @llvm.lifetime.start.p0(i64 16, ptr %24) #4
  call void @llvm.lifetime.start.p0(i64 16, ptr %25) #4
  %223 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %224 = load i32, ptr %14, align 4, !tbaa !5
  %225 = call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %223, i32 noundef %224)
  store <2 x i64> %225, ptr %25, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #4
  %226 = load i32, ptr %14, align 4, !tbaa !5
  %227 = sext i32 %226 to i64
  %228 = sub i64 32, %227
  %229 = trunc i64 %228 to i32
  store i32 %229, ptr %26, align 4, !tbaa !5
  %230 = load i32, ptr %11, align 4, !tbaa !5
  %231 = load i32, ptr %26, align 4, !tbaa !5
  %232 = icmp ult i32 %230, %231
  br i1 %232, label %233, label %237

233:                                              ; preds = %222
  %234 = load i32, ptr %11, align 4, !tbaa !5
  %235 = load i32, ptr %14, align 4, !tbaa !5
  %236 = add i32 %235, %234
  store i32 %236, ptr %14, align 4, !tbaa !5
  br label %256

237:                                              ; preds = %222
  %238 = load i32, ptr %11, align 4, !tbaa !5
  %239 = load i32, ptr %26, align 4, !tbaa !5
  %240 = icmp eq i32 %238, %239
  br i1 %240, label %241, label %242

241:                                              ; preds = %237
  store i32 0, ptr %14, align 4, !tbaa !5
  br label %255

242:                                              ; preds = %237
  %243 = load ptr, ptr %8, align 8, !tbaa !9
  %244 = call <2 x i64> @_mm_loadu_si128(ptr noundef %243)
  store <2 x i64> %244, ptr %15, align 16, !tbaa !13
  %245 = load ptr, ptr %8, align 8, !tbaa !9
  %246 = getelementptr inbounds <2 x i64>, ptr %245, i32 1
  store ptr %246, ptr %8, align 8, !tbaa !9
  %247 = load <2 x i64>, ptr %15, align 16, !tbaa !13
  %248 = load i32, ptr %26, align 4, !tbaa !5
  %249 = call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %247, i32 noundef %248)
  %250 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %251 = call <2 x i64> @_mm_or_si128(<2 x i64> noundef %249, <2 x i64> noundef %250)
  store <2 x i64> %251, ptr %25, align 16, !tbaa !13
  %252 = load i32, ptr %11, align 4, !tbaa !5
  %253 = load i32, ptr %26, align 4, !tbaa !5
  %254 = sub i32 %252, %253
  store i32 %254, ptr %14, align 4, !tbaa !5
  br label %255

255:                                              ; preds = %242, %241
  br label %256

256:                                              ; preds = %255, %233
  %257 = load <2 x i64>, ptr %13, align 16, !tbaa !13
  %258 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %259 = call <2 x i64> @_mm_and_si128(<2 x i64> noundef %257, <2 x i64> noundef %258)
  store <2 x i64> %259, ptr %25, align 16, !tbaa !13
  %260 = getelementptr inbounds [4 x i32], ptr %24, i64 0, i64 0
  %261 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %262 = load <2 x i64>, ptr %16, align 16, !tbaa !13
  %263 = call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %261, <2 x i64> noundef %262)
  call void @_mm_storeu_si128(ptr noundef %260, <2 x i64> noundef %263)
  store i32 0, ptr %12, align 4, !tbaa !5
  br label %264

264:                                              ; preds = %277, %256
  %265 = load i32, ptr %12, align 4, !tbaa !5
  %266 = load i32, ptr %9, align 4, !tbaa !5
  %267 = srem i32 %266, 4
  %268 = icmp slt i32 %265, %267
  br i1 %268, label %269, label %280

269:                                              ; preds = %264
  %270 = load i32, ptr %12, align 4, !tbaa !5
  %271 = sext i32 %270 to i64
  %272 = getelementptr inbounds [4 x i32], ptr %24, i64 0, i64 %271
  %273 = load i32, ptr %272, align 4, !tbaa !5
  %274 = load ptr, ptr %10, align 8, !tbaa !9
  store i32 %273, ptr %274, align 4, !tbaa !5
  %275 = load ptr, ptr %10, align 8, !tbaa !9
  %276 = getelementptr inbounds i32, ptr %275, i32 1
  store ptr %276, ptr %10, align 8, !tbaa !9
  br label %277

277:                                              ; preds = %269
  %278 = load i32, ptr %12, align 4, !tbaa !5
  %279 = add nsw i32 %278, 1
  store i32 %279, ptr %12, align 4, !tbaa !5
  br label %264, !llvm.loop !16

280:                                              ; preds = %264
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %25) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %24) #4
  br label %281

281:                                              ; preds = %280, %174
  %282 = load ptr, ptr %8, align 8, !tbaa !9
  store ptr %282, ptr %6, align 8
  store i32 1, ptr %17, align 4
  br label %283

283:                                              ; preds = %281, %53, %48, %29
  call void @llvm.lifetime.end.p0(i64 16, ptr %16) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  %284 = load ptr, ptr %6, align 8
  ret ptr %284
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_and_si128(<2 x i64> noundef, <2 x i64> noundef) #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_add_epi32(<2 x i64> noundef, <2 x i64> noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_set1_epi32(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_loadu_si128(ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_or_si128(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_slli_epi32(<2 x i64> noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @_mm_storeu_si128(ptr noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_srli_epi32(<2 x i64> noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local ptr @simdunpackFOR_length(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4) local_unnamed_addr #3 {
  %6 = alloca [4 x i32], align 16
  %7 = icmp eq i32 %2, 0
  br i1 %7, label %.loopexit, label %8

8:                                                ; preds = %5
  switch i32 %4, label %18 [
    i32 0, label %.preheader149
    i32 32, label %14
  ]

.preheader149:                                    ; preds = %8
  %9 = icmp sgt i32 %2, 0
  br i1 %9, label %.lr.ph.preheader, label %.loopexit

.lr.ph.preheader:                                 ; preds = %.preheader149
  %wide.trip.count = zext nneg i32 %2 to i64
  %min.iters.check = icmp ult i32 %2, 8
  br i1 %min.iters.check, label %.lr.ph.preheader190, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %wide.trip.count, 2147483640
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %10 = getelementptr inbounds i32, ptr %3, i64 %index
  %11 = getelementptr inbounds i8, ptr %10, i64 16
  store <4 x i32> %broadcast.splat, ptr %10, align 4, !tbaa !5
  store <4 x i32> %broadcast.splat, ptr %11, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %12 = icmp eq i64 %index.next, %n.vec
  br i1 %12, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %.loopexit, label %.lr.ph.preheader190

.lr.ph.preheader190:                              ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader190, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader190 ]
  %13 = getelementptr inbounds i32, ptr %3, i64 %indvars.iv
  store i32 %0, ptr %13, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !13

14:                                               ; preds = %8
  %15 = sext i32 %2 to i64
  %16 = shl nsw i64 %15, 2
  tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %3, ptr align 16 %1, i64 %16, i1 false)
  %17 = getelementptr inbounds i32, ptr %1, i64 %15
  br label %.loopexit

18:                                               ; preds = %8
  %19 = tail call <2 x i64> @_mm_set1_epi32(i32 noundef %0)
  %notmask = shl nsw i32 -1, %4
  %20 = xor i32 %notmask, -1
  %21 = tail call <2 x i64> @_mm_set1_epi32(i32 noundef %20)
  %22 = tail call <2 x i64> @_mm_loadu_si128(ptr noundef %1)
  %23 = getelementptr inbounds i8, ptr %1, i64 16
  %24 = srem i32 %2, 4
  %25 = icmp eq i32 %24, 0
  %26 = sdiv i32 %2, 4
  br i1 %25, label %.preheader, label %.preheader148

.preheader148:                                    ; preds = %18
  %27 = icmp sgt i32 %2, 3
  br i1 %27, label %.lr.ph156, label %._crit_edge

.preheader:                                       ; preds = %18
  %28 = icmp sgt i32 %2, 7
  br i1 %28, label %.lr.ph169.preheader, label %._crit_edge170

.lr.ph169.preheader:                              ; preds = %.preheader
  %smax = tail call i32 @llvm.smax.i32(i32 %26, i32 2)
  br label %.lr.ph169

.lr.ph169:                                        ; preds = %.lr.ph169.preheader, %41
  %29 = phi i32 [ %45, %41 ], [ 1, %.lr.ph169.preheader ]
  %.0119168 = phi ptr [ %.1, %41 ], [ %23, %.lr.ph169.preheader ]
  %.0121167 = phi ptr [ %44, %41 ], [ %3, %.lr.ph169.preheader ]
  %.0130166 = phi i32 [ %.1131, %41 ], [ 0, %.lr.ph169.preheader ]
  %.0134165 = phi <2 x i64> [ %.1135, %41 ], [ %22, %.lr.ph169.preheader ]
  %30 = tail call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %.0134165, i32 noundef %.0130166)
  %31 = sub i32 32, %.0130166
  %32 = icmp ugt i32 %31, %4
  br i1 %32, label %33, label %35

33:                                               ; preds = %.lr.ph169
  %34 = add i32 %.0130166, %4
  br label %41

35:                                               ; preds = %.lr.ph169
  %36 = tail call <2 x i64> @_mm_loadu_si128(ptr noundef %.0119168)
  %37 = getelementptr inbounds i8, ptr %.0119168, i64 16
  %38 = tail call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %36, i32 noundef %31)
  %39 = tail call <2 x i64> @_mm_or_si128(<2 x i64> noundef %38, <2 x i64> noundef %30)
  %40 = sub i32 %4, %31
  br label %41

41:                                               ; preds = %35, %33
  %.1135 = phi <2 x i64> [ %.0134165, %33 ], [ %36, %35 ]
  %.1131 = phi i32 [ %34, %33 ], [ %40, %35 ]
  %.0129 = phi <2 x i64> [ %30, %33 ], [ %39, %35 ]
  %.1 = phi ptr [ %.0119168, %33 ], [ %37, %35 ]
  %42 = tail call <2 x i64> @_mm_and_si128(<2 x i64> noundef %21, <2 x i64> noundef %.0129)
  %43 = tail call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %42, <2 x i64> noundef %19)
  tail call void @_mm_storeu_si128(ptr noundef %.0121167, <2 x i64> noundef %43)
  %44 = getelementptr inbounds i8, ptr %.0121167, i64 16
  %45 = add nuw nsw i32 %29, 1
  %exitcond186.not = icmp eq i32 %45, %smax
  br i1 %exitcond186.not, label %._crit_edge170.loopexit, label %.lr.ph169, !llvm.loop !14

._crit_edge170.loopexit:                          ; preds = %41
  %46 = add nsw i32 %smax, -1
  br label %._crit_edge170

._crit_edge170:                                   ; preds = %._crit_edge170.loopexit, %.preheader
  %.0134.lcssa = phi <2 x i64> [ %22, %.preheader ], [ %.1135, %._crit_edge170.loopexit ]
  %.0130.lcssa = phi i32 [ 0, %.preheader ], [ %.1131, %._crit_edge170.loopexit ]
  %.1126.lcssa = phi i32 [ 0, %.preheader ], [ %46, %._crit_edge170.loopexit ]
  %.0121.lcssa = phi ptr [ %3, %.preheader ], [ %44, %._crit_edge170.loopexit ]
  %.0119.lcssa = phi ptr [ %23, %.preheader ], [ %.1, %._crit_edge170.loopexit ]
  %47 = icmp slt i32 %.1126.lcssa, %26
  br i1 %47, label %48, label %.loopexit

48:                                               ; preds = %._crit_edge170
  %49 = tail call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %.0134.lcssa, i32 noundef %.0130.lcssa)
  %50 = sub i32 32, %.0130.lcssa
  %or.cond.not = icmp ult i32 %50, %4
  br i1 %or.cond.not, label %51, label %56

51:                                               ; preds = %48
  %52 = tail call <2 x i64> @_mm_loadu_si128(ptr noundef %.0119.lcssa)
  %53 = getelementptr inbounds i8, ptr %.0119.lcssa, i64 16
  %54 = tail call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %52, i32 noundef %50)
  %55 = tail call <2 x i64> @_mm_or_si128(<2 x i64> noundef %54, <2 x i64> noundef %49)
  br label %56

56:                                               ; preds = %48, %51
  %.0124 = phi <2 x i64> [ %55, %51 ], [ %49, %48 ]
  %.2 = phi ptr [ %53, %51 ], [ %.0119.lcssa, %48 ]
  %57 = tail call <2 x i64> @_mm_and_si128(<2 x i64> noundef %21, <2 x i64> noundef %.0124)
  %58 = tail call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %57, <2 x i64> noundef %19)
  tail call void @_mm_storeu_si128(ptr noundef %.0121.lcssa, <2 x i64> noundef %58)
  br label %.loopexit

.lr.ph156:                                        ; preds = %.preheader148, %70
  %.3155 = phi ptr [ %.4, %70 ], [ %23, %.preheader148 ]
  %.1122154 = phi ptr [ %73, %70 ], [ %3, %.preheader148 ]
  %.2127153 = phi i32 [ %74, %70 ], [ 0, %.preheader148 ]
  %.2132152 = phi i32 [ %.3133, %70 ], [ 0, %.preheader148 ]
  %.2136151 = phi <2 x i64> [ %.3137, %70 ], [ %22, %.preheader148 ]
  %59 = tail call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %.2136151, i32 noundef %.2132152)
  %60 = sub i32 32, %.2132152
  %61 = icmp ugt i32 %60, %4
  br i1 %61, label %62, label %64

62:                                               ; preds = %.lr.ph156
  %63 = add i32 %.2132152, %4
  br label %70

64:                                               ; preds = %.lr.ph156
  %65 = tail call <2 x i64> @_mm_loadu_si128(ptr noundef %.3155)
  %66 = getelementptr inbounds i8, ptr %.3155, i64 16
  %67 = tail call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %65, i32 noundef %60)
  %68 = tail call <2 x i64> @_mm_or_si128(<2 x i64> noundef %67, <2 x i64> noundef %59)
  %69 = sub i32 %4, %60
  br label %70

70:                                               ; preds = %64, %62
  %.3137 = phi <2 x i64> [ %.2136151, %62 ], [ %65, %64 ]
  %.3133 = phi i32 [ %63, %62 ], [ %69, %64 ]
  %.0120 = phi <2 x i64> [ %59, %62 ], [ %68, %64 ]
  %.4 = phi ptr [ %.3155, %62 ], [ %66, %64 ]
  %71 = tail call <2 x i64> @_mm_and_si128(<2 x i64> noundef %21, <2 x i64> noundef %.0120)
  %72 = tail call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %71, <2 x i64> noundef %19)
  tail call void @_mm_storeu_si128(ptr noundef %.1122154, <2 x i64> noundef %72)
  %73 = getelementptr inbounds i8, ptr %.1122154, i64 16
  %74 = add nuw nsw i32 %.2127153, 1
  %exitcond180.not = icmp eq i32 %74, %26
  br i1 %exitcond180.not, label %._crit_edge, label %.lr.ph156, !llvm.loop !15

._crit_edge:                                      ; preds = %70, %.preheader148
  %.2136.lcssa = phi <2 x i64> [ %22, %.preheader148 ], [ %.3137, %70 ]
  %.2132.lcssa = phi i32 [ 0, %.preheader148 ], [ %.3133, %70 ]
  %.1122.lcssa = phi ptr [ %3, %.preheader148 ], [ %73, %70 ]
  %.3.lcssa = phi ptr [ %23, %.preheader148 ], [ %.4, %70 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %6) #5
  %75 = tail call <2 x i64> @_mm_srli_epi32(<2 x i64> noundef %.2136.lcssa, i32 noundef %.2132.lcssa)
  %76 = sub i32 32, %.2132.lcssa
  %or.cond147.not = icmp ult i32 %76, %4
  br i1 %or.cond147.not, label %77, label %82

77:                                               ; preds = %._crit_edge
  %78 = tail call <2 x i64> @_mm_loadu_si128(ptr noundef %.3.lcssa)
  %79 = getelementptr inbounds i8, ptr %.3.lcssa, i64 16
  %80 = tail call <2 x i64> @_mm_slli_epi32(<2 x i64> noundef %78, i32 noundef %76)
  %81 = tail call <2 x i64> @_mm_or_si128(<2 x i64> noundef %80, <2 x i64> noundef %75)
  br label %82

82:                                               ; preds = %._crit_edge, %77
  %.5 = phi ptr [ %79, %77 ], [ %.3.lcssa, %._crit_edge ]
  %.0118 = phi <2 x i64> [ %81, %77 ], [ %75, %._crit_edge ]
  %83 = tail call <2 x i64> @_mm_and_si128(<2 x i64> noundef %21, <2 x i64> noundef %.0118)
  %84 = tail call <2 x i64> @_mm_add_epi32(<2 x i64> noundef %83, <2 x i64> noundef %19)
  call void @_mm_storeu_si128(ptr noundef nonnull %6, <2 x i64> noundef %84)
  %85 = icmp sgt i32 %24, 0
  br i1 %85, label %.lr.ph163, label %._crit_edge164

.lr.ph163:                                        ; preds = %82
  %86 = load i32, ptr %6, align 16, !tbaa !5
  store i32 %86, ptr %.1122.lcssa, align 4, !tbaa !5
  %exitcond185.not = icmp eq i32 %24, 1
  br i1 %exitcond185.not, label %._crit_edge164, label %.lr.ph163.1, !llvm.loop !16

.lr.ph163.1:                                      ; preds = %.lr.ph163
  %87 = getelementptr inbounds i8, ptr %.1122.lcssa, i64 4
  %88 = getelementptr inbounds i8, ptr %6, i64 4
  %89 = load i32, ptr %88, align 4, !tbaa !5
  store i32 %89, ptr %87, align 4, !tbaa !5
  %exitcond185.not.1 = icmp eq i32 %24, 2
  br i1 %exitcond185.not.1, label %._crit_edge164, label %.lr.ph163.2, !llvm.loop !16

.lr.ph163.2:                                      ; preds = %.lr.ph163.1
  %90 = getelementptr inbounds i8, ptr %.1122.lcssa, i64 8
  %91 = getelementptr inbounds i8, ptr %6, i64 8
  %92 = load i32, ptr %91, align 8, !tbaa !5
  store i32 %92, ptr %90, align 4, !tbaa !5
  br label %._crit_edge164

._crit_edge164:                                   ; preds = %.lr.ph163, %.lr.ph163.1, %.lr.ph163.2, %82
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %6) #5
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %middle.block, %.preheader149, %._crit_edge164, %56, %._crit_edge170, %5, %14
  %.0 = phi ptr [ %17, %14 ], [ %1, %5 ], [ %.2, %56 ], [ %.0119.lcssa, %._crit_edge170 ], [ %.5, %._crit_edge164 ], [ %1, %.preheader149 ], [ %1, %middle.block ], [ %1, %.lr.ph ]
  ret ptr %.0
}

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_and_si128(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden <2 x i64> @_mm_add_epi32(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #4

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,SROAPass,SimplifyCFGPass,TailCallElimPass