; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/FIRMWARE/LIBFEMTORV32/spi_sd.ll (sd_init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sdhc_card = external hidden global i32, align 4

; Function Attrs: nounwind uwtable
declare dso_local void @spi_send(i8 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @sd_send_command(i8 noundef zeroext, i32 noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @_sd_init() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #4
  store i8 -1, ptr %3, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #4
  call void @milliwait(i32 noundef 2)
  call void @CS_H()
  call void @MOSI_H()
  call void @DLY_US(i32 noundef 100)
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %12, %0
  %8 = load i32, ptr %5, align 4, !tbaa !5
  %9 = icmp slt i32 %8, 200
  br i1 %9, label %11, label %10

10:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %15

11:                                               ; preds = %7
  call void @CK_H()
  call void @DLY_US(i32 noundef 10)
  call void @CK_L()
  call void @DLY_US(i32 noundef 10)
  br label %12

12:                                               ; preds = %11
  %13 = load i32, ptr %5, align 4, !tbaa !5
  %14 = add nsw i32 %13, 1
  store i32 %14, ptr %5, align 4, !tbaa !5
  br label %7, !llvm.loop !10

15:                                               ; preds = %10
  call void @DLY_US(i32 noundef 100)
  call void @CS_L()
  call void @DLY_US(i32 noundef 100)
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %23, %15
  %17 = call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  store i8 %17, ptr %3, align 1, !tbaa !9
  %18 = load i32, ptr %2, align 4, !tbaa !5
  %19 = add nsw i32 %18, 1
  store i32 %19, ptr %2, align 4, !tbaa !5
  %20 = icmp sgt i32 %18, 8
  br i1 %20, label %21, label %22

21:                                               ; preds = %16
  call void @CS_H()
  store i32 -1, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %71

22:                                               ; preds = %16
  br label %23

23:                                               ; preds = %22
  %24 = load i8, ptr %3, align 1, !tbaa !9
  %25 = zext i8 %24 to i32
  %26 = icmp ne i32 %25, 1
  br i1 %26, label %16, label %27, !llvm.loop !12

27:                                               ; preds = %23
  call void @spi_send(i8 noundef zeroext -1)
  call void @spi_send(i8 noundef zeroext -1)
  store i8 2, ptr %4, align 1, !tbaa !9
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %28

28:                                               ; preds = %35, %27
  %29 = call zeroext i8 @sd_send_command(i8 noundef zeroext 8, i32 noundef 426)
  store i8 %29, ptr %3, align 1, !tbaa !9
  %30 = load i32, ptr %2, align 4, !tbaa !5
  %31 = add nsw i32 %30, 1
  store i32 %31, ptr %2, align 4, !tbaa !5
  %32 = icmp sgt i32 %30, 8
  br i1 %32, label %33, label %34

33:                                               ; preds = %28
  store i8 1, ptr %4, align 1, !tbaa !9
  br label %39

34:                                               ; preds = %28
  br label %35

35:                                               ; preds = %34
  %36 = load i8, ptr %3, align 1, !tbaa !9
  %37 = zext i8 %36 to i32
  %38 = icmp ne i32 %37, 1
  br i1 %38, label %28, label %39, !llvm.loop !13

39:                                               ; preds = %35, %33
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %40

40:                                               ; preds = %48, %39
  %41 = call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  store i8 %41, ptr %3, align 1, !tbaa !9
  call void @milliwait(i32 noundef 100)
  %42 = call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  store i8 %42, ptr %3, align 1, !tbaa !9
  %43 = load i32, ptr %2, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %2, align 4, !tbaa !5
  %45 = icmp sgt i32 %43, 8
  br i1 %45, label %46, label %47

46:                                               ; preds = %40
  call void @CS_H()
  store i32 -2, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %71

47:                                               ; preds = %40
  br label %48

48:                                               ; preds = %47
  %49 = load i8, ptr %3, align 1, !tbaa !9
  %50 = zext i8 %49 to i32
  %51 = icmp ne i32 %50, 0
  br i1 %51, label %40, label %52, !llvm.loop !14

52:                                               ; preds = %48
  %53 = load i8, ptr %4, align 1, !tbaa !9
  %54 = zext i8 %53 to i32
  %55 = icmp eq i32 %54, 2
  br i1 %55, label %56, label %69

56:                                               ; preds = %52
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %64, %56
  %58 = call zeroext i8 @sd_send_command(i8 noundef zeroext 58, i32 noundef 0)
  store i8 %58, ptr %3, align 1, !tbaa !9
  %59 = load i32, ptr %2, align 4, !tbaa !5
  %60 = add nsw i32 %59, 1
  store i32 %60, ptr %2, align 4, !tbaa !5
  %61 = icmp sgt i32 %59, 8
  br i1 %61, label %62, label %63

62:                                               ; preds = %57
  br label %68

63:                                               ; preds = %57
  br label %64

64:                                               ; preds = %63
  %65 = load i8, ptr %3, align 1, !tbaa !9
  %66 = zext i8 %65 to i32
  %67 = icmp ne i32 %66, 0
  br i1 %67, label %57, label %68, !llvm.loop !15

68:                                               ; preds = %64, %62
  br label %70

69:                                               ; preds = %52
  store i32 0, ptr @sdhc_card, align 4, !tbaa !5
  br label %70

70:                                               ; preds = %69, %68
  store i32 0, ptr %1, align 4
  store i32 1, ptr %6, align 4
  br label %71

71:                                               ; preds = %70, %46, %21
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  %72 = load i32, ptr %1, align 4
  ret i32 %72
}

declare void @milliwait(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @DLY_US(i32 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @MOSI_H() #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CK_H() #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CK_L() #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CS_H() #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CS_L() #3

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}
!14 = distinct !{!14, !11}
!15 = distinct !{!15, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sdhc_card = external hidden local_unnamed_addr global i32, align 4

; Function Attrs: nounwind uwtable
declare dso_local void @spi_send(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @sd_send_command(i8 noundef zeroext, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -2, 1) i32 @_sd_init() local_unnamed_addr #0 {
  tail call void @milliwait(i32 noundef 2) #3
  tail call void @CS_H()
  tail call void @MOSI_H()
  tail call void @DLY_US(i32 noundef 100)
  br label %3

1:                                                ; preds = %3
  tail call void @DLY_US(i32 noundef 100)
  tail call void @CS_L()
  tail call void @DLY_US(i32 noundef 100)
  %2 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not = icmp eq i8 %2, 1
  br i1 %.not, label %23, label %7, !llvm.loop !5

3:                                                ; preds = %0, %3
  %.022 = phi i32 [ 0, %0 ], [ %4, %3 ]
  tail call void @CK_H()
  tail call void @DLY_US(i32 noundef 10)
  tail call void @CK_L()
  tail call void @DLY_US(i32 noundef 10)
  %4 = add nuw nsw i32 %.022, 1
  %exitcond.not = icmp eq i32 %4, 200
  br i1 %exitcond.not, label %1, label %3, !llvm.loop !7

5:                                                ; preds = %21
  %6 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  tail call void @CS_H()
  br label %.loopexit

7:                                                ; preds = %1
  %8 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.1 = icmp eq i8 %8, 1
  br i1 %.not.1, label %23, label %9, !llvm.loop !5

9:                                                ; preds = %7
  %10 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.2 = icmp eq i8 %10, 1
  br i1 %.not.2, label %23, label %11, !llvm.loop !5

11:                                               ; preds = %9
  %12 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.3 = icmp eq i8 %12, 1
  br i1 %.not.3, label %23, label %13, !llvm.loop !5

13:                                               ; preds = %11
  %14 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.4 = icmp eq i8 %14, 1
  br i1 %.not.4, label %23, label %15, !llvm.loop !5

15:                                               ; preds = %13
  %16 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.5 = icmp eq i8 %16, 1
  br i1 %.not.5, label %23, label %17, !llvm.loop !5

17:                                               ; preds = %15
  %18 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.6 = icmp eq i8 %18, 1
  br i1 %.not.6, label %23, label %19, !llvm.loop !5

19:                                               ; preds = %17
  %20 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.7 = icmp eq i8 %20, 1
  br i1 %.not.7, label %23, label %21, !llvm.loop !5

21:                                               ; preds = %19
  %22 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 0, i32 noundef 0)
  %.not.8 = icmp eq i8 %22, 1
  br i1 %.not.8, label %23, label %5, !llvm.loop !5

23:                                               ; preds = %21, %19, %17, %15, %13, %11, %9, %7, %1
  tail call void @spi_send(i8 noundef zeroext -1)
  tail call void @spi_send(i8 noundef zeroext -1)
  br label %24

24:                                               ; preds = %24, %23
  %.1 = phi i32 [ 0, %23 ], [ %27, %24 ]
  %25 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 8, i32 noundef 426)
  %26 = icmp ugt i32 %.1, 8
  %27 = add nuw nsw i32 %.1, 1
  %.not17 = icmp eq i8 %25, 1
  %or.cond20 = select i1 %26, i1 true, i1 %.not17
  br i1 %or.cond20, label %.preheader21, label %24, !llvm.loop !8

.preheader21:                                     ; preds = %24
  %28 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %29 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18 = icmp eq i8 %29, 0
  br i1 %.not18, label %57, label %33, !llvm.loop !9

30:                                               ; preds = %54
  %31 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %32 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  tail call void @CS_H()
  br label %.loopexit

33:                                               ; preds = %.preheader21
  %34 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %35 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.1 = icmp eq i8 %35, 0
  br i1 %.not18.1, label %57, label %36, !llvm.loop !9

36:                                               ; preds = %33
  %37 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %38 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.2 = icmp eq i8 %38, 0
  br i1 %.not18.2, label %57, label %39, !llvm.loop !9

39:                                               ; preds = %36
  %40 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %41 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.3 = icmp eq i8 %41, 0
  br i1 %.not18.3, label %57, label %42, !llvm.loop !9

42:                                               ; preds = %39
  %43 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %44 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.4 = icmp eq i8 %44, 0
  br i1 %.not18.4, label %57, label %45, !llvm.loop !9

45:                                               ; preds = %42
  %46 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %47 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.5 = icmp eq i8 %47, 0
  br i1 %.not18.5, label %57, label %48, !llvm.loop !9

48:                                               ; preds = %45
  %49 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %50 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.6 = icmp eq i8 %50, 0
  br i1 %.not18.6, label %57, label %51, !llvm.loop !9

51:                                               ; preds = %48
  %52 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %53 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.7 = icmp eq i8 %53, 0
  br i1 %.not18.7, label %57, label %54, !llvm.loop !9

54:                                               ; preds = %51
  %55 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 55, i32 noundef 0)
  tail call void @milliwait(i32 noundef 100) #3
  %56 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 41, i32 noundef 1073741824)
  %.not18.8 = icmp eq i8 %56, 0
  br i1 %.not18.8, label %57, label %30, !llvm.loop !9

57:                                               ; preds = %54, %51, %48, %45, %42, %39, %36, %33, %.preheader21
  br i1 %26, label %62, label %.preheader

.preheader:                                       ; preds = %57, %.preheader
  %.3 = phi i32 [ %59, %.preheader ], [ 0, %57 ]
  %58 = tail call zeroext i8 @sd_send_command(i8 noundef zeroext 58, i32 noundef 0)
  %59 = add nuw nsw i32 %.3, 1
  %60 = icmp ult i32 %.3, 9
  %61 = icmp ne i8 %58, 0
  %or.cond = select i1 %60, i1 %61, i1 false
  br i1 %or.cond, label %.preheader, label %.loopexit, !llvm.loop !10

62:                                               ; preds = %57
  store i32 0, ptr @sdhc_card, align 4, !tbaa !11
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader, %62, %30, %5
  %.016 = phi i32 [ -1, %5 ], [ -2, %30 ], [ 0, %62 ], [ 0, %.preheader ]
  ret i32 %.016
}

declare void @milliwait(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @DLY_US(i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @MOSI_H() local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CK_H() local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CK_L() local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CS_H() local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @CS_L() local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}
!9 = distinct !{!9, !6}
!10 = distinct !{!10, !6}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !13, i64 0}
!13 = !{!"omnipotent char", !14, i64 0}
!14 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass