; LLVM IR from BrunoLevy/learn-fpga :: FemtoRV/FIRMWARE/EXAMPLES (cube)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@vertices = external dso_local global [8 x [3 x i32]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @init_points() #1 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 0, ptr %1, align 4, !tbaa !5
  br label %2

2:                                                ; preds = %34, %0
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = icmp slt i32 %3, 8
  br i1 %4, label %6, label %5

5:                                                ; preds = %2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %37

6:                                                ; preds = %2
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = and i32 %7, 1
  %9 = icmp ne i32 %8, 0
  %10 = zext i1 %9 to i64
  %11 = select i1 %9, i32 1024, i32 -1024
  %12 = load i32, ptr %1, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [8 x [3 x i32]], ptr @vertices, i64 0, i64 %13
  %15 = getelementptr inbounds [3 x i32], ptr %14, i64 0, i64 2
  store i32 %11, ptr %15, align 4, !tbaa !5
  %16 = load i32, ptr %1, align 4, !tbaa !5
  %17 = and i32 %16, 2
  %18 = icmp ne i32 %17, 0
  %19 = zext i1 %18 to i64
  %20 = select i1 %18, i32 1024, i32 -1024
  %21 = load i32, ptr %1, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [8 x [3 x i32]], ptr @vertices, i64 0, i64 %22
  %24 = getelementptr inbounds [3 x i32], ptr %23, i64 0, i64 1
  store i32 %20, ptr %24, align 4, !tbaa !5
  %25 = load i32, ptr %1, align 4, !tbaa !5
  %26 = and i32 %25, 4
  %27 = icmp ne i32 %26, 0
  %28 = zext i1 %27 to i64
  %29 = select i1 %27, i32 1024, i32 -1024
  %30 = load i32, ptr %1, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [8 x [3 x i32]], ptr @vertices, i64 0, i64 %31
  %33 = getelementptr inbounds [3 x i32], ptr %32, i64 0, i64 0
  store i32 %29, ptr %33, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %6
  %35 = load i32, ptr %1, align 4, !tbaa !5
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %1, align 4, !tbaa !5
  br label %2, !llvm.loop !9

37:                                               ; preds = %5
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@vertices = external dso_local local_unnamed_addr global [8 x [3 x i32]], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @init_points() local_unnamed_addr #0 {
  store <4 x i32> <i32 -1024, i32 -1024, i32 -1024, i32 -1024>, ptr @vertices, align 16, !tbaa !5
  store <4 x i32> <i32 -1024, i32 1024, i32 -1024, i32 1024>, ptr getelementptr inbounds (i8, ptr @vertices, i64 16), align 16, !tbaa !5
  store <4 x i32> <i32 -1024, i32 -1024, i32 1024, i32 1024>, ptr getelementptr inbounds (i8, ptr @vertices, i64 32), align 16, !tbaa !5
  store <4 x i32> <i32 1024, i32 -1024, i32 -1024, i32 1024>, ptr getelementptr inbounds (i8, ptr @vertices, i64 48), align 16, !tbaa !5
  store <4 x i32> <i32 -1024, i32 1024, i32 1024, i32 1024>, ptr getelementptr inbounds (i8, ptr @vertices, i64 64), align 16, !tbaa !5
  store <4 x i32> <i32 -1024, i32 1024, i32 1024, i32 1024>, ptr getelementptr inbounds (i8, ptr @vertices, i64 80), align 16, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass