; LLVM IR from cruppstahl/upscaledb :: 3rdparty/libfor (for)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @required_bits(i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @for_compress_bits(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @for_compress_unsorted(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %13 = load i32, ptr %7, align 4, !tbaa !9
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %77

16:                                               ; preds = %3
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds i32, ptr %17, i64 0
  %19 = load i32, ptr %18, align 4, !tbaa !9
  store i32 %19, ptr %10, align 4, !tbaa !9
  %20 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %20, ptr %11, align 4, !tbaa !9
  store i32 1, ptr %8, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %54, %16
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = load i32, ptr %7, align 4, !tbaa !9
  %24 = icmp ult i32 %22, %23
  br i1 %24, label %25, label %57

25:                                               ; preds = %21
  %26 = load ptr, ptr %5, align 8, !tbaa !5
  %27 = load i32, ptr %8, align 4, !tbaa !9
  %28 = zext i32 %27 to i64
  %29 = getelementptr inbounds i32, ptr %26, i64 %28
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %31 = load i32, ptr %10, align 4, !tbaa !9
  %32 = icmp ult i32 %30, %31
  br i1 %32, label %33, label %39

33:                                               ; preds = %25
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = zext i32 %35 to i64
  %37 = getelementptr inbounds i32, ptr %34, i64 %36
  %38 = load i32, ptr %37, align 4, !tbaa !9
  store i32 %38, ptr %10, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %33, %25
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = zext i32 %41 to i64
  %43 = getelementptr inbounds i32, ptr %40, i64 %42
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = load i32, ptr %11, align 4, !tbaa !9
  %46 = icmp ugt i32 %44, %45
  br i1 %46, label %47, label %53

47:                                               ; preds = %39
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = getelementptr inbounds i32, ptr %48, i64 %50
  %52 = load i32, ptr %51, align 4, !tbaa !9
  store i32 %52, ptr %11, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %47, %39
  br label %54

54:                                               ; preds = %53
  %55 = load i32, ptr %8, align 4, !tbaa !9
  %56 = add i32 %55, 1
  store i32 %56, ptr %8, align 4, !tbaa !9
  br label %21, !llvm.loop !11

57:                                               ; preds = %21
  %58 = load i32, ptr %11, align 4, !tbaa !9
  %59 = load i32, ptr %10, align 4, !tbaa !9
  %60 = sub i32 %58, %59
  %61 = call i32 @required_bits(i32 noundef %60)
  store i32 %61, ptr %9, align 4, !tbaa !9
  %62 = load i32, ptr %10, align 4, !tbaa !9
  %63 = load ptr, ptr %6, align 8, !tbaa !5
  %64 = getelementptr inbounds i8, ptr %63, i64 0
  store i32 %62, ptr %64, align 4, !tbaa !9
  %65 = load i32, ptr %9, align 4, !tbaa !9
  %66 = trunc i32 %65 to i8
  %67 = load ptr, ptr %6, align 8, !tbaa !5
  %68 = getelementptr inbounds i8, ptr %67, i64 4
  store i8 %66, ptr %68, align 1, !tbaa !13
  %69 = load ptr, ptr %5, align 8, !tbaa !5
  %70 = load ptr, ptr %6, align 8, !tbaa !5
  %71 = getelementptr inbounds i8, ptr %70, i64 5
  %72 = load i32, ptr %7, align 4, !tbaa !9
  %73 = load i32, ptr %10, align 4, !tbaa !9
  %74 = load i32, ptr %9, align 4, !tbaa !9
  %75 = call i32 @for_compress_bits(ptr noundef %69, ptr noundef %71, i32 noundef %72, i32 noundef %73, i32 noundef %74)
  %76 = add i32 5, %75
  store i32 %76, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %77

77:                                               ; preds = %57, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %78 = load i32, ptr %4, align 4
  ret i32 %78
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @required_bits(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @for_compress_bits(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @for_compress_unsorted(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  %4 = icmp eq i32 %2, 0
  br i1 %4, label %26, label %5

5:                                                ; preds = %3
  %6 = load i32, ptr %0, align 4, !tbaa !5
  %.not = icmp eq i32 %2, 1
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %5
  %wide.trip.count = zext i32 %2 to i64
  %7 = add nsw i64 %wide.trip.count, -1
  %min.iters.check = icmp ult i32 %2, 9
  br i1 %min.iters.check, label %.lr.ph.preheader47, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %7, -8
  %ind.end = or disjoint i64 %n.vec, 1
  %minmax.ident.splatinsert = insertelement <4 x i32> poison, i32 %6, i64 0
  %minmax.ident.splat = shufflevector <4 x i32> %minmax.ident.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  %minmax.ident.splatinsert42 = insertelement <4 x i32> poison, i32 %6, i64 0
  %minmax.ident.splat43 = shufflevector <4 x i32> %minmax.ident.splatinsert42, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %minmax.ident.splat, %vector.ph ], [ %12, %vector.body ]
  %vec.phi39 = phi <4 x i32> [ %minmax.ident.splat, %vector.ph ], [ %13, %vector.body ]
  %vec.phi40 = phi <4 x i32> [ %minmax.ident.splat43, %vector.ph ], [ %10, %vector.body ]
  %vec.phi41 = phi <4 x i32> [ %minmax.ident.splat43, %vector.ph ], [ %11, %vector.body ]
  %offset.idx = or disjoint i64 %index, 1
  %8 = getelementptr inbounds i32, ptr %0, i64 %offset.idx
  %9 = getelementptr inbounds i8, ptr %8, i64 16
  %wide.load = load <4 x i32>, ptr %8, align 4, !tbaa !5
  %wide.load44 = load <4 x i32>, ptr %9, align 4, !tbaa !5
  %10 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %wide.load, <4 x i32> %vec.phi40)
  %11 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %wide.load44, <4 x i32> %vec.phi41)
  %12 = tail call <4 x i32> @llvm.umax.v4i32(<4 x i32> %wide.load, <4 x i32> %vec.phi)
  %13 = tail call <4 x i32> @llvm.umax.v4i32(<4 x i32> %wide.load44, <4 x i32> %vec.phi39)
  %index.next = add nuw i64 %index, 8
  %14 = icmp eq i64 %index.next, %n.vec
  br i1 %14, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %rdx.minmax = tail call <4 x i32> @llvm.umax.v4i32(<4 x i32> %12, <4 x i32> %13)
  %15 = tail call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %rdx.minmax)
  %rdx.minmax45 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %10, <4 x i32> %11)
  %16 = tail call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %rdx.minmax45)
  %cmp.n = icmp eq i64 %7, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader47

.lr.ph.preheader47:                               ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ 1, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  %.036.ph = phi i32 [ %6, %.lr.ph.preheader ], [ %15, %middle.block ]
  %.02735.ph = phi i32 [ %6, %.lr.ph.preheader ], [ %16, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader47, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader47 ]
  %.036 = phi i32 [ %.1, %.lr.ph ], [ %.036.ph, %.lr.ph.preheader47 ]
  %.02735 = phi i32 [ %spec.select, %.lr.ph ], [ %.02735.ph, %.lr.ph.preheader47 ]
  %17 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %spec.select = tail call i32 @llvm.umin.i32(i32 %18, i32 %.02735)
  %.1 = tail call i32 @llvm.umax.i32(i32 %18, i32 %.036)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %5
  %.027.lcssa = phi i32 [ %6, %5 ], [ %16, %middle.block ], [ %spec.select, %.lr.ph ]
  %.0.lcssa = phi i32 [ %6, %5 ], [ %15, %middle.block ], [ %.1, %.lr.ph ]
  %19 = sub i32 %.0.lcssa, %.027.lcssa
  %20 = tail call i32 @required_bits(i32 noundef %19)
  store i32 %.027.lcssa, ptr %1, align 4, !tbaa !5
  %21 = trunc i32 %20 to i8
  %22 = getelementptr inbounds i8, ptr %1, i64 4
  store i8 %21, ptr %22, align 1, !tbaa !14
  %23 = getelementptr inbounds i8, ptr %1, i64 5
  %24 = tail call i32 @for_compress_bits(ptr noundef nonnull %0, ptr noundef nonnull %23, i32 noundef %2, i32 noundef %.027.lcssa, i32 noundef %20)
  %25 = add i32 %24, 5
  br label %26

26:                                               ; preds = %3, %._crit_edge
  %.029 = phi i32 [ %25, %._crit_edge ], [ 0, %3 ]
  ret i32 %.029
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.umax.v4i32(<4 x i32>, <4 x i32>) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.umax.v4i32(<4 x i32>) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32>) #2

attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,SROAPass,SimplifyCFGPass,TailCallElimPass