; LLVM IR from Derek-TH-Wang/quadruped_ctrl :: src/MPC_Ctrl/Gait.ll (ZN17MixedFrequncyGait11getMpcTableEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.MixedFrequncyGait = type { %class.Gait, float, ptr, [8 x i8], %"class.Eigen::Array", %"class.Eigen::Array.9", i32, i32, [8 x i8] }
%class.Gait = type { ptr, %"class.std::__cxx11::basic_string" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.Eigen::Array" = type { %"class.Eigen::PlainObjectBase.3" }
%"class.Eigen::PlainObjectBase.3" = type { %"class.Eigen::DenseStorage" }
%"class.Eigen::DenseStorage" = type { %"struct.Eigen::internal::plain_array" }
%"struct.Eigen::internal::plain_array" = type { [4 x i32] }
%"class.Eigen::Array.9" = type { %"class.Eigen::PlainObjectBase.10" }
%"class.Eigen::PlainObjectBase.10" = type { %"class.Eigen::DenseStorage.17" }
%"class.Eigen::DenseStorage.17" = type { %"struct.Eigen::internal::plain_array.18" }
%"struct.Eigen::internal::plain_array.18" = type { [4 x float] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN17MixedFrequncyGait11getMpcTableEv(ptr noundef nonnull align 16 dereferenceable(104) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %7 = load ptr, ptr %2, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  br label %8

8:                                                ; preds = %66, %1
  %9 = load i32, ptr %3, align 4, !tbaa !9
  %10 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 7
  %11 = load i32, ptr %10, align 4, !tbaa !11
  %12 = icmp slt i32 %9, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %8
  store i32 2, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %69

14:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %62, %14
  %16 = load i32, ptr %5, align 4, !tbaa !9
  %17 = icmp slt i32 %16, 4
  br i1 %17, label %19, label %18

18:                                               ; preds = %15
  store i32 5, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %65

19:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %20 = load i32, ptr %3, align 4, !tbaa !9
  %21 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 6
  %22 = load i32, ptr %21, align 16, !tbaa !26
  %23 = add nsw i32 %20, %22
  %24 = add nsw i32 %23, 1
  %25 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 4
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %25, i64 noundef %27)
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = srem i32 %24, %29
  store i32 %30, ptr %6, align 4, !tbaa !9
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = sitofp i32 %31 to float
  %33 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 4
  %34 = load i32, ptr %5, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %33, i64 noundef %35)
  %37 = load i32, ptr %36, align 4, !tbaa !9
  %38 = sitofp i32 %37 to float
  %39 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 1
  %40 = load float, ptr %39, align 8, !tbaa !27
  %41 = fmul float %38, %40
  %42 = fcmp olt float %32, %41
  br i1 %42, label %43, label %52

43:                                               ; preds = %19
  %44 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 2
  %45 = load ptr, ptr %44, align 16, !tbaa !28
  %46 = load i32, ptr %3, align 4, !tbaa !9
  %47 = mul nsw i32 %46, 4
  %48 = load i32, ptr %5, align 4, !tbaa !9
  %49 = add nsw i32 %47, %48
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds i32, ptr %45, i64 %50
  store i32 1, ptr %51, align 4, !tbaa !9
  br label %61

52:                                               ; preds = %19
  %53 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 2
  %54 = load ptr, ptr %53, align 16, !tbaa !28
  %55 = load i32, ptr %3, align 4, !tbaa !9
  %56 = mul nsw i32 %55, 4
  %57 = load i32, ptr %5, align 4, !tbaa !9
  %58 = add nsw i32 %56, %57
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds i32, ptr %54, i64 %59
  store i32 0, ptr %60, align 4, !tbaa !9
  br label %61

61:                                               ; preds = %52, %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %62

62:                                               ; preds = %61
  %63 = load i32, ptr %5, align 4, !tbaa !9
  %64 = add nsw i32 %63, 1
  store i32 %64, ptr %5, align 4, !tbaa !9
  br label %15, !llvm.loop !29

65:                                               ; preds = %18
  br label %66

66:                                               ; preds = %65
  %67 = load i32, ptr %3, align 4, !tbaa !9
  %68 = add nsw i32 %67, 1
  store i32 %68, ptr %3, align 4, !tbaa !9
  br label %8, !llvm.loop !31

69:                                               ; preds = %13
  %70 = getelementptr inbounds %class.MixedFrequncyGait, ptr %7, i32 0, i32 2
  %71 = load ptr, ptr %70, align 16, !tbaa !28
  ret ptr %71
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 100}
!12 = !{!"_ZTS17MixedFrequncyGait", !13, i64 0, !17, i64 40, !6, i64 48, !18, i64 64, !22, i64 80, !10, i64 96, !10, i64 100}
!13 = !{!"_ZTS4Gait", !14, i64 8}
!14 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !15, i64 0, !16, i64 8, !7, i64 16}
!15 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"float", !7, i64 0}
!18 = !{!"_ZTSN5Eigen5ArrayIiLi4ELi1ELi0ELi4ELi1EEE", !19, i64 0}
!19 = !{!"_ZTSN5Eigen15PlainObjectBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEEEE", !20, i64 0}
!20 = !{!"_ZTSN5Eigen12DenseStorageIiLi4ELi4ELi1ELi0EEE", !21, i64 0}
!21 = !{!"_ZTSN5Eigen8internal11plain_arrayIiLi4ELi0ELi16EEE", !7, i64 0}
!22 = !{!"_ZTSN5Eigen5ArrayIfLi4ELi1ELi0ELi4ELi1EEE", !23, i64 0}
!23 = !{!"_ZTSN5Eigen15PlainObjectBaseINS_5ArrayIfLi4ELi1ELi0ELi4ELi1EEEEE", !24, i64 0}
!24 = !{!"_ZTSN5Eigen12DenseStorageIfLi4ELi4ELi1ELi0EEE", !25, i64 0}
!25 = !{!"_ZTSN5Eigen8internal11plain_arrayIfLi4ELi0ELi16EEE", !7, i64 0}
!26 = !{!12, !10, i64 96}
!27 = !{!12, !17, i64 40}
!28 = !{!12, !6, i64 48}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
!31 = distinct !{!31, !30}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef ptr @_ZN17MixedFrequncyGait11getMpcTableEv(ptr noundef nonnull align 16 dereferenceable(104) %0) unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 100
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.preheader.lr.ph, label %.._crit_edge_crit_edge

.._crit_edge_crit_edge:                           ; preds = %1
  %.phi.trans.insert = getelementptr inbounds i8, ptr %0, i64 48
  %.pre = load ptr, ptr %.phi.trans.insert, align 16, !tbaa !24
  br label %._crit_edge

.preheader.lr.ph:                                 ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 96
  %6 = getelementptr inbounds i8, ptr %0, i64 64
  %7 = getelementptr inbounds i8, ptr %0, i64 40
  %8 = getelementptr inbounds i8, ptr %0, i64 48
  br label %.preheader

.preheader:                                       ; preds = %.preheader.lr.ph, %.preheader
  %indvars.iv = phi i64 [ 0, %.preheader.lr.ph ], [ %indvars.iv.next, %.preheader ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %9 = shl i64 %indvars.iv, 2
  %10 = and i64 %9, 4294967292
  %11 = load i32, ptr %5, align 16, !tbaa !25
  %12 = trunc nuw nsw i64 %indvars.iv.next to i32
  %13 = add i32 %11, %12
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 0)
  %15 = load i32, ptr %14, align 4, !tbaa !26
  %16 = srem i32 %13, %15
  %17 = sitofp i32 %16 to float
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 0)
  %19 = load i32, ptr %18, align 4, !tbaa !26
  %20 = sitofp i32 %19 to float
  %21 = load float, ptr %7, align 8, !tbaa !27
  %22 = fmul float %21, %20
  %23 = fcmp ogt float %22, %17
  %24 = load ptr, ptr %8, align 16, !tbaa !24
  %25 = getelementptr inbounds i32, ptr %24, i64 %10
  %. = zext i1 %23 to i32
  store i32 %., ptr %25, align 4, !tbaa !26
  %26 = load i32, ptr %5, align 16, !tbaa !25
  %27 = add i32 %26, %12
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 1)
  %29 = load i32, ptr %28, align 4, !tbaa !26
  %30 = srem i32 %27, %29
  %31 = sitofp i32 %30 to float
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 1)
  %33 = load i32, ptr %32, align 4, !tbaa !26
  %34 = sitofp i32 %33 to float
  %35 = load float, ptr %7, align 8, !tbaa !27
  %36 = fmul float %35, %34
  %37 = fcmp ogt float %36, %31
  %.sink17 = zext i1 %37 to i32
  %38 = load ptr, ptr %8, align 16, !tbaa !24
  %39 = or disjoint i64 %10, 1
  %40 = getelementptr inbounds i32, ptr %38, i64 %39
  store i32 %.sink17, ptr %40, align 4, !tbaa !26
  %41 = load i32, ptr %5, align 16, !tbaa !25
  %42 = add i32 %41, %12
  %43 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 2)
  %44 = load i32, ptr %43, align 4, !tbaa !26
  %45 = srem i32 %42, %44
  %46 = sitofp i32 %45 to float
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 2)
  %48 = load i32, ptr %47, align 4, !tbaa !26
  %49 = sitofp i32 %48 to float
  %50 = load float, ptr %7, align 8, !tbaa !27
  %51 = fmul float %50, %49
  %52 = fcmp ogt float %51, %46
  %.sink21 = zext i1 %52 to i32
  %53 = load ptr, ptr %8, align 16, !tbaa !24
  %54 = or disjoint i64 %10, 2
  %55 = getelementptr inbounds i32, ptr %53, i64 %54
  store i32 %.sink21, ptr %55, align 4, !tbaa !26
  %56 = load i32, ptr %5, align 16, !tbaa !25
  %57 = add i32 %56, %12
  %58 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 3)
  %59 = load i32, ptr %58, align 4, !tbaa !26
  %60 = srem i32 %57, %59
  %61 = sitofp i32 %60 to float
  %62 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN5Eigen15DenseCoeffsBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEELi1EEixEl(ptr noundef nonnull align 1 dereferenceable(1) %6, i64 noundef 3)
  %63 = load i32, ptr %62, align 4, !tbaa !26
  %64 = sitofp i32 %63 to float
  %65 = load float, ptr %7, align 8, !tbaa !27
  %66 = fmul float %65, %64
  %67 = fcmp ogt float %66, %61
  %.sink25 = zext i1 %67 to i32
  %68 = load ptr, ptr %8, align 16, !tbaa !24
  %69 = or disjoint i64 %10, 3
  %70 = getelementptr inbounds i32, ptr %68, i64 %69
  store i32 %.sink25, ptr %70, align 4, !tbaa !26
  %71 = load i32, ptr %2, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = icmp slt i64 %indvars.iv.next, %72
  br i1 %73, label %.preheader, label %._crit_edge, !llvm.loop !28

._crit_edge:                                      ; preds = %.preheader, %.._crit_edge_crit_edge
  %74 = phi ptr [ %.pre, %.._crit_edge_crit_edge ], [ %68, %.preheader ]
  ret ptr %74
}

attributes #0 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !23, i64 100}
!6 = !{!"_ZTS17MixedFrequncyGait", !7, i64 0, !14, i64 40, !10, i64 48, !15, i64 64, !19, i64 80, !23, i64 96, !23, i64 100}
!7 = !{!"_ZTS4Gait", !8, i64 8}
!8 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !9, i64 0, !13, i64 8, !11, i64 16}
!9 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !10, i64 0}
!10 = !{!"any pointer", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C++ TBAA"}
!13 = !{!"long", !11, i64 0}
!14 = !{!"float", !11, i64 0}
!15 = !{!"_ZTSN5Eigen5ArrayIiLi4ELi1ELi0ELi4ELi1EEE", !16, i64 0}
!16 = !{!"_ZTSN5Eigen15PlainObjectBaseINS_5ArrayIiLi4ELi1ELi0ELi4ELi1EEEEE", !17, i64 0}
!17 = !{!"_ZTSN5Eigen12DenseStorageIiLi4ELi4ELi1ELi0EEE", !18, i64 0}
!18 = !{!"_ZTSN5Eigen8internal11plain_arrayIiLi4ELi0ELi16EEE", !11, i64 0}
!19 = !{!"_ZTSN5Eigen5ArrayIfLi4ELi1ELi0ELi4ELi1EEE", !20, i64 0}
!20 = !{!"_ZTSN5Eigen15PlainObjectBaseINS_5ArrayIfLi4ELi1ELi0ELi4ELi1EEEEE", !21, i64 0}
!21 = !{!"_ZTSN5Eigen12DenseStorageIfLi4ELi4ELi1ELi0EEE", !22, i64 0}
!22 = !{!"_ZTSN5Eigen8internal11plain_arrayIfLi4ELi0ELi16EEE", !11, i64 0}
!23 = !{!"int", !11, i64 0}
!24 = !{!6, !10, i64 48}
!25 = !{!6, !23, i64 96}
!26 = !{!23, !23, i64 0}
!27 = !{!6, !14, i64 40}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass