; LLVM IR from modlfo/AudioEngine :: AudioEngine/JuceLibraryCode (juce_gui_basics)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197), i32 noundef, i32 noundef, i32 noundef, i32 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIPN4juce6ButtonEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS6_ESt18is_move_assignableIS6_EEE5valueEvE4typeERS6_SF_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4juce14LookAndFeel_V129positionDocumentWindowButtonsERNS_14DocumentWindowEiiiiPNS_6ButtonES4_S4_b(ptr noundef nonnull align 8 dereferenceable(328) %0, ptr noundef nonnull align 8 dereferenceable(400) %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, i1 noundef zeroext %9) unnamed_addr #1 align 2 {
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca i8, align 1
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  store ptr %0, ptr %11, align 8, !tbaa !5
  store ptr %1, ptr %12, align 8, !tbaa !5
  store i32 %2, ptr %13, align 4, !tbaa !9
  store i32 %3, ptr %14, align 4, !tbaa !9
  store i32 %4, ptr %15, align 4, !tbaa !9
  store i32 %5, ptr %16, align 4, !tbaa !9
  store ptr %6, ptr %17, align 8, !tbaa !5
  store ptr %7, ptr %18, align 8, !tbaa !5
  store ptr %8, ptr %19, align 8, !tbaa !5
  %23 = zext i1 %9 to i8
  store i8 %23, ptr %20, align 1, !tbaa !11
  %24 = load ptr, ptr %11, align 8
  %25 = load i32, ptr %16, align 4, !tbaa !9
  %26 = sdiv i32 %25, 8
  %27 = load i32, ptr %14, align 4, !tbaa !9
  %28 = add nsw i32 %27, %26
  store i32 %28, ptr %14, align 4, !tbaa !9
  %29 = load i32, ptr %16, align 4, !tbaa !9
  %30 = sdiv i32 %29, 4
  %31 = load i32, ptr %16, align 4, !tbaa !9
  %32 = sub nsw i32 %31, %30
  store i32 %32, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  %33 = load i32, ptr %16, align 4, !tbaa !9
  store i32 %33, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  %34 = load i8, ptr %20, align 1, !tbaa !11, !range !13, !noundef !14
  %35 = trunc i8 %34 to i1
  br i1 %35, label %36, label %39

36:                                               ; preds = %10
  %37 = load i32, ptr %13, align 4, !tbaa !9
  %38 = add nsw i32 %37, 4
  br label %46

39:                                               ; preds = %10
  %40 = load i32, ptr %13, align 4, !tbaa !9
  %41 = load i32, ptr %15, align 4, !tbaa !9
  %42 = add nsw i32 %40, %41
  %43 = load i32, ptr %21, align 4, !tbaa !9
  %44 = sub nsw i32 %42, %43
  %45 = sub nsw i32 %44, 4
  br label %46

46:                                               ; preds = %39, %36
  %47 = phi i32 [ %38, %36 ], [ %45, %39 ]
  store i32 %47, ptr %22, align 4, !tbaa !9
  %48 = load ptr, ptr %19, align 8, !tbaa !5
  %49 = icmp ne ptr %48, null
  br i1 %49, label %50, label %73

50:                                               ; preds = %46
  %51 = load ptr, ptr %19, align 8, !tbaa !5
  %52 = load i32, ptr %22, align 4, !tbaa !9
  %53 = load i32, ptr %14, align 4, !tbaa !9
  %54 = load i32, ptr %21, align 4, !tbaa !9
  %55 = load i32, ptr %16, align 4, !tbaa !9
  call void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197) %51, i32 noundef %52, i32 noundef %53, i32 noundef %54, i32 noundef %55)
  %56 = load i8, ptr %20, align 1, !tbaa !11, !range !13, !noundef !14
  %57 = trunc i8 %56 to i1
  br i1 %57, label %58, label %63

58:                                               ; preds = %50
  %59 = load i32, ptr %21, align 4, !tbaa !9
  %60 = load i32, ptr %21, align 4, !tbaa !9
  %61 = sdiv i32 %60, 5
  %62 = add nsw i32 %59, %61
  br label %69

63:                                               ; preds = %50
  %64 = load i32, ptr %21, align 4, !tbaa !9
  %65 = load i32, ptr %21, align 4, !tbaa !9
  %66 = sdiv i32 %65, 5
  %67 = add nsw i32 %64, %66
  %68 = sub nsw i32 0, %67
  br label %69

69:                                               ; preds = %63, %58
  %70 = phi i32 [ %62, %58 ], [ %68, %63 ]
  %71 = load i32, ptr %22, align 4, !tbaa !9
  %72 = add nsw i32 %71, %70
  store i32 %72, ptr %22, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %69, %46
  %74 = load i8, ptr %20, align 1, !tbaa !11, !range !13, !noundef !14
  %75 = trunc i8 %74 to i1
  br i1 %75, label %76, label %77

76:                                               ; preds = %73
  call void @_ZSt4swapIPN4juce6ButtonEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS6_ESt18is_move_assignableIS6_EEE5valueEvE4typeERS6_SF_(ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %18) #3
  br label %77

77:                                               ; preds = %76, %73
  %78 = load ptr, ptr %18, align 8, !tbaa !5
  %79 = icmp ne ptr %78, null
  br i1 %79, label %80, label %98

80:                                               ; preds = %77
  %81 = load ptr, ptr %18, align 8, !tbaa !5
  %82 = load i32, ptr %22, align 4, !tbaa !9
  %83 = load i32, ptr %14, align 4, !tbaa !9
  %84 = sub nsw i32 %83, 2
  %85 = load i32, ptr %21, align 4, !tbaa !9
  %86 = load i32, ptr %16, align 4, !tbaa !9
  call void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197) %81, i32 noundef %82, i32 noundef %84, i32 noundef %85, i32 noundef %86)
  %87 = load i8, ptr %20, align 1, !tbaa !11, !range !13, !noundef !14
  %88 = trunc i8 %87 to i1
  br i1 %88, label %89, label %91

89:                                               ; preds = %80
  %90 = load i32, ptr %21, align 4, !tbaa !9
  br label %94

91:                                               ; preds = %80
  %92 = load i32, ptr %21, align 4, !tbaa !9
  %93 = sub nsw i32 0, %92
  br label %94

94:                                               ; preds = %91, %89
  %95 = phi i32 [ %90, %89 ], [ %93, %91 ]
  %96 = load i32, ptr %22, align 4, !tbaa !9
  %97 = add nsw i32 %96, %95
  store i32 %97, ptr %22, align 4, !tbaa !9
  br label %98

98:                                               ; preds = %94, %77
  %99 = load ptr, ptr %17, align 8, !tbaa !5
  %100 = icmp ne ptr %99, null
  br i1 %100, label %101, label %108

101:                                              ; preds = %98
  %102 = load ptr, ptr %17, align 8, !tbaa !5
  %103 = load i32, ptr %22, align 4, !tbaa !9
  %104 = load i32, ptr %14, align 4, !tbaa !9
  %105 = sub nsw i32 %104, 2
  %106 = load i32, ptr %21, align 4, !tbaa !9
  %107 = load i32, ptr %16, align 4, !tbaa !9
  call void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197) %102, i32 noundef %103, i32 noundef %105, i32 noundef %106, i32 noundef %107)
  br label %108

108:                                              ; preds = %101, %98
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197), i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIPN4juce6ButtonEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS6_ESt18is_move_assignableIS6_EEE5valueEvE4typeERS6_SF_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4juce14LookAndFeel_V129positionDocumentWindowButtonsERNS_14DocumentWindowEiiiiPNS_6ButtonES4_S4_b(ptr nocapture noundef nonnull readnone align 8 dereferenceable(328) %0, ptr nocapture noundef nonnull readnone align 8 dereferenceable(400) %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, i1 noundef zeroext %9) unnamed_addr #0 align 2 {
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  store ptr %6, ptr %11, align 8, !tbaa !5
  store ptr %7, ptr %12, align 8, !tbaa !5
  %13 = sdiv i32 %5, 8
  %14 = add nsw i32 %13, %3
  %.neg = sdiv i32 %5, -4
  %15 = add i32 %.neg, %5
  %16 = sub i32 0, %15
  %17 = add nsw i32 %2, 4
  %18 = add i32 %2, -4
  %19 = add i32 %18, %4
  %20 = sub i32 %19, %15
  %21 = select i1 %9, i32 %17, i32 %20
  %.not = icmp eq ptr %8, null
  br i1 %.not, label %30, label %22

22:                                               ; preds = %10
  tail call void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197) %8, i32 noundef %21, i32 noundef %14, i32 noundef %15, i32 noundef %15)
  br i1 %9, label %23, label %26

23:                                               ; preds = %22
  %24 = sdiv i32 %15, 5
  %25 = add nsw i32 %24, %15
  br label %27

26:                                               ; preds = %22
  %.neg38 = sdiv i32 %15, -5
  %.neg39 = sub i32 %.neg38, %15
  br label %27

27:                                               ; preds = %26, %23
  %28 = phi i32 [ %25, %23 ], [ %.neg39, %26 ]
  %29 = add nsw i32 %28, %21
  br label %30

30:                                               ; preds = %27, %10
  %.0 = phi i32 [ %29, %27 ], [ %21, %10 ]
  br i1 %9, label %31, label %32

31:                                               ; preds = %30
  call void @_ZSt4swapIPN4juce6ButtonEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS6_ESt18is_move_assignableIS6_EEE5valueEvE4typeERS6_SF_(ptr noundef nonnull align 8 dereferenceable(8) %11, ptr noundef nonnull align 8 dereferenceable(8) %12) #2
  %.pre = load ptr, ptr %12, align 8, !tbaa !5
  br label %32

32:                                               ; preds = %31, %30
  %33 = phi ptr [ %.pre, %31 ], [ %7, %30 ]
  %.not40 = icmp eq ptr %33, null
  br i1 %.not40, label %38, label %34

34:                                               ; preds = %32
  %35 = add nsw i32 %14, -2
  call void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197) %33, i32 noundef %.0, i32 noundef %35, i32 noundef %15, i32 noundef %15)
  %36 = select i1 %9, i32 %15, i32 %16
  %37 = add nsw i32 %.0, %36
  br label %38

38:                                               ; preds = %34, %32
  %.1 = phi i32 [ %37, %34 ], [ %.0, %32 ]
  %39 = load ptr, ptr %11, align 8, !tbaa !5
  %.not41 = icmp eq ptr %39, null
  br i1 %.not41, label %42, label %40

40:                                               ; preds = %38
  %41 = add nsw i32 %14, -2
  call void @_ZN4juce9Component9setBoundsEiiii(ptr noundef nonnull align 8 dereferenceable(197) %39, i32 noundef %.1, i32 noundef %41, i32 noundef %15, i32 noundef %15)
  br label %42

42:                                               ; preds = %40, %38
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass