; LLVM IR from intel/qpl :: sources/c_api/compression_operations (bit_writer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.bit_writer_t = type { i64, i32, ptr, ptr, ptr, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @bit_writer_write_bits(ptr noundef %0, i64 noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !11
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %struct.bit_writer_t, ptr %9, i32 0, i32 5
  %11 = load i32, ptr %10, align 8, !tbaa !13
  %12 = icmp eq i32 0, %11
  br i1 %12, label %13, label %51

13:                                               ; preds = %3
  %14 = load i64, ptr %5, align 8, !tbaa !9
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.bit_writer_t, ptr %15, i32 0, i32 1
  %17 = load i32, ptr %16, align 8, !tbaa !15
  %18 = zext i32 %17 to i64
  %19 = shl i64 %14, %18
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.bit_writer_t, ptr %20, i32 0, i32 0
  %22 = load i64, ptr %21, align 8, !tbaa !16
  %23 = or i64 %22, %19
  store i64 %23, ptr %21, align 8, !tbaa !16
  %24 = load i32, ptr %6, align 4, !tbaa !11
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.bit_writer_t, ptr %25, i32 0, i32 1
  %27 = load i32, ptr %26, align 8, !tbaa !15
  %28 = add i32 %27, %24
  store i32 %28, ptr %26, align 8, !tbaa !15
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.bit_writer_t, ptr %29, i32 0, i32 1
  %31 = load i32, ptr %30, align 8, !tbaa !15
  %32 = and i32 %31, -8
  store i32 %32, ptr %7, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %33 = load i32, ptr %7, align 4, !tbaa !11
  %34 = udiv i32 %33, 8
  store i32 %34, ptr %8, align 4, !tbaa !11
  %35 = load ptr, ptr %4, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.bit_writer_t, ptr %35, i32 0, i32 2
  %37 = load ptr, ptr %36, align 8, !tbaa !17
  %38 = load i32, ptr %8, align 4, !tbaa !11
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds i8, ptr %37, i64 %39
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.bit_writer_t, ptr %41, i32 0, i32 3
  %43 = load ptr, ptr %42, align 8, !tbaa !18
  %44 = icmp uge ptr %40, %43
  br i1 %44, label %45, label %48

45:                                               ; preds = %13
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.bit_writer_t, ptr %46, i32 0, i32 5
  store i32 1, ptr %47, align 8, !tbaa !13
  br label %50

48:                                               ; preds = %13
  %49 = load ptr, ptr %4, align 8, !tbaa !5
  call void @own_bit_writer_flush_bits(ptr noundef %49)
  br label %50

50:                                               ; preds = %48, %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  br label %51

51:                                               ; preds = %50, %3
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @own_bit_writer_flush_bits(ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !12, i64 40}
!14 = !{!"", !10, i64 0, !12, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !12, i64 40}
!15 = !{!14, !12, i64 8}
!16 = !{!14, !10, i64 0}
!17 = !{!14, !6, i64 16}
!18 = !{!14, !6, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @bit_writer_write_bits(ptr noundef %0, i64 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 40
  %5 = load i32, ptr %4, align 8, !tbaa !5
  %6 = icmp eq i32 %5, 0
  br i1 %6, label %7, label %24

7:                                                ; preds = %3
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  %9 = load i32, ptr %8, align 8, !tbaa !12
  %10 = zext nneg i32 %9 to i64
  %11 = shl i64 %1, %10
  %12 = load i64, ptr %0, align 8, !tbaa !13
  %13 = or i64 %11, %12
  store i64 %13, ptr %0, align 8, !tbaa !13
  %14 = add i32 %9, %2
  store i32 %14, ptr %8, align 8, !tbaa !12
  %15 = lshr i32 %14, 3
  %16 = getelementptr inbounds i8, ptr %0, i64 16
  %17 = load ptr, ptr %16, align 8, !tbaa !14
  %18 = zext nneg i32 %15 to i64
  %19 = getelementptr inbounds i8, ptr %17, i64 %18
  %20 = getelementptr inbounds i8, ptr %0, i64 24
  %21 = load ptr, ptr %20, align 8, !tbaa !15
  %.not = icmp ult ptr %19, %21
  br i1 %.not, label %23, label %22

22:                                               ; preds = %7
  store i32 1, ptr %4, align 8, !tbaa !5
  br label %24

23:                                               ; preds = %7
  tail call void @own_bit_writer_flush_bits(ptr noundef nonnull %0)
  br label %24

24:                                               ; preds = %22, %23, %3
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @own_bit_writer_flush_bits(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 40}
!6 = !{!"", !7, i64 0, !10, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !10, i64 40}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !7, i64 0}
!14 = !{!6, !11, i64 16}
!15 = !{!6, !11, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass