; LLVM IR from AdarshGaur/Competitive-Programming :: Codeforces/Codeforces Round #839 (Div. 3)/B. Matrix Rotation.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [4 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #0 {
  %1 = alloca i64, align 8
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i8, align 1
  %9 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
  store i64 2, ptr %1, align 8, !tbaa !5
  %10 = load i64, ptr %1, align 8, !tbaa !5
  %11 = load i64, ptr %1, align 8, !tbaa !5
  %12 = call ptr @llvm.stacksave.p0()
  store ptr %12, ptr %2, align 8
  %13 = mul nuw i64 %10, %11
  %14 = alloca i64, i64 %13, align 16
  store i64 %10, ptr %3, align 8
  store i64 %11, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  store i64 0, ptr %5, align 8, !tbaa !5
  br label %15

15:                                               ; preds = %37, %0
  %16 = load i64, ptr %5, align 8, !tbaa !5
  %17 = load i64, ptr %1, align 8, !tbaa !5
  %18 = icmp slt i64 %16, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %15
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  br label %40

20:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store i64 0, ptr %7, align 8, !tbaa !5
  br label %21

21:                                               ; preds = %33, %20
  %22 = load i64, ptr %7, align 8, !tbaa !5
  %23 = load i64, ptr %1, align 8, !tbaa !5
  %24 = icmp slt i64 %22, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %21
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  br label %36

26:                                               ; preds = %21
  %27 = load i64, ptr %5, align 8, !tbaa !5
  %28 = mul nsw i64 %27, %11
  %29 = getelementptr inbounds i64, ptr %14, i64 %28
  %30 = load i64, ptr %7, align 8, !tbaa !5
  %31 = getelementptr inbounds i64, ptr %29, i64 %30
  %32 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %31)
  br label %33

33:                                               ; preds = %26
  %34 = load i64, ptr %7, align 8, !tbaa !5
  %35 = add nsw i64 %34, 1
  store i64 %35, ptr %7, align 8, !tbaa !5
  br label %21, !llvm.loop !9

36:                                               ; preds = %25
  br label %37

37:                                               ; preds = %36
  %38 = load i64, ptr %5, align 8, !tbaa !5
  %39 = add nsw i64 %38, 1
  store i64 %39, ptr %5, align 8, !tbaa !5
  br label %15, !llvm.loop !11

40:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #5
  store i8 0, ptr %8, align 1, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  store i64 0, ptr %9, align 8, !tbaa !5
  br label %41

41:                                               ; preds = %105, %40
  %42 = load i64, ptr %9, align 8, !tbaa !5
  %43 = icmp slt i64 %42, 4
  br i1 %43, label %45, label %44

44:                                               ; preds = %41
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %108

45:                                               ; preds = %41
  %46 = mul nsw i64 0, %11
  %47 = getelementptr inbounds i64, ptr %14, i64 %46
  %48 = getelementptr inbounds i64, ptr %47, i64 0
  %49 = mul nsw i64 0, %11
  %50 = getelementptr inbounds i64, ptr %14, i64 %49
  %51 = getelementptr inbounds i64, ptr %50, i64 1
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %48, ptr noundef nonnull align 8 dereferenceable(8) %51) #5
  %52 = mul nsw i64 0, %11
  %53 = getelementptr inbounds i64, ptr %14, i64 %52
  %54 = getelementptr inbounds i64, ptr %53, i64 0
  %55 = mul nsw i64 1, %11
  %56 = getelementptr inbounds i64, ptr %14, i64 %55
  %57 = getelementptr inbounds i64, ptr %56, i64 0
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %54, ptr noundef nonnull align 8 dereferenceable(8) %57) #5
  %58 = mul nsw i64 1, %11
  %59 = getelementptr inbounds i64, ptr %14, i64 %58
  %60 = getelementptr inbounds i64, ptr %59, i64 0
  %61 = mul nsw i64 1, %11
  %62 = getelementptr inbounds i64, ptr %14, i64 %61
  %63 = getelementptr inbounds i64, ptr %62, i64 1
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %60, ptr noundef nonnull align 8 dereferenceable(8) %63) #5
  %64 = mul nsw i64 0, %11
  %65 = getelementptr inbounds i64, ptr %14, i64 %64
  %66 = getelementptr inbounds i64, ptr %65, i64 0
  %67 = load i64, ptr %66, align 8, !tbaa !5
  %68 = mul nsw i64 0, %11
  %69 = getelementptr inbounds i64, ptr %14, i64 %68
  %70 = getelementptr inbounds i64, ptr %69, i64 1
  %71 = load i64, ptr %70, align 8, !tbaa !5
  %72 = icmp slt i64 %67, %71
  br i1 %72, label %73, label %104

73:                                               ; preds = %45
  %74 = mul nsw i64 1, %11
  %75 = getelementptr inbounds i64, ptr %14, i64 %74
  %76 = getelementptr inbounds i64, ptr %75, i64 0
  %77 = load i64, ptr %76, align 8, !tbaa !5
  %78 = mul nsw i64 1, %11
  %79 = getelementptr inbounds i64, ptr %14, i64 %78
  %80 = getelementptr inbounds i64, ptr %79, i64 1
  %81 = load i64, ptr %80, align 8, !tbaa !5
  %82 = icmp slt i64 %77, %81
  br i1 %82, label %83, label %104

83:                                               ; preds = %73
  %84 = mul nsw i64 0, %11
  %85 = getelementptr inbounds i64, ptr %14, i64 %84
  %86 = getelementptr inbounds i64, ptr %85, i64 0
  %87 = load i64, ptr %86, align 8, !tbaa !5
  %88 = mul nsw i64 1, %11
  %89 = getelementptr inbounds i64, ptr %14, i64 %88
  %90 = getelementptr inbounds i64, ptr %89, i64 0
  %91 = load i64, ptr %90, align 8, !tbaa !5
  %92 = icmp slt i64 %87, %91
  br i1 %92, label %93, label %104

93:                                               ; preds = %83
  %94 = mul nsw i64 0, %11
  %95 = getelementptr inbounds i64, ptr %14, i64 %94
  %96 = getelementptr inbounds i64, ptr %95, i64 1
  %97 = load i64, ptr %96, align 8, !tbaa !5
  %98 = mul nsw i64 1, %11
  %99 = getelementptr inbounds i64, ptr %14, i64 %98
  %100 = getelementptr inbounds i64, ptr %99, i64 1
  %101 = load i64, ptr %100, align 8, !tbaa !5
  %102 = icmp slt i64 %97, %101
  br i1 %102, label %103, label %104

103:                                              ; preds = %93
  store i8 1, ptr %8, align 1, !tbaa !12
  br label %104

104:                                              ; preds = %103, %93, %83, %73, %45
  br label %105

105:                                              ; preds = %104
  %106 = load i64, ptr %9, align 8, !tbaa !5
  %107 = add nsw i64 %106, 1
  store i64 %107, ptr %9, align 8, !tbaa !5
  br label %41, !llvm.loop !14

108:                                              ; preds = %44
  %109 = load i8, ptr %8, align 1, !tbaa !12, !range !15, !noundef !16
  %110 = trunc i8 %109 to i1
  %111 = zext i1 %110 to i64
  %112 = select i1 %110, ptr @.str, ptr @.str.1
  %113 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef %112)
  %114 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %113, ptr noundef @.str.2)
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  %115 = load ptr, ptr %2, align 8
  call void @llvm.stackrestore.p0(ptr %115)
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind willreturn }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = !{!13, !13, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = distinct !{!14, !10}
!15 = !{i8 0, i8 2}
!16 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [4 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #0 {
.preheader21:
  %0 = alloca [4 x i64], align 16
  %1 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %0)
  %2 = getelementptr inbounds i8, ptr %0, i64 8
  %3 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %4 = getelementptr inbounds i8, ptr %0, i64 16
  %5 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %4)
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %6)
  %8 = getelementptr inbounds i8, ptr %0, i64 24
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %2) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %4) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %8) #3
  %9 = load i64, ptr %0, align 16, !tbaa !5
  %10 = load i64, ptr %2, align 8, !tbaa !5
  %11 = icmp slt i64 %9, %10
  br i1 %11, label %12, label %18

12:                                               ; preds = %.preheader21
  %13 = load i64, ptr %4, align 16, !tbaa !5
  %14 = load i64, ptr %8, align 8, !tbaa !5
  %15 = icmp slt i64 %13, %14
  %16 = icmp slt i64 %9, %13
  %or.cond = and i1 %16, %15
  %17 = icmp slt i64 %10, %14
  %or.cond20 = and i1 %17, %or.cond
  br label %18

18:                                               ; preds = %12, %.preheader21
  %.1 = phi i1 [ false, %.preheader21 ], [ %or.cond20, %12 ]
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %2) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %4) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %8) #3
  %19 = load i64, ptr %0, align 16, !tbaa !5
  %20 = load i64, ptr %2, align 8, !tbaa !5
  %21 = icmp slt i64 %19, %20
  br i1 %21, label %22, label %28

22:                                               ; preds = %18
  %23 = load i64, ptr %4, align 16, !tbaa !5
  %24 = load i64, ptr %8, align 8, !tbaa !5
  %25 = icmp slt i64 %23, %24
  %26 = icmp slt i64 %19, %23
  %or.cond.1 = and i1 %26, %25
  %27 = icmp slt i64 %20, %24
  %or.cond20.1 = and i1 %27, %or.cond.1
  %spec.select.1 = select i1 %or.cond20.1, i1 true, i1 %.1
  br label %28

28:                                               ; preds = %22, %18
  %.1.1 = phi i1 [ %.1, %18 ], [ %spec.select.1, %22 ]
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %2) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %4) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %8) #3
  %29 = load i64, ptr %0, align 16, !tbaa !5
  %30 = load i64, ptr %2, align 8, !tbaa !5
  %31 = icmp slt i64 %29, %30
  br i1 %31, label %32, label %38

32:                                               ; preds = %28
  %33 = load i64, ptr %4, align 16, !tbaa !5
  %34 = load i64, ptr %8, align 8, !tbaa !5
  %35 = icmp slt i64 %33, %34
  %36 = icmp slt i64 %29, %33
  %or.cond.2 = and i1 %36, %35
  %37 = icmp slt i64 %30, %34
  %or.cond20.2 = and i1 %37, %or.cond.2
  %spec.select.2 = select i1 %or.cond20.2, i1 true, i1 %.1.1
  br label %38

38:                                               ; preds = %32, %28
  %.1.2 = phi i1 [ %.1.1, %28 ], [ %spec.select.2, %32 ]
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %2) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(8) %4) #3
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 8 dereferenceable(8) %8) #3
  %39 = load i64, ptr %0, align 16, !tbaa !5
  %40 = load i64, ptr %2, align 8, !tbaa !5
  %41 = icmp slt i64 %39, %40
  br i1 %41, label %42, label %48

42:                                               ; preds = %38
  %43 = load i64, ptr %4, align 16, !tbaa !5
  %44 = load i64, ptr %8, align 8, !tbaa !5
  %45 = icmp slt i64 %43, %44
  %46 = icmp slt i64 %39, %43
  %or.cond.3 = and i1 %46, %45
  %47 = icmp slt i64 %40, %44
  %or.cond20.3 = and i1 %47, %or.cond.3
  %spec.select.3 = select i1 %or.cond20.3, i1 true, i1 %.1.2
  br label %48

48:                                               ; preds = %42, %38
  %.1.3 = phi i1 [ %.1.2, %38 ], [ %spec.select.3, %42 ]
  %49 = select i1 %.1.3, ptr @.str, ptr @.str.1
  %50 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull %49)
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %50, ptr noundef nonnull @.str.2)
  ret void
}

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,ReassociatePass,SROAPass,SimplifyCFGPass