; LLVM IR from fast-pack/SIMDCompressionAndIntersection :: advancedbenchmarking/src/budgetedtest.ll (ZN18SIMDCompressionLib8Skipping4loadEPKjj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }
%"class.SIMDCompressionLib::Skipping" = type <{ i32, [4 x i8], %"class.std::vector", %"class.std::vector.0", i32, [4 x i8] }>
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str = external hidden unnamed_addr constant [38 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [93 x i8], align 1
@__PRETTY_FUNCTION__._ZN18SIMDCompressionLib8Skipping4loadEPKjj = external hidden unnamed_addr constant [68 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN18SIMDCompressionLib8Skipping4loadEPKjj(ptr noundef nonnull align 8 dereferenceable(60) %0, ptr noundef %1, i32 noundef %2) #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"struct.std::pair", align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  %19 = load ptr, ptr %4, align 8
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 4
  store i32 %20, ptr %21, align 8, !tbaa !11
  %22 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 4
  %23 = load i32, ptr %22, align 8, !tbaa !11
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %25, label %26

25:                                               ; preds = %3
  br label %255

26:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %27 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 4
  %28 = load i32, ptr %27, align 8, !tbaa !11
  %29 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %30 = load i32, ptr %29, align 8, !tbaa !21
  %31 = shl i32 1, %30
  %32 = add i32 %28, %31
  %33 = sub i32 %32, 1
  %34 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %35 = load i32, ptr %34, align 8, !tbaa !21
  %36 = shl i32 1, %35
  %37 = udiv i32 %33, %36
  store i32 %37, ptr %7, align 4, !tbaa !9
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %40 = load i32, ptr %39, align 8, !tbaa !21
  %41 = shl i32 %38, %40
  %42 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 4
  %43 = load i32, ptr %42, align 8, !tbaa !11
  %44 = icmp uge i32 %41, %43
  br i1 %44, label %45, label %46

45:                                               ; preds = %26
  br label %48

46:                                               ; preds = %26
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 232, ptr noundef @__PRETTY_FUNCTION__._ZN18SIMDCompressionLib8Skipping4loadEPKjj) #5
  unreachable

47:                                               ; No predecessors!
  br label %48

48:                                               ; preds = %47, %45
  %49 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 3
  %50 = load i32, ptr %7, align 4, !tbaa !9
  %51 = zext i32 %50 to i64
  call void @_ZNSt6vectorISt4pairIjjESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51)
  %52 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 2
  %53 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 4
  %54 = load i32, ptr %53, align 8, !tbaa !11
  %55 = mul i32 5, %54
  %56 = zext i32 %55 to i64
  call void @_ZNSt6vectorIhSaIhEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %56)
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #4
  %57 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 2
  %58 = call noundef ptr @_ZNSt6vectorIhSaIhEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %57) #4
  store ptr %58, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %59 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %59, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %242, %48
  %61 = load i32, ptr %11, align 4, !tbaa !9
  %62 = load i32, ptr %7, align 4, !tbaa !9
  %63 = icmp ult i32 %61, %62
  br i1 %63, label %65, label %64

64:                                               ; preds = %60
  store i32 2, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %245

65:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %66 = load i32, ptr %11, align 4, !tbaa !9
  %67 = add i32 %66, 1
  %68 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %69 = load i32, ptr %68, align 8, !tbaa !21
  %70 = shl i32 %67, %69
  %71 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 4
  %72 = load i32, ptr %71, align 8, !tbaa !11
  %73 = icmp ugt i32 %70, %72
  br i1 %73, label %74, label %82

74:                                               ; preds = %65
  %75 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 4
  %76 = load i32, ptr %75, align 8, !tbaa !11
  %77 = load i32, ptr %11, align 4, !tbaa !9
  %78 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %79 = load i32, ptr %78, align 8, !tbaa !21
  %80 = shl i32 %77, %79
  %81 = sub i32 %76, %80
  br label %86

82:                                               ; preds = %65
  %83 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %84 = load i32, ptr %83, align 8, !tbaa !21
  %85 = shl i32 1, %84
  br label %86

86:                                               ; preds = %82, %74
  %87 = phi i32 [ %81, %74 ], [ %85, %82 ]
  store i32 %87, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  %88 = load ptr, ptr %5, align 8, !tbaa !5
  %89 = load i32, ptr %11, align 4, !tbaa !9
  %90 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %91 = load i32, ptr %90, align 8, !tbaa !21
  %92 = shl i32 %89, %91
  %93 = load i32, ptr %13, align 4, !tbaa !9
  %94 = add i32 %92, %93
  %95 = sub i32 %94, 1
  %96 = zext i32 %95 to i64
  %97 = getelementptr inbounds i32, ptr %88, i64 %96
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #4
  %98 = load ptr, ptr %8, align 8, !tbaa !5
  %99 = load ptr, ptr %9, align 8, !tbaa !5
  %100 = ptrtoint ptr %98 to i64
  %101 = ptrtoint ptr %99 to i64
  %102 = sub i64 %100, %101
  %103 = trunc i64 %102 to i32
  store i32 %103, ptr %15, align 4, !tbaa !9
  %104 = call i64 @_ZSt9make_pairIRKjjESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS3_INS4_IT0_E4typeEE6__typeEEOS5_OSA_(ptr noundef nonnull align 4 dereferenceable(4) %97, ptr noundef nonnull align 4 dereferenceable(4) %15)
  store i64 %104, ptr %14, align 4
  %105 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 3
  %106 = load i32, ptr %11, align 4, !tbaa !9
  %107 = zext i32 %106 to i64
  %108 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIjjESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %105, i64 noundef %107) #4
  %109 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIjjEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %108, ptr noundef nonnull align 4 dereferenceable(8) %14) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #4
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %110

110:                                              ; preds = %238, %86
  %111 = load i32, ptr %16, align 4, !tbaa !9
  %112 = load i32, ptr %13, align 4, !tbaa !9
  %113 = icmp ult i32 %111, %112
  br i1 %113, label %115, label %114

114:                                              ; preds = %110
  store i32 5, ptr %12, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #4
  br label %241

115:                                              ; preds = %110
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %116 = load ptr, ptr %5, align 8, !tbaa !5
  %117 = load i32, ptr %16, align 4, !tbaa !9
  %118 = load i32, ptr %11, align 4, !tbaa !9
  %119 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 0
  %120 = load i32, ptr %119, align 8, !tbaa !21
  %121 = shl i32 %118, %120
  %122 = add i32 %117, %121
  %123 = zext i32 %122 to i64
  %124 = getelementptr inbounds i32, ptr %116, i64 %123
  %125 = load i32, ptr %124, align 4, !tbaa !9
  store i32 %125, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  %126 = load i32, ptr %17, align 4, !tbaa !9
  %127 = load i32, ptr %10, align 4, !tbaa !9
  %128 = sub i32 %126, %127
  store i32 %128, ptr %18, align 4, !tbaa !9
  %129 = load i32, ptr %17, align 4, !tbaa !9
  store i32 %129, ptr %10, align 4, !tbaa !9
  %130 = load i32, ptr %18, align 4, !tbaa !9
  %131 = icmp ult i32 %130, 128
  br i1 %131, label %132, label %139

132:                                              ; preds = %115
  %133 = load i32, ptr %18, align 4, !tbaa !9
  %134 = or i32 %133, 128
  %135 = trunc i32 %134 to i8
  %136 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %135, ptr %136, align 1, !tbaa !22
  %137 = load ptr, ptr %8, align 8, !tbaa !5
  %138 = getelementptr inbounds i8, ptr %137, i32 1
  store ptr %138, ptr %8, align 8, !tbaa !5
  br label %237

139:                                              ; preds = %115
  %140 = load i32, ptr %18, align 4, !tbaa !9
  %141 = icmp ult i32 %140, 16384
  br i1 %141, label %142, label %156

142:                                              ; preds = %139
  %143 = load i32, ptr %18, align 4, !tbaa !9
  %144 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %143)
  %145 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %144, ptr %145, align 1, !tbaa !22
  %146 = load ptr, ptr %8, align 8, !tbaa !5
  %147 = getelementptr inbounds i8, ptr %146, i32 1
  store ptr %147, ptr %8, align 8, !tbaa !5
  %148 = load i32, ptr %18, align 4, !tbaa !9
  %149 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %148)
  %150 = zext i8 %149 to i32
  %151 = or i32 %150, 128
  %152 = trunc i32 %151 to i8
  %153 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %152, ptr %153, align 1, !tbaa !22
  %154 = load ptr, ptr %8, align 8, !tbaa !5
  %155 = getelementptr inbounds i8, ptr %154, i32 1
  store ptr %155, ptr %8, align 8, !tbaa !5
  br label %236

156:                                              ; preds = %139
  %157 = load i32, ptr %18, align 4, !tbaa !9
  %158 = icmp ult i32 %157, 2097152
  br i1 %158, label %159, label %178

159:                                              ; preds = %156
  %160 = load i32, ptr %18, align 4, !tbaa !9
  %161 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %160)
  %162 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %161, ptr %162, align 1, !tbaa !22
  %163 = load ptr, ptr %8, align 8, !tbaa !5
  %164 = getelementptr inbounds i8, ptr %163, i32 1
  store ptr %164, ptr %8, align 8, !tbaa !5
  %165 = load i32, ptr %18, align 4, !tbaa !9
  %166 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %165)
  %167 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %166, ptr %167, align 1, !tbaa !22
  %168 = load ptr, ptr %8, align 8, !tbaa !5
  %169 = getelementptr inbounds i8, ptr %168, i32 1
  store ptr %169, ptr %8, align 8, !tbaa !5
  %170 = load i32, ptr %18, align 4, !tbaa !9
  %171 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %170)
  %172 = zext i8 %171 to i32
  %173 = or i32 %172, 128
  %174 = trunc i32 %173 to i8
  %175 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %174, ptr %175, align 1, !tbaa !22
  %176 = load ptr, ptr %8, align 8, !tbaa !5
  %177 = getelementptr inbounds i8, ptr %176, i32 1
  store ptr %177, ptr %8, align 8, !tbaa !5
  br label %235

178:                                              ; preds = %156
  %179 = load i32, ptr %18, align 4, !tbaa !9
  %180 = icmp ult i32 %179, 268435456
  br i1 %180, label %181, label %205

181:                                              ; preds = %178
  %182 = load i32, ptr %18, align 4, !tbaa !9
  %183 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %182)
  %184 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %183, ptr %184, align 1, !tbaa !22
  %185 = load ptr, ptr %8, align 8, !tbaa !5
  %186 = getelementptr inbounds i8, ptr %185, i32 1
  store ptr %186, ptr %8, align 8, !tbaa !5
  %187 = load i32, ptr %18, align 4, !tbaa !9
  %188 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %187)
  %189 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %188, ptr %189, align 1, !tbaa !22
  %190 = load ptr, ptr %8, align 8, !tbaa !5
  %191 = getelementptr inbounds i8, ptr %190, i32 1
  store ptr %191, ptr %8, align 8, !tbaa !5
  %192 = load i32, ptr %18, align 4, !tbaa !9
  %193 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %192)
  %194 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %193, ptr %194, align 1, !tbaa !22
  %195 = load ptr, ptr %8, align 8, !tbaa !5
  %196 = getelementptr inbounds i8, ptr %195, i32 1
  store ptr %196, ptr %8, align 8, !tbaa !5
  %197 = load i32, ptr %18, align 4, !tbaa !9
  %198 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %197)
  %199 = zext i8 %198 to i32
  %200 = or i32 %199, 128
  %201 = trunc i32 %200 to i8
  %202 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %201, ptr %202, align 1, !tbaa !22
  %203 = load ptr, ptr %8, align 8, !tbaa !5
  %204 = getelementptr inbounds i8, ptr %203, i32 1
  store ptr %204, ptr %8, align 8, !tbaa !5
  br label %234

205:                                              ; preds = %178
  %206 = load i32, ptr %18, align 4, !tbaa !9
  %207 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %206)
  %208 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %207, ptr %208, align 1, !tbaa !22
  %209 = load ptr, ptr %8, align 8, !tbaa !5
  %210 = getelementptr inbounds i8, ptr %209, i32 1
  store ptr %210, ptr %8, align 8, !tbaa !5
  %211 = load i32, ptr %18, align 4, !tbaa !9
  %212 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %211)
  %213 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %212, ptr %213, align 1, !tbaa !22
  %214 = load ptr, ptr %8, align 8, !tbaa !5
  %215 = getelementptr inbounds i8, ptr %214, i32 1
  store ptr %215, ptr %8, align 8, !tbaa !5
  %216 = load i32, ptr %18, align 4, !tbaa !9
  %217 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %216)
  %218 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %217, ptr %218, align 1, !tbaa !22
  %219 = load ptr, ptr %8, align 8, !tbaa !5
  %220 = getelementptr inbounds i8, ptr %219, i32 1
  store ptr %220, ptr %8, align 8, !tbaa !5
  %221 = load i32, ptr %18, align 4, !tbaa !9
  %222 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %221)
  %223 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %222, ptr %223, align 1, !tbaa !22
  %224 = load ptr, ptr %8, align 8, !tbaa !5
  %225 = getelementptr inbounds i8, ptr %224, i32 1
  store ptr %225, ptr %8, align 8, !tbaa !5
  %226 = load i32, ptr %18, align 4, !tbaa !9
  %227 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj4EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %19, i32 noundef %226)
  %228 = zext i8 %227 to i32
  %229 = or i32 %228, 128
  %230 = trunc i32 %229 to i8
  %231 = load ptr, ptr %8, align 8, !tbaa !5
  store i8 %230, ptr %231, align 1, !tbaa !22
  %232 = load ptr, ptr %8, align 8, !tbaa !5
  %233 = getelementptr inbounds i8, ptr %232, i32 1
  store ptr %233, ptr %8, align 8, !tbaa !5
  br label %234

234:                                              ; preds = %205, %181
  br label %235

235:                                              ; preds = %234, %159
  br label %236

236:                                              ; preds = %235, %142
  br label %237

237:                                              ; preds = %236, %132
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %238

238:                                              ; preds = %237
  %239 = load i32, ptr %16, align 4, !tbaa !9
  %240 = add i32 %239, 1
  store i32 %240, ptr %16, align 4, !tbaa !9
  br label %110, !llvm.loop !23

241:                                              ; preds = %114
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %242

242:                                              ; preds = %241
  %243 = load i32, ptr %11, align 4, !tbaa !9
  %244 = add i32 %243, 1
  store i32 %244, ptr %11, align 4, !tbaa !9
  br label %60, !llvm.loop !25

245:                                              ; preds = %64
  %246 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 2
  %247 = load ptr, ptr %8, align 8, !tbaa !5
  %248 = load ptr, ptr %9, align 8, !tbaa !5
  %249 = ptrtoint ptr %247 to i64
  %250 = ptrtoint ptr %248 to i64
  %251 = sub i64 %249, %250
  %252 = trunc i64 %251 to i32
  %253 = zext i32 %252 to i64
  call void @_ZNSt6vectorIhSaIhEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %246, i64 noundef %253)
  %254 = getelementptr inbounds %"class.SIMDCompressionLib::Skipping", ptr %19, i32 0, i32 2
  call void @_ZNSt6vectorIhSaIhEE13shrink_to_fitEv(ptr noundef nonnull align 8 dereferenceable(24) %254)
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  br label %255

255:                                              ; preds = %245, %25
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorISt4pairIjjESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIhSaIhEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZSt9make_pairIRKjjESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS3_INS4_IT0_E4typeEE6__typeEEOS5_OSA_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIjjESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIjjEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) #3 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj4EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE13shrink_to_fitEv(ptr noundef nonnull align 8 dereferenceable(24)) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 56}
!12 = !{!"_ZTSN18SIMDCompressionLib8SkippingE", !10, i64 0, !13, i64 8, !17, i64 32, !10, i64 56}
!13 = !{!"_ZTSSt6vectorIhSaIhEE", !14, i64 0}
!14 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !15, i64 0}
!15 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !16, i64 0}
!16 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSSt6vectorISt4pairIjjESaIS1_EE", !18, i64 0}
!18 = !{!"_ZTSSt12_Vector_baseISt4pairIjjESaIS1_EE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE12_Vector_implE", !20, i64 0}
!20 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!12, !10, i64 0}
!22 = !{!7, !7, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::pair" = type { i32, i32 }

@.str = external hidden unnamed_addr constant [38 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [93 x i8], align 1
@__PRETTY_FUNCTION__._ZN18SIMDCompressionLib8Skipping4loadEPKjj = external hidden unnamed_addr constant [68 x i8], align 1

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN18SIMDCompressionLib8Skipping4loadEPKjj(ptr noundef nonnull align 8 dereferenceable(60) %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 align 2 {
  %4 = alloca %"struct.std::pair", align 8
  %5 = alloca i32, align 4
  %6 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 %2, ptr %6, align 8, !tbaa !5
  %7 = icmp eq i32 %2, 0
  br i1 %7, label %88, label %8

8:                                                ; preds = %3
  %9 = load i32, ptr %0, align 8, !tbaa !19
  %10 = shl nuw i32 1, %9
  %11 = add i32 %2, -1
  %12 = add i32 %11, %10
  %13 = lshr i32 %12, %9
  %14 = shl i32 %13, %9
  %.not = icmp ult i32 %14, %2
  br i1 %.not, label %15, label %16

15:                                               ; preds = %8
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 232, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN18SIMDCompressionLib8Skipping4loadEPKjj) #4
  unreachable

16:                                               ; preds = %8
  %17 = getelementptr inbounds i8, ptr %0, i64 32
  %18 = zext i32 %13 to i64
  tail call void @_ZNSt6vectorISt4pairIjjESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %18)
  %19 = getelementptr inbounds i8, ptr %0, i64 8
  %20 = load i32, ptr %6, align 8, !tbaa !5
  %21 = mul i32 %20, 5
  %22 = zext i32 %21 to i64
  tail call void @_ZNSt6vectorIhSaIhEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %22)
  %23 = tail call noundef ptr @_ZNSt6vectorIhSaIhEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %19) #5
  %.not92 = icmp eq i32 %13, 0
  %.pre = ptrtoint ptr %23 to i64
  br i1 %.not92, label %._crit_edge, label %.lr.ph90

.loopexit:                                        ; preds = %84, %.lr.ph90
  %.176.lcssa = phi i32 [ %.07588, %.lr.ph90 ], [ %51, %84 ]
  %.1.lcssa = phi ptr [ %.089, %.lr.ph90 ], [ %86, %84 ]
  %exitcond95.not = icmp eq i64 %indvars.iv.next, %18
  br i1 %exitcond95.not, label %._crit_edge.loopexit, label %.lr.ph90, !llvm.loop !20

._crit_edge.loopexit:                             ; preds = %.loopexit
  %.pre96 = ptrtoint ptr %.1.lcssa to i64
  br label %._crit_edge

._crit_edge:                                      ; preds = %16, %._crit_edge.loopexit
  %.pre-phi97 = phi i64 [ %.pre96, %._crit_edge.loopexit ], [ %.pre, %16 ]
  %24 = sub i64 %.pre-phi97, %.pre
  %25 = and i64 %24, 4294967295
  call void @_ZNSt6vectorIhSaIhEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %25)
  call void @_ZNSt6vectorIhSaIhEE13shrink_to_fitEv(ptr noundef nonnull align 8 dereferenceable(24) %19)
  br label %88

.lr.ph90:                                         ; preds = %16, %.loopexit
  %indvars.iv = phi i64 [ %indvars.iv.next, %.loopexit ], [ 0, %16 ]
  %.089 = phi ptr [ %.1.lcssa, %.loopexit ], [ %23, %16 ]
  %.07588 = phi i32 [ %.176.lcssa, %.loopexit ], [ 0, %16 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %26 = load i32, ptr %0, align 8, !tbaa !19
  %27 = trunc nuw i64 %indvars.iv.next to i32
  %28 = shl i32 %27, %26
  %29 = load i32, ptr %6, align 8, !tbaa !5
  %30 = icmp ugt i32 %28, %29
  %31 = trunc nuw i64 %indvars.iv to i32
  %32 = shl i32 %31, %26
  %33 = sub i32 %29, %32
  %34 = shl nuw i32 1, %26
  %35 = select i1 %30, i32 %33, i32 %34
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  %36 = add i32 %32, -1
  %37 = add i32 %36, %35
  %38 = zext i32 %37 to i64
  %39 = getelementptr inbounds i32, ptr %1, i64 %38
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #5
  %40 = ptrtoint ptr %.089 to i64
  %41 = sub i64 %40, %.pre
  %42 = trunc i64 %41 to i32
  store i32 %42, ptr %5, align 4, !tbaa !22
  %43 = call i64 @_ZSt9make_pairIRKjjESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS3_INS4_IT0_E4typeEE6__typeEEOS5_OSA_(ptr noundef nonnull align 4 dereferenceable(4) %39, ptr noundef nonnull align 4 dereferenceable(4) %5)
  store i64 %43, ptr %4, align 8
  %44 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIjjESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %indvars.iv) #5
  %45 = call noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIjjEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8) %44, ptr noundef nonnull align 4 dereferenceable(8) %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  %.not93 = icmp eq i32 %35, 0
  br i1 %.not93, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph90, %84
  %.185 = phi ptr [ %86, %84 ], [ %.089, %.lr.ph90 ]
  %.17684 = phi i32 [ %51, %84 ], [ %.07588, %.lr.ph90 ]
  %.07783 = phi i32 [ %87, %84 ], [ 0, %.lr.ph90 ]
  %46 = load i32, ptr %0, align 8, !tbaa !19
  %47 = shl i32 %31, %46
  %48 = add i32 %47, %.07783
  %49 = zext i32 %48 to i64
  %50 = getelementptr inbounds i32, ptr %1, i64 %49
  %51 = load i32, ptr %50, align 4, !tbaa !22
  %52 = sub i32 %51, %.17684
  %53 = icmp ult i32 %52, 128
  br i1 %53, label %54, label %56

54:                                               ; preds = %.lr.ph
  %55 = trunc nuw i32 %52 to i8
  br label %84

56:                                               ; preds = %.lr.ph
  %57 = icmp ult i32 %52, 16384
  br i1 %57, label %58, label %62

58:                                               ; preds = %56
  %59 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  store i8 %59, ptr %.185, align 1, !tbaa !23
  %60 = getelementptr inbounds i8, ptr %.185, i64 1
  %61 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  br label %84

62:                                               ; preds = %56
  %63 = icmp ult i32 %52, 2097152
  br i1 %63, label %64, label %70

64:                                               ; preds = %62
  %65 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  store i8 %65, ptr %.185, align 1, !tbaa !23
  %66 = getelementptr inbounds i8, ptr %.185, i64 1
  %67 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  store i8 %67, ptr %66, align 1, !tbaa !23
  %68 = getelementptr inbounds i8, ptr %.185, i64 2
  %69 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  br label %84

70:                                               ; preds = %62
  %71 = icmp ult i32 %52, 268435456
  %72 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  store i8 %72, ptr %.185, align 1, !tbaa !23
  %73 = getelementptr inbounds i8, ptr %.185, i64 1
  %74 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  store i8 %74, ptr %73, align 1, !tbaa !23
  %75 = getelementptr inbounds i8, ptr %.185, i64 2
  %76 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  store i8 %76, ptr %75, align 1, !tbaa !23
  %77 = getelementptr inbounds i8, ptr %.185, i64 3
  br i1 %71, label %78, label %80

78:                                               ; preds = %70
  %79 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  br label %84

80:                                               ; preds = %70
  %81 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  store i8 %81, ptr %77, align 1, !tbaa !23
  %82 = getelementptr inbounds i8, ptr %.185, i64 4
  %83 = call noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj4EEEhj(ptr noundef nonnull align 8 dereferenceable(60) %0, i32 noundef %52)
  br label %84

84:                                               ; preds = %58, %78, %80, %64, %54
  %.sink100 = phi i8 [ %61, %58 ], [ %79, %78 ], [ %83, %80 ], [ %69, %64 ], [ %55, %54 ]
  %.sink99 = phi ptr [ %60, %58 ], [ %77, %78 ], [ %82, %80 ], [ %68, %64 ], [ %.185, %54 ]
  %.sink = phi i64 [ 2, %58 ], [ 4, %78 ], [ 5, %80 ], [ 3, %64 ], [ 1, %54 ]
  %85 = or i8 %.sink100, -128
  store i8 %85, ptr %.sink99, align 1, !tbaa !23
  %86 = getelementptr inbounds i8, ptr %.185, i64 %.sink
  %87 = add nuw i32 %.07783, 1
  %exitcond.not = icmp eq i32 %87, %35
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !24

88:                                               ; preds = %3, %._crit_edge
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorISt4pairIjjESaIS1_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNSt6vectorIhSaIhEE4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local i64 @_ZSt9make_pairIRKjjESt4pairINSt25__strip_reference_wrapperINSt5decayIT_E4typeEE6__typeENS3_INS4_IT0_E4typeEE6__typeEEOS5_OSA_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt6vectorISt4pairIjjESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(8) ptr @_ZNSt4pairIjjEaSEOS0_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(8)) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj0EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj1EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj2EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping12extract7bitsILj3EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZN18SIMDCompressionLib8Skipping20extract7bitsmasklessILj4EEEhj(ptr noundef nonnull align 8 dereferenceable(60), i32 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIhSaIhEE13shrink_to_fitEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 56}
!6 = !{!"_ZTSN18SIMDCompressionLib8SkippingE", !7, i64 0, !10, i64 8, !15, i64 32, !7, i64 56}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIhSaIhEE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIhSaIhEE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIhSaIhEE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"_ZTSSt6vectorISt4pairIjjESaIS1_EE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseISt4pairIjjESaIS1_EE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseISt4pairIjjESaIS1_EE17_Vector_impl_dataE", !14, i64 0, !14, i64 8, !14, i64 16}
!19 = !{!6, !7, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!7, !7, i64 0}
!23 = !{!8, !8, i64 0}
!24 = distinct !{!24, !21}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass