; LLVM IR from devantler/software-engineering-f22-shared :: IOT/BudgetManagementExcercise-03-28/ESP-Project/components/components/tinyusb (disable)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CRG_TOP_Type = type { i32, [3 x i32], i32, i32, i32, i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, [2 x i32], i32, i32, i32, [5 x i32], i32, i32, i32, i32 }
%struct.CRG_XTAL_Type = type { i32, [3 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, i32, [2 x i32], i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @da1469x_clock_pll_disable() #0 {
  br label %1

1:                                                ; preds = %6, %0
  %2 = load volatile i32, ptr getelementptr inbounds (%struct.CRG_TOP_Type, ptr inttoptr (i64 1342177280 to ptr), i32 0, i32 3), align 4, !tbaa !5
  %3 = zext i32 %2 to i64
  %4 = and i64 %3, 32768
  %5 = icmp ne i64 %4, 0
  br i1 %5, label %6, label %7

6:                                                ; preds = %1
  store volatile i32 1, ptr getelementptr inbounds (%struct.CRG_TOP_Type, ptr inttoptr (i64 1342177280 to ptr), i32 0, i32 5), align 4, !tbaa !10
  br label %1, !llvm.loop !11

7:                                                ; preds = %1
  %8 = load volatile i32, ptr getelementptr inbounds (%struct.CRG_XTAL_Type, ptr inttoptr (i64 1342242816 to ptr), i32 0, i32 16), align 4, !tbaa !13
  %9 = zext i32 %8 to i64
  %10 = and i64 %9, -3
  %11 = trunc i64 %10 to i32
  store volatile i32 %11, ptr getelementptr inbounds (%struct.CRG_XTAL_Type, ptr inttoptr (i64 1342242816 to ptr), i32 0, i32 16), align 4, !tbaa !13
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 20}
!6 = !{!"", !7, i64 0, !8, i64 4, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !8, i64 44, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !8, i64 136, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !8, i64 168, !7, i64 188, !7, i64 192, !8, i64 196, !7, i64 204, !7, i64 208, !7, i64 212, !8, i64 216, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 28}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !7, i64 96}
!14 = !{!"", !7, i64 0, !8, i64 4, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !8, i64 32, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !8, i64 68, !7, i64 80, !7, i64 84, !8, i64 88, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @da1469x_clock_pll_disable() local_unnamed_addr #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1342177300 to ptr), align 4, !tbaa !5
  %2 = and i32 %1, 32768
  %.not1 = icmp eq i32 %2, 0
  br i1 %.not1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  store volatile i32 1, ptr inttoptr (i64 1342177308 to ptr), align 4, !tbaa !10
  %3 = load volatile i32, ptr inttoptr (i64 1342177300 to ptr), align 4, !tbaa !5
  %4 = and i32 %3, 32768
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph, %0
  %5 = load volatile i32, ptr inttoptr (i64 1342242912 to ptr), align 32, !tbaa !13
  %6 = and i32 %5, -3
  store volatile i32 %6, ptr inttoptr (i64 1342242912 to ptr), align 32, !tbaa !13
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 20}
!6 = !{!"", !7, i64 0, !8, i64 4, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !8, i64 44, !7, i64 60, !7, i64 64, !7, i64 68, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !8, i64 136, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !8, i64 168, !7, i64 188, !7, i64 192, !8, i64 196, !7, i64 204, !7, i64 208, !7, i64 212, !8, i64 216, !7, i64 236, !7, i64 240, !7, i64 244, !7, i64 248}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 28}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !7, i64 96}
!14 = !{!"", !7, i64 0, !8, i64 4, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !8, i64 32, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !8, i64 68, !7, i64 80, !7, i64 84, !8, i64 88, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferAlignmentPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SimplifyCFGPass