; LLVM IR from amritansh22/Data-Structures-and-Algorithms-in-cpp :: covid and cousin problem (covid and cousin solution)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [14 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %8)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  store i32 0, ptr %9, align 4, !tbaa !5
  br label %11

11:                                               ; preds = %95, %0
  %12 = load i32, ptr %9, align 4, !tbaa !5
  %13 = load i32, ptr %8, align 4, !tbaa !5
  %14 = icmp slt i32 %12, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %98

16:                                               ; preds = %11
  %17 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %18 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %19 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %20 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %21 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %6)
  store i32 0, ptr %7, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %93, %16
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = load i32, ptr %4, align 4, !tbaa !5
  %25 = icmp ne i32 %23, %24
  br i1 %25, label %26, label %34

26:                                               ; preds = %22
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = load i32, ptr %2, align 4, !tbaa !5
  %29 = icmp sle i32 %27, %28
  br i1 %29, label %30, label %34

30:                                               ; preds = %26
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = load i32, ptr %2, align 4, !tbaa !5
  %33 = icmp sle i32 %31, %32
  br label %34

34:                                               ; preds = %30, %26, %22
  %35 = phi i1 [ false, %26 ], [ false, %22 ], [ %33, %30 ]
  br i1 %35, label %36, label %94

36:                                               ; preds = %34
  %37 = load i32, ptr %3, align 4, !tbaa !5
  %38 = load i32, ptr %4, align 4, !tbaa !5
  %39 = icmp slt i32 %37, %38
  br i1 %39, label %40, label %44

40:                                               ; preds = %36
  %41 = load i32, ptr %5, align 4, !tbaa !5
  %42 = icmp eq i32 %41, 0
  br i1 %42, label %43, label %44

43:                                               ; preds = %40
  br label %94

44:                                               ; preds = %40, %36
  br label %45

45:                                               ; preds = %54, %44
  %46 = load i32, ptr %3, align 4, !tbaa !5
  %47 = load i32, ptr %4, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %49, label %52

49:                                               ; preds = %45
  %50 = load i32, ptr %5, align 4, !tbaa !5
  %51 = icmp ne i32 %50, 0
  br label %52

52:                                               ; preds = %49, %45
  %53 = phi i1 [ false, %45 ], [ %51, %49 ]
  br i1 %53, label %54, label %60

54:                                               ; preds = %52
  %55 = load i32, ptr %5, align 4, !tbaa !5
  %56 = load i32, ptr %3, align 4, !tbaa !5
  %57 = add nsw i32 %56, %55
  store i32 %57, ptr %3, align 4, !tbaa !5
  %58 = load i32, ptr %7, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %7, align 4, !tbaa !5
  br label %45, !llvm.loop !9

60:                                               ; preds = %52
  %61 = load i32, ptr %3, align 4, !tbaa !5
  %62 = load i32, ptr %4, align 4, !tbaa !5
  %63 = icmp sgt i32 %61, %62
  br i1 %63, label %64, label %68

64:                                               ; preds = %60
  %65 = load i32, ptr %6, align 4, !tbaa !5
  %66 = icmp eq i32 %65, 0
  br i1 %66, label %67, label %68

67:                                               ; preds = %64
  br label %94

68:                                               ; preds = %64, %60
  br label %69

69:                                               ; preds = %78, %68
  %70 = load i32, ptr %3, align 4, !tbaa !5
  %71 = load i32, ptr %4, align 4, !tbaa !5
  %72 = icmp sgt i32 %70, %71
  br i1 %72, label %73, label %76

73:                                               ; preds = %69
  %74 = load i32, ptr %6, align 4, !tbaa !5
  %75 = icmp ne i32 %74, 0
  br label %76

76:                                               ; preds = %73, %69
  %77 = phi i1 [ false, %69 ], [ %75, %73 ]
  br i1 %77, label %78, label %84

78:                                               ; preds = %76
  %79 = load i32, ptr %6, align 4, !tbaa !5
  %80 = load i32, ptr %3, align 4, !tbaa !5
  %81 = sub nsw i32 %80, %79
  store i32 %81, ptr %3, align 4, !tbaa !5
  %82 = load i32, ptr %7, align 4, !tbaa !5
  %83 = add nsw i32 %82, 1
  store i32 %83, ptr %7, align 4, !tbaa !5
  br label %69, !llvm.loop !11

84:                                               ; preds = %76
  %85 = load i32, ptr %3, align 4, !tbaa !5
  %86 = load i32, ptr %4, align 4, !tbaa !5
  %87 = icmp eq i32 %85, %86
  br i1 %87, label %88, label %91

88:                                               ; preds = %84
  %89 = load i32, ptr %7, align 4, !tbaa !5
  %90 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %89)
  br label %93

91:                                               ; preds = %84
  %92 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @.str)
  br label %93

93:                                               ; preds = %91, %88
  br label %22, !llvm.loop !12

94:                                               ; preds = %67, %43, %34
  br label %95

95:                                               ; preds = %94
  %96 = load i32, ptr %9, align 4, !tbaa !5
  %97 = add nsw i32 %96, 1
  store i32 %97, ptr %9, align 4, !tbaa !5
  br label %11, !llvm.loop !13

98:                                               ; preds = %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [14 x i8], align 1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #5
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %8 = load i32, ptr %6, align 4, !tbaa !5
  %9 = icmp sgt i32 %8, 0
  br i1 %9, label %.lr.ph46, label %._crit_edge47

._crit_edge47:                                    ; preds = %.critedge, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #5
  ret i32 0

.lr.ph46:                                         ; preds = %0, %.critedge
  %.044 = phi i32 [ %61, %.critedge ], [ 0, %0 ]
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %12 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %3)
  %13 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %14 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %.not37 = icmp eq i32 %15, %16
  br i1 %.not37, label %.critedge, label %.lr.ph40

.lr.ph40:                                         ; preds = %.lr.ph46, %58
  %17 = phi i32 [ %60, %58 ], [ %16, %.lr.ph46 ]
  %.promoted = phi i32 [ %59, %58 ], [ %15, %.lr.ph46 ]
  %.0838 = phi i32 [ %.2.lcssa, %58 ], [ 0, %.lr.ph46 ]
  %18 = load i32, ptr %1, align 4, !tbaa !5
  %.not16 = icmp sgt i32 %.promoted, %18
  %.not17 = icmp sgt i32 %17, %18
  %or.cond18 = or i1 %.not16, %.not17
  br i1 %or.cond18, label %.critedge, label %19

19:                                               ; preds = %.lr.ph40
  %20 = icmp slt i32 %.promoted, %17
  %21 = load i32, ptr %4, align 4
  %.fr48 = freeze i32 %21
  %22 = icmp eq i32 %.fr48, 0
  %or.cond = and i1 %20, %22
  br i1 %or.cond, label %.critedge, label %.preheader19

.preheader19:                                     ; preds = %19
  %23 = icmp ne i32 %.fr48, 0
  %24 = and i1 %20, %23
  br i1 %24, label %.lr.ph.split.preheader, label %42

.lr.ph.split.preheader:                           ; preds = %.preheader19
  %25 = add i32 %.fr48, %.promoted
  %smax = call i32 @llvm.smax.i32(i32 %17, i32 %25)
  %26 = icmp slt i32 %25, %17
  %umin.neg = sext i1 %26 to i32
  %27 = select i1 %26, i32 2, i32 1
  %28 = add i32 %smax, %umin.neg
  %29 = sub i32 %28, %25
  %30 = udiv i32 %29, %.fr48
  %31 = add i32 %27, %30
  %min.iters.check = icmp ult i32 %31, 8
  br i1 %min.iters.check, label %.lr.ph.split.preheader60, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.split.preheader
  %n.vec = and i32 %31, -8
  %32 = mul i32 %n.vec, %.fr48
  %ind.end = add i32 %.promoted, %32
  %33 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %.0838, i64 0
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %33, %vector.ph ], [ %34, %vector.body ]
  %vec.phi59 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %35, %vector.body ]
  %34 = add <4 x i32> %vec.phi, <i32 1, i32 1, i32 1, i32 1>
  %35 = add <4 x i32> %vec.phi59, <i32 1, i32 1, i32 1, i32 1>
  %index.next = add nuw i32 %index, 8
  %36 = icmp eq i32 %index.next, %n.vec
  br i1 %36, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %35, %34
  %37 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %31, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.split.preheader60

.lr.ph.split.preheader60:                         ; preds = %middle.block, %.lr.ph.split.preheader
  %.121.ph = phi i32 [ %.0838, %.lr.ph.split.preheader ], [ %37, %middle.block ]
  %.ph = phi i32 [ %.promoted, %.lr.ph.split.preheader ], [ %ind.end, %middle.block ]
  br label %.lr.ph.split

.lr.ph.split:                                     ; preds = %.lr.ph.split.preheader60, %.lr.ph.split
  %.121 = phi i32 [ %40, %.lr.ph.split ], [ %.121.ph, %.lr.ph.split.preheader60 ]
  %38 = phi i32 [ %39, %.lr.ph.split ], [ %.ph, %.lr.ph.split.preheader60 ]
  %39 = add nsw i32 %38, %.fr48
  %40 = add nsw i32 %.121, 1
  %41 = icmp slt i32 %39, %17
  br i1 %41, label %.lr.ph.split, label %._crit_edge, !llvm.loop !13

._crit_edge:                                      ; preds = %.lr.ph.split, %middle.block
  %.lcssa56 = phi i32 [ %ind.end, %middle.block ], [ %39, %.lr.ph.split ]
  %.lcssa = phi i32 [ %37, %middle.block ], [ %40, %.lr.ph.split ]
  store i32 %.lcssa56, ptr %2, align 4, !tbaa !5
  br label %42

42:                                               ; preds = %._crit_edge, %.preheader19
  %.1.lcssa = phi i32 [ %.lcssa, %._crit_edge ], [ %.0838, %.preheader19 ]
  %.promoted26 = phi i32 [ %.lcssa56, %._crit_edge ], [ %.promoted, %.preheader19 ]
  %43 = icmp sgt i32 %.promoted26, %17
  %44 = load i32, ptr %5, align 4
  %.fr = freeze i32 %44
  %45 = icmp eq i32 %.fr, 0
  %or.cond3 = and i1 %43, %45
  br i1 %or.cond3, label %.critedge, label %.preheader

.preheader:                                       ; preds = %42
  %46 = icmp ne i32 %.fr, 0
  %47 = and i1 %43, %46
  br i1 %47, label %.lr.ph28.split, label %52

.lr.ph28.split:                                   ; preds = %.preheader, %.lr.ph28.split
  %.227 = phi i32 [ %50, %.lr.ph28.split ], [ %.1.lcssa, %.preheader ]
  %48 = phi i32 [ %49, %.lr.ph28.split ], [ %.promoted26, %.preheader ]
  %49 = sub nsw i32 %48, %.fr
  %50 = add nsw i32 %.227, 1
  %51 = icmp sgt i32 %49, %17
  br i1 %51, label %.lr.ph28.split, label %._crit_edge29, !llvm.loop !14

._crit_edge29:                                    ; preds = %.lr.ph28.split
  store i32 %49, ptr %2, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %._crit_edge29, %.preheader
  %.2.lcssa = phi i32 [ %50, %._crit_edge29 ], [ %.1.lcssa, %.preheader ]
  %.lcssa20 = phi i32 [ %49, %._crit_edge29 ], [ %.promoted26, %.preheader ]
  %53 = icmp eq i32 %.lcssa20, %17
  br i1 %53, label %54, label %56

54:                                               ; preds = %52
  %55 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, i32 noundef %.2.lcssa)
  br label %58

56:                                               ; preds = %52
  %57 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @.str)
  br label %58

58:                                               ; preds = %56, %54
  %59 = load i32, ptr %2, align 4, !tbaa !5
  %60 = load i32, ptr %3, align 4, !tbaa !5
  %.not = icmp eq i32 %59, %60
  br i1 %.not, label %.critedge, label %.lr.ph40, !llvm.loop !15

.critedge:                                        ; preds = %.lr.ph40, %58, %42, %19, %.lr.ph46
  %61 = add nuw nsw i32 %.044, 1
  %62 = load i32, ptr %6, align 4, !tbaa !5
  %63 = icmp slt i32 %61, %62
  br i1 %63, label %.lr.ph46, label %._crit_edge47, !llvm.loop !16
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #4

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalDCEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,SCCPPass,SROAPass,SimplifyCFGPass