; LLVM IR from gognl/VMBR :: victim/src/hardware (pci)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.pci_device_register_t = type { i32 }
%union.pci_device_t = type { i32 }
%struct.anon.0 = type { i16, i16 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @get_pci_device_register(i32, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @scan_for_device(ptr noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i8 noundef zeroext %3, i8 noundef zeroext %4, i8 noundef zeroext %5) #1 {
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i8, align 1
  %12 = alloca i8, align 1
  %13 = alloca i8, align 1
  %14 = alloca %union.pci_device_register_t, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i16 %1, ptr %9, align 2, !tbaa !9
  store i16 %2, ptr %10, align 2, !tbaa !9
  store i8 %3, ptr %11, align 1, !tbaa !11
  store i8 %4, ptr %12, align 1, !tbaa !11
  store i8 %5, ptr %13, align 1, !tbaa !11
  %16 = load i8, ptr %11, align 1, !tbaa !11
  %17 = zext i8 %16 to i32
  %18 = load ptr, ptr %8, align 8, !tbaa !5
  %19 = load i32, ptr %18, align 4
  %20 = and i32 %17, 255
  %21 = shl i32 %20, 16
  %22 = and i32 %19, -16711681
  %23 = or i32 %22, %21
  store i32 %23, ptr %18, align 4
  %24 = load i8, ptr %12, align 1, !tbaa !11
  %25 = zext i8 %24 to i32
  %26 = load ptr, ptr %8, align 8, !tbaa !5
  %27 = load i32, ptr %26, align 4
  %28 = and i32 %25, 31
  %29 = shl i32 %28, 11
  %30 = and i32 %27, -63489
  %31 = or i32 %30, %29
  store i32 %31, ptr %26, align 4
  %32 = load i8, ptr %13, align 1, !tbaa !11
  %33 = zext i8 %32 to i32
  %34 = load ptr, ptr %8, align 8, !tbaa !5
  %35 = load i32, ptr %34, align 4
  %36 = and i32 %33, 7
  %37 = shl i32 %36, 8
  %38 = and i32 %35, -1793
  %39 = or i32 %38, %37
  store i32 %39, ptr %34, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %40 = load ptr, ptr %8, align 8, !tbaa !5
  %41 = getelementptr inbounds %union.pci_device_t, ptr %40, i32 0, i32 0
  %42 = load i32, ptr %41, align 4
  %43 = call i32 @get_pci_device_register(i32 %42, i8 noundef zeroext 0)
  %44 = getelementptr inbounds %union.pci_device_register_t, ptr %14, i32 0, i32 0
  store i32 %43, ptr %44, align 4
  %45 = getelementptr inbounds %struct.anon.0, ptr %14, i32 0, i32 0
  %46 = load i16, ptr %45, align 4, !tbaa !11
  %47 = zext i16 %46 to i32
  %48 = load i16, ptr %9, align 2, !tbaa !9
  %49 = zext i16 %48 to i32
  %50 = icmp eq i32 %47, %49
  br i1 %50, label %51, label %59

51:                                               ; preds = %6
  %52 = getelementptr inbounds %struct.anon.0, ptr %14, i32 0, i32 1
  %53 = load i16, ptr %52, align 2, !tbaa !11
  %54 = zext i16 %53 to i32
  %55 = load i16, ptr %10, align 2, !tbaa !9
  %56 = zext i16 %55 to i32
  %57 = icmp eq i32 %54, %56
  br i1 %57, label %58, label %59

58:                                               ; preds = %51
  store i32 1, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %60

59:                                               ; preds = %51, %6
  store i32 0, ptr %7, align 4
  store i32 1, ptr %15, align 4
  br label %60

60:                                               ; preds = %59, %58
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  %61 = load i32, ptr %7, align 4
  ret i32 %61
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local i32 @get_pci_device_register(i32, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @scan_for_device(ptr nocapture noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i8 noundef zeroext %3, i8 noundef zeroext %4, i8 noundef zeroext %5) local_unnamed_addr #0 {
  %7 = zext i8 %3 to i32
  %8 = load i32, ptr %0, align 4
  %9 = shl nuw nsw i32 %7, 16
  %10 = and i32 %8, -16776961
  %11 = or disjoint i32 %10, %9
  %12 = and i8 %4, 31
  %13 = zext nneg i8 %12 to i32
  %14 = shl nuw nsw i32 %13, 11
  %15 = or disjoint i32 %11, %14
  %16 = and i8 %5, 7
  %17 = zext nneg i8 %16 to i32
  %18 = shl nuw nsw i32 %17, 8
  %19 = or disjoint i32 %15, %18
  store i32 %19, ptr %0, align 4
  %20 = tail call i32 @get_pci_device_register(i32 %19, i8 noundef zeroext 0)
  %21 = trunc i32 %20 to i16
  %22 = icmp eq i16 %21, %1
  br i1 %22, label %23, label %26

23:                                               ; preds = %6
  %.sroa.4.0.extract.shift = lshr i32 %20, 16
  %24 = zext i16 %2 to i32
  %25 = icmp eq i32 %.sroa.4.0.extract.shift, %24
  br i1 %25, label %27, label %26

26:                                               ; preds = %23, %6
  br label %27

27:                                               ; preds = %23, %26
  %.0 = phi i32 [ 0, %26 ], [ 1, %23 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass