; LLVM IR from AdarshGaur/Competitive-Programming :: Codechef/Random Problems/Total Components.ll (Z3prev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.3" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@primes = external dso_local global %"class.std::vector.3", align 8
@ans = external dso_local global %"class.std::vector.3", align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3prev() #1 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef 2) #2
  store i64 1, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #2
  store i64 0, ptr %1, align 8, !tbaa !5
  br label %4

4:                                                ; preds = %26, %0
  %5 = load i64, ptr %1, align 8, !tbaa !5
  %6 = call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @primes) #2
  %7 = icmp ult i64 %5, %6
  br i1 %7, label %9, label %8

8:                                                ; preds = %4
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #2
  br label %29

9:                                                ; preds = %4
  %10 = load i64, ptr %1, align 8, !tbaa !5
  %11 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %10) #2
  %12 = load i64, ptr %11, align 8, !tbaa !5
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %12) #2
  store i64 1, ptr %13, align 8, !tbaa !5
  %14 = load i64, ptr %1, align 8, !tbaa !5
  %15 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %14) #2
  %16 = load i64, ptr %15, align 8, !tbaa !5
  %17 = mul nsw i64 %16, 2
  %18 = icmp slt i64 %17, 10000001
  br i1 %18, label %19, label %25

19:                                               ; preds = %9
  %20 = load i64, ptr %1, align 8, !tbaa !5
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %20) #2
  %22 = load i64, ptr %21, align 8, !tbaa !5
  %23 = mul nsw i64 %22, 2
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %23) #2
  store i64 -1, ptr %24, align 8, !tbaa !5
  br label %25

25:                                               ; preds = %19, %9
  br label %26

26:                                               ; preds = %25
  %27 = load i64, ptr %1, align 8, !tbaa !5
  %28 = add nsw i64 %27, 1
  store i64 %28, ptr %1, align 8, !tbaa !5
  br label %4, !llvm.loop !9

29:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #2
  store i64 3, ptr %2, align 8, !tbaa !5
  br label %30

30:                                               ; preds = %43, %29
  %31 = load i64, ptr %2, align 8, !tbaa !5
  %32 = icmp slt i64 %31, 10000001
  br i1 %32, label %34, label %33

33:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #2
  br label %46

34:                                               ; preds = %30
  %35 = load i64, ptr %2, align 8, !tbaa !5
  %36 = sub nsw i64 %35, 1
  %37 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %36) #2
  %38 = load i64, ptr %37, align 8, !tbaa !5
  %39 = load i64, ptr %2, align 8, !tbaa !5
  %40 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %39) #2
  %41 = load i64, ptr %40, align 8, !tbaa !5
  %42 = add nsw i64 %41, %38
  store i64 %42, ptr %40, align 8, !tbaa !5
  br label %43

43:                                               ; preds = %34
  %44 = load i64, ptr %2, align 8, !tbaa !5
  %45 = add nsw i64 %44, 1
  store i64 %45, ptr %2, align 8, !tbaa !5
  br label %30, !llvm.loop !11

46:                                               ; preds = %33
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.3" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl" = type { %"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<long long, std::allocator<long long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@primes = external dso_local global %"class.std::vector.3", align 8
@ans = external dso_local global %"class.std::vector.3", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z3prev() local_unnamed_addr #0 {
  %1 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef 2) #1
  store i64 1, ptr %1, align 8, !tbaa !5
  %2 = tail call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @primes) #1
  %.not = icmp eq i64 %2, 0
  br i1 %.not, label %.preheader.preheader, label %.lr.ph

.preheader.preheader:                             ; preds = %14, %0
  br label %.preheader

.lr.ph:                                           ; preds = %0, %14
  %.0910 = phi i64 [ %15, %14 ], [ 0, %0 ]
  %3 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %.0910) #1
  %4 = load i64, ptr %3, align 8, !tbaa !5
  %5 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %4) #1
  store i64 1, ptr %5, align 8, !tbaa !5
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %.0910) #1
  %7 = load i64, ptr %6, align 8, !tbaa !5
  %8 = icmp slt i64 %7, 5000001
  br i1 %8, label %9, label %14

9:                                                ; preds = %.lr.ph
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @primes, i64 noundef %.0910) #1
  %11 = load i64, ptr %10, align 8, !tbaa !5
  %12 = shl nsw i64 %11, 1
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %12) #1
  store i64 -1, ptr %13, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %.lr.ph, %9
  %15 = add nuw nsw i64 %.0910, 1
  %16 = tail call noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) @primes) #1
  %17 = icmp ult i64 %15, %16
  br i1 %17, label %.lr.ph, label %.preheader.preheader, !llvm.loop !9

18:                                               ; preds = %.preheader
  ret void

.preheader:                                       ; preds = %.preheader.preheader, %.preheader
  %.011 = phi i64 [ %25, %.preheader ], [ 3, %.preheader.preheader ]
  %19 = add nsw i64 %.011, -1
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %19) #1
  %21 = load i64, ptr %20, align 8, !tbaa !5
  %22 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @ans, i64 noundef %.011) #1
  %23 = load i64, ptr %22, align 8, !tbaa !5
  %24 = add nsw i64 %23, %21
  store i64 %24, ptr %22, align 8, !tbaa !5
  %25 = add nuw nsw i64 %.011, 1
  %exitcond.not = icmp eq i64 %25, 10000001
  br i1 %exitcond.not, label %18, label %.preheader, !llvm.loop !11
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIxSaIxEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass