; LLVM IR from glaretechnologies/substrata :: libs/fft2d (fft4g)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @dctsub(i32 noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #1 {
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca double, align 8
  %15 = alloca double, align 8
  %16 = alloca double, align 8
  store i32 %0, ptr %5, align 4, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #3
  %17 = load i32, ptr %7, align 4, !tbaa !5
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = sdiv i32 %17, %18
  store i32 %19, ptr %12, align 4, !tbaa !5
  %20 = load i32, ptr %12, align 4, !tbaa !5
  store i32 %20, ptr %11, align 4, !tbaa !5
  %21 = load i32, ptr %5, align 4, !tbaa !5
  %22 = ashr i32 %21, 1
  store i32 %22, ptr %13, align 4, !tbaa !5
  store i32 1, ptr %10, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %99, %4
  %24 = load i32, ptr %10, align 4, !tbaa !5
  %25 = load i32, ptr %13, align 4, !tbaa !5
  %26 = sub nsw i32 %25, 1
  %27 = icmp sle i32 %24, %26
  br i1 %27, label %28, label %102

28:                                               ; preds = %23
  %29 = load i32, ptr %5, align 4, !tbaa !5
  %30 = load i32, ptr %10, align 4, !tbaa !5
  %31 = sub nsw i32 %29, %30
  store i32 %31, ptr %9, align 4, !tbaa !5
  %32 = load ptr, ptr %8, align 8, !tbaa !9
  %33 = load i32, ptr %11, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds double, ptr %32, i64 %34
  %36 = load double, ptr %35, align 8, !tbaa !11
  %37 = load ptr, ptr %8, align 8, !tbaa !9
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = load i32, ptr %11, align 4, !tbaa !5
  %40 = sub nsw i32 %38, %39
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds double, ptr %37, i64 %41
  %43 = load double, ptr %42, align 8, !tbaa !11
  %44 = fsub double %36, %43
  store double %44, ptr %14, align 8, !tbaa !11
  %45 = load ptr, ptr %8, align 8, !tbaa !9
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds double, ptr %45, i64 %47
  %49 = load double, ptr %48, align 8, !tbaa !11
  %50 = load ptr, ptr %8, align 8, !tbaa !9
  %51 = load i32, ptr %7, align 4, !tbaa !5
  %52 = load i32, ptr %11, align 4, !tbaa !5
  %53 = sub nsw i32 %51, %52
  %54 = sext i32 %53 to i64
  %55 = getelementptr inbounds double, ptr %50, i64 %54
  %56 = load double, ptr %55, align 8, !tbaa !11
  %57 = fadd double %49, %56
  store double %57, ptr %15, align 8, !tbaa !11
  %58 = load i32, ptr %12, align 4, !tbaa !5
  %59 = load i32, ptr %11, align 4, !tbaa !5
  %60 = add nsw i32 %59, %58
  store i32 %60, ptr %11, align 4, !tbaa !5
  %61 = load double, ptr %15, align 8, !tbaa !11
  %62 = load ptr, ptr %6, align 8, !tbaa !9
  %63 = load i32, ptr %10, align 4, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = getelementptr inbounds double, ptr %62, i64 %64
  %66 = load double, ptr %65, align 8, !tbaa !11
  %67 = load double, ptr %14, align 8, !tbaa !11
  %68 = load ptr, ptr %6, align 8, !tbaa !9
  %69 = load i32, ptr %9, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = getelementptr inbounds double, ptr %68, i64 %70
  %72 = load double, ptr %71, align 8, !tbaa !11
  %73 = fmul double %67, %72
  %74 = fneg double %73
  %75 = call double @llvm.fmuladd.f64(double %61, double %66, double %74)
  store double %75, ptr %16, align 8, !tbaa !11
  %76 = load double, ptr %14, align 8, !tbaa !11
  %77 = load ptr, ptr %6, align 8, !tbaa !9
  %78 = load i32, ptr %10, align 4, !tbaa !5
  %79 = sext i32 %78 to i64
  %80 = getelementptr inbounds double, ptr %77, i64 %79
  %81 = load double, ptr %80, align 8, !tbaa !11
  %82 = load double, ptr %15, align 8, !tbaa !11
  %83 = load ptr, ptr %6, align 8, !tbaa !9
  %84 = load i32, ptr %9, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds double, ptr %83, i64 %85
  %87 = load double, ptr %86, align 8, !tbaa !11
  %88 = fmul double %82, %87
  %89 = call double @llvm.fmuladd.f64(double %76, double %81, double %88)
  %90 = load ptr, ptr %6, align 8, !tbaa !9
  %91 = load i32, ptr %10, align 4, !tbaa !5
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds double, ptr %90, i64 %92
  store double %89, ptr %93, align 8, !tbaa !11
  %94 = load double, ptr %16, align 8, !tbaa !11
  %95 = load ptr, ptr %6, align 8, !tbaa !9
  %96 = load i32, ptr %9, align 4, !tbaa !5
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds double, ptr %95, i64 %97
  store double %94, ptr %98, align 8, !tbaa !11
  br label %99

99:                                               ; preds = %28
  %100 = load i32, ptr %10, align 4, !tbaa !5
  %101 = add nsw i32 %100, 1
  store i32 %101, ptr %10, align 4, !tbaa !5
  br label %23, !llvm.loop !13

102:                                              ; preds = %23
  %103 = load ptr, ptr %8, align 8, !tbaa !9
  %104 = load i32, ptr %11, align 4, !tbaa !5
  %105 = sext i32 %104 to i64
  %106 = getelementptr inbounds double, ptr %103, i64 %105
  %107 = load double, ptr %106, align 8, !tbaa !11
  %108 = fmul double 2.000000e+00, %107
  %109 = load ptr, ptr %6, align 8, !tbaa !9
  %110 = load i32, ptr %13, align 4, !tbaa !5
  %111 = sext i32 %110 to i64
  %112 = getelementptr inbounds double, ptr %109, i64 %111
  %113 = load double, ptr %112, align 8, !tbaa !11
  %114 = fmul double %113, %108
  store double %114, ptr %112, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @dctsub(i32 noundef %0, ptr nocapture noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #0 {
  %5 = sdiv i32 %2, %0
  %6 = ashr i32 %0, 1
  %.not.not42 = icmp sgt i32 %6, 1
  br i1 %.not.not42, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %4
  %7 = zext nneg i32 %0 to i64
  %8 = sext i32 %5 to i64
  %9 = sext i32 %2 to i64
  %wide.trip.count = zext nneg i32 %6 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv45 = phi i64 [ %8, %.lr.ph.preheader ], [ %indvars.iv.next46, %.lr.ph ]
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %10 = sub nsw i64 %7, %indvars.iv
  %11 = getelementptr inbounds double, ptr %3, i64 %indvars.iv45
  %12 = load double, ptr %11, align 8, !tbaa !5
  %13 = sub nsw i64 %9, %indvars.iv45
  %14 = getelementptr inbounds double, ptr %3, i64 %13
  %15 = load double, ptr %14, align 8, !tbaa !5
  %16 = fsub double %12, %15
  %17 = fadd double %12, %15
  %indvars.iv.next46 = add nsw i64 %indvars.iv45, %8
  %18 = getelementptr inbounds double, ptr %1, i64 %indvars.iv
  %19 = load double, ptr %18, align 8, !tbaa !5
  %20 = getelementptr inbounds double, ptr %1, i64 %10
  %21 = load double, ptr %20, align 8, !tbaa !5
  %22 = fneg double %16
  %23 = fmul double %21, %22
  %24 = tail call double @llvm.fmuladd.f64(double %17, double %19, double %23)
  %25 = fmul double %17, %21
  %26 = tail call double @llvm.fmuladd.f64(double %16, double %19, double %25)
  store double %26, ptr %18, align 8, !tbaa !5
  store double %24, ptr %20, align 8, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit:                             ; preds = %.lr.ph
  %27 = trunc nsw i64 %indvars.iv.next46 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %4
  %.041.lcssa = phi i32 [ %5, %4 ], [ %27, %._crit_edge.loopexit ]
  %28 = sext i32 %.041.lcssa to i64
  %29 = getelementptr inbounds double, ptr %3, i64 %28
  %30 = load double, ptr %29, align 8, !tbaa !5
  %31 = fmul double %30, 2.000000e+00
  %32 = sext i32 %6 to i64
  %33 = getelementptr inbounds double, ptr %1, i64 %32
  %34 = load double, ptr %33, align 8, !tbaa !5
  %35 = fmul double %34, %31
  store double %35, ptr %33, align 8, !tbaa !5
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass