; LLVM IR from devantler/software-engineering-f22-shared :: IOT/BudgetManagementExcercise-03-28/ESP-Project/components/components/tinyusb (init)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CRG_XTAL_Type = type { i32, [3 x i32], i32, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, [3 x i32], i32, i32, [2 x i32], i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @da1469x_clock_sys_xtal32m_init() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store i32 65, ptr %2, align 4, !tbaa !5
  %3 = load volatile i32, ptr getelementptr inbounds (%struct.CRG_XTAL_Type, ptr inttoptr (i64 1342242816 to ptr), i32 0, i32 4), align 4, !tbaa !9
  store i32 %3, ptr %1, align 4, !tbaa !5
  %4 = load i32, ptr %1, align 4, !tbaa !5
  %5 = zext i32 %4 to i64
  %6 = and i64 %5, -512
  %7 = trunc i64 %6 to i32
  store i32 %7, ptr %1, align 4, !tbaa !5
  %8 = load i32, ptr %2, align 4, !tbaa !5
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = or i32 %9, %8
  store i32 %10, ptr %1, align 4, !tbaa !5
  %11 = load i32, ptr %1, align 4, !tbaa !5
  store volatile i32 %11, ptr getelementptr inbounds (%struct.CRG_XTAL_Type, ptr inttoptr (i64 1342242816 to ptr), i32 0, i32 4), align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"", !6, i64 0, !7, i64 4, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !7, i64 32, !6, i64 48, !6, i64 52, !6, i64 56, !6, i64 60, !6, i64 64, !7, i64 68, !6, i64 80, !6, i64 84, !7, i64 88, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @da1469x_clock_sys_xtal32m_init() local_unnamed_addr #0 {
  %1 = load volatile i32, ptr inttoptr (i64 1342242840 to ptr), align 8, !tbaa !5
  %2 = and i32 %1, -512
  %3 = or disjoint i32 %2, 65
  store volatile i32 %3, ptr inttoptr (i64 1342242840 to ptr), align 8, !tbaa !5
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"", !7, i64 0, !8, i64 4, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !8, i64 32, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64, !8, i64 68, !7, i64 80, !7, i64 84, !8, i64 88, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass