; LLVM IR from amritansh22/Data-Structures-and-Algorithms-in-cpp :: Graph (implement_travelling_salesman)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@n = external dso_local global i32, align 4
@dist = external dso_local global [10 x [10 x i32]], align 16
@VISITED = external dso_local global i32, align 4
@dp = external dso_local global [16 x [4 x i32]], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [32 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z19travelling_salesmanii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %31, %0
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = load i32, ptr @n, align 4, !tbaa !5
  %11 = icmp slt i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  store i32 2, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
  br label %34

13:                                               ; preds = %8
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %27, %13
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = load i32, ptr @n, align 4, !tbaa !5
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 5, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %30

19:                                               ; preds = %14
  %20 = load i32, ptr %2, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [10 x [10 x i32]], ptr @dist, i64 0, i64 %21
  %23 = load i32, ptr %4, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [10 x i32], ptr %22, i64 0, i64 %24
  %26 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %25)
  br label %27

27:                                               ; preds = %19
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = add nsw i32 %28, 1
  store i32 %29, ptr %4, align 4, !tbaa !5
  br label %14, !llvm.loop !9

30:                                               ; preds = %18
  br label %31

31:                                               ; preds = %30
  %32 = load i32, ptr %2, align 4, !tbaa !5
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %2, align 4, !tbaa !5
  br label %8, !llvm.loop !11

34:                                               ; preds = %12
  %35 = load i32, ptr @n, align 4, !tbaa !5
  %36 = shl i32 1, %35
  %37 = sub nsw i32 %36, 1
  store i32 %37, ptr @VISITED, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %38

38:                                               ; preds = %61, %34
  %39 = load i32, ptr %5, align 4, !tbaa !5
  %40 = load i32, ptr @n, align 4, !tbaa !5
  %41 = shl i32 1, %40
  %42 = icmp slt i32 %39, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %38
  store i32 8, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  br label %64

44:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %57, %44
  %46 = load i32, ptr %6, align 4, !tbaa !5
  %47 = load i32, ptr @n, align 4, !tbaa !5
  %48 = icmp slt i32 %46, %47
  br i1 %48, label %50, label %49

49:                                               ; preds = %45
  store i32 11, ptr %3, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %60

50:                                               ; preds = %45
  %51 = load i32, ptr %5, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds [16 x [4 x i32]], ptr @dp, i64 0, i64 %52
  %54 = load i32, ptr %6, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [4 x i32], ptr %53, i64 0, i64 %55
  store i32 -1, ptr %56, align 4, !tbaa !5
  br label %57

57:                                               ; preds = %50
  %58 = load i32, ptr %6, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %6, align 4, !tbaa !5
  br label %45, !llvm.loop !12

60:                                               ; preds = %49
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %5, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %5, align 4, !tbaa !5
  br label %38, !llvm.loop !13

64:                                               ; preds = %43
  %65 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef @.str)
  %66 = call noundef i32 @_Z19travelling_salesmanii(i32 noundef 1, i32 noundef 0)
  %67 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) %65, i32 noundef %66)
  ret i32 0
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #4

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }
%"class.std::basic_ostream" = type { ptr, %"class.std::basic_ios" }

@n = external dso_local global i32, align 4
@dist = external dso_local global [10 x [10 x i32]], align 16
@VISITED = external dso_local local_unnamed_addr global i32, align 4
@dp = external dso_local local_unnamed_addr global [16 x [4 x i32]], align 16
@_ZSt3cin = external global %"class.std::basic_istream", align 8
@_ZSt4cout = external global %"class.std::basic_ostream", align 8
@.str = external hidden unnamed_addr constant [32 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_Z19travelling_salesmanii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #1 {
  %1 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %3 = icmp sgt i32 %2, 0
  br i1 %3, label %.preheader16, label %.preheader.lr.ph.thread

.preheader.lr.ph.thread:                          ; preds = %0
  store i32 0, ptr @VISITED, align 4, !tbaa !5
  br label %._crit_edge24

.preheader16:                                     ; preds = %0, %._crit_edge
  %4 = phi i32 [ %20, %._crit_edge ], [ %2, %0 ]
  %indvars.iv29 = phi i64 [ %indvars.iv.next30, %._crit_edge ], [ 0, %0 ]
  %5 = icmp sgt i32 %4, 0
  br i1 %5, label %.lr.ph, label %.preheader16.._crit_edge_crit_edge

.preheader16.._crit_edge_crit_edge:               ; preds = %.preheader16
  %.pre = sext i32 %4 to i64
  br label %._crit_edge

._crit_edge19:                                    ; preds = %._crit_edge
  %notmask = shl nsw i32 -1, %20
  %6 = xor i32 %notmask, -1
  store i32 %6, ptr @VISITED, align 4, !tbaa !5
  %.not = icmp ne i32 %20, 31
  %7 = icmp sgt i32 %20, 0
  %or.cond = and i1 %.not, %7
  br i1 %or.cond, label %.preheader.us.preheader, label %._crit_edge24

.preheader.us.preheader:                          ; preds = %._crit_edge19
  %8 = shl nuw nsw i32 1, %20
  %9 = zext nneg i32 %20 to i64
  %10 = shl nuw nsw i64 %9, 2
  %wide.trip.count = zext nneg i32 %8 to i64
  %xtraiter = and i64 %wide.trip.count, 7
  %11 = icmp ult i32 %20, 3
  br i1 %11, label %._crit_edge24.loopexit.unr-lcssa, label %.preheader.us.preheader.new

.preheader.us.preheader.new:                      ; preds = %.preheader.us.preheader
  %unroll_iter = and i64 %wide.trip.count, 2147483640
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us, %.preheader.us.preheader.new
  %indvar = phi i64 [ 0, %.preheader.us.preheader.new ], [ %indvar.next.7, %.preheader.us ]
  %niter = phi i64 [ 0, %.preheader.us.preheader.new ], [ %niter.next.7, %.preheader.us ]
  %12 = shl nuw nsw i64 %indvar, 4
  %scevgep = getelementptr i8, ptr @dp, i64 %12
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next = shl i64 %indvar, 4
  %13 = or disjoint i64 %indvar.next, 16
  %scevgep.1 = getelementptr i8, ptr @dp, i64 %13
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.1, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.1 = shl i64 %indvar, 4
  %14 = or disjoint i64 %indvar.next.1, 32
  %scevgep.2 = getelementptr i8, ptr @dp, i64 %14
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.2, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.2 = shl i64 %indvar, 4
  %15 = or disjoint i64 %indvar.next.2, 48
  %scevgep.3 = getelementptr i8, ptr @dp, i64 %15
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.3, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.3 = shl i64 %indvar, 4
  %16 = or disjoint i64 %indvar.next.3, 64
  %scevgep.4 = getelementptr i8, ptr @dp, i64 %16
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.4, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.4 = shl i64 %indvar, 4
  %17 = or disjoint i64 %indvar.next.4, 80
  %scevgep.5 = getelementptr i8, ptr @dp, i64 %17
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.5, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.5 = shl i64 %indvar, 4
  %18 = or disjoint i64 %indvar.next.5, 96
  %scevgep.6 = getelementptr i8, ptr @dp, i64 %18
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.6, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.6 = shl i64 %indvar, 4
  %19 = or disjoint i64 %indvar.next.6, 112
  %scevgep.7 = getelementptr i8, ptr @dp, i64 %19
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.7, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.7 = add nuw nsw i64 %indvar, 8
  %niter.next.7 = add i64 %niter, 8
  %niter.ncmp.7 = icmp eq i64 %niter.next.7, %unroll_iter
  br i1 %niter.ncmp.7, label %._crit_edge24.loopexit.unr-lcssa, label %.preheader.us, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %.preheader16.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.preheader16.._crit_edge_crit_edge ], [ %25, %.lr.ph ]
  %20 = phi i32 [ %4, %.preheader16.._crit_edge_crit_edge ], [ %24, %.lr.ph ]
  %indvars.iv.next30 = add nuw nsw i64 %indvars.iv29, 1
  %21 = icmp slt i64 %indvars.iv.next30, %.pre-phi
  br i1 %21, label %.preheader16, label %._crit_edge19, !llvm.loop !11

.lr.ph:                                           ; preds = %.preheader16, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.preheader16 ]
  %22 = getelementptr inbounds [10 x [10 x i32]], ptr @dist, i64 0, i64 %indvars.iv29, i64 %indvars.iv
  %23 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %22)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %24 = load i32, ptr @n, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = icmp slt i64 %indvars.iv.next, %25
  br i1 %26, label %.lr.ph, label %._crit_edge, !llvm.loop !13

._crit_edge24.loopexit.unr-lcssa:                 ; preds = %.preheader.us, %.preheader.us.preheader
  %indvar.unr = phi i64 [ 0, %.preheader.us.preheader ], [ %indvar.next.7, %.preheader.us ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge24, label %.preheader.us.epil

.preheader.us.epil:                               ; preds = %._crit_edge24.loopexit.unr-lcssa, %.preheader.us.epil
  %indvar.epil = phi i64 [ %indvar.next.epil, %.preheader.us.epil ], [ %indvar.unr, %._crit_edge24.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.preheader.us.epil ], [ 0, %._crit_edge24.loopexit.unr-lcssa ]
  %27 = shl nuw nsw i64 %indvar.epil, 4
  %scevgep.epil = getelementptr i8, ptr @dp, i64 %27
  tail call void @llvm.memset.p0.i64(ptr align 16 %scevgep.epil, i8 -1, i64 %10, i1 false), !tbaa !5
  %indvar.next.epil = add nuw nsw i64 %indvar.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge24, label %.preheader.us.epil, !llvm.loop !14

._crit_edge24:                                    ; preds = %._crit_edge24.loopexit.unr-lcssa, %.preheader.us.epil, %.preheader.lr.ph.thread, %._crit_edge19
  %28 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) @_ZSt4cout, ptr noundef nonnull @.str)
  %29 = tail call noundef i32 @_Z19travelling_salesmanii(i32 noundef 1, i32 noundef 0)
  %30 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8) %28, i32 noundef %29)
  ret i32 0
}

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #3

declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEi(ptr noundef nonnull align 8 dereferenceable(8), i32 noundef) local_unnamed_addr #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10, !12}
!12 = !{!"llvm.loop.unswitch.partial.disable"}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.unroll.disable"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass