; LLVM IR from intel/qpl :: sources/core-iaa/sources/aecs (hw_aecs_compress)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.hw_iaa_aecs_compress = type { i32, i32, [5 x i32], i32, [256 x i8], %struct.hw_iaa_histogram, [12288 x i8] }
%struct.hw_iaa_histogram = type { [286 x i32], [2 x i32], [30 x i32], [2 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @hw_iaa_aecs_compress_write_deflate_fixed_header(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 0, ptr %8, align 4, !tbaa !9
  %10 = load i32, ptr %5, align 4, !tbaa !9
  %11 = icmp ule i32 2, %10
  br i1 %11, label %12, label %13

12:                                               ; preds = %2
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %69

13:                                               ; preds = %2
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %14, i32 0, i32 3
  %16 = load i32, ptr %15, align 4, !tbaa !11
  %17 = icmp uge i32 %16, 272
  br i1 %17, label %18, label %19

18:                                               ; preds = %13
  store i32 1, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %69

19:                                               ; preds = %13
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %20, i32 0, i32 3
  %22 = load i32, ptr %21, align 4, !tbaa !11
  %23 = and i32 %22, 7
  %24 = icmp eq i32 0, %23
  br i1 %24, label %25, label %42

25:                                               ; preds = %19
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %26, i32 0, i32 3
  %28 = load i32, ptr %27, align 4, !tbaa !11
  %29 = udiv i32 %28, 8
  store i32 %29, ptr %6, align 4, !tbaa !9
  %30 = load i32, ptr %5, align 4, !tbaa !9
  %31 = or i32 %30, 2
  %32 = trunc i32 %31 to i8
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %33, i32 0, i32 4
  %35 = load i32, ptr %6, align 4, !tbaa !9
  %36 = zext i32 %35 to i64
  %37 = getelementptr inbounds [256 x i8], ptr %34, i64 0, i64 %36
  store i8 %32, ptr %37, align 1, !tbaa !14
  %38 = load ptr, ptr %4, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %38, i32 0, i32 3
  %40 = load i32, ptr %39, align 4, !tbaa !11
  %41 = add i32 %40, 3
  store i32 %41, ptr %39, align 4, !tbaa !11
  br label %68

42:                                               ; preds = %19
  %43 = load ptr, ptr %4, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %43, i32 0, i32 3
  %45 = load i32, ptr %44, align 4, !tbaa !11
  %46 = udiv i32 %45, 8
  store i32 %46, ptr %6, align 4, !tbaa !9
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %47, i32 0, i32 3
  %49 = load i32, ptr %48, align 4, !tbaa !11
  %50 = and i32 %49, 7
  store i32 %50, ptr %7, align 4, !tbaa !9
  %51 = load i32, ptr %5, align 4, !tbaa !9
  %52 = or i32 %51, 2
  %53 = load i32, ptr %7, align 4, !tbaa !9
  %54 = shl i32 %52, %53
  store i32 %54, ptr %8, align 4, !tbaa !9
  %55 = load i32, ptr %8, align 4, !tbaa !9
  %56 = load ptr, ptr %4, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %56, i32 0, i32 4
  %58 = getelementptr inbounds [256 x i8], ptr %57, i64 0, i64 0
  %59 = load i32, ptr %6, align 4, !tbaa !9
  %60 = zext i32 %59 to i64
  %61 = getelementptr inbounds i8, ptr %58, i64 %60
  %62 = load i32, ptr %61, align 4, !tbaa !9
  %63 = or i32 %62, %55
  store i32 %63, ptr %61, align 4, !tbaa !9
  %64 = load ptr, ptr %4, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %64, i32 0, i32 3
  %66 = load i32, ptr %65, align 4, !tbaa !11
  %67 = add i32 %66, 3
  store i32 %67, ptr %65, align 4, !tbaa !11
  br label %68

68:                                               ; preds = %42, %25
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %69

69:                                               ; preds = %68, %18, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  %70 = load i32, ptr %3, align 4
  ret i32 %70
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 28}
!12 = !{!"", !10, i64 0, !10, i64 4, !7, i64 8, !10, i64 28, !7, i64 32, !13, i64 288, !7, i64 1568}
!13 = !{!"", !7, i64 0, !7, i64 1144, !7, i64 1152, !7, i64 1272}
!14 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local range(i32 0, 2) i32 @hw_iaa_aecs_compress_write_deflate_fixed_header(ptr nocapture noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp ugt i32 %1, 1
  br i1 %3, label %25, label %4

4:                                                ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 28
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %7 = icmp ugt i32 %6, 271
  br i1 %7, label %25, label %8

8:                                                ; preds = %4
  %9 = and i32 %6, 7
  %10 = icmp eq i32 %9, 0
  %11 = lshr i32 %6, 3
  %12 = getelementptr inbounds i8, ptr %0, i64 32
  %13 = zext nneg i32 %11 to i64
  br i1 %10, label %14, label %18

14:                                               ; preds = %8
  %15 = trunc nuw i32 %1 to i8
  %16 = or disjoint i8 %15, 2
  %17 = getelementptr inbounds [256 x i8], ptr %12, i64 0, i64 %13
  store i8 %16, ptr %17, align 1, !tbaa !11
  br label %24

18:                                               ; preds = %8
  %19 = or disjoint i32 %1, 2
  %20 = shl nuw nsw i32 %19, %9
  %21 = getelementptr inbounds i8, ptr %12, i64 %13
  %22 = load i32, ptr %21, align 4, !tbaa !12
  %23 = or i32 %22, %20
  store i32 %23, ptr %21, align 4, !tbaa !12
  br label %24

24:                                               ; preds = %18, %14
  %storemerge = add nuw nsw i32 %6, 3
  store i32 %storemerge, ptr %5, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %4, %2, %24
  %.0 = phi i32 [ 0, %24 ], [ 1, %2 ], [ 1, %4 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 28}
!6 = !{!"", !7, i64 0, !7, i64 4, !8, i64 8, !7, i64 28, !8, i64 32, !10, i64 288, !8, i64 1568}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"", !8, i64 0, !8, i64 1144, !8, i64 1152, !8, i64 1272}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass