; LLVM IR from DeanoC/gfx_imagecompress :: src/amd_hdr_encode.ll (ZN10HDR_Encode12covariance_dEPA4_fiS1_i)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10HDR_Encode12covariance_dEPA4_fiS1_i(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %67, %4
  %13 = load i32, ptr %9, align 4, !tbaa !9
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = icmp slt i32 %13, %14
  br i1 %15, label %16, label %70

16:                                               ; preds = %12
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %63, %16
  %18 = load i32, ptr %10, align 4, !tbaa !9
  %19 = load i32, ptr %9, align 4, !tbaa !9
  %20 = icmp sle i32 %18, %19
  br i1 %20, label %21, label %66

21:                                               ; preds = %17
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [4 x float], ptr %22, i64 %24
  %26 = load i32, ptr %10, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [4 x float], ptr %25, i64 0, i64 %27
  store float 0.000000e+00, ptr %28, align 4, !tbaa !11
  store i32 0, ptr %11, align 4, !tbaa !9
  br label %29

29:                                               ; preds = %59, %21
  %30 = load i32, ptr %11, align 4, !tbaa !9
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = icmp slt i32 %30, %31
  br i1 %32, label %33, label %62

33:                                               ; preds = %29
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = load i32, ptr %11, align 4, !tbaa !9
  %36 = sext i32 %35 to i64
  %37 = getelementptr inbounds [4 x float], ptr %34, i64 %36
  %38 = load i32, ptr %9, align 4, !tbaa !9
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [4 x float], ptr %37, i64 0, i64 %39
  %41 = load float, ptr %40, align 4, !tbaa !11
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load i32, ptr %11, align 4, !tbaa !9
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [4 x float], ptr %42, i64 %44
  %46 = load i32, ptr %10, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [4 x float], ptr %45, i64 0, i64 %47
  %49 = load float, ptr %48, align 4, !tbaa !11
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = load i32, ptr %9, align 4, !tbaa !9
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds [4 x float], ptr %50, i64 %52
  %54 = load i32, ptr %10, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [4 x float], ptr %53, i64 0, i64 %55
  %57 = load float, ptr %56, align 4, !tbaa !11
  %58 = call float @llvm.fmuladd.f32(float %41, float %49, float %57)
  store float %58, ptr %56, align 4, !tbaa !11
  br label %59

59:                                               ; preds = %33
  %60 = load i32, ptr %11, align 4, !tbaa !9
  %61 = add nsw i32 %60, 1
  store i32 %61, ptr %11, align 4, !tbaa !9
  br label %29, !llvm.loop !13

62:                                               ; preds = %29
  br label %63

63:                                               ; preds = %62
  %64 = load i32, ptr %10, align 4, !tbaa !9
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %10, align 4, !tbaa !9
  br label %17, !llvm.loop !15

66:                                               ; preds = %17
  br label %67

67:                                               ; preds = %66
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %9, align 4, !tbaa !9
  br label %12, !llvm.loop !16

70:                                               ; preds = %12
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %71

71:                                               ; preds = %102, %70
  %72 = load i32, ptr %9, align 4, !tbaa !9
  %73 = load i32, ptr %8, align 4, !tbaa !9
  %74 = icmp slt i32 %72, %73
  br i1 %74, label %75, label %105

75:                                               ; preds = %71
  %76 = load i32, ptr %9, align 4, !tbaa !9
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %10, align 4, !tbaa !9
  br label %78

78:                                               ; preds = %98, %75
  %79 = load i32, ptr %10, align 4, !tbaa !9
  %80 = load i32, ptr %8, align 4, !tbaa !9
  %81 = icmp slt i32 %79, %80
  br i1 %81, label %82, label %101

82:                                               ; preds = %78
  %83 = load ptr, ptr %7, align 8, !tbaa !5
  %84 = load i32, ptr %10, align 4, !tbaa !9
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [4 x float], ptr %83, i64 %85
  %87 = load i32, ptr %9, align 4, !tbaa !9
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds [4 x float], ptr %86, i64 0, i64 %88
  %90 = load float, ptr %89, align 4, !tbaa !11
  %91 = load ptr, ptr %7, align 8, !tbaa !5
  %92 = load i32, ptr %9, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = getelementptr inbounds [4 x float], ptr %91, i64 %93
  %95 = load i32, ptr %10, align 4, !tbaa !9
  %96 = sext i32 %95 to i64
  %97 = getelementptr inbounds [4 x float], ptr %94, i64 0, i64 %96
  store float %90, ptr %97, align 4, !tbaa !11
  br label %98

98:                                               ; preds = %82
  %99 = load i32, ptr %10, align 4, !tbaa !9
  %100 = add nsw i32 %99, 1
  store i32 %100, ptr %10, align 4, !tbaa !9
  br label %78, !llvm.loop !17

101:                                              ; preds = %78
  br label %102

102:                                              ; preds = %101
  %103 = load i32, ptr %9, align 4, !tbaa !9
  %104 = add nsw i32 %103, 1
  store i32 %104, ptr %9, align 4, !tbaa !9
  br label %71, !llvm.loop !18

105:                                              ; preds = %71
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}
!18 = distinct !{!18, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @_ZN10HDR_Encode12covariance_dEPA4_fiS1_i(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = icmp sgt i32 %3, 0
  br i1 %5, label %.preheader37.lr.ph, label %._crit_edge

.preheader37.lr.ph:                               ; preds = %4
  %6 = icmp sgt i32 %1, 0
  %wide.trip.count67 = zext nneg i32 %3 to i64
  br i1 %6, label %.preheader37.us.preheader, label %.preheader37.preheader

.preheader37.preheader:                           ; preds = %.preheader37.lr.ph
  %xtraiter = and i64 %wide.trip.count67, 3
  %7 = icmp ult i32 %3, 4
  br i1 %7, label %.preheader.loopexit83.unr-lcssa, label %.preheader37.preheader.new

.preheader37.preheader.new:                       ; preds = %.preheader37.preheader
  %unroll_iter = and i64 %wide.trip.count67, 2147483644
  br label %.preheader37

.preheader37.us.preheader:                        ; preds = %.preheader37.lr.ph
  %wide.trip.count48 = zext nneg i32 %1 to i64
  %xtraiter84 = and i64 %wide.trip.count48, 1
  %8 = icmp eq i32 %1, 1
  %unroll_iter87 = and i64 %wide.trip.count48, 2147483646
  %lcmp.mod86.not = icmp eq i64 %xtraiter84, 0
  br label %.preheader37.us

.preheader37.us:                                  ; preds = %.preheader37.us.preheader, %.split.us.us
  %indvars.iv62 = phi i64 [ 0, %.preheader37.us.preheader ], [ %indvars.iv.next63, %.split.us.us ]
  %indvars.iv60 = phi i64 [ 1, %.preheader37.us.preheader ], [ %indvars.iv.next61, %.split.us.us ]
  br label %.lr.ph.us.us

.lr.ph.us.us:                                     ; preds = %._crit_edge.us.us, %.preheader37.us
  %indvars.iv53 = phi i64 [ %indvars.iv.next54, %._crit_edge.us.us ], [ 0, %.preheader37.us ]
  %9 = getelementptr inbounds [4 x float], ptr %2, i64 %indvars.iv62, i64 %indvars.iv53
  store float 0.000000e+00, ptr %9, align 4, !tbaa !5
  br i1 %8, label %._crit_edge.us.us.unr-lcssa, label %.lr.ph.us.us.new

.lr.ph.us.us.new:                                 ; preds = %.lr.ph.us.us, %.lr.ph.us.us.new
  %indvars.iv = phi i64 [ %indvars.iv.next.1, %.lr.ph.us.us.new ], [ 0, %.lr.ph.us.us ]
  %10 = phi float [ %20, %.lr.ph.us.us.new ], [ 0.000000e+00, %.lr.ph.us.us ]
  %niter88 = phi i64 [ %niter88.next.1, %.lr.ph.us.us.new ], [ 0, %.lr.ph.us.us ]
  %11 = getelementptr inbounds [4 x float], ptr %0, i64 %indvars.iv, i64 %indvars.iv62
  %12 = load float, ptr %11, align 4, !tbaa !5
  %13 = getelementptr inbounds [4 x float], ptr %0, i64 %indvars.iv, i64 %indvars.iv53
  %14 = load float, ptr %13, align 4, !tbaa !5
  %15 = tail call float @llvm.fmuladd.f32(float %12, float %14, float %10)
  store float %15, ptr %9, align 4, !tbaa !5
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %16 = getelementptr inbounds [4 x float], ptr %0, i64 %indvars.iv.next, i64 %indvars.iv62
  %17 = load float, ptr %16, align 4, !tbaa !5
  %18 = getelementptr inbounds [4 x float], ptr %0, i64 %indvars.iv.next, i64 %indvars.iv53
  %19 = load float, ptr %18, align 4, !tbaa !5
  %20 = tail call float @llvm.fmuladd.f32(float %17, float %19, float %15)
  store float %20, ptr %9, align 4, !tbaa !5
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter88.next.1 = add i64 %niter88, 2
  %niter88.ncmp.1 = icmp eq i64 %niter88.next.1, %unroll_iter87
  br i1 %niter88.ncmp.1, label %._crit_edge.us.us.unr-lcssa, label %.lr.ph.us.us.new, !llvm.loop !9

._crit_edge.us.us.unr-lcssa:                      ; preds = %.lr.ph.us.us.new, %.lr.ph.us.us
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.us.us ], [ %indvars.iv.next.1, %.lr.ph.us.us.new ]
  %.unr = phi float [ 0.000000e+00, %.lr.ph.us.us ], [ %20, %.lr.ph.us.us.new ]
  br i1 %lcmp.mod86.not, label %._crit_edge.us.us, label %._crit_edge.us.us.epilog-lcssa

._crit_edge.us.us.epilog-lcssa:                   ; preds = %._crit_edge.us.us.unr-lcssa
  %21 = getelementptr inbounds [4 x float], ptr %0, i64 %indvars.iv.unr, i64 %indvars.iv62
  %22 = load float, ptr %21, align 4, !tbaa !5
  %23 = getelementptr inbounds [4 x float], ptr %0, i64 %indvars.iv.unr, i64 %indvars.iv53
  %24 = load float, ptr %23, align 4, !tbaa !5
  %25 = tail call float @llvm.fmuladd.f32(float %22, float %24, float %.unr)
  store float %25, ptr %9, align 4, !tbaa !5
  br label %._crit_edge.us.us

._crit_edge.us.us:                                ; preds = %._crit_edge.us.us.unr-lcssa, %._crit_edge.us.us.epilog-lcssa
  %indvars.iv.next54 = add nuw nsw i64 %indvars.iv53, 1
  %exitcond59.not = icmp eq i64 %indvars.iv.next54, %indvars.iv60
  br i1 %exitcond59.not, label %.split.us.us, label %.lr.ph.us.us, !llvm.loop !11

.split.us.us:                                     ; preds = %._crit_edge.us.us
  %indvars.iv.next63 = add nuw nsw i64 %indvars.iv62, 1
  %indvars.iv.next61 = add nuw nsw i64 %indvars.iv60, 1
  %exitcond68.not = icmp eq i64 %indvars.iv.next63, %wide.trip.count67
  br i1 %exitcond68.not, label %.preheader, label %.preheader37.us, !llvm.loop !12

.preheader37:                                     ; preds = %.preheader37, %.preheader37.preheader.new
  %indvar = phi i64 [ 0, %.preheader37.preheader.new ], [ %indvar.next.3, %.preheader37 ]
  %niter = phi i64 [ 0, %.preheader37.preheader.new ], [ %niter.next.3, %.preheader37 ]
  %26 = shl nuw nsw i64 %indvar, 4
  %scevgep = getelementptr i8, ptr %2, i64 %26
  %27 = shl nuw nsw i64 %indvar, 2
  %28 = or disjoint i64 %27, 4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep, i8 0, i64 %28, i1 false), !tbaa !5
  %indvar.next = or disjoint i64 %indvar, 1
  %29 = shl nuw nsw i64 %indvar.next, 4
  %scevgep.1 = getelementptr i8, ptr %2, i64 %29
  %30 = shl nuw nsw i64 %indvar.next, 2
  %31 = add nuw nsw i64 %30, 4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep.1, i8 0, i64 %31, i1 false), !tbaa !5
  %indvar.next.1 = or disjoint i64 %indvar, 2
  %32 = shl nuw nsw i64 %indvar.next.1, 4
  %scevgep.2 = getelementptr i8, ptr %2, i64 %32
  %33 = shl nuw nsw i64 %indvar.next.1, 2
  %34 = or disjoint i64 %33, 4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep.2, i8 0, i64 %34, i1 false), !tbaa !5
  %indvar.next.2 = or disjoint i64 %indvar, 3
  %35 = shl nuw nsw i64 %indvar.next.2, 4
  %scevgep.3 = getelementptr i8, ptr %2, i64 %35
  %36 = shl nuw nsw i64 %indvar.next.2, 2
  %37 = add nuw nsw i64 %36, 4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep.3, i8 0, i64 %37, i1 false), !tbaa !5
  %indvar.next.3 = add nuw nsw i64 %indvar, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %.preheader.loopexit83.unr-lcssa, label %.preheader37, !llvm.loop !12

.preheader.loopexit83.unr-lcssa:                  ; preds = %.preheader37, %.preheader37.preheader
  %indvar.unr = phi i64 [ 0, %.preheader37.preheader ], [ %indvar.next.3, %.preheader37 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.preheader, label %.preheader37.epil

.preheader37.epil:                                ; preds = %.preheader.loopexit83.unr-lcssa, %.preheader37.epil
  %indvar.epil = phi i64 [ %indvar.next.epil, %.preheader37.epil ], [ %indvar.unr, %.preheader.loopexit83.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.preheader37.epil ], [ 0, %.preheader.loopexit83.unr-lcssa ]
  %38 = shl nuw nsw i64 %indvar.epil, 4
  %scevgep.epil = getelementptr i8, ptr %2, i64 %38
  %39 = shl nuw nsw i64 %indvar.epil, 2
  %40 = add nuw nsw i64 %39, 4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep.epil, i8 0, i64 %40, i1 false), !tbaa !5
  %indvar.next.epil = add nuw nsw i64 %indvar.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %.preheader, label %.preheader37.epil, !llvm.loop !13

.preheader:                                       ; preds = %.preheader.loopexit83.unr-lcssa, %.preheader37.epil, %.split.us.us
  br i1 %5, label %.lr.ph43.preheader, label %._crit_edge

.lr.ph43.preheader:                               ; preds = %.preheader
  %41 = zext nneg i32 %3 to i64
  %wide.trip.count79 = zext nneg i32 %3 to i64
  br label %.lr.ph43

.loopexit:                                        ; preds = %.lr.ph, %.lr.ph43
  %indvars.iv.next70 = add nuw nsw i64 %indvars.iv69, 1
  %exitcond80.not = icmp eq i64 %indvars.iv.next77, %wide.trip.count79
  br i1 %exitcond80.not, label %._crit_edge, label %.lr.ph43, !llvm.loop !15

.lr.ph43:                                         ; preds = %.lr.ph43.preheader, %.loopexit
  %indvars.iv76 = phi i64 [ 0, %.lr.ph43.preheader ], [ %indvars.iv.next77, %.loopexit ]
  %indvars.iv69 = phi i64 [ 1, %.lr.ph43.preheader ], [ %indvars.iv.next70, %.loopexit ]
  %indvars.iv.next77 = add nuw nsw i64 %indvars.iv76, 1
  %42 = icmp ult i64 %indvars.iv.next77, %41
  br i1 %42, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.lr.ph43, %.lr.ph
  %indvars.iv71 = phi i64 [ %indvars.iv.next72, %.lr.ph ], [ %indvars.iv69, %.lr.ph43 ]
  %43 = getelementptr inbounds [4 x float], ptr %2, i64 %indvars.iv71, i64 %indvars.iv76
  %44 = load float, ptr %43, align 4, !tbaa !5
  %45 = getelementptr inbounds [4 x float], ptr %2, i64 %indvars.iv76, i64 %indvars.iv71
  store float %44, ptr %45, align 4, !tbaa !5
  %indvars.iv.next72 = add nuw nsw i64 %indvars.iv71, 1
  %exitcond75.not = icmp eq i64 %indvars.iv.next72, %wide.trip.count79
  br i1 %exitcond75.not, label %.loopexit, label %.lr.ph, !llvm.loop !16

._crit_edge:                                      ; preds = %.loopexit, %4, %.preheader
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.unroll.disable"}
!15 = distinct !{!15, !10}
!16 = distinct !{!16, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass