; LLVM IR from intel/qpl :: sources/core-sw/src/filtering (qplc_pack_idx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @px_qplc_pack_index_8u32u(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %17 = load ptr, ptr %10, align 8, !tbaa !5
  %18 = load i32, ptr %17, align 4, !tbaa !9
  %19 = zext i32 %18 to i64
  store i64 %19, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  %20 = load ptr, ptr %8, align 8, !tbaa !5
  %21 = load ptr, ptr %20, align 8, !tbaa !5
  store ptr %21, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #2
  %22 = load ptr, ptr %13, align 8, !tbaa !5
  %23 = load i32, ptr %9, align 4, !tbaa !9
  %24 = lshr i32 %23, 2
  %25 = zext i32 %24 to i64
  %26 = getelementptr inbounds i32, ptr %22, i64 %25
  store ptr %26, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %58, %5
  %28 = load i32, ptr %15, align 4, !tbaa !9
  %29 = load i32, ptr %7, align 4, !tbaa !9
  %30 = icmp ult i32 %28, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %27
  store i32 2, ptr %16, align 4
  br label %61

32:                                               ; preds = %27
  %33 = load ptr, ptr %6, align 8, !tbaa !5
  %34 = load i32, ptr %15, align 4, !tbaa !9
  %35 = zext i32 %34 to i64
  %36 = getelementptr inbounds i8, ptr %33, i64 %35
  %37 = load i8, ptr %36, align 1, !tbaa !13
  %38 = zext i8 %37 to i32
  %39 = icmp ult i32 0, %38
  br i1 %39, label %40, label %55

40:                                               ; preds = %32
  %41 = load i64, ptr %11, align 8, !tbaa !11
  %42 = icmp ult i64 4294967295, %41
  br i1 %42, label %43, label %44

43:                                               ; preds = %40
  store i32 221, ptr %12, align 4, !tbaa !9
  store i32 2, ptr %16, align 4
  br label %61

44:                                               ; preds = %40
  %45 = load ptr, ptr %13, align 8, !tbaa !5
  %46 = load ptr, ptr %14, align 8, !tbaa !5
  %47 = icmp uge ptr %45, %46
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  store i32 225, ptr %12, align 4, !tbaa !9
  store i32 2, ptr %16, align 4
  br label %61

49:                                               ; preds = %44
  %50 = load i64, ptr %11, align 8, !tbaa !11
  %51 = trunc i64 %50 to i32
  %52 = load ptr, ptr %13, align 8, !tbaa !5
  store i32 %51, ptr %52, align 4, !tbaa !9
  %53 = load ptr, ptr %13, align 8, !tbaa !5
  %54 = getelementptr inbounds i32, ptr %53, i32 1
  store ptr %54, ptr %13, align 8, !tbaa !5
  br label %55

55:                                               ; preds = %49, %32
  %56 = load i64, ptr %11, align 8, !tbaa !11
  %57 = add i64 %56, 1
  store i64 %57, ptr %11, align 8, !tbaa !11
  br label %58

58:                                               ; preds = %55
  %59 = load i32, ptr %15, align 4, !tbaa !9
  %60 = add i32 %59, 1
  store i32 %60, ptr %15, align 4, !tbaa !9
  br label %27, !llvm.loop !14

61:                                               ; preds = %48, %43, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  br label %62

62:                                               ; preds = %61
  %63 = load ptr, ptr %13, align 8, !tbaa !5
  %64 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %63, ptr %64, align 8, !tbaa !5
  %65 = load i64, ptr %11, align 8, !tbaa !11
  %66 = trunc i64 %65 to i32
  %67 = load ptr, ptr %10, align 8, !tbaa !5
  store i32 %66, ptr %67, align 4, !tbaa !9
  %68 = load i32, ptr %12, align 4, !tbaa !9
  store i32 1, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  ret i32 %68
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local range(i32 0, 226) i32 @px_qplc_pack_index_8u32u(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef %2, i32 noundef %3, ptr nocapture noundef %4) local_unnamed_addr #0 {
  %6 = load i32, ptr %4, align 4, !tbaa !5
  %7 = load ptr, ptr %2, align 8, !tbaa !9
  %8 = lshr i32 %3, 2
  %9 = zext nneg i32 %8 to i64
  %10 = getelementptr inbounds i32, ptr %7, i64 %9
  %.not37 = icmp eq i32 %1, 0
  br i1 %.not37, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %5
  %11 = zext i32 %6 to i64
  %wide.trip.count = zext i32 %1 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %20
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %20 ]
  %.02025 = phi i64 [ %11, %.lr.ph.preheader ], [ %21, %20 ]
  %.02124 = phi ptr [ %7, %.lr.ph.preheader ], [ %.1, %20 ]
  %12 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv
  %13 = load i8, ptr %12, align 1, !tbaa !11
  %.not = icmp eq i8 %13, 0
  br i1 %.not, label %20, label %14

14:                                               ; preds = %.lr.ph
  %15 = icmp ugt i64 %.02025, 4294967295
  br i1 %15, label %._crit_edge.loopexit, label %16

16:                                               ; preds = %14
  %.not23 = icmp ult ptr %.02124, %10
  br i1 %.not23, label %17, label %._crit_edge.loopexit

17:                                               ; preds = %16
  %18 = trunc nuw i64 %.02025 to i32
  store i32 %18, ptr %.02124, align 4, !tbaa !5
  %19 = getelementptr inbounds i8, ptr %.02124, i64 4
  br label %20

20:                                               ; preds = %17, %.lr.ph
  %.1 = phi ptr [ %19, %17 ], [ %.02124, %.lr.ph ]
  %21 = add nuw nsw i64 %.02025, 1
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !12

._crit_edge.loopexit:                             ; preds = %16, %14, %20
  %.021.lcssa.ph = phi ptr [ %.1, %20 ], [ %.02124, %14 ], [ %.02124, %16 ]
  %.020.lcssa.ph = phi i64 [ %21, %20 ], [ %.02025, %14 ], [ %.02025, %16 ]
  %.022.ph = phi i32 [ 0, %20 ], [ 221, %14 ], [ 225, %16 ]
  %22 = trunc i64 %.020.lcssa.ph to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %5
  %.021.lcssa = phi ptr [ %7, %5 ], [ %.021.lcssa.ph, %._crit_edge.loopexit ]
  %.020.lcssa = phi i32 [ %6, %5 ], [ %22, %._crit_edge.loopexit ]
  %.022 = phi i32 [ 0, %5 ], [ %.022.ph, %._crit_edge.loopexit ]
  store ptr %.021.lcssa, ptr %2, align 8, !tbaa !9
  store i32 %.020.lcssa, ptr %4, align 4, !tbaa !5
  ret i32 %.022
}

attributes #0 = { nofree norecurse nosync nounwind memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass