; LLVM IR from codemistic/Data-Structures-and-Algorithms :: CPP/recursion/N_Queens/N_Queens.ll (Z11canBePlacedRSt6vectorIS_IiSaIiEESaIS1_EEiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z11canBePlacedRSt6vectorIS_IiSaIiEESaIS1_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #1 {
  %5 = alloca i1, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %14

14:                                               ; preds = %31, %4
  %15 = load i32, ptr %10, align 4, !tbaa !9
  %16 = load i32, ptr %7, align 4, !tbaa !9
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 2, ptr %11, align 4
  br label %34

19:                                               ; preds = %14
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = load i32, ptr %10, align 4, !tbaa !9
  %22 = sext i32 %21 to i64
  %23 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %22) #2
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !9
  %28 = icmp eq i32 %27, 1
  br i1 %28, label %29, label %30

29:                                               ; preds = %19
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %34

30:                                               ; preds = %19
  br label %31

31:                                               ; preds = %30
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %10, align 4, !tbaa !9
  br label %14, !llvm.loop !11

34:                                               ; preds = %29, %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  %35 = load i32, ptr %11, align 4
  switch i32 %35, label %93 [
    i32 2, label %36
    i32 1, label %91
  ]

36:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %37 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %37, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #2
  %38 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %38, ptr %13, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %58, %36
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = icmp sge i32 %40, 0
  br i1 %41, label %42, label %45

42:                                               ; preds = %39
  %43 = load i32, ptr %8, align 4, !tbaa !9
  %44 = icmp sge i32 %43, 0
  br label %45

45:                                               ; preds = %42, %39
  %46 = phi i1 [ false, %39 ], [ %44, %42 ]
  br i1 %46, label %47, label %63

47:                                               ; preds = %45
  %48 = load ptr, ptr %6, align 8, !tbaa !5
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50) #2
  %52 = load i32, ptr %8, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %51, i64 noundef %53) #2
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = icmp eq i32 %55, 1
  br i1 %56, label %57, label %58

57:                                               ; preds = %47
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %90

58:                                               ; preds = %47
  %59 = load i32, ptr %7, align 4, !tbaa !9
  %60 = add nsw i32 %59, -1
  store i32 %60, ptr %7, align 4, !tbaa !9
  %61 = load i32, ptr %8, align 4, !tbaa !9
  %62 = add nsw i32 %61, -1
  store i32 %62, ptr %8, align 4, !tbaa !9
  br label %39, !llvm.loop !13

63:                                               ; preds = %45
  br label %64

64:                                               ; preds = %84, %63
  %65 = load i32, ptr %12, align 4, !tbaa !9
  %66 = icmp sge i32 %65, 0
  br i1 %66, label %67, label %71

67:                                               ; preds = %64
  %68 = load i32, ptr %13, align 4, !tbaa !9
  %69 = load i32, ptr %9, align 4, !tbaa !9
  %70 = icmp slt i32 %68, %69
  br label %71

71:                                               ; preds = %67, %64
  %72 = phi i1 [ false, %64 ], [ %70, %67 ]
  br i1 %72, label %73, label %89

73:                                               ; preds = %71
  %74 = load ptr, ptr %6, align 8, !tbaa !5
  %75 = load i32, ptr %12, align 4, !tbaa !9
  %76 = sext i32 %75 to i64
  %77 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %76) #2
  %78 = load i32, ptr %13, align 4, !tbaa !9
  %79 = sext i32 %78 to i64
  %80 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %77, i64 noundef %79) #2
  %81 = load i32, ptr %80, align 4, !tbaa !9
  %82 = icmp eq i32 %81, 1
  br i1 %82, label %83, label %84

83:                                               ; preds = %73
  store i1 false, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %90

84:                                               ; preds = %73
  %85 = load i32, ptr %12, align 4, !tbaa !9
  %86 = add nsw i32 %85, -1
  store i32 %86, ptr %12, align 4, !tbaa !9
  %87 = load i32, ptr %13, align 4, !tbaa !9
  %88 = add nsw i32 %87, 1
  store i32 %88, ptr %13, align 4, !tbaa !9
  br label %64, !llvm.loop !14

89:                                               ; preds = %71
  store i1 true, ptr %5, align 1
  store i32 1, ptr %11, align 4
  br label %90

90:                                               ; preds = %89, %83, %57
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %91

91:                                               ; preds = %90, %34
  %92 = load i1, ptr %5, align 1
  ret i1 %92

93:                                               ; preds = %34
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z11canBePlacedRSt6vectorIS_IiSaIiEESaIS1_EEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = icmp sgt i32 %1, 0
  br i1 %5, label %.lr.ph, label %.preheader33

.lr.ph:                                           ; preds = %4
  %6 = sext i32 %2 to i64
  %wide.trip.count = zext nneg i32 %1 to i64
  br label %12

7:                                                ; preds = %12
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader33, label %12, !llvm.loop !5

.preheader33:                                     ; preds = %7, %4
  %8 = or i32 %1, %2
  %9 = icmp sgt i32 %8, -1
  br i1 %9, label %.lr.ph39.preheader, label %.preheader

.lr.ph39.preheader:                               ; preds = %.preheader33
  %10 = zext i32 %2 to i64
  %11 = zext i32 %1 to i64
  br label %.lr.ph39

12:                                               ; preds = %.lr.ph, %7
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %7 ]
  %13 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #1
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %6) #1
  %15 = load i32, ptr %14, align 4, !tbaa !7
  %16 = icmp eq i32 %15, 1
  br i1 %16, label %.thread, label %7

.preheader:                                       ; preds = %27, %.preheader33
  %17 = icmp sgt i32 %1, -1
  %18 = icmp slt i32 %2, %3
  %19 = and i1 %17, %18
  br i1 %19, label %.lr.ph42.preheader, label %.thread

.lr.ph42.preheader:                               ; preds = %.preheader
  %20 = sext i32 %2 to i64
  %21 = sext i32 %3 to i64
  %22 = zext nneg i32 %1 to i64
  br label %.lr.ph42

.lr.ph39:                                         ; preds = %.lr.ph39.preheader, %27
  %indvars.iv50 = phi i64 [ %11, %.lr.ph39.preheader ], [ %indvars.iv.next51, %27 ]
  %indvars.iv48 = phi i64 [ %10, %.lr.ph39.preheader ], [ %indvars.iv.next49, %27 ]
  %23 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv50) #1
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %23, i64 noundef %indvars.iv48) #1
  %25 = load i32, ptr %24, align 4, !tbaa !7
  %26 = icmp eq i32 %25, 1
  br i1 %26, label %.thread, label %27

27:                                               ; preds = %.lr.ph39
  %indvars.iv.next51 = add nsw i64 %indvars.iv50, -1
  %indvars.iv.next49 = add nsw i64 %indvars.iv48, -1
  %28 = trunc nuw i64 %indvars.iv50 to i32
  %29 = icmp sgt i32 %28, 0
  %30 = trunc nuw i64 %indvars.iv48 to i32
  %31 = icmp sgt i32 %30, 0
  %32 = select i1 %29, i1 %31, i1 false
  br i1 %32, label %.lr.ph39, label %.preheader, !llvm.loop !11

.lr.ph42:                                         ; preds = %.lr.ph42.preheader, %36
  %indvars.iv57 = phi i64 [ %22, %.lr.ph42.preheader ], [ %indvars.iv.next58, %36 ]
  %indvars.iv55 = phi i64 [ %20, %.lr.ph42.preheader ], [ %indvars.iv.next56, %36 ]
  %33 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IiSaIiEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv57) #1
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %indvars.iv55) #1
  %35 = load i32, ptr %34, align 4, !tbaa !7
  %.not = icmp ne i32 %35, 1
  br i1 %.not, label %36, label %.thread

36:                                               ; preds = %.lr.ph42
  %indvars.iv.next58 = add nsw i64 %indvars.iv57, -1
  %indvars.iv.next56 = add nsw i64 %indvars.iv55, 1
  %37 = icmp sgt i64 %indvars.iv57, 0
  %38 = icmp slt i64 %indvars.iv.next56, %21
  %39 = select i1 %37, i1 %38, i1 false
  br i1 %39, label %.lr.ph42, label %.thread, !llvm.loop !12

.thread:                                          ; preds = %12, %.lr.ph39, %36, %.lr.ph42, %.preheader
  %.2 = phi i1 [ true, %.preheader ], [ %.not, %.lr.ph42 ], [ %.not, %36 ], [ false, %.lr.ph39 ], [ false, %12 ]
  ret i1 %.2
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = distinct !{!11, !6}
!12 = distinct !{!12, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass