; LLVM IR from glaretechnologies/substrata :: opus/opus-1.3.1/silk (sigm_Q15)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sigm_LUT_neg_Q15 = external hidden constant [6 x i32], align 16
@sigm_LUT_slope_Q10 = external hidden constant [6 x i32], align 16
@sigm_LUT_pos_Q15 = external hidden constant [6 x i32], align 16

; Function Attrs: nounwind uwtable
define dso_local i32 @silk_sigm_Q15(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  %6 = load i32, ptr %3, align 4, !tbaa !5
  %7 = icmp slt i32 %6, 0
  br i1 %7, label %8, label %33

8:                                                ; preds = %1
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = sub nsw i32 0, %9
  store i32 %10, ptr %3, align 4, !tbaa !5
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = icmp sge i32 %11, 192
  br i1 %12, label %13, label %14

13:                                               ; preds = %8
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %56

14:                                               ; preds = %8
  %15 = load i32, ptr %3, align 4, !tbaa !5
  %16 = ashr i32 %15, 5
  store i32 %16, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr %4, align 4, !tbaa !5
  %18 = sext i32 %17 to i64
  %19 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_neg_Q15, i64 0, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_slope_Q10, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = trunc i32 %24 to i16
  %26 = sext i16 %25 to i32
  %27 = load i32, ptr %3, align 4, !tbaa !5
  %28 = and i32 %27, 31
  %29 = trunc i32 %28 to i16
  %30 = sext i16 %29 to i32
  %31 = mul nsw i32 %26, %30
  %32 = sub nsw i32 %20, %31
  store i32 %32, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %56

33:                                               ; preds = %1
  %34 = load i32, ptr %3, align 4, !tbaa !5
  %35 = icmp sge i32 %34, 192
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  store i32 32767, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %56

37:                                               ; preds = %33
  %38 = load i32, ptr %3, align 4, !tbaa !5
  %39 = ashr i32 %38, 5
  store i32 %39, ptr %4, align 4, !tbaa !5
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_pos_Q15, i64 0, i64 %41
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = load i32, ptr %4, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_slope_Q10, i64 0, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = trunc i32 %47 to i16
  %49 = sext i16 %48 to i32
  %50 = load i32, ptr %3, align 4, !tbaa !5
  %51 = and i32 %50, 31
  %52 = trunc i32 %51 to i16
  %53 = sext i16 %52 to i32
  %54 = mul nsw i32 %49, %53
  %55 = add nsw i32 %43, %54
  store i32 %55, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %56

56:                                               ; preds = %37, %36, %14, %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %57 = load i32, ptr %2, align 4
  ret i32 %57
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@sigm_LUT_neg_Q15 = external hidden local_unnamed_addr constant [6 x i32], align 16
@sigm_LUT_slope_Q10 = external hidden local_unnamed_addr constant [6 x i32], align 16
@sigm_LUT_pos_Q15 = external hidden local_unnamed_addr constant [6 x i32], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local i32 @silk_sigm_Q15(i32 noundef %0) local_unnamed_addr #0 {
  %2 = icmp slt i32 %0, 0
  br i1 %2, label %3, label %17

3:                                                ; preds = %1
  %4 = icmp ult i32 %0, -191
  br i1 %4, label %30, label %5

5:                                                ; preds = %3
  %6 = sub nsw i32 0, %0
  %7 = lshr i32 %6, 5
  %8 = zext nneg i32 %7 to i64
  %9 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_neg_Q15, i64 0, i64 %8
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_slope_Q10, i64 0, i64 %8
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %sext15 = shl i32 %12, 16
  %13 = ashr exact i32 %sext15, 16
  %14 = and i32 %6, 31
  %15 = mul nsw i32 %13, %14
  %16 = sub nsw i32 %10, %15
  br label %30

17:                                               ; preds = %1
  %18 = icmp ugt i32 %0, 191
  br i1 %18, label %30, label %19

19:                                               ; preds = %17
  %20 = lshr i32 %0, 5
  %21 = zext nneg i32 %20 to i64
  %22 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_pos_Q15, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = getelementptr inbounds [6 x i32], ptr @sigm_LUT_slope_Q10, i64 0, i64 %21
  %25 = load i32, ptr %24, align 4, !tbaa !5
  %sext = shl i32 %25, 16
  %26 = ashr exact i32 %sext, 16
  %27 = and i32 %0, 31
  %28 = mul nsw i32 %26, %27
  %29 = add nsw i32 %28, %23
  br label %30

30:                                               ; preds = %17, %3, %19, %5
  %.0 = phi i32 [ %16, %5 ], [ %29, %19 ], [ 0, %3 ], [ 32767, %17 ]
  ret i32 %.0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass