; LLVM IR from intel/qpl :: sources/c_api (job_execution_api)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.qpl_job = type { ptr, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, ptr, i32, i32, i8, i8, i8, i64, i64, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.qpl_aux_data }
%struct.qpl_aux_data = type { ptr, ptr, ptr, ptr, ptr, i32 }
%struct.qpl_hw_state = type { %struct.hw_decompress_analytics_descriptor, %struct.hw_iaa_completion_record, [2 x %struct.hw_iaa_aecs_analytic], [2 x %struct.hw_iaa_aecs_compress], %struct.qpl_buffer, %struct.qpl_execution_history, i32, i32, i32, %struct.hw_huffman_code, i32, %struct.hw_accelerator_context, i32, i32, i8, i8, i32, i32, %struct.qpl_execution_record }
%struct.hw_decompress_analytics_descriptor = type { i32, i32, ptr, ptr, ptr, i32, i16, i16, ptr, i32, i32, i32, i32 }
%struct.hw_iaa_completion_record = type { i8, i8, i8, i8, i32, i64, i64, i32, i8, i8, i16, i32, i32, i32, i32, i64, i64 }
%struct.hw_iaa_aecs_analytic = type { %struct.hw_iaa_aecs_filter, [36 x i32], %struct.hw_iaa_aecs_decompress }
%struct.hw_iaa_aecs_filter = type { i32, i32, i32, i32, i32, i32 }
%struct.hw_iaa_aecs_decompress = type { [2 x i32], i32, i32, [32 x i64], [32 x i8], i32, i8, i8, i16, [5 x i32], [5 x i32], [5 x i32], [5 x i32], [62 x i32], %union.anon, i16, i16, %union.anon.0, %struct.anon.2, i16, [4096 x i8], [6 x i32] }
%union.anon = type { %struct.anon }
%struct.anon = type { [6 x i32], [224 x i8], [5 x i32] }
%union.anon.0 = type { %struct.anon.1 }
%struct.anon.1 = type { [2 x i32], [144 x i8], [5 x i32] }
%struct.anon.2 = type { i16 }
%struct.hw_iaa_aecs_compress = type { i32, i32, [5 x i32], i32, [256 x i8], %struct.hw_iaa_histogram, [12288 x i8] }
%struct.hw_iaa_histogram = type { [286 x i32], [2 x i32], [30 x i32], [2 x i32] }
%struct.qpl_buffer = type { [1024 x i8], i32, i32 }
%struct.qpl_execution_history = type { i8, i32, i32, i32, ptr }
%struct.hw_huffman_code = type { i16, i8, i8 }
%struct.hw_accelerator_context = type { %struct.hw_device_properties, ptr }
%struct.hw_device_properties = type { i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
%struct.qpl_execution_record = type { double, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef, i1 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef, i32 noundef) #1

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local i32 @qpl_check_job(ptr noundef %0) #3 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 0, ptr %4, align 4, !tbaa !9
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = getelementptr inbounds %struct.qpl_job, ptr %8, i32 0, i32 39
  %10 = getelementptr inbounds %struct.qpl_aux_data, ptr %9, i32 0, i32 5
  %11 = load i32, ptr %10, align 8, !tbaa !11
  %12 = icmp eq i32 2, %11
  br i1 %12, label %25, label %13

13:                                               ; preds = %1
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.qpl_job, ptr %14, i32 0, i32 39
  %16 = getelementptr inbounds %struct.qpl_aux_data, ptr %15, i32 0, i32 5
  %17 = load i32, ptr %16, align 8, !tbaa !11
  %18 = icmp eq i32 0, %17
  br i1 %18, label %19, label %26

19:                                               ; preds = %13
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = call noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef %20) #5
  %22 = getelementptr inbounds %struct.qpl_hw_state, ptr %21, i32 0, i32 15
  %23 = load i8, ptr %22, align 1, !tbaa !22, !range !39, !noundef !40
  %24 = trunc i8 %23 to i1
  br i1 %24, label %25, label %26

25:                                               ; preds = %19, %1
  store i32 0, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %71

26:                                               ; preds = %19, %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = call noundef i32 @_ZN3qpl3jobL20get_async_job_statusEPK7qpl_job(ptr noundef %27) #5
  store i32 %28, ptr %6, align 4, !tbaa !41
  %29 = load i32, ptr %6, align 4, !tbaa !41
  %30 = icmp ne i32 %29, 1
  br i1 %30, label %31, label %33

31:                                               ; preds = %26
  %32 = load i32, ptr %6, align 4, !tbaa !41
  store i32 %32, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %70

33:                                               ; preds = %26
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = call noundef zeroext i1 @_ZN3qpl3jobL24is_supported_on_hardwareEPK7qpl_job(ptr noundef %34)
  br i1 %35, label %36, label %39

36:                                               ; preds = %33
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = call i32 @hw_check_job(ptr noundef %37)
  store i32 %38, ptr %4, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %36, %33
  %40 = load i32, ptr %4, align 4, !tbaa !9
  %41 = icmp eq i32 1, %40
  br i1 %41, label %42, label %44

42:                                               ; preds = %39
  %43 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %43, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %70

44:                                               ; preds = %39
  %45 = load i32, ptr %4, align 4, !tbaa !9
  %46 = icmp ne i32 0, %45
  br i1 %46, label %47, label %66

47:                                               ; preds = %44
  %48 = load ptr, ptr %3, align 8, !tbaa !5
  %49 = load i32, ptr %4, align 4, !tbaa !9
  %50 = call noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef %48, i32 noundef %49)
  br i1 %50, label %51, label %66

51:                                               ; preds = %47
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef %52, i1 noundef zeroext true) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.qpl_job, ptr %53, i32 0, i32 39
  %55 = getelementptr inbounds %struct.qpl_aux_data, ptr %54, i32 0, i32 5
  %56 = load i32, ptr %55, align 8, !tbaa !11
  store i32 %56, ptr %7, align 4, !tbaa !42
  %57 = load ptr, ptr %3, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.qpl_job, ptr %57, i32 0, i32 39
  %59 = getelementptr inbounds %struct.qpl_aux_data, ptr %58, i32 0, i32 5
  store i32 2, ptr %59, align 8, !tbaa !11
  %60 = load ptr, ptr %3, align 8, !tbaa !5
  %61 = call noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef %60)
  store i32 %61, ptr %4, align 4, !tbaa !9
  %62 = load i32, ptr %7, align 4, !tbaa !42
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = getelementptr inbounds %struct.qpl_job, ptr %63, i32 0, i32 39
  %65 = getelementptr inbounds %struct.qpl_aux_data, ptr %64, i32 0, i32 5
  store i32 %62, ptr %65, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %66

66:                                               ; preds = %51, %47, %44
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = load i32, ptr %4, align 4, !tbaa !9
  call void @_ZN3qpl3jobL20set_async_job_statusEP7qpl_job10qpl_status(ptr noundef %67, i32 noundef %68) #5
  %69 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %69, ptr %2, align 4
  store i32 1, ptr %5, align 4
  br label %70

70:                                               ; preds = %66, %42, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %71

71:                                               ; preds = %70, %25
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  %72 = load i32, ptr %2, align 4
  ret i32 %72
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZN3qpl3jobL20get_async_job_statusEPK7qpl_job(ptr noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL24is_supported_on_hardwareEPK7qpl_job(ptr noundef) #1

declare i32 @hw_check_job(ptr noundef) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL20set_async_job_statusEP7qpl_job10qpl_status(ptr noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !21, i64 232}
!12 = !{!"_ZTS7qpl_job", !6, i64 0, !10, i64 8, !10, i64 12, !6, i64 16, !10, i64 24, !10, i64 28, !13, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !14, i64 52, !15, i64 56, !6, i64 64, !6, i64 72, !16, i64 80, !6, i64 88, !10, i64 96, !10, i64 100, !7, i64 104, !7, i64 105, !7, i64 106, !17, i64 112, !17, i64 120, !6, i64 128, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !18, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !19, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !20, i64 192}
!13 = !{!"_ZTS13qpl_operation", !7, i64 0}
!14 = !{!"_ZTS22qpl_compression_levels", !7, i64 0}
!15 = !{!"_ZTS19qpl_statistics_mode", !7, i64 0}
!16 = !{!"_ZTS19qpl_mini_block_size", !7, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!"_ZTS14qpl_out_format", !7, i64 0}
!19 = !{!"_ZTS10qpl_parser", !7, i64 0}
!20 = !{!"_ZTS12qpl_aux_data", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !21, i64 40}
!21 = !{!"_ZTS10qpl_path_t", !7, i64 0}
!22 = !{!23, !29, i64 39713}
!23 = !{!"_ZTS12qpl_hw_state", !24, i64 0, !26, i64 64, !7, i64 128, !7, i64 10880, !27, i64 38592, !28, i64 39624, !10, i64 39648, !10, i64 39652, !10, i64 39656, !32, i64 39660, !10, i64 39664, !33, i64 39672, !10, i64 39704, !10, i64 39708, !29, i64 39712, !29, i64 39713, !35, i64 39716, !36, i64 39720, !37, i64 39728}
!24 = !{!"_ZTS34hw_decompress_analytics_descriptor", !10, i64 0, !10, i64 4, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !25, i64 36, !25, i64 38, !6, i64 40, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60}
!25 = !{!"short", !7, i64 0}
!26 = !{!"_ZTS24hw_iaa_completion_record", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !10, i64 4, !17, i64 8, !17, i64 16, !10, i64 24, !7, i64 28, !7, i64 29, !25, i64 30, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !17, i64 48, !17, i64 56}
!27 = !{!"_ZTS10qpl_buffer", !7, i64 0, !10, i64 1024, !10, i64 1028}
!28 = !{!"_ZTS21qpl_execution_history", !29, i64 0, !30, i64 4, !31, i64 8, !10, i64 12, !6, i64 16}
!29 = !{!"bool", !7, i64 0}
!30 = !{!"_ZTS23qpl_task_execution_step", !7, i64 0}
!31 = !{!"_ZTS14qpl_comp_style", !7, i64 0}
!32 = !{!"_ZTS15hw_huffman_code", !25, i64 0, !7, i64 2, !7, i64 3}
!33 = !{!"_ZTS22hw_accelerator_context", !34, i64 0, !6, i64 24}
!34 = !{!"_ZTS20hw_device_properties", !10, i64 0, !10, i64 4, !10, i64 8, !29, i64 12, !29, i64 13, !29, i64 14, !29, i64 15, !29, i64 16, !29, i64 17, !29, i64 18, !29, i64 19, !29, i64 20, !29, i64 21, !29, i64 22}
!35 = !{!"_ZTS25hw_multidescriptor_status", !7, i64 0}
!36 = !{!"_ZTS10qpl_status", !7, i64 0}
!37 = !{!"_ZTS20qpl_execution_record", !38, i64 0, !10, i64 8, !10, i64 12}
!38 = !{!"double", !7, i64 0}
!39 = !{i8 0, i8 2}
!40 = !{}
!41 = !{!36, !36, i64 0}
!42 = !{!21, !21, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef, i1 noundef zeroext) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @qpl_check_job(ptr noundef %0) local_unnamed_addr #2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 232
  %3 = load i32, ptr %2, align 8, !tbaa !5
  switch i32 %3, label %9 [
    i32 2, label %20
    i32 0, label %4
  ]

4:                                                ; preds = %1
  %5 = tail call noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef nonnull %0) #4
  %6 = getelementptr inbounds i8, ptr %5, i64 39713
  %7 = load i8, ptr %6, align 1, !tbaa !20, !range !37, !noundef !38
  %8 = trunc nuw i8 %7 to i1
  br i1 %8, label %20, label %9

9:                                                ; preds = %1, %4
  %10 = tail call noundef i32 @_ZN3qpl3jobL20get_async_job_statusEPK7qpl_job(ptr noundef nonnull %0) #4
  %.not = icmp eq i32 %10, 1
  br i1 %.not, label %11, label %20

11:                                               ; preds = %9
  %12 = tail call noundef zeroext i1 @_ZN3qpl3jobL24is_supported_on_hardwareEPK7qpl_job(ptr noundef nonnull %0)
  br i1 %12, label %13, label %.thread

13:                                               ; preds = %11
  %14 = tail call i32 @hw_check_job(ptr noundef nonnull %0)
  switch i32 %14, label %15 [
    i32 1, label %20
    i32 0, label %.thread
  ]

15:                                               ; preds = %13
  %16 = tail call noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef nonnull %0, i32 noundef %14)
  br i1 %16, label %17, label %.thread

17:                                               ; preds = %15
  tail call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef nonnull %0, i1 noundef zeroext true) #4
  %18 = load i32, ptr %2, align 8, !tbaa !5
  store i32 2, ptr %2, align 8, !tbaa !5
  %19 = tail call noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef nonnull %0)
  store i32 %18, ptr %2, align 8, !tbaa !5
  br label %.thread

.thread:                                          ; preds = %11, %13, %17, %15
  %.123 = phi i32 [ %19, %17 ], [ %14, %15 ], [ %14, %13 ], [ 0, %11 ]
  tail call void @_ZN3qpl3jobL20set_async_job_statusEP7qpl_job10qpl_status(ptr noundef nonnull %0, i32 noundef %.123) #4
  br label %20

20:                                               ; preds = %.thread, %9, %13, %4, %1
  %.1 = phi i32 [ 0, %1 ], [ 0, %4 ], [ %.123, %.thread ], [ %10, %9 ], [ %14, %13 ]
  ret i32 %.1
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZN3qpl3jobL20get_async_job_statusEPK7qpl_job(ptr noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL24is_supported_on_hardwareEPK7qpl_job(ptr noundef) local_unnamed_addr #0

declare i32 @hw_check_job(ptr noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL20set_async_job_statusEP7qpl_job10qpl_status(ptr noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !19, i64 232}
!6 = !{!"_ZTS7qpl_job", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16, !10, i64 24, !10, i64 28, !11, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !12, i64 52, !13, i64 56, !7, i64 64, !7, i64 72, !14, i64 80, !7, i64 88, !10, i64 96, !10, i64 100, !8, i64 104, !8, i64 105, !8, i64 106, !15, i64 112, !15, i64 120, !7, i64 128, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !16, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !17, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !18, i64 192}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_ZTS13qpl_operation", !8, i64 0}
!12 = !{!"_ZTS22qpl_compression_levels", !8, i64 0}
!13 = !{!"_ZTS19qpl_statistics_mode", !8, i64 0}
!14 = !{!"_ZTS19qpl_mini_block_size", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!"_ZTS14qpl_out_format", !8, i64 0}
!17 = !{!"_ZTS10qpl_parser", !8, i64 0}
!18 = !{!"_ZTS12qpl_aux_data", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !19, i64 40}
!19 = !{!"_ZTS10qpl_path_t", !8, i64 0}
!20 = !{!21, !27, i64 39713}
!21 = !{!"_ZTS12qpl_hw_state", !22, i64 0, !24, i64 64, !8, i64 128, !8, i64 10880, !25, i64 38592, !26, i64 39624, !10, i64 39648, !10, i64 39652, !10, i64 39656, !30, i64 39660, !10, i64 39664, !31, i64 39672, !10, i64 39704, !10, i64 39708, !27, i64 39712, !27, i64 39713, !33, i64 39716, !34, i64 39720, !35, i64 39728}
!22 = !{!"_ZTS34hw_decompress_analytics_descriptor", !10, i64 0, !10, i64 4, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32, !23, i64 36, !23, i64 38, !7, i64 40, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60}
!23 = !{!"short", !8, i64 0}
!24 = !{!"_ZTS24hw_iaa_completion_record", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3, !10, i64 4, !15, i64 8, !15, i64 16, !10, i64 24, !8, i64 28, !8, i64 29, !23, i64 30, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !15, i64 48, !15, i64 56}
!25 = !{!"_ZTS10qpl_buffer", !8, i64 0, !10, i64 1024, !10, i64 1028}
!26 = !{!"_ZTS21qpl_execution_history", !27, i64 0, !28, i64 4, !29, i64 8, !10, i64 12, !7, i64 16}
!27 = !{!"bool", !8, i64 0}
!28 = !{!"_ZTS23qpl_task_execution_step", !8, i64 0}
!29 = !{!"_ZTS14qpl_comp_style", !8, i64 0}
!30 = !{!"_ZTS15hw_huffman_code", !23, i64 0, !8, i64 2, !8, i64 3}
!31 = !{!"_ZTS22hw_accelerator_context", !32, i64 0, !7, i64 24}
!32 = !{!"_ZTS20hw_device_properties", !10, i64 0, !10, i64 4, !10, i64 8, !27, i64 12, !27, i64 13, !27, i64 14, !27, i64 15, !27, i64 16, !27, i64 17, !27, i64 18, !27, i64 19, !27, i64 20, !27, i64 21, !27, i64 22}
!33 = !{!"_ZTS25hw_multidescriptor_status", !8, i64 0}
!34 = !{!"_ZTS10qpl_status", !8, i64 0}
!35 = !{!"_ZTS20qpl_execution_record", !36, i64 0, !10, i64 8, !10, i64 12}
!36 = !{!"double", !8, i64 0}
!37 = !{i8 0, i8 2}
!38 = !{}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass