; LLVM IR from devantler/software-engineering-f22-shared :: IOT/BudgetManagementExcercise-03-28/ESP-Project/components/components/nghttp (set)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.mrb_value = type { %union.anon, i32 }
%union.anon = type { double }

@.str.2 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [29 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden zeroext i8 @obj_iv_p(i64, i32) #0

; Function Attrs: nounwind uwtable
declare dso_local void @mrb_obj_iv_set(ptr noundef, ptr noundef, i32 noundef, i64, i32) #0

declare ptr @mrb_exc_get(ptr noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @mrb_iv_set(ptr noundef %0, i64 %1, i32 %2, i32 noundef %3, i64 %4, i32 %5) #0 {
  %7 = alloca %struct.mrb_value, align 8
  %8 = alloca %struct.mrb_value, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 0
  store i64 %1, ptr %11, align 8
  %12 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 1
  store i32 %2, ptr %12, align 8
  %13 = getelementptr inbounds { i64, i32 }, ptr %8, i32 0, i32 0
  store i64 %4, ptr %13, align 8
  %14 = getelementptr inbounds { i64, i32 }, ptr %8, i32 0, i32 1
  store i32 %5, ptr %14, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !9
  %15 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 0
  %16 = load i64, ptr %15, align 8
  %17 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 1
  %18 = load i32, ptr %17, align 8
  %19 = call zeroext i8 @obj_iv_p(i64 %16, i32 %18)
  %20 = icmp ne i8 %19, 0
  br i1 %20, label %21, label %30

21:                                               ; preds = %6
  %22 = load ptr, ptr %9, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.mrb_value, ptr %7, i32 0, i32 0
  %24 = load ptr, ptr %23, align 8, !tbaa !11
  %25 = load i32, ptr %10, align 4, !tbaa !9
  %26 = getelementptr inbounds { i64, i32 }, ptr %8, i32 0, i32 0
  %27 = load i64, ptr %26, align 8
  %28 = getelementptr inbounds { i64, i32 }, ptr %8, i32 0, i32 1
  %29 = load i32, ptr %28, align 8
  call void @mrb_obj_iv_set(ptr noundef %22, ptr noundef %24, i32 noundef %25, i64 %27, i32 %29)
  br label %34

30:                                               ; preds = %6
  %31 = load ptr, ptr %9, align 8, !tbaa !5
  %32 = load ptr, ptr %9, align 8, !tbaa !5
  %33 = call ptr @mrb_exc_get(ptr noundef %32, ptr noundef @.str.2)
  call void @mrb_raise(ptr noundef %31, ptr noundef %33, ptr noundef @.str.3) #3
  unreachable

34:                                               ; preds = %21
  ret void
}

; Function Attrs: noreturn
declare void @mrb_raise(ptr noundef, ptr noundef, ptr noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { noreturn }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.2 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [29 x i8], align 1

; Function Attrs: nounwind uwtable
declare hidden zeroext i8 @obj_iv_p(i64, i32) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @mrb_obj_iv_set(ptr noundef, ptr noundef, i32 noundef, i64, i32) local_unnamed_addr #0

declare ptr @mrb_exc_get(ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local void @mrb_iv_set(ptr noundef %0, i64 %1, i32 %2, i32 noundef %3, i64 %4, i32 %5) local_unnamed_addr #0 {
  %7 = tail call zeroext i8 @obj_iv_p(i64 %1, i32 %2)
  %.not = icmp eq i8 %7, 0
  br i1 %.not, label %10, label %8

8:                                                ; preds = %6
  %9 = inttoptr i64 %1 to ptr
  tail call void @mrb_obj_iv_set(ptr noundef %0, ptr noundef %9, i32 noundef %3, i64 %4, i32 %5)
  ret void

10:                                               ; preds = %6
  %11 = tail call ptr @mrb_exc_get(ptr noundef %0, ptr noundef nonnull @.str.2) #3
  tail call void @mrb_raise(ptr noundef %0, ptr noundef %11, ptr noundef nonnull @.str.3) #4
  unreachable
}

; Function Attrs: noreturn
declare void @mrb_raise(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass