; LLVM IR from codemistic/Data-Structures-and-Algorithms :: CPP/Segment Tree/Sum query.ll (Z14update_segtreexxxxxRSt6vectorIxSaIxEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z14update_segtreexxxxxRSt6vectorIxSaIxEE(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, ptr noundef nonnull align 8 dereferenceable(24) %5) #2 {
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  store i64 %0, ptr %7, align 8, !tbaa !5
  store i64 %1, ptr %8, align 8, !tbaa !5
  store i64 %2, ptr %9, align 8, !tbaa !5
  store i64 %3, ptr %10, align 8, !tbaa !5
  store i64 %4, ptr %11, align 8, !tbaa !5
  store ptr %5, ptr %12, align 8, !tbaa !9
  %14 = load i64, ptr %8, align 8, !tbaa !5
  %15 = load i64, ptr %9, align 8, !tbaa !5
  %16 = icmp eq i64 %14, %15
  br i1 %16, label %17, label %22

17:                                               ; preds = %6
  %18 = load i64, ptr %11, align 8, !tbaa !5
  %19 = load ptr, ptr %12, align 8, !tbaa !9
  %20 = load i64, ptr %7, align 8, !tbaa !5
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %20) #3
  store i64 %18, ptr %21, align 8, !tbaa !5
  br label %64

22:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %23 = load i64, ptr %8, align 8, !tbaa !5
  %24 = load i64, ptr %9, align 8, !tbaa !5
  %25 = add nsw i64 %23, %24
  %26 = sdiv i64 %25, 2
  store i64 %26, ptr %13, align 8, !tbaa !5
  %27 = load i64, ptr %10, align 8, !tbaa !5
  %28 = load i64, ptr %13, align 8, !tbaa !5
  %29 = icmp sle i64 %27, %28
  br i1 %29, label %30, label %38

30:                                               ; preds = %22
  %31 = load i64, ptr %7, align 8, !tbaa !5
  %32 = mul nsw i64 2, %31
  %33 = load i64, ptr %8, align 8, !tbaa !5
  %34 = load i64, ptr %13, align 8, !tbaa !5
  %35 = load i64, ptr %10, align 8, !tbaa !5
  %36 = load i64, ptr %11, align 8, !tbaa !5
  %37 = load ptr, ptr %12, align 8, !tbaa !9
  call void @_Z14update_segtreexxxxxRSt6vectorIxSaIxEE(i64 noundef %32, i64 noundef %33, i64 noundef %34, i64 noundef %35, i64 noundef %36, ptr noundef nonnull align 8 dereferenceable(24) %37)
  br label %48

38:                                               ; preds = %22
  %39 = load i64, ptr %7, align 8, !tbaa !5
  %40 = mul nsw i64 2, %39
  %41 = add nsw i64 %40, 1
  %42 = load i64, ptr %13, align 8, !tbaa !5
  %43 = add nsw i64 %42, 1
  %44 = load i64, ptr %9, align 8, !tbaa !5
  %45 = load i64, ptr %10, align 8, !tbaa !5
  %46 = load i64, ptr %11, align 8, !tbaa !5
  %47 = load ptr, ptr %12, align 8, !tbaa !9
  call void @_Z14update_segtreexxxxxRSt6vectorIxSaIxEE(i64 noundef %41, i64 noundef %43, i64 noundef %44, i64 noundef %45, i64 noundef %46, ptr noundef nonnull align 8 dereferenceable(24) %47)
  br label %48

48:                                               ; preds = %38, %30
  %49 = load ptr, ptr %12, align 8, !tbaa !9
  %50 = load i64, ptr %7, align 8, !tbaa !5
  %51 = mul nsw i64 2, %50
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #3
  %53 = load i64, ptr %52, align 8, !tbaa !5
  %54 = load ptr, ptr %12, align 8, !tbaa !9
  %55 = load i64, ptr %7, align 8, !tbaa !5
  %56 = mul nsw i64 2, %55
  %57 = add nsw i64 %56, 1
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %54, i64 noundef %57) #3
  %59 = load i64, ptr %58, align 8, !tbaa !5
  %60 = add nsw i64 %53, %59
  %61 = load ptr, ptr %12, align 8, !tbaa !9
  %62 = load i64, ptr %7, align 8, !tbaa !5
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %62) #3
  store i64 %60, ptr %63, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  br label %64

64:                                               ; preds = %48, %17
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z14update_segtreexxxxxRSt6vectorIxSaIxEE(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, i64 noundef %4, ptr noundef nonnull align 8 dereferenceable(24) %5) local_unnamed_addr #0 {
  %7 = icmp eq i64 %1, %2
  br i1 %7, label %22, label %8

8:                                                ; preds = %6
  %9 = add nsw i64 %2, %1
  %10 = sdiv i64 %9, 2
  %.not = icmp slt i64 %10, %3
  %11 = shl nsw i64 %0, 1
  br i1 %.not, label %13, label %12

12:                                               ; preds = %8
  tail call void @_Z14update_segtreexxxxxRSt6vectorIxSaIxEE(i64 noundef %11, i64 noundef %1, i64 noundef %10, i64 noundef %3, i64 noundef %4, ptr noundef nonnull align 8 dereferenceable(24) %5)
  %.pre = or disjoint i64 %11, 1
  br label %16

13:                                               ; preds = %8
  %14 = or disjoint i64 %11, 1
  %15 = add nsw i64 %10, 1
  tail call void @_Z14update_segtreexxxxxRSt6vectorIxSaIxEE(i64 noundef %14, i64 noundef %15, i64 noundef %2, i64 noundef %3, i64 noundef %4, ptr noundef nonnull align 8 dereferenceable(24) %5)
  br label %16

16:                                               ; preds = %13, %12
  %.pre-phi30 = phi i64 [ %14, %13 ], [ %.pre, %12 ]
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %11) #1
  %18 = load i64, ptr %17, align 8, !tbaa !5
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %.pre-phi30) #1
  %20 = load i64, ptr %19, align 8, !tbaa !5
  %21 = add nsw i64 %20, %18
  br label %22

22:                                               ; preds = %6, %16
  %.sink = phi i64 [ %21, %16 ], [ %4, %6 ]
  %23 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %0) #1
  store i64 %.sink, ptr %23, align 8, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass