; LLVM IR from intel/qpl :: sources/c_api (job_execution_api)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.qpl_job = type { ptr, i32, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, ptr, i32, i32, i8, i8, i8, i64, i64, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.qpl_aux_data }
%struct.qpl_aux_data = type { ptr, ptr, ptr, ptr, ptr, i32 }
%struct.qpl_hw_state = type { %struct.hw_decompress_analytics_descriptor, %struct.hw_iaa_completion_record, [2 x %struct.hw_iaa_aecs_analytic], [2 x %struct.hw_iaa_aecs_compress], %struct.qpl_buffer, %struct.qpl_execution_history, i32, i32, i32, %struct.hw_huffman_code, i32, %struct.hw_accelerator_context, i32, i32, i8, i8, i32, i32, %struct.qpl_execution_record }
%struct.hw_decompress_analytics_descriptor = type { i32, i32, ptr, ptr, ptr, i32, i16, i16, ptr, i32, i32, i32, i32 }
%struct.hw_iaa_completion_record = type { i8, i8, i8, i8, i32, i64, i64, i32, i8, i8, i16, i32, i32, i32, i32, i64, i64 }
%struct.hw_iaa_aecs_analytic = type { %struct.hw_iaa_aecs_filter, [36 x i32], %struct.hw_iaa_aecs_decompress }
%struct.hw_iaa_aecs_filter = type { i32, i32, i32, i32, i32, i32 }
%struct.hw_iaa_aecs_decompress = type { [2 x i32], i32, i32, [32 x i64], [32 x i8], i32, i8, i8, i16, [5 x i32], [5 x i32], [5 x i32], [5 x i32], [62 x i32], %union.anon, i16, i16, %union.anon.0, %struct.anon.2, i16, [4096 x i8], [6 x i32] }
%union.anon = type { %struct.anon }
%struct.anon = type { [6 x i32], [224 x i8], [5 x i32] }
%union.anon.0 = type { %struct.anon.1 }
%struct.anon.1 = type { [2 x i32], [144 x i8], [5 x i32] }
%struct.anon.2 = type { i16 }
%struct.hw_iaa_aecs_compress = type { i32, i32, [5 x i32], i32, [256 x i8], %struct.hw_iaa_histogram, [12288 x i8] }
%struct.hw_iaa_histogram = type { [286 x i32], [2 x i32], [30 x i32], [2 x i32] }
%struct.qpl_buffer = type { [1024 x i8], i32, i32 }
%struct.qpl_execution_history = type { i8, i32, i32, i32, ptr }
%struct.hw_huffman_code = type { i16, i8, i8 }
%struct.hw_accelerator_context = type { %struct.hw_device_properties, ptr }
%struct.hw_device_properties = type { i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
%struct.qpl_execution_record = type { double, i32, i32 }

@_ZZ14qpl_submit_jobE10dispatcher = external hidden global ptr, align 8
@_ZGVZ14qpl_submit_jobE10dispatcher = external hidden global i64, align 8

; Function Attrs: mustprogress uwtable
define dso_local i32 @qpl_submit_job(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.qpl_job, ptr %10, i32 0, i32 7
  %12 = load i32, ptr %11, align 4, !tbaa !9
  %13 = and i32 %12, 4194304
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %21

15:                                               ; preds = %1
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.qpl_job, ptr %16, i32 0, i32 13
  %18 = load ptr, ptr %17, align 8, !tbaa !21
  %19 = icmp eq ptr %18, null
  br i1 %19, label %20, label %21

20:                                               ; preds = %15
  store i32 50, ptr %2, align 4
  br label %147

21:                                               ; preds = %15, %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !22
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  store i8 0, ptr %5, align 1, !tbaa !24
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.qpl_job, ptr %22, i32 0, i32 39
  %24 = getelementptr inbounds %struct.qpl_aux_data, ptr %23, i32 0, i32 5
  %25 = load i32, ptr %24, align 8, !tbaa !26
  store i32 %25, ptr %6, align 4, !tbaa !27
  %26 = load i32, ptr %6, align 4, !tbaa !27
  %27 = icmp eq i32 1, %26
  br i1 %27, label %31, label %28

28:                                               ; preds = %21
  %29 = load i32, ptr %6, align 4, !tbaa !27
  %30 = icmp eq i32 0, %29
  br i1 %30, label %31, label %120

31:                                               ; preds = %28, %21
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = call noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef %32) #3
  store ptr %33, ptr %7, align 8, !tbaa !5
  %34 = load ptr, ptr %3, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.qpl_job, ptr %34, i32 0, i32 7
  %36 = load i32, ptr %35, align 4, !tbaa !9
  %37 = and i32 %36, 1
  %38 = icmp ne i32 %37, 0
  br i1 %38, label %39, label %41

39:                                               ; preds = %31
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef %40, i1 noundef zeroext false) #3
  br label %41

41:                                               ; preds = %39, %31
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.qpl_job, ptr %42, i32 0, i32 6
  %44 = load i32, ptr %43, align 8, !tbaa !28
  %45 = icmp eq i32 1, %44
  br i1 %45, label %46, label %62

46:                                               ; preds = %41
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.qpl_job, ptr %47, i32 0, i32 11
  %49 = load i32, ptr %48, align 4, !tbaa !29
  %50 = icmp eq i32 3, %49
  br i1 %50, label %51, label %62

51:                                               ; preds = %46
  %52 = load i32, ptr %6, align 4, !tbaa !27
  %53 = icmp eq i32 1, %52
  br i1 %53, label %54, label %55

54:                                               ; preds = %51
  store i32 87, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %117

55:                                               ; preds = %51
  %56 = load i32, ptr %6, align 4, !tbaa !27
  %57 = icmp eq i32 0, %56
  br i1 %57, label %58, label %60

58:                                               ; preds = %55
  %59 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef %59, i1 noundef zeroext true) #3
  br label %60

60:                                               ; preds = %58, %55
  br label %61

61:                                               ; preds = %60
  br label %62

62:                                               ; preds = %61, %46, %41
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = call noundef zeroext i1 @_ZN3qpl3jobL36is_unsupported_on_hw_supported_on_swEP7qpl_job(ptr noundef %63) #3
  br i1 %64, label %65, label %67

65:                                               ; preds = %62
  %66 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef %66, i1 noundef zeroext true) #3
  br label %67

67:                                               ; preds = %65, %62
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.qpl_hw_state, ptr %68, i32 0, i32 15
  %70 = load i8, ptr %69, align 1, !tbaa !30, !range !45, !noundef !46
  %71 = trunc i8 %70 to i1
  br i1 %71, label %111, label %72

72:                                               ; preds = %67
  %73 = load atomic i8, ptr @_ZGVZ14qpl_submit_jobE10dispatcher acquire, align 8
  %74 = icmp eq i8 %73, 0
  br i1 %74, label %75, label %80, !prof !47

75:                                               ; preds = %72
  %76 = call i32 @__cxa_guard_acquire(ptr @_ZGVZ14qpl_submit_jobE10dispatcher) #3
  %77 = icmp ne i32 %76, 0
  br i1 %77, label %78, label %80

78:                                               ; preds = %75
  %79 = call noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() #3
  store ptr %79, ptr @_ZZ14qpl_submit_jobE10dispatcher, align 8, !tbaa !5
  call void @__cxa_guard_release(ptr @_ZGVZ14qpl_submit_jobE10dispatcher) #3
  br label %80

80:                                               ; preds = %78, %75, %72
  %81 = load ptr, ptr @_ZZ14qpl_submit_jobE10dispatcher, align 8, !tbaa !5
  %82 = call noundef zeroext i1 @_ZNK3qpl2ml10dispatcher13hw_dispatcher13is_hw_supportEv(ptr noundef nonnull align 8 dereferenceable(975232) %81) #3
  br i1 %82, label %88, label %83

83:                                               ; preds = %80
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %84 = load ptr, ptr @_ZZ14qpl_submit_jobE10dispatcher, align 8, !tbaa !5
  %85 = call noundef i32 @_ZNK3qpl2ml10dispatcher13hw_dispatcher18get_hw_init_statusEv(ptr noundef nonnull align 8 dereferenceable(975232) %84) #3
  store i32 %85, ptr %9, align 4, !tbaa !48
  %86 = load i32, ptr %9, align 4, !tbaa !48
  %87 = call noundef i32 @_ZN3qpl2ml4util43convert_hw_accelerator_status_to_qpl_statusEj(i32 noundef %86)
  store i32 %87, ptr %4, align 4, !tbaa !22
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %88

88:                                               ; preds = %83, %80
  %89 = load i32, ptr %4, align 4, !tbaa !22
  %90 = icmp eq i32 %89, 0
  br i1 %90, label %91, label %99

91:                                               ; preds = %88
  %92 = load ptr, ptr %3, align 8, !tbaa !5
  %93 = call i32 @hw_submit_job(ptr noundef %92)
  store i32 %93, ptr %4, align 4, !tbaa !22
  %94 = load i32, ptr %4, align 4, !tbaa !22
  %95 = icmp eq i32 %94, 0
  br i1 %95, label %96, label %98

96:                                               ; preds = %91
  %97 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN3qpl3jobL22set_job_to_in_progressEP7qpl_job(ptr noundef %97) #3
  br label %98

98:                                               ; preds = %96, %91
  br label %99

99:                                               ; preds = %98, %88
  %100 = load i32, ptr %4, align 4, !tbaa !22
  %101 = icmp ne i32 0, %100
  br i1 %101, label %102, label %108

102:                                              ; preds = %99
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  %104 = load i32, ptr %4, align 4, !tbaa !22
  %105 = call noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef %103, i32 noundef %104)
  br i1 %105, label %106, label %108

106:                                              ; preds = %102
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef %107, i1 noundef zeroext true) #3
  br label %110

108:                                              ; preds = %102, %99
  %109 = load i32, ptr %4, align 4, !tbaa !22
  store i32 %109, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %117

110:                                              ; preds = %106
  br label %111

111:                                              ; preds = %110, %67
  %112 = load ptr, ptr %7, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.qpl_hw_state, ptr %112, i32 0, i32 15
  %114 = load i8, ptr %113, align 1, !tbaa !30, !range !45, !noundef !46
  %115 = trunc i8 %114 to i1
  %116 = zext i1 %115 to i8
  store i8 %116, ptr %5, align 1, !tbaa !24
  store i32 0, ptr %8, align 4
  br label %117

117:                                              ; preds = %111, %108, %54
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  %118 = load i32, ptr %8, align 4
  switch i32 %118, label %146 [
    i32 0, label %119
  ]

119:                                              ; preds = %117
  br label %120

120:                                              ; preds = %119, %28
  %121 = load i32, ptr %6, align 4, !tbaa !27
  %122 = icmp eq i32 2, %121
  br i1 %122, label %126, label %123

123:                                              ; preds = %120
  %124 = load i8, ptr %5, align 1, !tbaa !24, !range !45, !noundef !46
  %125 = trunc i8 %124 to i1
  br i1 %125, label %126, label %144

126:                                              ; preds = %123, %120
  %127 = load ptr, ptr %3, align 8, !tbaa !5
  %128 = getelementptr inbounds %struct.qpl_job, ptr %127, i32 0, i32 39
  %129 = getelementptr inbounds %struct.qpl_aux_data, ptr %128, i32 0, i32 5
  store i32 2, ptr %129, align 8, !tbaa !26
  %130 = load ptr, ptr %3, align 8, !tbaa !5
  %131 = call noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef %130)
  store i32 %131, ptr %4, align 4, !tbaa !22
  %132 = load i32, ptr %6, align 4, !tbaa !27
  %133 = load ptr, ptr %3, align 8, !tbaa !5
  %134 = getelementptr inbounds %struct.qpl_job, ptr %133, i32 0, i32 39
  %135 = getelementptr inbounds %struct.qpl_aux_data, ptr %134, i32 0, i32 5
  store i32 %132, ptr %135, align 8, !tbaa !26
  %136 = load i32, ptr %4, align 4, !tbaa !22
  %137 = icmp eq i32 0, %136
  br i1 %137, label %138, label %143

138:                                              ; preds = %126
  %139 = load i32, ptr %6, align 4, !tbaa !27
  %140 = icmp eq i32 0, %139
  br i1 %140, label %141, label %143

141:                                              ; preds = %138
  %142 = load ptr, ptr %3, align 8, !tbaa !5
  call void @_ZN3qpl3jobL22set_job_to_in_progressEP7qpl_job(ptr noundef %142) #3
  br label %143

143:                                              ; preds = %141, %138, %126
  br label %144

144:                                              ; preds = %143, %123
  %145 = load i32, ptr %4, align 4, !tbaa !22
  store i32 %145, ptr %2, align 4
  store i32 1, ptr %8, align 4
  br label %146

146:                                              ; preds = %144, %117
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %147

147:                                              ; preds = %146, %20
  %148 = load i32, ptr %2, align 4
  ret i32 %148
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef, i1 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL36is_unsupported_on_hw_supported_on_swEP7qpl_job(ptr noundef) #2

; Function Attrs: nounwind
declare i32 @__cxa_guard_acquire(ptr) #3

; Function Attrs: nounwind
declare noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() #4

; Function Attrs: nounwind
declare void @__cxa_guard_release(ptr) #3

; Function Attrs: nounwind
declare noundef zeroext i1 @_ZNK3qpl2ml10dispatcher13hw_dispatcher13is_hw_supportEv(ptr noundef nonnull align 8 dereferenceable(975232)) #4

; Function Attrs: nounwind
declare noundef i32 @_ZNK3qpl2ml10dispatcher13hw_dispatcher18get_hw_init_statusEv(ptr noundef nonnull align 8 dereferenceable(975232)) #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN3qpl2ml4util43convert_hw_accelerator_status_to_qpl_statusEj(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare i32 @hw_submit_job(ptr noundef) #5

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL22set_job_to_in_progressEP7qpl_job(ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef, i32 noundef) #2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef) #6

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 36}
!10 = !{!"_ZTS7qpl_job", !6, i64 0, !11, i64 8, !11, i64 12, !6, i64 16, !11, i64 24, !11, i64 28, !12, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !11, i64 48, !13, i64 52, !14, i64 56, !6, i64 64, !6, i64 72, !15, i64 80, !6, i64 88, !11, i64 96, !11, i64 100, !7, i64 104, !7, i64 105, !7, i64 106, !16, i64 112, !16, i64 120, !6, i64 128, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !17, i64 152, !11, i64 156, !11, i64 160, !11, i64 164, !11, i64 168, !18, i64 172, !11, i64 176, !11, i64 180, !11, i64 184, !11, i64 188, !19, i64 192}
!11 = !{!"int", !7, i64 0}
!12 = !{!"_ZTS13qpl_operation", !7, i64 0}
!13 = !{!"_ZTS22qpl_compression_levels", !7, i64 0}
!14 = !{!"_ZTS19qpl_statistics_mode", !7, i64 0}
!15 = !{!"_ZTS19qpl_mini_block_size", !7, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!"_ZTS14qpl_out_format", !7, i64 0}
!18 = !{!"_ZTS10qpl_parser", !7, i64 0}
!19 = !{!"_ZTS12qpl_aux_data", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !20, i64 40}
!20 = !{!"_ZTS10qpl_path_t", !7, i64 0}
!21 = !{!10, !6, i64 64}
!22 = !{!23, !23, i64 0}
!23 = !{!"_ZTS10qpl_status", !7, i64 0}
!24 = !{!25, !25, i64 0}
!25 = !{!"bool", !7, i64 0}
!26 = !{!10, !20, i64 232}
!27 = !{!20, !20, i64 0}
!28 = !{!10, !12, i64 32}
!29 = !{!10, !13, i64 52}
!30 = !{!31, !25, i64 39713}
!31 = !{!"_ZTS12qpl_hw_state", !32, i64 0, !34, i64 64, !7, i64 128, !7, i64 10880, !35, i64 38592, !36, i64 39624, !11, i64 39648, !11, i64 39652, !11, i64 39656, !39, i64 39660, !11, i64 39664, !40, i64 39672, !11, i64 39704, !11, i64 39708, !25, i64 39712, !25, i64 39713, !42, i64 39716, !23, i64 39720, !43, i64 39728}
!32 = !{!"_ZTS34hw_decompress_analytics_descriptor", !11, i64 0, !11, i64 4, !6, i64 8, !6, i64 16, !6, i64 24, !11, i64 32, !33, i64 36, !33, i64 38, !6, i64 40, !11, i64 48, !11, i64 52, !11, i64 56, !11, i64 60}
!33 = !{!"short", !7, i64 0}
!34 = !{!"_ZTS24hw_iaa_completion_record", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3, !11, i64 4, !16, i64 8, !16, i64 16, !11, i64 24, !7, i64 28, !7, i64 29, !33, i64 30, !11, i64 32, !11, i64 36, !11, i64 40, !11, i64 44, !16, i64 48, !16, i64 56}
!35 = !{!"_ZTS10qpl_buffer", !7, i64 0, !11, i64 1024, !11, i64 1028}
!36 = !{!"_ZTS21qpl_execution_history", !25, i64 0, !37, i64 4, !38, i64 8, !11, i64 12, !6, i64 16}
!37 = !{!"_ZTS23qpl_task_execution_step", !7, i64 0}
!38 = !{!"_ZTS14qpl_comp_style", !7, i64 0}
!39 = !{!"_ZTS15hw_huffman_code", !33, i64 0, !7, i64 2, !7, i64 3}
!40 = !{!"_ZTS22hw_accelerator_context", !41, i64 0, !6, i64 24}
!41 = !{!"_ZTS20hw_device_properties", !11, i64 0, !11, i64 4, !11, i64 8, !25, i64 12, !25, i64 13, !25, i64 14, !25, i64 15, !25, i64 16, !25, i64 17, !25, i64 18, !25, i64 19, !25, i64 20, !25, i64 21, !25, i64 22}
!42 = !{!"_ZTS25hw_multidescriptor_status", !7, i64 0}
!43 = !{!"_ZTS20qpl_execution_record", !44, i64 0, !11, i64 8, !11, i64 12}
!44 = !{!"double", !7, i64 0}
!45 = !{i8 0, i8 2}
!46 = !{}
!47 = !{!"branch_weights", i32 1, i32 1048575}
!48 = !{!49, !49, i64 0}
!49 = !{!"_ZTS21hw_accelerator_status", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZZ14qpl_submit_jobE10dispatcher = external hidden local_unnamed_addr global ptr, align 8
@_ZGVZ14qpl_submit_jobE10dispatcher = external hidden global i64, align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @qpl_submit_job(ptr noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 36
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = and i32 %3, 4194304
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %9, label %5

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 64
  %7 = load ptr, ptr %6, align 8, !tbaa !20
  %8 = icmp eq ptr %7, null
  br i1 %8, label %.thread59, label %9

9:                                                ; preds = %5, %1
  %10 = getelementptr inbounds i8, ptr %0, i64 232
  %11 = load i32, ptr %10, align 8, !tbaa !21
  %or.cond = icmp ult i32 %11, 2
  br i1 %or.cond, label %12, label %53

12:                                               ; preds = %9
  %13 = tail call noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef nonnull %0) #6
  %14 = load i32, ptr %2, align 4, !tbaa !5
  %15 = and i32 %14, 1
  %.not50 = icmp eq i32 %15, 0
  br i1 %.not50, label %17, label %16

16:                                               ; preds = %12
  tail call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef nonnull %0, i1 noundef zeroext false) #6
  br label %17

17:                                               ; preds = %16, %12
  %18 = getelementptr inbounds i8, ptr %0, i64 32
  %19 = load i32, ptr %18, align 8, !tbaa !22
  %20 = icmp eq i32 %19, 1
  br i1 %20, label %21, label %27

21:                                               ; preds = %17
  %22 = getelementptr inbounds i8, ptr %0, i64 52
  %23 = load i32, ptr %22, align 4, !tbaa !23
  %24 = icmp eq i32 %23, 3
  br i1 %24, label %25, label %27

25:                                               ; preds = %21
  %switch = icmp eq i32 %11, 1
  br i1 %switch, label %.thread59, label %26

26:                                               ; preds = %25
  tail call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef nonnull %0, i1 noundef zeroext true) #6
  br label %27

27:                                               ; preds = %26, %21, %17
  %28 = tail call noundef zeroext i1 @_ZN3qpl3jobL36is_unsupported_on_hw_supported_on_swEP7qpl_job(ptr noundef nonnull %0) #6
  br i1 %28, label %29, label %30

29:                                               ; preds = %27
  tail call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef nonnull %0, i1 noundef zeroext true) #6
  br label %30

30:                                               ; preds = %29, %27
  %31 = getelementptr inbounds i8, ptr %13, i64 39713
  %32 = load i8, ptr %31, align 1, !tbaa !24, !range !41, !noundef !42
  %33 = trunc nuw i8 %32 to i1
  br i1 %33, label %.thread73, label %34

34:                                               ; preds = %30
  %35 = load atomic i8, ptr @_ZGVZ14qpl_submit_jobE10dispatcher acquire, align 8
  %36 = icmp eq i8 %35, 0
  br i1 %36, label %37, label %41, !prof !43

37:                                               ; preds = %34
  %38 = tail call i32 @__cxa_guard_acquire(ptr nonnull @_ZGVZ14qpl_submit_jobE10dispatcher) #6
  %.not51 = icmp eq i32 %38, 0
  br i1 %.not51, label %41, label %39

39:                                               ; preds = %37
  %40 = tail call noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() #6
  store ptr %40, ptr @_ZZ14qpl_submit_jobE10dispatcher, align 8, !tbaa !44
  tail call void @__cxa_guard_release(ptr nonnull @_ZGVZ14qpl_submit_jobE10dispatcher) #6
  br label %41

41:                                               ; preds = %39, %37, %34
  %42 = load ptr, ptr @_ZZ14qpl_submit_jobE10dispatcher, align 8, !tbaa !44
  %43 = tail call noundef zeroext i1 @_ZNK3qpl2ml10dispatcher13hw_dispatcher13is_hw_supportEv(ptr noundef nonnull align 8 dereferenceable(975232) %42) #6
  br i1 %43, label %.thread, label %44

44:                                               ; preds = %41
  %45 = load ptr, ptr @_ZZ14qpl_submit_jobE10dispatcher, align 8, !tbaa !44
  %46 = tail call noundef i32 @_ZNK3qpl2ml10dispatcher13hw_dispatcher18get_hw_init_statusEv(ptr noundef nonnull align 8 dereferenceable(975232) %45) #6
  %47 = tail call noundef i32 @_ZN3qpl2ml4util43convert_hw_accelerator_status_to_qpl_statusEj(i32 noundef %46)
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %.thread, label %51

.thread:                                          ; preds = %41, %44
  %49 = tail call i32 @hw_submit_job(ptr noundef nonnull %0)
  %50 = icmp eq i32 %49, 0
  br i1 %50, label %.thread59.sink.split, label %51

51:                                               ; preds = %.thread, %44
  %.143.ph = phi i32 [ %47, %44 ], [ %49, %.thread ]
  %52 = tail call noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef nonnull %0, i32 noundef %.143.ph)
  br i1 %52, label %55, label %.thread59

53:                                               ; preds = %9
  %54 = icmp eq i32 %11, 2
  br i1 %54, label %.thread73, label %.thread59

55:                                               ; preds = %51
  tail call void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef nonnull %0, i1 noundef zeroext true) #6
  %.pre = load i8, ptr %31, align 1, !tbaa !24, !range !41
  %.pre72 = trunc nuw i8 %.pre to i1
  br i1 %.pre72, label %.thread73, label %.thread59

.thread73:                                        ; preds = %30, %55, %53
  store i32 2, ptr %10, align 8, !tbaa !21
  %56 = tail call noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef nonnull %0)
  store i32 %11, ptr %10, align 8, !tbaa !21
  %57 = or i32 %56, %11
  %or.cond3 = icmp eq i32 %57, 0
  br i1 %or.cond3, label %.thread59.sink.split, label %.thread59

.thread59.sink.split:                             ; preds = %.thread73, %.thread
  tail call void @_ZN3qpl3jobL22set_job_to_in_progressEP7qpl_job(ptr noundef nonnull %0) #6
  br label %.thread59

.thread59:                                        ; preds = %.thread59.sink.split, %25, %53, %51, %.thread73, %55, %5
  %.2 = phi i32 [ 50, %5 ], [ %56, %.thread73 ], [ %.143.ph, %55 ], [ %.143.ph, %51 ], [ 87, %25 ], [ 0, %53 ], [ 0, %.thread59.sink.split ]
  ret i32 %.2
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef ptr @_ZN3qpl3jobL9get_stateEPK7qpl_job(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL21update_is_sw_fallbackEP7qpl_jobb(ptr noundef, i1 noundef zeroext) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL36is_unsupported_on_hw_supported_on_swEP7qpl_job(ptr noundef) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare i32 @__cxa_guard_acquire(ptr) local_unnamed_addr #2

; Function Attrs: nounwind
declare noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare void @__cxa_guard_release(ptr) local_unnamed_addr #2

; Function Attrs: nounwind
declare noundef zeroext i1 @_ZNK3qpl2ml10dispatcher13hw_dispatcher13is_hw_supportEv(ptr noundef nonnull align 8 dereferenceable(975232)) local_unnamed_addr #3

; Function Attrs: nounwind
declare noundef i32 @_ZNK3qpl2ml10dispatcher13hw_dispatcher18get_hw_init_statusEv(ptr noundef nonnull align 8 dereferenceable(975232)) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN3qpl2ml4util43convert_hw_accelerator_status_to_qpl_statusEj(i32 noundef) local_unnamed_addr #1

declare i32 @hw_submit_job(ptr noundef) local_unnamed_addr #4

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZN3qpl3jobL22set_job_to_in_progressEP7qpl_job(ptr noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN3qpl3jobL24is_sw_fallback_supportedEPK7qpl_job10qpl_status(ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare hidden noundef i32 @_ZL14sw_execute_jobP7qpl_job(ptr noundef) local_unnamed_addr #5

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 36}
!6 = !{!"_ZTS7qpl_job", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16, !10, i64 24, !10, i64 28, !11, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !12, i64 52, !13, i64 56, !7, i64 64, !7, i64 72, !14, i64 80, !7, i64 88, !10, i64 96, !10, i64 100, !8, i64 104, !8, i64 105, !8, i64 106, !15, i64 112, !15, i64 120, !7, i64 128, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !16, i64 152, !10, i64 156, !10, i64 160, !10, i64 164, !10, i64 168, !17, i64 172, !10, i64 176, !10, i64 180, !10, i64 184, !10, i64 188, !18, i64 192}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_ZTS13qpl_operation", !8, i64 0}
!12 = !{!"_ZTS22qpl_compression_levels", !8, i64 0}
!13 = !{!"_ZTS19qpl_statistics_mode", !8, i64 0}
!14 = !{!"_ZTS19qpl_mini_block_size", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!"_ZTS14qpl_out_format", !8, i64 0}
!17 = !{!"_ZTS10qpl_parser", !8, i64 0}
!18 = !{!"_ZTS12qpl_aux_data", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !19, i64 40}
!19 = !{!"_ZTS10qpl_path_t", !8, i64 0}
!20 = !{!6, !7, i64 64}
!21 = !{!6, !19, i64 232}
!22 = !{!6, !11, i64 32}
!23 = !{!6, !12, i64 52}
!24 = !{!25, !31, i64 39713}
!25 = !{!"_ZTS12qpl_hw_state", !26, i64 0, !28, i64 64, !8, i64 128, !8, i64 10880, !29, i64 38592, !30, i64 39624, !10, i64 39648, !10, i64 39652, !10, i64 39656, !34, i64 39660, !10, i64 39664, !35, i64 39672, !10, i64 39704, !10, i64 39708, !31, i64 39712, !31, i64 39713, !37, i64 39716, !38, i64 39720, !39, i64 39728}
!26 = !{!"_ZTS34hw_decompress_analytics_descriptor", !10, i64 0, !10, i64 4, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32, !27, i64 36, !27, i64 38, !7, i64 40, !10, i64 48, !10, i64 52, !10, i64 56, !10, i64 60}
!27 = !{!"short", !8, i64 0}
!28 = !{!"_ZTS24hw_iaa_completion_record", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3, !10, i64 4, !15, i64 8, !15, i64 16, !10, i64 24, !8, i64 28, !8, i64 29, !27, i64 30, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !15, i64 48, !15, i64 56}
!29 = !{!"_ZTS10qpl_buffer", !8, i64 0, !10, i64 1024, !10, i64 1028}
!30 = !{!"_ZTS21qpl_execution_history", !31, i64 0, !32, i64 4, !33, i64 8, !10, i64 12, !7, i64 16}
!31 = !{!"bool", !8, i64 0}
!32 = !{!"_ZTS23qpl_task_execution_step", !8, i64 0}
!33 = !{!"_ZTS14qpl_comp_style", !8, i64 0}
!34 = !{!"_ZTS15hw_huffman_code", !27, i64 0, !8, i64 2, !8, i64 3}
!35 = !{!"_ZTS22hw_accelerator_context", !36, i64 0, !7, i64 24}
!36 = !{!"_ZTS20hw_device_properties", !10, i64 0, !10, i64 4, !10, i64 8, !31, i64 12, !31, i64 13, !31, i64 14, !31, i64 15, !31, i64 16, !31, i64 17, !31, i64 18, !31, i64 19, !31, i64 20, !31, i64 21, !31, i64 22}
!37 = !{!"_ZTS25hw_multidescriptor_status", !8, i64 0}
!38 = !{!"_ZTS10qpl_status", !8, i64 0}
!39 = !{!"_ZTS20qpl_execution_record", !40, i64 0, !10, i64 8, !10, i64 12}
!40 = !{!"double", !8, i64 0}
!41 = !{i8 0, i8 2}
!42 = !{}
!43 = !{!"branch_weights", i32 1, i32 1048575}
!44 = !{!7, !7, i64 0}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass