; LLVM IR from intel/qpl :: sources/core-iaa/sources/descriptors (hw_compress_descriptor)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.hw_compress_descriptor = type { i32, i32, ptr, ptr, ptr, i32, i16, i16, ptr, i32, i32, i32, [4 x i8] }
%struct.hw_iaa_aecs_compress = type { i32, i32, [5 x i32], i32, [256 x i8], %struct.hw_iaa_histogram, [12288 x i8] }
%struct.hw_iaa_histogram = type { [286 x i32], [2 x i32], [30 x i32], [2 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @hw_iaa_descriptor_compress_set_aecs(ptr noundef %0, ptr noundef %1, i32 noundef %2, i1 noundef zeroext %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i8, align 1
  %14 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  %15 = zext i1 %3 to i8
  store i8 %15, ptr %8, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %16, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  %17 = load i32, ptr %7, align 4, !tbaa !9
  %18 = and i32 %17, 16
  %19 = icmp ne i32 %18, 0
  %20 = zext i1 %19 to i64
  %21 = select i1 %19, i32 65536, i32 0
  store i32 %21, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = and i32 %22, 256
  %24 = icmp ne i32 %23, 0
  %25 = zext i1 %24 to i64
  %26 = select i1 %24, i32 262144, i32 0
  store i32 %26, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = and i32 %27, 1
  %29 = icmp ne i32 %28, 0
  %30 = zext i1 %29 to i64
  %31 = select i1 %29, i32 4194304, i32 0
  store i32 %31, ptr %12, align 4, !tbaa !9
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = load i32, ptr %11, align 4, !tbaa !9
  %34 = or i32 %32, %33
  %35 = load i32, ptr %12, align 4, !tbaa !9
  %36 = or i32 %34, %35
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %37, i32 0, i32 1
  %39 = load i32, ptr %38, align 1, !tbaa !13
  %40 = or i32 %39, %36
  store i32 %40, ptr %38, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 1, ptr %13) #2
  %41 = load i32, ptr %7, align 4, !tbaa !9
  %42 = and i32 %41, 256
  %43 = icmp ne i32 %42, 0
  %44 = xor i1 %43, true
  %45 = zext i1 %44 to i8
  store i8 %45, ptr %13, align 1, !tbaa !11
  %46 = load ptr, ptr %6, align 8, !tbaa !5
  %47 = load ptr, ptr %9, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %47, i32 0, i32 8
  store ptr %46, ptr %48, align 1, !tbaa !16
  %49 = load ptr, ptr %9, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %49, i32 0, i32 10
  store i32 1568, ptr %50, align 1, !tbaa !17
  %51 = load ptr, ptr %9, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %51, i32 0, i32 11
  store i32 0, ptr %52, align 1, !tbaa !18
  %53 = load i8, ptr %13, align 1, !tbaa !11, !range !19, !noundef !20
  %54 = trunc i8 %53 to i1
  br i1 %54, label %55, label %93

55:                                               ; preds = %4
  %56 = load ptr, ptr %9, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %56, i32 0, i32 7
  %58 = load i16, ptr %57, align 1, !tbaa !21
  %59 = zext i16 %58 to i32
  %60 = or i32 %59, 2
  %61 = trunc i32 %60 to i16
  store i16 %61, ptr %57, align 1, !tbaa !21
  %62 = load ptr, ptr %9, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %62, i32 0, i32 7
  %64 = load i16, ptr %63, align 1, !tbaa !21
  %65 = zext i16 %64 to i32
  %66 = and i32 %65, 32
  %67 = icmp ne i32 %66, 0
  br i1 %67, label %68, label %92

68:                                               ; preds = %55
  %69 = load i8, ptr %8, align 1, !tbaa !11, !range !19, !noundef !20
  %70 = trunc i8 %69 to i1
  br i1 %70, label %71, label %92

71:                                               ; preds = %68
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #2
  %72 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %72, ptr %14, align 8, !tbaa !5
  %73 = load ptr, ptr %14, align 8, !tbaa !5
  %74 = load i32, ptr %12, align 4, !tbaa !9
  %75 = zext i32 %74 to i64
  %76 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %73, i64 %75
  %77 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %76, i32 0, i32 5
  %78 = getelementptr inbounds %struct.hw_iaa_histogram, ptr %77, i32 0, i32 0
  %79 = getelementptr inbounds [286 x i32], ptr %78, i64 0, i64 256
  store i32 262144, ptr %79, align 4, !tbaa !9
  %80 = load ptr, ptr %9, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %80, i32 0, i32 7
  %82 = load i16, ptr %81, align 1, !tbaa !21
  %83 = zext i16 %82 to i32
  %84 = and i32 %83, -13
  %85 = or i32 %84, 4
  %86 = load ptr, ptr %9, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.hw_compress_descriptor, ptr %86, i32 0, i32 7
  %88 = load i16, ptr %87, align 1, !tbaa !21
  %89 = zext i16 %88 to i32
  %90 = or i32 %89, %85
  %91 = trunc i32 %90 to i16
  store i16 %91, ptr %87, align 1, !tbaa !21
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #2
  br label %92

92:                                               ; preds = %71, %68, %55
  br label %93

93:                                               ; preds = %92, %4
  call void @llvm.lifetime.end.p0(i64 1, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!14, !10, i64 4}
!14 = !{!"", !10, i64 0, !10, i64 4, !6, i64 8, !6, i64 16, !6, i64 24, !10, i64 32, !15, i64 36, !15, i64 38, !6, i64 40, !10, i64 48, !10, i64 52, !10, i64 56, !7, i64 60}
!15 = !{!"short", !7, i64 0}
!16 = !{!14, !6, i64 40}
!17 = !{!14, !10, i64 52}
!18 = !{!14, !10, i64 56}
!19 = !{i8 0, i8 2}
!20 = !{}
!21 = !{!14, !15, i64 38}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.hw_iaa_aecs_compress = type { i32, i32, [5 x i32], i32, [256 x i8], %struct.hw_iaa_histogram, [12288 x i8] }
%struct.hw_iaa_histogram = type { [286 x i32], [2 x i32], [30 x i32], [2 x i32] }

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @hw_iaa_descriptor_compress_set_aecs(ptr nocapture noundef %0, ptr noundef %1, i32 noundef %2, i1 noundef zeroext %3) local_unnamed_addr #0 {
  %5 = shl i32 %2, 12
  %6 = and i32 %5, 65536
  %7 = and i32 %2, 256
  %.not = icmp eq i32 %7, 0
  %8 = shl nuw nsw i32 %7, 10
  %9 = shl i32 %2, 22
  %10 = and i32 %9, 4194304
  %11 = or disjoint i32 %6, %8
  %12 = getelementptr inbounds i8, ptr %0, i64 4
  %13 = load i32, ptr %12, align 1, !tbaa !5
  %14 = or i32 %11, %13
  %15 = or i32 %14, %10
  store i32 %15, ptr %12, align 1, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %0, i64 40
  store ptr %1, ptr %16, align 1, !tbaa !12
  %17 = getelementptr inbounds i8, ptr %0, i64 52
  store i32 1568, ptr %17, align 1, !tbaa !13
  %18 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 0, ptr %18, align 1, !tbaa !14
  br i1 %.not, label %19, label %28

19:                                               ; preds = %4
  %20 = getelementptr inbounds i8, ptr %0, i64 38
  %21 = load i16, ptr %20, align 1, !tbaa !15
  %22 = or i16 %21, 2
  store i16 %22, ptr %20, align 1, !tbaa !15
  %23 = and i16 %21, 32
  %.not22 = icmp ne i16 %23, 0
  %brmerge.not = and i1 %.not22, %3
  br i1 %brmerge.not, label %24, label %28

24:                                               ; preds = %19
  %25 = zext nneg i32 %10 to i64
  %26 = getelementptr inbounds %struct.hw_iaa_aecs_compress, ptr %1, i64 %25, i32 5, i32 0, i64 256
  store i32 262144, ptr %26, align 4, !tbaa !16
  %27 = or i16 %21, 6
  store i16 %27, ptr %20, align 1, !tbaa !15
  br label %28

28:                                               ; preds = %19, %24, %4
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !10, i64 24, !7, i64 32, !11, i64 36, !11, i64 38, !10, i64 40, !7, i64 48, !7, i64 52, !7, i64 56, !8, i64 60}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = !{!6, !10, i64 40}
!13 = !{!6, !7, i64 52}
!14 = !{!6, !7, i64 56}
!15 = !{!6, !11, i64 38}
!16 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass