; LLVM IR from HRI-EU/Rcs :: src/RcsCore/MotionControlLayer.ll (ZN3Rcs18MotionControlLayer18disconnectCallbackEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.Rcs::MotionControlLayer" = type { ptr, ptr, ptr, %"class.std::vector", ptr, i8, i8, i8, i8, i32, i32, double, double, double, double }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Rcs::HardwareComponent *, std::allocator<Rcs::HardwareComponent *>>::_Vector_impl" }
%"struct.std::_Vector_base<Rcs::HardwareComponent *, std::allocator<Rcs::HardwareComponent *>>::_Vector_impl" = type { %"struct.std::_Vector_base<Rcs::HardwareComponent *, std::allocator<Rcs::HardwareComponent *>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Rcs::HardwareComponent *, std::allocator<Rcs::HardwareComponent *>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN3Rcs17HardwareComponentESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3Rcs17HardwareComponentESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3Rcs18MotionControlLayer18disconnectCallbackEv(ptr noundef nonnull align 8 dereferenceable(104) %0) unnamed_addr #2 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  %5 = getelementptr inbounds %"class.Rcs::MotionControlLayer", ptr %4, i32 0, i32 4
  %6 = load ptr, ptr %5, align 8, !tbaa !9
  %7 = icmp ne ptr %6, null
  br i1 %7, label %8, label %16

8:                                                ; preds = %1
  %9 = getelementptr inbounds %"class.Rcs::MotionControlLayer", ptr %4, i32 0, i32 4
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = load ptr, ptr %10, align 8, !tbaa !18
  %12 = getelementptr inbounds ptr, ptr %11, i64 6
  %13 = load ptr, ptr %12, align 8
  %14 = call noundef double %13(ptr noundef nonnull align 8 dereferenceable(25) %10)
  %15 = getelementptr inbounds %"class.Rcs::MotionControlLayer", ptr %4, i32 0, i32 13
  store double %14, ptr %15, align 8, !tbaa !20
  br label %16

16:                                               ; preds = %8, %1
  %17 = getelementptr inbounds %"class.Rcs::MotionControlLayer", ptr %4, i32 0, i32 4
  store ptr null, ptr %17, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  store i64 0, ptr %3, align 8, !tbaa !21
  br label %18

18:                                               ; preds = %32, %16
  %19 = load i64, ptr %3, align 8, !tbaa !21
  %20 = getelementptr inbounds %"class.Rcs::MotionControlLayer", ptr %4, i32 0, i32 3
  %21 = call noundef i64 @_ZNKSt6vectorIPN3Rcs17HardwareComponentESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %20) #4
  %22 = icmp ult i64 %19, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  br label %35

24:                                               ; preds = %18
  %25 = getelementptr inbounds %"class.Rcs::MotionControlLayer", ptr %4, i32 0, i32 3
  %26 = load i64, ptr %3, align 8, !tbaa !21
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3Rcs17HardwareComponentESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %26) #4
  %28 = load ptr, ptr %27, align 8, !tbaa !5
  %29 = load ptr, ptr %28, align 8, !tbaa !18
  %30 = getelementptr inbounds ptr, ptr %29, i64 12
  %31 = load ptr, ptr %30, align 8
  call void %31(ptr noundef nonnull align 8 dereferenceable(25) %28, ptr noundef null, ptr noundef null)
  br label %32

32:                                               ; preds = %24
  %33 = load i64, ptr %3, align 8, !tbaa !21
  %34 = add i64 %33, 1
  store i64 %34, ptr %3, align 8, !tbaa !21
  br label %18, !llvm.loop !23

35:                                               ; preds = %23
  call void @Timer_waitDT(double noundef 1.000000e-01)
  ret void
}

declare void @Timer_waitDT(double noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 48}
!10 = !{!"_ZTSN3Rcs18MotionControlLayerE", !6, i64 8, !6, i64 16, !11, i64 24, !6, i64 48, !15, i64 56, !15, i64 57, !15, i64 58, !15, i64 59, !16, i64 60, !16, i64 64, !17, i64 72, !17, i64 80, !17, i64 88, !17, i64 96}
!11 = !{!"_ZTSSt6vectorIPN3Rcs17HardwareComponentESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSSt12_Vector_baseIPN3Rcs17HardwareComponentESaIS2_EE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN3Rcs17HardwareComponentESaIS2_EE12_Vector_implE", !14, i64 0}
!14 = !{!"_ZTSNSt12_Vector_baseIPN3Rcs17HardwareComponentESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"bool", !7, i64 0}
!16 = !{!"int", !7, i64 0}
!17 = !{!"double", !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"vtable pointer", !8, i64 0}
!20 = !{!10, !17, i64 88}
!21 = !{!22, !22, i64 0}
!22 = !{!"long", !7, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIPN3Rcs17HardwareComponentESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3Rcs17HardwareComponentESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN3Rcs18MotionControlLayer18disconnectCallbackEv(ptr noundef nonnull align 8 dereferenceable(104) %0) unnamed_addr #1 align 2 {
  %2 = getelementptr inbounds i8, ptr %0, i64 48
  %3 = load ptr, ptr %2, align 8, !tbaa !5
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %10, label %4

4:                                                ; preds = %1
  %5 = load ptr, ptr %3, align 8, !tbaa !17
  %6 = getelementptr inbounds i8, ptr %5, i64 48
  %7 = load ptr, ptr %6, align 8
  %8 = tail call noundef double %7(ptr noundef nonnull align 8 dereferenceable(25) %3)
  %9 = getelementptr inbounds i8, ptr %0, i64 88
  store double %8, ptr %9, align 8, !tbaa !19
  br label %10

10:                                               ; preds = %4, %1
  store ptr null, ptr %2, align 8, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 24
  %12 = tail call noundef i64 @_ZNKSt6vectorIPN3Rcs17HardwareComponentESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  %.not5 = icmp eq i64 %12, 0
  br i1 %.not5, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %10
  tail call void @Timer_waitDT(double noundef 1.000000e-01)
  ret void

.lr.ph:                                           ; preds = %10, %.lr.ph
  %.04 = phi i64 [ %18, %.lr.ph ], [ 0, %10 ]
  %13 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIPN3Rcs17HardwareComponentESaIS2_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %.04) #3
  %14 = load ptr, ptr %13, align 8, !tbaa !20
  %15 = load ptr, ptr %14, align 8, !tbaa !17
  %16 = getelementptr inbounds i8, ptr %15, i64 96
  %17 = load ptr, ptr %16, align 8
  tail call void %17(ptr noundef nonnull align 8 dereferenceable(25) %14, ptr noundef null, ptr noundef null)
  %18 = add nuw i64 %.04, 1
  %19 = tail call noundef i64 @_ZNKSt6vectorIPN3Rcs17HardwareComponentESaIS2_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %11) #3
  %20 = icmp ult i64 %18, %19
  br i1 %20, label %.lr.ph, label %._crit_edge, !llvm.loop !21
}

declare void @Timer_waitDT(double noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 48}
!6 = !{!"_ZTSN3Rcs18MotionControlLayerE", !7, i64 8, !7, i64 16, !10, i64 24, !7, i64 48, !14, i64 56, !14, i64 57, !14, i64 58, !14, i64 59, !15, i64 60, !15, i64 64, !16, i64 72, !16, i64 80, !16, i64 88, !16, i64 96}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSSt6vectorIPN3Rcs17HardwareComponentESaIS2_EE", !11, i64 0}
!11 = !{!"_ZTSSt12_Vector_baseIPN3Rcs17HardwareComponentESaIS2_EE", !12, i64 0}
!12 = !{!"_ZTSNSt12_Vector_baseIPN3Rcs17HardwareComponentESaIS2_EE12_Vector_implE", !13, i64 0}
!13 = !{!"_ZTSNSt12_Vector_baseIPN3Rcs17HardwareComponentESaIS2_EE17_Vector_impl_dataE", !7, i64 0, !7, i64 8, !7, i64 16}
!14 = !{!"bool", !8, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!"double", !8, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"vtable pointer", !9, i64 0}
!19 = !{!6, !16, i64 88}
!20 = !{!7, !7, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass