; LLVM IR from gognl/VMBR :: victim/src/hardware (pci)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [34 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @scan_for_device(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @get_pci_device(ptr noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i8, align 1
  %9 = alloca i8, align 1
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i16 %1, ptr %6, align 2, !tbaa !9
  store i16 %2, ptr %7, align 2, !tbaa !9
  %13 = load i16, ptr %6, align 2, !tbaa !9
  %14 = zext i16 %13 to i32
  %15 = load i16, ptr %7, align 2, !tbaa !9
  %16 = zext i16 %15 to i32
  call void (ptr, ...) @LOG_DEBUG(ptr noundef @.str, i32 noundef %14, i32 noundef %16)
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  store i32 0, ptr %11, align 4, !tbaa !11
  store i8 0, ptr %8, align 1, !tbaa !13
  br label %17

17:                                               ; preds = %51, %3
  %18 = load i8, ptr %8, align 1, !tbaa !13
  %19 = zext i8 %18 to i32
  %20 = icmp slt i32 %19, 256
  br i1 %20, label %21, label %54

21:                                               ; preds = %17
  store i8 0, ptr %9, align 1, !tbaa !13
  br label %22

22:                                               ; preds = %47, %21
  %23 = load i8, ptr %9, align 1, !tbaa !13
  %24 = zext i8 %23 to i32
  %25 = icmp slt i32 %24, 32
  br i1 %25, label %26, label %50

26:                                               ; preds = %22
  store i8 0, ptr %10, align 1, !tbaa !13
  br label %27

27:                                               ; preds = %43, %26
  %28 = load i8, ptr %10, align 1, !tbaa !13
  %29 = zext i8 %28 to i32
  %30 = icmp slt i32 %29, 32
  br i1 %30, label %31, label %46

31:                                               ; preds = %27
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i16, ptr %6, align 2, !tbaa !9
  %34 = load i16, ptr %7, align 2, !tbaa !9
  %35 = load i8, ptr %8, align 1, !tbaa !13
  %36 = load i8, ptr %9, align 1, !tbaa !13
  %37 = load i8, ptr %10, align 1, !tbaa !13
  %38 = call i32 @scan_for_device(ptr noundef %32, i16 noundef zeroext %33, i16 noundef zeroext %34, i8 noundef zeroext %35, i8 noundef zeroext %36, i8 noundef zeroext %37)
  store i32 %38, ptr %11, align 4, !tbaa !11
  %39 = load i32, ptr %11, align 4, !tbaa !11
  %40 = icmp ne i32 %39, 0
  br i1 %40, label %41, label %42

41:                                               ; preds = %31
  store i32 1, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %55

42:                                               ; preds = %31
  br label %43

43:                                               ; preds = %42
  %44 = load i8, ptr %10, align 1, !tbaa !13
  %45 = add i8 %44, 1
  store i8 %45, ptr %10, align 1, !tbaa !13
  br label %27, !llvm.loop !14

46:                                               ; preds = %27
  br label %47

47:                                               ; preds = %46
  %48 = load i8, ptr %9, align 1, !tbaa !13
  %49 = add i8 %48, 1
  store i8 %49, ptr %9, align 1, !tbaa !13
  br label %22, !llvm.loop !16

50:                                               ; preds = %22
  br label %51

51:                                               ; preds = %50
  %52 = load i8, ptr %8, align 1, !tbaa !13
  %53 = add i8 %52, 1
  store i8 %53, ptr %8, align 1, !tbaa !13
  br label %17, !llvm.loop !17

54:                                               ; preds = %17
  store i32 0, ptr %4, align 4
  store i32 1, ptr %12, align 4
  br label %55

55:                                               ; preds = %54, %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %56 = load i32, ptr %4, align 4
  ret i32 %56
}

declare void @LOG_DEBUG(ptr noundef, ...) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [34 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local i32 @scan_for_device(ptr noundef, i16 noundef zeroext, i16 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @get_pci_device(ptr noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2) local_unnamed_addr #0 {
  %4 = zext i16 %1 to i32
  %5 = zext i16 %2 to i32
  tail call void (ptr, ...) @LOG_DEBUG(ptr noundef nonnull @.str, i32 noundef %4, i32 noundef %5) #2
  br label %6

6:                                                ; preds = %13, %3
  %.016 = phi i8 [ 0, %3 ], [ %14, %13 ]
  br label %.preheader

.preheader:                                       ; preds = %6, %11
  %.01519 = phi i8 [ 0, %6 ], [ %12, %11 ]
  br label %9

7:                                                ; preds = %9
  %8 = add nuw nsw i8 %.018, 1
  %exitcond.not = icmp eq i8 %8, 32
  br i1 %exitcond.not, label %11, label %9, !llvm.loop !5

9:                                                ; preds = %.preheader, %7
  %.018 = phi i8 [ 0, %.preheader ], [ %8, %7 ]
  %10 = tail call i32 @scan_for_device(ptr noundef %0, i16 noundef zeroext %1, i16 noundef zeroext %2, i8 noundef zeroext %.016, i8 noundef zeroext %.01519, i8 noundef zeroext %.018)
  %.not = icmp eq i32 %10, 0
  br i1 %.not, label %7, label %15

11:                                               ; preds = %7
  %12 = add nuw nsw i8 %.01519, 1
  %exitcond20.not = icmp eq i8 %12, 32
  br i1 %exitcond20.not, label %13, label %.preheader, !llvm.loop !7

13:                                               ; preds = %11
  %14 = add i8 %.016, 1
  br label %6, !llvm.loop !8

15:                                               ; preds = %9
  ret i32 1
}

declare void @LOG_DEBUG(ptr noundef, ...) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass