; LLVM IR from intel/qpl :: sources/middle-layer/compression/deflate/utils (huffman_table_utils)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array.2" = type { [19 x i8] }
%struct.huff_code = type { %union.anon.0 }
%union.anon.0 = type { %struct.anon }
%struct.anon = type { i32 }
%struct.anon.1 = type { i16, i8, i8 }
%struct.rl_code = type { i8, i8 }

@__const._ZN3qpl2ml11compression21create_huffman_headerEP7BitBuf2P9huff_codeP7rl_codetjjjj.extra_bits = external hidden unnamed_addr constant [3 x i32], align 4
@_ZN3qpl2ml11compressionL22code_length_code_orderE = external hidden constant %"struct.std::array.2", align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN3qpl2ml11compression21create_huffman_headerEP7BitBuf2P9huff_codeP7rl_codetjjjj(ptr noundef %0, ptr noundef %1, ptr noundef %2, i16 noundef zeroext %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2 personality ptr @__gxx_personality_v0 {
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i16, align 2
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %struct.huff_code, align 4
  %19 = alloca [3 x i32], align 4
  %20 = alloca i64, align 8
  %21 = alloca i64, align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store ptr %1, ptr %10, align 8, !tbaa !5
  store ptr %2, ptr %11, align 8, !tbaa !5
  store i16 %3, ptr %12, align 2, !tbaa !9
  store i32 %4, ptr %13, align 4, !tbaa !11
  store i32 %5, ptr %14, align 4, !tbaa !11
  store i32 %6, ptr %15, align 4, !tbaa !11
  store i32 %7, ptr %16, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #6
  store i32 0, ptr %17, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #6
  call void @llvm.lifetime.start.p0(i64 12, ptr %19) #6
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 @__const._ZN3qpl2ml11compression21create_huffman_headerEP7BitBuf2P9huff_codeP7rl_codetjjjj.extra_bits, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #6
  %22 = load ptr, ptr %9, align 8, !tbaa !5
  %23 = invoke noundef i32 @_ZL16buffer_bits_usedP7BitBuf2(ptr noundef %22)
          to label %24 unwind label %153

24:                                               ; preds = %8
  %25 = zext i32 %23 to i64
  store i64 %25, ptr %20, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #6
  %26 = load i32, ptr %13, align 4, !tbaa !11
  %27 = icmp ne i32 %26, 0
  %28 = zext i1 %27 to i64
  %29 = select i1 %27, i32 5, i32 4
  %30 = load i32, ptr %15, align 4, !tbaa !11
  %31 = shl i32 %30, 3
  %32 = or i32 %29, %31
  %33 = load i32, ptr %16, align 4, !tbaa !11
  %34 = shl i32 %33, 8
  %35 = or i32 %32, %34
  %36 = load i32, ptr %14, align 4, !tbaa !11
  %37 = shl i32 %36, 13
  %38 = or i32 %35, %37
  %39 = zext i32 %38 to i64
  store i64 %39, ptr %21, align 8, !tbaa !13
  %40 = load ptr, ptr %10, align 8, !tbaa !5
  %41 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm19EEixEm(ptr noundef nonnull align 1 dereferenceable(19) @_ZN3qpl2ml11compressionL22code_length_code_orderE, i64 noundef 0) #6
  %42 = load i8, ptr %41, align 1, !tbaa !15
  %43 = zext i8 %42 to i64
  %44 = getelementptr inbounds %struct.huff_code, ptr %40, i64 %43
  %45 = getelementptr inbounds %struct.huff_code, ptr %44, i32 0, i32 0
  %46 = getelementptr inbounds %struct.anon.1, ptr %45, i32 0, i32 2
  %47 = load i8, ptr %46, align 1, !tbaa !15
  %48 = zext i8 %47 to i32
  %49 = shl i32 %48, 17
  %50 = sext i32 %49 to i64
  %51 = load i64, ptr %21, align 8, !tbaa !13
  %52 = or i64 %51, %50
  store i64 %52, ptr %21, align 8, !tbaa !13
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  %54 = load i64, ptr %21, align 8, !tbaa !13
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %53, i64 noundef %54, i32 noundef 20)
          to label %55 unwind label %153

55:                                               ; preds = %24
  store i64 0, ptr %21, align 8, !tbaa !13
  %56 = load i32, ptr %14, align 4, !tbaa !11
  %57 = add i32 %56, 3
  store i32 %57, ptr %17, align 4, !tbaa !11
  br label %58

58:                                               ; preds = %76, %55
  %59 = load i32, ptr %17, align 4, !tbaa !11
  %60 = icmp sge i32 %59, 1
  br i1 %60, label %61, label %79

61:                                               ; preds = %58
  %62 = load i64, ptr %21, align 8, !tbaa !13
  %63 = shl i64 %62, 3
  %64 = load ptr, ptr %10, align 8, !tbaa !5
  %65 = load i32, ptr %17, align 4, !tbaa !11
  %66 = sext i32 %65 to i64
  %67 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm19EEixEm(ptr noundef nonnull align 1 dereferenceable(19) @_ZN3qpl2ml11compressionL22code_length_code_orderE, i64 noundef %66) #6
  %68 = load i8, ptr %67, align 1, !tbaa !15
  %69 = zext i8 %68 to i64
  %70 = getelementptr inbounds %struct.huff_code, ptr %64, i64 %69
  %71 = getelementptr inbounds %struct.huff_code, ptr %70, i32 0, i32 0
  %72 = getelementptr inbounds %struct.anon.1, ptr %71, i32 0, i32 2
  %73 = load i8, ptr %72, align 1, !tbaa !15
  %74 = zext i8 %73 to i64
  %75 = or i64 %63, %74
  store i64 %75, ptr %21, align 8, !tbaa !13
  br label %76

76:                                               ; preds = %61
  %77 = load i32, ptr %17, align 4, !tbaa !11
  %78 = add nsw i32 %77, -1
  store i32 %78, ptr %17, align 4, !tbaa !11
  br label %58, !llvm.loop !16

79:                                               ; preds = %58
  %80 = load ptr, ptr %9, align 8, !tbaa !5
  %81 = load i64, ptr %21, align 8, !tbaa !13
  %82 = load i32, ptr %14, align 4, !tbaa !11
  %83 = add i32 %82, 3
  %84 = mul i32 %83, 3
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %80, i64 noundef %81, i32 noundef %84)
          to label %85 unwind label %153

85:                                               ; preds = %79
  store i32 0, ptr %17, align 4, !tbaa !11
  br label %86

86:                                               ; preds = %141, %85
  %87 = load i32, ptr %17, align 4, !tbaa !11
  %88 = load i16, ptr %12, align 2, !tbaa !9
  %89 = zext i16 %88 to i32
  %90 = icmp slt i32 %87, %89
  br i1 %90, label %91, label %144

91:                                               ; preds = %86
  %92 = load ptr, ptr %10, align 8, !tbaa !5
  %93 = load ptr, ptr %11, align 8, !tbaa !5
  %94 = load i32, ptr %17, align 4, !tbaa !11
  %95 = sext i32 %94 to i64
  %96 = getelementptr inbounds %struct.rl_code, ptr %93, i64 %95
  %97 = getelementptr inbounds %struct.rl_code, ptr %96, i32 0, i32 0
  %98 = load i8, ptr %97, align 1, !tbaa !18
  %99 = zext i8 %98 to i64
  %100 = getelementptr inbounds %struct.huff_code, ptr %92, i64 %99
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 4 %100, i64 4, i1 false), !tbaa.struct !20
  %101 = load ptr, ptr %9, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.huff_code, ptr %18, i32 0, i32 0
  %103 = getelementptr inbounds %struct.anon.1, ptr %102, i32 0, i32 0
  %104 = load i16, ptr %103, align 4, !tbaa !15
  %105 = zext i16 %104 to i64
  %106 = getelementptr inbounds %struct.huff_code, ptr %18, i32 0, i32 0
  %107 = getelementptr inbounds %struct.anon.1, ptr %106, i32 0, i32 2
  %108 = load i8, ptr %107, align 1, !tbaa !15
  %109 = zext i8 %108 to i32
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %101, i64 noundef %105, i32 noundef %109)
          to label %110 unwind label %153

110:                                              ; preds = %91
  %111 = load ptr, ptr %11, align 8, !tbaa !5
  %112 = load i32, ptr %17, align 4, !tbaa !11
  %113 = sext i32 %112 to i64
  %114 = getelementptr inbounds %struct.rl_code, ptr %111, i64 %113
  %115 = getelementptr inbounds %struct.rl_code, ptr %114, i32 0, i32 0
  %116 = load i8, ptr %115, align 1, !tbaa !18
  %117 = zext i8 %116 to i32
  %118 = icmp sgt i32 %117, 15
  br i1 %118, label %119, label %140

119:                                              ; preds = %110
  %120 = load ptr, ptr %9, align 8, !tbaa !5
  %121 = load ptr, ptr %11, align 8, !tbaa !5
  %122 = load i32, ptr %17, align 4, !tbaa !11
  %123 = sext i32 %122 to i64
  %124 = getelementptr inbounds %struct.rl_code, ptr %121, i64 %123
  %125 = getelementptr inbounds %struct.rl_code, ptr %124, i32 0, i32 1
  %126 = load i8, ptr %125, align 1, !tbaa !21
  %127 = zext i8 %126 to i64
  %128 = load ptr, ptr %11, align 8, !tbaa !5
  %129 = load i32, ptr %17, align 4, !tbaa !11
  %130 = sext i32 %129 to i64
  %131 = getelementptr inbounds %struct.rl_code, ptr %128, i64 %130
  %132 = getelementptr inbounds %struct.rl_code, ptr %131, i32 0, i32 0
  %133 = load i8, ptr %132, align 1, !tbaa !18
  %134 = zext i8 %133 to i32
  %135 = sub nsw i32 %134, 16
  %136 = sext i32 %135 to i64
  %137 = getelementptr inbounds [3 x i32], ptr %19, i64 0, i64 %136
  %138 = load i32, ptr %137, align 4, !tbaa !11
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %120, i64 noundef %127, i32 noundef %138)
          to label %139 unwind label %153

139:                                              ; preds = %119
  br label %140

140:                                              ; preds = %139, %110
  br label %141

141:                                              ; preds = %140
  %142 = load i32, ptr %17, align 4, !tbaa !11
  %143 = add nsw i32 %142, 1
  store i32 %143, ptr %17, align 4, !tbaa !11
  br label %86, !llvm.loop !22

144:                                              ; preds = %86
  %145 = load ptr, ptr %9, align 8, !tbaa !5
  %146 = invoke noundef i32 @_ZL16buffer_bits_usedP7BitBuf2(ptr noundef %145)
          to label %147 unwind label %153

147:                                              ; preds = %144
  %148 = zext i32 %146 to i64
  %149 = load i64, ptr %20, align 8, !tbaa !13
  %150 = sub i64 %148, %149
  store i64 %150, ptr %20, align 8, !tbaa !13
  %151 = load i64, ptr %20, align 8, !tbaa !13
  %152 = trunc i64 %151 to i32
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  call void @llvm.lifetime.end.p0(i64 12, ptr %19) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #6
  ret i32 %152

153:                                              ; preds = %144, %119, %91, %79, %24, %8
  %154 = landingpad { ptr, i32 }
          catch ptr null
  %155 = extractvalue { ptr, i32 } %154, 0
  call void @__clang_call_terminate(ptr %155) #7
  unreachable
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL16buffer_bits_usedP7BitBuf2(ptr noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm19EEixEm(ptr noundef nonnull align 1 dereferenceable(19), i64 noundef) #2 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL10write_bitsP7BitBuf2mj(ptr noundef, i64 noundef, i32 noundef) #5

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!19, !7, i64 0}
!19 = !{!"_ZTS7rl_code", !7, i64 0, !7, i64 1}
!20 = !{i64 0, i64 4, !15}
!21 = !{!19, !7, i64 1}
!22 = distinct !{!22, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::array.2" = type { [19 x i8] }
%struct.huff_code = type { %union.anon.0 }
%union.anon.0 = type { %struct.anon }
%struct.anon = type { i32 }
%struct.rl_code = type { i8, i8 }

@__const._ZN3qpl2ml11compression21create_huffman_headerEP7BitBuf2P9huff_codeP7rl_codetjjjj.extra_bits = external hidden unnamed_addr constant [3 x i32], align 4
@_ZN3qpl2ml11compressionL22code_length_code_orderE = external hidden constant %"struct.std::array.2", align 1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: noinline noreturn nounwind uwtable
declare hidden void @__clang_call_terminate(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN3qpl2ml11compression21create_huffman_headerEP7BitBuf2P9huff_codeP7rl_codetjjjj(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, i16 noundef zeroext %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7) local_unnamed_addr #1 personality ptr @__gxx_personality_v0 {
  %9 = tail call noundef i32 @_ZL16buffer_bits_usedP7BitBuf2(ptr noundef %0)
  %.not = icmp eq i32 %4, 0
  %10 = select i1 %.not, i32 4, i32 5
  %11 = shl i32 %6, 3
  %12 = or disjoint i32 %11, %10
  %13 = shl i32 %7, 8
  %14 = shl i32 %5, 13
  %15 = or i32 %13, %14
  %16 = or i32 %15, %12
  %17 = zext i32 %16 to i64
  %18 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm19EEixEm(ptr noundef nonnull align 1 dereferenceable(19) @_ZN3qpl2ml11compressionL22code_length_code_orderE, i64 noundef 0) #4
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = zext i8 %19 to i64
  %21 = getelementptr inbounds %struct.huff_code, ptr %1, i64 %20
  %22 = getelementptr inbounds i8, ptr %21, i64 3
  %23 = load i8, ptr %22, align 1, !tbaa !5
  %24 = zext i8 %23 to i64
  %25 = shl nuw nsw i64 %24, 17
  %26 = or i64 %25, %17
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %0, i64 noundef %26, i32 noundef 20)
          to label %27 unwind label %.loopexit.split-lp

27:                                               ; preds = %8
  %28 = add i32 %5, 3
  %invariant.gep = getelementptr inbounds i8, ptr %1, i64 3
  %29 = icmp sgt i32 %28, 0
  br i1 %29, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %27
  %30 = zext nneg i32 %28 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %30, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.038 = phi i64 [ 0, %.lr.ph.preheader ], [ %37, %.lr.ph ]
  %31 = shl i64 %.038, 3
  %32 = tail call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm19EEixEm(ptr noundef nonnull align 1 dereferenceable(19) @_ZN3qpl2ml11compressionL22code_length_code_orderE, i64 noundef %indvars.iv) #4
  %33 = load i8, ptr %32, align 1, !tbaa !5
  %34 = zext i8 %33 to i64
  %gep = getelementptr inbounds %struct.huff_code, ptr %invariant.gep, i64 %34
  %35 = load i8, ptr %gep, align 1, !tbaa !5
  %36 = zext i8 %35 to i64
  %37 = or i64 %31, %36
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %38 = icmp ugt i64 %indvars.iv, 1
  br i1 %38, label %.lr.ph, label %._crit_edge, !llvm.loop !8

._crit_edge:                                      ; preds = %.lr.ph, %27
  %.0.lcssa = phi i64 [ 0, %27 ], [ %37, %.lr.ph ]
  %39 = mul i32 %28, 3
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %0, i64 noundef %.0.lcssa, i32 noundef %39)
          to label %.preheader unwind label %.loopexit.split-lp

.preheader:                                       ; preds = %._crit_edge
  %.not42 = icmp eq i16 %3, 0
  br i1 %.not42, label %._crit_edge41, label %.lr.ph40.preheader

.lr.ph40.preheader:                               ; preds = %.preheader
  %wide.trip.count = zext i16 %3 to i64
  br label %.lr.ph40

.lr.ph40:                                         ; preds = %.lr.ph40.preheader, %58
  %indvars.iv44 = phi i64 [ 0, %.lr.ph40.preheader ], [ %indvars.iv.next45, %58 ]
  %40 = getelementptr inbounds %struct.rl_code, ptr %2, i64 %indvars.iv44
  %41 = load i8, ptr %40, align 1, !tbaa !10
  %42 = zext i8 %41 to i64
  %43 = getelementptr inbounds %struct.huff_code, ptr %1, i64 %42
  %.sroa.0.0.copyload = load i16, ptr %43, align 4
  %.sroa.46.0..sroa_idx = getelementptr inbounds i8, ptr %43, i64 3
  %.sroa.46.0.copyload = load i8, ptr %.sroa.46.0..sroa_idx, align 1, !tbaa !5
  %44 = zext i16 %.sroa.0.0.copyload to i64
  %45 = zext i8 %.sroa.46.0.copyload to i32
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %0, i64 noundef %44, i32 noundef %45)
          to label %46 unwind label %.loopexit

46:                                               ; preds = %.lr.ph40
  %47 = load i8, ptr %40, align 1, !tbaa !10
  %48 = icmp ugt i8 %47, 15
  br i1 %48, label %49, label %58

49:                                               ; preds = %46
  %50 = zext i8 %47 to i64
  %51 = getelementptr inbounds i8, ptr %40, i64 1
  %52 = load i8, ptr %51, align 1, !tbaa !12
  %53 = zext i8 %52 to i64
  %54 = add nuw nsw i64 %50, 4294967280
  %55 = and i64 %54, 4294967295
  %56 = getelementptr inbounds [3 x i32], ptr @__const._ZN3qpl2ml11compression21create_huffman_headerEP7BitBuf2P9huff_codeP7rl_codetjjjj.extra_bits, i64 0, i64 %55
  %57 = load i32, ptr %56, align 4, !tbaa !13
  invoke void @_ZL10write_bitsP7BitBuf2mj(ptr noundef %0, i64 noundef %53, i32 noundef %57)
          to label %58 unwind label %.loopexit

58:                                               ; preds = %46, %49
  %indvars.iv.next45 = add nuw nsw i64 %indvars.iv44, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next45, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge41, label %.lr.ph40, !llvm.loop !15

._crit_edge41:                                    ; preds = %58, %.preheader
  %59 = tail call noundef i32 @_ZL16buffer_bits_usedP7BitBuf2(ptr noundef %0)
  %60 = sub i32 %59, %9
  ret i32 %60

.loopexit:                                        ; preds = %.lr.ph40, %49
  %lpad.loopexit = landingpad { ptr, i32 }
          catch ptr null
  br label %61

.loopexit.split-lp:                               ; preds = %8, %._crit_edge
  %lpad.loopexit.split-lp = landingpad { ptr, i32 }
          catch ptr null
  br label %61

61:                                               ; preds = %.loopexit.split-lp, %.loopexit
  %lpad.phi = phi { ptr, i32 } [ %lpad.loopexit, %.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp ]
  %62 = extractvalue { ptr, i32 } %lpad.phi, 0
  tail call void @__clang_call_terminate(ptr %62) #5
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL16buffer_bits_usedP7BitBuf2(ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt5arrayIhLm19EEixEm(ptr noundef nonnull align 1 dereferenceable(19), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare hidden void @_ZL10write_bitsP7BitBuf2mj(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #3

attributes #0 = { noinline noreturn nounwind uwtable "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
attributes #5 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!11, !6, i64 0}
!11 = !{!"_ZTS7rl_code", !6, i64 0, !6, i64 1}
!12 = !{!11, !6, i64 1}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !6, i64 0}
!15 = distinct !{!15, !9}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass