; LLVM IR from devantler/software-engineering-f22-shared :: IOT/BudgetManagementExcercise-03-28/ESP-Project/components/components/tinyusb (lock)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__get_PRIMASK() #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__disable_irq() #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @__NVIC_ClearPendingIRQ(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @__NVIC_EnableIRQ(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @__NVIC_GetPendingIRQ(i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @__NVIC_DisableIRQ(i32 noundef) #2

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__enable_irq() #1

; Function Attrs: nounwind uwtable
define dso_local void @da1469x_clock_pll_wait_to_lock() #3 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  br label %2

2:                                                ; preds = %0
  %3 = call i32 @__get_PRIMASK()
  store i32 %3, ptr %1, align 4, !tbaa !5
  call void @__disable_irq()
  br label %4

4:                                                ; preds = %2
  br label %5

5:                                                ; preds = %4
  call void @__NVIC_ClearPendingIRQ(i32 noundef 33)
  %6 = call i32 @da1469x_clock_is_pll_locked()
  %7 = icmp ne i32 %6, 0
  br i1 %7, label %15, label %8

8:                                                ; preds = %5
  call void @__NVIC_EnableIRQ(i32 noundef 33)
  br label %9

9:                                                ; preds = %13, %8
  %10 = call i32 @__NVIC_GetPendingIRQ(i32 noundef 33)
  %11 = icmp ne i32 %10, 0
  %12 = xor i1 %11, true
  br i1 %12, label %13, label %14

13:                                               ; preds = %9
  call void asm sideeffect "wfi", "~{dirflag},~{fpsr},~{flags}"() #4, !srcloc !9
  br label %9, !llvm.loop !10

14:                                               ; preds = %9
  call void @__NVIC_DisableIRQ(i32 noundef 33)
  br label %15

15:                                               ; preds = %14, %5
  br label %16

16:                                               ; preds = %15
  %17 = load i32, ptr %1, align 4, !tbaa !5
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %20, label %19

19:                                               ; preds = %16
  call void @__enable_irq()
  br label %20

20:                                               ; preds = %19, %16
  br label %21

21:                                               ; preds = %20
  br label %22

22:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @da1469x_clock_is_pll_locked() #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 2149096856}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: alwaysinline nounwind uwtable
declare hidden i32 @__get_PRIMASK() local_unnamed_addr #0

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__disable_irq() local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @__NVIC_ClearPendingIRQ(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @__NVIC_EnableIRQ(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @__NVIC_GetPendingIRQ(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @__NVIC_DisableIRQ(i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline nounwind uwtable
declare hidden void @__enable_irq() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @da1469x_clock_pll_wait_to_lock() local_unnamed_addr #2 {
  %1 = tail call i32 @__get_PRIMASK()
  tail call void @__disable_irq()
  tail call void @__NVIC_ClearPendingIRQ(i32 noundef 33)
  %2 = tail call i32 @da1469x_clock_is_pll_locked()
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %3, label %6

3:                                                ; preds = %0
  tail call void @__NVIC_EnableIRQ(i32 noundef 33)
  %4 = tail call i32 @__NVIC_GetPendingIRQ(i32 noundef 33)
  %.not13 = icmp eq i32 %4, 0
  br i1 %.not13, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %3, %.lr.ph
  tail call void asm sideeffect "wfi", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !5
  %5 = tail call i32 @__NVIC_GetPendingIRQ(i32 noundef 33)
  %.not1 = icmp eq i32 %5, 0
  br i1 %.not1, label %.lr.ph, label %._crit_edge, !llvm.loop !6

._crit_edge:                                      ; preds = %.lr.ph, %3
  tail call void @__NVIC_DisableIRQ(i32 noundef 33)
  br label %6

6:                                                ; preds = %0, %._crit_edge
  %.not2 = icmp eq i32 %1, 0
  br i1 %.not2, label %7, label %8

7:                                                ; preds = %6
  tail call void @__enable_irq()
  br label %8

8:                                                ; preds = %7, %6
  ret void
}

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @da1469x_clock_is_pll_locked() local_unnamed_addr #1

attributes #0 = { alwaysinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2149096856}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass