; LLVM IR from intel/qpl :: tools/utils/generators/deflate_generator (bitbuffer)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.gz_generator::BitBuffer" = type { i8, i32, %struct.anon, ptr }
%struct.anon = type { i64, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN12gz_generator9BitBuffer5writeEmj(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef, i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN12gz_generator9BitBuffer5flushEj(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %1) #1 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !9
  %8 = getelementptr inbounds %"class.gz_generator::BitBuffer", ptr %7, i32 0, i32 0
  %9 = load i8, ptr %8, align 8, !tbaa !11, !range !16, !noundef !17
  %10 = trunc i8 %9 to i1
  br i1 %10, label %11, label %17

11:                                               ; preds = %2
  %12 = getelementptr inbounds %"class.gz_generator::BitBuffer", ptr %7, i32 0, i32 2
  %13 = getelementptr inbounds %struct.anon, ptr %12, i32 0, i32 1
  %14 = load i32, ptr %13, align 8, !tbaa !18
  %15 = sub i32 0, %14
  %16 = and i32 %15, 15
  store i32 %16, ptr %5, align 4, !tbaa !9
  br label %23

17:                                               ; preds = %2
  %18 = getelementptr inbounds %"class.gz_generator::BitBuffer", ptr %7, i32 0, i32 2
  %19 = getelementptr inbounds %struct.anon, ptr %18, i32 0, i32 1
  %20 = load i32, ptr %19, align 8, !tbaa !18
  %21 = sub i32 0, %20
  %22 = and i32 %21, 7
  store i32 %22, ptr %5, align 4, !tbaa !9
  br label %23

23:                                               ; preds = %17, %11
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %24 = load i32, ptr %4, align 4, !tbaa !9
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = shl i32 1, %25
  %27 = sub i32 %26, 1
  %28 = and i32 %24, %27
  store i32 %28, ptr %6, align 4, !tbaa !9
  %29 = load i32, ptr %6, align 4, !tbaa !9
  %30 = zext i32 %29 to i64
  %31 = load i32, ptr %5, align 4, !tbaa !9
  call void @_ZN12gz_generator9BitBuffer5writeEmj(ptr noundef nonnull align 8 dereferenceable(32) %7, i64 noundef %30, i32 noundef %31)
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTSN12gz_generator9BitBufferE", !13, i64 0, !10, i64 4, !14, i64 8, !6, i64 24}
!13 = !{!"bool", !7, i64 0}
!14 = !{!"_ZTSN12gz_generator9BitBufferUt_E", !15, i64 0, !10, i64 8}
!15 = !{!"long", !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = !{!12, !10, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN12gz_generator9BitBuffer5writeEmj(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef, i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN12gz_generator9BitBuffer5flushEj(ptr noundef nonnull align 8 dereferenceable(32) %0, i32 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = load i8, ptr %0, align 8, !tbaa !5, !range !14, !noundef !15
  %4 = trunc nuw i8 %3 to i1
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  %6 = load i32, ptr %5, align 8, !tbaa !16
  %7 = sub i32 0, %6
  %. = select i1 %4, i32 15, i32 7
  %8 = and i32 %., %7
  %notmask = shl nsw i32 -1, %8
  %9 = xor i32 %notmask, -1
  %10 = and i32 %9, %1
  %11 = zext nneg i32 %10 to i64
  tail call void @_ZN12gz_generator9BitBuffer5writeEmj(ptr noundef nonnull align 8 dereferenceable(32) %0, i64 noundef %11, i32 noundef %8)
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN12gz_generator9BitBufferE", !7, i64 0, !10, i64 4, !11, i64 8, !13, i64 24}
!7 = !{!"bool", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_ZTSN12gz_generator9BitBufferUt_E", !12, i64 0, !10, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{i8 0, i8 2}
!15 = !{}
!16 = !{!6, !10, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass