; LLVM IR from amritansh22/Data-Structures-and-Algorithms-in-cpp :: SortingAlgorithms/merge_sort.ll (Z5mergeRSt6vectorIiSaIiEEiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5mergeRSt6vectorIiSaIiEEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca %"class.std::vector", align 8
  %15 = alloca %"class.std::allocator", align 1
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca %"class.std::vector", align 8
  %19 = alloca %"class.std::allocator", align 1
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %20 = load i32, ptr %7, align 4, !tbaa !9
  %21 = load i32, ptr %6, align 4, !tbaa !9
  %22 = sub nsw i32 %20, %21
  %23 = add nsw i32 %22, 1
  store i32 %23, ptr %12, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %24 = load i32, ptr %8, align 4, !tbaa !9
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = sub nsw i32 %24, %25
  store i32 %26, ptr %13, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %14) #3
  %27 = load i32, ptr %12, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %15) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %15) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %28, ptr noundef nonnull align 1 dereferenceable(1) %15)
          to label %29 unwind label %51

29:                                               ; preds = %4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %15) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 24, ptr %18) #3
  %30 = load i32, ptr %13, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr %19) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %19) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %31, ptr noundef nonnull align 1 dereferenceable(1) %19)
          to label %32 unwind label %55

32:                                               ; preds = %29
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %19) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %19) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %48, %32
  %34 = load i32, ptr %9, align 4, !tbaa !9
  %35 = load i32, ptr %12, align 4, !tbaa !9
  %36 = icmp slt i32 %34, %35
  br i1 %36, label %37, label %59

37:                                               ; preds = %33
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = load i32, ptr %6, align 4, !tbaa !9
  %40 = load i32, ptr %9, align 4, !tbaa !9
  %41 = add nsw i32 %39, %40
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %42) #3
  %44 = load i32, ptr %43, align 4, !tbaa !9
  %45 = load i32, ptr %9, align 4, !tbaa !9
  %46 = sext i32 %45 to i64
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %46) #3
  store i32 %44, ptr %47, align 4, !tbaa !9
  br label %48

48:                                               ; preds = %37
  %49 = load i32, ptr %9, align 4, !tbaa !9
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %9, align 4, !tbaa !9
  br label %33, !llvm.loop !11

51:                                               ; preds = %4
  %52 = landingpad { ptr, i32 }
          cleanup
  %53 = extractvalue { ptr, i32 } %52, 0
  store ptr %53, ptr %16, align 8
  %54 = extractvalue { ptr, i32 } %52, 1
  store i32 %54, ptr %17, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %15) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %15) #3
  br label %157

55:                                               ; preds = %29
  %56 = landingpad { ptr, i32 }
          cleanup
  %57 = extractvalue { ptr, i32 } %56, 0
  store ptr %57, ptr %16, align 8
  %58 = extractvalue { ptr, i32 } %56, 1
  store i32 %58, ptr %17, align 4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %19) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %18) #3
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  br label %157

59:                                               ; preds = %33
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %76, %59
  %61 = load i32, ptr %9, align 4, !tbaa !9
  %62 = load i32, ptr %13, align 4, !tbaa !9
  %63 = icmp slt i32 %61, %62
  br i1 %63, label %64, label %79

64:                                               ; preds = %60
  %65 = load ptr, ptr %5, align 8, !tbaa !5
  %66 = load i32, ptr %7, align 4, !tbaa !9
  %67 = add nsw i32 %66, 1
  %68 = load i32, ptr %9, align 4, !tbaa !9
  %69 = add nsw i32 %67, %68
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %65, i64 noundef %70) #3
  %72 = load i32, ptr %71, align 4, !tbaa !9
  %73 = load i32, ptr %9, align 4, !tbaa !9
  %74 = sext i32 %73 to i64
  %75 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %74) #3
  store i32 %72, ptr %75, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %64
  %77 = load i32, ptr %9, align 4, !tbaa !9
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %9, align 4, !tbaa !9
  br label %60, !llvm.loop !13

79:                                               ; preds = %60
  store i32 0, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %10, align 4, !tbaa !9
  %80 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %80, ptr %11, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %121, %79
  %82 = load i32, ptr %9, align 4, !tbaa !9
  %83 = load i32, ptr %12, align 4, !tbaa !9
  %84 = icmp slt i32 %82, %83
  br i1 %84, label %85, label %89

85:                                               ; preds = %81
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = load i32, ptr %13, align 4, !tbaa !9
  %88 = icmp slt i32 %86, %87
  br label %89

89:                                               ; preds = %85, %81
  %90 = phi i1 [ false, %81 ], [ %88, %85 ]
  br i1 %90, label %91, label %124

91:                                               ; preds = %89
  %92 = load i32, ptr %9, align 4, !tbaa !9
  %93 = sext i32 %92 to i64
  %94 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %93) #3
  %95 = load i32, ptr %94, align 4, !tbaa !9
  %96 = load i32, ptr %10, align 4, !tbaa !9
  %97 = sext i32 %96 to i64
  %98 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %97) #3
  %99 = load i32, ptr %98, align 4, !tbaa !9
  %100 = icmp sle i32 %95, %99
  br i1 %100, label %101, label %111

101:                                              ; preds = %91
  %102 = load i32, ptr %9, align 4, !tbaa !9
  %103 = add nsw i32 %102, 1
  store i32 %103, ptr %9, align 4, !tbaa !9
  %104 = sext i32 %102 to i64
  %105 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %104) #3
  %106 = load i32, ptr %105, align 4, !tbaa !9
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = load i32, ptr %11, align 4, !tbaa !9
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %109) #3
  store i32 %106, ptr %110, align 4, !tbaa !9
  br label %121

111:                                              ; preds = %91
  %112 = load i32, ptr %10, align 4, !tbaa !9
  %113 = add nsw i32 %112, 1
  store i32 %113, ptr %10, align 4, !tbaa !9
  %114 = sext i32 %112 to i64
  %115 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %114) #3
  %116 = load i32, ptr %115, align 4, !tbaa !9
  %117 = load ptr, ptr %5, align 8, !tbaa !5
  %118 = load i32, ptr %11, align 4, !tbaa !9
  %119 = sext i32 %118 to i64
  %120 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %117, i64 noundef %119) #3
  store i32 %116, ptr %120, align 4, !tbaa !9
  br label %121

121:                                              ; preds = %111, %101
  %122 = load i32, ptr %11, align 4, !tbaa !9
  %123 = add nsw i32 %122, 1
  store i32 %123, ptr %11, align 4, !tbaa !9
  br label %81, !llvm.loop !14

124:                                              ; preds = %89
  br label %125

125:                                              ; preds = %129, %124
  %126 = load i32, ptr %9, align 4, !tbaa !9
  %127 = load i32, ptr %12, align 4, !tbaa !9
  %128 = icmp slt i32 %126, %127
  br i1 %128, label %129, label %140

129:                                              ; preds = %125
  %130 = load i32, ptr %9, align 4, !tbaa !9
  %131 = add nsw i32 %130, 1
  store i32 %131, ptr %9, align 4, !tbaa !9
  %132 = sext i32 %130 to i64
  %133 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %14, i64 noundef %132) #3
  %134 = load i32, ptr %133, align 4, !tbaa !9
  %135 = load ptr, ptr %5, align 8, !tbaa !5
  %136 = load i32, ptr %11, align 4, !tbaa !9
  %137 = add nsw i32 %136, 1
  store i32 %137, ptr %11, align 4, !tbaa !9
  %138 = sext i32 %136 to i64
  %139 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %135, i64 noundef %138) #3
  store i32 %134, ptr %139, align 4, !tbaa !9
  br label %125, !llvm.loop !15

140:                                              ; preds = %125
  br label %141

141:                                              ; preds = %145, %140
  %142 = load i32, ptr %10, align 4, !tbaa !9
  %143 = load i32, ptr %13, align 4, !tbaa !9
  %144 = icmp slt i32 %142, %143
  br i1 %144, label %145, label %156

145:                                              ; preds = %141
  %146 = load i32, ptr %10, align 4, !tbaa !9
  %147 = add nsw i32 %146, 1
  store i32 %147, ptr %10, align 4, !tbaa !9
  %148 = sext i32 %146 to i64
  %149 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %148) #3
  %150 = load i32, ptr %149, align 4, !tbaa !9
  %151 = load ptr, ptr %5, align 8, !tbaa !5
  %152 = load i32, ptr %11, align 4, !tbaa !9
  %153 = add nsw i32 %152, 1
  store i32 %153, ptr %11, align 4, !tbaa !9
  %154 = sext i32 %152 to i64
  %155 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %151, i64 noundef %154) #3
  store i32 %150, ptr %155, align 4, !tbaa !9
  br label %141, !llvm.loop !16

156:                                              ; preds = %141
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %18) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %18) #3
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %14) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void

157:                                              ; preds = %55, %51
  call void @llvm.lifetime.end.p0(i64 24, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %158

158:                                              ; preds = %157
  %159 = load ptr, ptr %16, align 8
  %160 = load i32, ptr %17, align 4
  %161 = insertvalue { ptr, i32 } poison, ptr %159, 0
  %162 = insertvalue { ptr, i32 } %161, i32 %160, 1
  resume { ptr, i32 } %162
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5mergeRSt6vectorIiSaIiEEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"class.std::vector", align 8
  %6 = alloca %"class.std::allocator", align 1
  %7 = alloca %"class.std::vector", align 8
  %8 = alloca %"class.std::allocator", align 1
  %9 = sub nsw i32 %2, %1
  %10 = add nsw i32 %9, 1
  %11 = sub i32 %3, %2
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
  %12 = sext i32 %10 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %12, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %13 unwind label %26

13:                                               ; preds = %4
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #3
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %7) #3
  %14 = sext i32 %11 to i64
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %8) #3
  call void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #3
  invoke void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %14, ptr noundef nonnull align 1 dereferenceable(1) %8)
          to label %15 unwind label %28

15:                                               ; preds = %13
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %8) #3
  %.not61 = icmp slt i32 %9, 0
  br i1 %.not61, label %.preheader60, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %15
  %16 = sext i32 %1 to i64
  %17 = add i32 %2, 1
  %18 = sub i32 %17, %1
  %wide.trip.count = zext i32 %18 to i64
  br label %.lr.ph

.preheader60:                                     ; preds = %.lr.ph, %15
  %19 = icmp sgt i32 %11, 0
  br i1 %19, label %.lr.ph64, label %.preheader58

.lr.ph64:                                         ; preds = %.preheader60
  %20 = add nsw i32 %2, 1
  %21 = sext i32 %20 to i64
  %wide.trip.count84 = zext nneg i32 %11 to i64
  br label %33

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %22 = add nsw i64 %indvars.iv, %16
  %23 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %22) #3
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv) #3
  store i32 %24, ptr %25, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.preheader60, label %.lr.ph, !llvm.loop !9

26:                                               ; preds = %4
  %27 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #3
  br label %72

28:                                               ; preds = %13
  %29 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %8) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %7) #3
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #3
  br label %72

.preheader59:                                     ; preds = %33
  %30 = icmp sgt i32 %9, -1
  %31 = and i1 %30, %19
  br i1 %31, label %.lr.ph68.preheader, label %.preheader58

.lr.ph68.preheader:                               ; preds = %.preheader59
  %32 = sext i32 %1 to i64
  br label %.lr.ph68

33:                                               ; preds = %.lr.ph64, %33
  %indvars.iv81 = phi i64 [ 0, %.lr.ph64 ], [ %indvars.iv.next82, %33 ]
  %34 = add nsw i64 %indvars.iv81, %21
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %34) #3
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv81) #3
  store i32 %36, ptr %37, align 4, !tbaa !5
  %indvars.iv.next82 = add nuw nsw i64 %indvars.iv81, 1
  %exitcond85.not = icmp eq i64 %indvars.iv.next82, %wide.trip.count84
  br i1 %exitcond85.not, label %.preheader59, label %33, !llvm.loop !11

.preheader58.loopexit:                            ; preds = %55
  %38 = trunc nsw i64 %indvars.iv.next87 to i32
  br label %.preheader58

.preheader58:                                     ; preds = %.preheader60, %.preheader58.loopexit, %.preheader59
  %.050.lcssa = phi i32 [ %1, %.preheader59 ], [ %38, %.preheader58.loopexit ], [ %1, %.preheader60 ]
  %.047.lcssa = phi i32 [ 0, %.preheader59 ], [ %.148, %.preheader58.loopexit ], [ 0, %.preheader60 ]
  %.2.lcssa = phi i32 [ 0, %.preheader59 ], [ %.3, %.preheader58.loopexit ], [ 0, %.preheader60 ]
  %.not5671 = icmp sgt i32 %.2.lcssa, %9
  br i1 %.not5671, label %.preheader, label %.lr.ph74.preheader

.lr.ph74.preheader:                               ; preds = %.preheader58
  %39 = sext i32 %.2.lcssa to i64
  %40 = sext i32 %.050.lcssa to i64
  %41 = add i32 %2, 1
  %42 = sub i32 %41, %1
  br label %.lr.ph74

.lr.ph68:                                         ; preds = %.lr.ph68.preheader, %55
  %indvars.iv86 = phi i64 [ %32, %.lr.ph68.preheader ], [ %indvars.iv.next87, %55 ]
  %.267 = phi i32 [ 0, %.lr.ph68.preheader ], [ %.3, %55 ]
  %.04766 = phi i32 [ 0, %.lr.ph68.preheader ], [ %.148, %55 ]
  %43 = sext i32 %.267 to i64
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %43) #3
  %45 = load i32, ptr %44, align 4, !tbaa !5
  %46 = sext i32 %.04766 to i64
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %46) #3
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %.not57 = icmp sgt i32 %45, %48
  br i1 %.not57, label %52, label %49

49:                                               ; preds = %.lr.ph68
  %50 = add nsw i32 %.267, 1
  %51 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %43) #3
  br label %55

52:                                               ; preds = %.lr.ph68
  %53 = add nsw i32 %.04766, 1
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %46) #3
  br label %55

55:                                               ; preds = %52, %49
  %.sink105 = phi ptr [ %54, %52 ], [ %51, %49 ]
  %.148 = phi i32 [ %53, %52 ], [ %.04766, %49 ]
  %.3 = phi i32 [ %.267, %52 ], [ %50, %49 ]
  %56 = load i32, ptr %.sink105, align 4, !tbaa !5
  %57 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv86) #3
  store i32 %56, ptr %57, align 4, !tbaa !5
  %indvars.iv.next87 = add nsw i64 %indvars.iv86, 1
  %58 = icmp sle i32 %.3, %9
  %59 = icmp slt i32 %.148, %11
  %60 = select i1 %58, i1 %59, i1 false
  br i1 %60, label %.lr.ph68, label %.preheader58.loopexit, !llvm.loop !12

.preheader.loopexit:                              ; preds = %.lr.ph74
  %61 = trunc nsw i64 %indvars.iv.next92 to i32
  br label %.preheader

.preheader:                                       ; preds = %.preheader.loopexit, %.preheader58
  %.151.lcssa = phi i32 [ %.050.lcssa, %.preheader58 ], [ %61, %.preheader.loopexit ]
  %62 = icmp slt i32 %.047.lcssa, %11
  br i1 %62, label %.lr.ph78.preheader, label %._crit_edge

.lr.ph78.preheader:                               ; preds = %.preheader
  %63 = sext i32 %.047.lcssa to i64
  %64 = sext i32 %.151.lcssa to i64
  br label %.lr.ph78

.lr.ph74:                                         ; preds = %.lr.ph74.preheader, %.lr.ph74
  %indvars.iv91 = phi i64 [ %40, %.lr.ph74.preheader ], [ %indvars.iv.next92, %.lr.ph74 ]
  %indvars.iv89 = phi i64 [ %39, %.lr.ph74.preheader ], [ %indvars.iv.next90, %.lr.ph74 ]
  %indvars.iv.next90 = add nsw i64 %indvars.iv89, 1
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv89) #3
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %indvars.iv.next92 = add nsw i64 %indvars.iv91, 1
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv91) #3
  store i32 %66, ptr %67, align 4, !tbaa !5
  %lftr.wideiv = trunc i64 %indvars.iv.next90 to i32
  %exitcond96.not = icmp eq i32 %42, %lftr.wideiv
  br i1 %exitcond96.not, label %.preheader.loopexit, label %.lr.ph74, !llvm.loop !13

.lr.ph78:                                         ; preds = %.lr.ph78.preheader, %.lr.ph78
  %indvars.iv99 = phi i64 [ %64, %.lr.ph78.preheader ], [ %indvars.iv.next100, %.lr.ph78 ]
  %indvars.iv97 = phi i64 [ %63, %.lr.ph78.preheader ], [ %indvars.iv.next98, %.lr.ph78 ]
  %indvars.iv.next98 = add nsw i64 %indvars.iv97, 1
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv97) #3
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %indvars.iv.next100 = add nsw i64 %indvars.iv99, 1
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv99) #3
  store i32 %69, ptr %70, align 4, !tbaa !5
  %71 = icmp slt i64 %indvars.iv.next98, %14
  br i1 %71, label %.lr.ph78, label %._crit_edge, !llvm.loop !14

._crit_edge:                                      ; preds = %.lr.ph78, %.preheader
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %7) #3
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #3
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
  ret void

72:                                               ; preds = %28, %26
  %.pn = phi { ptr, i32 } [ %29, %28 ], [ %27, %26 ]
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIiEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2EmRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #0 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIiED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass