; LLVM IR from intel/qpl :: tools/ref (ref_store)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @ref_set_bit_by_index(i32 noundef %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  store i32 %0, ptr %4, align 4, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !9
  store i32 %2, ptr %6, align 4, !tbaa !5
  %11 = load i32, ptr %6, align 4, !tbaa !5
  switch i32 %11, label %33 [
    i32 256, label %12
  ]

12:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = lshr i32 %13, 3
  store i32 %14, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #2
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = and i32 %15, 7
  %17 = ashr i32 128, %16
  %18 = trunc i32 %17 to i8
  store i8 %18, ptr %8, align 1, !tbaa !11
  %19 = load ptr, ptr %5, align 8, !tbaa !9
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = zext i32 %20 to i64
  %22 = getelementptr inbounds i8, ptr %19, i64 %21
  %23 = load i8, ptr %22, align 1, !tbaa !11
  %24 = zext i8 %23 to i32
  %25 = load i8, ptr %8, align 1, !tbaa !11
  %26 = zext i8 %25 to i32
  %27 = or i32 %24, %26
  %28 = trunc i32 %27 to i8
  %29 = load ptr, ptr %5, align 8, !tbaa !9
  %30 = load i32, ptr %7, align 4, !tbaa !5
  %31 = zext i32 %30 to i64
  %32 = getelementptr inbounds i8, ptr %29, i64 %31
  store i8 %28, ptr %32, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %54

33:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = lshr i32 %34, 3
  store i32 %35, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #2
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = and i32 %36, 7
  %38 = shl i32 1, %37
  %39 = trunc i32 %38 to i8
  store i8 %39, ptr %10, align 1, !tbaa !11
  %40 = load ptr, ptr %5, align 8, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = zext i32 %41 to i64
  %43 = getelementptr inbounds i8, ptr %40, i64 %42
  %44 = load i8, ptr %43, align 1, !tbaa !11
  %45 = zext i8 %44 to i32
  %46 = load i8, ptr %10, align 1, !tbaa !11
  %47 = zext i8 %46 to i32
  %48 = or i32 %45, %47
  %49 = trunc i32 %48 to i8
  %50 = load ptr, ptr %5, align 8, !tbaa !9
  %51 = load i32, ptr %9, align 4, !tbaa !5
  %52 = zext i32 %51 to i64
  %53 = getelementptr inbounds i8, ptr %50, i64 %52
  store i8 %49, ptr %53, align 1, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  br label %54

54:                                               ; preds = %33, %12
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local noundef i32 @ref_set_bit_by_index(i32 noundef %0, ptr nocapture noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %cond = icmp eq i32 %2, 256
  %4 = lshr i32 %0, 3
  %5 = and i32 %0, 7
  %6 = zext nneg i32 %4 to i64
  %7 = getelementptr inbounds i8, ptr %1, i64 %6
  %8 = load i8, ptr %7, align 1, !tbaa !5
  %9 = shl nuw nsw i32 1, %5
  %10 = lshr exact i32 128, %5
  %.sink = select i1 %cond, i32 %10, i32 %9
  %11 = trunc nuw i32 %.sink to i8
  %12 = or i8 %8, %11
  store i8 %12, ptr %7, align 1, !tbaa !5
  ret i32 0
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass