; LLVM IR from kimwalisch/primesieve :: src/Erat.ll (ZN10primesieve4EratC2Emm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.primesieve::Erat" = type { i64, i64, i64, i64, %"class.primesieve::Vector", i64, i64, %"class.primesieve::EratSmall", %"class.primesieve::EratBig", %"class.primesieve::EratMedium" }
%"class.primesieve::Vector" = type { ptr, ptr, ptr }
%"class.primesieve::EratSmall" = type { %"class.primesieve::Wheel", i64, i64, %"class.primesieve::Vector.0" }
%"class.primesieve::Wheel" = type { ptr, i64 }
%"class.primesieve::Vector.0" = type { ptr, ptr, ptr }
%"class.primesieve::EratBig" = type { %"class.primesieve::Wheel.1", i64, i64, i64, ptr, %"class.primesieve::Vector.2" }
%"class.primesieve::Wheel.1" = type { ptr, i64 }
%"class.primesieve::Vector.2" = type { ptr, ptr, ptr }
%"class.primesieve::EratMedium" = type { %"class.primesieve::Wheel", i64, ptr, %"class.primesieve::Vector.2", %"class.primesieve::Vector.2" }

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10primesieve4EratC2Emm(ptr noundef nonnull align 8 dereferenceable(280) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i64 %2, ptr %6, align 8, !tbaa !9
  %7 = load ptr, ptr %4, align 8
  %8 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 0
  %9 = load i64, ptr %5, align 8, !tbaa !9
  store i64 %9, ptr %8, align 8, !tbaa !11
  %10 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 1
  %11 = load i64, ptr %6, align 8, !tbaa !9
  store i64 %11, ptr %10, align 8, !tbaa !21
  %12 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 2
  store i64 -1, ptr %12, align 8, !tbaa !22
  %13 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 3
  store i64 0, ptr %13, align 8, !tbaa !23
  %14 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 4
  call void @_ZN10primesieve6VectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %14) #2
  %15 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 5
  store i64 0, ptr %15, align 8, !tbaa !24
  %16 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 6
  store i64 0, ptr %16, align 8, !tbaa !25
  %17 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 7
  call void @_ZN10primesieve9EratSmallC2Ev(ptr noundef nonnull align 8 dereferenceable(56) %17) #2
  %18 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 8
  call void @_ZN10primesieve7EratBigC2Ev(ptr noundef nonnull align 8 dereferenceable(72) %18) #2
  %19 = getelementptr inbounds %"class.primesieve::Erat", ptr %7, i32 0, i32 9
  call void @_ZN10primesieve10EratMediumC2Ev(ptr noundef nonnull align 8 dereferenceable(80) %19) #2
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve6VectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve9EratSmallC2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve7EratBigC2Ev(ptr noundef nonnull align 8 dereferenceable(72)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve10EratMediumC2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"_ZTSN10primesieve4EratE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !13, i64 32, !10, i64 56, !10, i64 64, !14, i64 72, !17, i64 128, !20, i64 200}
!13 = !{!"_ZTSN10primesieve6VectorIhSaIhEEE", !6, i64 0, !6, i64 8, !6, i64 16}
!14 = !{!"_ZTSN10primesieve9EratSmallE", !15, i64 0, !10, i64 16, !10, i64 24, !16, i64 32}
!15 = !{!"_ZTSN10primesieve5WheelILi30ELi8ELi6EXadsoKNS_9WheelInitEL_ZNS_11wheel30InitEEEEEE", !10, i64 8}
!16 = !{!"_ZTSN10primesieve6VectorINS_12SievingPrimeESaIS1_EEE", !6, i64 0, !6, i64 8, !6, i64 16}
!17 = !{!"_ZTSN10primesieve7EratBigE", !18, i64 0, !10, i64 16, !10, i64 24, !10, i64 32, !6, i64 40, !19, i64 48}
!18 = !{!"_ZTSN10primesieve5WheelILi210ELi48ELi10EXadsoKNS_9WheelInitEL_ZNS_12wheel210InitEEEEEE", !10, i64 8}
!19 = !{!"_ZTSN10primesieve6VectorIPNS_12SievingPrimeESaIS2_EEE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSN10primesieve10EratMediumE", !15, i64 0, !10, i64 16, !6, i64 24, !19, i64 32, !19, i64 56}
!21 = !{!12, !10, i64 8}
!22 = !{!12, !10, i64 16}
!23 = !{!12, !10, i64 24}
!24 = !{!12, !10, i64 56}
!25 = !{!12, !10, i64 64}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN10primesieve4EratC2Emm(ptr noundef nonnull align 8 dereferenceable(280) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #0 align 2 {
  store i64 %1, ptr %0, align 8, !tbaa !5
  %4 = getelementptr inbounds i8, ptr %0, i64 8
  store i64 %2, ptr %4, align 8, !tbaa !19
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  store i64 -1, ptr %5, align 8, !tbaa !20
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  store i64 0, ptr %6, align 8, !tbaa !21
  %7 = getelementptr inbounds i8, ptr %0, i64 32
  tail call void @_ZN10primesieve6VectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  %8 = getelementptr inbounds i8, ptr %0, i64 56
  %9 = getelementptr inbounds i8, ptr %0, i64 72
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %8, i8 0, i64 16, i1 false)
  tail call void @_ZN10primesieve9EratSmallC2Ev(ptr noundef nonnull align 8 dereferenceable(56) %9) #3
  %10 = getelementptr inbounds i8, ptr %0, i64 128
  tail call void @_ZN10primesieve7EratBigC2Ev(ptr noundef nonnull align 8 dereferenceable(72) %10) #3
  %11 = getelementptr inbounds i8, ptr %0, i64 200
  tail call void @_ZN10primesieve10EratMediumC2Ev(ptr noundef nonnull align 8 dereferenceable(80) %11) #3
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve6VectorIhSaIhEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve9EratSmallC2Ev(ptr noundef nonnull align 8 dereferenceable(56)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve7EratBigC2Ev(ptr noundef nonnull align 8 dereferenceable(72)) unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve10EratMediumC2Ev(ptr noundef nonnull align 8 dereferenceable(80)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN10primesieve4EratE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32, !7, i64 56, !7, i64 64, !12, i64 72, !15, i64 128, !18, i64 200}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSN10primesieve6VectorIhSaIhEEE", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"_ZTSN10primesieve9EratSmallE", !13, i64 0, !7, i64 16, !7, i64 24, !14, i64 32}
!13 = !{!"_ZTSN10primesieve5WheelILi30ELi8ELi6EXadsoKNS_9WheelInitEL_ZNS_11wheel30InitEEEEEE", !7, i64 8}
!14 = !{!"_ZTSN10primesieve6VectorINS_12SievingPrimeESaIS1_EEE", !11, i64 0, !11, i64 8, !11, i64 16}
!15 = !{!"_ZTSN10primesieve7EratBigE", !16, i64 0, !7, i64 16, !7, i64 24, !7, i64 32, !11, i64 40, !17, i64 48}
!16 = !{!"_ZTSN10primesieve5WheelILi210ELi48ELi10EXadsoKNS_9WheelInitEL_ZNS_12wheel210InitEEEEEE", !7, i64 8}
!17 = !{!"_ZTSN10primesieve6VectorIPNS_12SievingPrimeESaIS2_EEE", !11, i64 0, !11, i64 8, !11, i64 16}
!18 = !{!"_ZTSN10primesieve10EratMediumE", !13, i64 0, !7, i64 16, !11, i64 24, !17, i64 32, !17, i64 56}
!19 = !{!6, !7, i64 8}
!20 = !{!6, !7, i64 16}
!21 = !{!6, !7, i64 24}


; Effective O3 passes: EarlyCSEPass,InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass