; LLVM IR from AdarshGaur/Competitive-Programming :: Codeforces/Educational Codeforces Round 78 (Rated for Div. 2)/B. A and B.ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solvev() #0 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  %3 = alloca i64, align 8
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  %6 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %7 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) %6, ptr noundef nonnull align 8 dereferenceable(8) %3)
  %8 = load i64, ptr %2, align 8, !tbaa !5
  %9 = load i64, ptr %3, align 8, !tbaa !5
  %10 = icmp eq i64 %8, %9
  br i1 %10, label %11, label %12

11:                                               ; preds = %0
  store i64 0, ptr %1, align 8
  store i32 1, ptr %4, align 4
  br label %52

12:                                               ; preds = %0
  %13 = load i64, ptr %2, align 8, !tbaa !5
  %14 = load i64, ptr %3, align 8, !tbaa !5
  %15 = icmp sgt i64 %13, %14
  br i1 %15, label %16, label %17

16:                                               ; preds = %12
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %2, ptr noundef nonnull align 8 dereferenceable(8) %3) #3
  br label %17

17:                                               ; preds = %16, %12
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  store i64 1, ptr %5, align 8, !tbaa !5
  br label %18

18:                                               ; preds = %22, %17
  %19 = load i64, ptr %2, align 8, !tbaa !5
  %20 = load i64, ptr %3, align 8, !tbaa !5
  %21 = icmp slt i64 %19, %20
  br i1 %21, label %22, label %27

22:                                               ; preds = %18
  %23 = load i64, ptr %5, align 8, !tbaa !5
  %24 = add nsw i64 %23, 1
  store i64 %24, ptr %5, align 8, !tbaa !5
  %25 = load i64, ptr %2, align 8, !tbaa !5
  %26 = add nsw i64 %25, %23
  store i64 %26, ptr %2, align 8, !tbaa !5
  br label %18, !llvm.loop !9

27:                                               ; preds = %18
  %28 = load i64, ptr %3, align 8, !tbaa !5
  %29 = load i64, ptr %2, align 8, !tbaa !5
  %30 = sub nsw i64 %28, %29
  %31 = srem i64 %30, 2
  %32 = icmp eq i64 %31, 0
  br i1 %32, label %33, label %36

33:                                               ; preds = %27
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = sub nsw i64 %34, 1
  store i64 %35, ptr %1, align 8
  store i32 1, ptr %4, align 4
  br label %51

36:                                               ; preds = %27
  %37 = load i64, ptr %5, align 8, !tbaa !5
  %38 = add nsw i64 %37, 1
  store i64 %38, ptr %5, align 8, !tbaa !5
  %39 = load i64, ptr %2, align 8, !tbaa !5
  %40 = add nsw i64 %39, %37
  store i64 %40, ptr %2, align 8, !tbaa !5
  %41 = load i64, ptr %3, align 8, !tbaa !5
  %42 = load i64, ptr %2, align 8, !tbaa !5
  %43 = sub nsw i64 %41, %42
  %44 = srem i64 %43, 2
  %45 = icmp eq i64 %44, 0
  br i1 %45, label %46, label %49

46:                                               ; preds = %36
  %47 = load i64, ptr %5, align 8, !tbaa !5
  %48 = sub nsw i64 %47, 1
  store i64 %48, ptr %1, align 8
  store i32 1, ptr %4, align 4
  br label %51

49:                                               ; preds = %36
  %50 = load i64, ptr %5, align 8, !tbaa !5
  store i64 %50, ptr %1, align 8
  store i32 1, ptr %4, align 4
  br label %51

51:                                               ; preds = %49, %46, %33
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  br label %52

52:                                               ; preds = %51, %11
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #3
  %53 = load i64, ptr %1, align 8
  ret i64 %53
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress uwtable
define dso_local noundef i64 @_Z5solvev() local_unnamed_addr #0 {
  %1 = alloca i64, align 8
  %2 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
  %3 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %4 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16) %3, ptr noundef nonnull align 8 dereferenceable(8) %2)
  %5 = load i64, ptr %1, align 8, !tbaa !5
  %6 = load i64, ptr %2, align 8, !tbaa !5
  %7 = icmp eq i64 %5, %6
  br i1 %7, label %27, label %8

8:                                                ; preds = %0
  %9 = icmp sgt i64 %5, %6
  br i1 %9, label %10, label %11

10:                                               ; preds = %8
  call void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 8 dereferenceable(8) %2) #3
  %.pre = load i64, ptr %2, align 8, !tbaa !5
  %.promoted.pre = load i64, ptr %1, align 8, !tbaa !5
  br label %11

11:                                               ; preds = %10, %8
  %.promoted = phi i64 [ %.promoted.pre, %10 ], [ %5, %8 ]
  %12 = phi i64 [ %.pre, %10 ], [ %6, %8 ]
  %13 = icmp slt i64 %.promoted, %12
  br i1 %13, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %11, %.lr.ph
  %.013 = phi i64 [ %15, %.lr.ph ], [ 1, %11 ]
  %14 = phi i64 [ %16, %.lr.ph ], [ %.promoted, %11 ]
  %15 = add nuw nsw i64 %.013, 1
  %16 = add nsw i64 %14, %.013
  %17 = icmp slt i64 %16, %12
  br i1 %17, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.lr.ph, %11
  %.0.lcssa = phi i64 [ 1, %11 ], [ %15, %.lr.ph ]
  %.lcssa12 = phi i64 [ %.promoted, %11 ], [ %16, %.lr.ph ]
  %18 = sub nsw i64 %12, %.lcssa12
  %19 = and i64 %18, 1
  %20 = icmp eq i64 %19, 0
  br i1 %20, label %21, label %23

21:                                               ; preds = %._crit_edge
  %22 = add nsw i64 %.0.lcssa, -1
  br label %27

23:                                               ; preds = %._crit_edge
  %24 = add nsw i64 %.lcssa12, %.0.lcssa
  %25 = sub nsw i64 %12, %24
  %26 = and i64 %25, 1
  %spec.select = add nuw i64 %26, %.0.lcssa
  br label %27

27:                                               ; preds = %23, %21, %0
  %.1 = phi i64 [ 0, %0 ], [ %22, %21 ], [ %spec.select, %23 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
  ret i64 %.1
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERl(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIlENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass