; LLVM IR from Nonoum/ECL :: ECL_common (ECL_JH_Read_E4E5)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @ECL_JH_Read(ptr noundef, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @ECL_JH_Read_E4E5(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  %7 = call zeroext i8 @ECL_JH_Read(ptr noundef %6, i8 noundef zeroext 5)
  store i8 %7, ptr %4, align 1, !tbaa !9
  %8 = load i8, ptr %4, align 1, !tbaa !9
  %9 = zext i8 %8 to i32
  %10 = and i32 %9, 15
  store i32 %10, ptr %3, align 4, !tbaa !10
  %11 = load i8, ptr %4, align 1, !tbaa !9
  %12 = zext i8 %11 to i32
  %13 = and i32 %12, 16
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %42

15:                                               ; preds = %1
  store i8 4, ptr %5, align 1, !tbaa !9
  br label %16

16:                                               ; preds = %37, %15
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = call zeroext i8 @ECL_JH_Read(ptr noundef %17, i8 noundef zeroext 6)
  store i8 %18, ptr %4, align 1, !tbaa !9
  %19 = load i8, ptr %4, align 1, !tbaa !9
  %20 = zext i8 %19 to i32
  %21 = and i32 %20, 31
  %22 = load i8, ptr %5, align 1, !tbaa !9
  %23 = zext i8 %22 to i32
  %24 = shl i32 %21, %23
  %25 = load i32, ptr %3, align 4, !tbaa !10
  %26 = or i32 %25, %24
  store i32 %26, ptr %3, align 4, !tbaa !10
  %27 = load i8, ptr %4, align 1, !tbaa !9
  %28 = zext i8 %27 to i32
  %29 = and i32 %28, 32
  %30 = icmp ne i32 %29, 0
  br i1 %30, label %32, label %31

31:                                               ; preds = %16
  br label %41

32:                                               ; preds = %16
  %33 = load i8, ptr %5, align 1, !tbaa !9
  %34 = zext i8 %33 to i32
  %35 = add nsw i32 %34, 5
  %36 = trunc i32 %35 to i8
  store i8 %36, ptr %5, align 1, !tbaa !9
  br label %37

37:                                               ; preds = %32
  %38 = load i8, ptr %5, align 1, !tbaa !9
  %39 = zext i8 %38 to i32
  %40 = icmp slt i32 %39, 32
  br i1 %40, label %16, label %41, !llvm.loop !12

41:                                               ; preds = %37, %31
  br label %42

42:                                               ; preds = %41, %1
  %43 = load i32, ptr %3, align 4, !tbaa !10
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %43
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @ECL_JH_Read(ptr noundef, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @ECL_JH_Read_E4E5(ptr noundef %0) local_unnamed_addr #0 {
  %2 = tail call zeroext i8 @ECL_JH_Read(ptr noundef %0, i8 noundef zeroext 5)
  %3 = zext i8 %2 to i32
  %4 = and i32 %3, 15
  %5 = and i32 %3, 16
  %.not = icmp eq i32 %5, 0
  br i1 %.not, label %.loopexit, label %.preheader.preheader

.preheader.preheader:                             ; preds = %1
  %6 = tail call zeroext i8 @ECL_JH_Read(ptr noundef %0, i8 noundef zeroext 6)
  %7 = zext i8 %6 to i32
  %8 = shl nuw nsw i32 %7, 4
  %9 = and i32 %8, 496
  %10 = or disjoint i32 %9, %4
  %11 = and i32 %7, 32
  %.not11 = icmp eq i32 %11, 0
  br i1 %.not11, label %.loopexit, label %.preheader.1

.preheader.1:                                     ; preds = %.preheader.preheader
  %12 = tail call zeroext i8 @ECL_JH_Read(ptr noundef %0, i8 noundef zeroext 6)
  %13 = zext i8 %12 to i32
  %14 = shl nuw nsw i32 %13, 9
  %15 = and i32 %14, 15872
  %16 = or disjoint i32 %15, %10
  %17 = and i32 %13, 32
  %.not11.1 = icmp eq i32 %17, 0
  br i1 %.not11.1, label %.loopexit, label %.preheader.2

.preheader.2:                                     ; preds = %.preheader.1
  %18 = tail call zeroext i8 @ECL_JH_Read(ptr noundef %0, i8 noundef zeroext 6)
  %19 = zext i8 %18 to i32
  %20 = shl nuw nsw i32 %19, 14
  %21 = and i32 %20, 507904
  %22 = or disjoint i32 %21, %16
  %23 = and i32 %19, 32
  %.not11.2 = icmp eq i32 %23, 0
  br i1 %.not11.2, label %.loopexit, label %.preheader.3

.preheader.3:                                     ; preds = %.preheader.2
  %24 = tail call zeroext i8 @ECL_JH_Read(ptr noundef %0, i8 noundef zeroext 6)
  %25 = zext i8 %24 to i32
  %26 = shl nuw nsw i32 %25, 19
  %27 = and i32 %26, 16252928
  %28 = or disjoint i32 %27, %22
  %29 = and i32 %25, 32
  %.not11.3 = icmp eq i32 %29, 0
  br i1 %.not11.3, label %.loopexit, label %.preheader.4

.preheader.4:                                     ; preds = %.preheader.3
  %30 = tail call zeroext i8 @ECL_JH_Read(ptr noundef %0, i8 noundef zeroext 6)
  %31 = zext i8 %30 to i32
  %32 = shl nuw i32 %31, 24
  %33 = and i32 %32, 520093696
  %34 = or disjoint i32 %33, %28
  %35 = and i32 %31, 32
  %.not11.4 = icmp eq i32 %35, 0
  br i1 %.not11.4, label %.loopexit, label %.preheader.5

.preheader.5:                                     ; preds = %.preheader.4
  %36 = tail call zeroext i8 @ECL_JH_Read(ptr noundef %0, i8 noundef zeroext 6)
  %37 = zext i8 %36 to i32
  %38 = shl i32 %37, 29
  %39 = or i32 %38, %34
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader.5, %.preheader.preheader, %.preheader.1, %.preheader.2, %.preheader.3, %.preheader.4, %1
  %.1 = phi i32 [ %4, %1 ], [ %10, %.preheader.preheader ], [ %16, %.preheader.1 ], [ %22, %.preheader.2 ], [ %28, %.preheader.3 ], [ %34, %.preheader.4 ], [ %39, %.preheader.5 ]
  ret i32 %.1
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: ADCEPass,BDCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopSimplifyPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass