; LLVM IR from glaretechnologies/substrata :: opus/opus-1.3.1/src (mapping_matrix)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.MappingMatrix = type { i32, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local ptr @mapping_matrix_get_data(ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @mapping_matrix_multiply_channel_in_float(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #1 {
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca float, align 4
  store ptr %0, ptr %8, align 8, !tbaa !5
  store ptr %1, ptr %9, align 8, !tbaa !5
  store i32 %2, ptr %10, align 4, !tbaa !9
  store ptr %3, ptr %11, align 8, !tbaa !5
  store i32 %4, ptr %12, align 4, !tbaa !9
  store i32 %5, ptr %13, align 4, !tbaa !9
  store i32 %6, ptr %14, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = call ptr @mapping_matrix_get_data(ptr noundef %19)
  store ptr %20, ptr %15, align 8, !tbaa !5
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %21

21:                                               ; preds = %67, %7
  %22 = load i32, ptr %16, align 4, !tbaa !9
  %23 = load i32, ptr %14, align 4, !tbaa !9
  %24 = icmp slt i32 %22, %23
  br i1 %24, label %25, label %70

25:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  store float 0.000000e+00, ptr %18, align 4, !tbaa !11
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %55, %25
  %27 = load i32, ptr %17, align 4, !tbaa !9
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %30, label %58

30:                                               ; preds = %26
  %31 = load ptr, ptr %15, align 8, !tbaa !5
  %32 = load ptr, ptr %8, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.MappingMatrix, ptr %32, i32 0, i32 0
  %34 = load i32, ptr %33, align 4, !tbaa !13
  %35 = load i32, ptr %17, align 4, !tbaa !9
  %36 = mul nsw i32 %34, %35
  %37 = load i32, ptr %12, align 4, !tbaa !9
  %38 = add nsw i32 %36, %37
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds i16, ptr %31, i64 %39
  %41 = load i16, ptr %40, align 2, !tbaa !15
  %42 = sext i16 %41 to i32
  %43 = sitofp i32 %42 to float
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = load i32, ptr %10, align 4, !tbaa !9
  %46 = load i32, ptr %16, align 4, !tbaa !9
  %47 = mul nsw i32 %45, %46
  %48 = load i32, ptr %17, align 4, !tbaa !9
  %49 = add nsw i32 %47, %48
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds float, ptr %44, i64 %50
  %52 = load float, ptr %51, align 4, !tbaa !11
  %53 = load float, ptr %18, align 4, !tbaa !11
  %54 = call float @llvm.fmuladd.f32(float %43, float %52, float %53)
  store float %54, ptr %18, align 4, !tbaa !11
  br label %55

55:                                               ; preds = %30
  %56 = load i32, ptr %17, align 4, !tbaa !9
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %17, align 4, !tbaa !9
  br label %26, !llvm.loop !17

58:                                               ; preds = %26
  %59 = load float, ptr %18, align 4, !tbaa !11
  %60 = fmul float 0x3F00000000000000, %59
  %61 = load ptr, ptr %11, align 8, !tbaa !5
  %62 = load i32, ptr %13, align 4, !tbaa !9
  %63 = load i32, ptr %16, align 4, !tbaa !9
  %64 = mul nsw i32 %62, %63
  %65 = sext i32 %64 to i64
  %66 = getelementptr inbounds float, ptr %61, i64 %65
  store float %60, ptr %66, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  br label %67

67:                                               ; preds = %58
  %68 = load i32, ptr %16, align 4, !tbaa !9
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %16, align 4, !tbaa !9
  br label %21, !llvm.loop !19

70:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"MappingMatrix", !10, i64 0, !10, i64 4, !10, i64 8}
!15 = !{!16, !16, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local ptr @mapping_matrix_get_data(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @mapping_matrix_multiply_channel_in_float(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef writeonly %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #0 {
  %8 = tail call ptr @mapping_matrix_get_data(ptr noundef %0)
  %9 = icmp sgt i32 %6, 0
  br i1 %9, label %.preheader.lr.ph, label %._crit_edge25

.preheader.lr.ph:                                 ; preds = %7
  %10 = icmp sgt i32 %2, 0
  br i1 %10, label %.preheader.lr.ph.split.us, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.preheader.lr.ph
  %11 = sext i32 %5 to i64
  %wide.trip.count = zext nneg i32 %6 to i64
  %min.iters.check = icmp ugt i32 %6, 7
  %ident.check.not = icmp eq i32 %5, 1
  %or.cond = and i1 %min.iters.check, %ident.check.not
  br i1 %or.cond, label %vector.ph, label %.preheader.preheader42

.preheader.preheader42:                           ; preds = %middle.block, %.preheader.preheader
  %indvars.iv.ph = phi i64 [ 0, %.preheader.preheader ], [ %n.vec, %middle.block ]
  %xtraiter = and i64 %wide.trip.count, 3
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.preheader.prol.loopexit, label %.preheader.prol

.preheader.prol:                                  ; preds = %.preheader.preheader42, %.preheader.prol
  %indvars.iv.prol = phi i64 [ %indvars.iv.next.prol, %.preheader.prol ], [ %indvars.iv.ph, %.preheader.preheader42 ]
  %prol.iter = phi i64 [ %prol.iter.next, %.preheader.prol ], [ 0, %.preheader.preheader42 ]
  %12 = mul nsw i64 %indvars.iv.prol, %11
  %13 = getelementptr inbounds float, ptr %3, i64 %12
  store float 0.000000e+00, ptr %13, align 4, !tbaa !5
  %indvars.iv.next.prol = add nuw nsw i64 %indvars.iv.prol, 1
  %prol.iter.next = add i64 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i64 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.preheader.prol.loopexit, label %.preheader.prol, !llvm.loop !9

.preheader.prol.loopexit:                         ; preds = %.preheader.prol, %.preheader.preheader42
  %indvars.iv.unr = phi i64 [ %indvars.iv.ph, %.preheader.preheader42 ], [ %indvars.iv.next.prol, %.preheader.prol ]
  %14 = sub nsw i64 %indvars.iv.ph, %wide.trip.count
  %15 = icmp ugt i64 %14, -4
  br i1 %15, label %._crit_edge25, label %.preheader

vector.ph:                                        ; preds = %.preheader.preheader
  %n.vec = and i64 %wide.trip.count, 2147483640
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %16 = getelementptr inbounds float, ptr %3, i64 %index
  %17 = getelementptr inbounds i8, ptr %16, i64 16
  store <4 x float> zeroinitializer, ptr %16, align 4, !tbaa !5
  store <4 x float> zeroinitializer, ptr %17, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %18 = icmp eq i64 %index.next, %n.vec
  br i1 %18, label %middle.block, label %vector.body, !llvm.loop !11

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge25, label %.preheader.preheader42

.preheader.lr.ph.split.us:                        ; preds = %.preheader.lr.ph
  %19 = load i32, ptr %0, align 4, !tbaa !15
  %20 = sext i32 %19 to i64
  %21 = sext i32 %4 to i64
  %22 = sext i32 %5 to i64
  %23 = zext nneg i32 %2 to i64
  %wide.trip.count36 = zext nneg i32 %6 to i64
  %wide.trip.count31 = zext nneg i32 %2 to i64
  %invariant.gep = getelementptr i16, ptr %8, i64 %21
  %xtraiter44 = and i64 %wide.trip.count31, 1
  %24 = icmp eq i32 %2, 1
  %unroll_iter = and i64 %wide.trip.count31, 2147483646
  %lcmp.mod45.not = icmp eq i64 %xtraiter44, 0
  br label %.preheader.us

.preheader.us:                                    ; preds = %._crit_edge.us, %.preheader.lr.ph.split.us
  %indvars.iv33 = phi i64 [ %indvars.iv.next34, %._crit_edge.us ], [ 0, %.preheader.lr.ph.split.us ]
  %25 = mul nuw nsw i64 %indvars.iv33, %23
  %invariant.gep39 = getelementptr inbounds float, ptr %1, i64 %25
  br i1 %24, label %._crit_edge.us.unr-lcssa, label %.preheader.us.new

.preheader.us.new:                                ; preds = %.preheader.us, %.preheader.us.new
  %indvars.iv28 = phi i64 [ %indvars.iv.next29.1, %.preheader.us.new ], [ 0, %.preheader.us ]
  %.023.us = phi float [ %35, %.preheader.us.new ], [ 0.000000e+00, %.preheader.us ]
  %niter = phi i64 [ %niter.next.1, %.preheader.us.new ], [ 0, %.preheader.us ]
  %26 = mul nsw i64 %indvars.iv28, %20
  %gep = getelementptr i16, ptr %invariant.gep, i64 %26
  %27 = load i16, ptr %gep, align 2, !tbaa !18
  %28 = sitofp i16 %27 to float
  %gep40 = getelementptr inbounds float, ptr %invariant.gep39, i64 %indvars.iv28
  %29 = load float, ptr %gep40, align 4, !tbaa !5
  %30 = tail call float @llvm.fmuladd.f32(float %28, float %29, float %.023.us)
  %indvars.iv.next29 = or disjoint i64 %indvars.iv28, 1
  %31 = mul nsw i64 %indvars.iv.next29, %20
  %gep.1 = getelementptr i16, ptr %invariant.gep, i64 %31
  %32 = load i16, ptr %gep.1, align 2, !tbaa !18
  %33 = sitofp i16 %32 to float
  %gep40.1 = getelementptr inbounds float, ptr %invariant.gep39, i64 %indvars.iv.next29
  %34 = load float, ptr %gep40.1, align 4, !tbaa !5
  %35 = tail call float @llvm.fmuladd.f32(float %33, float %34, float %30)
  %indvars.iv.next29.1 = add nuw nsw i64 %indvars.iv28, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.us.unr-lcssa, label %.preheader.us.new, !llvm.loop !20

._crit_edge.us.unr-lcssa:                         ; preds = %.preheader.us.new, %.preheader.us
  %.lcssa.ph = phi float [ poison, %.preheader.us ], [ %35, %.preheader.us.new ]
  %indvars.iv28.unr = phi i64 [ 0, %.preheader.us ], [ %indvars.iv.next29.1, %.preheader.us.new ]
  %.023.us.unr = phi float [ 0.000000e+00, %.preheader.us ], [ %35, %.preheader.us.new ]
  br i1 %lcmp.mod45.not, label %._crit_edge.us, label %._crit_edge.us.epilog-lcssa

._crit_edge.us.epilog-lcssa:                      ; preds = %._crit_edge.us.unr-lcssa
  %36 = mul nsw i64 %indvars.iv28.unr, %20
  %gep.epil = getelementptr i16, ptr %invariant.gep, i64 %36
  %37 = load i16, ptr %gep.epil, align 2, !tbaa !18
  %38 = sitofp i16 %37 to float
  %gep40.epil = getelementptr inbounds float, ptr %invariant.gep39, i64 %indvars.iv28.unr
  %39 = load float, ptr %gep40.epil, align 4, !tbaa !5
  %40 = tail call float @llvm.fmuladd.f32(float %38, float %39, float %.023.us.unr)
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %._crit_edge.us.unr-lcssa, %._crit_edge.us.epilog-lcssa
  %.lcssa = phi float [ %.lcssa.ph, %._crit_edge.us.unr-lcssa ], [ %40, %._crit_edge.us.epilog-lcssa ]
  %41 = fmul float %.lcssa, 0x3F00000000000000
  %42 = mul nsw i64 %indvars.iv33, %22
  %43 = getelementptr inbounds float, ptr %3, i64 %42
  store float %41, ptr %43, align 4, !tbaa !5
  %indvars.iv.next34 = add nuw nsw i64 %indvars.iv33, 1
  %exitcond37.not = icmp eq i64 %indvars.iv.next34, %wide.trip.count36
  br i1 %exitcond37.not, label %._crit_edge25, label %.preheader.us, !llvm.loop !21

.preheader:                                       ; preds = %.preheader.prol.loopexit, %.preheader
  %indvars.iv = phi i64 [ %indvars.iv.next.3, %.preheader ], [ %indvars.iv.unr, %.preheader.prol.loopexit ]
  %44 = mul nsw i64 %indvars.iv, %11
  %45 = getelementptr inbounds float, ptr %3, i64 %44
  store float 0.000000e+00, ptr %45, align 4, !tbaa !5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %46 = mul nsw i64 %indvars.iv.next, %11
  %47 = getelementptr inbounds float, ptr %3, i64 %46
  store float 0.000000e+00, ptr %47, align 4, !tbaa !5
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %48 = mul nsw i64 %indvars.iv.next.1, %11
  %49 = getelementptr inbounds float, ptr %3, i64 %48
  store float 0.000000e+00, ptr %49, align 4, !tbaa !5
  %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
  %50 = mul nsw i64 %indvars.iv.next.2, %11
  %51 = getelementptr inbounds float, ptr %3, i64 %50
  store float 0.000000e+00, ptr %51, align 4, !tbaa !5
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %exitcond.not.3 = icmp eq i64 %indvars.iv.next.3, %wide.trip.count
  br i1 %exitcond.not.3, label %._crit_edge25, label %.preheader, !llvm.loop !22

._crit_edge25:                                    ; preds = %.preheader.prol.loopexit, %.preheader, %._crit_edge.us, %middle.block, %7
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.unroll.disable"}
!11 = distinct !{!11, !12, !13, !14}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!"llvm.loop.isvectorized", i32 1}
!14 = !{!"llvm.loop.unroll.runtime.disable"}
!15 = !{!16, !17, i64 0}
!16 = !{!"MappingMatrix", !17, i64 0, !17, i64 4, !17, i64 8}
!17 = !{!"int", !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"short", !7, i64 0}
!20 = distinct !{!20, !12}
!21 = distinct !{!21, !12}
!22 = distinct !{!22, !12, !13}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass