; LLVM IR from codemistic/Data-Structures-and-Algorithms :: CPP/Segment Tree/Maximum element query.ll (Z13build_segtreeRSt6vectorIxSaIxEExxxS2_x)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z13build_segtreeRSt6vectorIxSaIxEExxxS2_x(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5) #0 {
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i64 %1, ptr %8, align 8, !tbaa !9
  store i64 %2, ptr %9, align 8, !tbaa !9
  store i64 %3, ptr %10, align 8, !tbaa !9
  store ptr %4, ptr %11, align 8, !tbaa !5
  store i64 %5, ptr %12, align 8, !tbaa !9
  %14 = load i64, ptr %9, align 8, !tbaa !9
  %15 = load i64, ptr %10, align 8, !tbaa !9
  %16 = icmp eq i64 %14, %15
  br i1 %16, label %17, label %25

17:                                               ; preds = %6
  %18 = load ptr, ptr %7, align 8, !tbaa !5
  %19 = load i64, ptr %9, align 8, !tbaa !9
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %18, i64 noundef %19) #4
  %21 = load i64, ptr %20, align 8, !tbaa !9
  %22 = load ptr, ptr %11, align 8, !tbaa !5
  %23 = load i64, ptr %8, align 8, !tbaa !9
  %24 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %22, i64 noundef %23) #4
  store i64 %21, ptr %24, align 8, !tbaa !9
  br label %63

25:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %26 = load i64, ptr %9, align 8, !tbaa !9
  %27 = load i64, ptr %10, align 8, !tbaa !9
  %28 = add nsw i64 %26, %27
  %29 = sdiv i64 %28, 2
  %30 = trunc i64 %29 to i32
  store i32 %30, ptr %13, align 4, !tbaa !11
  %31 = load ptr, ptr %7, align 8, !tbaa !5
  %32 = load i64, ptr %8, align 8, !tbaa !9
  %33 = mul nsw i64 2, %32
  %34 = load i64, ptr %9, align 8, !tbaa !9
  %35 = load i32, ptr %13, align 4, !tbaa !11
  %36 = sext i32 %35 to i64
  %37 = load ptr, ptr %11, align 8, !tbaa !5
  %38 = load i64, ptr %12, align 8, !tbaa !9
  call void @_Z13build_segtreeRSt6vectorIxSaIxEExxxS2_x(ptr noundef nonnull align 8 dereferenceable(24) %31, i64 noundef %33, i64 noundef %34, i64 noundef %36, ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %38)
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = load i64, ptr %8, align 8, !tbaa !9
  %41 = mul nsw i64 2, %40
  %42 = add nsw i64 %41, 1
  %43 = load i32, ptr %13, align 4, !tbaa !11
  %44 = add nsw i32 %43, 1
  %45 = sext i32 %44 to i64
  %46 = load i64, ptr %10, align 8, !tbaa !9
  %47 = load ptr, ptr %11, align 8, !tbaa !5
  %48 = load i64, ptr %12, align 8, !tbaa !9
  call void @_Z13build_segtreeRSt6vectorIxSaIxEExxxS2_x(ptr noundef nonnull align 8 dereferenceable(24) %39, i64 noundef %42, i64 noundef %45, i64 noundef %46, ptr noundef nonnull align 8 dereferenceable(24) %47, i64 noundef %48)
  %49 = load ptr, ptr %11, align 8, !tbaa !5
  %50 = load i64, ptr %8, align 8, !tbaa !9
  %51 = mul nsw i64 2, %50
  %52 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %51) #4
  %53 = load ptr, ptr %11, align 8, !tbaa !5
  %54 = load i64, ptr %8, align 8, !tbaa !9
  %55 = mul nsw i64 2, %54
  %56 = add nsw i64 %55, 1
  %57 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %56) #4
  %58 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %52, ptr noundef nonnull align 8 dereferenceable(8) %57)
  %59 = load i64, ptr %58, align 8, !tbaa !9
  %60 = load ptr, ptr %11, align 8, !tbaa !5
  %61 = load i64, ptr %8, align 8, !tbaa !9
  %62 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %60, i64 noundef %61) #4
  store i64 %59, ptr %62, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  br label %63

63:                                               ; preds = %25, %17
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z13build_segtreeRSt6vectorIxSaIxEExxxS2_x(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %1, i64 noundef %2, i64 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5) local_unnamed_addr #0 {
  %7 = icmp eq i64 %2, %3
  br i1 %7, label %8, label %12

8:                                                ; preds = %6
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %2) #2
  br label %common.ret

common.ret:                                       ; preds = %8, %12
  %.sink28 = phi ptr [ %9, %8 ], [ %21, %12 ]
  %10 = load i64, ptr %.sink28, align 8, !tbaa !5
  %11 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %1) #2
  store i64 %10, ptr %11, align 8, !tbaa !5
  ret void

12:                                               ; preds = %6
  %13 = add nsw i64 %3, %2
  %14 = sdiv i64 %13, 2
  %15 = shl nsw i64 %1, 1
  %sext = shl i64 %14, 32
  %16 = ashr exact i64 %sext, 32
  tail call void @_Z13build_segtreeRSt6vectorIxSaIxEExxxS2_x(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15, i64 noundef %2, i64 noundef %16, ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5)
  %17 = or disjoint i64 %15, 1
  %sext26 = add i64 %sext, 4294967296
  %18 = ashr exact i64 %sext26, 32
  tail call void @_Z13build_segtreeRSt6vectorIxSaIxEExxxS2_x(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %17, i64 noundef %18, i64 noundef %3, ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %5)
  %19 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %15) #2
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %17) #2
  %21 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %19, ptr noundef nonnull align 8 dereferenceable(8) %20)
  br label %common.ret
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIxSaIxEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3maxIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass