; LLVM IR from glaretechnologies/substrata :: opus/opus-1.3.1/silk/float (wrappers_FLP)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.silk_encoder_state = type { [2 x i32], i32, i32, %struct.silk_LP_state, %struct.silk_VAD_state, %struct.silk_nsq_state, [16 x i16], i32, i32, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, [4 x i32], i32, i32, [3 x i8], i8, [3 x i32], %struct.SideInfoIndices, [320 x i8], i32, [322 x i16], i32, i32, i32, i32, i32, i32, i32, i32, i16, %struct._silk_resampler_state_struct, i32, i32, i32, i32, i32, i32, [3 x %struct.SideInfoIndices], [3 x [320 x i8]] }
%struct.silk_LP_state = type { [2 x i32], i32, i32, i32 }
%struct.silk_VAD_state = type { [2 x i32], [2 x i32], [2 x i32], [4 x i32], [4 x i32], i16, [4 x i32], [4 x i32], [4 x i32], i32 }
%struct.silk_nsq_state = type { [640 x i16], [640 x i32], [96 x i32], [24 x i32], i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SideInfoIndices = type { [4 x i8], [4 x i8], [17 x i8], i16, i8, i8, i8, i8, i8, i8, i8 }
%struct._silk_resampler_state_struct = type { [6 x i32], %union.anon, [48 x i16], i32, i32, i32, i32, i32, i32, i32, i32, ptr }
%union.anon = type { [36 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @silk_process_NLSFs_FLP(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca [2 x [16 x i16]], align 16
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 64, ptr %11) #3
  %12 = load ptr, ptr %5, align 8, !tbaa !5
  %13 = getelementptr inbounds [2 x [16 x i16]], ptr %11, i64 0, i64 0
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = load ptr, ptr %8, align 8, !tbaa !5
  call void @silk_process_NLSFs(ptr noundef %12, ptr noundef %13, ptr noundef %14, ptr noundef %15)
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %47, %4
  %17 = load i32, ptr %10, align 4, !tbaa !9
  %18 = icmp slt i32 %17, 2
  br i1 %18, label %19, label %50

19:                                               ; preds = %16
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %43, %19
  %21 = load i32, ptr %9, align 4, !tbaa !9
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.silk_encoder_state, ptr %22, i32 0, i32 35
  %24 = load i32, ptr %23, align 8, !tbaa !11
  %25 = icmp slt i32 %21, %24
  br i1 %25, label %26, label %46

26:                                               ; preds = %20
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [2 x [16 x i16]], ptr %11, i64 0, i64 %28
  %30 = load i32, ptr %9, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [16 x i16], ptr %29, i64 0, i64 %31
  %33 = load i16, ptr %32, align 2, !tbaa !19
  %34 = sitofp i16 %33 to float
  %35 = fmul float %34, 0x3F30000000000000
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [16 x float], ptr %36, i64 %38
  %40 = load i32, ptr %9, align 4, !tbaa !9
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [16 x float], ptr %39, i64 0, i64 %41
  store float %35, ptr %42, align 4, !tbaa !20
  br label %43

43:                                               ; preds = %26
  %44 = load i32, ptr %9, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %9, align 4, !tbaa !9
  br label %20, !llvm.loop !22

46:                                               ; preds = %20
  br label %47

47:                                               ; preds = %46
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = add nsw i32 %48, 1
  store i32 %49, ptr %10, align 4, !tbaa !9
  br label %16, !llvm.loop !24

50:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 64, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  ret void
}

declare void @silk_process_NLSFs(ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 4640}
!12 = !{!"", !7, i64 0, !10, i64 8, !10, i64 12, !13, i64 16, !14, i64 36, !16, i64 148, !7, i64 4500, !10, i64 4532, !10, i64 4536, !7, i64 4540, !7, i64 4541, !10, i64 4544, !10, i64 4548, !10, i64 4552, !10, i64 4556, !10, i64 4560, !10, i64 4564, !10, i64 4568, !10, i64 4572, !10, i64 4576, !10, i64 4580, !10, i64 4584, !10, i64 4588, !10, i64 4592, !10, i64 4596, !10, i64 4600, !10, i64 4604, !10, i64 4608, !10, i64 4612, !10, i64 4616, !10, i64 4620, !10, i64 4624, !10, i64 4628, !10, i64 4632, !10, i64 4636, !10, i64 4640, !10, i64 4644, !10, i64 4648, !10, i64 4652, !10, i64 4656, !10, i64 4660, !10, i64 4664, !10, i64 4668, !10, i64 4672, !10, i64 4676, !10, i64 4680, !6, i64 4688, !6, i64 4696, !6, i64 4704, !7, i64 4712, !10, i64 4728, !10, i64 4732, !7, i64 4736, !7, i64 4739, !7, i64 4740, !17, i64 4752, !7, i64 4788, !10, i64 5108, !7, i64 5112, !10, i64 5756, !10, i64 5760, !10, i64 5764, !10, i64 5768, !10, i64 5772, !10, i64 5776, !10, i64 5780, !10, i64 5784, !15, i64 5788, !18, i64 5792, !10, i64 6096, !10, i64 6100, !10, i64 6104, !10, i64 6108, !10, i64 6112, !10, i64 6116, !7, i64 6120, !7, i64 6228}
!13 = !{!"", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!14 = !{!"", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 40, !15, i64 56, !7, i64 60, !7, i64 76, !7, i64 92, !10, i64 108}
!15 = !{!"short", !7, i64 0}
!16 = !{!"", !7, i64 0, !7, i64 1280, !7, i64 3840, !7, i64 4224, !10, i64 4320, !10, i64 4324, !10, i64 4328, !10, i64 4332, !10, i64 4336, !10, i64 4340, !10, i64 4344, !10, i64 4348}
!17 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !15, i64 26, !7, i64 28, !7, i64 29, !7, i64 30, !7, i64 31, !7, i64 32, !7, i64 33, !7, i64 34}
!18 = !{!"_silk_resampler_state_struct", !7, i64 0, !7, i64 24, !7, i64 168, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !6, i64 296}
!19 = !{!15, !15, i64 0}
!20 = !{!21, !21, i64 0}
!21 = !{!"float", !7, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
!24 = distinct !{!24, !23}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @silk_process_NLSFs_FLP(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #1 {
  %5 = alloca [2 x [16 x i16]], align 16
  call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %5) #3
  call void @silk_process_NLSFs(ptr noundef %0, ptr noundef nonnull %5, ptr noundef %2, ptr noundef %3) #3
  %6 = getelementptr inbounds i8, ptr %0, i64 4640
  %7 = load i32, ptr %6, align 8, !tbaa !5
  %8 = icmp sgt i32 %7, 0
  br i1 %8, label %.preheader.us.preheader, label %.split16.us

.preheader.us.preheader:                          ; preds = %4
  %wide.trip.count = zext nneg i32 %7 to i64
  %min.iters.check = icmp ult i32 %7, 8
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.ph

vector.ph:                                        ; preds = %.preheader.us.preheader
  %n.vec = and i64 %wide.trip.count, 2147483640
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %9 = getelementptr inbounds [2 x [16 x i16]], ptr %5, i64 0, i64 0, i64 %index
  %10 = getelementptr inbounds i8, ptr %9, i64 8
  %wide.load = load <4 x i16>, ptr %9, align 16, !tbaa !17
  %wide.load22 = load <4 x i16>, ptr %10, align 8, !tbaa !17
  %11 = sitofp <4 x i16> %wide.load to <4 x float>
  %12 = sitofp <4 x i16> %wide.load22 to <4 x float>
  %13 = fmul <4 x float> %11, <float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000>
  %14 = fmul <4 x float> %12, <float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000>
  %15 = getelementptr inbounds [16 x float], ptr %1, i64 0, i64 %index
  %16 = getelementptr inbounds i8, ptr %15, i64 16
  store <4 x float> %13, ptr %15, align 4, !tbaa !18
  store <4 x float> %14, ptr %16, align 4, !tbaa !18
  %index.next = add nuw i64 %index, 8
  %17 = icmp eq i64 %index.next, %n.vec
  br i1 %17, label %middle.block, label %vector.body, !llvm.loop !20

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge.us.preheader, label %scalar.ph.preheader

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader.us.preheader
  %indvars.iv.ph = phi i64 [ 0, %.preheader.us.preheader ], [ %n.vec, %middle.block ]
  br label %scalar.ph

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %scalar.ph ], [ %indvars.iv.ph, %scalar.ph.preheader ]
  %18 = getelementptr inbounds [2 x [16 x i16]], ptr %5, i64 0, i64 0, i64 %indvars.iv
  %19 = load i16, ptr %18, align 2, !tbaa !17
  %20 = sitofp i16 %19 to float
  %21 = fmul float %20, 0x3F30000000000000
  %22 = getelementptr inbounds [16 x float], ptr %1, i64 0, i64 %indvars.iv
  store float %21, ptr %22, align 4, !tbaa !18
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.us.preheader, label %scalar.ph, !llvm.loop !24

._crit_edge.us.preheader:                         ; preds = %scalar.ph, %middle.block
  %min.iters.check25 = icmp ult i32 %7, 8
  br i1 %min.iters.check25, label %._crit_edge.us.preheader36, label %vector.ph26

vector.ph26:                                      ; preds = %._crit_edge.us.preheader
  %n.vec28 = and i64 %wide.trip.count, 2147483640
  br label %vector.body30

vector.body30:                                    ; preds = %vector.body30, %vector.ph26
  %index31 = phi i64 [ 0, %vector.ph26 ], [ %index.next34, %vector.body30 ]
  %23 = getelementptr inbounds [2 x [16 x i16]], ptr %5, i64 0, i64 1, i64 %index31
  %24 = getelementptr inbounds i8, ptr %23, i64 8
  %wide.load32 = load <4 x i16>, ptr %23, align 16, !tbaa !17
  %wide.load33 = load <4 x i16>, ptr %24, align 8, !tbaa !17
  %25 = sitofp <4 x i16> %wide.load32 to <4 x float>
  %26 = sitofp <4 x i16> %wide.load33 to <4 x float>
  %27 = fmul <4 x float> %25, <float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000>
  %28 = fmul <4 x float> %26, <float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000, float 0x3F30000000000000>
  %29 = getelementptr inbounds [16 x float], ptr %1, i64 1, i64 %index31
  %30 = getelementptr inbounds i8, ptr %29, i64 16
  store <4 x float> %27, ptr %29, align 4, !tbaa !18
  store <4 x float> %28, ptr %30, align 4, !tbaa !18
  %index.next34 = add nuw i64 %index31, 8
  %31 = icmp eq i64 %index.next34, %n.vec28
  br i1 %31, label %middle.block23, label %vector.body30, !llvm.loop !25

middle.block23:                                   ; preds = %vector.body30
  %cmp.n35 = icmp eq i64 %n.vec28, %wide.trip.count
  br i1 %cmp.n35, label %.split16.us, label %._crit_edge.us.preheader36

._crit_edge.us.preheader36:                       ; preds = %middle.block23, %._crit_edge.us.preheader
  %indvars.iv.1.ph = phi i64 [ 0, %._crit_edge.us.preheader ], [ %n.vec28, %middle.block23 ]
  br label %._crit_edge.us

._crit_edge.us:                                   ; preds = %._crit_edge.us.preheader36, %._crit_edge.us
  %indvars.iv.1 = phi i64 [ %indvars.iv.next.1, %._crit_edge.us ], [ %indvars.iv.1.ph, %._crit_edge.us.preheader36 ]
  %32 = getelementptr inbounds [2 x [16 x i16]], ptr %5, i64 0, i64 1, i64 %indvars.iv.1
  %33 = load i16, ptr %32, align 2, !tbaa !17
  %34 = sitofp i16 %33 to float
  %35 = fmul float %34, 0x3F30000000000000
  %36 = getelementptr inbounds [16 x float], ptr %1, i64 1, i64 %indvars.iv.1
  store float %35, ptr %36, align 4, !tbaa !18
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv.1, 1
  %exitcond.1.not = icmp eq i64 %indvars.iv.next.1, %wide.trip.count
  br i1 %exitcond.1.not, label %.split16.us, label %._crit_edge.us, !llvm.loop !26

.split16.us:                                      ; preds = %._crit_edge.us, %middle.block23, %4
  call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %5) #3
  ret void
}

declare void @silk_process_NLSFs(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 4640}
!6 = !{!"", !7, i64 0, !9, i64 8, !9, i64 12, !10, i64 16, !11, i64 36, !13, i64 148, !7, i64 4500, !9, i64 4532, !9, i64 4536, !7, i64 4540, !7, i64 4541, !9, i64 4544, !9, i64 4548, !9, i64 4552, !9, i64 4556, !9, i64 4560, !9, i64 4564, !9, i64 4568, !9, i64 4572, !9, i64 4576, !9, i64 4580, !9, i64 4584, !9, i64 4588, !9, i64 4592, !9, i64 4596, !9, i64 4600, !9, i64 4604, !9, i64 4608, !9, i64 4612, !9, i64 4616, !9, i64 4620, !9, i64 4624, !9, i64 4628, !9, i64 4632, !9, i64 4636, !9, i64 4640, !9, i64 4644, !9, i64 4648, !9, i64 4652, !9, i64 4656, !9, i64 4660, !9, i64 4664, !9, i64 4668, !9, i64 4672, !9, i64 4676, !9, i64 4680, !14, i64 4688, !14, i64 4696, !14, i64 4704, !7, i64 4712, !9, i64 4728, !9, i64 4732, !7, i64 4736, !7, i64 4739, !7, i64 4740, !15, i64 4752, !7, i64 4788, !9, i64 5108, !7, i64 5112, !9, i64 5756, !9, i64 5760, !9, i64 5764, !9, i64 5768, !9, i64 5772, !9, i64 5776, !9, i64 5780, !9, i64 5784, !12, i64 5788, !16, i64 5792, !9, i64 6096, !9, i64 6100, !9, i64 6104, !9, i64 6108, !9, i64 6112, !9, i64 6116, !7, i64 6120, !7, i64 6228}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"int", !7, i64 0}
!10 = !{!"", !7, i64 0, !9, i64 8, !9, i64 12, !9, i64 16}
!11 = !{!"", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 40, !12, i64 56, !7, i64 60, !7, i64 76, !7, i64 92, !9, i64 108}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !7, i64 0, !7, i64 1280, !7, i64 3840, !7, i64 4224, !9, i64 4320, !9, i64 4324, !9, i64 4328, !9, i64 4332, !9, i64 4336, !9, i64 4340, !9, i64 4344, !9, i64 4348}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !12, i64 26, !7, i64 28, !7, i64 29, !7, i64 30, !7, i64 31, !7, i64 32, !7, i64 33, !7, i64 34}
!16 = !{!"_silk_resampler_state_struct", !7, i64 0, !7, i64 24, !7, i64 168, !9, i64 264, !9, i64 268, !9, i64 272, !9, i64 276, !9, i64 280, !9, i64 284, !9, i64 288, !9, i64 292, !14, i64 296}
!17 = !{!12, !12, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"float", !7, i64 0}
!20 = distinct !{!20, !21, !22, !23}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!"llvm.loop.isvectorized", i32 1}
!23 = !{!"llvm.loop.unroll.runtime.disable"}
!24 = distinct !{!24, !21, !23, !22}
!25 = distinct !{!25, !21, !22, !23}
!26 = distinct !{!26, !21, !23, !22}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass