; LLVM IR from Aryansh-S/USACO :: other_impl/other-algos/Sort (BubbleSort)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@v = external dso_local global %"class.std::vector", align 8
@n = external dso_local global i32, align 4
@sorted = external dso_local global i8, align 1
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 0, ptr %1, align 4
  %5 = load ptr, ptr @_ZSt3cin, align 8, !tbaa !5
  %6 = getelementptr i8, ptr %5, i64 -24
  %7 = load i64, ptr %6, align 8
  %8 = getelementptr inbounds i8, ptr @_ZSt3cin, i64 %7
  %9 = call noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264) %8, ptr noundef null)
  %10 = call noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext false)
  %11 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #6
  %12 = load i32, ptr @n, align 4, !tbaa !8
  %13 = icmp sgt i32 0, %12
  %14 = zext i1 %13 to i32
  %15 = sub nsw i32 0, %14
  store i32 %15, ptr %2, align 4, !tbaa !8
  br label %16

16:                                               ; preds = %27, %0
  %17 = load i32, ptr %2, align 4, !tbaa !8
  %18 = load i32, ptr @n, align 4, !tbaa !8
  %19 = load i32, ptr @n, align 4, !tbaa !8
  %20 = icmp sgt i32 0, %19
  %21 = zext i1 %20 to i32
  %22 = sub nsw i32 %18, %21
  %23 = icmp ne i32 %17, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #6
  br label %34

25:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  %26 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @v, ptr noundef nonnull align 4 dereferenceable(4) %3)
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  br label %27

27:                                               ; preds = %25
  %28 = load i32, ptr @n, align 4, !tbaa !8
  %29 = icmp sgt i32 0, %28
  %30 = zext i1 %29 to i64
  %31 = select i1 %29, i32 -1, i32 1
  %32 = load i32, ptr %2, align 4, !tbaa !8
  %33 = add nsw i32 %32, %31
  store i32 %33, ptr %2, align 4, !tbaa !8
  br label %16, !llvm.loop !11

34:                                               ; preds = %24
  br label %35

35:                                               ; preds = %84, %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #6
  %36 = load i32, ptr @n, align 4, !tbaa !8
  %37 = sub nsw i32 %36, 1
  %38 = icmp sgt i32 0, %37
  %39 = zext i1 %38 to i32
  %40 = sub nsw i32 0, %39
  store i32 %40, ptr %4, align 4, !tbaa !8
  br label %41

41:                                               ; preds = %72, %35
  %42 = load i32, ptr %4, align 4, !tbaa !8
  %43 = load i32, ptr @n, align 4, !tbaa !8
  %44 = sub nsw i32 %43, 1
  %45 = load i32, ptr @n, align 4, !tbaa !8
  %46 = sub nsw i32 %45, 1
  %47 = icmp sgt i32 0, %46
  %48 = zext i1 %47 to i32
  %49 = sub nsw i32 %44, %48
  %50 = icmp ne i32 %42, %49
  br i1 %50, label %52, label %51

51:                                               ; preds = %41
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #6
  br label %80

52:                                               ; preds = %41
  %53 = load i32, ptr %4, align 4, !tbaa !8
  %54 = sext i32 %53 to i64
  %55 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %54) #6
  %56 = load i32, ptr %55, align 4, !tbaa !8
  %57 = load i32, ptr %4, align 4, !tbaa !8
  %58 = add nsw i32 %57, 1
  %59 = sext i32 %58 to i64
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %59) #6
  %61 = load i32, ptr %60, align 4, !tbaa !8
  %62 = icmp sgt i32 %56, %61
  br i1 %62, label %63, label %71

63:                                               ; preds = %52
  %64 = load i32, ptr %4, align 4, !tbaa !8
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %65) #6
  %67 = load i32, ptr %4, align 4, !tbaa !8
  %68 = add nsw i32 %67, 1
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %69) #6
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %66, ptr noundef nonnull align 4 dereferenceable(4) %70) #6
  store i8 0, ptr @sorted, align 1, !tbaa !13
  br label %71

71:                                               ; preds = %63, %52
  br label %72

72:                                               ; preds = %71
  %73 = load i32, ptr @n, align 4, !tbaa !8
  %74 = sub nsw i32 %73, 1
  %75 = icmp sgt i32 0, %74
  %76 = zext i1 %75 to i64
  %77 = select i1 %75, i32 -1, i32 1
  %78 = load i32, ptr %4, align 4, !tbaa !8
  %79 = add nsw i32 %78, %77
  store i32 %79, ptr %4, align 4, !tbaa !8
  br label %41, !llvm.loop !15

80:                                               ; preds = %51
  %81 = load i8, ptr @sorted, align 1, !tbaa !13, !range !16, !noundef !17
  %82 = trunc i8 %81 to i1
  br i1 %82, label %83, label %84

83:                                               ; preds = %80
  br label %85

84:                                               ; preds = %80
  store i8 1, ptr @sorted, align 1, !tbaa !13
  br label %35, !llvm.loop !18

85:                                               ; preds = %83
  ret i32 0
}

; Function Attrs: mustprogress nounwind uwtable
declare noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264), ptr noundef) #1 align 2

declare noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext) #2

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #4 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #5

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !10, i64 0}
!15 = distinct !{!15, !12}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = distinct !{!18, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::basic_istream" = type { ptr, i64, %"class.std::basic_ios" }
%"class.std::basic_ios" = type { %"class.std::ios_base", ptr, i8, i8, ptr, ptr, ptr, ptr }
%"class.std::ios_base" = type { ptr, i64, i64, i32, i32, i32, ptr, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, ptr, %"class.std::locale" }
%"struct.std::ios_base::_Words" = type { ptr, i64 }
%"class.std::locale" = type { ptr }

@v = external dso_local global %"class.std::vector", align 8
@n = external dso_local global i32, align 4
@sorted = external dso_local local_unnamed_addr global i8, align 1
@_ZSt3cin = external global %"class.std::basic_istream", align 8

; Function Attrs: mustprogress norecurse uwtable
define dso_local noundef i32 @main() local_unnamed_addr #0 {
  %1 = alloca i32, align 4
  %2 = load ptr, ptr @_ZSt3cin, align 8, !tbaa !5
  %3 = getelementptr i8, ptr %2, i64 -24
  %4 = load i64, ptr %3, align 8
  %5 = getelementptr inbounds i8, ptr @_ZSt3cin, i64 %4
  %6 = tail call noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264) %5, ptr noundef null)
  %7 = tail call noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext false)
  %8 = tail call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) @n)
  %9 = load i32, ptr @n, align 4, !tbaa !8
  %.not13 = icmp eq i32 %9, 0
  br i1 %.not13, label %.preheader.preheader, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %0
  %.lobit.neg = ashr i32 %9, 31
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.0814 = phi i32 [ %13, %.lr.ph ], [ %.lobit.neg, %.lr.ph.preheader ]
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #6
  %10 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16) @_ZSt3cin, ptr noundef nonnull align 4 dereferenceable(4) %1)
  call void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) @v, ptr noundef nonnull align 4 dereferenceable(4) %1)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #6
  %11 = load i32, ptr @n, align 4, !tbaa !8
  %.inv = icmp sgt i32 %11, -1
  %12 = select i1 %.inv, i32 1, i32 -1
  %13 = add nsw i32 %12, %.0814
  %.lobit.neg9 = ashr i32 %11, 31
  %14 = add i32 %.lobit.neg9, %11
  %.not = icmp eq i32 %13, %14
  br i1 %.not, label %.preheader.preheader, label %.lr.ph, !llvm.loop !11

.preheader.preheader:                             ; preds = %.lr.ph, %0
  %.ph = phi i32 [ 0, %0 ], [ %11, %.lr.ph ]
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %38
  %15 = phi i32 [ %17, %38 ], [ %.ph, %.preheader.preheader ]
  %.not1116 = icmp eq i32 %15, 1
  br i1 %.not1116, label %._crit_edge, label %.lr.ph18.preheader

.lr.ph18.preheader:                               ; preds = %.preheader
  %16 = icmp slt i32 %15, 1
  %.neg = sext i1 %16 to i32
  br label %.lr.ph18

._crit_edge:                                      ; preds = %31, %.preheader
  %17 = phi i32 [ 1, %.preheader ], [ %32, %31 ]
  %18 = load i8, ptr @sorted, align 1, !tbaa !13, !range !15, !noundef !16
  %19 = trunc nuw i8 %18 to i1
  br i1 %19, label %39, label %38

.lr.ph18:                                         ; preds = %.lr.ph18.preheader, %31
  %.017 = phi i32 [ %35, %31 ], [ %.neg, %.lr.ph18.preheader ]
  %20 = sext i32 %.017 to i64
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %20) #6
  %22 = load i32, ptr %21, align 4, !tbaa !8
  %23 = add nsw i32 %.017, 1
  %24 = sext i32 %23 to i64
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %24) #6
  %26 = load i32, ptr %25, align 4, !tbaa !8
  %27 = icmp sgt i32 %22, %26
  br i1 %27, label %28, label %31

28:                                               ; preds = %.lr.ph18
  %29 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %20) #6
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @v, i64 noundef %24) #6
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %29, ptr noundef nonnull align 4 dereferenceable(4) %30) #6
  store i8 0, ptr @sorted, align 1, !tbaa !13
  br label %31

31:                                               ; preds = %.lr.ph18, %28
  %32 = load i32, ptr @n, align 4, !tbaa !8
  %33 = icmp slt i32 %32, 1
  %34 = select i1 %33, i32 -1, i32 1
  %35 = add nsw i32 %34, %.017
  %36 = add nsw i32 %32, -1
  %.neg10 = sext i1 %33 to i32
  %37 = add i32 %36, %.neg10
  %.not11 = icmp eq i32 %35, %37
  br i1 %.not11, label %._crit_edge, label %.lr.ph18, !llvm.loop !17

38:                                               ; preds = %._crit_edge
  store i8 1, ptr @sorted, align 1, !tbaa !13
  br label %.preheader, !llvm.loop !18

39:                                               ; preds = %._crit_edge
  ret i32 0
}

; Function Attrs: mustprogress nounwind uwtable
declare noundef ptr @_ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo(ptr noundef nonnull align 8 dereferenceable(264), ptr noundef) local_unnamed_addr #1 align 2

declare noundef zeroext i1 @_ZNSt8ios_base15sync_with_stdioEb(i1 noundef zeroext) local_unnamed_addr #2

declare noundef nonnull align 8 dereferenceable(16) ptr @_ZNSirsERi(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #5

attributes #0 = { mustprogress norecurse uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !10, i64 0}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = distinct !{!17, !12}
!18 = distinct !{!18, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass