; LLVM IR from DeanoC/gfx_imagecompress :: src/amd_hdr_encode.ll (ZN10HDR_Encode15quant_AnD_ShellEPfiiPi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.HDR_Encode::a" = type { float, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @qsort(ptr noundef, i64 noundef, i64 noundef, ptr noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN10HDR_Encode9a_compareEPKvS1_(ptr noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10HDR_Encode15quant_AnD_ShellEPfiiPi(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) #4 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca [64 x float], align 16
  %12 = alloca [64 x float], align 16
  %13 = alloca [64 x %"struct.HDR_Encode::a"], align 16
  %14 = alloca float, align 4
  %15 = alloca float, align 4
  %16 = alloca float, align 4
  %17 = alloca i32, align 4
  %18 = alloca float, align 4
  %19 = alloca float, align 4
  %20 = alloca float, align 4
  %21 = alloca float, align 4
  %22 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.start.p0(i64 256, ptr %11) #5
  call void @llvm.lifetime.start.p0(i64 256, ptr %12) #5
  call void @llvm.lifetime.start.p0(i64 512, ptr %13) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store float 0.000000e+00, ptr %16, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #5
  store float 0.000000e+00, ptr %21, align 4, !tbaa !11
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds float, ptr %23, i64 0
  %25 = load float, ptr %24, align 4, !tbaa !11
  store float %25, ptr %19, align 4, !tbaa !11
  store float %25, ptr %18, align 4, !tbaa !11
  store i32 1, ptr %9, align 4, !tbaa !9
  br label %26

26:                                               ; preds = %65, %4
  %27 = load i32, ptr %9, align 4, !tbaa !9
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = icmp slt i32 %27, %28
  br i1 %29, label %30, label %68

30:                                               ; preds = %26
  %31 = load float, ptr %18, align 4, !tbaa !11
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds float, ptr %32, i64 %34
  %36 = load float, ptr %35, align 4, !tbaa !11
  %37 = fcmp olt float %31, %36
  br i1 %37, label %38, label %40

38:                                               ; preds = %30
  %39 = load float, ptr %18, align 4, !tbaa !11
  br label %46

40:                                               ; preds = %30
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = load i32, ptr %9, align 4, !tbaa !9
  %43 = sext i32 %42 to i64
  %44 = getelementptr inbounds float, ptr %41, i64 %43
  %45 = load float, ptr %44, align 4, !tbaa !11
  br label %46

46:                                               ; preds = %40, %38
  %47 = phi float [ %39, %38 ], [ %45, %40 ]
  store float %47, ptr %18, align 4, !tbaa !11
  %48 = load float, ptr %19, align 4, !tbaa !11
  %49 = load ptr, ptr %5, align 8, !tbaa !5
  %50 = load i32, ptr %9, align 4, !tbaa !9
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds float, ptr %49, i64 %51
  %53 = load float, ptr %52, align 4, !tbaa !11
  %54 = fcmp ogt float %48, %53
  br i1 %54, label %55, label %57

55:                                               ; preds = %46
  %56 = load float, ptr %19, align 4, !tbaa !11
  br label %63

57:                                               ; preds = %46
  %58 = load ptr, ptr %5, align 8, !tbaa !5
  %59 = load i32, ptr %9, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds float, ptr %58, i64 %60
  %62 = load float, ptr %61, align 4, !tbaa !11
  br label %63

63:                                               ; preds = %57, %55
  %64 = phi float [ %56, %55 ], [ %62, %57 ]
  store float %64, ptr %19, align 4, !tbaa !11
  br label %65

65:                                               ; preds = %63
  %66 = load i32, ptr %9, align 4, !tbaa !9
  %67 = add nsw i32 %66, 1
  store i32 %67, ptr %9, align 4, !tbaa !9
  br label %26, !llvm.loop !13

68:                                               ; preds = %26
  %69 = load float, ptr %19, align 4, !tbaa !11
  %70 = load float, ptr %18, align 4, !tbaa !11
  %71 = fcmp oeq float %69, %70
  br i1 %71, label %72, label %86

72:                                               ; preds = %68
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %82, %72
  %74 = load i32, ptr %9, align 4, !tbaa !9
  %75 = load i32, ptr %7, align 4, !tbaa !9
  %76 = icmp slt i32 %74, %75
  br i1 %76, label %77, label %85

77:                                               ; preds = %73
  %78 = load ptr, ptr %8, align 8, !tbaa !5
  %79 = load i32, ptr %9, align 4, !tbaa !9
  %80 = sext i32 %79 to i64
  %81 = getelementptr inbounds i32, ptr %78, i64 %80
  store i32 0, ptr %81, align 4, !tbaa !9
  br label %82

82:                                               ; preds = %77
  %83 = load i32, ptr %9, align 4, !tbaa !9
  %84 = add nsw i32 %83, 1
  store i32 %84, ptr %9, align 4, !tbaa !9
  br label %73, !llvm.loop !15

85:                                               ; preds = %73
  store i32 1, ptr %22, align 4
  br label %326

86:                                               ; preds = %68
  %87 = load i32, ptr %6, align 4, !tbaa !9
  %88 = sub nsw i32 %87, 1
  %89 = sitofp i32 %88 to float
  %90 = load float, ptr %19, align 4, !tbaa !11
  %91 = load float, ptr %18, align 4, !tbaa !11
  %92 = fsub float %90, %91
  %93 = fdiv float %89, %92
  store float %93, ptr %20, align 4, !tbaa !11
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %94

94:                                               ; preds = %167, %86
  %95 = load i32, ptr %9, align 4, !tbaa !9
  %96 = load i32, ptr %7, align 4, !tbaa !9
  %97 = icmp slt i32 %95, %96
  br i1 %97, label %98, label %170

98:                                               ; preds = %94
  %99 = load ptr, ptr %5, align 8, !tbaa !5
  %100 = load i32, ptr %9, align 4, !tbaa !9
  %101 = sext i32 %100 to i64
  %102 = getelementptr inbounds float, ptr %99, i64 %101
  %103 = load float, ptr %102, align 4, !tbaa !11
  %104 = load float, ptr %20, align 4, !tbaa !11
  %105 = fmul float %103, %104
  %106 = load i32, ptr %9, align 4, !tbaa !9
  %107 = sext i32 %106 to i64
  %108 = getelementptr inbounds [64 x float], ptr %11, i64 0, i64 %107
  store float %105, ptr %108, align 4, !tbaa !11
  %109 = load i32, ptr %9, align 4, !tbaa !9
  %110 = sext i32 %109 to i64
  %111 = getelementptr inbounds [64 x float], ptr %11, i64 0, i64 %110
  %112 = load float, ptr %111, align 4, !tbaa !11
  %113 = fadd float %112, 5.000000e-01
  %114 = load float, ptr %18, align 4, !tbaa !11
  %115 = load float, ptr %20, align 4, !tbaa !11
  %116 = fneg float %114
  %117 = call float @llvm.fmuladd.f32(float %116, float %115, float %113)
  %118 = load i32, ptr %9, align 4, !tbaa !9
  %119 = sext i32 %118 to i64
  %120 = getelementptr inbounds [64 x float], ptr %12, i64 0, i64 %119
  store float %117, ptr %120, align 4, !tbaa !11
  %121 = fptosi float %117 to i32
  %122 = load ptr, ptr %8, align 8, !tbaa !5
  %123 = load i32, ptr %9, align 4, !tbaa !9
  %124 = sext i32 %123 to i64
  %125 = getelementptr inbounds i32, ptr %122, i64 %124
  store i32 %121, ptr %125, align 4, !tbaa !9
  %126 = load i32, ptr %9, align 4, !tbaa !9
  %127 = sext i32 %126 to i64
  %128 = getelementptr inbounds [64 x float], ptr %11, i64 0, i64 %127
  %129 = load float, ptr %128, align 4, !tbaa !11
  %130 = load i32, ptr %9, align 4, !tbaa !9
  %131 = sext i32 %130 to i64
  %132 = getelementptr inbounds [64 x float], ptr %12, i64 0, i64 %131
  %133 = load float, ptr %132, align 4, !tbaa !11
  %134 = fsub float %129, %133
  %135 = load float, ptr %18, align 4, !tbaa !11
  %136 = load float, ptr %20, align 4, !tbaa !11
  %137 = fneg float %135
  %138 = call float @llvm.fmuladd.f32(float %137, float %136, float %134)
  %139 = load i32, ptr %9, align 4, !tbaa !9
  %140 = sext i32 %139 to i64
  %141 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %140
  %142 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %141, i32 0, i32 0
  store float %138, ptr %142, align 8, !tbaa !16
  %143 = load i32, ptr %9, align 4, !tbaa !9
  %144 = load i32, ptr %9, align 4, !tbaa !9
  %145 = sext i32 %144 to i64
  %146 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %145
  %147 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %146, i32 0, i32 1
  store i32 %143, ptr %147, align 4, !tbaa !18
  %148 = load i32, ptr %9, align 4, !tbaa !9
  %149 = sext i32 %148 to i64
  %150 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %149
  %151 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %150, i32 0, i32 0
  %152 = load float, ptr %151, align 8, !tbaa !16
  %153 = load float, ptr %21, align 4, !tbaa !11
  %154 = fadd float %153, %152
  store float %154, ptr %21, align 4, !tbaa !11
  %155 = load i32, ptr %9, align 4, !tbaa !9
  %156 = sext i32 %155 to i64
  %157 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %156
  %158 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %157, i32 0, i32 0
  %159 = load float, ptr %158, align 8, !tbaa !16
  %160 = load i32, ptr %9, align 4, !tbaa !9
  %161 = sext i32 %160 to i64
  %162 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %161
  %163 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %162, i32 0, i32 0
  %164 = load float, ptr %163, align 8, !tbaa !16
  %165 = load float, ptr %16, align 4, !tbaa !11
  %166 = call float @llvm.fmuladd.f32(float %159, float %164, float %165)
  store float %166, ptr %16, align 4, !tbaa !11
  br label %167

167:                                              ; preds = %98
  %168 = load i32, ptr %9, align 4, !tbaa !9
  %169 = add nsw i32 %168, 1
  store i32 %169, ptr %9, align 4, !tbaa !9
  br label %94, !llvm.loop !19

170:                                              ; preds = %94
  %171 = load i32, ptr %7, align 4, !tbaa !9
  %172 = sitofp i32 %171 to float
  %173 = load float, ptr %16, align 4, !tbaa !11
  %174 = load float, ptr %21, align 4, !tbaa !11
  %175 = load float, ptr %21, align 4, !tbaa !11
  %176 = fmul float %174, %175
  %177 = fneg float %176
  %178 = call float @llvm.fmuladd.f32(float %172, float %173, float %177)
  %179 = load i32, ptr %7, align 4, !tbaa !9
  %180 = sub nsw i32 %179, 1
  %181 = sitofp i32 %180 to float
  %182 = fdiv float %181, 4.000000e+00
  %183 = fdiv float %182, 2.000000e+00
  %184 = fcmp oge float %178, %183
  br i1 %184, label %185, label %280

185:                                              ; preds = %170
  %186 = load i32, ptr %7, align 4, !tbaa !9
  %187 = sitofp i32 %186 to float
  %188 = load float, ptr %21, align 4, !tbaa !11
  %189 = fdiv float %188, %187
  store float %189, ptr %21, align 4, !tbaa !11
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %190

190:                                              ; preds = %202, %185
  %191 = load i32, ptr %9, align 4, !tbaa !9
  %192 = load i32, ptr %7, align 4, !tbaa !9
  %193 = icmp slt i32 %191, %192
  br i1 %193, label %194, label %205

194:                                              ; preds = %190
  %195 = load float, ptr %21, align 4, !tbaa !11
  %196 = load i32, ptr %9, align 4, !tbaa !9
  %197 = sext i32 %196 to i64
  %198 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %197
  %199 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %198, i32 0, i32 0
  %200 = load float, ptr %199, align 8, !tbaa !16
  %201 = fsub float %200, %195
  store float %201, ptr %199, align 8, !tbaa !16
  br label %202

202:                                              ; preds = %194
  %203 = load i32, ptr %9, align 4, !tbaa !9
  %204 = add nsw i32 %203, 1
  store i32 %204, ptr %9, align 4, !tbaa !9
  br label %190, !llvm.loop !20

205:                                              ; preds = %190
  %206 = load i32, ptr %7, align 4, !tbaa !9
  %207 = sext i32 %206 to i64
  call void @qsort(ptr noundef %13, i64 noundef %207, i64 noundef 8, ptr noundef @_ZN10HDR_Encode9a_compareEPKvS1_)
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %208

208:                                              ; preds = %229, %205
  %209 = load i32, ptr %9, align 4, !tbaa !9
  %210 = load i32, ptr %7, align 4, !tbaa !9
  %211 = icmp slt i32 %209, %210
  br i1 %211, label %212, label %232

212:                                              ; preds = %208
  %213 = load i32, ptr %9, align 4, !tbaa !9
  %214 = sitofp i32 %213 to float
  %215 = call float @llvm.fmuladd.f32(float 2.000000e+00, float %214, float 1.000000e+00)
  %216 = load i32, ptr %7, align 4, !tbaa !9
  %217 = sitofp i32 %216 to float
  %218 = fsub float %215, %217
  %219 = fdiv float %218, 2.000000e+00
  %220 = load i32, ptr %7, align 4, !tbaa !9
  %221 = sitofp i32 %220 to float
  %222 = fdiv float %219, %221
  %223 = load i32, ptr %9, align 4, !tbaa !9
  %224 = sext i32 %223 to i64
  %225 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %224
  %226 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %225, i32 0, i32 0
  %227 = load float, ptr %226, align 8, !tbaa !16
  %228 = fsub float %227, %222
  store float %228, ptr %226, align 8, !tbaa !16
  br label %229

229:                                              ; preds = %212
  %230 = load i32, ptr %9, align 4, !tbaa !9
  %231 = add nsw i32 %230, 1
  store i32 %231, ptr %9, align 4, !tbaa !9
  br label %208, !llvm.loop !21

232:                                              ; preds = %208
  store float 0.000000e+00, ptr %14, align 4, !tbaa !11
  store float 0.000000e+00, ptr %15, align 4, !tbaa !11
  store i32 -1, ptr %10, align 4, !tbaa !9
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %233

233:                                              ; preds = %252, %232
  %234 = load i32, ptr %9, align 4, !tbaa !9
  %235 = load i32, ptr %7, align 4, !tbaa !9
  %236 = icmp slt i32 %234, %235
  br i1 %236, label %237, label %255

237:                                              ; preds = %233
  %238 = load i32, ptr %9, align 4, !tbaa !9
  %239 = sext i32 %238 to i64
  %240 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %239
  %241 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %240, i32 0, i32 0
  %242 = load float, ptr %241, align 8, !tbaa !16
  %243 = load float, ptr %14, align 4, !tbaa !11
  %244 = fadd float %243, %242
  store float %244, ptr %14, align 4, !tbaa !11
  %245 = load float, ptr %14, align 4, !tbaa !11
  %246 = load float, ptr %15, align 4, !tbaa !11
  %247 = fcmp olt float %245, %246
  br i1 %247, label %248, label %251

248:                                              ; preds = %237
  %249 = load float, ptr %14, align 4, !tbaa !11
  store float %249, ptr %15, align 4, !tbaa !11
  %250 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %250, ptr %10, align 4, !tbaa !9
  br label %251

251:                                              ; preds = %248, %237
  br label %252

252:                                              ; preds = %251
  %253 = load i32, ptr %9, align 4, !tbaa !9
  %254 = add nsw i32 %253, 1
  store i32 %254, ptr %9, align 4, !tbaa !9
  br label %233, !llvm.loop !22

255:                                              ; preds = %233
  %256 = load i32, ptr %10, align 4, !tbaa !9
  %257 = add nsw i32 %256, 1
  store i32 %257, ptr %10, align 4, !tbaa !9
  %258 = load i32, ptr %7, align 4, !tbaa !9
  %259 = srem i32 %257, %258
  store i32 %259, ptr %10, align 4, !tbaa !9
  %260 = load i32, ptr %10, align 4, !tbaa !9
  store i32 %260, ptr %9, align 4, !tbaa !9
  br label %261

261:                                              ; preds = %276, %255
  %262 = load i32, ptr %9, align 4, !tbaa !9
  %263 = load i32, ptr %7, align 4, !tbaa !9
  %264 = icmp slt i32 %262, %263
  br i1 %264, label %265, label %279

265:                                              ; preds = %261
  %266 = load ptr, ptr %8, align 8, !tbaa !5
  %267 = load i32, ptr %9, align 4, !tbaa !9
  %268 = sext i32 %267 to i64
  %269 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %13, i64 0, i64 %268
  %270 = getelementptr inbounds %"struct.HDR_Encode::a", ptr %269, i32 0, i32 1
  %271 = load i32, ptr %270, align 4, !tbaa !18
  %272 = sext i32 %271 to i64
  %273 = getelementptr inbounds i32, ptr %266, i64 %272
  %274 = load i32, ptr %273, align 4, !tbaa !9
  %275 = add nsw i32 %274, 1
  store i32 %275, ptr %273, align 4, !tbaa !9
  br label %276

276:                                              ; preds = %265
  %277 = load i32, ptr %9, align 4, !tbaa !9
  %278 = add nsw i32 %277, 1
  store i32 %278, ptr %9, align 4, !tbaa !9
  br label %261, !llvm.loop !23

279:                                              ; preds = %261
  br label %280

280:                                              ; preds = %279, %170
  %281 = load ptr, ptr %8, align 8, !tbaa !5
  %282 = getelementptr inbounds i32, ptr %281, i64 0
  %283 = load i32, ptr %282, align 4, !tbaa !9
  store i32 %283, ptr %17, align 4, !tbaa !9
  store i32 1, ptr %9, align 4, !tbaa !9
  br label %284

284:                                              ; preds = %306, %280
  %285 = load i32, ptr %9, align 4, !tbaa !9
  %286 = load i32, ptr %7, align 4, !tbaa !9
  %287 = icmp slt i32 %285, %286
  br i1 %287, label %288, label %309

288:                                              ; preds = %284
  %289 = load i32, ptr %17, align 4, !tbaa !9
  %290 = load ptr, ptr %8, align 8, !tbaa !5
  %291 = load i32, ptr %9, align 4, !tbaa !9
  %292 = sext i32 %291 to i64
  %293 = getelementptr inbounds i32, ptr %290, i64 %292
  %294 = load i32, ptr %293, align 4, !tbaa !9
  %295 = icmp slt i32 %289, %294
  br i1 %295, label %296, label %298

296:                                              ; preds = %288
  %297 = load i32, ptr %17, align 4, !tbaa !9
  br label %304

298:                                              ; preds = %288
  %299 = load ptr, ptr %8, align 8, !tbaa !5
  %300 = load i32, ptr %9, align 4, !tbaa !9
  %301 = sext i32 %300 to i64
  %302 = getelementptr inbounds i32, ptr %299, i64 %301
  %303 = load i32, ptr %302, align 4, !tbaa !9
  br label %304

304:                                              ; preds = %298, %296
  %305 = phi i32 [ %297, %296 ], [ %303, %298 ]
  store i32 %305, ptr %17, align 4, !tbaa !9
  br label %306

306:                                              ; preds = %304
  %307 = load i32, ptr %9, align 4, !tbaa !9
  %308 = add nsw i32 %307, 1
  store i32 %308, ptr %9, align 4, !tbaa !9
  br label %284, !llvm.loop !24

309:                                              ; preds = %284
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %310

310:                                              ; preds = %322, %309
  %311 = load i32, ptr %9, align 4, !tbaa !9
  %312 = load i32, ptr %7, align 4, !tbaa !9
  %313 = icmp slt i32 %311, %312
  br i1 %313, label %314, label %325

314:                                              ; preds = %310
  %315 = load i32, ptr %17, align 4, !tbaa !9
  %316 = load ptr, ptr %8, align 8, !tbaa !5
  %317 = load i32, ptr %9, align 4, !tbaa !9
  %318 = sext i32 %317 to i64
  %319 = getelementptr inbounds i32, ptr %316, i64 %318
  %320 = load i32, ptr %319, align 4, !tbaa !9
  %321 = sub nsw i32 %320, %315
  store i32 %321, ptr %319, align 4, !tbaa !9
  br label %322

322:                                              ; preds = %314
  %323 = load i32, ptr %9, align 4, !tbaa !9
  %324 = add nsw i32 %323, 1
  store i32 %324, ptr %9, align 4, !tbaa !9
  br label %310, !llvm.loop !25

325:                                              ; preds = %310
  store i32 0, ptr %22, align 4
  br label %326

326:                                              ; preds = %325, %85
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 512, ptr %13) #5
  call void @llvm.lifetime.end.p0(i64 256, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 256, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  %327 = load i32, ptr %22, align 4
  switch i32 %327, label %329 [
    i32 0, label %328
    i32 1, label %328
  ]

328:                                              ; preds = %326, %326
  ret void

329:                                              ; preds = %326
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{!17, !12, i64 0}
!17 = !{!"_ZTSN10HDR_Encode1aE", !12, i64 0, !10, i64 4}
!18 = !{!17, !10, i64 4}
!19 = distinct !{!19, !14}
!20 = distinct !{!20, !14}
!21 = distinct !{!21, !14}
!22 = distinct !{!22, !14}
!23 = distinct !{!23, !14}
!24 = distinct !{!24, !14}
!25 = distinct !{!25, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.HDR_Encode::a" = type { float, i32 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nofree
declare void @qsort(ptr noundef, i64 noundef, i64 noundef, ptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN10HDR_Encode9a_compareEPKvS1_(ptr noundef, ptr noundef) #3

; Function Attrs: mustprogress nofree uwtable
define dso_local void @_ZN10HDR_Encode15quant_AnD_ShellEPfiiPi(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef %3) local_unnamed_addr #4 {
  %5 = alloca [64 x %"struct.HDR_Encode::a"], align 16
  call void @llvm.lifetime.start.p0(i64 512, ptr nonnull %5) #7
  %6 = load float, ptr %0, align 4, !tbaa !5
  %7 = icmp sgt i32 %2, 1
  br i1 %7, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %4
  %wide.trip.count = zext nneg i32 %2 to i64
  %8 = add nsw i64 %wide.trip.count, -1
  %xtraiter = and i64 %8, 1
  %9 = icmp eq i32 %2, 2
  br i1 %9, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %8, -2
  %invariant.gep = getelementptr inbounds i8, ptr %0, i64 4
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 1, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %.lr.ph ]
  %.0104123 = phi float [ %6, %.lr.ph.preheader.new ], [ %18, %.lr.ph ]
  %.0105122 = phi float [ %6, %.lr.ph.preheader.new ], [ %.0105..1, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %10 = getelementptr inbounds float, ptr %0, i64 %indvars.iv
  %11 = load float, ptr %10, align 4, !tbaa !5
  %12 = fcmp olt float %.0105122, %11
  %.0105. = select i1 %12, float %.0105122, float %11
  %13 = fcmp ogt float %.0104123, %11
  %14 = select i1 %13, float %.0104123, float %11
  %gep = getelementptr inbounds float, ptr %invariant.gep, i64 %indvars.iv
  %15 = load float, ptr %gep, align 4, !tbaa !5
  %16 = fcmp olt float %.0105., %15
  %.0105..1 = select i1 %16, float %.0105., float %15
  %17 = fcmp ogt float %14, %15
  %18 = select i1 %17, float %14, float %15
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !9

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %.0105..lcssa.ph = phi float [ poison, %.lr.ph.preheader ], [ %.0105..1, %.lr.ph ]
  %.lcssa253.ph = phi float [ poison, %.lr.ph.preheader ], [ %18, %.lr.ph ]
  %indvars.iv.unr = phi i64 [ 1, %.lr.ph.preheader ], [ %indvars.iv.next.1, %.lr.ph ]
  %.0104123.unr = phi float [ %6, %.lr.ph.preheader ], [ %18, %.lr.ph ]
  %.0105122.unr = phi float [ %6, %.lr.ph.preheader ], [ %.0105..1, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %19 = getelementptr inbounds float, ptr %0, i64 %indvars.iv.unr
  %20 = load float, ptr %19, align 4, !tbaa !5
  %21 = fcmp olt float %.0105122.unr, %20
  %.0105..epil = select i1 %21, float %.0105122.unr, float %20
  %22 = fcmp ogt float %.0104123.unr, %20
  %23 = select i1 %22, float %.0104123.unr, float %20
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.epil, %._crit_edge.loopexit.unr-lcssa, %4
  %.0105.lcssa = phi float [ %6, %4 ], [ %.0105..lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %.0105..epil, %.lr.ph.epil ]
  %.0104.lcssa = phi float [ %6, %4 ], [ %.lcssa253.ph, %._crit_edge.loopexit.unr-lcssa ], [ %23, %.lr.ph.epil ]
  %24 = fcmp oeq float %.0104.lcssa, %.0105.lcssa
  br i1 %24, label %.preheader, label %28

.preheader:                                       ; preds = %._crit_edge
  %25 = icmp sgt i32 %2, 0
  br i1 %25, label %.lr.ph159.preheader, label %.loopexit

.lr.ph159.preheader:                              ; preds = %.preheader
  %26 = zext nneg i32 %2 to i64
  %27 = shl nuw nsw i64 %26, 2
  tail call void @llvm.memset.p0.i64(ptr align 4 %3, i8 0, i64 %27, i1 false), !tbaa !11
  br label %.loopexit

28:                                               ; preds = %._crit_edge
  %29 = add nsw i32 %1, -1
  %30 = sitofp i32 %29 to float
  %31 = fsub float %.0104.lcssa, %.0105.lcssa
  %32 = fdiv float %30, %31
  %33 = icmp sgt i32 %2, 0
  br i1 %33, label %.lr.ph130, label %._crit_edge131

.lr.ph130:                                        ; preds = %28
  %34 = fneg float %.0105.lcssa
  %wide.trip.count167 = zext nneg i32 %2 to i64
  br label %35

35:                                               ; preds = %.lr.ph130, %35
  %indvars.iv164 = phi i64 [ 0, %.lr.ph130 ], [ %indvars.iv.next165, %35 ]
  %.0128 = phi float [ 0.000000e+00, %.lr.ph130 ], [ %48, %35 ]
  %.0107126 = phi float [ 0.000000e+00, %.lr.ph130 ], [ %49, %35 ]
  %36 = getelementptr inbounds float, ptr %0, i64 %indvars.iv164
  %37 = load float, ptr %36, align 4, !tbaa !5
  %38 = fmul float %32, %37
  %39 = fadd float %38, 5.000000e-01
  %40 = tail call float @llvm.fmuladd.f32(float %34, float %32, float %39)
  %41 = fptosi float %40 to i32
  %42 = getelementptr inbounds i32, ptr %3, i64 %indvars.iv164
  store i32 %41, ptr %42, align 4, !tbaa !11
  %43 = fsub float %38, %40
  %44 = tail call float @llvm.fmuladd.f32(float %34, float %32, float %43)
  %45 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %indvars.iv164
  store float %44, ptr %45, align 8, !tbaa !13
  %46 = getelementptr inbounds i8, ptr %45, i64 4
  %47 = trunc nuw nsw i64 %indvars.iv164 to i32
  store i32 %47, ptr %46, align 4, !tbaa !15
  %48 = fadd float %.0128, %44
  %49 = tail call float @llvm.fmuladd.f32(float %44, float %44, float %.0107126)
  %indvars.iv.next165 = add nuw nsw i64 %indvars.iv164, 1
  %exitcond168.not = icmp eq i64 %indvars.iv.next165, %wide.trip.count167
  br i1 %exitcond168.not, label %._crit_edge131, label %35, !llvm.loop !16

._crit_edge131:                                   ; preds = %35, %28
  %.0107.lcssa = phi float [ 0.000000e+00, %28 ], [ %49, %35 ]
  %.0.lcssa = phi float [ 0.000000e+00, %28 ], [ %48, %35 ]
  %50 = sitofp i32 %2 to float
  %51 = fneg float %.0.lcssa
  %52 = fmul float %.0.lcssa, %51
  %53 = tail call float @llvm.fmuladd.f32(float %50, float %.0107.lcssa, float %52)
  %54 = add nsw i32 %2, -1
  %55 = sitofp i32 %54 to float
  %56 = fmul float %55, 2.500000e-01
  %57 = fmul float %56, 5.000000e-01
  %58 = fcmp ult float %53, %57
  br i1 %58, label %.loopexit120, label %59

59:                                               ; preds = %._crit_edge131
  %60 = fdiv float %.0.lcssa, %50
  br i1 %33, label %.lr.ph136.preheader, label %._crit_edge137.thread

._crit_edge137.thread:                            ; preds = %59
  %61 = sext i32 %2 to i64
  call void @qsort(ptr noundef nonnull %5, i64 noundef %61, i64 noundef 8, ptr noundef nonnull @_ZN10HDR_Encode9a_compareEPKvS1_)
  br label %._crit_edge146

.lr.ph136.preheader:                              ; preds = %59
  %wide.trip.count172 = zext nneg i32 %2 to i64
  %min.iters.check = icmp ult i32 %2, 5
  br i1 %min.iters.check, label %.lr.ph136.preheader250, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph136.preheader
  %n.mod.vf = and i64 %wide.trip.count172, 3
  %62 = icmp eq i64 %n.mod.vf, 0
  %63 = select i1 %62, i64 4, i64 %n.mod.vf
  %n.vec = sub nsw i64 %wide.trip.count172, %63
  %broadcast.splatinsert = insertelement <4 x float> poison, float %60, i64 0
  %broadcast.splat = shufflevector <4 x float> %broadcast.splatinsert, <4 x float> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %64 = or disjoint i64 %index, 1
  %65 = or disjoint i64 %index, 2
  %66 = or disjoint i64 %index, 3
  %67 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %index
  %68 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %64
  %69 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %65
  %70 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %66
  %wide.vec = load <8 x float>, ptr %67, align 16, !tbaa !13
  %strided.vec = shufflevector <8 x float> %wide.vec, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %71 = fsub <4 x float> %strided.vec, %broadcast.splat
  %72 = extractelement <4 x float> %71, i64 0
  store float %72, ptr %67, align 16, !tbaa !13
  %73 = extractelement <4 x float> %71, i64 1
  store float %73, ptr %68, align 8, !tbaa !13
  %74 = extractelement <4 x float> %71, i64 2
  store float %74, ptr %69, align 16, !tbaa !13
  %75 = extractelement <4 x float> %71, i64 3
  store float %75, ptr %70, align 8, !tbaa !13
  %index.next = add nuw i64 %index, 4
  %76 = icmp eq i64 %index.next, %n.vec
  br i1 %76, label %.lr.ph136.preheader250, label %vector.body, !llvm.loop !17

.lr.ph136.preheader250:                           ; preds = %vector.body, %.lr.ph136.preheader
  %indvars.iv169.ph = phi i64 [ 0, %.lr.ph136.preheader ], [ %n.vec, %vector.body ]
  br label %.lr.ph136

.lr.ph136:                                        ; preds = %.lr.ph136.preheader250, %.lr.ph136
  %indvars.iv169 = phi i64 [ %indvars.iv.next170, %.lr.ph136 ], [ %indvars.iv169.ph, %.lr.ph136.preheader250 ]
  %77 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %indvars.iv169
  %78 = load float, ptr %77, align 8, !tbaa !13
  %79 = fsub float %78, %60
  store float %79, ptr %77, align 8, !tbaa !13
  %indvars.iv.next170 = add nuw nsw i64 %indvars.iv169, 1
  %exitcond173.not = icmp eq i64 %indvars.iv.next170, %wide.trip.count172
  br i1 %exitcond173.not, label %._crit_edge137, label %.lr.ph136, !llvm.loop !20

._crit_edge137:                                   ; preds = %.lr.ph136
  %80 = zext nneg i32 %2 to i64
  call void @qsort(ptr noundef nonnull %5, i64 noundef %80, i64 noundef 8, ptr noundef nonnull @_ZN10HDR_Encode9a_compareEPKvS1_)
  br i1 %33, label %.lr.ph140.preheader, label %._crit_edge146

.lr.ph140.preheader:                              ; preds = %._crit_edge137
  %wide.trip.count177 = zext nneg i32 %2 to i64
  %min.iters.check207 = icmp ult i32 %2, 5
  br i1 %min.iters.check207, label %.lr.ph140.preheader249, label %vector.ph208

.lr.ph140.preheader249:                           ; preds = %vector.body212, %.lr.ph140.preheader
  %indvars.iv174.ph = phi i64 [ 0, %.lr.ph140.preheader ], [ %n.vec210, %vector.body212 ]
  br label %.lr.ph140

vector.ph208:                                     ; preds = %.lr.ph140.preheader
  %n.mod.vf209 = and i64 %wide.trip.count172, 3
  %81 = icmp eq i64 %n.mod.vf209, 0
  %82 = select i1 %81, i64 4, i64 %n.mod.vf209
  %n.vec210 = sub nsw i64 %wide.trip.count172, %82
  %broadcast.splatinsert214 = insertelement <4 x float> poison, float %50, i64 0
  %broadcast.splat215 = shufflevector <4 x float> %broadcast.splatinsert214, <4 x float> poison, <4 x i32> zeroinitializer
  br label %vector.body212

vector.body212:                                   ; preds = %vector.body212, %vector.ph208
  %index213 = phi i64 [ 0, %vector.ph208 ], [ %index.next218, %vector.body212 ]
  %vec.ind = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph208 ], [ %vec.ind.next, %vector.body212 ]
  %83 = or disjoint i64 %index213, 1
  %84 = or disjoint i64 %index213, 2
  %85 = or disjoint i64 %index213, 3
  %86 = uitofp <4 x i32> %vec.ind to <4 x float>
  %87 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %86, <4 x float> <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>, <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>)
  %88 = fsub <4 x float> %87, %broadcast.splat215
  %89 = fmul <4 x float> %88, <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01>
  %90 = fdiv <4 x float> %89, %broadcast.splat215
  %91 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %index213
  %92 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %83
  %93 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %84
  %94 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %85
  %wide.vec216 = load <8 x float>, ptr %91, align 16, !tbaa !13
  %strided.vec217 = shufflevector <8 x float> %wide.vec216, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %95 = fsub <4 x float> %strided.vec217, %90
  %96 = extractelement <4 x float> %95, i64 0
  store float %96, ptr %91, align 16, !tbaa !13
  %97 = extractelement <4 x float> %95, i64 1
  store float %97, ptr %92, align 8, !tbaa !13
  %98 = extractelement <4 x float> %95, i64 2
  store float %98, ptr %93, align 16, !tbaa !13
  %99 = extractelement <4 x float> %95, i64 3
  store float %99, ptr %94, align 8, !tbaa !13
  %index.next218 = add nuw i64 %index213, 4
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 4, i32 4, i32 4, i32 4>
  %100 = icmp eq i64 %index.next218, %n.vec210
  br i1 %100, label %.lr.ph140.preheader249, label %vector.body212, !llvm.loop !21

.preheader121:                                    ; preds = %.lr.ph140
  br i1 %33, label %.lr.ph145.preheader, label %._crit_edge146

.lr.ph145.preheader:                              ; preds = %.preheader121
  %xtraiter256 = and i64 %wide.trip.count172, 1
  %101 = icmp eq i32 %2, 1
  br i1 %101, label %._crit_edge146.loopexit.unr-lcssa, label %.lr.ph145.preheader.new

.lr.ph145.preheader.new:                          ; preds = %.lr.ph145.preheader
  %unroll_iter259 = and i64 %wide.trip.count172, 2147483646
  br label %.lr.ph145

.lr.ph140:                                        ; preds = %.lr.ph140.preheader249, %.lr.ph140
  %indvars.iv174 = phi i64 [ %indvars.iv.next175, %.lr.ph140 ], [ %indvars.iv174.ph, %.lr.ph140.preheader249 ]
  %102 = trunc nuw nsw i64 %indvars.iv174 to i32
  %103 = uitofp nneg i32 %102 to float
  %104 = call float @llvm.fmuladd.f32(float %103, float 2.000000e+00, float 1.000000e+00)
  %105 = fsub float %104, %50
  %106 = fmul float %105, 5.000000e-01
  %107 = fdiv float %106, %50
  %108 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %indvars.iv174
  %109 = load float, ptr %108, align 8, !tbaa !13
  %110 = fsub float %109, %107
  store float %110, ptr %108, align 8, !tbaa !13
  %indvars.iv.next175 = add nuw nsw i64 %indvars.iv174, 1
  %exitcond178.not = icmp eq i64 %indvars.iv.next175, %wide.trip.count177
  br i1 %exitcond178.not, label %.preheader121, label %.lr.ph140, !llvm.loop !22

.lr.ph145:                                        ; preds = %.lr.ph145, %.lr.ph145.preheader.new
  %indvars.iv179 = phi i64 [ 0, %.lr.ph145.preheader.new ], [ %indvars.iv.next180.1, %.lr.ph145 ]
  %.0108143 = phi float [ 0.000000e+00, %.lr.ph145.preheader.new ], [ %.1109.1, %.lr.ph145 ]
  %.0110142 = phi float [ 0.000000e+00, %.lr.ph145.preheader.new ], [ %118, %.lr.ph145 ]
  %.0111141 = phi i32 [ -1, %.lr.ph145.preheader.new ], [ %.1112.1, %.lr.ph145 ]
  %niter260 = phi i64 [ 0, %.lr.ph145.preheader.new ], [ %niter260.next.1, %.lr.ph145 ]
  %111 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %indvars.iv179
  %112 = load float, ptr %111, align 16, !tbaa !13
  %113 = fadd float %.0110142, %112
  %114 = fcmp olt float %113, %.0108143
  %115 = trunc nuw nsw i64 %indvars.iv179 to i32
  %.1112 = select i1 %114, i32 %115, i32 %.0111141
  %.1109 = select i1 %114, float %113, float %.0108143
  %indvars.iv.next180 = or disjoint i64 %indvars.iv179, 1
  %116 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %indvars.iv.next180
  %117 = load float, ptr %116, align 8, !tbaa !13
  %118 = fadd float %113, %117
  %119 = fcmp olt float %118, %.1109
  %120 = trunc nuw nsw i64 %indvars.iv.next180 to i32
  %.1112.1 = select i1 %119, i32 %120, i32 %.1112
  %.1109.1 = select i1 %119, float %118, float %.1109
  %indvars.iv.next180.1 = add nuw nsw i64 %indvars.iv179, 2
  %niter260.next.1 = add i64 %niter260, 2
  %niter260.ncmp.1 = icmp eq i64 %niter260.next.1, %unroll_iter259
  br i1 %niter260.ncmp.1, label %._crit_edge146.loopexit.unr-lcssa, label %.lr.ph145, !llvm.loop !23

._crit_edge146.loopexit.unr-lcssa:                ; preds = %.lr.ph145, %.lr.ph145.preheader
  %.1112.lcssa.ph = phi i32 [ poison, %.lr.ph145.preheader ], [ %.1112.1, %.lr.ph145 ]
  %indvars.iv179.unr = phi i64 [ 0, %.lr.ph145.preheader ], [ %indvars.iv.next180.1, %.lr.ph145 ]
  %.0108143.unr = phi float [ 0.000000e+00, %.lr.ph145.preheader ], [ %.1109.1, %.lr.ph145 ]
  %.0110142.unr = phi float [ 0.000000e+00, %.lr.ph145.preheader ], [ %118, %.lr.ph145 ]
  %.0111141.unr = phi i32 [ -1, %.lr.ph145.preheader ], [ %.1112.1, %.lr.ph145 ]
  %lcmp.mod257.not = icmp eq i64 %xtraiter256, 0
  br i1 %lcmp.mod257.not, label %._crit_edge146.loopexit, label %.lr.ph145.epil

.lr.ph145.epil:                                   ; preds = %._crit_edge146.loopexit.unr-lcssa
  %121 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %indvars.iv179.unr
  %122 = load float, ptr %121, align 8, !tbaa !13
  %123 = fadd float %.0110142.unr, %122
  %124 = fcmp olt float %123, %.0108143.unr
  %125 = trunc nuw nsw i64 %indvars.iv179.unr to i32
  %.1112.epil = select i1 %124, i32 %125, i32 %.0111141.unr
  br label %._crit_edge146.loopexit

._crit_edge146.loopexit:                          ; preds = %._crit_edge146.loopexit.unr-lcssa, %.lr.ph145.epil
  %.1112.lcssa = phi i32 [ %.1112.lcssa.ph, %._crit_edge146.loopexit.unr-lcssa ], [ %.1112.epil, %.lr.ph145.epil ]
  %126 = add nsw i32 %.1112.lcssa, 1
  br label %._crit_edge146

._crit_edge146:                                   ; preds = %._crit_edge137, %._crit_edge137.thread, %._crit_edge146.loopexit, %.preheader121
  %127 = phi i64 [ %80, %.preheader121 ], [ %80, %._crit_edge146.loopexit ], [ %80, %._crit_edge137 ], [ %61, %._crit_edge137.thread ]
  %.0111.lcssa = phi i32 [ 0, %.preheader121 ], [ %126, %._crit_edge146.loopexit ], [ 0, %._crit_edge137 ], [ 0, %._crit_edge137.thread ]
  %128 = icmp sgt i32 %2, -1
  br i1 %128, label %.lr.ph150.preheader, label %.loopexit

.lr.ph150.preheader:                              ; preds = %._crit_edge146
  %129 = srem i32 %.0111.lcssa, %2
  %130 = sext i32 %129 to i64
  br label %.lr.ph150

.lr.ph150:                                        ; preds = %.lr.ph150.preheader, %.lr.ph150
  %indvars.iv184 = phi i64 [ %130, %.lr.ph150.preheader ], [ %indvars.iv.next185, %.lr.ph150 ]
  %131 = getelementptr inbounds [64 x %"struct.HDR_Encode::a"], ptr %5, i64 0, i64 %indvars.iv184, i32 1
  %132 = load i32, ptr %131, align 4, !tbaa !15
  %133 = sext i32 %132 to i64
  %134 = getelementptr inbounds i32, ptr %3, i64 %133
  %135 = load i32, ptr %134, align 4, !tbaa !11
  %136 = add nsw i32 %135, 1
  store i32 %136, ptr %134, align 4, !tbaa !11
  %indvars.iv.next185 = add nsw i64 %indvars.iv184, 1
  %137 = icmp slt i64 %indvars.iv.next185, %127
  br i1 %137, label %.lr.ph150, label %.loopexit120, !llvm.loop !24

.loopexit120:                                     ; preds = %.lr.ph150, %._crit_edge131
  %138 = load i32, ptr %3, align 4, !tbaa !11
  br i1 %7, label %.lr.ph154.preheader, label %.preheader118

.lr.ph154.preheader:                              ; preds = %.loopexit120
  %wide.trip.count190 = zext nneg i32 %2 to i64
  %139 = add nsw i64 %wide.trip.count190, -1
  %min.iters.check221 = icmp ult i32 %2, 9
  br i1 %min.iters.check221, label %.lr.ph154.preheader247, label %vector.ph222

.lr.ph154.preheader247:                           ; preds = %middle.block219, %.lr.ph154.preheader
  %indvars.iv187.ph = phi i64 [ 1, %.lr.ph154.preheader ], [ %ind.end, %middle.block219 ]
  %.0106151.ph = phi i32 [ %138, %.lr.ph154.preheader ], [ %145, %middle.block219 ]
  br label %.lr.ph154

vector.ph222:                                     ; preds = %.lr.ph154.preheader
  %n.vec224 = and i64 %139, -8
  %ind.end = or disjoint i64 %n.vec224, 1
  %minmax.ident.splatinsert = insertelement <4 x i32> poison, i32 %138, i64 0
  %minmax.ident.splat = shufflevector <4 x i32> %minmax.ident.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body226

vector.body226:                                   ; preds = %vector.body226, %vector.ph222
  %index227 = phi i64 [ 0, %vector.ph222 ], [ %index.next230, %vector.body226 ]
  %vec.phi = phi <4 x i32> [ %minmax.ident.splat, %vector.ph222 ], [ %142, %vector.body226 ]
  %vec.phi228 = phi <4 x i32> [ %minmax.ident.splat, %vector.ph222 ], [ %143, %vector.body226 ]
  %offset.idx = or disjoint i64 %index227, 1
  %140 = getelementptr inbounds i32, ptr %3, i64 %offset.idx
  %141 = getelementptr inbounds i8, ptr %140, i64 16
  %wide.load = load <4 x i32>, ptr %140, align 4, !tbaa !11
  %wide.load229 = load <4 x i32>, ptr %141, align 4, !tbaa !11
  %142 = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %vec.phi, <4 x i32> %wide.load)
  %143 = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %vec.phi228, <4 x i32> %wide.load229)
  %index.next230 = add nuw i64 %index227, 8
  %144 = icmp eq i64 %index.next230, %n.vec224
  br i1 %144, label %middle.block219, label %vector.body226, !llvm.loop !25

middle.block219:                                  ; preds = %vector.body226
  %rdx.minmax = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %142, <4 x i32> %143)
  %145 = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> %rdx.minmax)
  %cmp.n = icmp eq i64 %139, %n.vec224
  br i1 %cmp.n, label %.preheader118, label %.lr.ph154.preheader247

.preheader118:                                    ; preds = %.lr.ph154, %middle.block219, %.loopexit120
  %.0106.lcssa = phi i32 [ %138, %.loopexit120 ], [ %145, %middle.block219 ], [ %.0106., %.lr.ph154 ]
  br i1 %33, label %.lr.ph157.preheader, label %.loopexit

.lr.ph157.preheader:                              ; preds = %.preheader118
  %wide.trip.count195 = zext nneg i32 %2 to i64
  %min.iters.check233 = icmp ult i32 %2, 8
  br i1 %min.iters.check233, label %.lr.ph157.preheader246, label %vector.ph234

.lr.ph157.preheader246:                           ; preds = %middle.block231, %.lr.ph157.preheader
  %indvars.iv192.ph = phi i64 [ 0, %.lr.ph157.preheader ], [ %n.vec236, %middle.block231 ]
  br label %.lr.ph157

vector.ph234:                                     ; preds = %.lr.ph157.preheader
  %n.vec236 = and i64 %wide.trip.count195, 2147483640
  %broadcast.splatinsert242 = insertelement <4 x i32> poison, i32 %.0106.lcssa, i64 0
  %broadcast.splat243 = shufflevector <4 x i32> %broadcast.splatinsert242, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body238

vector.body238:                                   ; preds = %vector.body238, %vector.ph234
  %index239 = phi i64 [ 0, %vector.ph234 ], [ %index.next244, %vector.body238 ]
  %146 = getelementptr inbounds i32, ptr %3, i64 %index239
  %147 = getelementptr inbounds i8, ptr %146, i64 16
  %wide.load240 = load <4 x i32>, ptr %146, align 4, !tbaa !11
  %wide.load241 = load <4 x i32>, ptr %147, align 4, !tbaa !11
  %148 = sub nsw <4 x i32> %wide.load240, %broadcast.splat243
  %149 = sub nsw <4 x i32> %wide.load241, %broadcast.splat243
  store <4 x i32> %148, ptr %146, align 4, !tbaa !11
  store <4 x i32> %149, ptr %147, align 4, !tbaa !11
  %index.next244 = add nuw i64 %index239, 8
  %150 = icmp eq i64 %index.next244, %n.vec236
  br i1 %150, label %middle.block231, label %vector.body238, !llvm.loop !26

middle.block231:                                  ; preds = %vector.body238
  %cmp.n245 = icmp eq i64 %n.vec236, %wide.trip.count195
  br i1 %cmp.n245, label %.loopexit, label %.lr.ph157.preheader246

.lr.ph154:                                        ; preds = %.lr.ph154.preheader247, %.lr.ph154
  %indvars.iv187 = phi i64 [ %indvars.iv.next188, %.lr.ph154 ], [ %indvars.iv187.ph, %.lr.ph154.preheader247 ]
  %.0106151 = phi i32 [ %.0106., %.lr.ph154 ], [ %.0106151.ph, %.lr.ph154.preheader247 ]
  %151 = getelementptr inbounds i32, ptr %3, i64 %indvars.iv187
  %152 = load i32, ptr %151, align 4, !tbaa !11
  %.0106. = call i32 @llvm.smin.i32(i32 %.0106151, i32 %152)
  %indvars.iv.next188 = add nuw nsw i64 %indvars.iv187, 1
  %exitcond191.not = icmp eq i64 %indvars.iv.next188, %wide.trip.count190
  br i1 %exitcond191.not, label %.preheader118, label %.lr.ph154, !llvm.loop !27

.lr.ph157:                                        ; preds = %.lr.ph157.preheader246, %.lr.ph157
  %indvars.iv192 = phi i64 [ %indvars.iv.next193, %.lr.ph157 ], [ %indvars.iv192.ph, %.lr.ph157.preheader246 ]
  %153 = getelementptr inbounds i32, ptr %3, i64 %indvars.iv192
  %154 = load i32, ptr %153, align 4, !tbaa !11
  %155 = sub nsw i32 %154, %.0106.lcssa
  store i32 %155, ptr %153, align 4, !tbaa !11
  %indvars.iv.next193 = add nuw nsw i64 %indvars.iv192, 1
  %exitcond196.not = icmp eq i64 %indvars.iv.next193, %wide.trip.count195
  br i1 %exitcond196.not, label %.loopexit, label %.lr.ph157, !llvm.loop !28

.loopexit:                                        ; preds = %.lr.ph157, %middle.block231, %._crit_edge146, %.lr.ph159.preheader, %.preheader118, %.preheader
  call void @llvm.lifetime.end.p0(i64 512, ptr nonnull %5) #7
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #5

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #5

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i32> @llvm.smin.v4i32(<4 x i32>, <4 x i32>) #5

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.smin.v4i32(<4 x i32>) #5

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"_ZTSN10HDR_Encode1aE", !6, i64 0, !12, i64 4}
!15 = !{!14, !12, i64 4}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10, !18, !19}
!18 = !{!"llvm.loop.isvectorized", i32 1}
!19 = !{!"llvm.loop.unroll.runtime.disable"}
!20 = distinct !{!20, !10, !19, !18}
!21 = distinct !{!21, !10, !18, !19}
!22 = distinct !{!22, !10, !19, !18}
!23 = distinct !{!23, !10}
!24 = distinct !{!24, !10}
!25 = distinct !{!25, !10, !18, !19}
!26 = distinct !{!26, !10, !18, !19}
!27 = distinct !{!27, !10, !19, !18}
!28 = distinct !{!28, !10, !19, !18}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopIdiomRecognizePass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass