; LLVM IR from intel/qpl :: sources/core-sw/src/filtering (qplc_expand)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @px_qplc_expand_8u(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store ptr %3, ptr %9, align 8, !tbaa !5
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 0, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  store i32 0, ptr %12, align 4, !tbaa !9
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %13

13:                                               ; preds = %47, %5
  %14 = load i32, ptr %12, align 4, !tbaa !9
  %15 = load ptr, ptr %9, align 8, !tbaa !5
  %16 = load i32, ptr %15, align 4, !tbaa !9
  %17 = icmp ult i32 %14, %16
  br i1 %17, label %18, label %50

18:                                               ; preds = %13
  %19 = load ptr, ptr %8, align 8, !tbaa !5
  %20 = load i32, ptr %12, align 4, !tbaa !9
  %21 = zext i32 %20 to i64
  %22 = getelementptr inbounds i8, ptr %19, i64 %21
  %23 = load i8, ptr %22, align 1, !tbaa !11
  %24 = icmp ne i8 %23, 0
  br i1 %24, label %25, label %41

25:                                               ; preds = %18
  %26 = load i32, ptr %11, align 4, !tbaa !9
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = icmp uge i32 %26, %27
  br i1 %28, label %29, label %30

29:                                               ; preds = %25
  br label %50

30:                                               ; preds = %25
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = load i32, ptr %11, align 4, !tbaa !9
  %33 = add i32 %32, 1
  store i32 %33, ptr %11, align 4, !tbaa !9
  %34 = zext i32 %32 to i64
  %35 = getelementptr inbounds i8, ptr %31, i64 %34
  %36 = load i8, ptr %35, align 1, !tbaa !11
  %37 = load ptr, ptr %10, align 8, !tbaa !5
  %38 = load i32, ptr %12, align 4, !tbaa !9
  %39 = zext i32 %38 to i64
  %40 = getelementptr inbounds i8, ptr %37, i64 %39
  store i8 %36, ptr %40, align 1, !tbaa !11
  br label %46

41:                                               ; preds = %18
  %42 = load ptr, ptr %10, align 8, !tbaa !5
  %43 = load i32, ptr %12, align 4, !tbaa !9
  %44 = zext i32 %43 to i64
  %45 = getelementptr inbounds i8, ptr %42, i64 %44
  store i8 0, ptr %45, align 1, !tbaa !11
  br label %46

46:                                               ; preds = %41, %30
  br label %47

47:                                               ; preds = %46
  %48 = load i32, ptr %12, align 4, !tbaa !9
  %49 = add i32 %48, 1
  store i32 %49, ptr %12, align 4, !tbaa !9
  br label %13, !llvm.loop !12

50:                                               ; preds = %29, %13
  %51 = load i32, ptr %12, align 4, !tbaa !9
  %52 = load ptr, ptr %9, align 8, !tbaa !5
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = sub i32 %53, %51
  store i32 %54, ptr %52, align 4, !tbaa !9
  %55 = load i32, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  ret i32 %55
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local i32 @px_qplc_expand_8u(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #0 {
  %6 = load i32, ptr %3, align 4, !tbaa !5
  %.not25 = icmp eq i32 %6, 0
  br i1 %.not25, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %5, %16
  %indvars.iv = phi i64 [ %indvars.iv.next, %16 ], [ 0, %5 ]
  %7 = phi i32 [ %18, %16 ], [ %6, %5 ]
  %.01517 = phi i32 [ %.1, %16 ], [ 0, %5 ]
  %8 = getelementptr inbounds i8, ptr %2, i64 %indvars.iv
  %9 = load i8, ptr %8, align 1, !tbaa !9
  %.not = icmp eq i8 %9, 0
  br i1 %.not, label %16, label %10

10:                                               ; preds = %.lr.ph
  %.not16 = icmp ult i32 %.01517, %1
  br i1 %.not16, label %11, label %._crit_edge.loopexit

11:                                               ; preds = %10
  %12 = add nuw i32 %.01517, 1
  %13 = zext i32 %.01517 to i64
  %14 = getelementptr inbounds i8, ptr %0, i64 %13
  %15 = load i8, ptr %14, align 1, !tbaa !9
  br label %16

16:                                               ; preds = %.lr.ph, %11
  %.sink = phi i8 [ %15, %11 ], [ 0, %.lr.ph ]
  %.1 = phi i32 [ %12, %11 ], [ %.01517, %.lr.ph ]
  %17 = getelementptr inbounds i8, ptr %4, i64 %indvars.iv
  store i8 %.sink, ptr %17, align 1, !tbaa !9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = zext i32 %18 to i64
  %20 = icmp ult i64 %indvars.iv.next, %19
  br i1 %20, label %.lr.ph, label %._crit_edge.loopexit, !llvm.loop !10

._crit_edge.loopexit:                             ; preds = %10, %16
  %.015.lcssa.ph = phi i32 [ %.1, %16 ], [ %.01517, %10 ]
  %.0.lcssa.ph.in = phi i64 [ %indvars.iv.next, %16 ], [ %indvars.iv, %10 ]
  %.lcssa.ph = phi i32 [ %18, %16 ], [ %7, %10 ]
  %.0.lcssa.ph = trunc i64 %.0.lcssa.ph.in to i32
  %21 = sub i32 %.lcssa.ph, %.0.lcssa.ph
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %5
  %.015.lcssa = phi i32 [ 0, %5 ], [ %.015.lcssa.ph, %._crit_edge.loopexit ]
  %22 = phi i32 [ 0, %5 ], [ %21, %._crit_edge.loopexit ]
  store i32 %22, ptr %3, align 4, !tbaa !5
  ret i32 %.015.lcssa
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass