; LLVM IR from intel/qpl :: sources/middle-layer/common/bit_buffer.ll (ZN3qpl2ml10bit_reader10shift_bitsEh)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.qpl::ml::bit_reader" = type <{ ptr, ptr, ptr, i8, [7 x i8], i64, i8, i8, i8, [5 x i8] }>

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN3qpl2ml10bit_reader10shift_bitsEh(ptr noundef nonnull align 8 dereferenceable(43) %0, i8 noundef zeroext %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i8 %1, ptr %4, align 1, !tbaa !9
  %5 = load ptr, ptr %3, align 8
  %6 = getelementptr inbounds %"class.qpl::ml::bit_reader", ptr %5, i32 0, i32 6
  %7 = load i8, ptr %6, align 8, !tbaa !10
  %8 = zext i8 %7 to i32
  %9 = load i8, ptr %4, align 1, !tbaa !9
  %10 = zext i8 %9 to i32
  %11 = icmp sgt i32 %8, %10
  br i1 %11, label %12, label %26

12:                                               ; preds = %2
  %13 = load i8, ptr %4, align 1, !tbaa !9
  %14 = zext i8 %13 to i32
  %15 = getelementptr inbounds %"class.qpl::ml::bit_reader", ptr %5, i32 0, i32 5
  %16 = load i64, ptr %15, align 8, !tbaa !14
  %17 = zext i32 %14 to i64
  %18 = lshr i64 %16, %17
  store i64 %18, ptr %15, align 8, !tbaa !14
  %19 = load i8, ptr %4, align 1, !tbaa !9
  %20 = zext i8 %19 to i32
  %21 = getelementptr inbounds %"class.qpl::ml::bit_reader", ptr %5, i32 0, i32 6
  %22 = load i8, ptr %21, align 8, !tbaa !10
  %23 = zext i8 %22 to i32
  %24 = sub nsw i32 %23, %20
  %25 = trunc i32 %24 to i8
  store i8 %25, ptr %21, align 8, !tbaa !10
  br label %29

26:                                               ; preds = %2
  %27 = getelementptr inbounds %"class.qpl::ml::bit_reader", ptr %5, i32 0, i32 5
  store i64 0, ptr %27, align 8, !tbaa !14
  %28 = getelementptr inbounds %"class.qpl::ml::bit_reader", ptr %5, i32 0, i32 6
  store i8 0, ptr %28, align 8, !tbaa !10
  br label %29

29:                                               ; preds = %26, %12
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !7, i64 40}
!11 = !{!"_ZTSN3qpl2ml10bit_readerE", !6, i64 0, !6, i64 8, !6, i64 16, !7, i64 24, !12, i64 32, !7, i64 40, !13, i64 41, !13, i64 42}
!12 = !{!"long", !7, i64 0}
!13 = !{!"bool", !7, i64 0}
!14 = !{!11, !12, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local void @_ZN3qpl2ml10bit_reader10shift_bitsEh(ptr nocapture noundef nonnull align 8 dereferenceable(43) %0, i8 noundef zeroext %1) local_unnamed_addr #0 align 2 {
  %3 = getelementptr inbounds i8, ptr %0, i64 40
  %4 = load i8, ptr %3, align 8, !tbaa !5
  %5 = icmp ugt i8 %4, %1
  %6 = getelementptr inbounds i8, ptr %0, i64 32
  br i1 %5, label %7, label %12

7:                                                ; preds = %2
  %8 = load i64, ptr %6, align 8, !tbaa !12
  %9 = zext nneg i8 %1 to i64
  %10 = lshr i64 %8, %9
  store i64 %10, ptr %6, align 8, !tbaa !12
  %11 = sub i8 %4, %1
  br label %13

12:                                               ; preds = %2
  store i64 0, ptr %6, align 8, !tbaa !12
  br label %13

13:                                               ; preds = %12, %7
  %storemerge = phi i8 [ 0, %12 ], [ %11, %7 ]
  store i8 %storemerge, ptr %3, align 8, !tbaa !5
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !8, i64 40}
!6 = !{!"_ZTSN3qpl2ml10bit_readerE", !7, i64 0, !7, i64 8, !7, i64 16, !8, i64 24, !10, i64 32, !8, i64 40, !11, i64 41, !11, i64 42}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"bool", !8, i64 0}
!12 = !{!6, !10, i64 32}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass