; LLVM IR from intel/qpl :: sources/core-sw/src/filtering (qplc_aggregates)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @px_qplc_aggregates_16u(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5) #1 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store ptr %2, ptr %9, align 8, !tbaa !5
  store ptr %3, ptr %10, align 8, !tbaa !5
  store ptr %4, ptr %11, align 8, !tbaa !5
  store ptr %5, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #2
  %15 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %15, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %16

16:                                               ; preds = %75, %6
  %17 = load i32, ptr %14, align 4, !tbaa !9
  %18 = load i32, ptr %8, align 4, !tbaa !9
  %19 = icmp ult i32 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  br label %78

21:                                               ; preds = %16
  %22 = load ptr, ptr %13, align 8, !tbaa !5
  %23 = load i32, ptr %14, align 4, !tbaa !9
  %24 = zext i32 %23 to i64
  %25 = getelementptr inbounds i16, ptr %22, i64 %24
  %26 = load i16, ptr %25, align 2, !tbaa !11
  %27 = zext i16 %26 to i32
  %28 = load ptr, ptr %11, align 8, !tbaa !5
  %29 = load i32, ptr %28, align 4, !tbaa !9
  %30 = add i32 %29, %27
  store i32 %30, ptr %28, align 4, !tbaa !9
  %31 = load ptr, ptr %13, align 8, !tbaa !5
  %32 = load i32, ptr %14, align 4, !tbaa !9
  %33 = zext i32 %32 to i64
  %34 = getelementptr inbounds i16, ptr %31, i64 %33
  %35 = load i16, ptr %34, align 2, !tbaa !11
  %36 = zext i16 %35 to i32
  %37 = load ptr, ptr %9, align 8, !tbaa !5
  %38 = load i32, ptr %37, align 4, !tbaa !9
  %39 = icmp ult i32 %36, %38
  br i1 %39, label %40, label %47

40:                                               ; preds = %21
  %41 = load ptr, ptr %13, align 8, !tbaa !5
  %42 = load i32, ptr %14, align 4, !tbaa !9
  %43 = zext i32 %42 to i64
  %44 = getelementptr inbounds i16, ptr %41, i64 %43
  %45 = load i16, ptr %44, align 2, !tbaa !11
  %46 = zext i16 %45 to i32
  br label %50

47:                                               ; preds = %21
  %48 = load ptr, ptr %9, align 8, !tbaa !5
  %49 = load i32, ptr %48, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %47, %40
  %51 = phi i32 [ %46, %40 ], [ %49, %47 ]
  %52 = load ptr, ptr %9, align 8, !tbaa !5
  store i32 %51, ptr %52, align 4, !tbaa !9
  %53 = load ptr, ptr %13, align 8, !tbaa !5
  %54 = load i32, ptr %14, align 4, !tbaa !9
  %55 = zext i32 %54 to i64
  %56 = getelementptr inbounds i16, ptr %53, i64 %55
  %57 = load i16, ptr %56, align 2, !tbaa !11
  %58 = zext i16 %57 to i32
  %59 = load ptr, ptr %10, align 8, !tbaa !5
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = icmp ugt i32 %58, %60
  br i1 %61, label %62, label %69

62:                                               ; preds = %50
  %63 = load ptr, ptr %13, align 8, !tbaa !5
  %64 = load i32, ptr %14, align 4, !tbaa !9
  %65 = zext i32 %64 to i64
  %66 = getelementptr inbounds i16, ptr %63, i64 %65
  %67 = load i16, ptr %66, align 2, !tbaa !11
  %68 = zext i16 %67 to i32
  br label %72

69:                                               ; preds = %50
  %70 = load ptr, ptr %10, align 8, !tbaa !5
  %71 = load i32, ptr %70, align 4, !tbaa !9
  br label %72

72:                                               ; preds = %69, %62
  %73 = phi i32 [ %68, %62 ], [ %71, %69 ]
  %74 = load ptr, ptr %10, align 8, !tbaa !5
  store i32 %73, ptr %74, align 4, !tbaa !9
  br label %75

75:                                               ; preds = %72
  %76 = load i32, ptr %14, align 4, !tbaa !9
  %77 = add i32 %76, 1
  store i32 %77, ptr %14, align 4, !tbaa !9
  br label %16, !llvm.loop !13

78:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local void @px_qplc_aggregates_16u(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef %2, ptr nocapture noundef %3, ptr nocapture noundef %4, ptr nocapture noundef readnone %5) local_unnamed_addr #0 {
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %6
  %wide.trip.count = zext i32 %1 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %7 = icmp eq i32 %1, 1
  br i1 %7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %wide.trip.count, 4294967294
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.1, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %8 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv.unr
  %9 = load i16, ptr %8, align 2, !tbaa !5
  %10 = zext i16 %9 to i32
  %11 = load i32, ptr %4, align 4, !tbaa !9
  %12 = add i32 %11, %10
  store i32 %12, ptr %4, align 4, !tbaa !9
  %13 = load i32, ptr %2, align 4, !tbaa !9
  %..epil = tail call i32 @llvm.umin.i32(i32 %13, i32 %10)
  store i32 %..epil, ptr %2, align 4, !tbaa !9
  %14 = load i32, ptr %3, align 4, !tbaa !9
  %15 = tail call i32 @llvm.umax.i32(i32 %14, i32 %10)
  store i32 %15, ptr %3, align 4, !tbaa !9
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.epil, %._crit_edge.loopexit.unr-lcssa, %6
  ret void

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %16 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv
  %17 = load i16, ptr %16, align 2, !tbaa !5
  %18 = zext i16 %17 to i32
  %19 = load i32, ptr %4, align 4, !tbaa !9
  %20 = add i32 %19, %18
  store i32 %20, ptr %4, align 4, !tbaa !9
  %21 = load i32, ptr %2, align 4, !tbaa !9
  %. = tail call i32 @llvm.umin.i32(i32 %21, i32 %18)
  store i32 %., ptr %2, align 4, !tbaa !9
  %22 = load i32, ptr %3, align 4, !tbaa !9
  %23 = tail call i32 @llvm.umax.i32(i32 %22, i32 %18)
  store i32 %23, ptr %3, align 4, !tbaa !9
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %24 = getelementptr inbounds i16, ptr %0, i64 %indvars.iv.next
  %25 = load i16, ptr %24, align 2, !tbaa !5
  %26 = zext i16 %25 to i32
  %27 = load i32, ptr %4, align 4, !tbaa !9
  %28 = add i32 %27, %26
  store i32 %28, ptr %4, align 4, !tbaa !9
  %29 = load i32, ptr %2, align 4, !tbaa !9
  %..1 = tail call i32 @llvm.umin.i32(i32 %29, i32 %26)
  store i32 %..1, ptr %2, align 4, !tbaa !9
  %30 = load i32, ptr %3, align 4, !tbaa !9
  %31 = tail call i32 @llvm.umax.i32(i32 %30, i32 %26)
  store i32 %31, ptr %3, align 4, !tbaa !9
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !11
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #1

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass