; LLVM IR from codemistic/Data-Structures-and-Algorithms :: graph/code19.ll (Z9dist_minmPSt6vectorIiSaIiEEiRS_IbSaIbEERS1_S6_RiiS5_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z9dist_minmPSt6vectorIiSaIiEEiRS_IbSaIbEERS1_S6_RiiS5_(ptr noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(40) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 4 dereferenceable(4) %5, i32 noundef %6, ptr noundef nonnull align 8 dereferenceable(40) %7) #0 {
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca i32, align 4
  %16 = alloca ptr, align 8
  %17 = alloca %"struct.std::_Bit_reference", align 8
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca %"struct.std::_Bit_reference", align 8
  %22 = alloca %"struct.std::_Bit_reference", align 8
  %23 = alloca %"struct.std::_Bit_reference", align 8
  %24 = alloca %"struct.std::_Bit_reference", align 8
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i32 %1, ptr %10, align 4, !tbaa !9
  store ptr %2, ptr %11, align 8, !tbaa !5
  store ptr %3, ptr %12, align 8, !tbaa !5
  store ptr %4, ptr %13, align 8, !tbaa !5
  store ptr %5, ptr %14, align 8, !tbaa !5
  store i32 %6, ptr %15, align 4, !tbaa !9
  store ptr %7, ptr %16, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %17) #4
  %25 = load ptr, ptr %11, align 8, !tbaa !5
  %26 = load i32, ptr %10, align 4, !tbaa !9
  %27 = sext i32 %26 to i64
  %28 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %25, i64 noundef %27)
  %29 = getelementptr inbounds { ptr, i64 }, ptr %17, i32 0, i32 0
  %30 = extractvalue { ptr, i64 } %28, 0
  store ptr %30, ptr %29, align 8
  %31 = getelementptr inbounds { ptr, i64 }, ptr %17, i32 0, i32 1
  %32 = extractvalue { ptr, i64 } %28, 1
  store i64 %32, ptr %31, align 8
  %33 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %17, i1 noundef zeroext true) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %17) #4
  %34 = load ptr, ptr %14, align 8, !tbaa !5
  %35 = load i32, ptr %34, align 4, !tbaa !9
  %36 = load ptr, ptr %13, align 8, !tbaa !5
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %38) #4
  store i32 %35, ptr %39, align 4, !tbaa !9
  %40 = load ptr, ptr %12, align 8, !tbaa !5
  %41 = load i32, ptr %10, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #4
  store i32 %35, ptr %43, align 4, !tbaa !9
  %44 = load ptr, ptr %14, align 8, !tbaa !5
  %45 = load i32, ptr %44, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %44, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  store i32 0, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  store i32 0, ptr %19, align 4, !tbaa !9
  br label %47

47:                                               ; preds = %162, %8
  %48 = load i32, ptr %19, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  %50 = load ptr, ptr %9, align 8, !tbaa !5
  %51 = load i32, ptr %10, align 4, !tbaa !9
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds %"class.std::vector", ptr %50, i64 %52
  %54 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %53) #4
  %55 = icmp ult i64 %49, %54
  br i1 %55, label %57, label %56

56:                                               ; preds = %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  br label %165

57:                                               ; preds = %47
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %58 = load ptr, ptr %9, align 8, !tbaa !5
  %59 = load i32, ptr %10, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = getelementptr inbounds %"class.std::vector", ptr %58, i64 %60
  %62 = load i32, ptr %19, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %61, i64 noundef %63) #4
  %65 = load i32, ptr %64, align 4, !tbaa !9
  store i32 %65, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 16, ptr %21) #4
  %66 = load ptr, ptr %11, align 8, !tbaa !5
  %67 = load i32, ptr %20, align 4, !tbaa !9
  %68 = sext i32 %67 to i64
  %69 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %66, i64 noundef %68)
  %70 = getelementptr inbounds { ptr, i64 }, ptr %21, i32 0, i32 0
  %71 = extractvalue { ptr, i64 } %69, 0
  store ptr %71, ptr %70, align 8
  %72 = getelementptr inbounds { ptr, i64 }, ptr %21, i32 0, i32 1
  %73 = extractvalue { ptr, i64 } %69, 1
  store i64 %73, ptr %72, align 8
  %74 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %21) #4
  %75 = zext i1 %74 to i32
  %76 = icmp eq i32 %75, 0
  call void @llvm.lifetime.end.p0(i64 16, ptr %21) #4
  br i1 %76, label %77, label %127

77:                                               ; preds = %57
  %78 = load i32, ptr %18, align 4, !tbaa !9
  %79 = add nsw i32 %78, 1
  store i32 %79, ptr %18, align 4, !tbaa !9
  %80 = load ptr, ptr %9, align 8, !tbaa !5
  %81 = load i32, ptr %20, align 4, !tbaa !9
  %82 = load ptr, ptr %11, align 8, !tbaa !5
  %83 = load ptr, ptr %12, align 8, !tbaa !5
  %84 = load ptr, ptr %13, align 8, !tbaa !5
  %85 = load ptr, ptr %14, align 8, !tbaa !5
  %86 = load i32, ptr %10, align 4, !tbaa !9
  %87 = load ptr, ptr %16, align 8, !tbaa !5
  call void @_Z9dist_minmPSt6vectorIiSaIiEEiRS_IbSaIbEERS1_S6_RiiS5_(ptr noundef %80, i32 noundef %81, ptr noundef nonnull align 8 dereferenceable(40) %82, ptr noundef nonnull align 8 dereferenceable(24) %83, ptr noundef nonnull align 8 dereferenceable(24) %84, ptr noundef nonnull align 4 dereferenceable(4) %85, i32 noundef %86, ptr noundef nonnull align 8 dereferenceable(40) %87)
  %88 = load ptr, ptr %13, align 8, !tbaa !5
  %89 = load i32, ptr %10, align 4, !tbaa !9
  %90 = sext i32 %89 to i64
  %91 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %90) #4
  %92 = load ptr, ptr %13, align 8, !tbaa !5
  %93 = load i32, ptr %20, align 4, !tbaa !9
  %94 = sext i32 %93 to i64
  %95 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %92, i64 noundef %94) #4
  %96 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %91, ptr noundef nonnull align 4 dereferenceable(4) %95)
  %97 = load i32, ptr %96, align 4, !tbaa !9
  %98 = load ptr, ptr %13, align 8, !tbaa !5
  %99 = load i32, ptr %10, align 4, !tbaa !9
  %100 = sext i32 %99 to i64
  %101 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %100) #4
  store i32 %97, ptr %101, align 4, !tbaa !9
  %102 = load ptr, ptr %13, align 8, !tbaa !5
  %103 = load i32, ptr %20, align 4, !tbaa !9
  %104 = sext i32 %103 to i64
  %105 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %102, i64 noundef %104) #4
  %106 = load i32, ptr %105, align 4, !tbaa !9
  %107 = load ptr, ptr %12, align 8, !tbaa !5
  %108 = load i32, ptr %10, align 4, !tbaa !9
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %109) #4
  %111 = load i32, ptr %110, align 4, !tbaa !9
  %112 = icmp sge i32 %106, %111
  br i1 %112, label %113, label %126

113:                                              ; preds = %77
  %114 = load i32, ptr %15, align 4, !tbaa !9
  %115 = icmp ne i32 %114, -1
  br i1 %115, label %116, label %126

116:                                              ; preds = %113
  call void @llvm.lifetime.start.p0(i64 16, ptr %22) #4
  %117 = load ptr, ptr %16, align 8, !tbaa !5
  %118 = load i32, ptr %10, align 4, !tbaa !9
  %119 = sext i32 %118 to i64
  %120 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %117, i64 noundef %119)
  %121 = getelementptr inbounds { ptr, i64 }, ptr %22, i32 0, i32 0
  %122 = extractvalue { ptr, i64 } %120, 0
  store ptr %122, ptr %121, align 8
  %123 = getelementptr inbounds { ptr, i64 }, ptr %22, i32 0, i32 1
  %124 = extractvalue { ptr, i64 } %120, 1
  store i64 %124, ptr %123, align 8
  %125 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %22, i1 noundef zeroext true) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %22) #4
  br label %126

126:                                              ; preds = %116, %113, %77
  br label %161

127:                                              ; preds = %57
  call void @llvm.lifetime.start.p0(i64 16, ptr %23) #4
  %128 = load ptr, ptr %11, align 8, !tbaa !5
  %129 = load i32, ptr %20, align 4, !tbaa !9
  %130 = sext i32 %129 to i64
  %131 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %128, i64 noundef %130)
  %132 = getelementptr inbounds { ptr, i64 }, ptr %23, i32 0, i32 0
  %133 = extractvalue { ptr, i64 } %131, 0
  store ptr %133, ptr %132, align 8
  %134 = getelementptr inbounds { ptr, i64 }, ptr %23, i32 0, i32 1
  %135 = extractvalue { ptr, i64 } %131, 1
  store i64 %135, ptr %134, align 8
  %136 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %23) #4
  %137 = zext i1 %136 to i32
  %138 = icmp eq i32 %137, 1
  br i1 %138, label %139, label %143

139:                                              ; preds = %127
  %140 = load i32, ptr %20, align 4, !tbaa !9
  %141 = load i32, ptr %15, align 4, !tbaa !9
  %142 = icmp ne i32 %140, %141
  br label %143

143:                                              ; preds = %139, %127
  %144 = phi i1 [ false, %127 ], [ %142, %139 ]
  call void @llvm.lifetime.end.p0(i64 16, ptr %23) #4
  br i1 %144, label %145, label %160

145:                                              ; preds = %143
  %146 = load ptr, ptr %12, align 8, !tbaa !5
  %147 = load i32, ptr %20, align 4, !tbaa !9
  %148 = sext i32 %147 to i64
  %149 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %146, i64 noundef %148) #4
  %150 = load ptr, ptr %13, align 8, !tbaa !5
  %151 = load i32, ptr %10, align 4, !tbaa !9
  %152 = sext i32 %151 to i64
  %153 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %150, i64 noundef %152) #4
  %154 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %149, ptr noundef nonnull align 4 dereferenceable(4) %153)
  %155 = load i32, ptr %154, align 4, !tbaa !9
  %156 = load ptr, ptr %13, align 8, !tbaa !5
  %157 = load i32, ptr %10, align 4, !tbaa !9
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %156, i64 noundef %158) #4
  store i32 %155, ptr %159, align 4, !tbaa !9
  br label %160

160:                                              ; preds = %145, %143
  br label %161

161:                                              ; preds = %160, %126
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  br label %162

162:                                              ; preds = %161
  %163 = load i32, ptr %19, align 4, !tbaa !9
  %164 = add nsw i32 %163, 1
  store i32 %164, ptr %19, align 4, !tbaa !9
  br label %47, !llvm.loop !11

165:                                              ; preds = %56
  %166 = load i32, ptr %15, align 4, !tbaa !9
  %167 = icmp eq i32 %166, -1
  br i1 %167, label %168, label %181

168:                                              ; preds = %165
  %169 = load i32, ptr %18, align 4, !tbaa !9
  %170 = icmp sgt i32 %169, 1
  br i1 %170, label %171, label %181

171:                                              ; preds = %168
  call void @llvm.lifetime.start.p0(i64 16, ptr %24) #4
  %172 = load ptr, ptr %16, align 8, !tbaa !5
  %173 = load i32, ptr %10, align 4, !tbaa !9
  %174 = sext i32 %173 to i64
  %175 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %172, i64 noundef %174)
  %176 = getelementptr inbounds { ptr, i64 }, ptr %24, i32 0, i32 0
  %177 = extractvalue { ptr, i64 } %175, 0
  store ptr %177, ptr %176, align 8
  %178 = getelementptr inbounds { ptr, i64 }, ptr %24, i32 0, i32 1
  %179 = extractvalue { ptr, i64 } %175, 1
  store i64 %179, ptr %178, align 8
  %180 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %24, i1 noundef zeroext true) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr %24) #4
  br label %181

181:                                              ; preds = %171, %168, %165
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"struct.std::_Bit_reference" = type { ptr, i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_Z9dist_minmPSt6vectorIiSaIiEEiRS_IbSaIbEERS1_S6_RiiS5_(ptr noundef %0, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(40) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4, ptr nocapture noundef nonnull align 4 dereferenceable(4) %5, i32 noundef %6, ptr noundef nonnull align 8 dereferenceable(40) %7) local_unnamed_addr #0 {
  %9 = alloca %"struct.std::_Bit_reference", align 8
  %10 = alloca %"struct.std::_Bit_reference", align 8
  %11 = alloca %"struct.std::_Bit_reference", align 8
  %12 = alloca %"struct.std::_Bit_reference", align 8
  %13 = alloca %"struct.std::_Bit_reference", align 8
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %9) #4
  %14 = sext i32 %1 to i64
  %15 = tail call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %2, i64 noundef %14)
  %16 = extractvalue { ptr, i64 } %15, 0
  store ptr %16, ptr %9, align 8
  %17 = getelementptr inbounds i8, ptr %9, i64 8
  %18 = extractvalue { ptr, i64 } %15, 1
  store i64 %18, ptr %17, align 8
  %19 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %9, i1 noundef zeroext true) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %9) #4
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %14) #4
  store i32 %20, ptr %21, align 4, !tbaa !5
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %14) #4
  store i32 %20, ptr %22, align 4, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %5, align 4, !tbaa !5
  %25 = getelementptr inbounds %"class.std::vector", ptr %0, i64 %14
  %26 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %25) #4
  %.not = icmp eq i64 %26, 0
  br i1 %.not, label %._crit_edge.thread, label %.lr.ph

.lr.ph:                                           ; preds = %8
  %27 = getelementptr inbounds i8, ptr %10, i64 8
  %28 = icmp ne i32 %6, -1
  %29 = getelementptr inbounds i8, ptr %11, i64 8
  %30 = getelementptr inbounds i8, ptr %12, i64 8
  br label %33

._crit_edge:                                      ; preds = %71
  %31 = icmp sgt i32 %.1, 1
  %32 = icmp eq i32 %6, -1
  %or.cond3 = select i1 %32, i1 %31, i1 false
  br i1 %or.cond3, label %74, label %._crit_edge.thread

33:                                               ; preds = %.lr.ph, %71
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %71 ]
  %.058 = phi i32 [ 0, %.lr.ph ], [ %.1, %71 ]
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %25, i64 noundef %indvars.iv) #4
  %35 = load i32, ptr %34, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %10) #4
  %36 = sext i32 %35 to i64
  %37 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %2, i64 noundef %36)
  %38 = extractvalue { ptr, i64 } %37, 0
  store ptr %38, ptr %10, align 8
  %39 = extractvalue { ptr, i64 } %37, 1
  store i64 %39, ptr %27, align 8
  %40 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %10) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %10) #4
  br i1 %40, label %58, label %41

41:                                               ; preds = %33
  %42 = add nsw i32 %.058, 1
  call void @_Z9dist_minmPSt6vectorIiSaIiEEiRS_IbSaIbEERS1_S6_RiiS5_(ptr noundef %0, i32 noundef %35, ptr noundef nonnull align 8 dereferenceable(40) %2, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %4, ptr noundef nonnull align 4 dereferenceable(4) %5, i32 noundef %1, ptr noundef nonnull align 8 dereferenceable(40) %7)
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %14) #4
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %36) #4
  %45 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %43, ptr noundef nonnull align 4 dereferenceable(4) %44)
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %14) #4
  store i32 %46, ptr %47, align 4, !tbaa !5
  %48 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %36) #4
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %14) #4
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = icmp sge i32 %49, %51
  %or.cond = and i1 %28, %52
  br i1 %or.cond, label %53, label %71

53:                                               ; preds = %41
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %11) #4
  %54 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %7, i64 noundef %14)
  %55 = extractvalue { ptr, i64 } %54, 0
  store ptr %55, ptr %11, align 8
  %56 = extractvalue { ptr, i64 } %54, 1
  store i64 %56, ptr %29, align 8
  %57 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %11, i1 noundef zeroext true) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %11) #4
  br label %71

58:                                               ; preds = %33
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %12) #4
  %59 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %2, i64 noundef %36)
  %60 = extractvalue { ptr, i64 } %59, 0
  store ptr %60, ptr %12, align 8
  %61 = extractvalue { ptr, i64 } %59, 1
  store i64 %61, ptr %30, align 8
  %62 = call noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %12) #4
  %63 = icmp ne i32 %35, %6
  %64 = and i1 %63, %62
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %12) #4
  br i1 %64, label %65, label %71

65:                                               ; preds = %58
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %36) #4
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %14) #4
  %68 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %66, ptr noundef nonnull align 4 dereferenceable(4) %67)
  %69 = load i32, ptr %68, align 4, !tbaa !5
  %70 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %4, i64 noundef %14) #4
  store i32 %69, ptr %70, align 4, !tbaa !5
  br label %71

71:                                               ; preds = %58, %65, %41, %53
  %.1 = phi i32 [ %42, %53 ], [ %42, %41 ], [ %.058, %65 ], [ %.058, %58 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %72 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %25) #4
  %73 = icmp ugt i64 %72, %indvars.iv.next
  br i1 %73, label %33, label %._crit_edge, !llvm.loop !9

74:                                               ; preds = %._crit_edge
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %13) #4
  %75 = call { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40) %7, i64 noundef %14)
  %76 = extractvalue { ptr, i64 } %75, 0
  store ptr %76, ptr %13, align 8
  %77 = getelementptr inbounds i8, ptr %13, i64 8
  %78 = extractvalue { ptr, i64 } %75, 1
  store i64 %78, ptr %77, align 8
  %79 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16) %13, i1 noundef zeroext true) #4
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %13) #4
  br label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %8, %74, %._crit_edge
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZNSt6vectorIbSaIbEEixEm(ptr noundef nonnull align 8 dereferenceable(40), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt14_Bit_referenceaSEb(ptr noundef nonnull align 8 dereferenceable(16), i1 noundef zeroext) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt14_Bit_referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass