; LLVM IR from The-Order-of-the-Simulation/Path-Tracing-Renderer :: cpu/main.ll (Z5crossRK4vec3S1_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.vec3 = type { float, float, float }

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5crossRK4vec3S1_(ptr dead_on_unwind noalias writable sret(%class.vec3) align 4 %0, ptr noundef nonnull align 4 dereferenceable(12) %1, ptr noundef nonnull align 4 dereferenceable(12) %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %7 = load ptr, ptr %5, align 8, !tbaa !5
  %8 = getelementptr inbounds %class.vec3, ptr %7, i32 0, i32 1
  %9 = load float, ptr %8, align 4, !tbaa !9
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = getelementptr inbounds %class.vec3, ptr %10, i32 0, i32 2
  %12 = load float, ptr %11, align 4, !tbaa !12
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %class.vec3, ptr %13, i32 0, i32 1
  %15 = load float, ptr %14, align 4, !tbaa !9
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = getelementptr inbounds %class.vec3, ptr %16, i32 0, i32 2
  %18 = load float, ptr %17, align 4, !tbaa !12
  %19 = fmul float %15, %18
  %20 = fneg float %19
  %21 = call float @llvm.fmuladd.f32(float %9, float %12, float %20)
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = getelementptr inbounds %class.vec3, ptr %22, i32 0, i32 2
  %24 = load float, ptr %23, align 4, !tbaa !12
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = getelementptr inbounds %class.vec3, ptr %25, i32 0, i32 0
  %27 = load float, ptr %26, align 4, !tbaa !13
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds %class.vec3, ptr %28, i32 0, i32 2
  %30 = load float, ptr %29, align 4, !tbaa !12
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %class.vec3, ptr %31, i32 0, i32 0
  %33 = load float, ptr %32, align 4, !tbaa !13
  %34 = fmul float %30, %33
  %35 = fneg float %34
  %36 = call float @llvm.fmuladd.f32(float %24, float %27, float %35)
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = getelementptr inbounds %class.vec3, ptr %37, i32 0, i32 0
  %39 = load float, ptr %38, align 4, !tbaa !13
  %40 = load ptr, ptr %6, align 8, !tbaa !5
  %41 = getelementptr inbounds %class.vec3, ptr %40, i32 0, i32 1
  %42 = load float, ptr %41, align 4, !tbaa !9
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = getelementptr inbounds %class.vec3, ptr %43, i32 0, i32 0
  %45 = load float, ptr %44, align 4, !tbaa !13
  %46 = load ptr, ptr %5, align 8, !tbaa !5
  %47 = getelementptr inbounds %class.vec3, ptr %46, i32 0, i32 1
  %48 = load float, ptr %47, align 4, !tbaa !9
  %49 = fmul float %45, %48
  %50 = fneg float %49
  %51 = call float @llvm.fmuladd.f32(float %39, float %42, float %50)
  call void @_ZN4vec3C2Efff(ptr noundef nonnull align 4 dereferenceable(12) %0, float noundef %21, float noundef %36, float noundef %51)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4vec3C2Efff(ptr noundef nonnull align 4 dereferenceable(12), float noundef, float noundef, float noundef) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"_ZTS4vec3", !11, i64 0, !11, i64 4, !11, i64 8}
!11 = !{!"float", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.vec3 = type { float, float, float }

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5crossRK4vec3S1_(ptr dead_on_unwind noalias nonnull writable sret(%class.vec3) align 4 %0, ptr nocapture noundef nonnull readonly align 4 dereferenceable(12) %1, ptr nocapture noundef nonnull readonly align 4 dereferenceable(12) %2) local_unnamed_addr #1 {
  %4 = getelementptr inbounds i8, ptr %1, i64 4
  %5 = load float, ptr %4, align 4, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %2, i64 8
  %7 = load float, ptr %6, align 4, !tbaa !10
  %8 = getelementptr inbounds i8, ptr %2, i64 4
  %9 = load float, ptr %8, align 4, !tbaa !5
  %10 = getelementptr inbounds i8, ptr %1, i64 8
  %11 = load float, ptr %10, align 4, !tbaa !10
  %12 = fneg float %9
  %13 = fmul float %11, %12
  %14 = tail call float @llvm.fmuladd.f32(float %5, float %7, float %13)
  %15 = load float, ptr %2, align 4, !tbaa !11
  %16 = load float, ptr %1, align 4, !tbaa !11
  %17 = fneg float %7
  %18 = fmul float %16, %17
  %19 = tail call float @llvm.fmuladd.f32(float %11, float %15, float %18)
  %20 = fneg float %15
  %21 = fmul float %5, %20
  %22 = tail call float @llvm.fmuladd.f32(float %16, float %9, float %21)
  tail call void @_ZN4vec3C2Efff(ptr noundef nonnull align 4 dereferenceable(12) %0, float noundef %14, float noundef %19, float noundef %22)
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN4vec3C2Efff(ptr noundef nonnull align 4 dereferenceable(12), float noundef, float noundef, float noundef) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"_ZTS4vec3", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"float", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 8}
!11 = !{!6, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,TailCallElimPass