; LLVM IR from Iotic-Labs/py-lz4framed :: lz4 (lz4hc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.LZ4HC_CCtx_internal = type { [32768 x i32], [65536 x i16], ptr, ptr, ptr, i32, i32, i32, i16, i8, i8, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @LZ4_saveDictHC(ptr noundef %0, ptr noundef %1, i32 noundef %2) #1 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %10 = load ptr, ptr %4, align 8, !tbaa !5
  store ptr %10, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %11 = load ptr, ptr %7, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %11, i32 0, i32 2
  %13 = load ptr, ptr %12, align 8, !tbaa !11
  %14 = load ptr, ptr %7, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %14, i32 0, i32 3
  %16 = load ptr, ptr %15, align 8, !tbaa !14
  %17 = load ptr, ptr %7, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %17, i32 0, i32 5
  %19 = load i32, ptr %18, align 8, !tbaa !15
  %20 = zext i32 %19 to i64
  %21 = getelementptr inbounds i8, ptr %16, i64 %20
  %22 = ptrtoint ptr %13 to i64
  %23 = ptrtoint ptr %21 to i64
  %24 = sub i64 %22, %23
  %25 = trunc i64 %24 to i32
  store i32 %25, ptr %8, align 4, !tbaa !9
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = icmp sgt i32 %26, 65536
  br i1 %27, label %28, label %29

28:                                               ; preds = %3
  store i32 65536, ptr %6, align 4, !tbaa !9
  br label %29

29:                                               ; preds = %28, %3
  %30 = load i32, ptr %6, align 4, !tbaa !9
  %31 = icmp slt i32 %30, 4
  br i1 %31, label %32, label %33

32:                                               ; preds = %29
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %32, %29
  %34 = load i32, ptr %6, align 4, !tbaa !9
  %35 = load i32, ptr %8, align 4, !tbaa !9
  %36 = icmp sgt i32 %34, %35
  br i1 %36, label %37, label %39

37:                                               ; preds = %33
  %38 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %38, ptr %6, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %37, %33
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %41, i32 0, i32 2
  %43 = load ptr, ptr %42, align 8, !tbaa !11
  %44 = load i32, ptr %6, align 4, !tbaa !9
  %45 = sext i32 %44 to i64
  %46 = sub i64 0, %45
  %47 = getelementptr inbounds i8, ptr %43, i64 %46
  %48 = load i32, ptr %6, align 4, !tbaa !9
  %49 = sext i32 %48 to i64
  call void @llvm.memmove.p0.p0.i64(ptr align 1 %40, ptr align 1 %47, i64 %49, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %50, i32 0, i32 2
  %52 = load ptr, ptr %51, align 8, !tbaa !11
  %53 = load ptr, ptr %7, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %53, i32 0, i32 3
  %55 = load ptr, ptr %54, align 8, !tbaa !14
  %56 = ptrtoint ptr %52 to i64
  %57 = ptrtoint ptr %55 to i64
  %58 = sub i64 %56, %57
  %59 = trunc i64 %58 to i32
  store i32 %59, ptr %9, align 4, !tbaa !9
  %60 = load ptr, ptr %5, align 8, !tbaa !5
  %61 = load i32, ptr %6, align 4, !tbaa !9
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds i8, ptr %60, i64 %62
  %64 = load ptr, ptr %7, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %64, i32 0, i32 2
  store ptr %63, ptr %65, align 8, !tbaa !11
  %66 = load ptr, ptr %7, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %66, i32 0, i32 2
  %68 = load ptr, ptr %67, align 8, !tbaa !11
  %69 = load i32, ptr %9, align 4, !tbaa !9
  %70 = zext i32 %69 to i64
  %71 = sub i64 0, %70
  %72 = getelementptr inbounds i8, ptr %68, i64 %71
  %73 = load ptr, ptr %7, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %73, i32 0, i32 3
  store ptr %72, ptr %74, align 8, !tbaa !14
  %75 = load i32, ptr %9, align 4, !tbaa !9
  %76 = load i32, ptr %6, align 4, !tbaa !9
  %77 = sub i32 %75, %76
  %78 = load ptr, ptr %7, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %78, i32 0, i32 5
  store i32 %77, ptr %79, align 8, !tbaa !15
  %80 = load i32, ptr %9, align 4, !tbaa !9
  %81 = load i32, ptr %6, align 4, !tbaa !9
  %82 = sub i32 %80, %81
  %83 = load ptr, ptr %7, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %83, i32 0, i32 6
  store i32 %82, ptr %84, align 4, !tbaa !16
  %85 = load ptr, ptr %7, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %85, i32 0, i32 7
  %87 = load i32, ptr %86, align 8, !tbaa !17
  %88 = load ptr, ptr %7, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %88, i32 0, i32 5
  %90 = load i32, ptr %89, align 8, !tbaa !15
  %91 = icmp ult i32 %87, %90
  br i1 %91, label %92, label %98

92:                                               ; preds = %39
  %93 = load ptr, ptr %7, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %93, i32 0, i32 5
  %95 = load i32, ptr %94, align 8, !tbaa !15
  %96 = load ptr, ptr %7, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.LZ4HC_CCtx_internal, ptr %96, i32 0, i32 7
  store i32 %95, ptr %97, align 8, !tbaa !17
  br label %98

98:                                               ; preds = %92, %39
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  %99 = load i32, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  ret i32 %99
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 262144}
!12 = !{!"LZ4HC_CCtx_internal", !7, i64 0, !7, i64 131072, !6, i64 262144, !6, i64 262152, !6, i64 262160, !10, i64 262168, !10, i64 262172, !10, i64 262176, !13, i64 262180, !7, i64 262182, !7, i64 262183, !6, i64 262184}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !6, i64 262152}
!15 = !{!12, !10, i64 262168}
!16 = !{!12, !10, i64 262172}
!17 = !{!12, !10, i64 262176}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define dso_local i32 @LZ4_saveDictHC(ptr nocapture noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = getelementptr inbounds i8, ptr %0, i64 262144
  %5 = load ptr, ptr %4, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %0, i64 262152
  %7 = load ptr, ptr %6, align 8, !tbaa !12
  %8 = getelementptr inbounds i8, ptr %0, i64 262168
  %9 = load i32, ptr %8, align 8, !tbaa !13
  %10 = zext i32 %9 to i64
  %11 = getelementptr inbounds i8, ptr %7, i64 %10
  %12 = ptrtoint ptr %5 to i64
  %13 = ptrtoint ptr %11 to i64
  %14 = sub i64 %12, %13
  %15 = trunc i64 %14 to i32
  %16 = tail call i32 @llvm.umin.i32(i32 %2, i32 65536)
  %17 = icmp slt i32 %2, 4
  %spec.store.select1 = select i1 %17, i32 0, i32 %16
  %spec.select = tail call i32 @llvm.smin.i32(i32 %spec.store.select1, i32 %15)
  %18 = sext i32 %spec.select to i64
  %19 = sub nsw i64 0, %18
  %20 = getelementptr inbounds i8, ptr %5, i64 %19
  tail call void @llvm.memmove.p0.p0.i64(ptr align 1 %1, ptr align 1 %20, i64 %18, i1 false)
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = load ptr, ptr %6, align 8, !tbaa !12
  %23 = ptrtoint ptr %21 to i64
  %24 = ptrtoint ptr %22 to i64
  %25 = sub i64 %23, %24
  %26 = trunc i64 %25 to i32
  %27 = getelementptr inbounds i8, ptr %1, i64 %18
  store ptr %27, ptr %4, align 8, !tbaa !5
  %28 = and i64 %25, 4294967295
  %29 = sub nsw i64 0, %28
  %30 = getelementptr inbounds i8, ptr %27, i64 %29
  store ptr %30, ptr %6, align 8, !tbaa !12
  %31 = sub i32 %26, %spec.select
  store i32 %31, ptr %8, align 8, !tbaa !13
  %32 = getelementptr inbounds i8, ptr %0, i64 262172
  store i32 %31, ptr %32, align 4, !tbaa !14
  %33 = getelementptr inbounds i8, ptr %0, i64 262176
  %34 = load i32, ptr %33, align 8, !tbaa !15
  %35 = icmp ult i32 %34, %31
  br i1 %35, label %36, label %37

36:                                               ; preds = %3
  store i32 %31, ptr %33, align 8, !tbaa !15
  br label %37

37:                                               ; preds = %36, %3
  ret i32 %spec.select
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 262144}
!6 = !{!"LZ4HC_CCtx_internal", !7, i64 0, !7, i64 131072, !9, i64 262144, !9, i64 262152, !9, i64 262160, !10, i64 262168, !10, i64 262172, !10, i64 262176, !11, i64 262180, !7, i64 262182, !7, i64 262183, !9, i64 262184}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!6, !9, i64 262152}
!13 = !{!6, !10, i64 262168}
!14 = !{!6, !10, i64 262172}
!15 = !{!6, !10, i64 262176}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass