; LLVM IR from intel/qpl :: sources/core-sw/src/filtering (qplc_select)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @px_qplc_select_8u(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 0, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %36, %4
  %12 = load i32, ptr %10, align 4, !tbaa !9
  %13 = load i32, ptr %8, align 4, !tbaa !9
  %14 = icmp ult i32 %12, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  br label %39

16:                                               ; preds = %11
  %17 = load ptr, ptr %6, align 8, !tbaa !5
  %18 = load i32, ptr %10, align 4, !tbaa !9
  %19 = zext i32 %18 to i64
  %20 = getelementptr inbounds i8, ptr %17, i64 %19
  %21 = load i8, ptr %20, align 1, !tbaa !11
  %22 = zext i8 %21 to i32
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %35

24:                                               ; preds = %16
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load i32, ptr %10, align 4, !tbaa !9
  %27 = zext i32 %26 to i64
  %28 = getelementptr inbounds i8, ptr %25, i64 %27
  %29 = load i8, ptr %28, align 1, !tbaa !11
  %30 = load ptr, ptr %7, align 8, !tbaa !5
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = add i32 %31, 1
  store i32 %32, ptr %9, align 4, !tbaa !9
  %33 = zext i32 %31 to i64
  %34 = getelementptr inbounds i8, ptr %30, i64 %33
  store i8 %29, ptr %34, align 1, !tbaa !11
  br label %35

35:                                               ; preds = %24, %16
  br label %36

36:                                               ; preds = %35
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = add i32 %37, 1
  store i32 %38, ptr %10, align 4, !tbaa !9
  br label %11, !llvm.loop !12

39:                                               ; preds = %15
  %40 = load i32, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  ret i32 %40
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable
define dso_local i32 @px_qplc_select_8u(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, i32 noundef %3) local_unnamed_addr #0 {
  %.not12 = icmp eq i32 %3, 0
  br i1 %.not12, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %4
  %wide.trip.count = zext i32 %3 to i64
  %xtraiter = and i64 %wide.trip.count, 1
  %5 = icmp eq i32 %3, 1
  br i1 %5, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %wide.trip.count, 4294967294
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %30, %.lr.ph.preheader
  %.1.lcssa.ph = phi i32 [ poison, %.lr.ph.preheader ], [ %.1.1, %30 ]
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.1, %30 ]
  %.0910.unr = phi i32 [ 0, %.lr.ph.preheader ], [ %.1.1, %30 ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa
  %6 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv.unr
  %7 = load i8, ptr %6, align 1, !tbaa !5
  %.not.epil = icmp eq i8 %7, 0
  br i1 %.not.epil, label %._crit_edge, label %8

8:                                                ; preds = %.lr.ph.epil
  %9 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.unr
  %10 = load i8, ptr %9, align 1, !tbaa !5
  %11 = add i32 %.0910.unr, 1
  %12 = zext i32 %.0910.unr to i64
  %13 = getelementptr inbounds i8, ptr %2, i64 %12
  store i8 %10, ptr %13, align 1, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %8, %.lr.ph.epil, %4
  %.09.lcssa = phi i32 [ 0, %4 ], [ %.1.lcssa.ph, %._crit_edge.loopexit.unr-lcssa ], [ %11, %8 ], [ %.0910.unr, %.lr.ph.epil ]
  ret i32 %.09.lcssa

.lr.ph:                                           ; preds = %30, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %30 ]
  %.0910 = phi i32 [ 0, %.lr.ph.preheader.new ], [ %.1.1, %30 ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %30 ]
  %14 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv
  %15 = load i8, ptr %14, align 1, !tbaa !5
  %.not = icmp eq i8 %15, 0
  br i1 %.not, label %.lr.ph.1, label %16

16:                                               ; preds = %.lr.ph
  %17 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv
  %18 = load i8, ptr %17, align 1, !tbaa !5
  %19 = add i32 %.0910, 1
  %20 = zext i32 %.0910 to i64
  %21 = getelementptr inbounds i8, ptr %2, i64 %20
  store i8 %18, ptr %21, align 1, !tbaa !5
  br label %.lr.ph.1

.lr.ph.1:                                         ; preds = %.lr.ph, %16
  %.1 = phi i32 [ %19, %16 ], [ %.0910, %.lr.ph ]
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %22 = getelementptr inbounds i8, ptr %1, i64 %indvars.iv.next
  %23 = load i8, ptr %22, align 1, !tbaa !5
  %.not.1 = icmp eq i8 %23, 0
  br i1 %.not.1, label %30, label %24

24:                                               ; preds = %.lr.ph.1
  %25 = getelementptr inbounds i8, ptr %0, i64 %indvars.iv.next
  %26 = load i8, ptr %25, align 1, !tbaa !5
  %27 = add i32 %.1, 1
  %28 = zext i32 %.1 to i64
  %29 = getelementptr inbounds i8, ptr %2, i64 %28
  store i8 %26, ptr %29, align 1, !tbaa !5
  br label %30

30:                                               ; preds = %24, %.lr.ph.1
  %.1.1 = phi i32 [ %27, %24 ], [ %.1, %.lr.ph.1 ]
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
  br i1 %niter.ncmp.1, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !8
}

attributes #0 = { nofree norecurse nosync nounwind memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass