; LLVM IR from glaretechnologies/substrata :: opus/opus-1.3.1/silk/float (encode_frame_FLP)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.silk_encoder_state_FLP = type { %struct.silk_encoder_state, %struct.silk_shape_state_FLP, [720 x float], float }
%struct.silk_encoder_state = type { [2 x i32], i32, i32, %struct.silk_LP_state, %struct.silk_VAD_state, %struct.silk_nsq_state, [16 x i16], i32, i32, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, [4 x i32], i32, i32, [3 x i8], i8, [3 x i32], %struct.SideInfoIndices, [320 x i8], i32, [322 x i16], i32, i32, i32, i32, i32, i32, i32, i32, i16, %struct._silk_resampler_state_struct, i32, i32, i32, i32, i32, i32, [3 x %struct.SideInfoIndices], [3 x [320 x i8]] }
%struct.silk_LP_state = type { [2 x i32], i32, i32, i32 }
%struct.silk_VAD_state = type { [2 x i32], [2 x i32], [2 x i32], [4 x i32], [4 x i32], i16, [4 x i32], [4 x i32], [4 x i32], i32 }
%struct.silk_nsq_state = type { [640 x i16], [640 x i32], [96 x i32], [24 x i32], i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.SideInfoIndices = type { [4 x i8], [4 x i8], [17 x i8], i16, i8, i8, i8, i8, i8, i8, i8 }
%struct._silk_resampler_state_struct = type { [6 x i32], %union.anon, [48 x i16], i32, i32, i32, i32, i32, i32, i32, i32, ptr }
%union.anon = type { [36 x i32] }
%struct.silk_shape_state_FLP = type { i8, float, float }

; Function Attrs: nounwind uwtable
define dso_local void @silk_encode_do_VAD_FLP(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 13, ptr %5, align 4, !tbaa !9
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %6, i32 0, i32 0
  %8 = getelementptr inbounds %struct.silk_encoder_state, ptr %7, i32 0, i32 57
  %9 = load i32, ptr %8, align 4, !tbaa !11
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %10, i32 0, i32 0
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %12, i32 0, i32 0
  %14 = getelementptr inbounds %struct.silk_encoder_state, ptr %13, i32 0, i32 58
  %15 = getelementptr inbounds [322 x i16], ptr %14, i64 0, i64 0
  %16 = getelementptr inbounds i16, ptr %15, i64 1
  %17 = call i32 @silk_VAD_GetSA_Q8_c(ptr noundef %11, ptr noundef %16)
  %18 = load i32, ptr %4, align 4, !tbaa !9
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %30

20:                                               ; preds = %2
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %21, i32 0, i32 0
  %23 = getelementptr inbounds %struct.silk_encoder_state, ptr %22, i32 0, i32 7
  %24 = load i32, ptr %23, align 4, !tbaa !22
  %25 = icmp sge i32 %24, 13
  br i1 %25, label %26, label %30

26:                                               ; preds = %20
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %27, i32 0, i32 0
  %29 = getelementptr inbounds %struct.silk_encoder_state, ptr %28, i32 0, i32 7
  store i32 12, ptr %29, align 4, !tbaa !22
  br label %30

30:                                               ; preds = %26, %20, %2
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %31, i32 0, i32 0
  %33 = getelementptr inbounds %struct.silk_encoder_state, ptr %32, i32 0, i32 7
  %34 = load i32, ptr %33, align 4, !tbaa !22
  %35 = icmp slt i32 %34, 13
  br i1 %35, label %36, label %79

36:                                               ; preds = %30
  %37 = load ptr, ptr %3, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %37, i32 0, i32 0
  %39 = getelementptr inbounds %struct.silk_encoder_state, ptr %38, i32 0, i32 55
  %40 = getelementptr inbounds %struct.SideInfoIndices, ptr %39, i32 0, i32 5
  store i8 0, ptr %40, align 1, !tbaa !23
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %41, i32 0, i32 0
  %43 = getelementptr inbounds %struct.silk_encoder_state, ptr %42, i32 0, i32 71
  %44 = load i32, ptr %43, align 8, !tbaa !24
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %43, align 8, !tbaa !24
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %46, i32 0, i32 0
  %48 = getelementptr inbounds %struct.silk_encoder_state, ptr %47, i32 0, i32 71
  %49 = load i32, ptr %48, align 8, !tbaa !24
  %50 = icmp sle i32 %49, 10
  br i1 %50, label %51, label %55

51:                                               ; preds = %36
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %52, i32 0, i32 0
  %54 = getelementptr inbounds %struct.silk_encoder_state, ptr %53, i32 0, i32 70
  store i32 0, ptr %54, align 4, !tbaa !25
  br label %69

55:                                               ; preds = %36
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %56, i32 0, i32 0
  %58 = getelementptr inbounds %struct.silk_encoder_state, ptr %57, i32 0, i32 71
  %59 = load i32, ptr %58, align 8, !tbaa !24
  %60 = icmp sgt i32 %59, 30
  br i1 %60, label %61, label %68

61:                                               ; preds = %55
  %62 = load ptr, ptr %3, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %62, i32 0, i32 0
  %64 = getelementptr inbounds %struct.silk_encoder_state, ptr %63, i32 0, i32 71
  store i32 10, ptr %64, align 8, !tbaa !24
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %65, i32 0, i32 0
  %67 = getelementptr inbounds %struct.silk_encoder_state, ptr %66, i32 0, i32 70
  store i32 0, ptr %67, align 4, !tbaa !25
  br label %68

68:                                               ; preds = %61, %55
  br label %69

69:                                               ; preds = %68, %51
  %70 = load ptr, ptr %3, align 8, !tbaa !5
  %71 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %70, i32 0, i32 0
  %72 = getelementptr inbounds %struct.silk_encoder_state, ptr %71, i32 0, i32 52
  %73 = load ptr, ptr %3, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %73, i32 0, i32 0
  %75 = getelementptr inbounds %struct.silk_encoder_state, ptr %74, i32 0, i32 61
  %76 = load i32, ptr %75, align 4, !tbaa !26
  %77 = sext i32 %76 to i64
  %78 = getelementptr inbounds [3 x i8], ptr %72, i64 0, i64 %77
  store i8 0, ptr %78, align 1, !tbaa !27
  br label %99

79:                                               ; preds = %30
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %80, i32 0, i32 0
  %82 = getelementptr inbounds %struct.silk_encoder_state, ptr %81, i32 0, i32 71
  store i32 0, ptr %82, align 8, !tbaa !24
  %83 = load ptr, ptr %3, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %83, i32 0, i32 0
  %85 = getelementptr inbounds %struct.silk_encoder_state, ptr %84, i32 0, i32 70
  store i32 0, ptr %85, align 4, !tbaa !25
  %86 = load ptr, ptr %3, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %86, i32 0, i32 0
  %88 = getelementptr inbounds %struct.silk_encoder_state, ptr %87, i32 0, i32 55
  %89 = getelementptr inbounds %struct.SideInfoIndices, ptr %88, i32 0, i32 5
  store i8 1, ptr %89, align 1, !tbaa !23
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %90, i32 0, i32 0
  %92 = getelementptr inbounds %struct.silk_encoder_state, ptr %91, i32 0, i32 52
  %93 = load ptr, ptr %3, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.silk_encoder_state_FLP, ptr %93, i32 0, i32 0
  %95 = getelementptr inbounds %struct.silk_encoder_state, ptr %94, i32 0, i32 61
  %96 = load i32, ptr %95, align 4, !tbaa !26
  %97 = sext i32 %96 to i64
  %98 = getelementptr inbounds [3 x i8], ptr %92, i64 0, i64 %97
  store i8 1, ptr %98, align 1, !tbaa !27
  br label %99

99:                                               ; preds = %79, %69
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @silk_VAD_GetSA_Q8_c(ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 5108}
!12 = !{!"", !13, i64 0, !20, i64 7192, !7, i64 7204, !21, i64 10084}
!13 = !{!"", !7, i64 0, !10, i64 8, !10, i64 12, !14, i64 16, !15, i64 36, !17, i64 148, !7, i64 4500, !10, i64 4532, !10, i64 4536, !7, i64 4540, !7, i64 4541, !10, i64 4544, !10, i64 4548, !10, i64 4552, !10, i64 4556, !10, i64 4560, !10, i64 4564, !10, i64 4568, !10, i64 4572, !10, i64 4576, !10, i64 4580, !10, i64 4584, !10, i64 4588, !10, i64 4592, !10, i64 4596, !10, i64 4600, !10, i64 4604, !10, i64 4608, !10, i64 4612, !10, i64 4616, !10, i64 4620, !10, i64 4624, !10, i64 4628, !10, i64 4632, !10, i64 4636, !10, i64 4640, !10, i64 4644, !10, i64 4648, !10, i64 4652, !10, i64 4656, !10, i64 4660, !10, i64 4664, !10, i64 4668, !10, i64 4672, !10, i64 4676, !10, i64 4680, !6, i64 4688, !6, i64 4696, !6, i64 4704, !7, i64 4712, !10, i64 4728, !10, i64 4732, !7, i64 4736, !7, i64 4739, !7, i64 4740, !18, i64 4752, !7, i64 4788, !10, i64 5108, !7, i64 5112, !10, i64 5756, !10, i64 5760, !10, i64 5764, !10, i64 5768, !10, i64 5772, !10, i64 5776, !10, i64 5780, !10, i64 5784, !16, i64 5788, !19, i64 5792, !10, i64 6096, !10, i64 6100, !10, i64 6104, !10, i64 6108, !10, i64 6112, !10, i64 6116, !7, i64 6120, !7, i64 6228}
!14 = !{!"", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!15 = !{!"", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 40, !16, i64 56, !7, i64 60, !7, i64 76, !7, i64 92, !10, i64 108}
!16 = !{!"short", !7, i64 0}
!17 = !{!"", !7, i64 0, !7, i64 1280, !7, i64 3840, !7, i64 4224, !10, i64 4320, !10, i64 4324, !10, i64 4328, !10, i64 4332, !10, i64 4336, !10, i64 4340, !10, i64 4344, !10, i64 4348}
!18 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !16, i64 26, !7, i64 28, !7, i64 29, !7, i64 30, !7, i64 31, !7, i64 32, !7, i64 33, !7, i64 34}
!19 = !{!"_silk_resampler_state_struct", !7, i64 0, !7, i64 24, !7, i64 168, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !6, i64 296}
!20 = !{!"", !7, i64 0, !21, i64 4, !21, i64 8}
!21 = !{!"float", !7, i64 0}
!22 = !{!12, !10, i64 4532}
!23 = !{!12, !7, i64 4781}
!24 = !{!12, !10, i64 6104}
!25 = !{!12, !10, i64 6100}
!26 = !{!12, !10, i64 5764}
!27 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @silk_encode_do_VAD_FLP(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = getelementptr inbounds i8, ptr %0, i64 5114
  %4 = tail call i32 @silk_VAD_GetSA_Q8_c(ptr noundef %0, ptr noundef nonnull %3) #2
  %5 = icmp eq i32 %1, 0
  %6 = getelementptr inbounds i8, ptr %0, i64 4532
  %7 = load i32, ptr %6, align 4, !tbaa !5
  br i1 %5, label %8, label %11

8:                                                ; preds = %2
  %9 = icmp sgt i32 %7, 12
  br i1 %9, label %10, label %.thread

10:                                               ; preds = %8
  store i32 12, ptr %6, align 4, !tbaa !5
  br label %.thread

11:                                               ; preds = %2
  %12 = icmp slt i32 %7, 13
  br i1 %12, label %.thread, label %22

.thread:                                          ; preds = %8, %10, %11
  %13 = getelementptr inbounds i8, ptr %0, i64 4781
  store i8 0, ptr %13, align 1, !tbaa !20
  %14 = getelementptr inbounds i8, ptr %0, i64 6104
  %15 = load i32, ptr %14, align 8, !tbaa !21
  %16 = add nsw i32 %15, 1
  store i32 %16, ptr %14, align 8, !tbaa !21
  %17 = icmp slt i32 %15, 10
  br i1 %17, label %.sink.split, label %18

18:                                               ; preds = %.thread
  %19 = icmp ugt i32 %15, 29
  br i1 %19, label %20, label %26

20:                                               ; preds = %18
  store i32 10, ptr %14, align 8, !tbaa !21
  br label %.sink.split

.sink.split:                                      ; preds = %.thread, %20
  %21 = getelementptr inbounds i8, ptr %0, i64 6100
  store i32 0, ptr %21, align 4, !tbaa !22
  br label %26

22:                                               ; preds = %11
  %23 = getelementptr inbounds i8, ptr %0, i64 6104
  store i32 0, ptr %23, align 8, !tbaa !21
  %24 = getelementptr inbounds i8, ptr %0, i64 6100
  store i32 0, ptr %24, align 4, !tbaa !22
  %25 = getelementptr inbounds i8, ptr %0, i64 4781
  store i8 1, ptr %25, align 1, !tbaa !20
  br label %26

26:                                               ; preds = %18, %.sink.split, %22
  %.sink = phi i8 [ 1, %22 ], [ 0, %.sink.split ], [ 0, %18 ]
  %27 = getelementptr inbounds i8, ptr %0, i64 4736
  %28 = getelementptr inbounds i8, ptr %0, i64 5764
  %29 = load i32, ptr %28, align 4, !tbaa !23
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [3 x i8], ptr %27, i64 0, i64 %30
  store i8 %.sink, ptr %31, align 1, !tbaa !24
  ret void
}

declare i32 @silk_VAD_GetSA_Q8_c(ptr noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 4532}
!6 = !{!"", !7, i64 0, !18, i64 7192, !8, i64 7204, !19, i64 10084}
!7 = !{!"", !8, i64 0, !10, i64 8, !10, i64 12, !11, i64 16, !12, i64 36, !14, i64 148, !8, i64 4500, !10, i64 4532, !10, i64 4536, !8, i64 4540, !8, i64 4541, !10, i64 4544, !10, i64 4548, !10, i64 4552, !10, i64 4556, !10, i64 4560, !10, i64 4564, !10, i64 4568, !10, i64 4572, !10, i64 4576, !10, i64 4580, !10, i64 4584, !10, i64 4588, !10, i64 4592, !10, i64 4596, !10, i64 4600, !10, i64 4604, !10, i64 4608, !10, i64 4612, !10, i64 4616, !10, i64 4620, !10, i64 4624, !10, i64 4628, !10, i64 4632, !10, i64 4636, !10, i64 4640, !10, i64 4644, !10, i64 4648, !10, i64 4652, !10, i64 4656, !10, i64 4660, !10, i64 4664, !10, i64 4668, !10, i64 4672, !10, i64 4676, !10, i64 4680, !15, i64 4688, !15, i64 4696, !15, i64 4704, !8, i64 4712, !10, i64 4728, !10, i64 4732, !8, i64 4736, !8, i64 4739, !8, i64 4740, !16, i64 4752, !8, i64 4788, !10, i64 5108, !8, i64 5112, !10, i64 5756, !10, i64 5760, !10, i64 5764, !10, i64 5768, !10, i64 5772, !10, i64 5776, !10, i64 5780, !10, i64 5784, !13, i64 5788, !17, i64 5792, !10, i64 6096, !10, i64 6100, !10, i64 6104, !10, i64 6108, !10, i64 6112, !10, i64 6116, !8, i64 6120, !8, i64 6228}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"", !8, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!12 = !{!"", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 40, !13, i64 56, !8, i64 60, !8, i64 76, !8, i64 92, !10, i64 108}
!13 = !{!"short", !8, i64 0}
!14 = !{!"", !8, i64 0, !8, i64 1280, !8, i64 3840, !8, i64 4224, !10, i64 4320, !10, i64 4324, !10, i64 4328, !10, i64 4332, !10, i64 4336, !10, i64 4340, !10, i64 4344, !10, i64 4348}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!"", !8, i64 0, !8, i64 4, !8, i64 8, !13, i64 26, !8, i64 28, !8, i64 29, !8, i64 30, !8, i64 31, !8, i64 32, !8, i64 33, !8, i64 34}
!17 = !{!"_silk_resampler_state_struct", !8, i64 0, !8, i64 24, !8, i64 168, !10, i64 264, !10, i64 268, !10, i64 272, !10, i64 276, !10, i64 280, !10, i64 284, !10, i64 288, !10, i64 292, !15, i64 296}
!18 = !{!"", !8, i64 0, !19, i64 4, !19, i64 8}
!19 = !{!"float", !8, i64 0}
!20 = !{!6, !8, i64 4781}
!21 = !{!6, !10, i64 6104}
!22 = !{!6, !10, i64 6100}
!23 = !{!6, !10, i64 5764}
!24 = !{!8, !8, i64 0}


; Effective O3 passes: BDCEPass,CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass,TailCallElimPass