; LLVM IR from NVIDIA/FasterTransformer :: src/fastertransformer/utils/cuda_utils.ll (ZN17fastertransformer11printMatrixEPiiiib)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [100 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [69 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [5 x i8], align 1

declare i32 @cudaDeviceSynchronize() #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17fastertransformer5checkI9cudaErrorEEvT_PKcS4_i(i32 noundef, ptr noundef, ptr noundef, i32 noundef) #1

declare i32 @printf(ptr noundef, ...) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind allocsize(0)
declare noalias ptr @malloc(i64 noundef) #3

declare i32 @cudaMemcpy(ptr noundef, ptr noundef, i64 noundef, i32 noundef) #0

; Function Attrs: nounwind
declare void @free(ptr noundef) #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17fastertransformer11printMatrixEPiiiib(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i1 noundef zeroext %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store i32 %2, ptr %8, align 4, !tbaa !9
  store i32 %3, ptr %9, align 4, !tbaa !9
  %15 = zext i1 %4 to i8
  store i8 %15, ptr %10, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %16 = load i8, ptr %10, align 1, !tbaa !11, !range !13, !noundef !14
  %17 = trunc i8 %16 to i1
  br i1 %17, label %18, label %35

18:                                               ; preds = %5
  %19 = load i32, ptr %7, align 4, !tbaa !9
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = mul nsw i32 %19, %20
  %22 = sext i32 %21 to i64
  %23 = mul i64 %22, 4
  %24 = call noalias ptr @malloc(i64 noundef %23) #6
  store ptr %24, ptr %11, align 8, !tbaa !5
  %25 = load ptr, ptr %11, align 8, !tbaa !5
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = sext i32 %27 to i64
  %29 = mul i64 4, %28
  %30 = load i32, ptr %9, align 4, !tbaa !9
  %31 = sext i32 %30 to i64
  %32 = mul i64 %29, %31
  %33 = call i32 @cudaMemcpy(ptr noundef %25, ptr noundef %26, i64 noundef %32, i32 noundef 2)
  call void @_ZN17fastertransformer5checkI9cudaErrorEEvT_PKcS4_i(i32 noundef %33, ptr noundef @.str.13, ptr noundef @.str.1, i32 noundef 223)
  %34 = call i32 @cudaDeviceSynchronize()
  br label %37

35:                                               ; preds = %5
  %36 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %36, ptr %11, align 8, !tbaa !5
  br label %37

37:                                               ; preds = %35, %18
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  store i32 -1, ptr %12, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %80, %37
  %39 = load i32, ptr %12, align 4, !tbaa !9
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  store i32 2, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  br label %83

43:                                               ; preds = %38
  %44 = load i32, ptr %12, align 4, !tbaa !9
  %45 = icmp sge i32 %44, 0
  br i1 %45, label %46, label %49

46:                                               ; preds = %43
  %47 = load i32, ptr %12, align 4, !tbaa !9
  %48 = call i32 (ptr, ...) @printf(ptr noundef @.str.14, i32 noundef %47)
  br label %51

49:                                               ; preds = %43
  %50 = call i32 (ptr, ...) @printf(ptr noundef @.str.15)
  br label %51

51:                                               ; preds = %49, %46
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %52

52:                                               ; preds = %75, %51
  %53 = load i32, ptr %14, align 4, !tbaa !9
  %54 = load i32, ptr %8, align 4, !tbaa !9
  %55 = icmp slt i32 %53, %54
  br i1 %55, label %57, label %56

56:                                               ; preds = %52
  store i32 5, ptr %13, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %78

57:                                               ; preds = %52
  %58 = load i32, ptr %12, align 4, !tbaa !9
  %59 = icmp sge i32 %58, 0
  br i1 %59, label %60, label %71

60:                                               ; preds = %57
  %61 = load ptr, ptr %11, align 8, !tbaa !5
  %62 = load i32, ptr %12, align 4, !tbaa !9
  %63 = load i32, ptr %9, align 4, !tbaa !9
  %64 = mul nsw i32 %62, %63
  %65 = load i32, ptr %14, align 4, !tbaa !9
  %66 = add nsw i32 %64, %65
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds i32, ptr %61, i64 %67
  %69 = load i32, ptr %68, align 4, !tbaa !9
  %70 = call i32 (ptr, ...) @printf(ptr noundef @.str.21, i32 noundef %69)
  br label %74

71:                                               ; preds = %57
  %72 = load i32, ptr %14, align 4, !tbaa !9
  %73 = call i32 (ptr, ...) @printf(ptr noundef @.str.21, i32 noundef %72)
  br label %74

74:                                               ; preds = %71, %60
  br label %75

75:                                               ; preds = %74
  %76 = load i32, ptr %14, align 4, !tbaa !9
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %14, align 4, !tbaa !9
  br label %52, !llvm.loop !15

78:                                               ; preds = %56
  %79 = call i32 (ptr, ...) @printf(ptr noundef @.str.5)
  br label %80

80:                                               ; preds = %78
  %81 = load i32, ptr %12, align 4, !tbaa !9
  %82 = add nsw i32 %81, 1
  store i32 %82, ptr %12, align 4, !tbaa !9
  br label %38, !llvm.loop !17

83:                                               ; preds = %42
  %84 = load i8, ptr %10, align 1, !tbaa !11, !range !13, !noundef !14
  %85 = trunc i8 %84 to i1
  br i1 %85, label %86, label %88

86:                                               ; preds = %83
  %87 = load ptr, ptr %11, align 8, !tbaa !5
  call void @free(ptr noundef %87) #5
  br label %88

88:                                               ; preds = %86, %83
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { nounwind allocsize(0) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [100 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [69 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [5 x i8], align 1

declare i32 @cudaDeviceSynchronize() local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17fastertransformer5checkI9cudaErrorEEvT_PKcS4_i(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #3

declare i32 @cudaMemcpy(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite)
declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17fastertransformer11printMatrixEPiiiib(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i1 noundef zeroext %4) local_unnamed_addr #1 {
  br i1 %4, label %6, label %17

6:                                                ; preds = %5
  %7 = mul nsw i32 %3, %1
  %8 = sext i32 %7 to i64
  %9 = shl nsw i64 %8, 2
  %10 = tail call noalias ptr @malloc(i64 noundef %9) #5
  %11 = sext i32 %1 to i64
  %12 = shl nsw i64 %11, 2
  %13 = sext i32 %3 to i64
  %14 = mul i64 %12, %13
  %15 = tail call i32 @cudaMemcpy(ptr noundef %10, ptr noundef %0, i64 noundef %14, i32 noundef 2)
  tail call void @_ZN17fastertransformer5checkI9cudaErrorEEvT_PKcS4_i(i32 noundef %15, ptr noundef nonnull @.str.13, ptr noundef nonnull @.str.1, i32 noundef 223)
  %16 = tail call i32 @cudaDeviceSynchronize()
  br label %17

17:                                               ; preds = %5, %6
  %.024 = phi ptr [ %10, %6 ], [ %0, %5 ]
  %18 = icmp sgt i32 %1, -1
  br i1 %18, label %.lr.ph28, label %._crit_edge29

.lr.ph28:                                         ; preds = %17
  %19 = icmp sgt i32 %2, 0
  br i1 %19, label %.lr.ph28.split.us.preheader, label %20

20:                                               ; preds = %.lr.ph28
  %21 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.15)
  %22 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5)
  %exitcond.peel.not = icmp eq i32 %1, 0
  br i1 %exitcond.peel.not, label %._crit_edge29, label %.lr.ph28.split.peel.next

.lr.ph28.split.us.preheader:                      ; preds = %.lr.ph28
  %23 = sext i32 %3 to i64
  %wide.trip.count42 = zext nneg i32 %1 to i64
  %wide.trip.count = zext nneg i32 %2 to i64
  br label %.lr.ph28.split.us

.lr.ph28.split.us:                                ; preds = %.lr.ph28.split.us.preheader, %._crit_edge.us
  %indvars.iv39 = phi i64 [ -1, %.lr.ph28.split.us.preheader ], [ %indvars.iv.next40, %._crit_edge.us ]
  %24 = icmp sgt i64 %indvars.iv39, -1
  br i1 %24, label %.lr.ph.split.us.us.preheader, label %.lr.ph.split.us32.preheader

.lr.ph.split.us32.preheader:                      ; preds = %.lr.ph28.split.us
  %25 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.15)
  br label %.lr.ph.split.us32

.lr.ph.split.us.us.preheader:                     ; preds = %.lr.ph28.split.us
  %26 = trunc nsw i64 %indvars.iv39 to i32
  %27 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.14, i32 noundef %26)
  %28 = mul nsw i64 %indvars.iv39, %23
  br label %.lr.ph.split.us.us

.lr.ph.split.us32:                                ; preds = %.lr.ph.split.us32.preheader, %.lr.ph.split.us32
  %.025.us30 = phi i32 [ %30, %.lr.ph.split.us32 ], [ 0, %.lr.ph.split.us32.preheader ]
  %29 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21, i32 noundef %.025.us30)
  %30 = add nuw nsw i32 %.025.us30, 1
  %exitcond36.not = icmp eq i32 %30, %2
  br i1 %exitcond36.not, label %._crit_edge.us, label %.lr.ph.split.us32, !llvm.loop !5

._crit_edge.us:                                   ; preds = %.lr.ph.split.us32, %.lr.ph.split.us.us
  %31 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5)
  %indvars.iv.next40 = add nsw i64 %indvars.iv39, 1
  %exitcond43.not = icmp eq i64 %indvars.iv.next40, %wide.trip.count42
  br i1 %exitcond43.not, label %._crit_edge29, label %.lr.ph28.split.us, !llvm.loop !7

.lr.ph.split.us.us:                               ; preds = %.lr.ph.split.us.us.preheader, %.lr.ph.split.us.us
  %indvars.iv = phi i64 [ 0, %.lr.ph.split.us.us.preheader ], [ %indvars.iv.next, %.lr.ph.split.us.us ]
  %32 = add nsw i64 %indvars.iv, %28
  %33 = getelementptr inbounds i32, ptr %.024, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !8
  %35 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21, i32 noundef %34)
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond38.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond38.not, label %._crit_edge.us, label %.lr.ph.split.us.us, !llvm.loop !5

._crit_edge29:                                    ; preds = %.lr.ph28.split.peel.next, %._crit_edge.us, %20, %17
  br i1 %4, label %39, label %40

.lr.ph28.split.peel.next:                         ; preds = %20, %.lr.ph28.split.peel.next
  %.02326 = phi i32 [ %38, %.lr.ph28.split.peel.next ], [ 0, %20 ]
  %36 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.14, i32 noundef %.02326)
  %37 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.5)
  %38 = add nuw nsw i32 %.02326, 1
  %exitcond.not = icmp eq i32 %38, %1
  br i1 %exitcond.not, label %._crit_edge29, label %.lr.ph28.split.peel.next, !llvm.loop !12

39:                                               ; preds = %._crit_edge29
  tail call void @free(ptr noundef %.024) #6
  br label %40

40:                                               ; preds = %39, %._crit_edge29
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind allocsize(0) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = distinct !{!12, !6, !13}
!13 = !{!"llvm.loop.peeled.count", i32 1}


; Effective O3 passes: ADCEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopFullUnrollPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass