; LLVM IR from GGiecold-zz/Cluster_Ensembles :: src/Cluster_Ensembles/Hypergraph_Partitioning/metis-5.1.0/libmetis (mcutil)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @libmetis__BetterBalanceKWay(i32 noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4, ptr noundef %5, i32 noundef %6, ptr noundef %7, ptr noundef %8) #2 {
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca i32, align 4
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca i32, align 4
  %21 = alloca float, align 4
  %22 = alloca float, align 4
  %23 = alloca float, align 4
  %24 = alloca float, align 4
  %25 = alloca float, align 4
  %26 = alloca i32, align 4
  store i32 %0, ptr %11, align 4, !tbaa !5
  store ptr %1, ptr %12, align 8, !tbaa !9
  store ptr %2, ptr %13, align 8, !tbaa !9
  store i32 %3, ptr %14, align 4, !tbaa !5
  store ptr %4, ptr %15, align 8, !tbaa !9
  store ptr %5, ptr %16, align 8, !tbaa !9
  store i32 %6, ptr %17, align 4, !tbaa !5
  store ptr %7, ptr %18, align 8, !tbaa !9
  store ptr %8, ptr %19, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #3
  store float 0.000000e+00, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #3
  store float 0.000000e+00, ptr %23, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #3
  store float 0.000000e+00, ptr %24, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #3
  store float 0.000000e+00, ptr %25, align 4, !tbaa !11
  store i32 0, ptr %20, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %110, %9
  %28 = load i32, ptr %20, align 4, !tbaa !5
  %29 = load i32, ptr %11, align 4, !tbaa !5
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %31, label %113

31:                                               ; preds = %27
  %32 = load ptr, ptr %16, align 8, !tbaa !9
  %33 = load i32, ptr %20, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds float, ptr %32, i64 %34
  %36 = load float, ptr %35, align 4, !tbaa !11
  %37 = load ptr, ptr %15, align 8, !tbaa !9
  %38 = load i32, ptr %20, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds i32, ptr %37, i64 %39
  %41 = load i32, ptr %40, align 4, !tbaa !5
  %42 = load i32, ptr %14, align 4, !tbaa !5
  %43 = load ptr, ptr %12, align 8, !tbaa !9
  %44 = load i32, ptr %20, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds i32, ptr %43, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = mul nsw i32 %42, %47
  %49 = add nsw i32 %41, %48
  %50 = sitofp i32 %49 to float
  %51 = load ptr, ptr %13, align 8, !tbaa !9
  %52 = load i32, ptr %20, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds float, ptr %51, i64 %53
  %55 = load float, ptr %54, align 4, !tbaa !11
  %56 = fneg float %55
  %57 = call float @llvm.fmuladd.f32(float %36, float %50, float %56)
  store float %57, ptr %21, align 4, !tbaa !11
  %58 = load float, ptr %21, align 4, !tbaa !11
  %59 = load float, ptr %21, align 4, !tbaa !11
  %60 = load float, ptr %22, align 4, !tbaa !11
  %61 = call float @llvm.fmuladd.f32(float %58, float %59, float %60)
  store float %61, ptr %22, align 4, !tbaa !11
  %62 = load float, ptr %21, align 4, !tbaa !11
  %63 = load float, ptr %24, align 4, !tbaa !11
  %64 = fcmp ogt float %62, %63
  br i1 %64, label %65, label %67

65:                                               ; preds = %31
  %66 = load float, ptr %21, align 4, !tbaa !11
  br label %69

67:                                               ; preds = %31
  %68 = load float, ptr %24, align 4, !tbaa !11
  br label %69

69:                                               ; preds = %67, %65
  %70 = phi float [ %66, %65 ], [ %68, %67 ]
  store float %70, ptr %24, align 4, !tbaa !11
  %71 = load ptr, ptr %19, align 8, !tbaa !9
  %72 = load i32, ptr %20, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds float, ptr %71, i64 %73
  %75 = load float, ptr %74, align 4, !tbaa !11
  %76 = load ptr, ptr %18, align 8, !tbaa !9
  %77 = load i32, ptr %20, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds i32, ptr %76, i64 %78
  %80 = load i32, ptr %79, align 4, !tbaa !5
  %81 = load i32, ptr %17, align 4, !tbaa !5
  %82 = load ptr, ptr %12, align 8, !tbaa !9
  %83 = load i32, ptr %20, align 4, !tbaa !5
  %84 = sext i32 %83 to i64
  %85 = getelementptr inbounds i32, ptr %82, i64 %84
  %86 = load i32, ptr %85, align 4, !tbaa !5
  %87 = mul nsw i32 %81, %86
  %88 = add nsw i32 %80, %87
  %89 = sitofp i32 %88 to float
  %90 = load ptr, ptr %13, align 8, !tbaa !9
  %91 = load i32, ptr %20, align 4, !tbaa !5
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds float, ptr %90, i64 %92
  %94 = load float, ptr %93, align 4, !tbaa !11
  %95 = fneg float %94
  %96 = call float @llvm.fmuladd.f32(float %75, float %89, float %95)
  store float %96, ptr %21, align 4, !tbaa !11
  %97 = load float, ptr %21, align 4, !tbaa !11
  %98 = load float, ptr %21, align 4, !tbaa !11
  %99 = load float, ptr %23, align 4, !tbaa !11
  %100 = call float @llvm.fmuladd.f32(float %97, float %98, float %99)
  store float %100, ptr %23, align 4, !tbaa !11
  %101 = load float, ptr %21, align 4, !tbaa !11
  %102 = load float, ptr %25, align 4, !tbaa !11
  %103 = fcmp ogt float %101, %102
  br i1 %103, label %104, label %106

104:                                              ; preds = %69
  %105 = load float, ptr %21, align 4, !tbaa !11
  br label %108

106:                                              ; preds = %69
  %107 = load float, ptr %25, align 4, !tbaa !11
  br label %108

108:                                              ; preds = %106, %104
  %109 = phi float [ %105, %104 ], [ %107, %106 ]
  store float %109, ptr %25, align 4, !tbaa !11
  br label %110

110:                                              ; preds = %108
  %111 = load i32, ptr %20, align 4, !tbaa !5
  %112 = add nsw i32 %111, 1
  store i32 %112, ptr %20, align 4, !tbaa !5
  br label %27, !llvm.loop !13

113:                                              ; preds = %27
  %114 = load float, ptr %25, align 4, !tbaa !11
  %115 = load float, ptr %24, align 4, !tbaa !11
  %116 = fcmp olt float %114, %115
  br i1 %116, label %117, label %118

117:                                              ; preds = %113
  store i32 1, ptr %10, align 4
  store i32 1, ptr %26, align 4
  br label %128

118:                                              ; preds = %113
  %119 = load float, ptr %25, align 4, !tbaa !11
  %120 = load float, ptr %24, align 4, !tbaa !11
  %121 = fcmp oeq float %119, %120
  br i1 %121, label %122, label %127

122:                                              ; preds = %118
  %123 = load float, ptr %23, align 4, !tbaa !11
  %124 = load float, ptr %22, align 4, !tbaa !11
  %125 = fcmp olt float %123, %124
  br i1 %125, label %126, label %127

126:                                              ; preds = %122
  store i32 1, ptr %10, align 4
  store i32 1, ptr %26, align 4
  br label %128

127:                                              ; preds = %122, %118
  store i32 0, ptr %10, align 4
  store i32 1, ptr %26, align 4
  br label %128

128:                                              ; preds = %127, %126, %117
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  %129 = load i32, ptr %10, align 4
  ret i32 %129
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"float", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #0

; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define dso_local range(i32 0, 2) i32 @libmetis__BetterBalanceKWay(i32 noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2, i32 noundef %3, ptr nocapture noundef readonly %4, ptr nocapture noundef readonly %5, i32 noundef %6, ptr nocapture noundef readonly %7, ptr nocapture noundef readonly %8) local_unnamed_addr #1 {
  %10 = icmp sgt i32 %0, 0
  br i1 %10, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %9
  %wide.trip.count = zext nneg i32 %0 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %.050 = phi float [ 0.000000e+00, %.lr.ph.preheader ], [ %37, %.lr.ph ]
  %.04149 = phi float [ 0.000000e+00, %.lr.ph.preheader ], [ %26, %.lr.ph ]
  %.04248 = phi float [ 0.000000e+00, %.lr.ph.preheader ], [ %35, %.lr.ph ]
  %.04347 = phi float [ 0.000000e+00, %.lr.ph.preheader ], [ %24, %.lr.ph ]
  %11 = getelementptr inbounds float, ptr %5, i64 %indvars.iv
  %12 = load float, ptr %11, align 4, !tbaa !5
  %13 = getelementptr inbounds i32, ptr %4, i64 %indvars.iv
  %14 = load i32, ptr %13, align 4, !tbaa !9
  %15 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
  %16 = load i32, ptr %15, align 4, !tbaa !9
  %17 = mul nsw i32 %16, %3
  %18 = add nsw i32 %17, %14
  %19 = sitofp i32 %18 to float
  %20 = getelementptr inbounds float, ptr %2, i64 %indvars.iv
  %21 = load float, ptr %20, align 4, !tbaa !5
  %22 = fneg float %21
  %23 = tail call float @llvm.fmuladd.f32(float %12, float %19, float %22)
  %24 = tail call float @llvm.fmuladd.f32(float %23, float %23, float %.04347)
  %25 = fcmp ogt float %23, %.04149
  %26 = select i1 %25, float %23, float %.04149
  %27 = getelementptr inbounds float, ptr %8, i64 %indvars.iv
  %28 = load float, ptr %27, align 4, !tbaa !5
  %29 = getelementptr inbounds i32, ptr %7, i64 %indvars.iv
  %30 = load i32, ptr %29, align 4, !tbaa !9
  %31 = mul nsw i32 %16, %6
  %32 = add nsw i32 %30, %31
  %33 = sitofp i32 %32 to float
  %34 = tail call float @llvm.fmuladd.f32(float %28, float %33, float %22)
  %35 = tail call float @llvm.fmuladd.f32(float %34, float %34, float %.04248)
  %36 = fcmp ogt float %34, %.050
  %37 = select i1 %36, float %34, float %.050
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !11

._crit_edge:                                      ; preds = %.lr.ph, %9
  %.043.lcssa = phi float [ 0.000000e+00, %9 ], [ %24, %.lr.ph ]
  %.042.lcssa = phi float [ 0.000000e+00, %9 ], [ %35, %.lr.ph ]
  %.041.lcssa = phi float [ 0.000000e+00, %9 ], [ %26, %.lr.ph ]
  %.0.lcssa = phi float [ 0.000000e+00, %9 ], [ %37, %.lr.ph ]
  %38 = fcmp olt float %.0.lcssa, %.041.lcssa
  %39 = fcmp oeq float %.0.lcssa, %.041.lcssa
  %40 = fcmp olt float %.042.lcssa, %.043.lcssa
  %or.cond = select i1 %39, i1 %40, i1 false
  %narrow = select i1 %38, i1 true, i1 %or.cond
  %.044 = zext i1 %narrow to i32
  ret i32 %.044
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #1 = { nofree norecurse nosync nounwind memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass