; LLVM IR from DeanoC/gfx_imagecompress :: src/amd_hdr_encode.ll (ZN10HDR_Encode5lerpfEffii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [40 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [81 x i8], align 1
@__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii = external hidden unnamed_addr constant [48 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [21 x i8], align 1
@_ZN10HDR_EncodeL11g_aWeights3E = external hidden global [8 x i32], align 16
@_ZN10HDR_EncodeL11g_aWeights4E = external hidden global [16 x i32], align 16
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef float @_ZN10HDR_Encode5lerpfEffii(float noundef %0, float noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca float, align 4
  %6 = alloca float, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  store float %0, ptr %5, align 4, !tbaa !5
  store float %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  %10 = load i32, ptr %8, align 4, !tbaa !9
  %11 = icmp eq i32 %10, 3
  br i1 %11, label %18, label %12

12:                                               ; preds = %4
  %13 = load i32, ptr %8, align 4, !tbaa !9
  %14 = icmp eq i32 %13, 7
  br i1 %14, label %18, label %15

15:                                               ; preds = %12
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = icmp eq i32 %16, 15
  br label %18

18:                                               ; preds = %15, %12, %4
  %19 = phi i1 [ true, %12 ], [ true, %4 ], [ %17, %15 ]
  br i1 %19, label %20, label %21

20:                                               ; preds = %18
  br label %23

21:                                               ; preds = %18
  call void @__assert_fail(ptr noundef @.str, ptr noundef @.str.1, i32 noundef 68, ptr noundef @__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii) #4
  unreachable

22:                                               ; No predecessors!
  br label %23

23:                                               ; preds = %22, %20
  %24 = load i32, ptr %7, align 4, !tbaa !9
  %25 = icmp sge i32 %24, 0
  br i1 %25, label %26, label %30

26:                                               ; preds = %23
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = icmp sle i32 %27, %28
  br label %30

30:                                               ; preds = %26, %23
  %31 = phi i1 [ false, %23 ], [ %29, %26 ]
  br i1 %31, label %32, label %33

32:                                               ; preds = %30
  br label %35

33:                                               ; preds = %30
  call void @__assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i32 noundef 69, ptr noundef @__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii) #4
  unreachable

34:                                               ; No predecessors!
  br label %35

35:                                               ; preds = %34, %32
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  store ptr null, ptr %9, align 8, !tbaa !11
  %36 = load i32, ptr %8, align 4, !tbaa !9
  switch i32 %36, label %44 [
    i32 3, label %37
    i32 7, label %42
    i32 15, label %43
  ]

37:                                               ; preds = %35
  %38 = load i32, ptr %8, align 4, !tbaa !9
  %39 = mul nsw i32 %38, 5
  store i32 %39, ptr %8, align 4, !tbaa !9
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = mul nsw i32 %40, 5
  store i32 %41, ptr %7, align 4, !tbaa !9
  br label %42

42:                                               ; preds = %37, %35
  store ptr @_ZN10HDR_EncodeL11g_aWeights3E, ptr %9, align 8, !tbaa !11
  br label %45

43:                                               ; preds = %35
  store ptr @_ZN10HDR_EncodeL11g_aWeights4E, ptr %9, align 8, !tbaa !11
  br label %45

44:                                               ; preds = %35
  call void @__assert_fail(ptr noundef @.str.3, ptr noundef @.str.1, i32 noundef 78, ptr noundef @__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii) #4
  unreachable

45:                                               ; preds = %43, %42
  %46 = load float, ptr %5, align 4, !tbaa !5
  %47 = load ptr, ptr %9, align 8, !tbaa !11
  %48 = load i32, ptr %8, align 4, !tbaa !9
  %49 = load i32, ptr %7, align 4, !tbaa !9
  %50 = sub nsw i32 %48, %49
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds i32, ptr %47, i64 %51
  %53 = load i32, ptr %52, align 4, !tbaa !9
  %54 = sitofp i32 %53 to float
  %55 = load float, ptr %6, align 4, !tbaa !5
  %56 = load ptr, ptr %9, align 8, !tbaa !11
  %57 = load i32, ptr %7, align 4, !tbaa !9
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds i32, ptr %56, i64 %58
  %60 = load i32, ptr %59, align 4, !tbaa !9
  %61 = sitofp i32 %60 to float
  %62 = fmul float %55, %61
  %63 = call float @llvm.fmuladd.f32(float %46, float %54, float %62)
  %64 = fdiv float %63, 6.400000e+01
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  ret float %64
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { noreturn nounwind }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [40 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [81 x i8], align 1
@__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii = external hidden unnamed_addr constant [48 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [21 x i8], align 1
@_ZN10HDR_EncodeL11g_aWeights3E = external hidden local_unnamed_addr global [8 x i32], align 16
@_ZN10HDR_EncodeL11g_aWeights4E = external hidden local_unnamed_addr global [16 x i32], align 16
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef float @_ZN10HDR_Encode5lerpfEffii(float noundef %0, float noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  switch i32 %3, label %5 [
    i32 15, label %.critedge
    i32 7, label %.critedge
    i32 3, label %.critedge
  ]

5:                                                ; preds = %4
  tail call void @__assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 68, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii) #3
  unreachable

.critedge:                                        ; preds = %4, %4, %4
  %.not = icmp ugt i32 %2, %3
  br i1 %.not, label %6, label %7

6:                                                ; preds = %.critedge
  tail call void @__assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i32 noundef 69, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii) #3
  unreachable

7:                                                ; preds = %.critedge
  switch i32 %3, label %11 [
    i32 3, label %8
    i32 7, label %12
    i32 15, label %10
  ]

8:                                                ; preds = %7
  %9 = mul nuw nsw i32 %2, 5
  br label %12

10:                                               ; preds = %7
  br label %12

11:                                               ; preds = %7
  tail call void @__assert_fail(ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.1, i32 noundef 78, ptr noundef nonnull @__PRETTY_FUNCTION__._ZN10HDR_Encode5lerpfEffii) #3
  unreachable

12:                                               ; preds = %7, %8, %10
  %.120 = phi i32 [ %2, %10 ], [ %2, %7 ], [ %9, %8 ]
  %.1 = phi i32 [ %3, %10 ], [ %3, %7 ], [ 15, %8 ]
  %.0 = phi ptr [ @_ZN10HDR_EncodeL11g_aWeights4E, %10 ], [ @_ZN10HDR_EncodeL11g_aWeights3E, %7 ], [ @_ZN10HDR_EncodeL11g_aWeights3E, %8 ]
  %13 = sub nsw i32 %.1, %.120
  %14 = sext i32 %13 to i64
  %15 = getelementptr inbounds i32, ptr %.0, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = sitofp i32 %16 to float
  %18 = zext nneg i32 %.120 to i64
  %19 = getelementptr inbounds i32, ptr %.0, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = sitofp i32 %20 to float
  %22 = fmul float %21, %1
  %23 = tail call float @llvm.fmuladd.f32(float %0, float %17, float %22)
  %24 = fmul float %23, 1.562500e-02
  ret float %24
}

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass