; LLVM IR from kimwalisch/primesieve :: src/PrimeGenerator.ll (ZN10primesieve14PrimeGeneratorC2Emm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.primesieve::PrimeGenerator" = type { %"class.primesieve::Erat", i8, i64, i64, i64, %"class.primesieve::MemoryPool", %"class.primesieve::SievingPrimes" }
%"class.primesieve::Erat" = type { i64, i64, i64, i64, %"class.primesieve::Vector", i64, i64, %"class.primesieve::EratSmall", %"class.primesieve::EratBig", %"class.primesieve::EratMedium" }
%"class.primesieve::Vector" = type { ptr, ptr, ptr }
%"class.primesieve::EratSmall" = type { %"class.primesieve::Wheel", i64, i64, %"class.primesieve::Vector.0" }
%"class.primesieve::Wheel" = type { ptr, i64 }
%"class.primesieve::Vector.0" = type { ptr, ptr, ptr }
%"class.primesieve::EratBig" = type { %"class.primesieve::Wheel.1", i64, i64, i64, ptr, %"class.primesieve::Vector.2" }
%"class.primesieve::Wheel.1" = type { ptr, i64 }
%"class.primesieve::Vector.2" = type { ptr, ptr, ptr }
%"class.primesieve::EratMedium" = type { %"class.primesieve::Wheel", i64, ptr, %"class.primesieve::Vector.2", %"class.primesieve::Vector.2" }
%"class.primesieve::MemoryPool" = type { ptr, i64, %"class.primesieve::Vector.3" }
%"class.primesieve::Vector.3" = type { ptr, ptr, ptr }
%"class.primesieve::SievingPrimes" = type { %"class.primesieve::Erat", i64, i64, i64, i64, i64, %"class.primesieve::Array", %"class.primesieve::Vector.4" }
%"class.primesieve::Array" = type { [128 x i64] }
%"class.primesieve::Vector.4" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10primesieve14PrimeGeneratorC2Emm(ptr noundef nonnull align 8 dereferenceable(1720) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !9
  store i64 %2, ptr %6, align 8, !tbaa !9
  %7 = load ptr, ptr %4, align 8
  %8 = load i64, ptr %5, align 8, !tbaa !9
  %9 = load i64, ptr %6, align 8, !tbaa !9
  call void @_ZN10primesieve4EratC2Emm(ptr noundef nonnull align 8 dereferenceable(280) %7, i64 noundef %8, i64 noundef %9)
  %10 = getelementptr inbounds %"class.primesieve::PrimeGenerator", ptr %7, i32 0, i32 1
  store i8 0, ptr %10, align 8, !tbaa !11
  %11 = getelementptr inbounds %"class.primesieve::PrimeGenerator", ptr %7, i32 0, i32 2
  store i64 0, ptr %11, align 8, !tbaa !28
  %12 = getelementptr inbounds %"class.primesieve::PrimeGenerator", ptr %7, i32 0, i32 3
  store i64 0, ptr %12, align 8, !tbaa !29
  %13 = getelementptr inbounds %"class.primesieve::PrimeGenerator", ptr %7, i32 0, i32 4
  store i64 -1, ptr %13, align 8, !tbaa !30
  %14 = getelementptr inbounds %"class.primesieve::PrimeGenerator", ptr %7, i32 0, i32 5
  call void @_ZN10primesieve10MemoryPoolC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %14) #4
  %15 = getelementptr inbounds %"class.primesieve::PrimeGenerator", ptr %7, i32 0, i32 6
  call void @_ZN10primesieve13SievingPrimesC2Ev(ptr noundef nonnull align 8 dereferenceable(1368) %15) #4
  ret void
}

declare void @_ZN10primesieve4EratC2Emm(ptr noundef nonnull align 8 dereferenceable(280), i64 noundef, i64 noundef) unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve10MemoryPoolC2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve13SievingPrimesC2Ev(ptr noundef nonnull align 8 dereferenceable(1368)) unnamed_addr #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !22, i64 280}
!12 = !{!"_ZTSN10primesieve14PrimeGeneratorE", !13, i64 0, !22, i64 280, !10, i64 288, !10, i64 296, !10, i64 304, !23, i64 312, !25, i64 352}
!13 = !{!"_ZTSN10primesieve4EratE", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !14, i64 32, !10, i64 56, !10, i64 64, !15, i64 72, !18, i64 128, !21, i64 200}
!14 = !{!"_ZTSN10primesieve6VectorIhSaIhEEE", !6, i64 0, !6, i64 8, !6, i64 16}
!15 = !{!"_ZTSN10primesieve9EratSmallE", !16, i64 0, !10, i64 16, !10, i64 24, !17, i64 32}
!16 = !{!"_ZTSN10primesieve5WheelILi30ELi8ELi6EXadsoKNS_9WheelInitEL_ZNS_11wheel30InitEEEEEE", !10, i64 8}
!17 = !{!"_ZTSN10primesieve6VectorINS_12SievingPrimeESaIS1_EEE", !6, i64 0, !6, i64 8, !6, i64 16}
!18 = !{!"_ZTSN10primesieve7EratBigE", !19, i64 0, !10, i64 16, !10, i64 24, !10, i64 32, !6, i64 40, !20, i64 48}
!19 = !{!"_ZTSN10primesieve5WheelILi210ELi48ELi10EXadsoKNS_9WheelInitEL_ZNS_12wheel210InitEEEEEE", !10, i64 8}
!20 = !{!"_ZTSN10primesieve6VectorIPNS_12SievingPrimeESaIS2_EEE", !6, i64 0, !6, i64 8, !6, i64 16}
!21 = !{!"_ZTSN10primesieve10EratMediumE", !16, i64 0, !10, i64 16, !6, i64 24, !20, i64 32, !20, i64 56}
!22 = !{!"bool", !7, i64 0}
!23 = !{!"_ZTSN10primesieve10MemoryPoolE", !6, i64 0, !10, i64 8, !24, i64 16}
!24 = !{!"_ZTSN10primesieve6VectorINS0_IcSaIcEEESaIS2_EEE", !6, i64 0, !6, i64 8, !6, i64 16}
!25 = !{!"_ZTSN10primesieve13SievingPrimesE", !13, i64 0, !10, i64 280, !10, i64 288, !10, i64 296, !10, i64 304, !10, i64 312, !26, i64 320, !27, i64 1344}
!26 = !{!"_ZTSN10primesieve5ArrayImLm128EEE", !7, i64 0}
!27 = !{!"_ZTSN10primesieve6VectorIbSaIbEEE", !6, i64 0, !6, i64 8, !6, i64 16}
!28 = !{!12, !10, i64 288}
!29 = !{!12, !10, i64 296}
!30 = !{!12, !10, i64 304}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN10primesieve14PrimeGeneratorC2Emm(ptr noundef nonnull align 8 dereferenceable(1720) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #0 align 2 {
  tail call void @_ZN10primesieve4EratC2Emm(ptr noundef nonnull align 8 dereferenceable(280) %0, i64 noundef %1, i64 noundef %2)
  %4 = getelementptr inbounds i8, ptr %0, i64 280
  store i8 0, ptr %4, align 8, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 288
  %6 = getelementptr inbounds i8, ptr %0, i64 304
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %5, i8 0, i64 16, i1 false)
  store i64 -1, ptr %6, align 8, !tbaa !26
  %7 = getelementptr inbounds i8, ptr %0, i64 312
  tail call void @_ZN10primesieve10MemoryPoolC2Ev(ptr noundef nonnull align 8 dereferenceable(40) %7) #5
  %8 = getelementptr inbounds i8, ptr %0, i64 352
  tail call void @_ZN10primesieve13SievingPrimesC2Ev(ptr noundef nonnull align 8 dereferenceable(1368) %8) #5
  ret void
}

declare void @_ZN10primesieve4EratC2Emm(ptr noundef nonnull align 8 dereferenceable(280), i64 noundef, i64 noundef) unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve10MemoryPoolC2Ev(ptr noundef nonnull align 8 dereferenceable(40)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN10primesieve13SievingPrimesC2Ev(ptr noundef nonnull align 8 dereferenceable(1368)) unnamed_addr #3 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #4

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !20, i64 280}
!6 = !{!"_ZTSN10primesieve14PrimeGeneratorE", !7, i64 0, !20, i64 280, !8, i64 288, !8, i64 296, !8, i64 304, !21, i64 312, !23, i64 352}
!7 = !{!"_ZTSN10primesieve4EratE", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !8, i64 56, !8, i64 64, !13, i64 72, !16, i64 128, !19, i64 200}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"_ZTSN10primesieve6VectorIhSaIhEEE", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"_ZTSN10primesieve9EratSmallE", !14, i64 0, !8, i64 16, !8, i64 24, !15, i64 32}
!14 = !{!"_ZTSN10primesieve5WheelILi30ELi8ELi6EXadsoKNS_9WheelInitEL_ZNS_11wheel30InitEEEEEE", !8, i64 8}
!15 = !{!"_ZTSN10primesieve6VectorINS_12SievingPrimeESaIS1_EEE", !12, i64 0, !12, i64 8, !12, i64 16}
!16 = !{!"_ZTSN10primesieve7EratBigE", !17, i64 0, !8, i64 16, !8, i64 24, !8, i64 32, !12, i64 40, !18, i64 48}
!17 = !{!"_ZTSN10primesieve5WheelILi210ELi48ELi10EXadsoKNS_9WheelInitEL_ZNS_12wheel210InitEEEEEE", !8, i64 8}
!18 = !{!"_ZTSN10primesieve6VectorIPNS_12SievingPrimeESaIS2_EEE", !12, i64 0, !12, i64 8, !12, i64 16}
!19 = !{!"_ZTSN10primesieve10EratMediumE", !14, i64 0, !8, i64 16, !12, i64 24, !18, i64 32, !18, i64 56}
!20 = !{!"bool", !9, i64 0}
!21 = !{!"_ZTSN10primesieve10MemoryPoolE", !12, i64 0, !8, i64 8, !22, i64 16}
!22 = !{!"_ZTSN10primesieve6VectorINS0_IcSaIcEEESaIS2_EEE", !12, i64 0, !12, i64 8, !12, i64 16}
!23 = !{!"_ZTSN10primesieve13SievingPrimesE", !7, i64 0, !8, i64 280, !8, i64 288, !8, i64 296, !8, i64 304, !8, i64 312, !24, i64 320, !25, i64 1344}
!24 = !{!"_ZTSN10primesieve5ArrayImLm128EEE", !9, i64 0}
!25 = !{!"_ZTSN10primesieve6VectorIbSaIbEEE", !12, i64 0, !12, i64 8, !12, i64 16}
!26 = !{!6, !8, i64 304}


; Effective O3 passes: InstCombinePass,MemCpyOptPass,SROAPass,TailCallElimPass