; LLVM IR from intel/qpl :: sources/core-sw/src/other (qplc_memop)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @px_qplc_zero_8u(ptr noundef %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %9 = load i32, ptr %4, align 4, !tbaa !9
  %10 = zext i32 %9 to i64
  %11 = udiv i64 %10, 8
  %12 = trunc i64 %11 to i32
  store i32 %12, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %13, ptr %6, align 8, !tbaa !5
  br label %14

14:                                               ; preds = %17, %2
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = icmp uge i32 %15, 4
  br i1 %16, label %17, label %30

17:                                               ; preds = %14
  %18 = load ptr, ptr %6, align 8, !tbaa !5
  %19 = getelementptr inbounds i64, ptr %18, i64 0
  store i64 0, ptr %19, align 8, !tbaa !11
  %20 = load ptr, ptr %6, align 8, !tbaa !5
  %21 = getelementptr inbounds i64, ptr %20, i64 1
  store i64 0, ptr %21, align 8, !tbaa !11
  %22 = load ptr, ptr %6, align 8, !tbaa !5
  %23 = getelementptr inbounds i64, ptr %22, i64 2
  store i64 0, ptr %23, align 8, !tbaa !11
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  %25 = getelementptr inbounds i64, ptr %24, i64 3
  store i64 0, ptr %25, align 8, !tbaa !11
  %26 = load i32, ptr %5, align 4, !tbaa !9
  %27 = sub i32 %26, 4
  store i32 %27, ptr %5, align 4, !tbaa !9
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  %29 = getelementptr inbounds i64, ptr %28, i64 4
  store ptr %29, ptr %6, align 8, !tbaa !5
  br label %14, !llvm.loop !13

30:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 0, ptr %7, align 4, !tbaa !9
  br label %31

31:                                               ; preds = %39, %30
  %32 = load i32, ptr %7, align 4, !tbaa !9
  %33 = load i32, ptr %5, align 4, !tbaa !9
  %34 = icmp ult i32 %32, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %42

36:                                               ; preds = %31
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = getelementptr inbounds i64, ptr %37, i32 1
  store ptr %38, ptr %6, align 8, !tbaa !5
  store i64 0, ptr %37, align 8, !tbaa !11
  br label %39

39:                                               ; preds = %36
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = add i32 %40, 1
  store i32 %41, ptr %7, align 4, !tbaa !9
  br label %31, !llvm.loop !15

42:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  %43 = load i32, ptr %4, align 4, !tbaa !9
  %44 = zext i32 %43 to i64
  %45 = urem i64 %44, 8
  %46 = trunc i64 %45 to i32
  store i32 %46, ptr %8, align 4, !tbaa !9
  %47 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %47, ptr %3, align 8, !tbaa !5
  br label %48

48:                                               ; preds = %51, %42
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = icmp uge i32 %49, 2
  br i1 %50, label %51, label %60

51:                                               ; preds = %48
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = getelementptr inbounds i8, ptr %52, i64 0
  store i8 0, ptr %53, align 1, !tbaa !16
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds i8, ptr %54, i64 1
  store i8 0, ptr %55, align 1, !tbaa !16
  %56 = load i32, ptr %8, align 4, !tbaa !9
  %57 = sub i32 %56, 2
  store i32 %57, ptr %8, align 4, !tbaa !9
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds i8, ptr %58, i64 2
  store ptr %59, ptr %3, align 8, !tbaa !5
  br label %48, !llvm.loop !17

60:                                               ; preds = %48
  %61 = load i32, ptr %8, align 4, !tbaa !9
  %62 = icmp ne i32 %61, 0
  br i1 %62, label %63, label %65

63:                                               ; preds = %60
  %64 = load ptr, ptr %3, align 8, !tbaa !5
  store i8 0, ptr %64, align 1, !tbaa !16
  br label %65

65:                                               ; preds = %63, %60
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, inaccessiblemem: none) uwtable
define dso_local void @px_qplc_zero_8u(ptr nocapture noundef writeonly %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = lshr i32 %1, 3
  %4 = icmp ugt i32 %1, 31
  br i1 %4, label %.lr.ph.preheader, label %.preheader

.lr.ph.preheader:                                 ; preds = %2
  %5 = add nsw i32 %3, -4
  %umin = tail call i32 @llvm.umin.i32(i32 %5, i32 3)
  %6 = xor i32 %umin, -1
  %7 = add nsw i32 %3, %6
  %8 = lshr i32 %7, 2
  %9 = zext nneg i32 %8 to i64
  %10 = shl nuw nsw i64 %9, 5
  %11 = add nuw nsw i64 %10, 32
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(1) %0, i8 0, i64 %11, i1 false), !tbaa !5
  %12 = and i32 %7, -4
  %13 = sub nsw i32 %5, %12
  %scevgep = getelementptr i8, ptr %0, i64 %11
  br label %.preheader

.preheader:                                       ; preds = %.lr.ph.preheader, %2
  %.023.lcssa = phi i32 [ %3, %2 ], [ %13, %.lr.ph.preheader ]
  %.022.lcssa = phi ptr [ %0, %2 ], [ %scevgep, %.lr.ph.preheader ]
  %.not39 = icmp eq i32 %.023.lcssa, 0
  br i1 %.not39, label %._crit_edge, label %.lr.ph30.preheader

.lr.ph30.preheader:                               ; preds = %.preheader
  %14 = zext i32 %.023.lcssa to i64
  %15 = shl nuw nsw i64 %14, 3
  tail call void @llvm.memset.p0.i64(ptr align 8 %.022.lcssa, i8 0, i64 %15, i1 false), !tbaa !5
  %16 = add i32 %.023.lcssa, -1
  %17 = zext i32 %16 to i64
  %18 = shl nuw nsw i64 %17, 3
  %19 = add nuw nsw i64 %18, 8
  %scevgep45 = getelementptr i8, ptr %.022.lcssa, i64 %19
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph30.preheader, %.preheader
  %.1.lcssa = phi ptr [ %.022.lcssa, %.preheader ], [ %scevgep45, %.lr.ph30.preheader ]
  %20 = and i32 %1, 7
  %21 = icmp ugt i32 %20, 1
  br i1 %21, label %.lr.ph35.preheader, label %._crit_edge36

.lr.ph35.preheader:                               ; preds = %._crit_edge
  %22 = and i32 %1, 6
  %23 = add nsw i32 %22, -2
  %24 = zext i32 %23 to i64
  %25 = add nuw nsw i64 %24, 2
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(1) %.1.lcssa, i8 0, i64 %25, i1 false), !tbaa !9
  %26 = and i32 %1, 1
  %scevgep46 = getelementptr i8, ptr %.1.lcssa, i64 %25
  br label %._crit_edge36

._crit_edge36:                                    ; preds = %.lr.ph35.preheader, %._crit_edge
  %.024.lcssa = phi ptr [ %.1.lcssa, %._crit_edge ], [ %scevgep46, %.lr.ph35.preheader ]
  %.0.lcssa = phi i32 [ %20, %._crit_edge ], [ %26, %.lr.ph35.preheader ]
  %.not = icmp eq i32 %.0.lcssa, 0
  br i1 %.not, label %28, label %27

27:                                               ; preds = %._crit_edge36
  store i8 0, ptr %.024.lcssa, align 1, !tbaa !9
  br label %28

28:                                               ; preds = %27, %._crit_edge36
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LCSSAPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass