; LLVM IR from intel/qpl :: sources/middle-layer/accelerator (enqueue)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }

@_ZL21hw_status_to_priority = external hidden global %"class.std::unordered_map", align 8
@_ZZ21hw_enqueue_descriptorE10dispatcher = external hidden global ptr, align 8
@_ZGVZ21hw_enqueue_descriptorE10dispatcher = external hidden global i64, align 8
@_ZZ21hw_enqueue_descriptorE12device_count = external hidden global i64, align 8
@_ZGVZ21hw_enqueue_descriptorE12device_count = external hidden global i64, align 8
@_ZZ21hw_enqueue_descriptorE10device_idx = external hidden thread_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local i32 @hw_enqueue_descriptor(ptr noundef %0, i32 noundef %1, ptr noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 4, ptr %8, align 4, !tbaa !11
  %13 = load atomic i8, ptr @_ZGVZ21hw_enqueue_descriptorE10dispatcher acquire, align 8
  %14 = icmp eq i8 %13, 0
  br i1 %14, label %15, label %20, !prof !13

15:                                               ; preds = %3
  %16 = call i32 @__cxa_guard_acquire(ptr @_ZGVZ21hw_enqueue_descriptorE10dispatcher) #2
  %17 = icmp ne i32 %16, 0
  br i1 %17, label %18, label %20

18:                                               ; preds = %15
  %19 = call noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() #2
  store ptr %19, ptr @_ZZ21hw_enqueue_descriptorE10dispatcher, align 8, !tbaa !5
  call void @__cxa_guard_release(ptr @_ZGVZ21hw_enqueue_descriptorE10dispatcher) #2
  br label %20

20:                                               ; preds = %18, %15, %3
  %21 = load atomic i8, ptr @_ZGVZ21hw_enqueue_descriptorE12device_count acquire, align 8
  %22 = icmp eq i8 %21, 0
  br i1 %22, label %23, label %30, !prof !13

23:                                               ; preds = %20
  %24 = call i32 @__cxa_guard_acquire(ptr @_ZGVZ21hw_enqueue_descriptorE12device_count) #2
  %25 = icmp ne i32 %24, 0
  br i1 %25, label %26, label %30

26:                                               ; preds = %23
  %27 = load ptr, ptr @_ZZ21hw_enqueue_descriptorE10dispatcher, align 8, !tbaa !5
  %28 = call noundef i64 @_ZNK3qpl2ml10dispatcher13hw_dispatcher12device_countEv(ptr noundef nonnull align 8 dereferenceable(975232) %27) #2
  store i64 %28, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !14
  %29 = call ptr @llvm.invariant.start.p0(i64 8, ptr @_ZZ21hw_enqueue_descriptorE12device_count)
  call void @__cxa_guard_release(ptr @_ZGVZ21hw_enqueue_descriptorE12device_count) #2
  br label %30

30:                                               ; preds = %26, %23, %20
  %31 = load i64, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !14
  %32 = icmp eq i64 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %30
  store i32 4, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %91

34:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #2
  store i64 0, ptr %10, align 8, !tbaa !14
  br label %35

35:                                               ; preds = %84, %34
  %36 = load i64, ptr %10, align 8, !tbaa !14
  %37 = load i64, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !14
  %38 = icmp ult i64 %36, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %35
  store i32 2, ptr %9, align 4
  br label %87

40:                                               ; preds = %35
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #2
  %41 = load ptr, ptr @_ZZ21hw_enqueue_descriptorE10dispatcher, align 8, !tbaa !5
  %42 = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZZ21hw_enqueue_descriptorE10device_idx)
  %43 = load i32, ptr %42, align 4, !tbaa !9
  %44 = zext i32 %43 to i64
  %45 = call noundef nonnull align 8 dereferenceable(9752) ptr @_ZNK3qpl2ml10dispatcher13hw_dispatcher6deviceEm(ptr noundef nonnull align 8 dereferenceable(975232) %41, i64 noundef %44) #2
  store ptr %45, ptr %11, align 8, !tbaa !5
  %46 = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZZ21hw_enqueue_descriptorE10device_idx)
  %47 = load i32, ptr %46, align 4, !tbaa !9
  %48 = add i32 %47, 1
  %49 = zext i32 %48 to i64
  %50 = load i64, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !14
  %51 = urem i64 %49, %50
  %52 = trunc i64 %51 to i32
  %53 = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZZ21hw_enqueue_descriptorE10device_idx)
  store i32 %52, ptr %53, align 4, !tbaa !9
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  %55 = load i32, ptr %6, align 4, !tbaa !9
  %56 = call noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device28is_matching_user_numa_policyEi(ptr noundef nonnull align 8 dereferenceable(9752) %54, i32 noundef %55) #2
  br i1 %56, label %58, label %57

57:                                               ; preds = %40
  store i32 4, ptr %9, align 4
  br label %81

58:                                               ; preds = %40
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = load ptr, ptr %11, align 8, !tbaa !5
  %61 = call noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device25get_cache_write_availableEv(ptr noundef nonnull align 8 dereferenceable(9752) %60) #2
  call void @_ZL47hw_iaa_descriptor_hint_cpu_cache_as_destinationP13hw_descriptorb(ptr noundef %59, i1 noundef zeroext %61)
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #2
  %62 = load ptr, ptr %11, align 8, !tbaa !5
  %63 = load ptr, ptr %5, align 8, !tbaa !5
  %64 = load ptr, ptr %7, align 8, !tbaa !5
  %65 = call noundef i32 @_ZNK3qpl2ml10dispatcher9hw_device18enqueue_descriptorEPvPNS0_4util22execution_record_ext_tE(ptr noundef nonnull align 8 dereferenceable(9752) %62, ptr noundef %63, ptr noundef %64) #2
  store i32 %65, ptr %12, align 4, !tbaa !11
  %66 = load i32, ptr %12, align 4, !tbaa !11
  %67 = icmp eq i32 %66, 0
  br i1 %67, label %68, label %69

68:                                               ; preds = %58
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %80

69:                                               ; preds = %58
  %70 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt13unordered_mapI21hw_accelerator_statushSt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_hEEE2atERS6_(ptr noundef nonnull align 8 dereferenceable(56) @_ZL21hw_status_to_priority, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %71 = load i8, ptr %70, align 1, !tbaa !16
  %72 = zext i8 %71 to i32
  %73 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt13unordered_mapI21hw_accelerator_statushSt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_hEEE2atERS6_(ptr noundef nonnull align 8 dereferenceable(56) @_ZL21hw_status_to_priority, ptr noundef nonnull align 4 dereferenceable(4) %8)
  %74 = load i8, ptr %73, align 1, !tbaa !16
  %75 = zext i8 %74 to i32
  %76 = icmp slt i32 %72, %75
  br i1 %76, label %77, label %79

77:                                               ; preds = %69
  %78 = load i32, ptr %12, align 4, !tbaa !11
  store i32 %78, ptr %8, align 4, !tbaa !11
  br label %79

79:                                               ; preds = %77, %69
  store i32 0, ptr %9, align 4
  br label %80

80:                                               ; preds = %79, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #2
  br label %81

81:                                               ; preds = %80, %57
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #2
  %82 = load i32, ptr %9, align 4
  switch i32 %82, label %87 [
    i32 0, label %83
    i32 4, label %84
  ]

83:                                               ; preds = %81
  br label %84

84:                                               ; preds = %83, %81
  %85 = load i64, ptr %10, align 8, !tbaa !14
  %86 = add i64 %85, 1
  store i64 %86, ptr %10, align 8, !tbaa !14
  br label %35, !llvm.loop !17

87:                                               ; preds = %81, %39
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #2
  %88 = load i32, ptr %9, align 4
  switch i32 %88, label %91 [
    i32 2, label %89
  ]

89:                                               ; preds = %87
  %90 = load i32, ptr %8, align 4, !tbaa !11
  store i32 %90, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %91

91:                                               ; preds = %89, %87, %33
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  %92 = load i32, ptr %4, align 4
  ret i32 %92
}

; Function Attrs: nounwind
declare i32 @__cxa_guard_acquire(ptr) #2

; Function Attrs: nounwind
declare noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() #3

; Function Attrs: nounwind
declare void @__cxa_guard_release(ptr) #2

; Function Attrs: nounwind
declare noundef i64 @_ZNK3qpl2ml10dispatcher13hw_dispatcher12device_countEv(ptr noundef nonnull align 8 dereferenceable(975232)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare ptr @llvm.invariant.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare noundef nonnull align 8 dereferenceable(9752) ptr @_ZNK3qpl2ml10dispatcher13hw_dispatcher6deviceEm(ptr noundef nonnull align 8 dereferenceable(975232), i64 noundef) #3

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #4

; Function Attrs: nounwind
declare noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device28is_matching_user_numa_policyEi(ptr noundef nonnull align 8 dereferenceable(9752), i32 noundef) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZL47hw_iaa_descriptor_hint_cpu_cache_as_destinationP13hw_descriptorb(ptr noundef, i1 noundef zeroext) #5

; Function Attrs: nounwind
declare noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device25get_cache_write_availableEv(ptr noundef nonnull align 8 dereferenceable(9752)) #3

; Function Attrs: nounwind
declare noundef i32 @_ZNK3qpl2ml10dispatcher9hw_device18enqueue_descriptorEPvPNS0_4util22execution_record_ext_tE(ptr noundef nonnull align 8 dereferenceable(9752), ptr noundef, ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt13unordered_mapI21hw_accelerator_statushSt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_hEEE2atERS6_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 4 dereferenceable(4)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_ZTS21hw_accelerator_status", !7, i64 0}
!13 = !{!"branch_weights", i32 1, i32 1048575}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::unordered_map" = type { %"class.std::_Hashtable" }
%"class.std::_Hashtable" = type { ptr, i64, %"struct.std::__detail::_Hash_node_base", i64, %"struct.std::__detail::_Prime_rehash_policy", ptr }
%"struct.std::__detail::_Hash_node_base" = type { ptr }
%"struct.std::__detail::_Prime_rehash_policy" = type { float, i64 }

@_ZL21hw_status_to_priority = external hidden global %"class.std::unordered_map", align 8
@_ZZ21hw_enqueue_descriptorE10dispatcher = external hidden local_unnamed_addr global ptr, align 8
@_ZGVZ21hw_enqueue_descriptorE10dispatcher = external hidden global i64, align 8
@_ZZ21hw_enqueue_descriptorE12device_count = external hidden global i64, align 8
@_ZGVZ21hw_enqueue_descriptorE12device_count = external hidden global i64, align 8
@_ZZ21hw_enqueue_descriptorE10device_idx = external hidden thread_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local i32 @hw_enqueue_descriptor(ptr noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #6
  store i32 4, ptr %4, align 4, !tbaa !5
  %6 = load atomic i8, ptr @_ZGVZ21hw_enqueue_descriptorE10dispatcher acquire, align 8
  %7 = icmp eq i8 %6, 0
  br i1 %7, label %8, label %12, !prof !9

8:                                                ; preds = %3
  %9 = tail call i32 @__cxa_guard_acquire(ptr nonnull @_ZGVZ21hw_enqueue_descriptorE10dispatcher) #6
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %12, label %10

10:                                               ; preds = %8
  %11 = tail call noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() #6
  store ptr %11, ptr @_ZZ21hw_enqueue_descriptorE10dispatcher, align 8, !tbaa !10
  tail call void @__cxa_guard_release(ptr nonnull @_ZGVZ21hw_enqueue_descriptorE10dispatcher) #6
  br label %12

12:                                               ; preds = %10, %8, %3
  %13 = load atomic i8, ptr @_ZGVZ21hw_enqueue_descriptorE12device_count acquire, align 8
  %14 = icmp eq i8 %13, 0
  br i1 %14, label %15, label %21, !prof !9

15:                                               ; preds = %12
  %16 = tail call i32 @__cxa_guard_acquire(ptr nonnull @_ZGVZ21hw_enqueue_descriptorE12device_count) #6
  %.not15 = icmp eq i32 %16, 0
  br i1 %.not15, label %21, label %17

17:                                               ; preds = %15
  %18 = load ptr, ptr @_ZZ21hw_enqueue_descriptorE10dispatcher, align 8, !tbaa !10
  %19 = tail call noundef i64 @_ZNK3qpl2ml10dispatcher13hw_dispatcher12device_countEv(ptr noundef nonnull align 8 dereferenceable(975232) %18) #6
  store i64 %19, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !12
  %20 = tail call ptr @llvm.invariant.start.p0(i64 8, ptr nonnull @_ZZ21hw_enqueue_descriptorE12device_count)
  tail call void @__cxa_guard_release(ptr nonnull @_ZGVZ21hw_enqueue_descriptorE12device_count) #6
  br label %21

21:                                               ; preds = %17, %15, %12
  %22 = load i64, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !12
  %23 = icmp eq i64 %22, 0
  br i1 %23, label %53, label %.lr.ph

.lr.ph:                                           ; preds = %21
  %24 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZZ21hw_enqueue_descriptorE10device_idx)
  br label %25

25:                                               ; preds = %.lr.ph, %.thread
  %.01123 = phi i64 [ 0, %.lr.ph ], [ %49, %.thread ]
  %26 = load ptr, ptr @_ZZ21hw_enqueue_descriptorE10dispatcher, align 8, !tbaa !10
  %27 = load i32, ptr %24, align 4, !tbaa !14
  %28 = zext i32 %27 to i64
  %29 = call noundef nonnull align 8 dereferenceable(9752) ptr @_ZNK3qpl2ml10dispatcher13hw_dispatcher6deviceEm(ptr noundef nonnull align 8 dereferenceable(975232) %26, i64 noundef %28) #6
  %30 = load i32, ptr %24, align 4, !tbaa !14
  %31 = add i32 %30, 1
  %32 = zext i32 %31 to i64
  %33 = load i64, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !12
  %34 = urem i64 %32, %33
  %35 = trunc nuw i64 %34 to i32
  store i32 %35, ptr %24, align 4, !tbaa !14
  %36 = call noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device28is_matching_user_numa_policyEi(ptr noundef nonnull align 8 dereferenceable(9752) %29, i32 noundef %1) #6
  br i1 %36, label %37, label %.thread

37:                                               ; preds = %25
  %38 = call noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device25get_cache_write_availableEv(ptr noundef nonnull align 8 dereferenceable(9752) %29) #6
  call void @_ZL47hw_iaa_descriptor_hint_cpu_cache_as_destinationP13hw_descriptorb(ptr noundef %0, i1 noundef zeroext %38)
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #6
  %39 = call noundef i32 @_ZNK3qpl2ml10dispatcher9hw_device18enqueue_descriptorEPvPNS0_4util22execution_record_ext_tE(ptr noundef nonnull align 8 dereferenceable(9752) %29, ptr noundef %0, ptr noundef %2) #6
  store i32 %39, ptr %5, align 4, !tbaa !5
  %40 = icmp eq i32 %39, 0
  br i1 %40, label %52, label %41

41:                                               ; preds = %37
  %42 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt13unordered_mapI21hw_accelerator_statushSt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_hEEE2atERS6_(ptr noundef nonnull align 8 dereferenceable(56) @_ZL21hw_status_to_priority, ptr noundef nonnull align 4 dereferenceable(4) %5)
  %43 = load i8, ptr %42, align 1, !tbaa !16
  %44 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt13unordered_mapI21hw_accelerator_statushSt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_hEEE2atERS6_(ptr noundef nonnull align 8 dereferenceable(56) @_ZL21hw_status_to_priority, ptr noundef nonnull align 4 dereferenceable(4) %4)
  %45 = load i8, ptr %44, align 1, !tbaa !16
  %46 = icmp ult i8 %43, %45
  br i1 %46, label %47, label %.thread18

47:                                               ; preds = %41
  %48 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %48, ptr %4, align 4, !tbaa !5
  br label %.thread18

.thread18:                                        ; preds = %47, %41
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #6
  br label %.thread

.thread:                                          ; preds = %25, %.thread18
  %49 = add nuw i64 %.01123, 1
  %50 = load i64, ptr @_ZZ21hw_enqueue_descriptorE12device_count, align 8, !tbaa !12
  %.not16 = icmp ult i64 %49, %50
  br i1 %.not16, label %25, label %.loopexit, !llvm.loop !17

.loopexit:                                        ; preds = %.thread
  %51 = load i32, ptr %4, align 4
  br label %53

52:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #6
  br label %53

53:                                               ; preds = %52, %.loopexit, %21
  %.4 = phi i32 [ 4, %21 ], [ 0, %52 ], [ %51, %.loopexit ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #6
  ret i32 %.4
}

; Function Attrs: nofree nounwind
declare i32 @__cxa_guard_acquire(ptr) local_unnamed_addr #2

; Function Attrs: nounwind
declare noundef nonnull align 8 dereferenceable(975232) ptr @_ZN3qpl2ml10dispatcher13hw_dispatcher12get_instanceEv() local_unnamed_addr #3

; Function Attrs: nofree nounwind
declare void @__cxa_guard_release(ptr) local_unnamed_addr #2

; Function Attrs: nounwind
declare noundef i64 @_ZNK3qpl2ml10dispatcher13hw_dispatcher12device_countEv(ptr noundef nonnull align 8 dereferenceable(975232)) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare ptr @llvm.invariant.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare noundef nonnull align 8 dereferenceable(9752) ptr @_ZNK3qpl2ml10dispatcher13hw_dispatcher6deviceEm(ptr noundef nonnull align 8 dereferenceable(975232), i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #4

; Function Attrs: nounwind
declare noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device28is_matching_user_numa_policyEi(ptr noundef nonnull align 8 dereferenceable(9752), i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden void @_ZL47hw_iaa_descriptor_hint_cpu_cache_as_destinationP13hw_descriptorb(ptr noundef, i1 noundef zeroext) local_unnamed_addr #5

; Function Attrs: nounwind
declare noundef zeroext i1 @_ZNK3qpl2ml10dispatcher9hw_device25get_cache_write_availableEv(ptr noundef nonnull align 8 dereferenceable(9752)) local_unnamed_addr #3

; Function Attrs: nounwind
declare noundef i32 @_ZNK3qpl2ml10dispatcher9hw_device18enqueue_descriptorEPvPNS0_4util22execution_record_ext_tE(ptr noundef nonnull align 8 dereferenceable(9752), ptr noundef, ptr noundef) local_unnamed_addr #3

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNKSt13unordered_mapI21hw_accelerator_statushSt4hashIS0_ESt8equal_toIS0_ESaISt4pairIKS0_hEEE2atERS6_(ptr noundef nonnull align 8 dereferenceable(56), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"_ZTS21hw_accelerator_status", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!"branch_weights", i32 1, i32 1048575}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass