; LLVM IR from codemistic/Data-Structures-and-Algorithms :: CPP/Segment Tree/basic.ll (Z6updateRSt6vectorIiSaIiEEiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateRSt6vectorIiSaIiEEiiiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #2 {
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  store ptr %0, ptr %7, align 8, !tbaa !5
  store i32 %1, ptr %8, align 4, !tbaa !9
  store i32 %2, ptr %9, align 4, !tbaa !9
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !9
  store i32 %5, ptr %12, align 4, !tbaa !9
  %14 = load i32, ptr %8, align 4, !tbaa !9
  %15 = load i32, ptr %11, align 4, !tbaa !9
  %16 = icmp sgt i32 %14, %15
  br i1 %16, label %21, label %17

17:                                               ; preds = %6
  %18 = load i32, ptr %9, align 4, !tbaa !9
  %19 = load i32, ptr %11, align 4, !tbaa !9
  %20 = icmp slt i32 %18, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %17, %6
  br label %57

22:                                               ; preds = %17
  %23 = load i32, ptr %12, align 4, !tbaa !9
  %24 = load ptr, ptr %7, align 8, !tbaa !5
  %25 = load i32, ptr %10, align 4, !tbaa !9
  %26 = sext i32 %25 to i64
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %24, i64 noundef %26) #3
  %28 = load i32, ptr %27, align 4, !tbaa !9
  %29 = add nsw i32 %28, %23
  store i32 %29, ptr %27, align 4, !tbaa !9
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = icmp slt i32 %30, %31
  br i1 %32, label %33, label %57

33:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  %34 = load i32, ptr %8, align 4, !tbaa !9
  %35 = load i32, ptr %9, align 4, !tbaa !9
  %36 = load i32, ptr %8, align 4, !tbaa !9
  %37 = sub nsw i32 %35, %36
  %38 = sdiv i32 %37, 2
  %39 = add nsw i32 %34, %38
  store i32 %39, ptr %13, align 4, !tbaa !9
  %40 = load ptr, ptr %7, align 8, !tbaa !5
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = load i32, ptr %13, align 4, !tbaa !9
  %43 = load i32, ptr %10, align 4, !tbaa !9
  %44 = mul nsw i32 2, %43
  %45 = add nsw i32 %44, 1
  %46 = load i32, ptr %11, align 4, !tbaa !9
  %47 = load i32, ptr %12, align 4, !tbaa !9
  call void @_Z6updateRSt6vectorIiSaIiEEiiiii(ptr noundef nonnull align 8 dereferenceable(24) %40, i32 noundef %41, i32 noundef %42, i32 noundef %45, i32 noundef %46, i32 noundef %47)
  %48 = load ptr, ptr %7, align 8, !tbaa !5
  %49 = load i32, ptr %13, align 4, !tbaa !9
  %50 = add nsw i32 %49, 1
  %51 = load i32, ptr %9, align 4, !tbaa !9
  %52 = load i32, ptr %10, align 4, !tbaa !9
  %53 = mul nsw i32 2, %52
  %54 = add nsw i32 %53, 2
  %55 = load i32, ptr %11, align 4, !tbaa !9
  %56 = load i32, ptr %12, align 4, !tbaa !9
  call void @_Z6updateRSt6vectorIiSaIiEEiiiii(ptr noundef nonnull align 8 dereferenceable(24) %48, i32 noundef %50, i32 noundef %51, i32 noundef %54, i32 noundef %55, i32 noundef %56)
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %57

57:                                               ; preds = %33, %22, %21
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateRSt6vectorIiSaIiEEiiiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
  %7 = icmp slt i32 %2, %4
  %8 = icmp sgt i32 %1, %4
  %or.cond30 = or i1 %7, %8
  br i1 %or.cond30, label %tailrecurse._crit_edge, label %.lr.ph.split

.lr.ph.split:                                     ; preds = %6, %tailrecurse
  %.tr2732 = phi i32 [ %20, %tailrecurse ], [ %3, %6 ]
  %.tr2531 = phi i32 [ %19, %tailrecurse ], [ %1, %6 ]
  %9 = sext i32 %.tr2732 to i64
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %9) #1
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = add nsw i32 %11, %5
  store i32 %12, ptr %10, align 4, !tbaa !5
  %13 = icmp slt i32 %.tr2531, %2
  br i1 %13, label %tailrecurse, label %tailrecurse._crit_edge

tailrecurse:                                      ; preds = %.lr.ph.split
  %14 = sub nsw i32 %2, %.tr2531
  %15 = sdiv i32 %14, 2
  %16 = add nsw i32 %15, %.tr2531
  %17 = shl nsw i32 %.tr2732, 1
  %18 = or disjoint i32 %17, 1
  tail call void @_Z6updateRSt6vectorIiSaIiEEiiiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %.tr2531, i32 noundef %16, i32 noundef %18, i32 noundef %4, i32 noundef %5)
  %19 = add nsw i32 %16, 1
  %20 = add nsw i32 %17, 2
  %.not = icmp slt i32 %16, %4
  br i1 %.not, label %.lr.ph.split, label %tailrecurse._crit_edge

tailrecurse._crit_edge:                           ; preds = %.lr.ph.split, %tailrecurse, %6
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass