; LLVM IR from AdarshGaur/Competitive-Programming :: Codeforces/Codeforces Round #790 (Div. 4)/D. X-Sum.ll (Z3funll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i64, align 8
@m = external dso_local global i64, align 8
@a = external dso_local global %"class.std::vector.3", align 8
@dx = external dso_local global [4 x i64], align 16
@dy = external dso_local global [4 x i64], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z3funll(i64 noundef %0, i64 noundef %1) #1 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  %10 = load i64, ptr %3, align 8, !tbaa !5
  %11 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %10) #2
  %12 = load i64, ptr %4, align 8, !tbaa !5
  %13 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %11, i64 noundef %12) #2
  %14 = load i64, ptr %13, align 8, !tbaa !5
  store i64 %14, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #2
  store i64 0, ptr %6, align 8, !tbaa !5
  br label %15

15:                                               ; preds = %67, %2
  %16 = load i64, ptr %6, align 8, !tbaa !5
  %17 = icmp slt i64 %16, 4
  br i1 %17, label %19, label %18

18:                                               ; preds = %15
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #2
  br label %70

19:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  %20 = load i64, ptr %3, align 8, !tbaa !5
  %21 = load i64, ptr %6, align 8, !tbaa !5
  %22 = getelementptr inbounds [4 x i64], ptr @dx, i64 0, i64 %21
  %23 = load i64, ptr %22, align 8, !tbaa !5
  %24 = add nsw i64 %20, %23
  store i64 %24, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #2
  %25 = load i64, ptr %4, align 8, !tbaa !5
  %26 = load i64, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds [4 x i64], ptr @dy, i64 0, i64 %26
  %28 = load i64, ptr %27, align 8, !tbaa !5
  %29 = add nsw i64 %25, %28
  store i64 %29, ptr %9, align 8, !tbaa !5
  br label %30

30:                                               ; preds = %55, %19
  %31 = load i64, ptr %8, align 8, !tbaa !5
  %32 = icmp sge i64 %31, 0
  br i1 %32, label %33, label %44

33:                                               ; preds = %30
  %34 = load i64, ptr %9, align 8, !tbaa !5
  %35 = icmp sge i64 %34, 0
  br i1 %35, label %36, label %44

36:                                               ; preds = %33
  %37 = load i64, ptr %8, align 8, !tbaa !5
  %38 = load i64, ptr @n, align 8, !tbaa !5
  %39 = icmp slt i64 %37, %38
  br i1 %39, label %40, label %44

40:                                               ; preds = %36
  %41 = load i64, ptr %9, align 8, !tbaa !5
  %42 = load i64, ptr @m, align 8, !tbaa !5
  %43 = icmp slt i64 %41, %42
  br label %44

44:                                               ; preds = %40, %36, %33, %30
  %45 = phi i1 [ false, %36 ], [ false, %33 ], [ false, %30 ], [ %43, %40 ]
  br i1 %45, label %47, label %46

46:                                               ; preds = %44
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  br label %66

47:                                               ; preds = %44
  %48 = load i64, ptr %8, align 8, !tbaa !5
  %49 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %48) #2
  %50 = load i64, ptr %9, align 8, !tbaa !5
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %49, i64 noundef %50) #2
  %52 = load i64, ptr %51, align 8, !tbaa !5
  %53 = load i64, ptr %5, align 8, !tbaa !5
  %54 = add nsw i64 %53, %52
  store i64 %54, ptr %5, align 8, !tbaa !5
  br label %55

55:                                               ; preds = %47
  %56 = load i64, ptr %6, align 8, !tbaa !5
  %57 = getelementptr inbounds [4 x i64], ptr @dx, i64 0, i64 %56
  %58 = load i64, ptr %57, align 8, !tbaa !5
  %59 = load i64, ptr %8, align 8, !tbaa !5
  %60 = add nsw i64 %59, %58
  store i64 %60, ptr %8, align 8, !tbaa !5
  %61 = load i64, ptr %6, align 8, !tbaa !5
  %62 = getelementptr inbounds [4 x i64], ptr @dy, i64 0, i64 %61
  %63 = load i64, ptr %62, align 8, !tbaa !5
  %64 = load i64, ptr %9, align 8, !tbaa !5
  %65 = add nsw i64 %64, %63
  store i64 %65, ptr %9, align 8, !tbaa !5
  br label %30, !llvm.loop !9

66:                                               ; preds = %46
  br label %67

67:                                               ; preds = %66
  %68 = load i64, ptr %6, align 8, !tbaa !5
  %69 = add nsw i64 %68, 1
  store i64 %69, ptr %6, align 8, !tbaa !5
  br label %15, !llvm.loop !11

70:                                               ; preds = %18
  %71 = load i64, ptr %5, align 8, !tbaa !5
  store i32 1, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  ret i64 %71
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<long>, std::allocator<std::vector<long>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i64, align 8
@m = external dso_local local_unnamed_addr global i64, align 8
@a = external dso_local global %"class.std::vector.3", align 8
@dx = external dso_local local_unnamed_addr global [4 x i64], align 16
@dy = external dso_local local_unnamed_addr global [4 x i64], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i64 @_Z3funll(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %0) #1
  %4 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %1) #1
  %5 = load i64, ptr %4, align 8, !tbaa !5
  %6 = load i64, ptr @dx, align 16, !tbaa !5
  %7 = add nsw i64 %6, %0
  %8 = load i64, ptr @dy, align 16, !tbaa !5
  %9 = add nsw i64 %8, %1
  %10 = icmp sgt i64 %7, -1
  %11 = icmp sgt i64 %9, -1
  %or.cond28 = select i1 %10, i1 %11, i1 false
  %12 = load i64, ptr @n, align 8
  %13 = icmp slt i64 %7, %12
  %or.cond2529 = select i1 %or.cond28, i1 %13, i1 false
  %14 = load i64, ptr @m, align 8
  %15 = icmp slt i64 %9, %14
  %or.cond2730 = select i1 %or.cond2529, i1 %15, i1 false
  br i1 %or.cond2730, label %.lr.ph, label %.critedge

.critedge:                                        ; preds = %.lr.ph, %2
  %16 = phi i64 [ %14, %2 ], [ %100, %.lr.ph ]
  %17 = phi i64 [ %12, %2 ], [ %98, %.lr.ph ]
  %.1.lcssa = phi i64 [ %5, %2 ], [ %91, %.lr.ph ]
  %18 = load i64, ptr getelementptr inbounds (i8, ptr @dx, i64 8), align 8, !tbaa !5
  %19 = add nsw i64 %18, %0
  %20 = load i64, ptr getelementptr inbounds (i8, ptr @dy, i64 8), align 8, !tbaa !5
  %21 = add nsw i64 %20, %1
  %22 = icmp sgt i64 %19, -1
  %23 = icmp sgt i64 %21, -1
  %or.cond28.1 = select i1 %22, i1 %23, i1 false
  %24 = icmp slt i64 %19, %17
  %or.cond2529.1 = select i1 %or.cond28.1, i1 %24, i1 false
  %25 = icmp slt i64 %21, %16
  %or.cond2730.1 = select i1 %or.cond2529.1, i1 %25, i1 false
  br i1 %or.cond2730.1, label %.lr.ph.1, label %.critedge.1

.lr.ph.1:                                         ; preds = %.critedge, %.lr.ph.1
  %.033.1 = phi i64 [ %33, %.lr.ph.1 ], [ %21, %.critedge ]
  %.02132.1 = phi i64 [ %31, %.lr.ph.1 ], [ %19, %.critedge ]
  %.131.1 = phi i64 [ %29, %.lr.ph.1 ], [ %.1.lcssa, %.critedge ]
  %26 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %.02132.1) #1
  %27 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %.033.1) #1
  %28 = load i64, ptr %27, align 8, !tbaa !5
  %29 = add nsw i64 %28, %.131.1
  %30 = load i64, ptr getelementptr inbounds (i8, ptr @dx, i64 8), align 8, !tbaa !5
  %31 = add nsw i64 %30, %.02132.1
  %32 = load i64, ptr getelementptr inbounds (i8, ptr @dy, i64 8), align 8, !tbaa !5
  %33 = add nsw i64 %32, %.033.1
  %34 = icmp sgt i64 %31, -1
  %35 = icmp sgt i64 %33, -1
  %or.cond.1 = select i1 %34, i1 %35, i1 false
  %36 = load i64, ptr @n, align 8
  %37 = icmp slt i64 %31, %36
  %or.cond25.1 = select i1 %or.cond.1, i1 %37, i1 false
  %38 = load i64, ptr @m, align 8
  %39 = icmp slt i64 %33, %38
  %or.cond27.1 = select i1 %or.cond25.1, i1 %39, i1 false
  br i1 %or.cond27.1, label %.lr.ph.1, label %.critedge.1, !llvm.loop !9

.critedge.1:                                      ; preds = %.lr.ph.1, %.critedge
  %40 = phi i64 [ %16, %.critedge ], [ %38, %.lr.ph.1 ]
  %41 = phi i64 [ %17, %.critedge ], [ %36, %.lr.ph.1 ]
  %.1.lcssa.1 = phi i64 [ %.1.lcssa, %.critedge ], [ %29, %.lr.ph.1 ]
  %42 = load i64, ptr getelementptr inbounds (i8, ptr @dx, i64 16), align 16, !tbaa !5
  %43 = add nsw i64 %42, %0
  %44 = load i64, ptr getelementptr inbounds (i8, ptr @dy, i64 16), align 16, !tbaa !5
  %45 = add nsw i64 %44, %1
  %46 = icmp sgt i64 %43, -1
  %47 = icmp sgt i64 %45, -1
  %or.cond28.2 = select i1 %46, i1 %47, i1 false
  %48 = icmp slt i64 %43, %41
  %or.cond2529.2 = select i1 %or.cond28.2, i1 %48, i1 false
  %49 = icmp slt i64 %45, %40
  %or.cond2730.2 = select i1 %or.cond2529.2, i1 %49, i1 false
  br i1 %or.cond2730.2, label %.lr.ph.2, label %.critedge.2

.lr.ph.2:                                         ; preds = %.critedge.1, %.lr.ph.2
  %.033.2 = phi i64 [ %57, %.lr.ph.2 ], [ %45, %.critedge.1 ]
  %.02132.2 = phi i64 [ %55, %.lr.ph.2 ], [ %43, %.critedge.1 ]
  %.131.2 = phi i64 [ %53, %.lr.ph.2 ], [ %.1.lcssa.1, %.critedge.1 ]
  %50 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %.02132.2) #1
  %51 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %50, i64 noundef %.033.2) #1
  %52 = load i64, ptr %51, align 8, !tbaa !5
  %53 = add nsw i64 %52, %.131.2
  %54 = load i64, ptr getelementptr inbounds (i8, ptr @dx, i64 16), align 16, !tbaa !5
  %55 = add nsw i64 %54, %.02132.2
  %56 = load i64, ptr getelementptr inbounds (i8, ptr @dy, i64 16), align 16, !tbaa !5
  %57 = add nsw i64 %56, %.033.2
  %58 = icmp sgt i64 %55, -1
  %59 = icmp sgt i64 %57, -1
  %or.cond.2 = select i1 %58, i1 %59, i1 false
  %60 = load i64, ptr @n, align 8
  %61 = icmp slt i64 %55, %60
  %or.cond25.2 = select i1 %or.cond.2, i1 %61, i1 false
  %62 = load i64, ptr @m, align 8
  %63 = icmp slt i64 %57, %62
  %or.cond27.2 = select i1 %or.cond25.2, i1 %63, i1 false
  br i1 %or.cond27.2, label %.lr.ph.2, label %.critedge.2, !llvm.loop !9

.critedge.2:                                      ; preds = %.lr.ph.2, %.critedge.1
  %64 = phi i64 [ %40, %.critedge.1 ], [ %62, %.lr.ph.2 ]
  %65 = phi i64 [ %41, %.critedge.1 ], [ %60, %.lr.ph.2 ]
  %.1.lcssa.2 = phi i64 [ %.1.lcssa.1, %.critedge.1 ], [ %53, %.lr.ph.2 ]
  %66 = load i64, ptr getelementptr inbounds (i8, ptr @dx, i64 24), align 8, !tbaa !5
  %67 = add nsw i64 %66, %0
  %68 = load i64, ptr getelementptr inbounds (i8, ptr @dy, i64 24), align 8, !tbaa !5
  %69 = add nsw i64 %68, %1
  %70 = icmp sgt i64 %67, -1
  %71 = icmp sgt i64 %69, -1
  %or.cond28.3 = select i1 %70, i1 %71, i1 false
  %72 = icmp slt i64 %67, %65
  %or.cond2529.3 = select i1 %or.cond28.3, i1 %72, i1 false
  %73 = icmp slt i64 %69, %64
  %or.cond2730.3 = select i1 %or.cond2529.3, i1 %73, i1 false
  br i1 %or.cond2730.3, label %.lr.ph.3, label %.critedge.3

.lr.ph.3:                                         ; preds = %.critedge.2, %.lr.ph.3
  %.033.3 = phi i64 [ %81, %.lr.ph.3 ], [ %69, %.critedge.2 ]
  %.02132.3 = phi i64 [ %79, %.lr.ph.3 ], [ %67, %.critedge.2 ]
  %.131.3 = phi i64 [ %77, %.lr.ph.3 ], [ %.1.lcssa.2, %.critedge.2 ]
  %74 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %.02132.3) #1
  %75 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %74, i64 noundef %.033.3) #1
  %76 = load i64, ptr %75, align 8, !tbaa !5
  %77 = add nsw i64 %76, %.131.3
  %78 = load i64, ptr getelementptr inbounds (i8, ptr @dx, i64 24), align 8, !tbaa !5
  %79 = add nsw i64 %78, %.02132.3
  %80 = load i64, ptr getelementptr inbounds (i8, ptr @dy, i64 24), align 8, !tbaa !5
  %81 = add nsw i64 %80, %.033.3
  %82 = icmp sgt i64 %79, -1
  %83 = icmp sgt i64 %81, -1
  %or.cond.3 = select i1 %82, i1 %83, i1 false
  %84 = load i64, ptr @n, align 8
  %85 = icmp slt i64 %79, %84
  %or.cond25.3 = select i1 %or.cond.3, i1 %85, i1 false
  %86 = load i64, ptr @m, align 8
  %87 = icmp slt i64 %81, %86
  %or.cond27.3 = select i1 %or.cond25.3, i1 %87, i1 false
  br i1 %or.cond27.3, label %.lr.ph.3, label %.critedge.3, !llvm.loop !9

.critedge.3:                                      ; preds = %.lr.ph.3, %.critedge.2
  %.1.lcssa.3 = phi i64 [ %.1.lcssa.2, %.critedge.2 ], [ %77, %.lr.ph.3 ]
  ret i64 %.1.lcssa.3

.lr.ph:                                           ; preds = %2, %.lr.ph
  %.033 = phi i64 [ %95, %.lr.ph ], [ %9, %2 ]
  %.02132 = phi i64 [ %93, %.lr.ph ], [ %7, %2 ]
  %.131 = phi i64 [ %91, %.lr.ph ], [ %5, %2 ]
  %88 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @a, i64 noundef %.02132) #1
  %89 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %88, i64 noundef %.033) #1
  %90 = load i64, ptr %89, align 8, !tbaa !5
  %91 = add nsw i64 %90, %.131
  %92 = load i64, ptr @dx, align 16, !tbaa !5
  %93 = add nsw i64 %92, %.02132
  %94 = load i64, ptr @dy, align 16, !tbaa !5
  %95 = add nsw i64 %94, %.033
  %96 = icmp sgt i64 %93, -1
  %97 = icmp sgt i64 %95, -1
  %or.cond = select i1 %96, i1 %97, i1 false
  %98 = load i64, ptr @n, align 8
  %99 = icmp slt i64 %93, %98
  %or.cond25 = select i1 %or.cond, i1 %99, i1 false
  %100 = load i64, ptr @m, align 8
  %101 = icmp slt i64 %95, %100
  %or.cond27 = select i1 %or.cond25, i1 %101, i1 false
  br i1 %or.cond27, label %.lr.ph, label %.critedge, !llvm.loop !9
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IlSaIlEESaIS1_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIlSaIlEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass