; LLVM IR from aagdev/mlimgsynth :: src/ccommon (any)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@g_allocators = external dso_local global [64 x ptr], align 16

; Function Attrs: nounwind uwtable
define dso_local i32 @any_allocator_register(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !9
  %6 = load i32, ptr %5, align 4, !tbaa !9
  %7 = icmp ne i32 %6, 0
  br i1 %7, label %35, label %8

8:                                                ; preds = %2
  %9 = load i32, ptr %5, align 4, !tbaa !9
  %10 = add i32 %9, 1
  store i32 %10, ptr %5, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %31, %8
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = icmp ult i32 %12, 64
  br i1 %13, label %14, label %20

14:                                               ; preds = %11
  %15 = load i32, ptr %5, align 4, !tbaa !9
  %16 = zext i32 %15 to i64
  %17 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %16
  %18 = load ptr, ptr %17, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br label %20

20:                                               ; preds = %14, %11
  %21 = phi i1 [ false, %11 ], [ %19, %14 ]
  br i1 %21, label %22, label %34

22:                                               ; preds = %20
  %23 = load i32, ptr %5, align 4, !tbaa !9
  %24 = zext i32 %23 to i64
  %25 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %24
  %26 = load ptr, ptr %25, align 8, !tbaa !5
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = icmp eq ptr %26, %27
  br i1 %28, label %29, label %31

29:                                               ; preds = %22
  %30 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %30, ptr %3, align 4
  br label %59

31:                                               ; preds = %22
  %32 = load i32, ptr %5, align 4, !tbaa !9
  %33 = add i32 %32, 1
  store i32 %33, ptr %5, align 4, !tbaa !9
  br label %11, !llvm.loop !11

34:                                               ; preds = %20
  br label %35

35:                                               ; preds = %34, %2
  %36 = load i32, ptr %5, align 4, !tbaa !9
  %37 = icmp uge i32 %36, 64
  br i1 %37, label %38, label %39

38:                                               ; preds = %35
  store i32 0, ptr %3, align 4
  br label %59

39:                                               ; preds = %35
  %40 = load i32, ptr %5, align 4, !tbaa !9
  %41 = zext i32 %40 to i64
  %42 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %41
  %43 = load ptr, ptr %42, align 8, !tbaa !5
  %44 = icmp ne ptr %43, null
  br i1 %44, label %45, label %53

45:                                               ; preds = %39
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = zext i32 %46 to i64
  %48 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %47
  %49 = load ptr, ptr %48, align 8, !tbaa !5
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  %51 = icmp ne ptr %49, %50
  br i1 %51, label %52, label %53

52:                                               ; preds = %45
  store i32 0, ptr %3, align 4
  br label %59

53:                                               ; preds = %45, %39
  %54 = load ptr, ptr %4, align 8, !tbaa !5
  %55 = load i32, ptr %5, align 4, !tbaa !9
  %56 = zext i32 %55 to i64
  %57 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %56
  store ptr %54, ptr %57, align 8, !tbaa !5
  %58 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %58, ptr %3, align 4
  br label %59

59:                                               ; preds = %53, %52, %38, %29
  %60 = load i32, ptr %3, align 4
  ret i32 %60
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@g_allocators = external dso_local local_unnamed_addr global [64 x ptr], align 16

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local range(i32 0, 64) i32 @any_allocator_register(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %.preheader, label %.critedge

.preheader:                                       ; preds = %2, %15
  %indvars.iv = phi i64 [ %indvars.iv.next.2, %15 ], [ 1, %2 ]
  %3 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %indvars.iv
  %4 = load ptr, ptr %3, align 8, !tbaa !5
  %.not20 = icmp eq ptr %4, null
  br i1 %.not20, label %.critedge.thread24.loopexit, label %5

5:                                                ; preds = %.preheader
  %6 = icmp eq ptr %4, %0
  br i1 %6, label %.critedge.thread.loopexit.split.loop.exit, label %.preheader.1

.preheader.1:                                     ; preds = %5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %7 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %indvars.iv.next
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  %.not20.1 = icmp eq ptr %8, null
  br i1 %.not20.1, label %.critedge.thread24.loopexit, label %9

9:                                                ; preds = %.preheader.1
  %10 = icmp eq ptr %8, %0
  br i1 %10, label %.critedge.thread.loopexit.split.loop.exit, label %.preheader.2

.preheader.2:                                     ; preds = %9
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %11 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %indvars.iv.next.1
  %12 = load ptr, ptr %11, align 8, !tbaa !5
  %.not20.2 = icmp eq ptr %12, null
  br i1 %.not20.2, label %.critedge.thread24.loopexit, label %13

13:                                               ; preds = %.preheader.2
  %14 = icmp eq ptr %12, %0
  br i1 %14, label %.critedge.thread.loopexit.split.loop.exit, label %15

15:                                               ; preds = %13
  %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
  %exitcond.not.2 = icmp eq i64 %indvars.iv.next.2, 64
  br i1 %exitcond.not.2, label %.critedge.thread, label %.preheader, !llvm.loop !9

.critedge:                                        ; preds = %2
  %16 = icmp ugt i32 %1, 63
  br i1 %16, label %.critedge.thread, label %.critedge.thread24

.critedge.thread24.loopexit:                      ; preds = %.preheader.2, %.preheader.1, %.preheader
  %indvars.iv.lcssa = phi i64 [ %indvars.iv, %.preheader ], [ %indvars.iv.next, %.preheader.1 ], [ %indvars.iv.next.1, %.preheader.2 ]
  %17 = trunc nuw nsw i64 %indvars.iv.lcssa to i32
  br label %.critedge.thread24

.critedge.thread24:                               ; preds = %.critedge.thread24.loopexit, %.critedge
  %.126 = phi i32 [ %1, %.critedge ], [ %17, %.critedge.thread24.loopexit ]
  %18 = zext nneg i32 %.126 to i64
  %19 = getelementptr inbounds [64 x ptr], ptr @g_allocators, i64 0, i64 %18
  %20 = load ptr, ptr %19, align 8, !tbaa !5
  %.not21 = icmp eq ptr %20, null
  %.not22 = icmp eq ptr %20, %0
  %or.cond = or i1 %.not21, %.not22
  br i1 %or.cond, label %21, label %.critedge.thread

21:                                               ; preds = %.critedge.thread24
  store ptr %0, ptr %19, align 8, !tbaa !5
  br label %.critedge.thread

.critedge.thread.loopexit.split.loop.exit:        ; preds = %13, %9, %5
  %indvars.iv.lcssa37 = phi i64 [ %indvars.iv, %5 ], [ %indvars.iv.next, %9 ], [ %indvars.iv.next.1, %13 ]
  %22 = trunc nuw nsw i64 %indvars.iv.lcssa37 to i32
  br label %.critedge.thread

.critedge.thread:                                 ; preds = %15, %.critedge.thread.loopexit.split.loop.exit, %.critedge.thread24, %.critedge, %21
  %.015 = phi i32 [ %.126, %21 ], [ 0, %.critedge ], [ 0, %.critedge.thread24 ], [ %22, %.critedge.thread.loopexit.split.loop.exit ], [ 0, %15 ]
  ret i32 %.015
}

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass