; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_core)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@OSRunning = external dso_local global i8, align 1
@OSIntNesting = external dso_local global i8, align 1
@OSLockNesting = external dso_local global i8, align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @OSSchedLock() #2 {
  %1 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 0, ptr %1, align 4, !tbaa !5
  %2 = load i8, ptr @OSRunning, align 1, !tbaa !9
  %3 = zext i8 %2 to i32
  %4 = icmp eq i32 %3, 1
  br i1 %4, label %5, label %20

5:                                                ; preds = %0
  %6 = call i32 @OS_CPU_SR_Save()
  store i32 %6, ptr %1, align 4, !tbaa !5
  %7 = load i8, ptr @OSIntNesting, align 1, !tbaa !9
  %8 = zext i8 %7 to i32
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %18

10:                                               ; preds = %5
  %11 = load i8, ptr @OSLockNesting, align 1, !tbaa !9
  %12 = zext i8 %11 to i32
  %13 = icmp ult i32 %12, 255
  br i1 %13, label %14, label %17

14:                                               ; preds = %10
  %15 = load i8, ptr @OSLockNesting, align 1, !tbaa !9
  %16 = add i8 %15, 1
  store i8 %16, ptr @OSLockNesting, align 1, !tbaa !9
  br label %17

17:                                               ; preds = %14, %10
  br label %18

18:                                               ; preds = %17, %5
  %19 = load i32, ptr %1, align 4, !tbaa !5
  call void @OS_CPU_SR_Restore(i32 noundef %19)
  br label %20

20:                                               ; preds = %18, %0
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@OSRunning = external dso_local local_unnamed_addr global i8, align 1
@OSIntNesting = external dso_local local_unnamed_addr global i8, align 1
@OSLockNesting = external dso_local local_unnamed_addr global i8, align 1

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @OSSchedLock() local_unnamed_addr #1 {
  %1 = load i8, ptr @OSRunning, align 1, !tbaa !5
  %2 = icmp eq i8 %1, 1
  br i1 %2, label %3, label %12

3:                                                ; preds = %0
  %4 = tail call i32 @OS_CPU_SR_Save() #2
  %5 = load i8, ptr @OSIntNesting, align 1, !tbaa !5
  %6 = icmp eq i8 %5, 0
  %7 = load i8, ptr @OSLockNesting, align 1
  %8 = icmp ne i8 %7, -1
  %or.cond = select i1 %6, i1 %8, i1 false
  br i1 %or.cond, label %9, label %11

9:                                                ; preds = %3
  %10 = add nuw i8 %7, 1
  store i8 %10, ptr @OSLockNesting, align 1, !tbaa !5
  br label %11

11:                                               ; preds = %9, %3
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  br label %12

12:                                               ; preds = %11, %0
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass