; LLVM IR from asllop/AppOS :: net/slip (slip)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @slip_send(i8 noundef zeroext %0, ptr noundef %1, i32 noundef %2) #0 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  store i8 %0, ptr %4, align 1, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !8
  store i32 %2, ptr %6, align 4, !tbaa !10
  %7 = load i8, ptr %4, align 1, !tbaa !5
  call void @slip_serial_put(i8 noundef zeroext %7, i8 noundef zeroext -64)
  br label %8

8:                                                ; preds = %26, %3
  %9 = load i32, ptr %6, align 4, !tbaa !10
  %10 = add nsw i32 %9, -1
  store i32 %10, ptr %6, align 4, !tbaa !10
  %11 = icmp ne i32 %9, 0
  br i1 %11, label %12, label %29

12:                                               ; preds = %8
  %13 = load ptr, ptr %5, align 8, !tbaa !8
  %14 = load i8, ptr %13, align 1, !tbaa !5
  %15 = zext i8 %14 to i32
  switch i32 %15, label %22 [
    i32 192, label %16
    i32 219, label %19
  ]

16:                                               ; preds = %12
  %17 = load i8, ptr %4, align 1, !tbaa !5
  call void @slip_serial_put(i8 noundef zeroext %17, i8 noundef zeroext -37)
  %18 = load i8, ptr %4, align 1, !tbaa !5
  call void @slip_serial_put(i8 noundef zeroext %18, i8 noundef zeroext -36)
  br label %26

19:                                               ; preds = %12
  %20 = load i8, ptr %4, align 1, !tbaa !5
  call void @slip_serial_put(i8 noundef zeroext %20, i8 noundef zeroext -37)
  %21 = load i8, ptr %4, align 1, !tbaa !5
  call void @slip_serial_put(i8 noundef zeroext %21, i8 noundef zeroext -35)
  br label %26

22:                                               ; preds = %12
  %23 = load i8, ptr %4, align 1, !tbaa !5
  %24 = load ptr, ptr %5, align 8, !tbaa !8
  %25 = load i8, ptr %24, align 1, !tbaa !5
  call void @slip_serial_put(i8 noundef zeroext %23, i8 noundef zeroext %25)
  br label %26

26:                                               ; preds = %22, %19, %16
  %27 = load ptr, ptr %5, align 8, !tbaa !8
  %28 = getelementptr inbounds i8, ptr %27, i32 1
  store ptr %28, ptr %5, align 8, !tbaa !8
  br label %8, !llvm.loop !12

29:                                               ; preds = %8
  %30 = load i8, ptr %4, align 1, !tbaa !5
  call void @slip_serial_put(i8 noundef zeroext %30, i8 noundef zeroext -64)
  ret void
}

declare void @slip_serial_put(i8 noundef zeroext, i8 noundef zeroext) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @slip_send(i8 noundef zeroext %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
  tail call void @slip_serial_put(i8 noundef zeroext %0, i8 noundef zeroext -64) #2
  %.not11 = icmp eq i32 %2, 0
  br i1 %.not11, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %7
  %.in = phi i32 [ %4, %7 ], [ %2, %3 ]
  %.01012 = phi ptr [ %8, %7 ], [ %1, %3 ]
  %4 = add nsw i32 %.in, -1
  %5 = load i8, ptr %.01012, align 1, !tbaa !5
  switch i8 %5, label %7 [
    i8 -64, label %.sink.split
    i8 -37, label %6
  ]

6:                                                ; preds = %.lr.ph
  br label %.sink.split

.sink.split:                                      ; preds = %.lr.ph, %6
  %.sink.ph = phi i8 [ -35, %6 ], [ -36, %.lr.ph ]
  tail call void @slip_serial_put(i8 noundef zeroext %0, i8 noundef zeroext -37) #2
  br label %7

7:                                                ; preds = %.sink.split, %.lr.ph
  %.sink = phi i8 [ %5, %.lr.ph ], [ %.sink.ph, %.sink.split ]
  tail call void @slip_serial_put(i8 noundef zeroext %0, i8 noundef zeroext %.sink) #2
  %8 = getelementptr inbounds i8, ptr %.01012, i64 1
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !8

._crit_edge:                                      ; preds = %7, %3
  tail call void @slip_serial_put(i8 noundef zeroext %0, i8 noundef zeroext -64) #2
  ret void
}

declare void @slip_serial_put(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass