; LLVM IR from ponylang/ponyc :: src/libponyc/ast (token)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [7 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare ptr @lexer_print(i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @token_id_desc(i32 noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  %6 = load i32, ptr %3, align 4, !tbaa !5
  switch i32 %6, label %14 [
    i32 0, label %7
    i32 8, label %8
    i32 5, label %9
    i32 6, label %10
    i32 7, label %11
    i32 3, label %12
    i32 4, label %13
  ]

7:                                                ; preds = %1
  store ptr @.str.5, ptr %2, align 8
  br label %24

8:                                                ; preds = %1
  store ptr @.str.12, ptr %2, align 8
  br label %24

9:                                                ; preds = %1
  store ptr @.str.13, ptr %2, align 8
  br label %24

10:                                               ; preds = %1
  store ptr @.str.14, ptr %2, align 8
  br label %24

11:                                               ; preds = %1
  store ptr @.str.15, ptr %2, align 8
  br label %24

12:                                               ; preds = %1
  store ptr @.str.16, ptr %2, align 8
  br label %24

13:                                               ; preds = %1
  store ptr @.str.17, ptr %2, align 8
  br label %24

14:                                               ; preds = %1
  br label %15

15:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = call ptr @lexer_print(i32 noundef %16)
  store ptr %17, ptr %4, align 8, !tbaa !9
  %18 = load ptr, ptr %4, align 8, !tbaa !9
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %22

20:                                               ; preds = %15
  %21 = load ptr, ptr %4, align 8, !tbaa !9
  store ptr %21, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %23

22:                                               ; preds = %15
  store ptr @.str.18, ptr %2, align 8
  store i32 1, ptr %5, align 4
  br label %23

23:                                               ; preds = %22, %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  br label %24

24:                                               ; preds = %23, %13, %12, %11, %10, %9, %8, %7
  %25 = load ptr, ptr %2, align 8
  ret ptr %25
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.5 = external hidden unnamed_addr constant [4 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [3 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [15 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.16 = external hidden unnamed_addr constant [13 x i8], align 1
@.str.17 = external hidden unnamed_addr constant [14 x i8], align 1
@.str.18 = external hidden unnamed_addr constant [7 x i8], align 1
@switch.table.token_id_desc = private unnamed_addr constant [9 x ptr] [ptr @.str.5, ptr @.str.5, ptr @.str.5, ptr @.str.16, ptr @.str.17, ptr @.str.13, ptr @.str.14, ptr @.str.15, ptr @.str.12], align 8

declare ptr @lexer_print(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local nonnull ptr @token_id_desc(i32 noundef %0) local_unnamed_addr #1 {
  %2 = icmp ult i32 %0, 9
  br i1 %2, label %switch.hole_check, label %3

3:                                                ; preds = %switch.hole_check, %1
  %4 = tail call ptr @lexer_print(i32 noundef %0) #2
  %.not = icmp eq ptr %4, null
  %.str.18. = select i1 %.not, ptr @.str.18, ptr %4
  br label %6

switch.hole_check:                                ; preds = %1
  %switch.maskindex = trunc nuw i32 %0 to i16
  %switch.shifted = lshr i16 505, %switch.maskindex
  %switch.lobit = trunc i16 %switch.shifted to i1
  br i1 %switch.lobit, label %switch.lookup, label %3

switch.lookup:                                    ; preds = %switch.hole_check
  %5 = zext nneg i32 %0 to i64
  %switch.gep = getelementptr inbounds [9 x ptr], ptr @switch.table.token_id_desc, i64 0, i64 %5
  %switch.load = load ptr, ptr %switch.gep, align 8
  br label %6

6:                                                ; preds = %switch.lookup, %3
  %.1 = phi ptr [ %.str.18., %3 ], [ %switch.load, %switch.lookup ]
  ret ptr %.1
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass