; LLVM IR from sunkafei/xcpc-algorithm-templates :: 算法/数据结构/树链剖分.ll (Z3addiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@root = external dso_local global i32, align 4
@dep = external dso_local global [110000 x i32], align 16
@pa = external dso_local global [110000 x i32], align 16
@id = external dso_local global [110000 x i32], align 16
@top = external dso_local global [110000 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6updateiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3addiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  store i32 %2, ptr %6, align 4, !tbaa !5
  br label %7

7:                                                ; preds = %34, %3
  %8 = load i32, ptr %4, align 4, !tbaa !5
  %9 = sext i32 %8 to i64
  %10 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp ne i32 %11, %15
  br i1 %16, label %17, label %55

17:                                               ; preds = %7
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = sext i32 %18 to i64
  %20 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  %25 = load i32, ptr %5, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %26
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = icmp slt i32 %24, %31
  br i1 %32, label %33, label %34

33:                                               ; preds = %17
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5) #2
  br label %34

34:                                               ; preds = %33, %17
  %35 = load i32, ptr @root, align 4, !tbaa !5
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %37
  %39 = load i32, ptr %38, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %40
  %42 = load i32, ptr %41, align 4, !tbaa !5
  %43 = load i32, ptr %4, align 4, !tbaa !5
  %44 = sext i32 %43 to i64
  %45 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %44
  %46 = load i32, ptr %45, align 4, !tbaa !5
  %47 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z6updateiiii(i32 noundef %35, i32 noundef %42, i32 noundef %46, i32 noundef %47)
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %49
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = sext i32 %51 to i64
  %53 = getelementptr inbounds [110000 x i32], ptr @pa, i64 0, i64 %52
  %54 = load i32, ptr %53, align 4, !tbaa !5
  store i32 %54, ptr %4, align 4, !tbaa !5
  br label %7, !llvm.loop !9

55:                                               ; preds = %7
  %56 = load i32, ptr %4, align 4, !tbaa !5
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = load i32, ptr %5, align 4, !tbaa !5
  %61 = sext i32 %60 to i64
  %62 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %61
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = icmp sgt i32 %59, %63
  br i1 %64, label %65, label %66

65:                                               ; preds = %55
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5) #2
  br label %66

66:                                               ; preds = %65, %55
  %67 = load i32, ptr @root, align 4, !tbaa !5
  %68 = load i32, ptr %4, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %69
  %71 = load i32, ptr %70, align 4, !tbaa !5
  %72 = load i32, ptr %5, align 4, !tbaa !5
  %73 = sext i32 %72 to i64
  %74 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %73
  %75 = load i32, ptr %74, align 4, !tbaa !5
  %76 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z6updateiiii(i32 noundef %67, i32 noundef %71, i32 noundef %75, i32 noundef %76)
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@root = external dso_local local_unnamed_addr global i32, align 4
@dep = external dso_local local_unnamed_addr global [110000 x i32], align 16
@pa = external dso_local local_unnamed_addr global [110000 x i32], align 16
@id = external dso_local local_unnamed_addr global [110000 x i32], align 16
@top = external dso_local local_unnamed_addr global [110000 x i32], align 16

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6updateiiii(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3addiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %6 = sext i32 %0 to i64
  %7 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %6
  %8 = load i32, ptr %7, align 4, !tbaa !5
  %9 = sext i32 %1 to i64
  %10 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %9
  %11 = load i32, ptr %10, align 4, !tbaa !5
  %.not4 = icmp eq i32 %8, %11
  br i1 %.not4, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %3, %23
  %12 = phi i32 [ %40, %23 ], [ %0, %3 ]
  %13 = phi i32 [ %47, %23 ], [ %11, %3 ]
  %14 = phi i32 [ %43, %23 ], [ %8, %3 ]
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %15
  %17 = load i32, ptr %16, align 4, !tbaa !5
  %18 = sext i32 %13 to i64
  %19 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %18
  %20 = load i32, ptr %19, align 4, !tbaa !5
  %21 = icmp slt i32 %17, %20
  br i1 %21, label %22, label %23

22:                                               ; preds = %.lr.ph
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5) #2
  %.pre = load i32, ptr %4, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %22, %.lr.ph
  %24 = phi i32 [ %.pre, %22 ], [ %12, %.lr.ph ]
  %25 = load i32, ptr @root, align 4, !tbaa !5
  %26 = sext i32 %24 to i64
  %27 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %26
  %28 = load i32, ptr %27, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %29
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %26
  %33 = load i32, ptr %32, align 4, !tbaa !5
  call void @_Z6updateiiii(i32 noundef %25, i32 noundef %31, i32 noundef %33, i32 noundef %2)
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [110000 x i32], ptr @pa, i64 0, i64 %38
  %40 = load i32, ptr %39, align 4, !tbaa !5
  store i32 %40, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %41
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [110000 x i32], ptr @top, i64 0, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %.not = icmp eq i32 %43, %47
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !9

._crit_edge:                                      ; preds = %23, %3
  %48 = phi i32 [ %1, %3 ], [ %44, %23 ]
  %49 = phi i32 [ %0, %3 ], [ %40, %23 ]
  %.lcssa3 = phi i64 [ %6, %3 ], [ %41, %23 ]
  %.lcssa = phi i64 [ %9, %3 ], [ %45, %23 ]
  %50 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %.lcssa3
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = getelementptr inbounds [110000 x i32], ptr @dep, i64 0, i64 %.lcssa
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = icmp sgt i32 %51, %53
  br i1 %54, label %55, label %56

55:                                               ; preds = %._crit_edge
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull align 4 dereferenceable(4) %5) #2
  %.pre8 = load i32, ptr %4, align 4, !tbaa !5
  %.pre9 = load i32, ptr %5, align 4, !tbaa !5
  br label %56

56:                                               ; preds = %55, %._crit_edge
  %57 = phi i32 [ %.pre9, %55 ], [ %48, %._crit_edge ]
  %58 = phi i32 [ %.pre8, %55 ], [ %49, %._crit_edge ]
  %59 = load i32, ptr @root, align 4, !tbaa !5
  %60 = sext i32 %58 to i64
  %61 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %60
  %62 = load i32, ptr %61, align 4, !tbaa !5
  %63 = sext i32 %57 to i64
  %64 = getelementptr inbounds [110000 x i32], ptr @id, i64 0, i64 %63
  %65 = load i32, ptr %64, align 4, !tbaa !5
  call void @_Z6updateiiii(i32 noundef %59, i32 noundef %62, i32 noundef %65, i32 noundef %2)
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass