; LLVM IR from cvra/robot-software :: uwb-beacon-firmware/src/decadriver (deca_device)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.dwt_local_data_t = type { i64, i64, i8, i8, i64, i8, i8, i64, i16, i8, %struct.dwt_cb_data_t, ptr, ptr, ptr, ptr }
%struct.dwt_cb_data_t = type { i64, i16, [2 x i8], i8 }

@pdw1000local = external hidden global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @dwt_initialise(i16 noundef zeroext %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i16, align 2
  %4 = alloca i16, align 2
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i16, align 2
  store i16 %0, ptr %3, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #2
  store i16 0, ptr %4, align 2, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #2
  store i64 0, ptr %5, align 8, !tbaa !9
  %8 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %9 = getelementptr inbounds %struct.dwt_local_data_t, ptr %8, i32 0, i32 6
  store i8 0, ptr %9, align 1, !tbaa !13
  %10 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %11 = getelementptr inbounds %struct.dwt_local_data_t, ptr %10, i32 0, i32 9
  store i8 0, ptr %11, align 2, !tbaa !16
  %12 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %13 = getelementptr inbounds %struct.dwt_local_data_t, ptr %12, i32 0, i32 8
  store i16 0, ptr %13, align 8, !tbaa !17
  %14 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %15 = getelementptr inbounds %struct.dwt_local_data_t, ptr %14, i32 0, i32 11
  store ptr null, ptr %15, align 8, !tbaa !18
  %16 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %17 = getelementptr inbounds %struct.dwt_local_data_t, ptr %16, i32 0, i32 12
  store ptr null, ptr %17, align 8, !tbaa !19
  %18 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %19 = getelementptr inbounds %struct.dwt_local_data_t, ptr %18, i32 0, i32 13
  store ptr null, ptr %19, align 8, !tbaa !20
  %20 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %21 = getelementptr inbounds %struct.dwt_local_data_t, ptr %20, i32 0, i32 14
  store ptr null, ptr %21, align 8, !tbaa !21
  %22 = call i64 @dwt_readdevid()
  %23 = icmp ne i64 3737780528, %22
  br i1 %23, label %24, label %25

24:                                               ; preds = %1
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %93

25:                                               ; preds = %1
  call void @dwt_softreset()
  call void @_dwt_enableclocks(i32 noundef 0)
  call void @dwt_write8bitoffsetreg(i32 noundef 36, i32 noundef 0, i8 noundef zeroext 4)
  %26 = call i64 @_dwt_otpread(i64 noundef 30)
  %27 = and i64 %26, 65535
  %28 = trunc i64 %27 to i16
  store i16 %28, ptr %4, align 2, !tbaa !5
  %29 = load i16, ptr %4, align 2, !tbaa !5
  %30 = zext i16 %29 to i32
  %31 = ashr i32 %30, 8
  %32 = and i32 %31, 255
  %33 = trunc i32 %32 to i8
  %34 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %35 = getelementptr inbounds %struct.dwt_local_data_t, ptr %34, i32 0, i32 3
  store i8 %33, ptr %35, align 1, !tbaa !22
  %36 = call i64 @_dwt_otpread(i64 noundef 4)
  store i64 %36, ptr %5, align 8, !tbaa !9
  %37 = load i64, ptr %5, align 8, !tbaa !9
  %38 = and i64 %37, 255
  %39 = icmp ne i64 %38, 0
  br i1 %39, label %40, label %47

40:                                               ; preds = %25
  call void @dwt_write8bitoffsetreg(i32 noundef 45, i32 noundef 18, i8 noundef zeroext 2)
  %41 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %42 = getelementptr inbounds %struct.dwt_local_data_t, ptr %41, i32 0, i32 8
  %43 = load i16, ptr %42, align 8, !tbaa !17
  %44 = zext i16 %43 to i32
  %45 = or i32 %44, 4096
  %46 = trunc i32 %45 to i16
  store i16 %46, ptr %42, align 8, !tbaa !17
  br label %47

47:                                               ; preds = %40, %25
  %48 = call i64 @_dwt_otpread(i64 noundef 6)
  %49 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %50 = getelementptr inbounds %struct.dwt_local_data_t, ptr %49, i32 0, i32 0
  store i64 %48, ptr %50, align 8, !tbaa !23
  %51 = call i64 @_dwt_otpread(i64 noundef 7)
  %52 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %53 = getelementptr inbounds %struct.dwt_local_data_t, ptr %52, i32 0, i32 1
  store i64 %51, ptr %53, align 8, !tbaa !24
  %54 = load i16, ptr %4, align 2, !tbaa !5
  %55 = zext i16 %54 to i32
  %56 = and i32 %55, 31
  %57 = trunc i32 %56 to i8
  %58 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %59 = getelementptr inbounds %struct.dwt_local_data_t, ptr %58, i32 0, i32 5
  store i8 %57, ptr %59, align 8, !tbaa !25
  %60 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %61 = getelementptr inbounds %struct.dwt_local_data_t, ptr %60, i32 0, i32 5
  %62 = load i8, ptr %61, align 8, !tbaa !25
  %63 = icmp ne i8 %62, 0
  br i1 %63, label %67, label %64

64:                                               ; preds = %47
  %65 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %66 = getelementptr inbounds %struct.dwt_local_data_t, ptr %65, i32 0, i32 5
  store i8 16, ptr %66, align 8, !tbaa !25
  br label %67

67:                                               ; preds = %64, %47
  %68 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %69 = getelementptr inbounds %struct.dwt_local_data_t, ptr %68, i32 0, i32 5
  %70 = load i8, ptr %69, align 8, !tbaa !25
  call void @dwt_setxtaltrim(i8 noundef zeroext %70)
  %71 = load i16, ptr %3, align 2, !tbaa !5
  %72 = zext i16 %71 to i32
  %73 = and i32 %72, 1
  %74 = icmp ne i32 %73, 0
  br i1 %74, label %75, label %82

75:                                               ; preds = %67
  call void @_dwt_loaducodefromrom()
  %76 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %77 = getelementptr inbounds %struct.dwt_local_data_t, ptr %76, i32 0, i32 8
  %78 = load i16, ptr %77, align 8, !tbaa !17
  %79 = zext i16 %78 to i32
  %80 = or i32 %79, 2048
  %81 = trunc i32 %80 to i16
  store i16 %81, ptr %77, align 8, !tbaa !17
  br label %89

82:                                               ; preds = %67
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #2
  %83 = call zeroext i16 @dwt_read16bitoffsetreg(i32 noundef 54, i32 noundef 5)
  store i16 %83, ptr %7, align 2, !tbaa !5
  %84 = load i16, ptr %7, align 2, !tbaa !5
  %85 = zext i16 %84 to i32
  %86 = and i32 %85, 65023
  %87 = trunc i32 %86 to i16
  store i16 %87, ptr %7, align 2, !tbaa !5
  %88 = load i16, ptr %7, align 2, !tbaa !5
  call void @dwt_write16bitoffsetreg(i32 noundef 54, i32 noundef 5, i16 noundef zeroext %88)
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #2
  br label %89

89:                                               ; preds = %82, %75
  call void @_dwt_enableclocks(i32 noundef 1)
  call void @dwt_write8bitoffsetreg(i32 noundef 44, i32 noundef 10, i8 noundef zeroext 0)
  %90 = call i64 @dwt_read32bitoffsetreg(i32 noundef 4, i32 noundef 0)
  %91 = load ptr, ptr @pdw1000local, align 8, !tbaa !11
  %92 = getelementptr inbounds %struct.dwt_local_data_t, ptr %91, i32 0, i32 7
  store i64 %90, ptr %92, align 8, !tbaa !26
  store i32 0, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %93

93:                                               ; preds = %89, %24
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #2
  %94 = load i32, ptr %2, align 4
  ret i32 %94
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @dwt_readdevid() #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_softreset() #0

; Function Attrs: nounwind uwtable
declare dso_local void @_dwt_enableclocks(i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write8bitoffsetreg(i32 noundef, i32 noundef, i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @_dwt_otpread(i64 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_setxtaltrim(i8 noundef zeroext) #0

; Function Attrs: nounwind uwtable
declare dso_local void @_dwt_loaducodefromrom() #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @dwt_read16bitoffsetreg(i32 noundef, i32 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write16bitoffsetreg(i32 noundef, i32 noundef, i16 noundef zeroext) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare dso_local i64 @dwt_read32bitoffsetreg(i32 noundef, i32 noundef) #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !7, i64 33}
!14 = !{!"", !10, i64 0, !10, i64 8, !7, i64 16, !7, i64 17, !10, i64 24, !7, i64 32, !7, i64 33, !10, i64 40, !6, i64 48, !7, i64 50, !15, i64 56, !12, i64 72, !12, i64 80, !12, i64 88, !12, i64 96}
!15 = !{!"", !10, i64 0, !6, i64 8, !7, i64 10, !7, i64 12}
!16 = !{!14, !7, i64 50}
!17 = !{!14, !6, i64 48}
!18 = !{!14, !12, i64 72}
!19 = !{!14, !12, i64 80}
!20 = !{!14, !12, i64 88}
!21 = !{!14, !12, i64 96}
!22 = !{!14, !7, i64 17}
!23 = !{!14, !10, i64 0}
!24 = !{!14, !10, i64 8}
!25 = !{!14, !7, i64 32}
!26 = !{!14, !10, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pdw1000local = external hidden local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @dwt_initialise(i16 noundef zeroext %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %2, i64 33
  store i8 0, ptr %3, align 1, !tbaa !9
  %4 = getelementptr inbounds i8, ptr %2, i64 50
  store i8 0, ptr %4, align 2, !tbaa !14
  %5 = getelementptr inbounds i8, ptr %2, i64 48
  store i16 0, ptr %5, align 8, !tbaa !15
  %6 = getelementptr inbounds i8, ptr %2, i64 72
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %6, i8 0, i64 32, i1 false)
  %7 = tail call i64 @dwt_readdevid()
  %.not = icmp eq i64 %7, 3737780528
  br i1 %.not, label %8, label %43

8:                                                ; preds = %1
  tail call void @dwt_softreset()
  tail call void @_dwt_enableclocks(i32 noundef 0)
  tail call void @dwt_write8bitoffsetreg(i32 noundef 36, i32 noundef 0, i8 noundef zeroext 4)
  %9 = tail call i64 @_dwt_otpread(i64 noundef 30)
  %10 = trunc i64 %9 to i8
  %11 = lshr i64 %9, 8
  %12 = trunc i64 %11 to i8
  %13 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %14 = getelementptr inbounds i8, ptr %13, i64 17
  store i8 %12, ptr %14, align 1, !tbaa !16
  %15 = tail call i64 @_dwt_otpread(i64 noundef 4)
  %16 = and i64 %15, 255
  %.not7 = icmp eq i64 %16, 0
  br i1 %.not7, label %22, label %17

17:                                               ; preds = %8
  tail call void @dwt_write8bitoffsetreg(i32 noundef 45, i32 noundef 18, i8 noundef zeroext 2)
  %18 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %19 = getelementptr inbounds i8, ptr %18, i64 48
  %20 = load i16, ptr %19, align 8, !tbaa !15
  %21 = or i16 %20, 4096
  store i16 %21, ptr %19, align 8, !tbaa !15
  br label %22

22:                                               ; preds = %17, %8
  %23 = tail call i64 @_dwt_otpread(i64 noundef 6)
  %24 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  store i64 %23, ptr %24, align 8, !tbaa !17
  %25 = tail call i64 @_dwt_otpread(i64 noundef 7)
  %26 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %27 = getelementptr inbounds i8, ptr %26, i64 8
  store i64 %25, ptr %27, align 8, !tbaa !18
  %28 = and i8 %10, 31
  %29 = getelementptr inbounds i8, ptr %26, i64 32
  %.not8 = icmp eq i8 %28, 0
  %spec.store.select = select i1 %.not8, i8 16, i8 %28
  store i8 %spec.store.select, ptr %29, align 8
  tail call void @dwt_setxtaltrim(i8 noundef zeroext %spec.store.select)
  %30 = and i16 %0, 1
  %.not9 = icmp eq i16 %30, 0
  br i1 %.not9, label %36, label %31

31:                                               ; preds = %22
  tail call void @_dwt_loaducodefromrom()
  %32 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %33 = getelementptr inbounds i8, ptr %32, i64 48
  %34 = load i16, ptr %33, align 8, !tbaa !15
  %35 = or i16 %34, 2048
  store i16 %35, ptr %33, align 8, !tbaa !15
  br label %39

36:                                               ; preds = %22
  %37 = tail call zeroext i16 @dwt_read16bitoffsetreg(i32 noundef 54, i32 noundef 5)
  %38 = and i16 %37, -513
  tail call void @dwt_write16bitoffsetreg(i32 noundef 54, i32 noundef 5, i16 noundef zeroext %38)
  br label %39

39:                                               ; preds = %36, %31
  tail call void @_dwt_enableclocks(i32 noundef 1)
  tail call void @dwt_write8bitoffsetreg(i32 noundef 44, i32 noundef 10, i8 noundef zeroext 0)
  %40 = tail call i64 @dwt_read32bitoffsetreg(i32 noundef 4, i32 noundef 0)
  %41 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %42 = getelementptr inbounds i8, ptr %41, i64 40
  store i64 %40, ptr %42, align 8, !tbaa !19
  br label %43

43:                                               ; preds = %1, %39
  %.0 = phi i32 [ 0, %39 ], [ -1, %1 ]
  ret i32 %.0
}

; Function Attrs: nounwind uwtable
declare dso_local i64 @dwt_readdevid() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_softreset() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @_dwt_enableclocks(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write8bitoffsetreg(i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @_dwt_otpread(i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_setxtaltrim(i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @_dwt_loaducodefromrom() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @dwt_read16bitoffsetreg(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write16bitoffsetreg(i32 noundef, i32 noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @dwt_read32bitoffsetreg(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 33}
!10 = !{!"", !11, i64 0, !11, i64 8, !7, i64 16, !7, i64 17, !11, i64 24, !7, i64 32, !7, i64 33, !11, i64 40, !12, i64 48, !7, i64 50, !13, i64 56, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96}
!11 = !{!"long", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !11, i64 0, !12, i64 8, !7, i64 10, !7, i64 12}
!14 = !{!10, !7, i64 50}
!15 = !{!10, !12, i64 48}
!16 = !{!10, !7, i64 17}
!17 = !{!10, !11, i64 0}
!18 = !{!10, !11, i64 8}
!19 = !{!10, !11, i64 40}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass