; LLVM IR from ponylang/ponyc :: src/libponyrt/asio (epoll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.epoll_event = type <{ i32, %union.epoll_data }>
%union.epoll_data = type { ptr }
%struct.sigaction = type { %union.anon, %struct.__sigset_t, i32, ptr }
%union.anon = type { ptr }
%struct.__sigset_t = type { [16 x i64] }
%struct.asio_event_t = type { ptr, ptr, i32, i32, i32, i8, i8, i8, i64 }
%struct.asio_backend_t = type { i32, i32, [64 x %struct.epoll_event], [128 x ptr], i8, %struct.messageq_t }
%struct.messageq_t = type { ptr, ptr }

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [10 x i8], align 1
@__func__.pony_asio_event_subscribe = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i32 @eventfd(i32 noundef, i32 noundef) #1

; Function Attrs: nounwind
declare i32 @epoll_ctl(i32 noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nounwind
declare i32 @sigemptyset(ptr noundef) #1

; Function Attrs: nounwind
declare i32 @sigaction(i32 noundef, ptr noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) #2

declare ptr @ponyint_asio_get_backend(...) #2

; Function Attrs: nounwind uwtable
define dso_local void @pony_asio_event_subscribe(ptr noundef %0) #3 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca %struct.epoll_event, align 1
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i8, align 1
  %10 = alloca %struct.sigaction, align 8
  %11 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = icmp eq ptr %12, null
  br i1 %13, label %24, label %14

14:                                               ; preds = %1
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.asio_event_t, ptr %15, i32 0, i32 4
  %17 = load i32, ptr %16, align 8, !tbaa !9
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %24, label %19

19:                                               ; preds = %14
  %20 = load ptr, ptr %2, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.asio_event_t, ptr %20, i32 0, i32 4
  %22 = load i32, ptr %21, align 8, !tbaa !9
  %23 = icmp eq i32 %22, -1
  br i1 %23, label %24, label %25

24:                                               ; preds = %19, %14, %1
  call void @ponyint_assert_fail(ptr noundef @.str, ptr noundef @.str.1, i64 noundef 352, ptr noundef @__func__.pony_asio_event_subscribe)
  br label %157

25:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %26 = call ptr (...) @ponyint_asio_get_backend()
  store ptr %26, ptr %3, align 8, !tbaa !5
  %27 = load ptr, ptr %3, align 8, !tbaa !5
  %28 = icmp ne ptr %27, null
  br i1 %28, label %29, label %30

29:                                               ; preds = %25
  br label %31

30:                                               ; preds = %25
  call void @ponyint_assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i64 noundef 357, ptr noundef @__func__.pony_asio_event_subscribe)
  br label %31

31:                                               ; preds = %30, %29
  %32 = load ptr, ptr %2, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.asio_event_t, ptr %32, i32 0, i32 5
  %34 = load i8, ptr %33, align 4, !tbaa !14, !range !15, !noundef !16
  %35 = trunc i8 %34 to i1
  br i1 %35, label %36, label %43

36:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #4
  %37 = call i64 (...) @ponyint_asio_noisy_add()
  store i64 %37, ptr %4, align 8, !tbaa !17
  %38 = load i64, ptr %4, align 8, !tbaa !17
  %39 = icmp eq i64 %38, 0
  br i1 %39, label %40, label %42

40:                                               ; preds = %36
  %41 = call i32 (...) @pony_scheduler_index()
  call void @ponyint_sched_noisy_asio(i32 noundef %41)
  br label %42

42:                                               ; preds = %40, %36
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #4
  br label %43

43:                                               ; preds = %42, %31
  call void @llvm.lifetime.start.p0(i64 12, ptr %5) #4
  %44 = load ptr, ptr %2, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 1
  store ptr %44, ptr %45, align 1, !tbaa !18
  %46 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 0
  store i32 8192, ptr %46, align 1, !tbaa !19
  %47 = load ptr, ptr %2, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.asio_event_t, ptr %47, i32 0, i32 4
  %49 = load i32, ptr %48, align 8, !tbaa !9
  %50 = and i32 %49, 1
  %51 = icmp ne i32 %50, 0
  br i1 %51, label %52, label %56

52:                                               ; preds = %43
  %53 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 0
  %54 = load i32, ptr %53, align 1, !tbaa !19
  %55 = or i32 %54, 1
  store i32 %55, ptr %53, align 1, !tbaa !19
  br label %56

56:                                               ; preds = %52, %43
  %57 = load ptr, ptr %2, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.asio_event_t, ptr %57, i32 0, i32 4
  %59 = load i32, ptr %58, align 8, !tbaa !9
  %60 = and i32 %59, 2
  %61 = icmp ne i32 %60, 0
  br i1 %61, label %62, label %66

62:                                               ; preds = %56
  %63 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 0
  %64 = load i32, ptr %63, align 1, !tbaa !19
  %65 = or i32 %64, 4
  store i32 %65, ptr %63, align 1, !tbaa !19
  br label %66

66:                                               ; preds = %62, %56
  %67 = load ptr, ptr %2, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.asio_event_t, ptr %67, i32 0, i32 4
  %69 = load i32, ptr %68, align 8, !tbaa !9
  %70 = and i32 %69, 4
  %71 = icmp ne i32 %70, 0
  br i1 %71, label %72, label %85

72:                                               ; preds = %66
  %73 = call i32 @timerfd_create(i32 noundef 1, i32 noundef 2048) #4
  %74 = load ptr, ptr %2, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.asio_event_t, ptr %74, i32 0, i32 3
  store i32 %73, ptr %75, align 4, !tbaa !21
  %76 = load ptr, ptr %2, align 8, !tbaa !5
  %77 = getelementptr inbounds %struct.asio_event_t, ptr %76, i32 0, i32 3
  %78 = load i32, ptr %77, align 4, !tbaa !21
  %79 = load ptr, ptr %2, align 8, !tbaa !5
  %80 = getelementptr inbounds %struct.asio_event_t, ptr %79, i32 0, i32 8
  %81 = load i64, ptr %80, align 8, !tbaa !22
  call void @timer_set_nsec(i32 noundef %78, i64 noundef %81)
  %82 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 0
  %83 = load i32, ptr %82, align 1, !tbaa !19
  %84 = or i32 %83, 1
  store i32 %84, ptr %82, align 1, !tbaa !19
  br label %85

85:                                               ; preds = %72, %66
  %86 = load ptr, ptr %2, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.asio_event_t, ptr %86, i32 0, i32 4
  %88 = load i32, ptr %87, align 8, !tbaa !9
  %89 = and i32 %88, 8
  %90 = icmp ne i32 %89, 0
  br i1 %90, label %91, label %133

91:                                               ; preds = %85
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %92 = load ptr, ptr %2, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.asio_event_t, ptr %92, i32 0, i32 8
  %94 = load i64, ptr %93, align 8, !tbaa !22
  %95 = trunc i64 %94 to i32
  store i32 %95, ptr %6, align 4, !tbaa !23
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  store ptr null, ptr %7, align 8, !tbaa !5
  %96 = load i32, ptr %6, align 4, !tbaa !23
  %97 = icmp slt i32 %96, 128
  br i1 %97, label %98, label %128

98:                                               ; preds = %91
  %99 = load ptr, ptr %3, align 8, !tbaa !5
  %100 = getelementptr inbounds %struct.asio_backend_t, ptr %99, i32 0, i32 3
  %101 = load i32, ptr %6, align 4, !tbaa !23
  %102 = sext i32 %101 to i64
  %103 = getelementptr inbounds [128 x ptr], ptr %100, i64 0, i64 %102
  %104 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %104, ptr %8, align 8, !tbaa !5
  %105 = load i64, ptr %7, align 8
  %106 = load i64, ptr %8, align 8
  %107 = cmpxchg ptr %103, i64 %105, i64 %106 acq_rel acquire, align 8
  %108 = extractvalue { i64, i1 } %107, 0
  %109 = extractvalue { i64, i1 } %107, 1
  br i1 %109, label %111, label %110

110:                                              ; preds = %98
  store i64 %108, ptr %7, align 8
  br label %111

111:                                              ; preds = %110, %98
  %112 = zext i1 %109 to i8
  store i8 %112, ptr %9, align 1, !tbaa !24
  %113 = load i8, ptr %9, align 1, !tbaa !24, !range !15, !noundef !16
  %114 = trunc i8 %113 to i1
  br i1 %114, label %115, label %128

115:                                              ; preds = %111
  call void @llvm.lifetime.start.p0(i64 152, ptr %10) #4
  %116 = getelementptr inbounds %struct.sigaction, ptr %10, i32 0, i32 0
  store ptr @signal_handler, ptr %116, align 8, !tbaa !18
  %117 = getelementptr inbounds %struct.sigaction, ptr %10, i32 0, i32 1
  %118 = call i32 @sigemptyset(ptr noundef %117) #4
  %119 = getelementptr inbounds %struct.sigaction, ptr %10, i32 0, i32 2
  store i32 268435456, ptr %119, align 8, !tbaa !25
  %120 = load i32, ptr %6, align 4, !tbaa !23
  %121 = call i32 @sigaction(i32 noundef %120, ptr noundef %10, ptr noundef null) #4
  %122 = call i32 @eventfd(i32 noundef 0, i32 noundef 2048) #4
  %123 = load ptr, ptr %2, align 8, !tbaa !5
  %124 = getelementptr inbounds %struct.asio_event_t, ptr %123, i32 0, i32 3
  store i32 %122, ptr %124, align 4, !tbaa !21
  %125 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 0
  %126 = load i32, ptr %125, align 1, !tbaa !19
  %127 = or i32 %126, 1
  store i32 %127, ptr %125, align 1, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 152, ptr %10) #4
  br label %129

128:                                              ; preds = %111, %91
  store i32 1, ptr %11, align 4
  br label %130

129:                                              ; preds = %115
  store i32 0, ptr %11, align 4
  br label %130

130:                                              ; preds = %129, %128
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %131 = load i32, ptr %11, align 4
  switch i32 %131, label %155 [
    i32 0, label %132
  ]

132:                                              ; preds = %130
  br label %133

133:                                              ; preds = %132, %85
  %134 = load ptr, ptr %2, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.asio_event_t, ptr %134, i32 0, i32 4
  %136 = load i32, ptr %135, align 8, !tbaa !9
  %137 = and i32 %136, 256
  %138 = icmp ne i32 %137, 0
  br i1 %138, label %139, label %143

139:                                              ; preds = %133
  %140 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 0
  %141 = load i32, ptr %140, align 1, !tbaa !19
  %142 = or i32 %141, 1073741824
  store i32 %142, ptr %140, align 1, !tbaa !19
  br label %147

143:                                              ; preds = %133
  %144 = getelementptr inbounds %struct.epoll_event, ptr %5, i32 0, i32 0
  %145 = load i32, ptr %144, align 1, !tbaa !19
  %146 = or i32 %145, -2147483648
  store i32 %146, ptr %144, align 1, !tbaa !19
  br label %147

147:                                              ; preds = %143, %139
  %148 = load ptr, ptr %3, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.asio_backend_t, ptr %148, i32 0, i32 0
  %150 = load i32, ptr %149, align 8, !tbaa !28
  %151 = load ptr, ptr %2, align 8, !tbaa !5
  %152 = getelementptr inbounds %struct.asio_event_t, ptr %151, i32 0, i32 3
  %153 = load i32, ptr %152, align 4, !tbaa !21
  %154 = call i32 @epoll_ctl(i32 noundef %150, i32 noundef 1, i32 noundef %153, ptr noundef %5) #4
  store i32 0, ptr %11, align 4
  br label %155

155:                                              ; preds = %147, %130
  call void @llvm.lifetime.end.p0(i64 12, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  %156 = load i32, ptr %11, align 4
  switch i32 %156, label %158 [
    i32 0, label %157
    i32 1, label %157
  ]

157:                                              ; preds = %155, %155, %24
  ret void

158:                                              ; preds = %155
  unreachable
}

declare i64 @ponyint_asio_noisy_add(...) #2

declare void @ponyint_sched_noisy_asio(i32 noundef) #2

declare i32 @pony_scheduler_index(...) #2

; Function Attrs: nounwind
declare i32 @timerfd_create(i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @timer_set_nsec(i32 noundef, i64 noundef) #3

; Function Attrs: nounwind uwtable
declare hidden void @signal_handler(i32 noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 24}
!10 = !{!"asio_event_t", !6, i64 0, !6, i64 8, !11, i64 16, !11, i64 20, !11, i64 24, !12, i64 28, !12, i64 29, !12, i64 30, !13, i64 32}
!11 = !{!"int", !7, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!10, !12, i64 28}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!13, !13, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !11, i64 0}
!20 = !{!"epoll_event", !11, i64 0, !7, i64 4}
!21 = !{!10, !11, i64 20}
!22 = !{!10, !13, i64 32}
!23 = !{!11, !11, i64 0}
!24 = !{!12, !12, i64 0}
!25 = !{!26, !11, i64 136}
!26 = !{!"sigaction", !7, i64 0, !27, i64 8, !11, i64 136, !6, i64 144}
!27 = !{!"", !7, i64 0}
!28 = !{!29, !11, i64 0}
!29 = !{!"asio_backend_t", !11, i64 0, !11, i64 4, !7, i64 8, !7, i64 776, !7, i64 1800, !30, i64 1808}
!30 = !{!"messageq_t", !7, i64 0, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.epoll_event = type <{ i32, %union.epoll_data }>
%union.epoll_data = type { ptr }
%struct.sigaction = type { %union.anon, %struct.__sigset_t, i32, ptr }
%union.anon = type { ptr }
%struct.__sigset_t = type { [16 x i64] }

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [10 x i8], align 1
@__func__.pony_asio_event_subscribe = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i32 @eventfd(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @epoll_ctl(i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @sigemptyset(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @sigaction(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2

declare ptr @ponyint_asio_get_backend(...) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local void @pony_asio_event_subscribe(ptr noundef %0) local_unnamed_addr #3 {
  %2 = alloca %struct.epoll_event, align 4
  %3 = alloca %struct.sigaction, align 8
  %4 = icmp eq ptr %0, null
  br i1 %4, label %8, label %5

5:                                                ; preds = %1
  %6 = getelementptr inbounds i8, ptr %0, i64 24
  %7 = load i32, ptr %6, align 8, !tbaa !5
  switch i32 %7, label %9 [
    i32 0, label %8
    i32 -1, label %8
  ]

8:                                                ; preds = %5, %5, %1
  tail call void @ponyint_assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i64 noundef 352, ptr noundef nonnull @__func__.pony_asio_event_subscribe) #4
  br label %65

9:                                                ; preds = %5
  %10 = tail call ptr (...) @ponyint_asio_get_backend() #4
  %.not = icmp eq ptr %10, null
  br i1 %.not, label %11, label %12

11:                                               ; preds = %9
  tail call void @ponyint_assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i64 noundef 357, ptr noundef nonnull @__func__.pony_asio_event_subscribe) #4
  br label %12

12:                                               ; preds = %9, %11
  %13 = getelementptr inbounds i8, ptr %0, i64 28
  %14 = load i8, ptr %13, align 4, !tbaa !13, !range !14, !noundef !15
  %15 = trunc nuw i8 %14 to i1
  br i1 %15, label %16, label %21

16:                                               ; preds = %12
  %17 = tail call i64 (...) @ponyint_asio_noisy_add() #4
  %18 = icmp eq i64 %17, 0
  br i1 %18, label %19, label %21

19:                                               ; preds = %16
  %20 = tail call i32 (...) @pony_scheduler_index() #4
  tail call void @ponyint_sched_noisy_asio(i32 noundef %20) #4
  br label %21

21:                                               ; preds = %16, %19, %12
  call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #4
  %22 = getelementptr inbounds i8, ptr %2, i64 4
  store ptr %0, ptr %22, align 4, !tbaa !16
  %23 = load i32, ptr %6, align 8, !tbaa !5
  %24 = and i32 %23, 1
  %25 = and i32 %23, 2
  %.not31 = icmp eq i32 %25, 0
  %spec.select.v = select i1 %.not31, i32 8192, i32 8196
  %spec.select = or disjoint i32 %24, %spec.select.v
  store i32 %spec.select, ptr %2, align 4
  %26 = and i32 %23, 4
  %.not32 = icmp eq i32 %26, 0
  br i1 %.not32, label %33, label %27

27:                                               ; preds = %21
  %28 = tail call i32 @timerfd_create(i32 noundef 1, i32 noundef 2048) #4
  %29 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 %28, ptr %29, align 4, !tbaa !17
  %30 = getelementptr inbounds i8, ptr %0, i64 32
  %31 = load i64, ptr %30, align 8, !tbaa !18
  tail call void @timer_set_nsec(i32 noundef %28, i64 noundef %31)
  %32 = or disjoint i32 %spec.select.v, 1
  store i32 %32, ptr %2, align 4, !tbaa !19
  %.pre = load i32, ptr %6, align 8, !tbaa !5
  br label %33

33:                                               ; preds = %27, %21
  %34 = phi i32 [ %32, %27 ], [ %spec.select, %21 ]
  %35 = phi i32 [ %.pre, %27 ], [ %23, %21 ]
  %36 = and i32 %35, 8
  %.not33 = icmp eq i32 %36, 0
  br i1 %.not33, label %._crit_edge, label %37

._crit_edge:                                      ; preds = %33
  %.phi.trans.insert = getelementptr inbounds i8, ptr %0, i64 20
  %.pre37 = load i32, ptr %.phi.trans.insert, align 4, !tbaa !17
  br label %57

37:                                               ; preds = %33
  %38 = getelementptr inbounds i8, ptr %0, i64 32
  %39 = load i64, ptr %38, align 8, !tbaa !18
  %40 = trunc i64 %39 to i32
  %41 = icmp slt i32 %40, 128
  br i1 %41, label %42, label %64

42:                                               ; preds = %37
  %43 = getelementptr inbounds i8, ptr %10, i64 776
  %sext = shl i64 %39, 32
  %44 = ashr exact i64 %sext, 32
  %45 = getelementptr inbounds [128 x ptr], ptr %43, i64 0, i64 %44
  %46 = ptrtoint ptr %0 to i64
  %47 = cmpxchg ptr %45, i64 0, i64 %46 acq_rel acquire, align 8
  %48 = extractvalue { i64, i1 } %47, 1
  br i1 %48, label %.critedge, label %64

.critedge:                                        ; preds = %42
  call void @llvm.lifetime.start.p0(i64 152, ptr nonnull %3) #4
  store ptr @signal_handler, ptr %3, align 8, !tbaa !16
  %49 = getelementptr inbounds i8, ptr %3, i64 8
  %50 = call i32 @sigemptyset(ptr noundef nonnull %49) #4
  %51 = getelementptr inbounds i8, ptr %3, i64 136
  store i32 268435456, ptr %51, align 8, !tbaa !21
  %52 = call i32 @sigaction(i32 noundef %40, ptr noundef nonnull %3, ptr noundef null) #4
  %53 = call i32 @eventfd(i32 noundef 0, i32 noundef 2048) #4
  %54 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 %53, ptr %54, align 4, !tbaa !17
  %55 = load i32, ptr %2, align 4, !tbaa !19
  %56 = or i32 %55, 1
  call void @llvm.lifetime.end.p0(i64 152, ptr nonnull %3) #4
  %.pre36 = load i32, ptr %6, align 8, !tbaa !5
  br label %57

57:                                               ; preds = %._crit_edge, %.critedge
  %58 = phi i32 [ %53, %.critedge ], [ %.pre37, %._crit_edge ]
  %59 = phi i32 [ %56, %.critedge ], [ %34, %._crit_edge ]
  %60 = phi i32 [ %.pre36, %.critedge ], [ %35, %._crit_edge ]
  %61 = and i32 %60, 256
  %.not34 = icmp eq i32 %61, 0
  %storemerge.v = select i1 %.not34, i32 -2147483648, i32 1073741824
  %storemerge = or i32 %storemerge.v, %59
  store i32 %storemerge, ptr %2, align 4, !tbaa !19
  %62 = load i32, ptr %10, align 8, !tbaa !24
  %63 = call i32 @epoll_ctl(i32 noundef %62, i32 noundef 1, i32 noundef %58, ptr noundef nonnull %2) #4
  br label %64

64:                                               ; preds = %42, %37, %57
  call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %2) #4
  br label %65

65:                                               ; preds = %64, %8
  ret void
}

declare i64 @ponyint_asio_noisy_add(...) local_unnamed_addr #2

declare void @ponyint_sched_noisy_asio(i32 noundef) local_unnamed_addr #2

declare i32 @pony_scheduler_index(...) local_unnamed_addr #2

; Function Attrs: nounwind
declare i32 @timerfd_create(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @timer_set_nsec(i32 noundef, i64 noundef) local_unnamed_addr #3

; Function Attrs: nounwind uwtable
declare hidden void @signal_handler(i32 noundef) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"asio_event_t", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !11, i64 28, !11, i64 29, !11, i64 30, !12, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"_Bool", !8, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!6, !11, i64 28}
!14 = !{i8 0, i8 2}
!15 = !{}
!16 = !{!8, !8, i64 0}
!17 = !{!6, !10, i64 20}
!18 = !{!6, !12, i64 32}
!19 = !{!20, !10, i64 0}
!20 = !{!"epoll_event", !10, i64 0, !8, i64 4}
!21 = !{!22, !10, i64 136}
!22 = !{!"sigaction", !8, i64 0, !23, i64 8, !10, i64 136, !7, i64 144}
!23 = !{!"", !8, i64 0}
!24 = !{!25, !10, i64 0}
!25 = !{!"asio_backend_t", !10, i64 0, !10, i64 4, !8, i64 8, !8, i64 776, !8, i64 1800, !26, i64 1808}
!26 = !{!"messageq_t", !8, i64 0, !7, i64 8}


; Effective O3 passes: BDCEPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass