; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_mutex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_event = type { i8, ptr, i16, i8, [8 x i8] }

@OSIntNesting = external global i8, align 1
@OSTCBPrioTbl = external global [64 x ptr], align 16
@OSEventFreeList = external global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @OSMutexCreate(i8 noundef zeroext %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i8 %0, ptr %4, align 1, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %7, align 4, !tbaa !10
  %9 = load i8, ptr @OSIntNesting, align 1, !tbaa !5
  %10 = zext i8 %9 to i32
  %11 = icmp ugt i32 %10, 0
  br i1 %11, label %12, label %14

12:                                               ; preds = %2
  %13 = load ptr, ptr %5, align 8, !tbaa !8
  store i8 16, ptr %13, align 1, !tbaa !5
  store ptr null, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %60

14:                                               ; preds = %2
  %15 = call i32 @OS_CPU_SR_Save()
  store i32 %15, ptr %7, align 4, !tbaa !10
  %16 = load i8, ptr %4, align 1, !tbaa !5
  %17 = zext i8 %16 to i64
  %18 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %17
  %19 = load ptr, ptr %18, align 8, !tbaa !8
  %20 = icmp ne ptr %19, null
  br i1 %20, label %21, label %24

21:                                               ; preds = %14
  %22 = load i32, ptr %7, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %22)
  %23 = load ptr, ptr %5, align 8, !tbaa !8
  store i8 40, ptr %23, align 1, !tbaa !5
  store ptr null, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %60

24:                                               ; preds = %14
  %25 = load i8, ptr %4, align 1, !tbaa !5
  %26 = zext i8 %25 to i64
  %27 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %26
  store ptr inttoptr (i64 1 to ptr), ptr %27, align 8, !tbaa !8
  %28 = load ptr, ptr @OSEventFreeList, align 8, !tbaa !8
  store ptr %28, ptr %6, align 8, !tbaa !8
  %29 = load ptr, ptr %6, align 8, !tbaa !8
  %30 = icmp eq ptr %29, null
  br i1 %30, label %31, label %38

31:                                               ; preds = %24
  %32 = load i8, ptr %4, align 1, !tbaa !5
  %33 = zext i8 %32 to i64
  %34 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %33
  store ptr null, ptr %34, align 8, !tbaa !8
  %35 = load i32, ptr %7, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %35)
  %36 = load ptr, ptr %5, align 8, !tbaa !8
  store i8 4, ptr %36, align 1, !tbaa !5
  %37 = load ptr, ptr %6, align 8, !tbaa !8
  store ptr %37, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %60

38:                                               ; preds = %24
  %39 = load ptr, ptr @OSEventFreeList, align 8, !tbaa !8
  %40 = getelementptr inbounds %struct.os_event, ptr %39, i32 0, i32 1
  %41 = load ptr, ptr %40, align 8, !tbaa !12
  store ptr %41, ptr @OSEventFreeList, align 8, !tbaa !8
  %42 = load i32, ptr %7, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %42)
  %43 = load ptr, ptr %6, align 8, !tbaa !8
  %44 = getelementptr inbounds %struct.os_event, ptr %43, i32 0, i32 0
  store i8 4, ptr %44, align 8, !tbaa !15
  %45 = load i8, ptr %4, align 1, !tbaa !5
  %46 = zext i8 %45 to i16
  %47 = zext i16 %46 to i32
  %48 = shl i32 %47, 8
  %49 = trunc i32 %48 to i16
  %50 = zext i16 %49 to i32
  %51 = or i32 %50, 255
  %52 = trunc i32 %51 to i16
  %53 = load ptr, ptr %6, align 8, !tbaa !8
  %54 = getelementptr inbounds %struct.os_event, ptr %53, i32 0, i32 2
  store i16 %52, ptr %54, align 8, !tbaa !16
  %55 = load ptr, ptr %6, align 8, !tbaa !8
  %56 = getelementptr inbounds %struct.os_event, ptr %55, i32 0, i32 1
  store ptr null, ptr %56, align 8, !tbaa !12
  %57 = load ptr, ptr %6, align 8, !tbaa !8
  call void @OS_EventWaitListInit(ptr noundef %57)
  %58 = load ptr, ptr %5, align 8, !tbaa !8
  store i8 0, ptr %58, align 1, !tbaa !5
  %59 = load ptr, ptr %6, align 8, !tbaa !8
  store ptr %59, ptr %3, align 8
  store i32 1, ptr %8, align 4
  br label %60

60:                                               ; preds = %38, %31, %21, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %61 = load ptr, ptr %3, align 8
  ret ptr %61
}

declare void @OS_EventWaitListInit(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
!12 = !{!13, !9, i64 8}
!13 = !{!"os_event", !6, i64 0, !9, i64 8, !14, i64 16, !6, i64 18, !6, i64 19}
!14 = !{!"short", !6, i64 0}
!15 = !{!13, !6, i64 0}
!16 = !{!13, !14, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@OSIntNesting = external local_unnamed_addr global i8, align 1
@OSTCBPrioTbl = external local_unnamed_addr global [64 x ptr], align 16
@OSEventFreeList = external local_unnamed_addr global ptr, align 8

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local ptr @OSMutexCreate(i8 noundef zeroext %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #1 {
  %3 = load i8, ptr @OSIntNesting, align 1, !tbaa !5
  %.not = icmp eq i8 %3, 0
  br i1 %.not, label %4, label %21

4:                                                ; preds = %2
  %5 = tail call i32 @OS_CPU_SR_Save() #2
  %6 = zext i8 %0 to i64
  %7 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %6
  %8 = load ptr, ptr %7, align 8, !tbaa !8
  %.not19 = icmp eq ptr %8, null
  br i1 %.not19, label %10, label %9

9:                                                ; preds = %4
  tail call void @OS_CPU_SR_Restore(i32 noundef %5) #2
  br label %21

10:                                               ; preds = %4
  store ptr inttoptr (i64 1 to ptr), ptr %7, align 8, !tbaa !8
  %11 = load ptr, ptr @OSEventFreeList, align 8, !tbaa !8
  %12 = icmp eq ptr %11, null
  br i1 %12, label %13, label %14

13:                                               ; preds = %10
  store ptr null, ptr %7, align 8, !tbaa !8
  tail call void @OS_CPU_SR_Restore(i32 noundef %5) #2
  br label %21

14:                                               ; preds = %10
  %15 = getelementptr inbounds i8, ptr %11, i64 8
  %16 = load ptr, ptr %15, align 8, !tbaa !10
  store ptr %16, ptr @OSEventFreeList, align 8, !tbaa !8
  tail call void @OS_CPU_SR_Restore(i32 noundef %5) #2
  store i8 4, ptr %11, align 8, !tbaa !13
  %17 = zext i8 %0 to i16
  %18 = shl nuw i16 %17, 8
  %19 = or disjoint i16 %18, 255
  %20 = getelementptr inbounds i8, ptr %11, i64 16
  store i16 %19, ptr %20, align 8, !tbaa !14
  store ptr null, ptr %15, align 8, !tbaa !10
  tail call void @OS_EventWaitListInit(ptr noundef nonnull %11) #2
  br label %21

21:                                               ; preds = %2, %14, %13, %9
  %.sink = phi i8 [ 0, %14 ], [ 4, %13 ], [ 40, %9 ], [ 16, %2 ]
  %.0 = phi ptr [ %11, %14 ], [ null, %13 ], [ null, %9 ], [ null, %2 ]
  store i8 %.sink, ptr %1, align 1, !tbaa !5
  ret ptr %.0
}

declare void @OS_EventWaitListInit(ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !9, i64 8}
!11 = !{!"os_event", !6, i64 0, !9, i64 8, !12, i64 16, !6, i64 18, !6, i64 19}
!12 = !{!"short", !6, i64 0}
!13 = !{!11, !6, i64 0}
!14 = !{!11, !12, i64 16}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass