; LLVM IR from ponylang/ponyc :: src/libponyc/type (cap)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [72 x i8], align 1
@__func__.cap_dispatch = external hidden unnamed_addr constant [13 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @is_cap_sub_cap(i32 noundef, i32 noundef, i32 noundef, i32 noundef) #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) #1

declare i32 @ast_id(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @cap_single(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare ptr @ast_sibling(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @cap_dispatch(ptr noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = call i32 @ast_id(ptr noundef %10)
  switch i32 %11, label %67 [
    i32 149, label %12
    i32 56, label %41
    i32 151, label %64
  ]

12:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = call ptr @ast_child(ptr noundef %13)
  store ptr %14, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %15 = load ptr, ptr %4, align 8, !tbaa !5
  %16 = call i32 @cap_dispatch(ptr noundef %15)
  store i32 %16, ptr %5, align 4, !tbaa !9
  %17 = load ptr, ptr %4, align 8, !tbaa !5
  %18 = call ptr @ast_sibling(ptr noundef %17)
  store ptr %18, ptr %4, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %36, %12
  %20 = load ptr, ptr %4, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %22, label %39

22:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = call i32 @cap_dispatch(ptr noundef %23)
  store i32 %24, ptr %6, align 4, !tbaa !9
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = load i32, ptr %6, align 4, !tbaa !9
  %27 = call zeroext i1 @is_cap_sub_cap(i32 noundef %25, i32 noundef 2, i32 noundef %26, i32 noundef 2)
  br i1 %27, label %28, label %30

28:                                               ; preds = %22
  %29 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %29, ptr %5, align 4, !tbaa !9
  br label %36

30:                                               ; preds = %22
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = load i32, ptr %5, align 4, !tbaa !9
  %33 = call zeroext i1 @is_cap_sub_cap(i32 noundef %31, i32 noundef 2, i32 noundef %32, i32 noundef 2)
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 95, ptr %5, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %34, %30
  br label %36

36:                                               ; preds = %35, %28
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = call ptr @ast_sibling(ptr noundef %37)
  store ptr %38, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %19, !llvm.loop !11

39:                                               ; preds = %19
  %40 = load i32, ptr %5, align 4, !tbaa !9
  store i32 %40, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  br label %69

41:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = call ptr @ast_child(ptr noundef %42)
  store ptr %43, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %44 = load ptr, ptr %7, align 8, !tbaa !5
  %45 = call i32 @cap_dispatch(ptr noundef %44)
  store i32 %45, ptr %8, align 4, !tbaa !9
  %46 = load ptr, ptr %7, align 8, !tbaa !5
  %47 = call ptr @ast_sibling(ptr noundef %46)
  store ptr %47, ptr %7, align 8, !tbaa !5
  br label %48

48:                                               ; preds = %59, %41
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  %50 = icmp ne ptr %49, null
  br i1 %50, label %51, label %62

51:                                               ; preds = %48
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %52 = load ptr, ptr %7, align 8, !tbaa !5
  %53 = call i32 @cap_dispatch(ptr noundef %52)
  store i32 %53, ptr %9, align 4, !tbaa !9
  %54 = load i32, ptr %9, align 4, !tbaa !9
  %55 = load i32, ptr %8, align 4, !tbaa !9
  %56 = call zeroext i1 @is_cap_sub_cap(i32 noundef %54, i32 noundef 2, i32 noundef %55, i32 noundef 2)
  br i1 %56, label %57, label %59

57:                                               ; preds = %51
  %58 = load i32, ptr %9, align 4, !tbaa !9
  store i32 %58, ptr %8, align 4, !tbaa !9
  br label %59

59:                                               ; preds = %57, %51
  %60 = load ptr, ptr %7, align 8, !tbaa !5
  %61 = call ptr @ast_sibling(ptr noundef %60)
  store ptr %61, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %48, !llvm.loop !13

62:                                               ; preds = %48
  %63 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %63, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  br label %69

64:                                               ; preds = %1
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = call i32 @cap_single(ptr noundef %65)
  store i32 %66, ptr %2, align 4
  br label %69

67:                                               ; preds = %1
  br label %68

68:                                               ; preds = %67
  call void @ponyint_assert_fail(ptr noundef @.str, ptr noundef @.str.1, i64 noundef 612, ptr noundef @__func__.cap_dispatch)
  store i32 2, ptr %2, align 4
  br label %69

69:                                               ; preds = %68, %64, %62, %39
  %70 = load i32, ptr %2, align 4
  ret i32 %70
}

declare ptr @ast_child(ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [72 x i8], align 1
@__func__.cap_dispatch = external hidden unnamed_addr constant [13 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @is_cap_sub_cap(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @ast_id(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @cap_single(ptr noundef) local_unnamed_addr #0

declare ptr @ast_sibling(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @cap_dispatch(ptr noundef %0) local_unnamed_addr #0 {
  %2 = tail call i32 @ast_id(ptr noundef %0) #2
  switch i32 %2, label %22 [
    i32 149, label %3
    i32 56, label %13
    i32 151, label %20
  ]

3:                                                ; preds = %1
  %4 = tail call ptr @ast_child(ptr noundef %0) #2
  %5 = tail call i32 @cap_dispatch(ptr noundef %4)
  %6 = tail call ptr @ast_sibling(ptr noundef %4) #2
  %.not2935 = icmp eq ptr %6, null
  br i1 %.not2935, label %.loopexit, label %.lr.ph38

.lr.ph38:                                         ; preds = %3, %11
  %.02637 = phi ptr [ %12, %11 ], [ %6, %3 ]
  %.02736 = phi i32 [ %.128, %11 ], [ %5, %3 ]
  %7 = tail call i32 @cap_dispatch(ptr noundef nonnull %.02637)
  %8 = tail call zeroext i1 @is_cap_sub_cap(i32 noundef %.02736, i32 noundef 2, i32 noundef %7, i32 noundef 2)
  br i1 %8, label %11, label %9

9:                                                ; preds = %.lr.ph38
  %10 = tail call zeroext i1 @is_cap_sub_cap(i32 noundef %7, i32 noundef 2, i32 noundef %.02736, i32 noundef 2)
  %spec.select = select i1 %10, i32 %.02736, i32 95
  br label %11

11:                                               ; preds = %9, %.lr.ph38
  %.128 = phi i32 [ %7, %.lr.ph38 ], [ %spec.select, %9 ]
  %12 = tail call ptr @ast_sibling(ptr noundef nonnull %.02637) #2
  %.not29 = icmp eq ptr %12, null
  br i1 %.not29, label %.loopexit, label %.lr.ph38, !llvm.loop !5

13:                                               ; preds = %1
  %14 = tail call ptr @ast_child(ptr noundef %0) #2
  %15 = tail call i32 @cap_dispatch(ptr noundef %14)
  %16 = tail call ptr @ast_sibling(ptr noundef %14) #2
  %.not32 = icmp eq ptr %16, null
  br i1 %.not32, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %13, %.lr.ph
  %.02434 = phi i32 [ %spec.select30, %.lr.ph ], [ %15, %13 ]
  %.02533 = phi ptr [ %19, %.lr.ph ], [ %16, %13 ]
  %17 = tail call i32 @cap_dispatch(ptr noundef nonnull %.02533)
  %18 = tail call zeroext i1 @is_cap_sub_cap(i32 noundef %17, i32 noundef 2, i32 noundef %.02434, i32 noundef 2)
  %spec.select30 = select i1 %18, i32 %17, i32 %.02434
  %19 = tail call ptr @ast_sibling(ptr noundef nonnull %.02533) #2
  %.not = icmp eq ptr %19, null
  br i1 %.not, label %.loopexit, label %.lr.ph, !llvm.loop !7

20:                                               ; preds = %1
  %21 = tail call i32 @cap_single(ptr noundef %0)
  br label %.loopexit

22:                                               ; preds = %1
  tail call void @ponyint_assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i64 noundef 612, ptr noundef nonnull @__func__.cap_dispatch) #2
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %11, %13, %3, %22, %20
  %.0 = phi i32 [ 2, %22 ], [ %21, %20 ], [ %5, %3 ], [ %15, %13 ], [ %.128, %11 ], [ %spec.select30, %.lr.ph ]
  ret i32 %.0
}

declare ptr @ast_child(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass