; LLVM IR from erthink/libmdbx :: src (api-misc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__func__.mdbx_is_readahead_reasonable = external hidden unnamed_addr constant [29 x i8], align 1

; Function Attrs: cold nounwind optsize uwtable
define dso_local i32 @mdbx_is_readahead_reasonable(i64 noundef %0, i64 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  store i64 %0, ptr %4, align 8, !tbaa !5
  store i64 %1, ptr %5, align 8, !tbaa !5
  %14 = load i64, ptr %4, align 8, !tbaa !5
  %15 = icmp ule i64 %14, 4194304
  br i1 %15, label %16, label %17

16:                                               ; preds = %2
  store i32 -1, ptr %3, align 4
  br label %96

17:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #6
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #6
  %18 = call i32 @mdbx_get_sysraminfo(ptr noundef %6, ptr noundef %7, ptr noundef null)
  store i32 %18, ptr %8, align 4, !tbaa !9
  %19 = load i32, ptr %8, align 4, !tbaa !9
  %20 = icmp ne i32 %19, 0
  %21 = xor i1 %20, true
  %22 = xor i1 %21, true
  %23 = zext i1 %22 to i32
  %24 = sext i32 %23 to i64
  %25 = call i64 @llvm.expect.i64(i64 %24, i64 0)
  %26 = icmp ne i64 %25, 0
  br i1 %26, label %27, label %30

27:                                               ; preds = %17
  %28 = load i32, ptr %8, align 4, !tbaa !9
  %29 = call i32 @log_if_error(i32 noundef %28, ptr noundef @__func__.mdbx_is_readahead_reasonable, i32 noundef 13)
  store i32 %29, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %95

30:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #6
  %31 = load i64, ptr %6, align 8, !tbaa !5
  %32 = call i32 @log2n_powerof2(i64 noundef %31) #7
  store i32 %32, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #6
  %33 = load i64, ptr %4, align 8, !tbaa !5
  %34 = load i64, ptr %6, align 8, !tbaa !5
  %35 = add i64 %33, %34
  %36 = sub i64 %35, 1
  %37 = load i32, ptr %10, align 4, !tbaa !9
  %38 = zext i32 %37 to i64
  %39 = lshr i64 %36, %38
  store i64 %39, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #6
  %40 = load i64, ptr %5, align 8, !tbaa !5
  %41 = icmp slt i64 %40, 0
  br i1 %41, label %42, label %52

42:                                               ; preds = %30
  %43 = load i64, ptr %5, align 8, !tbaa !5
  %44 = sub nsw i64 0, %43
  %45 = load i64, ptr %6, align 8, !tbaa !5
  %46 = add nsw i64 %44, %45
  %47 = sub nsw i64 %46, 1
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = zext i32 %48 to i64
  %50 = ashr i64 %47, %49
  %51 = sub nsw i64 0, %50
  br label %60

52:                                               ; preds = %30
  %53 = load i64, ptr %5, align 8, !tbaa !5
  %54 = load i64, ptr %6, align 8, !tbaa !5
  %55 = add nsw i64 %53, %54
  %56 = sub nsw i64 %55, 1
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = zext i32 %57 to i64
  %59 = ashr i64 %56, %58
  br label %60

60:                                               ; preds = %52, %42
  %61 = phi i64 [ %51, %42 ], [ %59, %52 ]
  store i64 %61, ptr %12, align 8, !tbaa !5
  %62 = load i64, ptr %11, align 8, !tbaa !5
  %63 = load i64, ptr %7, align 8, !tbaa !5
  %64 = icmp sge i64 %62, %63
  br i1 %64, label %71, label %65

65:                                               ; preds = %60
  %66 = load i64, ptr %11, align 8, !tbaa !5
  %67 = load i64, ptr %12, align 8, !tbaa !5
  %68 = add nsw i64 %66, %67
  %69 = load i64, ptr %7, align 8, !tbaa !5
  %70 = icmp sge i64 %68, %69
  br i1 %70, label %71, label %72

71:                                               ; preds = %65, %60
  store i32 0, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %94

72:                                               ; preds = %65
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  %73 = call i32 @mdbx_get_sysraminfo(ptr noundef null, ptr noundef null, ptr noundef %13)
  store i32 %73, ptr %8, align 4, !tbaa !9
  %74 = load i32, ptr %8, align 4, !tbaa !9
  %75 = icmp ne i32 %74, 0
  %76 = xor i1 %75, true
  %77 = xor i1 %76, true
  %78 = zext i1 %77 to i32
  %79 = sext i32 %78 to i64
  %80 = call i64 @llvm.expect.i64(i64 %79, i64 0)
  %81 = icmp ne i64 %80, 0
  br i1 %81, label %82, label %85

82:                                               ; preds = %72
  %83 = load i32, ptr %8, align 4, !tbaa !9
  %84 = call i32 @log_if_error(i32 noundef %83, ptr noundef @__func__.mdbx_is_readahead_reasonable, i32 noundef 25)
  store i32 %84, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %93

85:                                               ; preds = %72
  %86 = load i64, ptr %11, align 8, !tbaa !5
  %87 = load i64, ptr %12, align 8, !tbaa !5
  %88 = add nsw i64 %86, %87
  %89 = load i64, ptr %13, align 8, !tbaa !5
  %90 = icmp sge i64 %88, %89
  %91 = zext i1 %90 to i64
  %92 = select i1 %90, i32 0, i32 -1
  store i32 %92, ptr %3, align 4
  store i32 1, ptr %9, align 4
  br label %93

93:                                               ; preds = %85, %82
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  br label %94

94:                                               ; preds = %93, %71
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #6
  br label %95

95:                                               ; preds = %94, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #6
  br label %96

96:                                               ; preds = %95, %16
  %97 = load i32, ptr %3, align 4
  ret i32 %97
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @mdbx_get_sysraminfo(ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @log_if_error(i32 noundef, ptr noundef, i32 noundef) #4

; Function Attrs: nounwind willreturn memory(none)
declare i32 @log2n_powerof2(i64 noundef) #5

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { cold nounwind optsize uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #4 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind willreturn memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
attributes #7 = { nounwind willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__func__.mdbx_is_readahead_reasonable = external hidden unnamed_addr constant [29 x i8], align 1

; Function Attrs: cold nounwind optsize uwtable
define dso_local i32 @mdbx_is_readahead_reasonable(i64 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = icmp ult i64 %0, 4194305
  br i1 %6, label %42, label %7

7:                                                ; preds = %2
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  %8 = call i32 @mdbx_get_sysraminfo(ptr noundef nonnull %3, ptr noundef nonnull %4, ptr noundef null) #5
  %.not = icmp eq i32 %8, 0
  br i1 %.not, label %11, label %9, !prof !5

9:                                                ; preds = %7
  %10 = call i32 @log_if_error(i32 noundef %8, ptr noundef nonnull @__func__.mdbx_is_readahead_reasonable, i32 noundef 13)
  br label %41

11:                                               ; preds = %7
  %12 = load i64, ptr %3, align 8, !tbaa !6
  %13 = call i32 @log2n_powerof2(i64 noundef %12) #6
  %14 = add i64 %0, -1
  %15 = add i64 %14, %12
  %16 = zext i32 %13 to i64
  %17 = lshr i64 %15, %16
  %18 = icmp slt i64 %1, 0
  br i1 %18, label %19, label %24

19:                                               ; preds = %11
  %20 = xor i64 %1, -1
  %21 = add i64 %12, %20
  %22 = ashr i64 %21, %16
  %23 = sub nsw i64 0, %22
  br label %28

24:                                               ; preds = %11
  %25 = add nsw i64 %1, -1
  %26 = add i64 %25, %12
  %27 = ashr i64 %26, %16
  br label %28

28:                                               ; preds = %24, %19
  %29 = phi i64 [ %23, %19 ], [ %27, %24 ]
  %30 = load i64, ptr %4, align 8, !tbaa !6
  %.not26 = icmp slt i64 %17, %30
  br i1 %.not26, label %31, label %41

31:                                               ; preds = %28
  %32 = add nsw i64 %29, %17
  %.not27 = icmp slt i64 %32, %30
  br i1 %.not27, label %33, label %41

33:                                               ; preds = %31
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #5
  %34 = call i32 @mdbx_get_sysraminfo(ptr noundef null, ptr noundef null, ptr noundef nonnull %5) #5
  %.not28 = icmp eq i32 %34, 0
  br i1 %.not28, label %37, label %35, !prof !5

35:                                               ; preds = %33
  %36 = call i32 @log_if_error(i32 noundef %34, ptr noundef nonnull @__func__.mdbx_is_readahead_reasonable, i32 noundef 25)
  br label %40

37:                                               ; preds = %33
  %38 = load i64, ptr %5, align 8, !tbaa !6
  %.not29 = icmp slt i64 %32, %38
  %39 = sext i1 %.not29 to i32
  br label %40

40:                                               ; preds = %37, %35
  %.0 = phi i32 [ %36, %35 ], [ %39, %37 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #5
  br label %41

41:                                               ; preds = %40, %31, %28, %9
  %.2 = phi i32 [ %10, %9 ], [ %.0, %40 ], [ 0, %31 ], [ 0, %28 ]
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  br label %42

42:                                               ; preds = %2, %41
  %.3 = phi i32 [ %.2, %41 ], [ -1, %2 ]
  ret i32 %.3
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare i32 @mdbx_get_sysraminfo(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @log_if_error(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
declare i32 @log2n_powerof2(i64 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { cold nounwind optsize uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree nosync nounwind willreturn memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { nounwind willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!"branch_weights", !"expected", i32 2000, i32 1}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,ReassociatePass,SROAPass,SimplifyCFGPass