; LLVM IR from asllop/AppOS :: serial (serial)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i64 @serial_send(i8 noundef zeroext %0, ptr noundef %1, i64 noundef %2) #0 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store i8 %0, ptr %4, align 1, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !8
  store i64 %2, ptr %6, align 8, !tbaa !10
  %8 = call i32 @core_lock(i32 noundef 3)
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !10
  br label %9

9:                                                ; preds = %27, %3
  %10 = load i64, ptr %7, align 8, !tbaa !10
  %11 = load i64, ptr %6, align 8, !tbaa !10
  %12 = icmp ult i64 %10, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  br label %30

14:                                               ; preds = %9
  br label %15

15:                                               ; preds = %20, %14
  %16 = load i8, ptr %4, align 1, !tbaa !5
  %17 = call zeroext i8 @is_transmit_empty(i8 noundef zeroext %16)
  %18 = zext i8 %17 to i32
  %19 = icmp eq i32 %18, 0
  br i1 %19, label %20, label %21

20:                                               ; preds = %15
  call void @core_sleep(i64 noundef 0)
  br label %15, !llvm.loop !12

21:                                               ; preds = %15
  %22 = load i8, ptr %4, align 1, !tbaa !5
  %23 = load ptr, ptr %5, align 8, !tbaa !8
  %24 = load i64, ptr %7, align 8, !tbaa !10
  %25 = getelementptr inbounds i8, ptr %23, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !5
  call void @serial_write_byte(i8 noundef zeroext %22, i8 noundef zeroext %26)
  br label %27

27:                                               ; preds = %21
  %28 = load i64, ptr %7, align 8, !tbaa !10
  %29 = add i64 %28, 1
  store i64 %29, ptr %7, align 8, !tbaa !10
  br label %9, !llvm.loop !14

30:                                               ; preds = %13
  %31 = call i32 @core_unlock(i32 noundef 3)
  %32 = load i64, ptr %6, align 8, !tbaa !10
  ret i64 %32
}

declare i32 @core_lock(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare zeroext i8 @is_transmit_empty(i8 noundef zeroext) #1

declare void @core_sleep(i64 noundef) #1

declare void @serial_write_byte(i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare i32 @core_unlock(i32 noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !6, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef i64 @serial_send(i8 noundef zeroext %0, ptr nocapture noundef readonly %1, i64 noundef returned %2) local_unnamed_addr #0 {
  %4 = tail call i32 @core_lock(i32 noundef 3) #2
  %.not = icmp eq i64 %2, 0
  br i1 %.not, label %._crit_edge9, label %.preheader

.preheader:                                       ; preds = %3, %._crit_edge
  %.08 = phi i64 [ %12, %._crit_edge ], [ 0, %3 ]
  %5 = tail call zeroext i8 @is_transmit_empty(i8 noundef zeroext %0) #2
  %6 = icmp eq i8 %5, 0
  br i1 %6, label %.lr.ph, label %._crit_edge

._crit_edge9:                                     ; preds = %._crit_edge, %3
  %7 = tail call i32 @core_unlock(i32 noundef 3) #2
  ret i64 %2

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  tail call void @core_sleep(i64 noundef 0) #2
  %8 = tail call zeroext i8 @is_transmit_empty(i8 noundef zeroext %0) #2
  %9 = icmp eq i8 %8, 0
  br i1 %9, label %.lr.ph, label %._crit_edge, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  %10 = getelementptr inbounds i8, ptr %1, i64 %.08
  %11 = load i8, ptr %10, align 1, !tbaa !7
  tail call void @serial_write_byte(i8 noundef zeroext %0, i8 noundef zeroext %11) #2
  %12 = add nuw i64 %.08, 1
  %exitcond.not = icmp eq i64 %12, %2
  br i1 %exitcond.not, label %._crit_edge9, label %.preheader, !llvm.loop !10
}

declare i32 @core_lock(i32 noundef) local_unnamed_addr #1

declare zeroext i8 @is_transmit_empty(i8 noundef zeroext) local_unnamed_addr #1

declare void @core_sleep(i64 noundef) local_unnamed_addr #1

declare void @serial_write_byte(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1

declare i32 @core_unlock(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !6}


; Effective O3 passes: GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass