; LLVM IR from NVIDIA/tensorflow :: tensorflow/examples/android/jni (yuv2rgb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL7YUV2RGBiii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @ConvertYUV420SPToARGB8888(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4) #2 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %21 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %21, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  %22 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %22, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #3
  %23 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %23, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %71, %5
  %25 = load i32, ptr %14, align 4, !tbaa !9
  %26 = load i32, ptr %10, align 4, !tbaa !9
  %27 = icmp slt i32 %25, %26
  br i1 %27, label %29, label %28

28:                                               ; preds = %24
  store i32 2, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  br label %74

29:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %67, %29
  %31 = load i32, ptr %16, align 4, !tbaa !9
  %32 = load i32, ptr %9, align 4, !tbaa !9
  %33 = icmp slt i32 %31, %32
  br i1 %33, label %35, label %34

34:                                               ; preds = %30
  store i32 5, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %70

35:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %36 = load ptr, ptr %11, align 8, !tbaa !5
  %37 = getelementptr inbounds i8, ptr %36, i32 1
  store ptr %37, ptr %11, align 8, !tbaa !5
  %38 = load i8, ptr %36, align 1, !tbaa !11
  %39 = zext i8 %38 to i32
  store i32 %39, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %40 = load i32, ptr %14, align 4, !tbaa !9
  %41 = ashr i32 %40, 1
  %42 = load i32, ptr %9, align 4, !tbaa !9
  %43 = mul nsw i32 %41, %42
  %44 = load i32, ptr %16, align 4, !tbaa !9
  %45 = ashr i32 %44, 1
  %46 = mul nsw i32 2, %45
  %47 = add nsw i32 %43, %46
  store i32 %47, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #3
  %48 = load ptr, ptr %12, align 8, !tbaa !5
  %49 = load i32, ptr %18, align 4, !tbaa !9
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds i8, ptr %48, i64 %50
  %52 = load i8, ptr %51, align 1, !tbaa !11
  %53 = zext i8 %52 to i32
  store i32 %53, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #3
  %54 = load ptr, ptr %12, align 8, !tbaa !5
  %55 = load i32, ptr %18, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds i8, ptr %54, i64 %57
  %59 = load i8, ptr %58, align 1, !tbaa !11
  %60 = zext i8 %59 to i32
  store i32 %60, ptr %20, align 4, !tbaa !9
  %61 = load i32, ptr %17, align 4, !tbaa !9
  %62 = load i32, ptr %20, align 4, !tbaa !9
  %63 = load i32, ptr %19, align 4, !tbaa !9
  %64 = call noundef i32 @_ZL7YUV2RGBiii(i32 noundef %61, i32 noundef %62, i32 noundef %63)
  %65 = load ptr, ptr %13, align 8, !tbaa !5
  %66 = getelementptr inbounds i32, ptr %65, i32 1
  store ptr %66, ptr %13, align 8, !tbaa !5
  store i32 %64, ptr %65, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  br label %67

67:                                               ; preds = %35
  %68 = load i32, ptr %16, align 4, !tbaa !9
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %16, align 4, !tbaa !9
  br label %30, !llvm.loop !12

70:                                               ; preds = %34
  br label %71

71:                                               ; preds = %70
  %72 = load i32, ptr %14, align 4, !tbaa !9
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %14, align 4, !tbaa !9
  br label %24, !llvm.loop !14

74:                                               ; preds = %28
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL7YUV2RGBiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @ConvertYUV420SPToARGB8888(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  %6 = icmp sgt i32 %4, 0
  %7 = icmp sgt i32 %3, 0
  %or.cond = and i1 %6, %7
  br i1 %or.cond, label %.preheader.us, label %._crit_edge32

.preheader.us:                                    ; preds = %5, %._crit_edge.us
  %.031.us = phi ptr [ %11, %._crit_edge.us ], [ %0, %5 ]
  %.02030.us = phi ptr [ %24, %._crit_edge.us ], [ %2, %5 ]
  %.02229.us = phi i32 [ %26, %._crit_edge.us ], [ 0, %5 ]
  %8 = lshr i32 %.02229.us, 1
  %9 = mul nuw nsw i32 %8, %3
  br label %10

10:                                               ; preds = %.preheader.us, %10
  %.127.us = phi ptr [ %.031.us, %.preheader.us ], [ %11, %10 ]
  %.12126.us = phi ptr [ %.02030.us, %.preheader.us ], [ %24, %10 ]
  %.02325.us = phi i32 [ 0, %.preheader.us ], [ %25, %10 ]
  %11 = getelementptr inbounds i8, ptr %.127.us, i64 1
  %12 = load i8, ptr %.127.us, align 1, !tbaa !5
  %13 = zext i8 %12 to i32
  %14 = and i32 %.02325.us, 2147483646
  %15 = add nuw nsw i32 %14, %9
  %16 = zext nneg i32 %15 to i64
  %17 = getelementptr inbounds i8, ptr %1, i64 %16
  %18 = load i8, ptr %17, align 1, !tbaa !5
  %19 = zext i8 %18 to i32
  %20 = getelementptr i8, ptr %17, i64 1
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %22 = zext i8 %21 to i32
  %23 = tail call noundef i32 @_ZL7YUV2RGBiii(i32 noundef %13, i32 noundef %22, i32 noundef %19)
  %24 = getelementptr inbounds i8, ptr %.12126.us, i64 4
  store i32 %23, ptr %.12126.us, align 4, !tbaa !8
  %25 = add nuw nsw i32 %.02325.us, 1
  %exitcond.not = icmp eq i32 %25, %3
  br i1 %exitcond.not, label %._crit_edge.us, label %10, !llvm.loop !10

._crit_edge.us:                                   ; preds = %10
  %26 = add nuw nsw i32 %.02229.us, 1
  %exitcond35.not = icmp eq i32 %26, %4
  br i1 %exitcond35.not, label %._crit_edge32, label %.preheader.us, !llvm.loop !12

._crit_edge32:                                    ; preds = %._crit_edge.us, %5
  ret void
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass