; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-III2/uC-LIB (lib_mem)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.mem_pool = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i32, i32 }

@Mem_PoolHeap = external dso_local global %struct.mem_pool, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @Mem_HeapAlloc(i32 noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !9
  store ptr %3, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  store i32 0, ptr %16, align 4, !tbaa !5
  %18 = load ptr, ptr %8, align 8, !tbaa !9
  %19 = icmp eq ptr %18, null
  br i1 %19, label %20, label %21

20:                                               ; preds = %4
  store ptr %13, ptr %8, align 8, !tbaa !9
  br label %21

21:                                               ; preds = %20, %4
  %22 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 0, ptr %22, align 4, !tbaa !5
  store ptr @Mem_PoolHeap, ptr %10, align 8, !tbaa !9
  br label %23

23:                                               ; preds = %21
  br label %24

24:                                               ; preds = %23
  %25 = call i32 @CPU_SR_Save()
  store i32 %25, ptr %16, align 4, !tbaa !5
  br label %26

26:                                               ; preds = %24
  br label %27

27:                                               ; preds = %26
  br label %28

28:                                               ; preds = %27
  br label %29

29:                                               ; preds = %28
  %30 = load ptr, ptr %10, align 8, !tbaa !9
  %31 = getelementptr inbounds %struct.mem_pool, ptr %30, i32 0, i32 15
  %32 = load ptr, ptr %31, align 8, !tbaa !11
  store ptr %32, ptr %11, align 8, !tbaa !9
  %33 = load ptr, ptr %10, align 8, !tbaa !9
  %34 = getelementptr inbounds %struct.mem_pool, ptr %33, i32 0, i32 17
  %35 = load i32, ptr %34, align 4, !tbaa !13
  store i32 %35, ptr %14, align 4, !tbaa !5
  %36 = load ptr, ptr %11, align 8, !tbaa !9
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = load i32, ptr %7, align 4, !tbaa !5
  %39 = call i32 @Mem_SegCalcTotSize(ptr noundef %36, i32 noundef 1, i32 noundef %37, i32 noundef %38)
  store i32 %39, ptr %15, align 4, !tbaa !5
  %40 = load i32, ptr %15, align 4, !tbaa !5
  %41 = load i32, ptr %14, align 4, !tbaa !5
  %42 = icmp ugt i32 %40, %41
  br i1 %42, label %43, label %56

43:                                               ; preds = %29
  br label %44

44:                                               ; preds = %43
  br label %45

45:                                               ; preds = %44
  %46 = load i32, ptr %16, align 4, !tbaa !5
  call void @CPU_SR_Restore(i32 noundef %46)
  br label %47

47:                                               ; preds = %45
  br label %48

48:                                               ; preds = %47
  br label %49

49:                                               ; preds = %48
  br label %50

50:                                               ; preds = %49
  %51 = load i32, ptr %15, align 4, !tbaa !5
  %52 = load i32, ptr %14, align 4, !tbaa !5
  %53 = sub i32 %51, %52
  %54 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %53, ptr %54, align 4, !tbaa !5
  %55 = load ptr, ptr %9, align 8, !tbaa !9
  store i32 10210, ptr %55, align 4, !tbaa !5
  store ptr null, ptr %5, align 8
  store i32 1, ptr %17, align 4
  br label %84

56:                                               ; preds = %29
  %57 = load ptr, ptr %10, align 8, !tbaa !9
  %58 = load i32, ptr %6, align 4, !tbaa !5
  %59 = load i32, ptr %7, align 4, !tbaa !5
  %60 = call ptr @Mem_SegAlloc(ptr noundef %57, i32 noundef %58, i32 noundef %59)
  store ptr %60, ptr %12, align 8, !tbaa !9
  %61 = load ptr, ptr %12, align 8, !tbaa !9
  %62 = icmp eq ptr %61, null
  br i1 %62, label %63, label %74

63:                                               ; preds = %56
  br label %64

64:                                               ; preds = %63
  br label %65

65:                                               ; preds = %64
  %66 = load i32, ptr %16, align 4, !tbaa !5
  call void @CPU_SR_Restore(i32 noundef %66)
  br label %67

67:                                               ; preds = %65
  br label %68

68:                                               ; preds = %67
  br label %69

69:                                               ; preds = %68
  br label %70

70:                                               ; preds = %69
  %71 = load i32, ptr %15, align 4, !tbaa !5
  %72 = load ptr, ptr %8, align 8, !tbaa !9
  store i32 %71, ptr %72, align 4, !tbaa !5
  %73 = load ptr, ptr %9, align 8, !tbaa !9
  store i32 10210, ptr %73, align 4, !tbaa !5
  store ptr null, ptr %5, align 8
  store i32 1, ptr %17, align 4
  br label %84

74:                                               ; preds = %56
  br label %75

75:                                               ; preds = %74
  br label %76

76:                                               ; preds = %75
  %77 = load i32, ptr %16, align 4, !tbaa !5
  call void @CPU_SR_Restore(i32 noundef %77)
  br label %78

78:                                               ; preds = %76
  br label %79

79:                                               ; preds = %78
  br label %80

80:                                               ; preds = %79
  br label %81

81:                                               ; preds = %80
  %82 = load ptr, ptr %9, align 8, !tbaa !9
  store i32 10000, ptr %82, align 4, !tbaa !5
  %83 = load ptr, ptr %12, align 8, !tbaa !9
  store ptr %83, ptr %5, align 8
  store i32 1, ptr %17, align 4
  br label %84

84:                                               ; preds = %81, %70, %50
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  %85 = load ptr, ptr %5, align 8
  ret ptr %85
}

declare i32 @CPU_SR_Save() #2

; Function Attrs: nounwind uwtable
declare hidden i32 @Mem_SegCalcTotSize(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #1

declare void @CPU_SR_Restore(i32 noundef) #2

; Function Attrs: nounwind uwtable
declare hidden ptr @Mem_SegAlloc(ptr noundef, i32 noundef, i32 noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 104}
!12 = !{!"mem_pool", !6, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !10, i64 96, !10, i64 104, !6, i64 112, !6, i64 116}
!13 = !{!12, !6, i64 116}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.mem_pool = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i32, i32 }

@Mem_PoolHeap = external dso_local global %struct.mem_pool, align 8

; Function Attrs: nounwind uwtable
define dso_local ptr @Mem_HeapAlloc(i32 noundef %0, i32 noundef %1, ptr noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
  %5 = icmp eq ptr %2, null
  br i1 %5, label %.cont31, label %.else33

.else33:                                          ; preds = %4
  store i32 0, ptr %2, align 4, !tbaa !5
  br label %.cont31

.cont31:                                          ; preds = %4, %.else33
  %6 = tail call i32 @CPU_SR_Save() #2
  %7 = load ptr, ptr getelementptr inbounds (i8, ptr @Mem_PoolHeap, i64 104), align 8, !tbaa !9
  %8 = load i32, ptr getelementptr inbounds (i8, ptr @Mem_PoolHeap, i64 116), align 4, !tbaa !12
  %9 = tail call i32 @Mem_SegCalcTotSize(ptr noundef %7, i32 noundef 1, i32 noundef %0, i32 noundef %1)
  %10 = icmp ugt i32 %9, %8
  br i1 %10, label %11, label %13

11:                                               ; preds = %.cont31
  tail call void @CPU_SR_Restore(i32 noundef %6) #2
  br i1 %5, label %.cont28, label %.else30

.else30:                                          ; preds = %11
  %12 = sub i32 %9, %8
  br label %.cont28.sink.split

13:                                               ; preds = %.cont31
  %14 = tail call ptr @Mem_SegAlloc(ptr noundef nonnull @Mem_PoolHeap, i32 noundef %0, i32 noundef %1)
  %15 = icmp ne ptr %14, null
  tail call void @CPU_SR_Restore(i32 noundef %6) #2
  %brmerge = or i1 %15, %5
  %.mux = select i1 %15, i32 10000, i32 10210
  br i1 %brmerge, label %.cont28, label %.cont28.sink.split

.cont28.sink.split:                               ; preds = %13, %.else30
  %.sink34 = phi i32 [ %12, %.else30 ], [ %9, %13 ]
  store i32 %.sink34, ptr %2, align 4, !tbaa !5
  br label %.cont28

.cont28:                                          ; preds = %13, %.cont28.sink.split, %11
  %.sink = phi i32 [ 10210, %11 ], [ %.mux, %13 ], [ 10210, %.cont28.sink.split ]
  %.0 = phi ptr [ null, %11 ], [ %14, %13 ], [ null, %.cont28.sink.split ]
  store i32 %.sink, ptr %3, align 4, !tbaa !5
  ret ptr %.0
}

declare i32 @CPU_SR_Save() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden i32 @Mem_SegCalcTotSize(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

declare void @CPU_SR_Restore(i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden ptr @Mem_SegAlloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 104}
!10 = !{!"mem_pool", !6, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !6, i64 72, !6, i64 76, !6, i64 80, !6, i64 84, !6, i64 88, !11, i64 96, !11, i64 104, !6, i64 112, !6, i64 116}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 116}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass