; LLVM IR from ADJA/algos :: Graphs/Dinic.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.edge = type { i32, i32, i32, i32 }

@e = external dso_local global %"class.std::vector", align 8
@pt = external dso_local global [1050 x i32], align 16
@g = external dso_local global [1050 x %"class.std::vector.0"], align 16
@d = external dso_local global [1050 x i32], align 16
@t = external dso_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef %0, i32 noundef %1) #2 {
  %3 = alloca i1, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %10 = load i32, ptr %5, align 4, !tbaa !5
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %12, label %13

12:                                               ; preds = %2
  store i1 false, ptr %3, align 1
  br label %108

13:                                               ; preds = %2
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = load i32, ptr @t, align 4, !tbaa !5
  %16 = icmp eq i32 %14, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %13
  store i1 true, ptr %3, align 1
  br label %108

18:                                               ; preds = %13
  br label %19

19:                                               ; preds = %101, %18
  %20 = load i32, ptr %4, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [1050 x i32], ptr @pt, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sext i32 %25 to i64
  %27 = getelementptr inbounds [1050 x %"class.std::vector.0"], ptr @g, i64 0, i64 %26
  %28 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %27) #3
  %29 = icmp ult i64 %24, %28
  br i1 %29, label %30, label %107

30:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %31 = load i32, ptr %4, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [1050 x %"class.std::vector.0"], ptr @g, i64 0, i64 %32
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [1050 x i32], ptr @pt, i64 0, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %33, i64 noundef %38) #3
  %40 = load i32, ptr %39, align 4, !tbaa !5
  store i32 %40, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %42) #3
  %44 = getelementptr inbounds %struct.edge, ptr %43, i32 0, i32 1
  %45 = load i32, ptr %44, align 4, !tbaa !9
  store i32 %45, ptr %7, align 4, !tbaa !5
  %46 = load i32, ptr %7, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [1050 x i32], ptr @d, i64 0, i64 %47
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [1050 x i32], ptr @d, i64 0, i64 %51
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = add nsw i32 %53, 1
  %55 = icmp eq i32 %49, %54
  br i1 %55, label %56, label %97

56:                                               ; preds = %30
  %57 = load i32, ptr %6, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %58) #3
  %60 = getelementptr inbounds %struct.edge, ptr %59, i32 0, i32 3
  %61 = load i32, ptr %60, align 4, !tbaa !11
  %62 = load i32, ptr %6, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %63) #3
  %65 = getelementptr inbounds %struct.edge, ptr %64, i32 0, i32 2
  %66 = load i32, ptr %65, align 4, !tbaa !12
  %67 = sub nsw i32 %61, %66
  %68 = load i32, ptr %5, align 4, !tbaa !5
  %69 = icmp sge i32 %67, %68
  br i1 %69, label %70, label %97

70:                                               ; preds = %56
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %71 = load i32, ptr %7, align 4, !tbaa !5
  %72 = load i32, ptr %5, align 4, !tbaa !5
  %73 = call noundef zeroext i1 @_Z3dfsii(i32 noundef %71, i32 noundef %72)
  %74 = zext i1 %73 to i32
  store i32 %74, ptr %8, align 4, !tbaa !5
  %75 = load i32, ptr %8, align 4, !tbaa !5
  %76 = icmp ne i32 %75, 0
  br i1 %76, label %77, label %93

77:                                               ; preds = %70
  %78 = load i32, ptr %5, align 4, !tbaa !5
  %79 = load i32, ptr %6, align 4, !tbaa !5
  %80 = sext i32 %79 to i64
  %81 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %80) #3
  %82 = getelementptr inbounds %struct.edge, ptr %81, i32 0, i32 2
  %83 = load i32, ptr %82, align 4, !tbaa !12
  %84 = add nsw i32 %83, %78
  store i32 %84, ptr %82, align 4, !tbaa !12
  %85 = load i32, ptr %5, align 4, !tbaa !5
  %86 = load i32, ptr %6, align 4, !tbaa !5
  %87 = xor i32 %86, 1
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %88) #3
  %90 = getelementptr inbounds %struct.edge, ptr %89, i32 0, i32 2
  %91 = load i32, ptr %90, align 4, !tbaa !12
  %92 = sub nsw i32 %91, %85
  store i32 %92, ptr %90, align 4, !tbaa !12
  store i1 true, ptr %3, align 1
  store i32 1, ptr %9, align 4
  br label %94

93:                                               ; preds = %70
  store i32 0, ptr %9, align 4
  br label %94

94:                                               ; preds = %93, %77
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %95 = load i32, ptr %9, align 4
  switch i32 %95, label %98 [
    i32 0, label %96
  ]

96:                                               ; preds = %94
  br label %97

97:                                               ; preds = %96, %56, %30
  store i32 0, ptr %9, align 4
  br label %98

98:                                               ; preds = %97, %94
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  %99 = load i32, ptr %9, align 4
  switch i32 %99, label %110 [
    i32 0, label %100
    i32 1, label %108
  ]

100:                                              ; preds = %98
  br label %101

101:                                              ; preds = %100
  %102 = load i32, ptr %4, align 4, !tbaa !5
  %103 = sext i32 %102 to i64
  %104 = getelementptr inbounds [1050 x i32], ptr @pt, i64 0, i64 %103
  %105 = load i32, ptr %104, align 4, !tbaa !5
  %106 = add nsw i32 %105, 1
  store i32 %106, ptr %104, align 4, !tbaa !5
  br label %19, !llvm.loop !13

107:                                              ; preds = %19
  store i1 false, ptr %3, align 1
  br label %108

108:                                              ; preds = %107, %98, %17, %12
  %109 = load i1, ptr %3, align 1
  ret i1 %109

110:                                              ; preds = %98
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"_ZTS4edge", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!11 = !{!10, !6, i64 12}
!12 = !{!10, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.0" = type { %"struct.std::_Vector_base.1" }
%"struct.std::_Vector_base.1" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@e = external dso_local global %"class.std::vector", align 8
@pt = external dso_local local_unnamed_addr global [1050 x i32], align 16
@g = external dso_local global [1050 x %"class.std::vector.0"], align 16
@d = external dso_local local_unnamed_addr global [1050 x i32], align 16
@t = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp eq i32 %1, 0
  br i1 %3, label %.loopexit, label %4

4:                                                ; preds = %2
  %5 = load i32, ptr @t, align 4, !tbaa !5
  %6 = icmp eq i32 %5, %0
  br i1 %6, label %.loopexit, label %.preheader

.preheader:                                       ; preds = %4
  %7 = sext i32 %0 to i64
  %8 = getelementptr inbounds [1050 x i32], ptr @pt, i64 0, i64 %7
  %9 = getelementptr inbounds [1050 x %"class.std::vector.0"], ptr @g, i64 0, i64 %7
  %10 = load i32, ptr %8, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #1
  %13 = icmp ugt i64 %12, %11
  br i1 %13, label %.lr.ph, label %.loopexit

.lr.ph:                                           ; preds = %.preheader
  %14 = getelementptr inbounds [1050 x i32], ptr @d, i64 0, i64 %7
  br label %15

15:                                               ; preds = %.lr.ph, %50
  %16 = load i32, ptr %8, align 4, !tbaa !5
  %17 = sext i32 %16 to i64
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %9, i64 noundef %17) #1
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %20) #1
  %22 = getelementptr inbounds i8, ptr %21, i64 4
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [1050 x i32], ptr @d, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = load i32, ptr %14, align 4, !tbaa !5
  %28 = add nsw i32 %27, 1
  %29 = icmp eq i32 %26, %28
  br i1 %29, label %30, label %50

30:                                               ; preds = %15
  %31 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %20) #1
  %32 = getelementptr inbounds i8, ptr %31, i64 12
  %33 = load i32, ptr %32, align 4, !tbaa !11
  %34 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %20) #1
  %35 = getelementptr inbounds i8, ptr %34, i64 8
  %36 = load i32, ptr %35, align 4, !tbaa !12
  %37 = sub nsw i32 %33, %36
  %.not = icmp slt i32 %37, %1
  br i1 %.not, label %50, label %38

38:                                               ; preds = %30
  %39 = tail call noundef zeroext i1 @_Z3dfsii(i32 noundef %23, i32 noundef %1)
  br i1 %39, label %.critedge, label %50

.critedge:                                        ; preds = %38
  %40 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %20) #1
  %41 = getelementptr inbounds i8, ptr %40, i64 8
  %42 = load i32, ptr %41, align 4, !tbaa !12
  %43 = add nsw i32 %42, %1
  store i32 %43, ptr %41, align 4, !tbaa !12
  %44 = xor i32 %19, 1
  %45 = sext i32 %44 to i64
  %46 = tail call noundef nonnull align 4 dereferenceable(16) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %45) #1
  %47 = getelementptr inbounds i8, ptr %46, i64 8
  %48 = load i32, ptr %47, align 4, !tbaa !12
  %49 = sub nsw i32 %48, %1
  store i32 %49, ptr %47, align 4, !tbaa !12
  br label %.loopexit

50:                                               ; preds = %38, %30, %15
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %8, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #1
  %55 = icmp ugt i64 %54, %53
  br i1 %55, label %15, label %.loopexit, !llvm.loop !13

.loopexit:                                        ; preds = %50, %.preheader, %.critedge, %4, %2
  %.4 = phi i1 [ true, %.critedge ], [ false, %2 ], [ true, %4 ], [ false, %.preheader ], [ false, %50 ]
  ret i1 %.4
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 4}
!10 = !{!"_ZTS4edge", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!11 = !{!10, !6, i64 12}
!12 = !{!10, !6, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass