; LLVM IR from ponylang/ponyc :: src/libponyc/type (cap)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [72 x i8], align 1
@__func__.is_cap_sub_cap = external hidden unnamed_addr constant [15 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @cap_aliasing(ptr noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @is_cap_sub_cap(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
  %5 = alloca i1, align 1
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  call void @cap_aliasing(ptr noundef %6, ptr noundef %7)
  call void @cap_aliasing(ptr noundef %8, ptr noundef %9)
  %10 = load i32, ptr %9, align 4, !tbaa !5
  %11 = icmp eq i32 %10, 57
  br i1 %11, label %12, label %17

12:                                               ; preds = %4
  %13 = load i32, ptr %7, align 4, !tbaa !5
  %14 = icmp ne i32 %13, 57
  br i1 %14, label %15, label %16

15:                                               ; preds = %12
  store i1 false, ptr %5, align 1
  br label %62

16:                                               ; preds = %12
  br label %17

17:                                               ; preds = %16, %4
  %18 = load i32, ptr %8, align 4, !tbaa !5
  %19 = icmp eq i32 %18, 96
  br i1 %19, label %20, label %21

20:                                               ; preds = %17
  store i1 true, ptr %5, align 1
  br label %62

21:                                               ; preds = %17
  %22 = load i32, ptr %7, align 4, !tbaa !5
  %23 = icmp eq i32 %22, 57
  br i1 %23, label %24, label %35

24:                                               ; preds = %21
  %25 = load i32, ptr %6, align 4, !tbaa !5
  switch i32 %25, label %33 [
    i32 91, label %26
    i32 92, label %27
  ]

26:                                               ; preds = %24
  store i1 true, ptr %5, align 1
  br label %62

27:                                               ; preds = %24
  %28 = load i32, ptr %8, align 4, !tbaa !5
  switch i32 %28, label %31 [
    i32 92, label %29
    i32 93, label %29
    i32 94, label %29
    i32 95, label %29
    i32 97, label %29
    i32 99, label %29
    i32 100, label %29
    i32 91, label %30
    i32 98, label %30
    i32 101, label %30
  ]

29:                                               ; preds = %27, %27, %27, %27, %27, %27, %27
  store i1 true, ptr %5, align 1
  br label %62

30:                                               ; preds = %27, %27, %27
  store i1 false, ptr %5, align 1
  br label %62

31:                                               ; preds = %27
  call void @ponyint_assert_fail(ptr noundef @.str, ptr noundef @.str.1, i64 noundef 101, ptr noundef @__func__.is_cap_sub_cap)
  br label %32

32:                                               ; preds = %31
  br label %33

33:                                               ; preds = %32, %24
  br label %34

34:                                               ; preds = %33
  br label %35

35:                                               ; preds = %34, %21
  %36 = load i32, ptr %6, align 4, !tbaa !5
  switch i32 %36, label %60 [
    i32 91, label %37
    i32 92, label %40
    i32 93, label %45
    i32 94, label %50
    i32 95, label %55
    i32 97, label %55
  ]

37:                                               ; preds = %35
  %38 = load i32, ptr %8, align 4, !tbaa !5
  %39 = icmp eq i32 %38, 91
  store i1 %39, ptr %5, align 1
  br label %62

40:                                               ; preds = %35
  %41 = load i32, ptr %8, align 4, !tbaa !5
  switch i32 %41, label %43 [
    i32 92, label %42
    i32 95, label %42
  ]

42:                                               ; preds = %40, %40
  store i1 true, ptr %5, align 1
  br label %62

43:                                               ; preds = %40
  br label %44

44:                                               ; preds = %43
  br label %61

45:                                               ; preds = %35
  %46 = load i32, ptr %8, align 4, !tbaa !5
  switch i32 %46, label %48 [
    i32 93, label %47
    i32 95, label %47
  ]

47:                                               ; preds = %45, %45
  store i1 true, ptr %5, align 1
  br label %62

48:                                               ; preds = %45
  br label %49

49:                                               ; preds = %48
  br label %61

50:                                               ; preds = %35
  %51 = load i32, ptr %8, align 4, !tbaa !5
  switch i32 %51, label %53 [
    i32 94, label %52
    i32 95, label %52
    i32 99, label %52
  ]

52:                                               ; preds = %50, %50, %50
  store i1 true, ptr %5, align 1
  br label %62

53:                                               ; preds = %50
  br label %54

54:                                               ; preds = %53
  br label %61

55:                                               ; preds = %35, %35
  %56 = load i32, ptr %8, align 4, !tbaa !5
  switch i32 %56, label %58 [
    i32 95, label %57
  ]

57:                                               ; preds = %55
  store i1 true, ptr %5, align 1
  br label %62

58:                                               ; preds = %55
  br label %59

59:                                               ; preds = %58
  br label %61

60:                                               ; preds = %35
  br label %61

61:                                               ; preds = %60, %59, %54, %49, %44
  store i1 false, ptr %5, align 1
  br label %62

62:                                               ; preds = %61, %57, %52, %47, %42, %37, %30, %29, %26, %20, %15
  %63 = load i1, ptr %5, align 1
  ret i1 %63
}

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [2 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [72 x i8], align 1
@__func__.is_cap_sub_cap = external hidden unnamed_addr constant [15 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @cap_aliasing(ptr noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @is_cap_sub_cap(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  store i32 %3, ptr %8, align 4, !tbaa !5
  call void @cap_aliasing(ptr noundef nonnull %5, ptr noundef nonnull %6)
  call void @cap_aliasing(ptr noundef nonnull %7, ptr noundef nonnull %8)
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = icmp eq i32 %9, 57
  %11 = load i32, ptr %6, align 4
  %12 = icmp ne i32 %11, 57
  %or.cond = select i1 %10, i1 %12, i1 false
  br i1 %or.cond, label %39, label %13

13:                                               ; preds = %4
  %14 = load i32, ptr %7, align 4, !tbaa !5
  %15 = icmp eq i32 %14, 96
  br i1 %15, label %39, label %16

16:                                               ; preds = %13
  %17 = icmp eq i32 %11, 57
  br i1 %17, label %18, label %thread-pre-split

18:                                               ; preds = %16
  %19 = load i32, ptr %5, align 4, !tbaa !5
  switch i32 %19, label %23 [
    i32 91, label %39
    i32 92, label %20
  ]

20:                                               ; preds = %18
  %switch.tableidx = add i32 %14, -91
  %21 = icmp ult i32 %switch.tableidx, 11
  br i1 %21, label %switch.hole_check, label %22

22:                                               ; preds = %switch.hole_check, %20
  call void @ponyint_assert_fail(ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i64 noundef 101, ptr noundef nonnull @__func__.is_cap_sub_cap) #2
  br label %thread-pre-split

thread-pre-split:                                 ; preds = %16, %22
  %.pr = load i32, ptr %5, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %thread-pre-split, %18
  %24 = phi i32 [ %.pr, %thread-pre-split ], [ %19, %18 ]
  switch i32 %24, label %38 [
    i32 91, label %25
    i32 92, label %28
    i32 93, label %30
    i32 94, label %33
    i32 95, label %36
    i32 97, label %36
  ]

25:                                               ; preds = %23
  %26 = load i32, ptr %7, align 4, !tbaa !5
  %27 = icmp eq i32 %26, 91
  br label %39

28:                                               ; preds = %23
  %29 = load i32, ptr %7, align 4, !tbaa !5
  %switch.selectcmp.case1 = icmp eq i32 %29, 92
  %switch.selectcmp.case2 = icmp eq i32 %29, 95
  %switch.selectcmp = or i1 %switch.selectcmp.case1, %switch.selectcmp.case2
  br label %39

30:                                               ; preds = %23
  %31 = load i32, ptr %7, align 4, !tbaa !5
  %32 = add i32 %31, -93
  %switch.and = and i32 %32, -3
  %switch.selectcmp3 = icmp eq i32 %switch.and, 0
  br label %39

33:                                               ; preds = %23
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %switch.tableidx5 = add i32 %34, -94
  %35 = icmp ult i32 %switch.tableidx5, 6
  br i1 %35, label %switch.lookup4, label %38

36:                                               ; preds = %23, %23
  %37 = load i32, ptr %7, align 4, !tbaa !5
  %cond = icmp eq i32 %37, 95
  br i1 %cond, label %39, label %38

38:                                               ; preds = %33, %23, %36
  br label %39

switch.hole_check:                                ; preds = %20
  %switch.maskindex = trunc nuw i32 %switch.tableidx to i16
  %switch.shifted = lshr i16 2015, %switch.maskindex
  %switch.lobit = trunc i16 %switch.shifted to i1
  br i1 %switch.lobit, label %switch.lookup, label %22

switch.lookup:                                    ; preds = %switch.hole_check
  %switch.cast = trunc nuw i32 %switch.tableidx to i11
  %switch.downshift = lshr i11 894, %switch.cast
  %switch.masked = trunc i11 %switch.downshift to i1
  br label %39

switch.lookup4:                                   ; preds = %33
  %switch.cast6 = trunc nuw i32 %switch.tableidx5 to i6
  %switch.downshift8 = lshr i6 -29, %switch.cast6
  %switch.masked9 = trunc i6 %switch.downshift8 to i1
  br label %39

39:                                               ; preds = %switch.lookup4, %switch.lookup, %36, %30, %28, %18, %13, %4, %38, %25
  %.0 = phi i1 [ false, %38 ], [ %27, %25 ], [ false, %4 ], [ true, %13 ], [ true, %18 ], [ %switch.selectcmp, %28 ], [ %switch.selectcmp3, %30 ], [ true, %36 ], [ %switch.masked, %switch.lookup ], [ %switch.masked9, %switch.lookup4 ]
  ret i1 %.0
}

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InstCombinePass,JumpThreadingPass,SROAPass,SimplifyCFGPass