; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_time)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_tcb = type { ptr, ptr, ptr, i32, i16, i16, ptr, ptr, ptr, ptr, ptr, i16, i32, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, ptr, i32, ptr, [1 x i32] }

@OSRdyTbl = external global [8 x i8], align 1
@OSRdyGrp = external global i8, align 1
@OSTCBPrioTbl = external global [64 x ptr], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

declare void @OS_Sched() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @OSTimeDlyResume(i8 noundef zeroext %0) #2 {
  %2 = alloca i8, align 1
  %3 = alloca i8, align 1
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i8 %0, ptr %3, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !8
  %7 = load i8, ptr %3, align 1, !tbaa !5
  %8 = zext i8 %7 to i32
  %9 = icmp uge i32 %8, 63
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  store i8 42, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %87

11:                                               ; preds = %1
  %12 = call i32 @OS_CPU_SR_Save()
  store i32 %12, ptr %5, align 4, !tbaa !8
  %13 = load i8, ptr %3, align 1, !tbaa !5
  %14 = zext i8 %13 to i64
  %15 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %14
  %16 = load ptr, ptr %15, align 8, !tbaa !10
  store ptr %16, ptr %4, align 8, !tbaa !10
  %17 = load ptr, ptr %4, align 8, !tbaa !10
  %18 = icmp eq ptr %17, null
  br i1 %18, label %19, label %21

19:                                               ; preds = %11
  %20 = load i32, ptr %5, align 4, !tbaa !8
  call void @OS_CPU_SR_Restore(i32 noundef %20)
  store i8 67, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %87

21:                                               ; preds = %11
  %22 = load ptr, ptr %4, align 8, !tbaa !10
  %23 = icmp eq ptr %22, inttoptr (i64 1 to ptr)
  br i1 %23, label %24, label %26

24:                                               ; preds = %21
  %25 = load i32, ptr %5, align 4, !tbaa !8
  call void @OS_CPU_SR_Restore(i32 noundef %25)
  store i8 67, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %87

26:                                               ; preds = %21
  %27 = load ptr, ptr %4, align 8, !tbaa !10
  %28 = getelementptr inbounds %struct.os_tcb, ptr %27, i32 0, i32 12
  %29 = load i32, ptr %28, align 4, !tbaa !12
  %30 = icmp eq i32 %29, 0
  br i1 %30, label %31, label %33

31:                                               ; preds = %26
  %32 = load i32, ptr %5, align 4, !tbaa !8
  call void @OS_CPU_SR_Restore(i32 noundef %32)
  store i8 80, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %87

33:                                               ; preds = %26
  %34 = load ptr, ptr %4, align 8, !tbaa !10
  %35 = getelementptr inbounds %struct.os_tcb, ptr %34, i32 0, i32 12
  store i32 0, ptr %35, align 4, !tbaa !12
  %36 = load ptr, ptr %4, align 8, !tbaa !10
  %37 = getelementptr inbounds %struct.os_tcb, ptr %36, i32 0, i32 13
  %38 = load i8, ptr %37, align 8, !tbaa !15
  %39 = zext i8 %38 to i32
  %40 = and i32 %39, 55
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %51

42:                                               ; preds = %33
  %43 = load ptr, ptr %4, align 8, !tbaa !10
  %44 = getelementptr inbounds %struct.os_tcb, ptr %43, i32 0, i32 13
  %45 = load i8, ptr %44, align 8, !tbaa !15
  %46 = zext i8 %45 to i32
  %47 = and i32 %46, -56
  %48 = trunc i32 %47 to i8
  store i8 %48, ptr %44, align 8, !tbaa !15
  %49 = load ptr, ptr %4, align 8, !tbaa !10
  %50 = getelementptr inbounds %struct.os_tcb, ptr %49, i32 0, i32 14
  store i8 1, ptr %50, align 1, !tbaa !16
  br label %54

51:                                               ; preds = %33
  %52 = load ptr, ptr %4, align 8, !tbaa !10
  %53 = getelementptr inbounds %struct.os_tcb, ptr %52, i32 0, i32 14
  store i8 0, ptr %53, align 1, !tbaa !16
  br label %54

54:                                               ; preds = %51, %42
  %55 = load ptr, ptr %4, align 8, !tbaa !10
  %56 = getelementptr inbounds %struct.os_tcb, ptr %55, i32 0, i32 13
  %57 = load i8, ptr %56, align 8, !tbaa !15
  %58 = zext i8 %57 to i32
  %59 = and i32 %58, 8
  %60 = icmp eq i32 %59, 0
  br i1 %60, label %61, label %84

61:                                               ; preds = %54
  %62 = load ptr, ptr %4, align 8, !tbaa !10
  %63 = getelementptr inbounds %struct.os_tcb, ptr %62, i32 0, i32 19
  %64 = load i8, ptr %63, align 2, !tbaa !17
  %65 = zext i8 %64 to i32
  %66 = load i8, ptr @OSRdyGrp, align 1, !tbaa !5
  %67 = zext i8 %66 to i32
  %68 = or i32 %67, %65
  %69 = trunc i32 %68 to i8
  store i8 %69, ptr @OSRdyGrp, align 1, !tbaa !5
  %70 = load ptr, ptr %4, align 8, !tbaa !10
  %71 = getelementptr inbounds %struct.os_tcb, ptr %70, i32 0, i32 18
  %72 = load i8, ptr %71, align 1, !tbaa !18
  %73 = zext i8 %72 to i32
  %74 = load ptr, ptr %4, align 8, !tbaa !10
  %75 = getelementptr inbounds %struct.os_tcb, ptr %74, i32 0, i32 17
  %76 = load i8, ptr %75, align 4, !tbaa !19
  %77 = zext i8 %76 to i64
  %78 = getelementptr inbounds [8 x i8], ptr @OSRdyTbl, i64 0, i64 %77
  %79 = load i8, ptr %78, align 1, !tbaa !5
  %80 = zext i8 %79 to i32
  %81 = or i32 %80, %73
  %82 = trunc i32 %81 to i8
  store i8 %82, ptr %78, align 1, !tbaa !5
  %83 = load i32, ptr %5, align 4, !tbaa !8
  call void @OS_CPU_SR_Restore(i32 noundef %83)
  call void @OS_Sched()
  br label %86

84:                                               ; preds = %54
  %85 = load i32, ptr %5, align 4, !tbaa !8
  call void @OS_CPU_SR_Restore(i32 noundef %85)
  br label %86

86:                                               ; preds = %84, %61
  store i8 0, ptr %2, align 1
  store i32 1, ptr %6, align 4
  br label %87

87:                                               ; preds = %86, %31, %24, %19, %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  %88 = load i8, ptr %2, align 1
  ret i8 %88
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !6, i64 0}
!12 = !{!13, !9, i64 76}
!13 = !{!"os_tcb", !11, i64 0, !11, i64 8, !11, i64 16, !9, i64 24, !14, i64 28, !14, i64 30, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !14, i64 72, !9, i64 76, !6, i64 80, !6, i64 81, !6, i64 82, !6, i64 83, !6, i64 84, !6, i64 85, !6, i64 86, !6, i64 87, !9, i64 88, !9, i64 92, !9, i64 96, !11, i64 104, !9, i64 112, !11, i64 120, !6, i64 128}
!14 = !{!"short", !6, i64 0}
!15 = !{!13, !6, i64 80}
!16 = !{!13, !6, i64 81}
!17 = !{!13, !6, i64 86}
!18 = !{!13, !6, i64 85}
!19 = !{!13, !6, i64 84}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@OSRdyTbl = external local_unnamed_addr global [8 x i8], align 1
@OSRdyGrp = external local_unnamed_addr global i8, align 1
@OSTCBPrioTbl = external local_unnamed_addr global [64 x ptr], align 16

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

declare void @OS_Sched() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 81) i8 @OSTimeDlyResume(i8 noundef zeroext %0) local_unnamed_addr #1 {
  %2 = icmp ugt i8 %0, 62
  br i1 %2, label %40, label %3

3:                                                ; preds = %1
  %4 = tail call i32 @OS_CPU_SR_Save() #2
  %5 = zext nneg i8 %0 to i64
  %6 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %5
  %7 = load ptr, ptr %6, align 8, !tbaa !5
  %magicptr = ptrtoint ptr %7 to i64
  switch i64 %magicptr, label %10 [
    i64 0, label %8
    i64 1, label %9
  ]

8:                                                ; preds = %3
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  br label %40

9:                                                ; preds = %3
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  br label %40

10:                                               ; preds = %3
  %11 = getelementptr inbounds i8, ptr %7, i64 76
  %12 = load i32, ptr %11, align 4, !tbaa !9
  %13 = icmp eq i32 %12, 0
  br i1 %13, label %14, label %15

14:                                               ; preds = %10
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  br label %40

15:                                               ; preds = %10
  store i32 0, ptr %11, align 4, !tbaa !9
  %16 = getelementptr inbounds i8, ptr %7, i64 80
  %17 = load i8, ptr %16, align 8, !tbaa !13
  %18 = and i8 %17, 55
  %.not = icmp eq i8 %18, 0
  br i1 %.not, label %21, label %19

19:                                               ; preds = %15
  %20 = and i8 %17, -56
  store i8 %20, ptr %16, align 8, !tbaa !13
  br label %21

21:                                               ; preds = %15, %19
  %22 = phi i8 [ %20, %19 ], [ %17, %15 ]
  %.sink = phi i8 [ 1, %19 ], [ 0, %15 ]
  %23 = getelementptr inbounds i8, ptr %7, i64 81
  store i8 %.sink, ptr %23, align 1
  %24 = and i8 %22, 8
  %25 = icmp eq i8 %24, 0
  br i1 %25, label %26, label %39

26:                                               ; preds = %21
  %27 = getelementptr inbounds i8, ptr %7, i64 86
  %28 = load i8, ptr %27, align 2, !tbaa !14
  %29 = load i8, ptr @OSRdyGrp, align 1, !tbaa !15
  %30 = or i8 %29, %28
  store i8 %30, ptr @OSRdyGrp, align 1, !tbaa !15
  %31 = getelementptr inbounds i8, ptr %7, i64 85
  %32 = load i8, ptr %31, align 1, !tbaa !16
  %33 = getelementptr inbounds i8, ptr %7, i64 84
  %34 = load i8, ptr %33, align 4, !tbaa !17
  %35 = zext i8 %34 to i64
  %36 = getelementptr inbounds [8 x i8], ptr @OSRdyTbl, i64 0, i64 %35
  %37 = load i8, ptr %36, align 1, !tbaa !15
  %38 = or i8 %37, %32
  store i8 %38, ptr %36, align 1, !tbaa !15
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  tail call void @OS_Sched() #2
  br label %40

39:                                               ; preds = %21
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  br label %40

40:                                               ; preds = %26, %39, %1, %14, %9, %8
  %.0 = phi i8 [ 67, %8 ], [ 67, %9 ], [ 80, %14 ], [ 42, %1 ], [ 0, %39 ], [ 0, %26 ]
  ret i8 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 76}
!10 = !{!"os_tcb", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !12, i64 28, !12, i64 30, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !12, i64 72, !11, i64 76, !7, i64 80, !7, i64 81, !7, i64 82, !7, i64 83, !7, i64 84, !7, i64 85, !7, i64 86, !7, i64 87, !11, i64 88, !11, i64 92, !11, i64 96, !6, i64 104, !11, i64 112, !6, i64 120, !7, i64 128}
!11 = !{!"int", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!10, !7, i64 80}
!14 = !{!10, !7, i64 86}
!15 = !{!7, !7, i64 0}
!16 = !{!10, !7, i64 85}
!17 = !{!10, !7, i64 84}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass