; LLVM IR from cvra/robot-software :: uwb-beacon-firmware/src/decadriver (deca_device)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write16bitoffsetreg(i32 noundef, i32 noundef, i16 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @dwt_read8bitoffsetreg(i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_forcetrxoff() #1

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_syncrxbufptrs() #1

; Function Attrs: nounwind uwtable
define dso_local i32 @dwt_rxenable(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i16, align 2
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = and i32 %7, 4
  %9 = icmp eq i32 %8, 0
  br i1 %9, label %10, label %11

10:                                               ; preds = %1
  call void @dwt_syncrxbufptrs()
  br label %11

11:                                               ; preds = %10, %1
  store i16 256, ptr %4, align 2, !tbaa !9
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = and i32 %12, 1
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %20

15:                                               ; preds = %11
  %16 = load i16, ptr %4, align 2, !tbaa !9
  %17 = zext i16 %16 to i32
  %18 = or i32 %17, 512
  %19 = trunc i32 %18 to i16
  store i16 %19, ptr %4, align 2, !tbaa !9
  br label %20

20:                                               ; preds = %15, %11
  %21 = load i16, ptr %4, align 2, !tbaa !9
  call void @dwt_write16bitoffsetreg(i32 noundef 13, i32 noundef 0, i16 noundef zeroext %21)
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = and i32 %22, 1
  %24 = icmp ne i32 %23, 0
  br i1 %24, label %25, label %38

25:                                               ; preds = %20
  %26 = call zeroext i8 @dwt_read8bitoffsetreg(i32 noundef 15, i32 noundef 3)
  store i8 %26, ptr %5, align 1, !tbaa !11
  %27 = load i8, ptr %5, align 1, !tbaa !11
  %28 = zext i8 %27 to i64
  %29 = and i64 %28, 8
  %30 = icmp ne i64 %29, 0
  br i1 %30, label %31, label %37

31:                                               ; preds = %25
  call void @dwt_forcetrxoff()
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = and i32 %32, 2
  %34 = icmp eq i32 %33, 0
  br i1 %34, label %35, label %36

35:                                               ; preds = %31
  call void @dwt_write16bitoffsetreg(i32 noundef 13, i32 noundef 0, i16 noundef zeroext 256)
  br label %36

36:                                               ; preds = %35, %31
  store i32 -1, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %39

37:                                               ; preds = %25
  br label %38

38:                                               ; preds = %37, %20
  store i32 0, ptr %2, align 4
  store i32 1, ptr %6, align 4
  br label %39

39:                                               ; preds = %38, %36
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #2
  %40 = load i32, ptr %2, align 4
  ret i32 %40
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write16bitoffsetreg(i32 noundef, i32 noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i8 @dwt_read8bitoffsetreg(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_forcetrxoff() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_syncrxbufptrs() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @dwt_rxenable(i32 noundef %0) local_unnamed_addr #0 {
  %2 = and i32 %0, 4
  %3 = icmp eq i32 %2, 0
  br i1 %3, label %4, label %5

4:                                                ; preds = %1
  tail call void @dwt_syncrxbufptrs()
  br label %5

5:                                                ; preds = %4, %1
  %6 = and i32 %0, 1
  %.not = icmp eq i32 %6, 0
  %spec.select = select i1 %.not, i16 256, i16 768
  tail call void @dwt_write16bitoffsetreg(i32 noundef 13, i32 noundef 0, i16 noundef zeroext %spec.select)
  br i1 %.not, label %14, label %7

7:                                                ; preds = %5
  %8 = tail call zeroext i8 @dwt_read8bitoffsetreg(i32 noundef 15, i32 noundef 3)
  %9 = and i8 %8, 8
  %.not9 = icmp eq i8 %9, 0
  br i1 %.not9, label %14, label %10

10:                                               ; preds = %7
  tail call void @dwt_forcetrxoff()
  %11 = and i32 %0, 2
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %14

13:                                               ; preds = %10
  tail call void @dwt_write16bitoffsetreg(i32 noundef 13, i32 noundef 0, i16 noundef zeroext 256)
  br label %14

14:                                               ; preds = %5, %7, %10, %13
  %.0 = phi i32 [ -1, %13 ], [ -1, %10 ], [ 0, %7 ], [ 0, %5 ]
  ret i32 %.0
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass