; LLVM IR from ADJA/algos :: Other/QuickSort.ll (Z5qsortii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@a = external dso_local global [105000 x i32], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5qsortii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %9 = load i32, ptr %3, align 4, !tbaa !5
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = icmp sge i32 %9, %10
  br i1 %11, label %12, label %13

12:                                               ; preds = %2
  br label %84

13:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %14 = load i32, ptr %3, align 4, !tbaa !5
  %15 = call i32 @rand() #4
  %16 = load i32, ptr %4, align 4, !tbaa !5
  %17 = load i32, ptr %3, align 4, !tbaa !5
  %18 = sub nsw i32 %16, %17
  %19 = srem i32 %15, %18
  %20 = add nsw i32 %14, %19
  store i32 %20, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %21 = load i32, ptr %5, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %22
  %24 = load i32, ptr %23, align 4, !tbaa !5
  store i32 %24, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %25 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %25, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %26 = load i32, ptr %4, align 4, !tbaa !5
  store i32 %26, ptr %8, align 4, !tbaa !5
  br label %27

27:                                               ; preds = %68, %13
  %28 = load i32, ptr %7, align 4, !tbaa !5
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = icmp sle i32 %28, %29
  br i1 %30, label %31, label %69

31:                                               ; preds = %27
  br label %32

32:                                               ; preds = %39, %31
  %33 = load i32, ptr %7, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %34
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %39, label %42

39:                                               ; preds = %32
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = add nsw i32 %40, 1
  store i32 %41, ptr %7, align 4, !tbaa !5
  br label %32, !llvm.loop !9

42:                                               ; preds = %32
  br label %43

43:                                               ; preds = %50, %42
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %45
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = load i32, ptr %6, align 4, !tbaa !5
  %49 = icmp sgt i32 %47, %48
  br i1 %49, label %50, label %53

50:                                               ; preds = %43
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = add nsw i32 %51, -1
  store i32 %52, ptr %8, align 4, !tbaa !5
  br label %43, !llvm.loop !11

53:                                               ; preds = %43
  %54 = load i32, ptr %7, align 4, !tbaa !5
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = icmp sle i32 %54, %55
  br i1 %56, label %57, label %68

57:                                               ; preds = %53
  %58 = load i32, ptr %7, align 4, !tbaa !5
  %59 = sext i32 %58 to i64
  %60 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %59
  %61 = load i32, ptr %8, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %62
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %60, ptr noundef nonnull align 4 dereferenceable(4) %63) #4
  %64 = load i32, ptr %7, align 4, !tbaa !5
  %65 = add nsw i32 %64, 1
  store i32 %65, ptr %7, align 4, !tbaa !5
  %66 = load i32, ptr %8, align 4, !tbaa !5
  %67 = add nsw i32 %66, -1
  store i32 %67, ptr %8, align 4, !tbaa !5
  br label %68

68:                                               ; preds = %57, %53
  br label %27, !llvm.loop !12

69:                                               ; preds = %27
  %70 = load i32, ptr %3, align 4, !tbaa !5
  %71 = load i32, ptr %8, align 4, !tbaa !5
  %72 = icmp slt i32 %70, %71
  br i1 %72, label %73, label %76

73:                                               ; preds = %69
  %74 = load i32, ptr %3, align 4, !tbaa !5
  %75 = load i32, ptr %8, align 4, !tbaa !5
  call void @_Z5qsortii(i32 noundef %74, i32 noundef %75)
  br label %76

76:                                               ; preds = %73, %69
  %77 = load i32, ptr %7, align 4, !tbaa !5
  %78 = load i32, ptr %4, align 4, !tbaa !5
  %79 = icmp slt i32 %77, %78
  br i1 %79, label %80, label %83

80:                                               ; preds = %76
  %81 = load i32, ptr %7, align 4, !tbaa !5
  %82 = load i32, ptr %4, align 4, !tbaa !5
  call void @_Z5qsortii(i32 noundef %81, i32 noundef %82)
  br label %83

83:                                               ; preds = %80, %76
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %84

84:                                               ; preds = %83, %12
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare i32 @rand() #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@a = external dso_local global [105000 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5qsortii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  br label %tailrecurse

tailrecurse:                                      ; preds = %33, %2
  %.tr = phi i32 [ %0, %2 ], [ %.232, %33 ]
  %.not = icmp slt i32 %.tr, %1
  br i1 %.not, label %3, label %35

3:                                                ; preds = %tailrecurse
  %4 = tail call i32 @rand() #3
  %5 = sub nsw i32 %1, %.tr
  %6 = srem i32 %4, %5
  %7 = add nsw i32 %6, %.tr
  %8 = sext i32 %7 to i64
  %9 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %8
  %10 = load i32, ptr %9, align 4, !tbaa !5
  br label %.preheader38

.preheader38:                                     ; preds = %3, %29
  %.042 = phi i32 [ %1, %3 ], [ %.2, %29 ]
  %.03041 = phi i32 [ %.tr, %3 ], [ %.232, %29 ]
  %11 = sext i32 %.03041 to i64
  br label %12

12:                                               ; preds = %12, %.preheader38
  %indvars.iv = phi i64 [ %indvars.iv.next, %12 ], [ %11, %.preheader38 ]
  %13 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %indvars.iv
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = icmp slt i32 %14, %10
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  br i1 %15, label %12, label %.preheader, !llvm.loop !9

.preheader:                                       ; preds = %12
  %16 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %indvars.iv
  %17 = trunc nsw i64 %indvars.iv to i32
  %18 = sext i32 %.042 to i64
  br label %19

19:                                               ; preds = %19, %.preheader
  %indvars.iv45 = phi i64 [ %indvars.iv.next46, %19 ], [ %18, %.preheader ]
  %20 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %indvars.iv45
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = icmp sgt i32 %21, %10
  %indvars.iv.next46 = add nsw i64 %indvars.iv45, -1
  br i1 %22, label %19, label %23, !llvm.loop !11

23:                                               ; preds = %19
  %24 = trunc nsw i64 %indvars.iv45 to i32
  %.not36 = icmp sgt i64 %indvars.iv, %indvars.iv45
  br i1 %.not36, label %29, label %25

25:                                               ; preds = %23
  %26 = getelementptr inbounds [105000 x i32], ptr @a, i64 0, i64 %indvars.iv45
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %16, ptr noundef nonnull align 4 dereferenceable(4) %26) #3
  %27 = add nsw i32 %17, 1
  %28 = add nsw i32 %24, -1
  br label %29

29:                                               ; preds = %25, %23
  %.232 = phi i32 [ %27, %25 ], [ %17, %23 ]
  %.2 = phi i32 [ %28, %25 ], [ %24, %23 ]
  %.not35 = icmp sgt i32 %.232, %.2
  br i1 %.not35, label %30, label %.preheader38, !llvm.loop !12

30:                                               ; preds = %29
  %31 = icmp sgt i32 %.2, %.tr
  br i1 %31, label %32, label %33

32:                                               ; preds = %30
  tail call void @_Z5qsortii(i32 noundef %.tr, i32 noundef %.2)
  br label %33

33:                                               ; preds = %32, %30
  %34 = icmp slt i32 %.232, %1
  br i1 %34, label %tailrecurse, label %35

35:                                               ; preds = %33, %tailrecurse
  ret void
}

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass