; LLVM IR from cvra/robot-software :: uwb-beacon-firmware/src/decadriver (deca_device)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write16bitoffsetreg(i32 noundef, i32 noundef, i16 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @dwt_read32bitoffsetreg(i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write32bitoffsetreg(i32 noundef, i32 noundef, i64 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @dwt_setsniffmode(i32 noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i64, align 8
  %8 = alloca i16, align 2
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i8 %1, ptr %5, align 1, !tbaa !9
  store i8 %2, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #2
  %9 = load i32, ptr %4, align 4, !tbaa !5
  %10 = icmp ne i32 %9, 0
  br i1 %10, label %11, label %26

11:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #2
  %12 = load i8, ptr %6, align 1, !tbaa !9
  %13 = zext i8 %12 to i32
  %14 = shl i32 %13, 8
  %15 = load i8, ptr %5, align 1, !tbaa !9
  %16 = zext i8 %15 to i32
  %17 = or i32 %14, %16
  %18 = sext i32 %17 to i64
  %19 = and i64 %18, 65295
  %20 = trunc i64 %19 to i16
  store i16 %20, ptr %8, align 2, !tbaa !10
  %21 = load i16, ptr %8, align 2, !tbaa !10
  call void @dwt_write16bitoffsetreg(i32 noundef 29, i32 noundef 0, i16 noundef zeroext %21)
  %22 = call i64 @dwt_read32bitoffsetreg(i32 noundef 54, i32 noundef 0)
  store i64 %22, ptr %7, align 8, !tbaa !12
  %23 = load i64, ptr %7, align 8, !tbaa !12
  %24 = or i64 %23, 16777216
  store i64 %24, ptr %7, align 8, !tbaa !12
  %25 = load i64, ptr %7, align 8, !tbaa !12
  call void @dwt_write32bitoffsetreg(i32 noundef 54, i32 noundef 0, i64 noundef %25)
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #2
  br label %31

26:                                               ; preds = %3
  call void @dwt_write16bitoffsetreg(i32 noundef 29, i32 noundef 0, i16 noundef zeroext 0)
  %27 = call i64 @dwt_read32bitoffsetreg(i32 noundef 54, i32 noundef 0)
  store i64 %27, ptr %7, align 8, !tbaa !12
  %28 = load i64, ptr %7, align 8, !tbaa !12
  %29 = and i64 %28, -16777217
  store i64 %29, ptr %7, align 8, !tbaa !12
  %30 = load i64, ptr %7, align 8, !tbaa !12
  call void @dwt_write32bitoffsetreg(i32 noundef 54, i32 noundef 0, i64 noundef %30)
  br label %31

31:                                               ; preds = %26, %11
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #2
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write16bitoffsetreg(i32 noundef, i32 noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i64 @dwt_read32bitoffsetreg(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write32bitoffsetreg(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @dwt_setsniffmode(i32 noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) local_unnamed_addr #0 {
  %.not = icmp eq i32 %0, 0
  br i1 %.not, label %11, label %4

4:                                                ; preds = %3
  %5 = zext i8 %2 to i16
  %6 = shl nuw i16 %5, 8
  %7 = and i8 %1, 15
  %.masked = zext nneg i8 %7 to i16
  %8 = or disjoint i16 %6, %.masked
  tail call void @dwt_write16bitoffsetreg(i32 noundef 29, i32 noundef 0, i16 noundef zeroext %8)
  %9 = tail call i64 @dwt_read32bitoffsetreg(i32 noundef 54, i32 noundef 0)
  %10 = or i64 %9, 16777216
  br label %14

11:                                               ; preds = %3
  tail call void @dwt_write16bitoffsetreg(i32 noundef 29, i32 noundef 0, i16 noundef zeroext 0)
  %12 = tail call i64 @dwt_read32bitoffsetreg(i32 noundef 54, i32 noundef 0)
  %13 = and i64 %12, -16777217
  br label %14

14:                                               ; preds = %11, %4
  %.sink = phi i64 [ %13, %11 ], [ %10, %4 ]
  tail call void @dwt_write32bitoffsetreg(i32 noundef 54, i32 noundef 0, i64 noundef %.sink)
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass