; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-III2/uC-CPU/ARM-Cortex-M3/GNU (cpu_c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @CPU_BitBandClr(i32 noundef %0, i8 noundef zeroext %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i8 %1, ptr %4, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = icmp uge i32 %7, 536870912
  br i1 %8, label %9, label %25

9:                                                ; preds = %2
  %10 = load i32, ptr %3, align 4, !tbaa !5
  %11 = icmp ule i32 %10, 537919487
  br i1 %11, label %12, label %25

12:                                               ; preds = %9
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = sub i32 %13, 536870912
  %15 = mul i32 %14, 32
  %16 = load i8, ptr %4, align 1, !tbaa !9
  %17 = zext i8 %16 to i32
  %18 = mul nsw i32 %17, 4
  %19 = add i32 %15, %18
  store i32 %19, ptr %5, align 4, !tbaa !5
  %20 = load i32, ptr %5, align 4, !tbaa !5
  %21 = add i32 570425344, %20
  store i32 %21, ptr %6, align 4, !tbaa !5
  %22 = load i32, ptr %6, align 4, !tbaa !5
  %23 = zext i32 %22 to i64
  %24 = inttoptr i64 %23 to ptr
  store volatile i32 0, ptr %24, align 4, !tbaa !5
  br label %45

25:                                               ; preds = %9, %2
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = icmp uge i32 %26, 1073741824
  br i1 %27, label %28, label %44

28:                                               ; preds = %25
  %29 = load i32, ptr %3, align 4, !tbaa !5
  %30 = icmp ule i32 %29, 1074790399
  br i1 %30, label %31, label %44

31:                                               ; preds = %28
  %32 = load i32, ptr %3, align 4, !tbaa !5
  %33 = sub i32 %32, 1073741824
  %34 = mul i32 %33, 32
  %35 = load i8, ptr %4, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = mul nsw i32 %36, 4
  %38 = add i32 %34, %37
  store i32 %38, ptr %5, align 4, !tbaa !5
  %39 = load i32, ptr %5, align 4, !tbaa !5
  %40 = add i32 1107296256, %39
  store i32 %40, ptr %6, align 4, !tbaa !5
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = zext i32 %41 to i64
  %43 = inttoptr i64 %42 to ptr
  store volatile i32 0, ptr %43, align 4, !tbaa !5
  br label %44

44:                                               ; preds = %31, %28, %25
  br label %45

45:                                               ; preds = %44, %12
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @CPU_BitBandClr(i32 noundef %0, i8 noundef zeroext %1) local_unnamed_addr #0 {
  %3 = and i32 %0, -1048576
  switch i32 %3, label %12 [
    i32 536870912, label %.sink.split
    i32 1073741824, label %4
  ]

4:                                                ; preds = %2
  br label %.sink.split

.sink.split:                                      ; preds = %2, %4
  %.sink18 = phi i32 [ 1107296256, %4 ], [ 570425344, %2 ]
  %5 = shl i32 %0, 5
  %6 = zext i8 %1 to i32
  %7 = shl nuw nsw i32 %6, 2
  %8 = add nuw nsw i32 %5, %.sink18
  %9 = add nuw nsw i32 %8, %7
  %10 = zext nneg i32 %9 to i64
  %11 = inttoptr i64 %10 to ptr
  store volatile i32 0, ptr %11, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %.sink.split, %2
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass