; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-III2/uC-LIB (lib_mem)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.mem_pool = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, ptr, ptr, i32, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @CPU_SR_Save() #1

declare void @CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @Mem_PoolBlkFree(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %3
  br label %13

13:                                               ; preds = %12
  %14 = call i32 @CPU_SR_Save()
  store i32 %14, ptr %10, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %13
  br label %16

16:                                               ; preds = %15
  br label %17

17:                                               ; preds = %16
  br label %18

18:                                               ; preds = %17
  %19 = load ptr, ptr %4, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.mem_pool, ptr %19, i32 0, i32 9
  %21 = load i32, ptr %20, align 8, !tbaa !11
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = getelementptr inbounds %struct.mem_pool, ptr %22, i32 0, i32 11
  %24 = load i32, ptr %23, align 8, !tbaa !13
  %25 = icmp uge i32 %21, %24
  br i1 %25, label %26, label %35

26:                                               ; preds = %18
  br label %27

27:                                               ; preds = %26
  br label %28

28:                                               ; preds = %27
  %29 = load i32, ptr %10, align 4, !tbaa !9
  call void @CPU_SR_Restore(i32 noundef %29)
  br label %30

30:                                               ; preds = %28
  br label %31

31:                                               ; preds = %30
  br label %32

32:                                               ; preds = %31
  br label %33

33:                                               ; preds = %32
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 10205, ptr %34, align 4, !tbaa !9
  store i32 1, ptr %11, align 4
  br label %104

35:                                               ; preds = %18
  store i8 0, ptr %8, align 1, !tbaa !14
  %36 = load ptr, ptr %4, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.mem_pool, ptr %36, i32 0, i32 9
  %38 = load i32, ptr %37, align 8, !tbaa !11
  store i32 %38, ptr %9, align 4, !tbaa !9
  br label %39

39:                                               ; preds = %58, %35
  %40 = load i32, ptr %9, align 4, !tbaa !9
  %41 = load ptr, ptr %4, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.mem_pool, ptr %41, i32 0, i32 11
  %43 = load i32, ptr %42, align 8, !tbaa !13
  %44 = icmp ult i32 %40, %43
  br i1 %44, label %45, label %61

45:                                               ; preds = %39
  %46 = load ptr, ptr %4, align 8, !tbaa !5
  %47 = getelementptr inbounds %struct.mem_pool, ptr %46, i32 0, i32 8
  %48 = load ptr, ptr %47, align 8, !tbaa !15
  %49 = load i32, ptr %9, align 4, !tbaa !9
  %50 = zext i32 %49 to i64
  %51 = getelementptr inbounds ptr, ptr %48, i64 %50
  %52 = load ptr, ptr %51, align 8, !tbaa !5
  store ptr %52, ptr %7, align 8, !tbaa !5
  %53 = load ptr, ptr %7, align 8, !tbaa !5
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = icmp eq ptr %53, %54
  br i1 %55, label %56, label %57

56:                                               ; preds = %45
  store i8 1, ptr %8, align 1, !tbaa !14
  br label %61

57:                                               ; preds = %45
  br label %58

58:                                               ; preds = %57
  %59 = load i32, ptr %9, align 4, !tbaa !9
  %60 = add i32 %59, 1
  store i32 %60, ptr %9, align 4, !tbaa !9
  br label %39, !llvm.loop !16

61:                                               ; preds = %56, %39
  %62 = load i8, ptr %8, align 1, !tbaa !14
  %63 = zext i8 %62 to i32
  %64 = icmp eq i32 %63, 1
  br i1 %64, label %65, label %81

65:                                               ; preds = %61
  %66 = load ptr, ptr %4, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.mem_pool, ptr %66, i32 0, i32 8
  %68 = load ptr, ptr %67, align 8, !tbaa !15
  %69 = load ptr, ptr %4, align 8, !tbaa !5
  %70 = getelementptr inbounds %struct.mem_pool, ptr %69, i32 0, i32 9
  %71 = load i32, ptr %70, align 8, !tbaa !11
  %72 = zext i32 %71 to i64
  %73 = getelementptr inbounds ptr, ptr %68, i64 %72
  %74 = load ptr, ptr %73, align 8, !tbaa !5
  %75 = load ptr, ptr %4, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.mem_pool, ptr %75, i32 0, i32 8
  %77 = load ptr, ptr %76, align 8, !tbaa !15
  %78 = load i32, ptr %9, align 4, !tbaa !9
  %79 = zext i32 %78 to i64
  %80 = getelementptr inbounds ptr, ptr %77, i64 %79
  store ptr %74, ptr %80, align 8, !tbaa !5
  br label %82

81:                                               ; preds = %61
  br label %82

82:                                               ; preds = %81, %65
  %83 = load ptr, ptr %5, align 8, !tbaa !5
  %84 = load ptr, ptr %4, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.mem_pool, ptr %84, i32 0, i32 8
  %86 = load ptr, ptr %85, align 8, !tbaa !15
  %87 = load ptr, ptr %4, align 8, !tbaa !5
  %88 = getelementptr inbounds %struct.mem_pool, ptr %87, i32 0, i32 9
  %89 = load i32, ptr %88, align 8, !tbaa !11
  %90 = zext i32 %89 to i64
  %91 = getelementptr inbounds ptr, ptr %86, i64 %90
  store ptr %83, ptr %91, align 8, !tbaa !5
  %92 = load ptr, ptr %4, align 8, !tbaa !5
  %93 = getelementptr inbounds %struct.mem_pool, ptr %92, i32 0, i32 9
  %94 = load i32, ptr %93, align 8, !tbaa !11
  %95 = add i32 %94, 1
  store i32 %95, ptr %93, align 8, !tbaa !11
  br label %96

96:                                               ; preds = %82
  br label %97

97:                                               ; preds = %96
  %98 = load i32, ptr %10, align 4, !tbaa !9
  call void @CPU_SR_Restore(i32 noundef %98)
  br label %99

99:                                               ; preds = %97
  br label %100

100:                                              ; preds = %99
  br label %101

101:                                              ; preds = %100
  br label %102

102:                                              ; preds = %101
  %103 = load ptr, ptr %6, align 8, !tbaa !5
  store i32 10000, ptr %103, align 4, !tbaa !9
  store i32 0, ptr %11, align 4
  br label %104

104:                                              ; preds = %102, %33
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  %105 = load i32, ptr %11, align 4
  switch i32 %105, label %107 [
    i32 0, label %106
    i32 1, label %106
  ]

106:                                              ; preds = %104, %104
  ret void

107:                                              ; preds = %104
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 72}
!12 = !{!"mem_pool", !10, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !10, i64 72, !10, i64 76, !10, i64 80, !10, i64 84, !10, i64 88, !6, i64 96, !6, i64 104, !10, i64 112, !10, i64 116}
!13 = !{!12, !10, i64 80}
!14 = !{!7, !7, i64 0}
!15 = !{!12, !6, i64 64}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @CPU_SR_Save() local_unnamed_addr #0

declare void @CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @Mem_PoolBlkFree(ptr nocapture noundef %0, ptr noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #1 {
  %4 = tail call i32 @CPU_SR_Save() #2
  %5 = getelementptr inbounds i8, ptr %0, i64 72
  %6 = load i32, ptr %5, align 8, !tbaa !5
  %7 = getelementptr inbounds i8, ptr %0, i64 80
  %8 = load i32, ptr %7, align 8, !tbaa !11
  %.not = icmp ult i32 %6, %8
  br i1 %.not, label %.preheader, label %24

.preheader:                                       ; preds = %3
  %9 = getelementptr inbounds i8, ptr %0, i64 64
  %10 = load ptr, ptr %9, align 8, !tbaa !12
  %11 = zext i32 %6 to i64
  %wide.trip.count = zext i32 %8 to i64
  br label %13

12:                                               ; preds = %13
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %.critedge, label %13, !llvm.loop !13

13:                                               ; preds = %.preheader, %12
  %indvars.iv = phi i64 [ %11, %.preheader ], [ %indvars.iv.next, %12 ]
  %14 = getelementptr inbounds ptr, ptr %10, i64 %indvars.iv
  %15 = load ptr, ptr %14, align 8, !tbaa !15
  %16 = icmp eq ptr %15, %1
  br i1 %16, label %17, label %12

17:                                               ; preds = %13
  %18 = getelementptr inbounds ptr, ptr %10, i64 %indvars.iv
  %19 = getelementptr inbounds ptr, ptr %10, i64 %11
  %20 = load ptr, ptr %19, align 8, !tbaa !15
  store ptr %20, ptr %18, align 8, !tbaa !15
  %.pre = load ptr, ptr %9, align 8, !tbaa !12
  br label %.critedge

.critedge:                                        ; preds = %12, %17
  %21 = phi ptr [ %.pre, %17 ], [ %10, %12 ]
  %22 = getelementptr inbounds ptr, ptr %21, i64 %11
  store ptr %1, ptr %22, align 8, !tbaa !15
  %23 = add i32 %6, 1
  store i32 %23, ptr %5, align 8, !tbaa !5
  br label %24

24:                                               ; preds = %3, %.critedge
  %storemerge = phi i32 [ 10000, %.critedge ], [ 10205, %3 ]
  tail call void @CPU_SR_Restore(i32 noundef %4) #2
  store i32 %storemerge, ptr %2, align 4, !tbaa !16
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 72}
!6 = !{!"mem_pool", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56, !10, i64 64, !7, i64 72, !7, i64 76, !7, i64 80, !7, i64 84, !7, i64 88, !10, i64 96, !10, i64 104, !7, i64 112, !7, i64 116}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 80}
!12 = !{!6, !10, i64 64}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!10, !10, i64 0}
!16 = !{!7, !7, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass