; LLVM IR from andi611/Hidden-Markov-Model-Digital-Signal-Processing :: src/hmm.ll (ZNK3HMM8test_HMMEPSt6vectorIcSaIcEE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }
%"class.std::allocator.5" = type { i8 }
%class.HMM = type { i8, %"class.std::__cxx11::basic_string", i32, i32, %"class.std::vector", %"class.std::vector.3", %"class.std::vector.3" }
%"class.std::__cxx11::basic_string" = type { %"struct.std::__cxx11::basic_string<char>::_Alloc_hider", i64, %union.anon }
%"struct.std::__cxx11::basic_string<char>::_Alloc_hider" = type { ptr }
%union.anon = type { i64, [8 x i8] }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl" = type { %"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" }
%"struct.std::_Vector_base<std::vector<double>, std::allocator<std::vector<double>>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaISt6vectorIdSaIdEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IdSaIdEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIS_IdSaIdEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_ZNK3HMM8test_HMMEPSt6vectorIcSaIcEE(ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef %1) #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"class.std::vector", align 8
  %7 = alloca double, align 8
  %8 = alloca %"class.std::allocator", align 1
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca %"class.std::allocator.5", align 1
  %12 = alloca i1, align 1
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca double, align 8
  %19 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %20 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %21 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 24) #6
  store i1 true, ptr %12, align 1
  %22 = load ptr, ptr %4, align 8, !tbaa !5
  %23 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %22) #5
  call void @llvm.lifetime.start.p0(i64 24, ptr %6) #5
  %24 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 2
  %25 = load i32, ptr %24, align 8, !tbaa !9
  %26 = sext i32 %25 to i64
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  store double 0.000000e+00, ptr %7, align 8, !tbaa !24
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #5
  call void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #5
  invoke void @_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %26, ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 1 dereferenceable(1) %8)
          to label %27 unwind label %35

27:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #5
  call void @_ZNSaISt6vectorIdSaIdEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %11) #5
  invoke void @_ZNSt6vectorIS_IdSaIdEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23, ptr noundef nonnull align 8 dereferenceable(24) %6, ptr noundef nonnull align 1 dereferenceable(1) %11)
          to label %28 unwind label %39

28:                                               ; preds = %27
  store i1 false, ptr %12, align 1
  call void @_ZNSt15__new_allocatorISt6vectorIdSaIdEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %11) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #5
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %6) #5
  store ptr %21, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 0, ptr %13, align 4, !tbaa !26
  br label %29

29:                                               ; preds = %71, %28
  %30 = load i32, ptr %13, align 4, !tbaa !26
  %31 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 2
  %32 = load i32, ptr %31, align 8, !tbaa !9
  %33 = icmp slt i32 %30, %32
  br i1 %33, label %47, label %34

34:                                               ; preds = %29
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %74

35:                                               ; preds = %2
  %36 = landingpad { ptr, i32 }
          cleanup
  %37 = extractvalue { ptr, i32 } %36, 0
  store ptr %37, ptr %9, align 8
  %38 = extractvalue { ptr, i32 } %36, 1
  store i32 %38, ptr %10, align 4
  br label %43

39:                                               ; preds = %27
  %40 = landingpad { ptr, i32 }
          cleanup
  %41 = extractvalue { ptr, i32 } %40, 0
  store ptr %41, ptr %9, align 8
  %42 = extractvalue { ptr, i32 } %40, 1
  store i32 %42, ptr %10, align 4
  call void @_ZNSt15__new_allocatorISt6vectorIdSaIdEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %11) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #5
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #5
  br label %43

43:                                               ; preds = %39, %35
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %8) #5
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 24, ptr %6) #5
  %44 = load i1, ptr %12, align 1
  br i1 %44, label %45, label %46

45:                                               ; preds = %43
  call void @_ZdlPvm(ptr noundef %21, i64 noundef 24) #7
  br label %46

46:                                               ; preds = %45, %43
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  br label %227

47:                                               ; preds = %29
  %48 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 4
  %49 = load i32, ptr %13, align 4, !tbaa !26
  %50 = sext i32 %49 to i64
  %51 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %48, i64 noundef %50)
  %52 = load double, ptr %51, align 8, !tbaa !24
  %53 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 6
  %54 = load i32, ptr %13, align 4, !tbaa !26
  %55 = sext i32 %54 to i64
  %56 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %53, i64 noundef %55)
  %57 = load ptr, ptr %4, align 8, !tbaa !5
  %58 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %57, i64 noundef 0)
  %59 = load i8, ptr %58, align 1, !tbaa !27
  %60 = sext i8 %59 to i32
  %61 = sub nsw i32 %60, 65
  %62 = sext i32 %61 to i64
  %63 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %56, i64 noundef %62)
  %64 = load double, ptr %63, align 8, !tbaa !24
  %65 = fmul double %52, %64
  %66 = load ptr, ptr %5, align 8, !tbaa !5
  %67 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef 0)
  %68 = load i32, ptr %13, align 4, !tbaa !26
  %69 = sext i32 %68 to i64
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %67, i64 noundef %69)
  store double %65, ptr %70, align 8, !tbaa !24
  br label %71

71:                                               ; preds = %47
  %72 = load i32, ptr %13, align 4, !tbaa !26
  %73 = add nsw i32 %72, 1
  store i32 %73, ptr %13, align 4, !tbaa !26
  br label %29, !llvm.loop !28

74:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #5
  store i32 0, ptr %14, align 4, !tbaa !26
  br label %75

75:                                               ; preds = %185, %74
  %76 = load i32, ptr %14, align 4, !tbaa !26
  %77 = sext i32 %76 to i64
  %78 = load ptr, ptr %4, align 8, !tbaa !5
  %79 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %78) #5
  %80 = sub i64 %79, 1
  %81 = icmp ult i64 %77, %80
  br i1 %81, label %83, label %82

82:                                               ; preds = %75
  store i32 5, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #5
  br label %188

83:                                               ; preds = %75
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #5
  store i32 0, ptr %16, align 4, !tbaa !26
  br label %84

84:                                               ; preds = %181, %83
  %85 = load i32, ptr %16, align 4, !tbaa !26
  %86 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 2
  %87 = load i32, ptr %86, align 8, !tbaa !9
  %88 = icmp slt i32 %85, %87
  br i1 %88, label %90, label %89

89:                                               ; preds = %84
  store i32 8, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #5
  br label %184

90:                                               ; preds = %84
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #5
  store i32 0, ptr %17, align 4, !tbaa !26
  br label %91

91:                                               ; preds = %152, %90
  %92 = load i32, ptr %17, align 4, !tbaa !26
  %93 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 2
  %94 = load i32, ptr %93, align 8, !tbaa !9
  %95 = icmp slt i32 %92, %94
  br i1 %95, label %97, label %96

96:                                               ; preds = %91
  store i32 11, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #5
  br label %155

97:                                               ; preds = %91
  %98 = load ptr, ptr %5, align 8, !tbaa !5
  %99 = load i32, ptr %14, align 4, !tbaa !26
  %100 = add nsw i32 %99, 1
  %101 = sext i32 %100 to i64
  %102 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %98, i64 noundef %101)
  %103 = load i32, ptr %16, align 4, !tbaa !26
  %104 = sext i32 %103 to i64
  %105 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %102, i64 noundef %104)
  %106 = load double, ptr %105, align 8, !tbaa !24
  %107 = load ptr, ptr %5, align 8, !tbaa !5
  %108 = load i32, ptr %14, align 4, !tbaa !26
  %109 = sext i32 %108 to i64
  %110 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %107, i64 noundef %109)
  %111 = load i32, ptr %17, align 4, !tbaa !26
  %112 = sext i32 %111 to i64
  %113 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %110, i64 noundef %112)
  %114 = load double, ptr %113, align 8, !tbaa !24
  %115 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 5
  %116 = load i32, ptr %17, align 4, !tbaa !26
  %117 = sext i32 %116 to i64
  %118 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %115, i64 noundef %117)
  %119 = load i32, ptr %16, align 4, !tbaa !26
  %120 = sext i32 %119 to i64
  %121 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %118, i64 noundef %120)
  %122 = load double, ptr %121, align 8, !tbaa !24
  %123 = fmul double %114, %122
  %124 = fcmp olt double %106, %123
  br i1 %124, label %125, label %151

125:                                              ; preds = %97
  %126 = load ptr, ptr %5, align 8, !tbaa !5
  %127 = load i32, ptr %14, align 4, !tbaa !26
  %128 = sext i32 %127 to i64
  %129 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %126, i64 noundef %128)
  %130 = load i32, ptr %17, align 4, !tbaa !26
  %131 = sext i32 %130 to i64
  %132 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %129, i64 noundef %131)
  %133 = load double, ptr %132, align 8, !tbaa !24
  %134 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 5
  %135 = load i32, ptr %17, align 4, !tbaa !26
  %136 = sext i32 %135 to i64
  %137 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %134, i64 noundef %136)
  %138 = load i32, ptr %16, align 4, !tbaa !26
  %139 = sext i32 %138 to i64
  %140 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %137, i64 noundef %139)
  %141 = load double, ptr %140, align 8, !tbaa !24
  %142 = fmul double %133, %141
  %143 = load ptr, ptr %5, align 8, !tbaa !5
  %144 = load i32, ptr %14, align 4, !tbaa !26
  %145 = add nsw i32 %144, 1
  %146 = sext i32 %145 to i64
  %147 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %143, i64 noundef %146)
  %148 = load i32, ptr %16, align 4, !tbaa !26
  %149 = sext i32 %148 to i64
  %150 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %147, i64 noundef %149)
  store double %142, ptr %150, align 8, !tbaa !24
  br label %151

151:                                              ; preds = %125, %97
  br label %152

152:                                              ; preds = %151
  %153 = load i32, ptr %17, align 4, !tbaa !26
  %154 = add nsw i32 %153, 1
  store i32 %154, ptr %17, align 4, !tbaa !26
  br label %91, !llvm.loop !30

155:                                              ; preds = %96
  %156 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 6
  %157 = load i32, ptr %16, align 4, !tbaa !26
  %158 = sext i32 %157 to i64
  %159 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %156, i64 noundef %158)
  %160 = load ptr, ptr %4, align 8, !tbaa !5
  %161 = load i32, ptr %14, align 4, !tbaa !26
  %162 = add nsw i32 %161, 1
  %163 = sext i32 %162 to i64
  %164 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %160, i64 noundef %163)
  %165 = load i8, ptr %164, align 1, !tbaa !27
  %166 = sext i8 %165 to i32
  %167 = sub nsw i32 %166, 65
  %168 = sext i32 %167 to i64
  %169 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %159, i64 noundef %168)
  %170 = load double, ptr %169, align 8, !tbaa !24
  %171 = load ptr, ptr %5, align 8, !tbaa !5
  %172 = load i32, ptr %14, align 4, !tbaa !26
  %173 = add nsw i32 %172, 1
  %174 = sext i32 %173 to i64
  %175 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %171, i64 noundef %174)
  %176 = load i32, ptr %16, align 4, !tbaa !26
  %177 = sext i32 %176 to i64
  %178 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %175, i64 noundef %177)
  %179 = load double, ptr %178, align 8, !tbaa !24
  %180 = fmul double %179, %170
  store double %180, ptr %178, align 8, !tbaa !24
  br label %181

181:                                              ; preds = %155
  %182 = load i32, ptr %16, align 4, !tbaa !26
  %183 = add nsw i32 %182, 1
  store i32 %183, ptr %16, align 4, !tbaa !26
  br label %84, !llvm.loop !31

184:                                              ; preds = %89
  br label %185

185:                                              ; preds = %184
  %186 = load i32, ptr %14, align 4, !tbaa !26
  %187 = add nsw i32 %186, 1
  store i32 %187, ptr %14, align 4, !tbaa !26
  br label %75, !llvm.loop !32

188:                                              ; preds = %82
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #5
  store double 0.000000e+00, ptr %18, align 8, !tbaa !24
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  store i32 0, ptr %19, align 4, !tbaa !26
  br label %189

189:                                              ; preds = %218, %188
  %190 = load i32, ptr %19, align 4, !tbaa !26
  %191 = getelementptr inbounds %class.HMM, ptr %20, i32 0, i32 2
  %192 = load i32, ptr %191, align 8, !tbaa !9
  %193 = icmp slt i32 %190, %192
  br i1 %193, label %195, label %194

194:                                              ; preds = %189
  store i32 14, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  br label %221

195:                                              ; preds = %189
  %196 = load double, ptr %18, align 8, !tbaa !24
  %197 = load ptr, ptr %5, align 8, !tbaa !5
  %198 = load ptr, ptr %4, align 8, !tbaa !5
  %199 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %198) #5
  %200 = sub i64 %199, 1
  %201 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %197, i64 noundef %200)
  %202 = load i32, ptr %19, align 4, !tbaa !26
  %203 = sext i32 %202 to i64
  %204 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %201, i64 noundef %203)
  %205 = load double, ptr %204, align 8, !tbaa !24
  %206 = fcmp olt double %196, %205
  br i1 %206, label %207, label %217

207:                                              ; preds = %195
  %208 = load ptr, ptr %5, align 8, !tbaa !5
  %209 = load ptr, ptr %4, align 8, !tbaa !5
  %210 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %209) #5
  %211 = sub i64 %210, 1
  %212 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %208, i64 noundef %211)
  %213 = load i32, ptr %19, align 4, !tbaa !26
  %214 = sext i32 %213 to i64
  %215 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %212, i64 noundef %214)
  %216 = load double, ptr %215, align 8, !tbaa !24
  store double %216, ptr %18, align 8, !tbaa !24
  br label %217

217:                                              ; preds = %207, %195
  br label %218

218:                                              ; preds = %217
  %219 = load i32, ptr %19, align 4, !tbaa !26
  %220 = add nsw i32 %219, 1
  store i32 %220, ptr %19, align 4, !tbaa !26
  br label %189, !llvm.loop !33

221:                                              ; preds = %194
  %222 = load ptr, ptr %5, align 8, !tbaa !5
  %223 = icmp eq ptr %222, null
  br i1 %223, label %225, label %224

224:                                              ; preds = %221
  call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %222) #5
  call void @_ZdlPvm(ptr noundef %222, i64 noundef 24) #7
  br label %225

225:                                              ; preds = %224, %221
  %226 = load double, ptr %18, align 8, !tbaa !24
  store i32 1, ptr %15, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  ret double %226

227:                                              ; preds = %46
  %228 = load ptr, ptr %9, align 8
  %229 = load i32, ptr %10, align 4
  %230 = insertvalue { ptr, i32 } poison, ptr %228, 0
  %231 = insertvalue { ptr, i32 } %230, i32 %229, 1
  resume { ptr, i32 } %231
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #4

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorISt6vectorIdSaIdEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { builtin allocsize(0) }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !15, i64 40}
!10 = !{!"_ZTS3HMM", !11, i64 0, !12, i64 8, !15, i64 40, !15, i64 44, !16, i64 48, !20, i64 72, !20, i64 96}
!11 = !{!"bool", !7, i64 0}
!12 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !13, i64 0, !14, i64 8, !7, i64 16}
!13 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !6, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!"_ZTSSt6vectorIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !19, i64 0}
!19 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!20 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !21, i64 0}
!21 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !23, i64 0}
!23 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !6, i64 0, !6, i64 8, !6, i64 16}
!24 = !{!25, !25, i64 0}
!25 = !{!"double", !7, i64 0}
!26 = !{!15, !15, i64 0}
!27 = !{!7, !7, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = distinct !{!30, !29}
!31 = distinct !{!31, !29}
!32 = distinct !{!32, !29}
!33 = distinct !{!33, !29}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::allocator" = type { i8 }
%"class.std::allocator.5" = type { i8 }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSaISt6vectorIdSaIdEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIS_IdSaIdEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef, ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIS_IdSaIdEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef double @_ZNK3HMM8test_HMMEPSt6vectorIcSaIcEE(ptr noundef nonnull align 8 dereferenceable(120) %0, ptr noundef %1) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.std::vector", align 8
  %4 = alloca double, align 8
  %5 = alloca %"class.std::allocator", align 1
  %6 = alloca %"class.std::allocator.5", align 1
  %7 = tail call noalias noundef nonnull dereferenceable(24) ptr @_Znwm(i64 noundef 24) #5
  %8 = tail call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #6
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #6
  %9 = getelementptr inbounds i8, ptr %0, i64 40
  %10 = load i32, ptr %9, align 8, !tbaa !5
  %11 = sext i32 %10 to i64
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #6
  store double 0.000000e+00, ptr %4, align 8, !tbaa !23
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #6
  call void @_ZNSaIdEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #6
  invoke void @_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_(ptr noundef nonnull align 8 dereferenceable(24) %3, i64 noundef %11, ptr noundef nonnull align 8 dereferenceable(8) %4, ptr noundef nonnull align 1 dereferenceable(1) %5)
          to label %12 unwind label %21

12:                                               ; preds = %2
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %6) #6
  call void @_ZNSaISt6vectorIdSaIdEEEC2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #6
  invoke void @_ZNSt6vectorIS_IdSaIdEESaIS1_EEC2EmRKS1_RKS2_(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %8, ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 1 dereferenceable(1) %6)
          to label %13 unwind label %23

13:                                               ; preds = %12
  call void @_ZNSt15__new_allocatorISt6vectorIdSaIdEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #6
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6
  %14 = load i32, ptr %9, align 8, !tbaa !5
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph, label %.preheader62

.lr.ph:                                           ; preds = %13
  %16 = getelementptr inbounds i8, ptr %0, i64 48
  %17 = getelementptr inbounds i8, ptr %0, i64 96
  br label %26

.preheader62:                                     ; preds = %26, %13
  %18 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #6
  %.not = icmp eq i64 %18, 1
  br i1 %.not, label %.preheader, label %.preheader61.lr.ph

.preheader61.lr.ph:                               ; preds = %.preheader62
  %19 = getelementptr inbounds i8, ptr %0, i64 72
  %20 = getelementptr inbounds i8, ptr %0, i64 96
  br label %.preheader61

21:                                               ; preds = %2
  %22 = landingpad { ptr, i32 }
          cleanup
  br label %25

23:                                               ; preds = %12
  %24 = landingpad { ptr, i32 }
          cleanup
  call void @_ZNSt15__new_allocatorISt6vectorIdSaIdEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %6) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %6) #6
  call void @_ZNSt6vectorIdSaIdEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %3) #6
  br label %25

25:                                               ; preds = %23, %21
  %.pn = phi { ptr, i32 } [ %24, %23 ], [ %22, %21 ]
  call void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1) %5) #6
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #6
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #6
  call void @_ZdlPvm(ptr noundef nonnull %7, i64 noundef 24) #7
  resume { ptr, i32 } %.pn

26:                                               ; preds = %.lr.ph, %26
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %26 ]
  %27 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %indvars.iv)
  %28 = load double, ptr %27, align 8, !tbaa !23
  %29 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %17, i64 noundef %indvars.iv)
  %30 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef 0)
  %31 = load i8, ptr %30, align 1, !tbaa !25
  %32 = sext i8 %31 to i64
  %33 = add nsw i64 %32, -65
  %34 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %29, i64 noundef %33)
  %35 = load double, ptr %34, align 8, !tbaa !23
  %36 = fmul double %28, %35
  %37 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef 0)
  %38 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %37, i64 noundef %indvars.iv)
  store double %36, ptr %38, align 8, !tbaa !23
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %39 = load i32, ptr %9, align 8, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = icmp slt i64 %indvars.iv.next, %40
  br i1 %41, label %26, label %.preheader62, !llvm.loop !26

.preheader61:                                     ; preds = %.preheader61.lr.ph, %._crit_edge67
  %indvars.iv80 = phi i64 [ 0, %.preheader61.lr.ph ], [ %44, %._crit_edge67 ]
  %42 = load i32, ptr %9, align 8, !tbaa !5
  %43 = icmp sgt i32 %42, 0
  %44 = add nuw nsw i64 %indvars.iv80, 1
  br i1 %43, label %.preheader60, label %._crit_edge67

.preheader:                                       ; preds = %._crit_edge67, %.preheader62
  %45 = load i32, ptr %9, align 8, !tbaa !5
  %46 = icmp sgt i32 %45, 0
  br i1 %46, label %.lr.ph71, label %._crit_edge72

.preheader60:                                     ; preds = %.preheader61, %._crit_edge
  %47 = phi i32 [ %63, %._crit_edge ], [ %42, %.preheader61 ]
  %indvars.iv77 = phi i64 [ %indvars.iv.next78, %._crit_edge ], [ 0, %.preheader61 ]
  %48 = icmp sgt i32 %47, 0
  br i1 %48, label %.lr.ph65, label %._crit_edge

._crit_edge67:                                    ; preds = %._crit_edge, %.preheader61
  %49 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #6
  %50 = add i64 %49, -1
  %51 = icmp ugt i64 %50, %44
  br i1 %51, label %.preheader61, label %.preheader, !llvm.loop !28

._crit_edge:                                      ; preds = %87, %.preheader60
  %52 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %20, i64 noundef %indvars.iv77)
  %53 = call noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %1, i64 noundef %44)
  %54 = load i8, ptr %53, align 1, !tbaa !25
  %55 = sext i8 %54 to i64
  %56 = add nsw i64 %55, -65
  %57 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %52, i64 noundef %56)
  %58 = load double, ptr %57, align 8, !tbaa !23
  %59 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %44)
  %60 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %59, i64 noundef %indvars.iv77)
  %61 = load double, ptr %60, align 8, !tbaa !23
  %62 = fmul double %58, %61
  store double %62, ptr %60, align 8, !tbaa !23
  %indvars.iv.next78 = add nuw nsw i64 %indvars.iv77, 1
  %63 = load i32, ptr %9, align 8, !tbaa !5
  %64 = sext i32 %63 to i64
  %65 = icmp slt i64 %indvars.iv.next78, %64
  br i1 %65, label %.preheader60, label %._crit_edge67, !llvm.loop !29

.lr.ph65:                                         ; preds = %.preheader60, %87
  %indvars.iv74 = phi i64 [ %indvars.iv.next75, %87 ], [ 0, %.preheader60 ]
  %66 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %44)
  %67 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %66, i64 noundef %indvars.iv77)
  %68 = load double, ptr %67, align 8, !tbaa !23
  %69 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv80)
  %70 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %69, i64 noundef %indvars.iv74)
  %71 = load double, ptr %70, align 8, !tbaa !23
  %72 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %indvars.iv74)
  %73 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %72, i64 noundef %indvars.iv77)
  %74 = load double, ptr %73, align 8, !tbaa !23
  %75 = fmul double %71, %74
  %76 = fcmp olt double %68, %75
  br i1 %76, label %77, label %87

77:                                               ; preds = %.lr.ph65
  %78 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %indvars.iv80)
  %79 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %78, i64 noundef %indvars.iv74)
  %80 = load double, ptr %79, align 8, !tbaa !23
  %81 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %19, i64 noundef %indvars.iv74)
  %82 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %81, i64 noundef %indvars.iv77)
  %83 = load double, ptr %82, align 8, !tbaa !23
  %84 = fmul double %80, %83
  %85 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %44)
  %86 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %85, i64 noundef %indvars.iv77)
  store double %84, ptr %86, align 8, !tbaa !23
  br label %87

87:                                               ; preds = %.lr.ph65, %77
  %indvars.iv.next75 = add nuw nsw i64 %indvars.iv74, 1
  %88 = load i32, ptr %9, align 8, !tbaa !5
  %89 = sext i32 %88 to i64
  %90 = icmp slt i64 %indvars.iv.next75, %89
  br i1 %90, label %.lr.ph65, label %._crit_edge, !llvm.loop !30

.lr.ph71:                                         ; preds = %.preheader, %103
  %indvars.iv83 = phi i64 [ %indvars.iv.next84, %103 ], [ 0, %.preheader ]
  %.05169 = phi double [ %.1, %103 ], [ 0.000000e+00, %.preheader ]
  %91 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #6
  %92 = add i64 %91, -1
  %93 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %92)
  %94 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %indvars.iv83)
  %95 = load double, ptr %94, align 8, !tbaa !23
  %96 = fcmp olt double %.05169, %95
  br i1 %96, label %97, label %103

97:                                               ; preds = %.lr.ph71
  %98 = call noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %1) #6
  %99 = add i64 %98, -1
  %100 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %7, i64 noundef %99)
  %101 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %indvars.iv83)
  %102 = load double, ptr %101, align 8, !tbaa !23
  br label %103

103:                                              ; preds = %.lr.ph71, %97
  %.1 = phi double [ %102, %97 ], [ %.05169, %.lr.ph71 ]
  %indvars.iv.next84 = add nuw nsw i64 %indvars.iv83, 1
  %104 = load i32, ptr %9, align 8, !tbaa !5
  %105 = sext i32 %104 to i64
  %106 = icmp slt i64 %indvars.iv.next84, %105
  br i1 %106, label %.lr.ph71, label %._crit_edge72, !llvm.loop !31

._crit_edge72:                                    ; preds = %103, %.preheader
  %.051.lcssa = phi double [ 0.000000e+00, %.preheader ], [ %.1, %103 ]
  call void @_ZNSt6vectorIS_IdSaIdEESaIS1_EED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %7) #6
  call void @_ZdlPvm(ptr noundef nonnull %7, i64 noundef 24) #7
  ret double %.051.lcssa
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIcSaIcEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #4

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNKSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNKSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 1 dereferenceable(1) ptr @_ZNSt6vectorIcSaIcEE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorIS_IdSaIdEESaIS1_EE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNSt6vectorIdSaIdEE2atEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorIdED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt15__new_allocatorISt6vectorIdSaIdEEED2Ev(ptr noundef nonnull align 1 dereferenceable(1)) unnamed_addr #1 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { builtin allocsize(0) }
attributes #6 = { nounwind }
attributes #7 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !14, i64 40}
!6 = !{!"_ZTS3HMM", !7, i64 0, !10, i64 8, !14, i64 40, !14, i64 44, !15, i64 48, !19, i64 72, !19, i64 96}
!7 = !{!"bool", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE", !11, i64 0, !13, i64 8, !8, i64 16}
!11 = !{!"_ZTSNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderE", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!"_ZTSSt6vectorIdSaIdEE", !16, i64 0}
!16 = !{!"_ZTSSt12_Vector_baseIdSaIdEE", !17, i64 0}
!17 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE12_Vector_implE", !18, i64 0}
!18 = !{!"_ZTSNSt12_Vector_baseIdSaIdEE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!19 = !{!"_ZTSSt6vectorIS_IdSaIdEESaIS1_EE", !20, i64 0}
!20 = !{!"_ZTSSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE", !21, i64 0}
!21 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE12_Vector_implE", !22, i64 0}
!22 = !{!"_ZTSNSt12_Vector_baseISt6vectorIdSaIdEESaIS2_EE17_Vector_impl_dataE", !12, i64 0, !12, i64 8, !12, i64 16}
!23 = !{!24, !24, i64 0}
!24 = !{!"double", !8, i64 0}
!25 = !{!8, !8, i64 0}
!26 = distinct !{!26, !27}
!27 = !{!"llvm.loop.mustprogress"}
!28 = distinct !{!28, !27}
!29 = distinct !{!29, !27}
!30 = distinct !{!30, !27}
!31 = distinct !{!31, !27}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass