; LLVM IR from ADJA/algos :: Graphs/Dinic.ll (Z5dinicv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pt = external dso_local global [1050 x i32], align 16
@flow = external dso_local global i64, align 8
@lim = external dso_local global i32, align 4
@s = external dso_local global i32, align 4
@t = external dso_local global i32, align 4

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef, i32 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5dinicv() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  store i32 1073741824, ptr @lim, align 4, !tbaa !5
  br label %3

3:                                                ; preds = %36, %8, %0
  %4 = load i32, ptr @lim, align 4, !tbaa !5
  %5 = icmp sge i32 %4, 1
  br i1 %5, label %6, label %37

6:                                                ; preds = %3
  %7 = call noundef zeroext i1 @_Z3bfsv()
  br i1 %7, label %11, label %8

8:                                                ; preds = %6
  %9 = load i32, ptr @lim, align 4, !tbaa !5
  %10 = ashr i32 %9, 1
  store i32 %10, ptr @lim, align 4, !tbaa !5
  br label %3, !llvm.loop !9

11:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  %12 = load i32, ptr @s, align 4, !tbaa !5
  store i32 %12, ptr %1, align 4, !tbaa !5
  br label %13

13:                                               ; preds = %22, %11
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = load i32, ptr @t, align 4, !tbaa !5
  %16 = icmp sle i32 %14, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %25

18:                                               ; preds = %13
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = getelementptr inbounds [1050 x i32], ptr @pt, i64 0, i64 %20
  store i32 0, ptr %21, align 4, !tbaa !5
  br label %22

22:                                               ; preds = %18
  %23 = load i32, ptr %1, align 4, !tbaa !5
  %24 = add nsw i32 %23, 1
  store i32 %24, ptr %1, align 4, !tbaa !5
  br label %13, !llvm.loop !11

25:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  br label %26

26:                                               ; preds = %31, %25
  %27 = load i32, ptr @s, align 4, !tbaa !5
  %28 = load i32, ptr @lim, align 4, !tbaa !5
  %29 = call noundef zeroext i1 @_Z3dfsii(i32 noundef %27, i32 noundef %28)
  %30 = zext i1 %29 to i32
  store i32 %30, ptr %2, align 4, !tbaa !5
  br i1 %29, label %31, label %36

31:                                               ; preds = %26
  %32 = load i64, ptr @flow, align 8, !tbaa !12
  %33 = load i32, ptr @lim, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = add nsw i64 %32, %34
  store i64 %35, ptr @flow, align 8, !tbaa !12
  br label %26, !llvm.loop !14

36:                                               ; preds = %26
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #2
  br label %3, !llvm.loop !9

37:                                               ; preds = %3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = !{!13, !13, i64 0}
!13 = !{!"long long", !7, i64 0}
!14 = distinct !{!14, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pt = external dso_local local_unnamed_addr global [1050 x i32], align 16
@flow = external dso_local local_unnamed_addr global i64, align 8
@lim = external dso_local local_unnamed_addr global i32, align 4
@s = external dso_local local_unnamed_addr global i32, align 4
@t = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3bfsv() local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5dinicv() local_unnamed_addr #0 {
  store i32 1073741824, ptr @lim, align 4, !tbaa !5
  br label %1

thread-pre-split:                                 ; preds = %.lr.ph5, %.preheader
  %.pr = load i32, ptr @lim, align 4, !tbaa !5
  br label %.backedge

1:                                                ; preds = %0, %.backedge
  %2 = tail call noundef zeroext i1 @_Z3bfsv()
  br i1 %2, label %7, label %3

3:                                                ; preds = %1
  %4 = load i32, ptr @lim, align 4, !tbaa !5
  %5 = ashr i32 %4, 1
  store i32 %5, ptr @lim, align 4, !tbaa !5
  br label %.backedge

.backedge:                                        ; preds = %3, %thread-pre-split
  %.be = phi i32 [ %.pr, %thread-pre-split ], [ %5, %3 ]
  %6 = icmp sgt i32 %.be, 0
  br i1 %6, label %1, label %24, !llvm.loop !9

7:                                                ; preds = %1
  %8 = load i32, ptr @s, align 4, !tbaa !5
  %9 = load i32, ptr @t, align 4, !tbaa !5
  %.not3 = icmp sgt i32 %8, %9
  br i1 %.not3, label %.preheader, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %7
  %10 = sext i32 %8 to i64
  %11 = shl nsw i64 %10, 2
  %scevgep = getelementptr i8, ptr @pt, i64 %11
  %12 = sub i32 %9, %8
  %13 = zext i32 %12 to i64
  %14 = shl nuw nsw i64 %13, 2
  %15 = add nuw nsw i64 %14, 4
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(1) %scevgep, i8 0, i64 %15, i1 false), !tbaa !5
  br label %.preheader

.preheader:                                       ; preds = %.lr.ph.preheader, %7
  %16 = load i32, ptr @lim, align 4, !tbaa !5
  %17 = tail call noundef zeroext i1 @_Z3dfsii(i32 noundef %8, i32 noundef %16)
  br i1 %17, label %.lr.ph5, label %thread-pre-split, !llvm.loop !9

.lr.ph5:                                          ; preds = %.preheader, %.lr.ph5
  %18 = load i64, ptr @flow, align 8, !tbaa !11
  %19 = load i32, ptr @lim, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %21 = add nsw i64 %18, %20
  store i64 %21, ptr @flow, align 8, !tbaa !11
  %22 = load i32, ptr @s, align 4, !tbaa !5
  %23 = tail call noundef zeroext i1 @_Z3dfsii(i32 noundef %22, i32 noundef %19)
  br i1 %23, label %.lr.ph5, label %thread-pre-split, !llvm.loop !13

24:                                               ; preds = %.backedge
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = distinct !{!13, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass