; LLVM IR from cvra/robot-software :: uwb-beacon-firmware/src/decadriver (deca_device)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.dwt_local_data_t = type { i64, i64, i8, i8, i64, i8, i8, i64, i16, i8, %struct.dwt_cb_data_t, ptr, ptr, ptr, ptr }
%struct.dwt_cb_data_t = type { i64, i16, [2 x i8], i8 }

@pdw1000local = external hidden global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write8bitoffsetreg(i32 noundef, i32 noundef, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @dwt_read16bitoffsetreg(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @dwt_starttx(i8 noundef zeroext %0) #1 {
  %2 = alloca i8, align 1
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  %5 = alloca i16, align 2
  store i8 %0, ptr %2, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !8
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  store i8 0, ptr %4, align 1, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #2
  store i16 0, ptr %5, align 2, !tbaa !10
  %6 = load i8, ptr %2, align 1, !tbaa !5
  %7 = zext i8 %6 to i32
  %8 = and i32 %7, 2
  %9 = icmp ne i32 %8, 0
  br i1 %9, label %10, label %14

10:                                               ; preds = %1
  store i8 -128, ptr %4, align 1, !tbaa !5
  %11 = load i8, ptr %4, align 1, !tbaa !5
  call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext %11)
  %12 = load ptr, ptr @pdw1000local, align 8, !tbaa !12
  %13 = getelementptr inbounds %struct.dwt_local_data_t, ptr %12, i32 0, i32 9
  store i8 1, ptr %13, align 2, !tbaa !14
  br label %14

14:                                               ; preds = %10, %1
  %15 = load i8, ptr %2, align 1, !tbaa !5
  %16 = zext i8 %15 to i32
  %17 = and i32 %16, 1
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %36

19:                                               ; preds = %14
  %20 = load i8, ptr %4, align 1, !tbaa !5
  %21 = zext i8 %20 to i32
  %22 = or i32 %21, 6
  %23 = trunc i32 %22 to i8
  store i8 %23, ptr %4, align 1, !tbaa !5
  %24 = load i8, ptr %4, align 1, !tbaa !5
  call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext %24)
  %25 = call zeroext i16 @dwt_read16bitoffsetreg(i32 noundef 15, i32 noundef 3)
  store i16 %25, ptr %5, align 2, !tbaa !10
  %26 = load i16, ptr %5, align 2, !tbaa !10
  %27 = zext i16 %26 to i32
  %28 = and i32 %27, 1032
  %29 = icmp eq i32 %28, 0
  br i1 %29, label %30, label %31

30:                                               ; preds = %19
  store i32 0, ptr %3, align 4, !tbaa !8
  br label %35

31:                                               ; preds = %19
  store i8 64, ptr %4, align 1, !tbaa !5
  %32 = load i8, ptr %4, align 1, !tbaa !5
  call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext %32)
  %33 = load ptr, ptr @pdw1000local, align 8, !tbaa !12
  %34 = getelementptr inbounds %struct.dwt_local_data_t, ptr %33, i32 0, i32 9
  store i8 0, ptr %34, align 2, !tbaa !14
  store i32 -1, ptr %3, align 4, !tbaa !8
  br label %35

35:                                               ; preds = %31, %30
  br label %42

36:                                               ; preds = %14
  %37 = load i8, ptr %4, align 1, !tbaa !5
  %38 = zext i8 %37 to i32
  %39 = or i32 %38, 2
  %40 = trunc i32 %39 to i8
  store i8 %40, ptr %4, align 1, !tbaa !5
  %41 = load i8, ptr %4, align 1, !tbaa !5
  call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext %41)
  br label %42

42:                                               ; preds = %36, %35
  %43 = load i32, ptr %3, align 4, !tbaa !8
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  ret i32 %43
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !6, i64 0}
!14 = !{!15, !6, i64 50}
!15 = !{!"", !16, i64 0, !16, i64 8, !6, i64 16, !6, i64 17, !16, i64 24, !6, i64 32, !6, i64 33, !16, i64 40, !11, i64 48, !6, i64 50, !17, i64 56, !13, i64 72, !13, i64 80, !13, i64 88, !13, i64 96}
!16 = !{!"long", !6, i64 0}
!17 = !{!"", !16, i64 0, !11, i64 8, !6, i64 10, !6, i64 12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@pdw1000local = external hidden local_unnamed_addr global ptr, align 8

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_write8bitoffsetreg(i32 noundef, i32 noundef, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i16 @dwt_read16bitoffsetreg(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 -1, 1) i32 @dwt_starttx(i8 noundef zeroext %0) local_unnamed_addr #0 {
  %2 = zext i8 %0 to i32
  %3 = and i32 %2, 2
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %7, label %4

4:                                                ; preds = %1
  tail call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext -128)
  %5 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %6 = getelementptr inbounds i8, ptr %5, i64 50
  store i8 1, ptr %6, align 2, !tbaa !9
  br label %7

7:                                                ; preds = %4, %1
  %.0 = phi i8 [ -128, %4 ], [ 0, %1 ]
  %8 = and i32 %2, 1
  %.not11 = icmp eq i32 %8, 0
  br i1 %.not11, label %17, label %9

9:                                                ; preds = %7
  %10 = or disjoint i8 %.0, 6
  tail call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext %10)
  %11 = tail call zeroext i16 @dwt_read16bitoffsetreg(i32 noundef 15, i32 noundef 3)
  %12 = and i16 %11, 1032
  %13 = icmp eq i16 %12, 0
  br i1 %13, label %19, label %14

14:                                               ; preds = %9
  tail call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext 64)
  %15 = load ptr, ptr @pdw1000local, align 8, !tbaa !5
  %16 = getelementptr inbounds i8, ptr %15, i64 50
  store i8 0, ptr %16, align 2, !tbaa !9
  br label %19

17:                                               ; preds = %7
  %18 = or disjoint i8 %.0, 2
  tail call void @dwt_write8bitoffsetreg(i32 noundef 13, i32 noundef 0, i8 noundef zeroext %18)
  br label %19

19:                                               ; preds = %9, %14, %17
  %.010 = phi i32 [ -1, %14 ], [ 0, %17 ], [ 0, %9 ]
  ret i32 %.010
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 50}
!10 = !{!"", !11, i64 0, !11, i64 8, !7, i64 16, !7, i64 17, !11, i64 24, !7, i64 32, !7, i64 33, !11, i64 40, !12, i64 48, !7, i64 50, !13, i64 56, !6, i64 72, !6, i64 80, !6, i64 88, !6, i64 96}
!11 = !{!"long", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!"", !11, i64 0, !12, i64 8, !7, i64 10, !7, i64 12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass