; LLVM IR from ADJA/algos :: DataStructures/CartesianTreeImplicitKeys.ll (Z5splitP4nodeRS0_S1_ii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32, i32, i32, i32, i8, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7getsizeP4node(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6updateP4node(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4pushP4node(ptr noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5splitP4nodeRS0_S1_ii(ptr noundef %0, ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 8 dereferenceable(8) %2, i32 noundef %3, i32 noundef %4) #1 {
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  store ptr %1, ptr %7, align 8, !tbaa !5
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  store i32 %4, ptr %10, align 4, !tbaa !9
  %12 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_Z4pushP4node(ptr noundef %12)
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = icmp eq ptr %13, null
  br i1 %14, label %15, label %18

15:                                               ; preds = %5
  %16 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr null, ptr %16, align 8, !tbaa !5
  %17 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr null, ptr %17, align 8, !tbaa !5
  br label %59

18:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.node, ptr %19, i32 0, i32 5
  %21 = load ptr, ptr %20, align 8, !tbaa !11
  %22 = call noundef i32 @_Z7getsizeP4node(ptr noundef %21)
  %23 = add nsw i32 %22, 1
  %24 = load i32, ptr %10, align 4, !tbaa !9
  %25 = add nsw i32 %23, %24
  store i32 %25, ptr %11, align 4, !tbaa !9
  %26 = load i32, ptr %9, align 4, !tbaa !9
  %27 = load i32, ptr %11, align 4, !tbaa !9
  %28 = icmp sle i32 %26, %27
  br i1 %28, label %29, label %40

29:                                               ; preds = %18
  %30 = load ptr, ptr %6, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.node, ptr %30, i32 0, i32 5
  %32 = load ptr, ptr %31, align 8, !tbaa !11
  %33 = load ptr, ptr %7, align 8, !tbaa !5
  %34 = load ptr, ptr %6, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.node, ptr %34, i32 0, i32 5
  %36 = load i32, ptr %9, align 4, !tbaa !9
  %37 = load i32, ptr %10, align 4, !tbaa !9
  call void @_Z5splitP4nodeRS0_S1_ii(ptr noundef %32, ptr noundef nonnull align 8 dereferenceable(8) %33, ptr noundef nonnull align 8 dereferenceable(8) %35, i32 noundef %36, i32 noundef %37)
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %38, ptr %39, align 8, !tbaa !5
  br label %57

40:                                               ; preds = %18
  %41 = load ptr, ptr %6, align 8, !tbaa !5
  %42 = getelementptr inbounds %struct.node, ptr %41, i32 0, i32 6
  %43 = load ptr, ptr %42, align 8, !tbaa !14
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = getelementptr inbounds %struct.node, ptr %44, i32 0, i32 6
  %46 = load ptr, ptr %8, align 8, !tbaa !5
  %47 = load i32, ptr %9, align 4, !tbaa !9
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.node, ptr %49, i32 0, i32 5
  %51 = load ptr, ptr %50, align 8, !tbaa !11
  %52 = call noundef i32 @_Z7getsizeP4node(ptr noundef %51)
  %53 = add nsw i32 %48, %52
  %54 = add nsw i32 %53, 1
  call void @_Z5splitP4nodeRS0_S1_ii(ptr noundef %43, ptr noundef nonnull align 8 dereferenceable(8) %45, ptr noundef nonnull align 8 dereferenceable(8) %46, i32 noundef %47, i32 noundef %54)
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = load ptr, ptr %7, align 8, !tbaa !5
  store ptr %55, ptr %56, align 8, !tbaa !5
  br label %57

57:                                               ; preds = %40, %29
  %58 = load ptr, ptr %6, align 8, !tbaa !5
  call void @_Z6updateP4node(ptr noundef %58)
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %59

59:                                               ; preds = %57, %15
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 24}
!12 = !{!"_ZTS4node", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !13, i64 16, !6, i64 24, !6, i64 32}
!13 = !{!"bool", !7, i64 0}
!14 = !{!12, !6, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z7getsizeP4node(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z6updateP4node(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z4pushP4node(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5splitP4nodeRS0_S1_ii(ptr noundef %0, ptr nocapture noundef nonnull writeonly align 8 dereferenceable(8) %1, ptr nocapture noundef nonnull writeonly align 8 dereferenceable(8) %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #1 {
  tail call void @_Z4pushP4node(ptr noundef %0)
  %6 = icmp eq ptr %0, null
  br i1 %6, label %7, label %8

7:                                                ; preds = %5
  store ptr null, ptr %2, align 8, !tbaa !5
  store ptr null, ptr %1, align 8, !tbaa !5
  br label %23

8:                                                ; preds = %5
  %9 = getelementptr inbounds i8, ptr %0, i64 24
  %10 = load ptr, ptr %9, align 8, !tbaa !9
  %11 = tail call noundef i32 @_Z7getsizeP4node(ptr noundef %10)
  %12 = add i32 %4, 1
  %13 = add i32 %12, %11
  %.not = icmp slt i32 %13, %3
  br i1 %.not, label %16, label %14

14:                                               ; preds = %8
  %15 = load ptr, ptr %9, align 8, !tbaa !9
  tail call void @_Z5splitP4nodeRS0_S1_ii(ptr noundef %15, ptr noundef nonnull align 8 dereferenceable(8) %1, ptr noundef nonnull align 8 dereferenceable(8) %9, i32 noundef %3, i32 noundef %4)
  br label %22

16:                                               ; preds = %8
  %17 = getelementptr inbounds i8, ptr %0, i64 32
  %18 = load ptr, ptr %17, align 8, !tbaa !13
  %19 = load ptr, ptr %9, align 8, !tbaa !9
  %20 = tail call noundef i32 @_Z7getsizeP4node(ptr noundef %19)
  %21 = add i32 %12, %20
  tail call void @_Z5splitP4nodeRS0_S1_ii(ptr noundef %18, ptr noundef nonnull align 8 dereferenceable(8) %17, ptr noundef nonnull align 8 dereferenceable(8) %2, i32 noundef %3, i32 noundef %21)
  br label %22

22:                                               ; preds = %16, %14
  %.sink = phi ptr [ %1, %16 ], [ %2, %14 ]
  store ptr %0, ptr %.sink, align 8, !tbaa !5
  tail call void @_Z6updateP4node(ptr noundef nonnull %0)
  br label %23

23:                                               ; preds = %22, %7
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 24}
!10 = !{!"_ZTS4node", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !12, i64 16, !6, i64 24, !6, i64 32}
!11 = !{!"int", !7, i64 0}
!12 = !{!"bool", !7, i64 0}
!13 = !{!10, !6, i64 32}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass