; LLVM IR from MRPT/mrpt :: 3rdparty/xspublic/xstypes (xsdeviceid)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XsDeviceId = type { i64, [24 x i8], i16, i32 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @XsDeviceId_isLegacyDeviceId(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind willreturn memory(read)
declare i32 @strcmp(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @XsDeviceId_deviceType(ptr noundef, i32 noundef, ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @XsDeviceId_contains(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %struct.XsDeviceId, align 8
  %7 = alloca %struct.XsDeviceId, align 8
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %5, align 8, !tbaa !5
  %11 = icmp eq ptr %9, %10
  br i1 %11, label %12, label %13

12:                                               ; preds = %2
  store i32 1, ptr %3, align 4
  br label %53

13:                                               ; preds = %2
  %14 = load ptr, ptr %4, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.XsDeviceId, ptr %14, i32 0, i32 0
  %16 = load i64, ptr %15, align 8, !tbaa !9
  %17 = load ptr, ptr %5, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.XsDeviceId, ptr %17, i32 0, i32 0
  %19 = load i64, ptr %18, align 8, !tbaa !9
  %20 = icmp eq i64 %16, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %13
  store i32 1, ptr %3, align 4
  br label %53

22:                                               ; preds = %13
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.XsDeviceId, ptr %23, i32 0, i32 0
  %25 = load i64, ptr %24, align 8, !tbaa !9
  %26 = and i64 %25, 65535
  %27 = icmp ne i64 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %22
  store i32 0, ptr %3, align 4
  br label %53

29:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 40, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 40, ptr %7) #3
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  call void @XsDeviceId_deviceType(ptr noundef %30, i32 noundef 1, ptr noundef %6)
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  call void @XsDeviceId_deviceType(ptr noundef %31, i32 noundef 1, ptr noundef %7)
  %32 = load ptr, ptr %4, align 8, !tbaa !5
  %33 = call i32 @XsDeviceId_isLegacyDeviceId(ptr noundef %32)
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %42

35:                                               ; preds = %29
  %36 = getelementptr inbounds %struct.XsDeviceId, ptr %6, i32 0, i32 0
  %37 = load i64, ptr %36, align 8, !tbaa !9
  %38 = getelementptr inbounds %struct.XsDeviceId, ptr %7, i32 0, i32 0
  %39 = load i64, ptr %38, align 8, !tbaa !9
  %40 = icmp eq i64 %37, %39
  %41 = zext i1 %40 to i32
  store i32 %41, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %52

42:                                               ; preds = %29
  %43 = getelementptr inbounds %struct.XsDeviceId, ptr %6, i32 0, i32 1
  %44 = getelementptr inbounds [24 x i8], ptr %43, i64 0, i64 0
  %45 = getelementptr inbounds %struct.XsDeviceId, ptr %7, i32 0, i32 1
  %46 = getelementptr inbounds [24 x i8], ptr %45, i64 0, i64 0
  %47 = call i32 @strcmp(ptr noundef %44, ptr noundef %46) #4
  %48 = icmp eq i32 %47, 0
  br i1 %48, label %49, label %50

49:                                               ; preds = %42
  store i32 1, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %52

50:                                               ; preds = %42
  br label %51

51:                                               ; preds = %50
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %52

52:                                               ; preds = %51, %49, %35
  call void @llvm.lifetime.end.p0(i64 40, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr %6) #3
  br label %53

53:                                               ; preds = %52, %28, %21, %12
  %54 = load i32, ptr %3, align 4
  ret i32 %54
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"XsDeviceId", !11, i64 0, !7, i64 8, !12, i64 32, !13, i64 36}
!11 = !{!"long", !7, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.XsDeviceId = type { i64, [24 x i8], i16, i32 }

; Function Attrs: nounwind uwtable
declare dso_local i32 @XsDeviceId_isLegacyDeviceId(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @XsDeviceId_deviceType(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2) i32 @XsDeviceId_contains(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = alloca %struct.XsDeviceId, align 8
  %4 = alloca %struct.XsDeviceId, align 8
  %5 = icmp eq ptr %0, %1
  br i1 %5, label %24, label %6

6:                                                ; preds = %2
  %7 = load i64, ptr %0, align 8, !tbaa !5
  %8 = load i64, ptr %1, align 8, !tbaa !5
  %9 = icmp eq i64 %7, %8
  br i1 %9, label %24, label %10

10:                                               ; preds = %6
  %11 = and i64 %7, 65535
  %.not = icmp eq i64 %11, 0
  br i1 %.not, label %12, label %24

12:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %3) #3
  call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %4) #3
  call void @XsDeviceId_deviceType(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull %3)
  call void @XsDeviceId_deviceType(ptr noundef nonnull %1, i32 noundef 1, ptr noundef nonnull %4)
  %13 = call i32 @XsDeviceId_isLegacyDeviceId(ptr noundef nonnull %0)
  %.not11 = icmp eq i32 %13, 0
  br i1 %.not11, label %18, label %14

14:                                               ; preds = %12
  %15 = load i64, ptr %3, align 8, !tbaa !5
  %16 = load i64, ptr %4, align 8, !tbaa !5
  %17 = icmp eq i64 %15, %16
  br label %23

18:                                               ; preds = %12
  %19 = getelementptr inbounds i8, ptr %3, i64 8
  %20 = getelementptr inbounds i8, ptr %4, i64 8
  %21 = call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %19, ptr noundef nonnull dereferenceable(1) %20) #4
  %22 = icmp eq i32 %21, 0
  br label %23

23:                                               ; preds = %18, %14
  %.0.in = phi i1 [ %17, %14 ], [ %22, %18 ]
  %.0 = zext i1 %.0.in to i32
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %3) #3
  br label %24

24:                                               ; preds = %10, %6, %2, %23
  %.1 = phi i32 [ %.0, %23 ], [ 1, %2 ], [ 1, %6 ], [ 0, %10 ]
  ret i32 %.1
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"XsDeviceId", !7, i64 0, !8, i64 8, !10, i64 32, !11, i64 36}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"short", !8, i64 0}
!11 = !{!"int", !8, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass