; LLVM IR from humz2k/sugaryc :: ext/bdwgc (mach_dep)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ucontext_t = type { i64, ptr, %struct.stack_t, %struct.mcontext_t, %struct.__sigset_t, %struct._libc_fpstate, [4 x i64] }
%struct.stack_t = type { ptr, i32, i64 }
%struct.mcontext_t = type { [23 x i64], ptr, [8 x i64] }
%struct.__sigset_t = type { [16 x i64] }
%struct._libc_fpstate = type { i16, i16, i16, i16, i64, i64, i32, i32, [8 x %struct._libc_fpxreg], [16 x %struct._libc_xmmreg], [24 x i32] }
%struct._libc_fpxreg = type { [4 x i16], i16, [3 x i16] }
%struct._libc_xmmreg = type { [4 x i32] }

@GC_with_callee_saves_pushed.getcontext_works = external hidden global i8, align 1
@GC_current_warn_proc = external global ptr, align 8
@.str = external hidden unnamed_addr constant [75 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @GC_with_callee_saves_pushed(ptr noundef %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca %struct.ucontext_t, align 8
  %8 = alloca i16, align 2
  %9 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #4
  store volatile ptr null, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 968, ptr %7) #4
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #4
  call void asm sideeffect "fstcw $0", "=*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i16) %8) #4, !srcloc !9
  %10 = load i8, ptr @GC_with_callee_saves_pushed.getcontext_works, align 1, !tbaa !10
  %11 = sext i8 %10 to i32
  %12 = icmp sge i32 %11, 0
  br i1 %12, label %13, label %34

13:                                               ; preds = %2
  %14 = call i32 @getcontext(ptr noundef %7) #6
  %15 = icmp slt i32 %14, 0
  br i1 %15, label %16, label %18

16:                                               ; preds = %13
  %17 = load ptr, ptr @GC_current_warn_proc, align 8, !tbaa !5
  call void %17(ptr noundef @.str, i64 noundef 0)
  br label %19

18:                                               ; preds = %13
  store volatile ptr %7, ptr %6, align 8, !tbaa !5
  br label %19

19:                                               ; preds = %18, %16
  %20 = load i8, ptr @GC_with_callee_saves_pushed.getcontext_works, align 1, !tbaa !10
  %21 = sext i8 %20 to i32
  %22 = icmp eq i32 0, %21
  %23 = zext i1 %22 to i32
  %24 = sext i32 %23 to i64
  %25 = call i64 @llvm.expect.i64(i64 %24, i64 0)
  %26 = icmp ne i64 %25, 0
  br i1 %26, label %27, label %33

27:                                               ; preds = %19
  %28 = load volatile ptr, ptr %6, align 8, !tbaa !5
  %29 = icmp ne ptr %28, null
  %30 = zext i1 %29 to i64
  %31 = select i1 %29, i32 1, i32 -1
  %32 = trunc i32 %31 to i8
  store i8 %32, ptr @GC_with_callee_saves_pushed.getcontext_works, align 1, !tbaa !10
  br label %33

33:                                               ; preds = %27, %19
  br label %34

34:                                               ; preds = %33, %2
  call void asm sideeffect "fldcw $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i16) %8) #4, !srcloc !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void asm sideeffect "stmxcsr $0", "=*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %9) #4, !srcloc !12
  %35 = load i32, ptr %9, align 4, !tbaa !13
  %36 = and i32 %35, -7809
  %37 = load i16, ptr %8, align 2, !tbaa !15
  %38 = zext i16 %37 to i32
  %39 = and i32 %38, 61
  %40 = shl i32 %39, 7
  %41 = or i32 %36, %40
  store i32 %41, ptr %9, align 4, !tbaa !13
  call void asm sideeffect "ldmxcsr $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %9) #4, !srcloc !17
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  %42 = load volatile ptr, ptr %6, align 8, !tbaa !5
  %43 = icmp eq ptr null, %42
  br i1 %43, label %44, label %45

44:                                               ; preds = %34
  call void @llvm.eh.unwind.init()
  br label %45

45:                                               ; preds = %44, %34
  %46 = load volatile ptr, ptr %3, align 8, !tbaa !5
  %47 = load ptr, ptr %4, align 8, !tbaa !5
  %48 = load volatile ptr, ptr %6, align 8, !tbaa !5
  %49 = ptrtoint ptr %48 to i64
  %50 = inttoptr i64 %49 to ptr
  call void %46(ptr noundef %47, ptr noundef %50)
  %51 = ptrtoint ptr %5 to i64
  call void @GC_noop1(i64 noundef %51)
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #4
  call void @llvm.lifetime.end.p0(i64 968, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind returns_twice
declare i32 @getcontext(ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
declare i64 @llvm.expect.i64(i64, i64) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare void @llvm.eh.unwind.init() #4

declare void @GC_noop1(i64 noundef) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind returns_twice "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }
attributes #4 = { nounwind }
attributes #5 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind returns_twice }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 8828}
!10 = !{!7, !7, i64 0}
!11 = !{i64 9519}
!12 = !{i64 9693}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"short", !7, i64 0}
!17 = !{i64 9871}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.ucontext_t = type { i64, ptr, %struct.stack_t, %struct.mcontext_t, %struct.__sigset_t, %struct._libc_fpstate, [4 x i64] }
%struct.stack_t = type { ptr, i32, i64 }
%struct.mcontext_t = type { [23 x i64], ptr, [8 x i64] }
%struct.__sigset_t = type { [16 x i64] }
%struct._libc_fpstate = type { i16, i16, i16, i16, i64, i64, i32, i32, [8 x %struct._libc_fpxreg], [16 x %struct._libc_xmmreg], [24 x i32] }
%struct._libc_fpxreg = type { [4 x i16], i16, [3 x i16] }
%struct._libc_xmmreg = type { [4 x i32] }

@GC_with_callee_saves_pushed.getcontext_works = external hidden local_unnamed_addr global i8, align 1
@GC_current_warn_proc = external local_unnamed_addr global ptr, align 8
@.str = external hidden unnamed_addr constant [75 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @GC_with_callee_saves_pushed(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca %struct.ucontext_t, align 8
  %7 = alloca i16, align 2
  %8 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5)
  store volatile ptr null, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 968, ptr nonnull %6) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %7) #3
  call void asm sideeffect "fstcw $0", "=*m,~{dirflag},~{fpsr},~{flags}"(ptr nonnull elementtype(i16) %7) #3, !srcloc !9
  %9 = load i8, ptr @GC_with_callee_saves_pushed.getcontext_works, align 1, !tbaa !10
  %10 = icmp sgt i8 %9, -1
  br i1 %10, label %11, label %22

11:                                               ; preds = %2
  %12 = call i32 @getcontext(ptr noundef nonnull %6) #5
  %13 = icmp slt i32 %12, 0
  br i1 %13, label %14, label %16

14:                                               ; preds = %11
  %15 = load ptr, ptr @GC_current_warn_proc, align 8, !tbaa !5
  call void %15(ptr noundef nonnull @.str, i64 noundef 0) #3
  br label %17

16:                                               ; preds = %11
  store volatile ptr %6, ptr %5, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %16, %14
  %18 = load i8, ptr @GC_with_callee_saves_pushed.getcontext_works, align 1, !tbaa !10
  %19 = icmp eq i8 %18, 0
  br i1 %19, label %20, label %22, !prof !11

20:                                               ; preds = %17
  %.0..0..0..0. = load volatile ptr, ptr %5, align 8, !tbaa !5
  %.not = icmp eq ptr %.0..0..0..0., null
  %21 = select i1 %.not, i8 -1, i8 1
  store i8 %21, ptr @GC_with_callee_saves_pushed.getcontext_works, align 1, !tbaa !10
  br label %22

22:                                               ; preds = %17, %20, %2
  call void asm sideeffect "fldcw $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr nonnull elementtype(i16) %7) #3, !srcloc !12
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
  call void asm sideeffect "stmxcsr $0", "=*m,~{dirflag},~{fpsr},~{flags}"(ptr nonnull elementtype(i32) %8) #3, !srcloc !13
  %23 = load i32, ptr %8, align 4, !tbaa !14
  %24 = and i32 %23, -7809
  %25 = load i16, ptr %7, align 2, !tbaa !16
  %26 = shl i16 %25, 7
  %27 = and i16 %26, 7808
  %28 = zext nneg i16 %27 to i32
  %29 = or disjoint i32 %24, %28
  store i32 %29, ptr %8, align 4, !tbaa !14
  call void asm sideeffect "ldmxcsr $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr nonnull elementtype(i32) %8) #3, !srcloc !18
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
  %.0..0..0..0.1 = load volatile ptr, ptr %5, align 8, !tbaa !5
  %30 = icmp eq ptr %.0..0..0..0.1, null
  br i1 %30, label %31, label %32

31:                                               ; preds = %22
  call void @llvm.eh.unwind.init()
  br label %32

32:                                               ; preds = %31, %22
  %.0..0..0..0.4 = load volatile ptr, ptr %3, align 8, !tbaa !5
  %.0..0..0..0.2 = load volatile ptr, ptr %5, align 8, !tbaa !5
  call void %.0..0..0..0.4(ptr noundef %1, ptr noundef %.0..0..0..0.2) #3
  %33 = ptrtoint ptr %4 to i64
  call void @GC_noop1(i64 noundef %33) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %7) #3
  call void @llvm.lifetime.end.p0(i64 968, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5)
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind returns_twice
declare i32 @getcontext(ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind
declare void @llvm.eh.unwind.init() #3

declare void @GC_noop1(i64 noundef) local_unnamed_addr #4

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind returns_twice "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind returns_twice }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{i64 8828}
!10 = !{!7, !7, i64 0}
!11 = !{!"branch_weights", !"expected", i32 1, i32 2000}
!12 = !{i64 9519}
!13 = !{i64 9693}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"short", !7, i64 0}
!18 = !{i64 9871}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,LowerExpectIntrinsicPass,ReassociatePass,SROAPass,SimplifyCFGPass