; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_mbox)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_event = type { i8, ptr, i16, i8, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

declare void @OS_Sched() #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @OSMboxPostOpt(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) #2 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i8 %2, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !10
  %10 = load ptr, ptr %5, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.os_event, ptr %10, i32 0, i32 0
  %12 = load i8, ptr %11, align 8, !tbaa !12
  %13 = zext i8 %12 to i32
  %14 = icmp ne i32 %13, 1
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  store i8 1, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %64

16:                                               ; preds = %3
  %17 = call i32 @OS_CPU_SR_Save()
  store i32 %17, ptr %8, align 4, !tbaa !10
  %18 = load ptr, ptr %5, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.os_event, ptr %18, i32 0, i32 3
  %20 = load i8, ptr %19, align 2, !tbaa !15
  %21 = zext i8 %20 to i32
  %22 = icmp ne i32 %21, 0
  br i1 %22, label %23, label %52

23:                                               ; preds = %16
  %24 = load i8, ptr %7, align 1, !tbaa !9
  %25 = zext i8 %24 to i32
  %26 = and i32 %25, 1
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %40

28:                                               ; preds = %23
  br label %29

29:                                               ; preds = %35, %28
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.os_event, ptr %30, i32 0, i32 3
  %32 = load i8, ptr %31, align 2, !tbaa !15
  %33 = zext i8 %32 to i32
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %39

35:                                               ; preds = %29
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = load ptr, ptr %6, align 8, !tbaa !5
  %38 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %36, ptr noundef %37, i8 noundef zeroext 2, i8 noundef zeroext 0)
  br label %29, !llvm.loop !16

39:                                               ; preds = %29
  br label %44

40:                                               ; preds = %23
  %41 = load ptr, ptr %5, align 8, !tbaa !5
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %41, ptr noundef %42, i8 noundef zeroext 2, i8 noundef zeroext 0)
  br label %44

44:                                               ; preds = %40, %39
  %45 = load i32, ptr %8, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %45)
  %46 = load i8, ptr %7, align 1, !tbaa !9
  %47 = zext i8 %46 to i32
  %48 = and i32 %47, 4
  %49 = icmp eq i32 %48, 0
  br i1 %49, label %50, label %51

50:                                               ; preds = %44
  call void @OS_Sched()
  br label %51

51:                                               ; preds = %50, %44
  store i8 0, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %64

52:                                               ; preds = %16
  %53 = load ptr, ptr %5, align 8, !tbaa !5
  %54 = getelementptr inbounds %struct.os_event, ptr %53, i32 0, i32 1
  %55 = load ptr, ptr %54, align 8, !tbaa !18
  %56 = icmp ne ptr %55, null
  br i1 %56, label %57, label %59

57:                                               ; preds = %52
  %58 = load i32, ptr %8, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %58)
  store i8 20, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %64

59:                                               ; preds = %52
  %60 = load ptr, ptr %6, align 8, !tbaa !5
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.os_event, ptr %61, i32 0, i32 1
  store ptr %60, ptr %62, align 8, !tbaa !18
  %63 = load i32, ptr %8, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %63)
  store i8 0, ptr %4, align 1
  store i32 1, ptr %9, align 4
  br label %64

64:                                               ; preds = %59, %57, %51, %15
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %65 = load i8, ptr %4, align 1
  ret i8 %65
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"os_event", !7, i64 0, !6, i64 8, !14, i64 16, !7, i64 18, !7, i64 19}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !7, i64 18}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!13, !6, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @OS_Sched() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 21) i8 @OSMboxPostOpt(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = load i8, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i8 %4, 1
  br i1 %.not, label %5, label %24

5:                                                ; preds = %3
  %6 = tail call i32 @OS_CPU_SR_Save() #2
  %7 = getelementptr inbounds i8, ptr %0, i64 18
  %8 = load i8, ptr %7, align 2, !tbaa !11
  %.not15 = icmp eq i8 %8, 0
  br i1 %.not15, label %19, label %9

9:                                                ; preds = %5
  %10 = zext i8 %2 to i32
  %11 = and i32 %10, 1
  %.not17 = icmp eq i32 %11, 0
  br i1 %.not17, label %14, label %.lr.ph

.lr.ph:                                           ; preds = %9, %.lr.ph
  %12 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef %1, i8 noundef zeroext 2, i8 noundef zeroext 0) #2
  %13 = load i8, ptr %7, align 2, !tbaa !11
  %.not18 = icmp eq i8 %13, 0
  br i1 %.not18, label %.loopexit, label %.lr.ph, !llvm.loop !12

14:                                               ; preds = %9
  %15 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef %1, i8 noundef zeroext 2, i8 noundef zeroext 0) #2
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %14
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  %16 = and i32 %10, 4
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %24

18:                                               ; preds = %.loopexit
  tail call void @OS_Sched() #2
  br label %24

19:                                               ; preds = %5
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  %21 = load ptr, ptr %20, align 8, !tbaa !14
  %.not16 = icmp eq ptr %21, null
  br i1 %.not16, label %23, label %22

22:                                               ; preds = %19
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  br label %24

23:                                               ; preds = %19
  store ptr %1, ptr %20, align 8, !tbaa !14
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  br label %24

24:                                               ; preds = %.loopexit, %18, %3, %23, %22
  %.0 = phi i8 [ 20, %22 ], [ 0, %23 ], [ 1, %3 ], [ 0, %18 ], [ 0, %.loopexit ]
  ret i8 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"os_event", !7, i64 0, !9, i64 8, !10, i64 16, !7, i64 18, !7, i64 19}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!6, !7, i64 18}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!6, !9, i64 8}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass