; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_mutex)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_event = type { i8, ptr, i16, i8, [8 x i8] }
%struct.os_tcb = type { ptr, ptr, ptr, i32, i16, i16, ptr, ptr, ptr, ptr, ptr, i16, i32, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, ptr, i32, ptr, [1 x i32] }

@OSIntNesting = external global i8, align 1
@OSTCBPrioTbl = external global [64 x ptr], align 16
@OSEventFreeList = external global ptr, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local ptr @OSMutexDel(ptr noundef %0, i8 noundef zeroext %1, ptr noundef %2) #2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca ptr, align 8
  %10 = alloca i8, align 1
  %11 = alloca i8, align 1
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !10
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.os_event, ptr %15, i32 0, i32 0
  %17 = load i8, ptr %16, align 8, !tbaa !12
  %18 = zext i8 %17 to i32
  %19 = icmp ne i32 %18, 4
  br i1 %19, label %20, label %23

20:                                               ; preds = %3
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 1, ptr %21, align 1, !tbaa !9
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %22, ptr %4, align 8
  store i32 1, ptr %14, align 4
  br label %142

23:                                               ; preds = %3
  %24 = load i8, ptr @OSIntNesting, align 1, !tbaa !9
  %25 = zext i8 %24 to i32
  %26 = icmp ugt i32 %25, 0
  br i1 %26, label %27, label %30

27:                                               ; preds = %23
  %28 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 15, ptr %28, align 1, !tbaa !9
  %29 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %29, ptr %4, align 8
  store i32 1, ptr %14, align 4
  br label %142

30:                                               ; preds = %23
  %31 = call i32 @OS_CPU_SR_Save()
  store i32 %31, ptr %13, align 4, !tbaa !10
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.os_event, ptr %32, i32 0, i32 3
  %34 = load i8, ptr %33, align 2, !tbaa !15
  %35 = zext i8 %34 to i32
  %36 = icmp ne i32 %35, 0
  br i1 %36, label %37, label %38

37:                                               ; preds = %30
  store i8 1, ptr %8, align 1, !tbaa !9
  br label %39

38:                                               ; preds = %30
  store i8 0, ptr %8, align 1, !tbaa !9
  br label %39

39:                                               ; preds = %38, %37
  %40 = load i8, ptr %6, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  switch i32 %41, label %136 [
    i32 0, label %42
    i32 1, label %71
  ]

42:                                               ; preds = %39
  %43 = load i8, ptr %8, align 1, !tbaa !9
  %44 = zext i8 %43 to i32
  %45 = icmp eq i32 %44, 0
  br i1 %45, label %46, label %66

46:                                               ; preds = %42
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = getelementptr inbounds %struct.os_event, ptr %47, i32 0, i32 2
  %49 = load i16, ptr %48, align 8, !tbaa !16
  %50 = zext i16 %49 to i32
  %51 = ashr i32 %50, 8
  %52 = trunc i32 %51 to i8
  store i8 %52, ptr %10, align 1, !tbaa !9
  %53 = load i8, ptr %10, align 1, !tbaa !9
  %54 = zext i8 %53 to i64
  %55 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %54
  store ptr null, ptr %55, align 8, !tbaa !5
  %56 = load ptr, ptr %5, align 8, !tbaa !5
  %57 = getelementptr inbounds %struct.os_event, ptr %56, i32 0, i32 0
  store i8 0, ptr %57, align 8, !tbaa !12
  %58 = load ptr, ptr @OSEventFreeList, align 8, !tbaa !5
  %59 = load ptr, ptr %5, align 8, !tbaa !5
  %60 = getelementptr inbounds %struct.os_event, ptr %59, i32 0, i32 1
  store ptr %58, ptr %60, align 8, !tbaa !17
  %61 = load ptr, ptr %5, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.os_event, ptr %61, i32 0, i32 2
  store i16 0, ptr %62, align 8, !tbaa !16
  %63 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %63, ptr @OSEventFreeList, align 8, !tbaa !5
  %64 = load i32, ptr %13, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %64)
  %65 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 0, ptr %65, align 1, !tbaa !9
  store ptr null, ptr %9, align 8, !tbaa !5
  br label %70

66:                                               ; preds = %42
  %67 = load i32, ptr %13, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %67)
  %68 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 73, ptr %68, align 1, !tbaa !9
  %69 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %69, ptr %9, align 8, !tbaa !5
  br label %70

70:                                               ; preds = %66, %46
  br label %140

71:                                               ; preds = %39
  %72 = load ptr, ptr %5, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.os_event, ptr %72, i32 0, i32 2
  %74 = load i16, ptr %73, align 8, !tbaa !16
  %75 = zext i16 %74 to i32
  %76 = ashr i32 %75, 8
  %77 = trunc i32 %76 to i8
  store i8 %77, ptr %10, align 1, !tbaa !9
  %78 = load ptr, ptr %5, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.os_event, ptr %78, i32 0, i32 2
  %80 = load i16, ptr %79, align 8, !tbaa !16
  %81 = zext i16 %80 to i32
  %82 = and i32 %81, 255
  %83 = trunc i32 %82 to i8
  store i8 %83, ptr %11, align 1, !tbaa !9
  %84 = load ptr, ptr %5, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.os_event, ptr %84, i32 0, i32 1
  %86 = load ptr, ptr %85, align 8, !tbaa !17
  store ptr %86, ptr %12, align 8, !tbaa !5
  %87 = load ptr, ptr %12, align 8, !tbaa !5
  %88 = icmp ne ptr %87, null
  br i1 %88, label %89, label %101

89:                                               ; preds = %71
  %90 = load ptr, ptr %12, align 8, !tbaa !5
  %91 = getelementptr inbounds %struct.os_tcb, ptr %90, i32 0, i32 15
  %92 = load i8, ptr %91, align 2, !tbaa !18
  %93 = zext i8 %92 to i32
  %94 = load i8, ptr %10, align 1, !tbaa !9
  %95 = zext i8 %94 to i32
  %96 = icmp eq i32 %93, %95
  br i1 %96, label %97, label %100

97:                                               ; preds = %89
  %98 = load ptr, ptr %12, align 8, !tbaa !5
  %99 = load i8, ptr %11, align 1, !tbaa !9
  call void @OSMutex_RdyAtPrio(ptr noundef %98, i8 noundef zeroext %99)
  br label %100

100:                                              ; preds = %97, %89
  br label %101

101:                                              ; preds = %100, %71
  br label %102

102:                                              ; preds = %108, %101
  %103 = load ptr, ptr %5, align 8, !tbaa !5
  %104 = getelementptr inbounds %struct.os_event, ptr %103, i32 0, i32 3
  %105 = load i8, ptr %104, align 2, !tbaa !15
  %106 = zext i8 %105 to i32
  %107 = icmp ne i32 %106, 0
  br i1 %107, label %108, label %111

108:                                              ; preds = %102
  %109 = load ptr, ptr %5, align 8, !tbaa !5
  %110 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %109, ptr noundef null, i8 noundef zeroext 16, i8 noundef zeroext 0)
  br label %102, !llvm.loop !20

111:                                              ; preds = %102
  %112 = load ptr, ptr %5, align 8, !tbaa !5
  %113 = getelementptr inbounds %struct.os_event, ptr %112, i32 0, i32 2
  %114 = load i16, ptr %113, align 8, !tbaa !16
  %115 = zext i16 %114 to i32
  %116 = ashr i32 %115, 8
  %117 = trunc i32 %116 to i8
  store i8 %117, ptr %10, align 1, !tbaa !9
  %118 = load i8, ptr %10, align 1, !tbaa !9
  %119 = zext i8 %118 to i64
  %120 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %119
  store ptr null, ptr %120, align 8, !tbaa !5
  %121 = load ptr, ptr %5, align 8, !tbaa !5
  %122 = getelementptr inbounds %struct.os_event, ptr %121, i32 0, i32 0
  store i8 0, ptr %122, align 8, !tbaa !12
  %123 = load ptr, ptr @OSEventFreeList, align 8, !tbaa !5
  %124 = load ptr, ptr %5, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.os_event, ptr %124, i32 0, i32 1
  store ptr %123, ptr %125, align 8, !tbaa !17
  %126 = load ptr, ptr %5, align 8, !tbaa !5
  %127 = getelementptr inbounds %struct.os_event, ptr %126, i32 0, i32 2
  store i16 0, ptr %127, align 8, !tbaa !16
  %128 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %128, ptr @OSEventFreeList, align 8, !tbaa !5
  %129 = load i32, ptr %13, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %129)
  %130 = load i8, ptr %8, align 1, !tbaa !9
  %131 = zext i8 %130 to i32
  %132 = icmp eq i32 %131, 1
  br i1 %132, label %133, label %134

133:                                              ; preds = %111
  call void @OS_Sched()
  br label %134

134:                                              ; preds = %133, %111
  %135 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 0, ptr %135, align 1, !tbaa !9
  store ptr null, ptr %9, align 8, !tbaa !5
  br label %140

136:                                              ; preds = %39
  %137 = load i32, ptr %13, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %137)
  %138 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 7, ptr %138, align 1, !tbaa !9
  %139 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %139, ptr %9, align 8, !tbaa !5
  br label %140

140:                                              ; preds = %136, %134, %70
  %141 = load ptr, ptr %9, align 8, !tbaa !5
  store ptr %141, ptr %4, align 8
  store i32 1, ptr %14, align 4
  br label %142

142:                                              ; preds = %140, %27, %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %143 = load ptr, ptr %4, align 8
  ret ptr %143
}

; Function Attrs: nounwind uwtable
declare hidden void @OSMutex_RdyAtPrio(ptr noundef, i8 noundef zeroext) #2

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

declare void @OS_Sched() #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"os_event", !7, i64 0, !6, i64 8, !14, i64 16, !7, i64 18, !7, i64 19}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !7, i64 18}
!16 = !{!13, !14, i64 16}
!17 = !{!13, !6, i64 8}
!18 = !{!19, !7, i64 82}
!19 = !{!"os_tcb", !6, i64 0, !6, i64 8, !6, i64 16, !11, i64 24, !14, i64 28, !14, i64 30, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !6, i64 64, !14, i64 72, !11, i64 76, !7, i64 80, !7, i64 81, !7, i64 82, !7, i64 83, !7, i64 84, !7, i64 85, !7, i64 86, !7, i64 87, !11, i64 88, !11, i64 92, !11, i64 96, !6, i64 104, !11, i64 112, !6, i64 120, !7, i64 128}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@OSIntNesting = external local_unnamed_addr global i8, align 1
@OSTCBPrioTbl = external local_unnamed_addr global [64 x ptr], align 16
@OSEventFreeList = external local_unnamed_addr global ptr, align 8

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @OSMutexDel(ptr noundef %0, i8 noundef zeroext %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #1 {
  %4 = load i8, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i8 %4, 4
  br i1 %.not, label %5, label %45

5:                                                ; preds = %3
  %6 = load i8, ptr @OSIntNesting, align 1, !tbaa !11
  %.not45 = icmp eq i8 %6, 0
  br i1 %.not45, label %7, label %45

7:                                                ; preds = %5
  %8 = tail call i32 @OS_CPU_SR_Save() #2
  %9 = getelementptr inbounds i8, ptr %0, i64 18
  %10 = load i8, ptr %9, align 2, !tbaa !12
  %.not46.not = icmp eq i8 %10, 0
  switch i8 %1, label %44 [
    i8 0, label %11
    i8 1, label %21
  ]

11:                                               ; preds = %7
  br i1 %.not46.not, label %12, label %20

12:                                               ; preds = %11
  %13 = getelementptr inbounds i8, ptr %0, i64 16
  %14 = load i16, ptr %13, align 8, !tbaa !13
  %15 = lshr i16 %14, 8
  %16 = zext nneg i16 %15 to i64
  %17 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %16
  store ptr null, ptr %17, align 8, !tbaa !14
  store i8 0, ptr %0, align 8, !tbaa !5
  %18 = load ptr, ptr @OSEventFreeList, align 8, !tbaa !14
  %19 = getelementptr inbounds i8, ptr %0, i64 8
  store ptr %18, ptr %19, align 8, !tbaa !15
  store i16 0, ptr %13, align 8, !tbaa !13
  store ptr %0, ptr @OSEventFreeList, align 8, !tbaa !14
  tail call void @OS_CPU_SR_Restore(i32 noundef %8) #2
  br label %45

20:                                               ; preds = %11
  tail call void @OS_CPU_SR_Restore(i32 noundef %8) #2
  br label %45

21:                                               ; preds = %7
  %22 = getelementptr inbounds i8, ptr %0, i64 16
  %23 = load i16, ptr %22, align 8, !tbaa !13
  %24 = trunc i16 %23 to i8
  %25 = getelementptr inbounds i8, ptr %0, i64 8
  %26 = load ptr, ptr %25, align 8, !tbaa !15
  %.not47 = icmp eq ptr %26, null
  br i1 %.not47, label %34, label %27

27:                                               ; preds = %21
  %28 = lshr i16 %23, 8
  %29 = getelementptr inbounds i8, ptr %26, i64 82
  %30 = load i8, ptr %29, align 2, !tbaa !16
  %31 = zext i8 %30 to i16
  %32 = icmp eq i16 %28, %31
  br i1 %32, label %33, label %34

33:                                               ; preds = %27
  tail call void @OSMutex_RdyAtPrio(ptr noundef nonnull %26, i8 noundef zeroext %24)
  %.pre = load i8, ptr %9, align 2, !tbaa !12
  br label %34

34:                                               ; preds = %27, %33, %21
  %35 = phi i8 [ %10, %27 ], [ %.pre, %33 ], [ %10, %21 ]
  %.not4849 = icmp eq i8 %35, 0
  br i1 %.not4849, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %34, %.lr.ph
  %36 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef null, i8 noundef zeroext 16, i8 noundef zeroext 0) #2
  %37 = load i8, ptr %9, align 2, !tbaa !12
  %.not48 = icmp eq i8 %37, 0
  br i1 %.not48, label %._crit_edge, label %.lr.ph, !llvm.loop !19

._crit_edge:                                      ; preds = %.lr.ph, %34
  %38 = load i16, ptr %22, align 8, !tbaa !13
  %39 = lshr i16 %38, 8
  %40 = zext nneg i16 %39 to i64
  %41 = getelementptr inbounds [64 x ptr], ptr @OSTCBPrioTbl, i64 0, i64 %40
  store ptr null, ptr %41, align 8, !tbaa !14
  store i8 0, ptr %0, align 8, !tbaa !5
  %42 = load ptr, ptr @OSEventFreeList, align 8, !tbaa !14
  store ptr %42, ptr %25, align 8, !tbaa !15
  store i16 0, ptr %22, align 8, !tbaa !13
  store ptr %0, ptr @OSEventFreeList, align 8, !tbaa !14
  tail call void @OS_CPU_SR_Restore(i32 noundef %8) #2
  br i1 %.not46.not, label %45, label %43

43:                                               ; preds = %._crit_edge
  tail call void @OS_Sched() #2
  br label %45

44:                                               ; preds = %7
  tail call void @OS_CPU_SR_Restore(i32 noundef %8) #2
  br label %45

45:                                               ; preds = %._crit_edge, %43, %5, %3, %44, %20, %12
  %.sink = phi i8 [ 7, %44 ], [ 73, %20 ], [ 0, %12 ], [ 1, %3 ], [ 15, %5 ], [ 0, %43 ], [ 0, %._crit_edge ]
  %.0 = phi ptr [ %0, %44 ], [ %0, %20 ], [ null, %12 ], [ %0, %3 ], [ %0, %5 ], [ null, %43 ], [ null, %._crit_edge ]
  store i8 %.sink, ptr %2, align 1, !tbaa !11
  ret ptr %.0
}

; Function Attrs: nounwind uwtable
declare hidden void @OSMutex_RdyAtPrio(ptr noundef, i8 noundef zeroext) local_unnamed_addr #1

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @OS_Sched() local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"os_event", !7, i64 0, !9, i64 8, !10, i64 16, !7, i64 18, !7, i64 19}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 18}
!13 = !{!6, !10, i64 16}
!14 = !{!9, !9, i64 0}
!15 = !{!6, !9, i64 8}
!16 = !{!17, !7, i64 82}
!17 = !{!"os_tcb", !9, i64 0, !9, i64 8, !9, i64 16, !18, i64 24, !10, i64 28, !10, i64 30, !9, i64 32, !9, i64 40, !9, i64 48, !9, i64 56, !9, i64 64, !10, i64 72, !18, i64 76, !7, i64 80, !7, i64 81, !7, i64 82, !7, i64 83, !7, i64 84, !7, i64 85, !7, i64 86, !7, i64 87, !18, i64 88, !18, i64 92, !18, i64 96, !9, i64 104, !18, i64 112, !9, i64 120, !7, i64 128}
!18 = !{!"int", !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass