; LLVM IR from ponylang/ponyc :: src/libponyrt/asio (epoll)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__sigset_t = type { [16 x i64] }
%struct.asio_backend_t = type { i32, i32, [64 x %struct.epoll_event], [128 x ptr], i8, %struct.messageq_t }
%struct.epoll_event = type <{ i32, %union.epoll_data }>
%union.epoll_data = type { ptr }
%struct.messageq_t = type { ptr, ptr }
%struct.asio_event_t = type { ptr, ptr, i32, i32, i32, i8, i8, i8, i64 }

@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [10 x i8], align 1
@__func__.ponyint_asio_backend_dispatch = external hidden unnamed_addr constant [30 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @ponyint_pool_free(i64 noundef, ptr noundef) #1

; Function Attrs: nounwind
declare i32 @sigemptyset(ptr noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local ptr @ponyint_asio_backend_dispatch(ptr noundef %0) #3 {
  %2 = alloca ptr, align 8
  %3 = alloca ptr, align 8
  %4 = alloca %struct.__sigset_t, align 8
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  %15 = alloca i64, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %18 = call i32 (...) @ponyint_asio_get_cpu()
  call void @ponyint_cpu_affinity(i32 noundef %18)
  call void (...) @ponyint_register_asio_thread()
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  store ptr %19, ptr %3, align 8, !tbaa !5
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %22, label %23

22:                                               ; preds = %1
  br label %24

23:                                               ; preds = %1
  call void @ponyint_assert_fail(ptr noundef @.str.2, ptr noundef @.str.1, i64 noundef 213, ptr noundef @__func__.ponyint_asio_backend_dispatch)
  br label %24

24:                                               ; preds = %23, %22
  call void @llvm.lifetime.start.p0(i64 128, ptr %4) #4
  %25 = call i32 @sigemptyset(ptr noundef %4) #4
  %26 = call i32 @sigaddset(ptr noundef %4, i32 noundef 12) #4
  %27 = call i32 @pthread_sigmask(i32 noundef 0, ptr noundef %4, ptr noundef null) #4
  br label %28

28:                                               ; preds = %194, %24
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.asio_backend_t, ptr %29, i32 0, i32 4
  %31 = load atomic i8, ptr %30 acquire, align 8
  store i8 %31, ptr %5, align 1
  %32 = load i8, ptr %5, align 1, !tbaa !9, !range !11, !noundef !12
  %33 = trunc i8 %32 to i1
  %34 = xor i1 %33, true
  br i1 %34, label %35, label %196

35:                                               ; preds = %28
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 -1, ptr %6, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = getelementptr inbounds %struct.asio_backend_t, ptr %36, i32 0, i32 0
  %38 = load i32, ptr %37, align 8, !tbaa !15
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = getelementptr inbounds %struct.asio_backend_t, ptr %39, i32 0, i32 2
  %41 = getelementptr inbounds [64 x %struct.epoll_event], ptr %40, i64 0, i64 0
  %42 = load i32, ptr %6, align 4, !tbaa !13
  %43 = call i32 @epoll_wait(i32 noundef %38, ptr noundef %41, i32 noundef 64, i32 noundef %42)
  store i32 %43, ptr %7, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  store i32 0, ptr %8, align 4, !tbaa !13
  br label %44

44:                                               ; preds = %191, %35
  %45 = load i32, ptr %8, align 4, !tbaa !13
  %46 = load i32, ptr %7, align 4, !tbaa !13
  %47 = icmp slt i32 %45, %46
  br i1 %47, label %49, label %48

48:                                               ; preds = %44
  store i32 4, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %194

49:                                               ; preds = %44
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %50 = load ptr, ptr %3, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.asio_backend_t, ptr %50, i32 0, i32 2
  %52 = load i32, ptr %8, align 4, !tbaa !13
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [64 x %struct.epoll_event], ptr %51, i64 0, i64 %53
  store ptr %54, ptr %10, align 8, !tbaa !5
  %55 = load ptr, ptr %10, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.epoll_event, ptr %55, i32 0, i32 1
  %57 = load ptr, ptr %56, align 1, !tbaa !18
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = icmp eq ptr %57, %58
  br i1 %59, label %60, label %61

60:                                               ; preds = %49
  store i32 6, ptr %9, align 4
  br label %188

61:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %62 = load ptr, ptr %10, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.epoll_event, ptr %62, i32 0, i32 1
  %64 = load ptr, ptr %63, align 1, !tbaa !18
  store ptr %64, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  store i32 0, ptr %12, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  store i32 0, ptr %13, align 4, !tbaa !13
  %65 = load ptr, ptr %11, align 8, !tbaa !5
  %66 = getelementptr inbounds %struct.asio_event_t, ptr %65, i32 0, i32 4
  %67 = load i32, ptr %66, align 8, !tbaa !19
  %68 = and i32 %67, 1
  %69 = icmp ne i32 %68, 0
  br i1 %69, label %70, label %100

70:                                               ; preds = %61
  %71 = load ptr, ptr %10, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.epoll_event, ptr %71, i32 0, i32 0
  %73 = load i32, ptr %72, align 1, !tbaa !22
  %74 = and i32 %73, 8217
  %75 = icmp ne i32 %74, 0
  br i1 %75, label %76, label %99

76:                                               ; preds = %70
  %77 = load ptr, ptr %11, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.asio_event_t, ptr %77, i32 0, i32 4
  %79 = load i32, ptr %78, align 8, !tbaa !19
  %80 = and i32 %79, 256
  %81 = icmp ne i32 %80, 0
  br i1 %81, label %82, label %87

82:                                               ; preds = %76
  %83 = load ptr, ptr %11, align 8, !tbaa !5
  %84 = getelementptr inbounds %struct.asio_event_t, ptr %83, i32 0, i32 6
  %85 = load i8, ptr %84, align 1, !tbaa !24, !range !11, !noundef !12
  %86 = trunc i8 %85 to i1
  br i1 %86, label %87, label %93

87:                                               ; preds = %82, %76
  %88 = load ptr, ptr %11, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.asio_event_t, ptr %88, i32 0, i32 4
  %90 = load i32, ptr %89, align 8, !tbaa !19
  %91 = and i32 %90, 256
  %92 = icmp ne i32 %91, 0
  br i1 %92, label %98, label %93

93:                                               ; preds = %87, %82
  %94 = load ptr, ptr %11, align 8, !tbaa !5
  %95 = getelementptr inbounds %struct.asio_event_t, ptr %94, i32 0, i32 6
  store i8 1, ptr %95, align 1, !tbaa !24
  %96 = load i32, ptr %12, align 4, !tbaa !13
  %97 = or i32 %96, 1
  store i32 %97, ptr %12, align 4, !tbaa !13
  br label %98

98:                                               ; preds = %93, %87
  br label %99

99:                                               ; preds = %98, %70
  br label %100

100:                                              ; preds = %99, %61
  %101 = load ptr, ptr %11, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.asio_event_t, ptr %101, i32 0, i32 4
  %103 = load i32, ptr %102, align 8, !tbaa !19
  %104 = and i32 %103, 2
  %105 = icmp ne i32 %104, 0
  br i1 %105, label %106, label %136

106:                                              ; preds = %100
  %107 = load ptr, ptr %10, align 8, !tbaa !5
  %108 = getelementptr inbounds %struct.epoll_event, ptr %107, i32 0, i32 0
  %109 = load i32, ptr %108, align 1, !tbaa !22
  %110 = and i32 %109, 4
  %111 = icmp ne i32 %110, 0
  br i1 %111, label %112, label %135

112:                                              ; preds = %106
  %113 = load ptr, ptr %11, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.asio_event_t, ptr %113, i32 0, i32 4
  %115 = load i32, ptr %114, align 8, !tbaa !19
  %116 = and i32 %115, 256
  %117 = icmp ne i32 %116, 0
  br i1 %117, label %118, label %123

118:                                              ; preds = %112
  %119 = load ptr, ptr %11, align 8, !tbaa !5
  %120 = getelementptr inbounds %struct.asio_event_t, ptr %119, i32 0, i32 7
  %121 = load i8, ptr %120, align 2, !tbaa !25, !range !11, !noundef !12
  %122 = trunc i8 %121 to i1
  br i1 %122, label %123, label %129

123:                                              ; preds = %118, %112
  %124 = load ptr, ptr %11, align 8, !tbaa !5
  %125 = getelementptr inbounds %struct.asio_event_t, ptr %124, i32 0, i32 4
  %126 = load i32, ptr %125, align 8, !tbaa !19
  %127 = and i32 %126, 256
  %128 = icmp ne i32 %127, 0
  br i1 %128, label %134, label %129

129:                                              ; preds = %123, %118
  %130 = load i32, ptr %12, align 4, !tbaa !13
  %131 = or i32 %130, 2
  store i32 %131, ptr %12, align 4, !tbaa !13
  %132 = load ptr, ptr %11, align 8, !tbaa !5
  %133 = getelementptr inbounds %struct.asio_event_t, ptr %132, i32 0, i32 7
  store i8 1, ptr %133, align 2, !tbaa !25
  br label %134

134:                                              ; preds = %129, %123
  br label %135

135:                                              ; preds = %134, %106
  br label %136

136:                                              ; preds = %135, %100
  %137 = load ptr, ptr %11, align 8, !tbaa !5
  %138 = getelementptr inbounds %struct.asio_event_t, ptr %137, i32 0, i32 4
  %139 = load i32, ptr %138, align 8, !tbaa !19
  %140 = and i32 %139, 4
  %141 = icmp ne i32 %140, 0
  br i1 %141, label %142, label %157

142:                                              ; preds = %136
  %143 = load ptr, ptr %10, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.epoll_event, ptr %143, i32 0, i32 0
  %145 = load i32, ptr %144, align 1, !tbaa !22
  %146 = and i32 %145, 8217
  %147 = icmp ne i32 %146, 0
  br i1 %147, label %148, label %156

148:                                              ; preds = %142
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #4
  %149 = load ptr, ptr %11, align 8, !tbaa !5
  %150 = getelementptr inbounds %struct.asio_event_t, ptr %149, i32 0, i32 3
  %151 = load i32, ptr %150, align 4, !tbaa !26
  %152 = call i64 @read(i32 noundef %151, ptr noundef %14, i64 noundef 8)
  store i64 %152, ptr %15, align 8, !tbaa !27
  %153 = load i64, ptr %15, align 8, !tbaa !27
  %154 = load i32, ptr %12, align 4, !tbaa !13
  %155 = or i32 %154, 4
  store i32 %155, ptr %12, align 4, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #4
  br label %156

156:                                              ; preds = %148, %142
  br label %157

157:                                              ; preds = %156, %136
  %158 = load ptr, ptr %11, align 8, !tbaa !5
  %159 = getelementptr inbounds %struct.asio_event_t, ptr %158, i32 0, i32 4
  %160 = load i32, ptr %159, align 8, !tbaa !19
  %161 = and i32 %160, 8
  %162 = icmp ne i32 %161, 0
  br i1 %162, label %163, label %180

163:                                              ; preds = %157
  %164 = load ptr, ptr %10, align 8, !tbaa !5
  %165 = getelementptr inbounds %struct.epoll_event, ptr %164, i32 0, i32 0
  %166 = load i32, ptr %165, align 1, !tbaa !22
  %167 = and i32 %166, 8217
  %168 = icmp ne i32 %167, 0
  br i1 %168, label %169, label %179

169:                                              ; preds = %163
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #4
  %170 = load ptr, ptr %11, align 8, !tbaa !5
  %171 = getelementptr inbounds %struct.asio_event_t, ptr %170, i32 0, i32 3
  %172 = load i32, ptr %171, align 4, !tbaa !26
  %173 = call i64 @read(i32 noundef %172, ptr noundef %16, i64 noundef 8)
  store i64 %173, ptr %17, align 8, !tbaa !27
  %174 = load i64, ptr %17, align 8, !tbaa !27
  %175 = load i32, ptr %12, align 4, !tbaa !13
  %176 = or i32 %175, 8
  store i32 %176, ptr %12, align 4, !tbaa !13
  %177 = load i64, ptr %16, align 8, !tbaa !27
  %178 = trunc i64 %177 to i32
  store i32 %178, ptr %13, align 4, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #4
  br label %179

179:                                              ; preds = %169, %163
  br label %180

180:                                              ; preds = %179, %157
  %181 = load i32, ptr %12, align 4, !tbaa !13
  %182 = icmp ne i32 %181, 0
  br i1 %182, label %183, label %187

183:                                              ; preds = %180
  %184 = load ptr, ptr %11, align 8, !tbaa !5
  %185 = load i32, ptr %12, align 4, !tbaa !13
  %186 = load i32, ptr %13, align 4, !tbaa !13
  call void @pony_asio_event_send(ptr noundef %184, i32 noundef %185, i32 noundef %186)
  br label %187

187:                                              ; preds = %183, %180
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  store i32 0, ptr %9, align 4
  br label %188

188:                                              ; preds = %187, %60
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  %189 = load i32, ptr %9, align 4
  switch i32 %189, label %208 [
    i32 0, label %190
    i32 6, label %191
  ]

190:                                              ; preds = %188
  br label %191

191:                                              ; preds = %190, %188
  %192 = load i32, ptr %8, align 4, !tbaa !13
  %193 = add nsw i32 %192, 1
  store i32 %193, ptr %8, align 4, !tbaa !13
  br label %44, !llvm.loop !28

194:                                              ; preds = %48
  %195 = load ptr, ptr %3, align 8, !tbaa !5
  call void @handle_queue(ptr noundef %195)
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %28, !llvm.loop !30

196:                                              ; preds = %28
  %197 = load ptr, ptr %3, align 8, !tbaa !5
  %198 = getelementptr inbounds %struct.asio_backend_t, ptr %197, i32 0, i32 0
  %199 = load i32, ptr %198, align 8, !tbaa !15
  %200 = call i32 @close(i32 noundef %199)
  %201 = load ptr, ptr %3, align 8, !tbaa !5
  %202 = getelementptr inbounds %struct.asio_backend_t, ptr %201, i32 0, i32 1
  %203 = load i32, ptr %202, align 4, !tbaa !31
  %204 = call i32 @close(i32 noundef %203)
  %205 = load ptr, ptr %3, align 8, !tbaa !5
  %206 = getelementptr inbounds %struct.asio_backend_t, ptr %205, i32 0, i32 5
  call void @ponyint_messageq_destroy(ptr noundef %206, i1 noundef zeroext true)
  %207 = load ptr, ptr %3, align 8, !tbaa !5
  call void @ponyint_pool_free(i64 noundef 6, ptr noundef %207)
  call void (...) @pony_unregister_thread()
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 128, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  ret ptr null

208:                                              ; preds = %188
  unreachable
}

declare void @ponyint_cpu_affinity(i32 noundef) #1

declare i32 @ponyint_asio_get_cpu(...) #1

declare void @ponyint_register_asio_thread(...) #1

; Function Attrs: nounwind
declare i32 @sigaddset(ptr noundef, i32 noundef) #2

; Function Attrs: nounwind
declare i32 @pthread_sigmask(i32 noundef, ptr noundef, ptr noundef) #2

declare i32 @epoll_wait(i32 noundef, ptr noundef, i32 noundef, i32 noundef) #1

declare i64 @read(i32 noundef, ptr noundef, i64 noundef) #1

declare void @pony_asio_event_send(ptr noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
declare hidden void @handle_queue(ptr noundef) #3

declare i32 @close(i32 noundef) #1

declare void @ponyint_messageq_destroy(ptr noundef, i1 noundef zeroext) #1

declare void @pony_unregister_thread(...) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"asio_backend_t", !14, i64 0, !14, i64 4, !7, i64 8, !7, i64 776, !7, i64 1800, !17, i64 1808}
!17 = !{!"messageq_t", !7, i64 0, !6, i64 8}
!18 = !{!7, !7, i64 0}
!19 = !{!20, !14, i64 24}
!20 = !{!"asio_event_t", !6, i64 0, !6, i64 8, !14, i64 16, !14, i64 20, !14, i64 24, !10, i64 28, !10, i64 29, !10, i64 30, !21, i64 32}
!21 = !{!"long", !7, i64 0}
!22 = !{!23, !14, i64 0}
!23 = !{!"epoll_event", !14, i64 0, !7, i64 4}
!24 = !{!20, !10, i64 29}
!25 = !{!20, !10, i64 30}
!26 = !{!20, !14, i64 20}
!27 = !{!21, !21, i64 0}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = distinct !{!30, !29}
!31 = !{!16, !14, i64 4}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.__sigset_t = type { [16 x i64] }
%struct.epoll_event = type <{ i32, %union.epoll_data }>
%union.epoll_data = type { ptr }

@.str.1 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [10 x i8], align 1
@__func__.ponyint_asio_backend_dispatch = external hidden unnamed_addr constant [30 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @ponyint_pool_free(i64 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @sigemptyset(ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local noalias noundef ptr @ponyint_asio_backend_dispatch(ptr noundef %0) local_unnamed_addr #3 {
  %2 = alloca %struct.__sigset_t, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  %5 = tail call i32 (...) @ponyint_asio_get_cpu() #5
  tail call void @ponyint_cpu_affinity(i32 noundef %5) #5
  tail call void (...) @ponyint_register_asio_thread() #5
  %.not = icmp eq ptr %0, null
  br i1 %.not, label %6, label %7

6:                                                ; preds = %1
  tail call void @ponyint_assert_fail(ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.1, i64 noundef 213, ptr noundef nonnull @__func__.ponyint_asio_backend_dispatch) #5
  br label %7

7:                                                ; preds = %1, %6
  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %2) #5
  %8 = call i32 @sigemptyset(ptr noundef nonnull %2) #5
  %9 = call i32 @sigaddset(ptr noundef nonnull %2, i32 noundef 12) #5
  %10 = call i32 @pthread_sigmask(i32 noundef 0, ptr noundef nonnull %2, ptr noundef null) #5
  %11 = getelementptr inbounds i8, ptr %0, i64 1800
  %12 = load atomic i8, ptr %11 acquire, align 8
  %13 = trunc i8 %12 to i1
  br i1 %13, label %._crit_edge73, label %.lr.ph72

.lr.ph72:                                         ; preds = %7
  %14 = getelementptr inbounds i8, ptr %0, i64 8
  br label %15

15:                                               ; preds = %.lr.ph72, %._crit_edge
  %16 = load i32, ptr %0, align 8, !tbaa !5
  %17 = call i32 @epoll_wait(i32 noundef %16, ptr noundef nonnull %14, i32 noundef 64, i32 noundef -1) #5
  %18 = icmp sgt i32 %17, 0
  br i1 %18, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %15
  %wide.trip.count = zext nneg i32 %17 to i64
  br label %.lr.ph

._crit_edge:                                      ; preds = %76, %15
  call void @handle_queue(ptr noundef nonnull %0)
  %19 = load atomic i8, ptr %11 acquire, align 8
  %20 = trunc i8 %19 to i1
  br i1 %20, label %._crit_edge73, label %15, !llvm.loop !12

.lr.ph:                                           ; preds = %.lr.ph.preheader, %76
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %76 ]
  %21 = getelementptr inbounds [64 x %struct.epoll_event], ptr %14, i64 0, i64 %indvars.iv
  %22 = getelementptr inbounds i8, ptr %21, i64 4
  %23 = load ptr, ptr %22, align 1, !tbaa !14
  %24 = icmp eq ptr %23, %0
  br i1 %24, label %76, label %25

25:                                               ; preds = %.lr.ph
  %26 = getelementptr inbounds i8, ptr %23, i64 24
  %27 = load i32, ptr %26, align 8, !tbaa !15
  %28 = and i32 %27, 1
  %.not50 = icmp eq i32 %28, 0
  br i1 %.not50, label %39, label %29

29:                                               ; preds = %25
  %30 = load i32, ptr %21, align 1, !tbaa !19
  %31 = and i32 %30, 8217
  %.not51 = icmp eq i32 %31, 0
  br i1 %.not51, label %39, label %32

32:                                               ; preds = %29
  %33 = and i32 %27, 256
  %.not52 = icmp eq i32 %33, 0
  br i1 %.not52, label %.thread, label %34

34:                                               ; preds = %32
  %35 = getelementptr inbounds i8, ptr %23, i64 29
  %36 = load i8, ptr %35, align 1, !tbaa !21, !range !22, !noundef !23
  %37 = trunc nuw i8 %36 to i1
  br i1 %37, label %39, label %.thread

.thread:                                          ; preds = %32, %34
  %38 = getelementptr inbounds i8, ptr %23, i64 29
  store i8 1, ptr %38, align 1, !tbaa !21
  br label %39

39:                                               ; preds = %34, %29, %.thread, %25
  %.048 = phi i32 [ 1, %.thread ], [ 0, %29 ], [ 0, %25 ], [ 0, %34 ]
  %40 = and i32 %27, 2
  %.not54 = icmp eq i32 %40, 0
  br i1 %.not54, label %52, label %41

41:                                               ; preds = %39
  %42 = load i32, ptr %21, align 1, !tbaa !19
  %43 = and i32 %42, 4
  %.not55 = icmp eq i32 %43, 0
  br i1 %.not55, label %52, label %44

44:                                               ; preds = %41
  %45 = and i32 %27, 256
  %.not56 = icmp eq i32 %45, 0
  br i1 %.not56, label %.thread63, label %46

46:                                               ; preds = %44
  %47 = getelementptr inbounds i8, ptr %23, i64 30
  %48 = load i8, ptr %47, align 2, !tbaa !24, !range !22, !noundef !23
  %49 = trunc nuw i8 %48 to i1
  br i1 %49, label %52, label %.thread63

.thread63:                                        ; preds = %44, %46
  %50 = or disjoint i32 %.048, 2
  %51 = getelementptr inbounds i8, ptr %23, i64 30
  store i8 1, ptr %51, align 2, !tbaa !24
  br label %52

52:                                               ; preds = %46, %41, %.thread63, %39
  %.1 = phi i32 [ %50, %.thread63 ], [ %.048, %41 ], [ %.048, %39 ], [ %.048, %46 ]
  %53 = and i32 %27, 4
  %.not58 = icmp eq i32 %53, 0
  br i1 %.not58, label %62, label %54

54:                                               ; preds = %52
  %55 = load i32, ptr %21, align 1, !tbaa !19
  %56 = and i32 %55, 8217
  %.not59 = icmp eq i32 %56, 0
  br i1 %.not59, label %62, label %57

57:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  %58 = getelementptr inbounds i8, ptr %23, i64 20
  %59 = load i32, ptr %58, align 4, !tbaa !25
  %60 = call i64 @read(i32 noundef %59, ptr noundef nonnull %3, i64 noundef 8) #5
  %61 = or i32 %.1, 4
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  %.pre = load i32, ptr %26, align 8, !tbaa !15
  br label %62

62:                                               ; preds = %54, %57, %52
  %63 = phi i32 [ %.pre, %57 ], [ %27, %54 ], [ %27, %52 ]
  %.2 = phi i32 [ %61, %57 ], [ %.1, %54 ], [ %.1, %52 ]
  %64 = and i32 %63, 8
  %.not60 = icmp eq i32 %64, 0
  br i1 %.not60, label %74, label %65

65:                                               ; preds = %62
  %66 = load i32, ptr %21, align 1, !tbaa !19
  %67 = and i32 %66, 8217
  %.not61 = icmp eq i32 %67, 0
  br i1 %.not61, label %74, label %.thread64

.thread64:                                        ; preds = %65
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  %68 = getelementptr inbounds i8, ptr %23, i64 20
  %69 = load i32, ptr %68, align 4, !tbaa !25
  %70 = call i64 @read(i32 noundef %69, ptr noundef nonnull %4, i64 noundef 8) #5
  %71 = or i32 %.2, 8
  %72 = load i64, ptr %4, align 8, !tbaa !26
  %73 = trunc i64 %72 to i32
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  br label %75

74:                                               ; preds = %65, %62
  %.not62 = icmp eq i32 %.2, 0
  br i1 %.not62, label %76, label %75

75:                                               ; preds = %.thread64, %74
  %.04769 = phi i32 [ %73, %.thread64 ], [ 0, %74 ]
  %.368 = phi i32 [ %71, %.thread64 ], [ %.2, %74 ]
  call void @pony_asio_event_send(ptr noundef nonnull %23, i32 noundef %.368, i32 noundef %.04769) #5
  br label %76

76:                                               ; preds = %74, %75, %.lr.ph
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !27

._crit_edge73:                                    ; preds = %._crit_edge, %7
  %77 = load i32, ptr %0, align 8, !tbaa !5
  %78 = call i32 @close(i32 noundef %77) #5
  %79 = getelementptr inbounds i8, ptr %0, i64 4
  %80 = load i32, ptr %79, align 4, !tbaa !28
  %81 = call i32 @close(i32 noundef %80) #5
  %82 = getelementptr inbounds i8, ptr %0, i64 1808
  call void @ponyint_messageq_destroy(ptr noundef nonnull %82, i1 noundef zeroext true) #5
  call void @ponyint_pool_free(i64 noundef 6, ptr noundef nonnull %0) #5
  call void (...) @pony_unregister_thread() #5
  call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %2) #5
  ret ptr null
}

declare void @ponyint_cpu_affinity(i32 noundef) local_unnamed_addr #1

declare i32 @ponyint_asio_get_cpu(...) local_unnamed_addr #1

declare void @ponyint_register_asio_thread(...) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @sigaddset(ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind
declare i32 @pthread_sigmask(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

declare i32 @epoll_wait(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nofree
declare noundef i64 @read(i32 noundef, ptr nocapture noundef, i64 noundef) local_unnamed_addr #4

declare void @pony_asio_event_send(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare hidden void @handle_queue(ptr noundef) local_unnamed_addr #3

declare i32 @close(i32 noundef) local_unnamed_addr #1

declare void @ponyint_messageq_destroy(ptr noundef, i1 noundef zeroext) local_unnamed_addr #1

declare void @pony_unregister_thread(...) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"asio_backend_t", !7, i64 0, !7, i64 4, !8, i64 8, !8, i64 776, !8, i64 1800, !10, i64 1808}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"messageq_t", !8, i64 0, !11, i64 8}
!11 = !{!"any pointer", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!8, !8, i64 0}
!15 = !{!16, !7, i64 24}
!16 = !{!"asio_event_t", !11, i64 0, !11, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !17, i64 28, !17, i64 29, !17, i64 30, !18, i64 32}
!17 = !{!"_Bool", !8, i64 0}
!18 = !{!"long", !8, i64 0}
!19 = !{!20, !7, i64 0}
!20 = !{!"epoll_event", !7, i64 0, !8, i64 4}
!21 = !{!16, !17, i64 29}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = !{!16, !17, i64 30}
!25 = !{!16, !7, i64 20}
!26 = !{!18, !18, i64 0}
!27 = distinct !{!27, !13}
!28 = !{!6, !7, i64 4}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass