; LLVM IR from NVIDIA/tensorflow :: tensorflow/examples/android/jni (yuv2rgb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL7YUV2RGBiii(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @ConvertYUV420SPToARGB8888HalfSize(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #2 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  store ptr %19, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #3
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = load i32, ptr %8, align 4, !tbaa !9
  %23 = mul nsw i32 %21, %22
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds i8, ptr %20, i64 %24
  store ptr %25, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #3
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %26, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %27 = load i32, ptr %7, align 4, !tbaa !9
  store i32 %27, ptr %12, align 4, !tbaa !9
  %28 = load i32, ptr %7, align 4, !tbaa !9
  %29 = ashr i32 %28, 1
  store i32 %29, ptr %7, align 4, !tbaa !9
  %30 = load i32, ptr %8, align 4, !tbaa !9
  %31 = ashr i32 %30, 1
  store i32 %31, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #3
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %32

32:                                               ; preds = %93, %4
  %33 = load i32, ptr %13, align 4, !tbaa !9
  %34 = load i32, ptr %8, align 4, !tbaa !9
  %35 = icmp slt i32 %33, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %32
  store i32 2, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #3
  br label %96

37:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #3
  store i32 0, ptr %15, align 4, !tbaa !9
  br label %38

38:                                               ; preds = %85, %37
  %39 = load i32, ptr %15, align 4, !tbaa !9
  %40 = load i32, ptr %7, align 4, !tbaa !9
  %41 = icmp slt i32 %39, %40
  br i1 %41, label %43, label %42

42:                                               ; preds = %38
  store i32 5, ptr %14, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #3
  br label %88

43:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #3
  %44 = load ptr, ptr %9, align 8, !tbaa !5
  %45 = getelementptr inbounds i8, ptr %44, i64 0
  %46 = load i8, ptr %45, align 1, !tbaa !11
  %47 = zext i8 %46 to i32
  %48 = load ptr, ptr %9, align 8, !tbaa !5
  %49 = getelementptr inbounds i8, ptr %48, i64 1
  %50 = load i8, ptr %49, align 1, !tbaa !11
  %51 = zext i8 %50 to i32
  %52 = add nsw i32 %47, %51
  %53 = load ptr, ptr %9, align 8, !tbaa !5
  %54 = load i32, ptr %12, align 4, !tbaa !9
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds i8, ptr %53, i64 %55
  %57 = load i8, ptr %56, align 1, !tbaa !11
  %58 = zext i8 %57 to i32
  %59 = add nsw i32 %52, %58
  %60 = load ptr, ptr %9, align 8, !tbaa !5
  %61 = load i32, ptr %12, align 4, !tbaa !9
  %62 = add nsw i32 %61, 1
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds i8, ptr %60, i64 %63
  %65 = load i8, ptr %64, align 1, !tbaa !11
  %66 = zext i8 %65 to i32
  %67 = add nsw i32 %59, %66
  %68 = ashr i32 %67, 2
  store i32 %68, ptr %16, align 4, !tbaa !9
  %69 = load ptr, ptr %9, align 8, !tbaa !5
  %70 = getelementptr inbounds i8, ptr %69, i64 2
  store ptr %70, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #3
  %71 = load ptr, ptr %10, align 8, !tbaa !5
  %72 = getelementptr inbounds i8, ptr %71, i32 1
  store ptr %72, ptr %10, align 8, !tbaa !5
  %73 = load i8, ptr %71, align 1, !tbaa !11
  %74 = zext i8 %73 to i32
  store i32 %74, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #3
  %75 = load ptr, ptr %10, align 8, !tbaa !5
  %76 = getelementptr inbounds i8, ptr %75, i32 1
  store ptr %76, ptr %10, align 8, !tbaa !5
  %77 = load i8, ptr %75, align 1, !tbaa !11
  %78 = zext i8 %77 to i32
  store i32 %78, ptr %18, align 4, !tbaa !9
  %79 = load i32, ptr %16, align 4, !tbaa !9
  %80 = load i32, ptr %18, align 4, !tbaa !9
  %81 = load i32, ptr %17, align 4, !tbaa !9
  %82 = call noundef i32 @_ZL7YUV2RGBiii(i32 noundef %79, i32 noundef %80, i32 noundef %81)
  %83 = load ptr, ptr %11, align 8, !tbaa !5
  %84 = getelementptr inbounds i32, ptr %83, i32 1
  store ptr %84, ptr %11, align 8, !tbaa !5
  store i32 %82, ptr %83, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #3
  br label %85

85:                                               ; preds = %43
  %86 = load i32, ptr %15, align 4, !tbaa !9
  %87 = add nsw i32 %86, 1
  store i32 %87, ptr %15, align 4, !tbaa !9
  br label %38, !llvm.loop !12

88:                                               ; preds = %42
  %89 = load i32, ptr %12, align 4, !tbaa !9
  %90 = load ptr, ptr %9, align 8, !tbaa !5
  %91 = sext i32 %89 to i64
  %92 = getelementptr inbounds i8, ptr %90, i64 %91
  store ptr %92, ptr %9, align 8, !tbaa !5
  br label %93

93:                                               ; preds = %88
  %94 = load i32, ptr %13, align 4, !tbaa !9
  %95 = add nsw i32 %94, 1
  store i32 %95, ptr %13, align 4, !tbaa !9
  br label %32, !llvm.loop !14

96:                                               ; preds = %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL7YUV2RGBiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @ConvertYUV420SPToARGB8888HalfSize(ptr nocapture noundef readonly %0, ptr nocapture noundef writeonly %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #1 {
  %5 = ashr i32 %2, 1
  %6 = ashr i32 %3, 1
  %7 = icmp sgt i32 %6, 0
  br i1 %7, label %.preheader.lr.ph, label %._crit_edge44

.preheader.lr.ph:                                 ; preds = %4
  %8 = icmp sgt i32 %5, 0
  %9 = sext i32 %2 to i64
  %10 = add nsw i32 %2, 1
  %11 = sext i32 %10 to i64
  br i1 %8, label %.preheader.us.preheader, label %._crit_edge44

.preheader.us.preheader:                          ; preds = %.preheader.lr.ph
  %12 = mul nsw i32 %3, %2
  %13 = zext nneg i32 %12 to i64
  %14 = getelementptr inbounds i8, ptr %0, i64 %13
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %._crit_edge.us
  %.043.us = phi ptr [ %41, %._crit_edge.us ], [ %0, %.preheader.us.preheader ]
  %.02942.us = phi i32 [ %42, %._crit_edge.us ], [ 0, %.preheader.us.preheader ]
  %.03041.us = phi ptr [ %35, %._crit_edge.us ], [ %14, %.preheader.us.preheader ]
  %.03240.us = phi ptr [ %39, %._crit_edge.us ], [ %1, %.preheader.us.preheader ]
  br label %15

15:                                               ; preds = %.preheader.us, %15
  %.137.us = phi ptr [ %.043.us, %.preheader.us ], [ %31, %15 ]
  %.02836.us = phi i32 [ 0, %.preheader.us ], [ %40, %15 ]
  %.13135.us = phi ptr [ %.03041.us, %.preheader.us ], [ %35, %15 ]
  %.13334.us = phi ptr [ %.03240.us, %.preheader.us ], [ %39, %15 ]
  %16 = load i8, ptr %.137.us, align 1, !tbaa !5
  %17 = zext i8 %16 to i32
  %18 = getelementptr inbounds i8, ptr %.137.us, i64 1
  %19 = load i8, ptr %18, align 1, !tbaa !5
  %20 = zext i8 %19 to i32
  %21 = add nuw nsw i32 %20, %17
  %22 = getelementptr inbounds i8, ptr %.137.us, i64 %9
  %23 = load i8, ptr %22, align 1, !tbaa !5
  %24 = zext i8 %23 to i32
  %25 = add nuw nsw i32 %21, %24
  %26 = getelementptr inbounds i8, ptr %.137.us, i64 %11
  %27 = load i8, ptr %26, align 1, !tbaa !5
  %28 = zext i8 %27 to i32
  %29 = add nuw nsw i32 %25, %28
  %30 = lshr i32 %29, 2
  %31 = getelementptr inbounds i8, ptr %.137.us, i64 2
  %32 = getelementptr inbounds i8, ptr %.13135.us, i64 1
  %33 = load i8, ptr %.13135.us, align 1, !tbaa !5
  %34 = zext i8 %33 to i32
  %35 = getelementptr inbounds i8, ptr %.13135.us, i64 2
  %36 = load i8, ptr %32, align 1, !tbaa !5
  %37 = zext i8 %36 to i32
  %38 = tail call noundef i32 @_ZL7YUV2RGBiii(i32 noundef %30, i32 noundef %37, i32 noundef %34)
  %39 = getelementptr inbounds i8, ptr %.13334.us, i64 4
  store i32 %38, ptr %.13334.us, align 4, !tbaa !8
  %40 = add nuw nsw i32 %.02836.us, 1
  %exitcond.not = icmp eq i32 %40, %5
  br i1 %exitcond.not, label %._crit_edge.us, label %15, !llvm.loop !10

._crit_edge.us:                                   ; preds = %15
  %41 = getelementptr inbounds i8, ptr %31, i64 %9
  %42 = add nuw nsw i32 %.02942.us, 1
  %exitcond48.not = icmp eq i32 %42, %6
  br i1 %exitcond48.not, label %._crit_edge44, label %.preheader.us, !llvm.loop !12

._crit_edge44:                                    ; preds = %._crit_edge.us, %.preheader.lr.ph, %4
  ret void
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass