; LLVM IR from asllop/AppOS :: event (event_internal)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QueueStruct = type { ptr, i64, i32, i32, i32 }
%struct.EventStruct = type { ptr, i64 }

@queueArray = external hidden global [128 x %struct.QueueStruct], align 16

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @enqueue_event(i8 noundef zeroext %0, ptr noundef %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  store i8 %0, ptr %4, align 1, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !8
  %6 = call i32 @core_lock(i32 noundef 2)
  %7 = load i8, ptr %4, align 1, !tbaa !5
  %8 = zext i8 %7 to i64
  %9 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %8
  %10 = getelementptr inbounds %struct.QueueStruct, ptr %9, i32 0, i32 4
  %11 = load i32, ptr %10, align 8, !tbaa !10
  %12 = icmp ult i32 %11, 512
  br i1 %12, label %13, label %71

13:                                               ; preds = %2
  %14 = load i8, ptr %4, align 1, !tbaa !5
  %15 = zext i8 %14 to i64
  %16 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %15
  %17 = getelementptr inbounds %struct.QueueStruct, ptr %16, i32 0, i32 4
  %18 = load i32, ptr %17, align 8, !tbaa !10
  %19 = add i32 %18, 1
  store i32 %19, ptr %17, align 8, !tbaa !10
  %20 = load ptr, ptr %5, align 8, !tbaa !8
  %21 = getelementptr inbounds %struct.EventStruct, ptr %20, i32 0, i32 0
  %22 = load ptr, ptr %21, align 8, !tbaa !14
  %23 = load i8, ptr %4, align 1, !tbaa !5
  %24 = zext i8 %23 to i64
  %25 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %24
  %26 = getelementptr inbounds %struct.QueueStruct, ptr %25, i32 0, i32 0
  %27 = load ptr, ptr %26, align 16, !tbaa !16
  %28 = load i8, ptr %4, align 1, !tbaa !5
  %29 = zext i8 %28 to i64
  %30 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %29
  %31 = getelementptr inbounds %struct.QueueStruct, ptr %30, i32 0, i32 3
  %32 = load i32, ptr %31, align 4, !tbaa !17
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds %struct.EventStruct, ptr %27, i64 %33
  %35 = getelementptr inbounds %struct.EventStruct, ptr %34, i32 0, i32 0
  store ptr %22, ptr %35, align 8, !tbaa !14
  %36 = load ptr, ptr %5, align 8, !tbaa !8
  %37 = getelementptr inbounds %struct.EventStruct, ptr %36, i32 0, i32 1
  %38 = load i64, ptr %37, align 8, !tbaa !18
  %39 = load i8, ptr %4, align 1, !tbaa !5
  %40 = zext i8 %39 to i64
  %41 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %40
  %42 = getelementptr inbounds %struct.QueueStruct, ptr %41, i32 0, i32 0
  %43 = load ptr, ptr %42, align 16, !tbaa !16
  %44 = load i8, ptr %4, align 1, !tbaa !5
  %45 = zext i8 %44 to i64
  %46 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %45
  %47 = getelementptr inbounds %struct.QueueStruct, ptr %46, i32 0, i32 3
  %48 = load i32, ptr %47, align 4, !tbaa !17
  %49 = sext i32 %48 to i64
  %50 = getelementptr inbounds %struct.EventStruct, ptr %43, i64 %49
  %51 = getelementptr inbounds %struct.EventStruct, ptr %50, i32 0, i32 1
  store i64 %38, ptr %51, align 8, !tbaa !18
  %52 = load i8, ptr %4, align 1, !tbaa !5
  %53 = zext i8 %52 to i64
  %54 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %53
  %55 = getelementptr inbounds %struct.QueueStruct, ptr %54, i32 0, i32 3
  %56 = load i32, ptr %55, align 4, !tbaa !17
  %57 = add nsw i32 %56, 1
  store i32 %57, ptr %55, align 4, !tbaa !17
  %58 = load i8, ptr %4, align 1, !tbaa !5
  %59 = zext i8 %58 to i64
  %60 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %59
  %61 = getelementptr inbounds %struct.QueueStruct, ptr %60, i32 0, i32 3
  %62 = load i32, ptr %61, align 4, !tbaa !17
  %63 = icmp sgt i32 %62, 511
  br i1 %63, label %64, label %69

64:                                               ; preds = %13
  %65 = load i8, ptr %4, align 1, !tbaa !5
  %66 = zext i8 %65 to i64
  %67 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %66
  %68 = getelementptr inbounds %struct.QueueStruct, ptr %67, i32 0, i32 3
  store i32 0, ptr %68, align 4, !tbaa !17
  br label %69

69:                                               ; preds = %64, %13
  %70 = call i32 @core_unlock(i32 noundef 2)
  store i1 true, ptr %3, align 1
  br label %73

71:                                               ; preds = %2
  %72 = call i32 @core_unlock(i32 noundef 2)
  store i1 false, ptr %3, align 1
  br label %73

73:                                               ; preds = %71, %69
  %74 = load i1, ptr %3, align 1
  ret i1 %74
}

declare i32 @core_lock(i32 noundef) #1

declare i32 @core_unlock(i32 noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !13, i64 24}
!11 = !{!"QueueStruct", !9, i64 0, !12, i64 8, !13, i64 16, !13, i64 20, !13, i64 24}
!12 = !{!"long", !6, i64 0}
!13 = !{!"int", !6, i64 0}
!14 = !{!15, !9, i64 0}
!15 = !{!"EventStruct", !9, i64 0, !12, i64 8}
!16 = !{!11, !9, i64 0}
!17 = !{!11, !13, i64 20}
!18 = !{!15, !12, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.QueueStruct = type { ptr, i64, i32, i32, i32 }
%struct.EventStruct = type { ptr, i64 }

@queueArray = external hidden local_unnamed_addr global [128 x %struct.QueueStruct], align 16

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @enqueue_event(i8 noundef zeroext %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
  %3 = tail call i32 @core_lock(i32 noundef 2) #2
  %4 = zext i8 %0 to i64
  %5 = getelementptr inbounds [128 x %struct.QueueStruct], ptr @queueArray, i64 0, i64 %4
  %6 = getelementptr inbounds i8, ptr %5, i64 24
  %7 = load i32, ptr %6, align 8, !tbaa !5
  %8 = icmp ult i32 %7, 512
  br i1 %8, label %9, label %22

9:                                                ; preds = %2
  %10 = add nuw nsw i32 %7, 1
  store i32 %10, ptr %6, align 8, !tbaa !5
  %11 = load ptr, ptr %1, align 8, !tbaa !12
  %12 = load ptr, ptr %5, align 16, !tbaa !14
  %13 = getelementptr inbounds i8, ptr %5, i64 20
  %14 = load i32, ptr %13, align 4, !tbaa !15
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds %struct.EventStruct, ptr %12, i64 %15
  store ptr %11, ptr %16, align 8, !tbaa !12
  %17 = getelementptr inbounds i8, ptr %1, i64 8
  %18 = load i64, ptr %17, align 8, !tbaa !16
  %19 = getelementptr inbounds %struct.EventStruct, ptr %12, i64 %15, i32 1
  store i64 %18, ptr %19, align 8, !tbaa !16
  %20 = add nsw i32 %14, 1
  %21 = icmp sgt i32 %14, 510
  %spec.select = select i1 %21, i32 0, i32 %20
  store i32 %spec.select, ptr %13, align 4, !tbaa !15
  br label %22

22:                                               ; preds = %2, %9
  %23 = tail call i32 @core_unlock(i32 noundef 2) #2
  ret i1 %8
}

declare i32 @core_lock(i32 noundef) local_unnamed_addr #1

declare i32 @core_unlock(i32 noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 24}
!6 = !{!"QueueStruct", !7, i64 0, !10, i64 8, !11, i64 16, !11, i64 20, !11, i64 24}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"EventStruct", !7, i64 0, !10, i64 8}
!14 = !{!6, !7, i64 0}
!15 = !{!6, !11, i64 20}
!16 = !{!13, !10, i64 8}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass