; LLVM IR from nbdd0121/GenerationalGC :: Handle.ll (ZN6norlit2gc6detail11HandleGroupC2Ev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.norlit::gc::detail::HandleGroup" = type { %"class.norlit::gc::Object.base", %"class.std::bitset", ptr, i64, [984 x ptr] }
%"class.norlit::gc::Object.base" = type <{ ptr, %union.anon, i8, i8, i8 }>
%union.anon = type { %struct.anon }
%struct.anon = type { ptr, ptr }
%"class.std::bitset" = type { %"struct.std::_Base_bitset" }
%"struct.std::_Base_bitset" = type { [16 x i64] }

@_ZTVN6norlit2gc6detail11HandleGroupE = external dso_local unnamed_addr constant { [8 x ptr] }, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6norlit2gc6detail11HandleGroupC2Ev(ptr noundef nonnull align 8 dereferenceable(8048) %0) unnamed_addr #1 align 2 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  %4 = load ptr, ptr %2, align 8
  call void @_ZN6norlit2gc6ObjectC2Ev(ptr noundef nonnull align 8 dereferenceable(27) %4)
  store ptr getelementptr inbounds inrange(-16, 48) ({ [8 x ptr] }, ptr @_ZTVN6norlit2gc6detail11HandleGroupE, i32 0, i32 0, i32 2), ptr %4, align 8, !tbaa !9
  %5 = getelementptr inbounds %"class.norlit::gc::detail::HandleGroup", ptr %4, i32 0, i32 1
  call void @_ZNSt6bitsetILm984EEC2Ev(ptr noundef nonnull align 8 dereferenceable(128) %5) #4
  %6 = getelementptr inbounds %"class.norlit::gc::detail::HandleGroup", ptr %4, i32 0, i32 2
  store ptr null, ptr %6, align 8, !tbaa !11
  %7 = getelementptr inbounds %"class.norlit::gc::detail::HandleGroup", ptr %4, i32 0, i32 3
  store i64 0, ptr %7, align 8, !tbaa !19
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #4
  store i64 0, ptr %3, align 8, !tbaa !20
  br label %8

8:                                                ; preds = %16, %1
  %9 = load i64, ptr %3, align 8, !tbaa !20
  %10 = icmp ult i64 %9, 984
  br i1 %10, label %12, label %11

11:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #4
  br label %19

12:                                               ; preds = %8
  %13 = getelementptr inbounds %"class.norlit::gc::detail::HandleGroup", ptr %4, i32 0, i32 4
  %14 = load i64, ptr %3, align 8, !tbaa !20
  %15 = getelementptr inbounds [984 x ptr], ptr %13, i64 0, i64 %14
  store ptr null, ptr %15, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %12
  %17 = load i64, ptr %3, align 8, !tbaa !20
  %18 = add i64 %17, 1
  store i64 %18, ptr %3, align 8, !tbaa !20
  br label %8, !llvm.loop !21

19:                                               ; preds = %11
  ret void
}

declare void @_ZN6norlit2gc6ObjectC2Ev(ptr noundef nonnull align 8 dereferenceable(27)) unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm984EEC2Ev(ptr noundef nonnull align 8 dereferenceable(128)) unnamed_addr #3 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"vtable pointer", !8, i64 0}
!11 = !{!12, !6, i64 160}
!12 = !{!"_ZTSN6norlit2gc6detail11HandleGroupE", !13, i64 0, !16, i64 32, !6, i64 160, !18, i64 168, !7, i64 176}
!13 = !{!"_ZTSN6norlit2gc6ObjectE", !7, i64 8, !14, i64 24, !15, i64 25, !7, i64 26}
!14 = !{!"_ZTSN6norlit2gc5SpaceE", !7, i64 0}
!15 = !{!"_ZTSN6norlit2gc6StatusE", !7, i64 0}
!16 = !{!"_ZTSSt6bitsetILm984EE", !17, i64 0}
!17 = !{!"_ZTSSt12_Base_bitsetILm16EE", !7, i64 0}
!18 = !{!"long", !7, i64 0}
!19 = !{!12, !18, i64 168}
!20 = !{!18, !18, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZTVN6norlit2gc6detail11HandleGroupE = external dso_local unnamed_addr constant { [8 x ptr] }, align 8

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6norlit2gc6detail11HandleGroupC2Ev(ptr noundef nonnull align 8 dereferenceable(8048) %0) unnamed_addr #0 align 2 {
  tail call void @_ZN6norlit2gc6ObjectC2Ev(ptr noundef nonnull align 8 dereferenceable(27) %0)
  store ptr getelementptr inbounds inrange(-16, 48) (i8, ptr @_ZTVN6norlit2gc6detail11HandleGroupE, i64 16), ptr %0, align 8, !tbaa !5
  %2 = getelementptr inbounds i8, ptr %0, i64 32
  tail call void @_ZNSt6bitsetILm984EEC2Ev(ptr noundef nonnull align 8 dereferenceable(128) %2) #4
  %3 = getelementptr inbounds i8, ptr %0, i64 160
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(7888) %3, i8 0, i64 7888, i1 false)
  ret void
}

declare void @_ZN6norlit2gc6ObjectC2Ev(ptr noundef nonnull align 8 dereferenceable(27)) unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm984EEC2Ev(ptr noundef nonnull align 8 dereferenceable(128)) unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"vtable pointer", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LICMPass,LoopIdiomRecognizePass,LoopRotatePass,MemCpyOptPass,SROAPass,SimplifyCFGPass,TailCallElimPass