; LLVM IR from hydrabus/hydrafw :: src/common (alloc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.pool = type { ptr, i32, i8, i8, [128 x i8] }

@ram_pool = external hidden global %struct.pool, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @pool_free(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  %6 = alloca i32, align 4
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  %7 = load ptr, ptr %2, align 8, !tbaa !5
  %8 = icmp eq ptr %7, null
  br i1 %8, label %9, label %10

9:                                                ; preds = %1
  store i32 1, ptr %6, align 4
  br label %47

10:                                               ; preds = %1
  %11 = load ptr, ptr %2, align 8, !tbaa !5
  %12 = ptrtoint ptr %11 to i32
  %13 = load ptr, ptr @ram_pool, align 8, !tbaa !9
  %14 = ptrtoint ptr %13 to i32
  %15 = sub nsw i32 %12, %14
  %16 = load i32, ptr getelementptr inbounds (%struct.pool, ptr @ram_pool, i32 0, i32 1), align 8, !tbaa !12
  %17 = udiv i32 %15, %16
  %18 = trunc i32 %17 to i8
  store i8 %18, ptr %3, align 1, !tbaa !13
  %19 = load i8, ptr %3, align 1, !tbaa !13
  %20 = zext i8 %19 to i64
  %21 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (%struct.pool, ptr @ram_pool, i32 0, i32 4), i64 0, i64 %20
  %22 = load i8, ptr %21, align 1, !tbaa !13
  store i8 %22, ptr %4, align 1, !tbaa !13
  store i8 0, ptr %5, align 1, !tbaa !13
  br label %23

23:                                               ; preds = %37, %10
  %24 = load i8, ptr %5, align 1, !tbaa !13
  %25 = zext i8 %24 to i32
  %26 = load i8, ptr %4, align 1, !tbaa !13
  %27 = zext i8 %26 to i32
  %28 = icmp slt i32 %25, %27
  br i1 %28, label %29, label %40

29:                                               ; preds = %23
  %30 = load i8, ptr %3, align 1, !tbaa !13
  %31 = zext i8 %30 to i32
  %32 = load i8, ptr %5, align 1, !tbaa !13
  %33 = zext i8 %32 to i32
  %34 = add nsw i32 %31, %33
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (%struct.pool, ptr @ram_pool, i32 0, i32 4), i64 0, i64 %35
  store i8 0, ptr %36, align 1, !tbaa !13
  br label %37

37:                                               ; preds = %29
  %38 = load i8, ptr %5, align 1, !tbaa !13
  %39 = add i8 %38, 1
  store i8 %39, ptr %5, align 1, !tbaa !13
  br label %23, !llvm.loop !14

40:                                               ; preds = %23
  %41 = load i8, ptr %4, align 1, !tbaa !13
  %42 = zext i8 %41 to i32
  %43 = load i8, ptr getelementptr inbounds (%struct.pool, ptr @ram_pool, i32 0, i32 3), align 1, !tbaa !16
  %44 = zext i8 %43 to i32
  %45 = sub nsw i32 %44, %42
  %46 = trunc i32 %45 to i8
  store i8 %46, ptr getelementptr inbounds (%struct.pool, ptr @ram_pool, i32 0, i32 3), align 1, !tbaa !16
  store i32 0, ptr %6, align 4
  br label %47

47:                                               ; preds = %40, %9
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #2
  %48 = load i32, ptr %6, align 4
  switch i32 %48, label %50 [
    i32 0, label %49
    i32 1, label %49
  ]

49:                                               ; preds = %47, %47
  ret void

50:                                               ; preds = %47
  unreachable
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"pool", !6, i64 0, !11, i64 8, !7, i64 12, !7, i64 13, !7, i64 14}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!10, !7, i64 13}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.pool = type { ptr, i32, i8, i8, [128 x i8] }

@ram_pool = external hidden local_unnamed_addr global %struct.pool, align 8

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @pool_free(ptr noundef %0) local_unnamed_addr #0 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %48, label %3

3:                                                ; preds = %1
  %4 = ptrtoint ptr %0 to i64
  %5 = trunc i64 %4 to i32
  %6 = load ptr, ptr @ram_pool, align 8, !tbaa !5
  %7 = ptrtoint ptr %6 to i64
  %8 = trunc i64 %7 to i32
  %9 = sub nsw i32 %5, %8
  %10 = load i32, ptr getelementptr inbounds (i8, ptr @ram_pool, i64 8), align 8, !tbaa !11
  %11 = udiv i32 %9, %10
  %.mask = and i32 %11, 255
  %12 = zext nneg i32 %.mask to i64
  %13 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %12
  %14 = load i8, ptr %13, align 1, !tbaa !12
  %.not = icmp eq i8 %14, 0
  br i1 %.not, label %._crit_edge, label %iter.check

iter.check:                                       ; preds = %3
  %wide.trip.count = zext i8 %14 to i64
  %min.iters.check = icmp ult i8 %14, 8
  br i1 %min.iters.check, label %.lr.ph.preheader, label %vector.main.loop.iter.check

vector.main.loop.iter.check:                      ; preds = %iter.check
  %min.iters.check15 = icmp ult i8 %14, 32
  br i1 %min.iters.check15, label %vec.epilog.ph, label %vector.ph

vector.ph:                                        ; preds = %vector.main.loop.iter.check
  %n.vec = and i64 %wide.trip.count, 224
  %15 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %12
  %16 = getelementptr inbounds i8, ptr %15, i64 16
  store <16 x i8> zeroinitializer, ptr %15, align 1, !tbaa !12
  store <16 x i8> zeroinitializer, ptr %16, align 1, !tbaa !12
  %17 = icmp eq i64 %n.vec, 32
  br i1 %17, label %middle.block, label %vector.body.1, !llvm.loop !13

vector.body.1:                                    ; preds = %vector.ph
  %18 = add nuw nsw i64 %12, 32
  %19 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %18
  %20 = getelementptr inbounds i8, ptr %19, i64 16
  store <16 x i8> zeroinitializer, ptr %19, align 1, !tbaa !12
  store <16 x i8> zeroinitializer, ptr %20, align 1, !tbaa !12
  %21 = icmp eq i64 %n.vec, 64
  br i1 %21, label %middle.block, label %vector.body.2, !llvm.loop !13

vector.body.2:                                    ; preds = %vector.body.1
  %22 = add nuw nsw i64 %12, 64
  %23 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %22
  %24 = getelementptr inbounds i8, ptr %23, i64 16
  store <16 x i8> zeroinitializer, ptr %23, align 1, !tbaa !12
  store <16 x i8> zeroinitializer, ptr %24, align 1, !tbaa !12
  %25 = icmp eq i64 %n.vec, 96
  br i1 %25, label %middle.block, label %vector.body.3, !llvm.loop !13

vector.body.3:                                    ; preds = %vector.body.2
  %26 = add nuw nsw i64 %12, 96
  %27 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %26
  %28 = getelementptr inbounds i8, ptr %27, i64 16
  store <16 x i8> zeroinitializer, ptr %27, align 1, !tbaa !12
  store <16 x i8> zeroinitializer, ptr %28, align 1, !tbaa !12
  %29 = icmp eq i64 %n.vec, 128
  br i1 %29, label %middle.block, label %vector.body.4, !llvm.loop !13

vector.body.4:                                    ; preds = %vector.body.3
  %30 = add nuw nsw i64 %12, 128
  %31 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %30
  %32 = getelementptr inbounds i8, ptr %31, i64 16
  store <16 x i8> zeroinitializer, ptr %31, align 1, !tbaa !12
  store <16 x i8> zeroinitializer, ptr %32, align 1, !tbaa !12
  %33 = icmp eq i64 %n.vec, 160
  br i1 %33, label %middle.block, label %vector.body.5, !llvm.loop !13

vector.body.5:                                    ; preds = %vector.body.4
  %34 = add nuw nsw i64 %12, 160
  %35 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %34
  %36 = getelementptr inbounds i8, ptr %35, i64 16
  store <16 x i8> zeroinitializer, ptr %35, align 1, !tbaa !12
  store <16 x i8> zeroinitializer, ptr %36, align 1, !tbaa !12
  %37 = icmp eq i64 %n.vec, 192
  br i1 %37, label %middle.block, label %vector.body.6, !llvm.loop !13

vector.body.6:                                    ; preds = %vector.body.5
  %38 = add nuw nsw i64 %12, 192
  %39 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %38
  %40 = getelementptr inbounds i8, ptr %39, i64 16
  store <16 x i8> zeroinitializer, ptr %39, align 1, !tbaa !12
  store <16 x i8> zeroinitializer, ptr %40, align 1, !tbaa !12
  br label %middle.block

middle.block:                                     ; preds = %vector.body.6, %vector.body.5, %vector.body.4, %vector.body.3, %vector.body.2, %vector.body.1, %vector.ph
  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
  br i1 %cmp.n, label %._crit_edge, label %vec.epilog.iter.check

vec.epilog.iter.check:                            ; preds = %middle.block
  %n.vec.remaining = and i64 %wide.trip.count, 24
  %min.epilog.iters.check = icmp eq i64 %n.vec.remaining, 0
  br i1 %min.epilog.iters.check, label %.lr.ph.preheader, label %vec.epilog.ph

vec.epilog.ph:                                    ; preds = %vector.main.loop.iter.check, %vec.epilog.iter.check
  %vec.epilog.resume.val = phi i64 [ %n.vec, %vec.epilog.iter.check ], [ 0, %vector.main.loop.iter.check ]
  %n.vec17 = and i64 %wide.trip.count, 248
  br label %vec.epilog.vector.body

vec.epilog.vector.body:                           ; preds = %vec.epilog.vector.body, %vec.epilog.ph
  %index18 = phi i64 [ %vec.epilog.resume.val, %vec.epilog.ph ], [ %index.next19, %vec.epilog.vector.body ]
  %41 = add nuw nsw i64 %index18, %12
  %42 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %41
  store <8 x i8> zeroinitializer, ptr %42, align 1, !tbaa !12
  %index.next19 = add nuw i64 %index18, 8
  %43 = icmp eq i64 %index.next19, %n.vec17
  br i1 %43, label %vec.epilog.middle.block, label %vec.epilog.vector.body, !llvm.loop !17

vec.epilog.middle.block:                          ; preds = %vec.epilog.vector.body
  %cmp.n20 = icmp eq i64 %n.vec17, %wide.trip.count
  br i1 %cmp.n20, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %vec.epilog.middle.block, %iter.check, %vec.epilog.iter.check
  %indvars.iv12.ph = phi i64 [ 0, %iter.check ], [ %n.vec, %vec.epilog.iter.check ], [ %n.vec17, %vec.epilog.middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv12 = phi i64 [ %indvars.iv.next13, %.lr.ph ], [ %indvars.iv12.ph, %.lr.ph.preheader ]
  %44 = add nuw nsw i64 %indvars.iv12, %12
  %45 = getelementptr inbounds [128 x i8], ptr getelementptr inbounds (i8, ptr @ram_pool, i64 14), i64 0, i64 %44
  store i8 0, ptr %45, align 1, !tbaa !12
  %indvars.iv.next13 = add nuw nsw i64 %indvars.iv12, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next13, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !18

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %vec.epilog.middle.block, %3
  %46 = load i8, ptr getelementptr inbounds (i8, ptr @ram_pool, i64 13), align 1, !tbaa !19
  %47 = sub i8 %46, %14
  store i8 %47, ptr getelementptr inbounds (i8, ptr @ram_pool, i64 13), align 1, !tbaa !19
  br label %48

48:                                               ; preds = %1, %._crit_edge
  ret void
}

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pool", !7, i64 0, !10, i64 8, !8, i64 12, !8, i64 13, !8, i64 14}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14, !15, !16}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!"llvm.loop.isvectorized", i32 1}
!16 = !{!"llvm.loop.unroll.runtime.disable"}
!17 = distinct !{!17, !14, !15, !16}
!18 = distinct !{!18, !14, !16, !15}
!19 = !{!6, !8, i64 13}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass