; LLVM IR from cieslarmichal/rpg :: src/Tile.ll (ZN4TileC2EN2sf7Vector2IfEEbb)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.sf::Vector2" = type { float, float }
%class.Tile = type <{ i32, i32, i32, i32, i8, i8, [2 x i8] }>

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_ZN4TileC2EN2sf7Vector2IfEEbb(ptr noundef nonnull align 4 dereferenceable(18) %0, <2 x float> %1, i1 noundef zeroext %2, i1 noundef zeroext %3) unnamed_addr #0 align 2 {
  %5 = alloca %"class.sf::Vector2", align 4
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  store <2 x float> %1, ptr %5, align 4
  store ptr %0, ptr %6, align 8, !tbaa !5
  %9 = zext i1 %2 to i8
  store i8 %9, ptr %7, align 1, !tbaa !9
  %10 = zext i1 %3 to i8
  store i8 %10, ptr %8, align 1, !tbaa !9
  %11 = load ptr, ptr %6, align 8
  %12 = getelementptr inbounds %class.Tile, ptr %11, i32 0, i32 0
  %13 = getelementptr inbounds %"class.sf::Vector2", ptr %5, i32 0, i32 0
  %14 = load float, ptr %13, align 4, !tbaa !11
  %15 = fptosi float %14 to i32
  store i32 %15, ptr %12, align 4, !tbaa !14
  %16 = getelementptr inbounds %class.Tile, ptr %11, i32 0, i32 1
  %17 = getelementptr inbounds %"class.sf::Vector2", ptr %5, i32 0, i32 1
  %18 = load float, ptr %17, align 4, !tbaa !17
  %19 = fptosi float %18 to i32
  store i32 %19, ptr %16, align 4, !tbaa !18
  %20 = getelementptr inbounds %class.Tile, ptr %11, i32 0, i32 2
  store i32 40, ptr %20, align 4, !tbaa !19
  %21 = getelementptr inbounds %class.Tile, ptr %11, i32 0, i32 3
  store i32 40, ptr %21, align 4, !tbaa !20
  %22 = getelementptr inbounds %class.Tile, ptr %11, i32 0, i32 4
  %23 = load i8, ptr %7, align 1, !tbaa !9, !range !21, !noundef !22
  %24 = trunc i8 %23 to i1
  %25 = zext i1 %24 to i8
  store i8 %25, ptr %22, align 4, !tbaa !23
  %26 = getelementptr inbounds %class.Tile, ptr %11, i32 0, i32 5
  %27 = load i8, ptr %8, align 1, !tbaa !9, !range !21, !noundef !22
  %28 = trunc i8 %27 to i1
  %29 = zext i1 %28 to i8
  store i8 %29, ptr %26, align 1, !tbaa !24
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTSN2sf7Vector2IfEE", !13, i64 0, !13, i64 4}
!13 = !{!"float", !7, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"_ZTS4Tile", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12, !10, i64 16, !10, i64 17}
!16 = !{!"int", !7, i64 0}
!17 = !{!12, !13, i64 4}
!18 = !{!15, !16, i64 4}
!19 = !{!15, !16, i64 8}
!20 = !{!15, !16, i64 12}
!21 = !{i8 0, i8 2}
!22 = !{}
!23 = !{!15, !10, i64 16}
!24 = !{!15, !10, i64 17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local void @_ZN4TileC2EN2sf7Vector2IfEEbb(ptr nocapture noundef nonnull writeonly align 4 dereferenceable(18) %0, <2 x float> %1, i1 noundef zeroext %2, i1 noundef zeroext %3) unnamed_addr #0 align 2 {
  %5 = zext i1 %2 to i8
  %6 = zext i1 %3 to i8
  %7 = fptosi <2 x float> %1 to <2 x i32>
  store <2 x i32> %7, ptr %0, align 4, !tbaa !5
  %8 = getelementptr inbounds i8, ptr %0, i64 8
  store i32 40, ptr %8, align 4, !tbaa !9
  %9 = getelementptr inbounds i8, ptr %0, i64 12
  store i32 40, ptr %9, align 4, !tbaa !12
  %10 = getelementptr inbounds i8, ptr %0, i64 16
  store i8 %5, ptr %10, align 4, !tbaa !13
  %11 = getelementptr inbounds i8, ptr %0, i64 17
  store i8 %6, ptr %11, align 1, !tbaa !14
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"_ZTS4Tile", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !11, i64 16, !11, i64 17}
!11 = !{!"bool", !7, i64 0}
!12 = !{!10, !6, i64 12}
!13 = !{!10, !11, i64 16}
!14 = !{!10, !11, i64 17}


; Effective O3 passes: EarlyCSEPass,InstCombinePass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass