; LLVM IR from cvra/robot-software :: sensor-firmware/src/vl6180x (vl6180x)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @vl6180x_read_register(ptr noundef, i16 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @vl6180x_measure_distance(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  br label %7

7:                                                ; preds = %10, %2
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = call zeroext i8 @vl6180x_read_register(ptr noundef %8, i16 noundef zeroext 77)
  store i8 %9, ptr %5, align 1, !tbaa !9
  br label %10

10:                                               ; preds = %7
  %11 = load i8, ptr %5, align 1, !tbaa !9
  %12 = zext i8 %11 to i32
  %13 = and i32 %12, 1
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %7, label %15, !llvm.loop !10

15:                                               ; preds = %10
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  call void @vl6180x_write_register(ptr noundef %16, i16 noundef zeroext 24, i8 noundef zeroext 1)
  br label %17

17:                                               ; preds = %20, %15
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = call zeroext i8 @vl6180x_read_register(ptr noundef %18, i16 noundef zeroext 79)
  store i8 %19, ptr %5, align 1, !tbaa !9
  br label %20

20:                                               ; preds = %17
  %21 = load i8, ptr %5, align 1, !tbaa !9
  %22 = zext i8 %21 to i32
  %23 = and i32 %22, 4
  %24 = icmp eq i32 %23, 0
  br i1 %24, label %17, label %25, !llvm.loop !12

25:                                               ; preds = %20
  %26 = load ptr, ptr %3, align 8, !tbaa !5
  %27 = call zeroext i8 @vl6180x_read_register(ptr noundef %26, i16 noundef zeroext 98)
  store i8 %27, ptr %6, align 1, !tbaa !9
  %28 = load i8, ptr %6, align 1, !tbaa !9
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  store i8 %28, ptr %29, align 1, !tbaa !9
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  call void @vl6180x_write_register(ptr noundef %30, i16 noundef zeroext 21, i8 noundef zeroext 7)
  br label %31

31:                                               ; preds = %34, %25
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = call zeroext i8 @vl6180x_read_register(ptr noundef %32, i16 noundef zeroext 77)
  store i8 %33, ptr %5, align 1, !tbaa !9
  br label %34

34:                                               ; preds = %31
  %35 = load i8, ptr %5, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = and i32 %36, 1
  %38 = icmp eq i32 %37, 0
  br i1 %38, label %31, label %39, !llvm.loop !13

39:                                               ; preds = %34
  %40 = load i8, ptr %5, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  %42 = ashr i32 %41, 4
  %43 = trunc i32 %42 to i8
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  ret i8 %43
}

declare void @vl6180x_write_register(ptr noundef, i16 noundef zeroext, i8 noundef zeroext) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!13 = distinct !{!13, !11}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare zeroext i8 @vl6180x_read_register(ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 16) i8 @vl6180x_measure_distance(ptr noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #1 {
  br label %3

3:                                                ; preds = %3, %2
  %4 = tail call zeroext i8 @vl6180x_read_register(ptr noundef %0, i16 noundef zeroext 77) #2
  %5 = and i8 %4, 1
  %6 = icmp eq i8 %5, 0
  br i1 %6, label %3, label %7, !llvm.loop !5

7:                                                ; preds = %3
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext 24, i8 noundef zeroext 1) #2
  br label %8

8:                                                ; preds = %8, %7
  %9 = tail call zeroext i8 @vl6180x_read_register(ptr noundef %0, i16 noundef zeroext 79) #2
  %10 = and i8 %9, 4
  %11 = icmp eq i8 %10, 0
  br i1 %11, label %8, label %12, !llvm.loop !7

12:                                               ; preds = %8
  %13 = tail call zeroext i8 @vl6180x_read_register(ptr noundef %0, i16 noundef zeroext 98) #2
  store i8 %13, ptr %1, align 1, !tbaa !8
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext 21, i8 noundef zeroext 7) #2
  br label %14

14:                                               ; preds = %14, %12
  %15 = tail call zeroext i8 @vl6180x_read_register(ptr noundef %0, i16 noundef zeroext 77) #2
  %16 = and i8 %15, 1
  %17 = icmp eq i8 %16, 0
  br i1 %17, label %14, label %18, !llvm.loop !11

18:                                               ; preds = %14
  %19 = lshr i8 %15, 4
  ret i8 %19
}

declare void @vl6180x_write_register(ptr noundef, i16 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = !{!9, !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass