; LLVM IR from ADJA/algos :: DataStructures/CartesianTree.ll (Z3addRP4nodeS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32, i32, ptr, ptr }

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5splitP4nodeiRS0_S1_(ptr noundef, i32 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3addRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = icmp eq ptr %6, null
  br i1 %7, label %8, label %11

8:                                                ; preds = %2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %9, ptr %10, align 8, !tbaa !5
  br label %53

11:                                               ; preds = %2
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.node, ptr %12, i32 0, i32 1
  %14 = load i32, ptr %13, align 4, !tbaa !9
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = load ptr, ptr %15, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.node, ptr %16, i32 0, i32 1
  %18 = load i32, ptr %17, align 4, !tbaa !9
  %19 = icmp sgt i32 %14, %18
  br i1 %19, label %20, label %32

20:                                               ; preds = %11
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = load ptr, ptr %21, align 8, !tbaa !5
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.node, ptr %23, i32 0, i32 0
  %25 = load i32, ptr %24, align 8, !tbaa !12
  %26 = load ptr, ptr %4, align 8, !tbaa !5
  %27 = getelementptr inbounds %struct.node, ptr %26, i32 0, i32 2
  %28 = load ptr, ptr %4, align 8, !tbaa !5
  %29 = getelementptr inbounds %struct.node, ptr %28, i32 0, i32 3
  call void @_Z5splitP4nodeiRS0_S1_(ptr noundef %22, i32 noundef %25, ptr noundef nonnull align 8 dereferenceable(8) %27, ptr noundef nonnull align 8 dereferenceable(8) %29)
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %30, ptr %31, align 8, !tbaa !5
  br label %52

32:                                               ; preds = %11
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = load ptr, ptr %33, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.node, ptr %34, i32 0, i32 0
  %36 = load i32, ptr %35, align 8, !tbaa !12
  %37 = load ptr, ptr %4, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.node, ptr %37, i32 0, i32 0
  %39 = load i32, ptr %38, align 8, !tbaa !12
  %40 = icmp slt i32 %36, %39
  br i1 %40, label %41, label %46

41:                                               ; preds = %32
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = load ptr, ptr %42, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.node, ptr %43, i32 0, i32 3
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_Z3addRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %44, ptr noundef %45)
  br label %51

46:                                               ; preds = %32
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = load ptr, ptr %47, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.node, ptr %48, i32 0, i32 2
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_Z3addRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %49, ptr noundef %50)
  br label %51

51:                                               ; preds = %46, %41
  br label %52

52:                                               ; preds = %51, %20
  br label %53

53:                                               ; preds = %52, %8
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"_ZTS4node", !11, i64 0, !11, i64 4, !6, i64 8, !6, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5splitP4nodeiRS0_S1_(ptr noundef, i32 noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3addRP4nodeS0_(ptr nocapture noundef nonnull align 8 dereferenceable(8) %0, ptr noundef %1) local_unnamed_addr #0 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %4 = icmp eq ptr %3, null
  br i1 %4, label %tailrecurse._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %5 = getelementptr inbounds i8, ptr %1, i64 4
  %6 = load i32, ptr %5, align 4, !tbaa !9
  %7 = getelementptr inbounds i8, ptr %3, i64 4
  %8 = load i32, ptr %7, align 4, !tbaa !9
  %9 = icmp sgt i32 %6, %8
  br i1 %9, label %._crit_edge, label %tailrecurse.backedge.preheader

tailrecurse.backedge.preheader:                   ; preds = %.lr.ph
  %10 = load i32, ptr %1, align 8, !tbaa !12
  br label %tailrecurse.backedge

11:                                               ; preds = %tailrecurse.backedge
  %12 = getelementptr inbounds i8, ptr %21, i64 4
  %13 = load i32, ptr %12, align 4, !tbaa !9
  %14 = icmp sgt i32 %6, %13
  br i1 %14, label %._crit_edge.loopexit, label %tailrecurse.backedge

._crit_edge.loopexit:                             ; preds = %11
  %.tr.be.le = getelementptr inbounds i8, ptr %18, i64 %.tr.be.v
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %.lr.ph
  %.lcssa = phi ptr [ %3, %.lr.ph ], [ %21, %._crit_edge.loopexit ]
  %.tr20.lcssa = phi ptr [ %0, %.lr.ph ], [ %.tr.be.le, %._crit_edge.loopexit ]
  %15 = load i32, ptr %1, align 8, !tbaa !12
  %16 = getelementptr inbounds i8, ptr %1, i64 8
  %17 = getelementptr inbounds i8, ptr %1, i64 16
  tail call void @_Z5splitP4nodeiRS0_S1_(ptr noundef nonnull %.lcssa, i32 noundef %15, ptr noundef nonnull align 8 dereferenceable(8) %16, ptr noundef nonnull align 8 dereferenceable(8) %17)
  br label %tailrecurse._crit_edge

tailrecurse.backedge:                             ; preds = %tailrecurse.backedge.preheader, %11
  %18 = phi ptr [ %21, %11 ], [ %3, %tailrecurse.backedge.preheader ]
  %19 = load i32, ptr %18, align 8, !tbaa !12
  %20 = icmp slt i32 %19, %10
  %.tr.be.v = select i1 %20, i64 16, i64 8
  %.tr.be = getelementptr inbounds i8, ptr %18, i64 %.tr.be.v
  %21 = load ptr, ptr %.tr.be, align 8, !tbaa !5
  %22 = icmp eq ptr %21, null
  br i1 %22, label %tailrecurse._crit_edge.loopexit, label %11

tailrecurse._crit_edge.loopexit:                  ; preds = %tailrecurse.backedge
  %.tr.be.le35 = getelementptr inbounds i8, ptr %18, i64 %.tr.be.v
  br label %tailrecurse._crit_edge

tailrecurse._crit_edge:                           ; preds = %tailrecurse._crit_edge.loopexit, %2, %._crit_edge
  %.tr20.lcssa.sink = phi ptr [ %.tr20.lcssa, %._crit_edge ], [ %0, %2 ], [ %.tr.be.le35, %tailrecurse._crit_edge.loopexit ]
  store ptr %1, ptr %.tr20.lcssa.sink, align 8, !tbaa !5
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"_ZTS4node", !11, i64 0, !11, i64 4, !6, i64 8, !6, i64 16}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !11, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass