; LLVM IR from jgaeddert/liquid-dsp :: sandbox (fec_hamming_test)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external global ptr, align 8
@liquid_c_ones_mod2 = external constant [256 x i8], align 16
@.str.2 = external hidden unnamed_addr constant [53 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [49 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [17 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [70 x i8], align 1

; Function Attrs: nounwind
declare i32 @fprintf(ptr noundef, ptr noundef, ...) #0

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @fec_hamming_decode_symbol(i32 noundef %0) #4 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  %9 = load i32, ptr %2, align 4, !tbaa !5
  %10 = icmp uge i32 %9, 32768
  br i1 %10, label %11, label %14

11:                                               ; preds = %1
  %12 = load ptr, ptr @stderr, align 8, !tbaa !9
  %13 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %12, ptr noundef @.str.2) #5
  call void @exit(i32 noundef 1) #6
  unreachable

14:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  %15 = load i32, ptr %2, align 4, !tbaa !5
  %16 = and i32 %15, 21845
  %17 = and i32 %16, 255
  %18 = zext i32 %17 to i64
  %19 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %18
  %20 = load i8, ptr %19, align 1, !tbaa !11
  %21 = zext i8 %20 to i32
  %22 = load i32, ptr %2, align 4, !tbaa !5
  %23 = and i32 %22, 21845
  %24 = lshr i32 %23, 8
  %25 = and i32 %24, 255
  %26 = zext i32 %25 to i64
  %27 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %26
  %28 = load i8, ptr %27, align 1, !tbaa !11
  %29 = zext i8 %28 to i32
  %30 = add nsw i32 %21, %29
  %31 = srem i32 %30, 2
  store i32 %31, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  %32 = load i32, ptr %2, align 4, !tbaa !5
  %33 = and i32 %32, 13107
  %34 = and i32 %33, 255
  %35 = zext i32 %34 to i64
  %36 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %35
  %37 = load i8, ptr %36, align 1, !tbaa !11
  %38 = zext i8 %37 to i32
  %39 = load i32, ptr %2, align 4, !tbaa !5
  %40 = and i32 %39, 13107
  %41 = lshr i32 %40, 8
  %42 = and i32 %41, 255
  %43 = zext i32 %42 to i64
  %44 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %43
  %45 = load i8, ptr %44, align 1, !tbaa !11
  %46 = zext i8 %45 to i32
  %47 = add nsw i32 %38, %46
  %48 = srem i32 %47, 2
  store i32 %48, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #5
  %49 = load i32, ptr %2, align 4, !tbaa !5
  %50 = and i32 %49, 3855
  %51 = and i32 %50, 255
  %52 = zext i32 %51 to i64
  %53 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %52
  %54 = load i8, ptr %53, align 1, !tbaa !11
  %55 = zext i8 %54 to i32
  %56 = load i32, ptr %2, align 4, !tbaa !5
  %57 = and i32 %56, 3855
  %58 = lshr i32 %57, 8
  %59 = and i32 %58, 255
  %60 = zext i32 %59 to i64
  %61 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %60
  %62 = load i8, ptr %61, align 1, !tbaa !11
  %63 = zext i8 %62 to i32
  %64 = add nsw i32 %55, %63
  %65 = srem i32 %64, 2
  store i32 %65, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %66 = load i32, ptr %2, align 4, !tbaa !5
  %67 = and i32 %66, 255
  %68 = and i32 %67, 255
  %69 = zext i32 %68 to i64
  %70 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %69
  %71 = load i8, ptr %70, align 1, !tbaa !11
  %72 = zext i8 %71 to i32
  %73 = load i32, ptr %2, align 4, !tbaa !5
  %74 = and i32 %73, 255
  %75 = lshr i32 %74, 8
  %76 = and i32 %75, 255
  %77 = zext i32 %76 to i64
  %78 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %77
  %79 = load i8, ptr %78, align 1, !tbaa !11
  %80 = zext i8 %79 to i32
  %81 = add nsw i32 %72, %80
  %82 = srem i32 %81, 2
  store i32 %82, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  %83 = load i32, ptr %6, align 4, !tbaa !5
  %84 = shl i32 %83, 3
  %85 = load i32, ptr %5, align 4, !tbaa !5
  %86 = shl i32 %85, 2
  %87 = or i32 %84, %86
  %88 = load i32, ptr %4, align 4, !tbaa !5
  %89 = shl i32 %88, 1
  %90 = or i32 %87, %89
  %91 = load i32, ptr %3, align 4, !tbaa !5
  %92 = or i32 %90, %91
  store i32 %92, ptr %7, align 4, !tbaa !5
  %93 = load i32, ptr %3, align 4, !tbaa !5
  %94 = load i32, ptr %4, align 4, !tbaa !5
  %95 = load i32, ptr %5, align 4, !tbaa !5
  %96 = load i32, ptr %6, align 4, !tbaa !5
  %97 = call i32 (ptr, ...) @printf(ptr noundef @.str.3, i32 noundef %93, i32 noundef %94, i32 noundef %95, i32 noundef %96)
  %98 = load i32, ptr %7, align 4, !tbaa !5
  %99 = call i32 (ptr, ...) @printf(ptr noundef @.str.4, i32 noundef %98)
  %100 = load i32, ptr %7, align 4, !tbaa !5
  %101 = icmp ne i32 %100, 0
  br i1 %101, label %102, label %115

102:                                              ; preds = %14
  %103 = load i32, ptr %7, align 4, !tbaa !5
  %104 = icmp ugt i32 %103, 15
  br i1 %104, label %105, label %108

105:                                              ; preds = %102
  %106 = load ptr, ptr @stderr, align 8, !tbaa !9
  %107 = call i32 (ptr, ptr, ...) @fprintf(ptr noundef %106, ptr noundef @.str.5) #5
  br label %114

108:                                              ; preds = %102
  %109 = load i32, ptr %7, align 4, !tbaa !5
  %110 = sub i32 15, %109
  %111 = shl i32 1, %110
  %112 = load i32, ptr %2, align 4, !tbaa !5
  %113 = xor i32 %112, %111
  store i32 %113, ptr %2, align 4, !tbaa !5
  br label %114

114:                                              ; preds = %108, %105
  br label %115

115:                                              ; preds = %114, %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %116 = load i32, ptr %2, align 4, !tbaa !5
  %117 = and i32 %116, 127
  %118 = load i32, ptr %2, align 4, !tbaa !5
  %119 = and i32 %118, 1792
  %120 = lshr i32 %119, 1
  %121 = or i32 %117, %120
  %122 = load i32, ptr %2, align 4, !tbaa !5
  %123 = and i32 %122, 4096
  %124 = lshr i32 %123, 2
  %125 = or i32 %121, %124
  store i32 %125, ptr %8, align 4, !tbaa !5
  %126 = load i32, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  ret i32 %126
}

attributes #0 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@stderr = external local_unnamed_addr global ptr, align 8
@liquid_c_ones_mod2 = external local_unnamed_addr constant [256 x i8], align 16
@.str.2 = external hidden unnamed_addr constant [53 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [49 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [17 x i8], align 1

; Function Attrs: nofree nounwind
declare noundef i32 @fprintf(ptr nocapture noundef, ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: noreturn nounwind
declare void @exit(i32 noundef) local_unnamed_addr #1

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local range(i32 0, 2048) i32 @fec_hamming_decode_symbol(i32 noundef %0) local_unnamed_addr #2 {
  %2 = icmp ugt i32 %0, 32767
  br i1 %2, label %3, label %6

3:                                                ; preds = %1
  %4 = load ptr, ptr @stderr, align 8, !tbaa !5
  %5 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %4, ptr noundef nonnull @.str.2) #3
  tail call void @exit(i32 noundef 1) #4
  unreachable

6:                                                ; preds = %1
  %7 = and i32 %0, 85
  %8 = zext nneg i32 %7 to i64
  %9 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %8
  %10 = load i8, ptr %9, align 1, !tbaa !9
  %11 = zext i8 %10 to i32
  %12 = lshr i32 %0, 8
  %13 = and i32 %12, 85
  %14 = zext nneg i32 %13 to i64
  %15 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %14
  %16 = load i8, ptr %15, align 1, !tbaa !9
  %17 = zext i8 %16 to i32
  %18 = add nuw nsw i32 %17, %11
  %19 = and i32 %18, 1
  %20 = and i32 %0, 51
  %21 = zext nneg i32 %20 to i64
  %22 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %21
  %23 = load i8, ptr %22, align 1, !tbaa !9
  %24 = zext i8 %23 to i32
  %25 = and i32 %12, 51
  %26 = zext nneg i32 %25 to i64
  %27 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %26
  %28 = load i8, ptr %27, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = add nuw nsw i32 %29, %24
  %31 = and i32 %30, 1
  %32 = and i32 %0, 15
  %33 = zext nneg i32 %32 to i64
  %34 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %33
  %35 = load i8, ptr %34, align 1, !tbaa !9
  %36 = zext i8 %35 to i32
  %37 = and i32 %12, 15
  %38 = zext nneg i32 %37 to i64
  %39 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %38
  %40 = load i8, ptr %39, align 1, !tbaa !9
  %41 = zext i8 %40 to i32
  %42 = add nuw nsw i32 %41, %36
  %43 = and i32 %42, 1
  %44 = and i32 %0, 255
  %45 = zext nneg i32 %44 to i64
  %46 = getelementptr inbounds [256 x i8], ptr @liquid_c_ones_mod2, i64 0, i64 %45
  %47 = load i8, ptr %46, align 1, !tbaa !9
  %48 = zext i8 %47 to i32
  %49 = load i8, ptr @liquid_c_ones_mod2, align 16, !tbaa !9
  %50 = zext i8 %49 to i32
  %51 = add nuw nsw i32 %50, %48
  %52 = and i32 %51, 1
  %53 = shl nuw nsw i32 %52, 3
  %54 = shl nuw nsw i32 %43, 2
  %55 = or disjoint i32 %53, %54
  %56 = shl nuw nsw i32 %31, 1
  %57 = or disjoint i32 %55, %56
  %58 = or disjoint i32 %57, %19
  %59 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.3, i32 noundef %19, i32 noundef %31, i32 noundef %43, i32 noundef %52)
  %60 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %58)
  %.not = icmp eq i32 %58, 0
  %61 = xor i32 %58, 15
  %62 = shl nuw nsw i32 1, %61
  %63 = select i1 %.not, i32 0, i32 %62
  %.0 = xor i32 %63, %0
  %64 = and i32 %.0, 127
  %65 = lshr i32 %.0, 1
  %66 = and i32 %65, 896
  %67 = or disjoint i32 %66, %64
  %68 = lshr i32 %.0, 2
  %69 = and i32 %68, 1024
  %70 = or disjoint i32 %67, %69
  ret i32 %70
}

attributes #0 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { cold nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass