; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_sem)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_event = type { i8, ptr, i16, i8, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

declare void @OS_Sched() #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @OSSemPost(ptr noundef %0) #2 {
  %2 = alloca i8, align 1
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  %6 = load ptr, ptr %3, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.os_event, ptr %6, i32 0, i32 0
  %8 = load i8, ptr %7, align 8, !tbaa !11
  %9 = zext i8 %8 to i32
  %10 = icmp ne i32 %9, 3
  br i1 %10, label %11, label %12

11:                                               ; preds = %1
  store i8 1, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %37

12:                                               ; preds = %1
  %13 = call i32 @OS_CPU_SR_Save()
  store i32 %13, ptr %4, align 4, !tbaa !9
  %14 = load ptr, ptr %3, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.os_event, ptr %14, i32 0, i32 3
  %16 = load i8, ptr %15, align 2, !tbaa !14
  %17 = zext i8 %16 to i32
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %23

19:                                               ; preds = %12
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %20, ptr noundef null, i8 noundef zeroext 1, i8 noundef zeroext 0)
  %22 = load i32, ptr %4, align 4, !tbaa !9
  call void @OS_CPU_SR_Restore(i32 noundef %22)
  call void @OS_Sched()
  store i8 0, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %37

23:                                               ; preds = %12
  %24 = load ptr, ptr %3, align 8, !tbaa !5
  %25 = getelementptr inbounds %struct.os_event, ptr %24, i32 0, i32 2
  %26 = load i16, ptr %25, align 8, !tbaa !15
  %27 = zext i16 %26 to i32
  %28 = icmp ult i32 %27, 65535
  br i1 %28, label %29, label %35

29:                                               ; preds = %23
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.os_event, ptr %30, i32 0, i32 2
  %32 = load i16, ptr %31, align 8, !tbaa !15
  %33 = add i16 %32, 1
  store i16 %33, ptr %31, align 8, !tbaa !15
  %34 = load i32, ptr %4, align 4, !tbaa !9
  call void @OS_CPU_SR_Restore(i32 noundef %34)
  store i8 0, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %37

35:                                               ; preds = %23
  %36 = load i32, ptr %4, align 4, !tbaa !9
  call void @OS_CPU_SR_Restore(i32 noundef %36)
  store i8 51, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %37

37:                                               ; preds = %35, %29, %19, %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %38 = load i8, ptr %2, align 1
  ret i8 %38
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"os_event", !7, i64 0, !6, i64 8, !13, i64 16, !7, i64 18, !7, i64 19}
!13 = !{!"short", !7, i64 0}
!14 = !{!12, !7, i64 18}
!15 = !{!12, !13, i64 16}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @OS_Sched() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 52) i8 @OSSemPost(ptr noundef %0) local_unnamed_addr #1 {
  %2 = load i8, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i8 %2, 3
  br i1 %.not, label %3, label %15

3:                                                ; preds = %1
  %4 = tail call i32 @OS_CPU_SR_Save() #2
  %5 = getelementptr inbounds i8, ptr %0, i64 18
  %6 = load i8, ptr %5, align 2, !tbaa !11
  %.not8 = icmp eq i8 %6, 0
  br i1 %.not8, label %9, label %7

7:                                                ; preds = %3
  %8 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef null, i8 noundef zeroext 1, i8 noundef zeroext 0) #2
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  tail call void @OS_Sched() #2
  br label %15

9:                                                ; preds = %3
  %10 = getelementptr inbounds i8, ptr %0, i64 16
  %11 = load i16, ptr %10, align 8, !tbaa !12
  %.not9 = icmp eq i16 %11, -1
  br i1 %.not9, label %14, label %12

12:                                               ; preds = %9
  %13 = add nuw i16 %11, 1
  store i16 %13, ptr %10, align 8, !tbaa !12
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  br label %15

14:                                               ; preds = %9
  tail call void @OS_CPU_SR_Restore(i32 noundef %4) #2
  br label %15

15:                                               ; preds = %1, %14, %12, %7
  %.0 = phi i8 [ 0, %7 ], [ 0, %12 ], [ 51, %14 ], [ 1, %1 ]
  ret i8 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"os_event", !7, i64 0, !9, i64 8, !10, i64 16, !7, i64 18, !7, i64 19}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!6, !7, i64 18}
!12 = !{!6, !10, i64 16}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass,TailCallElimPass