; LLVM IR from PaddlePaddle/Paddle :: paddle/common/ddim.ll (ZN6common6strideERKNS_4DDimE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.common::DDim" = type <{ %"class.common::Dim", i32, [4 x i8] }>
%"class.common::Dim" = type { %"class.common::Array" }
%"class.common::Array" = type { [9 x i64] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76)) #1 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZNK6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76), i32 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6common6strideERKNS_4DDimE(ptr dead_on_unwind noalias writable sret(%"class.common::DDim") align 8 %0, ptr noundef nonnull align 8 dereferenceable(76) %1) #3 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  store ptr %0, ptr %3, align 8
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @_ZN6common4DDimC1Ev(ptr noundef nonnull align 8 dereferenceable(76) %0)
  %6 = load ptr, ptr %4, align 8, !tbaa !5
  %7 = call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %6)
  %8 = getelementptr inbounds %"class.common::DDim", ptr %0, i32 0, i32 1
  store i32 %7, ptr %8, align 8, !tbaa !9
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %9)
  %11 = icmp sgt i32 %10, 0
  br i1 %11, label %12, label %17

12:                                               ; preds = %2
  %13 = load ptr, ptr %4, align 8, !tbaa !5
  %14 = call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %13)
  %15 = sub nsw i32 %14, 1
  %16 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %0, i32 noundef %15)
  store i64 1, ptr %16, align 8, !tbaa !14
  br label %17

17:                                               ; preds = %12, %2
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %18)
  %20 = sub nsw i32 %19, 2
  store i32 %20, ptr %5, align 4, !tbaa !16
  br label %21

21:                                               ; preds = %37, %17
  %22 = load i32, ptr %5, align 4, !tbaa !16
  %23 = icmp sge i32 %22, 0
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %40

25:                                               ; preds = %21
  %26 = load i32, ptr %5, align 4, !tbaa !16
  %27 = add nsw i32 %26, 1
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %0, i32 noundef %27)
  %29 = load i64, ptr %28, align 8, !tbaa !14
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = load i32, ptr %5, align 4, !tbaa !16
  %32 = add nsw i32 %31, 1
  %33 = call noundef i64 @_ZNK6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %30, i32 noundef %32)
  %34 = mul nsw i64 %29, %33
  %35 = load i32, ptr %5, align 4, !tbaa !16
  %36 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %0, i32 noundef %35)
  store i64 %34, ptr %36, align 8, !tbaa !14
  br label %37

37:                                               ; preds = %25
  %38 = load i32, ptr %5, align 4, !tbaa !16
  %39 = add nsw i32 %38, -1
  store i32 %39, ptr %5, align 4, !tbaa !16
  br label %21, !llvm.loop !17

40:                                               ; preds = %24
  ret void
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76), i32 noundef) #2 align 2

declare void @_ZN6common4DDimC1Ev(ptr)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !13, i64 72}
!10 = !{!"_ZTSN6common4DDimE", !11, i64 0, !13, i64 72}
!11 = !{!"_ZTSN6common3DimILi9EEE", !12, i64 0}
!12 = !{!"_ZTSN6common5ArrayIlLm9EEE", !7, i64 0}
!13 = !{!"int", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !7, i64 0}
!16 = !{!13, !13, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.common::DDim" = type <{ %"class.common::Dim", i32, [4 x i8] }>
%"class.common::Dim" = type { %"class.common::Array" }
%"class.common::Array" = type { [9 x i64] }

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZNK6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN6common6strideERKNS_4DDimE(ptr dead_on_unwind noalias writable sret(%"class.common::DDim") align 8 %0, ptr noundef nonnull align 8 dereferenceable(76) %1) local_unnamed_addr #2 {
  tail call void @_ZN6common4DDimC1Ev(ptr noundef nonnull align 8 dereferenceable(76) %0)
  %3 = tail call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %1)
  %4 = getelementptr inbounds i8, ptr %0, i64 72
  store i32 %3, ptr %4, align 8, !tbaa !5
  %5 = tail call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %1)
  %6 = icmp sgt i32 %5, 0
  br i1 %6, label %7, label %11

7:                                                ; preds = %2
  %8 = tail call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %1)
  %9 = add nsw i32 %8, -1
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %0, i32 noundef %9)
  store i64 1, ptr %10, align 8, !tbaa !12
  br label %11

11:                                               ; preds = %7, %2
  %12 = tail call noundef i32 @_ZNK6common4DDim4sizeEv(ptr noundef nonnull align 8 dereferenceable(76) %1)
  %13 = icmp sgt i32 %12, 1
  br i1 %13, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %11
  %14 = add nsw i32 %12, -2
  br label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %11
  ret void

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.09 = phi i32 [ %21, %.lr.ph ], [ %14, %.lr.ph.preheader ]
  %15 = add nuw nsw i32 %.09, 1
  %16 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %0, i32 noundef %15)
  %17 = load i64, ptr %16, align 8, !tbaa !12
  %18 = tail call noundef i64 @_ZNK6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %1, i32 noundef %15)
  %19 = mul nsw i64 %18, %17
  %20 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76) %0, i32 noundef %.09)
  store i64 %19, ptr %20, align 8, !tbaa !12
  %21 = add nsw i32 %.09, -1
  %.not = icmp eq i32 %.09, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph, !llvm.loop !14
}

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN6common4DDimixEi(ptr noundef nonnull align 8 dereferenceable(76), i32 noundef) local_unnamed_addr #1 align 2

declare void @_ZN6common4DDimC1Ev(ptr) local_unnamed_addr

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !11, i64 72}
!6 = !{!"_ZTSN6common4DDimE", !7, i64 0, !11, i64 72}
!7 = !{!"_ZTSN6common3DimILi9EEE", !8, i64 0}
!8 = !{!"_ZTSN6common5ArrayIlLm9EEE", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass