; LLVM IR from cvra/robot-software :: master-firmware/src/can (actuator_driver)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.actuator_driver_t = type { [33 x i8], %struct.parameter_namespace_s, %struct.parameter_s, %struct.parameter_s, %struct.parameter_s, %struct.parameter_s, i32, [2 x i8] }
%struct.parameter_namespace_s = type { ptr, i32, ptr, ptr, ptr, ptr }
%struct.parameter_s = type { ptr, ptr, ptr, i8, i8, i8, %union.anon }
%union.anon = type { %struct._param_val_str_s }
%struct._param_val_str_s = type { ptr, i16, i16 }

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @actuator_driver_prepare_uavcan_msg(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7) #0 {
  %9 = alloca i1, align 1
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca ptr, align 8
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  store ptr %0, ptr %10, align 8, !tbaa !5
  store ptr %1, ptr %11, align 8, !tbaa !5
  store ptr %2, ptr %12, align 8, !tbaa !5
  store ptr %3, ptr %13, align 8, !tbaa !5
  store ptr %4, ptr %14, align 8, !tbaa !5
  store ptr %5, ptr %15, align 8, !tbaa !5
  store ptr %6, ptr %16, align 8, !tbaa !5
  store ptr %7, ptr %17, align 8, !tbaa !5
  %18 = load ptr, ptr %11, align 8, !tbaa !5
  %19 = load ptr, ptr %10, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.actuator_driver_t, ptr %19, i32 0, i32 0
  %21 = getelementptr inbounds [33 x i8], ptr %20, i64 0, i64 0
  %22 = call zeroext i8 @bus_enumerator_get_can_id(ptr noundef %18, ptr noundef %21)
  %23 = zext i8 %22 to i32
  %24 = load ptr, ptr %12, align 8, !tbaa !5
  store i32 %23, ptr %24, align 4, !tbaa !9
  %25 = load ptr, ptr %12, align 8, !tbaa !5
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = icmp sgt i32 %26, 127
  br i1 %27, label %28, label %29

28:                                               ; preds = %8
  store i1 false, ptr %9, align 1
  br label %87

29:                                               ; preds = %8
  %30 = load ptr, ptr %10, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.actuator_driver_t, ptr %30, i32 0, i32 5
  %32 = call float @parameter_scalar_get(ptr noundef %31)
  %33 = load ptr, ptr %10, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.actuator_driver_t, ptr %33, i32 0, i32 7
  %35 = getelementptr inbounds [2 x i8], ptr %34, i64 0, i64 0
  %36 = load i8, ptr %35, align 4, !tbaa !11, !range !13, !noundef !14
  %37 = trunc i8 %36 to i1
  %38 = zext i1 %37 to i32
  %39 = sitofp i32 %38 to float
  %40 = fmul float %32, %39
  %41 = load ptr, ptr %13, align 8, !tbaa !5
  store float %40, ptr %41, align 4, !tbaa !15
  %42 = load ptr, ptr %10, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.actuator_driver_t, ptr %42, i32 0, i32 5
  %44 = call float @parameter_scalar_get(ptr noundef %43)
  %45 = load ptr, ptr %10, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.actuator_driver_t, ptr %45, i32 0, i32 7
  %47 = getelementptr inbounds [2 x i8], ptr %46, i64 0, i64 1
  %48 = load i8, ptr %47, align 1, !tbaa !11, !range !13, !noundef !14
  %49 = trunc i8 %48 to i1
  %50 = zext i1 %49 to i32
  %51 = sitofp i32 %50 to float
  %52 = fmul float %44, %51
  %53 = load ptr, ptr %14, align 8, !tbaa !5
  store float %52, ptr %53, align 4, !tbaa !15
  %54 = load ptr, ptr %10, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.actuator_driver_t, ptr %54, i32 0, i32 7
  %56 = getelementptr inbounds [2 x i8], ptr %55, i64 0, i64 0
  %57 = load i8, ptr %56, align 4, !tbaa !11, !range !13, !noundef !14
  %58 = trunc i8 %57 to i1
  %59 = load ptr, ptr %15, align 8, !tbaa !5
  %60 = zext i1 %58 to i8
  store i8 %60, ptr %59, align 1, !tbaa !11
  %61 = load ptr, ptr %10, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.actuator_driver_t, ptr %61, i32 0, i32 7
  %63 = getelementptr inbounds [2 x i8], ptr %62, i64 0, i64 1
  %64 = load i8, ptr %63, align 1, !tbaa !11, !range !13, !noundef !14
  %65 = trunc i8 %64 to i1
  %66 = load ptr, ptr %16, align 8, !tbaa !5
  %67 = zext i1 %65 to i8
  store i8 %67, ptr %66, align 1, !tbaa !11
  %68 = load ptr, ptr %10, align 8, !tbaa !5
  %69 = getelementptr inbounds %struct.actuator_driver_t, ptr %68, i32 0, i32 6
  %70 = load i32, ptr %69, align 8, !tbaa !17
  switch i32 %70, label %86 [
    i32 2, label %71
    i32 1, label %76
    i32 0, label %81
  ]

71:                                               ; preds = %29
  %72 = load ptr, ptr %10, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.actuator_driver_t, ptr %72, i32 0, i32 4
  %74 = call float @parameter_scalar_get(ptr noundef %73)
  %75 = load ptr, ptr %17, align 8, !tbaa !5
  store float %74, ptr %75, align 4, !tbaa !15
  br label %86

76:                                               ; preds = %29
  %77 = load ptr, ptr %10, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.actuator_driver_t, ptr %77, i32 0, i32 3
  %79 = call float @parameter_scalar_get(ptr noundef %78)
  %80 = load ptr, ptr %17, align 8, !tbaa !5
  store float %79, ptr %80, align 4, !tbaa !15
  br label %86

81:                                               ; preds = %29
  %82 = load ptr, ptr %10, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.actuator_driver_t, ptr %82, i32 0, i32 2
  %84 = call float @parameter_scalar_get(ptr noundef %83)
  %85 = load ptr, ptr %17, align 8, !tbaa !5
  store float %84, ptr %85, align 4, !tbaa !15
  br label %86

86:                                               ; preds = %81, %76, %71, %29
  store i1 true, ptr %9, align 1
  br label %87

87:                                               ; preds = %86, %28
  %88 = load i1, ptr %9, align 1
  ret i1 %88
}

declare zeroext i8 @bus_enumerator_get_can_id(ptr noundef, ptr noundef) #1

declare float @parameter_scalar_get(ptr noundef) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = !{!16, !16, i64 0}
!16 = !{!"float", !7, i64 0}
!17 = !{!18, !10, i64 280}
!18 = !{!"", !7, i64 0, !19, i64 40, !20, i64 88, !20, i64 136, !20, i64 184, !20, i64 232, !10, i64 280, !7, i64 284}
!19 = !{!"parameter_namespace_s", !6, i64 0, !10, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40}
!20 = !{!"parameter_s", !6, i64 0, !6, i64 8, !6, i64 16, !12, i64 24, !12, i64 25, !7, i64 26, !7, i64 32}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local noundef zeroext i1 @actuator_driver_prepare_uavcan_msg(ptr noundef %0, ptr noundef %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3, ptr nocapture noundef writeonly %4, ptr nocapture noundef writeonly %5, ptr nocapture noundef writeonly %6, ptr nocapture noundef writeonly %7) local_unnamed_addr #0 {
  %9 = tail call zeroext i8 @bus_enumerator_get_can_id(ptr noundef %1, ptr noundef %0) #2
  %10 = zext i8 %9 to i32
  store i32 %10, ptr %2, align 4, !tbaa !5
  %11 = icmp sgt i8 %9, -1
  br i1 %11, label %12, label %33

12:                                               ; preds = %8
  %13 = getelementptr inbounds i8, ptr %0, i64 232
  %14 = tail call float @parameter_scalar_get(ptr noundef nonnull %13) #2
  %15 = getelementptr inbounds i8, ptr %0, i64 284
  %16 = load i8, ptr %15, align 4, !tbaa !9, !range !11, !noundef !12
  %17 = uitofp nneg i8 %16 to float
  %18 = fmul float %14, %17
  store float %18, ptr %3, align 4, !tbaa !13
  %19 = tail call float @parameter_scalar_get(ptr noundef nonnull %13) #2
  %20 = getelementptr inbounds i8, ptr %0, i64 285
  %21 = load i8, ptr %20, align 1, !tbaa !9, !range !11, !noundef !12
  %22 = uitofp nneg i8 %21 to float
  %23 = fmul float %19, %22
  store float %23, ptr %4, align 4, !tbaa !13
  %24 = load i8, ptr %15, align 4, !tbaa !9, !range !11, !noundef !12
  store i8 %24, ptr %5, align 1, !tbaa !9
  %25 = load i8, ptr %20, align 1, !tbaa !9, !range !11, !noundef !12
  store i8 %25, ptr %6, align 1, !tbaa !9
  %26 = getelementptr inbounds i8, ptr %0, i64 280
  %27 = load i32, ptr %26, align 8, !tbaa !15
  %28 = icmp ult i32 %27, 3
  br i1 %28, label %switch.lookup, label %33

switch.lookup:                                    ; preds = %12
  %narrow = mul nuw nsw i32 %27, 48
  %29 = zext nneg i32 %narrow to i64
  %30 = getelementptr inbounds i8, ptr %0, i64 %29
  %31 = getelementptr inbounds i8, ptr %30, i64 88
  %32 = tail call float @parameter_scalar_get(ptr noundef nonnull %31) #2
  store float %32, ptr %7, align 4, !tbaa !13
  br label %33

33:                                               ; preds = %12, %switch.lookup, %8
  ret i1 %11
}

declare zeroext i8 @bus_enumerator_get_can_id(ptr noundef, ptr noundef) local_unnamed_addr #1

declare float @parameter_scalar_get(ptr noundef) local_unnamed_addr #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"_Bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = !{!14, !14, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = !{!16, !6, i64 280}
!16 = !{!"", !7, i64 0, !17, i64 40, !19, i64 88, !19, i64 136, !19, i64 184, !19, i64 232, !6, i64 280, !7, i64 284}
!17 = !{!"parameter_namespace_s", !18, i64 0, !6, i64 8, !18, i64 16, !18, i64 24, !18, i64 32, !18, i64 40}
!18 = !{!"any pointer", !7, i64 0}
!19 = !{!"parameter_s", !18, i64 0, !18, i64 8, !18, i64 16, !10, i64 24, !10, i64 25, !7, i64 26, !7, i64 32}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass