; LLVM IR from cvra/robot-software :: sensor-firmware/src/vl6180x (vl6180x)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.anon = type { i16, i8 }

@vl6180x_configure.init_tab = external hidden constant [37 x %struct.anon], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @vl6180x_read_register(ptr noundef, i16 noundef zeroext) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @vl6180x_write_register(ptr noundef, i16 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: nounwind uwtable
define dso_local void @vl6180x_configure(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  br label %5

5:                                                ; preds = %10, %1
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  %7 = call zeroext i8 @vl6180x_read_register(ptr noundef %6, i16 noundef zeroext 22)
  %8 = zext i8 %7 to i32
  %9 = icmp ne i32 %8, 1
  br i1 %9, label %10, label %11

10:                                               ; preds = %5
  br label %5, !llvm.loop !9

11:                                               ; preds = %5
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  call void @vl6180x_write_register(ptr noundef %12, i16 noundef zeroext 22, i8 noundef zeroext 0)
  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #3
  store i64 37, ptr %3, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store i64 0, ptr %4, align 8, !tbaa !11
  br label %13

13:                                               ; preds = %26, %11
  %14 = load i64, ptr %4, align 8, !tbaa !11
  %15 = icmp ult i64 %14, 37
  br i1 %15, label %16, label %29

16:                                               ; preds = %13
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = load i64, ptr %4, align 8, !tbaa !11
  %19 = getelementptr inbounds [37 x %struct.anon], ptr @vl6180x_configure.init_tab, i64 0, i64 %18
  %20 = getelementptr inbounds %struct.anon, ptr %19, i32 0, i32 0
  %21 = load i16, ptr %20, align 4, !tbaa !13
  %22 = load i64, ptr %4, align 8, !tbaa !11
  %23 = getelementptr inbounds [37 x %struct.anon], ptr @vl6180x_configure.init_tab, i64 0, i64 %22
  %24 = getelementptr inbounds %struct.anon, ptr %23, i32 0, i32 1
  %25 = load i8, ptr %24, align 2, !tbaa !16
  call void @vl6180x_write_register(ptr noundef %17, i16 noundef zeroext %21, i8 noundef zeroext %25)
  br label %26

26:                                               ; preds = %16
  %27 = load i64, ptr %4, align 8, !tbaa !11
  %28 = add i64 %27, 1
  store i64 %28, ptr %4, align 8, !tbaa !11
  br label %13, !llvm.loop !17

29:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #3
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"", !15, i64 0, !7, i64 2}
!15 = !{!"short", !7, i64 0}
!16 = !{!14, !7, i64 2}
!17 = distinct !{!17, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.anon = type { i16, i8 }

@vl6180x_configure.init_tab = external hidden local_unnamed_addr constant [37 x %struct.anon], align 16

declare zeroext i8 @vl6180x_read_register(ptr noundef, i16 noundef zeroext) local_unnamed_addr #0

declare void @vl6180x_write_register(ptr noundef, i16 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @vl6180x_configure(ptr noundef %0) local_unnamed_addr #1 {
  br label %2

2:                                                ; preds = %2, %1
  %3 = tail call zeroext i8 @vl6180x_read_register(ptr noundef %0, i16 noundef zeroext 22) #2
  %.not = icmp eq i8 %3, 1
  br i1 %.not, label %4, label %2, !llvm.loop !5

4:                                                ; preds = %2
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext 22, i8 noundef zeroext 0) #2
  %5 = load i16, ptr @vl6180x_configure.init_tab, align 16, !tbaa !7
  %6 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 2), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %5, i8 noundef zeroext %6) #2
  %7 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 4), align 4, !tbaa !7
  %8 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 6), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %7, i8 noundef zeroext %8) #2
  %9 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 8), align 8, !tbaa !7
  %10 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 10), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %9, i8 noundef zeroext %10) #2
  %11 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 12), align 4, !tbaa !7
  %12 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 14), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %11, i8 noundef zeroext %12) #2
  %13 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 16), align 16, !tbaa !7
  %14 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 18), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %13, i8 noundef zeroext %14) #2
  %15 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 20), align 4, !tbaa !7
  %16 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 22), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %15, i8 noundef zeroext %16) #2
  %17 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 24), align 8, !tbaa !7
  %18 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 26), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %17, i8 noundef zeroext %18) #2
  %19 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 28), align 4, !tbaa !7
  %20 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 30), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %19, i8 noundef zeroext %20) #2
  %21 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 32), align 16, !tbaa !7
  %22 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 34), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %21, i8 noundef zeroext %22) #2
  %23 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 36), align 4, !tbaa !7
  %24 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 38), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %23, i8 noundef zeroext %24) #2
  %25 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 40), align 8, !tbaa !7
  %26 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 42), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %25, i8 noundef zeroext %26) #2
  %27 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 44), align 4, !tbaa !7
  %28 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 46), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %27, i8 noundef zeroext %28) #2
  %29 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 48), align 16, !tbaa !7
  %30 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 50), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %29, i8 noundef zeroext %30) #2
  %31 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 52), align 4, !tbaa !7
  %32 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 54), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %31, i8 noundef zeroext %32) #2
  %33 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 56), align 8, !tbaa !7
  %34 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 58), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %33, i8 noundef zeroext %34) #2
  %35 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 60), align 4, !tbaa !7
  %36 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 62), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %35, i8 noundef zeroext %36) #2
  %37 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 64), align 16, !tbaa !7
  %38 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 66), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %37, i8 noundef zeroext %38) #2
  %39 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 68), align 4, !tbaa !7
  %40 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 70), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %39, i8 noundef zeroext %40) #2
  %41 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 72), align 8, !tbaa !7
  %42 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 74), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %41, i8 noundef zeroext %42) #2
  %43 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 76), align 4, !tbaa !7
  %44 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 78), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %43, i8 noundef zeroext %44) #2
  %45 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 80), align 16, !tbaa !7
  %46 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 82), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %45, i8 noundef zeroext %46) #2
  %47 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 84), align 4, !tbaa !7
  %48 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 86), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %47, i8 noundef zeroext %48) #2
  %49 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 88), align 8, !tbaa !7
  %50 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 90), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %49, i8 noundef zeroext %50) #2
  %51 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 92), align 4, !tbaa !7
  %52 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 94), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %51, i8 noundef zeroext %52) #2
  %53 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 96), align 16, !tbaa !7
  %54 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 98), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %53, i8 noundef zeroext %54) #2
  %55 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 100), align 4, !tbaa !7
  %56 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 102), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %55, i8 noundef zeroext %56) #2
  %57 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 104), align 8, !tbaa !7
  %58 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 106), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %57, i8 noundef zeroext %58) #2
  %59 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 108), align 4, !tbaa !7
  %60 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 110), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %59, i8 noundef zeroext %60) #2
  %61 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 112), align 16, !tbaa !7
  %62 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 114), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %61, i8 noundef zeroext %62) #2
  %63 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 116), align 4, !tbaa !7
  %64 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 118), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %63, i8 noundef zeroext %64) #2
  %65 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 120), align 8, !tbaa !7
  %66 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 122), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %65, i8 noundef zeroext %66) #2
  %67 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 124), align 4, !tbaa !7
  %68 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 126), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %67, i8 noundef zeroext %68) #2
  %69 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 128), align 16, !tbaa !7
  %70 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 130), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %69, i8 noundef zeroext %70) #2
  %71 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 132), align 4, !tbaa !7
  %72 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 134), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %71, i8 noundef zeroext %72) #2
  %73 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 136), align 8, !tbaa !7
  %74 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 138), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %73, i8 noundef zeroext %74) #2
  %75 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 140), align 4, !tbaa !7
  %76 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 142), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %75, i8 noundef zeroext %76) #2
  %77 = load i16, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 144), align 16, !tbaa !7
  %78 = load i8, ptr getelementptr inbounds (i8, ptr @vl6180x_configure.init_tab, i64 146), align 2, !tbaa !12
  tail call void @vl6180x_write_register(ptr noundef %0, i16 noundef zeroext %77, i8 noundef zeroext %78) #2
  ret void
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !9, i64 0}
!8 = !{!"", !9, i64 0, !10, i64 2}
!9 = !{!"short", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!8, !10, i64 2}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,SROAPass,SimplifyCFGPass,TailCallElimPass