; LLVM IR from jgaeddert/liquid-dsp :: src/fec/bench (fecsoft_decode_benchmark)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [95 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [63 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @fecsoft_decode_bench(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) #0 {
  %7 = alloca ptr, align 8
  %8 = alloca ptr, align 8
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i64, align 8
  %17 = alloca i64, align 8
  %18 = alloca i64, align 8
  %19 = alloca i64, align 8
  %20 = alloca i64, align 8
  store ptr %0, ptr %7, align 8, !tbaa !5
  store ptr %1, ptr %8, align 8, !tbaa !5
  store ptr %2, ptr %9, align 8, !tbaa !5
  store i32 %3, ptr %10, align 4, !tbaa !9
  store i32 %4, ptr %11, align 4, !tbaa !9
  store ptr %5, ptr %12, align 8, !tbaa !5
  %21 = load i32, ptr %10, align 4, !tbaa !9
  %22 = icmp eq i32 %21, 11
  br i1 %22, label %71, label %23

23:                                               ; preds = %6
  %24 = load i32, ptr %10, align 4, !tbaa !9
  %25 = icmp eq i32 %24, 12
  br i1 %25, label %71, label %26

26:                                               ; preds = %23
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = icmp eq i32 %27, 13
  br i1 %28, label %71, label %29

29:                                               ; preds = %26
  %30 = load i32, ptr %10, align 4, !tbaa !9
  %31 = icmp eq i32 %30, 14
  br i1 %31, label %71, label %32

32:                                               ; preds = %29
  %33 = load i32, ptr %10, align 4, !tbaa !9
  %34 = icmp eq i32 %33, 15
  br i1 %34, label %71, label %35

35:                                               ; preds = %32
  %36 = load i32, ptr %10, align 4, !tbaa !9
  %37 = icmp eq i32 %36, 16
  br i1 %37, label %71, label %38

38:                                               ; preds = %35
  %39 = load i32, ptr %10, align 4, !tbaa !9
  %40 = icmp eq i32 %39, 17
  br i1 %40, label %71, label %41

41:                                               ; preds = %38
  %42 = load i32, ptr %10, align 4, !tbaa !9
  %43 = icmp eq i32 %42, 18
  br i1 %43, label %71, label %44

44:                                               ; preds = %41
  %45 = load i32, ptr %10, align 4, !tbaa !9
  %46 = icmp eq i32 %45, 19
  br i1 %46, label %71, label %47

47:                                               ; preds = %44
  %48 = load i32, ptr %10, align 4, !tbaa !9
  %49 = icmp eq i32 %48, 20
  br i1 %49, label %71, label %50

50:                                               ; preds = %47
  %51 = load i32, ptr %10, align 4, !tbaa !9
  %52 = icmp eq i32 %51, 21
  br i1 %52, label %71, label %53

53:                                               ; preds = %50
  %54 = load i32, ptr %10, align 4, !tbaa !9
  %55 = icmp eq i32 %54, 22
  br i1 %55, label %71, label %56

56:                                               ; preds = %53
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = icmp eq i32 %57, 23
  br i1 %58, label %71, label %59

59:                                               ; preds = %56
  %60 = load i32, ptr %10, align 4, !tbaa !9
  %61 = icmp eq i32 %60, 24
  br i1 %61, label %71, label %62

62:                                               ; preds = %59
  %63 = load i32, ptr %10, align 4, !tbaa !9
  %64 = icmp eq i32 %63, 25
  br i1 %64, label %71, label %65

65:                                               ; preds = %62
  %66 = load i32, ptr %10, align 4, !tbaa !9
  %67 = icmp eq i32 %66, 26
  br i1 %67, label %71, label %68

68:                                               ; preds = %65
  %69 = load i32, ptr %10, align 4, !tbaa !9
  %70 = icmp eq i32 %69, 27
  br i1 %70, label %71, label %77

71:                                               ; preds = %68, %65, %62, %59, %56, %53, %50, %47, %44, %41, %38, %35, %32, %29, %26, %23, %6
  %72 = call i32 (i32, ptr, i32, ptr, ...) @liquid_error_fl(i32 noundef 7, ptr noundef @.str, i32 noundef 70, ptr noundef @.str.1)
  %73 = load ptr, ptr %7, align 8, !tbaa !5
  %74 = call i32 @getrusage(i32 noundef 0, ptr noundef %73) #6
  %75 = load ptr, ptr %8, align 8, !tbaa !5
  %76 = load ptr, ptr %7, align 8, !tbaa !5
  call void @llvm.memmove.p0.p0.i64(ptr align 1 %75, ptr align 1 %76, i64 144, i1 false)
  br label %328

77:                                               ; preds = %68
  %78 = load i32, ptr %11, align 4, !tbaa !9
  %79 = zext i32 %78 to i64
  %80 = load ptr, ptr %9, align 8, !tbaa !5
  %81 = load i64, ptr %80, align 8, !tbaa !11
  %82 = udiv i64 %81, %79
  store i64 %82, ptr %80, align 8, !tbaa !11
  %83 = load i32, ptr %10, align 4, !tbaa !9
  switch i32 %83, label %136 [
    i32 1, label %84
    i32 2, label %88
    i32 3, label %92
    i32 4, label %96
    i32 5, label %100
    i32 6, label %104
    i32 11, label %108
    i32 12, label %112
    i32 13, label %116
    i32 14, label %120
    i32 15, label %124
    i32 16, label %124
    i32 17, label %124
    i32 18, label %124
    i32 19, label %124
    i32 20, label %124
    i32 21, label %128
    i32 22, label %128
    i32 23, label %128
    i32 24, label %128
    i32 25, label %128
    i32 26, label %128
    i32 27, label %132
  ]

84:                                               ; preds = %77
  %85 = load ptr, ptr %9, align 8, !tbaa !5
  %86 = load i64, ptr %85, align 8, !tbaa !11
  %87 = mul i64 %86, 50
  store i64 %87, ptr %85, align 8, !tbaa !11
  br label %137

88:                                               ; preds = %77
  %89 = load ptr, ptr %9, align 8, !tbaa !5
  %90 = load i64, ptr %89, align 8, !tbaa !11
  %91 = mul i64 %90, 20
  store i64 %91, ptr %89, align 8, !tbaa !11
  br label %137

92:                                               ; preds = %77
  %93 = load ptr, ptr %9, align 8, !tbaa !5
  %94 = load i64, ptr %93, align 8, !tbaa !11
  %95 = mul i64 %94, 10
  store i64 %95, ptr %93, align 8, !tbaa !11
  br label %137

96:                                               ; preds = %77
  %97 = load ptr, ptr %9, align 8, !tbaa !5
  %98 = load i64, ptr %97, align 8, !tbaa !11
  %99 = mul i64 %98, 1
  store i64 %99, ptr %97, align 8, !tbaa !11
  br label %137

100:                                              ; preds = %77
  %101 = load ptr, ptr %9, align 8, !tbaa !5
  %102 = load i64, ptr %101, align 8, !tbaa !11
  %103 = mul i64 %102, 1
  store i64 %103, ptr %101, align 8, !tbaa !11
  br label %137

104:                                              ; preds = %77
  %105 = load ptr, ptr %9, align 8, !tbaa !5
  %106 = load i64, ptr %105, align 8, !tbaa !11
  %107 = mul i64 %106, 1
  store i64 %107, ptr %105, align 8, !tbaa !11
  br label %137

108:                                              ; preds = %77
  %109 = load ptr, ptr %9, align 8, !tbaa !5
  %110 = load i64, ptr %109, align 8, !tbaa !11
  %111 = udiv i64 %110, 5
  store i64 %111, ptr %109, align 8, !tbaa !11
  br label %137

112:                                              ; preds = %77
  %113 = load ptr, ptr %9, align 8, !tbaa !5
  %114 = load i64, ptr %113, align 8, !tbaa !11
  %115 = udiv i64 %114, 50
  store i64 %115, ptr %113, align 8, !tbaa !11
  br label %137

116:                                              ; preds = %77
  %117 = load ptr, ptr %9, align 8, !tbaa !5
  %118 = load i64, ptr %117, align 8, !tbaa !11
  %119 = udiv i64 %118, 50
  store i64 %119, ptr %117, align 8, !tbaa !11
  br label %137

120:                                              ; preds = %77
  %121 = load ptr, ptr %9, align 8, !tbaa !5
  %122 = load i64, ptr %121, align 8, !tbaa !11
  %123 = udiv i64 %122, 800
  store i64 %123, ptr %121, align 8, !tbaa !11
  br label %137

124:                                              ; preds = %77, %77, %77, %77, %77, %77
  %125 = load ptr, ptr %9, align 8, !tbaa !5
  %126 = load i64, ptr %125, align 8, !tbaa !11
  %127 = udiv i64 %126, 5
  store i64 %127, ptr %125, align 8, !tbaa !11
  br label %137

128:                                              ; preds = %77, %77, %77, %77, %77, %77
  %129 = load ptr, ptr %9, align 8, !tbaa !5
  %130 = load i64, ptr %129, align 8, !tbaa !11
  %131 = udiv i64 %130, 50
  store i64 %131, ptr %129, align 8, !tbaa !11
  br label %137

132:                                              ; preds = %77
  %133 = load ptr, ptr %9, align 8, !tbaa !5
  %134 = load i64, ptr %133, align 8, !tbaa !11
  %135 = mul i64 %134, 1
  store i64 %135, ptr %133, align 8, !tbaa !11
  br label %137

136:                                              ; preds = %77
  br label %137

137:                                              ; preds = %136, %132, %128, %124, %120, %116, %112, %108, %104, %100, %96, %92, %88, %84
  %138 = load ptr, ptr %9, align 8, !tbaa !5
  %139 = load i64, ptr %138, align 8, !tbaa !11
  %140 = icmp ult i64 %139, 1
  br i1 %140, label %141, label %143

141:                                              ; preds = %137
  %142 = load ptr, ptr %9, align 8, !tbaa !5
  store i64 1, ptr %142, align 8, !tbaa !11
  br label %143

143:                                              ; preds = %141, %137
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #6
  %144 = load i32, ptr %10, align 4, !tbaa !9
  %145 = load ptr, ptr %12, align 8, !tbaa !5
  %146 = call ptr @fec_create(i32 noundef %144, ptr noundef %145)
  store ptr %146, ptr %13, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  %147 = load i32, ptr %10, align 4, !tbaa !9
  %148 = load i32, ptr %11, align 4, !tbaa !9
  %149 = call i32 @fec_get_enc_msg_length(i32 noundef %147, i32 noundef %148)
  store i32 %149, ptr %14, align 4, !tbaa !9
  %150 = load i32, ptr %11, align 4, !tbaa !9
  %151 = zext i32 %150 to i64
  %152 = call ptr @llvm.stacksave.p0()
  store ptr %152, ptr %15, align 8
  %153 = alloca i8, i64 %151, align 16
  store i64 %151, ptr %16, align 8
  %154 = load i32, ptr %14, align 4, !tbaa !9
  %155 = zext i32 %154 to i64
  %156 = alloca i8, i64 %155, align 16
  store i64 %155, ptr %17, align 8
  %157 = load i32, ptr %14, align 4, !tbaa !9
  %158 = mul i32 8, %157
  %159 = zext i32 %158 to i64
  %160 = alloca i8, i64 %159, align 16
  store i64 %159, ptr %18, align 8
  %161 = load i32, ptr %11, align 4, !tbaa !9
  %162 = zext i32 %161 to i64
  %163 = alloca i8, i64 %162, align 16
  store i64 %162, ptr %19, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #6
  store i64 0, ptr %20, align 8, !tbaa !11
  br label %164

164:                                              ; preds = %175, %143
  %165 = load i64, ptr %20, align 8, !tbaa !11
  %166 = load i32, ptr %11, align 4, !tbaa !9
  %167 = zext i32 %166 to i64
  %168 = icmp ult i64 %165, %167
  br i1 %168, label %169, label %178

169:                                              ; preds = %164
  %170 = call i32 @rand() #6
  %171 = and i32 %170, 255
  %172 = trunc i32 %171 to i8
  %173 = load i64, ptr %20, align 8, !tbaa !11
  %174 = getelementptr inbounds i8, ptr %153, i64 %173
  store i8 %172, ptr %174, align 1, !tbaa !13
  br label %175

175:                                              ; preds = %169
  %176 = load i64, ptr %20, align 8, !tbaa !11
  %177 = add i64 %176, 1
  store i64 %177, ptr %20, align 8, !tbaa !11
  br label %164, !llvm.loop !14

178:                                              ; preds = %164
  %179 = load ptr, ptr %13, align 8, !tbaa !5
  %180 = load i32, ptr %11, align 4, !tbaa !9
  %181 = call i32 @fec_encode(ptr noundef %179, i32 noundef %180, ptr noundef %153, ptr noundef %156)
  store i64 0, ptr %20, align 8, !tbaa !11
  br label %182

182:                                              ; preds = %292, %178
  %183 = load i64, ptr %20, align 8, !tbaa !11
  %184 = load i32, ptr %14, align 4, !tbaa !9
  %185 = zext i32 %184 to i64
  %186 = icmp ult i64 %183, %185
  br i1 %186, label %187, label %295

187:                                              ; preds = %182
  %188 = load i64, ptr %20, align 8, !tbaa !11
  %189 = getelementptr inbounds i8, ptr %156, i64 %188
  %190 = load i8, ptr %189, align 1, !tbaa !13
  %191 = zext i8 %190 to i32
  %192 = and i32 %191, 128
  %193 = icmp ne i32 %192, 0
  %194 = zext i1 %193 to i64
  %195 = select i1 %193, i32 255, i32 0
  %196 = trunc i32 %195 to i8
  %197 = load i64, ptr %20, align 8, !tbaa !11
  %198 = mul i64 8, %197
  %199 = add i64 %198, 0
  %200 = getelementptr inbounds i8, ptr %160, i64 %199
  store i8 %196, ptr %200, align 1, !tbaa !13
  %201 = load i64, ptr %20, align 8, !tbaa !11
  %202 = getelementptr inbounds i8, ptr %156, i64 %201
  %203 = load i8, ptr %202, align 1, !tbaa !13
  %204 = zext i8 %203 to i32
  %205 = and i32 %204, 64
  %206 = icmp ne i32 %205, 0
  %207 = zext i1 %206 to i64
  %208 = select i1 %206, i32 255, i32 0
  %209 = trunc i32 %208 to i8
  %210 = load i64, ptr %20, align 8, !tbaa !11
  %211 = mul i64 8, %210
  %212 = add i64 %211, 1
  %213 = getelementptr inbounds i8, ptr %160, i64 %212
  store i8 %209, ptr %213, align 1, !tbaa !13
  %214 = load i64, ptr %20, align 8, !tbaa !11
  %215 = getelementptr inbounds i8, ptr %156, i64 %214
  %216 = load i8, ptr %215, align 1, !tbaa !13
  %217 = zext i8 %216 to i32
  %218 = and i32 %217, 32
  %219 = icmp ne i32 %218, 0
  %220 = zext i1 %219 to i64
  %221 = select i1 %219, i32 255, i32 0
  %222 = trunc i32 %221 to i8
  %223 = load i64, ptr %20, align 8, !tbaa !11
  %224 = mul i64 8, %223
  %225 = add i64 %224, 2
  %226 = getelementptr inbounds i8, ptr %160, i64 %225
  store i8 %222, ptr %226, align 1, !tbaa !13
  %227 = load i64, ptr %20, align 8, !tbaa !11
  %228 = getelementptr inbounds i8, ptr %156, i64 %227
  %229 = load i8, ptr %228, align 1, !tbaa !13
  %230 = zext i8 %229 to i32
  %231 = and i32 %230, 16
  %232 = icmp ne i32 %231, 0
  %233 = zext i1 %232 to i64
  %234 = select i1 %232, i32 255, i32 0
  %235 = trunc i32 %234 to i8
  %236 = load i64, ptr %20, align 8, !tbaa !11
  %237 = mul i64 8, %236
  %238 = add i64 %237, 3
  %239 = getelementptr inbounds i8, ptr %160, i64 %238
  store i8 %235, ptr %239, align 1, !tbaa !13
  %240 = load i64, ptr %20, align 8, !tbaa !11
  %241 = getelementptr inbounds i8, ptr %156, i64 %240
  %242 = load i8, ptr %241, align 1, !tbaa !13
  %243 = zext i8 %242 to i32
  %244 = and i32 %243, 8
  %245 = icmp ne i32 %244, 0
  %246 = zext i1 %245 to i64
  %247 = select i1 %245, i32 255, i32 0
  %248 = trunc i32 %247 to i8
  %249 = load i64, ptr %20, align 8, !tbaa !11
  %250 = mul i64 8, %249
  %251 = add i64 %250, 4
  %252 = getelementptr inbounds i8, ptr %160, i64 %251
  store i8 %248, ptr %252, align 1, !tbaa !13
  %253 = load i64, ptr %20, align 8, !tbaa !11
  %254 = getelementptr inbounds i8, ptr %156, i64 %253
  %255 = load i8, ptr %254, align 1, !tbaa !13
  %256 = zext i8 %255 to i32
  %257 = and i32 %256, 4
  %258 = icmp ne i32 %257, 0
  %259 = zext i1 %258 to i64
  %260 = select i1 %258, i32 255, i32 0
  %261 = trunc i32 %260 to i8
  %262 = load i64, ptr %20, align 8, !tbaa !11
  %263 = mul i64 8, %262
  %264 = add i64 %263, 5
  %265 = getelementptr inbounds i8, ptr %160, i64 %264
  store i8 %261, ptr %265, align 1, !tbaa !13
  %266 = load i64, ptr %20, align 8, !tbaa !11
  %267 = getelementptr inbounds i8, ptr %156, i64 %266
  %268 = load i8, ptr %267, align 1, !tbaa !13
  %269 = zext i8 %268 to i32
  %270 = and i32 %269, 2
  %271 = icmp ne i32 %270, 0
  %272 = zext i1 %271 to i64
  %273 = select i1 %271, i32 255, i32 0
  %274 = trunc i32 %273 to i8
  %275 = load i64, ptr %20, align 8, !tbaa !11
  %276 = mul i64 8, %275
  %277 = add i64 %276, 6
  %278 = getelementptr inbounds i8, ptr %160, i64 %277
  store i8 %274, ptr %278, align 1, !tbaa !13
  %279 = load i64, ptr %20, align 8, !tbaa !11
  %280 = getelementptr inbounds i8, ptr %156, i64 %279
  %281 = load i8, ptr %280, align 1, !tbaa !13
  %282 = zext i8 %281 to i32
  %283 = and i32 %282, 1
  %284 = icmp ne i32 %283, 0
  %285 = zext i1 %284 to i64
  %286 = select i1 %284, i32 255, i32 0
  %287 = trunc i32 %286 to i8
  %288 = load i64, ptr %20, align 8, !tbaa !11
  %289 = mul i64 8, %288
  %290 = add i64 %289, 7
  %291 = getelementptr inbounds i8, ptr %160, i64 %290
  store i8 %287, ptr %291, align 1, !tbaa !13
  br label %292

292:                                              ; preds = %187
  %293 = load i64, ptr %20, align 8, !tbaa !11
  %294 = add i64 %293, 1
  store i64 %294, ptr %20, align 8, !tbaa !11
  br label %182, !llvm.loop !16

295:                                              ; preds = %182
  %296 = load ptr, ptr %7, align 8, !tbaa !5
  %297 = call i32 @getrusage(i32 noundef 0, ptr noundef %296) #6
  store i64 0, ptr %20, align 8, !tbaa !11
  br label %298

298:                                              ; preds = %316, %295
  %299 = load i64, ptr %20, align 8, !tbaa !11
  %300 = load ptr, ptr %9, align 8, !tbaa !5
  %301 = load i64, ptr %300, align 8, !tbaa !11
  %302 = icmp ult i64 %299, %301
  br i1 %302, label %303, label %319

303:                                              ; preds = %298
  %304 = load ptr, ptr %13, align 8, !tbaa !5
  %305 = load i32, ptr %11, align 4, !tbaa !9
  %306 = call i32 @fec_decode_soft(ptr noundef %304, i32 noundef %305, ptr noundef %160, ptr noundef %163)
  %307 = load ptr, ptr %13, align 8, !tbaa !5
  %308 = load i32, ptr %11, align 4, !tbaa !9
  %309 = call i32 @fec_decode_soft(ptr noundef %307, i32 noundef %308, ptr noundef %160, ptr noundef %163)
  %310 = load ptr, ptr %13, align 8, !tbaa !5
  %311 = load i32, ptr %11, align 4, !tbaa !9
  %312 = call i32 @fec_decode_soft(ptr noundef %310, i32 noundef %311, ptr noundef %160, ptr noundef %163)
  %313 = load ptr, ptr %13, align 8, !tbaa !5
  %314 = load i32, ptr %11, align 4, !tbaa !9
  %315 = call i32 @fec_decode_soft(ptr noundef %313, i32 noundef %314, ptr noundef %160, ptr noundef %163)
  br label %316

316:                                              ; preds = %303
  %317 = load i64, ptr %20, align 8, !tbaa !11
  %318 = add i64 %317, 1
  store i64 %318, ptr %20, align 8, !tbaa !11
  br label %298, !llvm.loop !17

319:                                              ; preds = %298
  %320 = load ptr, ptr %8, align 8, !tbaa !5
  %321 = call i32 @getrusage(i32 noundef 0, ptr noundef %320) #6
  %322 = load ptr, ptr %9, align 8, !tbaa !5
  %323 = load i64, ptr %322, align 8, !tbaa !11
  %324 = mul i64 %323, 4
  store i64 %324, ptr %322, align 8, !tbaa !11
  %325 = load ptr, ptr %13, align 8, !tbaa !5
  %326 = call i32 @fec_destroy(ptr noundef %325)
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #6
  %327 = load ptr, ptr %15, align 8
  call void @llvm.stackrestore.p0(ptr %327)
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #6
  br label %328

328:                                              ; preds = %319, %71
  ret void
}

declare i32 @liquid_error_fl(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ...) #1

; Function Attrs: nounwind
declare i32 @getrusage(i32 noundef, ptr noundef) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #4

declare ptr @fec_create(i32 noundef, ptr noundef) #1

declare i32 @fec_get_enc_msg_length(i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #5

; Function Attrs: nounwind
declare i32 @rand() #2

declare i32 @fec_encode(ptr noundef, i32 noundef, ptr noundef, ptr noundef) #1

declare i32 @fec_decode_soft(ptr noundef, i32 noundef, ptr noundef, ptr noundef) #1

declare i32 @fec_destroy(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #4

; Function Attrs: nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #5 = { nocallback nofree nosync nounwind willreturn }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [95 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [63 x i8], align 1
@switch.table.fecsoft_decode_bench = private unnamed_addr constant [3 x i64] [i64 50, i64 20, i64 10], align 8

; Function Attrs: nounwind uwtable
define dso_local void @fecsoft_decode_bench(ptr noundef %0, ptr noundef %1, ptr nocapture noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) local_unnamed_addr #0 {
  %7 = add i32 %3, -11
  %or.cond31 = icmp ult i32 %7, 17
  br i1 %or.cond31, label %8, label %11

8:                                                ; preds = %6
  %9 = tail call i32 (i32, ptr, i32, ptr, ...) @liquid_error_fl(i32 noundef 7, ptr noundef nonnull @.str, i32 noundef 70, ptr noundef nonnull @.str.1) #6
  %10 = tail call i32 @getrusage(i32 noundef 0, ptr noundef %0) #6
  tail call void @llvm.memmove.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(144) %1, ptr noundef nonnull align 1 dereferenceable(144) %0, i64 144, i1 false)
  br label %104

11:                                               ; preds = %6
  %12 = zext i32 %4 to i64
  %13 = load i64, ptr %2, align 8, !tbaa !5
  %14 = udiv i64 %13, %12
  store i64 %14, ptr %2, align 8, !tbaa !5
  %switch.tableidx = add i32 %3, -1
  %15 = icmp ult i32 %switch.tableidx, 3
  br i1 %15, label %switch.lookup, label %18

switch.lookup:                                    ; preds = %11
  %16 = zext nneg i32 %switch.tableidx to i64
  %switch.gep = getelementptr inbounds [3 x i64], ptr @switch.table.fecsoft_decode_bench, i64 0, i64 %16
  %switch.load = load i64, ptr %switch.gep, align 8
  %17 = mul i64 %14, %switch.load
  store i64 %17, ptr %2, align 8, !tbaa !5
  br label %18

18:                                               ; preds = %11, %switch.lookup
  %19 = phi i64 [ %14, %11 ], [ %17, %switch.lookup ]
  %20 = icmp eq i64 %19, 0
  br i1 %20, label %21, label %22

21:                                               ; preds = %18
  store i64 1, ptr %2, align 8, !tbaa !5
  br label %22

22:                                               ; preds = %21, %18
  %23 = tail call ptr @fec_create(i32 noundef %3, ptr noundef %5) #6
  %24 = tail call i32 @fec_get_enc_msg_length(i32 noundef %3, i32 noundef %4) #6
  %25 = tail call ptr @llvm.stacksave.p0()
  %26 = alloca i8, i64 %12, align 16
  %27 = zext i32 %24 to i64
  %28 = alloca i8, i64 %27, align 16
  %29 = shl i32 %24, 3
  %30 = zext i32 %29 to i64
  %31 = alloca i8, i64 %30, align 16
  %32 = alloca i8, i64 %12, align 16
  %umax = tail call i64 @llvm.umax.i64(i64 %12, i64 1)
  br label %33

33:                                               ; preds = %22, %33
  %.0123 = phi i64 [ 0, %22 ], [ %37, %33 ]
  %34 = tail call i32 @rand() #6
  %35 = trunc i32 %34 to i8
  %36 = getelementptr inbounds i8, ptr %26, i64 %.0123
  store i8 %35, ptr %36, align 1, !tbaa !9
  %37 = add nuw nsw i64 %.0123, 1
  %exitcond.not = icmp eq i64 %37, %umax
  br i1 %exitcond.not, label %38, label %33, !llvm.loop !10

38:                                               ; preds = %33
  %39 = call i32 @fec_encode(ptr noundef %23, i32 noundef %4, ptr noundef nonnull %26, ptr noundef nonnull %28) #6
  %.not = icmp eq i32 %24, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %38
  %min.iters.check = icmp ult i32 %24, 16
  br i1 %min.iters.check, label %.lr.ph.preheader132, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %27, 4294967280
  %invariant.gep = getelementptr i8, ptr %31, i64 -7
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %40 = getelementptr inbounds i8, ptr %28, i64 %index
  %wide.load = load <16 x i8>, ptr %40, align 16, !tbaa !9
  %41 = ashr <16 x i8> %wide.load, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
  %42 = shl nuw nsw i64 %index, 3
  %43 = shl <16 x i8> %wide.load, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  %44 = ashr <16 x i8> %43, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
  %45 = shl <16 x i8> %wide.load, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
  %46 = ashr <16 x i8> %45, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
  %47 = shl <16 x i8> %wide.load, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
  %48 = ashr <16 x i8> %47, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
  %49 = shl <16 x i8> %wide.load, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
  %50 = ashr <16 x i8> %49, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
  %51 = shl <16 x i8> %wide.load, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
  %52 = ashr <16 x i8> %51, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
  %53 = shl <16 x i8> %wide.load, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
  %54 = ashr <16 x i8> %53, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
  %55 = and <16 x i8> %wide.load, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
  %56 = sub nsw <16 x i8> zeroinitializer, %55
  %57 = or disjoint i64 %42, 7
  %gep = getelementptr i8, ptr %invariant.gep, i64 %57
  %58 = shufflevector <16 x i8> %41, <16 x i8> %44, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
  %59 = shufflevector <16 x i8> %46, <16 x i8> %48, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
  %60 = shufflevector <16 x i8> %50, <16 x i8> %52, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
  %61 = shufflevector <16 x i8> %54, <16 x i8> %56, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
  %62 = shufflevector <32 x i8> %58, <32 x i8> %59, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
  %63 = shufflevector <32 x i8> %60, <32 x i8> %61, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
  %interleaved.vec = shufflevector <64 x i8> %62, <64 x i8> %63, <128 x i32> <i32 0, i32 16, i32 32, i32 48, i32 64, i32 80, i32 96, i32 112, i32 1, i32 17, i32 33, i32 49, i32 65, i32 81, i32 97, i32 113, i32 2, i32 18, i32 34, i32 50, i32 66, i32 82, i32 98, i32 114, i32 3, i32 19, i32 35, i32 51, i32 67, i32 83, i32 99, i32 115, i32 4, i32 20, i32 36, i32 52, i32 68, i32 84, i32 100, i32 116, i32 5, i32 21, i32 37, i32 53, i32 69, i32 85, i32 101, i32 117, i32 6, i32 22, i32 38, i32 54, i32 70, i32 86, i32 102, i32 118, i32 7, i32 23, i32 39, i32 55, i32 71, i32 87, i32 103, i32 119, i32 8, i32 24, i32 40, i32 56, i32 72, i32 88, i32 104, i32 120, i32 9, i32 25, i32 41, i32 57, i32 73, i32 89, i32 105, i32 121, i32 10, i32 26, i32 42, i32 58, i32 74, i32 90, i32 106, i32 122, i32 11, i32 27, i32 43, i32 59, i32 75, i32 91, i32 107, i32 123, i32 12, i32 28, i32 44, i32 60, i32 76, i32 92, i32 108, i32 124, i32 13, i32 29, i32 45, i32 61, i32 77, i32 93, i32 109, i32 125, i32 14, i32 30, i32 46, i32 62, i32 78, i32 94, i32 110, i32 126, i32 15, i32 31, i32 47, i32 63, i32 79, i32 95, i32 111, i32 127>
  store <128 x i8> %interleaved.vec, ptr %gep, align 16, !tbaa !9
  %index.next = add nuw i64 %index, 16
  %64 = icmp eq i64 %index.next, %n.vec
  br i1 %64, label %middle.block, label %vector.body, !llvm.loop !12

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %n.vec, %27
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader132

.lr.ph.preheader132:                              ; preds = %middle.block, %.lr.ph.preheader
  %.1124.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader132, %.lr.ph
  %.1124 = phi i64 [ %90, %.lr.ph ], [ %.1124.ph, %.lr.ph.preheader132 ]
  %65 = getelementptr inbounds i8, ptr %28, i64 %.1124
  %66 = load i8, ptr %65, align 1, !tbaa !9
  %.lobit = ashr i8 %66, 7
  %67 = shl nuw nsw i64 %.1124, 3
  %68 = getelementptr inbounds i8, ptr %31, i64 %67
  store i8 %.lobit, ptr %68, align 8, !tbaa !9
  %69 = shl i8 %66, 1
  %sext = ashr i8 %69, 7
  %70 = or disjoint i64 %67, 1
  %71 = getelementptr inbounds i8, ptr %31, i64 %70
  store i8 %sext, ptr %71, align 1, !tbaa !9
  %72 = shl i8 %66, 2
  %sext117 = ashr i8 %72, 7
  %73 = or disjoint i64 %67, 2
  %74 = getelementptr inbounds i8, ptr %31, i64 %73
  store i8 %sext117, ptr %74, align 2, !tbaa !9
  %75 = shl i8 %66, 3
  %sext118 = ashr i8 %75, 7
  %76 = or disjoint i64 %67, 3
  %77 = getelementptr inbounds i8, ptr %31, i64 %76
  store i8 %sext118, ptr %77, align 1, !tbaa !9
  %78 = shl i8 %66, 4
  %sext119 = ashr i8 %78, 7
  %79 = or disjoint i64 %67, 4
  %80 = getelementptr inbounds i8, ptr %31, i64 %79
  store i8 %sext119, ptr %80, align 4, !tbaa !9
  %81 = shl i8 %66, 5
  %sext120 = ashr i8 %81, 7
  %82 = or disjoint i64 %67, 5
  %83 = getelementptr inbounds i8, ptr %31, i64 %82
  store i8 %sext120, ptr %83, align 1, !tbaa !9
  %84 = shl i8 %66, 6
  %sext121 = ashr i8 %84, 7
  %85 = or disjoint i64 %67, 6
  %86 = getelementptr inbounds i8, ptr %31, i64 %85
  store i8 %sext121, ptr %86, align 2, !tbaa !9
  %87 = and i8 %66, 1
  %sext122 = sub nsw i8 0, %87
  %88 = or disjoint i64 %67, 7
  %89 = getelementptr inbounds i8, ptr %31, i64 %88
  store i8 %sext122, ptr %89, align 1, !tbaa !9
  %90 = add nuw nsw i64 %.1124, 1
  %exitcond130.not = icmp eq i64 %90, %27
  br i1 %exitcond130.not, label %._crit_edge, label %.lr.ph, !llvm.loop !15

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %38
  %91 = call i32 @getrusage(i32 noundef 0, ptr noundef %0) #6
  %92 = load i64, ptr %2, align 8, !tbaa !5
  %.not129 = icmp eq i64 %92, 0
  br i1 %.not129, label %._crit_edge128, label %.lr.ph127

.lr.ph127:                                        ; preds = %._crit_edge, %.lr.ph127
  %.2125 = phi i64 [ %97, %.lr.ph127 ], [ 0, %._crit_edge ]
  %93 = call i32 @fec_decode_soft(ptr noundef %23, i32 noundef %4, ptr noundef nonnull %31, ptr noundef nonnull %32) #6
  %94 = call i32 @fec_decode_soft(ptr noundef %23, i32 noundef %4, ptr noundef nonnull %31, ptr noundef nonnull %32) #6
  %95 = call i32 @fec_decode_soft(ptr noundef %23, i32 noundef %4, ptr noundef nonnull %31, ptr noundef nonnull %32) #6
  %96 = call i32 @fec_decode_soft(ptr noundef %23, i32 noundef %4, ptr noundef nonnull %31, ptr noundef nonnull %32) #6
  %97 = add nuw i64 %.2125, 1
  %98 = load i64, ptr %2, align 8, !tbaa !5
  %99 = icmp ult i64 %97, %98
  br i1 %99, label %.lr.ph127, label %._crit_edge128, !llvm.loop !16

._crit_edge128:                                   ; preds = %.lr.ph127, %._crit_edge
  %100 = call i32 @getrusage(i32 noundef 0, ptr noundef %1) #6
  %101 = load i64, ptr %2, align 8, !tbaa !5
  %102 = shl i64 %101, 2
  store i64 %102, ptr %2, align 8, !tbaa !5
  %103 = call i32 @fec_destroy(ptr noundef %23) #6
  call void @llvm.stackrestore.p0(ptr %25)
  br label %104

104:                                              ; preds = %._crit_edge128, %8
  ret void
}

declare i32 @liquid_error_fl(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #1

; Function Attrs: nounwind
declare i32 @getrusage(i32 noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memmove.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #3

declare ptr @fec_create(i32 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @fec_get_enc_msg_length(i32 noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #4

; Function Attrs: nounwind
declare i32 @rand() local_unnamed_addr #2

declare i32 @fec_encode(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @fec_decode_soft(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1

declare i32 @fec_destroy(ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #5

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11, !13, !14}
!13 = !{!"llvm.loop.isvectorized", i32 1}
!14 = !{!"llvm.loop.unroll.runtime.disable"}
!15 = distinct !{!15, !11, !14, !13}
!16 = distinct !{!16, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass