; LLVM IR from ADJA/algos :: Graphs/MinCostDijkstra.ll (Z11fordBellmanv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%struct.edge = type { i32, i32, i32, i32, i64 }

@e = external dso_local global %"class.std::vector", align 8
@dist = external dso_local global [1050 x i64], align 16
@edge_num = external dso_local global i32, align 4
@s = external dso_local global i32, align 4
@t = external dso_local global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z11fordBellmanv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i8, align 1
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  %7 = load i32, ptr @s, align 4, !tbaa !5
  store i32 %7, ptr %1, align 4, !tbaa !5
  br label %8

8:                                                ; preds = %17, %0
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = load i32, ptr @t, align 4, !tbaa !5
  %11 = icmp sle i32 %9, %10
  br i1 %11, label %13, label %12

12:                                               ; preds = %8
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %20

13:                                               ; preds = %8
  %14 = load i32, ptr %1, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %15
  store i64 1000000000000000, ptr %16, align 8, !tbaa !9
  br label %17

17:                                               ; preds = %13
  %18 = load i32, ptr %1, align 4, !tbaa !5
  %19 = add nsw i32 %18, 1
  store i32 %19, ptr %1, align 4, !tbaa !5
  br label %8, !llvm.loop !11

20:                                               ; preds = %12
  %21 = load i32, ptr @s, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %22
  store i64 0, ptr %23, align 8, !tbaa !9
  br label %24

24:                                               ; preds = %104, %20
  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #2
  store i8 0, ptr %2, align 1, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %94, %24
  %26 = load i32, ptr %3, align 4, !tbaa !5
  %27 = load i32, ptr @edge_num, align 4, !tbaa !5
  %28 = icmp slt i32 %26, %27
  br i1 %28, label %30, label %29

29:                                               ; preds = %25
  store i32 7, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  br label %97

30:                                               ; preds = %25
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %31 = load i32, ptr %3, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %32) #2
  %34 = getelementptr inbounds %struct.edge, ptr %33, i32 0, i32 0
  %35 = load i32, ptr %34, align 8, !tbaa !15
  store i32 %35, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %36 = load i32, ptr %3, align 4, !tbaa !5
  %37 = sext i32 %36 to i64
  %38 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %37) #2
  %39 = getelementptr inbounds %struct.edge, ptr %38, i32 0, i32 1
  %40 = load i32, ptr %39, align 4, !tbaa !17
  store i32 %40, ptr %6, align 4, !tbaa !5
  %41 = load i32, ptr %3, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %42) #2
  %44 = getelementptr inbounds %struct.edge, ptr %43, i32 0, i32 2
  %45 = load i32, ptr %44, align 8, !tbaa !18
  %46 = load i32, ptr %3, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %47) #2
  %49 = getelementptr inbounds %struct.edge, ptr %48, i32 0, i32 3
  %50 = load i32, ptr %49, align 4, !tbaa !19
  %51 = icmp eq i32 %45, %50
  br i1 %51, label %52, label %53

52:                                               ; preds = %30
  store i32 9, ptr %4, align 4
  br label %91

53:                                               ; preds = %30
  %54 = load i32, ptr %5, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %55
  %57 = load i64, ptr %56, align 8, !tbaa !9
  %58 = icmp eq i64 %57, 1000000000000000
  br i1 %58, label %59, label %60

59:                                               ; preds = %53
  store i32 9, ptr %4, align 4
  br label %91

60:                                               ; preds = %53
  %61 = load i32, ptr %6, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %62
  %64 = load i64, ptr %63, align 8, !tbaa !9
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = sext i32 %65 to i64
  %67 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %66
  %68 = load i64, ptr %67, align 8, !tbaa !9
  %69 = load i32, ptr %3, align 4, !tbaa !5
  %70 = sext i32 %69 to i64
  %71 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %70) #2
  %72 = getelementptr inbounds %struct.edge, ptr %71, i32 0, i32 4
  %73 = load i64, ptr %72, align 8, !tbaa !20
  %74 = add nsw i64 %68, %73
  %75 = icmp sgt i64 %64, %74
  br i1 %75, label %76, label %90

76:                                               ; preds = %60
  %77 = load i32, ptr %5, align 4, !tbaa !5
  %78 = sext i32 %77 to i64
  %79 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %78
  %80 = load i64, ptr %79, align 8, !tbaa !9
  %81 = load i32, ptr %3, align 4, !tbaa !5
  %82 = sext i32 %81 to i64
  %83 = call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %82) #2
  %84 = getelementptr inbounds %struct.edge, ptr %83, i32 0, i32 4
  %85 = load i64, ptr %84, align 8, !tbaa !20
  %86 = add nsw i64 %80, %85
  %87 = load i32, ptr %6, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %88
  store i64 %86, ptr %89, align 8, !tbaa !9
  store i8 1, ptr %2, align 1, !tbaa !13
  br label %90

90:                                               ; preds = %76, %60
  store i32 0, ptr %4, align 4
  br label %91

91:                                               ; preds = %90, %59, %52
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  %92 = load i32, ptr %4, align 4
  switch i32 %92, label %106 [
    i32 0, label %93
    i32 9, label %94
  ]

93:                                               ; preds = %91
  br label %94

94:                                               ; preds = %93, %91
  %95 = load i32, ptr %3, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %3, align 4, !tbaa !5
  br label %25, !llvm.loop !21

97:                                               ; preds = %29
  %98 = load i8, ptr %2, align 1, !tbaa !13, !range !22, !noundef !23
  %99 = trunc i8 %98 to i1
  br i1 %99, label %101, label %100

100:                                              ; preds = %97
  store i32 6, ptr %4, align 4
  br label %102

101:                                              ; preds = %97
  store i32 0, ptr %4, align 4
  br label %102

102:                                              ; preds = %101, %100
  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #2
  %103 = load i32, ptr %4, align 4
  switch i32 %103, label %106 [
    i32 0, label %104
    i32 6, label %105
  ]

104:                                              ; preds = %102
  br label %24, !llvm.loop !24

105:                                              ; preds = %102
  ret void

106:                                              ; preds = %102, %91
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"bool", !7, i64 0}
!15 = !{!16, !6, i64 0}
!16 = !{!"_ZTS4edge", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !10, i64 16}
!17 = !{!16, !6, i64 4}
!18 = !{!16, !6, i64 8}
!19 = !{!16, !6, i64 12}
!20 = !{!16, !10, i64 16}
!21 = distinct !{!21, !12}
!22 = !{i8 0, i8 2}
!23 = !{}
!24 = distinct !{!24, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<edge, std::allocator<edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@e = external dso_local global %"class.std::vector", align 8
@dist = external dso_local local_unnamed_addr global [1050 x i64], align 16
@edge_num = external dso_local local_unnamed_addr global i32, align 4
@s = external dso_local local_unnamed_addr global i32, align 4
@t = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z11fordBellmanv() local_unnamed_addr #0 {
  %1 = load i32, ptr @s, align 4, !tbaa !5
  %2 = load i32, ptr @t, align 4, !tbaa !5
  %.not22 = icmp sgt i32 %1, %2
  %.pre = sext i32 %1 to i64
  br i1 %.not22, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %0
  %3 = add i32 %2, 1
  %4 = sub i32 %2, %1
  %5 = zext i32 %4 to i64
  %6 = add nuw nsw i64 %5, 1
  %min.iters.check = icmp ult i32 %4, 3
  br i1 %min.iters.check, label %.lr.ph.preheader34, label %vector.ph

.lr.ph.preheader34:                               ; preds = %middle.block, %.lr.ph.preheader
  %indvars.iv.ph = phi i64 [ %.pre, %.lr.ph.preheader ], [ %ind.end, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %6, 8589934588
  %ind.end = add nsw i64 %n.vec, %.pre
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %offset.idx = add i64 %index, %.pre
  %7 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %offset.idx
  %8 = getelementptr inbounds i8, ptr %7, i64 16
  store <2 x i64> <i64 1000000000000000, i64 1000000000000000>, ptr %7, align 8, !tbaa !9
  store <2 x i64> <i64 1000000000000000, i64 1000000000000000>, ptr %8, align 8, !tbaa !9
  %index.next = add nuw i64 %index, 4
  %9 = icmp eq i64 %index.next, %n.vec
  br i1 %9, label %middle.block, label %vector.body, !llvm.loop !11

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %6, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader34

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %0
  %10 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %.pre
  store i64 0, ptr %10, align 8, !tbaa !9
  %11 = load i32, ptr @edge_num, align 4, !tbaa !5
  %12 = icmp sgt i32 %11, 0
  br i1 %12, label %.split, label %.split30.us

.lr.ph:                                           ; preds = %.lr.ph.preheader34, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %indvars.iv.ph, %.lr.ph.preheader34 ]
  %13 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %indvars.iv
  store i64 1000000000000000, ptr %13, align 8, !tbaa !9
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %3, %lftr.wideiv
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !15

.split:                                           ; preds = %._crit_edge, %._crit_edge28
  %14 = phi i32 [ %49, %._crit_edge28 ], [ %11, %._crit_edge ]
  %15 = icmp sgt i32 %14, 0
  br i1 %15, label %.lr.ph27, label %.split30.us

._crit_edge28:                                    ; preds = %48
  br i1 %.2, label %.split, label %.split30.us, !llvm.loop !16

.lr.ph27:                                         ; preds = %.split, %48
  %indvars.iv32 = phi i64 [ %indvars.iv.next33, %48 ], [ 0, %.split ]
  %.01825 = phi i1 [ %.2, %48 ], [ false, %.split ]
  %16 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %indvars.iv32) #1
  %17 = load i32, ptr %16, align 8, !tbaa !18
  %18 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %indvars.iv32) #1
  %19 = getelementptr inbounds i8, ptr %18, i64 4
  %20 = load i32, ptr %19, align 4, !tbaa !20
  %21 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %indvars.iv32) #1
  %22 = getelementptr inbounds i8, ptr %21, i64 8
  %23 = load i32, ptr %22, align 8, !tbaa !21
  %24 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %indvars.iv32) #1
  %25 = getelementptr inbounds i8, ptr %24, i64 12
  %26 = load i32, ptr %25, align 4, !tbaa !22
  %27 = icmp eq i32 %23, %26
  br i1 %27, label %48, label %28

28:                                               ; preds = %.lr.ph27
  %29 = sext i32 %17 to i64
  %30 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %29
  %31 = load i64, ptr %30, align 8, !tbaa !9
  %32 = icmp eq i64 %31, 1000000000000000
  br i1 %32, label %48, label %33

33:                                               ; preds = %28
  %34 = sext i32 %20 to i64
  %35 = getelementptr inbounds [1050 x i64], ptr @dist, i64 0, i64 %34
  %36 = load i64, ptr %35, align 8, !tbaa !9
  %37 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %indvars.iv32) #1
  %38 = getelementptr inbounds i8, ptr %37, i64 16
  %39 = load i64, ptr %38, align 8, !tbaa !23
  %40 = add nsw i64 %39, %31
  %41 = icmp sgt i64 %36, %40
  br i1 %41, label %42, label %48

42:                                               ; preds = %33
  %43 = load i64, ptr %30, align 8, !tbaa !9
  %44 = tail call noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) @e, i64 noundef %indvars.iv32) #1
  %45 = getelementptr inbounds i8, ptr %44, i64 16
  %46 = load i64, ptr %45, align 8, !tbaa !23
  %47 = add nsw i64 %46, %43
  store i64 %47, ptr %35, align 8, !tbaa !9
  br label %48

48:                                               ; preds = %33, %42, %28, %.lr.ph27
  %.2 = phi i1 [ %.01825, %.lr.ph27 ], [ %.01825, %28 ], [ true, %42 ], [ %.01825, %33 ]
  %indvars.iv.next33 = add nuw nsw i64 %indvars.iv32, 1
  %49 = load i32, ptr @edge_num, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = icmp slt i64 %indvars.iv.next33, %50
  br i1 %51, label %.lr.ph27, label %._crit_edge28, !llvm.loop !24

.split30.us:                                      ; preds = %._crit_edge28, %.split, %._crit_edge
  ret void
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(24) ptr @_ZNSt6vectorI4edgeSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12, !13, !14}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!"llvm.loop.isvectorized", i32 1}
!14 = !{!"llvm.loop.unroll.runtime.disable"}
!15 = distinct !{!15, !12, !14, !13}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.unswitch.partial.disable"}
!18 = !{!19, !6, i64 0}
!19 = !{!"_ZTS4edge", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !10, i64 16}
!20 = !{!19, !6, i64 4}
!21 = !{!19, !6, i64 8}
!22 = !{!19, !6, i64 12}
!23 = !{!19, !10, i64 16}
!24 = distinct !{!24, !12}


; Effective O3 passes: AggressiveInstCombinePass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass,TailCallElimPass