; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_mbox)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_event = type { i8, ptr, i16, i8, [8 x i8] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

declare void @OS_Sched() #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @OSMboxPendAbort(ptr noundef %0, i8 noundef zeroext %1, ptr noundef %2) #2 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca i8, align 1
  %7 = alloca ptr, align 8
  %8 = alloca i8, align 1
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i8 %1, ptr %6, align 1, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !10
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.os_event, ptr %11, i32 0, i32 0
  %13 = load i8, ptr %12, align 8, !tbaa !12
  %14 = zext i8 %13 to i32
  %15 = icmp ne i32 %14, 1
  br i1 %15, label %16, label %18

16:                                               ; preds = %3
  %17 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 1, ptr %17, align 1, !tbaa !9
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %54

18:                                               ; preds = %3
  %19 = call i32 @OS_CPU_SR_Save()
  store i32 %19, ptr %9, align 4, !tbaa !10
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = getelementptr inbounds %struct.os_event, ptr %20, i32 0, i32 3
  %22 = load i8, ptr %21, align 2, !tbaa !15
  %23 = zext i8 %22 to i32
  %24 = icmp ne i32 %23, 0
  br i1 %24, label %25, label %51

25:                                               ; preds = %18
  store i8 0, ptr %8, align 1, !tbaa !9
  %26 = load i8, ptr %6, align 1, !tbaa !9
  %27 = zext i8 %26 to i32
  switch i32 %27, label %42 [
    i32 1, label %28
    i32 0, label %41
  ]

28:                                               ; preds = %25
  br label %29

29:                                               ; preds = %35, %28
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.os_event, ptr %30, i32 0, i32 3
  %32 = load i8, ptr %31, align 2, !tbaa !15
  %33 = zext i8 %32 to i32
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %40

35:                                               ; preds = %29
  %36 = load ptr, ptr %5, align 8, !tbaa !5
  %37 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %36, ptr noundef null, i8 noundef zeroext 2, i8 noundef zeroext 2)
  %38 = load i8, ptr %8, align 1, !tbaa !9
  %39 = add i8 %38, 1
  store i8 %39, ptr %8, align 1, !tbaa !9
  br label %29, !llvm.loop !16

40:                                               ; preds = %29
  br label %47

41:                                               ; preds = %25
  br label %42

42:                                               ; preds = %41, %25
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %43, ptr noundef null, i8 noundef zeroext 2, i8 noundef zeroext 2)
  %45 = load i8, ptr %8, align 1, !tbaa !9
  %46 = add i8 %45, 1
  store i8 %46, ptr %8, align 1, !tbaa !9
  br label %47

47:                                               ; preds = %42, %40
  %48 = load i32, ptr %9, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %48)
  call void @OS_Sched()
  %49 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 14, ptr %49, align 1, !tbaa !9
  %50 = load i8, ptr %8, align 1, !tbaa !9
  store i8 %50, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %54

51:                                               ; preds = %18
  %52 = load i32, ptr %9, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %52)
  %53 = load ptr, ptr %7, align 8, !tbaa !5
  store i8 0, ptr %53, align 1, !tbaa !9
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %54

54:                                               ; preds = %51, %47, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %8) #3
  %55 = load i8, ptr %4, align 1
  ret i8 %55
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"os_event", !7, i64 0, !6, i64 8, !14, i64 16, !7, i64 18, !7, i64 19}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !7, i64 18}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @OS_Sched() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @OSMboxPendAbort(ptr noundef %0, i8 noundef zeroext %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #1 {
  %4 = load i8, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i8 %4, 1
  br i1 %.not, label %5, label %15

5:                                                ; preds = %3
  %6 = tail call i32 @OS_CPU_SR_Save() #2
  %7 = getelementptr inbounds i8, ptr %0, i64 18
  %8 = load i8, ptr %7, align 2, !tbaa !11
  %.not15 = icmp eq i8 %8, 0
  br i1 %.not15, label %14, label %9

9:                                                ; preds = %5
  %cond = icmp eq i8 %1, 1
  br i1 %cond, label %.preheader, label %12

.preheader:                                       ; preds = %9, %.preheader
  %.017 = phi i8 [ %11, %.preheader ], [ 0, %9 ]
  %10 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef null, i8 noundef zeroext 2, i8 noundef zeroext 2) #2
  %11 = add i8 %.017, 1
  %.pr = load i8, ptr %7, align 2, !tbaa !11
  %.not16 = icmp eq i8 %.pr, 0
  br i1 %.not16, label %.loopexit, label %.preheader, !llvm.loop !12

12:                                               ; preds = %9
  %13 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef null, i8 noundef zeroext 2, i8 noundef zeroext 2) #2
  br label %.loopexit

.loopexit:                                        ; preds = %.preheader, %12
  %.1 = phi i8 [ 1, %12 ], [ %11, %.preheader ]
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  tail call void @OS_Sched() #2
  br label %15

14:                                               ; preds = %5
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  br label %15

15:                                               ; preds = %3, %14, %.loopexit
  %.sink = phi i8 [ 0, %14 ], [ 14, %.loopexit ], [ 1, %3 ]
  %.014 = phi i8 [ 0, %14 ], [ %.1, %.loopexit ], [ 0, %3 ]
  store i8 %.sink, ptr %2, align 1, !tbaa !14
  ret i8 %.014
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"os_event", !7, i64 0, !9, i64 8, !10, i64 16, !7, i64 18, !7, i64 19}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!6, !7, i64 18}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!7, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass