; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_q)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_event = type { i8, ptr, i16, i8, [8 x i8] }
%struct.os_q = type { ptr, ptr, ptr, ptr, ptr, i16, i16 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) #1

declare void @OS_Sched() #1

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @OSQPostOpt(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) #2 {
  %4 = alloca i8, align 1
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i8 %2, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !10
  %11 = load ptr, ptr %5, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.os_event, ptr %11, i32 0, i32 0
  %13 = load i8, ptr %12, align 8, !tbaa !12
  %14 = zext i8 %13 to i32
  %15 = icmp ne i32 %14, 2
  br i1 %15, label %16, label %17

16:                                               ; preds = %3
  store i8 1, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %122

17:                                               ; preds = %3
  %18 = call i32 @OS_CPU_SR_Save()
  store i32 %18, ptr %9, align 4, !tbaa !10
  %19 = load ptr, ptr %5, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.os_event, ptr %19, i32 0, i32 3
  %21 = load i8, ptr %20, align 2, !tbaa !15
  %22 = zext i8 %21 to i32
  %23 = icmp ne i32 %22, 0
  br i1 %23, label %24, label %53

24:                                               ; preds = %17
  %25 = load i8, ptr %7, align 1, !tbaa !9
  %26 = zext i8 %25 to i32
  %27 = and i32 %26, 1
  %28 = icmp ne i32 %27, 0
  br i1 %28, label %29, label %41

29:                                               ; preds = %24
  br label %30

30:                                               ; preds = %36, %29
  %31 = load ptr, ptr %5, align 8, !tbaa !5
  %32 = getelementptr inbounds %struct.os_event, ptr %31, i32 0, i32 3
  %33 = load i8, ptr %32, align 2, !tbaa !15
  %34 = zext i8 %33 to i32
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %36, label %40

36:                                               ; preds = %30
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %37, ptr noundef %38, i8 noundef zeroext 4, i8 noundef zeroext 0)
  br label %30, !llvm.loop !16

40:                                               ; preds = %30
  br label %45

41:                                               ; preds = %24
  %42 = load ptr, ptr %5, align 8, !tbaa !5
  %43 = load ptr, ptr %6, align 8, !tbaa !5
  %44 = call zeroext i8 @OS_EventTaskRdy(ptr noundef %42, ptr noundef %43, i8 noundef zeroext 4, i8 noundef zeroext 0)
  br label %45

45:                                               ; preds = %41, %40
  %46 = load i32, ptr %9, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %46)
  %47 = load i8, ptr %7, align 1, !tbaa !9
  %48 = zext i8 %47 to i32
  %49 = and i32 %48, 4
  %50 = icmp eq i32 %49, 0
  br i1 %50, label %51, label %52

51:                                               ; preds = %45
  call void @OS_Sched()
  br label %52

52:                                               ; preds = %51, %45
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %122

53:                                               ; preds = %17
  %54 = load ptr, ptr %5, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.os_event, ptr %54, i32 0, i32 1
  %56 = load ptr, ptr %55, align 8, !tbaa !18
  store ptr %56, ptr %8, align 8, !tbaa !5
  %57 = load ptr, ptr %8, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.os_q, ptr %57, i32 0, i32 6
  %59 = load i16, ptr %58, align 2, !tbaa !19
  %60 = zext i16 %59 to i32
  %61 = load ptr, ptr %8, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.os_q, ptr %61, i32 0, i32 5
  %63 = load i16, ptr %62, align 8, !tbaa !21
  %64 = zext i16 %63 to i32
  %65 = icmp sge i32 %60, %64
  br i1 %65, label %66, label %68

66:                                               ; preds = %53
  %67 = load i32, ptr %9, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %67)
  store i8 30, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %122

68:                                               ; preds = %53
  %69 = load i8, ptr %7, align 1, !tbaa !9
  %70 = zext i8 %69 to i32
  %71 = and i32 %70, 2
  %72 = icmp ne i32 %71, 0
  br i1 %72, label %73, label %96

73:                                               ; preds = %68
  %74 = load ptr, ptr %8, align 8, !tbaa !5
  %75 = getelementptr inbounds %struct.os_q, ptr %74, i32 0, i32 4
  %76 = load ptr, ptr %75, align 8, !tbaa !22
  %77 = load ptr, ptr %8, align 8, !tbaa !5
  %78 = getelementptr inbounds %struct.os_q, ptr %77, i32 0, i32 1
  %79 = load ptr, ptr %78, align 8, !tbaa !23
  %80 = icmp eq ptr %76, %79
  br i1 %80, label %81, label %87

81:                                               ; preds = %73
  %82 = load ptr, ptr %8, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.os_q, ptr %82, i32 0, i32 2
  %84 = load ptr, ptr %83, align 8, !tbaa !24
  %85 = load ptr, ptr %8, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.os_q, ptr %85, i32 0, i32 4
  store ptr %84, ptr %86, align 8, !tbaa !22
  br label %87

87:                                               ; preds = %81, %73
  %88 = load ptr, ptr %8, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.os_q, ptr %88, i32 0, i32 4
  %90 = load ptr, ptr %89, align 8, !tbaa !22
  %91 = getelementptr inbounds ptr, ptr %90, i32 -1
  store ptr %91, ptr %89, align 8, !tbaa !22
  %92 = load ptr, ptr %6, align 8, !tbaa !5
  %93 = load ptr, ptr %8, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.os_q, ptr %93, i32 0, i32 4
  %95 = load ptr, ptr %94, align 8, !tbaa !22
  store ptr %92, ptr %95, align 8, !tbaa !5
  br label %116

96:                                               ; preds = %68
  %97 = load ptr, ptr %6, align 8, !tbaa !5
  %98 = load ptr, ptr %8, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.os_q, ptr %98, i32 0, i32 3
  %100 = load ptr, ptr %99, align 8, !tbaa !25
  %101 = getelementptr inbounds ptr, ptr %100, i32 1
  store ptr %101, ptr %99, align 8, !tbaa !25
  store ptr %97, ptr %100, align 8, !tbaa !5
  %102 = load ptr, ptr %8, align 8, !tbaa !5
  %103 = getelementptr inbounds %struct.os_q, ptr %102, i32 0, i32 3
  %104 = load ptr, ptr %103, align 8, !tbaa !25
  %105 = load ptr, ptr %8, align 8, !tbaa !5
  %106 = getelementptr inbounds %struct.os_q, ptr %105, i32 0, i32 2
  %107 = load ptr, ptr %106, align 8, !tbaa !24
  %108 = icmp eq ptr %104, %107
  br i1 %108, label %109, label %115

109:                                              ; preds = %96
  %110 = load ptr, ptr %8, align 8, !tbaa !5
  %111 = getelementptr inbounds %struct.os_q, ptr %110, i32 0, i32 1
  %112 = load ptr, ptr %111, align 8, !tbaa !23
  %113 = load ptr, ptr %8, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.os_q, ptr %113, i32 0, i32 3
  store ptr %112, ptr %114, align 8, !tbaa !25
  br label %115

115:                                              ; preds = %109, %96
  br label %116

116:                                              ; preds = %115, %87
  %117 = load ptr, ptr %8, align 8, !tbaa !5
  %118 = getelementptr inbounds %struct.os_q, ptr %117, i32 0, i32 6
  %119 = load i16, ptr %118, align 2, !tbaa !19
  %120 = add i16 %119, 1
  store i16 %120, ptr %118, align 2, !tbaa !19
  %121 = load i32, ptr %9, align 4, !tbaa !10
  call void @OS_CPU_SR_Restore(i32 noundef %121)
  store i8 0, ptr %4, align 1
  store i32 1, ptr %10, align 4
  br label %122

122:                                              ; preds = %116, %66, %52, %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  %123 = load i8, ptr %4, align 1
  ret i8 %123
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"os_event", !7, i64 0, !6, i64 8, !14, i64 16, !7, i64 18, !7, i64 19}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !7, i64 18}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!13, !6, i64 8}
!19 = !{!20, !14, i64 42}
!20 = !{!"os_q", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !14, i64 40, !14, i64 42}
!21 = !{!20, !14, i64 40}
!22 = !{!20, !6, i64 32}
!23 = !{!20, !6, i64 8}
!24 = !{!20, !6, i64 16}
!25 = !{!20, !6, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

declare zeroext i8 @OS_EventTaskRdy(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

declare void @OS_Sched() local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext range(i8 0, 31) i8 @OSQPostOpt(ptr noundef %0, ptr noundef %1, i8 noundef zeroext %2) local_unnamed_addr #1 {
  %4 = load i8, ptr %0, align 8, !tbaa !5
  %.not = icmp eq i8 %4, 2
  br i1 %.not, label %5, label %54

5:                                                ; preds = %3
  %6 = tail call i32 @OS_CPU_SR_Save() #2
  %7 = getelementptr inbounds i8, ptr %0, i64 18
  %8 = load i8, ptr %7, align 2, !tbaa !11
  %.not30 = icmp eq i8 %8, 0
  br i1 %.not30, label %19, label %9

9:                                                ; preds = %5
  %10 = zext i8 %2 to i32
  %11 = and i32 %10, 1
  %.not33 = icmp eq i32 %11, 0
  br i1 %.not33, label %14, label %.lr.ph

.lr.ph:                                           ; preds = %9, %.lr.ph
  %12 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef %1, i8 noundef zeroext 4, i8 noundef zeroext 0) #2
  %13 = load i8, ptr %7, align 2, !tbaa !11
  %.not34 = icmp eq i8 %13, 0
  br i1 %.not34, label %.loopexit, label %.lr.ph, !llvm.loop !12

14:                                               ; preds = %9
  %15 = tail call zeroext i8 @OS_EventTaskRdy(ptr noundef nonnull %0, ptr noundef %1, i8 noundef zeroext 4, i8 noundef zeroext 0) #2
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %14
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  %16 = and i32 %10, 4
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %54

18:                                               ; preds = %.loopexit
  tail call void @OS_Sched() #2
  br label %54

19:                                               ; preds = %5
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  %21 = load ptr, ptr %20, align 8, !tbaa !14
  %22 = getelementptr inbounds i8, ptr %21, i64 42
  %23 = load i16, ptr %22, align 2, !tbaa !15
  %24 = getelementptr inbounds i8, ptr %21, i64 40
  %25 = load i16, ptr %24, align 8, !tbaa !17
  %.not31 = icmp ult i16 %23, %25
  br i1 %.not31, label %27, label %26

26:                                               ; preds = %19
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  br label %54

27:                                               ; preds = %19
  %28 = and i8 %2, 2
  %.not32 = icmp eq i8 %28, 0
  br i1 %.not32, label %41, label %29

29:                                               ; preds = %27
  %30 = getelementptr inbounds i8, ptr %21, i64 32
  %31 = load ptr, ptr %30, align 8, !tbaa !18
  %32 = getelementptr inbounds i8, ptr %21, i64 8
  %33 = load ptr, ptr %32, align 8, !tbaa !19
  %34 = icmp eq ptr %31, %33
  br i1 %34, label %35, label %38

35:                                               ; preds = %29
  %36 = getelementptr inbounds i8, ptr %21, i64 16
  %37 = load ptr, ptr %36, align 8, !tbaa !20
  br label %38

38:                                               ; preds = %35, %29
  %39 = phi ptr [ %37, %35 ], [ %31, %29 ]
  %40 = getelementptr inbounds i8, ptr %39, i64 -8
  store ptr %40, ptr %30, align 8, !tbaa !18
  store ptr %1, ptr %40, align 8, !tbaa !21
  br label %52

41:                                               ; preds = %27
  %42 = getelementptr inbounds i8, ptr %21, i64 24
  %43 = load ptr, ptr %42, align 8, !tbaa !22
  %44 = getelementptr inbounds i8, ptr %43, i64 8
  store ptr %44, ptr %42, align 8, !tbaa !22
  store ptr %1, ptr %43, align 8, !tbaa !21
  %45 = load ptr, ptr %42, align 8, !tbaa !22
  %46 = getelementptr inbounds i8, ptr %21, i64 16
  %47 = load ptr, ptr %46, align 8, !tbaa !20
  %48 = icmp eq ptr %45, %47
  br i1 %48, label %49, label %52

49:                                               ; preds = %41
  %50 = getelementptr inbounds i8, ptr %21, i64 8
  %51 = load ptr, ptr %50, align 8, !tbaa !19
  store ptr %51, ptr %42, align 8, !tbaa !22
  br label %52

52:                                               ; preds = %41, %49, %38
  %53 = add nuw i16 %23, 1
  store i16 %53, ptr %22, align 2, !tbaa !15
  tail call void @OS_CPU_SR_Restore(i32 noundef %6) #2
  br label %54

54:                                               ; preds = %.loopexit, %18, %3, %52, %26
  %.0 = phi i8 [ 30, %26 ], [ 0, %52 ], [ 1, %3 ], [ 0, %18 ], [ 0, %.loopexit ]
  ret i8 %.0
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"os_event", !7, i64 0, !9, i64 8, !10, i64 16, !7, i64 18, !7, i64 19}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!6, !7, i64 18}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!6, !9, i64 8}
!15 = !{!16, !10, i64 42}
!16 = !{!"os_q", !9, i64 0, !9, i64 8, !9, i64 16, !9, i64 24, !9, i64 32, !10, i64 40, !10, i64 42}
!17 = !{!16, !10, i64 40}
!18 = !{!16, !9, i64 32}
!19 = !{!16, !9, i64 8}
!20 = !{!16, !9, i64 16}
!21 = !{!9, !9, i64 0}
!22 = !{!16, !9, i64 24}


; Effective O3 passes: CorrelatedValuePropagationPass,DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass