; LLVM IR from HANDS-FREE/OpenRE :: 3_OS/STM32F1/RTOS/uCOS-II/CORE (os_core)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.os_tcb = type { ptr, ptr, ptr, i32, i16, i16, ptr, ptr, ptr, ptr, ptr, i16, i32, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, ptr, i32, ptr, [1 x i32] }

@OSRunning = external dso_local global i8, align 1
@OSTime = external dso_local global i32, align 4
@OSTickStepState = external dso_local global i8, align 1
@OSTCBList = external dso_local global ptr, align 8
@OSRdyGrp = external dso_local global i8, align 1
@OSRdyTbl = external dso_local global [8 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @OS_CPU_SR_Save() #1

declare void @OS_CPU_SR_Restore(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @OSTimeTick() #2 {
  %1 = alloca ptr, align 8
  %2 = alloca i8, align 1
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @OSTimeTickHook()
  %5 = call i32 @OS_CPU_SR_Save()
  store i32 %5, ptr %3, align 4, !tbaa !5
  %6 = load volatile i32, ptr @OSTime, align 4, !tbaa !5
  %7 = add i32 %6, 1
  store volatile i32 %7, ptr @OSTime, align 4, !tbaa !5
  %8 = load i32, ptr %3, align 4, !tbaa !5
  call void @OS_CPU_SR_Restore(i32 noundef %8)
  %9 = load i8, ptr @OSRunning, align 1, !tbaa !9
  %10 = zext i8 %9 to i32
  %11 = icmp eq i32 %10, 1
  br i1 %11, label %12, label %103

12:                                               ; preds = %0
  %13 = load i8, ptr @OSTickStepState, align 1, !tbaa !9
  %14 = zext i8 %13 to i32
  switch i32 %14, label %18 [
    i32 0, label %15
    i32 1, label %16
    i32 2, label %17
  ]

15:                                               ; preds = %12
  store i8 1, ptr %2, align 1, !tbaa !9
  br label %19

16:                                               ; preds = %12
  store i8 0, ptr %2, align 1, !tbaa !9
  br label %19

17:                                               ; preds = %12
  store i8 1, ptr %2, align 1, !tbaa !9
  store i8 1, ptr @OSTickStepState, align 1, !tbaa !9
  br label %19

18:                                               ; preds = %12
  store i8 1, ptr %2, align 1, !tbaa !9
  store i8 0, ptr @OSTickStepState, align 1, !tbaa !9
  br label %19

19:                                               ; preds = %18, %17, %16, %15
  %20 = load i8, ptr %2, align 1, !tbaa !9
  %21 = zext i8 %20 to i32
  %22 = icmp eq i32 %21, 0
  br i1 %22, label %23, label %24

23:                                               ; preds = %19
  store i32 1, ptr %4, align 4
  br label %104

24:                                               ; preds = %19
  %25 = load ptr, ptr @OSTCBList, align 8, !tbaa !10
  store ptr %25, ptr %1, align 8, !tbaa !10
  br label %26

26:                                               ; preds = %97, %24
  %27 = load ptr, ptr %1, align 8, !tbaa !10
  %28 = getelementptr inbounds %struct.os_tcb, ptr %27, i32 0, i32 15
  %29 = load i8, ptr %28, align 2, !tbaa !12
  %30 = zext i8 %29 to i32
  %31 = icmp ne i32 %30, 63
  br i1 %31, label %32, label %102

32:                                               ; preds = %26
  %33 = call i32 @OS_CPU_SR_Save()
  store i32 %33, ptr %3, align 4, !tbaa !5
  %34 = load ptr, ptr %1, align 8, !tbaa !10
  %35 = getelementptr inbounds %struct.os_tcb, ptr %34, i32 0, i32 12
  %36 = load i32, ptr %35, align 4, !tbaa !15
  %37 = icmp ne i32 %36, 0
  br i1 %37, label %38, label %97

38:                                               ; preds = %32
  %39 = load ptr, ptr %1, align 8, !tbaa !10
  %40 = getelementptr inbounds %struct.os_tcb, ptr %39, i32 0, i32 12
  %41 = load i32, ptr %40, align 4, !tbaa !15
  %42 = add i32 %41, -1
  store i32 %42, ptr %40, align 4, !tbaa !15
  %43 = load ptr, ptr %1, align 8, !tbaa !10
  %44 = getelementptr inbounds %struct.os_tcb, ptr %43, i32 0, i32 12
  %45 = load i32, ptr %44, align 4, !tbaa !15
  %46 = icmp eq i32 %45, 0
  br i1 %46, label %47, label %96

47:                                               ; preds = %38
  %48 = load ptr, ptr %1, align 8, !tbaa !10
  %49 = getelementptr inbounds %struct.os_tcb, ptr %48, i32 0, i32 13
  %50 = load i8, ptr %49, align 8, !tbaa !16
  %51 = zext i8 %50 to i32
  %52 = and i32 %51, 55
  %53 = icmp ne i32 %52, 0
  br i1 %53, label %54, label %63

54:                                               ; preds = %47
  %55 = load ptr, ptr %1, align 8, !tbaa !10
  %56 = getelementptr inbounds %struct.os_tcb, ptr %55, i32 0, i32 13
  %57 = load i8, ptr %56, align 8, !tbaa !16
  %58 = zext i8 %57 to i32
  %59 = and i32 %58, 200
  %60 = trunc i32 %59 to i8
  store i8 %60, ptr %56, align 8, !tbaa !16
  %61 = load ptr, ptr %1, align 8, !tbaa !10
  %62 = getelementptr inbounds %struct.os_tcb, ptr %61, i32 0, i32 14
  store i8 1, ptr %62, align 1, !tbaa !17
  br label %66

63:                                               ; preds = %47
  %64 = load ptr, ptr %1, align 8, !tbaa !10
  %65 = getelementptr inbounds %struct.os_tcb, ptr %64, i32 0, i32 14
  store i8 0, ptr %65, align 1, !tbaa !17
  br label %66

66:                                               ; preds = %63, %54
  %67 = load ptr, ptr %1, align 8, !tbaa !10
  %68 = getelementptr inbounds %struct.os_tcb, ptr %67, i32 0, i32 13
  %69 = load i8, ptr %68, align 8, !tbaa !16
  %70 = zext i8 %69 to i32
  %71 = and i32 %70, 8
  %72 = icmp eq i32 %71, 0
  br i1 %72, label %73, label %95

73:                                               ; preds = %66
  %74 = load ptr, ptr %1, align 8, !tbaa !10
  %75 = getelementptr inbounds %struct.os_tcb, ptr %74, i32 0, i32 19
  %76 = load i8, ptr %75, align 2, !tbaa !18
  %77 = zext i8 %76 to i32
  %78 = load i8, ptr @OSRdyGrp, align 1, !tbaa !9
  %79 = zext i8 %78 to i32
  %80 = or i32 %79, %77
  %81 = trunc i32 %80 to i8
  store i8 %81, ptr @OSRdyGrp, align 1, !tbaa !9
  %82 = load ptr, ptr %1, align 8, !tbaa !10
  %83 = getelementptr inbounds %struct.os_tcb, ptr %82, i32 0, i32 18
  %84 = load i8, ptr %83, align 1, !tbaa !19
  %85 = zext i8 %84 to i32
  %86 = load ptr, ptr %1, align 8, !tbaa !10
  %87 = getelementptr inbounds %struct.os_tcb, ptr %86, i32 0, i32 17
  %88 = load i8, ptr %87, align 4, !tbaa !20
  %89 = zext i8 %88 to i64
  %90 = getelementptr inbounds [8 x i8], ptr @OSRdyTbl, i64 0, i64 %89
  %91 = load i8, ptr %90, align 1, !tbaa !9
  %92 = zext i8 %91 to i32
  %93 = or i32 %92, %85
  %94 = trunc i32 %93 to i8
  store i8 %94, ptr %90, align 1, !tbaa !9
  br label %95

95:                                               ; preds = %73, %66
  br label %96

96:                                               ; preds = %95, %38
  br label %97

97:                                               ; preds = %96, %32
  %98 = load ptr, ptr %1, align 8, !tbaa !10
  %99 = getelementptr inbounds %struct.os_tcb, ptr %98, i32 0, i32 6
  %100 = load ptr, ptr %99, align 8, !tbaa !21
  store ptr %100, ptr %1, align 8, !tbaa !10
  %101 = load i32, ptr %3, align 4, !tbaa !5
  call void @OS_CPU_SR_Restore(i32 noundef %101)
  br label %26, !llvm.loop !22

102:                                              ; preds = %26
  br label %103

103:                                              ; preds = %102, %0
  store i32 0, ptr %4, align 4
  br label %104

104:                                              ; preds = %103, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #3
  %105 = load i32, ptr %4, align 4
  switch i32 %105, label %107 [
    i32 0, label %106
    i32 1, label %106
  ]

106:                                              ; preds = %104, %104
  ret void

107:                                              ; preds = %104
  unreachable
}

declare void @OSTimeTickHook() #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !7, i64 82}
!13 = !{!"os_tcb", !11, i64 0, !11, i64 8, !11, i64 16, !6, i64 24, !14, i64 28, !14, i64 30, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !14, i64 72, !6, i64 76, !7, i64 80, !7, i64 81, !7, i64 82, !7, i64 83, !7, i64 84, !7, i64 85, !7, i64 86, !7, i64 87, !6, i64 88, !6, i64 92, !6, i64 96, !11, i64 104, !6, i64 112, !11, i64 120, !7, i64 128}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !6, i64 76}
!16 = !{!13, !7, i64 80}
!17 = !{!13, !7, i64 81}
!18 = !{!13, !7, i64 86}
!19 = !{!13, !7, i64 85}
!20 = !{!13, !7, i64 84}
!21 = !{!13, !11, i64 32}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@OSRunning = external dso_local local_unnamed_addr global i8, align 1
@OSTime = external dso_local global i32, align 4
@OSTickStepState = external dso_local local_unnamed_addr global i8, align 1
@OSTCBList = external dso_local local_unnamed_addr global ptr, align 8
@OSRdyGrp = external dso_local local_unnamed_addr global i8, align 1
@OSRdyTbl = external dso_local local_unnamed_addr global [8 x i8], align 1

declare i32 @OS_CPU_SR_Save() local_unnamed_addr #0

declare void @OS_CPU_SR_Restore(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local void @OSTimeTick() local_unnamed_addr #1 {
  tail call void @OSTimeTickHook() #2
  %1 = tail call i32 @OS_CPU_SR_Save() #2
  %2 = load volatile i32, ptr @OSTime, align 4, !tbaa !5
  %3 = add i32 %2, 1
  store volatile i32 %3, ptr @OSTime, align 4, !tbaa !5
  tail call void @OS_CPU_SR_Restore(i32 noundef %1) #2
  %4 = load i8, ptr @OSRunning, align 1, !tbaa !9
  %5 = icmp eq i8 %4, 1
  br i1 %5, label %6, label %.loopexit

6:                                                ; preds = %0
  %7 = load i8, ptr @OSTickStepState, align 1, !tbaa !9
  switch i8 %7, label %8 [
    i8 0, label %.critedge
    i8 1, label %.loopexit
    i8 2, label %.critedge.sink.split
  ]

8:                                                ; preds = %6
  br label %.critedge.sink.split

.critedge.sink.split:                             ; preds = %6, %8
  %.sink21 = phi i8 [ 0, %8 ], [ 1, %6 ]
  store i8 %.sink21, ptr @OSTickStepState, align 1, !tbaa !9
  br label %.critedge

.critedge:                                        ; preds = %.critedge.sink.split, %6
  %9 = load ptr, ptr @OSTCBList, align 8, !tbaa !10
  %10 = getelementptr inbounds i8, ptr %9, i64 82
  %11 = load i8, ptr %10, align 2, !tbaa !12
  %.not19 = icmp eq i8 %11, 63
  br i1 %.not19, label %.loopexit, label %.lr.ph

.lr.ph:                                           ; preds = %.critedge, %42
  %.01520 = phi ptr [ %44, %42 ], [ %9, %.critedge ]
  %12 = tail call i32 @OS_CPU_SR_Save() #2
  %13 = getelementptr inbounds i8, ptr %.01520, i64 76
  %14 = load i32, ptr %13, align 4, !tbaa !15
  %.not17 = icmp eq i32 %14, 0
  br i1 %.not17, label %42, label %15

15:                                               ; preds = %.lr.ph
  %16 = add i32 %14, -1
  store i32 %16, ptr %13, align 4, !tbaa !15
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %42

18:                                               ; preds = %15
  %19 = getelementptr inbounds i8, ptr %.01520, i64 80
  %20 = load i8, ptr %19, align 8, !tbaa !16
  %21 = and i8 %20, 55
  %.not18 = icmp eq i8 %21, 0
  br i1 %.not18, label %24, label %22

22:                                               ; preds = %18
  %23 = and i8 %20, -56
  store i8 %23, ptr %19, align 8, !tbaa !16
  br label %24

24:                                               ; preds = %18, %22
  %25 = phi i8 [ %23, %22 ], [ %20, %18 ]
  %.sink = phi i8 [ 1, %22 ], [ 0, %18 ]
  %26 = getelementptr inbounds i8, ptr %.01520, i64 81
  store i8 %.sink, ptr %26, align 1
  %27 = and i8 %25, 8
  %28 = icmp eq i8 %27, 0
  br i1 %28, label %29, label %42

29:                                               ; preds = %24
  %30 = getelementptr inbounds i8, ptr %.01520, i64 86
  %31 = load i8, ptr %30, align 2, !tbaa !17
  %32 = load i8, ptr @OSRdyGrp, align 1, !tbaa !9
  %33 = or i8 %32, %31
  store i8 %33, ptr @OSRdyGrp, align 1, !tbaa !9
  %34 = getelementptr inbounds i8, ptr %.01520, i64 85
  %35 = load i8, ptr %34, align 1, !tbaa !18
  %36 = getelementptr inbounds i8, ptr %.01520, i64 84
  %37 = load i8, ptr %36, align 4, !tbaa !19
  %38 = zext i8 %37 to i64
  %39 = getelementptr inbounds [8 x i8], ptr @OSRdyTbl, i64 0, i64 %38
  %40 = load i8, ptr %39, align 1, !tbaa !9
  %41 = or i8 %40, %35
  store i8 %41, ptr %39, align 1, !tbaa !9
  br label %42

42:                                               ; preds = %15, %29, %24, %.lr.ph
  %43 = getelementptr inbounds i8, ptr %.01520, i64 32
  %44 = load ptr, ptr %43, align 8, !tbaa !20
  tail call void @OS_CPU_SR_Restore(i32 noundef %12) #2
  %45 = getelementptr inbounds i8, ptr %44, i64 82
  %46 = load i8, ptr %45, align 2, !tbaa !12
  %.not = icmp eq i8 %46, 63
  br i1 %.not, label %.loopexit, label %.lr.ph, !llvm.loop !21

.loopexit:                                        ; preds = %42, %.critedge, %6, %0
  ret void
}

declare void @OSTimeTickHook() local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !7, i64 82}
!13 = !{!"os_tcb", !11, i64 0, !11, i64 8, !11, i64 16, !6, i64 24, !14, i64 28, !14, i64 30, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !14, i64 72, !6, i64 76, !7, i64 80, !7, i64 81, !7, i64 82, !7, i64 83, !7, i64 84, !7, i64 85, !7, i64 86, !7, i64 87, !6, i64 88, !6, i64 92, !6, i64 96, !11, i64 104, !6, i64 112, !11, i64 120, !7, i64 128}
!14 = !{!"short", !7, i64 0}
!15 = !{!13, !6, i64 76}
!16 = !{!13, !7, i64 80}
!17 = !{!13, !7, i64 86}
!18 = !{!13, !7, i64 85}
!19 = !{!13, !7, i64 84}
!20 = !{!13, !11, i64 32}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,MergedLoadStoreMotionPass,SROAPass,SimplifyCFGPass,TailCallElimPass