; LLVM IR from johnb003/PlasmaSim :: adMath/src/adVector.ll (ZN2ad4Vec45CrossERKS0_S2_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.ad::Vec4" = type { double, double, double, double }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN2ad4Vec45CrossERKS0_S2_(ptr dead_on_unwind noalias writable sret(%"class.ad::Vec4") align 8 %0, ptr noundef nonnull align 8 dereferenceable(32) %1, ptr noundef nonnull align 8 dereferenceable(32) %2) #0 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  store ptr %0, ptr %4, align 8
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  call void @_ZN2ad4Vec4C1Ev(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %7 = load ptr, ptr %5, align 8, !tbaa !5
  %8 = getelementptr inbounds %"class.ad::Vec4", ptr %7, i32 0, i32 1
  %9 = load double, ptr %8, align 8, !tbaa !9
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = getelementptr inbounds %"class.ad::Vec4", ptr %10, i32 0, i32 2
  %12 = load double, ptr %11, align 8, !tbaa !12
  %13 = load ptr, ptr %6, align 8, !tbaa !5
  %14 = getelementptr inbounds %"class.ad::Vec4", ptr %13, i32 0, i32 1
  %15 = load double, ptr %14, align 8, !tbaa !9
  %16 = load ptr, ptr %5, align 8, !tbaa !5
  %17 = getelementptr inbounds %"class.ad::Vec4", ptr %16, i32 0, i32 2
  %18 = load double, ptr %17, align 8, !tbaa !12
  %19 = fmul double %15, %18
  %20 = fneg double %19
  %21 = call double @llvm.fmuladd.f64(double %9, double %12, double %20)
  %22 = getelementptr inbounds %"class.ad::Vec4", ptr %0, i32 0, i32 0
  store double %21, ptr %22, align 8, !tbaa !13
  %23 = load ptr, ptr %5, align 8, !tbaa !5
  %24 = getelementptr inbounds %"class.ad::Vec4", ptr %23, i32 0, i32 2
  %25 = load double, ptr %24, align 8, !tbaa !12
  %26 = load ptr, ptr %6, align 8, !tbaa !5
  %27 = getelementptr inbounds %"class.ad::Vec4", ptr %26, i32 0, i32 0
  %28 = load double, ptr %27, align 8, !tbaa !13
  %29 = load ptr, ptr %6, align 8, !tbaa !5
  %30 = getelementptr inbounds %"class.ad::Vec4", ptr %29, i32 0, i32 2
  %31 = load double, ptr %30, align 8, !tbaa !12
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %"class.ad::Vec4", ptr %32, i32 0, i32 0
  %34 = load double, ptr %33, align 8, !tbaa !13
  %35 = fmul double %31, %34
  %36 = fneg double %35
  %37 = call double @llvm.fmuladd.f64(double %25, double %28, double %36)
  %38 = getelementptr inbounds %"class.ad::Vec4", ptr %0, i32 0, i32 1
  store double %37, ptr %38, align 8, !tbaa !9
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = getelementptr inbounds %"class.ad::Vec4", ptr %39, i32 0, i32 0
  %41 = load double, ptr %40, align 8, !tbaa !13
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds %"class.ad::Vec4", ptr %42, i32 0, i32 1
  %44 = load double, ptr %43, align 8, !tbaa !9
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = getelementptr inbounds %"class.ad::Vec4", ptr %45, i32 0, i32 0
  %47 = load double, ptr %46, align 8, !tbaa !13
  %48 = load ptr, ptr %5, align 8, !tbaa !5
  %49 = getelementptr inbounds %"class.ad::Vec4", ptr %48, i32 0, i32 1
  %50 = load double, ptr %49, align 8, !tbaa !9
  %51 = fmul double %47, %50
  %52 = fneg double %51
  %53 = call double @llvm.fmuladd.f64(double %41, double %44, double %52)
  %54 = getelementptr inbounds %"class.ad::Vec4", ptr %0, i32 0, i32 2
  store double %53, ptr %54, align 8, !tbaa !12
  %55 = getelementptr inbounds %"class.ad::Vec4", ptr %0, i32 0, i32 3
  store double 0.000000e+00, ptr %55, align 8, !tbaa !14
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

declare void @_ZN2ad4Vec4C1Ev(ptr)

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"_ZTSN2ad4Vec4E", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!11 = !{!"double", !7, i64 0}
!12 = !{!10, !11, i64 16}
!13 = !{!10, !11, i64 0}
!14 = !{!10, !11, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.ad::Vec4" = type { double, double, double, double }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN2ad4Vec45CrossERKS0_S2_(ptr dead_on_unwind noalias writable sret(%"class.ad::Vec4") align 8 %0, ptr nocapture noundef nonnull readonly align 8 dereferenceable(32) %1, ptr nocapture noundef nonnull readonly align 8 dereferenceable(32) %2) local_unnamed_addr #0 align 2 {
  tail call void @_ZN2ad4Vec4C1Ev(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %4 = getelementptr inbounds i8, ptr %1, i64 8
  %5 = getelementptr inbounds i8, ptr %2, i64 8
  %6 = load double, ptr %2, align 8, !tbaa !5
  %7 = load double, ptr %1, align 8, !tbaa !5
  %8 = load <2 x double>, ptr %5, align 8, !tbaa !10
  %9 = load <2 x double>, ptr %4, align 8, !tbaa !10
  %10 = fneg <2 x double> %8
  %11 = shufflevector <2 x double> %9, <2 x double> poison, <2 x i32> <i32 1, i32 poison>
  %12 = insertelement <2 x double> %11, double %7, i64 1
  %13 = fmul <2 x double> %12, %10
  %14 = shufflevector <2 x double> %8, <2 x double> poison, <2 x i32> <i32 1, i32 poison>
  %15 = insertelement <2 x double> %14, double %6, i64 1
  %16 = tail call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %9, <2 x double> %15, <2 x double> %13)
  store <2 x double> %16, ptr %0, align 8, !tbaa !10
  %17 = fneg double %6
  %18 = extractelement <2 x double> %9, i64 0
  %19 = fmul double %18, %17
  %20 = extractelement <2 x double> %8, i64 0
  %21 = tail call double @llvm.fmuladd.f64(double %7, double %20, double %19)
  %22 = getelementptr inbounds i8, ptr %0, i64 16
  store double %21, ptr %22, align 8, !tbaa !11
  %23 = getelementptr inbounds i8, ptr %0, i64 24
  store double 0.000000e+00, ptr %23, align 8, !tbaa !12
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #1

declare void @_ZN2ad4Vec4C1Ev(ptr) local_unnamed_addr

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <2 x double> @llvm.fmuladd.v2f64(<2 x double>, <2 x double>, <2 x double>) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN2ad4Vec4E", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 16}
!12 = !{!6, !7, i64 24}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SLPVectorizerPass,SROAPass,TailCallElimPass