; LLVM IR from cvra/robot-software :: uwb-beacon-firmware/src/decadriver/deca_device.ll (dwt_otpsetmrregs)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_writetodevice(i16 noundef zeroext, i16 noundef zeroext, i64 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_readfromdevice(i16 noundef zeroext, i16 noundef zeroext, i64 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i64 @_dwt_otpsetmrregs(i32 noundef %0) #1 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca [4 x i8], align 1
  %5 = alloca [4 x i8], align 1
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  store i64 0, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #3
  store i64 0, ptr %7, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  store i64 0, ptr %8, align 8, !tbaa !9
  %10 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 3, ptr %10, align 1, !tbaa !11
  %11 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %11)
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = and i32 %12, 15
  switch i32 %13, label %20 [
    i32 0, label %14
    i32 1, label %15
    i32 2, label %16
    i32 3, label %17
    i32 4, label %18
    i32 5, label %19
  ]

14:                                               ; preds = %1
  store i64 0, ptr %8, align 8, !tbaa !9
  store i64 0, ptr %6, align 8, !tbaa !9
  store i64 0, ptr %7, align 8, !tbaa !9
  br label %21

15:                                               ; preds = %1
  store i64 4132, ptr %8, align 8, !tbaa !9
  store i64 37408, ptr %6, align 8, !tbaa !9
  store i64 14, ptr %7, align 8, !tbaa !9
  br label %21

16:                                               ; preds = %1
  store i64 6180, ptr %8, align 8, !tbaa !9
  store i64 37408, ptr %6, align 8, !tbaa !9
  store i64 3, ptr %7, align 8, !tbaa !9
  br label %21

17:                                               ; preds = %1
  store i64 6180, ptr %8, align 8, !tbaa !9
  store i64 37408, ptr %6, align 8, !tbaa !9
  store i64 78, ptr %7, align 8, !tbaa !9
  br label %21

18:                                               ; preds = %1
  store i64 0, ptr %8, align 8, !tbaa !9
  store i64 0, ptr %6, align 8, !tbaa !9
  store i64 3, ptr %7, align 8, !tbaa !9
  br label %21

19:                                               ; preds = %1
  store i64 36, ptr %8, align 8, !tbaa !9
  store i64 0, ptr %6, align 8, !tbaa !9
  store i64 3, ptr %7, align 8, !tbaa !9
  br label %21

20:                                               ; preds = %1
  store i64 -1, ptr %2, align 8
  store i32 1, ptr %9, align 4
  br label %100

21:                                               ; preds = %19, %18, %17, %16, %15, %14
  %22 = load i64, ptr %6, align 8, !tbaa !9
  %23 = and i64 %22, 255
  %24 = trunc i64 %23 to i8
  %25 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 %24, ptr %25, align 1, !tbaa !11
  %26 = load i64, ptr %6, align 8, !tbaa !9
  %27 = and i64 %26, 65280
  %28 = lshr i64 %27, 8
  %29 = trunc i64 %28 to i8
  %30 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 1
  store i8 %29, ptr %30, align 1, !tbaa !11
  %31 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 0, i64 noundef 2, ptr noundef %31)
  %32 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 8, ptr %32, align 1, !tbaa !11
  %33 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %33)
  %34 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 2, ptr %34, align 1, !tbaa !11
  %35 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %35)
  %36 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 -120, ptr %36, align 1, !tbaa !11
  %37 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %37)
  %38 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 -128, ptr %38, align 1, !tbaa !11
  %39 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %39)
  %40 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 0, ptr %40, align 1, !tbaa !11
  %41 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %41)
  %42 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 5, ptr %42, align 1, !tbaa !11
  %43 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %43)
  %44 = load i64, ptr %7, align 8, !tbaa !9
  %45 = and i64 %44, 255
  %46 = trunc i64 %45 to i8
  %47 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 %46, ptr %47, align 1, !tbaa !11
  %48 = load i64, ptr %7, align 8, !tbaa !9
  %49 = and i64 %48, 65280
  %50 = lshr i64 %49, 8
  %51 = trunc i64 %50 to i8
  %52 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 1
  store i8 %51, ptr %52, align 1, !tbaa !11
  %53 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 0, i64 noundef 2, ptr noundef %53)
  %54 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 8, ptr %54, align 1, !tbaa !11
  %55 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %55)
  %56 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 4, ptr %56, align 1, !tbaa !11
  %57 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %57)
  %58 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 -120, ptr %58, align 1, !tbaa !11
  %59 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %59)
  %60 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 -128, ptr %60, align 1, !tbaa !11
  %61 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %61)
  %62 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 0, ptr %62, align 1, !tbaa !11
  %63 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %63)
  %64 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 1, ptr %64, align 1, !tbaa !11
  %65 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %65)
  %66 = load i64, ptr %8, align 8, !tbaa !9
  %67 = and i64 %66, 255
  %68 = trunc i64 %67 to i8
  %69 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 %68, ptr %69, align 1, !tbaa !11
  %70 = load i64, ptr %8, align 8, !tbaa !9
  %71 = and i64 %70, 65280
  %72 = lshr i64 %71, 8
  %73 = trunc i64 %72 to i8
  %74 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 1
  store i8 %73, ptr %74, align 1, !tbaa !11
  %75 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 0, i64 noundef 2, ptr noundef %75)
  %76 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 8, ptr %76, align 1, !tbaa !11
  %77 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %77)
  call void @deca_sleep(i32 noundef 10)
  %78 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 0, ptr %78, align 1, !tbaa !11
  %79 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %79)
  %80 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 1, ptr %80, align 1, !tbaa !11
  %81 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %81)
  %82 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 2, ptr %82, align 1, !tbaa !11
  %83 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %83)
  %84 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 4, ptr %84, align 1, !tbaa !11
  %85 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %85)
  call void @deca_sleep(i32 noundef 100)
  %86 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 0, ptr %86, align 1, !tbaa !11
  %87 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef %87)
  %88 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  store i8 0, ptr %88, align 1, !tbaa !11
  %89 = getelementptr inbounds [4 x i8], ptr %5, i64 0, i64 0
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef %89)
  call void @deca_sleep(i32 noundef 10)
  %90 = load i32, ptr %3, align 4, !tbaa !5
  %91 = and i32 %90, 15
  %92 = icmp eq i32 %91, 1
  br i1 %92, label %97, label %93

93:                                               ; preds = %21
  %94 = load i32, ptr %3, align 4, !tbaa !5
  %95 = and i32 %94, 15
  %96 = icmp eq i32 %95, 2
  br i1 %96, label %97, label %99

97:                                               ; preds = %93, %21
  %98 = getelementptr inbounds [4 x i8], ptr %4, i64 0, i64 0
  call void @dwt_readfromdevice(i16 noundef zeroext 45, i16 noundef zeroext 8, i64 noundef 1, ptr noundef %98)
  br label %99

99:                                               ; preds = %97, %93
  store i64 0, ptr %2, align 8
  store i32 1, ptr %9, align 4
  br label %100

100:                                              ; preds = %99, %20
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %101 = load i64, ptr %2, align 8
  ret i64 %101
}

declare void @deca_sleep(i32 noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@switch.table._dwt_otpsetmrregs = private unnamed_addr constant [6 x i64] [i64 0, i64 37408, i64 37408, i64 37408, i64 0, i64 0], align 8
@switch.table._dwt_otpsetmrregs.1 = private unnamed_addr constant [6 x i64] [i64 0, i64 4132, i64 6180, i64 6180, i64 0, i64 36], align 8

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_writetodevice(i16 noundef zeroext, i16 noundef zeroext, i64 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @dwt_readfromdevice(i16 noundef zeroext, i16 noundef zeroext, i64 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local range(i64 -1, 1) i64 @_dwt_otpsetmrregs(i32 noundef %0) local_unnamed_addr #1 {
  %2 = alloca [4 x i8], align 1
  %3 = alloca [4 x i8], align 1
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  store i8 3, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  %4 = and i32 %0, 15
  %5 = icmp ult i32 %4, 6
  br i1 %5, label %switch.lookup, label %17

switch.lookup:                                    ; preds = %1
  %6 = zext nneg i32 %4 to i64
  %switch.gep = getelementptr inbounds [6 x i64], ptr @switch.table._dwt_otpsetmrregs, i64 0, i64 %6
  %switch.load = load i64, ptr %switch.gep, align 8
  %7 = shl nuw nsw i32 %4, 3
  %switch.shiftamt = zext nneg i32 %7 to i48
  %switch.downshift = lshr i48 3312728608256, %switch.shiftamt
  %switch.masked = trunc i48 %switch.downshift to i8
  %8 = zext nneg i32 %4 to i64
  %switch.gep14 = getelementptr inbounds [6 x i64], ptr @switch.table._dwt_otpsetmrregs.1, i64 0, i64 %8
  %switch.load15 = load i64, ptr %switch.gep14, align 8
  %9 = trunc i64 %switch.load to i8
  store i8 %9, ptr %3, align 1, !tbaa !5
  %10 = lshr i64 %switch.load, 8
  %11 = trunc nuw i64 %10 to i8
  %12 = getelementptr inbounds i8, ptr %3, i64 1
  store i8 %11, ptr %12, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 0, i64 noundef 2, ptr noundef nonnull %3)
  store i8 8, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 2, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  store i8 -120, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 -128, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 0, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 5, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  store i8 %switch.masked, ptr %3, align 1, !tbaa !5
  store i8 0, ptr %12, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 0, i64 noundef 2, ptr noundef nonnull %3)
  store i8 8, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 4, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  store i8 -120, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 -128, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 0, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 1, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  %13 = trunc i64 %switch.load15 to i8
  store i8 %13, ptr %3, align 1, !tbaa !5
  %14 = lshr i64 %switch.load15, 8
  %15 = trunc nuw nsw i64 %14 to i8
  store i8 %15, ptr %12, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 0, i64 noundef 2, ptr noundef nonnull %3)
  store i8 8, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  call void @deca_sleep(i32 noundef 10) #3
  store i8 0, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  store i8 1, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  store i8 2, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  store i8 4, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  call void @deca_sleep(i32 noundef 100) #3
  store i8 0, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 7, i64 noundef 1, ptr noundef nonnull %3)
  store i8 0, ptr %3, align 1, !tbaa !5
  call void @dwt_writetodevice(i16 noundef zeroext 45, i16 noundef zeroext 6, i64 noundef 1, ptr noundef nonnull %3)
  call void @deca_sleep(i32 noundef 10) #3
  %.off = add nsw i32 %4, -1
  %switch = icmp ult i32 %.off, 2
  br i1 %switch, label %16, label %17

16:                                               ; preds = %switch.lookup
  call void @dwt_readfromdevice(i16 noundef zeroext 45, i16 noundef zeroext 8, i64 noundef 1, ptr noundef nonnull %2)
  br label %17

17:                                               ; preds = %1, %switch.lookup, %16
  %.012 = phi i64 [ -1, %1 ], [ 0, %switch.lookup ], [ 0, %16 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  ret i64 %.012
}

declare void @deca_sleep(i32 noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,SROAPass,SimplifyCFGPass