; LLVM IR from aspuru-guzik-group/qtorch :: nlopt-2.4.2/stogo/tools.ll (ZN4VBox8MidpointERK7RVector)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.VBox = type { %class.RVector, %class.RVector }
%class.RVector = type { i32, ptr }

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN4VBox6GetDimEv(ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4VBox8MidpointERK7RVector(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(16) %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %8 = call noundef i32 @_ZN4VBox6GetDimEv(ptr noundef nonnull align 8 dereferenceable(32) %7)
  store i32 %8, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %9

9:                                                ; preds = %34, %2
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = load i32, ptr %5, align 4, !tbaa !9
  %12 = icmp slt i32 %10, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %9
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %37

14:                                               ; preds = %9
  %15 = getelementptr inbounds %class.VBox, ptr %7, i32 0, i32 1
  %16 = load i32, ptr %6, align 4, !tbaa !9
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %15, i32 noundef %16)
  %18 = load double, ptr %17, align 8, !tbaa !11
  %19 = getelementptr inbounds %class.VBox, ptr %7, i32 0, i32 0
  %20 = load i32, ptr %6, align 4, !tbaa !9
  %21 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %19, i32 noundef %20)
  %22 = load double, ptr %21, align 8, !tbaa !11
  %23 = fsub double %18, %22
  %24 = call double @llvm.fabs.f64(double %23)
  %25 = fdiv double %24, 2.000000e+00
  %26 = getelementptr inbounds %class.VBox, ptr %7, i32 0, i32 0
  %27 = load i32, ptr %6, align 4, !tbaa !9
  %28 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %26, i32 noundef %27)
  %29 = load double, ptr %28, align 8, !tbaa !11
  %30 = fadd double %25, %29
  %31 = load ptr, ptr %4, align 8, !tbaa !5
  %32 = load i32, ptr %6, align 4, !tbaa !9
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %31, i32 noundef %32)
  store double %30, ptr %33, align 8, !tbaa !11
  br label %34

34:                                               ; preds = %14
  %35 = load i32, ptr %6, align 4, !tbaa !9
  %36 = add nsw i32 %35, 1
  store i32 %36, ptr %6, align 4, !tbaa !9
  br label %9, !llvm.loop !13

37:                                               ; preds = %13
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN4VBox6GetDimEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16), i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN4VBox8MidpointERK7RVector(ptr noundef nonnull align 8 dereferenceable(32) %0, ptr noundef nonnull align 8 dereferenceable(16) %1) local_unnamed_addr #0 align 2 {
  %3 = tail call noundef i32 @_ZN4VBox6GetDimEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %4 = icmp sgt i32 %3, 0
  br i1 %4, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2
  %5 = getelementptr inbounds i8, ptr %0, i64 16
  br label %6

._crit_edge:                                      ; preds = %6, %2
  ret void

6:                                                ; preds = %.lr.ph, %6
  %.08 = phi i32 [ 0, %.lr.ph ], [ %18, %6 ]
  %7 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %5, i32 noundef %.08)
  %8 = load double, ptr %7, align 8, !tbaa !5
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %.08)
  %10 = load double, ptr %9, align 8, !tbaa !5
  %11 = fsub double %8, %10
  %12 = tail call double @llvm.fabs.f64(double %11)
  %13 = fmul double %12, 5.000000e-01
  %14 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %0, i32 noundef %.08)
  %15 = load double, ptr %14, align 8, !tbaa !5
  %16 = fadd double %15, %13
  %17 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNK7RVectorclEi(ptr noundef nonnull align 8 dereferenceable(16) %1, i32 noundef %.08)
  store double %16, ptr %17, align 8, !tbaa !5
  %18 = add nuw nsw i32 %.08, 1
  %exitcond.not = icmp eq i32 %18, %3
  br i1 %exitcond.not, label %._crit_edge, label %6, !llvm.loop !9
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fabs.f64(double) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass