; LLVM IR from jgaeddert/liquid-dsp :: src/modem/src (modem_utilities)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.105 = external hidden unnamed_addr constant [86 x i8], align 1
@.str.112 = external hidden unnamed_addr constant [60 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @liquid_error_fl(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ...) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i32 @liquid_pack_soft_bits(ptr noundef %0, i32 noundef %1, ptr noundef %2) #2 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store ptr %2, ptr %7, align 8, !tbaa !5
  %10 = load i32, ptr %6, align 4, !tbaa !9
  %11 = icmp ugt i32 %10, 8
  br i1 %11, label %12, label %14

12:                                               ; preds = %3
  %13 = call i32 (i32, ptr, i32, ptr, ...) @liquid_error_fl(i32 noundef 5, ptr noundef @.str.105, i32 noundef 282, ptr noundef @.str.112, i32 noundef 8)
  store i32 %13, ptr %4, align 4
  br label %39

14:                                               ; preds = %3
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  store i32 0, ptr %9, align 4, !tbaa !9
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %33, %14
  %16 = load i32, ptr %8, align 4, !tbaa !9
  %17 = load i32, ptr %6, align 4, !tbaa !9
  %18 = icmp ult i32 %16, %17
  br i1 %18, label %19, label %36

19:                                               ; preds = %15
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = shl i32 %20, 1
  store i32 %21, ptr %9, align 4, !tbaa !9
  %22 = load ptr, ptr %5, align 8, !tbaa !5
  %23 = load i32, ptr %8, align 4, !tbaa !9
  %24 = zext i32 %23 to i64
  %25 = getelementptr inbounds i8, ptr %22, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !11
  %27 = zext i8 %26 to i32
  %28 = icmp sgt i32 %27, 127
  %29 = zext i1 %28 to i64
  %30 = select i1 %28, i32 1, i32 0
  %31 = load i32, ptr %9, align 4, !tbaa !9
  %32 = or i32 %31, %30
  store i32 %32, ptr %9, align 4, !tbaa !9
  br label %33

33:                                               ; preds = %19
  %34 = load i32, ptr %8, align 4, !tbaa !9
  %35 = add i32 %34, 1
  store i32 %35, ptr %8, align 4, !tbaa !9
  br label %15, !llvm.loop !12

36:                                               ; preds = %15
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = load ptr, ptr %7, align 8, !tbaa !5
  store i32 %37, ptr %38, align 4, !tbaa !9
  store i32 0, ptr %4, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %39

39:                                               ; preds = %36, %12
  %40 = load i32, ptr %4, align 4
  ret i32 %40
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.105 = external hidden unnamed_addr constant [86 x i8], align 1
@.str.112 = external hidden unnamed_addr constant [60 x i8], align 1

declare i32 @liquid_error_fl(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local i32 @liquid_pack_soft_bits(ptr nocapture noundef readonly %0, i32 noundef %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #1 {
  %4 = icmp ugt i32 %1, 8
  br i1 %4, label %5, label %.preheader

.preheader:                                       ; preds = %3
  %.not = icmp eq i32 %1, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph

5:                                                ; preds = %3
  %6 = tail call i32 (i32, ptr, i32, ptr, ...) @liquid_error_fl(i32 noundef 5, ptr noundef nonnull @.str.105, i32 noundef 282, ptr noundef nonnull @.str.112, i32 noundef 8) #2
  br label %44

.lr.ph:                                           ; preds = %.preheader
  %7 = load i8, ptr %0, align 1, !tbaa !5
  %.lobit = lshr i8 %7, 7
  %8 = zext nneg i8 %.lobit to i32
  %exitcond.not = icmp eq i32 %1, 1
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph.1, !llvm.loop !8

.lr.ph.1:                                         ; preds = %.lr.ph
  %9 = shl nuw nsw i32 %8, 1
  %10 = getelementptr inbounds i8, ptr %0, i64 1
  %11 = load i8, ptr %10, align 1, !tbaa !5
  %.lobit.1 = lshr i8 %11, 7
  %12 = zext nneg i8 %.lobit.1 to i32
  %13 = or disjoint i32 %9, %12
  %exitcond.not.1 = icmp eq i32 %1, 2
  br i1 %exitcond.not.1, label %._crit_edge, label %.lr.ph.2, !llvm.loop !8

.lr.ph.2:                                         ; preds = %.lr.ph.1
  %14 = shl nuw nsw i32 %13, 1
  %15 = getelementptr inbounds i8, ptr %0, i64 2
  %16 = load i8, ptr %15, align 1, !tbaa !5
  %.lobit.2 = lshr i8 %16, 7
  %17 = zext nneg i8 %.lobit.2 to i32
  %18 = or disjoint i32 %14, %17
  %exitcond.not.2 = icmp eq i32 %1, 3
  br i1 %exitcond.not.2, label %._crit_edge, label %.lr.ph.3, !llvm.loop !8

.lr.ph.3:                                         ; preds = %.lr.ph.2
  %19 = shl nuw nsw i32 %18, 1
  %20 = getelementptr inbounds i8, ptr %0, i64 3
  %21 = load i8, ptr %20, align 1, !tbaa !5
  %.lobit.3 = lshr i8 %21, 7
  %22 = zext nneg i8 %.lobit.3 to i32
  %23 = or disjoint i32 %19, %22
  %exitcond.not.3 = icmp eq i32 %1, 4
  br i1 %exitcond.not.3, label %._crit_edge, label %.lr.ph.4, !llvm.loop !8

.lr.ph.4:                                         ; preds = %.lr.ph.3
  %24 = shl nuw i32 %23, 1
  %25 = getelementptr inbounds i8, ptr %0, i64 4
  %26 = load i8, ptr %25, align 1, !tbaa !5
  %.lobit.4 = lshr i8 %26, 7
  %27 = zext nneg i8 %.lobit.4 to i32
  %28 = or disjoint i32 %24, %27
  %exitcond.not.4 = icmp eq i32 %1, 5
  br i1 %exitcond.not.4, label %._crit_edge, label %.lr.ph.5, !llvm.loop !8

.lr.ph.5:                                         ; preds = %.lr.ph.4
  %29 = shl i32 %28, 1
  %30 = getelementptr inbounds i8, ptr %0, i64 5
  %31 = load i8, ptr %30, align 1, !tbaa !5
  %.lobit.5 = lshr i8 %31, 7
  %32 = zext nneg i8 %.lobit.5 to i32
  %33 = or disjoint i32 %29, %32
  %exitcond.not.5 = icmp eq i32 %1, 6
  br i1 %exitcond.not.5, label %._crit_edge, label %.lr.ph.6, !llvm.loop !8

.lr.ph.6:                                         ; preds = %.lr.ph.5
  %34 = shl i32 %33, 1
  %35 = getelementptr inbounds i8, ptr %0, i64 6
  %36 = load i8, ptr %35, align 1, !tbaa !5
  %.lobit.6 = lshr i8 %36, 7
  %37 = zext nneg i8 %.lobit.6 to i32
  %38 = or disjoint i32 %34, %37
  %exitcond.not.6 = icmp eq i32 %1, 7
  br i1 %exitcond.not.6, label %._crit_edge, label %.lr.ph.7, !llvm.loop !8

.lr.ph.7:                                         ; preds = %.lr.ph.6
  %39 = shl i32 %38, 1
  %40 = getelementptr inbounds i8, ptr %0, i64 7
  %41 = load i8, ptr %40, align 1, !tbaa !5
  %.lobit.7 = lshr i8 %41, 7
  %42 = zext nneg i8 %.lobit.7 to i32
  %43 = or disjoint i32 %39, %42
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph.1, %.lr.ph.2, %.lr.ph.3, %.lr.ph.4, %.lr.ph.5, %.lr.ph.6, %.lr.ph.7, %.preheader
  %.0.lcssa = phi i32 [ 0, %.preheader ], [ %8, %.lr.ph ], [ %13, %.lr.ph.1 ], [ %18, %.lr.ph.2 ], [ %23, %.lr.ph.3 ], [ %28, %.lr.ph.4 ], [ %33, %.lr.ph.5 ], [ %38, %.lr.ph.6 ], [ %43, %.lr.ph.7 ]
  store i32 %.0.lcssa, ptr %2, align 4, !tbaa !10
  br label %44

44:                                               ; preds = %._crit_edge, %5
  %.011 = phi i32 [ %6, %5 ], [ 0, %._crit_edge ]
  ret i32 %.011
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass