; LLVM IR from ponylang/ponyc :: src/libponyc/type (subtype)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [76 x i8], align 1
@.str.24 = external hidden unnamed_addr constant [2 x i8], align 1
@__func__.is_concrete = external hidden unnamed_addr constant [12 x i8], align 1

declare i32 @ast_id(ptr noundef) #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) #0

declare ptr @ast_childidx(ptr noundef, i64 noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @is_constructable(ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare ptr @ast_child(ptr noundef) #0

declare ptr @ast_sibling(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

declare ptr @ast_data(ptr noundef) #0

declare ptr @typeparam_constraint(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @is_concrete(ptr noundef %0) #1 {
  %2 = alloca i1, align 1
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = icmp eq ptr %7, null
  br i1 %8, label %9, label %10

9:                                                ; preds = %1
  store i1 false, ptr %2, align 1
  br label %50

10:                                               ; preds = %1
  %11 = load ptr, ptr %3, align 8, !tbaa !5
  %12 = call i32 @ast_id(ptr noundef %11)
  switch i32 %12, label %48 [
    i32 149, label %13
    i32 150, label %13
    i32 56, label %14
    i32 151, label %29
    i32 187, label %40
    i32 17, label %44
  ]

13:                                               ; preds = %10, %10
  store i1 false, ptr %2, align 1
  br label %50

14:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = call ptr @ast_child(ptr noundef %15)
  store ptr %16, ptr %4, align 8, !tbaa !5
  br label %17

17:                                               ; preds = %24, %14
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  %19 = icmp ne ptr %18, null
  br i1 %19, label %20, label %27

20:                                               ; preds = %17
  %21 = load ptr, ptr %4, align 8, !tbaa !5
  %22 = call zeroext i1 @is_concrete(ptr noundef %21)
  br i1 %22, label %23, label %24

23:                                               ; preds = %20
  store i1 true, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %28

24:                                               ; preds = %20
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = call ptr @ast_sibling(ptr noundef %25)
  store ptr %26, ptr %4, align 8, !tbaa !5
  br label %17, !llvm.loop !9

27:                                               ; preds = %17
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %28

28:                                               ; preds = %27, %23
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  br label %50

29:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = call ptr @ast_data(ptr noundef %30)
  store ptr %31, ptr %6, align 8, !tbaa !5
  %32 = load ptr, ptr %6, align 8, !tbaa !5
  %33 = call i32 @ast_id(ptr noundef %32)
  switch i32 %33, label %36 [
    i32 72, label %34
    i32 73, label %34
    i32 74, label %35
    i32 75, label %35
    i32 76, label %35
    i32 77, label %35
  ]

34:                                               ; preds = %29, %29
  store i1 false, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %38

35:                                               ; preds = %29, %29, %29, %29
  store i1 true, ptr %2, align 1
  store i32 1, ptr %5, align 4
  br label %38

36:                                               ; preds = %29
  br label %37

37:                                               ; preds = %36
  store i32 2, ptr %5, align 4
  br label %38

38:                                               ; preds = %37, %35, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  %39 = load i32, ptr %5, align 4
  switch i32 %39, label %52 [
    i32 1, label %50
    i32 2, label %49
  ]

40:                                               ; preds = %10
  %41 = load ptr, ptr %3, align 8, !tbaa !5
  %42 = call ptr @typeparam_constraint(ptr noundef %41)
  %43 = call zeroext i1 @is_constructable(ptr noundef %42)
  store i1 %43, ptr %2, align 1
  br label %50

44:                                               ; preds = %10
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = call ptr @ast_childidx(ptr noundef %45, i64 noundef 1)
  %47 = call zeroext i1 @is_concrete(ptr noundef %46)
  store i1 %47, ptr %2, align 1
  br label %50

48:                                               ; preds = %10
  br label %49

49:                                               ; preds = %48, %38
  call void @ponyint_assert_fail(ptr noundef @.str.24, ptr noundef @.str.1, i64 noundef 1963, ptr noundef @__func__.is_concrete)
  store i1 false, ptr %2, align 1
  br label %50

50:                                               ; preds = %49, %44, %40, %38, %28, %13, %9
  %51 = load i1, ptr %2, align 1
  ret i1 %51

52:                                               ; preds = %38
  unreachable
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [76 x i8], align 1
@.str.24 = external hidden unnamed_addr constant [2 x i8], align 1
@__func__.is_concrete = external hidden unnamed_addr constant [12 x i8], align 1

declare i32 @ast_id(ptr noundef) local_unnamed_addr #0

declare void @ponyint_assert_fail(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #0

declare ptr @ast_childidx(ptr noundef, i64 noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @is_constructable(ptr noundef) local_unnamed_addr #1

declare ptr @ast_child(ptr noundef) local_unnamed_addr #0

declare ptr @ast_sibling(ptr noundef) local_unnamed_addr #0

declare ptr @ast_data(ptr noundef) local_unnamed_addr #0

declare ptr @typeparam_constraint(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @is_concrete(ptr noundef %0) local_unnamed_addr #1 {
  %2 = icmp eq ptr %0, null
  br i1 %2, label %.thread, label %.lr.ph

.lr.ph:                                           ; preds = %1, %tailrecurse
  %.tr23 = phi ptr [ %16, %tailrecurse ], [ %0, %1 ]
  %3 = tail call i32 @ast_id(ptr noundef nonnull %.tr23) #2
  switch i32 %3, label %.loopexit [
    i32 149, label %.thread
    i32 150, label %.thread
    i32 56, label %4
    i32 151, label %9
    i32 187, label %13
    i32 17, label %tailrecurse
  ]

4:                                                ; preds = %.lr.ph
  %5 = tail call ptr @ast_child(ptr noundef nonnull %.tr23) #2
  %.not.not25 = icmp eq ptr %5, null
  br i1 %.not.not25, label %.thread, label %.lr.ph27

.lr.ph27:                                         ; preds = %4, %7
  %.01226 = phi ptr [ %8, %7 ], [ %5, %4 ]
  %6 = tail call zeroext i1 @is_concrete(ptr noundef nonnull %.01226)
  br i1 %6, label %.thread, label %7

7:                                                ; preds = %.lr.ph27
  %8 = tail call ptr @ast_sibling(ptr noundef nonnull %.01226) #2
  %.not.not = icmp eq ptr %8, null
  br i1 %.not.not, label %.thread, label %.lr.ph27, !llvm.loop !5

9:                                                ; preds = %.lr.ph
  %10 = tail call ptr @ast_data(ptr noundef nonnull %.tr23) #2
  %11 = tail call i32 @ast_id(ptr noundef %10) #2
  %switch.tableidx = add i32 %11, -72
  %12 = icmp ult i32 %switch.tableidx, 6
  br i1 %12, label %switch.lookup, label %.loopexit

13:                                               ; preds = %.lr.ph
  %14 = tail call ptr @typeparam_constraint(ptr noundef nonnull %.tr23) #2
  %15 = tail call zeroext i1 @is_constructable(ptr noundef %14)
  br label %.thread

tailrecurse:                                      ; preds = %.lr.ph
  %16 = tail call ptr @ast_childidx(ptr noundef nonnull %.tr23, i64 noundef 1) #2
  %17 = icmp eq ptr %16, null
  br i1 %17, label %.thread, label %.lr.ph

.loopexit:                                        ; preds = %.lr.ph, %9
  tail call void @ponyint_assert_fail(ptr noundef nonnull @.str.24, ptr noundef nonnull @.str.1, i64 noundef 1963, ptr noundef nonnull @__func__.is_concrete) #2
  br label %.thread

switch.lookup:                                    ; preds = %9
  %switch.cast = trunc nuw i32 %switch.tableidx to i6
  %switch.downshift = lshr i6 -4, %switch.cast
  %switch.masked = trunc i6 %switch.downshift to i1
  br label %.thread

.thread:                                          ; preds = %tailrecurse, %.lr.ph, %.lr.ph, %7, %.lr.ph27, %switch.lookup, %1, %4, %.loopexit, %13
  %.2 = phi i1 [ false, %.loopexit ], [ %15, %13 ], [ false, %4 ], [ false, %1 ], [ %switch.masked, %switch.lookup ], [ %6, %.lr.ph27 ], [ %6, %7 ], [ false, %.lr.ph ], [ false, %.lr.ph ], [ false, %tailrecurse ]
  ret i1 %.2
}

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass