; LLVM IR from sunkafei/xcpc-algorithm-templates :: 算法/数学算法/求解异或方程组.ll (Z5Gaussi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::bitset" = type { %"struct.std::_Base_bitset" }
%"struct.std::_Base_bitset" = type { [2 x i64] }
%"class.std::bitset<110>::reference" = type { ptr, i64 }

@a = external dso_local global [110 x %"class.std::bitset"], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5Gaussi(i32 noundef %0) #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %"class.std::bitset<110>::reference", align 8
  %8 = alloca i1, align 1
  %9 = alloca i1, align 1
  %10 = alloca i32, align 4
  %11 = alloca %"class.std::bitset<110>::reference", align 8
  %12 = alloca i1, align 1
  %13 = alloca i1, align 1
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %14

14:                                               ; preds = %103, %1
  %15 = load i32, ptr %4, align 4, !tbaa !5
  %16 = load i32, ptr %2, align 4, !tbaa !5
  %17 = icmp slt i32 %15, %16
  br i1 %17, label %19, label %18

18:                                               ; preds = %14
  store i32 2, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %106

19:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  %20 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %20, ptr %6, align 4, !tbaa !5
  br label %21

21:                                               ; preds = %41, %19
  %22 = load i32, ptr %6, align 4, !tbaa !5
  %23 = load i32, ptr %2, align 4, !tbaa !5
  %24 = icmp slt i32 %22, %23
  store i1 false, ptr %8, align 1
  store i1 false, ptr %9, align 1
  br i1 %24, label %25, label %33

25:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 16, ptr %7) #4
  store i1 true, ptr %8, align 1
  %26 = load i32, ptr %6, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %27
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  call void @_ZNSt6bitsetILm110EEixEm(ptr dead_on_unwind writable sret(%"class.std::bitset<110>::reference") align 8 %7, ptr noundef nonnull align 8 dereferenceable(16) %28, i64 noundef %30)
  store i1 true, ptr %9, align 1
  %31 = call noundef zeroext i1 @_ZNKSt6bitsetILm110EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %7) #4
  %32 = xor i1 %31, true
  br label %33

33:                                               ; preds = %25, %21
  %34 = phi i1 [ false, %21 ], [ %32, %25 ]
  %35 = load i1, ptr %9, align 1
  br i1 %35, label %36, label %37

36:                                               ; preds = %33
  call void @_ZNSt6bitsetILm110EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %7) #4
  br label %37

37:                                               ; preds = %36, %33
  %38 = load i1, ptr %8, align 1
  br i1 %38, label %39, label %40

39:                                               ; preds = %37
  call void @llvm.lifetime.end.p0(i64 16, ptr %7) #4
  br label %40

40:                                               ; preds = %39, %37
  br i1 %34, label %41, label %44

41:                                               ; preds = %40
  %42 = load i32, ptr %6, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %6, align 4, !tbaa !5
  br label %21, !llvm.loop !9

44:                                               ; preds = %40
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = load i32, ptr %2, align 4, !tbaa !5
  %47 = icmp eq i32 %45, %46
  br i1 %47, label %48, label %49

48:                                               ; preds = %44
  store i32 4, ptr %5, align 4
  br label %100

49:                                               ; preds = %44
  %50 = load i32, ptr %6, align 4, !tbaa !5
  %51 = load i32, ptr %3, align 4, !tbaa !5
  %52 = icmp ne i32 %50, %51
  br i1 %52, label %53, label %60

53:                                               ; preds = %49
  %54 = load i32, ptr %3, align 4, !tbaa !5
  %55 = sext i32 %54 to i64
  %56 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %55
  %57 = load i32, ptr %6, align 4, !tbaa !5
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %58
  call void @_ZSt4swapISt6bitsetILm110EEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS5_ESt18is_move_assignableIS5_EEE5valueEvE4typeERS5_SE_(ptr noundef nonnull align 8 dereferenceable(16) %56, ptr noundef nonnull align 8 dereferenceable(16) %59) #4
  br label %60

60:                                               ; preds = %53, %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %61

61:                                               ; preds = %94, %60
  %62 = load i32, ptr %10, align 4, !tbaa !5
  %63 = load i32, ptr %2, align 4, !tbaa !5
  %64 = icmp slt i32 %62, %63
  br i1 %64, label %66, label %65

65:                                               ; preds = %61
  store i32 7, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  br label %97

66:                                               ; preds = %61
  %67 = load i32, ptr %10, align 4, !tbaa !5
  %68 = load i32, ptr %3, align 4, !tbaa !5
  %69 = icmp ne i32 %67, %68
  store i1 false, ptr %12, align 1
  store i1 false, ptr %13, align 1
  br i1 %69, label %70, label %77

70:                                               ; preds = %66
  call void @llvm.lifetime.start.p0(i64 16, ptr %11) #4
  store i1 true, ptr %12, align 1
  %71 = load i32, ptr %10, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %72
  %74 = load i32, ptr %4, align 4, !tbaa !5
  %75 = sext i32 %74 to i64
  call void @_ZNSt6bitsetILm110EEixEm(ptr dead_on_unwind writable sret(%"class.std::bitset<110>::reference") align 8 %11, ptr noundef nonnull align 8 dereferenceable(16) %73, i64 noundef %75)
  store i1 true, ptr %13, align 1
  %76 = call noundef zeroext i1 @_ZNKSt6bitsetILm110EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %11) #4
  br label %77

77:                                               ; preds = %70, %66
  %78 = phi i1 [ false, %66 ], [ %76, %70 ]
  %79 = load i1, ptr %13, align 1
  br i1 %79, label %80, label %81

80:                                               ; preds = %77
  call void @_ZNSt6bitsetILm110EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %11) #4
  br label %81

81:                                               ; preds = %80, %77
  %82 = load i1, ptr %12, align 1
  br i1 %82, label %83, label %84

83:                                               ; preds = %81
  call void @llvm.lifetime.end.p0(i64 16, ptr %11) #4
  br label %84

84:                                               ; preds = %83, %81
  br i1 %78, label %85, label %93

85:                                               ; preds = %84
  %86 = load i32, ptr %3, align 4, !tbaa !5
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %87
  %89 = load i32, ptr %10, align 4, !tbaa !5
  %90 = sext i32 %89 to i64
  %91 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %90
  %92 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6bitsetILm110EEeOERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %91, ptr noundef nonnull align 8 dereferenceable(16) %88) #4
  br label %93

93:                                               ; preds = %85, %84
  br label %94

94:                                               ; preds = %93
  %95 = load i32, ptr %10, align 4, !tbaa !5
  %96 = add nsw i32 %95, 1
  store i32 %96, ptr %10, align 4, !tbaa !5
  br label %61, !llvm.loop !11

97:                                               ; preds = %65
  %98 = load i32, ptr %3, align 4, !tbaa !5
  %99 = add nsw i32 %98, 1
  store i32 %99, ptr %3, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  br label %100

100:                                              ; preds = %97, %48
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  %101 = load i32, ptr %5, align 4
  switch i32 %101, label %107 [
    i32 0, label %102
    i32 4, label %103
  ]

102:                                              ; preds = %100
  br label %103

103:                                              ; preds = %102, %100
  %104 = load i32, ptr %4, align 4, !tbaa !5
  %105 = add nsw i32 %104, 1
  store i32 %105, ptr %4, align 4, !tbaa !5
  br label %14, !llvm.loop !12

106:                                              ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  ret void

107:                                              ; preds = %100
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm110EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<110>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm110EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm110EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapISt6bitsetILm110EEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS5_ESt18is_move_assignableIS5_EEE5valueEvE4typeERS5_SE_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6bitsetILm110EEeOERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::bitset" = type { %"struct.std::_Base_bitset" }
%"struct.std::_Base_bitset" = type { [2 x i64] }
%"class.std::bitset<110>::reference" = type { ptr, i64 }

@a = external dso_local global [110 x %"class.std::bitset"], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5Gaussi(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca %"class.std::bitset<110>::reference", align 8
  %3 = alloca %"class.std::bitset<110>::reference", align 8
  %4 = icmp sgt i32 %0, 0
  br i1 %4, label %.preheader.us.preheader, label %._crit_edge46

.preheader.us.preheader:                          ; preds = %1
  %wide.trip.count55 = zext nneg i32 %0 to i64
  br label %.preheader.us

.preheader.us:                                    ; preds = %.preheader.us.preheader, %.critedge.thread.us.thread
  %indvars.iv52 = phi i64 [ 0, %.preheader.us.preheader ], [ %indvars.iv.next53, %.critedge.thread.us.thread ]
  %.03443.us = phi i32 [ 0, %.preheader.us.preheader ], [ %.1.us, %.critedge.thread.us.thread ]
  %5 = icmp slt i32 %.03443.us, %0
  br i1 %5, label %.critedge.lr.ph.us, label %.critedge.thread.us

.critedge.us:                                     ; preds = %.critedge.lr.ph.us, %8
  %indvars.iv = phi i64 [ %23, %.critedge.lr.ph.us ], [ %indvars.iv.next, %8 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
  %6 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %indvars.iv
  call void @_ZNSt6bitsetILm110EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<110>::reference") align 8 %2, ptr noundef nonnull align 8 dereferenceable(16) %6, i64 noundef %indvars.iv52)
  %7 = call noundef zeroext i1 @_ZNKSt6bitsetILm110EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %2) #3
  call void @_ZNSt6bitsetILm110EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %2) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3
  br i1 %7, label %.critedge.thread.us.loopexit, label %8

8:                                                ; preds = %.critedge.us
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %lftr.wideiv, %0
  br i1 %exitcond.not, label %.critedge.thread.us.thread, label %.critedge.us, !llvm.loop !5

.critedge.thread.us.loopexit:                     ; preds = %.critedge.us
  %9 = trunc nsw i64 %indvars.iv to i32
  br label %.critedge.thread.us

.critedge.thread.us:                              ; preds = %.critedge.thread.us.loopexit, %.preheader.us
  %.032.lcssa.us = phi i32 [ %.03443.us, %.preheader.us ], [ %9, %.critedge.thread.us.loopexit ]
  %10 = icmp eq i32 %.032.lcssa.us, %0
  br i1 %10, label %.critedge.thread.us.thread, label %11

11:                                               ; preds = %.critedge.thread.us
  %.not.us = icmp eq i32 %.032.lcssa.us, %.03443.us
  %.pre = sext i32 %.03443.us to i64
  br i1 %.not.us, label %.lr.ph.us, label %12

12:                                               ; preds = %11
  %13 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %.pre
  %14 = sext i32 %.032.lcssa.us to i64
  %15 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %14
  call void @_ZSt4swapISt6bitsetILm110EEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS5_ESt18is_move_assignableIS5_EEE5valueEvE4typeERS5_SE_(ptr noundef nonnull align 8 dereferenceable(16) %13, ptr noundef nonnull align 8 dereferenceable(16) %15) #3
  br label %.lr.ph.us

.lr.ph.us:                                        ; preds = %11, %12
  %16 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %.pre
  %17 = zext i32 %.03443.us to i64
  br label %18

18:                                               ; preds = %.lr.ph.us, %.critedge38.thread.us
  %indvars.iv48 = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next49, %.critedge38.thread.us ]
  %.not36.not.us = icmp eq i64 %indvars.iv48, %17
  br i1 %.not36.not.us, label %.critedge38.thread.us, label %.critedge38.us

.critedge38.us:                                   ; preds = %18
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
  %19 = getelementptr inbounds [110 x %"class.std::bitset"], ptr @a, i64 0, i64 %indvars.iv48
  call void @_ZNSt6bitsetILm110EEixEm(ptr dead_on_unwind nonnull writable sret(%"class.std::bitset<110>::reference") align 8 %3, ptr noundef nonnull align 8 dereferenceable(16) %19, i64 noundef %indvars.iv52)
  %20 = call noundef zeroext i1 @_ZNKSt6bitsetILm110EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %3) #3
  call void @_ZNSt6bitsetILm110EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16) %3) #3
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
  br i1 %20, label %21, label %.critedge38.thread.us

21:                                               ; preds = %.critedge38.us
  %22 = call noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6bitsetILm110EEeOERKS0_(ptr noundef nonnull align 8 dereferenceable(16) %19, ptr noundef nonnull align 8 dereferenceable(16) %16) #3
  br label %.critedge38.thread.us

.critedge38.thread.us:                            ; preds = %21, %.critedge38.us, %18
  %indvars.iv.next49 = add nuw nsw i64 %indvars.iv48, 1
  %exitcond51.not = icmp eq i64 %indvars.iv.next49, %wide.trip.count55
  br i1 %exitcond51.not, label %._crit_edge.us, label %18, !llvm.loop !7

.critedge.thread.us.thread:                       ; preds = %8, %._crit_edge.us, %.critedge.thread.us
  %.1.us = phi i32 [ %24, %._crit_edge.us ], [ %.03443.us, %.critedge.thread.us ], [ %.03443.us, %8 ]
  %indvars.iv.next53 = add nuw nsw i64 %indvars.iv52, 1
  %exitcond56.not = icmp eq i64 %indvars.iv.next53, %wide.trip.count55
  br i1 %exitcond56.not, label %._crit_edge46, label %.preheader.us, !llvm.loop !8

.critedge.lr.ph.us:                               ; preds = %.preheader.us
  %23 = sext i32 %.03443.us to i64
  br label %.critedge.us

._crit_edge.us:                                   ; preds = %.critedge38.thread.us
  %24 = add nsw i32 %.03443.us, 1
  br label %.critedge.thread.us.thread

._crit_edge46:                                    ; preds = %.critedge.thread.us.thread, %1
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm110EEixEm(ptr dead_on_unwind noalias writable sret(%"class.std::bitset<110>::reference") align 8, ptr noundef nonnull align 8 dereferenceable(16), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNKSt6bitsetILm110EE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6bitsetILm110EE9referenceD2Ev(ptr noundef nonnull align 8 dereferenceable(16)) unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapISt6bitsetILm110EEENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS5_ESt18is_move_assignableIS5_EEE5valueEvE4typeERS5_SE_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(16) ptr @_ZNSt6bitsetILm110EEeOERKS0_(ptr noundef nonnull align 8 dereferenceable(16), ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}


; Effective O3 passes: GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass