; LLVM IR from tfhe/spqlios-arithmetic :: spqlios/q120 (q120_ntt)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct._q120_ntt_reduc_step_precomp = type { [4 x i64], i64, i64 }

@.str.1 = external hidden unnamed_addr constant [81 x i8], align 1
@PRIMES_VEC = external hidden constant [4 x i32], align 16
@.str.6 = external hidden unnamed_addr constant [20 x i8], align 1
@__PRETTY_FUNCTION__.fill_reduction_meta = external hidden unnamed_addr constant [76 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nounwind
declare double @log2(double noundef) #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local i64 @fill_reduction_meta(i64 noundef %0, ptr noundef %1) #4 {
  %3 = alloca i64, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i32, align 4
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  %13 = alloca i64, align 8
  store i64 %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  store i64 -1, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  store i64 -1, ptr %6, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %14 = load i64, ptr %3, align 8, !tbaa !5
  %15 = udiv i64 %14, 2
  store i64 %15, ptr %7, align 8, !tbaa !5
  br label %16

16:                                               ; preds = %69, %2
  %17 = load i64, ptr %7, align 8, !tbaa !5
  %18 = load i64, ptr %3, align 8, !tbaa !5
  %19 = icmp ult i64 %17, %18
  br i1 %19, label %21, label %20

20:                                               ; preds = %16
  store i32 2, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  br label %72

21:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  store i64 0, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  store i64 0, ptr %10, align 8, !tbaa !5
  br label %22

22:                                               ; preds = %58, %21
  %23 = load i64, ptr %10, align 8, !tbaa !5
  %24 = icmp ult i64 %23, 4
  br i1 %24, label %26, label %25

25:                                               ; preds = %22
  store i32 5, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  br label %61

26:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #5
  %27 = load i64, ptr %3, align 8, !tbaa !5
  %28 = load i64, ptr %7, align 8, !tbaa !5
  %29 = sub i64 %27, %28
  %30 = load i64, ptr %7, align 8, !tbaa !5
  %31 = shl i64 1, %30
  %32 = load i64, ptr %10, align 8, !tbaa !5
  %33 = getelementptr inbounds [4 x i32], ptr @PRIMES_VEC, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !11
  %35 = zext i32 %34 to i64
  %36 = urem i64 %31, %35
  %37 = uitofp i64 %36 to double
  %38 = call double @log2(double noundef %37) #5
  %39 = call double @llvm.ceil.f64(double %38)
  %40 = fptoui double %39 to i64
  %41 = add i64 %29, %40
  store i64 %41, ptr %11, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %42 = load i64, ptr %11, align 8, !tbaa !5
  %43 = load i64, ptr %7, align 8, !tbaa !5
  %44 = icmp ugt i64 %42, %43
  br i1 %44, label %45, label %47

45:                                               ; preds = %26
  %46 = load i64, ptr %11, align 8, !tbaa !5
  br label %49

47:                                               ; preds = %26
  %48 = load i64, ptr %7, align 8, !tbaa !5
  br label %49

49:                                               ; preds = %47, %45
  %50 = phi i64 [ %46, %45 ], [ %48, %47 ]
  %51 = add i64 1, %50
  store i64 %51, ptr %12, align 8, !tbaa !5
  %52 = load i64, ptr %9, align 8, !tbaa !5
  %53 = load i64, ptr %12, align 8, !tbaa !5
  %54 = icmp ult i64 %52, %53
  br i1 %54, label %55, label %57

55:                                               ; preds = %49
  %56 = load i64, ptr %12, align 8, !tbaa !5
  store i64 %56, ptr %9, align 8, !tbaa !5
  br label %57

57:                                               ; preds = %55, %49
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #5
  br label %58

58:                                               ; preds = %57
  %59 = load i64, ptr %10, align 8, !tbaa !5
  %60 = add i64 %59, 1
  store i64 %60, ptr %10, align 8, !tbaa !5
  br label %22, !llvm.loop !13

61:                                               ; preds = %25
  %62 = load i64, ptr %9, align 8, !tbaa !5
  %63 = load i64, ptr %5, align 8, !tbaa !5
  %64 = icmp ult i64 %62, %63
  br i1 %64, label %65, label %68

65:                                               ; preds = %61
  %66 = load i64, ptr %7, align 8, !tbaa !5
  store i64 %66, ptr %6, align 8, !tbaa !5
  %67 = load i64, ptr %9, align 8, !tbaa !5
  store i64 %67, ptr %5, align 8, !tbaa !5
  br label %68

68:                                               ; preds = %65, %61
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  br label %69

69:                                               ; preds = %68
  %70 = load i64, ptr %7, align 8, !tbaa !5
  %71 = add i64 %70, 1
  store i64 %71, ptr %7, align 8, !tbaa !5
  br label %16, !llvm.loop !15

72:                                               ; preds = %20
  %73 = load i64, ptr %6, align 8, !tbaa !5
  %74 = load ptr, ptr %4, align 8, !tbaa !9
  %75 = getelementptr inbounds %struct._q120_ntt_reduc_step_precomp, ptr %74, i32 0, i32 2
  store i64 %73, ptr %75, align 8, !tbaa !16
  %76 = load i64, ptr %6, align 8, !tbaa !5
  %77 = shl i64 1, %76
  %78 = sub i64 %77, 1
  %79 = load ptr, ptr %4, align 8, !tbaa !9
  %80 = getelementptr inbounds %struct._q120_ntt_reduc_step_precomp, ptr %79, i32 0, i32 1
  store i64 %78, ptr %80, align 8, !tbaa !18
  call void @llvm.lifetime.start.p0(i64 8, ptr %13) #5
  store i64 0, ptr %13, align 8, !tbaa !5
  br label %81

81:                                               ; preds = %97, %72
  %82 = load i64, ptr %13, align 8, !tbaa !5
  %83 = icmp ult i64 %82, 4
  br i1 %83, label %85, label %84

84:                                               ; preds = %81
  store i32 8, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %13) #5
  br label %100

85:                                               ; preds = %81
  %86 = load i64, ptr %6, align 8, !tbaa !5
  %87 = shl i64 1, %86
  %88 = load i64, ptr %13, align 8, !tbaa !5
  %89 = getelementptr inbounds [4 x i32], ptr @PRIMES_VEC, i64 0, i64 %88
  %90 = load i32, ptr %89, align 4, !tbaa !11
  %91 = zext i32 %90 to i64
  %92 = urem i64 %87, %91
  %93 = load ptr, ptr %4, align 8, !tbaa !9
  %94 = getelementptr inbounds %struct._q120_ntt_reduc_step_precomp, ptr %93, i32 0, i32 0
  %95 = load i64, ptr %13, align 8, !tbaa !5
  %96 = getelementptr inbounds [4 x i64], ptr %94, i64 0, i64 %95
  store i64 %92, ptr %96, align 8, !tbaa !5
  br label %97

97:                                               ; preds = %85
  %98 = load i64, ptr %13, align 8, !tbaa !5
  %99 = add i64 %98, 1
  store i64 %99, ptr %13, align 8, !tbaa !5
  br label %81, !llvm.loop !19

100:                                              ; preds = %84
  %101 = load i64, ptr %5, align 8, !tbaa !5
  %102 = icmp ult i64 %101, 64
  br i1 %102, label %103, label %104

103:                                              ; preds = %100
  br label %105

104:                                              ; preds = %100
  call void @__assert_fail(ptr noundef @.str.6, ptr noundef @.str.1, i32 noundef 89, ptr noundef @__PRETTY_FUNCTION__.fill_reduction_meta) #6
  unreachable

105:                                              ; preds = %103
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  %106 = load i64, ptr %5, align 8, !tbaa !5
  store i32 1, ptr %8, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  ret i64 %106
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{!17, !6, i64 40}
!17 = !{!"_q120_ntt_reduc_step_precomp", !7, i64 0, !6, i64 32, !6, i64 40}
!18 = !{!17, !6, i64 32}
!19 = distinct !{!19, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.1 = external hidden unnamed_addr constant [81 x i8], align 1
@PRIMES_VEC = external hidden local_unnamed_addr constant [4 x i32], align 16
@.str.6 = external hidden unnamed_addr constant [20 x i8], align 1
@__PRETTY_FUNCTION__.fill_reduction_meta = external hidden unnamed_addr constant [76 x i8], align 1

; Function Attrs: noreturn nounwind
declare void @__assert_fail(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nofree nounwind willreturn memory(write)
declare double @log2(double noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.ceil.f64(double) #2

; Function Attrs: nounwind uwtable
define dso_local range(i64 0, 64) i64 @fill_reduction_meta(i64 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #3 {
  %.not = icmp eq i64 %0, 0
  %.pre53 = load i32, ptr @PRIMES_VEC, align 16, !tbaa !5
  %.pre = load i32, ptr getelementptr inbounds (i8, ptr @PRIMES_VEC, i64 4), align 4, !tbaa !5
  %.pre54 = load i32, ptr getelementptr inbounds (i8, ptr @PRIMES_VEC, i64 8), align 8, !tbaa !5
  %.pre55 = load i32, ptr getelementptr inbounds (i8, ptr @PRIMES_VEC, i64 12), align 4, !tbaa !5
  br i1 %.not, label %.._crit_edge_crit_edge, label %.preheader.preheader

.._crit_edge_crit_edge:                           ; preds = %2
  %.pre56 = zext i32 %.pre53 to i64
  %.pre57 = zext i32 %.pre to i64
  %.pre59 = zext i32 %.pre54 to i64
  %.pre61 = zext i32 %.pre55 to i64
  br label %._crit_edge

.preheader.preheader:                             ; preds = %2
  %3 = lshr i64 %0, 1
  %4 = zext i32 %.pre53 to i64
  %5 = zext i32 %.pre to i64
  %6 = zext i32 %.pre54 to i64
  %7 = zext i32 %.pre55 to i64
  br label %.preheader

.preheader:                                       ; preds = %.preheader.preheader, %.preheader
  %.03247 = phi i64 [ %spec.select41, %.preheader ], [ -1, %.preheader.preheader ]
  %.03346 = phi i64 [ %spec.select, %.preheader ], [ -1, %.preheader.preheader ]
  %.03845 = phi i64 [ %43, %.preheader ], [ %3, %.preheader.preheader ]
  %8 = sub i64 %0, %.03845
  %9 = shl nuw i64 1, %.03845
  %10 = urem i64 %9, %4
  %11 = uitofp nneg i64 %10 to double
  %12 = tail call double @log2(double noundef %11) #5
  %13 = tail call double @llvm.ceil.f64(double %12)
  %14 = fptoui double %13 to i64
  %15 = add i64 %8, %14
  %16 = tail call i64 @llvm.umax.i64(i64 %15, i64 %.03845)
  %17 = add i64 %16, 1
  %18 = urem i64 %9, %5
  %19 = uitofp nneg i64 %18 to double
  %20 = tail call double @log2(double noundef %19) #5
  %21 = tail call double @llvm.ceil.f64(double %20)
  %22 = fptoui double %21 to i64
  %23 = add i64 %8, %22
  %24 = tail call i64 @llvm.umax.i64(i64 %23, i64 %.03845)
  %25 = add i64 %24, 1
  %spec.select42.1 = tail call i64 @llvm.umax.i64(i64 %17, i64 %25)
  %26 = urem i64 %9, %6
  %27 = uitofp nneg i64 %26 to double
  %28 = tail call double @log2(double noundef %27) #5
  %29 = tail call double @llvm.ceil.f64(double %28)
  %30 = fptoui double %29 to i64
  %31 = add i64 %8, %30
  %32 = tail call i64 @llvm.umax.i64(i64 %31, i64 %.03845)
  %33 = add i64 %32, 1
  %spec.select42.2 = tail call i64 @llvm.umax.i64(i64 %spec.select42.1, i64 %33)
  %34 = urem i64 %9, %7
  %35 = uitofp nneg i64 %34 to double
  %36 = tail call double @log2(double noundef %35) #5
  %37 = tail call double @llvm.ceil.f64(double %36)
  %38 = fptoui double %37 to i64
  %39 = add i64 %8, %38
  %40 = tail call i64 @llvm.umax.i64(i64 %39, i64 %.03845)
  %41 = add i64 %40, 1
  %spec.select42.3 = tail call i64 @llvm.umax.i64(i64 %spec.select42.2, i64 %41)
  %42 = icmp ult i64 %spec.select42.3, %.03247
  %spec.select = select i1 %42, i64 %.03845, i64 %.03346
  %spec.select41 = tail call i64 @llvm.umin.i64(i64 %spec.select42.3, i64 %.03247)
  %43 = add nuw i64 %.03845, 1
  %44 = icmp ult i64 %43, %0
  br i1 %44, label %.preheader, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %.preheader, %.._crit_edge_crit_edge
  %.pre-phi62 = phi i64 [ %.pre61, %.._crit_edge_crit_edge ], [ %7, %.preheader ]
  %.pre-phi60 = phi i64 [ %.pre59, %.._crit_edge_crit_edge ], [ %6, %.preheader ]
  %.pre-phi58 = phi i64 [ %.pre57, %.._crit_edge_crit_edge ], [ %5, %.preheader ]
  %.pre-phi = phi i64 [ %.pre56, %.._crit_edge_crit_edge ], [ %4, %.preheader ]
  %.033.lcssa = phi i64 [ -1, %.._crit_edge_crit_edge ], [ %spec.select, %.preheader ]
  %.032.lcssa = phi i64 [ -1, %.._crit_edge_crit_edge ], [ %spec.select41, %.preheader ]
  %45 = getelementptr inbounds i8, ptr %1, i64 40
  store i64 %.033.lcssa, ptr %45, align 8, !tbaa !11
  %46 = shl nuw i64 1, %.033.lcssa
  %47 = add i64 %46, -1
  %48 = getelementptr inbounds i8, ptr %1, i64 32
  store i64 %47, ptr %48, align 8, !tbaa !14
  %49 = urem i64 %46, %.pre-phi
  store i64 %49, ptr %1, align 8, !tbaa !15
  %50 = urem i64 %46, %.pre-phi58
  %51 = getelementptr inbounds i8, ptr %1, i64 8
  store i64 %50, ptr %51, align 8, !tbaa !15
  %52 = urem i64 %46, %.pre-phi60
  %53 = getelementptr inbounds i8, ptr %1, i64 16
  store i64 %52, ptr %53, align 8, !tbaa !15
  %54 = urem i64 %46, %.pre-phi62
  %55 = getelementptr inbounds i8, ptr %1, i64 24
  store i64 %54, ptr %55, align 8, !tbaa !15
  %56 = icmp ult i64 %.032.lcssa, 64
  br i1 %56, label %58, label %57

57:                                               ; preds = %._crit_edge
  tail call void @__assert_fail(ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.1, i32 noundef 89, ptr noundef nonnull @__PRETTY_FUNCTION__.fill_reduction_meta) #6
  unreachable

58:                                               ; preds = %._crit_edge
  ret i64 %.032.lcssa
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #4

attributes #0 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(write) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #5 = { nounwind }
attributes #6 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !13, i64 40}
!12 = !{!"_q120_ntt_reduc_step_precomp", !7, i64 0, !13, i64 32, !13, i64 40}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 32}
!15 = !{!13, !13, i64 0}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass