; LLVM IR from ncduy0303/Competitive-Programming :: Others/2SAT.ll (Z8kosarajuv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@scc = external dso_local global i32, align 4
@visited = external dso_local global [200002 x i32], align 16
@dfn = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8kosarajuv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 1, ptr %1, align 4, !tbaa !5
  br label %3

3:                                                ; preds = %18, %0
  %4 = load i32, ptr %1, align 4, !tbaa !5
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = mul nsw i32 2, %5
  %7 = icmp sle i32 %4, %6
  br i1 %7, label %9, label %8

8:                                                ; preds = %3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %21

9:                                                ; preds = %3
  %10 = load i32, ptr %1, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [200002 x i32], ptr @visited, i64 0, i64 %11
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %17, label %15

15:                                               ; preds = %9
  %16 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %16, i32 noundef 0)
  br label %17

17:                                               ; preds = %15, %9
  br label %18

18:                                               ; preds = %17
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %1, align 4, !tbaa !5
  br label %3, !llvm.loop !9

21:                                               ; preds = %8
  call void @llvm.memset.p0.i64(ptr align 16 @visited, i8 0, i64 800008, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  %22 = load i32, ptr @n, align 4, !tbaa !5
  %23 = mul nsw i32 2, %22
  store i32 %23, ptr %2, align 4, !tbaa !5
  br label %24

24:                                               ; preds = %45, %21
  %25 = load i32, ptr %2, align 4, !tbaa !5
  %26 = icmp sgt i32 %25, 0
  br i1 %26, label %28, label %27

27:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %48

28:                                               ; preds = %24
  %29 = load i32, ptr %2, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %30) #4
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds [200002 x i32], ptr @visited, i64 0, i64 %33
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %36 = icmp ne i32 %35, 0
  br i1 %36, label %44, label %37

37:                                               ; preds = %28
  %38 = load i32, ptr @scc, align 4, !tbaa !5
  %39 = add nsw i32 %38, 1
  store i32 %39, ptr @scc, align 4, !tbaa !5
  %40 = load i32, ptr %2, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %41) #4
  %43 = load i32, ptr %42, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %43, i32 noundef 1)
  br label %44

44:                                               ; preds = %37, %28
  br label %45

45:                                               ; preds = %44
  %46 = load i32, ptr %2, align 4, !tbaa !5
  %47 = add nsw i32 %46, -1
  store i32 %47, ptr %2, align 4, !tbaa !5
  br label %24, !llvm.loop !11

48:                                               ; preds = %27
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@scc = external dso_local local_unnamed_addr global i32, align 4
@visited = external dso_local local_unnamed_addr global [200002 x i32], align 16
@dfn = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8kosarajuv() local_unnamed_addr #0 {
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %2 = shl nsw i32 %1, 1
  %.not11 = icmp slt i32 %1, 1
  br i1 %.not11, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %10, %0
  %.lcssa = phi i32 [ %2, %0 ], [ %12, %10 ]
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(800008) @visited, i8 0, i64 800008, i1 false)
  %3 = icmp sgt i32 %.lcssa, 0
  br i1 %3, label %.lr.ph15.preheader, label %._crit_edge16

.lr.ph15.preheader:                               ; preds = %._crit_edge
  %4 = zext nneg i32 %.lcssa to i64
  br label %.lr.ph15

.lr.ph:                                           ; preds = %0, %10
  %5 = phi i32 [ %11, %10 ], [ %1, %0 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %10 ], [ 1, %0 ]
  %6 = getelementptr inbounds [200002 x i32], ptr @visited, i64 0, i64 %indvars.iv
  %7 = load i32, ptr %6, align 4, !tbaa !5
  %.not10 = icmp eq i32 %7, 0
  br i1 %.not10, label %8, label %10

8:                                                ; preds = %.lr.ph
  %9 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %9, i32 noundef 0)
  %.pre = load i32, ptr @n, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %.lr.ph, %8
  %11 = phi i32 [ %5, %.lr.ph ], [ %.pre, %8 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %12 = shl nsw i32 %11, 1
  %13 = sext i32 %12 to i64
  %.not.not = icmp slt i64 %indvars.iv, %13
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge16:                                    ; preds = %24, %._crit_edge
  ret void

.lr.ph15:                                         ; preds = %.lr.ph15.preheader, %24
  %indvars.iv19 = phi i64 [ %4, %.lr.ph15.preheader ], [ %indvars.iv.next20, %24 ]
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %indvars.iv19) #3
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [200002 x i32], ptr @visited, i64 0, i64 %16
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %.not9 = icmp eq i32 %18, 0
  br i1 %.not9, label %19, label %24

19:                                               ; preds = %.lr.ph15
  %20 = load i32, ptr @scc, align 4, !tbaa !5
  %21 = add nsw i32 %20, 1
  store i32 %21, ptr @scc, align 4, !tbaa !5
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %indvars.iv19) #3
  %23 = load i32, ptr %22, align 4, !tbaa !5
  tail call void @_Z3dfsii(i32 noundef %23, i32 noundef 1)
  br label %24

24:                                               ; preds = %.lr.ph15, %19
  %indvars.iv.next20 = add nsw i64 %indvars.iv19, -1
  %25 = icmp sgt i64 %indvars.iv19, 1
  br i1 %25, label %.lr.ph15, label %._crit_edge16, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass