; LLVM IR from Dovyski/opengl-demos :: libs/glm-0.9.9.3/test/gtc/gtc_bitfield.ll (ZN19bitfieldInterleave44testEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN19bitfieldInterleave44testEv() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i16, align 2
  %3 = alloca i16, align 2
  %4 = alloca i16, align 2
  %5 = alloca i16, align 2
  %6 = alloca i16, align 2
  %7 = alloca i32, align 4
  %8 = alloca i16, align 2
  %9 = alloca i16, align 2
  %10 = alloca i16, align 2
  %11 = alloca i64, align 8
  %12 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #4
  store i16 2048, ptr %2, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #4
  store i16 2048, ptr %3, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #4
  store i16 2048, ptr %4, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #4
  store i16 2048, ptr %5, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #4
  store i16 0, ptr %6, align 2, !tbaa !9
  br label %13

13:                                               ; preds = %80, %0
  %14 = load i16, ptr %6, align 2, !tbaa !9
  %15 = zext i16 %14 to i32
  %16 = load i16, ptr %5, align 2, !tbaa !9
  %17 = zext i16 %16 to i32
  %18 = icmp slt i32 %15, %17
  br i1 %18, label %20, label %19

19:                                               ; preds = %13
  store i32 2, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #4
  br label %85

20:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #4
  store i16 0, ptr %8, align 2, !tbaa !9
  br label %21

21:                                               ; preds = %74, %20
  %22 = load i16, ptr %8, align 2, !tbaa !9
  %23 = zext i16 %22 to i32
  %24 = load i16, ptr %4, align 2, !tbaa !9
  %25 = zext i16 %24 to i32
  %26 = icmp slt i32 %23, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %21
  store i32 5, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #4
  br label %79

28:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 2, ptr %9) #4
  store i16 0, ptr %9, align 2, !tbaa !9
  br label %29

29:                                               ; preds = %68, %28
  %30 = load i16, ptr %9, align 2, !tbaa !9
  %31 = zext i16 %30 to i32
  %32 = load i16, ptr %3, align 2, !tbaa !9
  %33 = zext i16 %32 to i32
  %34 = icmp slt i32 %31, %33
  br i1 %34, label %36, label %35

35:                                               ; preds = %29
  store i32 8, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %9) #4
  br label %73

36:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #4
  store i16 0, ptr %10, align 2, !tbaa !9
  br label %37

37:                                               ; preds = %62, %36
  %38 = load i16, ptr %10, align 2, !tbaa !9
  %39 = zext i16 %38 to i32
  %40 = load i16, ptr %2, align 2, !tbaa !9
  %41 = zext i16 %40 to i32
  %42 = icmp slt i32 %39, %41
  br i1 %42, label %44, label %43

43:                                               ; preds = %37
  store i32 11, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #4
  br label %67

44:                                               ; preds = %37
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  %45 = load i16, ptr %10, align 2, !tbaa !9
  %46 = load i16, ptr %9, align 2, !tbaa !9
  %47 = load i16, ptr %8, align 2, !tbaa !9
  %48 = load i16, ptr %6, align 2, !tbaa !9
  %49 = call noundef i64 @_ZN19bitfieldInterleave422loopBitfieldInterleaveItmEET0_T_S2_S2_S2_(i16 noundef zeroext %45, i16 noundef zeroext %46, i16 noundef zeroext %47, i16 noundef zeroext %48)
  store i64 %49, ptr %11, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #4
  %50 = load i16, ptr %10, align 2, !tbaa !9
  %51 = load i16, ptr %9, align 2, !tbaa !9
  %52 = load i16, ptr %8, align 2, !tbaa !9
  %53 = load i16, ptr %6, align 2, !tbaa !9
  %54 = call noundef i64 @_ZN3glm18bitfieldInterleaveEtttt(i16 noundef zeroext %50, i16 noundef zeroext %51, i16 noundef zeroext %52, i16 noundef zeroext %53)
  store i64 %54, ptr %12, align 8, !tbaa !11
  %55 = load i64, ptr %11, align 8, !tbaa !11
  %56 = load i64, ptr %12, align 8, !tbaa !11
  %57 = icmp eq i64 %55, %56
  %58 = zext i1 %57 to i64
  %59 = select i1 %57, i32 0, i32 1
  %60 = load i32, ptr %1, align 4, !tbaa !5
  %61 = add nsw i32 %60, %59
  store i32 %61, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  br label %62

62:                                               ; preds = %44
  %63 = load i16, ptr %10, align 2, !tbaa !9
  %64 = zext i16 %63 to i32
  %65 = add nsw i32 %64, 27
  %66 = trunc i32 %65 to i16
  store i16 %66, ptr %10, align 2, !tbaa !9
  br label %37, !llvm.loop !13

67:                                               ; preds = %43
  br label %68

68:                                               ; preds = %67
  %69 = load i16, ptr %9, align 2, !tbaa !9
  %70 = zext i16 %69 to i32
  %71 = add nsw i32 %70, 27
  %72 = trunc i32 %71 to i16
  store i16 %72, ptr %9, align 2, !tbaa !9
  br label %29, !llvm.loop !15

73:                                               ; preds = %35
  br label %74

74:                                               ; preds = %73
  %75 = load i16, ptr %8, align 2, !tbaa !9
  %76 = zext i16 %75 to i32
  %77 = add nsw i32 %76, 27
  %78 = trunc i32 %77 to i16
  store i16 %78, ptr %8, align 2, !tbaa !9
  br label %21, !llvm.loop !16

79:                                               ; preds = %27
  br label %80

80:                                               ; preds = %79
  %81 = load i16, ptr %6, align 2, !tbaa !9
  %82 = zext i16 %81 to i32
  %83 = add nsw i32 %82, 27
  %84 = trunc i32 %83 to i16
  store i16 %84, ptr %6, align 2, !tbaa !9
  br label %13, !llvm.loop !17

85:                                               ; preds = %19
  %86 = load i32, ptr %1, align 4, !tbaa !5
  store i32 1, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i32 %86
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN19bitfieldInterleave422loopBitfieldInterleaveItmEET0_T_S2_S2_S2_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZN3glm18bitfieldInterleaveEtttt(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}
!17 = distinct !{!17, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN19bitfieldInterleave44testEv() local_unnamed_addr #0 {
  br label %.preheader36

.preheader36:                                     ; preds = %0, %2
  %.044 = phi i32 [ 0, %0 ], [ %13, %2 ]
  %.02443 = phi i16 [ 0, %0 ], [ %narrow, %2 ]
  br label %.preheader35

1:                                                ; preds = %2
  ret i32 %13

.preheader35:                                     ; preds = %.preheader36, %4
  %.142 = phi i32 [ %.044, %.preheader36 ], [ %13, %4 ]
  %.02741 = phi i16 [ 0, %.preheader36 ], [ %narrow32, %4 ]
  br label %.preheader

2:                                                ; preds = %4
  %narrow = add nuw nsw i16 %.02443, 27
  %3 = icmp ult i16 %.02443, 2021
  br i1 %3, label %.preheader36, label %1, !llvm.loop !5

.preheader:                                       ; preds = %.preheader35, %6
  %.240 = phi i32 [ %.142, %.preheader35 ], [ %13, %6 ]
  %.02639 = phi i16 [ 0, %.preheader35 ], [ %narrow33, %6 ]
  br label %8

4:                                                ; preds = %6
  %narrow32 = add nuw nsw i16 %.02741, 27
  %5 = icmp ult i16 %.02741, 2021
  br i1 %5, label %.preheader35, label %2, !llvm.loop !7

6:                                                ; preds = %8
  %narrow33 = add nuw nsw i16 %.02639, 27
  %7 = icmp ult i16 %.02639, 2021
  br i1 %7, label %.preheader, label %4, !llvm.loop !8

8:                                                ; preds = %.preheader, %8
  %.338 = phi i32 [ %.240, %.preheader ], [ %13, %8 ]
  %.02537 = phi i16 [ 0, %.preheader ], [ %narrow34, %8 ]
  %9 = tail call noundef i64 @_ZN19bitfieldInterleave422loopBitfieldInterleaveItmEET0_T_S2_S2_S2_(i16 noundef zeroext %.02537, i16 noundef zeroext %.02639, i16 noundef zeroext %.02741, i16 noundef zeroext %.02443)
  %10 = tail call noundef i64 @_ZN3glm18bitfieldInterleaveEtttt(i16 noundef zeroext %.02537, i16 noundef zeroext %.02639, i16 noundef zeroext %.02741, i16 noundef zeroext %.02443)
  %11 = icmp ne i64 %9, %10
  %12 = zext i1 %11 to i32
  %13 = add nsw i32 %.338, %12
  %narrow34 = add nuw nsw i16 %.02537, 27
  %14 = icmp ult i16 %.02537, 2021
  br i1 %14, label %8, label %6, !llvm.loop !9
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN19bitfieldInterleave422loopBitfieldInterleaveItmEET0_T_S2_S2_S2_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZN3glm18bitfieldInterleaveEtttt(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}
!9 = distinct !{!9, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass