; LLVM IR from bqi343/cp-notebook :: Contests/USACO Solutions/2012-13/Feb 2013/13 Feb G1.ll (Z5solvei)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@N = external dso_local global i32, align 4
@K = external dso_local global i32, align 4
@ans = external dso_local global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z4posiiii(i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvei(i32 noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %9 = load i32, ptr @K, align 4, !tbaa !5
  store i32 %9, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %26, %1
  %11 = load i32, ptr %4, align 4, !tbaa !5
  %12 = load i32, ptr @N, align 4, !tbaa !5
  %13 = sub nsw i32 %12, 1
  %14 = icmp slt i32 %11, %13
  br i1 %14, label %16, label %15

15:                                               ; preds = %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %29

16:                                               ; preds = %10
  %17 = load i32, ptr %2, align 4, !tbaa !5
  %18 = load i32, ptr %4, align 4, !tbaa !5
  %19 = shl i32 1, %18
  %20 = and i32 %17, %19
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %22, label %25

22:                                               ; preds = %16
  %23 = load i32, ptr %3, align 4, !tbaa !5
  %24 = add nsw i32 %23, -1
  store i32 %24, ptr %3, align 4, !tbaa !5
  br label %25

25:                                               ; preds = %22, %16
  br label %26

26:                                               ; preds = %25
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = add nsw i32 %27, 1
  store i32 %28, ptr %4, align 4, !tbaa !5
  br label %10, !llvm.loop !9

29:                                               ; preds = %15
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = icmp slt i32 %30, 0
  br i1 %31, label %32, label %33

32:                                               ; preds = %29
  store i32 1, ptr %5, align 4
  br label %56

33:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  store i32 0, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #4
  store i32 225000, ptr %7, align 4, !tbaa !5
  br label %34

34:                                               ; preds = %52, %33
  %35 = load i32, ptr %6, align 4, !tbaa !5
  %36 = load i32, ptr %7, align 4, !tbaa !5
  %37 = icmp ne i32 %35, %36
  br i1 %37, label %38, label %53

38:                                               ; preds = %34
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #4
  %39 = load i32, ptr %6, align 4, !tbaa !5
  %40 = load i32, ptr %7, align 4, !tbaa !5
  %41 = add nsw i32 %39, %40
  %42 = sdiv i32 %41, 2
  store i32 %42, ptr %8, align 4, !tbaa !5
  %43 = load i32, ptr %8, align 4, !tbaa !5
  %44 = load i32, ptr %3, align 4, !tbaa !5
  %45 = load i32, ptr %2, align 4, !tbaa !5
  %46 = call noundef zeroext i1 @_Z4posiiii(i32 noundef %43, i32 noundef %44, i32 noundef %45)
  br i1 %46, label %47, label %49

47:                                               ; preds = %38
  %48 = load i32, ptr %8, align 4, !tbaa !5
  store i32 %48, ptr %7, align 4, !tbaa !5
  br label %52

49:                                               ; preds = %38
  %50 = load i32, ptr %8, align 4, !tbaa !5
  %51 = add nsw i32 %50, 1
  store i32 %51, ptr %6, align 4, !tbaa !5
  br label %52

52:                                               ; preds = %49, %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #4
  br label %34, !llvm.loop !11

53:                                               ; preds = %34
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) @ans, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %55 = load i32, ptr %54, align 4, !tbaa !5
  store i32 %55, ptr @ans, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  store i32 0, ptr %5, align 4
  br label %56

56:                                               ; preds = %53, %32
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  %57 = load i32, ptr %5, align 4
  switch i32 %57, label %59 [
    i32 0, label %58
    i32 1, label %58
  ]

58:                                               ; preds = %56, %56
  ret void

59:                                               ; preds = %56
  unreachable
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@N = external dso_local local_unnamed_addr global i32, align 4
@K = external dso_local local_unnamed_addr global i32, align 4
@ans = external dso_local global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_Z4posiiii(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z5solvei(i32 noundef %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  %3 = load i32, ptr @K, align 4, !tbaa !5
  %4 = load i32, ptr @N, align 4, !tbaa !5
  %5 = icmp sgt i32 %4, 1
  br i1 %5, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %1
  %6 = add nsw i32 %4, -2
  %7 = add nsw i32 %4, -1
  %min.iters.check = icmp ult i32 %4, 9
  br i1 %min.iters.check, label %.lr.ph.preheader30, label %vector.ph

.lr.ph.preheader30:                               ; preds = %middle.block, %.lr.ph.preheader
  %.019.ph = phi i32 [ %3, %.lr.ph.preheader ], [ %20, %middle.block ]
  %.01518.ph = phi i32 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  br label %.lr.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i32 %7, -8
  %8 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %3, i64 0
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %0, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %8, %vector.ph ], [ %17, %vector.body ]
  %vec.phi28 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %18, %vector.body ]
  %vec.ind = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ %vec.ind.next, %vector.body ]
  %step.add = add <4 x i32> %vec.ind, <i32 4, i32 4, i32 4, i32 4>
  %9 = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %vec.ind
  %10 = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %step.add
  %11 = and <4 x i32> %9, %broadcast.splat
  %12 = and <4 x i32> %10, %broadcast.splat
  %13 = icmp ne <4 x i32> %11, zeroinitializer
  %14 = icmp ne <4 x i32> %12, zeroinitializer
  %15 = sext <4 x i1> %13 to <4 x i32>
  %16 = sext <4 x i1> %14 to <4 x i32>
  %17 = add <4 x i32> %vec.phi, %15
  %18 = add <4 x i32> %vec.phi28, %16
  %index.next = add nuw i32 %index, 8
  %vec.ind.next = add <4 x i32> %vec.ind, <i32 8, i32 8, i32 8, i32 8>
  %19 = icmp eq i32 %index.next, %n.vec
  br i1 %19, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %18, %17
  %20 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  %cmp.n = icmp eq i32 %7, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader30

._crit_edge:                                      ; preds = %.lr.ph, %middle.block, %1
  %.0.lcssa = phi i32 [ %3, %1 ], [ %20, %middle.block ], [ %spec.select, %.lr.ph ]
  %21 = icmp slt i32 %.0.lcssa, 0
  br i1 %21, label %33, label %.lr.ph23.preheader

.lr.ph:                                           ; preds = %.lr.ph.preheader30, %.lr.ph
  %.019 = phi i32 [ %spec.select, %.lr.ph ], [ %.019.ph, %.lr.ph.preheader30 ]
  %.01518 = phi i32 [ %25, %.lr.ph ], [ %.01518.ph, %.lr.ph.preheader30 ]
  %22 = shl nuw i32 1, %.01518
  %23 = and i32 %22, %0
  %.not17 = icmp ne i32 %23, 0
  %24 = sext i1 %.not17 to i32
  %spec.select = add nsw i32 %.019, %24
  %25 = add nuw nsw i32 %.01518, 1
  %exitcond.not = icmp eq i32 %.01518, %6
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

.lr.ph23.preheader:                               ; preds = %._crit_edge
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #4
  br label %.lr.ph23

.lr.ph23:                                         ; preds = %.lr.ph23.preheader, %.lr.ph23
  %.01321 = phi i32 [ %spec.select27, %.lr.ph23 ], [ 225000, %.lr.ph23.preheader ]
  %26 = phi i32 [ %spec.select26, %.lr.ph23 ], [ 0, %.lr.ph23.preheader ]
  %27 = add nsw i32 %26, %.01321
  %28 = sdiv i32 %27, 2
  %29 = tail call noundef zeroext i1 @_Z4posiiii(i32 noundef %28, i32 noundef %.0.lcssa, i32 noundef %0)
  %30 = add nsw i32 %28, 1
  %spec.select26 = select i1 %29, i32 %26, i32 %30
  %spec.select27 = select i1 %29, i32 %28, i32 %.01321
  %.not = icmp eq i32 %spec.select26, %spec.select27
  br i1 %.not, label %._crit_edge24, label %.lr.ph23, !llvm.loop !14

._crit_edge24:                                    ; preds = %.lr.ph23
  store i32 %spec.select26, ptr %2, align 4, !tbaa !5
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) @ans, ptr noundef nonnull align 4 dereferenceable(4) %2)
  %32 = load i32, ptr %31, align 4, !tbaa !5
  store i32 %32, ptr @ans, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #4
  br label %33

33:                                               ; preds = %._crit_edge, %._crit_edge24
  ret void
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass