; LLVM IR from microsoft/vOW4SIKE_on_HW :: SIKE_vOW_hw-sw/murax/software/VexRiscvSocSoftware/projects/murax/hex/src (irqCallback)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Gpio_Reg = type { i32, i32, i32 }
%struct.Hex_Reg = type { i32, i32, i32 }
%struct.Uart_Reg = type { i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @irqCallback() #0 {
  %1 = load volatile i32, ptr inttoptr (i64 4026662928 to ptr), align 4, !tbaa !5
  %2 = and i32 %1, 1
  %3 = icmp ne i32 %2, 0
  br i1 %3, label %4, label %9

4:                                                ; preds = %0
  %5 = load volatile i32, ptr getelementptr inbounds (%struct.Gpio_Reg, ptr inttoptr (i64 4026531840 to ptr), i32 0, i32 1), align 4, !tbaa !10
  %6 = xor i32 %5, 128
  store volatile i32 %6, ptr getelementptr inbounds (%struct.Gpio_Reg, ptr inttoptr (i64 4026531840 to ptr), i32 0, i32 1), align 4, !tbaa !10
  %7 = load volatile i32, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026728448 to ptr), i32 0, i32 1), align 4, !tbaa !10
  %8 = xor i32 %7, 64
  store volatile i32 %8, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026728448 to ptr), i32 0, i32 1), align 4, !tbaa !10
  store volatile i32 1, ptr inttoptr (i64 4026662928 to ptr), align 4, !tbaa !5
  br label %9

9:                                                ; preds = %4, %0
  br label %10

10:                                               ; preds = %14, %9
  %11 = load volatile i32, ptr getelementptr inbounds (%struct.Uart_Reg, ptr inttoptr (i64 4026597376 to ptr), i32 0, i32 1), align 4, !tbaa !12
  %12 = and i32 %11, 512
  %13 = icmp ne i32 %12, 0
  br i1 %13, label %14, label %20

14:                                               ; preds = %10
  %15 = load volatile i32, ptr inttoptr (i64 4026597376 to ptr), align 4, !tbaa !14
  %16 = load volatile i32, ptr inttoptr (i64 4026531840 to ptr), align 4, !tbaa !15
  %17 = and i32 %16, 1
  %18 = add i32 %15, %17
  %19 = and i32 %18, 255
  store volatile i32 %19, ptr inttoptr (i64 4026597376 to ptr), align 4, !tbaa !14
  br label %10, !llvm.loop !16

20:                                               ; preds = %10
  ret void
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!13, !7, i64 4}
!13 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!14 = !{!13, !7, i64 0}
!15 = !{!11, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree norecurse nounwind uwtable
define dso_local void @irqCallback() local_unnamed_addr #0 {
  %1 = load volatile i32, ptr inttoptr (i64 4026662928 to ptr), align 16, !tbaa !5
  %2 = and i32 %1, 1
  %.not = icmp eq i32 %2, 0
  br i1 %.not, label %8, label %3

3:                                                ; preds = %0
  %4 = load volatile i32, ptr inttoptr (i64 4026531844 to ptr), align 4, !tbaa !10
  %5 = xor i32 %4, 128
  store volatile i32 %5, ptr inttoptr (i64 4026531844 to ptr), align 4, !tbaa !10
  %6 = load volatile i32, ptr inttoptr (i64 4026728452 to ptr), align 4, !tbaa !10
  %7 = xor i32 %6, 64
  store volatile i32 %7, ptr inttoptr (i64 4026728452 to ptr), align 4, !tbaa !10
  store volatile i32 1, ptr inttoptr (i64 4026662928 to ptr), align 16, !tbaa !5
  br label %8

8:                                                ; preds = %3, %0
  %9 = load volatile i32, ptr inttoptr (i64 4026597380 to ptr), align 4, !tbaa !12
  %10 = and i32 %9, 512
  %.not12 = icmp eq i32 %10, 0
  br i1 %.not12, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %8, %.lr.ph
  %11 = load volatile i32, ptr inttoptr (i64 4026597376 to ptr), align 65536, !tbaa !14
  %12 = load volatile i32, ptr inttoptr (i64 4026531840 to ptr), align 268435456, !tbaa !15
  %13 = and i32 %12, 1
  %14 = add i32 %13, %11
  %15 = and i32 %14, 255
  store volatile i32 %15, ptr inttoptr (i64 4026597376 to ptr), align 65536, !tbaa !14
  %16 = load volatile i32, ptr inttoptr (i64 4026597380 to ptr), align 4, !tbaa !12
  %17 = and i32 %16, 512
  %.not1 = icmp eq i32 %17, 0
  br i1 %.not1, label %._crit_edge, label %.lr.ph, !llvm.loop !16

._crit_edge:                                      ; preds = %.lr.ph, %8
  ret void
}

attributes #0 = { nofree norecurse nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 4}
!11 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!13, !7, i64 4}
!13 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!14 = !{!13, !7, i64 0}
!15 = !{!11, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,InferAlignmentPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SimplifyCFGPass