; LLVM IR from koshkin-sergey/mbOS :: Device/GigaDevice/GD32VF1xx/Driver (OS_IRQ_GD32VF1xx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CLIC_t = type { i8, [3 x i8], i32, i8, i8, i8, i8, [1021 x i32], [4096 x %struct.CLIC_CTRL_t] }
%struct.CLIC_CTRL_t = type { i8, i8, i8, i8 }
%struct.SysTimer_s = type { i32, i32, i32, i32, [1016 x i32], i32, i32, i32, i32 }

; Function Attrs: naked noinline nounwind uwtable
declare dso_local void @exc_entry() #0 align 64

; Function Attrs: naked noinline nounwind uwtable
declare dso_local void @irq_entry() #0 align 4

; Function Attrs: nounwind uwtable
define dso_local i32 @IRQ_Initialize() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  call void asm sideeffect "csrs 0x7D0, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 512) #4, !srcloc !5
  %4 = zext i32 ptrtoint (ptr @exc_entry to i32) to i64
  %5 = and i64 %4, -64
  %6 = or i64 %5, 3
  %7 = trunc i64 %6 to i32
  store i32 %7, ptr %1, align 4, !tbaa !6
  %8 = load i32, ptr %1, align 4, !tbaa !6
  call void asm sideeffect "csrw 0x305, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %8) #4, !srcloc !10
  store i32 ptrtoint (ptr @irq_vectors to i32), ptr %1, align 4, !tbaa !6
  %9 = load i32, ptr %1, align 4, !tbaa !6
  call void asm sideeffect "csrw 0x307, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %9) #4, !srcloc !11
  %10 = zext i32 ptrtoint (ptr @irq_entry to i32) to i64
  %11 = and i64 %10, -4
  %12 = or i64 %11, 1
  %13 = trunc i64 %12 to i32
  store i32 %13, ptr %1, align 4, !tbaa !6
  %14 = load i32, ptr %1, align 4, !tbaa !6
  call void asm sideeffect "csrw 0x7EC, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %14) #4, !srcloc !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  %15 = load volatile i32, ptr getelementptr inbounds (%struct.CLIC_t, ptr inttoptr (i64 3523215360 to ptr), i32 0, i32 2), align 4, !tbaa !13
  %16 = zext i32 %15 to i64
  %17 = and i64 %16, 4095
  %18 = trunc i64 %17 to i32
  store i32 %18, ptr %2, align 4, !tbaa !6
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  store i32 0, ptr %3, align 4, !tbaa !6
  br label %19

19:                                               ; preds = %33, %0
  %20 = load i32, ptr %3, align 4, !tbaa !6
  %21 = load i32, ptr %2, align 4, !tbaa !6
  %22 = icmp ult i32 %20, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %36

24:                                               ; preds = %19
  %25 = load i32, ptr %3, align 4, !tbaa !6
  %26 = zext i32 %25 to i64
  %27 = getelementptr inbounds [4096 x %struct.CLIC_CTRL_t], ptr getelementptr inbounds (%struct.CLIC_t, ptr inttoptr (i64 3523215360 to ptr), i32 0, i32 8), i64 0, i64 %26
  %28 = getelementptr inbounds %struct.CLIC_CTRL_t, ptr %27, i32 0, i32 1
  store volatile i8 0, ptr %28, align 1, !tbaa !15
  %29 = load i32, ptr %3, align 4, !tbaa !6
  %30 = zext i32 %29 to i64
  %31 = getelementptr inbounds [4096 x %struct.CLIC_CTRL_t], ptr getelementptr inbounds (%struct.CLIC_t, ptr inttoptr (i64 3523215360 to ptr), i32 0, i32 8), i64 0, i64 %30
  %32 = getelementptr inbounds %struct.CLIC_CTRL_t, ptr %31, i32 0, i32 0
  store volatile i8 0, ptr %32, align 4, !tbaa !17
  br label %33

33:                                               ; preds = %24
  %34 = load i32, ptr %3, align 4, !tbaa !6
  %35 = add i32 %34, 1
  store i32 %35, ptr %3, align 4, !tbaa !6
  br label %19, !llvm.loop !18

36:                                               ; preds = %23
  store volatile i32 0, ptr getelementptr inbounds (%struct.SysTimer_s, ptr inttoptr (i64 3506438144 to ptr), i32 0, i32 8), align 4, !tbaa !20
  store volatile i8 1, ptr getelementptr inbounds (%struct.CLIC_CTRL_t, ptr getelementptr inbounds ([4096 x %struct.CLIC_CTRL_t], ptr getelementptr inbounds (%struct.CLIC_t, ptr inttoptr (i64 3523215360 to ptr), i32 0, i32 8), i64 0, i64 3), i32 0, i32 1), align 1, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i32 0
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

declare void @irq_vectors() #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { naked noinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2147740593}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{i64 2147741056}
!11 = !{i64 2147741515}
!12 = !{i64 2147741974}
!13 = !{!14, !7, i64 4}
!14 = !{!"", !8, i64 0, !8, i64 1, !7, i64 4, !8, i64 8, !8, i64 9, !8, i64 10, !8, i64 11, !8, i64 12, !8, i64 4096}
!15 = !{!16, !8, i64 1}
!16 = !{!"", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!17 = !{!16, !8, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!21, !7, i64 4092}
!21 = !{!"SysTimer_s", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !8, i64 16, !7, i64 4080, !7, i64 4084, !7, i64 4088, !7, i64 4092}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.CLIC_CTRL_t = type { i8, i8, i8, i8 }

; Function Attrs: naked noinline nounwind uwtable
declare dso_local void @exc_entry() #0 align 64

; Function Attrs: naked noinline nounwind uwtable
declare dso_local void @irq_entry() #0 align 4

; Function Attrs: nounwind uwtable
define dso_local noundef i32 @IRQ_Initialize() local_unnamed_addr #1 {
  tail call void asm sideeffect "csrs 0x7D0, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 512) #3, !srcloc !5
  %1 = and i32 ptrtoint (ptr @exc_entry to i32), -64
  %2 = or disjoint i32 %1, 3
  tail call void asm sideeffect "csrw 0x305, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %2) #3, !srcloc !6
  tail call void asm sideeffect "csrw 0x307, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 ptrtoint (ptr @irq_vectors to i32)) #3, !srcloc !7
  %3 = and i32 ptrtoint (ptr @irq_entry to i32), -4
  %4 = or disjoint i32 %3, 1
  tail call void asm sideeffect "csrw 0x7EC, $0", "Kr,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %4) #3, !srcloc !8
  %5 = load volatile i32, ptr inttoptr (i64 3523215364 to ptr), align 4, !tbaa !9
  %.fr10 = freeze i32 %5
  %6 = and i32 %.fr10, 4095
  %.not = icmp eq i32 %6, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %0
  %wide.trip.count = zext nneg i32 %6 to i64
  %xtraiter = and i64 %wide.trip.count, 3
  %7 = icmp ult i32 %6, 4
  br i1 %7, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %unroll_iter = and i64 %wide.trip.count, 4092
  br label %.lr.ph

._crit_edge.loopexit.unr-lcssa:                   ; preds = %.lr.ph, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next.3, %.lr.ph ]
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %._crit_edge, label %.lr.ph.epil

.lr.ph.epil:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil
  %indvars.iv.epil = phi i64 [ %indvars.iv.next.epil, %.lr.ph.epil ], [ %indvars.iv.unr, %._crit_edge.loopexit.unr-lcssa ]
  %epil.iter = phi i64 [ %epil.iter.next, %.lr.ph.epil ], [ 0, %._crit_edge.loopexit.unr-lcssa ]
  %8 = getelementptr inbounds [4096 x %struct.CLIC_CTRL_t], ptr inttoptr (i64 3523219456 to ptr), i64 0, i64 %indvars.iv.epil
  %9 = getelementptr inbounds i8, ptr %8, i64 1
  store volatile i8 0, ptr %9, align 1, !tbaa !14
  store volatile i8 0, ptr %8, align 4, !tbaa !16
  %indvars.iv.next.epil = add nuw nsw i64 %indvars.iv.epil, 1
  %epil.iter.next = add i64 %epil.iter, 1
  %epil.iter.cmp.not = icmp eq i64 %epil.iter.next, %xtraiter
  br i1 %epil.iter.cmp.not, label %._crit_edge, label %.lr.ph.epil, !llvm.loop !17

._crit_edge:                                      ; preds = %._crit_edge.loopexit.unr-lcssa, %.lr.ph.epil, %0
  store volatile i32 0, ptr inttoptr (i64 3506442236 to ptr), align 4, !tbaa !19
  store volatile i8 1, ptr inttoptr (i64 3523219469 to ptr), align 1, !tbaa !14
  ret i32 0

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader.new ], [ %indvars.iv.next.3, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.3, %.lr.ph ]
  %10 = getelementptr inbounds [4096 x %struct.CLIC_CTRL_t], ptr inttoptr (i64 3523219456 to ptr), i64 0, i64 %indvars.iv
  %11 = getelementptr inbounds i8, ptr %10, i64 1
  store volatile i8 0, ptr %11, align 1, !tbaa !14
  store volatile i8 0, ptr %10, align 16, !tbaa !16
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %12 = getelementptr inbounds [4096 x %struct.CLIC_CTRL_t], ptr inttoptr (i64 3523219456 to ptr), i64 0, i64 %indvars.iv.next
  %13 = getelementptr inbounds i8, ptr %12, i64 1
  store volatile i8 0, ptr %13, align 1, !tbaa !14
  store volatile i8 0, ptr %12, align 4, !tbaa !16
  %indvars.iv.next.1 = or disjoint i64 %indvars.iv, 2
  %14 = getelementptr inbounds [4096 x %struct.CLIC_CTRL_t], ptr inttoptr (i64 3523219456 to ptr), i64 0, i64 %indvars.iv.next.1
  %15 = getelementptr inbounds i8, ptr %14, i64 1
  store volatile i8 0, ptr %15, align 1, !tbaa !14
  store volatile i8 0, ptr %14, align 8, !tbaa !16
  %indvars.iv.next.2 = or disjoint i64 %indvars.iv, 3
  %16 = getelementptr inbounds [4096 x %struct.CLIC_CTRL_t], ptr inttoptr (i64 3523219456 to ptr), i64 0, i64 %indvars.iv.next.2
  %17 = getelementptr inbounds i8, ptr %16, i64 1
  store volatile i8 0, ptr %17, align 1, !tbaa !14
  store volatile i8 0, ptr %16, align 4, !tbaa !16
  %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
  %niter.next.3 = add i64 %niter, 4
  %niter.ncmp.3 = icmp eq i64 %niter.next.3, %unroll_iter
  br i1 %niter.ncmp.3, label %._crit_edge.loopexit.unr-lcssa, label %.lr.ph, !llvm.loop !21
}

declare void @irq_vectors() #2

attributes #0 = { naked noinline nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 2147740593}
!6 = !{i64 2147741056}
!7 = !{i64 2147741515}
!8 = !{i64 2147741974}
!9 = !{!10, !13, i64 4}
!10 = !{!"", !11, i64 0, !11, i64 1, !13, i64 4, !11, i64 8, !11, i64 9, !11, i64 10, !11, i64 11, !11, i64 12, !11, i64 4096}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!"int", !11, i64 0}
!14 = !{!15, !11, i64 1}
!15 = !{!"", !11, i64 0, !11, i64 1, !11, i64 2, !11, i64 3}
!16 = !{!15, !11, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.unroll.disable"}
!19 = !{!20, !13, i64 4092}
!20 = !{!"SysTimer_s", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !11, i64 16, !13, i64 4080, !13, i64 4084, !13, i64 4088, !13, i64 4092}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass,TailCallElimPass