; LLVM IR from bqi343/cp-notebook :: Contests/USACO Solutions/2019-20/Dec/Plat/treedepth.ll (Z3subRSt6vectorI2miSaIS0_EEi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI2miSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mimIERKS_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mipLERKS_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3subRSt6vectorI2miSaIS0_EEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = call noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %7) #3
  %9 = trunc i64 %8 to i32
  %10 = sub nsw i32 %9, 1
  store i32 %10, ptr %5, align 4, !tbaa !9
  br label %11

11:                                               ; preds = %26, %2
  %12 = load i32, ptr %5, align 4, !tbaa !9
  %13 = icmp sge i32 %12, 1
  br i1 %13, label %15, label %14

14:                                               ; preds = %11
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %29

15:                                               ; preds = %11
  %16 = load ptr, ptr %3, align 8, !tbaa !5
  %17 = load i32, ptr %5, align 4, !tbaa !9
  %18 = sub nsw i32 %17, 1
  %19 = sext i32 %18 to i64
  %20 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %16, i64 noundef %19) #3
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = sext i32 %22 to i64
  %24 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %21, i64 noundef %23) #3
  %25 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mimIERKS_(ptr noundef nonnull align 4 dereferenceable(4) %24, ptr noundef nonnull align 4 dereferenceable(4) %20)
  br label %26

26:                                               ; preds = %15
  %27 = load i32, ptr %5, align 4, !tbaa !9
  %28 = add nsw i32 %27, -1
  store i32 %28, ptr %5, align 4, !tbaa !9
  br label %11, !llvm.loop !11

29:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  store i32 0, ptr %6, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %51, %29
  %31 = load i32, ptr %6, align 4, !tbaa !9
  %32 = load ptr, ptr %3, align 8, !tbaa !5
  %33 = call noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %32) #3
  %34 = trunc i64 %33 to i32
  %35 = load i32, ptr %4, align 4, !tbaa !9
  %36 = sub nsw i32 %34, %35
  %37 = icmp slt i32 %31, %36
  br i1 %37, label %39, label %38

38:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %54

39:                                               ; preds = %30
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  %41 = load i32, ptr %6, align 4, !tbaa !9
  %42 = sext i32 %41 to i64
  %43 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %40, i64 noundef %42) #3
  %44 = load ptr, ptr %3, align 8, !tbaa !5
  %45 = load i32, ptr %6, align 4, !tbaa !9
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = add nsw i32 %45, %46
  %48 = sext i32 %47 to i64
  %49 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %44, i64 noundef %48) #3
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mipLERKS_(ptr noundef nonnull align 4 dereferenceable(4) %49, ptr noundef nonnull align 4 dereferenceable(4) %43)
  br label %51

51:                                               ; preds = %39
  %52 = load i32, ptr %6, align 4, !tbaa !9
  %53 = add nsw i32 %52, 1
  store i32 %53, ptr %6, align 4, !tbaa !9
  br label %30, !llvm.loop !13

54:                                               ; preds = %38
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = load ptr, ptr %3, align 8, !tbaa !5
  %57 = call noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %56) #3
  %58 = trunc i64 %57 to i32
  %59 = load i32, ptr %4, align 4, !tbaa !9
  %60 = sub nsw i32 %58, %59
  %61 = add nsw i32 %60, 1
  %62 = sext i32 %61 to i64
  call void @_ZNSt6vectorI2miSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %55, i64 noundef %62)
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorI2miSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mimIERKS_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mipLERKS_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z3subRSt6vectorI2miSaIS0_EEi(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = tail call noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %4 = trunc i64 %3 to i32
  %5 = icmp sgt i32 %4, 1
  br i1 %5, label %.lr.ph.preheader, label %.preheader

.lr.ph.preheader:                                 ; preds = %2
  %6 = and i64 %3, 2147483647
  br label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %2
  %7 = tail call noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %8 = trunc i64 %7 to i32
  %9 = icmp sgt i32 %8, %1
  br i1 %9, label %.lr.ph21.preheader, label %._crit_edge

.lr.ph21.preheader:                               ; preds = %.preheader
  %10 = sext i32 %1 to i64
  br label %.lr.ph21

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %6, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %11 = add nsw i64 %indvars.iv, -2
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %11) #2
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next) #2
  %14 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mimIERKS_(ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull align 4 dereferenceable(4) %12)
  %15 = icmp ugt i64 %indvars.iv, 2
  br i1 %15, label %.lr.ph, label %.preheader, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph21, %.preheader
  %16 = tail call noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %17 = trunc i64 %16 to i32
  %reass.sub = sub i32 %17, %1
  %18 = add i32 %reass.sub, 1
  %19 = sext i32 %18 to i64
  tail call void @_ZNSt6vectorI2miSaIS0_EE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %19)
  ret void

.lr.ph21:                                         ; preds = %.lr.ph21.preheader, %.lr.ph21
  %indvars.iv23 = phi i64 [ 0, %.lr.ph21.preheader ], [ %indvars.iv.next24, %.lr.ph21 ]
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv23) #2
  %21 = add nsw i64 %indvars.iv23, %10
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorI2miSaIS0_EEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %21) #2
  %23 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZN2mipLERKS_(ptr noundef nonnull align 4 dereferenceable(4) %22, ptr noundef nonnull align 4 dereferenceable(4) %20)
  %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
  %24 = tail call noundef i64 @_ZNKSt6vectorI2miSaIS0_EE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %0) #2
  %25 = trunc i64 %24 to i32
  %26 = sub nsw i32 %25, %1
  %27 = sext i32 %26 to i64
  %28 = icmp slt i64 %indvars.iv.next24, %27
  br i1 %28, label %.lr.ph21, label %._crit_edge, !llvm.loop !7
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass