; LLVM IR from div-bargali/Data-Structures-and-Algorithms :: C++/Algorithms/Sorting-Algorithms/CycleSort/Cycle_Sort.ll (Z10cycle_sortPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z10cycle_sortPii(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !9
  br label %12

12:                                               ; preds = %119, %2
  %13 = load i32, ptr %8, align 4, !tbaa !9
  %14 = load i32, ptr %4, align 4, !tbaa !9
  %15 = sub nsw i32 %14, 1
  %16 = icmp slt i32 %13, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %12
  store i32 2, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %122

18:                                               ; preds = %12
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = load i32, ptr %8, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds i32, ptr %19, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !9
  store i32 %23, ptr %6, align 4, !tbaa !9
  %24 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %24, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %25 = load i32, ptr %8, align 4, !tbaa !9
  %26 = add nsw i32 %25, 1
  store i32 %26, ptr %10, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %44, %18
  %28 = load i32, ptr %10, align 4, !tbaa !9
  %29 = load i32, ptr %4, align 4, !tbaa !9
  %30 = icmp slt i32 %28, %29
  br i1 %30, label %32, label %31

31:                                               ; preds = %27
  store i32 5, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %47

32:                                               ; preds = %27
  %33 = load ptr, ptr %3, align 8, !tbaa !5
  %34 = load i32, ptr %10, align 4, !tbaa !9
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds i32, ptr %33, i64 %35
  %37 = load i32, ptr %36, align 4, !tbaa !9
  %38 = load i32, ptr %6, align 4, !tbaa !9
  %39 = icmp slt i32 %37, %38
  br i1 %39, label %40, label %43

40:                                               ; preds = %32
  %41 = load i32, ptr %7, align 4, !tbaa !9
  %42 = add nsw i32 %41, 1
  store i32 %42, ptr %7, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %40, %32
  br label %44

44:                                               ; preds = %43
  %45 = load i32, ptr %10, align 4, !tbaa !9
  %46 = add nsw i32 %45, 1
  store i32 %46, ptr %10, align 4, !tbaa !9
  br label %27, !llvm.loop !11

47:                                               ; preds = %31
  %48 = load i32, ptr %7, align 4, !tbaa !9
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = icmp eq i32 %48, %49
  br i1 %50, label %51, label %52

51:                                               ; preds = %47
  br label %119

52:                                               ; preds = %47
  br label %53

53:                                               ; preds = %61, %52
  %54 = load i32, ptr %6, align 4, !tbaa !9
  %55 = load ptr, ptr %3, align 8, !tbaa !5
  %56 = load i32, ptr %7, align 4, !tbaa !9
  %57 = sext i32 %56 to i64
  %58 = getelementptr inbounds i32, ptr %55, i64 %57
  %59 = load i32, ptr %58, align 4, !tbaa !9
  %60 = icmp eq i32 %54, %59
  br i1 %60, label %61, label %64

61:                                               ; preds = %53
  %62 = load i32, ptr %7, align 4, !tbaa !9
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %7, align 4, !tbaa !9
  br label %53, !llvm.loop !13

64:                                               ; preds = %53
  %65 = load ptr, ptr %3, align 8, !tbaa !5
  %66 = load i32, ptr %7, align 4, !tbaa !9
  %67 = sext i32 %66 to i64
  %68 = getelementptr inbounds i32, ptr %65, i64 %67
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %68, ptr noundef nonnull align 4 dereferenceable(4) %6) #3
  %69 = load i32, ptr %5, align 4, !tbaa !9
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %5, align 4, !tbaa !9
  br label %71

71:                                               ; preds = %111, %64
  %72 = load i32, ptr %7, align 4, !tbaa !9
  %73 = load i32, ptr %8, align 4, !tbaa !9
  %74 = icmp ne i32 %72, %73
  br i1 %74, label %75, label %118

75:                                               ; preds = %71
  %76 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %76, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %77 = load i32, ptr %8, align 4, !tbaa !9
  %78 = add nsw i32 %77, 1
  store i32 %78, ptr %11, align 4, !tbaa !9
  br label %79

79:                                               ; preds = %96, %75
  %80 = load i32, ptr %11, align 4, !tbaa !9
  %81 = load i32, ptr %4, align 4, !tbaa !9
  %82 = icmp slt i32 %80, %81
  br i1 %82, label %84, label %83

83:                                               ; preds = %79
  store i32 12, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %99

84:                                               ; preds = %79
  %85 = load ptr, ptr %3, align 8, !tbaa !5
  %86 = load i32, ptr %11, align 4, !tbaa !9
  %87 = sext i32 %86 to i64
  %88 = getelementptr inbounds i32, ptr %85, i64 %87
  %89 = load i32, ptr %88, align 4, !tbaa !9
  %90 = load i32, ptr %6, align 4, !tbaa !9
  %91 = icmp slt i32 %89, %90
  br i1 %91, label %92, label %95

92:                                               ; preds = %84
  %93 = load i32, ptr %7, align 4, !tbaa !9
  %94 = add nsw i32 %93, 1
  store i32 %94, ptr %7, align 4, !tbaa !9
  br label %95

95:                                               ; preds = %92, %84
  br label %96

96:                                               ; preds = %95
  %97 = load i32, ptr %11, align 4, !tbaa !9
  %98 = add nsw i32 %97, 1
  store i32 %98, ptr %11, align 4, !tbaa !9
  br label %79, !llvm.loop !14

99:                                               ; preds = %83
  br label %100

100:                                              ; preds = %108, %99
  %101 = load i32, ptr %6, align 4, !tbaa !9
  %102 = load ptr, ptr %3, align 8, !tbaa !5
  %103 = load i32, ptr %7, align 4, !tbaa !9
  %104 = sext i32 %103 to i64
  %105 = getelementptr inbounds i32, ptr %102, i64 %104
  %106 = load i32, ptr %105, align 4, !tbaa !9
  %107 = icmp eq i32 %101, %106
  br i1 %107, label %108, label %111

108:                                              ; preds = %100
  %109 = load i32, ptr %7, align 4, !tbaa !9
  %110 = add nsw i32 %109, 1
  store i32 %110, ptr %7, align 4, !tbaa !9
  br label %100, !llvm.loop !15

111:                                              ; preds = %100
  %112 = load ptr, ptr %3, align 8, !tbaa !5
  %113 = load i32, ptr %7, align 4, !tbaa !9
  %114 = sext i32 %113 to i64
  %115 = getelementptr inbounds i32, ptr %112, i64 %114
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %115, ptr noundef nonnull align 4 dereferenceable(4) %6) #3
  %116 = load i32, ptr %5, align 4, !tbaa !9
  %117 = add nsw i32 %116, 1
  store i32 %117, ptr %5, align 4, !tbaa !9
  br label %71, !llvm.loop !16

118:                                              ; preds = %71
  br label %119

119:                                              ; preds = %118, %51
  %120 = load i32, ptr %8, align 4, !tbaa !9
  %121 = add nsw i32 %120, 1
  store i32 %121, ptr %8, align 4, !tbaa !9
  br label %12, !llvm.loop !17

122:                                              ; preds = %17
  %123 = load i32, ptr %5, align 4, !tbaa !9
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %123
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z10cycle_sortPii(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  %4 = icmp sgt i32 %1, 1
  br i1 %4, label %.lr.ph62.preheader, label %._crit_edge63

.lr.ph62.preheader:                               ; preds = %2
  %5 = add nsw i32 %1, -1
  %wide.trip.count88 = zext nneg i32 %5 to i64
  %wide.trip.count = zext nneg i32 %1 to i64
  %wide.trip.count82 = zext nneg i32 %1 to i64
  br label %.lr.ph.preheader

._crit_edge63:                                    ; preds = %.loopexit, %2
  %.040.lcssa = phi i32 [ 0, %2 ], [ %.242, %.loopexit ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  ret i32 %.040.lcssa

.lr.ph.preheader:                                 ; preds = %.loopexit, %.lr.ph62.preheader
  %indvars.iv74 = phi i64 [ 0, %.lr.ph62.preheader ], [ %indvars.iv.next75, %.loopexit ]
  %indvars.iv = phi i64 [ 1, %.lr.ph62.preheader ], [ %indvars.iv.next, %.loopexit ]
  %.04059 = phi i32 [ 0, %.lr.ph62.preheader ], [ %.242, %.loopexit ]
  %6 = xor i64 %indvars.iv74, -1
  %7 = add nsw i64 %6, %wide.trip.count
  %8 = xor i64 %indvars.iv74, -1
  %9 = add nsw i64 %8, %wide.trip.count
  %10 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv74
  %11 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %11, ptr %3, align 4, !tbaa !5
  %indvars.iv.next75 = add nuw nsw i64 %indvars.iv74, 1
  %12 = trunc nuw nsw i64 %indvars.iv74 to i32
  %min.iters.check97 = icmp ult i64 %7, 8
  br i1 %min.iters.check97, label %.lr.ph.preheader116, label %vector.ph98

.lr.ph.preheader116:                              ; preds = %middle.block95, %.lr.ph.preheader
  %indvars.iv68.ph = phi i64 [ %indvars.iv, %.lr.ph.preheader ], [ %ind.end101, %middle.block95 ]
  %.03948.ph = phi i32 [ %12, %.lr.ph.preheader ], [ %24, %middle.block95 ]
  br label %.lr.ph

vector.ph98:                                      ; preds = %.lr.ph.preheader
  %n.vec100 = and i64 %7, -8
  %ind.end101 = add i64 %indvars.iv, %n.vec100
  %13 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %12, i64 0
  %broadcast.splatinsert110 = insertelement <4 x i32> poison, i32 %11, i64 0
  %broadcast.splat111 = shufflevector <4 x i32> %broadcast.splatinsert110, <4 x i32> poison, <4 x i32> zeroinitializer
  %14 = getelementptr i32, ptr %0, i64 %indvars.iv
  br label %vector.body103

vector.body103:                                   ; preds = %vector.body103, %vector.ph98
  %index104 = phi i64 [ 0, %vector.ph98 ], [ %index.next112, %vector.body103 ]
  %vec.phi105 = phi <4 x i32> [ %13, %vector.ph98 ], [ %21, %vector.body103 ]
  %vec.phi106 = phi <4 x i32> [ zeroinitializer, %vector.ph98 ], [ %22, %vector.body103 ]
  %15 = getelementptr i32, ptr %14, i64 %index104
  %16 = getelementptr inbounds i8, ptr %15, i64 16
  %wide.load108 = load <4 x i32>, ptr %15, align 4, !tbaa !5
  %wide.load109 = load <4 x i32>, ptr %16, align 4, !tbaa !5
  %17 = icmp slt <4 x i32> %wide.load108, %broadcast.splat111
  %18 = icmp slt <4 x i32> %wide.load109, %broadcast.splat111
  %19 = zext <4 x i1> %17 to <4 x i32>
  %20 = zext <4 x i1> %18 to <4 x i32>
  %21 = add <4 x i32> %vec.phi105, %19
  %22 = add <4 x i32> %vec.phi106, %20
  %index.next112 = add nuw i64 %index104, 8
  %23 = icmp eq i64 %index.next112, %n.vec100
  br i1 %23, label %middle.block95, label %vector.body103, !llvm.loop !9

middle.block95:                                   ; preds = %vector.body103
  %bin.rdx113 = add <4 x i32> %22, %21
  %24 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx113)
  %cmp.n114 = icmp eq i64 %7, %n.vec100
  br i1 %cmp.n114, label %._crit_edge, label %.lr.ph.preheader116

._crit_edge:                                      ; preds = %.lr.ph, %middle.block95
  %spec.select.lcssa = phi i32 [ %24, %middle.block95 ], [ %spec.select, %.lr.ph ]
  %25 = zext i32 %spec.select.lcssa to i64
  %26 = icmp eq i64 %indvars.iv74, %25
  br i1 %26, label %.loopexit, label %.preheader46.preheader

.preheader46.preheader:                           ; preds = %._crit_edge
  %27 = sext i32 %spec.select.lcssa to i64
  br label %.preheader46

.lr.ph:                                           ; preds = %.lr.ph.preheader116, %.lr.ph
  %indvars.iv68 = phi i64 [ %indvars.iv.next69, %.lr.ph ], [ %indvars.iv68.ph, %.lr.ph.preheader116 ]
  %.03948 = phi i32 [ %spec.select, %.lr.ph ], [ %.03948.ph, %.lr.ph.preheader116 ]
  %28 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv68
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = icmp slt i32 %29, %11
  %31 = zext i1 %30 to i32
  %spec.select = add nuw nsw i32 %.03948, %31
  %indvars.iv.next69 = add nuw nsw i64 %indvars.iv68, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next69, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !13

.preheader46:                                     ; preds = %.preheader46.preheader, %.preheader46
  %indvars.iv71 = phi i64 [ %27, %.preheader46.preheader ], [ %indvars.iv.next72, %.preheader46 ]
  %32 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv71
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = icmp eq i32 %11, %33
  %indvars.iv.next72 = add nsw i64 %indvars.iv71, 1
  br i1 %34, label %.preheader46, label %35, !llvm.loop !14

35:                                               ; preds = %.preheader46
  %36 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv71
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %36, ptr noundef nonnull align 4 dereferenceable(4) %3) #4
  %.14155 = add nsw i32 %.04059, 1
  %37 = and i64 %indvars.iv71, 4294967295
  %.not56 = icmp eq i64 %37, %indvars.iv74
  br i1 %.not56, label %.loopexit, label %.preheader45.us.preheader

.preheader45.us.preheader:                        ; preds = %35
  %min.iters.check = icmp ult i64 %9, 8
  %n.vec = and i64 %9, -8
  %ind.end = add i64 %indvars.iv, %n.vec
  %38 = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 %12, i64 0
  %39 = getelementptr i32, ptr %0, i64 %indvars.iv
  %cmp.n = icmp eq i64 %9, %n.vec
  br label %.preheader45.us

.preheader45.us:                                  ; preds = %.preheader45.us.preheader, %55
  %.14157.us = phi i32 [ %.141.us, %55 ], [ %.14155, %.preheader45.us.preheader ]
  %40 = load i32, ptr %3, align 4, !tbaa !5
  br i1 %min.iters.check, label %scalar.ph.preheader, label %vector.ph

scalar.ph.preheader:                              ; preds = %middle.block, %.preheader45.us
  %indvars.iv79.ph = phi i64 [ %indvars.iv, %.preheader45.us ], [ %ind.end, %middle.block ]
  %.451.us.ph = phi i32 [ %12, %.preheader45.us ], [ %50, %middle.block ]
  br label %scalar.ph

vector.ph:                                        ; preds = %.preheader45.us
  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %40, i64 0
  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %vec.phi = phi <4 x i32> [ %38, %vector.ph ], [ %47, %vector.body ]
  %vec.phi93 = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %48, %vector.body ]
  %41 = getelementptr i32, ptr %39, i64 %index
  %42 = getelementptr inbounds i8, ptr %41, i64 16
  %wide.load = load <4 x i32>, ptr %41, align 4, !tbaa !5
  %wide.load94 = load <4 x i32>, ptr %42, align 4, !tbaa !5
  %43 = icmp slt <4 x i32> %wide.load, %broadcast.splat
  %44 = icmp slt <4 x i32> %wide.load94, %broadcast.splat
  %45 = zext <4 x i1> %43 to <4 x i32>
  %46 = zext <4 x i1> %44 to <4 x i32>
  %47 = add <4 x i32> %vec.phi, %45
  %48 = add <4 x i32> %vec.phi93, %46
  %index.next = add nuw i64 %index, 8
  %49 = icmp eq i64 %index.next, %n.vec
  br i1 %49, label %middle.block, label %vector.body, !llvm.loop !15

middle.block:                                     ; preds = %vector.body
  %bin.rdx = add <4 x i32> %48, %47
  %50 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %bin.rdx)
  br i1 %cmp.n, label %..preheader_crit_edge.us, label %scalar.ph.preheader

51:                                               ; preds = %..preheader_crit_edge.us, %51
  %indvars.iv84 = phi i64 [ %62, %..preheader_crit_edge.us ], [ %indvars.iv.next85, %51 ]
  %52 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv84
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = icmp eq i32 %40, %53
  %indvars.iv.next85 = add nuw nsw i64 %indvars.iv84, 1
  br i1 %54, label %51, label %55, !llvm.loop !16

55:                                               ; preds = %51
  %56 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv84
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %56, ptr noundef nonnull align 4 dereferenceable(4) %3) #4
  %.141.us = add nsw i32 %.14157.us, 1
  %57 = and i64 %indvars.iv84, 4294967295
  %.not.us = icmp eq i64 %57, %indvars.iv74
  br i1 %.not.us, label %.loopexit, label %.preheader45.us, !llvm.loop !17

scalar.ph:                                        ; preds = %scalar.ph.preheader, %scalar.ph
  %indvars.iv79 = phi i64 [ %indvars.iv.next80, %scalar.ph ], [ %indvars.iv79.ph, %scalar.ph.preheader ]
  %.451.us = phi i32 [ %spec.select44.us, %scalar.ph ], [ %.451.us.ph, %scalar.ph.preheader ]
  %58 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv79
  %59 = load i32, ptr %58, align 4, !tbaa !5
  %60 = icmp slt i32 %59, %40
  %61 = zext i1 %60 to i32
  %spec.select44.us = add i32 %.451.us, %61
  %indvars.iv.next80 = add nuw nsw i64 %indvars.iv79, 1
  %exitcond83.not = icmp eq i64 %indvars.iv.next80, %wide.trip.count82
  br i1 %exitcond83.not, label %..preheader_crit_edge.us, label %scalar.ph, !llvm.loop !18

..preheader_crit_edge.us:                         ; preds = %scalar.ph, %middle.block
  %spec.select44.us.lcssa = phi i32 [ %50, %middle.block ], [ %spec.select44.us, %scalar.ph ]
  %62 = zext i32 %spec.select44.us.lcssa to i64
  br label %51

.loopexit:                                        ; preds = %55, %35, %._crit_edge
  %.242 = phi i32 [ %.04059, %._crit_edge ], [ %.14155, %35 ], [ %.141.us, %55 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond89.not = icmp eq i64 %indvars.iv.next75, %wide.trip.count88
  br i1 %exitcond89.not, label %._crit_edge63, label %.lr.ph.preheader, !llvm.loop !19
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}
!15 = distinct !{!15, !10, !11, !12}
!16 = distinct !{!16, !10}
!17 = distinct !{!17, !10}
!18 = distinct !{!18, !10, !12, !11}
!19 = distinct !{!19, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SCCPPass,SROAPass,SimplifyCFGPass