; LLVM IR from bqi343/cp-notebook :: Contests/USACO Solutions/2013-14/Nov 2013/13 Nov G3.ll (Z4fillii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local global i32, align 4
@cum = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z4fillii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  %8 = load i32, ptr %3, align 4, !tbaa !5
  store i32 %8, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  %9 = load i32, ptr @N, align 4, !tbaa !5
  store i32 %9, ptr %6, align 4, !tbaa !5
  br label %10

10:                                               ; preds = %36, %2
  %11 = load i32, ptr %5, align 4, !tbaa !5
  %12 = load i32, ptr %6, align 4, !tbaa !5
  %13 = icmp slt i32 %11, %12
  br i1 %13, label %14, label %37

14:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  %15 = load i32, ptr %5, align 4, !tbaa !5
  %16 = load i32, ptr %6, align 4, !tbaa !5
  %17 = add nsw i32 %15, %16
  %18 = add nsw i32 %17, 1
  %19 = sdiv i32 %18, 2
  store i32 %19, ptr %7, align 4, !tbaa !5
  %20 = load i32, ptr %7, align 4, !tbaa !5
  %21 = sext i32 %20 to i64
  %22 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cum, i64 noundef %21) #2
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cum, i64 noundef %25) #2
  %27 = load i32, ptr %26, align 4, !tbaa !5
  %28 = sub nsw i32 %23, %27
  %29 = load i32, ptr %4, align 4, !tbaa !5
  %30 = icmp sle i32 %28, %29
  br i1 %30, label %31, label %33

31:                                               ; preds = %14
  %32 = load i32, ptr %7, align 4, !tbaa !5
  store i32 %32, ptr %5, align 4, !tbaa !5
  br label %36

33:                                               ; preds = %14
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = sub nsw i32 %34, 1
  store i32 %35, ptr %6, align 4, !tbaa !5
  br label %36

36:                                               ; preds = %33, %31
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  br label %10, !llvm.loop !9

37:                                               ; preds = %10
  %38 = load i32, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  ret i32 %38
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@N = external dso_local local_unnamed_addr global i32, align 4
@cum = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z4fillii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = load i32, ptr @N, align 4, !tbaa !5
  %4 = icmp sgt i32 %3, %0
  br i1 %4, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %2
  %5 = sext i32 %0 to i64
  br label %6

6:                                                ; preds = %.lr.ph, %6
  %.014 = phi i32 [ %0, %.lr.ph ], [ %.1, %6 ]
  %.01113 = phi i32 [ %3, %.lr.ph ], [ %.112, %6 ]
  %7 = add i32 %.01113, 1
  %8 = add i32 %7, %.014
  %9 = sdiv i32 %8, 2
  %10 = sext i32 %9 to i64
  %11 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cum, i64 noundef %10) #1
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @cum, i64 noundef %5) #1
  %14 = load i32, ptr %13, align 4, !tbaa !5
  %15 = sub nsw i32 %12, %14
  %.not = icmp sgt i32 %15, %1
  %16 = add nsw i32 %9, -1
  %.112 = select i1 %.not, i32 %16, i32 %.01113
  %.1 = select i1 %.not, i32 %.014, i32 %9
  %17 = icmp slt i32 %.1, %.112
  br i1 %17, label %6, label %._crit_edge, !llvm.loop !9

._crit_edge:                                      ; preds = %6, %2
  %.0.lcssa = phi i32 [ %0, %2 ], [ %.1, %6 ]
  ret i32 %.0.lcssa
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass