; LLVM IR from InsightSoftwareConsortium/ITK :: Modules/ThirdParty/ZLIB/src/itkzlib-ng/arch/x86 (x86_features)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.x86_cpu_features = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }

; Function Attrs: nounwind uwtable
define dso_local void @x86_check_features(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  call void @cpuid(i32 noundef 0, ptr noundef %7, ptr noundef %4, ptr noundef %5, ptr noundef %6)
  call void @cpuid(i32 noundef 1, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6)
  %9 = load i32, ptr %6, align 4, !tbaa !9
  %10 = and i32 %9, 67108864
  %11 = load ptr, ptr %2, align 8, !tbaa !5
  %12 = getelementptr inbounds %struct.x86_cpu_features, ptr %11, i32 0, i32 8
  store i32 %10, ptr %12, align 4, !tbaa !11
  %13 = load i32, ptr %5, align 4, !tbaa !9
  %14 = and i32 %13, 512
  %15 = load ptr, ptr %2, align 8, !tbaa !5
  %16 = getelementptr inbounds %struct.x86_cpu_features, ptr %15, i32 0, i32 9
  store i32 %14, ptr %16, align 4, !tbaa !13
  %17 = load i32, ptr %5, align 4, !tbaa !9
  %18 = and i32 %17, 1048576
  %19 = load ptr, ptr %2, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.x86_cpu_features, ptr %19, i32 0, i32 10
  store i32 %18, ptr %20, align 4, !tbaa !14
  %21 = load i32, ptr %5, align 4, !tbaa !9
  %22 = and i32 %21, 2
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.x86_cpu_features, ptr %23, i32 0, i32 11
  store i32 %22, ptr %24, align 4, !tbaa !15
  %25 = load i32, ptr %5, align 4, !tbaa !9
  %26 = and i32 %25, 134217728
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %28, label %42

28:                                               ; preds = %1
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %29 = call i64 @xgetbv(i32 noundef 0)
  store i64 %29, ptr %8, align 8, !tbaa !16
  %30 = load i64, ptr %8, align 8, !tbaa !16
  %31 = and i64 %30, 6
  %32 = icmp eq i64 %31, 6
  %33 = zext i1 %32 to i32
  %34 = load ptr, ptr %2, align 8, !tbaa !5
  %35 = getelementptr inbounds %struct.x86_cpu_features, ptr %34, i32 0, i32 13
  store i32 %33, ptr %35, align 4, !tbaa !18
  %36 = load i64, ptr %8, align 8, !tbaa !16
  %37 = and i64 %36, 230
  %38 = icmp eq i64 %37, 230
  %39 = zext i1 %38 to i32
  %40 = load ptr, ptr %2, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.x86_cpu_features, ptr %40, i32 0, i32 14
  store i32 %39, ptr %41, align 4, !tbaa !19
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  br label %42

42:                                               ; preds = %28, %1
  %43 = load i32, ptr %7, align 4, !tbaa !9
  %44 = icmp uge i32 %43, 7
  br i1 %44, label %45, label %125

45:                                               ; preds = %42
  call void @cpuidex(i32 noundef 7, i32 noundef 0, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6)
  %46 = load i32, ptr %5, align 4, !tbaa !9
  %47 = and i32 %46, 1024
  %48 = load ptr, ptr %2, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.x86_cpu_features, ptr %48, i32 0, i32 12
  store i32 %47, ptr %49, align 4, !tbaa !20
  %50 = load ptr, ptr %2, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.x86_cpu_features, ptr %50, i32 0, i32 13
  %52 = load i32, ptr %51, align 4, !tbaa !18
  %53 = icmp ne i32 %52, 0
  br i1 %53, label %54, label %59

54:                                               ; preds = %45
  %55 = load i32, ptr %4, align 4, !tbaa !9
  %56 = and i32 %55, 32
  %57 = load ptr, ptr %2, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.x86_cpu_features, ptr %57, i32 0, i32 0
  store i32 %56, ptr %58, align 4, !tbaa !21
  br label %59

59:                                               ; preds = %54, %45
  %60 = load i32, ptr %4, align 4, !tbaa !9
  %61 = and i32 %60, 8
  %62 = load ptr, ptr %2, align 8, !tbaa !5
  %63 = getelementptr inbounds %struct.x86_cpu_features, ptr %62, i32 0, i32 7
  store i32 %61, ptr %63, align 4, !tbaa !22
  %64 = load ptr, ptr %2, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.x86_cpu_features, ptr %64, i32 0, i32 14
  %66 = load i32, ptr %65, align 4, !tbaa !19
  %67 = icmp ne i32 %66, 0
  br i1 %67, label %68, label %124

68:                                               ; preds = %59
  %69 = load i32, ptr %4, align 4, !tbaa !9
  %70 = and i32 %69, 65536
  %71 = load ptr, ptr %2, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.x86_cpu_features, ptr %71, i32 0, i32 1
  store i32 %70, ptr %72, align 4, !tbaa !23
  %73 = load ptr, ptr %2, align 8, !tbaa !5
  %74 = getelementptr inbounds %struct.x86_cpu_features, ptr %73, i32 0, i32 1
  %75 = load i32, ptr %74, align 4, !tbaa !23
  %76 = icmp ne i32 %75, 0
  br i1 %76, label %77, label %90

77:                                               ; preds = %68
  %78 = load i32, ptr %4, align 4, !tbaa !9
  %79 = and i32 %78, 131072
  %80 = load ptr, ptr %2, align 8, !tbaa !5
  %81 = getelementptr inbounds %struct.x86_cpu_features, ptr %80, i32 0, i32 2
  store i32 %79, ptr %81, align 4, !tbaa !24
  %82 = load i32, ptr %4, align 4, !tbaa !9
  %83 = and i32 %82, 1073741824
  %84 = load ptr, ptr %2, align 8, !tbaa !5
  %85 = getelementptr inbounds %struct.x86_cpu_features, ptr %84, i32 0, i32 3
  store i32 %83, ptr %85, align 4, !tbaa !25
  %86 = load i32, ptr %4, align 4, !tbaa !9
  %87 = and i32 %86, -2147483648
  %88 = load ptr, ptr %2, align 8, !tbaa !5
  %89 = getelementptr inbounds %struct.x86_cpu_features, ptr %88, i32 0, i32 4
  store i32 %87, ptr %89, align 4, !tbaa !26
  br label %90

90:                                               ; preds = %77, %68
  %91 = load ptr, ptr %2, align 8, !tbaa !5
  %92 = getelementptr inbounds %struct.x86_cpu_features, ptr %91, i32 0, i32 1
  %93 = load i32, ptr %92, align 4, !tbaa !23
  %94 = icmp ne i32 %93, 0
  br i1 %94, label %95, label %115

95:                                               ; preds = %90
  %96 = load ptr, ptr %2, align 8, !tbaa !5
  %97 = getelementptr inbounds %struct.x86_cpu_features, ptr %96, i32 0, i32 2
  %98 = load i32, ptr %97, align 4, !tbaa !24
  %99 = icmp ne i32 %98, 0
  br i1 %99, label %100, label %115

100:                                              ; preds = %95
  %101 = load ptr, ptr %2, align 8, !tbaa !5
  %102 = getelementptr inbounds %struct.x86_cpu_features, ptr %101, i32 0, i32 3
  %103 = load i32, ptr %102, align 4, !tbaa !25
  %104 = icmp ne i32 %103, 0
  br i1 %104, label %105, label %115

105:                                              ; preds = %100
  %106 = load ptr, ptr %2, align 8, !tbaa !5
  %107 = getelementptr inbounds %struct.x86_cpu_features, ptr %106, i32 0, i32 4
  %108 = load i32, ptr %107, align 4, !tbaa !26
  %109 = icmp ne i32 %108, 0
  br i1 %109, label %110, label %115

110:                                              ; preds = %105
  %111 = load ptr, ptr %2, align 8, !tbaa !5
  %112 = getelementptr inbounds %struct.x86_cpu_features, ptr %111, i32 0, i32 7
  %113 = load i32, ptr %112, align 4, !tbaa !22
  %114 = icmp ne i32 %113, 0
  br label %115

115:                                              ; preds = %110, %105, %100, %95, %90
  %116 = phi i1 [ false, %105 ], [ false, %100 ], [ false, %95 ], [ false, %90 ], [ %114, %110 ]
  %117 = zext i1 %116 to i32
  %118 = load ptr, ptr %2, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.x86_cpu_features, ptr %118, i32 0, i32 5
  store i32 %117, ptr %119, align 4, !tbaa !27
  %120 = load i32, ptr %5, align 4, !tbaa !9
  %121 = and i32 %120, 2048
  %122 = load ptr, ptr %2, align 8, !tbaa !5
  %123 = getelementptr inbounds %struct.x86_cpu_features, ptr %122, i32 0, i32 6
  store i32 %121, ptr %123, align 4, !tbaa !28
  br label %124

124:                                              ; preds = %115, %59
  br label %125

125:                                              ; preds = %124, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @cpuid(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @xgetbv(i32 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @cpuidex(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 32}
!12 = !{!"x86_cpu_features", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !10, i64 32, !10, i64 36, !10, i64 40, !10, i64 44, !10, i64 48, !10, i64 52, !10, i64 56}
!13 = !{!12, !10, i64 36}
!14 = !{!12, !10, i64 40}
!15 = !{!12, !10, i64 44}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = !{!12, !10, i64 52}
!19 = !{!12, !10, i64 56}
!20 = !{!12, !10, i64 48}
!21 = !{!12, !10, i64 0}
!22 = !{!12, !10, i64 28}
!23 = !{!12, !10, i64 4}
!24 = !{!12, !10, i64 8}
!25 = !{!12, !10, i64 12}
!26 = !{!12, !10, i64 16}
!27 = !{!12, !10, i64 20}
!28 = !{!12, !10, i64 24}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local void @x86_check_features(ptr nocapture noundef %0) local_unnamed_addr #0 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  call void @cpuid(i32 noundef 0, ptr noundef nonnull %6, ptr noundef nonnull %3, ptr noundef nonnull %4, ptr noundef nonnull %5)
  call void @cpuid(i32 noundef 1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4, ptr noundef nonnull %5)
  %7 = load i32, ptr %5, align 4, !tbaa !5
  %8 = and i32 %7, 67108864
  %9 = getelementptr inbounds i8, ptr %0, i64 32
  store i32 %8, ptr %9, align 4, !tbaa !9
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = getelementptr inbounds i8, ptr %0, i64 36
  %12 = insertelement <2 x i32> poison, i32 %10, i64 0
  %13 = shufflevector <2 x i32> %12, <2 x i32> poison, <2 x i32> zeroinitializer
  %14 = and <2 x i32> %13, <i32 512, i32 1048576>
  store <2 x i32> %14, ptr %11, align 4, !tbaa !5
  %15 = and i32 %10, 2
  %16 = getelementptr inbounds i8, ptr %0, i64 44
  store i32 %15, ptr %16, align 4, !tbaa !11
  %17 = and i32 %10, 134217728
  %.not = icmp eq i32 %17, 0
  br i1 %.not, label %28, label %18

18:                                               ; preds = %1
  %19 = call i64 @xgetbv(i32 noundef 0)
  %20 = and i64 %19, 6
  %21 = icmp eq i64 %20, 6
  %22 = zext i1 %21 to i32
  %23 = getelementptr inbounds i8, ptr %0, i64 52
  store i32 %22, ptr %23, align 4, !tbaa !12
  %24 = and i64 %19, 230
  %25 = icmp eq i64 %24, 230
  %26 = zext i1 %25 to i32
  %27 = getelementptr inbounds i8, ptr %0, i64 56
  store i32 %26, ptr %27, align 4, !tbaa !13
  br label %28

28:                                               ; preds = %18, %1
  %29 = load i32, ptr %6, align 4, !tbaa !5
  %30 = icmp ugt i32 %29, 6
  br i1 %30, label %31, label %60

31:                                               ; preds = %28
  call void @cpuidex(i32 noundef 7, i32 noundef 0, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4, ptr noundef nonnull %5)
  %32 = load i32, ptr %4, align 4, !tbaa !5
  %33 = and i32 %32, 1024
  %34 = getelementptr inbounds i8, ptr %0, i64 48
  store i32 %33, ptr %34, align 4, !tbaa !14
  %35 = getelementptr inbounds i8, ptr %0, i64 52
  %36 = load i32, ptr %35, align 4, !tbaa !12
  %.not24 = icmp eq i32 %36, 0
  %.pre = load i32, ptr %3, align 4, !tbaa !5
  br i1 %.not24, label %39, label %37

37:                                               ; preds = %31
  %38 = and i32 %.pre, 32
  store i32 %38, ptr %0, align 4, !tbaa !15
  br label %39

39:                                               ; preds = %37, %31
  %40 = and i32 %.pre, 8
  %41 = getelementptr inbounds i8, ptr %0, i64 28
  store i32 %40, ptr %41, align 4, !tbaa !16
  %42 = getelementptr inbounds i8, ptr %0, i64 56
  %43 = load i32, ptr %42, align 4, !tbaa !13
  %.not25 = icmp eq i32 %43, 0
  br i1 %.not25, label %60, label %44

44:                                               ; preds = %39
  %45 = and i32 %.pre, 65536
  %46 = getelementptr inbounds i8, ptr %0, i64 4
  store i32 %45, ptr %46, align 4, !tbaa !17
  %.not26 = icmp eq i32 %45, 0
  br i1 %.not26, label %.thread, label %47

47:                                               ; preds = %44
  %48 = insertelement <2 x i32> poison, i32 %.pre, i64 0
  %49 = shufflevector <2 x i32> %48, <2 x i32> poison, <2 x i32> zeroinitializer
  %50 = and <2 x i32> %49, <i32 131072, i32 1073741824>
  %51 = getelementptr inbounds i8, ptr %0, i64 8
  store <2 x i32> %50, ptr %51, align 4, !tbaa !5
  %52 = and i32 %.pre, -2147483648
  %53 = getelementptr inbounds i8, ptr %0, i64 16
  store i32 %52, ptr %53, align 4, !tbaa !18
  %54 = and i32 %.pre, 1073872896
  %or.cond.not = icmp eq i32 %54, 1073872896
  br i1 %or.cond.not, label %55, label %.thread

55:                                               ; preds = %47
  %.not30 = icmp eq i32 %52, 0
  %.lobit = lshr exact i32 %40, 3
  %spec.select = select i1 %.not30, i32 0, i32 %.lobit
  br label %.thread

.thread:                                          ; preds = %55, %44, %47
  %56 = phi i32 [ 0, %47 ], [ 0, %44 ], [ %spec.select, %55 ]
  %57 = getelementptr inbounds i8, ptr %0, i64 20
  store i32 %56, ptr %57, align 4, !tbaa !19
  %58 = and i32 %32, 2048
  %59 = getelementptr inbounds i8, ptr %0, i64 24
  store i32 %58, ptr %59, align 4, !tbaa !20
  br label %60

60:                                               ; preds = %39, %.thread, %28
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
  ret void
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @cpuid(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i64 @xgetbv(i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare hidden void @cpuidex(i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"x86_cpu_features", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !6, i64 52, !6, i64 56}
!11 = !{!10, !6, i64 44}
!12 = !{!10, !6, i64 52}
!13 = !{!10, !6, i64 56}
!14 = !{!10, !6, i64 48}
!15 = !{!10, !6, i64 0}
!16 = !{!10, !6, i64 28}
!17 = !{!10, !6, i64 4}
!18 = !{!10, !6, i64 16}
!19 = !{!10, !6, i64 20}
!20 = !{!10, !6, i64 24}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,SLPVectorizerPass,SROAPass,SimplifyCFGPass