; LLVM IR from viveakrt/Competitive-programing :: SPOJ/qtree.ll (Z6updateiiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32 }

@tree = external dso_local global [40004 x %struct.node], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @_ZplRK4nodeS1_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #3 {
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca %struct.node, align 4
  %12 = alloca i32, align 4
  %13 = alloca %struct.node, align 4
  store i32 %0, ptr %6, align 4, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !5
  store i32 %2, ptr %8, align 4, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !5
  store i32 %4, ptr %10, align 4, !tbaa !5
  %14 = load i32, ptr %9, align 4, !tbaa !5
  %15 = load i32, ptr %6, align 4, !tbaa !5
  %16 = icmp slt i32 %14, %15
  br i1 %16, label %21, label %17

17:                                               ; preds = %5
  %18 = load i32, ptr %9, align 4, !tbaa !5
  %19 = load i32, ptr %7, align 4, !tbaa !5
  %20 = icmp sgt i32 %18, %19
  br i1 %20, label %21, label %22

21:                                               ; preds = %17, %5
  br label %65

22:                                               ; preds = %17
  %23 = load i32, ptr %6, align 4, !tbaa !5
  %24 = load i32, ptr %7, align 4, !tbaa !5
  %25 = icmp eq i32 %23, %24
  br i1 %25, label %26, label %32

26:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  %27 = getelementptr inbounds %struct.node, ptr %11, i32 0, i32 0
  %28 = load i32, ptr %10, align 4, !tbaa !5
  store i32 %28, ptr %27, align 4, !tbaa !9
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [40004 x %struct.node], ptr @tree, i64 0, i64 %30
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %31, ptr align 4 %11, i64 4, i1 false), !tbaa.struct !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  br label %65

32:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #4
  %33 = load i32, ptr %6, align 4, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = add nsw i32 %33, %34
  %36 = sdiv i32 %35, 2
  store i32 %36, ptr %12, align 4, !tbaa !5
  %37 = load i32, ptr %6, align 4, !tbaa !5
  %38 = load i32, ptr %12, align 4, !tbaa !5
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = mul nsw i32 %39, 2
  %41 = load i32, ptr %9, align 4, !tbaa !5
  %42 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %37, i32 noundef %38, i32 noundef %40, i32 noundef %41, i32 noundef %42)
  %43 = load i32, ptr %12, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  %45 = load i32, ptr %7, align 4, !tbaa !5
  %46 = load i32, ptr %8, align 4, !tbaa !5
  %47 = mul nsw i32 %46, 2
  %48 = add nsw i32 %47, 1
  %49 = load i32, ptr %9, align 4, !tbaa !5
  %50 = load i32, ptr %10, align 4, !tbaa !5
  call void @_Z6updateiiiii(i32 noundef %44, i32 noundef %45, i32 noundef %48, i32 noundef %49, i32 noundef %50)
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #4
  %51 = load i32, ptr %8, align 4, !tbaa !5
  %52 = mul nsw i32 %51, 2
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [40004 x %struct.node], ptr @tree, i64 0, i64 %53
  %55 = load i32, ptr %8, align 4, !tbaa !5
  %56 = mul nsw i32 %55, 2
  %57 = add nsw i32 %56, 1
  %58 = sext i32 %57 to i64
  %59 = getelementptr inbounds [40004 x %struct.node], ptr @tree, i64 0, i64 %58
  %60 = call i32 @_ZplRK4nodeS1_(ptr noundef nonnull align 4 dereferenceable(4) %54, ptr noundef nonnull align 4 dereferenceable(4) %59)
  %61 = getelementptr inbounds %struct.node, ptr %13, i32 0, i32 0
  store i32 %60, ptr %61, align 4
  %62 = load i32, ptr %8, align 4, !tbaa !5
  %63 = sext i32 %62 to i64
  %64 = getelementptr inbounds [40004 x %struct.node], ptr @tree, i64 0, i64 %63
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %64, ptr align 4 %13, i64 4, i1 false), !tbaa.struct !11
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #4
  br label %65

65:                                               ; preds = %32, %26, %21
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTS4node", !6, i64 0}
!11 = !{i64 0, i64 4, !5}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32 }

@tree = external dso_local global [40004 x %struct.node], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local i32 @_ZplRK4nodeS1_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateiiiii(i32 noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
  %6 = icmp slt i32 %3, %0
  %7 = icmp sgt i32 %3, %1
  %or.cond = or i1 %6, %7
  br i1 %or.cond, label %common.ret, label %8

8:                                                ; preds = %5
  %9 = icmp eq i32 %0, %1
  br i1 %9, label %common.ret.sink.split, label %12

common.ret.sink.split:                            ; preds = %8, %12
  %.sink = phi i32 [ %22, %12 ], [ %4, %8 ]
  %10 = sext i32 %2 to i64
  %11 = getelementptr inbounds [40004 x %struct.node], ptr @tree, i64 0, i64 %10
  store i32 %.sink, ptr %11, align 4, !tbaa !5
  br label %common.ret

common.ret:                                       ; preds = %common.ret.sink.split, %5
  ret void

12:                                               ; preds = %8
  %13 = add nsw i32 %1, %0
  %14 = sdiv i32 %13, 2
  %15 = shl nsw i32 %2, 1
  tail call void @_Z6updateiiiii(i32 noundef %0, i32 noundef %14, i32 noundef %15, i32 noundef %3, i32 noundef %4)
  %16 = add nsw i32 %14, 1
  %17 = or disjoint i32 %15, 1
  tail call void @_Z6updateiiiii(i32 noundef %16, i32 noundef %1, i32 noundef %17, i32 noundef %3, i32 noundef %4)
  %18 = sext i32 %15 to i64
  %19 = getelementptr inbounds [40004 x %struct.node], ptr @tree, i64 0, i64 %18
  %20 = sext i32 %17 to i64
  %21 = getelementptr inbounds [40004 x %struct.node], ptr @tree, i64 0, i64 %20
  %22 = tail call i32 @_ZplRK4nodeS1_(ptr noundef nonnull align 4 dereferenceable(4) %19, ptr noundef nonnull align 4 dereferenceable(4) %21)
  br label %common.ret.sink.split
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass