; LLVM IR from div-bargali/Data-Structures-and-Algorithms :: C++/Algorithms/Sorting-Algorithms/InversionCount (InversionsCount)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5MergeRSt6vectorIiSaIiEEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %"class.std::vector", align 8
  %13 = alloca %"class.std::vector", align 8
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #4
  store i32 0, ptr %11, align 4, !tbaa !9
  %22 = load i32, ptr %7, align 4, !tbaa !9
  %23 = load i32, ptr %6, align 4, !tbaa !9
  %24 = sub nsw i32 %22, %23
  %25 = add nsw i32 %24, 1
  store i32 %25, ptr %9, align 4, !tbaa !9
  %26 = load i32, ptr %8, align 4, !tbaa !9
  %27 = load i32, ptr %7, align 4, !tbaa !9
  %28 = sub nsw i32 %26, %27
  store i32 %28, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 24, ptr %12) #4
  call void @_ZNSt6vectorIiSaIiEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr %13) #4
  call void @_ZNSt6vectorIiSaIiEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %13) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #4
  %29 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %29, ptr %14, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %43, %4
  %31 = load i32, ptr %14, align 4, !tbaa !9
  %32 = load i32, ptr %6, align 4, !tbaa !9
  %33 = load i32, ptr %9, align 4, !tbaa !9
  %34 = add nsw i32 %32, %33
  %35 = icmp slt i32 %31, %34
  br i1 %35, label %37, label %36

36:                                               ; preds = %30
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %50

37:                                               ; preds = %30
  %38 = load ptr, ptr %5, align 8, !tbaa !5
  %39 = load i32, ptr %14, align 4, !tbaa !9
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %38, i64 noundef %40) #4
  invoke void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %12, ptr noundef nonnull align 4 dereferenceable(4) %41)
          to label %42 unwind label %46

42:                                               ; preds = %37
  br label %43

43:                                               ; preds = %42
  %44 = load i32, ptr %14, align 4, !tbaa !9
  %45 = add nsw i32 %44, 1
  store i32 %45, ptr %14, align 4, !tbaa !9
  br label %30, !llvm.loop !11

46:                                               ; preds = %37
  %47 = landingpad { ptr, i32 }
          cleanup
  %48 = extractvalue { ptr, i32 } %47, 0
  store ptr %48, ptr %15, align 8
  %49 = extractvalue { ptr, i32 } %47, 1
  store i32 %49, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #4
  br label %194

50:                                               ; preds = %36
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  %51 = load i32, ptr %7, align 4, !tbaa !9
  %52 = add nsw i32 %51, 1
  store i32 %52, ptr %17, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %67, %50
  %54 = load i32, ptr %17, align 4, !tbaa !9
  %55 = load i32, ptr %7, align 4, !tbaa !9
  %56 = add nsw i32 %55, 1
  %57 = load i32, ptr %10, align 4, !tbaa !9
  %58 = add nsw i32 %56, %57
  %59 = icmp slt i32 %54, %58
  br i1 %59, label %61, label %60

60:                                               ; preds = %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %74

61:                                               ; preds = %53
  %62 = load ptr, ptr %5, align 8, !tbaa !5
  %63 = load i32, ptr %17, align 4, !tbaa !9
  %64 = sext i32 %63 to i64
  %65 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %62, i64 noundef %64) #4
  invoke void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %13, ptr noundef nonnull align 4 dereferenceable(4) %65)
          to label %66 unwind label %70

66:                                               ; preds = %61
  br label %67

67:                                               ; preds = %66
  %68 = load i32, ptr %17, align 4, !tbaa !9
  %69 = add nsw i32 %68, 1
  store i32 %69, ptr %17, align 4, !tbaa !9
  br label %53, !llvm.loop !13

70:                                               ; preds = %61
  %71 = landingpad { ptr, i32 }
          cleanup
  %72 = extractvalue { ptr, i32 } %71, 0
  store ptr %72, ptr %15, align 8
  %73 = extractvalue { ptr, i32 } %71, 1
  store i32 %73, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  br label %194

74:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #4
  %75 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %75, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #4
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %120, %74
  %77 = load i32, ptr %20, align 4, !tbaa !9
  %78 = load i32, ptr %9, align 4, !tbaa !9
  %79 = icmp slt i32 %77, %78
  br i1 %79, label %80, label %84

80:                                               ; preds = %76
  %81 = load i32, ptr %21, align 4, !tbaa !9
  %82 = load i32, ptr %10, align 4, !tbaa !9
  %83 = icmp slt i32 %81, %82
  br label %84

84:                                               ; preds = %80, %76
  %85 = phi i1 [ false, %76 ], [ %83, %80 ]
  br i1 %85, label %86, label %123

86:                                               ; preds = %84
  %87 = load i32, ptr %20, align 4, !tbaa !9
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %88) #4
  %90 = load i32, ptr %21, align 4, !tbaa !9
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %91) #4
  %93 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %89, ptr noundef nonnull align 4 dereferenceable(4) %92)
          to label %94 unwind label %113

94:                                               ; preds = %86
  %95 = load i32, ptr %93, align 4, !tbaa !9
  %96 = load ptr, ptr %5, align 8, !tbaa !5
  %97 = load i32, ptr %19, align 4, !tbaa !9
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %96, i64 noundef %98) #4
  store i32 %95, ptr %99, align 4, !tbaa !9
  %100 = load ptr, ptr %5, align 8, !tbaa !5
  %101 = load i32, ptr %19, align 4, !tbaa !9
  %102 = sext i32 %101 to i64
  %103 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %100, i64 noundef %102) #4
  %104 = load i32, ptr %103, align 4, !tbaa !9
  %105 = load i32, ptr %20, align 4, !tbaa !9
  %106 = sext i32 %105 to i64
  %107 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %106) #4
  %108 = load i32, ptr %107, align 4, !tbaa !9
  %109 = icmp eq i32 %104, %108
  br i1 %109, label %110, label %117

110:                                              ; preds = %94
  %111 = load i32, ptr %20, align 4, !tbaa !9
  %112 = add nsw i32 %111, 1
  store i32 %112, ptr %20, align 4, !tbaa !9
  br label %120

113:                                              ; preds = %86
  %114 = landingpad { ptr, i32 }
          cleanup
  %115 = extractvalue { ptr, i32 } %114, 0
  store ptr %115, ptr %15, align 8
  %116 = extractvalue { ptr, i32 } %114, 1
  store i32 %116, ptr %16, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  br label %194

117:                                              ; preds = %94
  %118 = load i32, ptr %21, align 4, !tbaa !9
  %119 = add nsw i32 %118, 1
  store i32 %119, ptr %21, align 4, !tbaa !9
  br label %120

120:                                              ; preds = %117, %110
  %121 = load i32, ptr %19, align 4, !tbaa !9
  %122 = add nsw i32 %121, 1
  store i32 %122, ptr %19, align 4, !tbaa !9
  br label %76, !llvm.loop !14

123:                                              ; preds = %84
  br label %124

124:                                              ; preds = %128, %123
  %125 = load i32, ptr %21, align 4, !tbaa !9
  %126 = load i32, ptr %10, align 4, !tbaa !9
  %127 = icmp slt i32 %125, %126
  br i1 %127, label %128, label %141

128:                                              ; preds = %124
  %129 = load i32, ptr %21, align 4, !tbaa !9
  %130 = sext i32 %129 to i64
  %131 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %130) #4
  %132 = load i32, ptr %131, align 4, !tbaa !9
  %133 = load ptr, ptr %5, align 8, !tbaa !5
  %134 = load i32, ptr %19, align 4, !tbaa !9
  %135 = sext i32 %134 to i64
  %136 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %133, i64 noundef %135) #4
  store i32 %132, ptr %136, align 4, !tbaa !9
  %137 = load i32, ptr %21, align 4, !tbaa !9
  %138 = add nsw i32 %137, 1
  store i32 %138, ptr %21, align 4, !tbaa !9
  %139 = load i32, ptr %19, align 4, !tbaa !9
  %140 = add nsw i32 %139, 1
  store i32 %140, ptr %19, align 4, !tbaa !9
  br label %124, !llvm.loop !15

141:                                              ; preds = %124
  br label %142

142:                                              ; preds = %146, %141
  %143 = load i32, ptr %20, align 4, !tbaa !9
  %144 = load i32, ptr %9, align 4, !tbaa !9
  %145 = icmp slt i32 %143, %144
  br i1 %145, label %146, label %159

146:                                              ; preds = %142
  %147 = load i32, ptr %20, align 4, !tbaa !9
  %148 = sext i32 %147 to i64
  %149 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %148) #4
  %150 = load i32, ptr %149, align 4, !tbaa !9
  %151 = load ptr, ptr %5, align 8, !tbaa !5
  %152 = load i32, ptr %19, align 4, !tbaa !9
  %153 = sext i32 %152 to i64
  %154 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %151, i64 noundef %153) #4
  store i32 %150, ptr %154, align 4, !tbaa !9
  %155 = load i32, ptr %20, align 4, !tbaa !9
  %156 = add nsw i32 %155, 1
  store i32 %156, ptr %20, align 4, !tbaa !9
  %157 = load i32, ptr %19, align 4, !tbaa !9
  %158 = add nsw i32 %157, 1
  store i32 %158, ptr %19, align 4, !tbaa !9
  br label %142, !llvm.loop !16

159:                                              ; preds = %142
  store i32 0, ptr %20, align 4, !tbaa !9
  store i32 0, ptr %21, align 4, !tbaa !9
  br label %160

160:                                              ; preds = %191, %159
  %161 = load i32, ptr %20, align 4, !tbaa !9
  %162 = load i32, ptr %9, align 4, !tbaa !9
  %163 = icmp slt i32 %161, %162
  br i1 %163, label %164, label %168

164:                                              ; preds = %160
  %165 = load i32, ptr %21, align 4, !tbaa !9
  %166 = load i32, ptr %10, align 4, !tbaa !9
  %167 = icmp slt i32 %165, %166
  br label %168

168:                                              ; preds = %164, %160
  %169 = phi i1 [ false, %160 ], [ %167, %164 ]
  br i1 %169, label %170, label %192

170:                                              ; preds = %168
  %171 = load i32, ptr %20, align 4, !tbaa !9
  %172 = sext i32 %171 to i64
  %173 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %12, i64 noundef %172) #4
  %174 = load i32, ptr %173, align 4, !tbaa !9
  %175 = load i32, ptr %21, align 4, !tbaa !9
  %176 = sext i32 %175 to i64
  %177 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %13, i64 noundef %176) #4
  %178 = load i32, ptr %177, align 4, !tbaa !9
  %179 = icmp sgt i32 %174, %178
  br i1 %179, label %180, label %188

180:                                              ; preds = %170
  %181 = load i32, ptr %9, align 4, !tbaa !9
  %182 = load i32, ptr %20, align 4, !tbaa !9
  %183 = sub nsw i32 %181, %182
  %184 = load i32, ptr %11, align 4, !tbaa !9
  %185 = add nsw i32 %184, %183
  store i32 %185, ptr %11, align 4, !tbaa !9
  %186 = load i32, ptr %21, align 4, !tbaa !9
  %187 = add nsw i32 %186, 1
  store i32 %187, ptr %21, align 4, !tbaa !9
  br label %191

188:                                              ; preds = %170
  %189 = load i32, ptr %20, align 4, !tbaa !9
  %190 = add nsw i32 %189, 1
  store i32 %190, ptr %20, align 4, !tbaa !9
  br label %191

191:                                              ; preds = %188, %180
  br label %160, !llvm.loop !17

192:                                              ; preds = %168
  %193 = load i32, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %13) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %13) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  ret i32 %193

194:                                              ; preds = %113, %70, %46
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %13) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %13) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %12) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr %12) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #4
  br label %195

195:                                              ; preds = %194
  %196 = load ptr, ptr %15, align 8
  %197 = load i32, ptr %16, align 4
  %198 = insertvalue { ptr, i32 } poison, ptr %196, 0
  %199 = insertvalue { ptr, i32 } %198, i32 %197, 1
  resume { ptr, i32 } %199
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}
!17 = distinct !{!17, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare i32 @__gxx_personality_v0(...)

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_Z5MergeRSt6vectorIiSaIiEEiii(ptr noundef nonnull align 8 dereferenceable(24) %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #2 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"class.std::vector", align 8
  %6 = alloca %"class.std::vector", align 8
  %7 = sub nsw i32 %2, %1
  %8 = add nsw i32 %7, 1
  %9 = sub nsw i32 %3, %2
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4
  call void @_ZNSt6vectorIiSaIiEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #4
  call void @_ZNSt6vectorIiSaIiEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #4
  %10 = add i32 %2, 1
  %11 = icmp sgt i32 %10, %1
  br i1 %11, label %.lr.ph.preheader, label %.preheader80

.lr.ph.preheader:                                 ; preds = %4
  %12 = sext i32 %1 to i64
  br label %.lr.ph

.preheader80:                                     ; preds = %17, %4
  %13 = add i32 %3, 1
  %14 = sext i32 %2 to i64
  %15 = sext i32 %13 to i64
  br label %20

.lr.ph:                                           ; preds = %.lr.ph.preheader, %17
  %indvars.iv = phi i64 [ %12, %.lr.ph.preheader ], [ %indvars.iv.next, %17 ]
  %16 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv) #4
  invoke void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %5, ptr noundef nonnull align 4 dereferenceable(4) %16)
          to label %17 unwind label %18

17:                                               ; preds = %.lr.ph
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond.not = icmp eq i32 %10, %lftr.wideiv
  br i1 %exitcond.not, label %.preheader80, label %.lr.ph, !llvm.loop !5

18:                                               ; preds = %.lr.ph
  %19 = landingpad { ptr, i32 }
          cleanup
  br label %77

20:                                               ; preds = %.preheader80, %26
  %indvars.iv103 = phi i64 [ %14, %.preheader80 ], [ %indvars.iv.next104, %26 ]
  %indvars.iv.next104 = add nsw i64 %indvars.iv103, 1
  %21 = icmp slt i64 %indvars.iv.next104, %15
  br i1 %21, label %26, label %.preheader79

.preheader79:                                     ; preds = %20
  %22 = icmp sgt i32 %7, -1
  %23 = icmp sgt i32 %9, 0
  %24 = select i1 %22, i1 %23, i1 false
  br i1 %24, label %.lr.ph85.preheader, label %.preheader78

.lr.ph85.preheader:                               ; preds = %.preheader79
  %25 = sext i32 %1 to i64
  br label %.lr.ph85

26:                                               ; preds = %20
  %27 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv.next104) #4
  invoke void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24) %6, ptr noundef nonnull align 4 dereferenceable(4) %27)
          to label %20 unwind label %28, !llvm.loop !7

28:                                               ; preds = %26
  %29 = landingpad { ptr, i32 }
          cleanup
  br label %77

.preheader78.loopexit:                            ; preds = %.lr.ph85
  %30 = trunc nsw i64 %indvars.iv.next107 to i32
  br label %.preheader78

.preheader78:                                     ; preds = %.preheader78.loopexit, %.preheader79
  %.065.lcssa = phi i32 [ %1, %.preheader79 ], [ %30, %.preheader78.loopexit ]
  %.060.lcssa = phi i32 [ 0, %.preheader79 ], [ %.161, %.preheader78.loopexit ]
  %.0.lcssa = phi i32 [ 0, %.preheader79 ], [ %.1, %.preheader78.loopexit ]
  %31 = icmp slt i32 %.0.lcssa, %9
  br i1 %31, label %.lr.ph90.preheader, label %.preheader77

.lr.ph90.preheader:                               ; preds = %.preheader78
  %32 = sext i32 %.0.lcssa to i64
  %33 = sext i32 %9 to i64
  %34 = sext i32 %.065.lcssa to i64
  br label %.lr.ph90

.lr.ph85:                                         ; preds = %.lr.ph85.preheader, %.lr.ph85
  %indvars.iv106 = phi i64 [ %25, %.lr.ph85.preheader ], [ %indvars.iv.next107, %.lr.ph85 ]
  %.084 = phi i32 [ 0, %.lr.ph85.preheader ], [ %.1, %.lr.ph85 ]
  %.06083 = phi i32 [ 0, %.lr.ph85.preheader ], [ %.161, %.lr.ph85 ]
  %35 = zext nneg i32 %.06083 to i64
  %36 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %35) #4
  %37 = zext nneg i32 %.084 to i64
  %38 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %37) #4
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4) %36, ptr noundef nonnull align 4 dereferenceable(4) %38)
  %40 = load i32, ptr %39, align 4, !tbaa !8
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv106) #4
  store i32 %40, ptr %41, align 4, !tbaa !8
  %42 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv106) #4
  %43 = load i32, ptr %42, align 4, !tbaa !8
  %44 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %35) #4
  %45 = load i32, ptr %44, align 4, !tbaa !8
  %46 = icmp eq i32 %43, %45
  %47 = zext i1 %46 to i32
  %.161 = add nuw nsw i32 %.06083, %47
  %not.76 = xor i1 %46, true
  %48 = zext i1 %not.76 to i32
  %.1 = add nuw nsw i32 %.084, %48
  %indvars.iv.next107 = add nsw i64 %indvars.iv106, 1
  %49 = icmp sle i32 %.161, %7
  %50 = icmp slt i32 %.1, %9
  %51 = select i1 %49, i1 %50, i1 false
  br i1 %51, label %.lr.ph85, label %.preheader78.loopexit, !llvm.loop !12

.preheader77.loopexit:                            ; preds = %.lr.ph90
  %52 = trunc nsw i64 %indvars.iv.next112 to i32
  br label %.preheader77

.preheader77:                                     ; preds = %.preheader77.loopexit, %.preheader78
  %.166.lcssa = phi i32 [ %.065.lcssa, %.preheader78 ], [ %52, %.preheader77.loopexit ]
  %.not92 = icmp sgt i32 %.060.lcssa, %7
  br i1 %.not92, label %.preheader, label %.lr.ph95.preheader

.lr.ph95.preheader:                               ; preds = %.preheader77
  %53 = zext nneg i32 %.060.lcssa to i64
  %54 = sext i32 %.166.lcssa to i64
  %55 = sub i32 %10, %1
  %wide.trip.count = zext i32 %55 to i64
  br label %.lr.ph95

.lr.ph90:                                         ; preds = %.lr.ph90.preheader, %.lr.ph90
  %indvars.iv111 = phi i64 [ %34, %.lr.ph90.preheader ], [ %indvars.iv.next112, %.lr.ph90 ]
  %indvars.iv109 = phi i64 [ %32, %.lr.ph90.preheader ], [ %indvars.iv.next110, %.lr.ph90 ]
  %56 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %indvars.iv109) #4
  %57 = load i32, ptr %56, align 4, !tbaa !8
  %58 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv111) #4
  store i32 %57, ptr %58, align 4, !tbaa !8
  %indvars.iv.next110 = add nsw i64 %indvars.iv109, 1
  %indvars.iv.next112 = add nsw i64 %indvars.iv111, 1
  %59 = icmp slt i64 %indvars.iv.next110, %33
  br i1 %59, label %.lr.ph90, label %.preheader77.loopexit, !llvm.loop !13

.preheader:                                       ; preds = %.lr.ph95, %.preheader77
  br i1 %24, label %.lr.ph99, label %._crit_edge

.lr.ph95:                                         ; preds = %.lr.ph95.preheader, %.lr.ph95
  %indvars.iv118 = phi i64 [ %54, %.lr.ph95.preheader ], [ %indvars.iv.next119, %.lr.ph95 ]
  %indvars.iv116 = phi i64 [ %53, %.lr.ph95.preheader ], [ %indvars.iv.next117, %.lr.ph95 ]
  %60 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv116) #4
  %61 = load i32, ptr %60, align 4, !tbaa !8
  %62 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %indvars.iv118) #4
  store i32 %61, ptr %62, align 4, !tbaa !8
  %indvars.iv.next117 = add nuw nsw i64 %indvars.iv116, 1
  %indvars.iv.next119 = add nsw i64 %indvars.iv118, 1
  %exitcond123.not = icmp eq i64 %indvars.iv.next117, %wide.trip.count
  br i1 %exitcond123.not, label %.preheader, label %.lr.ph95, !llvm.loop !14

.lr.ph99:                                         ; preds = %.preheader, %.lr.ph99
  %.398 = phi i32 [ %.4, %.lr.ph99 ], [ 0, %.preheader ]
  %.36397 = phi i32 [ %.464, %.lr.ph99 ], [ 0, %.preheader ]
  %.06896 = phi i32 [ %.169, %.lr.ph99 ], [ 0, %.preheader ]
  %63 = zext nneg i32 %.36397 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %63) #4
  %65 = load i32, ptr %64, align 4, !tbaa !8
  %66 = zext nneg i32 %.398 to i64
  %67 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %6, i64 noundef %66) #4
  %68 = load i32, ptr %67, align 4, !tbaa !8
  %69 = icmp sle i32 %65, %68
  %70 = sub nsw i32 %8, %.36397
  %71 = select i1 %69, i32 0, i32 %70
  %.169 = add nsw i32 %71, %.06896
  %72 = zext i1 %69 to i32
  %.464 = add nuw nsw i32 %.36397, %72
  %not. = xor i1 %69, true
  %73 = zext i1 %not. to i32
  %.4 = add nuw nsw i32 %.398, %73
  %74 = icmp sle i32 %.464, %7
  %75 = icmp slt i32 %.4, %9
  %76 = select i1 %74, i1 %75, i1 false
  br i1 %76, label %.lr.ph99, label %._crit_edge, !llvm.loop !15

._crit_edge:                                      ; preds = %.lr.ph99, %.preheader
  %.068.lcssa = phi i32 [ 0, %.preheader ], [ %.169, %.lr.ph99 ]
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  ret i32 %.068.lcssa

77:                                               ; preds = %28, %18
  %.pn = phi { ptr, i32 } [ %19, %18 ], [ %29, %28 ]
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %6) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #4
  call void @_ZNSt6vectorIiSaIiEED2Ev(ptr noundef nonnull align 8 dereferenceable(24) %5) #4
  call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEEC2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE9push_backERKi(ptr noundef nonnull align 8 dereferenceable(24), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #2 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZSt3minIiERKT_S2_S2_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = distinct !{!12, !6}
!13 = distinct !{!13, !6}
!14 = distinct !{!14, !6}
!15 = distinct !{!15, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass