; LLVM IR from microsoft/vOW4SIKE_on_HW :: SIKE_vOW_hw-sw/murax/software/VexRiscvSocSoftware/projects/murax/hex/src (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Timer_Reg = type { i32, i32, i32 }
%struct.InterruptCtrl_Reg = type { i32, i32 }
%struct.Gpio_Reg = type { i32, i32, i32 }
%struct.Hex_Reg = type { i32, i32, i32 }
%struct.Uart_Reg = type { i32, i32, i32, i32 }

@.str = external hidden unnamed_addr constant [9 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @print_hex(ptr noundef) #0

; Function Attrs: nounwind uwtable
define dso_local void @main() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store volatile i32 1, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #2
  store volatile i32 2, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  store volatile i32 3, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %4, align 4, !tbaa !5
  call void @interruptCtrl_init(ptr noundef inttoptr (i64 4026662928 to ptr))
  call void @prescaler_init(ptr noundef inttoptr (i64 4026662912 to ptr))
  call void @timer_init(ptr noundef inttoptr (i64 4026662976 to ptr))
  store volatile i32 11999, ptr inttoptr (i64 4026662912 to ptr), align 4, !tbaa !9
  store volatile i32 999, ptr getelementptr inbounds (%struct.Timer_Reg, ptr inttoptr (i64 4026662976 to ptr), i32 0, i32 1), align 4, !tbaa !11
  store volatile i32 65538, ptr inttoptr (i64 4026662976 to ptr), align 4, !tbaa !13
  store volatile i32 15, ptr inttoptr (i64 4026662928 to ptr), align 4, !tbaa !14
  store volatile i32 1, ptr getelementptr inbounds (%struct.InterruptCtrl_Reg, ptr inttoptr (i64 4026662928 to ptr), i32 0, i32 1), align 4, !tbaa !16
  store volatile i32 255, ptr getelementptr inbounds (%struct.Gpio_Reg, ptr inttoptr (i64 4026531840 to ptr), i32 0, i32 2), align 4, !tbaa !17
  store volatile i32 0, ptr getelementptr inbounds (%struct.Gpio_Reg, ptr inttoptr (i64 4026531840 to ptr), i32 0, i32 1), align 4, !tbaa !11
  store volatile i32 255, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026728448 to ptr), i32 0, i32 2), align 4, !tbaa !17
  store volatile i32 0, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026728448 to ptr), i32 0, i32 1), align 4, !tbaa !11
  store volatile i32 255, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026793984 to ptr), i32 0, i32 2), align 4, !tbaa !17
  store volatile i32 0, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026793984 to ptr), i32 0, i32 1), align 4, !tbaa !11
  store volatile i32 2, ptr getelementptr inbounds (%struct.Uart_Reg, ptr inttoptr (i64 4026597376 to ptr), i32 0, i32 1), align 4, !tbaa !18
  store volatile i32 67, ptr inttoptr (i64 4026597376 to ptr), align 4, !tbaa !20
  call void @print_hex(ptr noundef @.str)
  br label %6

6:                                                ; preds = %46, %0
  br label %7

7:                                                ; preds = %6
  %8 = load volatile i32, ptr %1, align 4, !tbaa !5
  %9 = load i32, ptr %4, align 4, !tbaa !5
  %10 = add i32 %9, %8
  store i32 %10, ptr %4, align 4, !tbaa !5
  %11 = load volatile i32, ptr %2, align 4, !tbaa !5
  %12 = load volatile i32, ptr %3, align 4, !tbaa !5
  %13 = add i32 %11, %12
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = add i32 %14, %13
  store i32 %15, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %16

16:                                               ; preds = %21, %7
  %17 = load i32, ptr %5, align 4, !tbaa !5
  %18 = icmp ult i32 %17, 50000
  br i1 %18, label %20, label %19

19:                                               ; preds = %16
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  br label %24

20:                                               ; preds = %16
  call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !21
  br label %21

21:                                               ; preds = %20
  %22 = load i32, ptr %5, align 4, !tbaa !5
  %23 = add i32 %22, 1
  store i32 %23, ptr %5, align 4, !tbaa !5
  br label %16, !llvm.loop !22

24:                                               ; preds = %19
  %25 = load volatile i32, ptr getelementptr inbounds (%struct.Gpio_Reg, ptr inttoptr (i64 4026531840 to ptr), i32 0, i32 1), align 4, !tbaa !11
  %26 = and i32 %25, -64
  %27 = load volatile i32, ptr getelementptr inbounds (%struct.Gpio_Reg, ptr inttoptr (i64 4026531840 to ptr), i32 0, i32 1), align 4, !tbaa !11
  %28 = add i32 %27, 1
  %29 = and i32 %28, 63
  %30 = or i32 %26, %29
  store volatile i32 %30, ptr getelementptr inbounds (%struct.Gpio_Reg, ptr inttoptr (i64 4026531840 to ptr), i32 0, i32 1), align 4, !tbaa !11
  %31 = load volatile i32, ptr inttoptr (i64 4026531840 to ptr), align 4, !tbaa !13
  %32 = and i32 %31, 1
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %38

34:                                               ; preds = %24
  %35 = load volatile i32, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026728448 to ptr), i32 0, i32 1), align 4, !tbaa !11
  %36 = add i32 %35, 7
  %37 = and i32 %36, -1
  store volatile i32 %37, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026728448 to ptr), i32 0, i32 1), align 4, !tbaa !11
  br label %38

38:                                               ; preds = %34, %24
  %39 = load volatile i32, ptr inttoptr (i64 4026531840 to ptr), align 4, !tbaa !13
  %40 = and i32 %39, 1
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %46

42:                                               ; preds = %38
  %43 = load volatile i32, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026793984 to ptr), i32 0, i32 1), align 4, !tbaa !11
  %44 = add i32 %43, 1
  %45 = and i32 %44, -1
  store volatile i32 %45, ptr getelementptr inbounds (%struct.Hex_Reg, ptr inttoptr (i64 4026793984 to ptr), i32 0, i32 1), align 4, !tbaa !11
  br label %46

46:                                               ; preds = %42, %38
  br label %6
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nounwind uwtable
declare hidden void @interruptCtrl_init(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @prescaler_init(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden void @timer_init(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0}
!11 = !{!12, !6, i64 4}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!12, !6, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"", !6, i64 0, !6, i64 4}
!16 = !{!15, !6, i64 4}
!17 = !{!12, !6, i64 8}
!18 = !{!19, !6, i64 4}
!19 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!20 = !{!19, !6, i64 0}
!21 = !{i64 957}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [9 x i8], align 1

; Function Attrs: nounwind uwtable
declare dso_local void @print_hex(ptr noundef) local_unnamed_addr #0

; Function Attrs: noreturn nounwind uwtable
define dso_local void @main() local_unnamed_addr #1 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1)
  store volatile i32 1, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)
  store volatile i32 2, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3)
  store volatile i32 3, ptr %3, align 4, !tbaa !5
  tail call void @interruptCtrl_init(ptr noundef nonnull inttoptr (i64 4026662928 to ptr))
  tail call void @prescaler_init(ptr noundef nonnull inttoptr (i64 4026662912 to ptr))
  tail call void @timer_init(ptr noundef nonnull inttoptr (i64 4026662976 to ptr))
  store volatile i32 11999, ptr inttoptr (i64 4026662912 to ptr), align 131072, !tbaa !9
  store volatile i32 999, ptr inttoptr (i64 4026662980 to ptr), align 4, !tbaa !11
  store volatile i32 65538, ptr inttoptr (i64 4026662976 to ptr), align 64, !tbaa !13
  store volatile i32 15, ptr inttoptr (i64 4026662928 to ptr), align 16, !tbaa !14
  store volatile i32 1, ptr inttoptr (i64 4026662932 to ptr), align 4, !tbaa !16
  store volatile i32 255, ptr inttoptr (i64 4026531848 to ptr), align 8, !tbaa !17
  store volatile i32 0, ptr inttoptr (i64 4026531844 to ptr), align 4, !tbaa !11
  store volatile i32 255, ptr inttoptr (i64 4026728456 to ptr), align 8, !tbaa !17
  store volatile i32 0, ptr inttoptr (i64 4026728452 to ptr), align 4, !tbaa !11
  store volatile i32 255, ptr inttoptr (i64 4026793992 to ptr), align 8, !tbaa !17
  store volatile i32 0, ptr inttoptr (i64 4026793988 to ptr), align 4, !tbaa !11
  store volatile i32 2, ptr inttoptr (i64 4026597380 to ptr), align 4, !tbaa !18
  store volatile i32 67, ptr inttoptr (i64 4026597376 to ptr), align 65536, !tbaa !20
  tail call void @print_hex(ptr noundef nonnull @.str)
  br label %4

4:                                                ; preds = %.backedge, %0
  %.0..0..0..0.5 = load volatile i32, ptr %1, align 4, !tbaa !5
  %.0..0..0..0.4 = load volatile i32, ptr %2, align 4, !tbaa !5
  %.0..0..0..0. = load volatile i32, ptr %3, align 4, !tbaa !5
  br label %14

5:                                                ; preds = %14
  %6 = load volatile i32, ptr inttoptr (i64 4026531844 to ptr), align 4, !tbaa !11
  %7 = and i32 %6, -64
  %8 = load volatile i32, ptr inttoptr (i64 4026531844 to ptr), align 4, !tbaa !11
  %9 = add i32 %8, 1
  %10 = and i32 %9, 63
  %11 = or disjoint i32 %10, %7
  store volatile i32 %11, ptr inttoptr (i64 4026531844 to ptr), align 4, !tbaa !11
  %12 = load volatile i32, ptr inttoptr (i64 4026531840 to ptr), align 268435456, !tbaa !13
  %13 = and i32 %12, 1
  %.not = icmp eq i32 %13, 0
  br i1 %.not, label %19, label %16

14:                                               ; preds = %4, %14
  %.08 = phi i32 [ 0, %4 ], [ %15, %14 ]
  tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() #3, !srcloc !21
  %15 = add nuw nsw i32 %.08, 1
  %exitcond.not = icmp eq i32 %15, 50000
  br i1 %exitcond.not, label %5, label %14, !llvm.loop !22

16:                                               ; preds = %5
  %17 = load volatile i32, ptr inttoptr (i64 4026728452 to ptr), align 4, !tbaa !11
  %18 = add i32 %17, 7
  store volatile i32 %18, ptr inttoptr (i64 4026728452 to ptr), align 4, !tbaa !11
  br label %19

19:                                               ; preds = %16, %5
  %20 = load volatile i32, ptr inttoptr (i64 4026531840 to ptr), align 268435456, !tbaa !13
  %21 = and i32 %20, 1
  %.not7 = icmp eq i32 %21, 0
  br i1 %.not7, label %.backedge, label %22

22:                                               ; preds = %19
  %23 = load volatile i32, ptr inttoptr (i64 4026793988 to ptr), align 4, !tbaa !11
  %24 = add i32 %23, 1
  store volatile i32 %24, ptr inttoptr (i64 4026793988 to ptr), align 4, !tbaa !11
  br label %.backedge

.backedge:                                        ; preds = %22, %19
  br label %4
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nounwind uwtable
declare hidden void @interruptCtrl_init(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @prescaler_init(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden void @timer_init(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0}
!11 = !{!12, !6, i64 4}
!12 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!12, !6, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"", !6, i64 0, !6, i64 4}
!16 = !{!15, !6, i64 4}
!17 = !{!12, !6, i64 8}
!18 = !{!19, !6, i64 4}
!19 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!20 = !{!19, !6, i64 0}
!21 = !{i64 957}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass