; LLVM IR from PetoiCamp/OpenCatEsp32 :: src/icm42670 (inv_imu_driver)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.inv_imu_sensor_event_t = type { i32, i16, [3 x i16], [3 x i16], i16, [3 x i8], [3 x i8] }
%struct.inv_imu_device = type { %struct.inv_imu_transport, ptr, [4128 x i8], i8, i8, i8, i32, i64, i64 }
%struct.inv_imu_transport = type { %struct.inv_imu_serif, %struct.register_cache, i8 }
%struct.inv_imu_serif = type { ptr, ptr, ptr, i32, i32, i32 }
%struct.register_cache = type { i8, i8, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_reset_fifo(ptr noundef) #2

declare i32 @inv_imu_switch_on_mclk(ptr noundef) #1

declare i32 @inv_imu_switch_off_mclk(ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_get_frame_count(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_decode_fifo_frame(ptr noundef, ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_get_data_from_fifo(ptr noundef %0) #2 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca i16, align 2
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i32, align 4
  %10 = alloca i16, align 2
  %11 = alloca %struct.inv_imu_sensor_event_t, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  store i16 0, ptr %6, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #3
  %12 = load ptr, ptr %3, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.inv_imu_device, ptr %12, i32 0, i32 5
  %14 = load i8, ptr %13, align 2, !tbaa !13
  %15 = zext i8 %14 to i32
  %16 = icmp ne i32 %15, 0
  %17 = zext i1 %16 to i64
  %18 = select i1 %16, i32 20, i32 16
  %19 = trunc i32 %18 to i16
  store i16 %19, ptr %7, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #3
  store i16 0, ptr %8, align 2, !tbaa !11
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = call i32 @inv_imu_read_reg(ptr noundef %20, i32 noundef 65594, i32 noundef 1, ptr noundef %5)
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = or i32 %22, %21
  store i32 %23, ptr %4, align 4, !tbaa !9
  %24 = load i8, ptr %5, align 1, !tbaa !19
  %25 = zext i8 %24 to i32
  %26 = and i32 %25, 4
  %27 = icmp ne i32 %26, 0
  br i1 %27, label %34, label %28

28:                                               ; preds = %1
  %29 = load i8, ptr %5, align 1, !tbaa !19
  %30 = zext i8 %29 to i32
  %31 = and i32 %30, 2
  %32 = icmp ne i32 %31, 0
  br i1 %32, label %34, label %33

33:                                               ; preds = %28
  store i32 0, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %142

34:                                               ; preds = %28, %1
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = call i32 @inv_imu_switch_on_mclk(ptr noundef %35)
  %37 = load i32, ptr %4, align 4, !tbaa !9
  %38 = or i32 %37, %36
  store i32 %38, ptr %4, align 4, !tbaa !9
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = call i32 @inv_imu_get_frame_count(ptr noundef %39, ptr noundef %6)
  %41 = load i32, ptr %4, align 4, !tbaa !9
  %42 = or i32 %41, %40
  store i32 %42, ptr %4, align 4, !tbaa !9
  %43 = load i32, ptr %4, align 4, !tbaa !9
  %44 = icmp ne i32 %43, 0
  br i1 %44, label %45, label %51

45:                                               ; preds = %34
  %46 = load ptr, ptr %3, align 8, !tbaa !5
  %47 = call i32 @inv_imu_switch_off_mclk(ptr noundef %46)
  %48 = load i32, ptr %4, align 4, !tbaa !9
  %49 = or i32 %48, %47
  store i32 %49, ptr %4, align 4, !tbaa !9
  %50 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %50, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %142

51:                                               ; preds = %34
  %52 = load ptr, ptr %3, align 8, !tbaa !5
  %53 = load i16, ptr %7, align 2, !tbaa !11
  %54 = zext i16 %53 to i32
  %55 = load i16, ptr %6, align 2, !tbaa !11
  %56 = zext i16 %55 to i32
  %57 = mul nsw i32 %54, %56
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.inv_imu_device, ptr %58, i32 0, i32 2
  %60 = getelementptr inbounds [4128 x i8], ptr %59, i64 0, i64 0
  %61 = call i32 @inv_imu_read_reg(ptr noundef %52, i32 noundef 65599, i32 noundef %57, ptr noundef %60)
  %62 = load i32, ptr %4, align 4, !tbaa !9
  %63 = or i32 %62, %61
  store i32 %63, ptr %4, align 4, !tbaa !9
  %64 = load i32, ptr %4, align 4, !tbaa !9
  %65 = icmp ne i32 %64, 0
  br i1 %65, label %66, label %76

66:                                               ; preds = %51
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = call i32 @inv_imu_reset_fifo(ptr noundef %67)
  %69 = load i32, ptr %4, align 4, !tbaa !9
  %70 = or i32 %69, %68
  store i32 %70, ptr %4, align 4, !tbaa !9
  %71 = load ptr, ptr %3, align 8, !tbaa !5
  %72 = call i32 @inv_imu_switch_off_mclk(ptr noundef %71)
  %73 = load i32, ptr %4, align 4, !tbaa !9
  %74 = or i32 %73, %72
  store i32 %74, ptr %4, align 4, !tbaa !9
  %75 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %75, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %142

76:                                               ; preds = %51
  call void @llvm.lifetime.start.p0(i64 2, ptr %10) #3
  store i16 0, ptr %10, align 2, !tbaa !11
  br label %77

77:                                               ; preds = %125, %76
  %78 = load i16, ptr %10, align 2, !tbaa !11
  %79 = zext i16 %78 to i32
  %80 = load i16, ptr %6, align 2, !tbaa !11
  %81 = zext i16 %80 to i32
  %82 = icmp slt i32 %79, %81
  br i1 %82, label %84, label %83

83:                                               ; preds = %77
  store i32 2, ptr %9, align 4
  br label %128

84:                                               ; preds = %77
  call void @llvm.lifetime.start.p0(i64 28, ptr %11) #3
  %85 = load ptr, ptr %3, align 8, !tbaa !5
  %86 = load ptr, ptr %3, align 8, !tbaa !5
  %87 = getelementptr inbounds %struct.inv_imu_device, ptr %86, i32 0, i32 2
  %88 = load i16, ptr %8, align 2, !tbaa !11
  %89 = zext i16 %88 to i64
  %90 = getelementptr inbounds [4128 x i8], ptr %87, i64 0, i64 %89
  %91 = call i32 @inv_imu_decode_fifo_frame(ptr noundef %85, ptr noundef %90, ptr noundef %11)
  %92 = load i32, ptr %4, align 4, !tbaa !9
  %93 = or i32 %92, %91
  store i32 %93, ptr %4, align 4, !tbaa !9
  %94 = load i16, ptr %7, align 2, !tbaa !11
  %95 = zext i16 %94 to i32
  %96 = load i16, ptr %8, align 2, !tbaa !11
  %97 = zext i16 %96 to i32
  %98 = add nsw i32 %97, %95
  %99 = trunc i32 %98 to i16
  store i16 %99, ptr %8, align 2, !tbaa !11
  %100 = load i32, ptr %4, align 4, !tbaa !9
  %101 = icmp ne i32 %100, 0
  br i1 %101, label %102, label %112

102:                                              ; preds = %84
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  %104 = call i32 @inv_imu_reset_fifo(ptr noundef %103)
  %105 = load i32, ptr %4, align 4, !tbaa !9
  %106 = or i32 %105, %104
  store i32 %106, ptr %4, align 4, !tbaa !9
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  %108 = call i32 @inv_imu_switch_off_mclk(ptr noundef %107)
  %109 = load i32, ptr %4, align 4, !tbaa !9
  %110 = or i32 %109, %108
  store i32 %110, ptr %4, align 4, !tbaa !9
  %111 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %111, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %122

112:                                              ; preds = %84
  %113 = load ptr, ptr %3, align 8, !tbaa !5
  %114 = getelementptr inbounds %struct.inv_imu_device, ptr %113, i32 0, i32 1
  %115 = load ptr, ptr %114, align 8, !tbaa !20
  %116 = icmp ne ptr %115, null
  br i1 %116, label %117, label %121

117:                                              ; preds = %112
  %118 = load ptr, ptr %3, align 8, !tbaa !5
  %119 = getelementptr inbounds %struct.inv_imu_device, ptr %118, i32 0, i32 1
  %120 = load ptr, ptr %119, align 8, !tbaa !20
  call void %120(ptr noundef %11)
  br label %121

121:                                              ; preds = %117, %112
  store i32 0, ptr %9, align 4
  br label %122

122:                                              ; preds = %121, %102
  call void @llvm.lifetime.end.p0(i64 28, ptr %11) #3
  %123 = load i32, ptr %9, align 4
  switch i32 %123, label %128 [
    i32 0, label %124
  ]

124:                                              ; preds = %122
  br label %125

125:                                              ; preds = %124
  %126 = load i16, ptr %10, align 2, !tbaa !11
  %127 = add i16 %126, 1
  store i16 %127, ptr %10, align 2, !tbaa !11
  br label %77, !llvm.loop !21

128:                                              ; preds = %122, %83
  call void @llvm.lifetime.end.p0(i64 2, ptr %10) #3
  %129 = load i32, ptr %9, align 4
  switch i32 %129, label %142 [
    i32 2, label %130
  ]

130:                                              ; preds = %128
  %131 = load ptr, ptr %3, align 8, !tbaa !5
  %132 = call i32 @inv_imu_switch_off_mclk(ptr noundef %131)
  %133 = load i32, ptr %4, align 4, !tbaa !9
  %134 = or i32 %133, %132
  store i32 %134, ptr %4, align 4, !tbaa !9
  %135 = load i32, ptr %4, align 4, !tbaa !9
  %136 = icmp slt i32 %135, 0
  br i1 %136, label %137, label %139

137:                                              ; preds = %130
  %138 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %138, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %142

139:                                              ; preds = %130
  %140 = load i16, ptr %6, align 2, !tbaa !11
  %141 = zext i16 %140 to i32
  store i32 %141, ptr %2, align 4
  store i32 1, ptr %9, align 4
  br label %142

142:                                              ; preds = %139, %137, %128, %66, %45, %33
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %143 = load i32, ptr %2, align 4
  ret i32 %143
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !7, i64 4186}
!14 = !{!"inv_imu_device", !15, i64 0, !6, i64 48, !7, i64 56, !7, i64 4184, !7, i64 4185, !7, i64 4186, !10, i64 4188, !18, i64 4192, !18, i64 4200}
!15 = !{!"inv_imu_transport", !16, i64 0, !17, i64 40, !7, i64 44}
!16 = !{!"inv_imu_serif", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !10, i64 32}
!17 = !{!"register_cache", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!18 = !{!"long", !7, i64 0}
!19 = !{!7, !7, i64 0}
!20 = !{!14, !6, i64 48}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.inv_imu_sensor_event_t = type { i32, i16, [3 x i16], [3 x i16], i16, [3 x i8], [3 x i8] }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_reset_fifo(ptr noundef) local_unnamed_addr #2

declare i32 @inv_imu_switch_on_mclk(ptr noundef) local_unnamed_addr #1

declare i32 @inv_imu_switch_off_mclk(ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_get_frame_count(ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_decode_fifo_frame(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_get_data_from_fifo(ptr noundef %0) local_unnamed_addr #2 {
  %2 = alloca i8, align 1
  %3 = alloca i16, align 2
  %4 = alloca %struct.inv_imu_sensor_event_t, align 4
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2) #3
  call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %3) #3
  store i16 0, ptr %3, align 2, !tbaa !5
  %5 = getelementptr inbounds i8, ptr %0, i64 4186
  %6 = load i8, ptr %5, align 2, !tbaa !9
  %.not = icmp eq i8 %6, 0
  %7 = call i32 @inv_imu_read_reg(ptr noundef %0, i32 noundef 65594, i32 noundef 1, ptr noundef nonnull %2) #3
  %8 = load i8, ptr %2, align 1, !tbaa !17
  %9 = and i8 %8, 6
  %or.cond = icmp eq i8 %9, 0
  br i1 %or.cond, label %53, label %10

10:                                               ; preds = %1
  %11 = call i32 @inv_imu_switch_on_mclk(ptr noundef nonnull %0) #3
  %12 = or i32 %11, %7
  %13 = call i32 @inv_imu_get_frame_count(ptr noundef nonnull %0, ptr noundef nonnull %3)
  %14 = or i32 %12, %13
  %.not61 = icmp eq i32 %14, 0
  br i1 %.not61, label %18, label %15

15:                                               ; preds = %10
  %16 = call i32 @inv_imu_switch_off_mclk(ptr noundef nonnull %0) #3
  %17 = or i32 %16, %14
  br label %53

18:                                               ; preds = %10
  %19 = select i1 %.not, i32 16, i32 20
  %20 = load i16, ptr %3, align 2, !tbaa !5
  %21 = zext i16 %20 to i32
  %22 = mul nuw nsw i32 %19, %21
  %23 = getelementptr inbounds i8, ptr %0, i64 56
  %24 = call i32 @inv_imu_read_reg(ptr noundef nonnull %0, i32 noundef 65599, i32 noundef %22, ptr noundef nonnull %23) #3
  %.not62 = icmp eq i32 %24, 0
  br i1 %.not62, label %.preheader, label %28

.preheader:                                       ; preds = %18
  %25 = load i16, ptr %3, align 2, !tbaa !5
  %.not6573.not = icmp eq i16 %25, 0
  br i1 %.not6573.not, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.preheader
  %26 = trunc nuw nsw i32 %19 to i16
  %27 = getelementptr inbounds i8, ptr %0, i64 48
  br label %33

28:                                               ; preds = %18
  %29 = call i32 @inv_imu_reset_fifo(ptr noundef nonnull %0)
  %30 = call i32 @inv_imu_switch_off_mclk(ptr noundef nonnull %0) #3
  %31 = or i32 %29, %30
  %32 = or i32 %31, %24
  br label %53

33:                                               ; preds = %.lr.ph, %45
  %.075 = phi i16 [ 0, %.lr.ph ], [ %46, %45 ]
  %.04574 = phi i16 [ 0, %.lr.ph ], [ %37, %45 ]
  call void @llvm.lifetime.start.p0(i64 28, ptr nonnull %4) #3
  %34 = zext i16 %.04574 to i64
  %35 = getelementptr inbounds [4128 x i8], ptr %23, i64 0, i64 %34
  %36 = call i32 @inv_imu_decode_fifo_frame(ptr noundef nonnull %0, ptr noundef nonnull %35, ptr noundef nonnull %4)
  %37 = add i16 %.04574, %26
  %.not63 = icmp eq i32 %36, 0
  br i1 %.not63, label %38, label %.thread70

38:                                               ; preds = %33
  %39 = load ptr, ptr %27, align 8, !tbaa !18
  %.not64 = icmp eq ptr %39, null
  br i1 %.not64, label %45, label %40

40:                                               ; preds = %38
  call void %39(ptr noundef nonnull %4) #3
  br label %45

.thread70:                                        ; preds = %33
  %41 = call i32 @inv_imu_reset_fifo(ptr noundef nonnull %0)
  %42 = call i32 @inv_imu_switch_off_mclk(ptr noundef nonnull %0) #3
  %43 = or i32 %41, %42
  %44 = or i32 %43, %36
  call void @llvm.lifetime.end.p0(i64 28, ptr nonnull %4) #3
  br label %53

45:                                               ; preds = %38, %40
  call void @llvm.lifetime.end.p0(i64 28, ptr nonnull %4) #3
  %46 = add nuw i16 %.075, 1
  %47 = load i16, ptr %3, align 2, !tbaa !5
  %.not65 = icmp ult i16 %46, %47
  br i1 %.not65, label %33, label %._crit_edge, !llvm.loop !19

._crit_edge:                                      ; preds = %45, %.preheader
  %48 = call i32 @inv_imu_switch_off_mclk(ptr noundef nonnull %0) #3
  %49 = icmp slt i32 %48, 0
  br i1 %49, label %53, label %50

50:                                               ; preds = %._crit_edge
  %51 = load i16, ptr %3, align 2, !tbaa !5
  %52 = zext i16 %51 to i32
  br label %53

53:                                               ; preds = %.thread70, %._crit_edge, %1, %50, %28, %15
  %.3 = phi i32 [ %17, %15 ], [ %32, %28 ], [ %52, %50 ], [ 0, %1 ], [ %48, %._crit_edge ], [ %44, %.thread70 ]
  call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %3) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2) #3
  ret i32 %.3
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"short", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !7, i64 4186}
!10 = !{!"inv_imu_device", !11, i64 0, !13, i64 48, !7, i64 56, !7, i64 4184, !7, i64 4185, !7, i64 4186, !14, i64 4188, !16, i64 4192, !16, i64 4200}
!11 = !{!"inv_imu_transport", !12, i64 0, !15, i64 40, !7, i64 44}
!12 = !{!"inv_imu_serif", !13, i64 0, !13, i64 8, !13, i64 16, !14, i64 24, !14, i64 28, !14, i64 32}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"register_cache", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!16 = !{!"long", !7, i64 0}
!17 = !{!7, !7, i64 0}
!18 = !{!10, !13, i64 48}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass