; LLVM IR from ESPboy-edu/ESPboy_tinyphysicsengine :: programs (hello)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TPE_Vec3 = type { i32, i32, i32 }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nounwind uwtable
define dso_local { i64, i32 } @TPE_vec3Plus(i64 %0, i32 %1, i64 %2, i32 %3) #1 {
  %5 = alloca %struct.TPE_Vec3, align 4
  %6 = alloca %struct.TPE_Vec3, align 4
  %7 = alloca { i64, i32 }, align 4
  %8 = alloca %struct.TPE_Vec3, align 4
  %9 = alloca { i64, i32 }, align 4
  %10 = alloca { i64, i32 }, align 8
  %11 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 0
  store i64 %0, ptr %11, align 4
  %12 = getelementptr inbounds { i64, i32 }, ptr %7, i32 0, i32 1
  store i32 %1, ptr %12, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %6, ptr align 4 %7, i64 12, i1 false)
  %13 = getelementptr inbounds { i64, i32 }, ptr %9, i32 0, i32 0
  store i64 %2, ptr %13, align 4
  %14 = getelementptr inbounds { i64, i32 }, ptr %9, i32 0, i32 1
  store i32 %3, ptr %14, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 4 %9, i64 12, i1 false)
  %15 = getelementptr inbounds %struct.TPE_Vec3, ptr %8, i32 0, i32 0
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %17 = getelementptr inbounds %struct.TPE_Vec3, ptr %6, i32 0, i32 0
  %18 = load i32, ptr %17, align 4, !tbaa !5
  %19 = add nsw i32 %18, %16
  store i32 %19, ptr %17, align 4, !tbaa !5
  %20 = getelementptr inbounds %struct.TPE_Vec3, ptr %8, i32 0, i32 1
  %21 = load i32, ptr %20, align 4, !tbaa !10
  %22 = getelementptr inbounds %struct.TPE_Vec3, ptr %6, i32 0, i32 1
  %23 = load i32, ptr %22, align 4, !tbaa !10
  %24 = add nsw i32 %23, %21
  store i32 %24, ptr %22, align 4, !tbaa !10
  %25 = getelementptr inbounds %struct.TPE_Vec3, ptr %8, i32 0, i32 2
  %26 = load i32, ptr %25, align 4, !tbaa !11
  %27 = getelementptr inbounds %struct.TPE_Vec3, ptr %6, i32 0, i32 2
  %28 = load i32, ptr %27, align 4, !tbaa !11
  %29 = add nsw i32 %28, %26
  store i32 %29, ptr %27, align 4, !tbaa !11
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 %6, i64 12, i1 false), !tbaa.struct !12
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %10, ptr align 4 %5, i64 12, i1 false)
  %30 = load { i64, i32 }, ptr %10, align 8
  ret { i64, i32 } %30
}

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 8}
!12 = !{i64 0, i64 4, !13, i64 4, i64 4, !13, i64 8, i64 4, !13}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local { i64, i32 } @TPE_vec3Plus(i64 %0, i32 %1, i64 %2, i32 %3) local_unnamed_addr #0 {
  %.sroa.07.sroa.4.0.extract.shift = and i64 %0, -4294967296
  %5 = add i64 %2, %0
  %6 = add nsw i32 %3, %1
  %.sroa.24.0.extract.shift11 = add i64 %.sroa.07.sroa.4.0.extract.shift, %2
  %.sroa.07.sroa.4.0.insert.ext = and i64 %.sroa.24.0.extract.shift11, -4294967296
  %.sroa.07.sroa.0.0.insert.ext = and i64 %5, 4294967295
  %.sroa.07.sroa.0.0.insert.insert = or disjoint i64 %.sroa.07.sroa.4.0.insert.ext, %.sroa.07.sroa.0.0.insert.ext
  %.fca.0.insert = insertvalue { i64, i32 } poison, i64 %.sroa.07.sroa.0.0.insert.insert, 0
  %.fca.1.insert = insertvalue { i64, i32 } %.fca.0.insert, i32 %6, 1
  ret { i64, i32 } %.fca.1.insert
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass