; LLVM IR from square/subzero :: core/trezor-crypto (nem)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.nem_transaction_ctx = type { [32 x i8], ptr, i64, i64 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @keccak_256(ptr noundef, i64 noundef, ptr noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_get_address(ptr noundef, i8 noundef zeroext, ptr noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_transaction_write_common(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u32(ptr noundef, i32 noundef) #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_tagged(ptr noundef, ptr noundef, i32 noundef) #3

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @nem_transaction_create_multisig_signature(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5, ptr noundef %6) #2 {
  %8 = alloca i1, align 1
  %9 = alloca ptr, align 8
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  %12 = alloca ptr, align 8
  %13 = alloca i64, align 8
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca i8, align 1
  %17 = alloca i32, align 4
  %18 = alloca [41 x i8], align 16
  %19 = alloca [32 x i8], align 16
  store ptr %0, ptr %9, align 8, !tbaa !5
  store i8 %1, ptr %10, align 1, !tbaa !9
  store i32 %2, ptr %11, align 4, !tbaa !10
  store ptr %3, ptr %12, align 8, !tbaa !5
  store i64 %4, ptr %13, align 8, !tbaa !12
  store i32 %5, ptr %14, align 4, !tbaa !10
  store ptr %6, ptr %15, align 8, !tbaa !5
  %20 = load ptr, ptr %12, align 8, !tbaa !5
  %21 = icmp ne ptr %20, null
  br i1 %21, label %26, label %22

22:                                               ; preds = %7
  %23 = load ptr, ptr %9, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.nem_transaction_ctx, ptr %23, i32 0, i32 0
  %25 = getelementptr inbounds [32 x i8], ptr %24, i64 0, i64 0
  store ptr %25, ptr %12, align 8, !tbaa !5
  br label %26

26:                                               ; preds = %22, %7
  call void @llvm.lifetime.start.p0(i64 1, ptr %16) #4
  %27 = load ptr, ptr %9, align 8, !tbaa !5
  %28 = load i8, ptr %10, align 1, !tbaa !9
  %29 = zext i8 %28 to i32
  %30 = shl i32 %29, 24
  %31 = or i32 %30, 1
  %32 = load i32, ptr %11, align 4, !tbaa !10
  %33 = load ptr, ptr %12, align 8, !tbaa !5
  %34 = load i64, ptr %13, align 8, !tbaa !12
  %35 = load i32, ptr %14, align 4, !tbaa !10
  %36 = call zeroext i1 @nem_transaction_write_common(ptr noundef %27, i32 noundef 4098, i32 noundef %31, i32 noundef %32, ptr noundef %33, i64 noundef %34, i32 noundef %35)
  %37 = zext i1 %36 to i8
  store i8 %37, ptr %16, align 1, !tbaa !14
  %38 = load i8, ptr %16, align 1, !tbaa !14, !range !16, !noundef !17
  %39 = trunc i8 %38 to i1
  br i1 %39, label %41, label %40

40:                                               ; preds = %26
  store i1 false, ptr %8, align 1
  store i32 1, ptr %17, align 4
  br label %79

41:                                               ; preds = %26
  call void @llvm.lifetime.start.p0(i64 41, ptr %18) #4
  %42 = load ptr, ptr %15, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.nem_transaction_ctx, ptr %42, i32 0, i32 0
  %44 = getelementptr inbounds [32 x i8], ptr %43, i64 0, i64 0
  %45 = load i8, ptr %10, align 1, !tbaa !9
  %46 = getelementptr inbounds [41 x i8], ptr %18, i64 0, i64 0
  %47 = call zeroext i1 @nem_get_address(ptr noundef %44, i8 noundef zeroext %45, ptr noundef %46)
  call void @llvm.lifetime.start.p0(i64 32, ptr %19) #4
  %48 = load ptr, ptr %15, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.nem_transaction_ctx, ptr %48, i32 0, i32 1
  %50 = load ptr, ptr %49, align 8, !tbaa !18
  %51 = load ptr, ptr %15, align 8, !tbaa !5
  %52 = getelementptr inbounds %struct.nem_transaction_ctx, ptr %51, i32 0, i32 2
  %53 = load i64, ptr %52, align 8, !tbaa !20
  %54 = getelementptr inbounds [32 x i8], ptr %19, i64 0, i64 0
  call void @keccak_256(ptr noundef %50, i64 noundef %53, ptr noundef %54)
  br label %55

55:                                               ; preds = %41
  %56 = load ptr, ptr %9, align 8, !tbaa !5
  %57 = call zeroext i1 @nem_write_u32(ptr noundef %56, i32 noundef 36)
  br i1 %57, label %59, label %58

58:                                               ; preds = %55
  store i1 false, ptr %8, align 1
  store i32 1, ptr %17, align 4
  br label %78

59:                                               ; preds = %55
  br label %60

60:                                               ; preds = %59
  br label %61

61:                                               ; preds = %60
  br label %62

62:                                               ; preds = %61
  %63 = load ptr, ptr %9, align 8, !tbaa !5
  %64 = getelementptr inbounds [32 x i8], ptr %19, i64 0, i64 0
  %65 = call zeroext i1 @nem_write_tagged(ptr noundef %63, ptr noundef %64, i32 noundef 32)
  br i1 %65, label %67, label %66

66:                                               ; preds = %62
  store i1 false, ptr %8, align 1
  store i32 1, ptr %17, align 4
  br label %78

67:                                               ; preds = %62
  br label %68

68:                                               ; preds = %67
  br label %69

69:                                               ; preds = %68
  br label %70

70:                                               ; preds = %69
  %71 = load ptr, ptr %9, align 8, !tbaa !5
  %72 = getelementptr inbounds [41 x i8], ptr %18, i64 0, i64 0
  %73 = call zeroext i1 @nem_write_tagged(ptr noundef %71, ptr noundef %72, i32 noundef 40)
  br i1 %73, label %75, label %74

74:                                               ; preds = %70
  store i1 false, ptr %8, align 1
  store i32 1, ptr %17, align 4
  br label %78

75:                                               ; preds = %70
  br label %76

76:                                               ; preds = %75
  br label %77

77:                                               ; preds = %76
  store i1 true, ptr %8, align 1
  store i32 1, ptr %17, align 4
  br label %78

78:                                               ; preds = %77, %74, %66, %58
  call void @llvm.lifetime.end.p0(i64 32, ptr %19) #4
  call void @llvm.lifetime.end.p0(i64 41, ptr %18) #4
  br label %79

79:                                               ; preds = %78, %40
  call void @llvm.lifetime.end.p0(i64 1, ptr %16) #4
  %80 = load i1, ptr %8, align 1
  ret i1 %80
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"_Bool", !7, i64 0}
!16 = !{i8 0, i8 2}
!17 = !{}
!18 = !{!19, !6, i64 32}
!19 = !{!"", !7, i64 0, !6, i64 32, !13, i64 40, !13, i64 48}
!20 = !{!19, !13, i64 40}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @keccak_256(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_get_address(ptr noundef, i8 noundef zeroext, ptr noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local zeroext i1 @nem_transaction_write_common(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_u32(ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: inlinehint nounwind uwtable
declare hidden zeroext i1 @nem_write_tagged(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: nounwind uwtable
define dso_local zeroext i1 @nem_transaction_create_multisig_signature(ptr noundef %0, i8 noundef zeroext %1, i32 noundef %2, ptr noundef %3, i64 noundef %4, i32 noundef %5, ptr noundef %6) local_unnamed_addr #2 {
  %8 = alloca [41 x i8], align 16
  %9 = alloca [32 x i8], align 16
  %.not = icmp eq ptr %3, null
  %spec.select = select i1 %.not, ptr %0, ptr %3
  %10 = zext i8 %1 to i32
  %11 = shl nuw i32 %10, 24
  %12 = or disjoint i32 %11, 1
  %13 = tail call zeroext i1 @nem_transaction_write_common(ptr noundef %0, i32 noundef 4098, i32 noundef %12, i32 noundef %2, ptr noundef %spec.select, i64 noundef %4, i32 noundef %5)
  br i1 %13, label %14, label %26

14:                                               ; preds = %7
  call void @llvm.lifetime.start.p0(i64 41, ptr nonnull %8) #4
  %15 = call zeroext i1 @nem_get_address(ptr noundef %6, i8 noundef zeroext %1, ptr noundef nonnull %8)
  call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %9) #4
  %16 = getelementptr inbounds i8, ptr %6, i64 32
  %17 = load ptr, ptr %16, align 8, !tbaa !5
  %18 = getelementptr inbounds i8, ptr %6, i64 40
  %19 = load i64, ptr %18, align 8, !tbaa !11
  call void @keccak_256(ptr noundef %17, i64 noundef %19, ptr noundef nonnull %9) #4
  %20 = call zeroext i1 @nem_write_u32(ptr noundef %0, i32 noundef 36)
  br i1 %20, label %21, label %25

21:                                               ; preds = %14
  %22 = call zeroext i1 @nem_write_tagged(ptr noundef %0, ptr noundef nonnull %9, i32 noundef 32)
  br i1 %22, label %23, label %25

23:                                               ; preds = %21
  %24 = call zeroext i1 @nem_write_tagged(ptr noundef %0, ptr noundef nonnull %8, i32 noundef 40)
  br label %25

25:                                               ; preds = %23, %21, %14
  %.0 = phi i1 [ false, %14 ], [ false, %21 ], [ %24, %23 ]
  call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %9) #4
  call void @llvm.lifetime.end.p0(i64 41, ptr nonnull %8) #4
  br label %26

26:                                               ; preds = %7, %25
  %.1 = phi i1 [ %.0, %25 ], [ false, %7 ]
  ret i1 %.1
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 32}
!6 = !{!"", !7, i64 0, !9, i64 32, !10, i64 40, !10, i64 48}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!"any pointer", !7, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!6, !10, i64 40}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass