; LLVM IR from ESPboy-edu/ESPboy_tinyphysicsengine :: programs (test)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.TPE_Vec3 = type { i32, i32, i32 }

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: nounwind uwtable
declare dso_local { i64, i32 } @TPE_vec3(i32 noundef, i32 noundef, i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @TPE_dist(i64, i32, i64, i32) #3

; Function Attrs: nounwind uwtable
declare dso_local { i64, i32 } @TPE_envAABoxInside(i64, i32, i64, i32, i64, i32) #1

; Function Attrs: nounwind uwtable
declare dso_local { i64, i32 } @TPE_envHalfPlane(i64, i32, i64, i32, i64, i32) #1

; Function Attrs: nounwind uwtable
define dso_local { i64, i32 } @envSimple(i64 %0, i32 %1, i32 noundef %2) #1 {
  %4 = alloca %struct.TPE_Vec3, align 4
  %5 = alloca %struct.TPE_Vec3, align 4
  %6 = alloca { i64, i32 }, align 4
  %7 = alloca i32, align 4
  %8 = alloca %struct.TPE_Vec3, align 4
  %9 = alloca { i64, i32 }, align 8
  %10 = alloca %struct.TPE_Vec3, align 4
  %11 = alloca { i64, i32 }, align 8
  %12 = alloca { i64, i32 }, align 4
  %13 = alloca { i64, i32 }, align 4
  %14 = alloca { i64, i32 }, align 4
  %15 = alloca { i64, i32 }, align 8
  %16 = alloca %struct.TPE_Vec3, align 4
  %17 = alloca i32, align 4
  %18 = alloca { i64, i32 }, align 4
  %19 = alloca { i64, i32 }, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca %struct.TPE_Vec3, align 4
  %23 = alloca %struct.TPE_Vec3, align 4
  %24 = alloca { i64, i32 }, align 8
  %25 = alloca %struct.TPE_Vec3, align 4
  %26 = alloca { i64, i32 }, align 8
  %27 = alloca { i64, i32 }, align 4
  %28 = alloca { i64, i32 }, align 4
  %29 = alloca { i64, i32 }, align 4
  %30 = alloca { i64, i32 }, align 8
  %31 = alloca { i64, i32 }, align 4
  %32 = alloca { i64, i32 }, align 4
  %33 = alloca { i64, i32 }, align 8
  %34 = getelementptr inbounds { i64, i32 }, ptr %6, i32 0, i32 0
  store i64 %0, ptr %34, align 4
  %35 = getelementptr inbounds { i64, i32 }, ptr %6, i32 0, i32 1
  store i32 %1, ptr %35, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %5, ptr align 4 %6, i64 12, i1 false)
  store i32 %2, ptr %7, align 4, !tbaa !5
  %36 = call { i64, i32 } @TPE_vec3(i32 noundef 0, i32 noundef 0, i32 noundef 0)
  store { i64, i32 } %36, ptr %9, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %8, ptr align 8 %9, i64 12, i1 false)
  %37 = call { i64, i32 } @TPE_vec3(i32 noundef 10000, i32 noundef 10000, i32 noundef 10000)
  store { i64, i32 } %37, ptr %11, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %10, ptr align 8 %11, i64 12, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %12, ptr align 4 %5, i64 12, i1 false)
  %38 = getelementptr inbounds { i64, i32 }, ptr %12, i32 0, i32 0
  %39 = load i64, ptr %38, align 4
  %40 = getelementptr inbounds { i64, i32 }, ptr %12, i32 0, i32 1
  %41 = load i32, ptr %40, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %13, ptr align 4 %8, i64 12, i1 false)
  %42 = getelementptr inbounds { i64, i32 }, ptr %13, i32 0, i32 0
  %43 = load i64, ptr %42, align 4
  %44 = getelementptr inbounds { i64, i32 }, ptr %13, i32 0, i32 1
  %45 = load i32, ptr %44, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %14, ptr align 4 %10, i64 12, i1 false)
  %46 = getelementptr inbounds { i64, i32 }, ptr %14, i32 0, i32 0
  %47 = load i64, ptr %46, align 4
  %48 = getelementptr inbounds { i64, i32 }, ptr %14, i32 0, i32 1
  %49 = load i32, ptr %48, align 4
  %50 = call { i64, i32 } @TPE_envAABoxInside(i64 %39, i32 %41, i64 %43, i32 %45, i64 %47, i32 %49)
  store { i64, i32 } %50, ptr %15, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %4, ptr align 8 %15, i64 12, i1 false)
  call void @llvm.lifetime.start.p0(i64 12, ptr %16) #4
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %18, ptr align 4 %4, i64 12, i1 false)
  %51 = getelementptr inbounds { i64, i32 }, ptr %18, i32 0, i32 0
  %52 = load i64, ptr %51, align 4
  %53 = getelementptr inbounds { i64, i32 }, ptr %18, i32 0, i32 1
  %54 = load i32, ptr %53, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %19, ptr align 4 %5, i64 12, i1 false)
  %55 = getelementptr inbounds { i64, i32 }, ptr %19, i32 0, i32 0
  %56 = load i64, ptr %55, align 4
  %57 = getelementptr inbounds { i64, i32 }, ptr %19, i32 0, i32 1
  %58 = load i32, ptr %57, align 4
  %59 = call i32 @TPE_dist(i64 %52, i32 %54, i64 %56, i32 %58)
  store i32 %59, ptr %17, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #4
  %60 = load i32, ptr %17, align 4, !tbaa !5
  %61 = load i32, ptr %20, align 4, !tbaa !5
  %62 = getelementptr inbounds %struct.TPE_Vec3, ptr %4, i32 0, i32 0
  %63 = load i32, ptr %62, align 4, !tbaa !9
  %64 = getelementptr inbounds %struct.TPE_Vec3, ptr %5, i32 0, i32 0
  %65 = load i32, ptr %64, align 4, !tbaa !9
  %66 = icmp eq i32 %63, %65
  br i1 %66, label %67, label %80

67:                                               ; preds = %3
  %68 = getelementptr inbounds %struct.TPE_Vec3, ptr %4, i32 0, i32 1
  %69 = load i32, ptr %68, align 4, !tbaa !11
  %70 = getelementptr inbounds %struct.TPE_Vec3, ptr %5, i32 0, i32 1
  %71 = load i32, ptr %70, align 4, !tbaa !11
  %72 = icmp eq i32 %69, %71
  br i1 %72, label %73, label %80

73:                                               ; preds = %67
  %74 = getelementptr inbounds %struct.TPE_Vec3, ptr %4, i32 0, i32 2
  %75 = load i32, ptr %74, align 4, !tbaa !12
  %76 = getelementptr inbounds %struct.TPE_Vec3, ptr %5, i32 0, i32 2
  %77 = load i32, ptr %76, align 4, !tbaa !12
  %78 = icmp eq i32 %75, %77
  br i1 %78, label %79, label %80

79:                                               ; preds = %73
  store i32 1, ptr %21, align 4
  br label %111

80:                                               ; preds = %73, %67, %3
  call void @llvm.lifetime.start.p0(i64 12, ptr %22) #4
  %81 = call { i64, i32 } @TPE_vec3(i32 noundef 0, i32 noundef -5000, i32 noundef 0)
  store { i64, i32 } %81, ptr %24, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %23, ptr align 8 %24, i64 12, i1 false)
  %82 = call { i64, i32 } @TPE_vec3(i32 noundef 500, i32 noundef 500, i32 noundef 0)
  store { i64, i32 } %82, ptr %26, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %25, ptr align 8 %26, i64 12, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %27, ptr align 4 %5, i64 12, i1 false)
  %83 = getelementptr inbounds { i64, i32 }, ptr %27, i32 0, i32 0
  %84 = load i64, ptr %83, align 4
  %85 = getelementptr inbounds { i64, i32 }, ptr %27, i32 0, i32 1
  %86 = load i32, ptr %85, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %28, ptr align 4 %23, i64 12, i1 false)
  %87 = getelementptr inbounds { i64, i32 }, ptr %28, i32 0, i32 0
  %88 = load i64, ptr %87, align 4
  %89 = getelementptr inbounds { i64, i32 }, ptr %28, i32 0, i32 1
  %90 = load i32, ptr %89, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %29, ptr align 4 %25, i64 12, i1 false)
  %91 = getelementptr inbounds { i64, i32 }, ptr %29, i32 0, i32 0
  %92 = load i64, ptr %91, align 4
  %93 = getelementptr inbounds { i64, i32 }, ptr %29, i32 0, i32 1
  %94 = load i32, ptr %93, align 4
  %95 = call { i64, i32 } @TPE_envHalfPlane(i64 %84, i32 %86, i64 %88, i32 %90, i64 %92, i32 %94)
  store { i64, i32 } %95, ptr %30, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %22, ptr align 8 %30, i64 12, i1 false)
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %16, ptr align 4 %22, i64 12, i1 false), !tbaa.struct !13
  call void @llvm.lifetime.end.p0(i64 12, ptr %22) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %31, ptr align 4 %16, i64 12, i1 false)
  %96 = getelementptr inbounds { i64, i32 }, ptr %31, i32 0, i32 0
  %97 = load i64, ptr %96, align 4
  %98 = getelementptr inbounds { i64, i32 }, ptr %31, i32 0, i32 1
  %99 = load i32, ptr %98, align 4
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %32, ptr align 4 %5, i64 12, i1 false)
  %100 = getelementptr inbounds { i64, i32 }, ptr %32, i32 0, i32 0
  %101 = load i64, ptr %100, align 4
  %102 = getelementptr inbounds { i64, i32 }, ptr %32, i32 0, i32 1
  %103 = load i32, ptr %102, align 4
  %104 = call i32 @TPE_dist(i64 %97, i32 %99, i64 %101, i32 %103)
  store i32 %104, ptr %20, align 4, !tbaa !5
  %105 = load i32, ptr %20, align 4, !tbaa !5
  %106 = load i32, ptr %17, align 4, !tbaa !5
  %107 = icmp slt i32 %105, %106
  br i1 %107, label %108, label %110

108:                                              ; preds = %80
  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %4, ptr align 4 %16, i64 12, i1 false), !tbaa.struct !13
  %109 = load i32, ptr %20, align 4, !tbaa !5
  store i32 %109, ptr %17, align 4, !tbaa !5
  br label %110

110:                                              ; preds = %108, %80
  store i32 1, ptr %21, align 4
  br label %111

111:                                              ; preds = %110, %79
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #4
  call void @llvm.lifetime.end.p0(i64 12, ptr %16) #4
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %33, ptr align 4 %4, i64 12, i1 false)
  %112 = load { i64, i32 }, ptr %33, align 8
  ret { i64, i32 } %112
}

attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"", !6, i64 0, !6, i64 4, !6, i64 8}
!11 = !{!10, !6, i64 4}
!12 = !{!10, !6, i64 8}
!13 = !{i64 0, i64 4, !5, i64 4, i64 4, !5, i64 8, i64 4, !5}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
declare dso_local { i64, i32 } @TPE_vec3(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint nounwind uwtable
declare hidden i32 @TPE_dist(i64, i32, i64, i32) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local { i64, i32 } @TPE_envAABoxInside(i64, i32, i64, i32, i64, i32) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local { i64, i32 } @TPE_envHalfPlane(i64, i32, i64, i32, i64, i32) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
define dso_local { i64, i32 } @envSimple(i64 %0, i32 %1, i32 noundef %2) local_unnamed_addr #0 {
  %.sroa.059.0.extract.trunc = trunc i64 %0 to i32
  %4 = tail call { i64, i32 } @TPE_vec3(i32 noundef 0, i32 noundef 0, i32 noundef 0)
  %.fca.0.extract51 = extractvalue { i64, i32 } %4, 0
  %.fca.1.extract52 = extractvalue { i64, i32 } %4, 1
  %5 = tail call { i64, i32 } @TPE_vec3(i32 noundef 10000, i32 noundef 10000, i32 noundef 10000)
  %.fca.0.extract45 = extractvalue { i64, i32 } %5, 0
  %.fca.1.extract46 = extractvalue { i64, i32 } %5, 1
  %6 = tail call { i64, i32 } @TPE_envAABoxInside(i64 %0, i32 %1, i64 %.fca.0.extract51, i32 %.fca.1.extract52, i64 %.fca.0.extract45, i32 %.fca.1.extract46)
  %.fca.0.extract35 = extractvalue { i64, i32 } %6, 0
  %.fca.1.extract36 = extractvalue { i64, i32 } %6, 1
  %.sroa.085.0.extract.trunc89 = trunc i64 %.fca.0.extract35 to i32
  %.sroa.590.0.extract.shift95 = lshr i64 %.fca.0.extract35, 32
  %7 = tail call i32 @TPE_dist(i64 %.fca.0.extract35, i32 %.fca.1.extract36, i64 %0, i32 %1)
  %8 = icmp eq i32 %.sroa.085.0.extract.trunc89, %.sroa.059.0.extract.trunc
  %.sroa.6.0.extract.shift = lshr i64 %0, 32
  %9 = icmp eq i64 %.sroa.590.0.extract.shift95, %.sroa.6.0.extract.shift
  %or.cond = and i1 %8, %9
  %10 = icmp eq i32 %.fca.1.extract36, %1
  %or.cond100 = select i1 %or.cond, i1 %10, i1 false
  br i1 %or.cond100, label %17, label %11

11:                                               ; preds = %3
  %12 = tail call { i64, i32 } @TPE_vec3(i32 noundef 0, i32 noundef -5000, i32 noundef 0)
  %.fca.0.extract19 = extractvalue { i64, i32 } %12, 0
  %.fca.1.extract20 = extractvalue { i64, i32 } %12, 1
  %13 = tail call { i64, i32 } @TPE_vec3(i32 noundef 500, i32 noundef 500, i32 noundef 0)
  %.fca.0.extract13 = extractvalue { i64, i32 } %13, 0
  %.fca.1.extract14 = extractvalue { i64, i32 } %13, 1
  %14 = tail call { i64, i32 } @TPE_envHalfPlane(i64 %0, i32 %1, i64 %.fca.0.extract19, i32 %.fca.1.extract20, i64 %.fca.0.extract13, i32 %.fca.1.extract14)
  %.fca.0.extract = extractvalue { i64, i32 } %14, 0
  %.fca.1.extract = extractvalue { i64, i32 } %14, 1
  %15 = tail call i32 @TPE_dist(i64 %.fca.0.extract, i32 %.fca.1.extract, i64 %0, i32 %1)
  %16 = icmp slt i32 %15, %7
  %.sroa.590.0.extract.shift = lshr i64 %.fca.0.extract, 32
  %.sroa.085.0 = select i1 %16, i64 %.fca.0.extract, i64 %.fca.0.extract35
  %.sroa.590.0 = select i1 %16, i64 %.sroa.590.0.extract.shift, i64 %.sroa.590.0.extract.shift95
  %.sroa.697.0 = select i1 %16, i32 %.fca.1.extract, i32 %.fca.1.extract36
  br label %17

17:                                               ; preds = %3, %11
  %.sroa.085.1 = phi i64 [ %.sroa.085.0, %11 ], [ %.fca.0.extract35, %3 ]
  %.sroa.590.1 = phi i64 [ %.sroa.590.0, %11 ], [ %.sroa.590.0.extract.shift95, %3 ]
  %.sroa.697.1 = phi i32 [ %.sroa.697.0, %11 ], [ %1, %3 ]
  %.sroa.590.0.insert.shift = shl nuw i64 %.sroa.590.1, 32
  %.sroa.085.0.insert.ext = and i64 %.sroa.085.1, 4294967295
  %.sroa.085.0.insert.insert = or disjoint i64 %.sroa.590.0.insert.shift, %.sroa.085.0.insert.ext
  %.fca.0.insert = insertvalue { i64, i32 } poison, i64 %.sroa.085.0.insert.insert, 0
  %.fca.1.insert = insertvalue { i64, i32 } %.fca.0.insert, i32 %.sroa.697.1, 1
  ret { i64, i32 } %.fca.1.insert
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass