; LLVM IR from XiaoMi/mace :: micro/framework/graph.ll (ZN5micro9framework5Graph3RunEPNS_21MaceMicroEngineConfigE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }
%"struct.micro::MaceMicroEngineConfig" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32 }

@.str = external hidden unnamed_addr constant [70 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK5micro9framework5Graph10op_contextEj(ptr noundef nonnull align 4 dereferenceable(24), i32 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare noundef i32 @_ZNK5micro5model6NetDef7op_sizeEv(ptr noundef nonnull align 4 dereferenceable(44)) #2

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #2

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro9framework5Graph3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(24) %0, ptr noundef %1) #4 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca %"class.micro::base::Logger", align 4
  %12 = alloca ptr, align 8
  %13 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %14 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %15, i32 0, i32 0
  %17 = load ptr, ptr %16, align 8, !tbaa !9
  %18 = call noundef i32 @_ZNK5micro5model6NetDef7op_sizeEv(ptr noundef nonnull align 4 dereferenceable(44) %17)
  store i32 %18, ptr %6, align 4, !tbaa !12
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 0, ptr %7, align 4, !tbaa !12
  br label %19

19:                                               ; preds = %56, %2
  %20 = load i32, ptr %7, align 4, !tbaa !12
  %21 = load i32, ptr %6, align 4, !tbaa !12
  %22 = icmp ult i32 %20, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %19
  store i32 2, ptr %8, align 4
  br label %59

24:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %25 = load i32, ptr %7, align 4, !tbaa !12
  %26 = call noundef ptr @_ZNK5micro9framework5Graph10op_contextEj(ptr noundef nonnull align 4 dereferenceable(24) %14, i32 noundef %25)
  store ptr %26, ptr %9, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %27 = load ptr, ptr %9, align 8, !tbaa !5
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = call noundef i32 @_ZN5micro9framework9OpContext3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(20) %27, ptr noundef %28)
  store i32 %29, ptr %10, align 4, !tbaa !13
  %30 = load i32, ptr %10, align 4, !tbaa !13
  %31 = icmp ne i32 %30, 0
  br i1 %31, label %32, label %49

32:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %11, ptr noundef @.str, i32 noundef 74, i32 noundef 1)
  %33 = load ptr, ptr %9, align 8, !tbaa !5
  %34 = load ptr, ptr %5, align 8, !tbaa !5
  %35 = invoke noundef i32 @_ZN5micro9framework9OpContext3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(20) %33, ptr noundef %34)
          to label %36 unwind label %45

36:                                               ; preds = %32
  %37 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %11, i32 noundef %35)
          to label %38 unwind label %45

38:                                               ; preds = %36
  %39 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %37, ptr noundef @.str.2)
          to label %40 unwind label %45

40:                                               ; preds = %38
  %41 = load i32, ptr %10, align 4, !tbaa !13
  %42 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %39, i32 noundef %41)
          to label %43 unwind label %45

43:                                               ; preds = %40
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  %44 = load i32, ptr %10, align 4, !tbaa !13
  store i32 %44, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %50

45:                                               ; preds = %40, %38, %36, %32
  %46 = landingpad { ptr, i32 }
          cleanup
  %47 = extractvalue { ptr, i32 } %46, 0
  store ptr %47, ptr %12, align 8
  %48 = extractvalue { ptr, i32 } %46, 1
  store i32 %48, ptr %13, align 4
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  br label %64

49:                                               ; preds = %24
  store i32 0, ptr %8, align 4
  br label %50

50:                                               ; preds = %49, %43
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  %51 = load i32, ptr %8, align 4
  switch i32 %51, label %53 [
    i32 0, label %52
  ]

52:                                               ; preds = %50
  store i32 0, ptr %8, align 4
  br label %53

53:                                               ; preds = %52, %50
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  %54 = load i32, ptr %8, align 4
  switch i32 %54, label %59 [
    i32 0, label %55
  ]

55:                                               ; preds = %53
  br label %56

56:                                               ; preds = %55
  %57 = load i32, ptr %7, align 4, !tbaa !12
  %58 = add i32 %57, 1
  store i32 %58, ptr %7, align 4, !tbaa !12
  br label %19, !llvm.loop !15

59:                                               ; preds = %53, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  %60 = load i32, ptr %8, align 4
  switch i32 %60, label %62 [
    i32 2, label %61
  ]

61:                                               ; preds = %59
  store i32 0, ptr %3, align 4
  store i32 1, ptr %8, align 4
  br label %62

62:                                               ; preds = %61, %59
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  %63 = load i32, ptr %3, align 4
  ret i32 %63

64:                                               ; preds = %45
  %65 = load ptr, ptr %12, align 8
  %66 = load i32, ptr %13, align 4
  %67 = insertvalue { ptr, i32 } poison, ptr %65, 0
  %68 = insertvalue { ptr, i32 } %67, i32 %66, 1
  resume { ptr, i32 } %68
}

declare noundef i32 @_ZN5micro9framework9OpContext3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(20), ptr noundef) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"_ZTSN5micro21MaceMicroEngineConfigE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !11, i64 64}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"_ZTSN5micro10MaceStatusE", !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }

@.str = external hidden unnamed_addr constant [70 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK5micro9framework5Graph10op_contextEj(ptr noundef nonnull align 4 dereferenceable(24), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

declare noundef i32 @_ZNK5micro5model6NetDef7op_sizeEv(ptr noundef nonnull align 4 dereferenceable(44)) local_unnamed_addr #2

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #2

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) local_unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro9framework5Graph3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(24) %0, ptr noundef %1) local_unnamed_addr #4 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.micro::base::Logger", align 4
  %4 = load ptr, ptr %1, align 8, !tbaa !5
  %5 = tail call noundef i32 @_ZNK5micro5model6NetDef7op_sizeEv(ptr noundef nonnull align 4 dereferenceable(44) %4)
  %.not2428.not = icmp eq i32 %5, 0
  br i1 %.not2428.not, label %.loopexit, label %.lr.ph

6:                                                ; preds = %.lr.ph
  %7 = add nuw i32 %.02029, 1
  %exitcond.not = icmp eq i32 %7, %5
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !11

.lr.ph:                                           ; preds = %2, %6
  %.02029 = phi i32 [ %7, %6 ], [ 0, %2 ]
  %8 = tail call noundef ptr @_ZNK5micro9framework5Graph10op_contextEj(ptr noundef nonnull align 4 dereferenceable(24) %0, i32 noundef %.02029)
  %9 = tail call noundef i32 @_ZN5micro9framework9OpContext3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(20) %8, ptr noundef nonnull %1)
  %.not = icmp eq i32 %9, 0
  br i1 %.not, label %6, label %10

10:                                               ; preds = %.lr.ph
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #5
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull @.str, i32 noundef 74, i32 noundef 1)
  %11 = invoke noundef i32 @_ZN5micro9framework9OpContext3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(20) %8, ptr noundef nonnull %1)
          to label %12 unwind label %18

12:                                               ; preds = %10
  %13 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %3, i32 noundef %11)
          to label %14 unwind label %18

14:                                               ; preds = %12
  %15 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %13, ptr noundef nonnull @.str.2)
          to label %16 unwind label %18

16:                                               ; preds = %14
  %17 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %15, i32 noundef %9)
          to label %20 unwind label %18

18:                                               ; preds = %16, %14, %12, %10
  %19 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  resume { ptr, i32 } %19

20:                                               ; preds = %16
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %3) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #5
  br label %.loopexit

.loopexit:                                        ; preds = %6, %2, %20
  %spec.select = phi i32 [ %9, %20 ], [ 0, %2 ], [ 0, %6 ]
  ret i32 %spec.select
}

declare noundef i32 @_ZN5micro9framework9OpContext3RunEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 4 dereferenceable(20), ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN5micro21MaceMicroEngineConfigE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !10, i64 64}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass