; LLVM IR from facebook/redex :: service/regalloc/VirtualRegistersFile.ll (ZN8regalloc20VirtualRegistersFile5allocEm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.boost::dynamic_bitset<>::reference" = type { ptr, i64 }
%"class.regalloc::VirtualRegistersFile" = type { %"class.boost::dynamic_bitset" }
%"class.boost::dynamic_bitset" = type { %"class.std::vector", i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i16 @_ZN8regalloc20VirtualRegistersFile5allocEm(ptr noundef nonnull align 8 dereferenceable(32) %0, i64 noundef %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i16, align 2
  %7 = alloca i32, align 4
  %8 = alloca %"class.boost::dynamic_bitset<>::reference", align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i64 %1, ptr %4, align 8, !tbaa !9
  %9 = load ptr, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %10 = getelementptr inbounds %"class.regalloc::VirtualRegistersFile", ptr %9, i32 0, i32 0
  %11 = call noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE10find_firstEv(ptr noundef nonnull align 8 dereferenceable(32) %10)
  store i64 %11, ptr %5, align 8, !tbaa !9
  br label %12

12:                                               ; preds = %47, %2
  br label %13

13:                                               ; preds = %12
  %14 = load i64, ptr %5, align 8, !tbaa !9
  %15 = icmp ne i64 %14, -1
  br i1 %15, label %16, label %50

16:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #3
  store i16 1, ptr %6, align 2, !tbaa !11
  br label %17

17:                                               ; preds = %44, %16
  %18 = load i16, ptr %6, align 2, !tbaa !11
  %19 = zext i16 %18 to i64
  %20 = load i64, ptr %4, align 8, !tbaa !9
  %21 = icmp ult i64 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %17
  store i32 5, ptr %7, align 4
  br label %47

23:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 16, ptr %8) #3
  %24 = getelementptr inbounds %"class.regalloc::VirtualRegistersFile", ptr %9, i32 0, i32 0
  %25 = load i64, ptr %5, align 8, !tbaa !9
  %26 = load i16, ptr %6, align 2, !tbaa !11
  %27 = zext i16 %26 to i64
  %28 = add i64 %25, %27
  %29 = call { ptr, i64 } @_ZN5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %24, i64 noundef %28)
  %30 = getelementptr inbounds { ptr, i64 }, ptr %8, i32 0, i32 0
  %31 = extractvalue { ptr, i64 } %29, 0
  store ptr %31, ptr %30, align 8
  %32 = getelementptr inbounds { ptr, i64 }, ptr %8, i32 0, i32 1
  %33 = extractvalue { ptr, i64 } %29, 1
  store i64 %33, ptr %32, align 8
  %34 = call noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %8)
  %35 = xor i1 %34, true
  call void @llvm.lifetime.end.p0(i64 16, ptr %8) #3
  br i1 %35, label %36, label %43

36:                                               ; preds = %23
  %37 = getelementptr inbounds %"class.regalloc::VirtualRegistersFile", ptr %9, i32 0, i32 0
  %38 = load i64, ptr %5, align 8, !tbaa !9
  %39 = load i16, ptr %6, align 2, !tbaa !11
  %40 = zext i16 %39 to i64
  %41 = add i64 %38, %40
  %42 = call noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE9find_nextEm(ptr noundef nonnull align 8 dereferenceable(32) %37, i64 noundef %41)
  store i64 %42, ptr %5, align 8, !tbaa !9
  store i32 2, ptr %7, align 4
  br label %47

43:                                               ; preds = %23
  br label %44

44:                                               ; preds = %43
  %45 = load i16, ptr %6, align 2, !tbaa !11
  %46 = add i16 %45, 1
  store i16 %46, ptr %6, align 2, !tbaa !11
  br label %17, !llvm.loop !13

47:                                               ; preds = %36, %22
  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #3
  %48 = load i32, ptr %7, align 4
  switch i32 %48, label %62 [
    i32 5, label %49
    i32 2, label %12
  ]

49:                                               ; preds = %47
  br label %50

50:                                               ; preds = %49, %13
  %51 = load i64, ptr %5, align 8, !tbaa !9
  %52 = icmp eq i64 %51, -1
  br i1 %52, label %53, label %56

53:                                               ; preds = %50
  %54 = call noundef zeroext i16 @_ZNK8regalloc20VirtualRegistersFile22find_free_range_at_endEv(ptr noundef nonnull align 8 dereferenceable(32) %9)
  %55 = zext i16 %54 to i64
  store i64 %55, ptr %5, align 8, !tbaa !9
  br label %56

56:                                               ; preds = %53, %50
  %57 = load i64, ptr %5, align 8, !tbaa !9
  %58 = trunc i64 %57 to i16
  %59 = load i64, ptr %4, align 8, !tbaa !9
  call void @_ZN8regalloc20VirtualRegistersFile8alloc_atEtm(ptr noundef nonnull align 8 dereferenceable(32) %9, i16 noundef zeroext %58, i64 noundef %59)
  %60 = load i64, ptr %5, align 8, !tbaa !9
  %61 = trunc i64 %60 to i16
  store i32 1, ptr %7, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  ret i16 %61

62:                                               ; preds = %47
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE10find_firstEv(ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZN5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE9find_nextEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i16 @_ZNK8regalloc20VirtualRegistersFile22find_free_range_at_endEv(ptr noundef nonnull align 8 dereferenceable(32)) #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN8regalloc20VirtualRegistersFile8alloc_atEtm(ptr noundef nonnull align 8 dereferenceable(32), i16 noundef zeroext, i64 noundef) #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.boost::dynamic_bitset<>::reference" = type { ptr, i64 }

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i16 @_ZN8regalloc20VirtualRegistersFile5allocEm(ptr noundef nonnull align 8 dereferenceable(32) %0, i64 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = alloca %"class.boost::dynamic_bitset<>::reference", align 8
  %4 = tail call noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE10find_firstEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %.not25 = icmp eq i64 %4, -1
  br i1 %.not25, label %.thread20, label %.preheader.lr.ph

.preheader.lr.ph:                                 ; preds = %2
  %5 = icmp ugt i64 %1, 1
  %6 = getelementptr inbounds i8, ptr %3, i64 8
  br i1 %5, label %.preheader.us, label %.loopexit

.preheader.us:                                    ; preds = %.preheader.lr.ph, %18
  %.01426.us = phi i64 [ %19, %18 ], [ %4, %.preheader.lr.ph ]
  br label %11

7:                                                ; preds = %11
  %8 = add i16 %.01323.us, 1
  %9 = zext i16 %8 to i64
  %10 = icmp ult i64 %9, %1
  br i1 %10, label %11, label %.loopexit, !llvm.loop !5

11:                                               ; preds = %.preheader.us, %7
  %12 = phi i64 [ 1, %.preheader.us ], [ %9, %7 ]
  %.01323.us = phi i16 [ 1, %.preheader.us ], [ %8, %7 ]
  call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
  %13 = add i64 %12, %.01426.us
  %14 = call { ptr, i64 } @_ZN5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %0, i64 noundef %13)
  %15 = extractvalue { ptr, i64 } %14, 0
  store ptr %15, ptr %3, align 8
  %16 = extractvalue { ptr, i64 } %14, 1
  store i64 %16, ptr %6, align 8
  %17 = call noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16) %3)
  call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
  br i1 %17, label %7, label %18

18:                                               ; preds = %11
  %19 = call noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE9find_nextEm(ptr noundef nonnull align 8 dereferenceable(32) %0, i64 noundef %13)
  %.not.us = icmp eq i64 %19, -1
  br i1 %.not.us, label %.thread20, label %.preheader.us

.thread20:                                        ; preds = %18, %2
  %20 = call noundef zeroext i16 @_ZNK8regalloc20VirtualRegistersFile22find_free_range_at_endEv(ptr noundef nonnull align 8 dereferenceable(32) %0)
  %21 = zext i16 %20 to i64
  br label %.loopexit

.loopexit:                                        ; preds = %7, %.preheader.lr.ph, %.thread20
  %.3 = phi i64 [ %21, %.thread20 ], [ %4, %.preheader.lr.ph ], [ %.01426.us, %7 ]
  %22 = trunc i64 %.3 to i16
  call void @_ZN8regalloc20VirtualRegistersFile8alloc_atEtm(ptr noundef nonnull align 8 dereferenceable(32) %0, i16 noundef zeroext %22, i64 noundef %1)
  ret i16 %22
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE10find_firstEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local { ptr, i64 } @_ZN5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEE9referencecvbEv(ptr noundef nonnull align 8 dereferenceable(16)) local_unnamed_addr #2 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE9find_nextEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i16 @_ZNK8regalloc20VirtualRegistersFile22find_free_range_at_endEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN8regalloc20VirtualRegistersFile8alloc_atEtm(ptr noundef nonnull align 8 dereferenceable(32), i16 noundef zeroext, i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass