; LLVM IR from iree-org/iree :: runtime/src/iree/builtins/device (device_generic)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%union.anon.3 = type { i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local signext i16 @iree_f2h_ieee(float noundef %0) #1 {
  %2 = alloca i16, align 2
  %3 = alloca float, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i16, align 2
  %13 = alloca i16, align 2
  %14 = alloca %union.anon.3, align 4
  %15 = alloca i32, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca i32, align 4
  %19 = alloca i32, align 4
  %20 = alloca i32, align 4
  %21 = alloca i32, align 4
  %22 = alloca i32, align 4
  %23 = alloca i32, align 4
  %24 = alloca i32, align 4
  %25 = alloca i32, align 4
  %26 = alloca i32, align 4
  store float %0, ptr %3, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 23, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #2
  store i32 127, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #2
  store i32 -2147483648, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #2
  store i32 2139095040, ptr %7, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #2
  store i32 8388607, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #2
  store i32 10, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #2
  store i32 5, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #2
  store i32 15, ptr %11, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %12) #2
  store i16 31744, ptr %12, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 2, ptr %13) #2
  store i16 1023, ptr %13, align 2, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #2
  %27 = load float, ptr %3, align 4, !tbaa !5
  store float %27, ptr %14, align 4, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #2
  %28 = load i32, ptr %14, align 4, !tbaa !13
  store i32 %28, ptr %15, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #2
  %29 = load i32, ptr %15, align 4, !tbaa !9
  %30 = and i32 %29, -2147483648
  store i32 %30, ptr %16, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #2
  %31 = load i32, ptr %15, align 4, !tbaa !9
  %32 = and i32 %31, 2139095040
  store i32 %32, ptr %17, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #2
  %33 = load i32, ptr %15, align 4, !tbaa !9
  %34 = and i32 %33, 8388607
  store i32 %34, ptr %18, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #2
  %35 = load i32, ptr %16, align 4, !tbaa !9
  %36 = lshr i32 %35, 16
  store i32 %36, ptr %19, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %20) #2
  store i32 0, ptr %20, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %21) #2
  store i32 0, ptr %21, align 4, !tbaa !9
  %37 = load i32, ptr %17, align 4, !tbaa !9
  %38 = icmp uge i32 %37, 2139095040
  br i1 %38, label %39, label %49

39:                                               ; preds = %1
  store i32 31744, ptr %20, align 4, !tbaa !9
  %40 = load i32, ptr %18, align 4, !tbaa !9
  %41 = icmp ne i32 %40, 0
  br i1 %41, label %42, label %47

42:                                               ; preds = %39
  %43 = load i32, ptr %19, align 4, !tbaa !9
  %44 = or i32 %43, 31744
  %45 = or i32 %44, 1023
  %46 = trunc i32 %45 to i16
  store i16 %46, ptr %2, align 2
  store i32 1, ptr %22, align 4
  br label %102

47:                                               ; preds = %39
  br label %48

48:                                               ; preds = %47
  br label %95

49:                                               ; preds = %1
  %50 = load i32, ptr %17, align 4, !tbaa !9
  %51 = icmp eq i32 %50, 0
  br i1 %51, label %52, label %53

52:                                               ; preds = %49
  br label %94

53:                                               ; preds = %49
  call void @llvm.lifetime.start.p0(i64 4, ptr %23) #2
  %54 = load i32, ptr %17, align 4, !tbaa !9
  %55 = lshr i32 %54, 23
  %56 = sub i32 %55, 127
  store i32 %56, ptr %23, align 4, !tbaa !9
  %57 = load i32, ptr %23, align 4, !tbaa !9
  %58 = icmp sge i32 %57, 16
  br i1 %58, label %59, label %60

59:                                               ; preds = %53
  store i32 31744, ptr %20, align 4, !tbaa !9
  br label %93

60:                                               ; preds = %53
  %61 = load i32, ptr %23, align 4, !tbaa !9
  %62 = add nsw i32 %61, 15
  %63 = icmp sle i32 %62, 0
  br i1 %63, label %64, label %65

64:                                               ; preds = %60
  store i32 0, ptr %20, align 4, !tbaa !9
  br label %92

65:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %24) #2
  store i32 8192, ptr %24, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %25) #2
  %66 = load i32, ptr %24, align 4, !tbaa !9
  %67 = ashr i32 %66, 1
  store i32 %67, ptr %25, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %26) #2
  %68 = load i32, ptr %18, align 4, !tbaa !9
  %69 = load i32, ptr %18, align 4, !tbaa !9
  %70 = load i32, ptr %24, align 4, !tbaa !9
  %71 = and i32 %69, %70
  %72 = icmp ne i32 %71, 0
  br i1 %72, label %73, label %75

73:                                               ; preds = %65
  %74 = load i32, ptr %25, align 4, !tbaa !9
  br label %78

75:                                               ; preds = %65
  %76 = load i32, ptr %25, align 4, !tbaa !9
  %77 = sub nsw i32 %76, 1
  br label %78

78:                                               ; preds = %75, %73
  %79 = phi i32 [ %74, %73 ], [ %77, %75 ]
  %80 = add i32 %68, %79
  store i32 %80, ptr %26, align 4, !tbaa !9
  %81 = load i32, ptr %26, align 4, !tbaa !9
  %82 = icmp ugt i32 %81, 8388607
  br i1 %82, label %83, label %86

83:                                               ; preds = %78
  store i32 0, ptr %26, align 4, !tbaa !9
  %84 = load i32, ptr %23, align 4, !tbaa !9
  %85 = add nsw i32 %84, 1
  store i32 %85, ptr %23, align 4, !tbaa !9
  br label %86

86:                                               ; preds = %83, %78
  %87 = load i32, ptr %23, align 4, !tbaa !9
  %88 = add nsw i32 %87, 15
  %89 = shl i32 %88, 10
  store i32 %89, ptr %20, align 4, !tbaa !9
  %90 = load i32, ptr %26, align 4, !tbaa !9
  %91 = lshr i32 %90, 13
  store i32 %91, ptr %21, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %26) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %25) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %24) #2
  br label %92

92:                                               ; preds = %86, %64
  br label %93

93:                                               ; preds = %92, %59
  call void @llvm.lifetime.end.p0(i64 4, ptr %23) #2
  br label %94

94:                                               ; preds = %93, %52
  br label %95

95:                                               ; preds = %94, %48
  %96 = load i32, ptr %19, align 4, !tbaa !9
  %97 = load i32, ptr %20, align 4, !tbaa !9
  %98 = or i32 %96, %97
  %99 = load i32, ptr %21, align 4, !tbaa !9
  %100 = or i32 %98, %99
  %101 = trunc i32 %100 to i16
  store i16 %101, ptr %2, align 2
  store i32 1, ptr %22, align 4
  br label %102

102:                                              ; preds = %95, %42
  call void @llvm.lifetime.end.p0(i64 4, ptr %21) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %20) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %13) #2
  call void @llvm.lifetime.end.p0(i64 2, ptr %12) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  %103 = load i16, ptr %2, align 2
  ret i16 %103
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"float", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local signext i16 @iree_f2h_ieee(float noundef %0) local_unnamed_addr #0 {
  %2 = bitcast float %0 to i32
  %3 = and i32 %2, 2139095040
  %4 = and i32 %2, 8388607
  %5 = lshr i32 %2, 16
  %6 = and i32 %5, 32768
  switch i32 %3, label %11 [
    i32 2139095040, label %7
    i32 0, label %25
  ]

7:                                                ; preds = %1
  %.not33 = icmp eq i32 %4, 0
  br i1 %.not33, label %25, label %8

8:                                                ; preds = %7
  %9 = trunc nuw i32 %5 to i16
  %10 = or i16 %9, 32767
  br label %29

11:                                               ; preds = %1
  %12 = lshr exact i32 %3, 23
  %13 = icmp ugt i32 %3, 1191182336
  br i1 %13, label %25, label %14

14:                                               ; preds = %11
  %15 = icmp ult i32 %3, 947912704
  br i1 %15, label %25, label %16

16:                                               ; preds = %14
  %17 = and i32 %2, 8192
  %.not = icmp eq i32 %17, 0
  %18 = select i1 %.not, i32 4095, i32 4096
  %19 = add nuw nsw i32 %18, %4
  %20 = icmp ugt i32 %19, 8388607
  %spec.select.v = select i1 %20, i32 -126, i32 -127
  %spec.select = add nsw i32 %spec.select.v, %12
  %21 = lshr i32 %19, 13
  %22 = shl nsw i32 %spec.select, 10
  %23 = add nsw i32 %22, 15360
  %24 = select i1 %20, i32 0, i32 %21
  br label %25

25:                                               ; preds = %16, %11, %14, %1, %7
  %.129 = phi i32 [ 0, %7 ], [ %3, %1 ], [ %24, %16 ], [ 0, %11 ], [ 0, %14 ]
  %.1 = phi i32 [ 31744, %7 ], [ %3, %1 ], [ %23, %16 ], [ 31744, %11 ], [ 0, %14 ]
  %26 = or i32 %.129, %6
  %27 = or i32 %26, %.1
  %28 = trunc i32 %27 to i16
  br label %29

29:                                               ; preds = %25, %8
  %.025 = phi i16 [ %10, %8 ], [ %28, %25 ]
  ret i16 %.025
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass