; LLVM IR from ncduy0303/Competitive-Programming :: Graphs/Shortest Paths/Floyd_Warshall.ll (Z14floyd_warshallv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@dist = external dso_local global [501 x [501 x i64]], align 16

; Function Attrs: mustprogress uwtable
define dso_local void @_Z14floyd_warshallv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #3
  store i32 1, ptr %1, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %61, %0
  %7 = load i32, ptr %1, align 4, !tbaa !5
  %8 = load i32, ptr @n, align 4, !tbaa !5
  %9 = icmp sle i32 %7, %8
  br i1 %9, label %11, label %10

10:                                               ; preds = %6
  store i32 2, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #3
  br label %64

11:                                               ; preds = %6
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 1, ptr %3, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %57, %11
  %13 = load i32, ptr %3, align 4, !tbaa !5
  %14 = load i32, ptr @n, align 4, !tbaa !5
  %15 = icmp sle i32 %13, %14
  br i1 %15, label %17, label %16

16:                                               ; preds = %12
  store i32 5, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  br label %60

17:                                               ; preds = %12
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %53, %17
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = load i32, ptr @n, align 4, !tbaa !5
  %21 = icmp sle i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  store i32 8, ptr %2, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  br label %56

23:                                               ; preds = %18
  %24 = load i32, ptr %3, align 4, !tbaa !5
  %25 = sext i32 %24 to i64
  %26 = getelementptr inbounds [501 x [501 x i64]], ptr @dist, i64 0, i64 %25
  %27 = load i32, ptr %4, align 4, !tbaa !5
  %28 = sext i32 %27 to i64
  %29 = getelementptr inbounds [501 x i64], ptr %26, i64 0, i64 %28
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #3
  %30 = load i32, ptr %3, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [501 x [501 x i64]], ptr @dist, i64 0, i64 %31
  %33 = load i32, ptr %1, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [501 x i64], ptr %32, i64 0, i64 %34
  %36 = load i64, ptr %35, align 8, !tbaa !9
  %37 = load i32, ptr %1, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = getelementptr inbounds [501 x [501 x i64]], ptr @dist, i64 0, i64 %38
  %40 = load i32, ptr %4, align 4, !tbaa !5
  %41 = sext i32 %40 to i64
  %42 = getelementptr inbounds [501 x i64], ptr %39, i64 0, i64 %41
  %43 = load i64, ptr %42, align 8, !tbaa !9
  %44 = add nsw i64 %36, %43
  store i64 %44, ptr %5, align 8, !tbaa !9
  %45 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %29, ptr noundef nonnull align 8 dereferenceable(8) %5)
  %46 = load i64, ptr %45, align 8, !tbaa !9
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [501 x [501 x i64]], ptr @dist, i64 0, i64 %48
  %50 = load i32, ptr %4, align 4, !tbaa !5
  %51 = sext i32 %50 to i64
  %52 = getelementptr inbounds [501 x i64], ptr %49, i64 0, i64 %51
  store i64 %46, ptr %52, align 8, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #3
  br label %53

53:                                               ; preds = %23
  %54 = load i32, ptr %4, align 4, !tbaa !5
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %4, align 4, !tbaa !5
  br label %18, !llvm.loop !11

56:                                               ; preds = %22
  br label %57

57:                                               ; preds = %56
  %58 = load i32, ptr %3, align 4, !tbaa !5
  %59 = add nsw i32 %58, 1
  store i32 %59, ptr %3, align 4, !tbaa !5
  br label %12, !llvm.loop !13

60:                                               ; preds = %16
  br label %61

61:                                               ; preds = %60
  %62 = load i32, ptr %1, align 4, !tbaa !5
  %63 = add nsw i32 %62, 1
  store i32 %63, ptr %1, align 4, !tbaa !5
  br label %6, !llvm.loop !14

64:                                               ; preds = %10
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@dist = external dso_local global [501 x [501 x i64]], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z14floyd_warshallv() local_unnamed_addr #0 {
  %1 = alloca i64, align 8
  %2 = load i32, ptr @n, align 4, !tbaa !5
  %.not24 = icmp slt i32 %2, 1
  br i1 %.not24, label %._crit_edge26, label %.preheader18

.preheader18:                                     ; preds = %0, %._crit_edge23
  %3 = phi i32 [ %7, %._crit_edge23 ], [ %2, %0 ]
  %indvars.iv33 = phi i64 [ %indvars.iv.next34, %._crit_edge23 ], [ 1, %0 ]
  %.not1621 = icmp slt i32 %3, 1
  br i1 %.not1621, label %._crit_edge23, label %.preheader

._crit_edge26:                                    ; preds = %._crit_edge23, %0
  ret void

.preheader:                                       ; preds = %.preheader18, %._crit_edge
  %4 = phi i32 [ %9, %._crit_edge ], [ %3, %.preheader18 ]
  %5 = phi i32 [ %10, %._crit_edge ], [ %3, %.preheader18 ]
  %indvars.iv30 = phi i64 [ %indvars.iv.next31, %._crit_edge ], [ 1, %.preheader18 ]
  %.not1719 = icmp slt i32 %5, 1
  br i1 %.not1719, label %.preheader.._crit_edge_crit_edge, label %.lr.ph

.preheader.._crit_edge_crit_edge:                 ; preds = %.preheader
  %.pre = sext i32 %5 to i64
  br label %._crit_edge

.lr.ph:                                           ; preds = %.preheader
  %6 = getelementptr inbounds [501 x [501 x i64]], ptr @dist, i64 0, i64 %indvars.iv30, i64 %indvars.iv33
  br label %11

._crit_edge23:                                    ; preds = %._crit_edge, %.preheader18
  %7 = phi i32 [ %3, %.preheader18 ], [ %9, %._crit_edge ]
  %indvars.iv.next34 = add nuw nsw i64 %indvars.iv33, 1
  %8 = sext i32 %7 to i64
  %.not.not = icmp slt i64 %indvars.iv33, %8
  br i1 %.not.not, label %.preheader18, label %._crit_edge26, !llvm.loop !9

._crit_edge:                                      ; preds = %11, %.preheader.._crit_edge_crit_edge
  %.pre-phi = phi i64 [ %.pre, %.preheader.._crit_edge_crit_edge ], [ %20, %11 ]
  %9 = phi i32 [ %4, %.preheader.._crit_edge_crit_edge ], [ %19, %11 ]
  %10 = phi i32 [ %5, %.preheader.._crit_edge_crit_edge ], [ %19, %11 ]
  %indvars.iv.next31 = add nuw nsw i64 %indvars.iv30, 1
  %.not16.not = icmp slt i64 %indvars.iv30, %.pre-phi
  br i1 %.not16.not, label %.preheader, label %._crit_edge23, !llvm.loop !12

11:                                               ; preds = %.lr.ph, %11
  %indvars.iv = phi i64 [ 1, %.lr.ph ], [ %indvars.iv.next, %11 ]
  %12 = getelementptr inbounds [501 x [501 x i64]], ptr @dist, i64 0, i64 %indvars.iv30, i64 %indvars.iv
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
  %13 = load i64, ptr %6, align 8, !tbaa !13
  %14 = getelementptr inbounds [501 x [501 x i64]], ptr @dist, i64 0, i64 %indvars.iv33, i64 %indvars.iv
  %15 = load i64, ptr %14, align 8, !tbaa !13
  %16 = add nsw i64 %15, %13
  store i64 %16, ptr %1, align 8, !tbaa !13
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %1)
  %18 = load i64, ptr %17, align 8, !tbaa !13
  store i64 %18, ptr %12, align 8, !tbaa !13
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %19 = load i32, ptr @n, align 4, !tbaa !5
  %20 = sext i32 %19 to i64
  %.not17.not = icmp slt i64 %indvars.iv, %20
  br i1 %.not17.not, label %11, label %._crit_edge, !llvm.loop !15
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.unswitch.partial.disable"}
!12 = distinct !{!12, !10, !11}
!13 = !{!14, !14, i64 0}
!14 = !{!"long long", !7, i64 0}
!15 = distinct !{!15, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyCFGPass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SCCPPass,SROAPass,SimpleLoopUnswitchPass,SimplifyCFGPass