; LLVM IR from aap/pdp6 :: emu (apr)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Apr = type { %struct.Device, %struct.IOBus, %struct.Membus, i32, %struct.AprState, %struct.AprState, i32, i64, i64, i32, i32, i32, i8, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, ptr, ptr, i32, i8, [20 x %struct.TPulse], ptr, ptr }
%struct.Device = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.IOBus = type { i64, i64, i64, i64, i64, i64, i32, [128 x %struct.Busdev] }
%struct.Busdev = type { ptr, ptr, i8 }
%struct.Membus = type { i64, i64, i64, i64, i64, i64, ptr, [16 x ptr] }
%struct.AprState = type { i64, i64, i64 }
%struct.TPulse = type { ptr, ptr, i32 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local zeroext i8 @relocate(ptr noundef %0) #1 {
  %2 = alloca ptr, align 8
  %3 = alloca i8, align 1
  %4 = alloca i8, align 1
  %5 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #2
  %6 = load ptr, ptr %2, align 8, !tbaa !5
  %7 = getelementptr inbounds %struct.Apr, ptr %6, i32 0, i32 10
  %8 = load i32, ptr %7, align 4, !tbaa !9
  %9 = lshr i32 %8, 10
  %10 = and i32 %9, 255
  %11 = trunc i32 %10 to i8
  store i8 %11, ptr %3, align 1, !tbaa !18
  %12 = load ptr, ptr %2, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.Apr, ptr %12, i32 0, i32 57
  %14 = load i8, ptr %13, align 1, !tbaa !19
  %15 = icmp ne i8 %14, 0
  br i1 %15, label %16, label %34

16:                                               ; preds = %1
  %17 = load ptr, ptr %2, align 8, !tbaa !5
  %18 = getelementptr inbounds %struct.Apr, ptr %17, i32 0, i32 55
  %19 = load i8, ptr %18, align 1, !tbaa !20
  %20 = zext i8 %19 to i32
  %21 = icmp ne i32 %20, 0
  br i1 %21, label %34, label %22

22:                                               ; preds = %16
  %23 = load ptr, ptr %2, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.Apr, ptr %23, i32 0, i32 10
  %25 = load i32, ptr %24, align 4, !tbaa !9
  %26 = and i32 %25, 262128
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %34, label %28

28:                                               ; preds = %22
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = getelementptr inbounds %struct.Apr, ptr %29, i32 0, i32 56
  %31 = load i8, ptr %30, align 2, !tbaa !21
  %32 = zext i8 %31 to i32
  %33 = icmp ne i32 %32, 0
  br label %34

34:                                               ; preds = %28, %22, %16, %1
  %35 = phi i1 [ true, %22 ], [ true, %16 ], [ true, %1 ], [ %33, %28 ]
  %36 = zext i1 %35 to i32
  %37 = trunc i32 %36 to i8
  %38 = load ptr, ptr %2, align 8, !tbaa !5
  %39 = getelementptr inbounds %struct.Apr, ptr %38, i32 0, i32 145
  store i8 %37, ptr %39, align 2, !tbaa !22
  %40 = load i8, ptr %3, align 1, !tbaa !18
  %41 = zext i8 %40 to i32
  %42 = load ptr, ptr %2, align 8, !tbaa !5
  %43 = getelementptr inbounds %struct.Apr, ptr %42, i32 0, i32 15
  %44 = load i8, ptr %43, align 2, !tbaa !23
  %45 = zext i8 %44 to i32
  %46 = icmp sle i32 %41, %45
  %47 = zext i1 %46 to i32
  %48 = trunc i32 %47 to i8
  store i8 %48, ptr %4, align 1, !tbaa !18
  %49 = load ptr, ptr %2, align 8, !tbaa !5
  %50 = getelementptr inbounds %struct.Apr, ptr %49, i32 0, i32 71
  %51 = load i8, ptr %50, align 1, !tbaa !24
  %52 = icmp ne i8 %51, 0
  br i1 %52, label %59, label %53

53:                                               ; preds = %34
  %54 = load ptr, ptr %2, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.Apr, ptr %54, i32 0, i32 10
  %56 = load i32, ptr %55, align 4, !tbaa !9
  %57 = and i32 %56, 262128
  %58 = icmp eq i32 %57, 0
  br label %59

59:                                               ; preds = %53, %34
  %60 = phi i1 [ false, %34 ], [ %58, %53 ]
  %61 = zext i1 %60 to i32
  %62 = trunc i32 %61 to i8
  store i8 %62, ptr %5, align 1, !tbaa !18
  %63 = load i8, ptr %3, align 1, !tbaa !18
  %64 = load ptr, ptr %2, align 8, !tbaa !5
  %65 = getelementptr inbounds %struct.Apr, ptr %64, i32 0, i32 17
  store i8 %63, ptr %65, align 4, !tbaa !25
  %66 = load ptr, ptr %2, align 8, !tbaa !5
  %67 = getelementptr inbounds %struct.Apr, ptr %66, i32 0, i32 145
  %68 = load i8, ptr %67, align 2, !tbaa !22
  %69 = icmp ne i8 %68, 0
  br i1 %69, label %81, label %70

70:                                               ; preds = %59
  %71 = load ptr, ptr %2, align 8, !tbaa !5
  %72 = getelementptr inbounds %struct.Apr, ptr %71, i32 0, i32 16
  %73 = load i8, ptr %72, align 1, !tbaa !26
  %74 = zext i8 %73 to i32
  %75 = load ptr, ptr %2, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.Apr, ptr %75, i32 0, i32 17
  %77 = load i8, ptr %76, align 4, !tbaa !25
  %78 = zext i8 %77 to i32
  %79 = add nsw i32 %78, %74
  %80 = trunc i32 %79 to i8
  store i8 %80, ptr %76, align 4, !tbaa !25
  br label %81

81:                                               ; preds = %70, %59
  %82 = load ptr, ptr %2, align 8, !tbaa !5
  %83 = getelementptr inbounds %struct.Apr, ptr %82, i32 0, i32 2
  %84 = getelementptr inbounds %struct.Membus, ptr %83, i32 0, i32 0
  %85 = load i64, ptr %84, align 8, !tbaa !27
  %86 = and i64 %85, -1073741810
  store i64 %86, ptr %84, align 8, !tbaa !27
  %87 = load i8, ptr %5, align 1, !tbaa !18
  %88 = zext i8 %87 to i32
  %89 = icmp ne i32 %88, 0
  %90 = zext i1 %89 to i64
  %91 = select i1 %89, i32 524288, i32 262144
  %92 = sext i32 %91 to i64
  %93 = load ptr, ptr %2, align 8, !tbaa !5
  %94 = getelementptr inbounds %struct.Apr, ptr %93, i32 0, i32 2
  %95 = getelementptr inbounds %struct.Membus, ptr %94, i32 0, i32 0
  %96 = load i64, ptr %95, align 8, !tbaa !27
  %97 = or i64 %96, %92
  store i64 %97, ptr %95, align 8, !tbaa !27
  %98 = load ptr, ptr %2, align 8, !tbaa !5
  %99 = getelementptr inbounds %struct.Apr, ptr %98, i32 0, i32 10
  %100 = load i32, ptr %99, align 4, !tbaa !9
  %101 = and i32 %100, 1023
  %102 = shl i32 %101, 4
  %103 = zext i32 %102 to i64
  %104 = load ptr, ptr %2, align 8, !tbaa !5
  %105 = getelementptr inbounds %struct.Apr, ptr %104, i32 0, i32 2
  %106 = getelementptr inbounds %struct.Membus, ptr %105, i32 0, i32 0
  %107 = load i64, ptr %106, align 8, !tbaa !27
  %108 = or i64 %107, %103
  store i64 %108, ptr %106, align 8, !tbaa !27
  %109 = load ptr, ptr %2, align 8, !tbaa !5
  %110 = getelementptr inbounds %struct.Apr, ptr %109, i32 0, i32 17
  %111 = load i8, ptr %110, align 4, !tbaa !25
  %112 = zext i8 %111 to i64
  %113 = and i64 %112, 15
  %114 = shl i64 %113, 14
  %115 = load ptr, ptr %2, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.Apr, ptr %115, i32 0, i32 2
  %117 = getelementptr inbounds %struct.Membus, ptr %116, i32 0, i32 0
  %118 = load i64, ptr %117, align 8, !tbaa !27
  %119 = or i64 %118, %114
  store i64 %119, ptr %117, align 8, !tbaa !27
  %120 = load ptr, ptr %2, align 8, !tbaa !5
  %121 = getelementptr inbounds %struct.Apr, ptr %120, i32 0, i32 17
  %122 = load i8, ptr %121, align 4, !tbaa !25
  %123 = zext i8 %122 to i32
  %124 = and i32 %123, 16
  %125 = icmp ne i32 %124, 0
  %126 = zext i1 %125 to i64
  %127 = select i1 %125, i32 8388609, i32 4194304
  %128 = sext i32 %127 to i64
  %129 = load ptr, ptr %2, align 8, !tbaa !5
  %130 = getelementptr inbounds %struct.Apr, ptr %129, i32 0, i32 2
  %131 = getelementptr inbounds %struct.Membus, ptr %130, i32 0, i32 0
  %132 = load i64, ptr %131, align 8, !tbaa !27
  %133 = or i64 %132, %128
  store i64 %133, ptr %131, align 8, !tbaa !27
  %134 = load ptr, ptr %2, align 8, !tbaa !5
  %135 = getelementptr inbounds %struct.Apr, ptr %134, i32 0, i32 17
  %136 = load i8, ptr %135, align 4, !tbaa !25
  %137 = zext i8 %136 to i32
  %138 = and i32 %137, 32
  %139 = icmp ne i32 %138, 0
  %140 = zext i1 %139 to i64
  %141 = select i1 %139, i32 33554432, i32 16777216
  %142 = sext i32 %141 to i64
  %143 = load ptr, ptr %2, align 8, !tbaa !5
  %144 = getelementptr inbounds %struct.Apr, ptr %143, i32 0, i32 2
  %145 = getelementptr inbounds %struct.Membus, ptr %144, i32 0, i32 0
  %146 = load i64, ptr %145, align 8, !tbaa !27
  %147 = or i64 %146, %142
  store i64 %147, ptr %145, align 8, !tbaa !27
  %148 = load ptr, ptr %2, align 8, !tbaa !5
  %149 = getelementptr inbounds %struct.Apr, ptr %148, i32 0, i32 17
  %150 = load i8, ptr %149, align 4, !tbaa !25
  %151 = zext i8 %150 to i32
  %152 = and i32 %151, 64
  %153 = icmp ne i32 %152, 0
  %154 = zext i1 %153 to i64
  %155 = select i1 %153, i32 134217728, i32 67108864
  %156 = sext i32 %155 to i64
  %157 = load ptr, ptr %2, align 8, !tbaa !5
  %158 = getelementptr inbounds %struct.Apr, ptr %157, i32 0, i32 2
  %159 = getelementptr inbounds %struct.Membus, ptr %158, i32 0, i32 0
  %160 = load i64, ptr %159, align 8, !tbaa !27
  %161 = or i64 %160, %156
  store i64 %161, ptr %159, align 8, !tbaa !27
  %162 = load ptr, ptr %2, align 8, !tbaa !5
  %163 = getelementptr inbounds %struct.Apr, ptr %162, i32 0, i32 17
  %164 = load i8, ptr %163, align 4, !tbaa !25
  %165 = zext i8 %164 to i32
  %166 = and i32 %165, 128
  %167 = icmp ne i32 %166, 0
  %168 = zext i1 %167 to i64
  %169 = select i1 %167, i32 536870912, i32 268435456
  %170 = sext i32 %169 to i64
  %171 = load ptr, ptr %2, align 8, !tbaa !5
  %172 = getelementptr inbounds %struct.Apr, ptr %171, i32 0, i32 2
  %173 = getelementptr inbounds %struct.Membus, ptr %172, i32 0, i32 0
  %174 = load i64, ptr %173, align 8, !tbaa !27
  %175 = or i64 %174, %170
  store i64 %175, ptr %173, align 8, !tbaa !27
  %176 = load ptr, ptr %2, align 8, !tbaa !5
  %177 = getelementptr inbounds %struct.Apr, ptr %176, i32 0, i32 10
  %178 = load i32, ptr %177, align 4, !tbaa !9
  %179 = and i32 %178, 1
  %180 = icmp ne i32 %179, 0
  %181 = zext i1 %180 to i64
  %182 = select i1 %180, i32 2097152, i32 1048576
  %183 = sext i32 %182 to i64
  %184 = load ptr, ptr %2, align 8, !tbaa !5
  %185 = getelementptr inbounds %struct.Apr, ptr %184, i32 0, i32 2
  %186 = getelementptr inbounds %struct.Membus, ptr %185, i32 0, i32 0
  %187 = load i64, ptr %186, align 8, !tbaa !27
  %188 = or i64 %187, %183
  store i64 %188, ptr %186, align 8, !tbaa !27
  %189 = load i8, ptr %4, align 1, !tbaa !18
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #2
  ret i8 %189
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !14, i64 3460}
!10 = !{!"Apr", !11, i64 0, !12, i64 64, !15, i64 3192, !14, i64 3376, !16, i64 3384, !16, i64 3408, !14, i64 3432, !13, i64 3440, !13, i64 3448, !14, i64 3456, !14, i64 3460, !14, i64 3464, !7, i64 3468, !17, i64 3470, !17, i64 3472, !7, i64 3474, !7, i64 3475, !7, i64 3476, !7, i64 3477, !7, i64 3478, !7, i64 3479, !7, i64 3480, !7, i64 3481, !7, i64 3482, !7, i64 3483, !7, i64 3484, !7, i64 3485, !7, i64 3486, !7, i64 3487, !7, i64 3488, !7, i64 3489, !7, i64 3490, !7, i64 3491, !7, i64 3492, !7, i64 3493, !7, i64 3494, !7, i64 3495, !7, i64 3496, !7, i64 3497, !7, i64 3498, !7, i64 3499, !7, i64 3500, !7, i64 3501, !7, i64 3502, !14, i64 3504, !14, i64 3508, !7, i64 3512, !7, i64 3513, !7, i64 3514, !7, i64 3515, !7, i64 3516, !7, i64 3517, !7, i64 3518, !7, i64 3519, !7, i64 3520, !7, i64 3521, !7, i64 3522, !7, i64 3523, !7, i64 3524, !7, i64 3525, !7, i64 3526, !7, i64 3527, !7, i64 3528, !7, i64 3529, !7, i64 3530, !7, i64 3531, !7, i64 3532, !7, i64 3533, !7, i64 3534, !7, i64 3535, !7, i64 3536, !7, i64 3537, !7, i64 3538, !7, i64 3539, !7, i64 3540, !7, i64 3541, !7, i64 3542, !7, i64 3543, !7, i64 3544, !7, i64 3545, !7, i64 3546, !7, i64 3547, !7, i64 3548, !7, i64 3549, !7, i64 3550, !7, i64 3551, !14, i64 3552, !7, i64 3556, !7, i64 3557, !7, i64 3558, !7, i64 3559, !7, i64 3560, !7, i64 3561, !7, i64 3562, !7, i64 3563, !7, i64 3564, !7, i64 3565, !7, i64 3566, !7, i64 3567, !7, i64 3568, !7, i64 3569, !7, i64 3570, !7, i64 3571, !7, i64 3572, !7, i64 3573, !7, i64 3574, !7, i64 3575, !7, i64 3576, !7, i64 3577, !7, i64 3578, !7, i64 3579, !7, i64 3580, !7, i64 3581, !7, i64 3582, !7, i64 3583, !7, i64 3584, !7, i64 3585, !7, i64 3586, !7, i64 3587, !7, i64 3588, !7, i64 3589, !7, i64 3590, !7, i64 3591, !7, i64 3592, !7, i64 3593, !7, i64 3594, !7, i64 3595, !7, i64 3596, !7, i64 3597, !7, i64 3598, !7, i64 3599, !7, i64 3600, !7, i64 3601, !7, i64 3602, !7, i64 3603, !7, i64 3604, !7, i64 3605, !7, i64 3606, !7, i64 3607, !7, i64 3608, !7, i64 3609, !7, i64 3610, !7, i64 3611, !7, i64 3612, !7, i64 3613, !7, i64 3614, !14, i64 3616, !14, i64 3620, !14, i64 3624, !7, i64 3628, !7, i64 3629, !7, i64 3630, !7, i64 3631, !7, i64 3632, !7, i64 3633, !7, i64 3634, !7, i64 3635, !7, i64 3636, !7, i64 3637, !7, i64 3638, !7, i64 3639, !7, i64 3640, !7, i64 3641, !7, i64 3642, !14, i64 3644, !7, i64 3648, !7, i64 3649, !7, i64 3650, !7, i64 3651, !7, i64 3652, !7, i64 3653, !7, i64 3654, !7, i64 3655, !7, i64 3656, !7, i64 3657, !7, i64 3658, !6, i64 3664, !6, i64 3672, !14, i64 3680, !7, i64 3684, !7, i64 3688, !6, i64 4168, !6, i64 4176}
!11 = !{!"Device", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56}
!12 = !{!"IOBus", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !14, i64 48, !7, i64 56}
!13 = !{!"long", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!"Membus", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !6, i64 48, !7, i64 56}
!16 = !{!"AprState", !13, i64 0, !13, i64 8, !13, i64 16}
!17 = !{!"short", !7, i64 0}
!18 = !{!7, !7, i64 0}
!19 = !{!10, !7, i64 3523}
!20 = !{!10, !7, i64 3521}
!21 = !{!10, !7, i64 3522}
!22 = !{!10, !7, i64 3614}
!23 = !{!10, !7, i64 3474}
!24 = !{!10, !7, i64 3537}
!25 = !{!10, !7, i64 3476}
!26 = !{!10, !7, i64 3475}
!27 = !{!10, !13, i64 3192}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define dso_local zeroext range(i8 0, 2) i8 @relocate(ptr nocapture noundef %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds i8, ptr %0, i64 3460
  %3 = load i32, ptr %2, align 4, !tbaa !5
  %4 = lshr i32 %3, 10
  %5 = trunc i32 %4 to i8
  %6 = getelementptr inbounds i8, ptr %0, i64 3523
  %7 = load i8, ptr %6, align 1, !tbaa !17
  %.not = icmp eq i8 %7, 0
  br i1 %.not, label %.thread, label %8

8:                                                ; preds = %1
  %9 = getelementptr inbounds i8, ptr %0, i64 3521
  %10 = load i8, ptr %9, align 1, !tbaa !18
  %.not32 = icmp ne i8 %10, 0
  %11 = and i32 %3, 262128
  %12 = icmp eq i32 %11, 0
  %or.cond = select i1 %.not32, i1 true, i1 %12
  br i1 %or.cond, label %.thread, label %19

.thread:                                          ; preds = %8, %1
  %13 = getelementptr inbounds i8, ptr %0, i64 3614
  store i8 1, ptr %13, align 2, !tbaa !19
  %14 = getelementptr inbounds i8, ptr %0, i64 3474
  %15 = load i8, ptr %14, align 2, !tbaa !20
  %16 = getelementptr inbounds i8, ptr %0, i64 3537
  %17 = load i8, ptr %16, align 1, !tbaa !21
  %18 = getelementptr inbounds i8, ptr %0, i64 3476
  store i8 %5, ptr %18, align 4, !tbaa !22
  br label %34

19:                                               ; preds = %8
  %20 = getelementptr inbounds i8, ptr %0, i64 3522
  %21 = load i8, ptr %20, align 2, !tbaa !23
  %22 = icmp ne i8 %21, 0
  %23 = zext i1 %22 to i8
  %24 = getelementptr inbounds i8, ptr %0, i64 3614
  store i8 %23, ptr %24, align 2, !tbaa !19
  %25 = getelementptr inbounds i8, ptr %0, i64 3474
  %26 = load i8, ptr %25, align 2, !tbaa !20
  %27 = getelementptr inbounds i8, ptr %0, i64 3537
  %28 = load i8, ptr %27, align 1, !tbaa !21
  %29 = getelementptr inbounds i8, ptr %0, i64 3476
  store i8 %5, ptr %29, align 4, !tbaa !22
  br i1 %22, label %34, label %30

30:                                               ; preds = %19
  %31 = getelementptr inbounds i8, ptr %0, i64 3475
  %32 = load i8, ptr %31, align 1, !tbaa !24
  %33 = add i8 %32, %5
  store i8 %33, ptr %29, align 4, !tbaa !22
  br label %34

34:                                               ; preds = %.thread, %30, %19
  %35 = phi i8 [ %28, %30 ], [ %28, %19 ], [ %17, %.thread ]
  %36 = phi i8 [ %26, %30 ], [ %26, %19 ], [ %15, %.thread ]
  %37 = phi i8 [ %33, %30 ], [ %5, %19 ], [ %5, %.thread ]
  %.not33 = icmp eq i8 %35, 0
  %38 = and i32 %3, 262128
  %.not36 = icmp eq i32 %38, 0
  %39 = select i1 %.not33, i1 %.not36, i1 false
  %.not35 = select i1 %39, i64 524288, i64 262144
  %40 = and i32 %4, 255
  %41 = zext i8 %36 to i32
  %42 = icmp ule i32 %40, %41
  %43 = zext i1 %42 to i8
  %44 = getelementptr inbounds i8, ptr %0, i64 3192
  %45 = load i64, ptr %44, align 8, !tbaa !25
  %46 = and i64 %45, -1073741810
  %47 = shl i32 %3, 4
  %48 = and i32 %47, 16368
  %49 = zext nneg i32 %48 to i64
  %50 = or disjoint i64 %.not35, %49
  %51 = or disjoint i64 %50, %46
  %52 = and i8 %37, 15
  %53 = zext nneg i8 %52 to i64
  %54 = shl nuw nsw i64 %53, 14
  %55 = and i8 %37, 16
  %.not37 = icmp eq i8 %55, 0
  %56 = select i1 %.not37, i64 4194304, i64 8388609
  %57 = or disjoint i64 %54, %56
  %58 = and i8 %37, 32
  %.not38 = icmp eq i8 %58, 0
  %59 = select i1 %.not38, i64 16777216, i64 33554432
  %60 = and i8 %37, 64
  %.not39 = icmp eq i8 %60, 0
  %61 = select i1 %.not39, i64 67108864, i64 134217728
  %62 = or disjoint i64 %59, %61
  %63 = or disjoint i64 %57, %62
  %.not40 = icmp sgt i8 %37, -1
  %64 = select i1 %.not40, i64 268435456, i64 536870912
  %65 = or disjoint i64 %63, %64
  %66 = and i32 %3, 1
  %.not41 = icmp eq i32 %66, 0
  %67 = select i1 %.not41, i64 1048576, i64 2097152
  %68 = or i64 %65, %67
  %69 = or i64 %68, %51
  store i64 %69, ptr %44, align 8, !tbaa !25
  ret i8 %43
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !13, i64 3460}
!6 = !{!"Apr", !7, i64 0, !11, i64 64, !14, i64 3192, !13, i64 3376, !15, i64 3384, !15, i64 3408, !13, i64 3432, !12, i64 3440, !12, i64 3448, !13, i64 3456, !13, i64 3460, !13, i64 3464, !9, i64 3468, !16, i64 3470, !16, i64 3472, !9, i64 3474, !9, i64 3475, !9, i64 3476, !9, i64 3477, !9, i64 3478, !9, i64 3479, !9, i64 3480, !9, i64 3481, !9, i64 3482, !9, i64 3483, !9, i64 3484, !9, i64 3485, !9, i64 3486, !9, i64 3487, !9, i64 3488, !9, i64 3489, !9, i64 3490, !9, i64 3491, !9, i64 3492, !9, i64 3493, !9, i64 3494, !9, i64 3495, !9, i64 3496, !9, i64 3497, !9, i64 3498, !9, i64 3499, !9, i64 3500, !9, i64 3501, !9, i64 3502, !13, i64 3504, !13, i64 3508, !9, i64 3512, !9, i64 3513, !9, i64 3514, !9, i64 3515, !9, i64 3516, !9, i64 3517, !9, i64 3518, !9, i64 3519, !9, i64 3520, !9, i64 3521, !9, i64 3522, !9, i64 3523, !9, i64 3524, !9, i64 3525, !9, i64 3526, !9, i64 3527, !9, i64 3528, !9, i64 3529, !9, i64 3530, !9, i64 3531, !9, i64 3532, !9, i64 3533, !9, i64 3534, !9, i64 3535, !9, i64 3536, !9, i64 3537, !9, i64 3538, !9, i64 3539, !9, i64 3540, !9, i64 3541, !9, i64 3542, !9, i64 3543, !9, i64 3544, !9, i64 3545, !9, i64 3546, !9, i64 3547, !9, i64 3548, !9, i64 3549, !9, i64 3550, !9, i64 3551, !13, i64 3552, !9, i64 3556, !9, i64 3557, !9, i64 3558, !9, i64 3559, !9, i64 3560, !9, i64 3561, !9, i64 3562, !9, i64 3563, !9, i64 3564, !9, i64 3565, !9, i64 3566, !9, i64 3567, !9, i64 3568, !9, i64 3569, !9, i64 3570, !9, i64 3571, !9, i64 3572, !9, i64 3573, !9, i64 3574, !9, i64 3575, !9, i64 3576, !9, i64 3577, !9, i64 3578, !9, i64 3579, !9, i64 3580, !9, i64 3581, !9, i64 3582, !9, i64 3583, !9, i64 3584, !9, i64 3585, !9, i64 3586, !9, i64 3587, !9, i64 3588, !9, i64 3589, !9, i64 3590, !9, i64 3591, !9, i64 3592, !9, i64 3593, !9, i64 3594, !9, i64 3595, !9, i64 3596, !9, i64 3597, !9, i64 3598, !9, i64 3599, !9, i64 3600, !9, i64 3601, !9, i64 3602, !9, i64 3603, !9, i64 3604, !9, i64 3605, !9, i64 3606, !9, i64 3607, !9, i64 3608, !9, i64 3609, !9, i64 3610, !9, i64 3611, !9, i64 3612, !9, i64 3613, !9, i64 3614, !13, i64 3616, !13, i64 3620, !13, i64 3624, !9, i64 3628, !9, i64 3629, !9, i64 3630, !9, i64 3631, !9, i64 3632, !9, i64 3633, !9, i64 3634, !9, i64 3635, !9, i64 3636, !9, i64 3637, !9, i64 3638, !9, i64 3639, !9, i64 3640, !9, i64 3641, !9, i64 3642, !13, i64 3644, !9, i64 3648, !9, i64 3649, !9, i64 3650, !9, i64 3651, !9, i64 3652, !9, i64 3653, !9, i64 3654, !9, i64 3655, !9, i64 3656, !9, i64 3657, !9, i64 3658, !8, i64 3664, !8, i64 3672, !13, i64 3680, !9, i64 3684, !9, i64 3688, !8, i64 4168, !8, i64 4176}
!7 = !{!"Device", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !8, i64 40, !8, i64 48, !8, i64 56}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"IOBus", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !13, i64 48, !9, i64 56}
!12 = !{!"long", !9, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!"Membus", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !8, i64 48, !9, i64 56}
!15 = !{!"AprState", !12, i64 0, !12, i64 8, !12, i64 16}
!16 = !{!"short", !9, i64 0}
!17 = !{!6, !9, i64 3523}
!18 = !{!6, !9, i64 3521}
!19 = !{!6, !9, i64 3614}
!20 = !{!6, !9, i64 3474}
!21 = !{!6, !9, i64 3537}
!22 = !{!6, !9, i64 3476}
!23 = !{!6, !9, i64 3522}
!24 = !{!6, !9, i64 3475}
!25 = !{!6, !12, i64 3192}


; Effective O3 passes: DSEPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass