; LLVM IR from viveakrt/Competitive-programing :: SPOJ/adaaphid.ll (Z6insertRP4nodeS0_)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.node = type { i32, i32, i64, i64, i64, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5updszP4node(ptr noundef) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5splitP4nodeRS0_S1_x(ptr noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6insertRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef %1) #1 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  %5 = load ptr, ptr %3, align 8, !tbaa !5
  %6 = load ptr, ptr %5, align 8, !tbaa !5
  %7 = icmp ne ptr %6, null
  br i1 %7, label %11, label %8

8:                                                ; preds = %2
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %9, ptr %10, align 8, !tbaa !5
  br label %53

11:                                               ; preds = %2
  %12 = load ptr, ptr %4, align 8, !tbaa !5
  %13 = getelementptr inbounds %struct.node, ptr %12, i32 0, i32 1
  %14 = load i32, ptr %13, align 4, !tbaa !9
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = load ptr, ptr %15, align 8, !tbaa !5
  %17 = getelementptr inbounds %struct.node, ptr %16, i32 0, i32 1
  %18 = load i32, ptr %17, align 4, !tbaa !9
  %19 = icmp sgt i32 %14, %18
  br i1 %19, label %20, label %32

20:                                               ; preds = %11
  %21 = load ptr, ptr %3, align 8, !tbaa !5
  %22 = load ptr, ptr %21, align 8, !tbaa !5
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.node, ptr %23, i32 0, i32 5
  %25 = load ptr, ptr %4, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.node, ptr %25, i32 0, i32 6
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.node, ptr %27, i32 0, i32 2
  %29 = load i64, ptr %28, align 8, !tbaa !13
  call void @_Z5splitP4nodeRS0_S1_x(ptr noundef %22, ptr noundef nonnull align 8 dereferenceable(8) %24, ptr noundef nonnull align 8 dereferenceable(8) %26, i64 noundef %29)
  %30 = load ptr, ptr %4, align 8, !tbaa !5
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %30, ptr %31, align 8, !tbaa !5
  br label %52

32:                                               ; preds = %11
  %33 = load ptr, ptr %4, align 8, !tbaa !5
  %34 = getelementptr inbounds %struct.node, ptr %33, i32 0, i32 2
  %35 = load i64, ptr %34, align 8, !tbaa !13
  %36 = load ptr, ptr %3, align 8, !tbaa !5
  %37 = load ptr, ptr %36, align 8, !tbaa !5
  %38 = getelementptr inbounds %struct.node, ptr %37, i32 0, i32 2
  %39 = load i64, ptr %38, align 8, !tbaa !13
  %40 = icmp sgt i64 %35, %39
  br i1 %40, label %41, label %46

41:                                               ; preds = %32
  %42 = load ptr, ptr %3, align 8, !tbaa !5
  %43 = load ptr, ptr %42, align 8, !tbaa !5
  %44 = getelementptr inbounds %struct.node, ptr %43, i32 0, i32 6
  %45 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_Z6insertRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %44, ptr noundef %45)
  br label %51

46:                                               ; preds = %32
  %47 = load ptr, ptr %3, align 8, !tbaa !5
  %48 = load ptr, ptr %47, align 8, !tbaa !5
  %49 = getelementptr inbounds %struct.node, ptr %48, i32 0, i32 5
  %50 = load ptr, ptr %4, align 8, !tbaa !5
  call void @_Z6insertRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %49, ptr noundef %50)
  br label %51

51:                                               ; preds = %46, %41
  br label %52

52:                                               ; preds = %51, %20
  br label %53

53:                                               ; preds = %52, %8
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = load ptr, ptr %54, align 8, !tbaa !5
  call void @_Z5updszP4node(ptr noundef %55)
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"_ZTS4node", !11, i64 0, !11, i64 4, !12, i64 8, !12, i64 16, !12, i64 24, !6, i64 32, !6, i64 40}
!11 = !{!"int", !7, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!10, !12, i64 8}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z5updszP4node(ptr noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z5splitP4nodeRS0_S1_x(ptr noundef, ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8), i64 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z6insertRP4nodeS0_(ptr nocapture noundef nonnull align 8 dereferenceable(8) %0, ptr noundef %1) local_unnamed_addr #1 {
  %3 = load ptr, ptr %0, align 8, !tbaa !5
  %.not = icmp eq ptr %3, null
  br i1 %.not, label %4, label %5

4:                                                ; preds = %2
  store ptr %1, ptr %0, align 8, !tbaa !5
  br label %26

5:                                                ; preds = %2
  %6 = getelementptr inbounds i8, ptr %1, i64 4
  %7 = load i32, ptr %6, align 4, !tbaa !9
  %8 = getelementptr inbounds i8, ptr %3, i64 4
  %9 = load i32, ptr %8, align 4, !tbaa !9
  %10 = icmp sgt i32 %7, %9
  br i1 %10, label %11, label %16

11:                                               ; preds = %5
  %12 = getelementptr inbounds i8, ptr %1, i64 32
  %13 = getelementptr inbounds i8, ptr %1, i64 40
  %14 = getelementptr inbounds i8, ptr %1, i64 8
  %15 = load i64, ptr %14, align 8, !tbaa !13
  tail call void @_Z5splitP4nodeRS0_S1_x(ptr noundef nonnull %3, ptr noundef nonnull align 8 dereferenceable(8) %12, ptr noundef nonnull align 8 dereferenceable(8) %13, i64 noundef %15)
  store ptr %1, ptr %0, align 8, !tbaa !5
  br label %26

16:                                               ; preds = %5
  %17 = getelementptr inbounds i8, ptr %1, i64 8
  %18 = load i64, ptr %17, align 8, !tbaa !13
  %19 = getelementptr inbounds i8, ptr %3, i64 8
  %20 = load i64, ptr %19, align 8, !tbaa !13
  %21 = icmp sgt i64 %18, %20
  br i1 %21, label %22, label %24

22:                                               ; preds = %16
  %23 = getelementptr inbounds i8, ptr %3, i64 40
  tail call void @_Z6insertRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %23, ptr noundef nonnull %1)
  br label %26

24:                                               ; preds = %16
  %25 = getelementptr inbounds i8, ptr %3, i64 32
  tail call void @_Z6insertRP4nodeS0_(ptr noundef nonnull align 8 dereferenceable(8) %25, ptr noundef nonnull %1)
  br label %26

26:                                               ; preds = %11, %24, %22, %4
  %27 = load ptr, ptr %0, align 8, !tbaa !5
  tail call void @_Z5updszP4node(ptr noundef %27)
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !11, i64 4}
!10 = !{!"_ZTS4node", !11, i64 0, !11, i64 4, !12, i64 8, !12, i64 16, !12, i64 24, !6, i64 32, !6, i64 40}
!11 = !{!"int", !7, i64 0}
!12 = !{!"long long", !7, i64 0}
!13 = !{!10, !12, i64 8}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass