; LLVM IR from XiaoMi/mace :: micro/ops/utils/activation.ll (ZN5micro3ops10Activation7ComputeEPKfiPf)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }
%"class.micro::ops::Activation" = type { i32, float, float }

@.str.4 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [30 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [16 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #1

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro3ops10Activation7ComputeEPKfiPf(ptr noundef nonnull align 4 dereferenceable(12) %0, ptr noundef %1, i32 noundef %2, ptr noundef %3) #3 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca %"class.micro::base::Logger", align 4
  %10 = alloca ptr, align 8
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca float, align 4
  %16 = alloca i32, align 4
  %17 = alloca i32, align 4
  %18 = alloca %"class.micro::base::Logger", align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !9
  store ptr %3, ptr %8, align 8, !tbaa !5
  %19 = load ptr, ptr %5, align 8
  %20 = getelementptr inbounds %"class.micro::ops::Activation", ptr %19, i32 0, i32 0
  %21 = load i32, ptr %20, align 4, !tbaa !11
  %22 = icmp ne i32 %21, 7
  br i1 %22, label %32, label %23

23:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #6
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef @.str.4, i32 noundef 56, i32 noundef 4)
  %24 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef @.str.5)
          to label %25 unwind label %28

25:                                               ; preds = %23
  %26 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %24, ptr noundef @.str.6)
          to label %27 unwind label %28

27:                                               ; preds = %25
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %9) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  br label %32

28:                                               ; preds = %25, %23
  %29 = landingpad { ptr, i32 }
          cleanup
  %30 = extractvalue { ptr, i32 } %29, 0
  store ptr %30, ptr %10, align 8
  %31 = extractvalue { ptr, i32 } %29, 1
  store i32 %31, ptr %11, align 4
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %9) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #6
  br label %145

32:                                               ; preds = %27, %4
  %33 = getelementptr inbounds %"class.micro::ops::Activation", ptr %19, i32 0, i32 0
  %34 = load i32, ptr %33, align 4, !tbaa !11
  switch i32 %34, label %135 [
    i32 1, label %35
    i32 2, label %52
    i32 6, label %72
    i32 4, label %97
    i32 5, label %114
    i32 0, label %134
  ]

35:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #6
  store i32 0, ptr %12, align 4, !tbaa !9
  br label %36

36:                                               ; preds = %48, %35
  %37 = load i32, ptr %12, align 4, !tbaa !9
  %38 = load i32, ptr %7, align 4, !tbaa !9
  %39 = icmp slt i32 %37, %38
  br i1 %39, label %41, label %40

40:                                               ; preds = %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #6
  br label %51

41:                                               ; preds = %36
  %42 = load ptr, ptr %6, align 8, !tbaa !5
  %43 = getelementptr inbounds float, ptr %42, i32 1
  store ptr %43, ptr %6, align 8, !tbaa !5
  %44 = load float, ptr %42, align 4, !tbaa !15
  %45 = call noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef 0.000000e+00, float noundef %44)
  %46 = load ptr, ptr %8, align 8, !tbaa !5
  %47 = getelementptr inbounds float, ptr %46, i32 1
  store ptr %47, ptr %8, align 8, !tbaa !5
  store float %45, ptr %46, align 4, !tbaa !15
  br label %48

48:                                               ; preds = %41
  %49 = load i32, ptr %12, align 4, !tbaa !9
  %50 = add nsw i32 %49, 1
  store i32 %50, ptr %12, align 4, !tbaa !9
  br label %36, !llvm.loop !16

51:                                               ; preds = %40
  br label %140

52:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #6
  store i32 0, ptr %13, align 4, !tbaa !9
  br label %53

53:                                               ; preds = %68, %52
  %54 = load i32, ptr %13, align 4, !tbaa !9
  %55 = load i32, ptr %7, align 4, !tbaa !9
  %56 = icmp slt i32 %54, %55
  br i1 %56, label %58, label %57

57:                                               ; preds = %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #6
  br label %71

58:                                               ; preds = %53
  %59 = getelementptr inbounds %"class.micro::ops::Activation", ptr %19, i32 0, i32 1
  %60 = load float, ptr %59, align 4, !tbaa !18
  %61 = load ptr, ptr %6, align 8, !tbaa !5
  %62 = getelementptr inbounds float, ptr %61, i32 1
  store ptr %62, ptr %6, align 8, !tbaa !5
  %63 = load float, ptr %61, align 4, !tbaa !15
  %64 = call noundef float @_ZN5micro4base3minIfEET_S2_S2_(float noundef %60, float noundef %63)
  %65 = call noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef 0.000000e+00, float noundef %64)
  %66 = load ptr, ptr %8, align 8, !tbaa !5
  %67 = getelementptr inbounds float, ptr %66, i32 1
  store ptr %67, ptr %8, align 8, !tbaa !5
  store float %65, ptr %66, align 4, !tbaa !15
  br label %68

68:                                               ; preds = %58
  %69 = load i32, ptr %13, align 4, !tbaa !9
  %70 = add nsw i32 %69, 1
  store i32 %70, ptr %13, align 4, !tbaa !9
  br label %53, !llvm.loop !19

71:                                               ; preds = %57
  br label %140

72:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %14) #6
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %73

73:                                               ; preds = %93, %72
  %74 = load i32, ptr %14, align 4, !tbaa !9
  %75 = load i32, ptr %7, align 4, !tbaa !9
  %76 = icmp slt i32 %74, %75
  br i1 %76, label %78, label %77

77:                                               ; preds = %73
  call void @llvm.lifetime.end.p0(i64 4, ptr %14) #6
  br label %96

78:                                               ; preds = %73
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #6
  %79 = load ptr, ptr %6, align 8, !tbaa !5
  %80 = load float, ptr %79, align 4, !tbaa !15
  store float %80, ptr %15, align 4, !tbaa !15
  %81 = load float, ptr %15, align 4, !tbaa !15
  %82 = call noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef %81, float noundef 0.000000e+00)
  %83 = load float, ptr %15, align 4, !tbaa !15
  %84 = call noundef float @_ZN5micro4base3minIfEET_S2_S2_(float noundef %83, float noundef 0.000000e+00)
  %85 = getelementptr inbounds %"class.micro::ops::Activation", ptr %19, i32 0, i32 2
  %86 = load float, ptr %85, align 4, !tbaa !20
  %87 = call float @llvm.fmuladd.f32(float %84, float %86, float %82)
  %88 = load ptr, ptr %8, align 8, !tbaa !5
  store float %87, ptr %88, align 4, !tbaa !15
  %89 = load ptr, ptr %6, align 8, !tbaa !5
  %90 = getelementptr inbounds float, ptr %89, i32 1
  store ptr %90, ptr %6, align 8, !tbaa !5
  %91 = load ptr, ptr %8, align 8, !tbaa !5
  %92 = getelementptr inbounds float, ptr %91, i32 1
  store ptr %92, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #6
  br label %93

93:                                               ; preds = %78
  %94 = load i32, ptr %14, align 4, !tbaa !9
  %95 = add nsw i32 %94, 1
  store i32 %95, ptr %14, align 4, !tbaa !9
  br label %73, !llvm.loop !21

96:                                               ; preds = %77
  br label %140

97:                                               ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %16) #6
  store i32 0, ptr %16, align 4, !tbaa !9
  br label %98

98:                                               ; preds = %110, %97
  %99 = load i32, ptr %16, align 4, !tbaa !9
  %100 = load i32, ptr %7, align 4, !tbaa !9
  %101 = icmp slt i32 %99, %100
  br i1 %101, label %103, label %102

102:                                              ; preds = %98
  call void @llvm.lifetime.end.p0(i64 4, ptr %16) #6
  br label %113

103:                                              ; preds = %98
  %104 = load ptr, ptr %6, align 8, !tbaa !5
  %105 = getelementptr inbounds float, ptr %104, i32 1
  store ptr %105, ptr %6, align 8, !tbaa !5
  %106 = load float, ptr %104, align 4, !tbaa !15
  %107 = call noundef float @_ZN5micro4base4tanhEf(float noundef %106)
  %108 = load ptr, ptr %8, align 8, !tbaa !5
  %109 = getelementptr inbounds float, ptr %108, i32 1
  store ptr %109, ptr %8, align 8, !tbaa !5
  store float %107, ptr %108, align 4, !tbaa !15
  br label %110

110:                                              ; preds = %103
  %111 = load i32, ptr %16, align 4, !tbaa !9
  %112 = add nsw i32 %111, 1
  store i32 %112, ptr %16, align 4, !tbaa !9
  br label %98, !llvm.loop !22

113:                                              ; preds = %102
  br label %140

114:                                              ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %17) #6
  store i32 0, ptr %17, align 4, !tbaa !9
  br label %115

115:                                              ; preds = %130, %114
  %116 = load i32, ptr %17, align 4, !tbaa !9
  %117 = load i32, ptr %7, align 4, !tbaa !9
  %118 = icmp slt i32 %116, %117
  br i1 %118, label %120, label %119

119:                                              ; preds = %115
  call void @llvm.lifetime.end.p0(i64 4, ptr %17) #6
  br label %133

120:                                              ; preds = %115
  %121 = load ptr, ptr %6, align 8, !tbaa !5
  %122 = getelementptr inbounds float, ptr %121, i32 1
  store ptr %122, ptr %6, align 8, !tbaa !5
  %123 = load float, ptr %121, align 4, !tbaa !15
  %124 = fneg float %123
  %125 = call noundef float @_ZN5micro4base3expEf(float noundef %124)
  %126 = fadd float 1.000000e+00, %125
  %127 = fdiv float 1.000000e+00, %126
  %128 = load ptr, ptr %8, align 8, !tbaa !5
  %129 = getelementptr inbounds float, ptr %128, i32 1
  store ptr %129, ptr %8, align 8, !tbaa !5
  store float %127, ptr %128, align 4, !tbaa !15
  br label %130

130:                                              ; preds = %120
  %131 = load i32, ptr %17, align 4, !tbaa !9
  %132 = add nsw i32 %131, 1
  store i32 %132, ptr %17, align 4, !tbaa !9
  br label %115, !llvm.loop !23

133:                                              ; preds = %119
  br label %140

134:                                              ; preds = %32
  br label %140

135:                                              ; preds = %32
  call void @llvm.lifetime.start.p0(i64 4, ptr %18) #6
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %18, ptr noundef @.str.4, i32 noundef 96, i32 noundef 4)
  %136 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %18, ptr noundef @.str.7)
          to label %137 unwind label %141

137:                                              ; preds = %135
  %138 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %136, ptr noundef @.str.8)
          to label %139 unwind label %141

139:                                              ; preds = %137
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %18) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  br label %140

140:                                              ; preds = %139, %134, %133, %113, %96, %71, %51
  ret i32 0

141:                                              ; preds = %137, %135
  %142 = landingpad { ptr, i32 }
          cleanup
  %143 = extractvalue { ptr, i32 } %142, 0
  store ptr %143, ptr %10, align 8
  %144 = extractvalue { ptr, i32 } %142, 1
  store i32 %144, ptr %11, align 4
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %18) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %18) #6
  br label %145

145:                                              ; preds = %141, %28
  %146 = load ptr, ptr %10, align 8
  %147 = load i32, ptr %11, align 4
  %148 = insertvalue { ptr, i32 } poison, ptr %146, 0
  %149 = insertvalue { ptr, i32 } %148, i32 %147, 1
  resume { ptr, i32 } %149
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef, float noundef) #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZN5micro4base3minIfEET_S2_S2_(float noundef, float noundef) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #5

declare noundef float @_ZN5micro4base4tanhEf(float noundef) #1

declare noundef float @_ZN5micro4base3expEf(float noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"_ZTSN5micro3ops10ActivationE", !13, i64 0, !14, i64 4, !14, i64 8}
!13 = !{!"_ZTSN5micro3ops14ActivationTypeE", !7, i64 0}
!14 = !{!"float", !7, i64 0}
!15 = !{!14, !14, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!12, !14, i64 4}
!19 = distinct !{!19, !17}
!20 = !{!12, !14, i64 8}
!21 = distinct !{!21, !17}
!22 = distinct !{!22, !17}
!23 = distinct !{!23, !17}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }

@.str.4 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [30 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [22 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [16 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #1

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) local_unnamed_addr #1

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro3ops10Activation7ComputeEPKfiPf(ptr nocapture noundef nonnull readonly align 4 dereferenceable(12) %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #3 align 2 personality ptr @__gxx_personality_v0 {
  %5 = alloca %"class.micro::base::Logger", align 4
  %6 = alloca %"class.micro::base::Logger", align 4
  %7 = load i32, ptr %0, align 4, !tbaa !5
  %.not = icmp eq i32 %7, 7
  br i1 %.not, label %8, label %15

8:                                                ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #6
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull @.str.4, i32 noundef 56, i32 noundef 4)
  %9 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull @.str.5)
          to label %10 unwind label %13

10:                                               ; preds = %8
  %11 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %9, ptr noundef nonnull @.str.6)
          to label %12 unwind label %13

12:                                               ; preds = %10
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %5) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #6
  %.pr = load i32, ptr %0, align 4, !tbaa !5
  br label %15

13:                                               ; preds = %10, %8
  %14 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %5) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #6
  br label %66

15:                                               ; preds = %12, %4
  %16 = phi i32 [ %.pr, %12 ], [ %7, %4 ]
  switch i32 %16, label %59 [
    i32 1, label %.preheader
    i32 2, label %.preheader44
    i32 6, label %.preheader46
    i32 4, label %.preheader48
    i32 5, label %.preheader50
    i32 0, label %.loopexit
  ]

.preheader50:                                     ; preds = %15
  %17 = icmp sgt i32 %2, 0
  br i1 %17, label %.lr.ph, label %.loopexit

.preheader48:                                     ; preds = %15
  %18 = icmp sgt i32 %2, 0
  br i1 %18, label %.lr.ph58, label %.loopexit

.preheader46:                                     ; preds = %15
  %19 = icmp sgt i32 %2, 0
  br i1 %19, label %.lr.ph62, label %.loopexit

.lr.ph62:                                         ; preds = %.preheader46
  %20 = getelementptr inbounds i8, ptr %0, i64 8
  br label %37

.preheader44:                                     ; preds = %15
  %21 = icmp sgt i32 %2, 0
  br i1 %21, label %.lr.ph66, label %.loopexit

.lr.ph66:                                         ; preds = %.preheader44
  %22 = getelementptr inbounds i8, ptr %0, i64 4
  br label %29

.preheader:                                       ; preds = %15
  %23 = icmp sgt i32 %2, 0
  br i1 %23, label %.lr.ph70, label %.loopexit

.lr.ph70:                                         ; preds = %.preheader, %.lr.ph70
  %.03269 = phi ptr [ %24, %.lr.ph70 ], [ %1, %.preheader ]
  %.03568 = phi i32 [ %28, %.lr.ph70 ], [ 0, %.preheader ]
  %.03867 = phi ptr [ %27, %.lr.ph70 ], [ %3, %.preheader ]
  %24 = getelementptr inbounds i8, ptr %.03269, i64 4
  %25 = load float, ptr %.03269, align 4, !tbaa !11
  %26 = call noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef 0.000000e+00, float noundef %25)
  %27 = getelementptr inbounds i8, ptr %.03867, i64 4
  store float %26, ptr %.03867, align 4, !tbaa !11
  %28 = add nuw nsw i32 %.03568, 1
  %exitcond78.not = icmp eq i32 %28, %2
  br i1 %exitcond78.not, label %.loopexit, label %.lr.ph70, !llvm.loop !12

29:                                               ; preds = %.lr.ph66, %29
  %.165 = phi ptr [ %1, %.lr.ph66 ], [ %31, %29 ]
  %.03464 = phi i32 [ 0, %.lr.ph66 ], [ %36, %29 ]
  %.13963 = phi ptr [ %3, %.lr.ph66 ], [ %35, %29 ]
  %30 = load float, ptr %22, align 4, !tbaa !14
  %31 = getelementptr inbounds i8, ptr %.165, i64 4
  %32 = load float, ptr %.165, align 4, !tbaa !11
  %33 = call noundef float @_ZN5micro4base3minIfEET_S2_S2_(float noundef %30, float noundef %32)
  %34 = call noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef 0.000000e+00, float noundef %33)
  %35 = getelementptr inbounds i8, ptr %.13963, i64 4
  store float %34, ptr %.13963, align 4, !tbaa !11
  %36 = add nuw nsw i32 %.03464, 1
  %exitcond77.not = icmp eq i32 %36, %2
  br i1 %exitcond77.not, label %.loopexit, label %29, !llvm.loop !15

37:                                               ; preds = %.lr.ph62, %37
  %.261 = phi ptr [ %1, %.lr.ph62 ], [ %43, %37 ]
  %.03360 = phi i32 [ 0, %.lr.ph62 ], [ %45, %37 ]
  %.24059 = phi ptr [ %3, %.lr.ph62 ], [ %44, %37 ]
  %38 = load float, ptr %.261, align 4, !tbaa !11
  %39 = call noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef %38, float noundef 0.000000e+00)
  %40 = call noundef float @_ZN5micro4base3minIfEET_S2_S2_(float noundef %38, float noundef 0.000000e+00)
  %41 = load float, ptr %20, align 4, !tbaa !16
  %42 = call float @llvm.fmuladd.f32(float %40, float %41, float %39)
  store float %42, ptr %.24059, align 4, !tbaa !11
  %43 = getelementptr inbounds i8, ptr %.261, i64 4
  %44 = getelementptr inbounds i8, ptr %.24059, i64 4
  %45 = add nuw nsw i32 %.03360, 1
  %exitcond76.not = icmp eq i32 %45, %2
  br i1 %exitcond76.not, label %.loopexit, label %37, !llvm.loop !17

.lr.ph58:                                         ; preds = %.preheader48, %.lr.ph58
  %.03157 = phi i32 [ %50, %.lr.ph58 ], [ 0, %.preheader48 ]
  %.356 = phi ptr [ %46, %.lr.ph58 ], [ %1, %.preheader48 ]
  %.34155 = phi ptr [ %49, %.lr.ph58 ], [ %3, %.preheader48 ]
  %46 = getelementptr inbounds i8, ptr %.356, i64 4
  %47 = load float, ptr %.356, align 4, !tbaa !11
  %48 = call noundef float @_ZN5micro4base4tanhEf(float noundef %47)
  %49 = getelementptr inbounds i8, ptr %.34155, i64 4
  store float %48, ptr %.34155, align 4, !tbaa !11
  %50 = add nuw nsw i32 %.03157, 1
  %exitcond75.not = icmp eq i32 %50, %2
  br i1 %exitcond75.not, label %.loopexit, label %.lr.ph58, !llvm.loop !18

.lr.ph:                                           ; preds = %.preheader50, %.lr.ph
  %.054 = phi i32 [ %58, %.lr.ph ], [ 0, %.preheader50 ]
  %.453 = phi ptr [ %51, %.lr.ph ], [ %1, %.preheader50 ]
  %.44252 = phi ptr [ %57, %.lr.ph ], [ %3, %.preheader50 ]
  %51 = getelementptr inbounds i8, ptr %.453, i64 4
  %52 = load float, ptr %.453, align 4, !tbaa !11
  %53 = fneg float %52
  %54 = call noundef float @_ZN5micro4base3expEf(float noundef %53)
  %55 = fadd float %54, 1.000000e+00
  %56 = fdiv float 1.000000e+00, %55
  %57 = getelementptr inbounds i8, ptr %.44252, i64 4
  store float %56, ptr %.44252, align 4, !tbaa !11
  %58 = add nuw nsw i32 %.054, 1
  %exitcond.not = icmp eq i32 %58, %2
  br i1 %exitcond.not, label %.loopexit, label %.lr.ph, !llvm.loop !19

59:                                               ; preds = %15
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #6
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull @.str.4, i32 noundef 96, i32 noundef 4)
  %60 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull @.str.7)
          to label %61 unwind label %64

61:                                               ; preds = %59
  %62 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %60, ptr noundef nonnull @.str.8)
          to label %63 unwind label %64

63:                                               ; preds = %61
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %6) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #6
  br label %.loopexit

.loopexit:                                        ; preds = %.lr.ph, %.lr.ph58, %37, %29, %.lr.ph70, %.preheader50, %.preheader48, %.preheader46, %.preheader44, %.preheader, %15, %63
  ret i32 0

64:                                               ; preds = %61, %59
  %65 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %6) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #6
  br label %66

66:                                               ; preds = %64, %13
  %.pn = phi { ptr, i32 } [ %65, %64 ], [ %14, %13 ]
  resume { ptr, i32 } %.pn
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZN5micro4base3maxIfEET_S2_S2_(float noundef, float noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef float @_ZN5micro4base3minIfEET_S2_S2_(float noundef, float noundef) local_unnamed_addr #4

; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #5

declare noundef float @_ZN5micro4base4tanhEf(float noundef) local_unnamed_addr #1

declare noundef float @_ZN5micro4base3expEf(float noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"_ZTSN5micro3ops10ActivationE", !7, i64 0, !10, i64 4, !10, i64 8}
!7 = !{!"_ZTSN5micro3ops14ActivationTypeE", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"float", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!6, !10, i64 4}
!15 = distinct !{!15, !13}
!16 = !{!6, !10, i64 8}
!17 = distinct !{!17, !13}
!18 = distinct !{!18, !13}
!19 = distinct !{!19, !13}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass