; LLVM IR from kobalicek/simdtests :: pixops/pixops_sse2.ll (Z21pixops_crossfade_sse2PvlPKvljjj)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local void @_Z21pixops_crossfade_sse2PvlPKvljjj(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) #0 {
  %8 = alloca ptr, align 8
  %9 = alloca i64, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  %12 = alloca i32, align 4
  %13 = alloca i32, align 4
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca <2 x i64>, align 16
  %18 = alloca <2 x i64>, align 16
  %19 = alloca i32, align 4
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca i32, align 4
  %23 = alloca <2 x i64>, align 16
  %24 = alloca <2 x i64>, align 16
  %25 = alloca <2 x i64>, align 16
  %26 = alloca <2 x i64>, align 16
  %27 = alloca <2 x i64>, align 16
  %28 = alloca <2 x i64>, align 16
  %29 = alloca <2 x i64>, align 16
  %30 = alloca <2 x i64>, align 16
  %31 = alloca <2 x i64>, align 16
  %32 = alloca <2 x i64>, align 16
  %33 = alloca <2 x i64>, align 16
  %34 = alloca <2 x i64>, align 16
  %35 = alloca <2 x i64>, align 16
  %36 = alloca <2 x i64>, align 16
  store ptr %0, ptr %8, align 8, !tbaa !5
  store i64 %1, ptr %9, align 8, !tbaa !9
  store ptr %2, ptr %10, align 8, !tbaa !5
  store i64 %3, ptr %11, align 8, !tbaa !9
  store i32 %4, ptr %12, align 4, !tbaa !11
  store i32 %5, ptr %13, align 4, !tbaa !11
  store i32 %6, ptr %14, align 4, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #5
  %37 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %37, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  %38 = load ptr, ptr %10, align 8, !tbaa !5
  store ptr %38, ptr %16, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 16, ptr %17) #5
  %39 = load i32, ptr %14, align 4, !tbaa !11
  %40 = call noundef i32 @_ZL8expand16j(i32 noundef %39)
  %41 = call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %40)
  %42 = bitcast <2 x i64> %41 to <4 x i32>
  %43 = shufflevector <4 x i32> %42, <4 x i32> poison, <4 x i32> zeroinitializer
  %44 = bitcast <4 x i32> %43 to <2 x i64>
  store <2 x i64> %44, ptr %17, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %18) #5
  %45 = load i32, ptr %14, align 4, !tbaa !11
  %46 = sub i32 256, %45
  %47 = call noundef i32 @_ZL8expand16j(i32 noundef %46)
  %48 = call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %47)
  %49 = bitcast <2 x i64> %48 to <4 x i32>
  %50 = shufflevector <4 x i32> %49, <4 x i32> poison, <4 x i32> zeroinitializer
  %51 = bitcast <4 x i32> %50 to <2 x i64>
  store <2 x i64> %51, ptr %18, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 4, ptr %19) #5
  %52 = load i32, ptr %13, align 4, !tbaa !11
  store i32 %52, ptr %19, align 4, !tbaa !11
  br label %53

53:                                               ; preds = %274, %7
  %54 = load i32, ptr %19, align 4, !tbaa !11
  %55 = icmp ugt i32 %54, 0
  br i1 %55, label %57, label %56

56:                                               ; preds = %53
  call void @llvm.lifetime.end.p0(i64 4, ptr %19) #5
  br label %283

57:                                               ; preds = %53
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #5
  %58 = load ptr, ptr %15, align 8, !tbaa !5
  store ptr %58, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #5
  %59 = load ptr, ptr %16, align 8, !tbaa !5
  store ptr %59, ptr %21, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #5
  %60 = load i32, ptr %12, align 4, !tbaa !11
  store i32 %60, ptr %22, align 4, !tbaa !11
  br label %61

61:                                               ; preds = %272, %57
  br label %62

62:                                               ; preds = %71, %61
  %63 = load i32, ptr %22, align 4, !tbaa !11
  %64 = icmp ult i32 %63, 4
  br i1 %64, label %69, label %65

65:                                               ; preds = %62
  %66 = load ptr, ptr %8, align 8, !tbaa !5
  %67 = call noundef zeroext i1 @_ZN9SimdUtilsL9isAlignedIPvEEbT_j(ptr noundef %66, i32 noundef 16)
  %68 = xor i1 %67, true
  br label %69

69:                                               ; preds = %65, %62
  %70 = phi i1 [ true, %62 ], [ %68, %65 ]
  br i1 %70, label %71, label %107

71:                                               ; preds = %69
  call void @llvm.lifetime.start.p0(i64 16, ptr %23) #5
  %72 = load ptr, ptr %20, align 8, !tbaa !5
  %73 = load i32, ptr %72, align 4, !tbaa !11
  %74 = call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %73)
  store <2 x i64> %74, ptr %23, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %24) #5
  %75 = load ptr, ptr %21, align 8, !tbaa !5
  %76 = load i32, ptr %75, align 4, !tbaa !11
  %77 = call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %76)
  store <2 x i64> %77, ptr %24, align 16, !tbaa !13
  %78 = load <2 x i64>, ptr %23, align 16, !tbaa !13
  %79 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %80 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %78, <2 x i64> noundef %79)
  store <2 x i64> %80, ptr %23, align 16, !tbaa !13
  %81 = load <2 x i64>, ptr %24, align 16, !tbaa !13
  %82 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %83 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %81, <2 x i64> noundef %82)
  store <2 x i64> %83, ptr %24, align 16, !tbaa !13
  %84 = load <2 x i64>, ptr %23, align 16, !tbaa !13
  %85 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %86 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %84, <2 x i64> noundef %85)
  store <2 x i64> %86, ptr %23, align 16, !tbaa !13
  %87 = load <2 x i64>, ptr %24, align 16, !tbaa !13
  %88 = load <2 x i64>, ptr %17, align 16, !tbaa !13
  %89 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %87, <2 x i64> noundef %88)
  store <2 x i64> %89, ptr %24, align 16, !tbaa !13
  %90 = load <2 x i64>, ptr %23, align 16, !tbaa !13
  %91 = load <2 x i64>, ptr %24, align 16, !tbaa !13
  %92 = call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %90, <2 x i64> noundef %91)
  store <2 x i64> %92, ptr %23, align 16, !tbaa !13
  %93 = load <2 x i64>, ptr %23, align 16, !tbaa !13
  %94 = call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %93, i32 noundef 8)
  store <2 x i64> %94, ptr %23, align 16, !tbaa !13
  %95 = load <2 x i64>, ptr %23, align 16, !tbaa !13
  %96 = load <2 x i64>, ptr %23, align 16, !tbaa !13
  %97 = call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %95, <2 x i64> noundef %96)
  store <2 x i64> %97, ptr %23, align 16, !tbaa !13
  %98 = load <2 x i64>, ptr %23, align 16, !tbaa !13
  %99 = call noundef i32 @_ZL17_mm_cvtsi128_si32Dv2_x(<2 x i64> noundef %98)
  %100 = load ptr, ptr %20, align 8, !tbaa !5
  store i32 %99, ptr %100, align 4, !tbaa !11
  %101 = load ptr, ptr %20, align 8, !tbaa !5
  %102 = getelementptr inbounds i32, ptr %101, i32 1
  store ptr %102, ptr %20, align 8, !tbaa !5
  %103 = load ptr, ptr %21, align 8, !tbaa !5
  %104 = getelementptr inbounds i32, ptr %103, i32 1
  store ptr %104, ptr %21, align 8, !tbaa !5
  %105 = load i32, ptr %22, align 4, !tbaa !11
  %106 = add i32 %105, -1
  store i32 %106, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %24) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %23) #5
  br label %62, !llvm.loop !14

107:                                              ; preds = %69
  %108 = load i32, ptr %22, align 4, !tbaa !11
  %109 = icmp eq i32 %108, 0
  br i1 %109, label %110, label %111

110:                                              ; preds = %107
  br label %273

111:                                              ; preds = %107
  br label %112

112:                                              ; preds = %115, %111
  %113 = load i32, ptr %22, align 4, !tbaa !11
  %114 = icmp uge i32 %113, 8
  br i1 %114, label %115, label %214

115:                                              ; preds = %112
  call void @llvm.lifetime.start.p0(i64 16, ptr %25) #5
  %116 = load ptr, ptr %20, align 8, !tbaa !5
  %117 = getelementptr inbounds i32, ptr %116, i64 0
  %118 = call noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef %117)
  store <2 x i64> %118, ptr %25, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %26) #5
  %119 = load ptr, ptr %20, align 8, !tbaa !5
  %120 = getelementptr inbounds i32, ptr %119, i64 4
  %121 = call noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef %120)
  store <2 x i64> %121, ptr %26, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %27) #5
  %122 = load ptr, ptr %21, align 8, !tbaa !5
  %123 = getelementptr inbounds i32, ptr %122, i64 0
  %124 = call noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef %123)
  store <2 x i64> %124, ptr %27, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %28) #5
  %125 = load ptr, ptr %21, align 8, !tbaa !5
  %126 = getelementptr inbounds i32, ptr %125, i64 4
  %127 = call noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef %126)
  store <2 x i64> %127, ptr %28, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %29) #5
  %128 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %129 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %130 = call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %128, <2 x i64> noundef %129)
  store <2 x i64> %130, ptr %29, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %30) #5
  %131 = load <2 x i64>, ptr %26, align 16, !tbaa !13
  %132 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %133 = call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %131, <2 x i64> noundef %132)
  store <2 x i64> %133, ptr %30, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %31) #5
  %134 = load <2 x i64>, ptr %27, align 16, !tbaa !13
  %135 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %136 = call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %134, <2 x i64> noundef %135)
  store <2 x i64> %136, ptr %31, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %32) #5
  %137 = load <2 x i64>, ptr %28, align 16, !tbaa !13
  %138 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %139 = call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %137, <2 x i64> noundef %138)
  store <2 x i64> %139, ptr %32, align 16, !tbaa !13
  %140 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %141 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %142 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %140, <2 x i64> noundef %141)
  store <2 x i64> %142, ptr %25, align 16, !tbaa !13
  %143 = load <2 x i64>, ptr %26, align 16, !tbaa !13
  %144 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %145 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %143, <2 x i64> noundef %144)
  store <2 x i64> %145, ptr %26, align 16, !tbaa !13
  %146 = load <2 x i64>, ptr %27, align 16, !tbaa !13
  %147 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %148 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %146, <2 x i64> noundef %147)
  store <2 x i64> %148, ptr %27, align 16, !tbaa !13
  %149 = load <2 x i64>, ptr %28, align 16, !tbaa !13
  %150 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %151 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %149, <2 x i64> noundef %150)
  store <2 x i64> %151, ptr %28, align 16, !tbaa !13
  %152 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %153 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %154 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %152, <2 x i64> noundef %153)
  store <2 x i64> %154, ptr %25, align 16, !tbaa !13
  %155 = load <2 x i64>, ptr %29, align 16, !tbaa !13
  %156 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %157 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %155, <2 x i64> noundef %156)
  store <2 x i64> %157, ptr %29, align 16, !tbaa !13
  %158 = load <2 x i64>, ptr %26, align 16, !tbaa !13
  %159 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %160 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %158, <2 x i64> noundef %159)
  store <2 x i64> %160, ptr %26, align 16, !tbaa !13
  %161 = load <2 x i64>, ptr %30, align 16, !tbaa !13
  %162 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %163 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %161, <2 x i64> noundef %162)
  store <2 x i64> %163, ptr %30, align 16, !tbaa !13
  %164 = load <2 x i64>, ptr %27, align 16, !tbaa !13
  %165 = load <2 x i64>, ptr %17, align 16, !tbaa !13
  %166 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %164, <2 x i64> noundef %165)
  store <2 x i64> %166, ptr %27, align 16, !tbaa !13
  %167 = load <2 x i64>, ptr %31, align 16, !tbaa !13
  %168 = load <2 x i64>, ptr %17, align 16, !tbaa !13
  %169 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %167, <2 x i64> noundef %168)
  store <2 x i64> %169, ptr %31, align 16, !tbaa !13
  %170 = load <2 x i64>, ptr %28, align 16, !tbaa !13
  %171 = load <2 x i64>, ptr %17, align 16, !tbaa !13
  %172 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %170, <2 x i64> noundef %171)
  store <2 x i64> %172, ptr %28, align 16, !tbaa !13
  %173 = load <2 x i64>, ptr %32, align 16, !tbaa !13
  %174 = load <2 x i64>, ptr %17, align 16, !tbaa !13
  %175 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %173, <2 x i64> noundef %174)
  store <2 x i64> %175, ptr %32, align 16, !tbaa !13
  %176 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %177 = load <2 x i64>, ptr %27, align 16, !tbaa !13
  %178 = call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %176, <2 x i64> noundef %177)
  store <2 x i64> %178, ptr %25, align 16, !tbaa !13
  %179 = load <2 x i64>, ptr %29, align 16, !tbaa !13
  %180 = load <2 x i64>, ptr %31, align 16, !tbaa !13
  %181 = call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %179, <2 x i64> noundef %180)
  store <2 x i64> %181, ptr %29, align 16, !tbaa !13
  %182 = load <2 x i64>, ptr %26, align 16, !tbaa !13
  %183 = load <2 x i64>, ptr %28, align 16, !tbaa !13
  %184 = call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %182, <2 x i64> noundef %183)
  store <2 x i64> %184, ptr %26, align 16, !tbaa !13
  %185 = load <2 x i64>, ptr %30, align 16, !tbaa !13
  %186 = load <2 x i64>, ptr %32, align 16, !tbaa !13
  %187 = call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %185, <2 x i64> noundef %186)
  store <2 x i64> %187, ptr %30, align 16, !tbaa !13
  %188 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %189 = call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %188, i32 noundef 8)
  store <2 x i64> %189, ptr %25, align 16, !tbaa !13
  %190 = load <2 x i64>, ptr %29, align 16, !tbaa !13
  %191 = call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %190, i32 noundef 8)
  store <2 x i64> %191, ptr %29, align 16, !tbaa !13
  %192 = load <2 x i64>, ptr %26, align 16, !tbaa !13
  %193 = call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %192, i32 noundef 8)
  store <2 x i64> %193, ptr %26, align 16, !tbaa !13
  %194 = load <2 x i64>, ptr %30, align 16, !tbaa !13
  %195 = call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %194, i32 noundef 8)
  store <2 x i64> %195, ptr %30, align 16, !tbaa !13
  %196 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  %197 = load <2 x i64>, ptr %29, align 16, !tbaa !13
  %198 = call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %196, <2 x i64> noundef %197)
  store <2 x i64> %198, ptr %25, align 16, !tbaa !13
  %199 = load <2 x i64>, ptr %26, align 16, !tbaa !13
  %200 = load <2 x i64>, ptr %30, align 16, !tbaa !13
  %201 = call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %199, <2 x i64> noundef %200)
  store <2 x i64> %201, ptr %26, align 16, !tbaa !13
  %202 = load ptr, ptr %20, align 8, !tbaa !5
  %203 = getelementptr inbounds i32, ptr %202, i64 0
  %204 = load <2 x i64>, ptr %25, align 16, !tbaa !13
  call void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef %203, <2 x i64> noundef %204)
  %205 = load ptr, ptr %20, align 8, !tbaa !5
  %206 = getelementptr inbounds i32, ptr %205, i64 4
  %207 = load <2 x i64>, ptr %26, align 16, !tbaa !13
  call void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef %206, <2 x i64> noundef %207)
  %208 = load ptr, ptr %20, align 8, !tbaa !5
  %209 = getelementptr inbounds i32, ptr %208, i64 8
  store ptr %209, ptr %20, align 8, !tbaa !5
  %210 = load ptr, ptr %21, align 8, !tbaa !5
  %211 = getelementptr inbounds i32, ptr %210, i64 8
  store ptr %211, ptr %21, align 8, !tbaa !5
  %212 = load i32, ptr %22, align 4, !tbaa !11
  %213 = sub i32 %212, 8
  store i32 %213, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %32) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %31) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %30) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %29) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %28) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %27) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %26) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %25) #5
  br label %112, !llvm.loop !16

214:                                              ; preds = %112
  br label %215

215:                                              ; preds = %218, %214
  %216 = load i32, ptr %22, align 4, !tbaa !11
  %217 = icmp uge i32 %216, 4
  br i1 %217, label %218, label %268

218:                                              ; preds = %215
  call void @llvm.lifetime.start.p0(i64 16, ptr %33) #5
  %219 = load ptr, ptr %20, align 8, !tbaa !5
  %220 = call noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef %219)
  store <2 x i64> %220, ptr %33, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %34) #5
  %221 = load ptr, ptr %21, align 8, !tbaa !5
  %222 = call noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef %221)
  store <2 x i64> %222, ptr %34, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %35) #5
  %223 = load <2 x i64>, ptr %33, align 16, !tbaa !13
  %224 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %225 = call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %223, <2 x i64> noundef %224)
  store <2 x i64> %225, ptr %35, align 16, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 16, ptr %36) #5
  %226 = load <2 x i64>, ptr %34, align 16, !tbaa !13
  %227 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %228 = call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %226, <2 x i64> noundef %227)
  store <2 x i64> %228, ptr %36, align 16, !tbaa !13
  %229 = load <2 x i64>, ptr %33, align 16, !tbaa !13
  %230 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %231 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %229, <2 x i64> noundef %230)
  store <2 x i64> %231, ptr %33, align 16, !tbaa !13
  %232 = load <2 x i64>, ptr %34, align 16, !tbaa !13
  %233 = call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %234 = call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %232, <2 x i64> noundef %233)
  store <2 x i64> %234, ptr %34, align 16, !tbaa !13
  %235 = load <2 x i64>, ptr %33, align 16, !tbaa !13
  %236 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %237 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %235, <2 x i64> noundef %236)
  store <2 x i64> %237, ptr %33, align 16, !tbaa !13
  %238 = load <2 x i64>, ptr %35, align 16, !tbaa !13
  %239 = load <2 x i64>, ptr %18, align 16, !tbaa !13
  %240 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %238, <2 x i64> noundef %239)
  store <2 x i64> %240, ptr %35, align 16, !tbaa !13
  %241 = load <2 x i64>, ptr %34, align 16, !tbaa !13
  %242 = load <2 x i64>, ptr %17, align 16, !tbaa !13
  %243 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %241, <2 x i64> noundef %242)
  store <2 x i64> %243, ptr %34, align 16, !tbaa !13
  %244 = load <2 x i64>, ptr %36, align 16, !tbaa !13
  %245 = load <2 x i64>, ptr %17, align 16, !tbaa !13
  %246 = call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %244, <2 x i64> noundef %245)
  store <2 x i64> %246, ptr %36, align 16, !tbaa !13
  %247 = load <2 x i64>, ptr %33, align 16, !tbaa !13
  %248 = load <2 x i64>, ptr %34, align 16, !tbaa !13
  %249 = call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %247, <2 x i64> noundef %248)
  store <2 x i64> %249, ptr %33, align 16, !tbaa !13
  %250 = load <2 x i64>, ptr %35, align 16, !tbaa !13
  %251 = load <2 x i64>, ptr %36, align 16, !tbaa !13
  %252 = call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %250, <2 x i64> noundef %251)
  store <2 x i64> %252, ptr %35, align 16, !tbaa !13
  %253 = load <2 x i64>, ptr %33, align 16, !tbaa !13
  %254 = call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %253, i32 noundef 8)
  store <2 x i64> %254, ptr %33, align 16, !tbaa !13
  %255 = load <2 x i64>, ptr %35, align 16, !tbaa !13
  %256 = call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %255, i32 noundef 8)
  store <2 x i64> %256, ptr %35, align 16, !tbaa !13
  %257 = load <2 x i64>, ptr %33, align 16, !tbaa !13
  %258 = load <2 x i64>, ptr %35, align 16, !tbaa !13
  %259 = call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %257, <2 x i64> noundef %258)
  store <2 x i64> %259, ptr %33, align 16, !tbaa !13
  %260 = load ptr, ptr %20, align 8, !tbaa !5
  %261 = load <2 x i64>, ptr %33, align 16, !tbaa !13
  call void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef %260, <2 x i64> noundef %261)
  %262 = load ptr, ptr %20, align 8, !tbaa !5
  %263 = getelementptr inbounds i32, ptr %262, i64 4
  store ptr %263, ptr %20, align 8, !tbaa !5
  %264 = load ptr, ptr %21, align 8, !tbaa !5
  %265 = getelementptr inbounds i32, ptr %264, i64 4
  store ptr %265, ptr %21, align 8, !tbaa !5
  %266 = load i32, ptr %22, align 4, !tbaa !11
  %267 = sub i32 %266, 4
  store i32 %267, ptr %22, align 4, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 16, ptr %36) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %35) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %34) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %33) #5
  br label %215, !llvm.loop !17

268:                                              ; preds = %215
  %269 = load i32, ptr %22, align 4, !tbaa !11
  %270 = icmp eq i32 %269, 0
  br i1 %270, label %271, label %272

271:                                              ; preds = %268
  br label %273

272:                                              ; preds = %268
  br label %61, !llvm.loop !18

273:                                              ; preds = %271, %110
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #5
  br label %274

274:                                              ; preds = %273
  %275 = load i32, ptr %19, align 4, !tbaa !11
  %276 = add i32 %275, -1
  store i32 %276, ptr %19, align 4, !tbaa !11
  %277 = load i64, ptr %9, align 8, !tbaa !9
  %278 = load ptr, ptr %15, align 8, !tbaa !5
  %279 = getelementptr inbounds i8, ptr %278, i64 %277
  store ptr %279, ptr %15, align 8, !tbaa !5
  %280 = load i64, ptr %11, align 8, !tbaa !9
  %281 = load ptr, ptr %16, align 8, !tbaa !5
  %282 = getelementptr inbounds i8, ptr %281, i64 %280
  store ptr %282, ptr %16, align 8, !tbaa !5
  br label %53, !llvm.loop !19

283:                                              ; preds = %56
  call void @llvm.lifetime.end.p0(i64 16, ptr %18) #5
  call void @llvm.lifetime.end.p0(i64 16, ptr %17) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL8expand16j(i32 noundef) #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN9SimdUtilsL9isAlignedIPvEEbT_j(ptr noundef, i32 noundef) #4

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_setzero_si128v() #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef, i32 noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL17_mm_cvtsi128_si32Dv2_x(<2 x i64> noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef, <2 x i64> noundef) #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!7, !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}
!19 = distinct !{!19, !15}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z21pixops_crossfade_sse2PvlPKvljjj(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #0 {
  %8 = tail call noundef i32 @_ZL8expand16j(i32 noundef %6)
  %9 = tail call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %8)
  %10 = bitcast <2 x i64> %9 to <4 x i32>
  %11 = shufflevector <4 x i32> %10, <4 x i32> poison, <4 x i32> zeroinitializer
  %12 = bitcast <4 x i32> %11 to <2 x i64>
  %13 = sub i32 256, %6
  %14 = tail call noundef i32 @_ZL8expand16j(i32 noundef %13)
  %15 = tail call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %14)
  %16 = bitcast <2 x i64> %15 to <4 x i32>
  %17 = shufflevector <4 x i32> %16, <4 x i32> poison, <4 x i32> zeroinitializer
  %18 = bitcast <4 x i32> %17 to <2 x i64>
  %.not140 = icmp eq i32 %5, 0
  br i1 %.not140, label %._crit_edge144, label %.preheader127

.preheader127:                                    ; preds = %7, %110
  %.0143 = phi ptr [ %112, %110 ], [ %0, %7 ]
  %.0115142 = phi ptr [ %113, %110 ], [ %2, %7 ]
  %.0116141 = phi i32 [ %111, %110 ], [ %5, %7 ]
  br label %19

._crit_edge144:                                   ; preds = %110, %7
  ret void

19:                                               ; preds = %.backedge, %.preheader127
  %.1123 = phi i32 [ %4, %.preheader127 ], [ %.1123.be, %.backedge ]
  %.1119 = phi ptr [ %.0115142, %.preheader127 ], [ %.1119.be, %.backedge ]
  %.1 = phi ptr [ %.0143, %.preheader127 ], [ %.1.be, %.backedge ]
  %20 = icmp ult i32 %.1123, 4
  br i1 %20, label %.critedge, label %21

21:                                               ; preds = %19
  %22 = tail call noundef zeroext i1 @_ZN9SimdUtilsL9isAlignedIPvEEbT_j(ptr noundef %0, i32 noundef 16)
  br i1 %22, label %.preheader126, label %.critedge

.preheader126:                                    ; preds = %21
  %23 = icmp ugt i32 %.1123, 7
  br i1 %23, label %.lr.ph, label %.lr.ph136.preheader

.critedge:                                        ; preds = %19, %21
  %24 = load i32, ptr %.1, align 4, !tbaa !5
  %25 = tail call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %24)
  %26 = load i32, ptr %.1119, align 4, !tbaa !5
  %27 = tail call noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef %26)
  %28 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %29 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %25, <2 x i64> noundef %28)
  %30 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %31 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %27, <2 x i64> noundef %30)
  %32 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %29, <2 x i64> noundef %18)
  %33 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %31, <2 x i64> noundef %12)
  %34 = tail call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %32, <2 x i64> noundef %33)
  %35 = tail call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %34, i32 noundef 8)
  %36 = tail call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %35, <2 x i64> noundef %35)
  %37 = tail call noundef i32 @_ZL17_mm_cvtsi128_si32Dv2_x(<2 x i64> noundef %36)
  store i32 %37, ptr %.1, align 4, !tbaa !5
  %38 = getelementptr inbounds i8, ptr %.1, i64 4
  %39 = getelementptr inbounds i8, ptr %.1119, i64 4
  %40 = add i32 %.1123, -1
  br label %.backedge

.backedge:                                        ; preds = %.critedge, %._crit_edge
  %.1123.be = phi i32 [ %40, %.critedge ], [ %.3125.lcssa, %._crit_edge ]
  %.1119.be = phi ptr [ %39, %.critedge ], [ %.3121.lcssa, %._crit_edge ]
  %.1.be = phi ptr [ %38, %.critedge ], [ %.3.lcssa, %._crit_edge ]
  br label %19, !llvm.loop !9

.preheader:                                       ; preds = %.lr.ph
  %41 = icmp ugt i32 %84, 3
  br i1 %41, label %.lr.ph136.preheader, label %._crit_edge

.lr.ph136.preheader:                              ; preds = %.preheader126, %.preheader
  %.3135.ph = phi ptr [ %.1, %.preheader126 ], [ %82, %.preheader ]
  %.3121134.ph = phi ptr [ %.1119, %.preheader126 ], [ %83, %.preheader ]
  %.3125133.ph = phi i32 [ %.1123, %.preheader126 ], [ %84, %.preheader ]
  br label %.lr.ph136

.lr.ph:                                           ; preds = %.preheader126, %.lr.ph
  %.2130 = phi ptr [ %82, %.lr.ph ], [ %.1, %.preheader126 ]
  %.2120129 = phi ptr [ %83, %.lr.ph ], [ %.1119, %.preheader126 ]
  %.2124128 = phi i32 [ %84, %.lr.ph ], [ %.1123, %.preheader126 ]
  %42 = tail call noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef %.2130)
  %43 = getelementptr inbounds i8, ptr %.2130, i64 16
  %44 = tail call noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef nonnull %43)
  %45 = tail call noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef %.2120129)
  %46 = getelementptr inbounds i8, ptr %.2120129, i64 16
  %47 = tail call noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef nonnull %46)
  %48 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %49 = tail call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %42, <2 x i64> noundef %48)
  %50 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %51 = tail call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %44, <2 x i64> noundef %50)
  %52 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %53 = tail call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %45, <2 x i64> noundef %52)
  %54 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %55 = tail call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %47, <2 x i64> noundef %54)
  %56 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %57 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %42, <2 x i64> noundef %56)
  %58 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %59 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %44, <2 x i64> noundef %58)
  %60 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %61 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %45, <2 x i64> noundef %60)
  %62 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %63 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %47, <2 x i64> noundef %62)
  %64 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %57, <2 x i64> noundef %18)
  %65 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %49, <2 x i64> noundef %18)
  %66 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %59, <2 x i64> noundef %18)
  %67 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %51, <2 x i64> noundef %18)
  %68 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %61, <2 x i64> noundef %12)
  %69 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %53, <2 x i64> noundef %12)
  %70 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %63, <2 x i64> noundef %12)
  %71 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %55, <2 x i64> noundef %12)
  %72 = tail call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %64, <2 x i64> noundef %68)
  %73 = tail call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %65, <2 x i64> noundef %69)
  %74 = tail call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %66, <2 x i64> noundef %70)
  %75 = tail call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %67, <2 x i64> noundef %71)
  %76 = tail call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %72, i32 noundef 8)
  %77 = tail call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %73, i32 noundef 8)
  %78 = tail call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %74, i32 noundef 8)
  %79 = tail call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %75, i32 noundef 8)
  %80 = tail call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %76, <2 x i64> noundef %77)
  %81 = tail call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %78, <2 x i64> noundef %79)
  tail call void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef %.2130, <2 x i64> noundef %80)
  tail call void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef nonnull %43, <2 x i64> noundef %81)
  %82 = getelementptr inbounds i8, ptr %.2130, i64 32
  %83 = getelementptr inbounds i8, ptr %.2120129, i64 32
  %84 = add i32 %.2124128, -8
  %85 = icmp ugt i32 %84, 7
  br i1 %85, label %.lr.ph, label %.preheader, !llvm.loop !11

.lr.ph136:                                        ; preds = %.lr.ph136.preheader, %.lr.ph136
  %.3135 = phi ptr [ %105, %.lr.ph136 ], [ %.3135.ph, %.lr.ph136.preheader ]
  %.3121134 = phi ptr [ %106, %.lr.ph136 ], [ %.3121134.ph, %.lr.ph136.preheader ]
  %.3125133 = phi i32 [ %107, %.lr.ph136 ], [ %.3125133.ph, %.lr.ph136.preheader ]
  %86 = tail call noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef %.3135)
  %87 = tail call noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef %.3121134)
  %88 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %89 = tail call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %86, <2 x i64> noundef %88)
  %90 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %91 = tail call noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef %87, <2 x i64> noundef %90)
  %92 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %93 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %86, <2 x i64> noundef %92)
  %94 = tail call noundef <2 x i64> @_ZL17_mm_setzero_si128v()
  %95 = tail call noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef %87, <2 x i64> noundef %94)
  %96 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %93, <2 x i64> noundef %18)
  %97 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %89, <2 x i64> noundef %18)
  %98 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %95, <2 x i64> noundef %12)
  %99 = tail call noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef %91, <2 x i64> noundef %12)
  %100 = tail call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %96, <2 x i64> noundef %98)
  %101 = tail call noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef %97, <2 x i64> noundef %99)
  %102 = tail call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %100, i32 noundef 8)
  %103 = tail call noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef %101, i32 noundef 8)
  %104 = tail call noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef %102, <2 x i64> noundef %103)
  tail call void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef %.3135, <2 x i64> noundef %104)
  %105 = getelementptr inbounds i8, ptr %.3135, i64 16
  %106 = getelementptr inbounds i8, ptr %.3121134, i64 16
  %107 = add nsw i32 %.3125133, -4
  %108 = icmp ugt i32 %107, 3
  br i1 %108, label %.lr.ph136, label %._crit_edge, !llvm.loop !12

._crit_edge:                                      ; preds = %.lr.ph136, %.preheader
  %.3125.lcssa = phi i32 [ %84, %.preheader ], [ %107, %.lr.ph136 ]
  %.3121.lcssa = phi ptr [ %83, %.preheader ], [ %106, %.lr.ph136 ]
  %.3.lcssa = phi ptr [ %82, %.preheader ], [ %105, %.lr.ph136 ]
  %109 = icmp eq i32 %.3125.lcssa, 0
  br i1 %109, label %110, label %.backedge

110:                                              ; preds = %._crit_edge
  %111 = add i32 %.0116141, -1
  %112 = getelementptr inbounds i8, ptr %.0143, i64 %1
  %113 = getelementptr inbounds i8, ptr %.0115142, i64 %3
  %.not = icmp eq i32 %111, 0
  br i1 %.not, label %._crit_edge144, label %.preheader127, !llvm.loop !13
}

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_cvtsi32_si128i(i32 noundef) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL8expand16j(i32 noundef) local_unnamed_addr #2

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef zeroext i1 @_ZN9SimdUtilsL9isAlignedIPvEEbT_j(ptr noundef, i32 noundef) local_unnamed_addr #3

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_unpacklo_epi8Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_setzero_si128v() local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL15_mm_mullo_epi16Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL13_mm_add_epi16Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL14_mm_srli_epi16Dv2_xi(<2 x i64> noundef, i32 noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL16_mm_packus_epi16Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef i32 @_ZL17_mm_cvtsi128_si32Dv2_x(<2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL14_mm_load_si128PKDv2_x(ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL15_mm_loadu_si128PKDv2_x(ptr noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden noundef <2 x i64> @_ZL17_mm_unpackhi_epi8Dv2_xS_(<2 x i64> noundef, <2 x i64> noundef) local_unnamed_addr #1

; Function Attrs: alwaysinline mustprogress nounwind uwtable
declare hidden void @_ZL15_mm_store_si128PDv2_xS_(ptr noundef, <2 x i64> noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { alwaysinline mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = distinct !{!12, !10}
!13 = distinct !{!13, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass