; LLVM IR from aap/pdp6 :: newemu (main)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.PDP6 = type { i32, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, i64, i8, i64, i64, i64, i32, i32, i32, i32, i32, i32, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i64, i64, i64, i8, i8, i8, i8, i64, i8, i8, i8, i32, %struct.FD, i64, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, %struct.FD, i32, i64, i64, %struct.FD, i8, i64, i64, i64, i64, i64, i8, i64 }
%struct.FD = type { i32, i32, i32 }

@simtime = external dso_local global i64, align 8
@realtime = external dso_local global i64, align 8

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @pwrclr(ptr noundef) #1

declare void @cycle_io(ptr noundef, i32 noundef) #1

; Function Attrs: nounwind uwtable
define dso_local void @emu(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i8, align 1
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  %8 = load ptr, ptr %3, align 8, !tbaa !5
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  call void @updateswitches(ptr noundef %8, ptr noundef %9)
  call void @inittime()
  store i64 0, ptr @simtime, align 8, !tbaa !9
  %10 = load ptr, ptr %3, align 8, !tbaa !5
  %11 = getelementptr inbounds %struct.PDP6, ptr %10, i32 0, i32 172
  store i64 0, ptr %11, align 8, !tbaa !11
  br label %12

12:                                               ; preds = %108, %2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.PDP6, ptr %13, i32 0, i32 16
  %15 = load i8, ptr %14, align 4, !tbaa !16, !range !17, !noundef !18
  %16 = trunc i8 %15 to i1
  %17 = zext i1 %16 to i8
  store i8 %17, ptr %5, align 1, !tbaa !19
  %18 = load ptr, ptr %3, align 8, !tbaa !5
  %19 = getelementptr inbounds %struct.PDP6, ptr %18, i32 0, i32 8
  %20 = load i8, ptr %19, align 4, !tbaa !20, !range !17, !noundef !18
  %21 = trunc i8 %20 to i1
  %22 = zext i1 %21 to i8
  store i8 %22, ptr %6, align 1, !tbaa !19
  %23 = load ptr, ptr %3, align 8, !tbaa !5
  %24 = getelementptr inbounds %struct.PDP6, ptr %23, i32 0, i32 17
  %25 = load i8, ptr %24, align 1, !tbaa !21, !range !17, !noundef !18
  %26 = trunc i8 %25 to i1
  %27 = zext i1 %26 to i8
  store i8 %27, ptr %7, align 1, !tbaa !19
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = load ptr, ptr %4, align 8, !tbaa !5
  call void @updateswitches(ptr noundef %28, ptr noundef %29)
  %30 = load ptr, ptr %3, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.PDP6, ptr %30, i32 0, i32 17
  %32 = load i8, ptr %31, align 1, !tbaa !21, !range !17, !noundef !18
  %33 = trunc i8 %32 to i1
  br i1 %33, label %34, label %99

34:                                               ; preds = %12
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = getelementptr inbounds %struct.PDP6, ptr %35, i32 0, i32 16
  %37 = load i8, ptr %36, align 4, !tbaa !16, !range !17, !noundef !18
  %38 = trunc i8 %37 to i1
  br i1 %38, label %39, label %44

39:                                               ; preds = %34
  %40 = load i8, ptr %5, align 1, !tbaa !19, !range !17, !noundef !18
  %41 = trunc i8 %40 to i1
  br i1 %41, label %44, label %42

42:                                               ; preds = %39
  %43 = load ptr, ptr %3, align 8, !tbaa !5
  call void @kt0(ptr noundef %43)
  br label %44

44:                                               ; preds = %42, %39, %34
  %45 = load ptr, ptr %3, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.PDP6, ptr %45, i32 0, i32 8
  %47 = load i8, ptr %46, align 4, !tbaa !20, !range !17, !noundef !18
  %48 = trunc i8 %47 to i1
  br i1 %48, label %49, label %60

49:                                               ; preds = %44
  %50 = load i8, ptr %6, align 1, !tbaa !19, !range !17, !noundef !18
  %51 = trunc i8 %50 to i1
  br i1 %51, label %60, label %52

52:                                               ; preds = %49
  %53 = load ptr, ptr %3, align 8, !tbaa !5
  call void @clr_run(ptr noundef %53)
  %54 = load ptr, ptr %3, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.PDP6, ptr %54, i32 0, i32 177
  store i8 1, ptr %55, align 8, !tbaa !22
  %56 = load i64, ptr @simtime, align 8, !tbaa !9
  %57 = add i64 %56, 100000
  %58 = load ptr, ptr %3, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.PDP6, ptr %58, i32 0, i32 178
  store i64 %57, ptr %59, align 8, !tbaa !23
  br label %60

60:                                               ; preds = %52, %49, %44
  %61 = load ptr, ptr %3, align 8, !tbaa !5
  %62 = getelementptr inbounds %struct.PDP6, ptr %61, i32 0, i32 177
  %63 = load i8, ptr %62, align 8, !tbaa !22, !range !17, !noundef !18
  %64 = trunc i8 %63 to i1
  br i1 %64, label %65, label %74

65:                                               ; preds = %60
  %66 = load i64, ptr @simtime, align 8, !tbaa !9
  %67 = load ptr, ptr %3, align 8, !tbaa !5
  %68 = getelementptr inbounds %struct.PDP6, ptr %67, i32 0, i32 178
  %69 = load i64, ptr %68, align 8, !tbaa !23
  %70 = icmp ugt i64 %66, %69
  br i1 %70, label %71, label %74

71:                                               ; preds = %65
  %72 = load ptr, ptr %3, align 8, !tbaa !5
  %73 = getelementptr inbounds %struct.PDP6, ptr %72, i32 0, i32 177
  store i8 0, ptr %73, align 8, !tbaa !22
  br label %74

74:                                               ; preds = %71, %65, %60
  %75 = load ptr, ptr %3, align 8, !tbaa !5
  %76 = getelementptr inbounds %struct.PDP6, ptr %75, i32 0, i32 0
  %77 = load i32, ptr %76, align 8, !tbaa !24
  %78 = icmp ne i32 %77, 0
  br i1 %78, label %79, label %82

79:                                               ; preds = %74
  %80 = load ptr, ptr %3, align 8, !tbaa !5
  call void @cycle(ptr noundef %80)
  %81 = load ptr, ptr %3, align 8, !tbaa !5
  call void @svc_music(ptr noundef %81)
  br label %87

82:                                               ; preds = %74
  %83 = load i64, ptr @simtime, align 8, !tbaa !9
  %84 = add i64 %83, 1500
  store i64 %84, ptr @simtime, align 8, !tbaa !9
  %85 = load ptr, ptr %3, align 8, !tbaa !5
  %86 = getelementptr inbounds %struct.PDP6, ptr %85, i32 0, i32 177
  store i8 0, ptr %86, align 8, !tbaa !22
  call void @stopmusic()
  br label %87

87:                                               ; preds = %82, %79
  %88 = load ptr, ptr %3, align 8, !tbaa !5
  %89 = load ptr, ptr %4, align 8, !tbaa !5
  call void @updatelights(ptr noundef %88, ptr noundef %89)
  %90 = load ptr, ptr %3, align 8, !tbaa !5
  call void @cycle_io(ptr noundef %90, i32 noundef 1)
  %91 = load ptr, ptr %3, align 8, !tbaa !5
  call void @handlenetmem(ptr noundef %91)
  br label %92

92:                                               ; preds = %96, %87
  %93 = load i64, ptr @realtime, align 8, !tbaa !9
  %94 = load i64, ptr @simtime, align 8, !tbaa !9
  %95 = icmp ult i64 %93, %94
  br i1 %95, label %96, label %98

96:                                               ; preds = %92
  %97 = call i64 @gettime()
  store i64 %97, ptr @realtime, align 8, !tbaa !9
  br label %92, !llvm.loop !25

98:                                               ; preds = %92
  br label %108

99:                                               ; preds = %12
  call void @stopmusic()
  %100 = load i8, ptr %7, align 1, !tbaa !19, !range !17, !noundef !18
  %101 = trunc i8 %100 to i1
  br i1 %101, label %102, label %104

102:                                              ; preds = %99
  %103 = load ptr, ptr %3, align 8, !tbaa !5
  call void @pwrclr(ptr noundef %103)
  br label %104

104:                                              ; preds = %102, %99
  %105 = load ptr, ptr %4, align 8, !tbaa !5
  call void @lightsoff(ptr noundef %105)
  %106 = call i64 @gettime()
  store i64 %106, ptr @simtime, align 8, !tbaa !9
  %107 = load ptr, ptr %3, align 8, !tbaa !5
  call void @cycle_io(ptr noundef %107, i32 noundef 0)
  br label %108

108:                                              ; preds = %104, %98
  br label %12
}

declare void @updateswitches(ptr noundef, ptr noundef) #1

declare void @inittime() #1

declare void @kt0(ptr noundef) #1

declare void @clr_run(ptr noundef) #1

declare void @cycle(ptr noundef) #1

declare void @svc_music(ptr noundef) #1

declare void @stopmusic() #1

declare void @updatelights(ptr noundef, ptr noundef) #1

declare void @handlenetmem(ptr noundef) #1

declare i64 @gettime() #1

declare void @lightsoff(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = !{!12, !10, i64 376}
!12 = !{!"PDP6", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !14, i64 16, !14, i64 17, !14, i64 18, !14, i64 19, !14, i64 20, !14, i64 21, !14, i64 22, !14, i64 23, !14, i64 24, !14, i64 25, !14, i64 26, !14, i64 27, !14, i64 28, !14, i64 29, !14, i64 30, !14, i64 31, !14, i64 32, !14, i64 33, !14, i64 34, !14, i64 35, !14, i64 36, !14, i64 37, !14, i64 38, !14, i64 39, !10, i64 40, !10, i64 48, !7, i64 56, !10, i64 64, !10, i64 72, !10, i64 80, !13, i64 88, !13, i64 92, !13, i64 96, !13, i64 100, !13, i64 104, !13, i64 108, !10, i64 112, !7, i64 120, !14, i64 121, !14, i64 122, !14, i64 123, !14, i64 124, !14, i64 125, !14, i64 126, !14, i64 127, !14, i64 128, !14, i64 129, !14, i64 130, !14, i64 131, !14, i64 132, !14, i64 133, !14, i64 134, !14, i64 135, !14, i64 136, !14, i64 137, !14, i64 138, !14, i64 139, !14, i64 140, !14, i64 141, !14, i64 142, !14, i64 143, !14, i64 144, !14, i64 145, !14, i64 146, !14, i64 147, !14, i64 148, !14, i64 149, !14, i64 150, !14, i64 151, !14, i64 152, !14, i64 153, !14, i64 154, !14, i64 155, !14, i64 156, !14, i64 157, !14, i64 158, !14, i64 159, !14, i64 160, !14, i64 161, !14, i64 162, !14, i64 163, !14, i64 164, !14, i64 165, !14, i64 166, !14, i64 167, !14, i64 168, !14, i64 169, !14, i64 170, !14, i64 171, !14, i64 172, !14, i64 173, !14, i64 174, !14, i64 175, !14, i64 176, !14, i64 177, !14, i64 178, !14, i64 179, !7, i64 180, !7, i64 181, !7, i64 182, !7, i64 183, !14, i64 184, !14, i64 185, !14, i64 186, !14, i64 187, !14, i64 188, !13, i64 192, !13, i64 196, !13, i64 200, !14, i64 204, !14, i64 205, !14, i64 206, !14, i64 207, !14, i64 208, !14, i64 209, !14, i64 210, !14, i64 211, !14, i64 212, !14, i64 213, !14, i64 214, !14, i64 215, !7, i64 216, !14, i64 217, !14, i64 218, !14, i64 219, !14, i64 220, !14, i64 221, !14, i64 222, !14, i64 223, !14, i64 224, !14, i64 225, !14, i64 226, !14, i64 227, !14, i64 228, !14, i64 229, !7, i64 230, !13, i64 232, !13, i64 236, !10, i64 240, !10, i64 248, !10, i64 256, !14, i64 264, !14, i64 265, !14, i64 266, !7, i64 267, !10, i64 272, !14, i64 280, !14, i64 281, !14, i64 282, !13, i64 284, !15, i64 288, !10, i64 304, !7, i64 312, !14, i64 313, !14, i64 314, !14, i64 315, !7, i64 316, !14, i64 317, !14, i64 318, !7, i64 319, !13, i64 320, !13, i64 324, !15, i64 328, !13, i64 340, !10, i64 344, !10, i64 352, !15, i64 360, !14, i64 372, !10, i64 376, !10, i64 384, !10, i64 392, !10, i64 400, !10, i64 408, !14, i64 416, !10, i64 424}
!13 = !{!"int", !7, i64 0}
!14 = !{!"_Bool", !7, i64 0}
!15 = !{!"FD", !13, i64 0, !13, i64 4, !13, i64 8}
!16 = !{!12, !14, i64 28}
!17 = !{i8 0, i8 2}
!18 = !{}
!19 = !{!14, !14, i64 0}
!20 = !{!12, !14, i64 20}
!21 = !{!12, !14, i64 29}
!22 = !{!12, !14, i64 416}
!23 = !{!12, !10, i64 424}
!24 = !{!12, !13, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@simtime = external dso_local local_unnamed_addr global i64, align 8
@realtime = external dso_local local_unnamed_addr global i64, align 8

declare void @pwrclr(ptr noundef) local_unnamed_addr #0

declare void @cycle_io(ptr noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: noreturn nounwind uwtable
define dso_local void @emu(ptr noundef %0, ptr noundef %1) local_unnamed_addr #1 {
  tail call void @updateswitches(ptr noundef %0, ptr noundef %1) #2
  tail call void @inittime() #2
  store i64 0, ptr @simtime, align 8, !tbaa !5
  %3 = getelementptr inbounds i8, ptr %0, i64 376
  store i64 0, ptr %3, align 8, !tbaa !9
  %4 = getelementptr inbounds i8, ptr %0, i64 28
  %5 = getelementptr inbounds i8, ptr %0, i64 20
  %6 = getelementptr inbounds i8, ptr %0, i64 29
  %7 = getelementptr inbounds i8, ptr %0, i64 416
  %8 = getelementptr inbounds i8, ptr %0, i64 424
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.backedge, %2
  %9 = load i8, ptr %4, align 4, !tbaa !14, !range !15, !noundef !16
  %10 = load i8, ptr %5, align 4, !tbaa !17, !range !15, !noundef !16
  %11 = trunc nuw i8 %10 to i1
  %12 = load i8, ptr %6, align 1, !tbaa !18, !range !15, !noundef !16
  tail call void @updateswitches(ptr noundef %0, ptr noundef %1) #2
  %13 = load i8, ptr %6, align 1, !tbaa !18, !range !15, !noundef !16
  %14 = trunc nuw i8 %13 to i1
  br i1 %14, label %15, label %45

15:                                               ; preds = %.loopexit
  %16 = trunc nuw i8 %9 to i1
  %17 = load i8, ptr %4, align 4, !tbaa !14, !range !15, !noundef !16
  %18 = trunc nuw i8 %17 to i1
  %.not31 = xor i1 %18, true
  %brmerge = select i1 %.not31, i1 true, i1 %16
  br i1 %brmerge, label %20, label %19

19:                                               ; preds = %15
  tail call void @kt0(ptr noundef nonnull %0) #2
  br label %20

20:                                               ; preds = %15, %19
  %21 = load i8, ptr %5, align 4, !tbaa !17, !range !15, !noundef !16
  %22 = trunc nuw i8 %21 to i1
  %.not32 = xor i1 %22, true
  %brmerge33 = select i1 %.not32, i1 true, i1 %11
  br i1 %brmerge33, label %25, label %.thread

.thread:                                          ; preds = %20
  tail call void @clr_run(ptr noundef nonnull %0) #2
  store i8 1, ptr %7, align 8, !tbaa !19
  %23 = load i64, ptr @simtime, align 8, !tbaa !5
  %24 = add i64 %23, 100000
  store i64 %24, ptr %8, align 8, !tbaa !20
  br label %27

25:                                               ; preds = %20
  %.pre = load i8, ptr %7, align 8, !tbaa !19, !range !15
  %26 = trunc nuw i8 %.pre to i1
  br i1 %26, label %27, label %32

27:                                               ; preds = %.thread, %25
  %28 = load i64, ptr @simtime, align 8, !tbaa !5
  %29 = load i64, ptr %8, align 8, !tbaa !20
  %30 = icmp ugt i64 %28, %29
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  store i8 0, ptr %7, align 8, !tbaa !19
  br label %32

32:                                               ; preds = %31, %27, %25
  %33 = load i32, ptr %0, align 8, !tbaa !21
  %.not = icmp eq i32 %33, 0
  br i1 %.not, label %35, label %34

34:                                               ; preds = %32
  tail call void @cycle(ptr noundef nonnull %0) #2
  tail call void @svc_music(ptr noundef nonnull %0) #2
  br label %38

35:                                               ; preds = %32
  %36 = load i64, ptr @simtime, align 8, !tbaa !5
  %37 = add i64 %36, 1500
  store i64 %37, ptr @simtime, align 8, !tbaa !5
  store i8 0, ptr %7, align 8, !tbaa !19
  tail call void @stopmusic() #2
  br label %38

38:                                               ; preds = %35, %34
  tail call void @updatelights(ptr noundef nonnull %0, ptr noundef %1) #2
  tail call void @cycle_io(ptr noundef nonnull %0, i32 noundef 1) #2
  tail call void @handlenetmem(ptr noundef nonnull %0) #2
  %39 = load i64, ptr @realtime, align 8, !tbaa !5
  %40 = load i64, ptr @simtime, align 8, !tbaa !5
  %41 = icmp ult i64 %39, %40
  br i1 %41, label %.lr.ph, label %.loopexit.backedge

.loopexit.backedge:                               ; preds = %.lr.ph, %38, %48
  br label %.loopexit

.lr.ph:                                           ; preds = %38, %.lr.ph
  %42 = tail call i64 @gettime() #2
  store i64 %42, ptr @realtime, align 8, !tbaa !5
  %43 = load i64, ptr @simtime, align 8, !tbaa !5
  %44 = icmp ult i64 %42, %43
  br i1 %44, label %.lr.ph, label %.loopexit.backedge, !llvm.loop !22

45:                                               ; preds = %.loopexit
  %46 = trunc nuw i8 %12 to i1
  tail call void @stopmusic() #2
  br i1 %46, label %47, label %48

47:                                               ; preds = %45
  tail call void @pwrclr(ptr noundef nonnull %0) #2
  br label %48

48:                                               ; preds = %47, %45
  tail call void @lightsoff(ptr noundef %1) #2
  %49 = tail call i64 @gettime() #2
  store i64 %49, ptr @simtime, align 8, !tbaa !5
  tail call void @cycle_io(ptr noundef nonnull %0, i32 noundef 0) #2
  br label %.loopexit.backedge
}

declare void @updateswitches(ptr noundef, ptr noundef) local_unnamed_addr #0

declare void @inittime() local_unnamed_addr #0

declare void @kt0(ptr noundef) local_unnamed_addr #0

declare void @clr_run(ptr noundef) local_unnamed_addr #0

declare void @cycle(ptr noundef) local_unnamed_addr #0

declare void @svc_music(ptr noundef) local_unnamed_addr #0

declare void @stopmusic() local_unnamed_addr #0

declare void @updatelights(ptr noundef, ptr noundef) local_unnamed_addr #0

declare void @handlenetmem(ptr noundef) local_unnamed_addr #0

declare i64 @gettime() local_unnamed_addr #0

declare void @lightsoff(ptr noundef) local_unnamed_addr #0

attributes #0 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 376}
!10 = !{!"PDP6", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12, !12, i64 16, !12, i64 17, !12, i64 18, !12, i64 19, !12, i64 20, !12, i64 21, !12, i64 22, !12, i64 23, !12, i64 24, !12, i64 25, !12, i64 26, !12, i64 27, !12, i64 28, !12, i64 29, !12, i64 30, !12, i64 31, !12, i64 32, !12, i64 33, !12, i64 34, !12, i64 35, !12, i64 36, !12, i64 37, !12, i64 38, !12, i64 39, !6, i64 40, !6, i64 48, !7, i64 56, !6, i64 64, !6, i64 72, !6, i64 80, !11, i64 88, !11, i64 92, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !6, i64 112, !7, i64 120, !12, i64 121, !12, i64 122, !12, i64 123, !12, i64 124, !12, i64 125, !12, i64 126, !12, i64 127, !12, i64 128, !12, i64 129, !12, i64 130, !12, i64 131, !12, i64 132, !12, i64 133, !12, i64 134, !12, i64 135, !12, i64 136, !12, i64 137, !12, i64 138, !12, i64 139, !12, i64 140, !12, i64 141, !12, i64 142, !12, i64 143, !12, i64 144, !12, i64 145, !12, i64 146, !12, i64 147, !12, i64 148, !12, i64 149, !12, i64 150, !12, i64 151, !12, i64 152, !12, i64 153, !12, i64 154, !12, i64 155, !12, i64 156, !12, i64 157, !12, i64 158, !12, i64 159, !12, i64 160, !12, i64 161, !12, i64 162, !12, i64 163, !12, i64 164, !12, i64 165, !12, i64 166, !12, i64 167, !12, i64 168, !12, i64 169, !12, i64 170, !12, i64 171, !12, i64 172, !12, i64 173, !12, i64 174, !12, i64 175, !12, i64 176, !12, i64 177, !12, i64 178, !12, i64 179, !7, i64 180, !7, i64 181, !7, i64 182, !7, i64 183, !12, i64 184, !12, i64 185, !12, i64 186, !12, i64 187, !12, i64 188, !11, i64 192, !11, i64 196, !11, i64 200, !12, i64 204, !12, i64 205, !12, i64 206, !12, i64 207, !12, i64 208, !12, i64 209, !12, i64 210, !12, i64 211, !12, i64 212, !12, i64 213, !12, i64 214, !12, i64 215, !7, i64 216, !12, i64 217, !12, i64 218, !12, i64 219, !12, i64 220, !12, i64 221, !12, i64 222, !12, i64 223, !12, i64 224, !12, i64 225, !12, i64 226, !12, i64 227, !12, i64 228, !12, i64 229, !7, i64 230, !11, i64 232, !11, i64 236, !6, i64 240, !6, i64 248, !6, i64 256, !12, i64 264, !12, i64 265, !12, i64 266, !7, i64 267, !6, i64 272, !12, i64 280, !12, i64 281, !12, i64 282, !11, i64 284, !13, i64 288, !6, i64 304, !7, i64 312, !12, i64 313, !12, i64 314, !12, i64 315, !7, i64 316, !12, i64 317, !12, i64 318, !7, i64 319, !11, i64 320, !11, i64 324, !13, i64 328, !11, i64 340, !6, i64 344, !6, i64 352, !13, i64 360, !12, i64 372, !6, i64 376, !6, i64 384, !6, i64 392, !6, i64 400, !6, i64 408, !12, i64 416, !6, i64 424}
!11 = !{!"int", !7, i64 0}
!12 = !{!"_Bool", !7, i64 0}
!13 = !{!"FD", !11, i64 0, !11, i64 4, !11, i64 8}
!14 = !{!10, !12, i64 28}
!15 = !{i8 0, i8 2}
!16 = !{}
!17 = !{!10, !12, i64 20}
!18 = !{!10, !12, i64 29}
!19 = !{!10, !12, i64 416}
!20 = !{!10, !6, i64 424}
!21 = !{!10, !11, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass