; LLVM IR from PetoiCamp/OpenCatEsp32 :: src/icm42670 (inv_imu_driver)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.inv_imu_device = type { %struct.inv_imu_transport, ptr, [4128 x i8], i8, i8, i8, i32, i64, i64 }
%struct.inv_imu_transport = type { %struct.inv_imu_serif, %struct.register_cache, i8 }
%struct.inv_imu_serif = type { ptr, ptr, ptr, i32, i32, i32 }
%struct.register_cache = type { i8, i8, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_get_accel_fsr(ptr noundef %0, ptr noundef %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  %7 = load ptr, ptr %3, align 8, !tbaa !5
  %8 = getelementptr inbounds %struct.inv_imu_device, ptr %7, i32 0, i32 5
  %9 = load i8, ptr %8, align 2, !tbaa !11
  %10 = zext i8 %9 to i32
  %11 = icmp ne i32 %10, 0
  br i1 %11, label %12, label %19

12:                                               ; preds = %2
  %13 = load ptr, ptr %3, align 8, !tbaa !5
  %14 = getelementptr inbounds %struct.inv_imu_device, ptr %13, i32 0, i32 6
  %15 = load i32, ptr %14, align 4, !tbaa !17
  %16 = icmp eq i32 %15, 1
  br i1 %16, label %17, label %19

17:                                               ; preds = %12
  %18 = load ptr, ptr %4, align 8, !tbaa !5
  store i32 0, ptr %18, align 4, !tbaa !9
  br label %28

19:                                               ; preds = %12, %2
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = call i32 @inv_imu_read_reg(ptr noundef %20, i32 noundef 65569, i32 noundef 1, ptr noundef %6)
  %22 = load i32, ptr %5, align 4, !tbaa !9
  %23 = or i32 %22, %21
  store i32 %23, ptr %5, align 4, !tbaa !9
  %24 = load i8, ptr %6, align 1, !tbaa !18
  %25 = zext i8 %24 to i32
  %26 = and i32 %25, 96
  %27 = load ptr, ptr %4, align 8, !tbaa !5
  store i32 %26, ptr %27, align 4, !tbaa !9
  br label %28

28:                                               ; preds = %19, %17
  %29 = load i32, ptr %5, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  ret i32 %29
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 4186}
!12 = !{!"inv_imu_device", !13, i64 0, !6, i64 48, !7, i64 56, !7, i64 4184, !7, i64 4185, !7, i64 4186, !10, i64 4188, !16, i64 4192, !16, i64 4200}
!13 = !{!"inv_imu_transport", !14, i64 0, !15, i64 40, !7, i64 44}
!14 = !{!"inv_imu_serif", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !10, i64 32}
!15 = !{!"register_cache", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!16 = !{!"long", !7, i64 0}
!17 = !{!12, !10, i64 4188}
!18 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_get_accel_fsr(ptr noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #2 {
  %3 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3
  %4 = getelementptr inbounds i8, ptr %0, i64 4186
  %5 = load i8, ptr %4, align 2, !tbaa !5
  %.not = icmp eq i8 %5, 0
  br i1 %.not, label %10, label %6

6:                                                ; preds = %2
  %7 = getelementptr inbounds i8, ptr %0, i64 4188
  %8 = load i32, ptr %7, align 4, !tbaa !15
  %9 = icmp eq i32 %8, 1
  br i1 %9, label %15, label %10

10:                                               ; preds = %6, %2
  %11 = call i32 @inv_imu_read_reg(ptr noundef nonnull %0, i32 noundef 65569, i32 noundef 1, ptr noundef nonnull %3) #3
  %12 = load i8, ptr %3, align 1, !tbaa !16
  %13 = and i8 %12, 96
  %14 = zext nneg i8 %13 to i32
  br label %15

15:                                               ; preds = %6, %10
  %storemerge = phi i32 [ %14, %10 ], [ 0, %6 ]
  %.0 = phi i32 [ %11, %10 ], [ 0, %6 ]
  store i32 %storemerge, ptr %1, align 4, !tbaa !17
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3
  ret i32 %.0
}

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 4186}
!6 = !{!"inv_imu_device", !7, i64 0, !9, i64 48, !10, i64 56, !10, i64 4184, !10, i64 4185, !10, i64 4186, !12, i64 4188, !14, i64 4192, !14, i64 4200}
!7 = !{!"inv_imu_transport", !8, i64 0, !13, i64 40, !10, i64 44}
!8 = !{!"inv_imu_serif", !9, i64 0, !9, i64 8, !9, i64 16, !12, i64 24, !12, i64 28, !12, i64 32}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"int", !10, i64 0}
!13 = !{!"register_cache", !10, i64 0, !10, i64 1, !10, i64 2, !10, i64 3}
!14 = !{!"long", !10, i64 0}
!15 = !{!6, !12, i64 4188}
!16 = !{!10, !10, i64 0}
!17 = !{!12, !12, i64 0}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass