; LLVM IR from ncduy0303/Competitive-Programming :: Graphs/Lowest Common Ancestor/LCA (RMQ).ll (Z14build_lg_tablev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@lg = external dso_local global [400002 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z14build_lg_tablev() #1 {
  %1 = alloca i32, align 4
  store i32 0, ptr getelementptr inbounds ([400002 x i32], ptr @lg, i64 0, i64 1), align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #2
  store i32 2, ptr %1, align 4, !tbaa !5
  br label %2

2:                                                ; preds = %18, %0
  %3 = load i32, ptr %1, align 4, !tbaa !5
  %4 = load i32, ptr @n, align 4, !tbaa !5
  %5 = mul nsw i32 2, %4
  %6 = icmp sle i32 %3, %5
  br i1 %6, label %8, label %7

7:                                                ; preds = %2
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #2
  br label %21

8:                                                ; preds = %2
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = sdiv i32 %9, 2
  %11 = sext i32 %10 to i64
  %12 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %11
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = add nsw i32 %13, 1
  %15 = load i32, ptr %1, align 4, !tbaa !5
  %16 = sext i32 %15 to i64
  %17 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %16
  store i32 %14, ptr %17, align 4, !tbaa !5
  br label %18

18:                                               ; preds = %8
  %19 = load i32, ptr %1, align 4, !tbaa !5
  %20 = add nsw i32 %19, 1
  store i32 %20, ptr %1, align 4, !tbaa !5
  br label %2, !llvm.loop !9

21:                                               ; preds = %7
  ret void
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@lg = external dso_local local_unnamed_addr global [400002 x i32], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z14build_lg_tablev() local_unnamed_addr #0 {
  store i32 0, ptr getelementptr inbounds (i8, ptr @lg, i64 4), align 4, !tbaa !5
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %.not4 = icmp slt i32 %1, 1
  br i1 %.not4, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %0
  %2 = shl nuw i32 %1, 1
  %3 = icmp slt i32 %2, 3
  br i1 %3, label %.lr.ph.epil, label %.lr.ph.preheader.new

.lr.ph.preheader.new:                             ; preds = %.lr.ph.preheader
  %4 = zext nneg i32 %2 to i64
  %5 = add nsw i64 %4, -4
  br label %.lr.ph

.lr.ph.epil:                                      ; preds = %.lr.ph, %.lr.ph.preheader
  %indvars.iv.unr = phi i64 [ 2, %.lr.ph.preheader ], [ %indvars.iv.next.1, %.lr.ph ]
  %6 = lshr i64 %indvars.iv.unr, 1
  %7 = and i64 %6, 2147483647
  %8 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %7
  %9 = load i32, ptr %8, align 4, !tbaa !5
  %10 = add nsw i32 %9, 1
  %11 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %indvars.iv.unr
  store i32 %10, ptr %11, align 4, !tbaa !5
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.epil, %0
  ret void

.lr.ph:                                           ; preds = %.lr.ph, %.lr.ph.preheader.new
  %indvars.iv = phi i64 [ 2, %.lr.ph.preheader.new ], [ %indvars.iv.next.1, %.lr.ph ]
  %niter = phi i64 [ 0, %.lr.ph.preheader.new ], [ %niter.next.1, %.lr.ph ]
  %12 = lshr exact i64 %indvars.iv, 1
  %13 = and i64 %12, 2147483647
  %14 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = add nsw i32 %15, 1
  %17 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %indvars.iv
  store i32 %16, ptr %17, align 8, !tbaa !5
  %indvars.iv.next = or disjoint i64 %indvars.iv, 1
  %18 = lshr exact i64 %indvars.iv, 1
  %19 = and i64 %18, 2147483647
  %20 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %19
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = add nsw i32 %21, 1
  %23 = getelementptr inbounds [400002 x i32], ptr @lg, i64 0, i64 %indvars.iv.next
  store i32 %22, ptr %23, align 4, !tbaa !5
  %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
  %niter.next.1 = add i64 %niter, 2
  %niter.ncmp.1 = icmp eq i64 %niter, %5
  br i1 %niter.ncmp.1, label %.lr.ph.epil, label %.lr.ph, !llvm.loop !9
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalDCEPass,GlobalOptPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SCCPPass,SROAPass,SimplifyCFGPass