; LLVM IR from facebook/redex :: service/copy-propagation (AliasedRegisters)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.boost::optional" = type { %"class.boost::optional_detail::tc_optional_base" }
%"class.boost::optional_detail::tc_optional_base" = type { i8, i32 }
%"struct.boost::none_t" = type { i8 }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17aliased_registers16AliasedRegisters17maybe_change_rootEj(ptr noundef nonnull align 8 dereferenceable(144) %0, i32 noundef %1) #0 align 2 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca %"class.boost::optional", align 4
  %6 = alloca %"struct.boost::none_t", align 1
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  %7 = load ptr, ptr %3, align 8
  %8 = load i32, ptr %4, align 4, !tbaa !9
  call void @_ZN5boost8optionalIjEC2ENS_6none_tE(ptr noundef nonnull align 4 dereferenceable(8) %5) #2
  %9 = getelementptr inbounds %"class.boost::optional", ptr %5, i32 0, i32 0
  %10 = load i64, ptr %9, align 4
  call void @_ZN17aliased_registers16AliasedRegisters18change_root_helperEjN5boost8optionalIjEE(ptr noundef nonnull align 8 dereferenceable(144) %7, i32 noundef %8, i64 %10)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17aliased_registers16AliasedRegisters18change_root_helperEjN5boost8optionalIjEE(ptr noundef nonnull align 8 dereferenceable(144), i32 noundef, i64) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5boost8optionalIjEC2ENS_6none_tE(ptr noundef nonnull align 4 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.boost::optional" = type { %"class.boost::optional_detail::tc_optional_base" }
%"class.boost::optional_detail::tc_optional_base" = type { i8, i32 }

; Function Attrs: mustprogress uwtable
define dso_local void @_ZN17aliased_registers16AliasedRegisters17maybe_change_rootEj(ptr noundef nonnull align 8 dereferenceable(144) %0, i32 noundef %1) local_unnamed_addr #0 align 2 {
  %3 = alloca %"class.boost::optional", align 8
  call void @_ZN5boost8optionalIjEC2ENS_6none_tE(ptr noundef nonnull align 4 dereferenceable(8) %3) #2
  %4 = load i64, ptr %3, align 8
  call void @_ZN17aliased_registers16AliasedRegisters18change_root_helperEjN5boost8optionalIjEE(ptr noundef nonnull align 8 dereferenceable(144) %0, i32 noundef %1, i64 %4)
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN17aliased_registers16AliasedRegisters18change_root_helperEjN5boost8optionalIjEE(ptr noundef nonnull align 8 dereferenceable(144), i32 noundef, i64) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZN5boost8optionalIjEC2ENS_6none_tE(ptr noundef nonnull align 4 dereferenceable(8)) unnamed_addr #1 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferAlignmentPass,SROAPass