; LLVM IR from Dovyski/opengl-demos :: libs/glm-0.9.9.3/test/gtc/gtc_bitfield.ll (ZN19bitfieldInterleave34testEv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN19bitfieldInterleave34testEv() #1 {
  %1 = alloca i32, align 4
  %2 = alloca i16, align 2
  %3 = alloca i16, align 2
  %4 = alloca i16, align 2
  %5 = alloca i16, align 2
  %6 = alloca i32, align 4
  %7 = alloca i16, align 2
  %8 = alloca i16, align 2
  %9 = alloca i64, align 8
  %10 = alloca i64, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 0, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #4
  store i16 2048, ptr %2, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #4
  store i16 2048, ptr %3, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #4
  store i16 2048, ptr %4, align 2, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #4
  store i16 0, ptr %5, align 2, !tbaa !9
  br label %11

11:                                               ; preds = %62, %0
  %12 = load i16, ptr %5, align 2, !tbaa !9
  %13 = zext i16 %12 to i32
  %14 = load i16, ptr %4, align 2, !tbaa !9
  %15 = zext i16 %14 to i32
  %16 = icmp slt i32 %13, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %11
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #4
  br label %67

18:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 2, ptr %7) #4
  store i16 0, ptr %7, align 2, !tbaa !9
  br label %19

19:                                               ; preds = %56, %18
  %20 = load i16, ptr %7, align 2, !tbaa !9
  %21 = zext i16 %20 to i32
  %22 = load i16, ptr %3, align 2, !tbaa !9
  %23 = zext i16 %22 to i32
  %24 = icmp slt i32 %21, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %19
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %7) #4
  br label %61

26:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 2, ptr %8) #4
  store i16 0, ptr %8, align 2, !tbaa !9
  br label %27

27:                                               ; preds = %50, %26
  %28 = load i16, ptr %8, align 2, !tbaa !9
  %29 = zext i16 %28 to i32
  %30 = load i16, ptr %2, align 2, !tbaa !9
  %31 = zext i16 %30 to i32
  %32 = icmp slt i32 %29, %31
  br i1 %32, label %34, label %33

33:                                               ; preds = %27
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %8) #4
  br label %55

34:                                               ; preds = %27
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %35 = load i16, ptr %8, align 2, !tbaa !9
  %36 = load i16, ptr %7, align 2, !tbaa !9
  %37 = load i16, ptr %5, align 2, !tbaa !9
  %38 = call noundef i64 @_ZN19bitfieldInterleave321refBitfieldInterleaveItmEET0_T_S2_S2_(i16 noundef zeroext %35, i16 noundef zeroext %36, i16 noundef zeroext %37)
  store i64 %38, ptr %9, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %39 = load i16, ptr %8, align 2, !tbaa !9
  %40 = load i16, ptr %7, align 2, !tbaa !9
  %41 = load i16, ptr %5, align 2, !tbaa !9
  %42 = call noundef i64 @_ZN3glm18bitfieldInterleaveEttt(i16 noundef zeroext %39, i16 noundef zeroext %40, i16 noundef zeroext %41)
  store i64 %42, ptr %10, align 8, !tbaa !11
  %43 = load i64, ptr %9, align 8, !tbaa !11
  %44 = load i64, ptr %10, align 8, !tbaa !11
  %45 = icmp eq i64 %43, %44
  %46 = zext i1 %45 to i64
  %47 = select i1 %45, i32 0, i32 1
  %48 = load i32, ptr %1, align 4, !tbaa !5
  %49 = add nsw i32 %48, %47
  store i32 %49, ptr %1, align 4, !tbaa !5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  br label %50

50:                                               ; preds = %34
  %51 = load i16, ptr %8, align 2, !tbaa !9
  %52 = zext i16 %51 to i32
  %53 = add nsw i32 %52, 27
  %54 = trunc i32 %53 to i16
  store i16 %54, ptr %8, align 2, !tbaa !9
  br label %27, !llvm.loop !13

55:                                               ; preds = %33
  br label %56

56:                                               ; preds = %55
  %57 = load i16, ptr %7, align 2, !tbaa !9
  %58 = zext i16 %57 to i32
  %59 = add nsw i32 %58, 27
  %60 = trunc i32 %59 to i16
  store i16 %60, ptr %7, align 2, !tbaa !9
  br label %19, !llvm.loop !15

61:                                               ; preds = %25
  br label %62

62:                                               ; preds = %61
  %63 = load i16, ptr %5, align 2, !tbaa !9
  %64 = zext i16 %63 to i32
  %65 = add nsw i32 %64, 27
  %66 = trunc i32 %65 to i16
  store i16 %66, ptr %5, align 2, !tbaa !9
  br label %11, !llvm.loop !16

67:                                               ; preds = %17
  %68 = load i32, ptr %1, align 4, !tbaa !5
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #4
  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  ret i32 %68
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN19bitfieldInterleave321refBitfieldInterleaveItmEET0_T_S2_S2_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) #2

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZN3glm18bitfieldInterleaveEttt(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN19bitfieldInterleave34testEv() local_unnamed_addr #0 {
  br label %.preheader27

.preheader27:                                     ; preds = %0, %2
  %.033 = phi i32 [ 0, %0 ], [ %11, %2 ]
  %.01932 = phi i16 [ 0, %0 ], [ %narrow, %2 ]
  br label %.preheader

1:                                                ; preds = %2
  ret i32 %11

.preheader:                                       ; preds = %.preheader27, %4
  %.131 = phi i32 [ %.033, %.preheader27 ], [ %11, %4 ]
  %.02130 = phi i16 [ 0, %.preheader27 ], [ %narrow25, %4 ]
  br label %6

2:                                                ; preds = %4
  %narrow = add nuw nsw i16 %.01932, 27
  %3 = icmp ult i16 %.01932, 2021
  br i1 %3, label %.preheader27, label %1, !llvm.loop !5

4:                                                ; preds = %6
  %narrow25 = add nuw nsw i16 %.02130, 27
  %5 = icmp ult i16 %.02130, 2021
  br i1 %5, label %.preheader, label %2, !llvm.loop !7

6:                                                ; preds = %.preheader, %6
  %.229 = phi i32 [ %.131, %.preheader ], [ %11, %6 ]
  %.02028 = phi i16 [ 0, %.preheader ], [ %narrow26, %6 ]
  %7 = tail call noundef i64 @_ZN19bitfieldInterleave321refBitfieldInterleaveItmEET0_T_S2_S2_(i16 noundef zeroext %.02028, i16 noundef zeroext %.02130, i16 noundef zeroext %.01932)
  %8 = tail call noundef i64 @_ZN3glm18bitfieldInterleaveEttt(i16 noundef zeroext %.02028, i16 noundef zeroext %.02130, i16 noundef zeroext %.01932)
  %9 = icmp ne i64 %7, %8
  %10 = zext i1 %9 to i32
  %11 = add nsw i32 %.229, %10
  %narrow26 = add nuw nsw i16 %.02028, 27
  %12 = icmp ult i16 %.02028, 2021
  br i1 %12, label %6, label %4, !llvm.loop !8
}

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZN19bitfieldInterleave321refBitfieldInterleaveItmEET0_T_S2_S2_(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress uwtable
declare dso_local noundef i64 @_ZN3glm18bitfieldInterleaveEttt(i16 noundef zeroext, i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass