; LLVM IR from div-bargali/Data-Structures-and-Algorithms :: C++/Algorithms/Sorting-Algorithms/Bitonic Sort/Bitonic_Sort.ll (Z12bitonicMergePiiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z11compAndSwapPiiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z12bitonicMergePiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #1 {
  %5 = alloca ptr, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !9
  store i32 %2, ptr %7, align 4, !tbaa !9
  store i32 %3, ptr %8, align 4, !tbaa !9
  %11 = load i32, ptr %7, align 4, !tbaa !9
  %12 = icmp sgt i32 %11, 1
  br i1 %12, label %13, label %45

13:                                               ; preds = %4
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %14 = load i32, ptr %7, align 4, !tbaa !9
  %15 = sdiv i32 %14, 2
  store i32 %15, ptr %9, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %16 = load i32, ptr %6, align 4, !tbaa !9
  store i32 %16, ptr %10, align 4, !tbaa !9
  br label %17

17:                                               ; preds = %31, %13
  %18 = load i32, ptr %10, align 4, !tbaa !9
  %19 = load i32, ptr %6, align 4, !tbaa !9
  %20 = load i32, ptr %9, align 4, !tbaa !9
  %21 = add nsw i32 %19, %20
  %22 = icmp slt i32 %18, %21
  br i1 %22, label %24, label %23

23:                                               ; preds = %17
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %34

24:                                               ; preds = %17
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = load i32, ptr %10, align 4, !tbaa !9
  %27 = load i32, ptr %10, align 4, !tbaa !9
  %28 = load i32, ptr %9, align 4, !tbaa !9
  %29 = add nsw i32 %27, %28
  %30 = load i32, ptr %8, align 4, !tbaa !9
  call void @_Z11compAndSwapPiiii(ptr noundef %25, i32 noundef %26, i32 noundef %29, i32 noundef %30)
  br label %31

31:                                               ; preds = %24
  %32 = load i32, ptr %10, align 4, !tbaa !9
  %33 = add nsw i32 %32, 1
  store i32 %33, ptr %10, align 4, !tbaa !9
  br label %17, !llvm.loop !11

34:                                               ; preds = %23
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = load i32, ptr %6, align 4, !tbaa !9
  %37 = load i32, ptr %9, align 4, !tbaa !9
  %38 = load i32, ptr %8, align 4, !tbaa !9
  call void @_Z12bitonicMergePiiii(ptr noundef %35, i32 noundef %36, i32 noundef %37, i32 noundef %38)
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = load i32, ptr %6, align 4, !tbaa !9
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = add nsw i32 %40, %41
  %43 = load i32, ptr %9, align 4, !tbaa !9
  %44 = load i32, ptr %8, align 4, !tbaa !9
  call void @_Z12bitonicMergePiiii(ptr noundef %39, i32 noundef %42, i32 noundef %43, i32 noundef %44)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  br label %45

45:                                               ; preds = %34, %4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z11compAndSwapPiiii(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z12bitonicMergePiiii(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
  br label %tailrecurse38

tailrecurse38:                                    ; preds = %.lr.ph29, %4
  %.tr39 = phi i32 [ %1, %4 ], [ %.tr2226, %.lr.ph29 ]
  %.tr40 = phi i32 [ %2, %4 ], [ %6, %.lr.ph29 ]
  %5 = icmp sgt i32 %.tr40, 1
  br i1 %5, label %.lr.ph29, label %tailrecurse._crit_edge

.lr.ph29:                                         ; preds = %tailrecurse38, %tailrecurse
  %.tr2327 = phi i32 [ %6, %tailrecurse ], [ %.tr40, %tailrecurse38 ]
  %.tr2226 = phi i32 [ %7, %tailrecurse ], [ %.tr39, %tailrecurse38 ]
  %6 = lshr i32 %.tr2327, 1
  %7 = add nsw i32 %6, %.tr2226
  %.not = icmp ult i32 %.tr2327, 2
  br i1 %.not, label %tailrecurse38, label %.lr.ph

tailrecurse:                                      ; preds = %.lr.ph
  tail call void @_Z12bitonicMergePiiii(ptr noundef %0, i32 noundef %.tr2226, i32 noundef %6, i32 noundef %3)
  %8 = icmp ugt i32 %.tr2327, 3
  br i1 %8, label %.lr.ph29, label %tailrecurse._crit_edge

.lr.ph:                                           ; preds = %.lr.ph29, %.lr.ph
  %.025 = phi i32 [ %10, %.lr.ph ], [ %.tr2226, %.lr.ph29 ]
  %9 = add nsw i32 %.025, %6
  tail call void @_Z11compAndSwapPiiii(ptr noundef %0, i32 noundef %.025, i32 noundef %9, i32 noundef %3)
  %10 = add nsw i32 %.025, 1
  %11 = icmp slt i32 %10, %7
  br i1 %11, label %.lr.ph, label %tailrecurse, !llvm.loop !5

tailrecurse._crit_edge:                           ; preds = %tailrecurse, %tailrecurse38
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass