; LLVM IR from bqi343/cp-notebook :: Contests/Other Solutions/VT HSPC/2017/RA Duty.ll (Z4testi)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Dinic = type { [100 x i32], [100 x i32], [100 x %"class.std::vector"] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl" }
%"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }

@m = external dso_local global i32, align 4
@n = external dso_local global i32, align 4
@D = external dso_local global %struct.Dinic, align 8
@ADJ = external dso_local global [61 x %"class.std::vector.3"], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5DinicC2Ev(ptr noundef nonnull align 8 dereferenceable(3200)) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5DinicD2Ev(ptr noundef nonnull align 8 dereferenceable(3200)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z4testi(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca %struct.Dinic, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca ptr, align 8
  %7 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %8 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 3200, ptr %3) #5
  call void @llvm.memset.p0.i64(ptr align 8 %3, i8 0, i64 3200, i1 false)
  call void @_ZN5DinicC2Ev(ptr noundef nonnull align 8 dereferenceable(3200) %3) #5
  %11 = call noundef nonnull align 8 dereferenceable(3200) ptr @_ZN5DinicaSEOS_(ptr noundef nonnull align 8 dereferenceable(3200) @D, ptr noundef nonnull align 8 dereferenceable(3200) %3) #5
  call void @_ZN5DinicD2Ev(ptr noundef nonnull align 8 dereferenceable(3200) %3) #5
  call void @llvm.lifetime.end.p0(i64 3200, ptr %3) #5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  store i32 1, ptr %4, align 4, !tbaa !5
  br label %12

12:                                               ; preds = %41, %1
  %13 = load i32, ptr %4, align 4, !tbaa !5
  %14 = load i32, ptr @m, align 4, !tbaa !5
  %15 = add nsw i32 %14, 1
  %16 = icmp slt i32 %13, %15
  br i1 %16, label %18, label %17

17:                                               ; preds = %12
  store i32 2, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  br label %44

18:                                               ; preds = %12
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = load i32, ptr %2, align 4, !tbaa !5
  call void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef 0, i32 noundef %19, i32 noundef %20)
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = sext i32 %21 to i64
  %23 = getelementptr inbounds [61 x %"class.std::vector.3"], ptr @ADJ, i64 0, i64 %22
  store ptr %23, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %24 = load ptr, ptr %6, align 8, !tbaa !9
  %25 = call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %24) #5
  %26 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %7, i32 0, i32 0
  store ptr %25, ptr %26, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %27 = load ptr, ptr %6, align 8, !tbaa !9
  %28 = call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %27) #5
  %29 = getelementptr inbounds %"class.__gnu_cxx::__normal_iterator", ptr %8, i32 0, i32 0
  store ptr %28, ptr %29, align 8
  br label %30

30:                                               ; preds = %38, %18
  %31 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull align 8 dereferenceable(8) %8) #5
  br i1 %31, label %33, label %32

32:                                               ; preds = %30
  store i32 5, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  br label %40

33:                                               ; preds = %30
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  %34 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %7) #5
  %35 = load i32, ptr %34, align 4, !tbaa !5
  store i32 %35, ptr %9, align 4, !tbaa !5
  %36 = load i32, ptr %4, align 4, !tbaa !5
  %37 = load i32, ptr %9, align 4, !tbaa !5
  call void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef %36, i32 noundef %37, i32 noundef 1)
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %38

38:                                               ; preds = %33
  %39 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %7) #5
  br label %30

40:                                               ; preds = %32
  br label %41

41:                                               ; preds = %40
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = add nsw i32 %42, 1
  store i32 %43, ptr %4, align 4, !tbaa !5
  br label %12, !llvm.loop !11

44:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  store i32 1, ptr %10, align 4, !tbaa !5
  br label %45

45:                                               ; preds = %54, %44
  %46 = load i32, ptr %10, align 4, !tbaa !5
  %47 = load i32, ptr @n, align 4, !tbaa !5
  %48 = add nsw i32 %47, 1
  %49 = icmp slt i32 %46, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %45
  store i32 7, ptr %5, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  br label %57

51:                                               ; preds = %45
  %52 = load i32, ptr %10, align 4, !tbaa !5
  %53 = add nsw i32 %52, 60
  call void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef %53, i32 noundef 99, i32 noundef 2)
  br label %54

54:                                               ; preds = %51
  %55 = load i32, ptr %10, align 4, !tbaa !5
  %56 = add nsw i32 %55, 1
  store i32 %56, ptr %10, align 4, !tbaa !5
  br label %45, !llvm.loop !13

57:                                               ; preds = %50
  %58 = call noundef i32 @_ZN5Dinic12DinicMaxflowEii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef 0, i32 noundef 99)
  %59 = load i32, ptr @n, align 4, !tbaa !5
  %60 = mul nsw i32 2, %59
  %61 = icmp eq i32 %58, %60
  ret i1 %61
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(3200) ptr @_ZN5DinicaSEOS_(ptr noundef nonnull align 8 dereferenceable(3200), ptr noundef nonnull align 8 dereferenceable(3200)) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200), i32 noundef, i32 noundef, i32 noundef) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5Dinic12DinicMaxflowEii(ptr noundef nonnull align 8 dereferenceable(3200), i32 noundef, i32 noundef) #1 align 2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Dinic = type { [100 x i32], [100 x i32], [100 x %"class.std::vector"] }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl" }
%"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl" = type { %"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl_data" }
%"struct.std::_Vector_base<Edge, std::allocator<Edge>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"class.__gnu_cxx::__normal_iterator" = type { ptr }

@m = external dso_local local_unnamed_addr global i32, align 4
@n = external dso_local local_unnamed_addr global i32, align 4
@D = external dso_local global %struct.Dinic, align 8
@ADJ = external dso_local global [61 x %"class.std::vector.3"], align 16

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5DinicC2Ev(ptr noundef nonnull align 8 dereferenceable(3200)) unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN5DinicD2Ev(ptr noundef nonnull align 8 dereferenceable(3200)) unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z4testi(i32 noundef %0) local_unnamed_addr #1 {
  %2 = alloca %struct.Dinic, align 8
  %3 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  %4 = alloca %"class.__gnu_cxx::__normal_iterator", align 8
  call void @llvm.lifetime.start.p0(i64 3200, ptr nonnull %2) #5
  call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(3200) %2, i8 0, i64 3200, i1 false)
  call void @_ZN5DinicC2Ev(ptr noundef nonnull align 8 dereferenceable(3200) %2) #5
  %5 = call noundef nonnull align 8 dereferenceable(3200) ptr @_ZN5DinicaSEOS_(ptr noundef nonnull align 8 dereferenceable(3200) @D, ptr noundef nonnull align 8 dereferenceable(3200) %2) #5
  call void @_ZN5DinicD2Ev(ptr noundef nonnull align 8 dereferenceable(3200) %2) #5
  call void @llvm.lifetime.end.p0(i64 3200, ptr nonnull %2) #5
  %6 = load i32, ptr @m, align 4, !tbaa !5
  %.not13 = icmp slt i32 %6, 1
  br i1 %.not13, label %.preheader, label %.lr.ph16

.preheader:                                       ; preds = %._crit_edge, %1
  %7 = load i32, ptr @n, align 4, !tbaa !5
  %.not1217 = icmp slt i32 %7, 1
  br i1 %.not1217, label %._crit_edge20, label %.lr.ph19

.lr.ph16:                                         ; preds = %1, %._crit_edge
  %indvars.iv = phi i64 [ %indvars.iv.next, %._crit_edge ], [ 1, %1 ]
  %8 = trunc nuw nsw i64 %indvars.iv to i32
  call void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef 0, i32 noundef %8, i32 noundef %0)
  %9 = getelementptr inbounds [61 x %"class.std::vector.3"], ptr @ADJ, i64 0, i64 %indvars.iv
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  %10 = call ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #5
  store ptr %10, ptr %3, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #5
  %11 = call ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24) %9) #5
  store ptr %11, ptr %4, align 8
  %12 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #5
  br i1 %12, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.lr.ph16
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %13 = load i32, ptr @m, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %.not.not = icmp slt i64 %indvars.iv, %14
  br i1 %.not.not, label %.lr.ph16, label %.preheader, !llvm.loop !9

.lr.ph:                                           ; preds = %.lr.ph16, %.lr.ph
  %15 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8) %3) #5
  %16 = load i32, ptr %15, align 4, !tbaa !5
  call void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef %8, i32 noundef %16, i32 noundef 1)
  %17 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8) %3) #5
  %18 = call noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8) %3, ptr noundef nonnull align 8 dereferenceable(8) %4) #5
  br i1 %18, label %.lr.ph, label %._crit_edge

._crit_edge20:                                    ; preds = %.lr.ph19, %.preheader
  %19 = call noundef i32 @_ZN5Dinic12DinicMaxflowEii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef 0, i32 noundef 99)
  %20 = load i32, ptr @n, align 4, !tbaa !5
  %21 = shl nsw i32 %20, 1
  %22 = icmp eq i32 %19, %21
  ret i1 %22

.lr.ph19:                                         ; preds = %.preheader, %.lr.ph19
  %.018 = phi i32 [ %24, %.lr.ph19 ], [ 1, %.preheader ]
  %23 = add nuw nsw i32 %.018, 60
  call void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200) @D, i32 noundef %23, i32 noundef 99, i32 noundef 2)
  %24 = add nuw nsw i32 %.018, 1
  %25 = load i32, ptr @n, align 4, !tbaa !5
  %.not12.not = icmp slt i32 %.018, %25
  br i1 %.not12.not, label %.lr.ph19, label %._crit_edge20, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(3200) ptr @_ZN5DinicaSEOS_(ptr noundef nonnull align 8 dereferenceable(3200), ptr noundef nonnull align 8 dereferenceable(3200)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #2

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN5Dinic7addEdgeEiii(ptr noundef nonnull align 8 dereferenceable(3200), i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE5beginEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local ptr @_ZNSt6vectorIiSaIiEE3endEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #4 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i1 @_ZN9__gnu_cxxneIPiSt6vectorIiSaIiEEEEbRKNS_17__normal_iteratorIT_T0_EESA_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNK9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEdeEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEppEv(ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #4 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5Dinic12DinicMaxflowEii(ptr noundef nonnull align 8 dereferenceable(3200), i32 noundef, i32 noundef) local_unnamed_addr #1 align 2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass