; LLVM IR from ncduy0303/Competitive-Programming :: Graphs/Strongly Connected Components (SSCs)/Advanced example.ll (Z8kosarajuv)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local global i32, align 4
@scc = external dso_local global i32, align 4
@visited = external dso_local global [100001 x i32], align 16
@dfn = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsii(i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8kosarajuv() #0 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 1, ptr %1, align 4, !tbaa !5
  br label %3

3:                                                ; preds = %17, %0
  %4 = load i32, ptr %1, align 4, !tbaa !5
  %5 = load i32, ptr @n, align 4, !tbaa !5
  %6 = icmp sle i32 %4, %5
  br i1 %6, label %8, label %7

7:                                                ; preds = %3
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %20

8:                                                ; preds = %3
  %9 = load i32, ptr %1, align 4, !tbaa !5
  %10 = sext i32 %9 to i64
  %11 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %10
  %12 = load i32, ptr %11, align 4, !tbaa !5
  %13 = icmp ne i32 %12, 0
  br i1 %13, label %16, label %14

14:                                               ; preds = %8
  %15 = load i32, ptr %1, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %15, i32 noundef 0)
  br label %16

16:                                               ; preds = %14, %8
  br label %17

17:                                               ; preds = %16
  %18 = load i32, ptr %1, align 4, !tbaa !5
  %19 = add nsw i32 %18, 1
  store i32 %19, ptr %1, align 4, !tbaa !5
  br label %3, !llvm.loop !9

20:                                               ; preds = %7
  call void @llvm.memset.p0.i64(ptr align 16 @visited, i8 0, i64 400004, i1 false)
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  %21 = load i32, ptr @n, align 4, !tbaa !5
  %22 = sub nsw i32 %21, 1
  store i32 %22, ptr %2, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %44, %20
  %24 = load i32, ptr %2, align 4, !tbaa !5
  %25 = icmp sge i32 %24, 0
  br i1 %25, label %27, label %26

26:                                               ; preds = %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %47

27:                                               ; preds = %23
  %28 = load i32, ptr %2, align 4, !tbaa !5
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %29) #4
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = sext i32 %31 to i64
  %33 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %32
  %34 = load i32, ptr %33, align 4, !tbaa !5
  %35 = icmp ne i32 %34, 0
  br i1 %35, label %43, label %36

36:                                               ; preds = %27
  %37 = load i32, ptr @scc, align 4, !tbaa !5
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr @scc, align 4, !tbaa !5
  %39 = load i32, ptr %2, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %40) #4
  %42 = load i32, ptr %41, align 4, !tbaa !5
  call void @_Z3dfsii(i32 noundef %42, i32 noundef 1)
  br label %43

43:                                               ; preds = %36, %27
  br label %44

44:                                               ; preds = %43
  %45 = load i32, ptr %2, align 4, !tbaa !5
  %46 = add nsw i32 %45, -1
  store i32 %46, ptr %2, align 4, !tbaa !5
  br label %23, !llvm.loop !11

47:                                               ; preds = %26
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #3 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@n = external dso_local local_unnamed_addr global i32, align 4
@scc = external dso_local local_unnamed_addr global i32, align 4
@visited = external dso_local local_unnamed_addr global [100001 x i32], align 16
@dfn = external dso_local global %"class.std::vector", align 8

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3dfsii(i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8kosarajuv() local_unnamed_addr #0 {
  %1 = load i32, ptr @n, align 4, !tbaa !5
  %.not11 = icmp slt i32 %1, 1
  br i1 %.not11, label %._crit_edge.thread, label %.lr.ph

._crit_edge.thread:                               ; preds = %0
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(400004) @visited, i8 0, i64 400004, i1 false)
  br label %._crit_edge17

._crit_edge:                                      ; preds = %9
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(400004) @visited, i8 0, i64 400004, i1 false)
  %2 = icmp sgt i32 %10, 0
  br i1 %2, label %.lr.ph16.preheader, label %._crit_edge17

.lr.ph16.preheader:                               ; preds = %._crit_edge
  %3 = zext nneg i32 %10 to i64
  br label %.lr.ph16

.lr.ph:                                           ; preds = %0, %9
  %4 = phi i32 [ %10, %9 ], [ %1, %0 ]
  %indvars.iv = phi i64 [ %indvars.iv.next, %9 ], [ 1, %0 ]
  %5 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %indvars.iv
  %6 = load i32, ptr %5, align 4, !tbaa !5
  %.not10 = icmp eq i32 %6, 0
  br i1 %.not10, label %7, label %9

7:                                                ; preds = %.lr.ph
  %8 = trunc nuw nsw i64 %indvars.iv to i32
  tail call void @_Z3dfsii(i32 noundef %8, i32 noundef 0)
  %.pre = load i32, ptr @n, align 4, !tbaa !5
  br label %9

9:                                                ; preds = %.lr.ph, %7
  %10 = phi i32 [ %4, %.lr.ph ], [ %.pre, %7 ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %11 = sext i32 %10 to i64
  %.not.not = icmp slt i64 %indvars.iv, %11
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !9

._crit_edge17:                                    ; preds = %22, %._crit_edge.thread, %._crit_edge
  ret void

.lr.ph16:                                         ; preds = %.lr.ph16.preheader, %22
  %indvars.iv20 = phi i64 [ %3, %.lr.ph16.preheader ], [ %indvars.iv.next21, %22 ]
  %indvars.iv.next21 = add nsw i64 %indvars.iv20, -1
  %12 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %indvars.iv.next21) #3
  %13 = load i32, ptr %12, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = getelementptr inbounds [100001 x i32], ptr @visited, i64 0, i64 %14
  %16 = load i32, ptr %15, align 4, !tbaa !5
  %.not9 = icmp eq i32 %16, 0
  br i1 %.not9, label %17, label %22

17:                                               ; preds = %.lr.ph16
  %18 = load i32, ptr @scc, align 4, !tbaa !5
  %19 = add nsw i32 %18, 1
  store i32 %19, ptr @scc, align 4, !tbaa !5
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @dfn, i64 noundef %indvars.iv.next21) #3
  %21 = load i32, ptr %20, align 4, !tbaa !5
  tail call void @_Z3dfsii(i32 noundef %21, i32 noundef 1)
  br label %22

22:                                               ; preds = %.lr.ph16, %17
  %23 = icmp ugt i64 %indvars.iv20, 1
  br i1 %23, label %.lr.ph16, label %._crit_edge17, !llvm.loop !11
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #2 align 2

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass