; LLVM IR from viveakrt/Competitive-programing :: CodeChef/CHEFORA_JulyLong.ll (Z5powerxxx)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_Z5powerxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  store i64 %0, ptr %5, align 8, !tbaa !5
  store i64 %1, ptr %6, align 8, !tbaa !5
  store i64 %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #2
  store i64 1, ptr %8, align 8, !tbaa !5
  %10 = load i64, ptr %5, align 8, !tbaa !5
  %11 = load i64, ptr %7, align 8, !tbaa !5
  %12 = srem i64 %10, %11
  store i64 %12, ptr %5, align 8, !tbaa !5
  %13 = load i64, ptr %5, align 8, !tbaa !5
  %14 = icmp eq i64 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %3
  store i32 0, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %41

16:                                               ; preds = %3
  br label %17

17:                                               ; preds = %30, %16
  %18 = load i64, ptr %6, align 8, !tbaa !5
  %19 = icmp sgt i64 %18, 0
  br i1 %19, label %20, label %38

20:                                               ; preds = %17
  %21 = load i64, ptr %6, align 8, !tbaa !5
  %22 = and i64 %21, 1
  %23 = icmp ne i64 %22, 0
  br i1 %23, label %24, label %30

24:                                               ; preds = %20
  %25 = load i64, ptr %8, align 8, !tbaa !5
  %26 = load i64, ptr %5, align 8, !tbaa !5
  %27 = mul nsw i64 %25, %26
  %28 = load i64, ptr %7, align 8, !tbaa !5
  %29 = srem i64 %27, %28
  store i64 %29, ptr %8, align 8, !tbaa !5
  br label %30

30:                                               ; preds = %24, %20
  %31 = load i64, ptr %6, align 8, !tbaa !5
  %32 = ashr i64 %31, 1
  store i64 %32, ptr %6, align 8, !tbaa !5
  %33 = load i64, ptr %5, align 8, !tbaa !5
  %34 = load i64, ptr %5, align 8, !tbaa !5
  %35 = mul nsw i64 %33, %34
  %36 = load i64, ptr %7, align 8, !tbaa !5
  %37 = srem i64 %35, %36
  store i64 %37, ptr %5, align 8, !tbaa !5
  br label %17, !llvm.loop !9

38:                                               ; preds = %17
  %39 = load i64, ptr %8, align 8, !tbaa !5
  %40 = trunc i64 %39 to i32
  store i32 %40, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %41

41:                                               ; preds = %38, %15
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #2
  %42 = load i32, ptr %4, align 4
  ret i32 %42
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @_Z5powerxxx(i64 noundef %0, i64 noundef %1, i64 noundef %2) local_unnamed_addr #0 {
  %4 = srem i64 %0, %2
  %5 = icmp eq i64 %4, 0
  br i1 %5, label %._crit_edge, label %.preheader

.preheader:                                       ; preds = %3
  %6 = icmp sgt i64 %1, 0
  br i1 %6, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %.preheader, %11
  %.020 = phi i64 [ %.1, %11 ], [ 1, %.preheader ]
  %.01519 = phi i64 [ %12, %11 ], [ %1, %.preheader ]
  %.01618 = phi i64 [ %14, %11 ], [ %4, %.preheader ]
  %7 = and i64 %.01519, 1
  %.not = icmp eq i64 %7, 0
  br i1 %.not, label %11, label %8

8:                                                ; preds = %.lr.ph
  %9 = mul nsw i64 %.020, %.01618
  %10 = srem i64 %9, %2
  br label %11

11:                                               ; preds = %8, %.lr.ph
  %.1 = phi i64 [ %10, %8 ], [ %.020, %.lr.ph ]
  %12 = lshr i64 %.01519, 1
  %13 = mul nsw i64 %.01618, %.01618
  %14 = srem i64 %13, %2
  %.not21 = icmp ult i64 %.01519, 2
  br i1 %.not21, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !5

._crit_edge.loopexit:                             ; preds = %11
  %15 = trunc i64 %.1 to i32
  br label %._crit_edge

._crit_edge:                                      ; preds = %.preheader, %._crit_edge.loopexit, %3
  %.014 = phi i32 [ 0, %3 ], [ 1, %.preheader ], [ %15, %._crit_edge.loopexit ]
  ret i32 %.014
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass