; LLVM IR from Dovyski/opengl-demos :: libs/glm-0.9.9.3/test/gtc (gtc_bitfield)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.17 = external hidden unnamed_addr constant [43 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind
declare i64 @clock() #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @printf(ptr noundef, ...) #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN19bitfieldInterleave526bitfieldInterleave_u16vec2Ett(i16 noundef zeroext, i16 noundef zeroext) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #4 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN19bitfieldInterleave516perf_new_u16vec2ERSt6vectorIjSaIjEE(ptr noundef nonnull align 8 dereferenceable(24) %0) #5 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i64, align 8
  %8 = alloca i64, align 8
  %9 = alloca i64, align 8
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #6
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #6
  %10 = call i64 @clock() #6
  store i64 %10, ptr %4, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #6
  store i64 0, ptr %5, align 8, !tbaa !11
  br label %11

11:                                               ; preds = %51, %1
  %12 = load i64, ptr %5, align 8, !tbaa !11
  %13 = icmp ult i64 %12, 10000
  br i1 %13, label %15, label %14

14:                                               ; preds = %11
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #6
  br label %54

15:                                               ; preds = %11
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #6
  store i64 0, ptr %7, align 8, !tbaa !11
  br label %16

16:                                               ; preds = %47, %15
  %17 = load i64, ptr %7, align 8, !tbaa !11
  %18 = icmp ult i64 %17, 256
  br i1 %18, label %20, label %19

19:                                               ; preds = %16
  store i32 5, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #6
  br label %50

20:                                               ; preds = %16
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #6
  store i64 0, ptr %8, align 8, !tbaa !11
  br label %21

21:                                               ; preds = %43, %20
  %22 = load i64, ptr %8, align 8, !tbaa !11
  %23 = icmp ult i64 %22, 256
  br i1 %23, label %25, label %24

24:                                               ; preds = %21
  store i32 8, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #6
  br label %46

25:                                               ; preds = %21
  %26 = load ptr, ptr %2, align 8, !tbaa !5
  %27 = load i64, ptr %7, align 8, !tbaa !11
  %28 = mul i64 %27, 256
  %29 = load i64, ptr %8, align 8, !tbaa !11
  %30 = add i64 %28, %29
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %26, i64 noundef %30) #6
  %32 = load i32, ptr %31, align 4, !tbaa !9
  %33 = load i64, ptr %8, align 8, !tbaa !11
  %34 = trunc i64 %33 to i16
  %35 = load i64, ptr %7, align 8, !tbaa !11
  %36 = trunc i64 %35 to i16
  %37 = call noundef i32 @_ZN19bitfieldInterleave526bitfieldInterleave_u16vec2Ett(i16 noundef zeroext %34, i16 noundef zeroext %36)
  %38 = icmp eq i32 %32, %37
  %39 = zext i1 %38 to i64
  %40 = select i1 %38, i32 0, i32 1
  %41 = load i32, ptr %3, align 4, !tbaa !9
  %42 = add nsw i32 %41, %40
  store i32 %42, ptr %3, align 4, !tbaa !9
  br label %43

43:                                               ; preds = %25
  %44 = load i64, ptr %8, align 8, !tbaa !11
  %45 = add i64 %44, 1
  store i64 %45, ptr %8, align 8, !tbaa !11
  br label %21, !llvm.loop !13

46:                                               ; preds = %24
  br label %47

47:                                               ; preds = %46
  %48 = load i64, ptr %7, align 8, !tbaa !11
  %49 = add i64 %48, 1
  store i64 %49, ptr %7, align 8, !tbaa !11
  br label %16, !llvm.loop !15

50:                                               ; preds = %19
  br label %51

51:                                               ; preds = %50
  %52 = load i64, ptr %5, align 8, !tbaa !11
  %53 = add i64 %52, 1
  store i64 %53, ptr %5, align 8, !tbaa !11
  br label %11, !llvm.loop !16

54:                                               ; preds = %14
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #6
  %55 = call i64 @clock() #6
  store i64 %55, ptr %9, align 8, !tbaa !11
  %56 = load i64, ptr %9, align 8, !tbaa !11
  %57 = load i64, ptr %4, align 8, !tbaa !11
  %58 = sub nsw i64 %56, %57
  %59 = trunc i64 %58 to i32
  %60 = call i32 (ptr, ...) @printf(ptr noundef @.str.17, i32 noundef %59)
  %61 = load i32, ptr %3, align 4, !tbaa !9
  store i32 1, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #6
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #6
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #6
  ret i32 %61
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.17 = external hidden unnamed_addr constant [43 x i8], align 1

; Function Attrs: nounwind
declare i64 @clock() local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN19bitfieldInterleave526bitfieldInterleave_u16vec2Ett(i16 noundef zeroext, i16 noundef zeroext) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #3 align 2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN19bitfieldInterleave516perf_new_u16vec2ERSt6vectorIjSaIjEE(ptr noundef nonnull align 8 dereferenceable(24) %0) local_unnamed_addr #3 {
  %2 = tail call i64 @clock() #4
  br label %.preheader17

.preheader17:                                     ; preds = %1, %10
  %.023 = phi i32 [ 0, %1 ], [ %22, %10 ]
  %.01622 = phi i64 [ 0, %1 ], [ %11, %10 ]
  br label %.preheader

3:                                                ; preds = %10
  %4 = tail call i64 @clock() #4
  %5 = sub nsw i64 %4, %2
  %6 = trunc i64 %5 to i32
  %7 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.17, i32 noundef %6)
  ret i32 %22

.preheader:                                       ; preds = %.preheader17, %12
  %.121 = phi i32 [ %.023, %.preheader17 ], [ %22, %12 ]
  %.01520 = phi i64 [ 0, %.preheader17 ], [ %13, %12 ]
  %8 = shl nuw nsw i64 %.01520, 8
  %9 = trunc nuw nsw i64 %.01520 to i16
  br label %14

10:                                               ; preds = %12
  %11 = add nuw nsw i64 %.01622, 1
  %exitcond25.not = icmp eq i64 %11, 10000
  br i1 %exitcond25.not, label %3, label %.preheader17, !llvm.loop !5

12:                                               ; preds = %14
  %13 = add nuw nsw i64 %.01520, 1
  %exitcond24.not = icmp eq i64 %13, 256
  br i1 %exitcond24.not, label %10, label %.preheader, !llvm.loop !7

14:                                               ; preds = %.preheader, %14
  %.219 = phi i32 [ %.121, %.preheader ], [ %22, %14 ]
  %.01418 = phi i64 [ 0, %.preheader ], [ %23, %14 ]
  %15 = add nuw nsw i64 %.01418, %8
  %16 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIjSaIjEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %15) #4
  %17 = load i32, ptr %16, align 4, !tbaa !8
  %18 = trunc nuw nsw i64 %.01418 to i16
  %19 = tail call noundef i32 @_ZN19bitfieldInterleave526bitfieldInterleave_u16vec2Ett(i16 noundef zeroext %18, i16 noundef zeroext %9)
  %20 = icmp ne i32 %17, %19
  %21 = zext i1 %20 to i32
  %22 = add nsw i32 %.219, %21
  %23 = add nuw nsw i64 %.01418, 1
  %exitcond.not = icmp eq i64 %23, 256
  br i1 %exitcond.not, label %12, label %14, !llvm.loop !12
}

attributes #0 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C++ TBAA"}
!12 = distinct !{!12, !6}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass