; LLVM IR from bqi343/cp-notebook :: Contests/USACO Solutions/2016-17/Feb 2017/Plat/17 Feb P1 (BIT).ll (Z5solvev)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@ans = external dso_local global i64, align 8
@N = external dso_local global i64, align 8
@cur = external dso_local global i64, align 8
@b = external dso_local global %"class.std::vector", align 8
@x = external dso_local global %"class.std::vector", align 8
@y = external dso_local global %"class.std::vector", align 8
@bit = external dso_local global [100001 x i32], align 16
@m = external dso_local global [100001 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6updatei(i32 noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5queryi(i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = load i64, ptr @N, align 8, !tbaa !5
  call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %6)
  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #4
  store i32 0, ptr %1, align 4, !tbaa !9
  br label %7

7:                                                ; preds = %15, %0
  %8 = load i32, ptr %1, align 4, !tbaa !9
  %9 = icmp slt i32 %8, 100001
  br i1 %9, label %11, label %10

10:                                               ; preds = %7
  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #4
  br label %18

11:                                               ; preds = %7
  %12 = load i32, ptr %1, align 4, !tbaa !9
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [100001 x i32], ptr @bit, i64 0, i64 %13
  store i32 0, ptr %14, align 4, !tbaa !9
  br label %15

15:                                               ; preds = %11
  %16 = load i32, ptr %1, align 4, !tbaa !9
  %17 = add nsw i32 %16, 1
  store i32 %17, ptr %1, align 4, !tbaa !9
  br label %7, !llvm.loop !11

18:                                               ; preds = %10
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #4
  store i32 1, ptr %2, align 4, !tbaa !9
  br label %19

19:                                               ; preds = %36, %18
  %20 = load i32, ptr %2, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = load i64, ptr @N, align 8, !tbaa !5
  %23 = add nsw i64 %22, 1
  %24 = icmp slt i64 %21, %23
  br i1 %24, label %26, label %25

25:                                               ; preds = %19
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #4
  br label %39

26:                                               ; preds = %19
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #4
  %27 = load i32, ptr %2, align 4, !tbaa !9
  %28 = sub nsw i32 %27, 1
  %29 = sext i32 %28 to i64
  %30 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @x, i64 noundef %29) #4
  %31 = load i32, ptr %30, align 4, !tbaa !9
  store i32 %31, ptr %3, align 4, !tbaa !9
  %32 = load i32, ptr %2, align 4, !tbaa !9
  %33 = load i32, ptr %3, align 4, !tbaa !9
  %34 = sext i32 %33 to i64
  %35 = getelementptr inbounds [100001 x i32], ptr @m, i64 0, i64 %34
  store i32 %32, ptr %35, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #4
  br label %36

36:                                               ; preds = %26
  %37 = load i32, ptr %2, align 4, !tbaa !9
  %38 = add nsw i32 %37, 1
  store i32 %38, ptr %2, align 4, !tbaa !9
  br label %19, !llvm.loop !13

39:                                               ; preds = %25
  %40 = load i64, ptr @N, align 8, !tbaa !5
  %41 = load i64, ptr @N, align 8, !tbaa !5
  %42 = sub nsw i64 %41, 1
  %43 = mul nsw i64 %40, %42
  %44 = sdiv i64 %43, 2
  store i64 %44, ptr @cur, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #4
  store i32 0, ptr %4, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %74, %39
  %46 = load i32, ptr %4, align 4, !tbaa !9
  %47 = sext i32 %46 to i64
  %48 = load i64, ptr @N, align 8, !tbaa !5
  %49 = icmp slt i64 %47, %48
  br i1 %49, label %51, label %50

50:                                               ; preds = %45
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #4
  br label %77

51:                                               ; preds = %45
  %52 = load i32, ptr %4, align 4, !tbaa !9
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @y, i64 noundef %53) #4
  %55 = load i32, ptr %54, align 4, !tbaa !9
  %56 = sext i32 %55 to i64
  %57 = getelementptr inbounds [100001 x i32], ptr @m, i64 0, i64 %56
  %58 = load i32, ptr %57, align 4, !tbaa !9
  %59 = load i32, ptr %4, align 4, !tbaa !9
  %60 = sext i32 %59 to i64
  %61 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %60) #4
  store i32 %58, ptr %61, align 4, !tbaa !9
  %62 = load i32, ptr %4, align 4, !tbaa !9
  %63 = sext i32 %62 to i64
  %64 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %63) #4
  %65 = load i32, ptr %64, align 4, !tbaa !9
  %66 = call noundef i32 @_Z5queryi(i32 noundef %65)
  %67 = sext i32 %66 to i64
  %68 = load i64, ptr @cur, align 8, !tbaa !5
  %69 = sub nsw i64 %68, %67
  store i64 %69, ptr @cur, align 8, !tbaa !5
  %70 = load i32, ptr %4, align 4, !tbaa !9
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %71) #4
  %73 = load i32, ptr %72, align 4, !tbaa !9
  call void @_Z6updatei(i32 noundef %73)
  br label %74

74:                                               ; preds = %51
  %75 = load i32, ptr %4, align 4, !tbaa !9
  %76 = add nsw i32 %75, 1
  store i32 %76, ptr %4, align 4, !tbaa !9
  br label %45, !llvm.loop !14

77:                                               ; preds = %50
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #4
  %78 = load i64, ptr @N, align 8, !tbaa !5
  %79 = sub nsw i64 %78, 1
  %80 = trunc i64 %79 to i32
  store i32 %80, ptr %5, align 4, !tbaa !9
  br label %81

81:                                               ; preds = %99, %77
  %82 = load i32, ptr %5, align 4, !tbaa !9
  %83 = icmp sge i32 %82, 0
  br i1 %83, label %85, label %84

84:                                               ; preds = %81
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #4
  br label %102

85:                                               ; preds = %81
  %86 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) @ans, ptr noundef nonnull align 8 dereferenceable(8) @cur)
  %87 = load i64, ptr %86, align 8, !tbaa !5
  store i64 %87, ptr @ans, align 8, !tbaa !5
  %88 = load i32, ptr %5, align 4, !tbaa !9
  %89 = sext i32 %88 to i64
  %90 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %89) #4
  %91 = load i32, ptr %90, align 4, !tbaa !9
  %92 = mul nsw i32 2, %91
  %93 = sub nsw i32 %92, 1
  %94 = sext i32 %93 to i64
  %95 = load i64, ptr @N, align 8, !tbaa !5
  %96 = sub nsw i64 %94, %95
  %97 = load i64, ptr @cur, align 8, !tbaa !5
  %98 = add nsw i64 %97, %96
  store i64 %98, ptr @cur, align 8, !tbaa !5
  br label %99

99:                                               ; preds = %85
  %100 = load i32, ptr %5, align 4, !tbaa !9
  %101 = add nsw i32 %100, -1
  store i32 %101, ptr %5, align 4, !tbaa !9
  br label %81, !llvm.loop !15

102:                                              ; preds = %84
  %103 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) @ans, ptr noundef nonnull align 8 dereferenceable(8) @cur)
  %104 = load i64, ptr %103, align 8, !tbaa !5
  store i64 %104, ptr @ans, align 8, !tbaa !5
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@ans = external dso_local global i64, align 8
@N = external dso_local local_unnamed_addr global i64, align 8
@cur = external dso_local global i64, align 8
@b = external dso_local global %"class.std::vector", align 8
@x = external dso_local global %"class.std::vector", align 8
@y = external dso_local global %"class.std::vector", align 8
@bit = external dso_local local_unnamed_addr global [100001 x i32], align 16
@m = external dso_local local_unnamed_addr global [100001 x i32], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z6updatei(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_Z5queryi(i32 noundef) local_unnamed_addr #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solvev() local_unnamed_addr #1 {
.preheader:
  %0 = load i64, ptr @N, align 8, !tbaa !5
  tail call void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %0)
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(400004) @bit, i8 0, i64 400004, i1 false), !tbaa !9
  %1 = load i64, ptr @N, align 8, !tbaa !5
  %.not24 = icmp slt i64 %1, 1
  br i1 %.not24, label %._crit_edge.thread, label %.lr.ph

._crit_edge.thread:                               ; preds = %.preheader
  %2 = add nsw i64 %1, -1
  %3 = mul nsw i64 %2, %1
  %4 = lshr i64 %3, 1
  store i64 %4, ptr @cur, align 8, !tbaa !5
  br label %._crit_edge29

._crit_edge:                                      ; preds = %.lr.ph
  %5 = add nsw i64 %15, -1
  %6 = mul nsw i64 %5, %15
  %7 = sdiv i64 %6, 2
  store i64 %7, ptr @cur, align 8, !tbaa !5
  %8 = icmp sgt i64 %15, 0
  br i1 %8, label %.lr.ph28, label %._crit_edge29

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 1, %.preheader ]
  %9 = add nsw i64 %indvars.iv, -1
  %10 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @x, i64 noundef %9) #4
  %11 = load i32, ptr %10, align 4, !tbaa !9
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [100001 x i32], ptr @m, i64 0, i64 %12
  %14 = trunc nuw nsw i64 %indvars.iv to i32
  store i32 %14, ptr %13, align 4, !tbaa !9
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %15 = load i64, ptr @N, align 8, !tbaa !5
  %.not.not = icmp sgt i64 %15, %indvars.iv
  br i1 %.not.not, label %.lr.ph, label %._crit_edge, !llvm.loop !11

._crit_edge29:                                    ; preds = %.lr.ph28, %._crit_edge.thread, %._crit_edge
  %.lcssa = phi i64 [ %15, %._crit_edge ], [ %1, %._crit_edge.thread ], [ %33, %.lr.ph28 ]
  %16 = trunc i64 %.lcssa to i32
  %.031 = add i32 %16, -1
  %17 = icmp sgt i32 %.031, -1
  br i1 %17, label %.lr.ph34.preheader, label %._crit_edge35

.lr.ph34.preheader:                               ; preds = %._crit_edge29
  %18 = zext nneg i32 %.031 to i64
  br label %.lr.ph34

.lr.ph28:                                         ; preds = %._crit_edge, %.lr.ph28
  %indvars.iv40 = phi i64 [ %indvars.iv.next41, %.lr.ph28 ], [ 0, %._crit_edge ]
  %19 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @y, i64 noundef %indvars.iv40) #4
  %20 = load i32, ptr %19, align 4, !tbaa !9
  %21 = sext i32 %20 to i64
  %22 = getelementptr inbounds [100001 x i32], ptr @m, i64 0, i64 %21
  %23 = load i32, ptr %22, align 4, !tbaa !9
  %24 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv40) #4
  store i32 %23, ptr %24, align 4, !tbaa !9
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv40) #4
  %26 = load i32, ptr %25, align 4, !tbaa !9
  %27 = tail call noundef i32 @_Z5queryi(i32 noundef %26)
  %28 = sext i32 %27 to i64
  %29 = load i64, ptr @cur, align 8, !tbaa !5
  %30 = sub nsw i64 %29, %28
  store i64 %30, ptr @cur, align 8, !tbaa !5
  %31 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv40) #4
  %32 = load i32, ptr %31, align 4, !tbaa !9
  tail call void @_Z6updatei(i32 noundef %32)
  %indvars.iv.next41 = add nuw nsw i64 %indvars.iv40, 1
  %33 = load i64, ptr @N, align 8, !tbaa !5
  %34 = icmp sgt i64 %33, %indvars.iv.next41
  br i1 %34, label %.lr.ph28, label %._crit_edge29, !llvm.loop !13

._crit_edge35:                                    ; preds = %.lr.ph34, %._crit_edge29
  %35 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) @ans, ptr noundef nonnull align 8 dereferenceable(8) @cur)
  %36 = load i64, ptr %35, align 8, !tbaa !5
  store i64 %36, ptr @ans, align 8, !tbaa !5
  ret void

.lr.ph34:                                         ; preds = %.lr.ph34.preheader, %.lr.ph34
  %indvars.iv43 = phi i64 [ %18, %.lr.ph34.preheader ], [ %indvars.iv.next44, %.lr.ph34 ]
  %37 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8) @ans, ptr noundef nonnull align 8 dereferenceable(8) @cur)
  %38 = load i64, ptr %37, align 8, !tbaa !5
  store i64 %38, ptr @ans, align 8, !tbaa !5
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv43) #4
  %40 = load i32, ptr %39, align 4, !tbaa !9
  %41 = shl nsw i32 %40, 1
  %42 = add nsw i32 %41, -1
  %43 = sext i32 %42 to i64
  %44 = load i64, ptr @N, align 8, !tbaa !5
  %45 = load i64, ptr @cur, align 8, !tbaa !5
  %46 = sub i64 %45, %44
  %47 = add i64 %46, %43
  store i64 %47, ptr @cur, align 8, !tbaa !5
  %indvars.iv.next44 = add nsw i64 %indvars.iv43, -1
  %.not = icmp eq i64 %indvars.iv43, 0
  br i1 %.not, label %._crit_edge35, label %.lr.ph34, !llvm.loop !14
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZNSt6vectorIiSaIiEE6resizeEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZSt3minIxERKT_S2_S2_(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef nonnull align 8 dereferenceable(8)) local_unnamed_addr #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #3

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass