; LLVM IR from InsightSoftwareConsortium/ITK :: Modules/Numerics/FEM/src (dsrc2c)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@vevpw_.i = external hidden global i64, align 8
@vevpw_.m = external hidden global i64, align 8

; Function Attrs: nounwind uwtable
define dso_local i32 @vevpw_(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %8 = load ptr, ptr %5, align 8, !tbaa !5
  %9 = load i64, ptr %8, align 8, !tbaa !9
  %10 = icmp sle i64 %9, 0
  br i1 %10, label %11, label %12

11:                                               ; preds = %3
  store i32 0, ptr %4, align 4
  br label %87

12:                                               ; preds = %3
  %13 = load ptr, ptr %5, align 8, !tbaa !5
  %14 = load i64, ptr %13, align 8, !tbaa !9
  %15 = srem i64 %14, 4
  store i64 %15, ptr @vevpw_.m, align 8, !tbaa !9
  store i64 0, ptr @vevpw_.i, align 8, !tbaa !9
  br label %16

16:                                               ; preds = %30, %12
  %17 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %18 = load i64, ptr @vevpw_.m, align 8, !tbaa !9
  %19 = icmp slt i64 %17, %18
  br i1 %19, label %20, label %33

20:                                               ; preds = %16
  %21 = load ptr, ptr %7, align 8, !tbaa !5
  %22 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %23 = getelementptr inbounds double, ptr %21, i64 %22
  %24 = load double, ptr %23, align 8, !tbaa !11
  %25 = load ptr, ptr %6, align 8, !tbaa !5
  %26 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %27 = getelementptr inbounds double, ptr %25, i64 %26
  %28 = load double, ptr %27, align 8, !tbaa !11
  %29 = fadd double %28, %24
  store double %29, ptr %27, align 8, !tbaa !11
  br label %30

30:                                               ; preds = %20
  %31 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %32 = add nsw i64 %31, 1
  store i64 %32, ptr @vevpw_.i, align 8, !tbaa !9
  br label %16, !llvm.loop !13

33:                                               ; preds = %16
  %34 = load i64, ptr @vevpw_.m, align 8, !tbaa !9
  store i64 %34, ptr @vevpw_.i, align 8, !tbaa !9
  br label %35

35:                                               ; preds = %83, %33
  %36 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %37 = load ptr, ptr %5, align 8, !tbaa !5
  %38 = load i64, ptr %37, align 8, !tbaa !9
  %39 = icmp slt i64 %36, %38
  br i1 %39, label %40, label %86

40:                                               ; preds = %35
  %41 = load ptr, ptr %7, align 8, !tbaa !5
  %42 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %43 = getelementptr inbounds double, ptr %41, i64 %42
  %44 = load double, ptr %43, align 8, !tbaa !11
  %45 = load ptr, ptr %6, align 8, !tbaa !5
  %46 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %47 = getelementptr inbounds double, ptr %45, i64 %46
  %48 = load double, ptr %47, align 8, !tbaa !11
  %49 = fadd double %48, %44
  store double %49, ptr %47, align 8, !tbaa !11
  %50 = load ptr, ptr %7, align 8, !tbaa !5
  %51 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %52 = add nsw i64 %51, 1
  %53 = getelementptr inbounds double, ptr %50, i64 %52
  %54 = load double, ptr %53, align 8, !tbaa !11
  %55 = load ptr, ptr %6, align 8, !tbaa !5
  %56 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %57 = add nsw i64 %56, 1
  %58 = getelementptr inbounds double, ptr %55, i64 %57
  %59 = load double, ptr %58, align 8, !tbaa !11
  %60 = fadd double %59, %54
  store double %60, ptr %58, align 8, !tbaa !11
  %61 = load ptr, ptr %7, align 8, !tbaa !5
  %62 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %63 = add nsw i64 %62, 2
  %64 = getelementptr inbounds double, ptr %61, i64 %63
  %65 = load double, ptr %64, align 8, !tbaa !11
  %66 = load ptr, ptr %6, align 8, !tbaa !5
  %67 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %68 = add nsw i64 %67, 2
  %69 = getelementptr inbounds double, ptr %66, i64 %68
  %70 = load double, ptr %69, align 8, !tbaa !11
  %71 = fadd double %70, %65
  store double %71, ptr %69, align 8, !tbaa !11
  %72 = load ptr, ptr %7, align 8, !tbaa !5
  %73 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %74 = add nsw i64 %73, 3
  %75 = getelementptr inbounds double, ptr %72, i64 %74
  %76 = load double, ptr %75, align 8, !tbaa !11
  %77 = load ptr, ptr %6, align 8, !tbaa !5
  %78 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %79 = add nsw i64 %78, 3
  %80 = getelementptr inbounds double, ptr %77, i64 %79
  %81 = load double, ptr %80, align 8, !tbaa !11
  %82 = fadd double %81, %76
  store double %82, ptr %80, align 8, !tbaa !11
  br label %83

83:                                               ; preds = %40
  %84 = load i64, ptr @vevpw_.i, align 8, !tbaa !9
  %85 = add nsw i64 %84, 4
  store i64 %85, ptr @vevpw_.i, align 8, !tbaa !9
  br label %35, !llvm.loop !15

86:                                               ; preds = %35
  store i32 0, ptr %4, align 4
  br label %87

87:                                               ; preds = %86, %11
  %88 = load i32, ptr %4, align 4
  ret i32 %88
}

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"double", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@vevpw_.i = external hidden local_unnamed_addr global i64, align 8
@vevpw_.m = external hidden local_unnamed_addr global i64, align 8

; Function Attrs: nofree norecurse nosync nounwind memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local noundef i32 @vevpw_(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
  %4 = load i64, ptr %0, align 8, !tbaa !5
  %5 = icmp slt i64 %4, 1
  br i1 %5, label %.loopexit, label %6

6:                                                ; preds = %3
  %7 = and i64 %4, 3
  store i64 %7, ptr @vevpw_.m, align 8, !tbaa !5
  %.not = icmp eq i64 %7, 0
  br i1 %.not, label %.preheader, label %.lr.ph

.preheader:                                       ; preds = %.lr.ph, %.lr.ph.1, %.lr.ph.2, %6
  store i64 %7, ptr @vevpw_.i, align 8, !tbaa !5
  %8 = load i64, ptr %0, align 8, !tbaa !5
  %9 = icmp slt i64 %7, %8
  br i1 %9, label %.lr.ph19, label %.loopexit

.lr.ph:                                           ; preds = %6
  %10 = load double, ptr %2, align 8, !tbaa !9
  %11 = load double, ptr %1, align 8, !tbaa !9
  %12 = fadd double %10, %11
  store double %12, ptr %1, align 8, !tbaa !9
  %exitcond.not = icmp eq i64 %7, 1
  br i1 %exitcond.not, label %.preheader, label %.lr.ph.1, !llvm.loop !11

.lr.ph.1:                                         ; preds = %.lr.ph
  %13 = getelementptr inbounds i8, ptr %2, i64 8
  %14 = load double, ptr %13, align 8, !tbaa !9
  %15 = getelementptr inbounds i8, ptr %1, i64 8
  %16 = load double, ptr %15, align 8, !tbaa !9
  %17 = fadd double %14, %16
  store double %17, ptr %15, align 8, !tbaa !9
  %exitcond.not.1 = icmp eq i64 %7, 2
  br i1 %exitcond.not.1, label %.preheader, label %.lr.ph.2, !llvm.loop !11

.lr.ph.2:                                         ; preds = %.lr.ph.1
  %18 = getelementptr inbounds i8, ptr %2, i64 16
  %19 = load double, ptr %18, align 8, !tbaa !9
  %20 = getelementptr inbounds i8, ptr %1, i64 16
  %21 = load double, ptr %20, align 8, !tbaa !9
  %22 = fadd double %19, %21
  store double %22, ptr %20, align 8, !tbaa !9
  br label %.preheader

.lr.ph19:                                         ; preds = %.preheader, %.lr.ph19
  %storemerge1618 = phi i64 [ %46, %.lr.ph19 ], [ %7, %.preheader ]
  %23 = getelementptr inbounds double, ptr %2, i64 %storemerge1618
  %24 = load double, ptr %23, align 8, !tbaa !9
  %25 = getelementptr inbounds double, ptr %1, i64 %storemerge1618
  %26 = load double, ptr %25, align 8, !tbaa !9
  %27 = fadd double %24, %26
  store double %27, ptr %25, align 8, !tbaa !9
  %28 = add nuw nsw i64 %storemerge1618, 1
  %29 = getelementptr inbounds double, ptr %2, i64 %28
  %30 = load double, ptr %29, align 8, !tbaa !9
  %31 = getelementptr inbounds double, ptr %1, i64 %28
  %32 = load double, ptr %31, align 8, !tbaa !9
  %33 = fadd double %30, %32
  store double %33, ptr %31, align 8, !tbaa !9
  %34 = add nuw nsw i64 %storemerge1618, 2
  %35 = getelementptr inbounds double, ptr %2, i64 %34
  %36 = load double, ptr %35, align 8, !tbaa !9
  %37 = getelementptr inbounds double, ptr %1, i64 %34
  %38 = load double, ptr %37, align 8, !tbaa !9
  %39 = fadd double %36, %38
  store double %39, ptr %37, align 8, !tbaa !9
  %40 = add nuw nsw i64 %storemerge1618, 3
  %41 = getelementptr inbounds double, ptr %2, i64 %40
  %42 = load double, ptr %41, align 8, !tbaa !9
  %43 = getelementptr inbounds double, ptr %1, i64 %40
  %44 = load double, ptr %43, align 8, !tbaa !9
  %45 = fadd double %42, %44
  store double %45, ptr %43, align 8, !tbaa !9
  %46 = add nuw nsw i64 %storemerge1618, 4
  store i64 %46, ptr @vevpw_.i, align 8, !tbaa !5
  %47 = load i64, ptr %0, align 8, !tbaa !5
  %48 = icmp slt i64 %46, %47
  br i1 %48, label %.lr.ph19, label %.loopexit, !llvm.loop !13

.loopexit:                                        ; preds = %.lr.ph19, %.preheader, %3
  ret i32 0
}

attributes #0 = { nofree norecurse nosync nounwind memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"double", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass