; LLVM IR from PetoiCamp/OpenCatEsp32 :: src/icm42670 (inv_imu_driver)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @inv_imu_sleep_us(i32 noundef) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @inv_imu_write_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

declare i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_reset_fifo(ptr noundef %0) #2 {
  %2 = alloca ptr, align 8
  %3 = alloca i32, align 4
  %4 = alloca i8, align 1
  store ptr %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %4) #3
  store i8 4, ptr %4, align 1, !tbaa !11
  %5 = load ptr, ptr %2, align 8, !tbaa !5
  %6 = call i32 @inv_imu_switch_on_mclk(ptr noundef %5)
  %7 = load i32, ptr %3, align 4, !tbaa !9
  %8 = or i32 %7, %6
  store i32 %8, ptr %3, align 4, !tbaa !9
  %9 = load ptr, ptr %2, align 8, !tbaa !5
  %10 = call i32 @inv_imu_write_reg(ptr noundef %9, i32 noundef 65538, i32 noundef 1, ptr noundef %4)
  %11 = load i32, ptr %3, align 4, !tbaa !9
  %12 = or i32 %11, %10
  store i32 %12, ptr %3, align 4, !tbaa !9
  call void @inv_imu_sleep_us(i32 noundef 10)
  br label %13

13:                                               ; preds = %23, %1
  %14 = load i32, ptr %3, align 4, !tbaa !9
  %15 = icmp eq i32 %14, 0
  br i1 %15, label %16, label %21

16:                                               ; preds = %13
  %17 = load i8, ptr %4, align 1, !tbaa !11
  %18 = zext i8 %17 to i32
  %19 = and i32 %18, 4
  %20 = icmp eq i32 %19, 4
  br label %21

21:                                               ; preds = %16, %13
  %22 = phi i1 [ false, %13 ], [ %20, %16 ]
  br i1 %22, label %23, label %28

23:                                               ; preds = %21
  %24 = load ptr, ptr %2, align 8, !tbaa !5
  %25 = call i32 @inv_imu_read_reg(ptr noundef %24, i32 noundef 65538, i32 noundef 1, ptr noundef %4)
  %26 = load i32, ptr %3, align 4, !tbaa !9
  %27 = or i32 %26, %25
  store i32 %27, ptr %3, align 4, !tbaa !9
  br label %13, !llvm.loop !12

28:                                               ; preds = %21
  %29 = load ptr, ptr %2, align 8, !tbaa !5
  %30 = call i32 @inv_imu_switch_off_mclk(ptr noundef %29)
  %31 = load i32, ptr %3, align 4, !tbaa !9
  %32 = or i32 %31, %30
  store i32 %32, ptr %3, align 4, !tbaa !9
  %33 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 1, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  ret i32 %33
}

declare i32 @inv_imu_switch_on_mclk(ptr noundef) #1

declare i32 @inv_imu_switch_off_mclk(ptr noundef) #1

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

declare void @inv_imu_sleep_us(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

declare i32 @inv_imu_write_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

declare i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_reset_fifo(ptr noundef %0) local_unnamed_addr #2 {
  %2 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2) #3
  store i8 4, ptr %2, align 1, !tbaa !5
  %3 = tail call i32 @inv_imu_switch_on_mclk(ptr noundef %0) #3
  %4 = call i32 @inv_imu_write_reg(ptr noundef %0, i32 noundef 65538, i32 noundef 1, ptr noundef nonnull %2) #3
  %5 = or i32 %4, %3
  call void @inv_imu_sleep_us(i32 noundef 10) #3
  %6 = icmp eq i32 %5, 0
  %7 = load i8, ptr %2, align 1
  %8 = and i8 %7, 4
  %9 = icmp ne i8 %8, 0
  %10 = select i1 %6, i1 %9, i1 false
  br i1 %10, label %.lr.ph, label %._crit_edge

.lr.ph:                                           ; preds = %1, %.lr.ph
  %11 = call i32 @inv_imu_read_reg(ptr noundef %0, i32 noundef 65538, i32 noundef 1, ptr noundef nonnull %2) #3
  %12 = icmp eq i32 %11, 0
  %13 = load i8, ptr %2, align 1
  %14 = and i8 %13, 4
  %15 = icmp ne i8 %14, 0
  %16 = select i1 %12, i1 %15, i1 false
  br i1 %16, label %.lr.ph, label %._crit_edge, !llvm.loop !8

._crit_edge:                                      ; preds = %.lr.ph, %1
  %.0.lcssa = phi i32 [ %5, %1 ], [ %11, %.lr.ph ]
  %17 = call i32 @inv_imu_switch_off_mclk(ptr noundef %0) #3
  %18 = or i32 %17, %.0.lcssa
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2) #3
  ret i32 %18
}

declare i32 @inv_imu_switch_on_mclk(ptr noundef) local_unnamed_addr #1

declare i32 @inv_imu_switch_off_mclk(ptr noundef) local_unnamed_addr #1

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass