; LLVM IR from ncduy0303/Competitive-Programming :: Data Structures/Fenwick Tree/Fenwick Tree (point update, range query).ll (Z6updateii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local global i32, align 4
@ft = external dso_local global [200001 x i64], align 16

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z6updateii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  br label %5

5:                                                ; preds = %17, %2
  %6 = load i32, ptr %3, align 4, !tbaa !5
  %7 = load i32, ptr @n, align 4, !tbaa !5
  %8 = icmp sle i32 %6, %7
  br i1 %8, label %9, label %24

9:                                                ; preds = %5
  %10 = load i32, ptr %4, align 4, !tbaa !5
  %11 = sext i32 %10 to i64
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [200001 x i64], ptr @ft, i64 0, i64 %13
  %15 = load i64, ptr %14, align 8, !tbaa !9
  %16 = add nsw i64 %15, %11
  store i64 %16, ptr %14, align 8, !tbaa !9
  br label %17

17:                                               ; preds = %9
  %18 = load i32, ptr %3, align 4, !tbaa !5
  %19 = load i32, ptr %3, align 4, !tbaa !5
  %20 = sub nsw i32 0, %19
  %21 = and i32 %18, %20
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = add nsw i32 %22, %21
  store i32 %23, ptr %3, align 4, !tbaa !5
  br label %5, !llvm.loop !11

24:                                               ; preds = %5
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@n = external dso_local local_unnamed_addr global i32, align 4
@ft = external dso_local local_unnamed_addr global [200001 x i64], align 16

; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable
define dso_local void @_Z6updateii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = load i32, ptr @n, align 4, !tbaa !5
  %.not6 = icmp slt i32 %3, %0
  br i1 %.not6, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %2
  %4 = sext i32 %1 to i64
  br label %5

5:                                                ; preds = %.lr.ph, %5
  %.07 = phi i32 [ %0, %.lr.ph ], [ %12, %5 ]
  %6 = sext i32 %.07 to i64
  %7 = getelementptr inbounds [200001 x i64], ptr @ft, i64 0, i64 %6
  %8 = load i64, ptr %7, align 8, !tbaa !9
  %9 = add nsw i64 %8, %4
  store i64 %9, ptr %7, align 8, !tbaa !9
  %10 = sub nsw i32 0, %.07
  %11 = and i32 %.07, %10
  %12 = add nsw i32 %11, %.07
  %.not = icmp sgt i32 %12, %3
  br i1 %.not, label %._crit_edge, label %5, !llvm.loop !11

._crit_edge:                                      ; preds = %5, %2
  ret void
}

attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long long", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: GlobalOptPass,InstCombinePass,JumpThreadingPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass