; LLVM IR from facebook/redex :: service/regalloc/VirtualRegistersFile.ll (ZN8regalloclsERSoRKNS_20VirtualRegistersFileE)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.regalloc::VirtualRegistersFile" = type { %"class.boost::dynamic_bitset" }
%"class.boost::dynamic_bitset" = type { %"class.std::vector", i64 }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl" = type { %"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" }
%"struct.std::_Vector_base<unsigned long, std::allocator<unsigned long>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32)) #1 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN8regalloclsERSoRKNS_20VirtualRegistersFileE(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) #2 {
  %3 = alloca ptr, align 8
  %4 = alloca ptr, align 8
  %5 = alloca i16, align 2
  store ptr %0, ptr %3, align 8, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #4
  store i16 0, ptr %5, align 2, !tbaa !9
  br label %6

6:                                                ; preds = %36, %2
  %7 = load i16, ptr %5, align 2, !tbaa !9
  %8 = zext i16 %7 to i64
  %9 = load ptr, ptr %4, align 8, !tbaa !5
  %10 = getelementptr inbounds %"class.regalloc::VirtualRegistersFile", ptr %9, i32 0, i32 0
  %11 = call noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %10) #4
  %12 = icmp ult i64 %8, %11
  br i1 %12, label %14, label %13

13:                                               ; preds = %6
  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #4
  br label %39

14:                                               ; preds = %6
  %15 = load i16, ptr %5, align 2, !tbaa !9
  %16 = zext i16 %15 to i32
  %17 = icmp sgt i32 %16, 0
  br i1 %17, label %18, label %21

18:                                               ; preds = %14
  %19 = load ptr, ptr %3, align 8, !tbaa !5
  %20 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %19, ptr noundef @.str.2)
  br label %21

21:                                               ; preds = %18, %14
  %22 = load ptr, ptr %3, align 8, !tbaa !5
  %23 = load ptr, ptr %4, align 8, !tbaa !5
  %24 = getelementptr inbounds %"class.regalloc::VirtualRegistersFile", ptr %23, i32 0, i32 0
  %25 = load i16, ptr %5, align 2, !tbaa !9
  %26 = zext i16 %25 to i64
  %27 = call noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %24, i64 noundef %26)
  br i1 %27, label %29, label %28

28:                                               ; preds = %21
  br label %30

29:                                               ; preds = %21
  br label %30

30:                                               ; preds = %29, %28
  %31 = phi ptr [ @.str.3, %28 ], [ @.str.2, %29 ]
  %32 = getelementptr inbounds [2 x i8], ptr %31, i64 0, i64 0
  %33 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %22, ptr noundef %32)
  %34 = load i16, ptr %5, align 2, !tbaa !9
  %35 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEt(ptr noundef nonnull align 8 dereferenceable(8) %33, i16 noundef zeroext %34)
  br label %36

36:                                               ; preds = %30
  %37 = load i16, ptr %5, align 2, !tbaa !9
  %38 = add i16 %37, 1
  store i16 %38, ptr %5, align 2, !tbaa !9
  br label %6, !llvm.loop !11

39:                                               ; preds = %13
  %40 = load ptr, ptr %3, align 8, !tbaa !5
  ret ptr %40
}

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) #3

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEt(ptr noundef nonnull align 8 dereferenceable(8), i16 noundef zeroext) #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.2 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32), i64 noundef) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef nonnull align 8 dereferenceable(8) ptr @_ZN8regalloclsERSoRKNS_20VirtualRegistersFileE(ptr noundef nonnull returned align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(32) %1) local_unnamed_addr #1 {
  %3 = tail call noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %1) #3
  %.not11 = icmp eq i64 %3, 0
  br i1 %.not11, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %7, %2
  ret ptr %0

.lr.ph:                                           ; preds = %2, %7
  %4 = phi i64 [ %12, %7 ], [ 0, %2 ]
  %.010 = phi i16 [ %11, %7 ], [ 0, %2 ]
  %.not = icmp eq i16 %.010, 0
  br i1 %.not, label %7, label %5

5:                                                ; preds = %.lr.ph
  %6 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull @.str.2)
  br label %7

7:                                                ; preds = %5, %.lr.ph
  %8 = tail call noundef zeroext i1 @_ZNK5boost14dynamic_bitsetImSaImEEixEm(ptr noundef nonnull align 8 dereferenceable(32) %1, i64 noundef %4)
  %.str.2..str.3 = select i1 %8, ptr @.str.2, ptr @.str.3
  %9 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull %.str.2..str.3)
  %10 = tail call noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEt(ptr noundef nonnull align 8 dereferenceable(8) %9, i16 noundef zeroext %.010)
  %11 = add i16 %.010, 1
  %12 = zext i16 %11 to i64
  %13 = tail call noundef i64 @_ZNK5boost14dynamic_bitsetImSaImEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(32) %1) #3
  %14 = icmp ugt i64 %13, %12
  br i1 %14, label %.lr.ph, label %._crit_edge, !llvm.loop !5
}

; Function Attrs: inlinehint mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(ptr noundef nonnull align 8 dereferenceable(8), ptr noundef) local_unnamed_addr #2

; Function Attrs: mustprogress uwtable
declare noundef nonnull align 8 dereferenceable(8) ptr @_ZNSolsEt(ptr noundef nonnull align 8 dereferenceable(8), i16 noundef zeroext) local_unnamed_addr #1 align 2

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass