; LLVM IR from PetoiCamp/OpenCatEsp32 :: src/icm42670 (inv_imu_transport)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.inv_imu_transport = type { %struct.inv_imu_serif, %struct.register_cache, i8 }
%struct.inv_imu_serif = type { ptr, ptr, ptr, i32, i32, i32 }
%struct.register_cache = type { i8, i8, i8, i8 }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_write_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) #1

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_switch_on_mclk(ptr noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i8, align 1
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  store ptr %0, ptr %3, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #3
  store i32 0, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #3
  %9 = load ptr, ptr %3, align 8, !tbaa !5
  store ptr %9, ptr %6, align 8, !tbaa !5
  %10 = load ptr, ptr %6, align 8, !tbaa !5
  %11 = icmp eq ptr %10, null
  br i1 %11, label %12, label %13

12:                                               ; preds = %1
  store i32 -11, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %83

13:                                               ; preds = %1
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.inv_imu_transport, ptr %14, i32 0, i32 2
  %16 = load i8, ptr %15, align 4, !tbaa !11
  %17 = zext i8 %16 to i32
  %18 = icmp eq i32 %17, 0
  br i1 %18, label %19, label %62

19:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #3
  %20 = load ptr, ptr %3, align 8, !tbaa !5
  %21 = call i32 @inv_imu_read_reg(ptr noundef %20, i32 noundef 65567, i32 noundef 1, ptr noundef %5)
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = or i32 %22, %21
  store i32 %23, ptr %4, align 4, !tbaa !9
  %24 = load i8, ptr %5, align 1, !tbaa !15
  %25 = zext i8 %24 to i32
  %26 = or i32 %25, 16
  %27 = trunc i32 %26 to i8
  store i8 %27, ptr %5, align 1, !tbaa !15
  %28 = load ptr, ptr %3, align 8, !tbaa !5
  %29 = call i32 @inv_imu_write_reg(ptr noundef %28, i32 noundef 65567, i32 noundef 1, ptr noundef %5)
  %30 = load i32, ptr %4, align 4, !tbaa !9
  %31 = or i32 %30, %29
  store i32 %31, ptr %4, align 4, !tbaa !9
  %32 = load i32, ptr %4, align 4, !tbaa !9
  %33 = icmp ne i32 %32, 0
  br i1 %33, label %34, label %36

34:                                               ; preds = %19
  %35 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %35, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %59

36:                                               ; preds = %19
  %37 = call i64 @inv_imu_get_time_us()
  store i64 %37, ptr %8, align 8, !tbaa !16
  br label %38

38:                                               ; preds = %52, %36
  %39 = load ptr, ptr %3, align 8, !tbaa !5
  %40 = call i32 @inv_imu_read_reg(ptr noundef %39, i32 noundef 65536, i32 noundef 1, ptr noundef %5)
  store i32 %40, ptr %4, align 4, !tbaa !9
  %41 = load i32, ptr %4, align 4, !tbaa !9
  %42 = icmp ne i32 %41, 0
  br i1 %42, label %43, label %45

43:                                               ; preds = %38
  %44 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %44, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %59

45:                                               ; preds = %38
  %46 = call i64 @inv_imu_get_time_us()
  %47 = load i64, ptr %8, align 8, !tbaa !16
  %48 = sub i64 %46, %47
  %49 = icmp ugt i64 %48, 1000000
  br i1 %49, label %50, label %51

50:                                               ; preds = %45
  store i32 -4, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %59

51:                                               ; preds = %45
  br label %52

52:                                               ; preds = %51
  %53 = load i8, ptr %5, align 1, !tbaa !15
  %54 = zext i8 %53 to i32
  %55 = and i32 %54, 8
  %56 = icmp ne i32 %55, 0
  %57 = xor i1 %56, true
  br i1 %57, label %38, label %58, !llvm.loop !18

58:                                               ; preds = %52
  store i32 0, ptr %7, align 4
  br label %59

59:                                               ; preds = %58, %50, %43, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #3
  %60 = load i32, ptr %7, align 4
  switch i32 %60, label %83 [
    i32 0, label %61
  ]

61:                                               ; preds = %59
  br label %77

62:                                               ; preds = %13
  %63 = load ptr, ptr %3, align 8, !tbaa !5
  %64 = call i32 @inv_imu_read_reg(ptr noundef %63, i32 noundef 65567, i32 noundef 1, ptr noundef %5)
  %65 = load i32, ptr %4, align 4, !tbaa !9
  %66 = or i32 %65, %64
  store i32 %66, ptr %4, align 4, !tbaa !9
  %67 = load i8, ptr %5, align 1, !tbaa !15
  %68 = zext i8 %67 to i32
  %69 = and i32 %68, 16
  %70 = trunc i32 %69 to i8
  store i8 %70, ptr %5, align 1, !tbaa !15
  %71 = zext i8 %70 to i32
  %72 = icmp eq i32 0, %71
  br i1 %72, label %73, label %76

73:                                               ; preds = %62
  %74 = load i32, ptr %4, align 4, !tbaa !9
  %75 = or i32 %74, -1
  store i32 %75, ptr %4, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %73, %62
  br label %77

77:                                               ; preds = %76, %61
  %78 = load ptr, ptr %6, align 8, !tbaa !5
  %79 = getelementptr inbounds %struct.inv_imu_transport, ptr %78, i32 0, i32 2
  %80 = load i8, ptr %79, align 4, !tbaa !11
  %81 = add i8 %80, 1
  store i8 %81, ptr %79, align 4, !tbaa !11
  %82 = load i32, ptr %4, align 4, !tbaa !9
  store i32 %82, ptr %2, align 4
  store i32 1, ptr %7, align 4
  br label %83

83:                                               ; preds = %77, %59, %12
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %5) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #3
  %84 = load i32, ptr %2, align 4
  ret i32 %84
}

declare i64 @inv_imu_get_time_us() #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !7, i64 44}
!12 = !{!"inv_imu_transport", !13, i64 0, !14, i64 40, !7, i64 44}
!13 = !{!"inv_imu_serif", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !10, i64 32}
!14 = !{!"register_cache", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!15 = !{!7, !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_read_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_write_reg(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_switch_on_mclk(ptr noundef %0) local_unnamed_addr #1 {
  %2 = alloca i8, align 1
  call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2) #3
  %3 = icmp eq ptr %0, null
  br i1 %3, label %.thread, label %4

4:                                                ; preds = %1
  %5 = getelementptr inbounds i8, ptr %0, i64 44
  %6 = load i8, ptr %5, align 4, !tbaa !5
  %7 = icmp eq i8 %6, 0
  %8 = call i32 @inv_imu_read_reg(ptr noundef nonnull %0, i32 noundef 65567, i32 noundef 1, ptr noundef nonnull %2)
  %9 = load i8, ptr %2, align 1, !tbaa !13
  br i1 %7, label %10, label %25

10:                                               ; preds = %4
  %11 = or i8 %9, 16
  store i8 %11, ptr %2, align 1, !tbaa !13
  %12 = call i32 @inv_imu_write_reg(ptr noundef nonnull %0, i32 noundef 65567, i32 noundef 1, ptr noundef nonnull %2)
  %13 = or i32 %12, %8
  %.not = icmp eq i32 %13, 0
  br i1 %.not, label %14, label %.thread

14:                                               ; preds = %10
  %15 = call i64 @inv_imu_get_time_us() #3
  br label %16

16:                                               ; preds = %22, %14
  %17 = call i32 @inv_imu_read_reg(ptr noundef nonnull %0, i32 noundef 65536, i32 noundef 1, ptr noundef nonnull %2)
  %.not26 = icmp eq i32 %17, 0
  br i1 %.not26, label %18, label %.thread

18:                                               ; preds = %16
  %19 = call i64 @inv_imu_get_time_us() #3
  %20 = sub i64 %19, %15
  %21 = icmp ugt i64 %20, 1000000
  br i1 %21, label %.thread, label %22

22:                                               ; preds = %18
  %23 = load i8, ptr %2, align 1, !tbaa !13
  %24 = and i8 %23, 8
  %.not27 = icmp eq i8 %24, 0
  br i1 %.not27, label %16, label %.loopexit, !llvm.loop !14

25:                                               ; preds = %4
  %26 = and i8 %9, 16
  %27 = icmp eq i8 %26, 0
  %spec.select = select i1 %27, i32 -1, i32 %8
  br label %.loopexit

.loopexit:                                        ; preds = %22, %25
  %.121 = phi i32 [ %spec.select, %25 ], [ 0, %22 ]
  %28 = load i8, ptr %5, align 4, !tbaa !5
  %29 = add i8 %28, 1
  store i8 %29, ptr %5, align 4, !tbaa !5
  br label %.thread

.thread:                                          ; preds = %18, %16, %10, %1, %.loopexit
  %.1 = phi i32 [ %.121, %.loopexit ], [ -11, %1 ], [ %13, %10 ], [ %17, %16 ], [ -4, %18 ]
  call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2) #3
  ret i32 %.1
}

declare i64 @inv_imu_get_time_us() local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !9, i64 44}
!6 = !{!"inv_imu_transport", !7, i64 0, !12, i64 40, !9, i64 44}
!7 = !{!"inv_imu_serif", !8, i64 0, !8, i64 8, !8, i64 16, !11, i64 24, !11, i64 28, !11, i64 32}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"register_cache", !9, i64 0, !9, i64 1, !9, i64 2, !9, i64 3}
!13 = !{!9, !9, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: DSEPass,EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass