; LLVM IR from tfhe/spqlios-arithmetic :: test/testlib/fft64_dft.ll (ZmldRK13reim_fft64vec)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.reim_fft64vec = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK13reim_fft64vec2nnEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZN13reim_fft64vecD2Ev(ptr noundef nonnull align 8 dereferenceable(24)) unnamed_addr #2 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZmldRK13reim_fft64vec(ptr dead_on_unwind noalias writable sret(%class.reim_fft64vec) align 8 %0, double noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) #3 {
  %4 = alloca ptr, align 8
  %5 = alloca double, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i64, align 8
  %8 = alloca i1, align 1
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  %11 = alloca i64, align 8
  store ptr %0, ptr %4, align 8
  store double %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #4
  %12 = load ptr, ptr %6, align 8, !tbaa !9
  %13 = call noundef i64 @_ZNK13reim_fft64vec2nnEv(ptr noundef nonnull align 8 dereferenceable(24) %12)
  store i64 %13, ptr %7, align 8, !tbaa !11
  store i1 false, ptr %8, align 1
  %14 = load i64, ptr %7, align 8, !tbaa !11
  call void @_ZN13reim_fft64vecC1Em(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %14)
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #4
  %15 = call noundef ptr @_ZN13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %0)
  store ptr %15, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #4
  %16 = load ptr, ptr %6, align 8, !tbaa !9
  %17 = call noundef ptr @_ZNK13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %16)
  store ptr %17, ptr %10, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #4
  store i64 0, ptr %11, align 8, !tbaa !11
  br label %18

18:                                               ; preds = %33, %3
  %19 = load i64, ptr %11, align 8, !tbaa !11
  %20 = load i64, ptr %7, align 8, !tbaa !11
  %21 = icmp ult i64 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #4
  br label %36

23:                                               ; preds = %18
  %24 = load double, ptr %5, align 8, !tbaa !5
  %25 = load ptr, ptr %10, align 8, !tbaa !9
  %26 = load i64, ptr %11, align 8, !tbaa !11
  %27 = getelementptr inbounds double, ptr %25, i64 %26
  %28 = load double, ptr %27, align 8, !tbaa !5
  %29 = fmul double %24, %28
  %30 = load ptr, ptr %9, align 8, !tbaa !9
  %31 = load i64, ptr %11, align 8, !tbaa !11
  %32 = getelementptr inbounds double, ptr %30, i64 %31
  store double %29, ptr %32, align 8, !tbaa !5
  br label %33

33:                                               ; preds = %23
  %34 = load i64, ptr %11, align 8, !tbaa !11
  %35 = add i64 %34, 1
  store i64 %35, ptr %11, align 8, !tbaa !11
  br label %18, !llvm.loop !13

36:                                               ; preds = %22
  store i1 true, ptr %8, align 1
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #4
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #4
  %37 = load i1, ptr %8, align 1
  br i1 %37, label %39, label %38

38:                                               ; preds = %36
  call void @_ZN13reim_fft64vecD2Ev(ptr noundef nonnull align 8 dereferenceable(24) %0) #4
  br label %39

39:                                               ; preds = %38, %36
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #4
  ret void
}

declare void @_ZN13reim_fft64vecC1Em(ptr, i64)

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%class.reim_fft64vec = type { %"class.std::vector" }
%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl" = type { %"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" }
%"struct.std::_Vector_base<double, std::allocator<double>>::_Vector_impl_data" = type { ptr, ptr, ptr }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZN13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNK13reim_fft64vec2nnEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local void @_ZmldRK13reim_fft64vec(ptr dead_on_unwind noalias writable sret(%class.reim_fft64vec) align 8 %0, double noundef %1, ptr noundef nonnull align 8 dereferenceable(24) %2) local_unnamed_addr #1 {
  %4 = tail call noundef i64 @_ZNK13reim_fft64vec2nnEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  tail call void @_ZN13reim_fft64vecC1Em(ptr noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %4)
  %5 = tail call noundef ptr @_ZN13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %0)
  %6 = tail call noundef ptr @_ZNK13reim_fft64vec4dataEv(ptr noundef nonnull align 8 dereferenceable(24) %2)
  %.not = icmp eq i64 %4, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %3
  %7 = ptrtoint ptr %6 to i64
  %8 = ptrtoint ptr %5 to i64
  %min.iters.check = icmp ult i64 %4, 4
  %9 = sub i64 %8, %7
  %diff.check = icmp ult i64 %9, 32
  %or.cond = or i1 %min.iters.check, %diff.check
  br i1 %or.cond, label %.lr.ph.preheader13, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph.preheader
  %n.vec = and i64 %4, -4
  %broadcast.splatinsert = insertelement <2 x double> poison, double %1, i64 0
  %broadcast.splat = shufflevector <2 x double> %broadcast.splatinsert, <2 x double> poison, <2 x i32> zeroinitializer
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %10 = getelementptr inbounds double, ptr %6, i64 %index
  %11 = getelementptr inbounds i8, ptr %10, i64 16
  %wide.load = load <2 x double>, ptr %10, align 8, !tbaa !5
  %wide.load12 = load <2 x double>, ptr %11, align 8, !tbaa !5
  %12 = fmul <2 x double> %wide.load, %broadcast.splat
  %13 = fmul <2 x double> %wide.load12, %broadcast.splat
  %14 = getelementptr inbounds double, ptr %5, i64 %index
  %15 = getelementptr inbounds i8, ptr %14, i64 16
  store <2 x double> %12, ptr %14, align 8, !tbaa !5
  store <2 x double> %13, ptr %15, align 8, !tbaa !5
  %index.next = add nuw i64 %index, 4
  %16 = icmp eq i64 %index.next, %n.vec
  br i1 %16, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %4, %n.vec
  br i1 %cmp.n, label %._crit_edge, label %.lr.ph.preheader13

.lr.ph.preheader13:                               ; preds = %middle.block, %.lr.ph.preheader
  %.011.ph = phi i64 [ 0, %.lr.ph.preheader ], [ %n.vec, %middle.block ]
  %xtraiter = and i64 %4, 3
  %lcmp.mod.not = icmp eq i64 %xtraiter, 0
  br i1 %lcmp.mod.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol

.lr.ph.prol:                                      ; preds = %.lr.ph.preheader13, %.lr.ph.prol
  %.011.prol = phi i64 [ %21, %.lr.ph.prol ], [ %.011.ph, %.lr.ph.preheader13 ]
  %prol.iter = phi i64 [ %prol.iter.next, %.lr.ph.prol ], [ 0, %.lr.ph.preheader13 ]
  %17 = getelementptr inbounds double, ptr %6, i64 %.011.prol
  %18 = load double, ptr %17, align 8, !tbaa !5
  %19 = fmul double %18, %1
  %20 = getelementptr inbounds double, ptr %5, i64 %.011.prol
  store double %19, ptr %20, align 8, !tbaa !5
  %21 = add nuw i64 %.011.prol, 1
  %prol.iter.next = add i64 %prol.iter, 1
  %prol.iter.cmp.not = icmp eq i64 %prol.iter.next, %xtraiter
  br i1 %prol.iter.cmp.not, label %.lr.ph.prol.loopexit, label %.lr.ph.prol, !llvm.loop !13

.lr.ph.prol.loopexit:                             ; preds = %.lr.ph.prol, %.lr.ph.preheader13
  %.011.unr = phi i64 [ %.011.ph, %.lr.ph.preheader13 ], [ %21, %.lr.ph.prol ]
  %22 = sub i64 %.011.ph, %4
  %23 = icmp ugt i64 %22, -4
  br i1 %23, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.prol.loopexit, %.lr.ph
  %.011 = phi i64 [ %43, %.lr.ph ], [ %.011.unr, %.lr.ph.prol.loopexit ]
  %24 = getelementptr inbounds double, ptr %6, i64 %.011
  %25 = load double, ptr %24, align 8, !tbaa !5
  %26 = fmul double %25, %1
  %27 = getelementptr inbounds double, ptr %5, i64 %.011
  store double %26, ptr %27, align 8, !tbaa !5
  %28 = add nuw i64 %.011, 1
  %29 = getelementptr inbounds double, ptr %6, i64 %28
  %30 = load double, ptr %29, align 8, !tbaa !5
  %31 = fmul double %30, %1
  %32 = getelementptr inbounds double, ptr %5, i64 %28
  store double %31, ptr %32, align 8, !tbaa !5
  %33 = add nuw i64 %.011, 2
  %34 = getelementptr inbounds double, ptr %6, i64 %33
  %35 = load double, ptr %34, align 8, !tbaa !5
  %36 = fmul double %35, %1
  %37 = getelementptr inbounds double, ptr %5, i64 %33
  store double %36, ptr %37, align 8, !tbaa !5
  %38 = add nuw i64 %.011, 3
  %39 = getelementptr inbounds double, ptr %6, i64 %38
  %40 = load double, ptr %39, align 8, !tbaa !5
  %41 = fmul double %40, %1
  %42 = getelementptr inbounds double, ptr %5, i64 %38
  store double %41, ptr %42, align 8, !tbaa !5
  %43 = add nuw i64 %.011, 4
  %exitcond.not.3 = icmp eq i64 %43, %4
  br i1 %exitcond.not.3, label %._crit_edge, label %.lr.ph, !llvm.loop !15

._crit_edge:                                      ; preds = %.lr.ph.prol.loopexit, %.lr.ph, %middle.block, %3
  ret void
}

declare void @_ZN13reim_fft64vecC1Em(ptr, i64) local_unnamed_addr

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.unroll.disable"}
!15 = distinct !{!15, !10, !11}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass