; LLVM IR from bqi343/cp-notebook :: Contests/USACO Training/Ch 6/6.3 fence8.ll (Z3dfsii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@b = external dso_local global %"class.std::vector", align 8
@r = external dso_local global %"class.std::vector", align 8
@N = external dso_local global i32, align 4
@csum = external dso_local global i32, align 4
@sum = external dso_local global i32, align 4
@mn = external dso_local global i32, align 4

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef %0, i32 noundef %1) #0 {
  %3 = alloca i1, align 1
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i8, align 1
  %7 = alloca i8, align 1
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, ptr %4, align 4, !tbaa !5
  store i32 %1, ptr %5, align 4, !tbaa !5
  %12 = load i32, ptr %5, align 4, !tbaa !5
  %13 = load i32, ptr @csum, align 4, !tbaa !5
  %14 = add nsw i32 %12, %13
  %15 = load i32, ptr @sum, align 4, !tbaa !5
  %16 = icmp sgt i32 %14, %15
  br i1 %16, label %17, label %18

17:                                               ; preds = %2
  store i1 false, ptr %3, align 1
  br label %137

18:                                               ; preds = %2
  %19 = load i32, ptr %4, align 4, !tbaa !5
  %20 = icmp eq i32 %19, -1
  br i1 %20, label %21, label %22

21:                                               ; preds = %18
  store i1 true, ptr %3, align 1
  br label %137

22:                                               ; preds = %18
  call void @llvm.lifetime.start.p0(i64 1, ptr %6) #3
  store i8 0, ptr %6, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  store i8 0, ptr %7, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  br label %23

23:                                               ; preds = %56, %22
  %24 = load i32, ptr %8, align 4, !tbaa !5
  %25 = load i32, ptr @N, align 4, !tbaa !5
  %26 = icmp slt i32 %24, %25
  br i1 %26, label %28, label %27

27:                                               ; preds = %23
  store i32 2, ptr %9, align 4
  br label %59

28:                                               ; preds = %23
  %29 = load i32, ptr %8, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %30) #3
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = load i32, ptr %4, align 4, !tbaa !5
  %34 = sext i32 %33 to i64
  %35 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %34) #3
  %36 = load i32, ptr %35, align 4, !tbaa !5
  %37 = icmp eq i32 %32, %36
  br i1 %37, label %38, label %55

38:                                               ; preds = %28
  %39 = load i32, ptr %8, align 4, !tbaa !5
  %40 = sext i32 %39 to i64
  %41 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %40) #3
  store i32 0, ptr %41, align 4, !tbaa !5
  %42 = load i32, ptr %4, align 4, !tbaa !5
  %43 = sub nsw i32 %42, 1
  %44 = load i32, ptr %5, align 4, !tbaa !5
  %45 = call noundef zeroext i1 @_Z3dfsii(i32 noundef %43, i32 noundef %44)
  br i1 %45, label %46, label %47

46:                                               ; preds = %38
  store i8 1, ptr %7, align 1, !tbaa !9
  br label %47

47:                                               ; preds = %46, %38
  %48 = load i32, ptr %4, align 4, !tbaa !5
  %49 = sext i32 %48 to i64
  %50 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %49) #3
  %51 = load i32, ptr %50, align 4, !tbaa !5
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %53) #3
  store i32 %51, ptr %54, align 4, !tbaa !5
  store i8 1, ptr %6, align 1, !tbaa !9
  store i32 2, ptr %9, align 4
  br label %59

55:                                               ; preds = %28
  br label %56

56:                                               ; preds = %55
  %57 = load i32, ptr %8, align 4, !tbaa !5
  %58 = add nsw i32 %57, 1
  store i32 %58, ptr %8, align 4, !tbaa !5
  br label %23, !llvm.loop !11

59:                                               ; preds = %47, %27
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  br label %60

60:                                               ; preds = %59
  %61 = load i8, ptr %6, align 1, !tbaa !9, !range !13, !noundef !14
  %62 = trunc i8 %61 to i1
  br i1 %62, label %134, label %63

63:                                               ; preds = %60
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  store i32 0, ptr %10, align 4, !tbaa !5
  br label %64

64:                                               ; preds = %129, %63
  %65 = load i32, ptr %10, align 4, !tbaa !5
  %66 = load i32, ptr @N, align 4, !tbaa !5
  %67 = icmp slt i32 %65, %66
  br i1 %67, label %69, label %68

68:                                               ; preds = %64
  store i32 5, ptr %9, align 4
  br label %132

69:                                               ; preds = %64
  %70 = load i32, ptr %4, align 4, !tbaa !5
  %71 = sext i32 %70 to i64
  %72 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %71) #3
  %73 = load i32, ptr %72, align 4, !tbaa !5
  %74 = load i32, ptr %10, align 4, !tbaa !5
  %75 = sext i32 %74 to i64
  %76 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %75) #3
  %77 = load i32, ptr %76, align 4, !tbaa !5
  %78 = icmp sle i32 %73, %77
  br i1 %78, label %79, label %128

79:                                               ; preds = %69
  %80 = load i32, ptr %4, align 4, !tbaa !5
  %81 = sext i32 %80 to i64
  %82 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %81) #3
  %83 = load i32, ptr %82, align 4, !tbaa !5
  %84 = load i32, ptr %10, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %85) #3
  %87 = load i32, ptr %86, align 4, !tbaa !5
  %88 = sub nsw i32 %87, %83
  store i32 %88, ptr %86, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %89 = load i32, ptr %5, align 4, !tbaa !5
  store i32 %89, ptr %11, align 4, !tbaa !5
  %90 = load i32, ptr %10, align 4, !tbaa !5
  %91 = sext i32 %90 to i64
  %92 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %91) #3
  %93 = load i32, ptr %92, align 4, !tbaa !5
  %94 = load i32, ptr @mn, align 4, !tbaa !5
  %95 = icmp slt i32 %93, %94
  br i1 %95, label %96, label %103

96:                                               ; preds = %79
  %97 = load i32, ptr %10, align 4, !tbaa !5
  %98 = sext i32 %97 to i64
  %99 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %98) #3
  %100 = load i32, ptr %99, align 4, !tbaa !5
  %101 = load i32, ptr %11, align 4, !tbaa !5
  %102 = add nsw i32 %101, %100
  store i32 %102, ptr %11, align 4, !tbaa !5
  br label %103

103:                                              ; preds = %96, %79
  %104 = load i32, ptr %4, align 4, !tbaa !5
  %105 = sub nsw i32 %104, 1
  %106 = load i32, ptr %11, align 4, !tbaa !5
  %107 = call noundef zeroext i1 @_Z3dfsii(i32 noundef %105, i32 noundef %106)
  br i1 %107, label %108, label %109

108:                                              ; preds = %103
  store i8 1, ptr %7, align 1, !tbaa !9
  br label %109

109:                                              ; preds = %108, %103
  %110 = load i32, ptr %4, align 4, !tbaa !5
  %111 = sext i32 %110 to i64
  %112 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %111) #3
  %113 = load i32, ptr %112, align 4, !tbaa !5
  %114 = load i32, ptr %10, align 4, !tbaa !5
  %115 = sext i32 %114 to i64
  %116 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %115) #3
  %117 = load i32, ptr %116, align 4, !tbaa !5
  %118 = add nsw i32 %117, %113
  store i32 %118, ptr %116, align 4, !tbaa !5
  %119 = load i8, ptr %7, align 1, !tbaa !9, !range !13, !noundef !14
  %120 = trunc i8 %119 to i1
  %121 = zext i1 %120 to i32
  %122 = icmp eq i32 %121, 1
  br i1 %122, label %123, label %124

123:                                              ; preds = %109
  store i32 5, ptr %9, align 4
  br label %125

124:                                              ; preds = %109
  store i32 0, ptr %9, align 4
  br label %125

125:                                              ; preds = %124, %123
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  %126 = load i32, ptr %9, align 4
  switch i32 %126, label %132 [
    i32 0, label %127
  ]

127:                                              ; preds = %125
  br label %128

128:                                              ; preds = %127, %69
  br label %129

129:                                              ; preds = %128
  %130 = load i32, ptr %10, align 4, !tbaa !5
  %131 = add nsw i32 %130, 1
  store i32 %131, ptr %10, align 4, !tbaa !5
  br label %64, !llvm.loop !15

132:                                              ; preds = %125, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #3
  br label %133

133:                                              ; preds = %132
  br label %134

134:                                              ; preds = %133, %60
  %135 = load i8, ptr %7, align 1, !tbaa !9, !range !13, !noundef !14
  %136 = trunc i8 %135 to i1
  store i1 %136, ptr %3, align 1
  store i32 1, ptr %9, align 4
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #3
  call void @llvm.lifetime.end.p0(i64 1, ptr %6) #3
  br label %137

137:                                              ; preds = %134, %21, %17
  %138 = load i1, ptr %3, align 1
  ret i1 %138
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #2 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{i8 0, i8 2}
!14 = !{}
!15 = distinct !{!15, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@b = external dso_local global %"class.std::vector", align 8
@r = external dso_local global %"class.std::vector", align 8
@N = external dso_local local_unnamed_addr global i32, align 4
@csum = external dso_local local_unnamed_addr global i32, align 4
@sum = external dso_local local_unnamed_addr global i32, align 4
@mn = external dso_local local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef zeroext i1 @_Z3dfsii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = load i32, ptr @csum, align 4, !tbaa !5
  %4 = add nsw i32 %3, %1
  %5 = load i32, ptr @sum, align 4, !tbaa !5
  %6 = icmp sgt i32 %4, %5
  br i1 %6, label %common.ret, label %7

7:                                                ; preds = %2
  %8 = icmp eq i32 %0, -1
  br i1 %8, label %common.ret, label %.preheader38

.preheader38:                                     ; preds = %7
  %9 = load i32, ptr @N, align 4, !tbaa !5
  %10 = icmp sgt i32 %9, 0
  br i1 %10, label %.lr.ph, label %common.ret

.lr.ph:                                           ; preds = %.preheader38
  %11 = sext i32 %0 to i64
  br label %19

12:                                               ; preds = %19
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %13 = load i32, ptr @N, align 4, !tbaa !5
  %14 = sext i32 %13 to i64
  %15 = icmp slt i64 %indvars.iv.next, %14
  br i1 %15, label %19, label %.preheader, !llvm.loop !9

.preheader:                                       ; preds = %12
  %16 = icmp sgt i32 %13, 0
  br i1 %16, label %.lr.ph43, label %common.ret

.lr.ph43:                                         ; preds = %.preheader
  %17 = sext i32 %0 to i64
  %18 = add nsw i32 %0, -1
  br label %31

19:                                               ; preds = %.lr.ph, %12
  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %12 ]
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv) #1
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %11) #1
  %23 = load i32, ptr %22, align 4, !tbaa !5
  %24 = icmp eq i32 %21, %23
  br i1 %24, label %.thread, label %12

common.ret:                                       ; preds = %2, %7, %.loopexit.loopexit, %.preheader, %.preheader38, %.thread
  %common.ret.op = phi i1 [ %27, %.thread ], [ false, %2 ], [ true, %7 ], [ false, %.preheader ], [ %62, %.loopexit.loopexit ], [ false, %.preheader38 ]
  ret i1 %common.ret.op

.thread:                                          ; preds = %19
  %25 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv) #1
  store i32 0, ptr %25, align 4, !tbaa !5
  %26 = add nsw i32 %0, -1
  %27 = tail call noundef zeroext i1 @_Z3dfsii(i32 noundef %26, i32 noundef %1)
  %28 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %11) #1
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv) #1
  store i32 %29, ptr %30, align 4, !tbaa !5
  br label %common.ret

31:                                               ; preds = %.lr.ph43, %58
  %indvars.iv48 = phi i64 [ 0, %.lr.ph43 ], [ %indvars.iv.next49, %58 ]
  %.241 = phi i8 [ 0, %.lr.ph43 ], [ %.4, %58 ]
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %17) #1
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv48) #1
  %35 = load i32, ptr %34, align 4, !tbaa !5
  %.not = icmp sgt i32 %33, %35
  br i1 %.not, label %58, label %36

36:                                               ; preds = %31
  %37 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %17) #1
  %38 = load i32, ptr %37, align 4, !tbaa !5
  %39 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv48) #1
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = sub nsw i32 %40, %38
  store i32 %41, ptr %39, align 4, !tbaa !5
  %42 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv48) #1
  %43 = load i32, ptr %42, align 4, !tbaa !5
  %44 = load i32, ptr @mn, align 4, !tbaa !5
  %45 = icmp slt i32 %43, %44
  br i1 %45, label %46, label %50

46:                                               ; preds = %36
  %47 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv48) #1
  %48 = load i32, ptr %47, align 4, !tbaa !5
  %49 = add nsw i32 %48, %1
  br label %50

50:                                               ; preds = %46, %36
  %.0 = phi i32 [ %49, %46 ], [ %1, %36 ]
  %51 = tail call noundef zeroext i1 @_Z3dfsii(i32 noundef %18, i32 noundef %.0)
  %spec.select36 = select i1 %51, i8 1, i8 %.241
  %52 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @r, i64 noundef %17) #1
  %53 = load i32, ptr %52, align 4, !tbaa !5
  %54 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) @b, i64 noundef %indvars.iv48) #1
  %55 = load i32, ptr %54, align 4, !tbaa !5
  %56 = add nsw i32 %55, %53
  store i32 %56, ptr %54, align 4, !tbaa !5
  %57 = trunc nuw i8 %spec.select36 to i1
  br i1 %57, label %.loopexit.loopexit, label %58

58:                                               ; preds = %31, %50
  %.4 = phi i8 [ %spec.select36, %50 ], [ %.241, %31 ]
  %indvars.iv.next49 = add nuw nsw i64 %indvars.iv48, 1
  %59 = load i32, ptr @N, align 4, !tbaa !5
  %60 = sext i32 %59 to i64
  %61 = icmp slt i64 %indvars.iv.next49, %60
  br i1 %61, label %31, label %.loopexit.loopexit, !llvm.loop !11

.loopexit.loopexit:                               ; preds = %50, %58
  %.6.ph = phi i8 [ %spec.select36, %50 ], [ %.4, %58 ]
  %62 = trunc nuw i8 %.6.ph to i1
  br label %common.ret
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass