; LLVM IR from bqi343/cp-notebook :: Contests/USACO Solutions/2011-12/Open/12 Open G3.ll (Z3getiii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@vec = external dso_local global [1048576 x %"class.std::vector"], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) #1 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3geni(i32 noundef) #2

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3getiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) #2 {
  %4 = alloca i1, align 1
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i8, align 1
  %11 = alloca i32, align 4
  store i32 %0, ptr %5, align 4, !tbaa !5
  store i32 %1, ptr %6, align 4, !tbaa !5
  store i32 %2, ptr %7, align 4, !tbaa !5
  %12 = load i32, ptr %5, align 4, !tbaa !5
  call void @_Z3geni(i32 noundef %12)
  %13 = load i32, ptr %6, align 4, !tbaa !5
  call void @_Z3geni(i32 noundef %13)
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  store i32 0, ptr %8, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #3
  %14 = load i32, ptr %6, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %15
  %17 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %16) #3
  %18 = sub i64 %17, 1
  %19 = trunc i64 %18 to i32
  store i32 %19, ptr %9, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %10) #3
  store i8 1, ptr %10, align 1, !tbaa !9
  br label %20

20:                                               ; preds = %102, %3
  %21 = load i8, ptr %10, align 1, !tbaa !9, !range !11, !noundef !12
  %22 = trunc i8 %21 to i1
  br i1 %22, label %23, label %103

23:                                               ; preds = %20
  store i8 0, ptr %10, align 1, !tbaa !9
  br label %24

24:                                               ; preds = %53, %23
  %25 = load i32, ptr %8, align 4, !tbaa !5
  %26 = load i32, ptr %5, align 4, !tbaa !5
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %27
  %29 = call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %28) #3
  %30 = trunc i64 %29 to i32
  %31 = sub nsw i32 %30, 1
  %32 = icmp slt i32 %25, %31
  br i1 %32, label %33, label %51

33:                                               ; preds = %24
  %34 = load i32, ptr %5, align 4, !tbaa !5
  %35 = sext i32 %34 to i64
  %36 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %35
  %37 = load i32, ptr %8, align 4, !tbaa !5
  %38 = sext i32 %37 to i64
  %39 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %36, i64 noundef %38) #3
  %40 = load i32, ptr %39, align 4, !tbaa !5
  %41 = load i32, ptr %6, align 4, !tbaa !5
  %42 = sext i32 %41 to i64
  %43 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %42
  %44 = load i32, ptr %9, align 4, !tbaa !5
  %45 = sext i32 %44 to i64
  %46 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %43, i64 noundef %45) #3
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = add nsw i32 %40, %47
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = icmp slt i32 %48, %49
  br label %51

51:                                               ; preds = %33, %24
  %52 = phi i1 [ false, %24 ], [ %50, %33 ]
  br i1 %52, label %53, label %56

53:                                               ; preds = %51
  %54 = load i32, ptr %8, align 4, !tbaa !5
  %55 = add nsw i32 %54, 1
  store i32 %55, ptr %8, align 4, !tbaa !5
  store i8 1, ptr %10, align 1, !tbaa !9
  br label %24, !llvm.loop !13

56:                                               ; preds = %51
  br label %57

57:                                               ; preds = %80, %56
  %58 = load i32, ptr %9, align 4, !tbaa !5
  %59 = icmp sgt i32 %58, 0
  br i1 %59, label %60, label %78

60:                                               ; preds = %57
  %61 = load i32, ptr %5, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %62
  %64 = load i32, ptr %8, align 4, !tbaa !5
  %65 = sext i32 %64 to i64
  %66 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %63, i64 noundef %65) #3
  %67 = load i32, ptr %66, align 4, !tbaa !5
  %68 = load i32, ptr %6, align 4, !tbaa !5
  %69 = sext i32 %68 to i64
  %70 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %69
  %71 = load i32, ptr %9, align 4, !tbaa !5
  %72 = sext i32 %71 to i64
  %73 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %70, i64 noundef %72) #3
  %74 = load i32, ptr %73, align 4, !tbaa !5
  %75 = add nsw i32 %67, %74
  %76 = load i32, ptr %7, align 4, !tbaa !5
  %77 = icmp sgt i32 %75, %76
  br label %78

78:                                               ; preds = %60, %57
  %79 = phi i1 [ false, %57 ], [ %77, %60 ]
  br i1 %79, label %80, label %83

80:                                               ; preds = %78
  %81 = load i32, ptr %9, align 4, !tbaa !5
  %82 = add nsw i32 %81, -1
  store i32 %82, ptr %9, align 4, !tbaa !5
  store i8 1, ptr %10, align 1, !tbaa !9
  br label %57, !llvm.loop !15

83:                                               ; preds = %78
  %84 = load i32, ptr %5, align 4, !tbaa !5
  %85 = sext i32 %84 to i64
  %86 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %85
  %87 = load i32, ptr %8, align 4, !tbaa !5
  %88 = sext i32 %87 to i64
  %89 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %86, i64 noundef %88) #3
  %90 = load i32, ptr %89, align 4, !tbaa !5
  %91 = load i32, ptr %6, align 4, !tbaa !5
  %92 = sext i32 %91 to i64
  %93 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %92
  %94 = load i32, ptr %9, align 4, !tbaa !5
  %95 = sext i32 %94 to i64
  %96 = call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %93, i64 noundef %95) #3
  %97 = load i32, ptr %96, align 4, !tbaa !5
  %98 = add nsw i32 %90, %97
  %99 = load i32, ptr %7, align 4, !tbaa !5
  %100 = icmp eq i32 %98, %99
  br i1 %100, label %101, label %102

101:                                              ; preds = %83
  store i1 true, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %104

102:                                              ; preds = %83
  br label %20, !llvm.loop !16

103:                                              ; preds = %20
  store i1 false, ptr %4, align 1
  store i32 1, ptr %11, align 4
  br label %104

104:                                              ; preds = %103, %101
  call void @llvm.lifetime.end.p0(i64 1, ptr %10) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  %105 = load i1, ptr %4, align 1
  ret i1 %105
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = distinct !{!16, !14}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.std::vector" = type { %"struct.std::_Vector_base" }
%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }

@vec = external dso_local global [1048576 x %"class.std::vector"], align 16

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24), i64 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z3geni(i32 noundef) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local noundef zeroext i1 @_Z3getiii(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #1 {
  tail call void @_Z3geni(i32 noundef %0)
  tail call void @_Z3geni(i32 noundef %1)
  %4 = sext i32 %1 to i64
  %5 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %4
  %6 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %5) #2
  %7 = trunc i64 %6 to i32
  %8 = add i32 %7, -1
  %9 = sext i32 %0 to i64
  %10 = getelementptr inbounds [1048576 x %"class.std::vector"], ptr @vec, i64 0, i64 %9
  br label %11

11:                                               ; preds = %.critedge2, %3
  %.028 = phi i32 [ 0, %3 ], [ %.129.lcssa, %.critedge2 ]
  %.026 = phi i32 [ %8, %3 ], [ %.127.lcssa, %.critedge2 ]
  %.0 = phi i1 [ true, %3 ], [ %.2.lcssa, %.critedge2 ]
  br i1 %.0, label %.preheader, label %69

.preheader:                                       ; preds = %11
  %12 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #2
  %13 = trunc i64 %12 to i32
  %14 = add nsw i32 %13, -1
  %15 = icmp slt i32 %.028, %14
  br i1 %15, label %.lr.ph, label %.critedge

.lr.ph:                                           ; preds = %.preheader
  %16 = sext i32 %.026 to i64
  %17 = sext i32 %.028 to i64
  %18 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %17) #2
  %19 = load i32, ptr %18, align 4, !tbaa !5
  %20 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %16) #2
  %21 = load i32, ptr %20, align 4, !tbaa !5
  %22 = add nsw i32 %21, %19
  %23 = icmp slt i32 %22, %2
  br i1 %23, label %24, label %.critedge

24:                                               ; preds = %.lr.ph
  %indvars.iv.next.peel = add nsw i64 %17, 1
  %25 = add nsw i32 %.028, 1
  %26 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #2
  %27 = shl i64 %26, 32
  %sext = add i64 %27, -4294967296
  %28 = ashr exact i64 %sext, 32
  %29 = icmp slt i64 %indvars.iv.next.peel, %28
  br i1 %29, label %.peel.next, label %.critedge

.peel.next:                                       ; preds = %24, %36
  %indvars.iv = phi i64 [ %indvars.iv.next, %36 ], [ %indvars.iv.next.peel, %24 ]
  %.12931 = phi i32 [ %37, %36 ], [ %25, %24 ]
  %30 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %indvars.iv) #2
  %31 = load i32, ptr %30, align 4, !tbaa !5
  %32 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %16) #2
  %33 = load i32, ptr %32, align 4, !tbaa !5
  %34 = add nsw i32 %33, %31
  %35 = icmp slt i32 %34, %2
  br i1 %35, label %36, label %.critedge.loopexit.split.loop.exit52

36:                                               ; preds = %.peel.next
  %indvars.iv.next = add nsw i64 %indvars.iv, 1
  %37 = add nsw i32 %.12931, 1
  %38 = tail call noundef i64 @_ZNKSt6vectorIiSaIiEE4sizeEv(ptr noundef nonnull align 8 dereferenceable(24) %10) #2
  %39 = shl i64 %38, 32
  %sext51 = add i64 %39, -4294967296
  %40 = ashr exact i64 %sext51, 32
  %41 = icmp slt i64 %indvars.iv.next, %40
  br i1 %41, label %.peel.next, label %.critedge, !llvm.loop !9

.critedge.loopexit.split.loop.exit52:             ; preds = %.peel.next
  %42 = trunc nsw i64 %indvars.iv to i32
  br label %.critedge

.critedge:                                        ; preds = %36, %.critedge.loopexit.split.loop.exit52, %.lr.ph, %24, %.preheader
  %.129.lcssa = phi i32 [ %.028, %.preheader ], [ %.028, %.lr.ph ], [ %25, %24 ], [ %42, %.critedge.loopexit.split.loop.exit52 ], [ %37, %36 ]
  %.1.lcssa = phi i1 [ false, %.preheader ], [ false, %.lr.ph ], [ true, %24 ], [ %23, %.critedge.loopexit.split.loop.exit52 ], [ %23, %36 ]
  %43 = sext i32 %.129.lcssa to i64
  %44 = icmp sgt i32 %.026, 0
  br i1 %44, label %.lr.ph41.preheader, label %.critedge2

.lr.ph41.preheader:                               ; preds = %.critedge
  %45 = zext nneg i32 %.026 to i64
  %46 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %43) #2
  %47 = load i32, ptr %46, align 4, !tbaa !5
  %48 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %45) #2
  %49 = load i32, ptr %48, align 4, !tbaa !5
  %50 = add nsw i32 %49, %47
  %51 = icmp sgt i32 %50, %2
  br i1 %51, label %52, label %.critedge2

52:                                               ; preds = %.lr.ph41.preheader
  %.not = icmp eq i32 %.026, 1
  br i1 %.not, label %.critedge2, label %.lr.ph41

.lr.ph41:                                         ; preds = %52, %59
  %indvars.iv48.in = phi i64 [ %indvars.iv48, %59 ], [ %45, %52 ]
  %indvars.iv48 = add nsw i64 %indvars.iv48.in, -1
  %53 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %43) #2
  %54 = load i32, ptr %53, align 4, !tbaa !5
  %55 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %indvars.iv48) #2
  %56 = load i32, ptr %55, align 4, !tbaa !5
  %57 = add nsw i32 %56, %54
  %58 = icmp sgt i32 %57, %2
  br i1 %58, label %59, label %.critedge2.loopexit.split.loop.exit54

59:                                               ; preds = %.lr.ph41
  %60 = icmp ugt i64 %indvars.iv48.in, 2
  br i1 %60, label %.lr.ph41, label %.critedge2, !llvm.loop !12

.critedge2.loopexit.split.loop.exit54:            ; preds = %.lr.ph41
  %61 = trunc nuw nsw i64 %indvars.iv48 to i32
  br label %.critedge2

.critedge2:                                       ; preds = %59, %.critedge2.loopexit.split.loop.exit54, %.lr.ph41.preheader, %52, %.critedge
  %.127.lcssa = phi i32 [ %.026, %.critedge ], [ %.026, %.lr.ph41.preheader ], [ 0, %52 ], [ %61, %.critedge2.loopexit.split.loop.exit54 ], [ 0, %59 ]
  %.2.lcssa = phi i1 [ %.1.lcssa, %.critedge ], [ %.1.lcssa, %.lr.ph41.preheader ], [ true, %52 ], [ true, %.critedge2.loopexit.split.loop.exit54 ], [ true, %59 ]
  %62 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %10, i64 noundef %43) #2
  %63 = load i32, ptr %62, align 4, !tbaa !5
  %64 = sext i32 %.127.lcssa to i64
  %65 = tail call noundef nonnull align 4 dereferenceable(4) ptr @_ZNSt6vectorIiSaIiEEixEm(ptr noundef nonnull align 8 dereferenceable(24) %5, i64 noundef %64) #2
  %66 = load i32, ptr %65, align 4, !tbaa !5
  %67 = add nsw i32 %66, %63
  %68 = icmp eq i32 %67, %2
  br i1 %68, label %69, label %11, !llvm.loop !13

69:                                               ; preds = %11, %.critedge2
  ret i1 %.0
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = distinct !{!9, !10, !11}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.peeled.count", i32 1}
!12 = distinct !{!12, !10, !11}
!13 = distinct !{!13, !10}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopFullUnrollPass,LoopInstSimplifyPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass