; LLVM IR from XiaoMi/mace :: micro/framework (op_context)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }
%"struct.micro::MaceMicroEngineConfig" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32 }

@.str = external hidden unnamed_addr constant [75 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5micro9framework9OpContext6op_idxEv(ptr noundef nonnull align 4 dereferenceable(20)) #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK5micro9framework9OpContext10input_infoEj(ptr noundef nonnull align 4 dereferenceable(20), i32 noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5micro9framework9OpContext15input_info_sizeEv(ptr noundef nonnull align 4 dereferenceable(20)) #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro9framework9OpContext4InitEPNS_21MaceMicroEngineConfigEPKNS_5model11OperatorDefE(ptr noundef nonnull align 4 dereferenceable(20) %0, ptr noundef %1, ptr noundef %2) #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca %"class.micro::base::Logger", align 4
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  %16 = load ptr, ptr %5, align 8
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  %17 = call noundef i32 @_ZNK5micro9framework9OpContext15input_info_sizeEv(ptr noundef nonnull align 4 dereferenceable(20) %16)
  store i32 %17, ptr %8, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 0, ptr %9, align 4, !tbaa !9
  br label %18

18:                                               ; preds = %26, %3
  %19 = load i32, ptr %9, align 4, !tbaa !9
  %20 = load i32, ptr %8, align 4, !tbaa !9
  %21 = icmp ult i32 %19, %20
  br i1 %21, label %23, label %22

22:                                               ; preds = %18
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %29

23:                                               ; preds = %18
  %24 = load i32, ptr %9, align 4, !tbaa !9
  %25 = call noundef ptr @_ZNK5micro9framework9OpContext10input_infoEj(ptr noundef nonnull align 4 dereferenceable(20) %16, i32 noundef %24)
  call void @_ZNK5micro9Serialize13Uint2OpIOInfoEPKNS_8OpIOInfoE(ptr noundef nonnull align 1 dereferenceable(1) %16, ptr noundef %25)
  br label %26

26:                                               ; preds = %23
  %27 = load i32, ptr %9, align 4, !tbaa !9
  %28 = add i32 %27, 1
  store i32 %28, ptr %9, align 4, !tbaa !9
  br label %18, !llvm.loop !11

29:                                               ; preds = %22
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #5
  %30 = call noundef i32 @_ZNK5micro9framework9OpContext6op_idxEv(ptr noundef nonnull align 4 dereferenceable(20) %16)
  store i32 %30, ptr %10, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  %31 = load ptr, ptr %6, align 8, !tbaa !5
  %32 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %31, i32 0, i32 3
  %33 = load ptr, ptr %32, align 8, !tbaa !13
  %34 = load i32, ptr %10, align 4, !tbaa !9
  %35 = zext i32 %34 to i64
  %36 = getelementptr inbounds ptr, ptr %33, i64 %35
  %37 = load ptr, ptr %36, align 8, !tbaa !5
  %38 = load ptr, ptr %6, align 8, !tbaa !5
  %39 = load ptr, ptr %7, align 8, !tbaa !5
  %40 = call noundef i32 @_ZN5micro9framework8Operator4InitEPNS_21MaceMicroEngineConfigEPNS0_9OpContextEPKNS_5model11OperatorDefE(ptr noundef nonnull align 8 dereferenceable(32) %37, ptr noundef %38, ptr noundef %16, ptr noundef %39)
  store i32 %40, ptr %11, align 4, !tbaa !15
  %41 = load i32, ptr %11, align 4, !tbaa !15
  %42 = icmp ne i32 %41, 0
  br i1 %42, label %43, label %67

43:                                               ; preds = %29
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #5
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef @.str, i32 noundef 43, i32 noundef 1)
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %44, i32 0, i32 3
  %46 = load ptr, ptr %45, align 8, !tbaa !13
  %47 = load i32, ptr %10, align 4, !tbaa !9
  %48 = zext i32 %47 to i64
  %49 = getelementptr inbounds ptr, ptr %46, i64 %48
  %50 = load ptr, ptr %49, align 8, !tbaa !5
  %51 = load ptr, ptr %6, align 8, !tbaa !5
  %52 = load ptr, ptr %7, align 8, !tbaa !5
  %53 = invoke noundef i32 @_ZN5micro9framework8Operator4InitEPNS_21MaceMicroEngineConfigEPNS0_9OpContextEPKNS_5model11OperatorDefE(ptr noundef nonnull align 8 dereferenceable(32) %50, ptr noundef %51, ptr noundef %16, ptr noundef %52)
          to label %54 unwind label %63

54:                                               ; preds = %43
  %55 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %12, i32 noundef %53)
          to label %56 unwind label %63

56:                                               ; preds = %54
  %57 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %55, ptr noundef @.str.1)
          to label %58 unwind label %63

58:                                               ; preds = %56
  %59 = load i32, ptr %11, align 4, !tbaa !15
  %60 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %57, i32 noundef %59)
          to label %61 unwind label %63

61:                                               ; preds = %58
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  %62 = load i32, ptr %11, align 4, !tbaa !15
  store i32 %62, ptr %4, align 4
  store i32 1, ptr %15, align 4
  br label %68

63:                                               ; preds = %58, %56, %54, %43
  %64 = landingpad { ptr, i32 }
          cleanup
  %65 = extractvalue { ptr, i32 } %64, 0
  store ptr %65, ptr %13, align 8
  %66 = extractvalue { ptr, i32 } %64, 1
  store i32 %66, ptr %14, align 4
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  br label %73

67:                                               ; preds = %29
  store i32 0, ptr %15, align 4
  br label %68

68:                                               ; preds = %67, %61
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  %69 = load i32, ptr %15, align 4
  switch i32 %69, label %71 [
    i32 0, label %70
  ]

70:                                               ; preds = %68
  store i32 0, ptr %4, align 4
  store i32 1, ptr %15, align 4
  br label %71

71:                                               ; preds = %70, %68
  call void @llvm.lifetime.end.p0(i64 4, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  %72 = load i32, ptr %4, align 4
  ret i32 %72

73:                                               ; preds = %63
  %74 = load ptr, ptr %13, align 8
  %75 = load i32, ptr %14, align 4
  %76 = insertvalue { ptr, i32 } poison, ptr %74, 0
  %77 = insertvalue { ptr, i32 } %76, i32 %75, 1
  resume { ptr, i32 } %77
}

declare void @_ZNK5micro9Serialize13Uint2OpIOInfoEPKNS_8OpIOInfoE(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef) #3

declare noundef i32 @_ZN5micro9framework8Operator4InitEPNS_21MaceMicroEngineConfigEPNS0_9OpContextEPKNS_5model11OperatorDefE(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef, ptr noundef) #3

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #3

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) #3

declare i32 @__gxx_personality_v0(...)

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) #3

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !6, i64 24}
!14 = !{!"_ZTSN5micro21MaceMicroEngineConfigE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !10, i64 64}
!15 = !{!16, !16, i64 0}
!16 = !{!"_ZTSN5micro10MaceStatusE", !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }

@.str = external hidden unnamed_addr constant [75 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [21 x i8], align 1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5micro9framework9OpContext6op_idxEv(ptr noundef nonnull align 4 dereferenceable(20)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef ptr @_ZNK5micro9framework9OpContext10input_infoEj(ptr noundef nonnull align 4 dereferenceable(20), i32 noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZNK5micro9framework9OpContext15input_info_sizeEv(ptr noundef nonnull align 4 dereferenceable(20)) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro9framework9OpContext4InitEPNS_21MaceMicroEngineConfigEPKNS_5model11OperatorDefE(ptr noundef nonnull align 4 dereferenceable(20) %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #2 align 2 personality ptr @__gxx_personality_v0 {
  %4 = alloca %"class.micro::base::Logger", align 4
  %5 = tail call noundef i32 @_ZNK5micro9framework9OpContext15input_info_sizeEv(ptr noundef nonnull align 4 dereferenceable(20) %0)
  %.not23 = icmp eq i32 %5, 0
  br i1 %.not23, label %._crit_edge, label %.lr.ph

._crit_edge:                                      ; preds = %.lr.ph, %3
  %6 = tail call noundef i32 @_ZNK5micro9framework9OpContext6op_idxEv(ptr noundef nonnull align 4 dereferenceable(20) %0)
  %7 = getelementptr inbounds i8, ptr %1, i64 24
  %8 = load ptr, ptr %7, align 8, !tbaa !5
  %9 = zext i32 %6 to i64
  %10 = getelementptr inbounds ptr, ptr %8, i64 %9
  %11 = load ptr, ptr %10, align 8, !tbaa !11
  %12 = tail call noundef i32 @_ZN5micro9framework8Operator4InitEPNS_21MaceMicroEngineConfigEPNS0_9OpContextEPKNS_5model11OperatorDefE(ptr noundef nonnull align 8 dereferenceable(32) %11, ptr noundef %1, ptr noundef nonnull %0, ptr noundef %2)
  %.not = icmp eq i32 %12, 0
  br i1 %.not, label %29, label %15

.lr.ph:                                           ; preds = %3, %.lr.ph
  %.02022 = phi i32 [ %14, %.lr.ph ], [ 0, %3 ]
  %13 = tail call noundef ptr @_ZNK5micro9framework9OpContext10input_infoEj(ptr noundef nonnull align 4 dereferenceable(20) %0, i32 noundef %.02022)
  tail call void @_ZNK5micro9Serialize13Uint2OpIOInfoEPKNS_8OpIOInfoE(ptr noundef nonnull align 1 dereferenceable(1) %0, ptr noundef %13)
  %14 = add nuw i32 %.02022, 1
  %exitcond.not = icmp eq i32 %14, %5
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !12

15:                                               ; preds = %._crit_edge
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #5
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %4, ptr noundef nonnull @.str, i32 noundef 43, i32 noundef 1)
  %16 = load ptr, ptr %7, align 8, !tbaa !5
  %17 = getelementptr inbounds ptr, ptr %16, i64 %9
  %18 = load ptr, ptr %17, align 8, !tbaa !11
  %19 = invoke noundef i32 @_ZN5micro9framework8Operator4InitEPNS_21MaceMicroEngineConfigEPNS0_9OpContextEPKNS_5model11OperatorDefE(ptr noundef nonnull align 8 dereferenceable(32) %18, ptr noundef nonnull %1, ptr noundef nonnull %0, ptr noundef %2)
          to label %20 unwind label %27

20:                                               ; preds = %15
  %21 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %4, i32 noundef %19)
          to label %22 unwind label %27

22:                                               ; preds = %20
  %23 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %21, ptr noundef nonnull @.str.1)
          to label %24 unwind label %27

24:                                               ; preds = %22
  %25 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4) %23, i32 noundef %12)
          to label %26 unwind label %27

26:                                               ; preds = %24
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  br label %29

27:                                               ; preds = %24, %22, %20, %15
  %28 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #5
  resume { ptr, i32 } %28

29:                                               ; preds = %._crit_edge, %26
  ret i32 %12
}

declare void @_ZNK5micro9Serialize13Uint2OpIOInfoEPKNS_8OpIOInfoE(ptr noundef nonnull align 1 dereferenceable(1), ptr noundef) local_unnamed_addr #3

declare noundef i32 @_ZN5micro9framework8Operator4InitEPNS_21MaceMicroEngineConfigEPNS0_9OpContextEPKNS_5model11OperatorDefE(ptr noundef nonnull align 8 dereferenceable(32), ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #3

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEi(ptr noundef nonnull align 4 dereferenceable(4), i32 noundef) local_unnamed_addr #3

declare i32 @__gxx_personality_v0(...)

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) local_unnamed_addr #3

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #4

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"_ZTSN5micro21MaceMicroEngineConfigE", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !10, i64 64}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass