; LLVM IR from epicf/ef :: vec3d.ll (Z12vec3d_negate5Vec3d)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Vec3d = type { [3 x double] }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z10vec3d_initddd(ptr dead_on_unwind noalias writable sret(%struct.Vec3d) align 8, double noundef, double noundef, double noundef) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_Z7vec3d_x5Vec3d(ptr noundef byval(%struct.Vec3d) align 8) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_Z7vec3d_y5Vec3d(ptr noundef byval(%struct.Vec3d) align 8) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_Z7vec3d_z5Vec3d(ptr noundef byval(%struct.Vec3d) align 8) #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z12vec3d_negate5Vec3d(ptr dead_on_unwind noalias writable sret(%struct.Vec3d) align 8 %0, ptr noundef byval(%struct.Vec3d) align 8 %1) #0 {
  %3 = alloca %struct.Vec3d, align 8
  %4 = alloca %struct.Vec3d, align 8
  %5 = alloca %struct.Vec3d, align 8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 %1, i64 24, i1 false), !tbaa.struct !5
  %6 = call noundef double @_Z7vec3d_x5Vec3d(ptr noundef byval(%struct.Vec3d) align 8 %3)
  %7 = fneg double %6
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %4, ptr align 8 %1, i64 24, i1 false), !tbaa.struct !5
  %8 = call noundef double @_Z7vec3d_y5Vec3d(ptr noundef byval(%struct.Vec3d) align 8 %4)
  %9 = fneg double %8
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %5, ptr align 8 %1, i64 24, i1 false), !tbaa.struct !5
  %10 = call noundef double @_Z7vec3d_z5Vec3d(ptr noundef byval(%struct.Vec3d) align 8 %5)
  %11 = fneg double %10
  call void @_Z10vec3d_initddd(ptr dead_on_unwind writable sret(%struct.Vec3d) align 8 %0, double noundef %7, double noundef %9, double noundef %11)
  ret void
}

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{i64 0, i64 24, !6}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.Vec3d = type { [3 x double] }

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_Z10vec3d_initddd(ptr dead_on_unwind noalias writable sret(%struct.Vec3d) align 8, double noundef, double noundef, double noundef) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_Z7vec3d_x5Vec3d(ptr noundef byval(%struct.Vec3d) align 8) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_Z7vec3d_y5Vec3d(ptr noundef byval(%struct.Vec3d) align 8) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef double @_Z7vec3d_z5Vec3d(ptr noundef byval(%struct.Vec3d) align 8) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local void @_Z12vec3d_negate5Vec3d(ptr dead_on_unwind noalias writable sret(%struct.Vec3d) align 8 %0, ptr nocapture noundef readonly byval(%struct.Vec3d) align 8 %1) local_unnamed_addr #0 {
  %3 = tail call noundef double @_Z7vec3d_x5Vec3d(ptr noundef nonnull byval(%struct.Vec3d) align 8 %1)
  %4 = fneg double %3
  %5 = tail call noundef double @_Z7vec3d_y5Vec3d(ptr noundef nonnull byval(%struct.Vec3d) align 8 %1)
  %6 = fneg double %5
  %7 = tail call noundef double @_Z7vec3d_z5Vec3d(ptr noundef nonnull byval(%struct.Vec3d) align 8 %1)
  %8 = fneg double %7
  tail call void @_Z10vec3d_initddd(ptr dead_on_unwind writable sret(%struct.Vec3d) align 8 %0, double noundef %4, double noundef %6, double noundef %8)
  ret void
}

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: DSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,MemCpyOptPass,PostOrderFunctionAttrsPass,TailCallElimPass