; LLVM IR from bqi343/cp-notebook :: Contests/USACO Solutions/2018-19/Open 2019/Plat/valleys.ll (Z5solveii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DSU = type { [562500 x i32], [562500 x i32], [562500 x i32], [562500 x %"class.std::vector.3"] }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::pair" = type { i32, i32 }

@N = external dso_local global i32, align 4
@xd = external dso_local global [4 x i32], align 16
@yd = external dso_local global [4 x i32], align 16
@D = external dso_local global %struct.DSU, align 8
@ok = external dso_local global [750 x [750 x i8]], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solveii(i32 noundef %0, i32 noundef %1) #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca %"struct.std::pair", align 4
  %10 = alloca %"struct.std::pair", align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = sext i32 %11 to i64
  %13 = getelementptr inbounds [750 x [750 x i8]], ptr @ok, i64 0, i64 %12
  %14 = load i32, ptr %4, align 4, !tbaa !5
  %15 = sext i32 %14 to i64
  %16 = getelementptr inbounds [750 x i8], ptr %13, i64 0, i64 %15
  store i8 1, ptr %16, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  store i32 0, ptr %5, align 4, !tbaa !5
  br label %17

17:                                               ; preds = %64, %2
  %18 = load i32, ptr %5, align 4, !tbaa !5
  %19 = icmp slt i32 %18, 4
  br i1 %19, label %21, label %20

20:                                               ; preds = %17
  store i32 2, ptr %6, align 4
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %67

21:                                               ; preds = %17
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #3
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = load i32, ptr %5, align 4, !tbaa !5
  %24 = sext i32 %23 to i64
  %25 = getelementptr inbounds [4 x i32], ptr @xd, i64 0, i64 %24
  %26 = load i32, ptr %25, align 4, !tbaa !5
  %27 = add nsw i32 %22, %26
  store i32 %27, ptr %7, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #3
  %28 = load i32, ptr %4, align 4, !tbaa !5
  %29 = load i32, ptr %5, align 4, !tbaa !5
  %30 = sext i32 %29 to i64
  %31 = getelementptr inbounds [4 x i32], ptr @yd, i64 0, i64 %30
  %32 = load i32, ptr %31, align 4, !tbaa !5
  %33 = add nsw i32 %28, %32
  store i32 %33, ptr %8, align 4, !tbaa !5
  %34 = load i32, ptr %7, align 4, !tbaa !5
  %35 = icmp slt i32 %34, 0
  br i1 %35, label %47, label %36

36:                                               ; preds = %21
  %37 = load i32, ptr %7, align 4, !tbaa !5
  %38 = load i32, ptr @N, align 4, !tbaa !5
  %39 = icmp sge i32 %37, %38
  br i1 %39, label %47, label %40

40:                                               ; preds = %36
  %41 = load i32, ptr %8, align 4, !tbaa !5
  %42 = icmp slt i32 %41, 0
  br i1 %42, label %47, label %43

43:                                               ; preds = %40
  %44 = load i32, ptr %8, align 4, !tbaa !5
  %45 = load i32, ptr @N, align 4, !tbaa !5
  %46 = icmp sge i32 %44, %45
  br i1 %46, label %47, label %48

47:                                               ; preds = %43, %40, %36, %21
  store i32 4, ptr %6, align 4
  br label %61

48:                                               ; preds = %43
  %49 = load i32, ptr %7, align 4, !tbaa !5
  %50 = sext i32 %49 to i64
  %51 = getelementptr inbounds [750 x [750 x i8]], ptr @ok, i64 0, i64 %50
  %52 = load i32, ptr %8, align 4, !tbaa !5
  %53 = sext i32 %52 to i64
  %54 = getelementptr inbounds [750 x i8], ptr %51, i64 0, i64 %53
  %55 = load i8, ptr %54, align 1, !tbaa !9, !range !11, !noundef !12
  %56 = trunc i8 %55 to i1
  br i1 %56, label %58, label %57

57:                                               ; preds = %48
  store i32 4, ptr %6, align 4
  br label %61

58:                                               ; preds = %48
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %9, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %10, ptr noundef nonnull align 4 dereferenceable(4) %7, ptr noundef nonnull align 4 dereferenceable(4) %8)
  %59 = load i64, ptr %9, align 4
  %60 = load i64, ptr %10, align 4
  call void @_ZN3DSUILi562500EE5uniteESt4pairIiiES2_(ptr noundef nonnull align 8 dereferenceable(20250000) @D, i64 %59, i64 %60)
  store i32 0, ptr %6, align 4
  br label %61

61:                                               ; preds = %58, %57, %47
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #3
  %62 = load i32, ptr %6, align 4
  switch i32 %62, label %68 [
    i32 0, label %63
    i32 4, label %64
  ]

63:                                               ; preds = %61
  br label %64

64:                                               ; preds = %63, %61
  %65 = load i32, ptr %5, align 4, !tbaa !5
  %66 = add nsw i32 %65, 1
  store i32 %66, ptr %5, align 4, !tbaa !5
  br label %17, !llvm.loop !13

67:                                               ; preds = %20
  ret void

68:                                               ; preds = %61
  unreachable
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3DSUILi562500EE5uniteESt4pairIiiES2_(ptr noundef nonnull align 8 dereferenceable(20250000), i64, i64) #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.DSU = type { [562500 x i32], [562500 x i32], [562500 x i32], [562500 x %"class.std::vector.3"] }
%"class.std::vector.3" = type { %"struct.std::_Vector_base.4" }
%"struct.std::_Vector_base.4" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl" = type { %"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" }
%"struct.std::_Vector_base<int, std::allocator<int>>::_Vector_impl_data" = type { ptr, ptr, ptr }
%"struct.std::pair" = type { i32, i32 }

@N = external dso_local local_unnamed_addr global i32, align 4
@xd = external dso_local local_unnamed_addr global [4 x i32], align 16
@yd = external dso_local local_unnamed_addr global [4 x i32], align 16
@D = external dso_local global %struct.DSU, align 8
@ok = external dso_local local_unnamed_addr global [750 x [750 x i8]], align 16

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local void @_Z5solveii(i32 noundef %0, i32 noundef %1) local_unnamed_addr #1 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca %"struct.std::pair", align 8
  %8 = alloca %"struct.std::pair", align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  %9 = sext i32 %0 to i64
  %10 = sext i32 %1 to i64
  %11 = getelementptr inbounds [750 x [750 x i8]], ptr @ok, i64 0, i64 %9, i64 %10
  store i8 1, ptr %11, align 1, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %12 = load i32, ptr @xd, align 16, !tbaa !5
  %13 = add nsw i32 %12, %0
  store i32 %13, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %14 = load i32, ptr @yd, align 16, !tbaa !5
  %15 = add nsw i32 %14, %1
  store i32 %15, ptr %6, align 4, !tbaa !5
  %16 = icmp slt i32 %13, 0
  br i1 %16, label %31, label %17

17:                                               ; preds = %2
  %18 = load i32, ptr @N, align 4, !tbaa !5
  %19 = icmp slt i32 %13, %18
  %20 = icmp sgt i32 %15, -1
  %.not = icmp slt i32 %15, %18
  %21 = and i1 %20, %.not
  %or.cond8 = select i1 %19, i1 %21, i1 false
  br i1 %or.cond8, label %22, label %31

22:                                               ; preds = %17
  %23 = zext nneg i32 %13 to i64
  %24 = zext nneg i32 %15 to i64
  %25 = getelementptr inbounds [750 x [750 x i8]], ptr @ok, i64 0, i64 %23, i64 %24
  %26 = load i8, ptr %25, align 1, !tbaa !9, !range !11, !noundef !12
  %27 = trunc nuw i8 %26 to i1
  br i1 %27, label %28, label %31

28:                                               ; preds = %22
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %7, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %8, ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %29 = load i64, ptr %7, align 8
  %30 = load i64, ptr %8, align 8
  call void @_ZN3DSUILi562500EE5uniteESt4pairIiiES2_(ptr noundef nonnull align 8 dereferenceable(20250000) @D, i64 %29, i64 %30)
  %.pre = load i32, ptr %3, align 4, !tbaa !5
  %.pre14 = load i32, ptr %4, align 4, !tbaa !5
  br label %31

31:                                               ; preds = %22, %2, %17, %28
  %32 = phi i32 [ %1, %22 ], [ %1, %2 ], [ %1, %17 ], [ %.pre14, %28 ]
  %33 = phi i32 [ %0, %22 ], [ %0, %2 ], [ %0, %17 ], [ %.pre, %28 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %34 = load i32, ptr getelementptr inbounds (i8, ptr @xd, i64 4), align 4, !tbaa !5
  %35 = add nsw i32 %34, %33
  store i32 %35, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %36 = load i32, ptr getelementptr inbounds (i8, ptr @yd, i64 4), align 4, !tbaa !5
  %37 = add nsw i32 %36, %32
  store i32 %37, ptr %6, align 4, !tbaa !5
  %38 = icmp slt i32 %35, 0
  br i1 %38, label %53, label %39

39:                                               ; preds = %31
  %40 = load i32, ptr @N, align 4, !tbaa !5
  %41 = icmp slt i32 %35, %40
  %42 = icmp sgt i32 %37, -1
  %.not.1 = icmp slt i32 %37, %40
  %43 = and i1 %42, %.not.1
  %or.cond8.1 = select i1 %41, i1 %43, i1 false
  br i1 %or.cond8.1, label %44, label %53

44:                                               ; preds = %39
  %45 = zext nneg i32 %35 to i64
  %46 = zext nneg i32 %37 to i64
  %47 = getelementptr inbounds [750 x [750 x i8]], ptr @ok, i64 0, i64 %45, i64 %46
  %48 = load i8, ptr %47, align 1, !tbaa !9, !range !11, !noundef !12
  %49 = trunc nuw i8 %48 to i1
  br i1 %49, label %50, label %53

50:                                               ; preds = %44
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %7, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %8, ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %51 = load i64, ptr %7, align 8
  %52 = load i64, ptr %8, align 8
  call void @_ZN3DSUILi562500EE5uniteESt4pairIiiES2_(ptr noundef nonnull align 8 dereferenceable(20250000) @D, i64 %51, i64 %52)
  %.pre15 = load i32, ptr %3, align 4, !tbaa !5
  %.pre16 = load i32, ptr %4, align 4, !tbaa !5
  br label %53

53:                                               ; preds = %50, %44, %39, %31
  %54 = phi i32 [ %.pre16, %50 ], [ %32, %44 ], [ %32, %39 ], [ %32, %31 ]
  %55 = phi i32 [ %.pre15, %50 ], [ %33, %44 ], [ %33, %39 ], [ %33, %31 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %56 = load i32, ptr getelementptr inbounds (i8, ptr @xd, i64 8), align 8, !tbaa !5
  %57 = add nsw i32 %56, %55
  store i32 %57, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %58 = load i32, ptr getelementptr inbounds (i8, ptr @yd, i64 8), align 8, !tbaa !5
  %59 = add nsw i32 %58, %54
  store i32 %59, ptr %6, align 4, !tbaa !5
  %60 = icmp slt i32 %57, 0
  br i1 %60, label %75, label %61

61:                                               ; preds = %53
  %62 = load i32, ptr @N, align 4, !tbaa !5
  %63 = icmp slt i32 %57, %62
  %64 = icmp sgt i32 %59, -1
  %.not.2 = icmp slt i32 %59, %62
  %65 = and i1 %64, %.not.2
  %or.cond8.2 = select i1 %63, i1 %65, i1 false
  br i1 %or.cond8.2, label %66, label %75

66:                                               ; preds = %61
  %67 = zext nneg i32 %57 to i64
  %68 = zext nneg i32 %59 to i64
  %69 = getelementptr inbounds [750 x [750 x i8]], ptr @ok, i64 0, i64 %67, i64 %68
  %70 = load i8, ptr %69, align 1, !tbaa !9, !range !11, !noundef !12
  %71 = trunc nuw i8 %70 to i1
  br i1 %71, label %72, label %75

72:                                               ; preds = %66
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %7, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %8, ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %73 = load i64, ptr %7, align 8
  %74 = load i64, ptr %8, align 8
  call void @_ZN3DSUILi562500EE5uniteESt4pairIiiES2_(ptr noundef nonnull align 8 dereferenceable(20250000) @D, i64 %73, i64 %74)
  %.pre17 = load i32, ptr %3, align 4, !tbaa !5
  %.pre18 = load i32, ptr %4, align 4, !tbaa !5
  br label %75

75:                                               ; preds = %72, %66, %61, %53
  %76 = phi i32 [ %.pre18, %72 ], [ %54, %66 ], [ %54, %61 ], [ %54, %53 ]
  %77 = phi i32 [ %.pre17, %72 ], [ %55, %66 ], [ %55, %61 ], [ %55, %53 ]
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
  %78 = load i32, ptr getelementptr inbounds (i8, ptr @xd, i64 12), align 4, !tbaa !5
  %79 = add nsw i32 %78, %77
  store i32 %79, ptr %5, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
  %80 = load i32, ptr getelementptr inbounds (i8, ptr @yd, i64 12), align 4, !tbaa !5
  %81 = add nsw i32 %80, %76
  store i32 %81, ptr %6, align 4, !tbaa !5
  %82 = icmp slt i32 %79, 0
  br i1 %82, label %97, label %83

83:                                               ; preds = %75
  %84 = load i32, ptr @N, align 4, !tbaa !5
  %85 = icmp slt i32 %79, %84
  %86 = icmp sgt i32 %81, -1
  %.not.3 = icmp slt i32 %81, %84
  %87 = and i1 %86, %.not.3
  %or.cond8.3 = select i1 %85, i1 %87, i1 false
  br i1 %or.cond8.3, label %88, label %97

88:                                               ; preds = %83
  %89 = zext nneg i32 %79 to i64
  %90 = zext nneg i32 %81 to i64
  %91 = getelementptr inbounds [750 x [750 x i8]], ptr @ok, i64 0, i64 %89, i64 %90
  %92 = load i8, ptr %91, align 1, !tbaa !9, !range !11, !noundef !12
  %93 = trunc nuw i8 %92 to i1
  br i1 %93, label %94, label %97

94:                                               ; preds = %88
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %7, ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull align 4 dereferenceable(4) %4)
  call void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8) %8, ptr noundef nonnull align 4 dereferenceable(4) %5, ptr noundef nonnull align 4 dereferenceable(4) %6)
  %95 = load i64, ptr %7, align 8
  %96 = load i64, ptr %8, align 8
  call void @_ZN3DSUILi562500EE5uniteESt4pairIiiES2_(ptr noundef nonnull align 8 dereferenceable(20250000) @D, i64 %95, i64 %96)
  br label %97

97:                                               ; preds = %94, %88, %83, %75
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
  ret void
}

; Function Attrs: mustprogress uwtable
declare dso_local void @_ZN3DSUILi562500EE5uniteESt4pairIiiES2_(ptr noundef nonnull align 8 dereferenceable(20250000), i64, i64) local_unnamed_addr #1 align 2

; Function Attrs: mustprogress nounwind uwtable
declare dso_local void @_ZNSt4pairIiiEC2IRiS2_TnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairIS4_S5_EEEbE4typeELb1EEEOS4_OS5_(ptr noundef nonnull align 4 dereferenceable(8), ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #2 align 2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferAlignmentPass,InferFunctionAttrsPass,InstCombinePass,LoopRotatePass,ReassociatePass,SROAPass,SimplifyCFGPass