; LLVM IR from asllop/AppOS :: app (main_net)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [11 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [34 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [42 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [19 x i8], align 1

; Function Attrs: nounwind uwtable
define dso_local void @main(i32 noundef %0, ptr noundef %1) #0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca [20 x i8], align 16
  %6 = alloca i32, align 4
  %7 = alloca i8, align 1
  %8 = alloca i8, align 1
  %9 = alloca ptr, align 8
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  %12 = alloca i32, align 4
  store i32 %0, ptr %3, align 4, !tbaa !5
  store ptr %1, ptr %4, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 20, ptr %5) #3
  call void @console_put_data(i32 noundef 27, i8 noundef signext -80, i32 noundef 2000, i32 noundef 0)
  call void @console_put_string(i8 noundef zeroext 79, ptr noundef @.str, i32 noundef 34, i32 noundef 1)
  %13 = call i32 @serial_init(i8 noundef zeroext 0, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 9600)
  %14 = icmp ne i32 %13, 0
  br i1 %14, label %15, label %16

15:                                               ; preds = %2
  call void @core_fatal(ptr noundef @.str.1)
  br label %16

16:                                               ; preds = %15, %2
  %17 = call i32 @serial_init(i8 noundef zeroext 1, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 9600)
  %18 = icmp ne i32 %17, 0
  br i1 %18, label %19, label %20

19:                                               ; preds = %16
  call void @core_fatal(ptr noundef @.str.2)
  br label %20

20:                                               ; preds = %19, %16
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %21 = call i32 @term_serial_init(i8 noundef zeroext 0)
  store i32 %21, ptr %6, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #3
  store i8 1, ptr %7, align 1, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 1, ptr %8) #3
  %22 = load i8, ptr %7, align 1, !tbaa !11
  %23 = call zeroext i8 @slip_init(i8 noundef zeroext %22)
  store i8 %23, ptr %8, align 1, !tbaa !11
  %24 = load i32, ptr %6, align 4, !tbaa !5
  %25 = icmp eq i32 %24, -1
  br i1 %25, label %26, label %27

26:                                               ; preds = %20
  call void @core_fatal(ptr noundef @.str.3)
  br label %27

27:                                               ; preds = %26, %20
  %28 = load i8, ptr %8, align 1, !tbaa !11
  %29 = zext i8 %28 to i32
  %30 = icmp eq i32 %29, 255
  br i1 %30, label %31, label %32

31:                                               ; preds = %27
  call void @core_fatal(ptr noundef @.str.4)
  br label %32

32:                                               ; preds = %31, %27
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #3
  %33 = call ptr @core_malloc(i64 noundef 500)
  store ptr %33, ptr %9, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %10) #3
  %34 = load ptr, ptr %9, align 8, !tbaa !9
  %35 = call i64 @core_size(ptr noundef %34)
  %36 = trunc i64 %35 to i32
  store i32 %36, ptr %10, align 4, !tbaa !5
  %37 = load i32, ptr %6, align 4, !tbaa !5
  call void @term_puts(i32 noundef %37, ptr noundef @.str.5)
  br label %38

38:                                               ; preds = %68, %32
  br label %39

39:                                               ; preds = %38
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #3
  %40 = load i8, ptr %7, align 1, !tbaa !11
  %41 = load ptr, ptr %9, align 8, !tbaa !9
  %42 = load i32, ptr %10, align 4, !tbaa !5
  %43 = call i32 @slip_recv(i8 noundef zeroext %40, ptr noundef %41, i32 noundef %42)
  store i32 %43, ptr %11, align 4, !tbaa !5
  %44 = load i32, ptr %6, align 4, !tbaa !5
  call void @term_puts(i32 noundef %44, ptr noundef @.str.6)
  %45 = load i32, ptr %6, align 4, !tbaa !5
  %46 = load i32, ptr %11, align 4, !tbaa !5
  %47 = sext i32 %46 to i64
  %48 = getelementptr inbounds [20 x i8], ptr %5, i64 0, i64 0
  %49 = call ptr @itoa(i64 noundef %47, ptr noundef %48, i32 noundef 10)
  call void @term_puts(i32 noundef %45, ptr noundef %49)
  %50 = load i32, ptr %6, align 4, !tbaa !5
  call void @term_puts(i32 noundef %50, ptr noundef @.str.7)
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #3
  %51 = load i8, ptr %8, align 1, !tbaa !11
  %52 = load ptr, ptr %9, align 8, !tbaa !9
  %53 = load i32, ptr %11, align 4, !tbaa !5
  %54 = sext i32 %53 to i64
  %55 = call i32 @ipv4_receive(i8 noundef zeroext %51, ptr noundef %52, i64 noundef %54)
  store i32 %55, ptr %12, align 4, !tbaa !5
  %56 = load i32, ptr %12, align 4, !tbaa !5
  %57 = icmp slt i32 %56, 0
  br i1 %57, label %58, label %66

58:                                               ; preds = %39
  %59 = load i32, ptr %6, align 4, !tbaa !5
  call void @term_puts(i32 noundef %59, ptr noundef @.str.8)
  %60 = load i32, ptr %6, align 4, !tbaa !5
  %61 = load i32, ptr %12, align 4, !tbaa !5
  %62 = sext i32 %61 to i64
  %63 = getelementptr inbounds [20 x i8], ptr %5, i64 0, i64 0
  %64 = call ptr @itoa(i64 noundef %62, ptr noundef %63, i32 noundef 10)
  call void @term_puts(i32 noundef %60, ptr noundef %64)
  %65 = load i32, ptr %6, align 4, !tbaa !5
  call void @term_puts(i32 noundef %65, ptr noundef @.str.7)
  br label %68

66:                                               ; preds = %39
  %67 = load i32, ptr %6, align 4, !tbaa !5
  call void @term_puts(i32 noundef %67, ptr noundef @.str.9)
  br label %68

68:                                               ; preds = %66, %58
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #3
  br label %38
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @console_put_data(i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) #2

declare void @console_put_string(i8 noundef zeroext, ptr noundef, i32 noundef, i32 noundef) #2

declare i32 @serial_init(i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) #2

declare void @core_fatal(ptr noundef) #2

declare i32 @term_serial_init(i8 noundef zeroext) #2

declare zeroext i8 @slip_init(i8 noundef zeroext) #2

declare ptr @core_malloc(i64 noundef) #2

declare i64 @core_size(ptr noundef) #2

declare void @term_puts(i32 noundef, ptr noundef) #2

declare i32 @slip_recv(i8 noundef zeroext, ptr noundef, i32 noundef) #2

declare ptr @itoa(i64 noundef, ptr noundef, i32 noundef) #2

declare i32 @ipv4_receive(i8 noundef zeroext, ptr noundef, i64 noundef) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!7, !7, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = external hidden unnamed_addr constant [11 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [34 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [42 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [20 x i8], align 1
@.str.6 = external hidden unnamed_addr constant [25 x i8], align 1
@.str.7 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.8 = external hidden unnamed_addr constant [9 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [19 x i8], align 1

; Function Attrs: noreturn nounwind uwtable
define dso_local void @main(i32 noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
  %3 = alloca [20 x i8], align 16
  call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %3) #3
  tail call void @console_put_data(i32 noundef 27, i8 noundef signext -80, i32 noundef 2000, i32 noundef 0) #3
  tail call void @console_put_string(i8 noundef zeroext 79, ptr noundef nonnull @.str, i32 noundef 34, i32 noundef 1) #3
  %4 = tail call i32 @serial_init(i8 noundef zeroext 0, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 9600) #3
  %.not = icmp eq i32 %4, 0
  br i1 %.not, label %6, label %5

5:                                                ; preds = %2
  tail call void @core_fatal(ptr noundef nonnull @.str.1) #3
  br label %6

6:                                                ; preds = %5, %2
  %7 = tail call i32 @serial_init(i8 noundef zeroext 1, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 9600) #3
  %.not20 = icmp eq i32 %7, 0
  br i1 %.not20, label %9, label %8

8:                                                ; preds = %6
  tail call void @core_fatal(ptr noundef nonnull @.str.2) #3
  br label %9

9:                                                ; preds = %8, %6
  %10 = tail call i32 @term_serial_init(i8 noundef zeroext 0) #3
  %11 = tail call zeroext i8 @slip_init(i8 noundef zeroext 1) #3
  %12 = icmp eq i32 %10, -1
  br i1 %12, label %13, label %14

13:                                               ; preds = %9
  tail call void @core_fatal(ptr noundef nonnull @.str.3) #3
  br label %14

14:                                               ; preds = %13, %9
  %15 = icmp eq i8 %11, -1
  br i1 %15, label %16, label %17

16:                                               ; preds = %14
  tail call void @core_fatal(ptr noundef nonnull @.str.4) #3
  br label %17

17:                                               ; preds = %16, %14
  %18 = tail call ptr @core_malloc(i64 noundef 500) #3
  %19 = tail call i64 @core_size(ptr noundef %18) #3
  %20 = trunc i64 %19 to i32
  tail call void @term_puts(i32 noundef %10, ptr noundef nonnull @.str.5) #3
  br label %21

21:                                               ; preds = %30, %17
  %22 = call i32 @slip_recv(i8 noundef zeroext 1, ptr noundef %18, i32 noundef %20) #3
  call void @term_puts(i32 noundef %10, ptr noundef nonnull @.str.6) #3
  %23 = sext i32 %22 to i64
  %24 = call ptr @itoa(i64 noundef %23, ptr noundef nonnull %3, i32 noundef 10) #3
  call void @term_puts(i32 noundef %10, ptr noundef %24) #3
  call void @term_puts(i32 noundef %10, ptr noundef nonnull @.str.7) #3
  %25 = call i32 @ipv4_receive(i8 noundef zeroext %11, ptr noundef %18, i64 noundef %23) #3
  %26 = icmp slt i32 %25, 0
  br i1 %26, label %27, label %30

27:                                               ; preds = %21
  call void @term_puts(i32 noundef %10, ptr noundef nonnull @.str.8) #3
  %28 = sext i32 %25 to i64
  %29 = call ptr @itoa(i64 noundef %28, ptr noundef nonnull %3, i32 noundef 10) #3
  call void @term_puts(i32 noundef %10, ptr noundef %29) #3
  br label %30

30:                                               ; preds = %21, %27
  %.str.9.sink = phi ptr [ @.str.7, %27 ], [ @.str.9, %21 ]
  call void @term_puts(i32 noundef %10, ptr noundef nonnull %.str.9.sink) #3
  br label %21
}

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @console_put_data(i32 noundef, i8 noundef signext, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @console_put_string(i8 noundef zeroext, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare i32 @serial_init(i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2

declare void @core_fatal(ptr noundef) local_unnamed_addr #2

declare i32 @term_serial_init(i8 noundef zeroext) local_unnamed_addr #2

declare zeroext i8 @slip_init(i8 noundef zeroext) local_unnamed_addr #2

declare ptr @core_malloc(i64 noundef) local_unnamed_addr #2

declare i64 @core_size(ptr noundef) local_unnamed_addr #2

declare void @term_puts(i32 noundef, ptr noundef) local_unnamed_addr #2

declare i32 @slip_recv(i8 noundef zeroext, ptr noundef, i32 noundef) local_unnamed_addr #2

declare ptr @itoa(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

declare i32 @ipv4_receive(i8 noundef zeroext, ptr noundef, i64 noundef) local_unnamed_addr #2

attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass