; LLVM IR from tfhe/spqlios-arithmetic :: spqlios/cplx (cplx_ifft_ref)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.cplx_ifft_precomp = type { ptr, i64, i64, ptr, ptr }

@__cpu_model = external dso_local global { i32, i32, i32, [1 x i32] }

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @abort() #1

; Function Attrs: nounwind uwtable
declare dso_local void @fill_cplx_ifft_omegas_rec_16(double noundef, ptr noundef, i32 noundef) #2

; Function Attrs: nounwind uwtable
declare dso_local void @cplx_ifft_ref(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local ptr @new_cplx_ifft_precomp(i32 noundef %0, i32 noundef %1) #2 {
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i64, align 8
  %9 = alloca ptr, align 8
  %10 = alloca ptr, align 8
  store i32 %0, ptr %3, align 4, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %11 = load i32, ptr %3, align 4, !tbaa !5
  %12 = mul i32 2, %11
  %13 = zext i32 %12 to i64
  %14 = mul i64 %13, 16
  %15 = call i64 @ceilto64b(i64 noundef %14)
  store i64 %15, ptr %5, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %6) #5
  %16 = load i32, ptr %3, align 4, !tbaa !5
  %17 = zext i32 %16 to i64
  %18 = mul i64 %17, 16
  %19 = call i64 @ceilto64b(i64 noundef %18)
  store i64 %19, ptr %6, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %7) #5
  %20 = load i64, ptr %5, align 8, !tbaa !9
  %21 = add i64 103, %20
  %22 = load i32, ptr %4, align 4, !tbaa !5
  %23 = zext i32 %22 to i64
  %24 = load i64, ptr %6, align 8, !tbaa !9
  %25 = mul i64 %23, %24
  %26 = add i64 %21, %25
  %27 = call noalias ptr @malloc(i64 noundef %26) #6
  store ptr %27, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %28 = load ptr, ptr %7, align 8, !tbaa !11
  %29 = ptrtoint ptr %28 to i64
  %30 = add i64 %29, 40
  %31 = call i64 @ceilto64b(i64 noundef %30)
  store i64 %31, ptr %8, align 8, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %9) #5
  %32 = load ptr, ptr %7, align 8, !tbaa !11
  store ptr %32, ptr %9, align 8, !tbaa !11
  %33 = load i32, ptr %3, align 4, !tbaa !5
  %34 = zext i32 %33 to i64
  %35 = load ptr, ptr %9, align 8, !tbaa !11
  %36 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %35, i32 0, i32 1
  store i64 %34, ptr %36, align 8, !tbaa !13
  %37 = load i64, ptr %6, align 8, !tbaa !9
  %38 = load ptr, ptr %9, align 8, !tbaa !11
  %39 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %38, i32 0, i32 2
  store i64 %37, ptr %39, align 8, !tbaa !15
  %40 = load i64, ptr %8, align 8, !tbaa !9
  %41 = inttoptr i64 %40 to ptr
  %42 = load ptr, ptr %9, align 8, !tbaa !11
  %43 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %42, i32 0, i32 3
  store ptr %41, ptr %43, align 8, !tbaa !16
  %44 = load i64, ptr %8, align 8, !tbaa !9
  %45 = load i64, ptr %5, align 8, !tbaa !9
  %46 = add i64 %44, %45
  %47 = inttoptr i64 %46 to ptr
  %48 = load ptr, ptr %9, align 8, !tbaa !11
  %49 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %48, i32 0, i32 4
  store ptr %47, ptr %49, align 8, !tbaa !17
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %50 = load ptr, ptr %9, align 8, !tbaa !11
  %51 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %50, i32 0, i32 3
  %52 = load ptr, ptr %51, align 8, !tbaa !16
  store ptr %52, ptr %10, align 8, !tbaa !11
  %53 = load i32, ptr %3, align 4, !tbaa !5
  call void @fill_cplx_ifft_omegas_rec_16(double noundef 2.500000e-01, ptr noundef %10, i32 noundef %53)
  %54 = load ptr, ptr %10, align 8, !tbaa !11
  %55 = ptrtoint ptr %54 to i64
  %56 = load i64, ptr %8, align 8, !tbaa !9
  %57 = sub i64 %55, %56
  %58 = load i64, ptr %5, align 8, !tbaa !9
  %59 = icmp ugt i64 %57, %58
  br i1 %59, label %60, label %61

60:                                               ; preds = %2
  call void @abort() #7
  unreachable

61:                                               ; preds = %2
  %62 = load i32, ptr %3, align 4, !tbaa !5
  %63 = icmp ule i32 %62, 4
  br i1 %63, label %64, label %67

64:                                               ; preds = %61
  %65 = load ptr, ptr %9, align 8, !tbaa !11
  %66 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %65, i32 0, i32 0
  store ptr @cplx_ifft_ref, ptr %66, align 8, !tbaa !18
  br label %79

67:                                               ; preds = %61
  %68 = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
  %69 = and i32 %68, 16384
  %70 = icmp eq i32 %69, 16384
  %71 = and i1 true, %70
  br i1 %71, label %72, label %75

72:                                               ; preds = %67
  %73 = load ptr, ptr %9, align 8, !tbaa !11
  %74 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %73, i32 0, i32 0
  store ptr @cplx_ifft_avx2_fma, ptr %74, align 8, !tbaa !18
  br label %78

75:                                               ; preds = %67
  %76 = load ptr, ptr %9, align 8, !tbaa !11
  %77 = getelementptr inbounds %struct.cplx_ifft_precomp, ptr %76, i32 0, i32 0
  store ptr @cplx_ifft_ref, ptr %77, align 8, !tbaa !18
  br label %78

78:                                               ; preds = %75, %72
  br label %79

79:                                               ; preds = %78, %64
  %80 = load ptr, ptr %7, align 8, !tbaa !11
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %9) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %7) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  ret ptr %80
}

declare i64 @ceilto64b(i64 noundef) #3

; Function Attrs: nounwind allocsize(0)
declare noalias ptr @malloc(i64 noundef) #4

declare void @cplx_ifft_avx2_fma(ptr noundef, ptr noundef) #3

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { nounwind allocsize(0) }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !10, i64 8}
!14 = !{!"cplx_ifft_precomp", !12, i64 0, !10, i64 8, !10, i64 16, !12, i64 24, !12, i64 32}
!15 = !{!14, !10, i64 16}
!16 = !{!14, !12, i64 24}
!17 = !{!14, !12, i64 32}
!18 = !{!14, !12, i64 0}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@__cpu_model = external dso_local local_unnamed_addr global { i32, i32, i32, [1 x i32] }

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: noreturn nounwind
declare void @abort() local_unnamed_addr #1

; Function Attrs: nounwind uwtable
declare dso_local void @fill_cplx_ifft_omegas_rec_16(double noundef, ptr noundef, i32 noundef) local_unnamed_addr #2

; Function Attrs: nounwind uwtable
declare dso_local void @cplx_ifft_ref(ptr noundef, ptr noundef) #2

; Function Attrs: nounwind uwtable
define dso_local noundef ptr @new_cplx_ifft_precomp(i32 noundef %0, i32 noundef %1) local_unnamed_addr #2 {
  %3 = alloca ptr, align 8
  %4 = shl i32 %0, 1
  %5 = zext i32 %4 to i64
  %6 = shl nuw nsw i64 %5, 4
  %7 = tail call i64 @ceilto64b(i64 noundef %6) #5
  %8 = zext i32 %0 to i64
  %9 = shl nuw nsw i64 %8, 4
  %10 = tail call i64 @ceilto64b(i64 noundef %9) #5
  %11 = add i64 %7, 103
  %12 = zext i32 %1 to i64
  %13 = mul i64 %10, %12
  %14 = add i64 %11, %13
  %15 = tail call noalias ptr @malloc(i64 noundef %14) #6
  %16 = ptrtoint ptr %15 to i64
  %17 = add i64 %16, 40
  %18 = tail call i64 @ceilto64b(i64 noundef %17) #5
  %19 = getelementptr inbounds i8, ptr %15, i64 8
  store i64 %8, ptr %19, align 8, !tbaa !5
  %20 = getelementptr inbounds i8, ptr %15, i64 16
  store i64 %10, ptr %20, align 8, !tbaa !11
  %21 = inttoptr i64 %18 to ptr
  %22 = getelementptr inbounds i8, ptr %15, i64 24
  store ptr %21, ptr %22, align 8, !tbaa !12
  %23 = add i64 %18, %7
  %24 = inttoptr i64 %23 to ptr
  %25 = getelementptr inbounds i8, ptr %15, i64 32
  store ptr %24, ptr %25, align 8, !tbaa !13
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #5
  store ptr %21, ptr %3, align 8, !tbaa !14
  call void @fill_cplx_ifft_omegas_rec_16(double noundef 2.500000e-01, ptr noundef nonnull %3, i32 noundef %0)
  %26 = load ptr, ptr %3, align 8, !tbaa !14
  %27 = ptrtoint ptr %26 to i64
  %28 = sub i64 %27, %18
  %29 = icmp ugt i64 %28, %7
  br i1 %29, label %30, label %31

30:                                               ; preds = %2
  call void @abort() #7
  unreachable

31:                                               ; preds = %2
  %32 = icmp ult i32 %0, 5
  %33 = load i32, ptr getelementptr inbounds (i8, ptr @__cpu_model, i64 12), align 4
  %34 = and i32 %33, 16384
  %.not = icmp eq i32 %34, 0
  %35 = select i1 %32, i1 true, i1 %.not
  %cplx_ifft_avx2_fma.sink = select i1 %35, ptr @cplx_ifft_ref, ptr @cplx_ifft_avx2_fma
  store ptr %cplx_ifft_avx2_fma.sink, ptr %15, align 8, !tbaa !15
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #5
  ret ptr %15
}

declare i64 @ceilto64b(i64 noundef) local_unnamed_addr #3

; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #4

declare void @cplx_ifft_avx2_fma(ptr noundef, ptr noundef) #3

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { noreturn nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }
attributes #6 = { nounwind allocsize(0) }
attributes #7 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"cplx_ifft_precomp", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !7, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 16}
!12 = !{!6, !7, i64 24}
!13 = !{!6, !7, i64 32}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !7, i64 0}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass