; LLVM IR from div-bargali/Data-Structures-and-Algorithms :: C++/Algorithms/Sorting-Algorithms/Heapsort/Heapsort.ll (Z8heapSortPii)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7heapifyPiii(ptr noundef, i32 noundef, i32 noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8heapSortPii(ptr noundef %0, i32 noundef %1) #0 {
  %3 = alloca ptr, align 8
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store ptr %0, ptr %3, align 8, !tbaa !5
  store i32 %1, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %5) #3
  %7 = load i32, ptr %4, align 4, !tbaa !9
  %8 = sdiv i32 %7, 2
  %9 = sub nsw i32 %8, 1
  store i32 %9, ptr %5, align 4, !tbaa !9
  br label %10

10:                                               ; preds = %18, %2
  %11 = load i32, ptr %5, align 4, !tbaa !9
  %12 = icmp sge i32 %11, 0
  br i1 %12, label %14, label %13

13:                                               ; preds = %10
  call void @llvm.lifetime.end.p0(i64 4, ptr %5) #3
  br label %21

14:                                               ; preds = %10
  %15 = load ptr, ptr %3, align 8, !tbaa !5
  %16 = load i32, ptr %4, align 4, !tbaa !9
  %17 = load i32, ptr %5, align 4, !tbaa !9
  call void @_Z7heapifyPiii(ptr noundef %15, i32 noundef %16, i32 noundef %17)
  br label %18

18:                                               ; preds = %14
  %19 = load i32, ptr %5, align 4, !tbaa !9
  %20 = add nsw i32 %19, -1
  store i32 %20, ptr %5, align 4, !tbaa !9
  br label %10, !llvm.loop !11

21:                                               ; preds = %13
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #3
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = sub nsw i32 %22, 1
  store i32 %23, ptr %6, align 4, !tbaa !9
  br label %24

24:                                               ; preds = %37, %21
  %25 = load i32, ptr %6, align 4, !tbaa !9
  %26 = icmp sgt i32 %25, 0
  br i1 %26, label %28, label %27

27:                                               ; preds = %24
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #3
  br label %40

28:                                               ; preds = %24
  %29 = load ptr, ptr %3, align 8, !tbaa !5
  %30 = getelementptr inbounds i32, ptr %29, i64 0
  %31 = load ptr, ptr %3, align 8, !tbaa !5
  %32 = load i32, ptr %6, align 4, !tbaa !9
  %33 = sext i32 %32 to i64
  %34 = getelementptr inbounds i32, ptr %31, i64 %33
  call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %30, ptr noundef nonnull align 4 dereferenceable(4) %34) #3
  %35 = load ptr, ptr %3, align 8, !tbaa !5
  %36 = load i32, ptr %6, align 4, !tbaa !9
  call void @_Z7heapifyPiii(ptr noundef %35, i32 noundef %36, i32 noundef 0)
  br label %37

37:                                               ; preds = %28
  %38 = load i32, ptr %6, align 4, !tbaa !9
  %39 = add nsw i32 %38, -1
  store i32 %39, ptr %6, align 4, !tbaa !9
  br label %24, !llvm.loop !13

40:                                               ; preds = %27
  ret void
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress uwtable
declare dso_local void @_Z7heapifyPiii(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef nonnull align 4 dereferenceable(4)) local_unnamed_addr #1

; Function Attrs: mustprogress uwtable
define dso_local void @_Z8heapSortPii(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
  %3 = icmp sgt i32 %1, 1
  br i1 %3, label %.lr.ph.preheader, label %._crit_edge

.lr.ph.preheader:                                 ; preds = %2
  %4 = lshr i32 %1, 1
  br label %.lr.ph

.preheader:                                       ; preds = %.lr.ph
  br i1 %3, label %.lr.ph16.preheader, label %._crit_edge

.lr.ph16.preheader:                               ; preds = %.preheader
  %5 = zext nneg i32 %1 to i64
  br label %.lr.ph16

.lr.ph:                                           ; preds = %.lr.ph.preheader, %.lr.ph
  %.013.in14 = phi i32 [ %.013, %.lr.ph ], [ %4, %.lr.ph.preheader ]
  %.013 = add nsw i32 %.013.in14, -1
  tail call void @_Z7heapifyPiii(ptr noundef %0, i32 noundef %1, i32 noundef %.013)
  %6 = icmp ugt i32 %.013.in14, 1
  br i1 %6, label %.lr.ph, label %.preheader, !llvm.loop !5

._crit_edge:                                      ; preds = %.lr.ph16, %2, %.preheader
  ret void

.lr.ph16:                                         ; preds = %.lr.ph16.preheader, %.lr.ph16
  %indvars.iv = phi i64 [ %5, %.lr.ph16.preheader ], [ %indvars.iv.next, %.lr.ph16 ]
  %indvars.iv.next = add nsw i64 %indvars.iv, -1
  %7 = getelementptr inbounds i32, ptr %0, i64 %indvars.iv.next
  tail call void @_ZSt4swapIiENSt9enable_ifIXsr6__and_ISt6__not_ISt15__is_tuple_likeIT_EESt21is_move_constructibleIS3_ESt18is_move_assignableIS3_EEE5valueEvE4typeERS3_SC_(ptr noundef nonnull align 4 dereferenceable(4) %0, ptr noundef nonnull align 4 dereferenceable(4) %7) #2
  %8 = trunc nuw nsw i64 %indvars.iv.next to i32
  tail call void @_Z7heapifyPiii(ptr noundef nonnull %0, i32 noundef %8, i32 noundef 0)
  %9 = icmp ugt i64 %indvars.iv, 2
  br i1 %9, label %.lr.ph16, label %._crit_edge, !llvm.loop !7
}

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,SROAPass,SimplifyCFGPass,TailCallElimPass