; LLVM IR from Dovyski/opengl-demos :: libs/glm-0.9.9.3/test/core/core_func_common.ll (ZN4sign15perf_linear_calEm)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.18 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [37 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [38 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [38 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [37 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign8sign_cmpIiEET_S1_(i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign7sign_ifIiEET_S1_(i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign9sign_alu1IiEET_S1_(i32 noundef) #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign9sign_alu2Ei(i32 noundef) #1

; Function Attrs: nounwind
declare i64 @clock() #2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign8sign_subIiEET_S1_(i32 noundef) #1

declare i32 @printf(ptr noundef, ...) #3

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN4sign15perf_linear_calEm(i64 noundef %0) #4 {
  %2 = alloca i64, align 8
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i64, align 8
  %9 = alloca i32, align 4
  %10 = alloca i64, align 8
  %11 = alloca i32, align 4
  %12 = alloca i64, align 8
  %13 = alloca i32, align 4
  %14 = alloca i64, align 8
  %15 = alloca i32, align 4
  %16 = alloca i64, align 8
  store i64 %0, ptr %2, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
  store i32 0, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #5
  %17 = load i64, ptr %2, align 8, !tbaa !5
  %18 = trunc i64 %17 to i32
  store i32 %18, ptr %4, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 8, ptr %5) #5
  %19 = call i64 @clock() #5
  store i64 %19, ptr %5, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #5
  store i32 0, ptr %6, align 4, !tbaa !9
  call void @llvm.lifetime.start.p0(i64 4, ptr %7) #5
  store i32 1, ptr %7, align 4, !tbaa !9
  br label %20

20:                                               ; preds = %30, %1
  %21 = load i32, ptr %7, align 4, !tbaa !9
  %22 = load i32, ptr %4, align 4, !tbaa !9
  %23 = icmp slt i32 %21, %22
  br i1 %23, label %25, label %24

24:                                               ; preds = %20
  call void @llvm.lifetime.end.p0(i64 4, ptr %7) #5
  br label %33

25:                                               ; preds = %20
  %26 = load i32, ptr %7, align 4, !tbaa !9
  %27 = call noundef i32 @_ZN4sign8sign_cmpIiEET_S1_(i32 noundef %26)
  %28 = load i32, ptr %6, align 4, !tbaa !9
  %29 = add nsw i32 %28, %27
  store i32 %29, ptr %6, align 4, !tbaa !9
  br label %30

30:                                               ; preds = %25
  %31 = load i32, ptr %7, align 4, !tbaa !9
  %32 = add nsw i32 %31, 1
  store i32 %32, ptr %7, align 4, !tbaa !9
  br label %20, !llvm.loop !11

33:                                               ; preds = %24
  call void @llvm.lifetime.start.p0(i64 8, ptr %8) #5
  %34 = call i64 @clock() #5
  store i64 %34, ptr %8, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %9) #5
  store i32 1, ptr %9, align 4, !tbaa !9
  br label %35

35:                                               ; preds = %45, %33
  %36 = load i32, ptr %9, align 4, !tbaa !9
  %37 = load i32, ptr %4, align 4, !tbaa !9
  %38 = icmp slt i32 %36, %37
  br i1 %38, label %40, label %39

39:                                               ; preds = %35
  call void @llvm.lifetime.end.p0(i64 4, ptr %9) #5
  br label %48

40:                                               ; preds = %35
  %41 = load i32, ptr %9, align 4, !tbaa !9
  %42 = call noundef i32 @_ZN4sign7sign_ifIiEET_S1_(i32 noundef %41)
  %43 = load i32, ptr %6, align 4, !tbaa !9
  %44 = add nsw i32 %43, %42
  store i32 %44, ptr %6, align 4, !tbaa !9
  br label %45

45:                                               ; preds = %40
  %46 = load i32, ptr %9, align 4, !tbaa !9
  %47 = add nsw i32 %46, 1
  store i32 %47, ptr %9, align 4, !tbaa !9
  br label %35, !llvm.loop !13

48:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 8, ptr %10) #5
  %49 = call i64 @clock() #5
  store i64 %49, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %11) #5
  store i32 1, ptr %11, align 4, !tbaa !9
  br label %50

50:                                               ; preds = %60, %48
  %51 = load i32, ptr %11, align 4, !tbaa !9
  %52 = load i32, ptr %4, align 4, !tbaa !9
  %53 = icmp slt i32 %51, %52
  br i1 %53, label %55, label %54

54:                                               ; preds = %50
  call void @llvm.lifetime.end.p0(i64 4, ptr %11) #5
  br label %63

55:                                               ; preds = %50
  %56 = load i32, ptr %11, align 4, !tbaa !9
  %57 = call noundef i32 @_ZN4sign9sign_alu1IiEET_S1_(i32 noundef %56)
  %58 = load i32, ptr %6, align 4, !tbaa !9
  %59 = add nsw i32 %58, %57
  store i32 %59, ptr %6, align 4, !tbaa !9
  br label %60

60:                                               ; preds = %55
  %61 = load i32, ptr %11, align 4, !tbaa !9
  %62 = add nsw i32 %61, 1
  store i32 %62, ptr %11, align 4, !tbaa !9
  br label %50, !llvm.loop !14

63:                                               ; preds = %54
  call void @llvm.lifetime.start.p0(i64 8, ptr %12) #5
  %64 = call i64 @clock() #5
  store i64 %64, ptr %12, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %13) #5
  store i32 1, ptr %13, align 4, !tbaa !9
  br label %65

65:                                               ; preds = %75, %63
  %66 = load i32, ptr %13, align 4, !tbaa !9
  %67 = load i32, ptr %4, align 4, !tbaa !9
  %68 = icmp slt i32 %66, %67
  br i1 %68, label %70, label %69

69:                                               ; preds = %65
  call void @llvm.lifetime.end.p0(i64 4, ptr %13) #5
  br label %78

70:                                               ; preds = %65
  %71 = load i32, ptr %13, align 4, !tbaa !9
  %72 = call noundef i32 @_ZN4sign9sign_alu2Ei(i32 noundef %71)
  %73 = load i32, ptr %6, align 4, !tbaa !9
  %74 = add nsw i32 %73, %72
  store i32 %74, ptr %6, align 4, !tbaa !9
  br label %75

75:                                               ; preds = %70
  %76 = load i32, ptr %13, align 4, !tbaa !9
  %77 = add nsw i32 %76, 1
  store i32 %77, ptr %13, align 4, !tbaa !9
  br label %65, !llvm.loop !15

78:                                               ; preds = %69
  call void @llvm.lifetime.start.p0(i64 8, ptr %14) #5
  %79 = call i64 @clock() #5
  store i64 %79, ptr %14, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %15) #5
  store i32 1, ptr %15, align 4, !tbaa !9
  br label %80

80:                                               ; preds = %90, %78
  %81 = load i32, ptr %15, align 4, !tbaa !9
  %82 = load i32, ptr %4, align 4, !tbaa !9
  %83 = icmp slt i32 %81, %82
  br i1 %83, label %85, label %84

84:                                               ; preds = %80
  call void @llvm.lifetime.end.p0(i64 4, ptr %15) #5
  br label %93

85:                                               ; preds = %80
  %86 = load i32, ptr %15, align 4, !tbaa !9
  %87 = call noundef i32 @_ZN4sign8sign_subIiEET_S1_(i32 noundef %86)
  %88 = load i32, ptr %6, align 4, !tbaa !9
  %89 = add nsw i32 %88, %87
  store i32 %89, ptr %6, align 4, !tbaa !9
  br label %90

90:                                               ; preds = %85
  %91 = load i32, ptr %15, align 4, !tbaa !9
  %92 = add nsw i32 %91, 1
  store i32 %92, ptr %15, align 4, !tbaa !9
  br label %80, !llvm.loop !16

93:                                               ; preds = %84
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #5
  %94 = call i64 @clock() #5
  store i64 %94, ptr %16, align 8, !tbaa !5
  %95 = load i32, ptr %6, align 4, !tbaa !9
  %96 = call i32 (ptr, ...) @printf(ptr noundef @.str.18, i32 noundef %95)
  %97 = load i64, ptr %8, align 8, !tbaa !5
  %98 = load i64, ptr %5, align 8, !tbaa !5
  %99 = sub nsw i64 %97, %98
  %100 = trunc i64 %99 to i32
  %101 = call i32 (ptr, ...) @printf(ptr noundef @.str.19, i32 noundef %100)
  %102 = load i64, ptr %10, align 8, !tbaa !5
  %103 = load i64, ptr %8, align 8, !tbaa !5
  %104 = sub nsw i64 %102, %103
  %105 = trunc i64 %104 to i32
  %106 = call i32 (ptr, ...) @printf(ptr noundef @.str.20, i32 noundef %105)
  %107 = load i64, ptr %12, align 8, !tbaa !5
  %108 = load i64, ptr %10, align 8, !tbaa !5
  %109 = sub nsw i64 %107, %108
  %110 = trunc i64 %109 to i32
  %111 = call i32 (ptr, ...) @printf(ptr noundef @.str.21, i32 noundef %110)
  %112 = load i64, ptr %14, align 8, !tbaa !5
  %113 = load i64, ptr %12, align 8, !tbaa !5
  %114 = sub nsw i64 %112, %113
  %115 = trunc i64 %114 to i32
  %116 = call i32 (ptr, ...) @printf(ptr noundef @.str.22, i32 noundef %115)
  %117 = load i64, ptr %16, align 8, !tbaa !5
  %118 = load i64, ptr %14, align 8, !tbaa !5
  %119 = sub nsw i64 %117, %118
  %120 = trunc i64 %119 to i32
  %121 = call i32 (ptr, ...) @printf(ptr noundef @.str.23, i32 noundef %120)
  %122 = load i32, ptr %3, align 4, !tbaa !9
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %14) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %12) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %10) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %8) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #5
  call void @llvm.lifetime.end.p0(i64 8, ptr %5) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #5
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
  ret i32 %122
}

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = distinct !{!13, !12}
!14 = distinct !{!14, !12}
!15 = distinct !{!15, !12}
!16 = distinct !{!16, !12}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str.18 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.19 = external hidden unnamed_addr constant [37 x i8], align 1
@.str.20 = external hidden unnamed_addr constant [36 x i8], align 1
@.str.21 = external hidden unnamed_addr constant [38 x i8], align 1
@.str.22 = external hidden unnamed_addr constant [38 x i8], align 1
@.str.23 = external hidden unnamed_addr constant [37 x i8], align 1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign8sign_cmpIiEET_S1_(i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign7sign_ifIiEET_S1_(i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign9sign_alu1IiEET_S1_(i32 noundef) local_unnamed_addr #0

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign9sign_alu2Ei(i32 noundef) local_unnamed_addr #0

; Function Attrs: nounwind
declare i64 @clock() local_unnamed_addr #1

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN4sign8sign_subIiEET_S1_(i32 noundef) local_unnamed_addr #0

; Function Attrs: nofree nounwind
declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #2

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZN4sign15perf_linear_calEm(i64 noundef %0) local_unnamed_addr #3 {
  %2 = trunc i64 %0 to i32
  %3 = tail call i64 @clock() #4
  %4 = icmp sgt i32 %2, 1
  br i1 %4, label %.lr.ph, label %._crit_edge.thread

._crit_edge.thread:                               ; preds = %1
  %5 = tail call i64 @clock() #4
  br label %._crit_edge50.thread

._crit_edge:                                      ; preds = %.lr.ph
  %6 = tail call i64 @clock() #4
  br i1 %4, label %.lr.ph49, label %._crit_edge50.thread

.lr.ph:                                           ; preds = %1, %.lr.ph
  %.045 = phi i32 [ %8, %.lr.ph ], [ 0, %1 ]
  %.03944 = phi i32 [ %9, %.lr.ph ], [ 1, %1 ]
  %7 = tail call noundef i32 @_ZN4sign8sign_cmpIiEET_S1_(i32 noundef %.03944)
  %8 = add nsw i32 %7, %.045
  %9 = add nuw nsw i32 %.03944, 1
  %exitcond.not = icmp eq i32 %9, %2
  br i1 %exitcond.not, label %._crit_edge, label %.lr.ph, !llvm.loop !5

._crit_edge50.thread:                             ; preds = %._crit_edge.thread, %._crit_edge
  %.ph = phi i64 [ %5, %._crit_edge.thread ], [ %6, %._crit_edge ]
  %.1.lcssa.ph = phi i32 [ 0, %._crit_edge.thread ], [ %8, %._crit_edge ]
  %10 = tail call i64 @clock() #4
  br label %._crit_edge56.thread

._crit_edge50:                                    ; preds = %.lr.ph49
  %11 = tail call i64 @clock() #4
  br i1 %4, label %.lr.ph55, label %._crit_edge56.thread

.lr.ph49:                                         ; preds = %._crit_edge, %.lr.ph49
  %.147 = phi i32 [ %13, %.lr.ph49 ], [ %8, %._crit_edge ]
  %.04146 = phi i32 [ %14, %.lr.ph49 ], [ 1, %._crit_edge ]
  %12 = tail call noundef i32 @_ZN4sign7sign_ifIiEET_S1_(i32 noundef %.04146)
  %13 = add nsw i32 %12, %.147
  %14 = add nuw nsw i32 %.04146, 1
  %exitcond74.not = icmp eq i32 %14, %2
  br i1 %exitcond74.not, label %._crit_edge50, label %.lr.ph49, !llvm.loop !7

._crit_edge56.thread:                             ; preds = %._crit_edge50.thread, %._crit_edge50
  %.ph80 = phi i64 [ %10, %._crit_edge50.thread ], [ %11, %._crit_edge50 ]
  %.ph81 = phi i64 [ %.ph, %._crit_edge50.thread ], [ %6, %._crit_edge50 ]
  %.2.lcssa.ph = phi i32 [ %.1.lcssa.ph, %._crit_edge50.thread ], [ %13, %._crit_edge50 ]
  %15 = tail call i64 @clock() #4
  br label %._crit_edge62.thread

._crit_edge56:                                    ; preds = %.lr.ph55
  %16 = tail call i64 @clock() #4
  br i1 %4, label %.lr.ph61, label %._crit_edge62.thread

.lr.ph55:                                         ; preds = %._crit_edge50, %.lr.ph55
  %.253 = phi i32 [ %18, %.lr.ph55 ], [ %13, %._crit_edge50 ]
  %.04252 = phi i32 [ %19, %.lr.ph55 ], [ 1, %._crit_edge50 ]
  %17 = tail call noundef i32 @_ZN4sign9sign_alu1IiEET_S1_(i32 noundef %.04252)
  %18 = add nsw i32 %17, %.253
  %19 = add nuw nsw i32 %.04252, 1
  %exitcond75.not = icmp eq i32 %19, %2
  br i1 %exitcond75.not, label %._crit_edge56, label %.lr.ph55, !llvm.loop !8

._crit_edge62.thread:                             ; preds = %._crit_edge56.thread, %._crit_edge56
  %.ph83 = phi i64 [ %15, %._crit_edge56.thread ], [ %16, %._crit_edge56 ]
  %.ph84 = phi i64 [ %.ph81, %._crit_edge56.thread ], [ %6, %._crit_edge56 ]
  %.ph85 = phi i64 [ %.ph80, %._crit_edge56.thread ], [ %11, %._crit_edge56 ]
  %.3.lcssa.ph = phi i32 [ %.2.lcssa.ph, %._crit_edge56.thread ], [ %18, %._crit_edge56 ]
  %20 = tail call i64 @clock() #4
  br label %._crit_edge68

._crit_edge62:                                    ; preds = %.lr.ph61
  %21 = tail call i64 @clock() #4
  br i1 %4, label %.lr.ph67, label %._crit_edge68

.lr.ph61:                                         ; preds = %._crit_edge56, %.lr.ph61
  %.359 = phi i32 [ %23, %.lr.ph61 ], [ %18, %._crit_edge56 ]
  %.04058 = phi i32 [ %24, %.lr.ph61 ], [ 1, %._crit_edge56 ]
  %22 = tail call noundef i32 @_ZN4sign9sign_alu2Ei(i32 noundef %.04058)
  %23 = add nsw i32 %22, %.359
  %24 = add nuw nsw i32 %.04058, 1
  %exitcond76.not = icmp eq i32 %24, %2
  br i1 %exitcond76.not, label %._crit_edge62, label %.lr.ph61, !llvm.loop !9

._crit_edge68:                                    ; preds = %.lr.ph67, %._crit_edge62.thread, %._crit_edge62
  %25 = phi i64 [ %21, %._crit_edge62 ], [ %20, %._crit_edge62.thread ], [ %21, %.lr.ph67 ]
  %26 = phi i64 [ %11, %._crit_edge62 ], [ %.ph85, %._crit_edge62.thread ], [ %11, %.lr.ph67 ]
  %27 = phi i64 [ %6, %._crit_edge62 ], [ %.ph84, %._crit_edge62.thread ], [ %6, %.lr.ph67 ]
  %28 = phi i64 [ %16, %._crit_edge62 ], [ %.ph83, %._crit_edge62.thread ], [ %16, %.lr.ph67 ]
  %.4.lcssa = phi i32 [ %23, %._crit_edge62 ], [ %.3.lcssa.ph, %._crit_edge62.thread ], [ %47, %.lr.ph67 ]
  %29 = tail call i64 @clock() #4
  %30 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.18, i32 noundef %.4.lcssa)
  %31 = sub nsw i64 %27, %3
  %32 = trunc i64 %31 to i32
  %33 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.19, i32 noundef %32)
  %34 = sub nsw i64 %26, %27
  %35 = trunc i64 %34 to i32
  %36 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.20, i32 noundef %35)
  %37 = sub nsw i64 %28, %26
  %38 = trunc i64 %37 to i32
  %39 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.21, i32 noundef %38)
  %40 = sub nsw i64 %25, %28
  %41 = trunc i64 %40 to i32
  %42 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.22, i32 noundef %41)
  %43 = sub nsw i64 %29, %25
  %44 = trunc i64 %43 to i32
  %45 = tail call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.23, i32 noundef %44)
  ret i32 0

.lr.ph67:                                         ; preds = %._crit_edge62, %.lr.ph67
  %.465 = phi i32 [ %47, %.lr.ph67 ], [ %23, %._crit_edge62 ]
  %.03864 = phi i32 [ %48, %.lr.ph67 ], [ 1, %._crit_edge62 ]
  %46 = tail call noundef i32 @_ZN4sign8sign_subIiEET_S1_(i32 noundef %.03864)
  %47 = add nsw i32 %46, %.465
  %48 = add nuw nsw i32 %.03864, 1
  %exitcond77.not = icmp eq i32 %48, %2
  br i1 %exitcond77.not, label %._crit_edge68, label %.lr.ph67, !llvm.loop !10
}

attributes #0 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = distinct !{!7, !6}
!8 = distinct !{!8, !6}
!9 = distinct !{!9, !6}
!10 = distinct !{!10, !6}


; Effective O3 passes: CorrelatedValuePropagationPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass