; LLVM IR from XiaoMi/mace :: micro/ops/utils/activation.ll (ZN5micro3ops10Activation22StringToActivationTypeEPKc)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }

@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro3ops10Activation22StringToActivationTypeEPKc(ptr noundef nonnull align 4 dereferenceable(12) %0, ptr noundef %1) #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca i32, align 4
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca %"class.micro::base::Logger", align 4
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  %9 = load ptr, ptr %4, align 8
  %10 = load ptr, ptr %5, align 8, !tbaa !5
  %11 = call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %10, ptr noundef @.str.9)
  %12 = icmp eq i32 %11, 0
  br i1 %12, label %13, label %14

13:                                               ; preds = %2
  store i32 1, ptr %3, align 4
  br label %61

14:                                               ; preds = %2
  %15 = load ptr, ptr %5, align 8, !tbaa !5
  %16 = call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %15, ptr noundef @.str.10)
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %18, label %19

18:                                               ; preds = %14
  store i32 2, ptr %3, align 4
  br label %61

19:                                               ; preds = %14
  %20 = load ptr, ptr %5, align 8, !tbaa !5
  %21 = call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %20, ptr noundef @.str.11)
  %22 = icmp eq i32 %21, 0
  br i1 %22, label %23, label %24

23:                                               ; preds = %19
  store i32 3, ptr %3, align 4
  br label %61

24:                                               ; preds = %19
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %25, ptr noundef @.str.12)
  %27 = icmp eq i32 %26, 0
  br i1 %27, label %28, label %29

28:                                               ; preds = %24
  store i32 4, ptr %3, align 4
  br label %61

29:                                               ; preds = %24
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %30, ptr noundef @.str.13)
  %32 = icmp eq i32 %31, 0
  br i1 %32, label %33, label %34

33:                                               ; preds = %29
  store i32 5, ptr %3, align 4
  br label %61

34:                                               ; preds = %29
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %35, ptr noundef @.str.1)
  %37 = icmp eq i32 %36, 0
  br i1 %37, label %38, label %39

38:                                               ; preds = %34
  store i32 0, ptr %3, align 4
  br label %61

39:                                               ; preds = %34
  %40 = load ptr, ptr %5, align 8, !tbaa !5
  %41 = call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %40, ptr noundef @.str.14)
  %42 = icmp eq i32 %41, 0
  br i1 %42, label %43, label %44

43:                                               ; preds = %39
  store i32 6, ptr %3, align 4
  br label %61

44:                                               ; preds = %39
  call void @llvm.lifetime.start.p0(i64 4, ptr %6) #4
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef @.str.4, i32 noundef 119, i32 noundef 4)
  %45 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef @.str.15)
          to label %46 unwind label %50

46:                                               ; preds = %44
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %45, ptr noundef %47)
          to label %49 unwind label %50

49:                                               ; preds = %46
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %54

50:                                               ; preds = %46, %44
  %51 = landingpad { ptr, i32 }
          cleanup
  %52 = extractvalue { ptr, i32 } %51, 0
  store ptr %52, ptr %7, align 8
  %53 = extractvalue { ptr, i32 } %51, 1
  store i32 %53, ptr %8, align 4
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %6) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr %6) #4
  br label %63

54:                                               ; preds = %49
  br label %55

55:                                               ; preds = %54
  br label %56

56:                                               ; preds = %55
  br label %57

57:                                               ; preds = %56
  br label %58

58:                                               ; preds = %57
  br label %59

59:                                               ; preds = %58
  br label %60

60:                                               ; preds = %59
  store i32 0, ptr %3, align 4
  br label %61

61:                                               ; preds = %60, %43, %38, %33, %28, %23, %18, %13
  %62 = load i32, ptr %3, align 4
  ret i32 %62

63:                                               ; preds = %50
  %64 = load ptr, ptr %7, align 8
  %65 = load i32, ptr %8, align 4
  %66 = insertvalue { ptr, i32 } poison, ptr %64, 0
  %67 = insertvalue { ptr, i32 } %66, i32 %65, 1
  resume { ptr, i32 } %67
}

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #2

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3

declare noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef, ptr noundef) #2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }

@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [75 x i8], align 1
@.str.9 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.10 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.11 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.12 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.13 = external hidden unnamed_addr constant [8 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [10 x i8], align 1
@.str.15 = external hidden unnamed_addr constant [26 x i8], align 1

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress uwtable
define dso_local noundef range(i32 0, 7) i32 @_ZN5micro3ops10Activation22StringToActivationTypeEPKc(ptr nocapture noundef nonnull readnone align 4 dereferenceable(12) %0, ptr noundef %1) local_unnamed_addr #1 align 2 personality ptr @__gxx_personality_v0 {
  %3 = alloca %"class.micro::base::Logger", align 4
  %4 = tail call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %1, ptr noundef nonnull @.str.9)
  %5 = icmp eq i32 %4, 0
  br i1 %5, label %31, label %6

6:                                                ; preds = %2
  %7 = tail call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %1, ptr noundef nonnull @.str.10)
  %8 = icmp eq i32 %7, 0
  br i1 %8, label %31, label %9

9:                                                ; preds = %6
  %10 = tail call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %1, ptr noundef nonnull @.str.11)
  %11 = icmp eq i32 %10, 0
  br i1 %11, label %31, label %12

12:                                               ; preds = %9
  %13 = tail call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %1, ptr noundef nonnull @.str.12)
  %14 = icmp eq i32 %13, 0
  br i1 %14, label %31, label %15

15:                                               ; preds = %12
  %16 = tail call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %1, ptr noundef nonnull @.str.13)
  %17 = icmp eq i32 %16, 0
  br i1 %17, label %31, label %18

18:                                               ; preds = %15
  %19 = tail call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %1, ptr noundef nonnull @.str.1)
  %20 = icmp eq i32 %19, 0
  br i1 %20, label %31, label %21

21:                                               ; preds = %18
  %22 = tail call noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef %1, ptr noundef nonnull @.str.14)
  %23 = icmp eq i32 %22, 0
  br i1 %23, label %31, label %24

24:                                               ; preds = %21
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull @.str.4, i32 noundef 119, i32 noundef 4)
  %25 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %3, ptr noundef nonnull @.str.15)
          to label %26 unwind label %29

26:                                               ; preds = %24
  %27 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %25, ptr noundef %1)
          to label %28 unwind label %29

28:                                               ; preds = %26
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  br label %31

29:                                               ; preds = %26, %24
  %30 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %3) #4
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
  resume { ptr, i32 } %30

31:                                               ; preds = %21, %18, %15, %12, %9, %6, %2, %28
  %.0 = phi i32 [ 0, %28 ], [ 1, %2 ], [ 2, %6 ], [ 3, %9 ], [ 4, %12 ], [ 5, %15 ], [ 0, %18 ], [ 6, %21 ]
  ret i32 %.0
}

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #2

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) local_unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3

declare noundef i32 @_ZN5micro4base6strcmpEPKcS2_(ptr noundef, ptr noundef) local_unnamed_addr #2

attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass