; LLVM IR from div-bargali/Data-Structures-and-Algorithms :: C/Data-Structures/Queue (Priority_queue)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@rear = external dso_local global i32, align 4
@pri_que = external dso_local global [5 x i32], align 16

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nounwind uwtable
define dso_local void @check(i32 noundef %0) #1 {
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 %0, ptr %2, align 4, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #2
  call void @llvm.lifetime.start.p0(i64 4, ptr %4) #2
  store i32 0, ptr %3, align 4, !tbaa !5
  br label %6

6:                                                ; preds = %42, %1
  %7 = load i32, ptr %3, align 4, !tbaa !5
  %8 = load i32, ptr @rear, align 4, !tbaa !5
  %9 = icmp sle i32 %7, %8
  br i1 %9, label %10, label %45

10:                                               ; preds = %6
  %11 = load i32, ptr %2, align 4, !tbaa !5
  %12 = load i32, ptr %3, align 4, !tbaa !5
  %13 = sext i32 %12 to i64
  %14 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %13
  %15 = load i32, ptr %14, align 4, !tbaa !5
  %16 = icmp sge i32 %11, %15
  br i1 %16, label %17, label %41

17:                                               ; preds = %10
  %18 = load i32, ptr @rear, align 4, !tbaa !5
  %19 = add nsw i32 %18, 1
  store i32 %19, ptr %4, align 4, !tbaa !5
  br label %20

20:                                               ; preds = %33, %17
  %21 = load i32, ptr %4, align 4, !tbaa !5
  %22 = load i32, ptr %3, align 4, !tbaa !5
  %23 = icmp sgt i32 %21, %22
  br i1 %23, label %24, label %36

24:                                               ; preds = %20
  %25 = load i32, ptr %4, align 4, !tbaa !5
  %26 = sub nsw i32 %25, 1
  %27 = sext i32 %26 to i64
  %28 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %27
  %29 = load i32, ptr %28, align 4, !tbaa !5
  %30 = load i32, ptr %4, align 4, !tbaa !5
  %31 = sext i32 %30 to i64
  %32 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %31
  store i32 %29, ptr %32, align 4, !tbaa !5
  br label %33

33:                                               ; preds = %24
  %34 = load i32, ptr %4, align 4, !tbaa !5
  %35 = add nsw i32 %34, -1
  store i32 %35, ptr %4, align 4, !tbaa !5
  br label %20, !llvm.loop !9

36:                                               ; preds = %20
  %37 = load i32, ptr %2, align 4, !tbaa !5
  %38 = load i32, ptr %3, align 4, !tbaa !5
  %39 = sext i32 %38 to i64
  %40 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %39
  store i32 %37, ptr %40, align 4, !tbaa !5
  store i32 1, ptr %5, align 4
  br label %50

41:                                               ; preds = %10
  br label %42

42:                                               ; preds = %41
  %43 = load i32, ptr %3, align 4, !tbaa !5
  %44 = add nsw i32 %43, 1
  store i32 %44, ptr %3, align 4, !tbaa !5
  br label %6, !llvm.loop !11

45:                                               ; preds = %6
  %46 = load i32, ptr %2, align 4, !tbaa !5
  %47 = load i32, ptr %3, align 4, !tbaa !5
  %48 = sext i32 %47 to i64
  %49 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %48
  store i32 %46, ptr %49, align 4, !tbaa !5
  store i32 0, ptr %5, align 4
  br label %50

50:                                               ; preds = %45, %36
  call void @llvm.lifetime.end.p0(i64 4, ptr %4) #2
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #2
  %51 = load i32, ptr %5, align 4
  switch i32 %51, label %53 [
    i32 0, label %52
    i32 1, label %52
  ]

52:                                               ; preds = %50, %50
  ret void

53:                                               ; preds = %50
  unreachable
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@rear = external dso_local local_unnamed_addr global i32, align 4
@pri_que = external dso_local local_unnamed_addr global [5 x i32], align 16

; Function Attrs: nofree norecurse nosync nounwind memory(readwrite, argmem: write, inaccessiblemem: none) uwtable
define dso_local void @check(i32 noundef %0) local_unnamed_addr #0 {
  %2 = load i32, ptr @rear, align 4, !tbaa !5
  %.not20 = icmp slt i32 %2, 0
  br i1 %.not20, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %1
  %narrow = add nuw i32 %2, 1
  %3 = add nuw i32 %2, 1
  %wide.trip.count = zext i32 %3 to i64
  br label %.lr.ph

.lr.ph:                                           ; preds = %.lr.ph.preheader, %25
  %indvars.iv = phi i64 [ 0, %.lr.ph.preheader ], [ %indvars.iv.next, %25 ]
  %4 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %indvars.iv
  %5 = load i32, ptr %4, align 4, !tbaa !5
  %.not16 = icmp sgt i32 %5, %0
  br i1 %.not16, label %25, label %6

6:                                                ; preds = %.lr.ph
  %7 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %indvars.iv
  %8 = trunc nuw nsw i64 %indvars.iv to i32
  %.not26 = icmp slt i32 %2, %8
  br i1 %.not26, label %._crit_edge25, label %.lr.ph24.preheader

.lr.ph24.preheader:                               ; preds = %6
  %9 = sext i32 %3 to i64
  %sext = shl i64 %indvars.iv, 32
  %10 = ashr exact i64 %sext, 32
  %11 = add nsw i64 %9, -1
  %smin = tail call i64 @llvm.smin.i64(i64 %indvars.iv, i64 %11)
  %12 = sub i64 %9, %smin
  %min.iters.check = icmp ult i64 %12, 8
  br i1 %min.iters.check, label %.lr.ph24.preheader46, label %vector.ph

vector.ph:                                        ; preds = %.lr.ph24.preheader
  %n.vec = and i64 %12, -8
  %ind.end = sub i64 %9, %n.vec
  br label %vector.body

vector.body:                                      ; preds = %vector.body, %vector.ph
  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
  %offset.idx = sub i64 %9, %index
  %13 = add nsw i64 %offset.idx, -1
  %14 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %13
  %15 = getelementptr inbounds i8, ptr %14, i64 -12
  %16 = getelementptr inbounds i8, ptr %14, i64 -28
  %wide.load = load <4 x i32>, ptr %15, align 4, !tbaa !5
  %wide.load42 = load <4 x i32>, ptr %16, align 4, !tbaa !5
  %17 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %offset.idx
  %18 = getelementptr inbounds i8, ptr %17, i64 -12
  %19 = getelementptr inbounds i8, ptr %17, i64 -28
  store <4 x i32> %wide.load, ptr %18, align 4, !tbaa !5
  store <4 x i32> %wide.load42, ptr %19, align 4, !tbaa !5
  %index.next = add nuw i64 %index, 8
  %20 = icmp eq i64 %index.next, %n.vec
  br i1 %20, label %middle.block, label %vector.body, !llvm.loop !9

middle.block:                                     ; preds = %vector.body
  %cmp.n = icmp eq i64 %12, %n.vec
  br i1 %cmp.n, label %._crit_edge25, label %.lr.ph24.preheader46

.lr.ph24.preheader46:                             ; preds = %middle.block, %.lr.ph24.preheader
  %indvars.iv35.ph = phi i64 [ %9, %.lr.ph24.preheader ], [ %ind.end, %middle.block ]
  br label %.lr.ph24

.lr.ph24:                                         ; preds = %.lr.ph24.preheader46, %.lr.ph24
  %indvars.iv35 = phi i64 [ %indvars.iv.next36, %.lr.ph24 ], [ %indvars.iv35.ph, %.lr.ph24.preheader46 ]
  %indvars.iv.next36 = add nsw i64 %indvars.iv35, -1
  %21 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %indvars.iv.next36
  %22 = load i32, ptr %21, align 4, !tbaa !5
  %23 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %indvars.iv35
  store i32 %22, ptr %23, align 4, !tbaa !5
  %24 = icmp sgt i64 %indvars.iv.next36, %10
  br i1 %24, label %.lr.ph24, label %._crit_edge25, !llvm.loop !13

25:                                               ; preds = %.lr.ph
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
  br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !14

._crit_edge.loopexit:                             ; preds = %25
  %26 = zext nneg i32 %narrow to i64
  br label %._crit_edge

._crit_edge:                                      ; preds = %._crit_edge.loopexit, %1
  %.013.lcssa = phi i64 [ 0, %1 ], [ %26, %._crit_edge.loopexit ]
  %27 = getelementptr inbounds [5 x i32], ptr @pri_que, i64 0, i64 %.013.lcssa
  br label %._crit_edge25

._crit_edge25:                                    ; preds = %.lr.ph24, %middle.block, %6, %._crit_edge
  %.sink = phi ptr [ %27, %._crit_edge ], [ %7, %6 ], [ %7, %middle.block ], [ %7, %.lr.ph24 ]
  store i32 %0, ptr %.sink, align 4, !tbaa !5
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #1

attributes #0 = { nofree norecurse nosync nounwind memory(readwrite, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !12, !11}
!14 = distinct !{!14, !10}


; Effective O3 passes: EarlyCSEPass,GVNPass,GlobalOptPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,InstSimplifyPass,JumpThreadingPass,LCSSAPass,LICMPass,LoopLoadEliminationPass,LoopRotatePass,LoopSimplifyPass,LoopUnrollPass,LoopVectorizePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass