; LLVM IR from PetoiCamp/OpenCatEsp32 :: src/icm42670 (inv_imu_driver)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.inv_imu_serif = type { ptr, ptr, ptr, i32, i32, i32 }
%struct.inv_imu_device = type { %struct.inv_imu_transport, ptr, [4128 x i8], i8, i8, i8, i32, i64, i64 }
%struct.inv_imu_transport = type { %struct.inv_imu_serif, %struct.register_cache, i8 }
%struct.register_cache = type { i8, i8, i8, i8 }

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_init(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
  %4 = alloca i32, align 4
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca ptr, align 8
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  store ptr %0, ptr %5, align 8, !tbaa !5
  store ptr %1, ptr %6, align 8, !tbaa !5
  store ptr %2, ptr %7, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %8) #5
  store i32 0, ptr %8, align 4, !tbaa !9
  %10 = load ptr, ptr %5, align 8, !tbaa !5
  call void @llvm.memset.p0.i64(ptr align 8 %10, i8 0, i64 4208, i1 false)
  %11 = load ptr, ptr %6, align 8, !tbaa !5
  %12 = icmp eq ptr %11, null
  br i1 %12, label %23, label %13

13:                                               ; preds = %3
  %14 = load ptr, ptr %6, align 8, !tbaa !5
  %15 = getelementptr inbounds %struct.inv_imu_serif, ptr %14, i32 0, i32 1
  %16 = load ptr, ptr %15, align 8, !tbaa !11
  %17 = icmp eq ptr %16, null
  br i1 %17, label %23, label %18

18:                                               ; preds = %13
  %19 = load ptr, ptr %6, align 8, !tbaa !5
  %20 = getelementptr inbounds %struct.inv_imu_serif, ptr %19, i32 0, i32 2
  %21 = load ptr, ptr %20, align 8, !tbaa !13
  %22 = icmp eq ptr %21, null
  br i1 %22, label %23, label %24

23:                                               ; preds = %18, %13, %3
  store i32 -1, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %60

24:                                               ; preds = %18
  %25 = load ptr, ptr %5, align 8, !tbaa !5
  %26 = getelementptr inbounds %struct.inv_imu_device, ptr %25, i32 0, i32 0
  %27 = getelementptr inbounds %struct.inv_imu_transport, ptr %26, i32 0, i32 0
  %28 = load ptr, ptr %6, align 8, !tbaa !5
  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %27, ptr align 8 %28, i64 40, i1 false), !tbaa.struct !14
  call void @inv_imu_sleep_us(i32 noundef 3000)
  %29 = load ptr, ptr %7, align 8, !tbaa !5
  %30 = load ptr, ptr %5, align 8, !tbaa !5
  %31 = getelementptr inbounds %struct.inv_imu_device, ptr %30, i32 0, i32 1
  store ptr %29, ptr %31, align 8, !tbaa !15
  %32 = load ptr, ptr %5, align 8, !tbaa !5
  %33 = getelementptr inbounds %struct.inv_imu_device, ptr %32, i32 0, i32 0
  %34 = getelementptr inbounds %struct.inv_imu_transport, ptr %33, i32 0, i32 2
  store i8 0, ptr %34, align 4, !tbaa !20
  %35 = load ptr, ptr %5, align 8, !tbaa !5
  %36 = call i32 @configure_serial_interface(ptr noundef %35)
  %37 = load i32, ptr %8, align 4, !tbaa !9
  %38 = or i32 %37, %36
  store i32 %38, ptr %8, align 4, !tbaa !9
  %39 = load ptr, ptr %5, align 8, !tbaa !5
  %40 = call i32 @inv_imu_device_reset(ptr noundef %39)
  %41 = load i32, ptr %8, align 4, !tbaa !9
  %42 = or i32 %41, %40
  store i32 %42, ptr %8, align 4, !tbaa !9
  %43 = load ptr, ptr %5, align 8, !tbaa !5
  %44 = call i32 @inv_imu_init_transport(ptr noundef %43)
  %45 = load i32, ptr %8, align 4, !tbaa !9
  %46 = or i32 %45, %44
  store i32 %46, ptr %8, align 4, !tbaa !9
  %47 = load ptr, ptr %5, align 8, !tbaa !5
  %48 = call i32 @inv_imu_get_endianness(ptr noundef %47)
  %49 = load i32, ptr %8, align 4, !tbaa !9
  %50 = or i32 %49, %48
  store i32 %50, ptr %8, align 4, !tbaa !9
  %51 = load ptr, ptr %5, align 8, !tbaa !5
  %52 = call i32 @init_hardware_from_ui(ptr noundef %51)
  %53 = load i32, ptr %8, align 4, !tbaa !9
  %54 = or i32 %53, %52
  store i32 %54, ptr %8, align 4, !tbaa !9
  %55 = load ptr, ptr %5, align 8, !tbaa !5
  %56 = getelementptr inbounds %struct.inv_imu_device, ptr %55, i32 0, i32 7
  store i64 4294967295, ptr %56, align 8, !tbaa !21
  %57 = load ptr, ptr %5, align 8, !tbaa !5
  %58 = getelementptr inbounds %struct.inv_imu_device, ptr %57, i32 0, i32 8
  store i64 4294967295, ptr %58, align 8, !tbaa !22
  %59 = load i32, ptr %8, align 4, !tbaa !9
  store i32 %59, ptr %4, align 4
  store i32 1, ptr %9, align 4
  br label %60

60:                                               ; preds = %24, %23
  call void @llvm.lifetime.end.p0(i64 4, ptr %8) #5
  %61 = load i32, ptr %4, align 4
  ret i32 %61
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #3

declare void @inv_imu_sleep_us(i32 noundef) #4

; Function Attrs: nounwind uwtable
declare hidden i32 @configure_serial_interface(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_device_reset(ptr noundef) #0

declare i32 @inv_imu_init_transport(ptr noundef) #4

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_get_endianness(ptr noundef) #0

; Function Attrs: nounwind uwtable
declare hidden i32 @init_hardware_from_ui(ptr noundef) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #4 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !6, i64 8}
!12 = !{!"inv_imu_serif", !6, i64 0, !6, i64 8, !6, i64 16, !10, i64 24, !10, i64 28, !10, i64 32}
!13 = !{!12, !6, i64 16}
!14 = !{i64 0, i64 8, !5, i64 8, i64 8, !5, i64 16, i64 8, !5, i64 24, i64 4, !9, i64 28, i64 4, !9, i64 32, i64 4, !9}
!15 = !{!16, !6, i64 48}
!16 = !{!"inv_imu_device", !17, i64 0, !6, i64 48, !7, i64 56, !7, i64 4184, !7, i64 4185, !7, i64 4186, !10, i64 4188, !19, i64 4192, !19, i64 4200}
!17 = !{!"inv_imu_transport", !12, i64 0, !18, i64 40, !7, i64 44}
!18 = !{!"register_cache", !7, i64 0, !7, i64 1, !7, i64 2, !7, i64 3}
!19 = !{!"long", !7, i64 0}
!20 = !{!16, !7, i64 44}
!21 = !{!16, !19, i64 4192}
!22 = !{!16, !19, i64 4200}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i32 @inv_imu_init(ptr noundef %0, ptr noundef readonly %1, ptr noundef %2) local_unnamed_addr #0 {
  tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(4208) %0, i8 0, i64 4208, i1 false)
  %4 = icmp eq ptr %1, null
  br i1 %4, label %27, label %5

5:                                                ; preds = %3
  %6 = getelementptr inbounds i8, ptr %1, i64 8
  %7 = load ptr, ptr %6, align 8, !tbaa !5
  %8 = icmp eq ptr %7, null
  br i1 %8, label %27, label %9

9:                                                ; preds = %5
  %10 = getelementptr inbounds i8, ptr %1, i64 16
  %11 = load ptr, ptr %10, align 8, !tbaa !11
  %12 = icmp eq ptr %11, null
  br i1 %12, label %27, label %13

13:                                               ; preds = %9
  tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %0, ptr noundef nonnull align 8 dereferenceable(40) %1, i64 40, i1 false), !tbaa.struct !12
  tail call void @inv_imu_sleep_us(i32 noundef 3000) #4
  %14 = getelementptr inbounds i8, ptr %0, i64 48
  store ptr %2, ptr %14, align 8, !tbaa !15
  %15 = getelementptr inbounds i8, ptr %0, i64 44
  store i8 0, ptr %15, align 4, !tbaa !20
  %16 = tail call i32 @configure_serial_interface(ptr noundef nonnull %0)
  %17 = tail call i32 @inv_imu_device_reset(ptr noundef nonnull %0)
  %18 = or i32 %17, %16
  %19 = tail call i32 @inv_imu_init_transport(ptr noundef nonnull %0) #4
  %20 = or i32 %18, %19
  %21 = tail call i32 @inv_imu_get_endianness(ptr noundef nonnull %0)
  %22 = or i32 %20, %21
  %23 = tail call i32 @init_hardware_from_ui(ptr noundef nonnull %0)
  %24 = or i32 %22, %23
  %25 = getelementptr inbounds i8, ptr %0, i64 4192
  store i64 4294967295, ptr %25, align 8, !tbaa !21
  %26 = getelementptr inbounds i8, ptr %0, i64 4200
  store i64 4294967295, ptr %26, align 8, !tbaa !22
  br label %27

27:                                               ; preds = %3, %5, %9, %13
  %.0 = phi i32 [ %24, %13 ], [ -1, %9 ], [ -1, %5 ], [ -1, %3 ]
  ret i32 %.0
}

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1

; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2

declare void @inv_imu_sleep_us(i32 noundef) local_unnamed_addr #3

; Function Attrs: nounwind uwtable
declare hidden i32 @configure_serial_interface(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_device_reset(ptr noundef) local_unnamed_addr #0

declare i32 @inv_imu_init_transport(ptr noundef) local_unnamed_addr #3

; Function Attrs: nounwind uwtable
declare dso_local i32 @inv_imu_get_endianness(ptr noundef) local_unnamed_addr #0

; Function Attrs: nounwind uwtable
declare hidden i32 @init_hardware_from_ui(ptr noundef) local_unnamed_addr #0

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"inv_imu_serif", !7, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !10, i64 28, !10, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 16}
!12 = !{i64 0, i64 8, !13, i64 8, i64 8, !13, i64 16, i64 8, !13, i64 24, i64 4, !14, i64 28, i64 4, !14, i64 32, i64 4, !14}
!13 = !{!7, !7, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{!16, !7, i64 48}
!16 = !{!"inv_imu_device", !17, i64 0, !7, i64 48, !8, i64 56, !8, i64 4184, !8, i64 4185, !8, i64 4186, !10, i64 4188, !19, i64 4192, !19, i64 4200}
!17 = !{!"inv_imu_transport", !6, i64 0, !18, i64 40, !8, i64 44}
!18 = !{!"register_cache", !8, i64 0, !8, i64 1, !8, i64 2, !8, i64 3}
!19 = !{!"long", !8, i64 0}
!20 = !{!16, !8, i64 44}
!21 = !{!16, !19, i64 4192}
!22 = !{!16, !19, i64 4200}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass