; LLVM IR from aap/pdp6 :: misc (rim2mem)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable
define dso_local i64 @rimword() #0 {
  %1 = alloca i64, align 8
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #3
  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.start.p0(i64 8, ptr %4) #3
  store i64 0, ptr %4, align 8, !tbaa !5
  store i32 0, ptr %2, align 4, !tbaa !9
  br label %6

6:                                                ; preds = %27, %0
  %7 = load i32, ptr %2, align 4, !tbaa !9
  %8 = icmp slt i32 %7, 6
  br i1 %8, label %9, label %28

9:                                                ; preds = %6
  %10 = call i32 @getchar()
  store i32 %10, ptr %3, align 4, !tbaa !9
  %11 = load i32, ptr %3, align 4, !tbaa !9
  %12 = icmp eq i32 %11, -1
  br i1 %12, label %13, label %14

13:                                               ; preds = %9
  store i64 -1, ptr %1, align 8
  store i32 1, ptr %5, align 4
  br label %30

14:                                               ; preds = %9
  %15 = load i32, ptr %3, align 4, !tbaa !9
  %16 = and i32 %15, 128
  %17 = icmp ne i32 %16, 0
  br i1 %17, label %18, label %27

18:                                               ; preds = %14
  %19 = load i64, ptr %4, align 8, !tbaa !5
  %20 = shl i64 %19, 6
  %21 = load i32, ptr %3, align 4, !tbaa !9
  %22 = and i32 %21, 63
  %23 = sext i32 %22 to i64
  %24 = or i64 %20, %23
  store i64 %24, ptr %4, align 8, !tbaa !5
  %25 = load i32, ptr %2, align 4, !tbaa !9
  %26 = add nsw i32 %25, 1
  store i32 %26, ptr %2, align 4, !tbaa !9
  br label %27

27:                                               ; preds = %18, %14
  br label %6, !llvm.loop !11

28:                                               ; preds = %6
  %29 = load i64, ptr %4, align 8, !tbaa !5
  store i64 %29, ptr %1, align 8
  store i32 1, ptr %5, align 4
  br label %30

30:                                               ; preds = %28, %13
  call void @llvm.lifetime.end.p0(i64 8, ptr %4) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #3
  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #3
  %31 = load i64, ptr %1, align 8
  ret i64 %31
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: inlinehint nounwind uwtable
declare i32 @getchar() #2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nofree nounwind uwtable
define dso_local i64 @rimword() local_unnamed_addr #0 {
  br label %1

1:                                                ; preds = %0, %select.unfold
  %.014 = phi i64 [ 0, %0 ], [ %spec.select12, %select.unfold ]
  %.0913 = phi i32 [ 0, %0 ], [ %spec.select, %select.unfold ]
  %2 = tail call i32 @getchar()
  %3 = icmp eq i32 %2, -1
  br i1 %3, label %11, label %select.unfold

select.unfold:                                    ; preds = %1
  %4 = and i32 %2, 128
  %.not = icmp eq i32 %4, 0
  %5 = shl i64 %.014, 6
  %6 = and i32 %2, 63
  %7 = zext nneg i32 %6 to i64
  %8 = or disjoint i64 %5, %7
  %9 = lshr exact i32 %4, 7
  %spec.select = add nuw nsw i32 %9, %.0913
  %spec.select12 = select i1 %.not, i64 %.014, i64 %8
  %10 = icmp ult i32 %spec.select, 6
  br i1 %10, label %1, label %11

11:                                               ; preds = %select.unfold, %1
  %.08 = phi i64 [ -1, %1 ], [ %spec.select12, %select.unfold ]
  ret i64 %.08
}

; Function Attrs: inlinehint nofree nounwind uwtable
declare noundef i32 @getchar() local_unnamed_addr #1

attributes #0 = { nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint nofree nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: CorrelatedValuePropagationPass,GlobalOptPass,IPSCCPPass,InferFunctionAttrsPass,InstCombinePass,JumpThreadingPass,LoopRotatePass,PostOrderFunctionAttrsPass,ReassociatePass,SROAPass,SimplifyCFGPass,TailCallElimPass