; LLVM IR from XiaoMi/mace :: micro/framework (micro_engine)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }
%struct.model_header = type { i64, i64, i64, i64, i64, i64 }
%"struct.micro::MaceMicroEngineConfig" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32 }

@.str = external hidden unnamed_addr constant [77 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [63 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5micro15MaceMicroEngine4InitEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef) #0 align 2

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #2

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro31CreateMaceMicroEngineFromBinaryEPhjPPNS_9framework8OperatorEjPPNS_15MaceMicroEngineE(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr noundef %4) #0 personality ptr @__gxx_personality_v0 {
  %6 = alloca ptr, align 8
  %7 = alloca i32, align 4
  %8 = alloca ptr, align 8
  %9 = alloca i32, align 4
  %10 = alloca ptr, align 8
  %11 = alloca ptr, align 8
  %12 = alloca %"class.micro::base::Logger", align 4
  %13 = alloca ptr, align 8
  %14 = alloca i32, align 4
  %15 = alloca ptr, align 8
  %16 = alloca ptr, align 8
  %17 = alloca ptr, align 8
  %18 = alloca ptr, align 8
  %19 = alloca ptr, align 8
  %20 = alloca ptr, align 8
  %21 = alloca ptr, align 8
  %22 = alloca i32, align 4
  %23 = alloca ptr, align 8
  store ptr %0, ptr %6, align 8, !tbaa !5
  store i32 %1, ptr %7, align 4, !tbaa !9
  store ptr %2, ptr %8, align 8, !tbaa !5
  store i32 %3, ptr %9, align 4, !tbaa !9
  store ptr %4, ptr %10, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %11) #7
  %24 = load ptr, ptr %6, align 8, !tbaa !5
  store ptr %24, ptr %11, align 8, !tbaa !5
  %25 = load i32, ptr %7, align 4, !tbaa !9
  %26 = zext i32 %25 to i64
  %27 = load ptr, ptr %11, align 8, !tbaa !5
  %28 = getelementptr inbounds %struct.model_header, ptr %27, i32 0, i32 3
  %29 = load i64, ptr %28, align 8, !tbaa !11
  %30 = icmp eq i64 %26, %29
  br i1 %30, label %38, label %31

31:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr %12) #7
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef @.str, i32 noundef 124, i32 noundef 4)
  %32 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %12, ptr noundef @.str.14)
          to label %33 unwind label %34

33:                                               ; preds = %31
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %38

34:                                               ; preds = %31
  %35 = landingpad { ptr, i32 }
          cleanup
  %36 = extractvalue { ptr, i32 } %35, 0
  store ptr %36, ptr %13, align 8
  %37 = extractvalue { ptr, i32 } %35, 1
  store i32 %37, ptr %14, align 4
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %12) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr %12) #7
  br label %127

38:                                               ; preds = %33, %5
  call void @llvm.lifetime.start.p0(i64 8, ptr %15) #7
  %39 = load ptr, ptr %6, align 8, !tbaa !5
  %40 = load ptr, ptr %11, align 8, !tbaa !5
  %41 = getelementptr inbounds %struct.model_header, ptr %40, i32 0, i32 0
  %42 = load i64, ptr %41, align 8, !tbaa !14
  %43 = getelementptr inbounds i8, ptr %39, i64 %42
  store ptr %43, ptr %15, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %16) #7
  %44 = load ptr, ptr %6, align 8, !tbaa !5
  %45 = load ptr, ptr %11, align 8, !tbaa !5
  %46 = getelementptr inbounds %struct.model_header, ptr %45, i32 0, i32 1
  %47 = load i64, ptr %46, align 8, !tbaa !15
  %48 = getelementptr inbounds i8, ptr %44, i64 %47
  store ptr %48, ptr %16, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %17) #7
  %49 = load ptr, ptr %6, align 8, !tbaa !5
  %50 = load ptr, ptr %11, align 8, !tbaa !5
  %51 = getelementptr inbounds %struct.model_header, ptr %50, i32 0, i32 2
  %52 = load i64, ptr %51, align 8, !tbaa !16
  %53 = getelementptr inbounds i8, ptr %49, i64 %52
  store ptr %53, ptr %17, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %18) #7
  %54 = load ptr, ptr %11, align 8, !tbaa !5
  %55 = getelementptr inbounds %struct.model_header, ptr %54, i32 0, i32 4
  %56 = load i64, ptr %55, align 8, !tbaa !17
  %57 = call noalias noundef nonnull ptr @_Znam(i64 noundef %56) #8
  store ptr %57, ptr %18, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %19) #7
  %58 = load ptr, ptr %11, align 8, !tbaa !5
  %59 = getelementptr inbounds %struct.model_header, ptr %58, i32 0, i32 5
  %60 = load i64, ptr %59, align 8, !tbaa !18
  %61 = call noalias noundef nonnull ptr @_Znam(i64 noundef %60) #8
  store ptr %61, ptr %19, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %20) #7
  %62 = load i32, ptr %9, align 4, !tbaa !9
  %63 = zext i32 %62 to i64
  %64 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %63, i64 8)
  %65 = extractvalue { i64, i1 } %64, 1
  %66 = extractvalue { i64, i1 } %64, 0
  %67 = select i1 %65, i64 -1, i64 %66
  %68 = call noalias noundef nonnull ptr @_Znam(i64 noundef %67) #8
  store ptr %68, ptr %20, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %21) #7
  %69 = load i32, ptr %9, align 4, !tbaa !9
  %70 = zext i32 %69 to i64
  %71 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %70, i64 8)
  %72 = extractvalue { i64, i1 } %71, 1
  %73 = extractvalue { i64, i1 } %71, 0
  %74 = select i1 %72, i64 -1, i64 %73
  %75 = call noalias noundef nonnull ptr @_Znam(i64 noundef %74) #8
  store ptr %75, ptr %21, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 4, ptr %22) #7
  store i32 0, ptr %22, align 4, !tbaa !9
  br label %76

76:                                               ; preds = %90, %38
  %77 = load i32, ptr %22, align 4, !tbaa !9
  %78 = load i32, ptr %9, align 4, !tbaa !9
  %79 = icmp ult i32 %77, %78
  br i1 %79, label %81, label %80

80:                                               ; preds = %76
  call void @llvm.lifetime.end.p0(i64 4, ptr %22) #7
  br label %93

81:                                               ; preds = %76
  %82 = load ptr, ptr %20, align 8, !tbaa !5
  %83 = load i32, ptr %22, align 4, !tbaa !9
  %84 = zext i32 %83 to i64
  %85 = getelementptr inbounds ptr, ptr %82, i64 %84
  store ptr null, ptr %85, align 8, !tbaa !5
  %86 = load ptr, ptr %21, align 8, !tbaa !5
  %87 = load i32, ptr %22, align 4, !tbaa !9
  %88 = zext i32 %87 to i64
  %89 = getelementptr inbounds ptr, ptr %86, i64 %88
  store ptr null, ptr %89, align 8, !tbaa !5
  br label %90

90:                                               ; preds = %81
  %91 = load i32, ptr %22, align 4, !tbaa !9
  %92 = add i32 %91, 1
  store i32 %92, ptr %22, align 4, !tbaa !9
  br label %76, !llvm.loop !19

93:                                               ; preds = %80
  %94 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 16) #8
  invoke void @_ZN5micro15MaceMicroEngineC1Ev(ptr noundef nonnull align 8 dereferenceable(9) %94)
          to label %95 unwind label %123

95:                                               ; preds = %93
  %96 = load ptr, ptr %10, align 8, !tbaa !5
  store ptr %94, ptr %96, align 8, !tbaa !5
  call void @llvm.lifetime.start.p0(i64 8, ptr %23) #7
  %97 = call noalias noundef nonnull ptr @_Znwm(i64 noundef 72) #8
  %98 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 0
  %99 = load ptr, ptr %15, align 8, !tbaa !5
  store ptr %99, ptr %98, align 16, !tbaa !21
  %100 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 1
  %101 = load ptr, ptr %17, align 8, !tbaa !5
  store ptr %101, ptr %100, align 8, !tbaa !23
  %102 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 2
  %103 = load ptr, ptr %16, align 8, !tbaa !5
  store ptr %103, ptr %102, align 16, !tbaa !24
  %104 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 3
  %105 = load ptr, ptr %8, align 8, !tbaa !5
  store ptr %105, ptr %104, align 8, !tbaa !25
  %106 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 4
  %107 = load ptr, ptr %18, align 8, !tbaa !5
  store ptr %107, ptr %106, align 16, !tbaa !26
  %108 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 5
  %109 = load ptr, ptr %20, align 8, !tbaa !5
  store ptr %109, ptr %108, align 8, !tbaa !27
  %110 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 6
  %111 = load ptr, ptr %21, align 8, !tbaa !5
  store ptr %111, ptr %110, align 16, !tbaa !28
  %112 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 7
  %113 = load ptr, ptr %19, align 8, !tbaa !5
  store ptr %113, ptr %112, align 8, !tbaa !29
  %114 = getelementptr inbounds %"struct.micro::MaceMicroEngineConfig", ptr %97, i32 0, i32 8
  %115 = load ptr, ptr %11, align 8, !tbaa !5
  %116 = getelementptr inbounds %struct.model_header, ptr %115, i32 0, i32 5
  %117 = load i64, ptr %116, align 8, !tbaa !18
  %118 = trunc i64 %117 to i32
  store i32 %118, ptr %114, align 16, !tbaa !30
  store ptr %97, ptr %23, align 8, !tbaa !5
  %119 = load ptr, ptr %10, align 8, !tbaa !5
  %120 = load ptr, ptr %119, align 8, !tbaa !5
  %121 = load ptr, ptr %23, align 8, !tbaa !5
  %122 = call noundef i32 @_ZN5micro15MaceMicroEngine4InitEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 8 dereferenceable(9) %120, ptr noundef %121)
  call void @llvm.lifetime.end.p0(i64 8, ptr %23) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #7
  ret i32 %122

123:                                              ; preds = %93
  %124 = landingpad { ptr, i32 }
          cleanup
  %125 = extractvalue { ptr, i32 } %124, 0
  store ptr %125, ptr %13, align 8
  %126 = extractvalue { ptr, i32 } %124, 1
  store i32 %126, ptr %14, align 4
  call void @_ZdlPvm(ptr noundef %94, i64 noundef 16) #9
  call void @llvm.lifetime.end.p0(i64 8, ptr %21) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %20) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %19) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %18) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %17) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %16) #7
  call void @llvm.lifetime.end.p0(i64 8, ptr %15) #7
  br label %127

127:                                              ; preds = %123, %34
  call void @llvm.lifetime.end.p0(i64 8, ptr %11) #7
  br label %128

128:                                              ; preds = %127
  %129 = load ptr, ptr %13, align 8
  %130 = load i32, ptr %14, align 4
  %131 = insertvalue { ptr, i32 } poison, ptr %129, 0
  %132 = insertvalue { ptr, i32 } %131, i32 %130, 1
  resume { ptr, i32 } %132
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) #4

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #5

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) #4

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) #6

declare void @_ZN5micro15MaceMicroEngineC1Ev(ptr)

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #6 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !13, i64 24}
!12 = !{!"_ZTSZN5micro31CreateMaceMicroEngineFromBinaryEPhjPPNS_9framework8OperatorEjPPNS_15MaceMicroEngineEE12model_header", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 0}
!15 = !{!12, !13, i64 8}
!16 = !{!12, !13, i64 16}
!17 = !{!12, !13, i64 32}
!18 = !{!12, !13, i64 40}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!22, !6, i64 0}
!22 = !{!"_ZTSN5micro21MaceMicroEngineConfigE", !6, i64 0, !6, i64 8, !6, i64 16, !6, i64 24, !6, i64 32, !6, i64 40, !6, i64 48, !6, i64 56, !10, i64 64}
!23 = !{!22, !6, i64 8}
!24 = !{!22, !6, i64 16}
!25 = !{!22, !6, i64 24}
!26 = !{!22, !6, i64 32}
!27 = !{!22, !6, i64 40}
!28 = !{!22, !6, i64 48}
!29 = !{!22, !6, i64 56}
!30 = !{!22, !10, i64 64}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"class.micro::base::Logger" = type { i32 }

@.str = external hidden unnamed_addr constant [77 x i8], align 1
@.str.14 = external hidden unnamed_addr constant [63 x i8], align 1

; Function Attrs: mustprogress uwtable
declare dso_local noundef i32 @_ZN5micro15MaceMicroEngine4InitEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 8 dereferenceable(9), ptr noundef) local_unnamed_addr #0 align 2

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

declare void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef, i32 noundef, i32 noundef) unnamed_addr #2

declare noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4), ptr noundef) local_unnamed_addr #2

declare i32 @__gxx_personality_v0(...)

; Function Attrs: nounwind
declare void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4)) unnamed_addr #3

; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZN5micro31CreateMaceMicroEngineFromBinaryEPhjPPNS_9framework8OperatorEjPPNS_15MaceMicroEngineE(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, ptr nocapture noundef writeonly %4) local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
  %6 = alloca %"class.micro::base::Logger", align 4
  %7 = zext i32 %1 to i64
  %8 = getelementptr inbounds i8, ptr %0, i64 24
  %9 = load i64, ptr %8, align 8, !tbaa !5
  %10 = icmp eq i64 %9, %7
  br i1 %10, label %16, label %11

11:                                               ; preds = %5
  call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #7
  call void @_ZN5micro4base6LoggerC1EPKcjNS_8LogLevelE(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull @.str, i32 noundef 124, i32 noundef 4)
  %12 = invoke noundef nonnull align 4 dereferenceable(4) ptr @_ZNK5micro4base6LoggerlsEPKc(ptr noundef nonnull align 4 dereferenceable(4) %6, ptr noundef nonnull @.str.14)
          to label %13 unwind label %14

13:                                               ; preds = %11
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %6) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #7
  br label %16

14:                                               ; preds = %11
  %15 = landingpad { ptr, i32 }
          cleanup
  call void @_ZN5micro4base6LoggerD1Ev(ptr noundef nonnull align 4 dereferenceable(4) %6) #7
  call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #7
  br label %51

16:                                               ; preds = %13, %5
  %17 = load i64, ptr %0, align 8, !tbaa !10
  %18 = getelementptr inbounds i8, ptr %0, i64 8
  %19 = load i64, ptr %18, align 8, !tbaa !11
  %20 = getelementptr inbounds i8, ptr %0, i64 16
  %21 = load i64, ptr %20, align 8, !tbaa !12
  %22 = getelementptr inbounds i8, ptr %0, i64 32
  %23 = load i64, ptr %22, align 8, !tbaa !13
  %24 = call noalias noundef nonnull ptr @_Znam(i64 noundef %23) #8
  %25 = getelementptr inbounds i8, ptr %0, i64 40
  %26 = load i64, ptr %25, align 8, !tbaa !14
  %27 = call noalias noundef nonnull ptr @_Znam(i64 noundef %26) #8
  %28 = zext i32 %3 to i64
  %29 = shl nuw nsw i64 %28, 3
  %30 = call noalias noundef nonnull ptr @_Znam(i64 noundef %29) #8
  %31 = call noalias noundef nonnull ptr @_Znam(i64 noundef %29) #8
  %.not = icmp eq i32 %3, 0
  br i1 %.not, label %._crit_edge, label %.lr.ph.preheader

.lr.ph.preheader:                                 ; preds = %16
  call void @llvm.memset.p0.i64(ptr nonnull align 8 %30, i8 0, i64 %29, i1 false), !tbaa !15
  call void @llvm.memset.p0.i64(ptr nonnull align 8 %31, i8 0, i64 %29, i1 false), !tbaa !15
  br label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph.preheader, %16
  %32 = call noalias noundef nonnull dereferenceable(16) ptr @_Znwm(i64 noundef 16) #8
  invoke void @_ZN5micro15MaceMicroEngineC1Ev(ptr noundef nonnull align 8 dereferenceable(9) %32)
          to label %33 unwind label %49

33:                                               ; preds = %._crit_edge
  %34 = getelementptr inbounds i8, ptr %0, i64 %21
  %35 = getelementptr inbounds i8, ptr %0, i64 %19
  %36 = getelementptr inbounds i8, ptr %0, i64 %17
  store ptr %32, ptr %4, align 8, !tbaa !15
  %37 = call noalias noundef nonnull dereferenceable(72) ptr @_Znwm(i64 noundef 72) #8
  store ptr %36, ptr %37, align 16, !tbaa !17
  %38 = getelementptr inbounds i8, ptr %37, i64 8
  store ptr %34, ptr %38, align 8, !tbaa !20
  %39 = getelementptr inbounds i8, ptr %37, i64 16
  store ptr %35, ptr %39, align 16, !tbaa !21
  %40 = getelementptr inbounds i8, ptr %37, i64 24
  store ptr %2, ptr %40, align 8, !tbaa !22
  %41 = getelementptr inbounds i8, ptr %37, i64 32
  store ptr %24, ptr %41, align 16, !tbaa !23
  %42 = getelementptr inbounds i8, ptr %37, i64 40
  store ptr %30, ptr %42, align 8, !tbaa !24
  %43 = getelementptr inbounds i8, ptr %37, i64 48
  store ptr %31, ptr %43, align 16, !tbaa !25
  %44 = getelementptr inbounds i8, ptr %37, i64 56
  store ptr %27, ptr %44, align 8, !tbaa !26
  %45 = getelementptr inbounds i8, ptr %37, i64 64
  %46 = load i64, ptr %25, align 8, !tbaa !14
  %47 = trunc i64 %46 to i32
  store i32 %47, ptr %45, align 16, !tbaa !27
  %48 = call noundef i32 @_ZN5micro15MaceMicroEngine4InitEPNS_21MaceMicroEngineConfigE(ptr noundef nonnull align 8 dereferenceable(9) %32, ptr noundef nonnull %37)
  ret i32 %48

49:                                               ; preds = %._crit_edge
  %50 = landingpad { ptr, i32 }
          cleanup
  call void @_ZdlPvm(ptr noundef nonnull %32, i64 noundef 16) #9
  br label %51

51:                                               ; preds = %49, %14
  %.pn = phi { ptr, i32 } [ %50, %49 ], [ %15, %14 ]
  resume { ptr, i32 } %.pn
}

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znam(i64 noundef) local_unnamed_addr #4

; Function Attrs: nobuiltin allocsize(0)
declare noundef nonnull ptr @_Znwm(i64 noundef) local_unnamed_addr #4

; Function Attrs: nobuiltin nounwind
declare void @_ZdlPvm(ptr noundef, i64 noundef) local_unnamed_addr #5

declare void @_ZN5micro15MaceMicroEngineC1Ev(ptr) local_unnamed_addr

; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #6

attributes #0 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nobuiltin allocsize(0) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { nobuiltin nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #7 = { nounwind }
attributes #8 = { builtin allocsize(0) }
attributes #9 = { builtin nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !7, i64 24}
!6 = !{!"_ZTSZN5micro31CreateMaceMicroEngineFromBinaryEPhjPPNS_9framework8OperatorEjPPNS_15MaceMicroEngineEE12model_header", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 32}
!14 = !{!6, !7, i64 40}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"_ZTSN5micro21MaceMicroEngineConfigE", !16, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32, !16, i64 40, !16, i64 48, !16, i64 56, !19, i64 64}
!19 = !{!"int", !8, i64 0}
!20 = !{!18, !16, i64 8}
!21 = !{!18, !16, i64 16}
!22 = !{!18, !16, i64 24}
!23 = !{!18, !16, i64 32}
!24 = !{!18, !16, i64 40}
!25 = !{!18, !16, i64 48}
!26 = !{!18, !16, i64 56}
!27 = !{!18, !19, i64 64}


; Effective O3 passes: CorrelatedValuePropagationPass,EarlyCSEPass,GVNPass,GlobalOptPass,IPSCCPPass,IndVarSimplifyPass,InferFunctionAttrsPass,InstCombinePass,LoopIdiomRecognizePass,LoopRotatePass,LoopSimplifyPass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass