; LLVM IR from facebook/redex :: service/regalloc (Interference)

; Unoptimized IR (clang -disable-llvm-passes):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #0

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN8regalloc12interference4impl18edge_weight_helperEhh(i8 noundef zeroext, i8 noundef zeroext) #1

; Function Attrs: mustprogress uwtable
define dso_local noundef i32 @_ZNK8regalloc12interference5Graph11edge_weightERKNS0_4NodeES4_(ptr noundef nonnull align 8 dereferenceable(168) %0, ptr noundef nonnull align 8 dereferenceable(56) %1, ptr noundef nonnull align 8 dereferenceable(56) %2) #2 align 2 {
  %4 = alloca ptr, align 8
  %5 = alloca ptr, align 8
  %6 = alloca ptr, align 8
  %7 = alloca i8, align 1
  store ptr %0, ptr %4, align 8, !tbaa !5
  store ptr %1, ptr %5, align 8, !tbaa !5
  store ptr %2, ptr %6, align 8, !tbaa !5
  %8 = load ptr, ptr %4, align 8
  call void @llvm.lifetime.start.p0(i64 1, ptr %7) #4
  %9 = load ptr, ptr %5, align 8, !tbaa !5
  %10 = call noundef zeroext i16 @_ZNK8regalloc12interference4Node8max_vregEv(ptr noundef nonnull align 8 dereferenceable(56) %9)
  %11 = zext i16 %10 to i32
  %12 = call noundef zeroext i16 @_ZN8regalloc18max_unsigned_valueEh(i8 noundef zeroext 16)
  %13 = zext i16 %12 to i32
  %14 = icmp slt i32 %11, %13
  %15 = zext i1 %14 to i32
  %16 = load ptr, ptr %6, align 8, !tbaa !5
  %17 = call noundef zeroext i16 @_ZNK8regalloc12interference4Node8max_vregEv(ptr noundef nonnull align 8 dereferenceable(56) %16)
  %18 = zext i16 %17 to i32
  %19 = call noundef zeroext i16 @_ZN8regalloc18max_unsigned_valueEh(i8 noundef zeroext 16)
  %20 = zext i16 %19 to i32
  %21 = icmp slt i32 %18, %20
  %22 = zext i1 %21 to i32
  %23 = icmp eq i32 %15, %22
  %24 = zext i1 %23 to i8
  store i8 %24, ptr %7, align 1, !tbaa !9
  %25 = load i8, ptr %7, align 1, !tbaa !9, !range !11, !noundef !12
  %26 = trunc i8 %25 to i1
  br i1 %26, label %27, label %33

27:                                               ; preds = %3
  %28 = load ptr, ptr %5, align 8, !tbaa !5
  %29 = call noundef zeroext i8 @_ZNK8regalloc12interference4Node5widthEv(ptr noundef nonnull align 8 dereferenceable(56) %28)
  %30 = load ptr, ptr %6, align 8, !tbaa !5
  %31 = call noundef zeroext i8 @_ZNK8regalloc12interference4Node5widthEv(ptr noundef nonnull align 8 dereferenceable(56) %30)
  %32 = call noundef i32 @_ZN8regalloc12interference4impl18edge_weight_helperEhh(i8 noundef zeroext %29, i8 noundef zeroext %31)
  br label %34

33:                                               ; preds = %3
  br label %34

34:                                               ; preds = %33, %27
  %35 = phi i32 [ %32, %27 ], [ 0, %33 ]
  call void @llvm.lifetime.end.p0(i64 1, ptr %7) #4
  ret i32 %35
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZNK8regalloc12interference4Node8max_vregEv(ptr noundef nonnull align 8 dereferenceable(56)) #1 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZN8regalloc18max_unsigned_valueEh(i8 noundef zeroext) #3

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZNK8regalloc12interference4Node5widthEv(ptr noundef nonnull align 8 dereferenceable(56)) #1 align 2

attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #1 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"bool", !7, i64 0}
!11 = !{i8 0, i8 2}
!12 = !{}


; Optimized IR (opt -passes='default<O3>'):
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef i32 @_ZN8regalloc12interference4impl18edge_weight_helperEhh(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #0

; Function Attrs: mustprogress nounwind uwtable
define dso_local noundef i32 @_ZNK8regalloc12interference5Graph11edge_weightERKNS0_4NodeES4_(ptr nocapture noundef nonnull readnone align 8 dereferenceable(168) %0, ptr noundef nonnull align 8 dereferenceable(56) %1, ptr noundef nonnull align 8 dereferenceable(56) %2) local_unnamed_addr #0 align 2 {
  %4 = tail call noundef zeroext i16 @_ZNK8regalloc12interference4Node8max_vregEv(ptr noundef nonnull align 8 dereferenceable(56) %1)
  %5 = tail call noundef zeroext i16 @_ZN8regalloc18max_unsigned_valueEh(i8 noundef zeroext 16)
  %6 = icmp ult i16 %4, %5
  %7 = tail call noundef zeroext i16 @_ZNK8regalloc12interference4Node8max_vregEv(ptr noundef nonnull align 8 dereferenceable(56) %2)
  %8 = tail call noundef zeroext i16 @_ZN8regalloc18max_unsigned_valueEh(i8 noundef zeroext 16)
  %9 = icmp uge i16 %7, %8
  %10 = xor i1 %6, %9
  br i1 %10, label %11, label %15

11:                                               ; preds = %3
  %12 = tail call noundef zeroext i8 @_ZNK8regalloc12interference4Node5widthEv(ptr noundef nonnull align 8 dereferenceable(56) %1)
  %13 = tail call noundef zeroext i8 @_ZNK8regalloc12interference4Node5widthEv(ptr noundef nonnull align 8 dereferenceable(56) %2)
  %14 = tail call noundef i32 @_ZN8regalloc12interference4impl18edge_weight_helperEhh(i8 noundef zeroext %12, i8 noundef zeroext %13)
  br label %15

15:                                               ; preds = %3, %11
  %16 = phi i32 [ %14, %11 ], [ 0, %3 ]
  ret i32 %16
}

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZNK8regalloc12interference4Node8max_vregEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #0 align 2

; Function Attrs: inlinehint mustprogress nounwind uwtable
declare dso_local noundef zeroext i16 @_ZN8regalloc18max_unsigned_valueEh(i8 noundef zeroext) local_unnamed_addr #1

; Function Attrs: mustprogress nounwind uwtable
declare dso_local noundef zeroext i8 @_ZNK8regalloc12interference4Node5widthEv(ptr noundef nonnull align 8 dereferenceable(56)) local_unnamed_addr #0 align 2

attributes #0 = { mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { inlinehint mustprogress nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 19.1.0 (git@github.com:llvm/llvm-project.git a4bf6cd7cfb1a1421ba92bca9d017b49936c55e4)"}


; Effective O3 passes: EarlyCSEPass,GlobalOptPass,InferFunctionAttrsPass,InstCombinePass,PostOrderFunctionAttrsPass,SROAPass,SimplifyCFGPass,TailCallElimPass